PATENT CLAIM ANALYSIS

Application Number: 15910015
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-10
Patent Classification: ["257", "296000"]

Abstract:
A semiconductor memory device and a method of forming the same, the semiconductor memory device includes a plurality of active areas, a shallow trench isolation, a plurality of trenches and a plurality of gates. The active areas are defined on a semiconductor substrate, and surrounded by the shallow trench isolation. The trenches are disposed in the semiconductor substrate, penetrating through the active areas and the shallow trench isolation, wherein each of the trenches includes a bottom surface and a saddle portion protruded therefrom in each active areas. The gates are disposed in the trenches respectively.

Claim (Index 10):
The method of fabricating a semiconductor memory device according to  claim 7 , wherein the formation of the trenches comprises:\n performing a removal process of the shallow trench isolation; and performing a removal process of the semiconductor substrate to form the trenches.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 90.0
- Lexical Diversity: 2.5
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14025087', '13182450', '14146659', '11490301', '10615630']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.912131897700281
- 35 USC 102 Novelty (BERT): 0.496316477489055
- Combined Prediction Score: 0.8705503556791584
- Mean Citation Score: 221.330186
- Max Citation Score: 230.26147000000003
- Similarity Product: 178.61323965100533

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test