PATENT CLAIM ANALYSIS

Application Number: 16045267
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["257", "347000"]

Abstract:
Semiconductor structures and methods of forming semiconductor structures. Trench isolation regions arranged to surround an active device region The trench isolation regions extend through a device layer and a buried oxide layer of a silicon-on-insulator wafer into a substrate of the silicon-on-insulator wafer. A well is arranged in the substrate outside of the trench isolation regions, and a doped region is arranged in a portion of the substrate. The doped region is arranged in a portion of the substrate that is located in a horizontal direction adjacent to one of the trench isolation regions and in a vertical direction adjacent to the buried oxide layer. The doped region and the well have the same conductivity type.

Claim (Index 20):
The method of  claim 11  wherein the first doped region is completely separated from the active device region by the portion of the buried oxide layer extending between the trench isolation regions.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 95.0
- Lexical Diversity: 2.44
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['10940093', '11728111', '15401281', '12342488', '11875190']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9280211754728402
- 35 USC 102 Novelty (BERT): 0.4991412978893011
- Combined Prediction Score: 0.8851331877144863
- Mean Citation Score: 239.781912
- Max Citation Score: 250.01195
- Similarity Product: 184.39706387088896

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test