PATENT CLAIM ANALYSIS

Application Number: 16049411
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-04
Patent Classification: ["365", "096000"]

Abstract:
A memory device includes a memory array of a set of memory cells. Each memory cell of the set of memory cells includes at least one transistor and at least one capacitor. The memory array includes at least one programmed memory cell. The programmed memory cell is selectively programmed by applying hot-carrier injection (HCI) to a transistor of the programmed memory cell. The programmed memory cell may provide an indication of pattern data that may be used to facilitate functionality such as data encryption, data decryption, implementation of a particular memory device operation mode, and/or machine-implemented instructions.

Claim (Index 5):
The memory device of  claim 1 , comprising:\n a plurality of programmed memory cells; and a plurality of un-programmed memory cells that have not be programmed by applying HCI and are not a reference for the plurality of programmed memory cells.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 95.0
- Lexical Diversity: 1.98148
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15789167', '14605433', '15908051', '14683720', '12053236']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7337179834044915
- 35 USC 102 Novelty (BERT): 0.5105851700521286
- Combined Prediction Score: 0.7114047020692551
- Mean Citation Score: 160.898088
- Max Citation Score: 258.3429
- Similarity Product: 160.52426873116497

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test