PATENT CLAIM ANALYSIS

Application Number: 15955527
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-08
Patent Classification: ["257", "713000"]

Abstract:
A chip package module includes an encapsulation layer, a chip, a substrate and a plurality of blind-hole electrodes. The encapsulation layer includes a first surface and a second surface opposite to the first surface. The chip includes a third surface and a fourth surface opposite to the third surface. A metal bump is fabricated on the third surface of the chip. The chip is embedded into the encapsulation layer from the first surface of the encapsulation layer. The metal bump is exposed from the first surface of the encapsulation layer. The substrate includes a metal layer, wherein the metal layer of the substrate is bonded to the chip through the metal bump. The plurality of blind-hole electrodes pass through the second surface of the encapsulation layer and are electrically connected to the metal layer of the substrate.

Claim (Index 21):
The chip package module as claimed in  claim 1 , wherein the plurality of electrodes are blind-hole electrodes passing through the encapsulation layer from the second surface of the encapsulation layer.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 91.0
- Lexical Diversity: 3.52381
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15571581', '11362419', '15923337', '13555248', '10635168']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9235039013248209
- 35 USC 102 Novelty (BERT): 0.4752161179238744
- Combined Prediction Score: 0.8786751229847262
- Mean Citation Score: 199.985236
- Max Citation Score: 203.73335
- Similarity Product: 166.88503473480344

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test