PATENT CLAIM ANALYSIS

Application Number: 15955230
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "774000"]

Abstract:
The present disclosure relates to a fan-out semiconductor package in which a plurality of semiconductor chips are stacked and packaged, and are disposed in a special form to be thus electrically connected to a redistribution layer of a connection member through vias rather than wires. The fan-out semiconductor package can further include a connection member having a through-hole, and at least one of the semiconductor chips can be disposed in the through-hole.

Claim (Index 7):
The semiconductor package of  claim 1 , wherein the first connection pad is disposed on a central portion of the active surface of the first semiconductor chip, and\n the second connection pad is disposed on a central portion of the active surface of the second semiconductor chip.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 1.68889
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15666266', '15946109', '15297831', '15689861', '15944321']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.948152971401318
- 35 USC 102 Novelty (BERT): 0.546764523606049
- Combined Prediction Score: 0.908014126621791
- Mean Citation Score: 388.701522
- Max Citation Score: 399.79132
- Similarity Product: 383.46058980973714

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test