PATENT CLAIM ANALYSIS

Application Number: 16047811
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "324000"]

Abstract:
A semiconductor memory device comprises: a semiconductor substrate; a plurality of memory units provided on the semiconductor substrate and each including a plurality of memory cells that are stacked; and a plurality of bit lines formed above each of a plurality of the memory units aligned in a column direction, an alignment pitch in a row direction of the plurality of bit lines being less than an alignment pitch in the row direction of the memory units, and an end of each of the memory units aligned in the column direction being connected to one of the plurality of bit lines formed above the plurality of the memory units aligned in the column direction.

Claim (Index 11):
The semiconductor memory device according to  claim 10 , wherein\n the first memory unit includes a first memory cell and a second memory cell stacked in a first direction, the first direction crossing the substrate, and the second memory unit includes a third memory cell and a fourth memory cell stacked in the first direction.

Metadata:
- Claim Count in Document: 30.0
- Percentile: 95.0
- Lexical Diversity: 2.7907
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14727134', '15388691', '14307154', '13423546', '13524750']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.921658550157577
- 35 USC 102 Novelty (BERT): 0.5091351106264078
- Combined Prediction Score: 0.8804062062044601
- Mean Citation Score: 282.0344060000001
- Max Citation Score: 288.3576
- Similarity Product: 247.454746290636

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test