PATENT CLAIM ANALYSIS

Application Number: 16195762
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-05
Patent Classification: ["326", "038000"]

Abstract:
Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a programmable logic device (PLD) includes a plurality of programmable logic blocks (PLBs) and at least first and second logic cells within at least one of the PLBs, where each logic cell includes a lookup table (LUT) and associated mode logic configured to receive a LUT output signal from the LUT. The associated mode logic is configured to use a single physical signal output to provide a logic cell output signal corresponding to a selected logic function operational mode, ripple arithmetic operational mode, or extended logic function operational mode for each logic cell.

Claim (Index 1):
A programmable logic device (PLD), comprising:\n a plurality of programmable logic blocks (PLBs); and at least first and second logic cells.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 98.0
- Lexical Diversity: 1.92308
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15658356', '14610127', '15658349', '14610074', '14698785']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6323933633556755
- 35 USC 102 Novelty (BERT): 0.4773104309920452
- Combined Prediction Score: 0.6168850701193125
- Mean Citation Score: 193.476712
- Max Citation Score: 229.4972
- Similarity Product: 190.8301486447573

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test