PATENT CLAIM ANALYSIS

Application Number: 15865376
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["438", "172000"]

Abstract:
A semiconductor structure includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A dielectric passivation layer is disposed on the second III-V compound layer. A source feature and a drain feature are disposed on the second III-V compound layer, and extend through the dielectric passivation layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. The gate electrode has an exterior surface. An oxygen containing region is embedded at least in the second III-V compound layer under the gate electrode. A gate dielectric layer has a first portion and a second portion. The first portion is under the gate electrode and on the oxygen containing region. The second portion is on a portion of the exterior surface of the gate electrode.

Claim (Index 15):
A method of forming a transistor, the method comprising:\n forming a first semiconductor layer having a first composition on a substrate; forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer having a second composition different from the first composition; forming a first dielectric layer on the second semiconductor layer; after forming the first dielectric layer, forming a source region and a drain region, the source region and the drain region extending through the first dielectric layer; after forming the source region and the drain region, forming a second dielectric layer over the source region and the drain region; forming an opening through the first dielectric layer and the second dielectric layer to expose an upper surface of a first portion of the second semiconductor layer between the source region and the drain region; oxidizing the first portion of the second semiconductor layer to form an oxygen containing region; depositing a gate dielectric layer on the oxygen containing region; and forming a gate electrode on the gate dielectric layer over the oxygen containing region.

Metadata:
- Claim Count in Document: 37.0
- Percentile: 86.0
- Lexical Diversity: 3.39583
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15176016', '13730500', '14926783', '13297525', '13774614']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8589989985417747
- 35 USC 102 Novelty (BERT): 0.4789550171919518
- Combined Prediction Score: 0.8209946004067925
- Mean Citation Score: 216.905942
- Max Citation Score: 233.98454
- Similarity Product: 203.0118820636141

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test