PATENT CLAIM ANALYSIS

Application Number: 16016148
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["365", "163000"]

Abstract:
A test circuit block may include a first signal line, a second signal line, a high resistive path unit, and a low resistive path unit. The high resistive path unit may be connected between the first signal line and the second signal line. The low resistive path unit may have a resistance lower than that of the high resistive path unit. The low resistive path unit may be selectively connected in parallel with the high resistive path unit between the first signal line and the second signal line.

Claim (Index 14):
The variable resistance memory device of  claim 12 , wherein the low resistive path unit comprises an on-resistance and a holding voltage-generating circuit connected to the on-resistance, and the on-resistance has a resistance value corresponding to an on-resistance value of a selected memory cell of the memory cell array.

Metadata:
- Claim Count in Document: 24.0
- Percentile: 94.0
- Lexical Diversity: 2.79412
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14047537', '11844511', '12765411', '15256208', '14677991']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8226510363008159
- 35 USC 102 Novelty (BERT): 0.4921462999841273
- Combined Prediction Score: 0.7896005626691471
- Mean Citation Score: 242.63119800000004
- Max Citation Score: 249.42828
- Similarity Product: 181.77417203100444

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test