PATENT CLAIM ANALYSIS

Application Number: 15863382
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["365", "189110"]

Abstract:
Some embodiments include apparatuses and methods having non-volatile memory cells, a data line associated with a group of non-volatile memory cells of the non-volatile memory cells, a first transistor coupled to the data line and a node, a second transistor coupled to the node and an additional node, a pull-up component coupled to the node and a supply node, and an additional pull-up component coupled to the additional node and the supply node.

Claim (Index 3):
The apparatus of  claim 1 , further comprising an output circuit to control at least one transistor coupled in series between the additional node and the supply node based on voltages at the first and second nodes.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 86.0
- Lexical Diversity: 2.54839
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14859884', '10953202', '15198124', '13336434', '13837614']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7967648441023553
- 35 USC 102 Novelty (BERT): 0.4731024275996518
- Combined Prediction Score: 0.7643986024520849
- Mean Citation Score: 161.32785200000004
- Max Citation Score: 214.65154
- Similarity Product: 167.26877896801952

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test