PATENT CLAIM ANALYSIS

Application Number: 16140355
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["327", "150000"]

Abstract:
Described is an apparatus which comprises: a first clocking source having a first divider; a second clocking source having a second divider, wherein the first and second clocking sources are inductively coupled; and calibration logic to monitor clock signals associated with the first and second clocking sources and to generate at least one calibration code for adjusting at least one divider ratio of the first or second dividers according to the monitored clock signals.

Claim (Index 6):
The apparatus of  claim 5 , wherein the first or second ADC comprises:\n an oscillator; a first set of registers coupled to the oscillator such that an individual register of the first set is coupled to an output of a delay circuitry of the oscillator; a second set of registers coupled to the first set of registers such that an output of the individual register of the first set is coupled to an input of an individual register of the second set; and a logic to compare outputs of the first and second sets of registers.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 97.0
- Lexical Diversity: 1.75556
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14835656', '12949541', '14917928', '15169997', '15414518']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.769754548403026
- 35 USC 102 Novelty (BERT): 0.5270184412349453
- Combined Prediction Score: 0.745480937686218
- Mean Citation Score: 187.13979
- Max Citation Score: 353.94315
- Similarity Product: 261.1400584855199

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test