PATENT CLAIM ANALYSIS

Application Number: 16408624
Application Type: Utility
Filing Date: 2019-05
Publication Date: 2019-09
Patent Classification: ["257", "324000"]

Abstract:
A semiconductor memory device includes a conductive layer; a first electrode layer provided above the conductive layer; a second electrode layer provided between the conductive layer and the first electrode layer; a first semiconductor channel body extending through the first electrode layer in a first direction from the conductive layer to the first electrode layer; a second semiconductor channel body provided between the conductive layer and the first semiconductor channel body, the second semiconductor channel body extending through the second electrode layer; and an insulating layer provided between the second semiconductor channel body and the second electrode layer. The second semiconductor channel body includes a first recessed portion in a lateral surface facing the second electrode layer, and the second electrode layer includes a second recessed portion in a surface facing the second semiconductor channel body.

Claim (Index 4):
The semiconductor memory device according to  claim 3 , wherein\n the first semiconductor channel body has an end portion located in the second semiconductor channel body.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 100.0
- Lexical Diversity: 4.14286
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15463582', '15457396', '12728727', '15404420', '13421471']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9337747059620788
- 35 USC 102 Novelty (BERT): 0.4685293474283883
- Combined Prediction Score: 0.8872501701087097
- Mean Citation Score: 226.920498
- Max Citation Score: 233.70386
- Similarity Product: 229.2965157488108

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test