PATENT CLAIM ANALYSIS

Application Number: 15991752
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["711", "202000"]

Abstract:
A data collation method in a storage array including reading first data from a first logical address without decompression, assigning, by a storage controller, a second logical address to the first data, storing the first data to the second logical address, establishing, by the storage controller, a mapping relationship between an address of a storage array and the second logical address, where the first logical address is mapped to a first physical address of a storage device, a length of the first physical address is equal to a length of first data, a length of the first logical address is equal to a length of second data, and the first data is compressed data of the second data, and receiving, by the storage controller, the first data from the storage device.

Claim (Index 1):
A data collation method in a storage array comprising a storage controller and a storage device, comprising:\n sending, by the storage controller, a first read instruction to the storage device, the first read instruction comprising a first logical address and a no-decompression flag, first data being stored in a first physical address of the storage device, the first logical address being mapped to the first physical address, a length of the first logical address being equal to a length of second data, a length of the first physical address being equal to a length of the first data, the first data comprising compressed data of the second data, an address of the storage array being mapped to the first logical address, and the no-decompression flag indicating the storage device to not decompress the first data; receiving, by the storage controller, the first data from the storage device; assigning, by the storage controller, a second logical address to the first data; sending, by the storage controller, a write instruction to the storage device, the write instruction comprising the second logical address and the first data, and a length of the second logical address being equal to the length of the first data; and establishing, by the storage controller, a mapping relationship between the address of the storage array and the second logical address.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 3.56098
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15959276', '13379186', '15585858', '15056402', '12871308']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5081996806519248
- 35 USC 102 Novelty (BERT): 0.4819909087487243
- Combined Prediction Score: 0.5055788034616048
- Mean Citation Score: 183.394672
- Max Citation Score: 190.70276
- Similarity Product: 134.61523943156004

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test