PATENT CLAIM ANALYSIS

Application Number: 15873935
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-08
Patent Classification: ["257", "401000"]

Abstract:
Disclosed is a method of forming a vertical pillar-type field effect transistor (FET). One or more semiconductor pillars are formed by epitaxial deposition in one or more openings, respectively, that extend through a first dielectric layer and that have high aspect ratios in two directions. The first dielectric layer is etched back and the following components are formed laterally surrounding the semiconductor pillar(s): a first source/drain region above and adjacent to the first dielectric layer, a second dielectric layer on the first source/drain region, a gate on the second dielectric layer and a gate cap on the gate. The gate cap extends over the top surface(s) of the semiconductor pillar(s). A recess is formed in the gate cap to expose at least the top surface(s) of the semiconductor pillar(s) and a second source/drain region is formed within the recess. Also disclosed is the vertical pillar-type FET structure.

Claim (Index 9):
The field effect transistor of  claim 8 ,\n the multiple semiconductor pillars being essentially identical epitaxial semiconductor pillars, each semiconductor pillar having a first aspect ratio defined as a ratio of a height of the semiconductor pillar to a first width of the semiconductor pillar in a first direction and further having a second aspect ratio defined as a ratio of the height of the semiconductor pillar to a second width of the semiconductor pillar in a second direction that is perpendicular to the first direction, the first aspect ratio and the second aspect ratio being each greater than 5, and the first aspect ratio and the second aspect ratio causing substantial defects that occurred during formation of the epitaxial semiconductor pillars to be trapped within the lower portions of the epitaxial semiconductor pillars that are below the first source/drain region and laterally surrounded by the first dielectric layer.

Metadata:
- Claim Count in Document: 46.0
- Percentile: 86.0
- Lexical Diversity: 2.30263
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15427594', '15632922', '15873156', '15723472', '15658835']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9364033088677648
- 35 USC 102 Novelty (BERT): 0.5710743214902038
- Combined Prediction Score: 0.8998704101300088
- Mean Citation Score: 354.7769120000001
- Max Citation Score: 494.0153
- Similarity Product: 365.6357242526472

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test