PATENT CLAIM ANALYSIS

Application Number: 16173040
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["710", "105000"]

Abstract:
A system on chip includes a display serial interface (DSI) which includes a PHY protocol interface (PPI) used for communication between a DSI host controller and a D-PHY. The DSI host controller includes a register configured to store first indicator data indicating a PPI packetizing method and a lane distributor configured to determine a size of a symbol to be transmitted to the PPI and an order of first processing units to be included in the symbol based on the first indicator data.

Claim (Index 14):
The data processing system of  claim 13 , one of the indicator signals is activated longer than another of the indicator signals, based on the number of the processing units and the number of the plurality of lanes.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 97.0
- Lexical Diversity: 1.71154
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14989823', '16120735', '15139441', '14713080', '11450899']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6815559139556014
- 35 USC 102 Novelty (BERT): 0.5714623580839929
- Combined Prediction Score: 0.6705465583684406
- Mean Citation Score: 239.939102
- Max Citation Score: 516.7654
- Similarity Product: 363.57897346835136

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test