PATENT CLAIM ANALYSIS

Application Number: 16028517
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["455", "150100"]

Abstract:
In one example, a system includes: a circuit board; at least one tuner adapted on the circuit board to receive and process a radio frequency (RF) signal to output a downconverted modulated signal; a processor adapted on the circuit board to demodulate the downconverted modulated signal, process the demodulated downconverted signal and output an audio signal; a location on the circuit board to receive a demodulator circuit; and a shunt element adapted on the circuit board to direct the downconverted modulated signal from the at least one tuner to the processor when the system does not include the demodulator circuit.

Claim (Index 16):
A system comprising:\n at least one antenna to receive at least one radio frequency (RF) signal; at least one tuner coupled to the at least one antenna to receive and process the at least one RF signal to output a downconverted modulated signal; a processor coupled to the at least one tuner to demodulate the downconverted modulated signal when the system does not include a hardware demodulator circuit, the processor further to process the demodulated downconverted signal and output an audio signal; an audio processor coupled to the processor to process the audio signal and output a processed audio signal, wherein the at least one tuner is adapted on a first layout portion of a circuit board, the processor is adapted on a second layout portion of the circuit board and the audio processor is adapted on a third layout portion of the circuit board, the circuit board further including a fourth layout portion to which the hardware demodulator circuit is adapted when included in the system, the circuit board further including first interconnect circuitry to couple the at least one tuner to the hardware demodulator circuit when the hardware demodulator circuit is included in the system and second interconnect circuitry to couple the hardware demodulator circuit and the processor when the hardware demodulator circuit is included in the system, the circuit board a single circuit board usable when the system includes the hardware demodulator circuit and usable when the system does not include the hardware demodulator circuit; and an interconnection member to couple the at least one tuner to the processor when the system does not include the hardware demodulator circuit.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 95.0
- Lexical Diversity: 2.3913
- Patent Class: 455.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14283648', '12894316', '15168318', '12938451', '15710967']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6878908969647543
- 35 USC 102 Novelty (BERT): 0.4770151837385545
- Combined Prediction Score: 0.6668033256421343
- Mean Citation Score: 190.635336
- Max Citation Score: 201.48323
- Similarity Product: 156.41138604410108

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test