PATENT CLAIM ANALYSIS

Application Number: 15759211
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["257", "668000"]

Abstract:
A semiconductor device includes a wiring substrate including a first surface and a second surface opposite to the first surface, a semiconductor chip including a plurality of chip electrodes and mounted over the wiring substrate, a first capacitor arranged at a position overlapping with the semiconductor chip in plan view and incorporated in the wiring substrate, and a second capacitor arranged between the first capacitor and a peripheral portion of the wiring substrate in plan view. Also, the second capacitor is inserted in series connection into a signal transmission path through which an electric signal is input to or output from the semiconductor chip.

Claim (Index 10):
The semiconductor device according to  claim 7 ,\n wherein the first terminal and the second terminal are formed on the first surface side of the wiring substrate, wherein a first member covering the entire semiconductor chip is mounted over the first surface of the wiring substrate, and wherein, in plan view, the first terminal and the second terminal are arranged between the first member and a peripheral edge of the wiring substrate.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 90.0
- Lexical Diversity: 2.07547
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15302632', '15552774', '15514110', '15207559', '15549107']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9155694997603324
- 35 USC 102 Novelty (BERT): 0.5278462196841622
- Combined Prediction Score: 0.8767971717527154
- Mean Citation Score: 266.59582200000006
- Max Citation Score: 332.75415
- Similarity Product: 278.5410709772676

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test