PATENT CLAIM ANALYSIS

Application Number: 15914617
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "659000"]

Abstract:
Apparatuses relating generally to a microelectronic package having protection from electromagnetic interference are disclosed. In an apparatus thereof, a platform has an upper surface and a lower surface opposite the upper surface and has a ground plane. A microelectronic device is coupled to the upper surface of the platform. Wire bond wires are coupled to the ground plane with a pitch. The wire bond wires extend away from the upper surface of the platform with upper ends of the wire bond wires extending above an upper surface of the microelectronic device. The wire bond wires are spaced apart from one another to provide a fence-like perimeter to provide an interference shielding cage. A conductive layer is coupled to at least a subset of the upper ends of the wire bond wires for electrical conductivity to provide a conductive shielding layer to cover the interference shielding cage.

Claim (Index 15):
A method for protection from electromagnetic interference, comprising:\n obtaining a platform having an upper surface and a lower surface opposite the upper surface and having a ground plane; coupling a first microelectronic device to the upper surface of the platform; forming a first interference shielding region for the first microelectronic device including bonding first wire bond wires to the ground plane with a first pitch extending away from the upper surface of the platform with upper ends of the first wire bond wires being above an upper surface of the first microelectronic device; coupling a second microelectronic device to the upper surface of the platform outside of the first interference shielding region; forming a second interference shielding region for the second microelectronic device including bonding second wire bond wires to the ground plane with a second pitch extending away from the upper surface of the platform with upper ends of the second wire bond wires being above an upper surface of the second microelectronic device; and forming a trace from the first interference shielding region to the second interference shielding region between and electrically isolated from the first wire bond wires and the second wire bond wires on the upper surface of the platform for interconnection of the first microelectronic device and the second microelectronic device.

Metadata:
- Claim Count in Document: 34.0
- Percentile: 90.0
- Lexical Diversity: 2.36923
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15237936', '15344990', '14880967', '15804122', '14997774']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9375273999726944
- 35 USC 102 Novelty (BERT): 0.5487104876851973
- Combined Prediction Score: 0.8986457087439448
- Mean Citation Score: 322.9668880000001
- Max Citation Score: 416.35626
- Similarity Product: 370.34053915209887

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test