PATENT CLAIM ANALYSIS

Application Number: 15917183
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["257", "194000"]

Abstract:
Provided herein is a semiconductor device and a method of manufacturing the same. The semiconductor device has improved erase characteristics by using a select gate enclosing a portion a first semiconductor region overlapping a second semiconductor region. The first semiconductor region and the second semiconductor region are formed of different semiconductor materials.

Claim (Index 20):
The method according to  claim 13 , wherein:\n the first and the at least one third material layers define regions in which insulating layers are disposed; the second material layers define regions in which cell gates are disposed; the at least one fourth material layer defines a region in which a select gate is disposed; and a portion of the first semiconductor layer and a portion of the second semiconductor layer that are disposed in a region in which the first semiconductor region overlaps the second semiconductor region are enclosed by the at least one fourth material layer.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 90.0
- Lexical Diversity: 1.71875
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15865669', '13892756', '14757572', '15284067', '15235864']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9210124374587748
- 35 USC 102 Novelty (BERT): 0.4883175804370326
- Combined Prediction Score: 0.8777429517566004
- Mean Citation Score: 189.479004
- Max Citation Score: 205.26147
- Similarity Product: 148.3356619272745

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test