PATENT CLAIM ANALYSIS

Application Number: 15876783
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["438", "191000"]

Abstract:
A method includes forming a gate stack over a semiconductor fin, wherein the semiconductor fin forms a ring, and etching a portion of the semiconductor fin not covered by the gate stack to form a recess. The method further includes performing an epitaxy to grow an epitaxy semiconductor region from the recess, forming a first contact plug overlying and electrically coupled to the epitaxy semiconductor region, and forming a second contact plug, wherein the second contact plug is overlying and electrically coupled to the gate stack.

Claim (Index 7):
The device of  claim 1  further comprising a metal line electrically intercoupling the plurality of gate stacks, electrically intercoupling the plurality of semiconductor regions, and electrically coupling the plurality of gate stacks to the plurality of semiconductor regions.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 2.21429
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13644261', '15368903', '14166510', '14719586', '13415552']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8602723720349921
- 35 USC 102 Novelty (BERT): 0.4877645597337992
- Combined Prediction Score: 0.8230215908048728
- Mean Citation Score: 225.101596
- Max Citation Score: 257.36325
- Similarity Product: 224.67206455908715

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test