PATENT CLAIM ANALYSIS

Application Number: 15992080
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-01
Patent Classification: ["327", "211000"]

Abstract:
Described is an apparatus which comprises: a first p-type Tunneling Field-Effect Transistor (TFET); a first n-type TFET coupled in series with the first p-type TFET; a first node coupled to gate terminals of the first p-type and n-type TFETs; a first clock node coupled to a source terminal of the first TFET, the first clock node is to provide a first clock; and a second clock node coupled to a source terminal of the second TFET, the second clock node is to provide a second clock.

Claim (Index 16):
The system of  claim 15 , wherein a drain or source terminal of the third p-type transistor is coupled to the first inverter.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 93.0
- Lexical Diversity: 2.59459
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14922072', '14712182', '15454405', '14456303', '15694841']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7497495355275412
- 35 USC 102 Novelty (BERT): 0.5313163293570193
- Combined Prediction Score: 0.727906214910489
- Mean Citation Score: 225.192394
- Max Citation Score: 345.18356
- Similarity Product: 247.9894166188812

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test