PATENT CLAIM ANALYSIS

Application Number: 16205995
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-04
Patent Classification: ["257", "676000"]

Abstract:
Implementations of semiconductor packages may include a die including a first side and a second side opposing the first side, the second side of the die coupled to a layer, a first end of a plurality of wires each bonded to the first side of the die, a mold compound encapsulating the die and the plurality of wires, and a second end of the plurality of wires each directly bonded to one of a plurality of bumps, wherein a surface of the layer is exposed through the mold compound.

Claim (Index 14):
The semiconductor package of  claim 11 , wherein the layer is an electrically conductive layer.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 98.0
- Lexical Diversity: 2.63889
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['16206057', '15724413', '15789120', '16031948', '14992011']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9232002191642348
- 35 USC 102 Novelty (BERT): 0.5081423126197908
- Combined Prediction Score: 0.8816944285097904
- Mean Citation Score: 217.872328
- Max Citation Score: 264.6379
- Similarity Product: 182.2138064080119

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test