PATENT CLAIM ANALYSIS

Application Number: 15867860
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "076000"]

Abstract:
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm; a semiconductor nitride layer in contact with the semiconductor handle substrate, the semiconductor nitride layer selected from the group consisting of aluminum nitride, boron nitride, indium nitride, gallium nitride, aluminum gallium nitride, aluminum gallium indium nitride, aluminum gallium indium boron nitride, and combinations thereof; a dielectric layer in contact with the semiconductor nitride layer; and a semiconductor device layer in contact with the dielectric layer.

Claim (Index 1):
A method of forming a multilayer structure, the method comprising:\n forming a semiconductor nitride layer on a front surface of a semiconductor handle substrate, wherein the semiconductor nitride layer is selected from the group consisting of aluminum nitride, boron nitride, indium nitride, gallium nitride, aluminum gallium nitride, aluminum gallium indium nitride, aluminum gallium indium boron nitride, and combinations thereof and wherein the semiconductor handle substrate comprises two major, generally parallel surfaces, one of which is the front surface of the semiconductor handle substrate and the other of which is a back surface of the semiconductor handle substrate, a circumferential edge joining the front and back surfaces of the semiconductor handle substrate, and a bulk region between the front and back surfaces of the semiconductor handle substrate, wherein the semiconductor handle substrate has a minimum bulk region resistivity of at least about 500 ohm-cm; and bonding a front surface of a semiconductor donor substrate to the semiconductor nitride layer to thereby form a bonded structure, wherein the semiconductor donor substrate comprises two major, generally parallel surfaces, one of which is the front surface of the semiconductor donor substrate and the other of which is a back surface of the semiconductor donor substrate, a circumferential edge joining the front and back surfaces of the semiconductor donor substrate, and a central plane between the front and back surfaces of the semiconductor donor substrate, and further wherein the front surface of the semiconductor donor substrate comprises a dielectric layer.

Metadata:
- Claim Count in Document: 68.0
- Percentile: 86.0
- Lexical Diversity: 2.42553
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14835086', '14835093', '15727723', '14835155', '15112083']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9440701503476584
- 35 USC 102 Novelty (BERT): 0.5513372332676602
- Combined Prediction Score: 0.9047968586396584
- Mean Citation Score: 365.546778
- Max Citation Score: 429.27124
- Similarity Product: 359.2882889710688

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test