PATENT CLAIM ANALYSIS

Application Number: 15944662
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["375", "232000"]

Abstract:
Various embodiments of the present technology comprise a method and apparatus for a continuous time linear equalizer (CTLE). In various embodiments, the CTLE comprises a cross-coupled transistor pair that operates as a negative impedance converter. The CTLE produces a transfer function that provides high gain peaking at a high frequency without increasing the size of the die area and/or the power supply level.

Claim (Index 3):
The continuous time linear equalizer circuit according to  claim 1 , wherein:\n each of the first and second transistors comprise a bipolar transistor; and the differential transistor pair comprises two bipolar transistors.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 1.32692
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13492550', '15837928', '15194302', '15040344', '14745533']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4968852656184179
- 35 USC 102 Novelty (BERT): 0.4647841455822197
- Combined Prediction Score: 0.4936751536147981
- Mean Citation Score: 176.39711600000004
- Max Citation Score: 188.06473
- Similarity Product: 160.2402741598761

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test