PATENT CLAIM ANALYSIS

Application Number: 15992817
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-12
Patent Classification: ["257", "408000"]

Abstract:
In some embodiments, a semiconductor device is provided. The semiconductor device includes a pair of source/drain regions disposed in a semiconductor substrate, where the source/drain regions are laterally spaced. A gate electrode is disposed over the semiconductor substrate between the source/drain regions. Sidewall spacers are disposed over the semiconductor substrate on opposite sides of the gate electrode. A silicide blocking structure is disposed over the sidewalls spacers, where respective sides of the source/drain regions facing the gate electrode are spaced apart from outer sides of the sidewall spacers and are substantially aligned with outer sidewalls of the silicide blocking structure.

Claim (Index 27):
The IC of  claim 21 , further comprising:\n a second sidewall spacer disposed over the semiconductor substrate and along a sidewall of the first gate electrode, wherein the second sidewall spacer has a first height and the first sidewall spacer has a second height that is less than the first height.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 93.0
- Lexical Diversity: 2.25
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14296496', '12185747', '14276631', '12125864', '10609185']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.899178888154666
- 35 USC 102 Novelty (BERT): 0.4972238698561521
- Combined Prediction Score: 0.8589833863248146
- Mean Citation Score: 209.00402
- Max Citation Score: 218.13185
- Similarity Product: 156.22501554986238

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test