PATENT CLAIM ANALYSIS

Application Number: 16055357
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-11
Patent Classification: ["257", "326000"]

Abstract:
A method for manufacturing a semiconductor device is provided. The method includes forming a split gate stack having a main gate and a select gate and forming a logic gate stack having a logic gate over a semiconductor substrate. The main gate and the logic gate is respectively replaced with a metal memory gate and a metal logic gate, in which the main gate and the logic gate are replaced simultaneously.

Claim (Index 8):
The method of  claim 1 , wherein replacing the main gate and the logic gate respectively with the metal memory gate and the metal logic gate comprises polishing a top surface of the metal memory gate.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 96.0
- Lexical Diversity: 2.20588
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14161372', '14075817', '15651403', '14157599', '15793163']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.919816118827666
- 35 USC 102 Novelty (BERT): 0.4834768986035806
- Combined Prediction Score: 0.8761821968052577
- Mean Citation Score: 183.94647
- Max Citation Score: 211.3499
- Similarity Product: 164.39648566248414

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test