PATENT CLAIM ANALYSIS

Application Number: 15951310
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["713", "322000"]

Abstract:
Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.

Claim (Index 10):
The system of  claim 1 , further comprising:\n a plurality of re-order buffers, each re-order buffer integral to one of the plurality of cores.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 1.58065
- Patent Class: 713.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15951290', '15951299', '13486948', '12899311', '13471222']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3890071323651596
- 35 USC 102 Novelty (BERT): 0.4973588840449242
- Combined Prediction Score: 0.3998423075331361
- Mean Citation Score: 213.455938
- Max Citation Score: 261.6152
- Similarity Product: 205.2329772825241

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test