PATENT CLAIM ANALYSIS

Application Number: 16363850
Application Type: Utility
Filing Date: 2019-03
Publication Date: 2019-07
Patent Classification: ["365", "185170"]

Abstract:
A method for controlling a memory system, including a controller chip and a non-volatile memory chip which includes a calibration control circuit, a first output buffer, and a first resistance element, includes receiving a read command from the controller, setting a ready/busy signal to a busy state based on the read command, executing a calibration operation which controls an impedance of the first output buffer based on the read command, setting the ready/busy signal to a ready state, and sending data to the control chip in response to the read command. The calibration control circuit calibrates the impedance of the first output buffer circuit by using the first resistance element within a period in which the ready/busy signal is the busy state.

Claim (Index 2):
The method for controlling the memory system according to  claim 1 , further comprising:\n sensing a temperature of the non-volatile memory chip by a temperature sensor of the non-volatile memory chip; and controlling a resistance value of the first resistance element based on a sense result of the temperature.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 99.0
- Lexical Diversity: 2.4
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15699847', '15993143', '15606798', '15904426', '13780791']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7312997594417082
- 35 USC 102 Novelty (BERT): 0.4569328929562146
- Combined Prediction Score: 0.7038630727931589
- Mean Citation Score: 122.3524648
- Max Citation Score: 158.36586
- Similarity Product: 129.96353475750092

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test