PATENT CLAIM ANALYSIS

Application Number: 15898604
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "782000"]

Abstract:
A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.

Claim (Index 27):
The semiconductor device of  claim 24 , wherein the second row of die bond pads on the interface chip have a same size and spacing as the contact pads on the substrate, the second set of wire bonds extending in straight parallel lines between the interface chip and the substrate.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 88.0
- Lexical Diversity: 1.46296
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15454194', '15619895', '13829739', '12844959', '12825617']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9188820069124006
- 35 USC 102 Novelty (BERT): 0.4895840500794632
- Combined Prediction Score: 0.8759522112291069
- Mean Citation Score: 199.223232
- Max Citation Score: 266.8519
- Similarity Product: 253.433241178912

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test