PATENT CLAIM ANALYSIS

Application Number: 15862914
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["455", "126000"]

Abstract:
Described herein are power amplifier (PA) architectures that improve PA performance (e.g., efficiency, linearity, etc.) over an extended range of the operating power levels of the PA. These architectures can be implemented on a single chip to provide a single-chip standalone PA solution. This improvement comes with little additional complexity, little additional current consumption, and/or little additional chip area. The architectures utilize a dynamic biasing technique using positive envelope feedback based at least in part on an instantaneous envelope signal at an output of a power amplifier.

Claim (Index 14):
The power amplifier architecture of  claim 1  wherein the power amplifier architecture is implemented on a single chip and does not use signal processing provided by a component that is not on the single chip to determine the envelope signal or to determine the dynamic bias signal.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 86.0
- Lexical Diversity: 1.50746
- Patent Class: 455.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15596149', '10819921', '10607122', '12473228', '10607124']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.733639639918311
- 35 USC 102 Novelty (BERT): 0.5122957909207612
- Combined Prediction Score: 0.7115052550185561
- Mean Citation Score: 255.522028
- Max Citation Score: 276.7354
- Similarity Product: 180.88513772363663

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test