PATENT CLAIM ANALYSIS

Application Number: 16164845
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-06
Patent Classification: ["365", "185290"]

Abstract:
A method of operating a memory device includes performing a data read operation on at least one victim sub-block within a memory block containing a plurality of sub-blocks therein, in response to an erase command directed to a selected sub-block within the plurality of sub-blocks. Next, a soft program operation is performed on the at least one victim sub-block. This soft programming operation is then followed by an operation to erase the selected sub-block within the plurality of sub-blocks. This operation to erase the selected sub-block may include providing an erase voltage to a bulk region of a substrate on which the memory block extends, and the at least one victim sub-block may be disposed between the selected sub-block and the substrate.

Claim (Index 19):
The method of  claim 16 , wherein:\n after the soft program operation is performed on the plurality of victim memory cells, threshold voltages of all of erase memory cells among the plurality of victim memory cells increase, and each of the erase memory cells is a memory cell having an erase state.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 97.0
- Lexical Diversity: 2.22414
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15607551', '13540951', '14606252', '16110088', '13607038']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8311039351069626
- 35 USC 102 Novelty (BERT): 0.5033553857437681
- Combined Prediction Score: 0.7983290801706431
- Mean Citation Score: 265.98259799999994
- Max Citation Score: 275.78714
- Similarity Product: 185.63929225561145

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test