PATENT CLAIM ANALYSIS

Application Number: 15934179
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["712", "208000"]

Abstract:
A data processor in which execution threads may be grouped together into thread groups in which the plural threads of a thread group can each execute a set of instructions in lockstep, one instruction at a time. The data processor comprises a plurality of execution lanes for executing respective execution threads of a thread group. For each thread group in a pool 51 of thread groups available to be issued to the execution lanes, an indication 54 of the active threads of the thread group is stored, and sets of at least one thread group from the pool 51 of available thread groups to issue 73 to the execution lanes for execution are selected 72 based on the indications of the active threads for the thread groups in the thread group pool.

Claim (Index 6):
The data processor of  claim 1 , wherein the thread group selection circuitry is operable to select both sets containing single thread groups and sets containing plural thread groups for issue to the execution lanes.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 90.0
- Lexical Diversity: 2.22581
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15346931', '15218015', '15657014', '15401639', '13918664']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6570439891164573
- 35 USC 102 Novelty (BERT): 0.5228752003503555
- Combined Prediction Score: 0.6436271102398472
- Mean Citation Score: 327.1961859999999
- Max Citation Score: 347.45135
- Similarity Product: 261.5075267814874

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test