PATENT CLAIM ANALYSIS

Application Number: 16265886
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-06
Patent Classification: ["365", "051000"]

Abstract:
A device includes a memory array. The memory array includes a first sub-bank, a second sub-bank, a strap cell and a continuous data line. The strap cell is arranged between the first sub-bank and the second sub-bank. The continuous data line includes a first portion coupled to the first sub-bank and a second portion disposed across the second sub-bank. The first portion of the continuous data line and the second portion of the continuous data line are disposed at separate layers above the strap cell.

Claim (Index 10):
A device, comprising:\n a first memory cell of a first sub-bank in a memory array; a second memory cell of a second sub-bank in the memory array; and a first power line comprising a first portion coupled to the first memory cell and a second portion coupled to the second memory cell, wherein the first portion of the first power line and the second portion of the first power line are configured to separately transmit at least one system voltage to the first memory cell and the second memory cell.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 99.0
- Lexical Diversity: 2.78788
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15831332', '15153687', '15438567', '15656050', '15389539']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7583066331651355
- 35 USC 102 Novelty (BERT): 0.4828367392733914
- Combined Prediction Score: 0.730759643775961
- Mean Citation Score: 202.415036
- Max Citation Score: 243.92274
- Similarity Product: 210.17878889809367

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test