PATENT CLAIM ANALYSIS

Application Number: 15974656
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["365", "051000"]

Abstract:
A distributed pattern storage-processing circuit not only stores patterns permanently, but also processes them with massive parallelism. It comprises a plurality of storage-processing units (SPU), with each SPU comprising at least a three-dimensional memory (3D-M) array vertically stacked above a pattern-processing circuit. The plurality of SPUs performs pattern processing simultaneously.

Claim (Index 9):
The distributed pattern storage-processing circuit according to  claim 7 , wherein said 3D-W is three-dimensional multiple-time-programmable memory (3D-MTP).

Metadata:
- Claim Count in Document: 43.0
- Percentile: 93.0
- Lexical Diversity: 1.31111
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15729640', '15729643', '13798135', '14047011', '14487080']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7987633526270175
- 35 USC 102 Novelty (BERT): 0.5012172043711722
- Combined Prediction Score: 0.769008737801433
- Mean Citation Score: 183.15605
- Max Citation Score: 270.5002
- Similarity Product: 191.2073368935585

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test