PATENT CLAIM ANALYSIS

Application Number: 16014028
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-10
Patent Classification: ["365", "185170"]

Abstract:
Systems, methods, and devices of the various embodiments provide both “string-sharing” drain select gate electrodes and “string-selective” drain select gate electrodes in vertical NAND strings. Various embodiments may provide two or more vertical NAND strings sharing a common drain select gate electrode while also having separate additional drain select gate electrodes not electrically connected across the two or more vertical NAND strings.

Claim (Index 12):
A method of operating the memory device of  claim 1 , comprising:\n applying a first bias voltage to the common drain select gate electrode during an erase operation of the first memory cell charge storage transistors or the second memory cell charge storage transistors; and applying a second bias voltage to the common drain select gate during a programming operation of the first memory cell charge storage transistors or the second memory cell charge storage transistors, wherein the first bias voltage is lower than the second bias voltage.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 94.0
- Lexical Diversity: 1.66667
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15078555', '15948737', '15850073', '15865892', '15628495']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8317320249421402
- 35 USC 102 Novelty (BERT): 0.5462192114639577
- Combined Prediction Score: 0.8031807435943219
- Mean Citation Score: 359.75136600000013
- Max Citation Score: 429.99655
- Similarity Product: 349.23797365629974

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test