PATENT CLAIM ANALYSIS

Application Number: 16016510
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["257", "622000"]

Abstract:
A new semiconductor rectifier structure. In general, a MOS-transistor-like structure is located above a JFET-like deeper structure. The present application teaches ways to combine and optimize these two structures in a merged device so that the resulting combined structure achieves both a low forward voltage and a high reverse breakdown voltage in a relatively small area. In one class of innovative implementations, an insulated (or partially insulated) trench is used to define a vertical channel in a body region along the sidewall of a trench, so that majority carriers from a “source” region (typically n+) can flow through the channel. An added “pocket” diffusion, of the same conductivity type as the body region (p-type in this example), provides an intermediate region around the bottom of the trench. This intermediate diffusion, and an additional deep region of the same conductivity type, define a deep JFET-like device which is in series with the MOS channel portion of the diode. This advantageously permits the MOS channel portion to be reasonably short, and to have a reasonably low threshold voltage, since the high-voltage withstand characteristics are defined by the deep JFET-like device.

Claim (Index 21):
A method of operating a semiconductor rectifier, comprising the actions of:\n when forward bias is applied between an anode terminal and a cathode terminal, allowing majority carriers to flow\n from a first-conductivity-type source region near a first surface of a semiconductor die, \n through a channel portion of a second-conductivity-type body region which underlies the source region, and thence \n through a first-conductivity-type drift region, which underlies the body region, to a drain region at a second surface of the dies; \n wherein the channel region is capacitively coupled to a gate electrode in an insulated trench; \n and wherein the source and body regions, and the gate electrode, are all connected to one of the anode and cathode terminals; \n and when reverse bias is applied between the anode and cathode terminals, allowing depletion regions to spread into the drift region\n from a second-conductivity-type body contact region which extends down through the body region and into the drift region, and also \n from a second-conductivity-type intermediate region which lies at least partly below the gate trench, \n to merge, at a reverse bias short of breakdown, to pinch off conduction below the depth of the channel region, and thereby substantially prevent leakage current from flowing between the anode and cathode terminals.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 94.0
- Lexical Diversity: 1.84483
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['11982764', '12238308', '10146539', '11982792', '11982781']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9221820726425186
- 35 USC 102 Novelty (BERT): 0.4946611890134252
- Combined Prediction Score: 0.8794299842796093
- Mean Citation Score: 236.687304
- Max Citation Score: 243.55795
- Similarity Product: 178.9720677975118

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test