PATENT CLAIM ANALYSIS

Application Number: 15965178
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["363", "037000"]

Abstract:
A power conversion device includes a high-side transistor including an IGBT, a low-side transistor including an IGBT, and having a collector coupled to an emitter of the high-side transistor, a high-side driver configured to drive the high-side transistor; and a low-side driver configured to drive the low-side transistor, wherein each of the high-side transistor and the low-side transistor includes a first trench gate electrode arranged in an active cell region, and electrically connected to a gate, and a second trench gate electrode and a third trench gate electrode, each of which is arranged at intervals on both sides of the first trench gate electrode, and electrically connected to the emitter in the active cell region. The high-side driver includes a first pull-up transistor configured to apply a first voltage as a positive voltage to the gate, based on the emitter of the high-side transistor and a first pull-down transistor.

Claim (Index 9):
A power conversion device comprising:\n a conversion unit configured to convert an AC voltage, which is externally input, into a DC voltage; a capacitor configured to hold the DC voltage converted by the conversion unit; an inverter unit configured to convert the DC voltage held in the capacitor into a three-phase AC voltage having a predetermined voltage and frequency; and a drive unit configured to control the inverter unit, wherein the inverter unit includes, with respect to each phase of the three phases, a high-side transistor including an IGBT; and a low-side transistor including an IGBT, and having a collector coupled to an emitter of the high-side transistor, wherein the drive unit includes, with respect to each phase of the three phases, a high-side driver configured to drive the high-side transistor; and a low-side driver configured to drive the low-side transistor, wherein each of the high-side transistor and the low-side transistor includes: a first trench gate electrode arranged in an active cell region, and electrically connected to a gate; and a second trench gate electrode and a third trench gate electrode, each of which is arranged at intervals on both sides of the first trench gate electrode, and electrically connected to the emitter in the active cell region, wherein the high-side driver includes: a first pull-up transistor configured to apply a first voltage as a positive voltage to the gate, based on the emitter of the high-side transistor; and a first pull-down transistor configured to couple the gate of the high-side transistor to the emitter, and wherein the low-side driver includes: a second pull-up transistor configured to apply a second voltage as a positive voltage to the gate, based on the emitter of the low-side transistor; and a second pull-down transistor configured to couple the gate of the low-side transistor to the emitter, wherein the first pull-down transistor applies a gate-emitter voltage of about 0 V to the high-side transistor when the high-side transistor is turned off, and wherein the second pull-down transistor applies a gate-emitter voltage of about 0 V to the low-side transistor when the low-side transistor is turned off.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 91.0
- Lexical Diversity: 2.875
- Patent Class: 363.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15168031', '15702327', '14418610', '15157040', '12813178']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8034292463051941
- 35 USC 102 Novelty (BERT): 0.5635367072106341
- Combined Prediction Score: 0.7794399923957381
- Mean Citation Score: 252.15923
- Max Citation Score: 443.19067
- Similarity Product: 424.441174957006

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test