PATENT CLAIM ANALYSIS

Application Number: 15940338
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["711", "005000"]

Abstract:
An example of a system includes a host interface, a set of non-volatile memory cells, and one or more control circuits coupled to the host interface and coupled to the set of non-volatile memory cells. The one or more control circuits are configured to access a host memory through the host interface by sending host memory access requests for two or more blocks of host data according to an interleaving scheme.

Claim (Index 16):
The method of  claim 10  wherein the detecting one or more patterns of host responses to host memory access requests is performed at two or more times during a product lifetime and the interleaving scheme is newly selected at each of the two or more times according to one or more patterns of host responses to host memory access requests identified during operation of a prior interleaving scheme.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 90.0
- Lexical Diversity: 1.92308
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15901054', '14644021', '15385158', '15730511', '15873395']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5250999840133619
- 35 USC 102 Novelty (BERT): 0.4902480284889989
- Combined Prediction Score: 0.5216147884609256
- Mean Citation Score: 166.238044
- Max Citation Score: 171.25522
- Similarity Product: 108.74326583714485

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test