PATENT CLAIM ANALYSIS

Application Number: 15890427
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-10
Patent Classification: ["365", "185220"]

Abstract:
According to one embodiment, a memory system includes a memory and controller. The controller repeatedly performs an erase voltage application process for data stored in a target area in the memory. The controller performs an erase verification process for determining whether the erase is successful using erase verification voltage. The controller determines whether an erase time is longer than a first threshold value. The controller sets the target area to a use prohibition state when the erase time is longer than the first threshold value.

Claim (Index 12):
The memory system of  claim 10 , wherein the controller comprises a first controller and a second controller,\n the first controller is configured to communicate with an external host device, the second controller is configured to control the nonvolatile memory in accordance with a command received from the first controller, the first controller is further configured to transmit, to the second controller circuit, an erase condition setting command for setting erase voltage used in the erase voltage application process, the erase verification voltage, a maximum iteration count for the erase voltage application process and the erase verification process performed by the second controller and a verification determination parameter used to determine that the erase of the data is successful, and subsequently transmit an erase command to the second controller, and the second controller is further configured to: when the second controller receives the erase condition setting command from the first controller, set the erase voltage, the erase verification voltage, the maximum iteration count and the verification determination parameter in accordance with the erase condition setting command; and when the second controller receives the erase command from the first controller, perform the erase voltage application process and the erase verification process, determine whether a result of the erase verification process is successful based on the verification determination parameter, determine whether an iteration count of the erase voltage application process and the erase verification process is less than the maximum iteration count, and return a response to the first controller when the result of the erase verification process is successful or when the iteration count is greater than or equal to the maximum iteration count.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 88.0
- Lexical Diversity: 2.02222
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15703747', '14722796', '15340957', '15680104', '14037582']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8065769164017452
- 35 USC 102 Novelty (BERT): 0.4736965041762898
- Combined Prediction Score: 0.7732888751791996
- Mean Citation Score: 180.434798
- Max Citation Score: 181.71559
- Similarity Product: 131.70860602956296

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test