PATENT CLAIM ANALYSIS

Application Number: 16132922
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["257", "259000"]

Abstract:
Electrical fuse (eFuse) and resistor structures and methods of manufacture are provided. The method includes forming metal gates having a capping material on a top surface thereof. The method further includes protecting the metal gates and the capping material during an etching process which forms a recess in a dielectric material. The method further includes forming an insulator material and metal material within the recess. The method further includes forming a contact in direct electrical contact with the metal material.

Claim (Index 1):
A semiconductor structure, comprising:\n metal gates having a capping material on a top surface thereof; contact structures in recesses in a dielectric material between the metal gates; an opening in the dielectric material, wherein the opening is between the contact structures; and an insulator material and metal material within the opening.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 97.0
- Lexical Diversity: 1.8913
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15810531', '15800888', '15786730', '14826628', '15466380']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9214609284818812
- 35 USC 102 Novelty (BERT): 0.5438740535687834
- Combined Prediction Score: 0.8837022409905714
- Mean Citation Score: 365.39671400000015
- Max Citation Score: 386.72388
- Similarity Product: 311.9656787982988

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test