PATENT CLAIM ANALYSIS

Application Number: 16128396
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["713", "194000"]

Abstract:
Techniques are disclosed in which a secure circuit controls a gating circuit to enable or disable other circuitry of a device (e.g., one or more input sensors). For example, the gating circuit may be a power gating circuit and the secure circuit may be configured to disable power to an input sensor in certain situations. As another example, the gating circuit may be a clock gating circuit and the secure circuit may be configured to disable the clock to an input sensor. As yet another example, the gating circuit may be configured to gate a control bus and the secure circuit may be configured to disable control signals to an input sensor. In some embodiments, hardware resources included in or controlled by the secure circuit are not accessible by other elements of the device, other than by sending requests to a predetermined set of memory locations (e.g., a secure mailbox).

Claim (Index 3):
The apparatus of  claim 1 , wherein the gating circuit is a clock gating circuit.

Metadata:
- Claim Count in Document: 39.0
- Percentile: 97.0
- Lexical Diversity: 2.51515
- Patent Class: 713.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15374109', '15270534', '15822261', '12719472', '13401030']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3848483236801484
- 35 USC 102 Novelty (BERT): 0.4723573742217604
- Combined Prediction Score: 0.3935992287343096
- Mean Citation Score: 131.545156
- Max Citation Score: 140.16371
- Similarity Product: 100.33376841025353

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test