PATENT CLAIM ANALYSIS

Application Number: 16218636
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["708", "620000"]

Abstract:
In some examples, a method may be performed by a multiply-accumulate circuit. As part of the method a row driver of the multiply-accumulate circuit may drive a row value line based on an input vector bit of an input vector received by the row driver. The row driver may also drive a row line that controls a corresponding memristor according to the input vector bit. The corresponding memristor may store a weight value bit of a weight value to apply to the input vector for a multiply-accumulate operation. The method may further include a sense amplifier generating an output voltage based on a current output from the corresponding memristor and counter circuitry adjusting a counter value that represents a running total of the multiply-accumulate operation based on the row value line, the output voltage generated by the sense amplifier, or a combination of both.

Claim (Index 17):
A multiply-accumulate circuit comprising:\n a set of row driver circuits, wherein each row driver receives an input vector bit of an input vector; a first circuitry column comprising:\n a first set of memristor circuits linked to the set of row driver circuits to form in part a set of rows, each row having a row driver which activates the row and a corresponding memristor circuit of the first set of memristor circuits, the first set of memristor circuits programmed with a first weight value; \n a sense amplifier linked to the first set of memristor circuits to apply an output voltage based on a current output from a memristor of the first set of memristor circuits, the current output representative of a weight value bit stored by the memristor; and \n counter circuitry to store a first counter value and to adjust the first counter value based on a row value output from the set of row driver circuits, the output voltage of the sense amplifier of the first circuitry column, or both; and \n a column circuitry column comprising:\n a second set of memristor circuits also linked to the set of row driver circuits to form in part the set of rows, each row a corresponding memristor circuit of the second set of memristor circuits, the second set of memristor circuits programmed with a second weight value different from the first weight value; \n a sense amplifier linked to the second set of memristor circuits to apply an output voltage based on a current output from a memristor of the second set of memristor circuits, the current output representative of a weight value bit stored by the memristor; and \n counter circuitry to store a second counter value and to adjust the second counter value based on a row value output from the set of row driver circuits, the output voltage of the sense amplifier of the second circuitry column, or both.

Metadata:
- Claim Count in Document: 48.0
- Percentile: 98.0
- Lexical Diversity: 2.45161
- Patent Class: 708.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15282021', '16213385', '15427591', '16058146', '15281280']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4162538386392816
- 35 USC 102 Novelty (BERT): 0.5250630532024513
- Combined Prediction Score: 0.4271347600955986
- Mean Citation Score: 175.045658
- Max Citation Score: 320.2553
- Similarity Product: 246.0758732404351

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test