PATENT CLAIM ANALYSIS

Application Number: 15926531
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["257", "738000"]

Abstract:
The present disclosure is directed to systems and methods for improving the impedance matching of semiconductor package substrates by incorporating one or more magnetic build-up layers proximate relatively large diameter, relatively high capacitance, conductive pads formed on the lower surface of the semiconductor package substrate. The one or more magnetic layers may be formed using a magnetic build-up material deposited on the lower surface of the semiconductor package substrate. Vias conductively coupling the conductive pads to bump pads on the upper surface of the semiconductor package substrate pass through and are at least partially surrounded by the magnetic build-up material.

Claim (Index 8):
The semiconductor interconnect of  claim 1  wherein the at least one magnetic build-up layer comprises a magnetic build-up layer having a permeability of from about 5 to about 10 at frequencies of 5 GHz or less.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 90.0
- Lexical Diversity: 1.77966
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14503086', '10150892', '12959709', '11952502', '09652495']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.914182092139367
- 35 USC 102 Novelty (BERT): 0.4913225815857799
- Combined Prediction Score: 0.8718961410840083
- Mean Citation Score: 176.628644
- Max Citation Score: 184.34119
- Similarity Product: 129.18550415670873

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test