PATENT CLAIM ANALYSIS

Application Number: 15880512
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["257", "392000"]

Abstract:
A first and a second instance of a common structured stack are formed, respectively, on a first fin and a second fin. The common structured stack includes a work-function metal layer, and a barrier layer. The barrier layer of the first instance of the common structured stack is etched through, and the work-function metal layer of the first instance of the common structure is partially etched. The partial etch forms a thinner work-function metal layer, having an oxide of the work-function metal as a new barrier layer. A gate element is formed on the new barrier layer.

Claim (Index 7):
A method of forming a plurality of PMOS FinFETs having different threshold voltages comprising:\n forming a plurality of fins, wherein the plurality of fins includes a first Si fin and a second Si fin; forming in the first Si fin a first concentration of Ge, to form a first SiGe fin comprising the first concentration of Ge; forming in the second Si fin a second concentration of Ge, to form a second SiGe fin having the first concentration of Ge; and forming a first PMOS FinFET and a second PMOS FinFET, wherein forming the first PMOS FinFET comprises forming a first gate stack over a gate area of the first SiGe fin and forming the second PMOS FinFET comprises forming a second gate stack over a gate area of the second SiGe fin, wherein the first gate stack has a first work-function metal layer, and the second gate stack has a second work-function metal layer, wherein the first work-function metal layer and the second work-function metal layer comprise a mutually approximately identical thickness and comprise a mutually identical work-function metal, and wherein a difference of the first concentration of Ge from the second concentration of Ge, establishes, at least in part, a threshold voltage of the second PMOS FinFET that is different from a threshold voltage of the first PMOS FinFET.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 2.675
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14815626', '15830412', '14975917', '13451183', '14221108']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9224258461980503
- 35 USC 102 Novelty (BERT): 0.5044172962994691
- Combined Prediction Score: 0.8806249912081923
- Mean Citation Score: 260.66851
- Max Citation Score: 265.94153
- Similarity Product: 185.470849748255

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test