PATENT CLAIM ANALYSIS

Application Number: 16046100
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["257", "759000"]

Abstract:
The present disclosure provides a packaged semiconductor device and a method for preparing the same. The packaged semiconductor device includes a chip having a conductive pad; a first insulating layer disposed on the chip; a second insulating layer disposed on the first insulating layer; a conductive film disposed on the second insulating layer, a redistribution layer disposed on the conductive film; a probe pad disposed on the redistribution layer; and a third insulating, layer disposed on the redistribution layer and the second insulating layer, wherein the third insulating layer covers a portion of the probe pad, and there is no undercut at a region between the redistribution layer and the probe pad. The size of the probe pad is not limited by the undercut, as the size of the probe pad needs to be reduced in order to meet the requirement of continuous minimization of chip size.

Claim (Index 12):
A method for preparing a packaged semiconductor device, comprising:\n providing a chip having a conductive pad; forming a first insulating layer on the chip, wherein the first insulating layer includes a first opening, and the first opening exposes a portion of the conductive pad; forming a second insulating layer on the first insulating layer; forming a conductive film on the second insulating layer and the conductive pad; forming a first patterned mask on the second insulating layer, wherein the first patterned mask defines a first region exposing a portion of the conductive film; forming a redistribution layer in the first region; forming a second patterned mask on the redistribution layer, wherein the second patterned mask defines a second region exposing a portion of the redistribution layer; forming a probe pad in the second region; and forming a third insulating layer on the redistribution layer and the second insulating layer, wherein the third insulating layer includes a second opening, and the second opening exposes a portion of the probe pad.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 95.0
- Lexical Diversity: 2.75862
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15353249', '15205414', '12484497', '15286253', '14750009']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9172502953198962
- 35 USC 102 Novelty (BERT): 0.4783468186150859
- Combined Prediction Score: 0.8733599476494153
- Mean Citation Score: 214.85970000000003
- Max Citation Score: 221.15712
- Similarity Product: 182.2900310167694

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test