PATENT CLAIM ANALYSIS

Application Number: 16200322
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-10
Patent Classification: ["375", "362000"]

Abstract:
A transmitting circuit may include a clock generation circuit and a serializer. The clock generation circuit may generate a plurality of output clock signals by performing an emphasis operation for a plurality of clock signals based on a plurality of data. The serializer may output the plurality of data as output data in synchronization with the plurality of output clock signals.

Claim (Index 19):
The transmitting circuit according to  claim 18 , wherein, based on the emphasis control signals, the gating signal generator generates the first gating clock signal by using the fourth clock signal, generates the second gating clock signal by using the first clock signal, generates the third gating clock signal by using the second clock signal, and generates the fourth gating clock signal by using the third clock signal.

Metadata:
- Claim Count in Document: 34.0
- Percentile: 98.0
- Lexical Diversity: 2.06452
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16038835', '13309881', '13415777', '15895837', '12047753']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4913035173503809
- 35 USC 102 Novelty (BERT): 0.4776912996797432
- Combined Prediction Score: 0.4899422955833171
- Mean Citation Score: 168.067026
- Max Citation Score: 197.41074
- Similarity Product: 154.81794146200417

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test