PATENT CLAIM ANALYSIS

Application Number: 15895512
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["438", "631000"]

Abstract:
A method of manufacturing an array of planar wafer level metal posts includes plating an array of posts within a photoresist (PR) pattern mold on a substrate of a first wafer. Stripping the PR pattern mold from the substrate and array of posts. Applying an oxide layer, at a temperature of below 150 degrees Celsius, over a surface of the first wafer. Applying chemical-mechanical polishing (CMP) to planarize the oxide layer and the array of posts.

Claim (Index 13):
The method of  claim 11  further comprising, after step (d) and before step (e), placing a PR layer around each of the Indium posts.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 88.0
- Lexical Diversity: 1.86957
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12868529', '14573041', '14276481', '09018783', '09386734']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8509606082159185
- 35 USC 102 Novelty (BERT): 0.5027829072641101
- Combined Prediction Score: 0.8161428381207376
- Mean Citation Score: 161.299124
- Max Citation Score: 177.60545
- Similarity Product: 100.8144132279068

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test