PATENT CLAIM ANALYSIS

Application Number: 15983682
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-02
Patent Classification: ["257", "773000"]

Abstract:
A semiconductor device includes a wiring structure, a stacked structure located over the wrong structure, channel structures passing through the stacked structure, contact plugs passing through the stacked structure and electrically connected to the wiring structure, and insulating spacers each including loop patterns surrounding a sidewall of each of the contact plugs and stacked along the side all of each of the contact plugs.

Claim (Index 32):
A method of manufacturing a semiconductor device, the method comprising:\n forming a stacked structure; forming first openings passing through the stacked structure; forming second openings protruding from sidewalls of the first openings; forming spacers each including loop patterns filling the second openings; and forming plugs in the first openings, wherein the second openings of neighboring first openings are coupled to each other.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 93.0
- Lexical Diversity: 1.91667
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15815845', '15094016', '14731115', '15486845', '15980382']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.919045700547245
- 35 USC 102 Novelty (BERT): 0.4800470200010143
- Combined Prediction Score: 0.8751458324926219
- Mean Citation Score: 229.15042000000005
- Max Citation Score: 233.66798
- Similarity Product: 198.59178556088565

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test