PATENT CLAIM ANALYSIS

Application Number: 15921226
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["365", "226000"]

Abstract:
A semiconductor device includes: a first power source line for supplying a first voltage; a second power source line for supplying a second voltage; a memory circuit coupled with the first and second power source lines; a first switch which electrically coupling the first power source line with the second power source line and electrically decoupling the first power source line from the second power source line, in response to a control signal; a second switch which electrically coupling the first power source line with the second power source line and electrically decoupling the first power source line from the second power source line, in response to the control signal, wherein a memory circuit includes a memory cell array and a peripheral circuit, wherein a memory cell array includes a plurality of memory cells, the memory cells coupled with the second power source line.

Claim (Index 11):
The semiconductor device according to  claim 1 ,\n wherein the memory cell array further includes a plurality of word drivers coupled with the plurality of word lines respectively, wherein the first and second MOS transistors of the second switch are arranged at a first side of the memory cell array, and wherein the plurality of word drivers are arranged at a second side of the memory cell array opposite to the first side.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 90.0
- Lexical Diversity: 3.69048
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15799073', '15389192', '14866544', '12360521', '13008448']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8419199133703391
- 35 USC 102 Novelty (BERT): 0.523996312057622
- Combined Prediction Score: 0.8101275532390674
- Mean Citation Score: 302.23640400000005
- Max Citation Score: 363.47604
- Similarity Product: 303.0945146173096

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test