PATENT CLAIM ANALYSIS

Application Number: 16049735
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "676000"]

Abstract:
A packaged semiconductor device has a die attach pad and leads disposed proximate to the die attach pad. Each lead has a lead bottom surface and a lead end surface. A semiconductor device attached adjacent to a top surface of the die attach pad, and a conductive clip is attached to the semiconductor device and at least one of the leads. The conductive clip comprises a first tie bar extending from a first side surface of the conductive clip. A package body encapsulates the semiconductor device, the conductive clip, portions of the leads, at least a portion of the first tie bar, and at least a portion of the die attach pad. Each lead end surface is exposed in a side surface of the package body, and an end surface of the first tie bar is exposed in a first side surface of the package body. A conductive layer is disposed on each lead end surface but is not disposed on the end surface of the first tie bar.

Claim (Index 18):
The packaged semiconductor device of  claim 17 , wherein:\n the conductive layer comprises a electroplated solderable material.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 95.0
- Lexical Diversity: 3.43396
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15460032', '15700101', '14931750', '15706688', '15134330']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9281832123287648
- 35 USC 102 Novelty (BERT): 0.5436428368585912
- Combined Prediction Score: 0.8897291747817473
- Mean Citation Score: 278.09192399999995
- Max Citation Score: 395.86935
- Similarity Product: 311.1672358200967

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test