PATENT CLAIM ANALYSIS

Application Number: 15981505
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "369000"]

Abstract:
A Static Random-Access Memory (SRAM) device and its manufacturing method are presented, relating to semiconductor techniques. The SRAM device includes: a substrate; a first semiconductor column for Pull-Up (PU) transistors and a second semiconductor column for Pull-Down (PD) transistors, with both the first and the second semiconductor columns on the substrate; a first separation region, and a gate stack structure. The first separation region is between the first and the second semiconductor columns and comprises a first region and a second region, the gate stack structure comprises a gate dielectric layer comprising a first part and a second part; a P-type work function regulation layer comprising a first area and a second area adjacent to each other; a N-type work function regulation layer comprising a third area and a fourth area adjacent to each other; and a gate on both the P-type and N-type work function regulation layers.

Claim (Index 9):
The SRAM device of  claim 1 , wherein the gate dielectric layer comprises a high-K dielectric material.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 93.0
- Lexical Diversity: 2.60938
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15916729', '14165930', '14621440', '14271909', '15455203']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9183196948789792
- 35 USC 102 Novelty (BERT): 0.478295158218619
- Combined Prediction Score: 0.8743172412129432
- Mean Citation Score: 164.915688
- Max Citation Score: 173.95296000000005
- Similarity Product: 127.26652345596317

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test