PATENT CLAIM ANALYSIS

Application Number: 15965875
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-02
Patent Classification: ["326", "027000"]

Abstract:
Circuits and methods for preventing glitch in a circuit are disclosed. In one example, a circuit coupled to an input/output pad is disclosed. The circuit includes: a first level shifter, a second level shifter, and a control logic circuit. The first level shifter is configured for generating a data signal. The second level shifter is configured for generating an output enable signal. The first and second level shifters are controlled by first and second power-on-control signals, respectively. The control logic circuit is coupled to the first level shifter and the second level shifter, and configured for driving the input/output pad to a voltage level based on the data signal and the output enable signal.

Claim (Index 10):
The circuit of  claim 4 , further comprising an additional gating circuit configured to generate a third power-on-control signal and control a signal sequence of the first, second and third power-on-control signals based on a predetermined design.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 91.0
- Lexical Diversity: 2.64583
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12714878', '13786044', '13799866', '14034113', '12872079']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6523429166187814
- 35 USC 102 Novelty (BERT): 0.474208813884565
- Combined Prediction Score: 0.6345295063453598
- Mean Citation Score: 167.46927
- Max Citation Score: 173.40618999999995
- Similarity Product: 121.7525546551126

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test