PATENT CLAIM ANALYSIS

Application Number: 16100003
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["257", "076000"]

Abstract:
Some embodiments include methods of forming vertical memory strings. A trench is formed to extend through a stack of alternating electrically conductive levels and electrically insulative levels. An electrically insulative panel is formed within the trench. Some sections of the panel are removed to form openings. Each opening has a first pair of opposing sides along the stack, and has a second pair of opposing sides along remaining sections of the panel. Cavities are formed to extend into the electrically conductive levels along the first pair of opposing sides of the openings. Charge blocking material and charge-storage material is formed within the cavities. Channel material is formed within the openings and is spaced from the charge-storage material by gate dielectric material. Some embodiments include semiconductor constructions, and some embodiments include methods of forming vertically-stacked structures.

Claim (Index 10):
The memory device of  claim 9 , further comprising a material comprising tungsten silicide being between the bottom surfaces of the pillars and the upper surface of the base.

Metadata:
- Claim Count in Document: 22.0
- Percentile: 96.0
- Lexical Diversity: 2.31746
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15467765', '13735908', '14802930', '15933218', '15926427']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9253694250696778
- 35 USC 102 Novelty (BERT): 0.5026587343935384
- Combined Prediction Score: 0.8830983560020639
- Mean Citation Score: 248.587488
- Max Citation Score: 288.10248
- Similarity Product: 235.3221051694393

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test