PATENT CLAIM ANALYSIS

Application Number: 16177127
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["363", "089000"]

Abstract:
A method of enhancing a power factor during a half-line cycle of a power factor correction (PFC) converter includes generating an input voltage signal representative of a value of an input voltage of the PFC converter. A variable multiplication factor is adjusted to be greater than one for a first part of the half-line cycle and less than one for a second part of the half-line cycle. A pre-distortion signal is generated to be representative of the value of the input voltage of the PFC converter times the variable multiplication factor. An input current of the PFC converter is sensed. A first signal is generated in response to a sensed input current of the PFC converter multiplied by the pre-distortion signal. An on-time of a switch of the PFC converter is ended in response to the first signal.

Claim (Index 10):
The method of  claim 9 , wherein generating the pre-distortion signal representative of the value of the input voltage of the PFC converter times the variable multiplication factor comprises:\n amplifying the first value of the pre-distortion signal with a gain less than one to generate a buffer output.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 97.0
- Lexical Diversity: 2.75472
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14018954', '15132799', '14805228', '13225237', '15712024']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8035854844971874
- 35 USC 102 Novelty (BERT): 0.5326746325488187
- Combined Prediction Score: 0.7764943993023505
- Mean Citation Score: 252.68219
- Max Citation Score: 353.96445
- Similarity Product: 287.3180871653259

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test