PATENT CLAIM ANALYSIS

Application Number: 16044190
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "774000"]

Abstract:
An integrated device includes a semiconductor body and a dielectric layer bounded by a surface. A conductive region of a first metal material forms a via region extending into a hole passing through the dielectric layer, and an overlaid redistribution region which extends over the surface. At least one barrier region of a second metal material extends into the hole and surrounds the via region, and the barrier region furthermore extending over the surface. A first coating layer of a third metal material covers the top and the sides of an upper portion of the redistribution region at a distance from the surface. A second coating layer of a fourth metal material extends at a distance from the surface and covers the first coating layer, and covers laterally a lower portion of the redistribution region which is disposed on top of portions of the barrier region extending over the surface.

Claim (Index 8):
An integrated circuit, comprising:\n a die including an integrated electronic device, the integrated electronic device further including:\n a semiconductor body; \n a passivation structure on the semiconductor body, the passivation structure including a frontal dielectric layer bounded by a frontal surface; \n a conductive region including a via region extending into a hole passing through the frontal dielectric layer, the conductive region including an overlaid redistribution region extending over the frontal surface and having an upper portion including a top and sides and having a lower portion; \n a barrier structure including at least a first barrier region extending into the hole and surrounding the via region, the first barrier region including top portions extending over the frontal surface; \n a first coating layer covering the top and the sides of an upper portion of the overlaid redistribution region at a distance from the frontal surface; and \n a second coating layer extending at a distance from the frontal surface, the second coating layer covering the first coating layer and covering laterally the lower portion of the overlaid redistribution region disposed on the top of portions of the barrier structure extending over the frontal surface; \n a dielectric encapsulation region surrounding the die; and at least one conductive terminal extending in part inside of the dielectric encapsulation region and in part outside of the dielectric encapsulation region, the at least one conductive terminal being electrically coupled through a conducting wire to the redistribution region.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 95.0
- Lexical Diversity: 2.63333
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12845065', '11203883', '11608500', '15296286', '13830279']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8952552580229989
- 35 USC 102 Novelty (BERT): 0.481845562449693
- Combined Prediction Score: 0.8539142884656683
- Mean Citation Score: 179.26025599999997
- Max Citation Score: 199.6956
- Similarity Product: 158.9551154573679

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test