PATENT CLAIM ANALYSIS

Application Number: 16235956
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["326", "038000"]

Abstract:
The disclosure relates to systems and methods for sector-to-sector and die-to-die clock synchronization in programmable logic devices. The methods and systems may employ phase difference detector and programmable delay elements to minimize skews in the clock tree and facilitate timing closure of time-critical paths and increase in operating frequencies.

Claim (Index 20):
The method of  claim 17 , wherein the die-to-die synchronization comprises:\n receiving, in a first phase difference detector of a timing strip of the first die that interfaces a bridge that couples the first die to the second die, a reference clock from a first sector of the first die adjacent to the bridge and a feedback clock from a second sector of the second die adjacent the bridge; determining a phase difference between the reference clock and the feedback clock; and adjusting a delay element in the timing strip of the first die.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 98.0
- Lexical Diversity: 1.37838
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['16236062', '14882065', '16146849', '15392225', '15338074']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6722731256589202
- 35 USC 102 Novelty (BERT): 0.4808119400902585
- Combined Prediction Score: 0.6531270071020541
- Mean Citation Score: 165.987802
- Max Citation Score: 189.29652
- Similarity Product: 133.14920064818142

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test