PATENT CLAIM ANALYSIS

Application Number: 15967344
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["327", "292000"]

Abstract:
Certain aspects of the present disclosure provide an input clock switching system, including: a clock source configured to output a reference clock signal; a clock generator circuit connected to the clock source and configured to output a plurality of input clock signals based on the reference clock signal; an output clock multiplexer, configured to: receive the plurality of input clock signals; receive an output clock selection signal; and output a first clock signal, wherein the first clock signal is one of the input clock signals; and a glitch suppression circuit, configured to: receive the first clock signal; receive a glitch suppression signal; output a clock output signal, wherein the clock output signal is: the first clock signal when the glitch suppression signal is in a first state; and a logic low signal when the glitch suppression signal is in a second state.

Claim (Index 10):
The method of  claim 9 , further comprising: receiving a glitch suppression signal.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 91.0
- Lexical Diversity: 3.40426
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10645040', '14635145', '09760560', '11227026', '12984764']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.768956496273596
- 35 USC 102 Novelty (BERT): 0.4931548151925772
- Combined Prediction Score: 0.741376328165494
- Mean Citation Score: 213.140062
- Max Citation Score: 220.61163
- Similarity Product: 145.29949471490983

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test