PATENT CLAIM ANALYSIS

Application Number: 15741917
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["345", "173000"]

Abstract:
An object of the present invention is to realize a shift register that can interrupt a scan without causing a display failure or an abnormal action. A plurality of unit circuits each constitutes corresponding one of a plurality of stages in a shift register ( 310 ), the unit circuits each including a first unit circuit (UCa) connected to a gate bus line (GL) and configured to output a shift pulse to the connected gate bus line (GL) and to a succeeding stage, and a second unit circuit (UCb) connected to none of the gate bus lines (GL) and configured to output a shift pulse to a succeeding stage.

Claim (Index 9):
The shift register according to  claim 2 ,\n wherein the first output control node turn-on unit comprises a first output control node turn-on transistor including a control terminal, a first conducting terminal, and a second conducting terminal, a shift pulse output from the preceding stage being provided to the control terminal and the first conducting terminal, and the second conducting terminal being connected to the first output control node, the first output control node turn-off unit comprises a first output control node turn-off transistor including a control terminal, a first conducting terminal, and a second conducting terminal, a shift pulse output from the succeeding stage being provided to the control terminal, the first conducting terminal being connected to the first output control node, and the off level potential being provided to the second conducting terminal, the second output control node turn-on unit comprises a second output control node turn-on transistor including a control terminal, a first conducting terminal, and a second conducting terminal, a shift pulse output from the preceding stage being provided to the control terminal and the first conducting terminal, and the second conducting terminal being connected to the second output control node, and the second output control node turn-off unit comprises a second output control node turn-off transistor including a control terminal, a first conducting terminal, and a second conducting terminal, a signal changing from the off level to the on level at a timing when the shift action is resumed after stoppage of the shift action being provided to the control terminal, the first conducting terminal being connected to the second output control node, and the off level potential being provided to the second conducting terminal.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 86.0
- Lexical Diversity: 2.12069
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15767510', '14432593', '15552802', '15322802', '13512892']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6944685673423455
- 35 USC 102 Novelty (BERT): 0.4872706556159222
- Combined Prediction Score: 0.6737487761697032
- Mean Citation Score: 244.547724
- Max Citation Score: 246.51152
- Similarity Product: 206.4977656820869

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test