PATENT CLAIM ANALYSIS

Application Number: 16133404
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-06
Patent Classification: ["257", "040000"]

Abstract:
A method of fabricating a display panel may include forming an oxide semiconductor pattern on a base layer including a first region and a second region, etching first, second, and third insulating layers to form a first groove that overlaps the second region, forming electrodes on the third insulating layer, forming a fourth insulating layer on the third insulating layer to cover the electrodes, thermally treating the fourth insulating layer, forming an organic layer to cover the fourth insulating layer, and forming an organic light emitting diode on the organic layer.

Claim (Index 12):
A display panel, comprising:\n a base layer including a first region and a second region that is bent from the first region along a predetermined bending axis; a first thin-film transistor provided in the first region, the first thin-film transistor comprising a crystalline silicon semiconductor pattern, a first control electrode, and a first input electrode and a first output electrode that are coupled to the crystalline silicon semiconductor pattern and are spaced apart from each other with the first control electrode interposed therebetween; a second thin-film transistor disposed in the first region to have a bottom gate structure, the second thin-film transistor comprising a second control electrode, an oxide semiconductor pattern disposed on the second control electrode, and a second input electrode and a second output electrode that are in contact with the oxide semiconductor pattern and are spaced apart from each other; a passivation layer disposed in the first region and the second region to cover the first thin-film transistor and the second thin-film transistor and to include a first groove that overlaps the second region; a plurality of inorganic layers disposed between the passivation layer and the base layer to include a second groove that overlaps the first groove; an organic layer disposed in the first region and the second region and on the passivation layer to cover inner surfaces of the first and second grooves; and an organic light emitting diode disposed on the organic layer and in the first region and electrically connected to the first thin-film transistor, wherein each of etch rates of the second input electrode and the second output electrode that are etched by a fluoro compound are higher than that of the oxide semiconductor pattern.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 97.0
- Lexical Diversity: 2.32558
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15923507', '14506061', '15654485', '15271504', '15297640']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9020248143389776
- 35 USC 102 Novelty (BERT): 0.4833554770396709
- Combined Prediction Score: 0.860157880609047
- Mean Citation Score: 218.501642
- Max Citation Score: 230.82271
- Similarity Product: 202.1306759886694

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test