PATENT CLAIM ANALYSIS

Application Number: 15943938
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["330", "296000"]

Abstract:
A bias circuit for power amplifiers is disclosed. A power amplifier bias circuit can include an emitter follower device and an emitter follower mirror device coupled to form a mirror configuration. The emitter follower device can be configured to provide a bias signal for a power amplifier at an output port. The power amplifier bias circuit can include a reference device configured to mirror an amplifying transistor of an amplifying device of the power amplifier. The emitter follower mirror device can be configured to provide a mirror bias signal to the reference device. A node between the emitter follower device and the emitter follower mirror device can have a voltage of approximately twice a base-emitter voltage (2 Vbe) of the amplifying transistor.

Claim (Index 2):
The power amplifier bias circuit of  claim 1  wherein the emitter follower device includes an emitter follower transistor, the emitter follower mirror device includes an emitter follower mirror transistor, and the emitter follower transistor and emitter follower mirror transistor are coupled by their respective bases to form the mirror configuration.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 91.0
- Lexical Diversity: 2.76596
- Patent Class: 330.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14867178', '14531967', '15296007', '14534886', '14871952']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8173170608327085
- 35 USC 102 Novelty (BERT): 0.5347618208060972
- Combined Prediction Score: 0.7890615368300473
- Mean Citation Score: 298.5128
- Max Citation Score: 366.15573
- Similarity Product: 365.0355396684391

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test