PATENT CLAIM ANALYSIS

Application Number: 16159498
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-07
Patent Classification: ["341", "120000"]

Abstract:
A system can include an analog input port; a digital output port; and a successive approximation register (SAR) analog-to-digital converter (ADC). The SAR ADC can include a voltage comparator V d  having a first input, a second input, and an output; a first plurality of capacitors C p [0 :n] that are coupled with the analog input port and each have a top plate and a bottom plate; a second plurality of capacitors C n [0 :n] that are coupled with the analog input port and each have a top plate and a bottom plate; and a SAR controller coupled between the output of the voltage comparator V d  and the digital output port.

Claim (Index 37):
The successive approximation register analog-to-digital converter of  claim 32  wherein each first plate of the first plurality of capacitors and the second plurality of capacitors is disconnected from the common mode voltage, and each second plate of the first plurality of capacitors and the second plurality of capacitors is electrically connected to the common mode voltage during a first conversion cycle, and the controller is further configured to determine whether to collapse a bit grouping during a second conversion cycle based at least in part on a comparison between a conversion residue of a most significant bit of the bit grouping and a least significant bit weight of the bit grouping.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 97.0
- Lexical Diversity: 2.46296
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15799812', '14932798', '15391573', '15052452', '13085920']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6555951917616643
- 35 USC 102 Novelty (BERT): 0.5904617962367515
- Combined Prediction Score: 0.649081852209173
- Mean Citation Score: 442.3388059999999
- Max Citation Score: 531.8103
- Similarity Product: 381.4698093057096

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test