PATENT CLAIM ANALYSIS

Application Number: 16266604
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-10
Patent Classification: ["326", "038000"]

Abstract:
Multi-chip systems and structures for modular scaling are described. In some embodiments an interfacing bar is utilized to couple adjacent chips. For example, a communication bar may utilized to coupled logic chips, and memory bar may be utilized to couple multiple memory chips to a logic chip.

Claim (Index 21):
The multi-chip system of  claim 1 , further comprising a first molding layer, wherein the interfacing bar is encapsulated in the first molding layer, the logic chip is mounted on top of the first molding layer, and the plurality of memory chips are mounted on top of the second molding layer.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 99.0
- Lexical Diversity: 1.52941
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14040223', '13646477', '14977645', '15499557', '15816360']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6361232439517495
- 35 USC 102 Novelty (BERT): 0.4547192472656612
- Combined Prediction Score: 0.6179828442831407
- Mean Citation Score: 122.76851000000002
- Max Citation Score: 142.67065
- Similarity Product: 110.71135618246196

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test