PATENT CLAIM ANALYSIS

Application Number: 16273317
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-06
Patent Classification: ["327", "153000"]

Abstract:
An electronic device includes clock generation circuitry. The clock generation circuitry includes a first flip flop receiving as input a device clock and being triggered by an input clock and a second flip flop receiving, as input, output from the first flip flop and being triggered by the input clock. A first inverter receives output from the first flip flop as input and a second inverter receives output from the second flip flop as input. A first AND gate receives, as input, output from the second flip flop and the first inverter, and generates a first clock as output. A second AND gate receives, as input, output from the first flip flop and the second inverter, and generates a second clock as output.

Claim (Index 17):
The method of  claim 16 , further comprising shifting data through a flip flop chain by controlling master latches of flip flops of the flip flop chain based upon the first complemented clock signal and by controlling slave latches of the flip flops of the flip flop chain based upon the second complemented clock signal.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 99.0
- Lexical Diversity: 4.25
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15425277', '14644637', '14622531', '11120388', '11582517']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.760153115996548
- 35 USC 102 Novelty (BERT): 0.566404216722993
- Combined Prediction Score: 0.7407782260691925
- Mean Citation Score: 325.49785
- Max Citation Score: 478.71472
- Similarity Product: 349.7885788237953

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test