PATENT CLAIM ANALYSIS

Application Number: 16014821
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["438", "118000"]

Abstract:
A device includes an interposer, which includes a substrate; and at least one dielectric layer over the substrate. A plurality of through-substrate vias (TSVs) penetrate through the substrate. A first metal bump is in the at least one dielectric layer and electrically coupled to the plurality of TSVs. A second metal bump is over the at least one dielectric layer. A die is embedded in the at least one dielectric layer and bonded to the first metal bump.

Claim (Index 1):
A package comprising:\n an interposer comprising:\n a semiconductor substrate; \n a first through-via and a second through-via penetrating through the semiconductor substrate; and \n a plurality of Redistribution Lines (RDLs) over and electrically coupling to the first through-via and the second through-via; \n a first package component over and bonded to the interposer, wherein the first package component is electrically coupled to the first through-via; and a second package component over and attached to the interposer; and a third package component underlying and bonded to the interposer.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 94.0
- Lexical Diversity: 2.175
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12823851', '13867831', '12774558', '12762085', '13342583']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8629361986246856
- 35 USC 102 Novelty (BERT): 0.4936161394921029
- Combined Prediction Score: 0.8260041927114274
- Mean Citation Score: 218.135016
- Max Citation Score: 254.32004
- Similarity Product: 201.27632646079064

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test