PATENT CLAIM ANALYSIS

Application Number: 16378921
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-08
Patent Classification: ["257", "737000"]

Abstract:
A microelectronic assembly including an insulating layer having a plurality of nanoscale conductors disposed in a nanoscale pitch array therein and a pair of microelectronic elements is provided. The nanoscale conductors can form electrical interconnections between contacts of the microelectronic elements while the insulating layer can mechanically couple the microelectronic elements together.

Claim (Index 5):
The method of  claim 1 , further comprising forming the diblock polymer insulating layer on a semiconductor wafer and transferring the insulating layer to a metallic substrate to form the array of nanoscale conductors.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 100.0
- Lexical Diversity: 1.5
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15147807', '15346397', '15192549', '11027443', '13686649']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9151448969627728
- 35 USC 102 Novelty (BERT): 0.5306880097454711
- Combined Prediction Score: 0.8766992082410425
- Mean Citation Score: 218.93484
- Max Citation Score: 351.7531
- Similarity Product: 238.06566386330127

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test