PATENT CLAIM ANALYSIS

Application Number: 16272236
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-08
Patent Classification: ["341", "159000"]

Abstract:
A receiver includes a variable resolution analog-to-digital converter (ADC) and variable resolution processing logic/circuitry. The processing logic may use feed-forward equalization (FFE) techniques to process the outputs from the ADC. When receiving data from a channel having low attenuation, distortion, and/or noise, the ADC and processing logic may be configured to sample and process the received signal using fewer bits, and therefore less logic, than when configured to receiving data from a channel having a higher attenuation, distortion, and/or noise. Thus, the number of (valid) bits output by the ADC, and subsequently processed (e.g., for FFE equalization) can be reduced when a receiver of this type is coupled to a low loss channel. These reductions can reduce power consumption when compared to operating the receiver using the full (i.e., maximum) number of bits the ADC and processing logic is capable of processing.

Claim (Index 5):
The integrated circuit of  claim 2 , wherein the digital control circuitry determines the resolution of the ADC by adjusting the number of comparisons the ADC uses to convert the received signal to a digital number.

Metadata:
- Claim Count in Document: 51.0
- Percentile: 99.0
- Lexical Diversity: 2.1
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15818434', '11559850', '15495572', '14455752', '10749570']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5782149458362295
- 35 USC 102 Novelty (BERT): 0.4940088414696406
- Combined Prediction Score: 0.5697943353995706
- Mean Citation Score: 161.94826799999996
- Max Citation Score: 262.9642
- Similarity Product: 250.569979234457

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test