PATENT CLAIM ANALYSIS

Application Number: 15925816
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-08
Patent Classification: ["714", "764000"]

Abstract:
A DRAM-based storage device includes a DRAM and a control circuit. The DRAM includes a buffering area and a host accessing area. A data is stored in the host accessing area. The control circuit is electrically connected with the DRAM. The control circuit copies a portion of the data from the host accessing area to the buffering area at a predetermined time interval. If the portion of the data is successfully copied to the buffering area, the control circuit confirms that the portion of the data in the host accessing area is accurate.

Claim (Index 9):
The data processing method as claimed in  claim 7 , wherein after the step (a), the step (c) or the step (d), the step (a) is repeatedly done.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 90.0
- Lexical Diversity: 2.5
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14543472', '13559476', '15293285', '15147169', '13716752']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2980660896744401
- 35 USC 102 Novelty (BERT): 0.4794312336466105
- Combined Prediction Score: 0.3162026040716571
- Mean Citation Score: 150.1643
- Max Citation Score: 156.06136999999995
- Similarity Product: 103.52213556675908

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test