PATENT CLAIM ANALYSIS

Application Number: 16188237
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["257", "506000"]

Abstract:
The present invention provides a method of forming a semiconductor device. First, a substrate is provided and an STI is forming in the substrate to define a plurality of active regions. Then a first etching process is performed to form a bit line contact opening, which is corresponding to one of the active regions. A second etching process is performed to remove a part of the active region and its adjacent STI so a top surface of active region is higher than a top surface of the STI. Next, a bit line contact is formed in the opening. The present invention further provides a semiconductor structure.

Claim (Index 13):
The method of forming a semiconductor memory device according to  claim 1 , after the first etching process, the top surface of the active region in the bit line contact opening and the top surface of the shallow trench isolation in the bit line contact opening have a height H 1 , after the second etching process, the top surface of the active region in the bit line contact opening and the top surface of the shallow trench isolation in the bit line contact opening have a height H 2 , wherein H 2  is greater than H 1 .

Metadata:
- Claim Count in Document: 12.0
- Percentile: 98.0
- Lexical Diversity: 2.09091
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15472295', '15856089', '14587472', '12292819', '11193788']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9222569948002696
- 35 USC 102 Novelty (BERT): 0.4915739413727565
- Combined Prediction Score: 0.8791886894575183
- Mean Citation Score: 194.16505
- Max Citation Score: 211.98305
- Similarity Product: 151.00266593437198

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test