PATENT CLAIM ANALYSIS

Application Number: 15955116
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["257", "669000"]

Abstract:
A semiconductor module may include a semiconductor chip; a first electrode body; and a second electrode body; wherein the semiconductor chip may include a semiconductor substrate; a first electrode layer that is in contact with a center portion of a first surface of the semiconductor substrate and is out of contact with a peripheral portion of the first surface; and a second electrode layer that is in contact with a center portion of a second surface of the semiconductor substrate and is out of contact with a peripheral portion of the second surface, the second surface being located on an opposite side with respect to the first surface, the first electrode body is connected to the first electrode layer via a first solder layer, and the second electrode body is connected to the second electrode layer via a second solder layer.

Claim (Index 2):
The semiconductor module of  claim 1 , wherein an area of a connection portion between the first electrode layer and the first solder layer is 0.95 to 1.05 times an area of a connection portion between the second electrode layer and the second solder layer.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 91.0
- Lexical Diversity: 3.65854
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15882242', '12285939', '15470820', '13157746', '14848250']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9143052467014686
- 35 USC 102 Novelty (BERT): 0.4794652406834149
- Combined Prediction Score: 0.8708212460996632
- Mean Citation Score: 145.470396
- Max Citation Score: 151.1808
- Similarity Product: 103.95946286087036

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test