PATENT CLAIM ANALYSIS

Application Number: 16249481
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-06
Patent Classification: ["438", "268000"]

Abstract:
A method of forming a spacer for a vertical transistor is provided. The method includes forming a fin structure on a substrate, depositing a first spacer on exposed surfaces of the substrate to define gaps between the first spacer and the fin structure and depositing a second spacer on the exposed surfaces of the substrate in at least the gaps.

Claim (Index 6):
A method of forming a spacer for a vertical transistor, the method comprising:\n forming a fin on a substrate; depositing a first spacer and an oxide on the fin such that uppermost portions of the first spacer are exposed through the oxide; etching portions of the first spacer to re-expose surfaces of the substrate adjacent to the fin via the openings to define gaps between remainders of the first spacer and the fin; and depositing a second spacer on the re-exposed surfaces of the substrate in at least the gaps.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 99.0
- Lexical Diversity: 1.90909
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15235829', '15897706', '15240056', '15276349', '15188476']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.866880813571147
- 35 USC 102 Novelty (BERT): 0.5482416884145792
- Combined Prediction Score: 0.8350169010554902
- Mean Citation Score: 287.908788
- Max Citation Score: 401.85196
- Similarity Product: 396.8826120289635

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test