PATENT CLAIM ANALYSIS

Application Number: 15903674
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["716", "112000"]

Abstract:
In accordance with the present method and system for improving integrated circuit layout, a local process modification is calculated from simulated process response variables at a set of control points. Said modification values are incorporated into the layout constraints imposed by design rules and design intent to account for manufacturing friendliness. Solving the updated constraint equation with user specified objective function produces a new layout with increased manufacturability. The new layout may further contain data tags that enable optimal process correction to be performed on selected locations, leading to reduction in data size and mask complexity. Also in accordance with this invention, physical design tools are enhanced to read and process anisotropic design rules.

Claim (Index 8):
The method according to  claim 6 , wherein the step of generating a modified design layout comprises locally adjusting at least a spacing value between a pair of the first plurality of routing wires.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 88.0
- Lexical Diversity: 1.4186
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15251961', '13886577', '10907814', '12181460', '13547444']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3881803884969924
- 35 USC 102 Novelty (BERT): 0.4999662341565911
- Combined Prediction Score: 0.3993589730629523
- Mean Citation Score: 275.16582200000005
- Max Citation Score: 300.41162
- Similarity Product: 200.99864246167783

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test