PATENT CLAIM ANALYSIS

Application Number: 15870175
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-12
Patent Classification: ["438", "637000"]

Abstract:
A method of manufacturing a semiconductor device is disclosed. The method includes forming a first insulting layer on a substrate, forming a first conductor pattern in the first insulating layer, forming a second insulating layer on the first insulating layer, and forming a second wiring pattern and a contact via in the second insulating layer, wherein a top surface of the first insulating layer is higher than a top surface of the first conductor pattern.

Claim (Index 7):
The method of  claim 1 , wherein the second via hole is formed at the same level as that of the second insulating interlayer, and the width of the second via hole is equal to that of the first wiring.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 86.0
- Lexical Diversity: 2.38235
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15296202', '14199031', '12960150', '15236427', '13600025']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8818802409135577
- 35 USC 102 Novelty (BERT): 0.5097776847818942
- Combined Prediction Score: 0.8446699853003914
- Mean Citation Score: 265.51472
- Max Citation Score: 285.35635
- Similarity Product: 210.7801245888353

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test