PATENT CLAIM ANALYSIS

Application Number: 16123915
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["716", "108000"]

Abstract:
A disclosed system of an emulation environment performs a simulation to construct a waveform of a target signal based on signals traced by an emulator for a time frame including multiple clock cycles. In one embodiment, a simulation is performed in a manner that an input of the logic gate, in a first duration of the time frame at which an output of the logic gate depends on the input, is analyzed to obtain the output, and the input of the logic gate, in a second duration of the time frame at which the output of the logic gate is independent, is omitted. In one aspect, the input of the logic gate is simulated for the first duration based on a periodicity in a waveform of the input in the first duration.

Claim (Index 15):
The system of  claim 14 , wherein the host system is further configured to:\n generate the output waveform of the output signal of the logic gate for the time frame based on the periodic pattern and the number of repetitions of the periodic pattern.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 2.49123
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15278659', '14745239', '15007040', '14507696', '15447010']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3285213085829365
- 35 USC 102 Novelty (BERT): 0.5165653902882226
- Combined Prediction Score: 0.3473257167534651
- Mean Citation Score: 235.627084
- Max Citation Score: 346.1858
- Similarity Product: 267.3268579660416

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test