PATENT CLAIM ANALYSIS

Application Number: 16013010
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "329000"]

Abstract:
A method of forming a vertical transport fin field effect transistor with self-aligned dielectric separators, including, forming a bottom source/drain region on a substrate, forming at least two vertical fins on the bottom source/drain region, forming a protective spacer on the at least two vertical fins, forming a sacrificial liner on the protective spacer, forming an isolation channel in the bottom source/drain region and substrate between two of the at least two vertical fins, forming an insulating plug in the isolation channel, wherein the insulating plug has a pinch-off void within the isolation channel, and forming the dielectric separator on the insulating plug.

Claim (Index 3):
The method of  claim 3 , wherein the non-conformal deposition process is chemical vapor deposition or plasma enhanced chemical vapor deposition.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 94.0
- Lexical Diversity: 2.45652
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15873279', '15492745', '15462175', '15336309', '15488089']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9411041413855474
- 35 USC 102 Novelty (BERT): 0.5790474782670064
- Combined Prediction Score: 0.9048984750736934
- Mean Citation Score: 393.853152
- Max Citation Score: 463.88156
- Similarity Product: 461.3215485012339

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test