PATENT CLAIM ANALYSIS

Application Number: 15980794
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-02
Patent Classification: ["363", "132000"]

Abstract:
A method and a device for voltage balancing of DC bus capacitors of an NPC four-level inverter are disclosed. The method includes: determining an optimal zero-sequence voltage, determining an actual reference voltage of each phase based on the optimal zero-sequence voltage; comparing respectively three preset carrier signals with the actual reference voltage of each phase to obtain three first control signals; determining three duty-cycle adjustment values based on a voltage of the intermediate bus capacitor; adjusting correspondingly the three first control signals based the three duty-cycle adjustment values to obtain three second control signals; inputting correspondingly the three second control signals to three first switches of an upper bridge corresponding to each phase; and inputting correspondingly complementary signals of the three second control signals to three second switches of a lower bridge corresponding to each phase.

Claim (Index 15):
The device according to  claim 13 , wherein the computing unit is configured to calculate the bus neutral-point current corresponding to each key zero-sequence voltage based on the three phase currents comprises:\n calculating an actual reference voltage of each phase after each key zero-sequence voltage is introduced by a formula of\n u refx \u2032=u refx +u z , \n where u refx \u2032 represents the actual reference voltage of each phase, u refx  represents a initial reference voltage of each phase, x represents a phase, b phase or c phase, and u z  represents the key zero-sequence voltage;\n calculating a neutral-point current corresponding to each phase based on the actual reference voltage of each phase, wherein\n when 0\u2264u refx +< 3/2, \n \n i Nx = 2 3 \ue89e u refx \u2032 \u00b7 i ox , where i Nx  represents the neutral-point current corresponding to each phase, and i ox  represents an output current corresponding to each phase,\n when 3/2\u2264u refx +\u22643, \n i Nx = ( 2 - 2 3 \ue89e u refx \u2032 ) \u00b7 i ox ; calculating a sum of the three neutral-point currents corresponding to the three phases as the bus neutral-point current corresponding to each key zero-sequence voltage.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 2.41667
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15109219', '15662044', '13912398', '14153103', '15823192']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7963522314366007
- 35 USC 102 Novelty (BERT): 0.505402665824005
- Combined Prediction Score: 0.7672572748753412
- Mean Citation Score: 228.819082
- Max Citation Score: 246.3851
- Similarity Product: 172.1623863520265

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test