PATENT CLAIM ANALYSIS

Application Number: 16321997
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-07
Patent Classification: ["323", "282000"]

Abstract:
A first circuit generates and outputs a transmission signal to a first end and a second end of a first coil in response to variation in logical value of an input first signal. A detection circuit detects a voltage signal generated at each of a first end and a second end and outputs a second signal which reflects the first signal based on a result of detection. A control circuit controls a voltage to be applied across opposing ends of each of a first diode and a second diode of a first rectifier circuit and a voltage to be applied to opposing ends of each of a third diode and a fourth diode of a second rectifier circuit.

Claim (Index 13):
A signal transmission circuit comprising:\n a first transformer having a first coil and a second coil; a second transformer having a third coil and a fourth coil; a first circuit connected to the first coil and the third coil, the first circuit generating and outputting a first transmission signal to a first end and a second end of the first coil in response to rise of an input first signal and generating and outputting a second transmission signal to a first end and a second end of the third coil in response to fall of the input first signal; and a second circuit connected to the second coil and the fourth coil, the second circuit generating and outputting a second signal which reflects the first signal input to the first circuit, the second circuit including\n a first detection circuit having two input terminals connected to a first end and a second end of the second coil, respectively, the first detection circuit detecting a voltage signal generated at each of the first end and the second end and outputting a set signal based on a result of detection, \n a second detection circuit having two input terminals connected to a first end and a second end of the fourth coil, respectively, the second detection circuit detecting a voltage signal generated at each of the first end and the second end and outputting a reset signal based on a result of detection, \n a latch circuit having a set terminal receiving the set signal from the first detection circuit and a reset terminal receiving the reset signal from the second detection circuit and outputting the second signal which reflects the first signal input to the first circuit, \n a first rectifier circuit configured with a first diode and a second diode connected in a forward direction and in a reverse direction, respectively, to the first end of the second coil, \n a second rectifier circuit configured with a third diode and a fourth diode connected in a forward direction and in a reverse direction, respectively, to the second end of the second coil, \n a third rectifier circuit configured with a fifth diode and a sixth diode connected in a forward direction and in a reverse direction, respectively, to the first end of the fourth coil, \n a fourth rectifier circuit configured with a seventh diode and an eighth diode connected in a forward direction and in a reverse direction, respectively, to the second end of the fourth coil, \n a first control circuit which controls a voltage to be applied to opposing ends of each of the first diode and the second diode of the first rectifier circuit and a voltage to be applied to opposing ends of each of the third diode and the fourth diode of the second rectifier circuit, and \n a second control circuit which controls a voltage to be applied to opposing ends of each of the fifth diode and the sixth diode of the third rectifier circuit and a voltage to be applied to opposing ends of each of the seventh diode and the eighth diode of the fourth rectifier circuit.

Metadata:
- Claim Count in Document: 25.0
- Percentile: 99.0
- Lexical Diversity: 2.68889
- Patent Class: 323.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15528858', '11545040', '11508497', '12167812', '16316726']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7248079171427503
- 35 USC 102 Novelty (BERT): 0.4875671356562699
- Combined Prediction Score: 0.7010838389941023
- Mean Citation Score: 200.403168
- Max Citation Score: 208.20552
- Similarity Product: 140.20133737538342

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test