PATENT CLAIM ANALYSIS

Application Number: 15956792
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["377", "034000"]

Abstract:
One or more gray code counters, counter arrangements, and phase-locked loop (PLL) circuits are provided. A gray code counter comprises a set of cells, such as standard cells, that output a gray code signal. The gray code counter comprises a pre-ready cell that provides an early signal, generated based upon an early clock, to one or more cells to reduce delay. A counter arrangement comprises one or more counter groups configured to provide pixel count levels for pixels, such as pixels of an image sensor array. A counter group comprises a gray code counter configured to provide a gray code signal to latch counter arrangements of the counter group. A PPL circuit comprises a gray code counter configured to generate a gray code signal used by a digital filter to adjust an oscillator. The gray code signal provides n-bit early/late information to the digital filter for adjustment of the oscillator.

Claim (Index 2):
The gray code counter of  claim 1 , wherein:\n the second cell comprises a first flip flop, the second gray code signal portion of the gray code signal is output from the second cell at a first output of the first flip flop, and a first input of the first multiplexer is coupled to the first output of the first flip flop and receives the second gray code signal portion of the gray code signal.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 91.0
- Lexical Diversity: 2.27397
- Patent Class: 377.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14190154', '15483140', '13945937', '14495876', '12800038']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6945157161988168
- 35 USC 102 Novelty (BERT): 0.4875170947244717
- Combined Prediction Score: 0.6738158540513823
- Mean Citation Score: 227.983108
- Max Citation Score: 300.41867
- Similarity Product: 266.9403706654674

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test