PATENT CLAIM ANALYSIS

Application Number: 15868742
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["257", "347000"]

Abstract:
A semiconductor device includes a semiconductor wafer having one or more suspended nanosheet extending between first and second source/drain regions. A gate structure wraps around the nanosheet stack to define a channel region located between the source/drain regions. The semiconductor device further includes a first all-around source/drain contact formed in the first source/drain region and a second all-around source/drain contact formed in the second source/drain region. The first and second all-around source/drain contacts each include a source/drain epitaxy structure and an electrically conductive external portion that encapsulates the source/drain epitaxy structure.

Claim (Index 20):
The semiconductor device of  claim 19 , wherein the source/drain epitaxy structure comprises silicon (Si), and the electrically conductive portion comprises a metal material.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 1.97917
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15241772', '15868683', '15846461', '15404469', '15339665']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.932461366543214
- 35 USC 102 Novelty (BERT): 0.5186512199596625
- Combined Prediction Score: 0.8910803518848589
- Mean Citation Score: 287.4802640000001
- Max Citation Score: 314.31522
- Similarity Product: 226.4505122582173

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test