PATENT CLAIM ANALYSIS

Application Number: 16417589
Application Type: Utility
Filing Date: 2019-05
Publication Date: 2019-09
Patent Classification: ["438", "612000"]

Abstract:
A semiconductor structure with a through silicon via includes a substrate having a front side and a back side. The through silicon via penetrates the substrate. A device is disposed on the front side of the substrate. Numerous dielectric layers cover the front side. A first test pad for testing the device is disposed on the front side of the substrate. A second test pad for testing the through silicon via is disposed on the back side of the substrate. A method of fabricating and testing the semiconductor structure is also provided.

Claim (Index 9):
The fabricating method of a semiconductor structure with a through silicon via of  claim 8 , wherein the first test pad and the second test pad are tested simultaneously.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 100.0
- Lexical Diversity: 2.60526
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14174850', '11874009', '13159852', '15259032', '11129105']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8807085501369826
- 35 USC 102 Novelty (BERT): 0.5034228054691944
- Combined Prediction Score: 0.8429799756702038
- Mean Citation Score: 211.07639
- Max Citation Score: 292.5451
- Similarity Product: 228.95351565892696

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test