PATENT CLAIM ANALYSIS

Application Number: 15957790
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["365", "145000"]

Abstract:
Methods and apparatus for sensing a memory cell using lower offset, higher speed sense amplifiers are described. A sense amplifier may include an amplifier component that is configurable to operate in an amplifier mode or a latch mode. In some examples, the amplifier component may be configured to operate in the amplifier or latch mode by activating or deactivating switching components inside the amplifier component. When configured to operate in the amplifier mode, the amplifier component may be used, during a read operation of a memory cell, to pre-charge a digit line and/or amplify a signal received from the memory cell. When configured to operate in the latch mode, the amplifier component may be used to latch a state of the memory cell. In some cases, the amplifier component may use some of the same internal circuitry for pre-charging the digit line, amplifying the signal, and/or latching the state.

Claim (Index 1):
A method, comprising:\n configuring an amplifier component to operate in an amplifier mode during a first pre-charging portion of a read operation based at least in part on activating or deactivating a second switching component in the amplifier component; coupling, while the amplifier component is operating in the amplifier mode, a first voltage source with a first input of the amplifier component, a first output of the amplifier component with a second input of the amplifier component, and the first output of the amplifier component with a digit line to pre-charge the digit line to a first voltage during the first pre-charging portion of the read operation; coupling, during a signal development portion of the read operation of a memory cell, a ferroelectric capacitor of the memory cell with the digit line associated with the memory cell to adjust an amount of electric charge on the digit line; coupling, during the signal development portion, the first input of the amplifier component with the digit line to amplify a voltage of the digit line; decoupling, after the signal development portion of the read operation, the first input of the amplifier component from the digit line; configuring the amplifier component to operate in a latch mode based at least in part on activating or deactivating a first switching component in the amplifier component; and outputting, on the first output of the amplifier component, a state of the memory cell while the amplifier component operates in the latch mode, wherein the first pre-charging portion of the read operation occurs before the signal development portion of the read operation.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 91.0
- Lexical Diversity: 2.37681
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15067838', '15246249', '15957742', '15090789', '15844154']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7732515763325166
- 35 USC 102 Novelty (BERT): 0.4833743192983247
- Combined Prediction Score: 0.7442638506290975
- Mean Citation Score: 237.947584
- Max Citation Score: 243.13431
- Similarity Product: 205.8175215180945

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test