PATENT CLAIM ANALYSIS

Application Number: 16401511
Application Type: Utility
Filing Date: 2019-05
Publication Date: 2019-08
Patent Classification: ["438", "617000"]

Abstract:
A method of generating a wire loop profile in connection with a semiconductor package is provided. The method includes the steps of: (a) providing package data related to the semiconductor package; and (b) creating a loop profile of a wire loop of the semiconductor package, the loop profile including a tolerance band along at least a portion of a length of the wire loop.

Claim (Index 19):
The method of  claim 1  wherein the package data provided in step (a) includes at least one of (a1) CAD data related to the semiconductor package and (a2) package data derived using an online teaching reference system of the wire bonding machine.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 100.0
- Lexical Diversity: 1.825
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15623978', '13321017', '15290413', '12374402', '12375238']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8673595402224877
- 35 USC 102 Novelty (BERT): 0.5143991177176688
- Combined Prediction Score: 0.8320634979720058
- Mean Citation Score: 233.23956400000003
- Max Citation Score: 318.36856
- Similarity Product: 316.18458397141467

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test