PATENT CLAIM ANALYSIS

Application Number: 15980791
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["341", "143000"]

Abstract:
The disclosure provides a circuit that includes an integrator that generates an integrated signal in response to a current signal. A comparator is coupled to the integrator and receives the integrated signal and a primary reference voltage signal. The comparator generates a feedback signal. A switched capacitor network is coupled across the integrator. The feedback signal activates the switched capacitor network.

Claim (Index 10):
The circuit of  claim 1 , wherein in the integration phase:\n the integrator receives the current signal at the inverting terminal of the primary transconductor, and generates the integrated signal; the secondary transconductor compensates the offset associated with the primary transconductor; the comparator is activated by the enable signal for the defined time period; and the comparator compares the integrated signal and the primary reference voltage signal, wherein if the integrated signal is below the primary reference voltage signal during the defined time period, the feedback signal is generated by the comparator to activate the first input switch and the first output switch.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 93.0
- Lexical Diversity: 2.0
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14871245', '12978841', '12168588', '10624394', '11387564']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5583266701245383
- 35 USC 102 Novelty (BERT): 0.5009354440410911
- Combined Prediction Score: 0.5525875475161935
- Mean Citation Score: 181.627142
- Max Citation Score: 241.35117
- Similarity Product: 199.5877557266128

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test