PATENT CLAIM ANALYSIS

Application Number: 15886187
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-05
Patent Classification: ["324", "750010"]

Abstract:
In various embodiments, the disclosure relates to a hardware test generation environment for developing test tool analysis workflows. Configurable flow files direct the steps, procedures, and data acquisitions associated with device testing and can be flexibly deployed and updated in connection with a variety of electronic test tools. The hardware test generation environment may operate separately from the hardware test execution environment allowing device test protocols and methodologies to be independently developed, improved, and validated.

Claim (Index 1):
A tangible non-transitory machine readable medium comprising instructions, which when executed by one or more processors results in performing operations for implementing electronic test tool protocols for integrated circuit testing, comprising:\n obtaining data from testing at least one integrated circuit by at least one electronic test tool and storing the obtained data at a knowledge datastore; evaluating the obtained test data at a knowledge analyzer with a test tool protocol, the test tool protocol reflecting operations performed by the at least one electronic test tool used to test the at least one integrated circuit and further including expected results to validate the at least one integrated circuit; generating a flow file through a flow file generator, the flow file comprising test parameters and expected results associated with the validation of the at least one integrated circuit that are generalized and independent of electronic test tool specific configuration instructions, the flow file further configured for testing offline from the electronic test tool and without interruption of the operation of the electronic test tool by emulating operations performed by the electronic test tool and the expected results obtained by the electronic test tool used for validating the at least one integrated circuit according to the test tool protocol, wherein the flow file is iteratively evaluated and updated with additional test parameters applying test data from the knowledge analyzer to refine the test tool protocol; and receiving the at least one flow file at a flow file interpreter and translating the at least one flow file into electronic test tool specific configuration instructions that direct operation of the electronic test tool according to the test parameters of the test tool protocol and collect test data from testing of the integrated circuit, at least a portion of the test data captured and provided to the knowledge datastore.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 88.0
- Lexical Diversity: 1.48214
- Patent Class: 324.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13781337', '13776986', '13773580', '10084145', '15582137']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5293548706261655
- 35 USC 102 Novelty (BERT): 0.4670329256032871
- Combined Prediction Score: 0.5231226761238776
- Mean Citation Score: 112.0484758
- Max Citation Score: 115.53937
- Similarity Product: 76.14859629377902

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test