PATENT CLAIM ANALYSIS

Application Number: 16237712
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-12
Patent Classification: ["327", "001000"]

Abstract:
A digital glitch filter for filtering glitches in an input signal includes a first flip-flop for generating a filtered output signal, and a self-oscillating circuit for generating a self-oscillating clock signal. A first logic gate enables the self-oscillating circuit when the filtered output signal is not equal to the input signal. A ripple counter generates a divided clock signal by dividing the self-oscillating clock signal. A counter and comparator counts the divided clock signal to obtain a count number and compares the count number with a predetermined count target. A second flip-flop, which is connected to the counter and comparator, generates a valid signal, which is activate when the count number reaches the count target. The valid signal is input to the first flip-flop such that the filtered output signal toggles when the valid signal is active.

Claim (Index 6):
The digital glitch filter of  claim 1 , wherein the ripple counter is configured to divide the self-oscillating clock signal by 2 N .

Metadata:
- Claim Count in Document: 7.0
- Percentile: 99.0
- Lexical Diversity: 2.49153
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12653945', '13473715', '14602377', '10786514', '12466288']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7987212188830919
- 35 USC 102 Novelty (BERT): 0.4957470107566609
- Combined Prediction Score: 0.7684237980704488
- Mean Citation Score: 239.255762
- Max Citation Score: 246.33525
- Similarity Product: 175.98124025639888

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test