PATENT CLAIM ANALYSIS

Application Number: 16061900
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["257", "355000"]

Abstract:
The present technology relates to a semiconductor integrated circuit which operates with a low voltage and is capable of preventing destruction of a protection circuit and a control method thereof. The semiconductor integrated circuit includes a resistance element and a capacitance element connected between a power supply line and a ground line in series, an inverter of which an input is connected between the resistance element and the capacitance element, a MOS transistor of which a gate electrode is connected to an output of the inverter and a drain electrode and a source electrode are respectively connected to the power supply line and the ground line, and a current limit element inserted between a well region where the MOS transistor is formed and the gate electrode. The present technology is applied to, for example, the protection circuit for preventing destruction of an internal circuit by ESD and the like.

Claim (Index 12):
The semiconductor integrated circuit according to  claim 8 , wherein\n the capacitance element as the current limit element is configured by a MOS capacitor.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 94.0
- Lexical Diversity: 2.41538
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13480956', '13592449', '15328969', '10805040', '12501007']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9206083360532568
- 35 USC 102 Novelty (BERT): 0.5233652937867166
- Combined Prediction Score: 0.8808840318266027
- Mean Citation Score: 285.664862
- Max Citation Score: 306.27945
- Similarity Product: 220.19878098108168

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test