PATENT CLAIM ANALYSIS

Application Number: 15872106
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["712", "229000"]

Abstract:
A method for a plurality of pipelines, each having a processing element having first and second inputs and first and second lines, wherein at least one of the pipelines includes first and second logic operable to select a respective line so that data is received at the first and second inputs respectively. A first mode is selected and for the at least one pipeline, the first and second lines of that pipeline are selected such that the processing element of that pipeline receives data via the first and second lines of that pipeline, the first line being capable of supplying data that is different to the second line. A second mode is selected and for the at least one pipeline a line of another pipeline is selected, the second line of the at least one pipeline is selected and the same data at the second line is supplied as the first line.

Claim (Index 2):
The processor as claimed in  claim 1 , wherein, for each pipeline, the first and second data supply lines are configured to supply data from private memory for the processing element of that pipeline.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 3.13725
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10166592', '10404182', '15372881', '10601575', '09309732']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6004427573896606
- 35 USC 102 Novelty (BERT): 0.4795031084995653
- Combined Prediction Score: 0.588348792500651
- Mean Citation Score: 162.106966
- Max Citation Score: 167.59264
- Similarity Product: 114.8905927864456

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test