PATENT CLAIM ANALYSIS

Application Number: 15891205
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["257", "076000"]

Abstract:
A substrate for RF devices includes a polycrystalline ceramic core and an interlayer structure. The interlayer structure includes a first silicon oxide layer coupled to the polycrystalline ceramic core, a polysilicon layer coupled to the first silicon oxide layer, a second silicon oxide layer coupled to the polysilicon layer, a barrier layer coupled to the second silicon oxide layer, a third silicon oxide layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the third silicon oxide layer.

Claim (Index 20):
The method of  claim 17  wherein the polycrystalline ceramic core comprises an indentation on a surface of the polycrystalline ceramic core opposite to the first silicon oxide layer, the method further comprising:\n forming a second via through the polycrystalline ceramic core in a location corresponding to the indentation; and \n forming a backside metal layer coupled to the surface of the polycrystalline ceramic core and filling the second via, wherein the second via connects the source of the FET to the backside metal layer, and wherein the backside metal layer is connected to ground.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 88.0
- Lexical Diversity: 2.90323
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15621335', '15864977', '15847716', '15788597', '15684724']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.923745429614764
- 35 USC 102 Novelty (BERT): 0.5087127368364245
- Combined Prediction Score: 0.8822421603369301
- Mean Citation Score: 274.779444
- Max Citation Score: 289.93314
- Similarity Product: 212.34395568124648

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test