PATENT CLAIM ANALYSIS

Application Number: 15976055
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["327", "109000"]

Abstract:
A driver interface for a switch-based circuit includes an AC coupling capacitor, a first diode or a first series of diodes, and a second diode or a second series of diodes connected in series with the first diode or first series of diodes but with an opposing polarity. The AC coupling capacitor removes a DC voltage from an input bi-level drive signal that does not have the appropriate high and low drive levels needed to switch a FET in the switch-based circuit between fully ON and fully OFF states. The first diode or first series of diodes and the second diode or second series of diodes clamp the resulting AC-coupled drive signal to produce an output bi-level drive signal having the high and low drive levels needed to switch the FET between fully ON and fully OFF states. The driver interface maintains the high and low drive levels of the output bi-level drive signal irrespective of any changes made to the duty cycle or pulse density of the input bi-level drive signal.

Claim (Index 6):
A driver interface for a switch-based circuit, comprising:\n a first series of diodes including one or more diodes configured to clamp a high drive voltage level of a duty cycle varying or pulse width varying bi-level gate-source voltage waveform applied across the gate-source terminals of a field-effect transistor (FET) in the switch-based circuit to a voltage greater than a threshold voltage of the FET; and a second series of diodes including one or more diodes connected in parallel with the first diode or the first series of diodes but with an opposing polarity, said second series of diodes configured to clamp a low drive voltage level of the duty cycle varying or pulse width varying bi-level gate-source voltage waveform to a voltage less than the FET's threshold voltage, wherein the first series of diodes conducts every cycle and maintains the high drive voltage level within a required acceptable input high-level range of the switch-based circuit over all cycles, irrespective of changes of the duty cycle or pulse widths of the duty cycle varying or pulse width varying bi-level gate-source voltage waveform, and the second series of diodes conducts every cycle and maintains the low drive voltage level within a required acceptable input low-level range of the switch-based circuit over all cycles, irrespective of changes of the duty cycle or pulse widths of the duty cycle varying or pulse width varying bi-level gate-source voltage waveform.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 93.0
- Lexical Diversity: 2.54286
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15176487', '15644257', '15190095', '15605219', '13422132']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.772937356673277
- 35 USC 102 Novelty (BERT): 0.5809693237937847
- Combined Prediction Score: 0.7537405533853279
- Mean Citation Score: 287.91707599999995
- Max Citation Score: 502.6918
- Similarity Product: 438.0786228543879

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test