PATENT CLAIM ANALYSIS

Application Number: 15911078
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "530000"]

Abstract:
The present invention discloses a three-dimensional vertical multiple-time-programmable memory (3D-MTP V ) with a thin memory layer. It comprises a plurality of vertically stacked horizontal address lines, at least a memory hole through the horizontal address lines, a memory layer and a vertical address line disposed in the memory hole. Because the thickness of the memory layer is less than 100 nm, the MTP cell is leaky. Sense amplifiers and a full-read mode are used to ensure a properly working 3D-MTP V .

Claim (Index 14):
The 3D-MTP V  according to  claim 1 , wherein said horizontal address lines have a first interface with said memory layer, said vertical address lines have a second interface with said memory layer, and said first and second interfaces are different.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 90.0
- Lexical Diversity: 1.60714
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15488489', '11031637', '11309656', '15488435', '14636359']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9052395729135498
- 35 USC 102 Novelty (BERT): 0.5115815821418149
- Combined Prediction Score: 0.8658737738363763
- Mean Citation Score: 190.845748
- Max Citation Score: 252.47353
- Similarity Product: 175.772752095508

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test