PATENT CLAIM ANALYSIS

Application Number: 16012501
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-03
Patent Classification: ["710", "106000"]

Abstract:
A data transmission circuit includes a data bus inversion encoding circuit configured to compare previous output data and current output data, invert or non-invert the current output data to control the number of data transitions; and transmitters configured to drive signal transmission lines based on outputs of the data bus inversion encoding circuit.

Claim (Index 20):
The semiconductor system according to  claim 19 , wherein the data bus inversion decoding circuit generates the received data by inverting the outputs of the receivers when the current inversion control signal is enabled, and generates the received data by non-inverting the outputs of the receivers when the current inversion control signal is disabled.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 94.0
- Lexical Diversity: 1.64706
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15918536', '11369341', '11357291', '12577276', '11863604']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7058965169974487
- 35 USC 102 Novelty (BERT): 0.4800380928180064
- Combined Prediction Score: 0.6833106745795046
- Mean Citation Score: 212.109306
- Max Citation Score: 213.90067
- Similarity Product: 164.70435328541635

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test