PATENT CLAIM ANALYSIS

Application Number: 16009691
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["705", "014730"]

Abstract:
A first processor-accessible memory device system and a second processor-accessible memory device system of a self-regulating transaction system may each store a respective local copy of one or more transaction ledgers that record transactions. A first data processing device system may be configured to generate a transaction information block associated with a particular market channel, store it in the local copy of a transaction ledger associated with the particular market channel stored in the first processor-accessible memory device system, and transmit it to a second data processing device system over a communications network for storage in the local copy of the transaction ledger associated with the particular market channel stored in the second processor-accessible memory device system.

Claim (Index 41):
A transaction processing system comprising:\n a plurality of data processing device systems communicatively connected to a communications network, each of the plurality of data processing device systems communicatively connected to a respective processor-accessible memory device system included in the transaction processing system and a respective input-output device system included in the transaction processing system, wherein a first data processing device system of the plurality of data processing device systems is communicatively connected to a first processor-accessible memory device system and a first input-output device system, the first input-output device system communicatively connected to the communications network, wherein a second data processing device system of the plurality of data processing device systems is communicatively connected to a second processor-accessible memory device system and a second input-output device system, the second input-output device system communicatively connected to the communications network, wherein the first processor-accessible memory device system associated with the first data processing device system and the second processor-accessible memory device system associated with the second data processing device system each stores a respective program and a respective local copy of at least a respective portion of each of one or more transaction ledgers that record transactions, each transaction ledger associated with a market channel, wherein the respective program stored by the first processor-accessible memory device system comprises:\n generation instructions configured to cause generation of a transaction information block associated with a particular market channel, \n first storage instructions configured to cause storage of the generated transaction information block in the first processor-accessible memory device system as an update to the respective local copy of the at least the respective portion of the transaction ledger associated with the particular market channel, and \n transmission instructions configured to cause transmission of the generated transaction information block to the second data processing device system over the communications network via the first input-output device system, and \n wherein the respective program stored by the second processor-accessible memory device system comprises:\n reception instructions configured to cause reception of the generated transaction information block over the communications network via the second input-output device system, and \n second storage instructions configured to cause storage of the received transaction information block in the second processor-accessible memory device system as an update to the respective local copy of the at least the respective portion of the transaction ledger associated with the particular market channel.

Metadata:
- Claim Count in Document: 51.0
- Percentile: 94.0
- Lexical Diversity: 2.37255
- Patent Class: 705.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15050294', '15411776', '15499224', '15050285', '15991876']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.0918169563981754
- 35 USC 102 Novelty (BERT): 0.4961932805557549
- Combined Prediction Score: 0.1322545888139333
- Mean Citation Score: 184.250496
- Max Citation Score: 192.5625
- Similarity Product: 126.19230494275688

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test