PATENT CLAIM ANALYSIS

Application Number: 15907711
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["365", "148000"]

Abstract:
A semiconductor integrated circuit according to an embodiment includes: first to third wirings; first current limiters corresponding to the first wirings; second current limiters corresponding to the second wirings; third current limiters corresponding to the third wirings; first drivers corresponding to the first current limiters; second drivers corresponding to the second current limiters; third drivers corresponding to the third current limiters; and a first array and a second array, wherein the first array comprising: fourth wirings corresponding to the first wirings; fifth wirings corresponding to the second wirings; first transistors corresponding to the first wirings; second transistors corresponding to the second wirings; and first resistive change elements arranged in intersecting areas of the fourth wirings and the fifth wirings, respectively, the first resistive change elements including a first terminal connected to corresponding one of the fourth wirings and a second terminal connected to corresponding one of the fifth wirings.

Claim (Index 9):
The semiconductor integrated circuit according to  claim 6 , wherein, when a set operation and a reset operation are performed to one of and the other of two of the first resistive change elements, respectively, in the first array, and when a set operation and a reset operation are performed to one of and the other of two of the second resistive change elements, respectively, in the second array,\n the controller selects one of the first wirings connected to the first terminal of each of the two of the first resistive change elements and to the third terminal of each of the two of the second resistive change elements, selects one of the second wirings connected to the second terminal of the one of the first resistive change elements, and selects one of the third wirings connected to the fourth terminal of the one of the second resistive change elements, the controller applies a first voltage to the selected one of the first wirings via one of the first drivers and one of the first current limiters each corresponding to the selected one of the first wirings and feeds a current equal to or smaller than the fourth limited current value to the one selected from the first wirings, the controller applies a second voltage to the one selected from the second wirings via one of the second drivers and one of the second current limiters each corresponding to the one selected from the second wirings and feeds a current equal to or smaller than the first limited current value to the one selected from the second wirings, applies the second voltage to the one selected from the third wirings via one of the third drivers and one of the third current limiters each corresponding to the one selected from the third wirings and feeds a current equal to or smaller than the first limited current value to the one selected from the third wirings, feeds a current equal to or smaller than the third limited current value to a non-selected first wiring via one of the first drivers and one of the first current limiters each corresponding to the non-selected first wiring, feeds a current equal to or smaller than the third limited current value to a non-selected second wiring via one of the second drivers and one of the second current limiters each corresponding to the non-selected second wiring, and feeds a current equal to or smaller than the third limited current value to a non-selected third wiring via one of the third drivers and one of the third current limiters each corresponding to the non-selected third wiring, an absolute value of a difference between the first and second voltages being a set voltage, and further, the controller selects one another second wiring connected to the second terminal of the other of the first resistive change elements and selects one another third wiring connected to the fourth terminal of the other of the second resistive change elements, applies a first voltage to the one selected from the first wirings via one of the first drivers and one of the first current limiters each corresponding to the one selected from the first wirings and feeds a current equal to or smaller than the fourth limited current value to the one selected from the first wirings, the controller applies a third voltage to the one selected from the second wirings via one of the second drivers and one of the second current limiters each corresponding to the one selected from the second wirings and feeds a current equal to or smaller than the second limited current value to the one selected from the second wirings, the controller applies the third voltage to the one selected from the third wirings via one of the third drivers and one of the third current limiters each corresponding to the one selected from the third wirings and feeds a current equal to or smaller than the second limited current value to the one selected from the third wirings, feeds a current equal to or smaller than the third limited current value to a non-selected first wiring via one of the first drivers and one of the first current limiters each corresponding to the non-selected first wiring, feeds a current equal to or smaller than the third limited current value to a non-selected second wiring via one of the second drivers and one of the second current limiters each corresponding to the non-selected second wiring, and feeds a current equal to or smaller than the third limited current value to a non-selected third wiring via one of the third drivers and one of the third current limiters each corresponding to the non-selected third wiring, an absolute value of a difference between the first and third voltages being a reset voltage.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 88.0
- Lexical Diversity: 3.86047
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15700319', '14884215', '14854361', '12282163', '14988034']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8013423514834004
- 35 USC 102 Novelty (BERT): 0.4799485726536491
- Combined Prediction Score: 0.7692029736004252
- Mean Citation Score: 173.96563600000005
- Max Citation Score: 201.73521
- Similarity Product: 145.9202919615948

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test