PATENT CLAIM ANALYSIS

Application Number: 16049424
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-09
Patent Classification: ["365", "230030"]

Abstract:
A semiconductor device includes a bank group selection signal generation circuit and a bank group address generation circuit. The bank group selection signal generation circuit stores a bank address based on a command pulse generated to perform a read operation or a write operation. The bank group selection signal generation circuit outputs the stored bank address as a bank group selection signal. The bank group address generation circuit generates a bank group address and an internal bank group address for performing a column operation of a cell array included in a bank group selected based on the bank group selection signal.

Claim (Index 13):
The semiconductor device of  claim 11 , wherein the output control pulse generation circuit includes:\n a selector configured to output the flag or the internal flag as a selection flag based on the mode signal; an output counter configured to generate a count pulse in response to the selection flag; and an internal output control pulse generation circuit configured to generate the internal output control pulse from the count pulse in response to the mode signal and the burst length signal.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 95.0
- Lexical Diversity: 2.44186
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15467360', '15193457', '15687681', '15057843', '14515821']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8241277879125868
- 35 USC 102 Novelty (BERT): 0.4957156604452089
- Combined Prediction Score: 0.7912865751658491
- Mean Citation Score: 251.869386
- Max Citation Score: 270.0303
- Similarity Product: 205.0282591023981

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test