PATENT CLAIM ANALYSIS

Application Number: 15984149
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["326", "039000"]

Abstract:
A threshold comparator block integrated in a programmable logic device (PLD) is disclosed. The threshold comparator block includes: one or more signal comparators configured to receive two analog input signals and provide a digital output signal indicating a comparison result of the two analog input signals; an analog output driver configured to interface with an analog fabric of a programmable fabric of the PLD; a digital input/output (I/O) driver configured to interface with a digital fabric of the programmable fabric of the PLD; and I/O pins configured to provide an interface with a signal wrapper to interface analog and digital signals between the analog output driver and the digital I/O driver and the programmable fabric. The threshold comparator block is configured to interface with one or more adaptive blocks integrated in the PLD via the programable fabric and the signal wrapper.

Claim (Index 10):
The threshold comparator block of  claim 8 , wherein the GPIO interface is implemented as a universal serial bus (USB) driver.

Metadata:
- Claim Count in Document: 56.0
- Percentile: 93.0
- Lexical Diversity: 2.76364
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15656965', '15656954', '15656982', '15921201', '15951029']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7404363811784919
- 35 USC 102 Novelty (BERT): 0.5717373370960607
- Combined Prediction Score: 0.7235664767702488
- Mean Citation Score: 376.1383540000001
- Max Citation Score: 491.5766
- Similarity Product: 406.0219250385523

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test