PATENT CLAIM ANALYSIS

Application Number: 15742041
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-04
Patent Classification: ["345", "208000"]

Abstract:
The invention provides a GOA circuit, comprising a plurality of cascaded GOA units. Each GOA unit comprises: a pull up control module, an output module, a pull down module and a pull down maintenance module; for N-th GOA unit: the 41 st  TFT of pull down module having a gate receiving a scan signal from (N+4)-th GOA unit, a source connected to a circuit start signal, and a drain connected to the first node, and the circuit start signal having a low voltage level lower than or equal to 0V and higher than the low voltage signal; so that when the scan signal from (N+4)-th GOA unit changing from high voltage to low voltage, the gate-source voltage difference of the 41 st  TFT being negative to effectively reduce the current leakage and prevent the current leakage from affecting the first node voltage, improve circuit stability, facilitate cost reduction and narrow border.

Claim (Index 11):
A gate driver on array (GOA) circuit, which comprises: a plurality of cascaded GOA units, with each GOA unit comprising: a pull up control module, an output module, a pull down module and a pull down maintenance module;\n for an positive integer N, except the first to the fourth GOA units and the last fourth to the last GOA units, in the N-th GOA unit: the pull up control module receiving a cascade-propagate signal from (N\u22124)-th GOA unit and a high voltage signal, connected to a first node, for pulling up voltage at the first node to the high voltage signal based on the cascade-propagate signal from (N\u22124)-th GOA unit; the output module receiving clock signal and connected to the first node, for outputting a scan signal and a cascade-propagate signal under control by the voltage of the first node; the pull down module comprising a 41 st  TFT, the 41 st  TFT having a gate connected to receive a scan signal from (N+4)-th GOA unit, a source connected to a circuit start signal, and a drain connected to the first node; the pull down maintenance module receiving the scan signal and a low voltage signal, connected to the first node, for maintaining the scan signal and the voltage of the first node at the low voltage signal after the pull down module pulling down the voltage of the first node; the circuit start signal being a pulse signal, and the circuit start signal having a low voltage level lower than or equal to 0V and higher than the low voltage signal; wherein the clock signal comprising: a first clock signal, a second clock signal, a third clock signal, a fourth clock signal, a fifth clock signal, a sixth clock signal, a seventh clock signal, and an eight clock signal, outputted serially; for a non-negative integer X, the (1+8X)-th GOA unit, the (2+8X)-th GOA unit, the (3+8X)-th GOA unit, the (4+8X)-th GOA unit, the (5+8X)-th GOA unit, the (6+8X)-th GOA unit, the (7+8X)-th GOA unit, and the (8+8X)-th GOA unit respectively receiving the first clock signal, the second clock signal, the third clock signal, the fourth clock signal, the fifth clock signal, the sixth clock signal, the seventh clock signal, and the eight clock signal; two adjacent clock signals having rising edges with a gap of \u215b of cycle of the clock signal, the clock signal having a duty cycle ratio of 0.4; the circuit start signal having a high voltage duration equal to \u00be of the cycle of the clocks signal; the circuit start signal having a rising edge earlier than the rising edge of the first clock signal, with a gap of \u00bc of the cycle of the clocks signal; wherein except the first to the fourth GOA units, in the N-th GOA unit: the pull up control module comprising: a 11 th  TFT; the 11 th  TFT having a gate connected to the cascade-propagate signal from the (N\u22124)-th GOA unit, a source connected to the high voltage signal, and a drain connected to the first node; wherein the output module comprising: a 21 st  TFT, a 22 nd  TFT, and a capacitor; the 21 st  TFT having a gate connected to the first node, a source connected to the clock signal, and a drain outputting the scan signal; the 22 nd  TFT having a gate connected to the first node, a source connected to the clock signal, and a drain outputting the cascade-propagate signal; the capacitor having one end connected to the first node and the other end connected to the drain of the 21 st  TFT; wherein the pull down maintenance module comprising: a 32 nd  TFT, a 42 nd  TFT, a 51 st  TFT, and a 52 nd  TFT; the 32 nd  TFT having a gate connected to a second node, a source connected to the low voltage signal, and a drain connected to the drain of the 21 st  TFT; the 42 nd  TFT having a gate connected to the second node, a source connected to the low voltage signal, and a drain connected to the first node; the 51 st  TFT having a gate and a source connected to a control signal, and a drain connected to the second node; 52 nd  TFT having a gate connected to the first node, a source connected to the low voltage signal, and a drain connected to the second node; wherein the control signal maintaining at high voltage during the GOA unit operating.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 2.12346
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15742886', '15742037', '15742036', '15128420', '15579947']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6978359158170879
- 35 USC 102 Novelty (BERT): 0.622555281663292
- Combined Prediction Score: 0.6903078524017083
- Mean Citation Score: 477.924164
- Max Citation Score: 553.6039
- Similarity Product: 542.1940715432405

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test