PATENT CLAIM ANALYSIS

Application Number: 15966391
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "324000"]

Abstract:
A NOR-type three-dimensional memory device includes a vertically alternating stack of insulating layers and electrically conductive layers located over a substrate, and laterally alternating sequences of respective active region pillars and respective memory stack structures. Each laterally alternating sequence is electrically isolated from the electrically conductive layers by a respective blocking dielectric layer at each level of the electrically conductive layers. Each memory stack structures include a memory film and a semiconductor channel material portion that vertically extend through the vertically alternating stack. The active region pillars include an alternating sequence of source pillar and drain pillars.

Claim (Index 13):
A method of forming a three-dimensional memory device, comprising:\n forming a vertically alternating sequence of continuous insulating layers and continuous sacrificial material layers; forming a plurality of line trenches laterally extending along a first horizontal direction through the vertically alternating sequence; forming a line trench fill structure within each of the line trenches by sequentially forming a charge storage layer, a semiconductor channel layer, and a dielectric core within each of the line trenches; dividing each line trench fill structure into a respective row of memory stack structures by forming active region openings therethrough; forming active region pillars in the active region opening by depositing a doped semiconductor material therein, wherein a plurality of laterally alternating sequences of active region pillars and memory stack structures are formed, each memory stack structure comprising a remaining portion of the line trench fill structures; forming backside recesses by removing the sacrificial material layers selective to insulating layers, the memory stack structures, and the active region pillars; and depositing electrically conductive layers in remaining volumes of the backside recesses.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 91.0
- Lexical Diversity: 1.85455
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15943859', '14739284', '14739354', '15956139', '15695225']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9364588175226022
- 35 USC 102 Novelty (BERT): 0.5378210348994149
- Combined Prediction Score: 0.8965950392602835
- Mean Citation Score: 375.991692
- Max Citation Score: 391.69577
- Similarity Product: 304.75803214290863

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test