PATENT CLAIM ANALYSIS

Application Number: 15906724
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["257", "534000"]

Abstract:
The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a MIM dual capacitor structure with an increased capacitance per unit area in a semiconductor structure. Without using additional mask layers, a second parallel plate capacitor can be formed over a first parallel plate capacitor, and both capacitors share a common capacitor plate. The two parallel plate capacitors can be connected in parallel to increase the capacitance per unit area.

Claim (Index 20):
The method of  claim 17 , wherein depositing the first and second dielectric layers comprises etching the first and second dielectric layers, wherein the etching forms sidewalls of the first and second dielectric layers that are not perpendicular to a horizontal surface of the substrate.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 88.0
- Lexical Diversity: 1.70833
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14322501', '14591981', '10929633', '14606265', '10788057']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9152869889953652
- 35 USC 102 Novelty (BERT): 0.4788553381466094
- Combined Prediction Score: 0.8716438239104898
- Mean Citation Score: 150.939822
- Max Citation Score: 156.59403999999995
- Similarity Product: 109.4633222840118

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test