PATENT CLAIM ANALYSIS

Application Number: 15871966
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-05
Patent Classification: ["323", "270000"]

Abstract:
The present invention provide a low dropout linear regulator with high power supply rejection ratio, including: a voltage dividing unit for generating a voltage dividing signal; a comparison unit including two input ends and an output end, one of the two input ends coupled with the voltage dividing unit for receiving the voltage dividing signal, the other input end for receiving a reference voltage signal, and the output end for outputting an amplified voltage signal according to the voltage dividing signal and the reference voltage signal; a voltage amplifying unit coupled with an output end of the comparison unit for providing a switch signal; and the switch unit coupled with the output end of the comparison unit, the voltage dividing unit and the voltage amplifying unit for responding to the switch signal and receiving and outputting a voltage reduction signal according to the amplified voltage signal.

Claim (Index 1):
A low dropout linear regulator with high power supply rejection ratio, comprising a voltage dividing unit, a comparison unit, a voltage amplifying unit, and a switch unit;\n the voltage dividing unit, configured to generate a voltage dividing signal; the comparison unit, comprising two input ends and an output end, one of the two input ends being coupled with the voltage dividing unit for receiving the voltage dividing signal, the other input end configured to receive a reference voltage signal, and the output end configured to output an amplified voltage signal according to the voltage dividing signal and the reference voltage signal; the voltage amplifying unit, coupled with the output end of the comparison unit for providing a switch signal; and the switch unit, coupled with the output end of the comparison unit, the voltage dividing unit, and the voltage amplifying unit for responding to the switch signal and receiving and outputting a voltage reduction signal according to the amplified voltage signal, wherein the switch unit comprises a first n-metal-oxide-semiconductor (NMOS) transistor, a gate of the first NMOS transistor is coupled with the output end of the comparison unit, a drain is coupled with a first voltage signal, and a source is coupled with the voltage dividing unit.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 3.12
- Patent Class: 323.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14566113', '13196633', '11962404', '12236064', '15672322']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.736638124237495
- 35 USC 102 Novelty (BERT): 0.508351007029539
- Combined Prediction Score: 0.7138094125166994
- Mean Citation Score: 248.94762000000003
- Max Citation Score: 318.1393700000001
- Similarity Product: 262.52673759402046

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test