PATENT CLAIM ANALYSIS

Application Number: 15950021
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "324000"]

Abstract:
A memory device includes a stack of conductive strips in a plurality of first levels with a first opening and a conductive strip in the second level with a second opening, both openings exposing sidewalls. Data storage structures are formed on the sidewalls of the conductive strips in the plurality of first levels. A first vertical channel structure including vertical channel films is disposed in the first opening, the vertical channel films in contact with the data storage structures. The second opening is aligned with the first vertical channel structure. A gate dielectric layer is disposed on the sidewall of the conductive strip in the second level. A second vertical channel structure including vertical channel films is disposed in the second opening in contact with the gate dielectric layer on the sidewall of the conductive strip in the second level.

Claim (Index 4):
The memory device of  claim 1 , further including a second pad disposed inside the second opening, the second pad contacting the vertical channel film in the second vertical channel structure.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 3.14894
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15938695', '14852997', '14637204', '15344899', '14637187']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9340780040599608
- 35 USC 102 Novelty (BERT): 0.5181951605412544
- Combined Prediction Score: 0.8924897197080901
- Mean Citation Score: 294.167694
- Max Citation Score: 312.3717
- Similarity Product: 231.9437162880064

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test