PATENT CLAIM ANALYSIS

Application Number: 15951966
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "401000"]

Abstract:
A semiconductor device including a substrate and a shallow trench isolation (STI) structure is provided. The substrate has a first voltage area and a second voltage area. A top surface of the substrate in the second voltage area is higher than a top surface of the substrate in the first voltage area, and a trench is defined in the substrate in between the first and second voltage area. The STI structure is located in the substrate within the trench, wherein a first portion of the STI structure is located in the first voltage area, a second portion of the STI structure is located in the second voltage area, and a step height difference exist in between a bottom surface of the first portion of the STI structure in the first voltage area and a bottom surface of the second portion of the STI structure in the second voltage area.

Claim (Index 14):
The semiconductor device according to  claim 12 , wherein a bottom surface of the first gate oxide layer is located below the coplanar surface.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 91.0
- Lexical Diversity: 3.78571
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15287535', '14272771', '12198345', '14830182', '12343831']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9231154883186028
- 35 USC 102 Novelty (BERT): 0.5144625890269211
- Combined Prediction Score: 0.8822501983894346
- Mean Citation Score: 223.40932200000003
- Max Citation Score: 304.1996200000001
- Similarity Product: 232.83251928999192

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test