PATENT CLAIM ANALYSIS

Application Number: 16058687
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2020-02
Patent Classification: ["null", "null"]

Abstract:
Drivers for read and write operations of memory arrays are described. In one aspect, a memory device can include an input/output (I/O) circuit to facilitate read and write operations with the memory device. One driver can generate clock signals for the command circuit to aid with the performance of the write operations. Another driver can generate clock signals for the I/O circuit to aid with the performance of the read operations.

Claim (Index 14):
The system of  claim 13 , wherein the third clock signal and the fourth clock signal provided by the second driver also have the phase difference.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 96.0
- Lexical Diversity: 2.0
- Patent Class: nan
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['10328154', '15624491', '12795602', '11218170', '13923656']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4625567253386199
- 35 USC 102 Novelty (BERT): 0.46460363827662
- Combined Prediction Score: 0.4627614166324199
- Mean Citation Score: 114.61606880000002
- Max Citation Score: 116.07027
- Similarity Product: 82.09102350818573

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test