PATENT CLAIM ANALYSIS

Application Number: 16031672
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-06
Patent Classification: ["711", "216000"]

Abstract:
A memory system includes a memory device configured to store data, and a memory controller configured to perform communication between a host and the memory device and to control the memory device such that, during an operation of programming sequential data, a hash value is generated from logical block addresses of a memory area, to which the sequential data is to be written, and the hash value is stored and such that, during an operation of reading the sequential data, the sequential data is read from the memory area based on the hash value.

Claim (Index 5):
The memory system according to  claim 1 , wherein:\n addresses of memory blocks included in the memory device are divided into entries, and the entries are designated to be divided depending on respective capacities of the memory blocks.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 95.0
- Lexical Diversity: 2.26667
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15684252', '14718908', '15083524', '13590107', '16028605']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5408495531712085
- 35 USC 102 Novelty (BERT): 0.4868132305381886
- Combined Prediction Score: 0.5354459209079065
- Mean Citation Score: 190.24781
- Max Citation Score: 204.65123
- Similarity Product: 146.4211723003781

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test