PATENT CLAIM ANALYSIS

Application Number: 15940490
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["711", "206000"]

Abstract:
Embodiment of this disclosure provide techniques to support full memory paging between different trust domains (TDs) in compute system without losing any of the security properties, such as tamper resistant/detection and confidentiality, on a per TD basis. In one embodiment, a processing device including a memory controller and a memory paging circuit operatively coupled to the memory controller is provided. The memory paging circuit is to evict a memory page associated with a trust domain (TD) executed by the processing device. A binding of the memory page to a first memory location of the TD is removed. A transportable page that includes encrypted contents of the memory page is created. Thereupon, the memory page is provided to a second memory location.

Claim (Index 13):
The method of  claim 11 , wherein responsive to detecting that the decrypted contents are verified:\n inserting the transportable page into a third memory location associated with the TD; and binding the transportable page to the TD by re-encrypting the contents of transportable page based on the key associated with the TD and a physical address of the third memory location, wherein the physical address of third location is different from the physical address of the first location of the evicted memory page of the TD.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 90.0
- Lexical Diversity: 1.84932
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15712968', '15682056', '14048515', '14613307', '15282300']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5163494457158632
- 35 USC 102 Novelty (BERT): 0.4791077730450186
- Combined Prediction Score: 0.5126252784487787
- Mean Citation Score: 145.030846
- Max Citation Score: 170.27791000000005
- Similarity Product: 120.42822958740896

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test