PATENT CLAIM ANALYSIS

Application Number: 15871440
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-08
Patent Classification: ["343", "832000"]

Abstract:
An integrated circuit package is described comprising an integrated circuit die and an antenna structure coupled to the integrated circuit die and comprising a stacked arrangement of metal and dielectric layers, wherein a first metal layer includes a planar antenna and at least one further metal layer comprises an artificial dielectric layer. The integrated circuit package may improve the directionality of the antenna and reduces the sensitivity of the antenna to the printed circuit board on which the integrated circuit package is mounted.

Claim (Index 1):
An integrated circuit package comprising:\n an integrated circuit die, an antenna structure coupled to the integrated circuit die and comprising a stacked arrangement of metal and dielectric layers, wherein a first metal layer includes a planar antenna and at least one further metal layer comprises an artificial dielectric layer.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 1.86957
- Patent Class: 343.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15866904', '15848060', '15846966', '15861338', '15526013']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8188522232355283
- 35 USC 102 Novelty (BERT): 0.4846351322110698
- Combined Prediction Score: 0.7854305141330825
- Mean Citation Score: 210.901438
- Max Citation Score: 216.58139
- Similarity Product: 161.88417177111984

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test