PATENT CLAIM ANALYSIS

Application Number: 16114669
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-03
Patent Classification: ["257", "776000"]

Abstract:
A semiconductor device includes a substrate, a die and multiple conductive traces. The die is mounted on the substrate. The conductive traces are routed on the substrate and connected to the die. The conductive traces at least include a plurality of first conductive traces and a plurality of second conductive traces. The second conductive traces are coupled to a predetermined voltage for providing a shielding pattern. The first conductive traces and the second conductive traces are disposed on the substrate in a substantially interlaced pattern.

Claim (Index 16):
The semiconductor device as claimed in  claim 12 , further comprising:\n providing a plurality of third conductive traces; interlacing arrangements of the third conductive traces and the second conductive traces, wherein the third conductive traces are placed between two second conductive traces; and coupling the third conductive traces to corresponding pads of the die.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 96.0
- Lexical Diversity: 2.3
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14997048', '15408683', '14992011', '12129527', '14503086']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.917281588956074
- 35 USC 102 Novelty (BERT): 0.4904223923306803
- Combined Prediction Score: 0.8745956692935347
- Mean Citation Score: 181.8767
- Max Citation Score: 205.69157
- Similarity Product: 144.96948342953206

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test