PATENT CLAIM ANALYSIS

Application Number: 16035388
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["348", "308000"]

Abstract:
A comparator includes a first stage coupled to compare a reference voltage to an image charge voltage signal. The first stage includes first and second NMOS input transistors coupled between an enabling transistor and respective first and second cascode devices to receive the reference voltage and the image charge voltage signal. A first auto-zero switch is between a gate of the first NMOS input transistor and a first node. The first node is between the first NMOS input transistor and the first cascode device. A second auto-zero switch is between a gate of the second NMOS input transistor and a second node. The second node is between the second cascode device and a second PMOS transistor. A voltage difference between the first and second nodes during an auto-zero period reduces an amount of kickback that occurs during an ADC period.

Claim (Index 7):
The comparator of  claim 1 , wherein the first and second cascode devices are coupled to be enabled in response to the comparator having high analog gain.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 95.0
- Lexical Diversity: 3.0625
- Patent Class: 348.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15277648', '16035363', '15486815', '15486896', '15277642']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6359633158348263
- 35 USC 102 Novelty (BERT): 0.5413758548178994
- Combined Prediction Score: 0.6265045697331336
- Mean Citation Score: 295.17652400000014
- Max Citation Score: 373.1176
- Similarity Product: 290.49627811164856

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test