PATENT CLAIM ANALYSIS

Application Number: 15992817
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-12
Patent Classification: ["257", "408000"]

Abstract:
In some embodiments, a semiconductor device is provided. The semiconductor device includes a pair of source/drain regions disposed in a semiconductor substrate, where the source/drain regions are laterally spaced. A gate electrode is disposed over the semiconductor substrate between the source/drain regions. Sidewall spacers are disposed over the semiconductor substrate on opposite sides of the gate electrode. A silicide blocking structure is disposed over the sidewalls spacers, where respective sides of the source/drain regions facing the gate electrode are spaced apart from outer sides of the sidewall spacers and are substantially aligned with outer sidewalls of the silicide blocking structure.

Claim (Index 21):
An integrated circuit (IC), comprising:\n a first semiconductor device comprising:\n a pair of first source/drain regions disposed in a semiconductor substrate, wherein the first source/drain regions are laterally spaced; and \n a first gate electrode disposed over the semiconductor substrate and between the first source/drain regions; \n a second semiconductor device comprising:\n a pair of second source/drain regions disposed in the semiconductor substrate and spaced from the pair of first source/drain regions, wherein the second source/drain regions are laterally spaced; and \n a second gate electrode disposed over the semiconductor substrate and between the second source/drain regions; \n a first sidewall spacer disposed over the semiconductor substrate and along a first sidewall of the second gate electrode; a silicide blocking structure disposed over the semiconductor substrate, wherein the silicide blocking structure extends from the semiconductor substrate vertically along an outer sidewall of the first sidewall spacer, and wherein the outer sidewall of the first sidewall spacer faces the first gate electrode; first silicide structures disposed over the first source/drain regions, respectively, wherein the first silicide structures are laterally spaced a first distance from the first gate electrode; and second silicide structures disposed over the second source/drain regions, respectively, wherein the second silicide structures are laterally spaced from the second gate electrode by a second distance that is greater than the first distance.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 93.0
- Lexical Diversity: 2.25
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14296496', '12185747', '14276631', '12125864', '10609185']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9008094657795692
- 35 USC 102 Novelty (BERT): 0.4785451870659709
- Combined Prediction Score: 0.8585830379082093
- Mean Citation Score: 209.00402
- Max Citation Score: 218.13185
- Similarity Product: 190.3526608386934

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test