PATENT CLAIM ANALYSIS

Application Number: 16042070
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["257", "491000"]

Abstract:
A transient voltage suppression device with improved electrostatic discharge (ESD) robustness includes a semiconductor substrate having a first conductivity type, a first doped well having a second conductivity type, a first heavily-doped area having the first conductivity type, a second doped well having the second conductivity type, a second heavily-doped area having the first conductivity type, and a first current blocking structure. The first doped well is arranged in the semiconductor substrate. The first heavily-doped area is arranged in the first doped well. The second doped well is arranged in the semiconductor substrate. The second heavily-doped area is arranged in the second doped well. The first current blocking structure is arranged in the semiconductor substrate, spaced from the bottom of the semiconductor substrate, and arranged between the first doped well and the second doped well.

Claim (Index 12):
A transient voltage suppression device with improved electrostatic discharge (ESD) robustness comprising:\n a semiconductor substrate having a first conductivity type; an epitaxial layer arranged on the semiconductor substrate; a first doped well having a second conductivity type and arranged in the epitaxial layer; a first heavily-doped area having the first conductivity type and arranged in the first doped well; a second doped well having the second conductivity type and arranged in the epitaxial layer; a second heavily-doped area having the first conductivity type and arranged in the second doped well; and a first current blocking structure arranged in the epitaxial layer and arranged between the first doped well and the second doped well, and a depth of the first current blocking structure is deeper than or equal to depths of the first doped well and the second doped well, the first heavily-doped area and the second heavily-doped area are respectively electrically connected to a first pin and a second pin, the first current blocking structure is electrically floating, and when an electrostatic discharge (ESD) voltage is applied across the first pin and the second pin, a first electrostatic discharge (ESD) current flows from the first pin to the second pin and flows under the first current blocking structure.

Metadata:
- Claim Count in Document: 31.0
- Percentile: 95.0
- Lexical Diversity: 3.57143
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12848531', '13072138', '12888151', '13475599', '15251910']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9292920698101444
- 35 USC 102 Novelty (BERT): 0.5129848228304486
- Combined Prediction Score: 0.8876613451121749
- Mean Citation Score: 310.9118180000001
- Max Citation Score: 320.7966
- Similarity Product: 269.0758937714696

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test