PATENT CLAIM ANALYSIS

Application Number: 16000582
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["327", "175000"]

Abstract:
In an embodiment, a delay circuit comprises a delay loop controller outputting a signal obtained by operating a start signal and a delayed feedback clock signal output from outside the delay loop controller; and a loop counter configured to determine whether a predetermined delay time has elapsed since the start signal was input according to the delayed feedback clock signal and a predetermined loop count.

Claim (Index 14):
The duty cycle controller of  claim 13 , further comprising:\n a control circuit configured to control the predetermined loop count and a delay time of the unit delay circuit; and a mode selector configured to select one of the output clock signal or a training start signal according to a mode signal from the control circuit and to selected signal to the delay circuit.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 94.0
- Lexical Diversity: 1.7
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12400495', '13563863', '13420459', '13098154', '14810900']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7869047094737106
- 35 USC 102 Novelty (BERT): 0.496213303521941
- Combined Prediction Score: 0.7578355688785336
- Mean Citation Score: 262.21605200000005
- Max Citation Score: 270.6687
- Similarity Product: 206.4442665076017

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test