PATENT CLAIM ANALYSIS

Application Number: 15986347
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["365", "148000"]

Abstract:
An in-memory computing system for computing vector-matrix multiplications includes an array of resistive memory devices arranged in columns and rows, such that resistive memory devices in each row of the array are interconnected by a respective wordline and resistive memory devices in each column of the array are interconnected by a respective bitline. The in-memory computing system also includes an interface circuit electrically coupled to each bitline of the array of resistive memory devices and computes the vector-matrix multiplication between an input vector applied to a given set of wordlines and data values stored in the array. For each bitline, the interface circuit receives an output in response to the input being applied to the given wordline, compares the output to a threshold, and increments a count maintained for each bitline when the output exceeds the threshold. The count for a given bitline represents a dot-product.

Claim (Index 13):
An in-memory computing method for performing multiply-accumulate (MAC) operations and computing vector-matrix multiplications, comprising:\n applying an input to an array of resistive memory devices arranged in columns and rows, wherein the array is arranged such that resistive memory devices in each row of the array are interconnected by a respective wordline and resistive memory devices in each column of the array are interconnected by a respective bitline, and wherein each resistive memory device in the array of resistive memory devices has an associated threshold voltage and is configured to store a data value therein as a resistance value; computing vector-matrix multiplication between an input applied to a given set of wordlines and data values stored in the array of resistive memory devices by, for each bitline:\n receiving an output in response to the input being applied to a given wordline; \n comparing the output to a threshold; and \n incrementing a count for each bitline when the output exceeds the threshold, such that the count of a given bitline performs MAC operation between the input and a conductance of the resistive memory device interconnected by the given bitline and the given wordline.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 93.0
- Lexical Diversity: 2.29851
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15723668', '14793156', '13186789', '11246046', '15637990']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7986927025029366
- 35 USC 102 Novelty (BERT): 0.4871219751009145
- Combined Prediction Score: 0.7675356297627344
- Mean Citation Score: 231.77012000000005
- Max Citation Score: 271.91486000000003
- Similarity Product: 231.8997088555729

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test