PATENT CLAIM ANALYSIS

Application Number: 16149261
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-01
Patent Classification: ["365", "185120"]

Abstract:
Memory devices include a first string of memory cells selectively connected to a first data line, a second string of memory cells selectively connected to a second data line, and a transistor that selectively connects the first data line to the second data line.

Claim (Index 11):
A memory device, comprising:\n a first string of memory cells selectively connected to a first data line; a second string of memory cells selectively connected to a second data line; a first transistor connected in series with the first data line; and a second transistor connected in series with the second data line and the first transistor; wherein the first string is connected between a third transistor that selectively connects the first string to a first source and a fourth transistor that selectively connects the first string to the first data line, and wherein the second string is connected between a fifth transistor that selectively connects the second string to a second source and a sixth transistor that selectively connects the second string to the second data line.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 97.0
- Lexical Diversity: 2.13636
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['16021306', '15019175', '16021250', '15191786', '15692565']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.801076268127802
- 35 USC 102 Novelty (BERT): 0.496702771603781
- Combined Prediction Score: 0.7706389184753999
- Mean Citation Score: 252.319582
- Max Citation Score: 297.2899
- Similarity Product: 264.0168956953764

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test