PATENT CLAIM ANALYSIS

Application Number: 16246353
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-07
Patent Classification: ["365", "185180"]

Abstract:
There are disclosed devices, system and methods for a vector-by-matrix multiplier (VMM) module having a three-dimensional memory matrix of nonvolatile memory devices each having a charge storage, an activation input, a signal input and an output signal in a range that is based on a stored charge and an input signal during assertion of the activation signal. The memory devices are arranged in two dimensional (XY) layers that are vertically disposed along (Z) columns. The activation inputs of each layer are connected to a same activation signal, the memory devices of rows in a first dimension (X) of each layer have signal inputs connected to different input signals and have signal outputs connected in series to a common output. The memory devices of rows in a second dimension (Y) of each layer have signal inputs connected to a set of the same inputs along the first dimension.

Claim (Index 17):
A vector-by-matrix multiplier (VMM) module comprising:\n a three-dimensional (3D) memory matrix of nonvolatile memory devices each having a charge storage, an activation input, a signal input to receive an input signal and a signal output to output an output signal when the activation input receives an activation signal; the output signal being in a range that is based on a charge stored in the charge storage, an input applied to the activation input, and an input signal received at the signal input; the nonvolatile memory devices arranged in a plurality of two dimensional (2D) (XY) layers that are vertically disposed along a plurality of (Z) columns, the activation inputs of nonvolatile memory devices along a first dimension (X) of each layer connected to a same activation input (WL), the memory devices of each layer having signal inputs connected to signal outputs of memory devices in the layer above along a third dimension (Z) and having signal outputs connected to the signal inputs of memory devices in the layer below along a third dimension (Z).

Metadata:
- Claim Count in Document: 4.0
- Percentile: 99.0
- Lexical Diversity: 2.35714
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14487078', '15137284', '13680286', '14966894', '14341739']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7540434397480642
- 35 USC 102 Novelty (BERT): 0.4710373311376131
- Combined Prediction Score: 0.7257428288870191
- Mean Citation Score: 170.66295
- Max Citation Score: 182.24405
- Similarity Product: 141.4938621841431

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test