PATENT CLAIM ANALYSIS

Application Number: 16006243
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["348", "372000"]

Abstract:
The image forming apparatus of the present invention is a semiconductor integrated circuit including: a first image processing module; a second image processing module; a first SRAM configured to temporarily store image data for which the first image processing has been performed by the first image processing module; a second SRAM configured to store a parameter for performing the second image processing for image data that is input to the second image processing module; and a control unit. The control unit stops power supply to the first SRAM, continues to supply power to a storage area of the second SRAM in which the parameter is stored, and stops power supply to a control area for writing data to the storage area of the second SRAM based on that a condition to cause the semiconductor integrated circuit to make a transition into a power-saving mode is satisfied.

Claim (Index 19):
The information processing apparatus according to  claim 18 , wherein\n the power controller turns off at least the memory area in the first SRAM, the word driver unit and the column unit in the control area of the first SRAM.

Metadata:
- Claim Count in Document: 67.0
- Percentile: 94.0
- Lexical Diversity: 2.58333
- Patent Class: 348.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15700719', '15465901', '13069596', '14716207', '15069729']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6257774449035111
- 35 USC 102 Novelty (BERT): 0.5033233142865619
- Combined Prediction Score: 0.6135320318418162
- Mean Citation Score: 160.63818999999995
- Max Citation Score: 185.99333
- Similarity Product: 107.0375449778354

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test