PATENT CLAIM ANALYSIS

Application Number: 16016510
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["257", "622000"]

Abstract:
A new semiconductor rectifier structure. In general, a MOS-transistor-like structure is located above a JFET-like deeper structure. The present application teaches ways to combine and optimize these two structures in a merged device so that the resulting combined structure achieves both a low forward voltage and a high reverse breakdown voltage in a relatively small area. In one class of innovative implementations, an insulated (or partially insulated) trench is used to define a vertical channel in a body region along the sidewall of a trench, so that majority carriers from a “source” region (typically n+) can flow through the channel. An added “pocket” diffusion, of the same conductivity type as the body region (p-type in this example), provides an intermediate region around the bottom of the trench. This intermediate diffusion, and an additional deep region of the same conductivity type, define a deep JFET-like device which is in series with the MOS channel portion of the diode. This advantageously permits the MOS channel portion to be reasonably short, and to have a reasonably low threshold voltage, since the high-voltage withstand characteristics are defined by the deep JFET-like device.

Claim (Index 1):
A semiconductor rectifier device, comprising, on a semiconductor die:\n a first-conductivity-type source region near a first surface of the die; a second-conductivity-type body region underlying the source region; a first-conductivity-type drift region underlying the body region; an insulated gate trench extending down through the body region into the drift region, containing a conductive gate electrode; a second-conductivity-type intermediate region under the gate trench; a second-conductivity-type body contact region, extending down through the body region into the drift region; a first metallization layer at the first surface, ohmically connected to the source region, the body contact region, and the gate electrode; a second metallization layer, at an opposite surface, which is ohmically connected to the drift region; wherein, under forward bias, majority carriers pass from the source region, through a portion of the body region which is inverted by capacitive coupling to the gate electrode, and therethrough into the drift region and to the second metallization; and wherein, under reverse bias, depletion regions extend laterally from the intermediate region and from the body contact region, within the drift region, to pinch off conduction between the body region and the second metallization.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 94.0
- Lexical Diversity: 1.84483
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['11982764', '12238308', '10146539', '11982792', '11982781']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9226842649640336
- 35 USC 102 Novelty (BERT): 0.4869008096980894
- Combined Prediction Score: 0.8791059194374393
- Mean Citation Score: 236.687304
- Max Citation Score: 243.55795
- Similarity Product: 197.9333116585792

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test