PATENT CLAIM ANALYSIS

Application Number: 15862272
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["438", "587000"]

Abstract:
A memory device that includes a non-volatile memory (NVM) transistor disposed in a first region of a substrate. The NVM transistor includes a first gate including a first type of conductor material. The memory device further includes a first type of low voltage field-effect transistor (LV FET) and an input/out field-effect transistor (I/O FET) disposed in a second region of the substrate. The LV FET includes a second gate comprising a second type of conductor material, the I/O FET includes a third gate comprising a second type of conductor material, and the first and second conductor materials are different. Other embodiments are also described.

Claim (Index 28):
The memory device of  claim 22 , wherein at least one of the first, second, third, and fourth gates further includes polysilicon.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 86.0
- Lexical Diversity: 2.54348
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15080997', '15459230', '14229594', '14516794', '15721132']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8987258277957859
- 35 USC 102 Novelty (BERT): 0.5332820363428489
- Combined Prediction Score: 0.8621814486504923
- Mean Citation Score: 351.773146
- Max Citation Score: 363.38437000000016
- Similarity Product: 262.2266287950933

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test