PATENT CLAIM ANALYSIS

Application Number: 16196313
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["257", "686000"]

Abstract:
In a multi-chip module (MCM), a “super” chip ( 110 N) is attached to multiple “plain” chips ( 110 F′ “super” and “plain” chips can be any chips). The super chip is positioned above the wiring board (WB) but below at least some of plain chips ( 110 F). The plain chips overlap the super chip. Further, the plain chips' low speed IOs can be connected to the WB by long direct connections such as bond wires (e.g. BVAs) or solder stacks; such connections can be placed side by side with the super chip. Such connections can be long, so the super chip is not required to be thin. Also, if through-substrate vias (TSVs) are omitted, the manufacturing yield is high and the manufacturing cost is low. Other structures are provided that combine the short and long direct connections to obtain desired physical and electrical properties.

Claim (Index 4):
The assembly of  claim 1 , wherein at least one of the first chips comprises one or more fifth contact pads at a top side thereof directly connected to the second chip by a discrete wire.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 98.0
- Lexical Diversity: 1.97802
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15584961', '14809036', '14558462', '15005220', '15364534']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9250658324680878
- 35 USC 102 Novelty (BERT): 0.5646918871893642
- Combined Prediction Score: 0.8890284379402156
- Mean Citation Score: 276.32361000000003
- Max Citation Score: 465.52554
- Similarity Product: 350.44323672677285

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test