PATENT CLAIM ANALYSIS

Application Number: 15944983
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-04
Patent Classification: ["714", "764000"]

Abstract:
A method for operating a memory device includes: receiving a first read command and a first address; reading a first read data and a first error correction code from memory cells selected based on the first address; detecting and correcting an error of the first read data using the first error correction code; storing the first address as an error detection address in an address latch circuit; storing an error-corrected bit of the first read data and a position of the error-corrected bit of the first read data in a data latch circuit; and transmitting an error-corrected first read data to an external device.

Claim (Index 3):
The method of  claim 1 , further comprising:\n receiving a first write command, a third address, and a first write data; comparing the third address with the error detection address; when the third address is the same as the error detection address, resetting the data latch circuit and the address latch circuit; generating a third error correction code based on the first write data; and programming the first write data and the third error correction code in memory cells that are selected based on the third address.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 91.0
- Lexical Diversity: 2.46667
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15062557', '14305095', '11274402', '12175473', '11590329']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.311486401027025
- 35 USC 102 Novelty (BERT): 0.4908826235127209
- Combined Prediction Score: 0.3294260232755945
- Mean Citation Score: 234.821928
- Max Citation Score: 246.08987
- Similarity Product: 180.49421800977825

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test