PATENT CLAIM ANALYSIS

Application Number: 15939078
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["365", "156000"]

Abstract:
Systems, apparatuses, and methods for efficiently driving level shifted write data are described. In various embodiments, a level-shifting write driver combines a write data bit and a write mask bit that each use a first supply voltage to indicate a logic high level. During a write operation, the driver generates complementary values on two output nodes based on the write data bit. The output nodes use a second supply voltage greater than the first supply voltage. Before a write operation, the driver precharges each of the two output nodes to the second supply voltage. When the write clock enables a write operation and the write mask bit disables the write operation, the level-shifting write driver puts the two output nodes in a tri-state.

Claim (Index 7):
The apparatus as recited in  claim 2 , wherein prior to generation of the intermediate value, each of the write data bit and the write mask bit are shifted by external redundancy logic configured to indicate a logic high level with the first voltage.

Metadata:
- Claim Count in Document: 37.0
- Percentile: 90.0
- Lexical Diversity: 2.28814
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13474825', '11529202', '13915918', '13149489', '15362795']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7711668420968544
- 35 USC 102 Novelty (BERT): 0.4766615031235098
- Combined Prediction Score: 0.74171630819952
- Mean Citation Score: 176.26302800000005
- Max Citation Score: 185.30072
- Similarity Product: 141.17915104318618

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test