PATENT CLAIM ANALYSIS

Application Number: 16116240
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["345", "100000"]

Abstract:
A display apparatus includes a timing controller configured to generate a single clock control signal comprising a plurality of ON-control pulses and a plurality of OFF-control pulses, a gate clock generator configured to generate a plurality of clock signals based on the single clock control signal, ON-periods of the plurality of clock signals starting in response to an ON-control pulse among the ON-control pulses and OFF-periods of the plurality of clock signals starting in response to an OFF-control pulse among the OFF-control pulses, a gate driver comprising a plurality of shift registers which generates a plurality of gate signals based on the plurality of clock signals, and a display panel comprising a display area in which a plurality of pixels is arranged and a peripheral area in which the plurality of shift registers is arranged.

Claim (Index 1):
A display apparatus comprising:\n a timing controller configured to generate a first clock control signal comprising a plurality of ON-control pulses and a second clock control signal comprising a plurality of OFF-control pulses; a gate clock generator configured to generate a plurality of clock signals based on the first clock control signal and the second clock control signal, wherein ON-periods of the plurality of clock signals start in response to an ON-control pulse among the ON-control pulses and finish in response to an OFF-control pulse among the OFF-control pulses,\n a gate driver comprising a plurality of shift registers, wherein the shift registers generate a plurality of gate signals based on the plurality of clock signals; and \n a display panel comprising a display area in which a plurality of pixels is arranged and a peripheral area in which the plurality of shift registers is arranged,\n wherein the plurality of ON-control pulses include a pulse that repeats each time a period has elapsed, the plurality of OFF-control pulses include a pulse that repeats each time the period has elapsed, and \n wherein a first OFF-control pulse of the plurality of OFF-control pulses has a delay difference from a first ON-control pulse of the plurality of ON-control pulses.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 96.0
- Lexical Diversity: 2.91667
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15164042', '15054580', '13603863', '15227924', '12451957']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6350196363840328
- 35 USC 102 Novelty (BERT): 0.628446997473563
- Combined Prediction Score: 0.6343623724929859
- Mean Citation Score: 293.891702
- Max Citation Score: 581.42224
- Similarity Product: 555.6641489706611

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test