PATENT CLAIM ANALYSIS

Application Number: 16051121
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-04
Patent Classification: ["257", "447000"]

Abstract:
The application disclosed a semiconductor image sensor and a preparation method thereof. The semiconductor image sensor includes: a semiconductor substrate, a buffer layer formed on the semiconductor substrate; and a potential regulation laminated structure, formed on the buffer layer, and configured to regulate a surface potential of the semiconductor substrate. The potential regulation laminated structure includes a first potential regulation layer formed on the buffer layer, a second potential regulation layer formed on the first potential regulation layer and a third potential regulation layer formed on the second potential regulation layer, wherein the first potential regulation layer includes a high-k dielectric constant material layer, and the second and third potential regulation layers each include either a conductive material layer or a high-k dielectric constant material layer.

Claim (Index 15):
The preparation method for the semiconductor image sensor according to  claim 14 , wherein the semiconductor substrate provided in step 1) comprises a front surface and a back surface opposite to each other, the buffer layer formed in step 2) is on the back surface of the semiconductor substrate, and between step 1) and step 2), the method further comprises the following steps:\n forming a plurality of sensing units arranged at intervals in the semiconductor substrate from the front surface of the semiconductor substrate; forming a wiring layer on the front surface of the semiconductor substrate, the wiring layer comprising an interlevel dielectric layer located on the front surface of the semiconductor substrate and an interconnecting wire layer located in the interlevel dielectric layer; providing a supporting substrate, and bonding the semiconductor substrate to the supporting substrate, a bonding surface is the surface of the wiring layer which is away from the semiconductor substrate; and thinning the semiconductor substrate from the back surface of the semiconductor substrate.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 95.0
- Lexical Diversity: 3.04444
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12045952', '13061620', '14685123', '15927594', '13728176']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9067942933956928
- 35 USC 102 Novelty (BERT): 0.4729152789852932
- Combined Prediction Score: 0.8634063919546527
- Mean Citation Score: 156.15758799999998
- Max Citation Score: 175.73389
- Similarity Product: 133.01427190686584

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test