PATENT CLAIM ANALYSIS

Application Number: 16019730
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-01
Patent Classification: ["257", "692000"]

Abstract:
A packaging structure integrated with an MEMS chip and an ASIC chip and a packing method are provided. The packaging structure includes: an MEMS chip, an ASIC chip, a first solder bump and a cover plate. The MEMS chip has a front surface and an opposite back surface. The ASIC chip has a front surface and an opposite back surface. The front surface of the ASIC chip is laminated and fixed to the back surface of the MEMS chip, and the ASIC chip is electrically connected to the MEMS chip. The first solder bump is arranged on a side of the ASIC chip facing away from the MEMS chip, and electrically connects to an external circuit. The cover plate includes an accommodating cavity. The MEMS chip is located in the accommodating cavity and the cover plate is hermetically connected to the ASIC chip.

Claim (Index 14):
A packaging method for forming a packaging structure integrated with a Micro-Electro-Mechanical System (MEMS) chip and an Application Specific Integrated Circuit (ASIC) chip, wherein the packaging structure comprises an MEMS chip, an ASIC chip, a first solder bump and a cover plate, and the packaging method comprises:\n providing a wafer, wherein the wafer comprises a plurality of ASIC chips arranged in an array, a cutting trench is arranged between two adjacent ASIC chips among the plurality of ASIC chips; the ASIC chip has a front surface and a back surface; laminating and fixing an MEMS chip to the front surface of the ASIC chip, wherein the MEMS chip has a front surface and a back surface opposite to each other; the front surface of the ASIC chip is laminated and fixed to the back surface of the MEMS chip, and the ASIC chip is electrically connected to the MEMS chip; providing a substrate laminated and fixed to the wafer; forming a first solder bump on the back surface of the ASIC chip, wherein the first solder bump is configured to electrically connect to an external circuit; and cutting along the cutting trench to form a plurality of packaging structures, wherein after the cutting, the substrate is divided into a plurality of cover plates; each of the plurality of packaging structures has one of the plurality of cover plates; in the packaging structure, the cover plate is arranged on the ASIC chip and comprises an accommodating cavity, the MEMS chip is located in the accommodating cavity, and the cover plate is hermetically connected to the ASIC chip.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 94.0
- Lexical Diversity: 3.0
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15950302', '15767121', '15507901', '15335742', '14531222']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.92503767794278
- 35 USC 102 Novelty (BERT): 0.4936049593291505
- Combined Prediction Score: 0.8818944060814171
- Mean Citation Score: 218.662098
- Max Citation Score: 232.1899
- Similarity Product: 172.3739736787676

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test