PATENT CLAIM ANALYSIS

Application Number: 15877549
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["438", "667000"]

Abstract:
An integrated circuit product includes a substrate, an interlayer dielectric (ILD) material positioned above the substrate and a through-substrate-via (TSV) extending continuously through the substrate and the ILD material. The TSV includes a substrate portion of the TSV that is positioned in and extends continuously through the substrate and an ILD portion of the TSV that is positioned in and extends continuously through the ILD. An insulating liner layer is selectively positioned between and separates the substrate portion of the TSV and the substrate, wherein the selectively positioned insulating liner layer does not extend from the substrate to the ILD material.

Claim (Index 20):
The integrated circuit product of  claim 17 , wherein said selectively positioned insulating liner layer is not positioned between and separating said second TSV portion and said metallization system, is not positioned between and separating said second TSV portion and said at least one layer of insulating material, and is not positioned between and separating said second TSV portion and said ILD material.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 86.0
- Lexical Diversity: 2.5
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15228317', '15728632', '15791711', '15469701', '15373691']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8790373799298061
- 35 USC 102 Novelty (BERT): 0.5380552916532642
- Combined Prediction Score: 0.844939171102152
- Mean Citation Score: 277.24565399999994
- Max Citation Score: 380.2587
- Similarity Product: 255.176344996047

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test