PATENT CLAIM ANALYSIS

Application Number: 16009209
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["257", "659000"]

Abstract:
A package-on-package structure including a first and second package is provided. The first package includes a first semiconductor die, a plurality of conductive pins, an insulating encapsulant, a backside connection structure and a redistribution layer. The conductive pins are surrounding the first semiconductor die and have a base portion with a first width and a body portion with a second width, the base portion is connected to the body portion and the first width being larger than the second width. The insulating encapsulant is encapsulating the first semiconductor die and the conductive pins. The backside connection structure is disposed on the first semiconductor die and electrically connected to the conductive pins. The redistribution layer is disposed on the first semiconductor die, and electrically connected to the first semiconductor die and the conductive pins. The second package is stacked on the first package and electrically connected to the backside connection structure.

Claim (Index 8):
A package-on-package structure, comprising:\n a first package, comprising:\n a first semiconductor die, having an active surface and a rear surface opposite to the active surface; \n a plurality of through insulator vias, surrounding the first semiconductor die; \n an insulating encapsulant, encapsulating the first semiconductor die and the plurality of through insulator vias; \n a backside connection structure disposed on the rear surface of the first semiconductor die, wherein the backside connection structure has a first surface and a second surface opposite to the first surface, and the backside connection structure comprises a dielectric layer, a plurality of connection pads surrounded by the dielectric layer, and a plurality of seed layers disposed on sidewalls and a bottom surface of the connection pads, the seed layers are revealed from the first surface of the backside connection structure, and the plurality of through insulator vias is connected to the plurality of connection pads; \n a polymer layer disposed on the first surface of the backside connection structure, wherein the polymer layer has openings that reveal the seed layers disposed on the bottom surface of the connection pads; and \n a redistribution layer disposed on the active surface of the first semiconductor die, and electrically connected to the first semiconductor die and the plurality of through insulator vias; \n a second package stacked on the first package and electrically connected to the plurality of connection pads of the first package through a plurality of conductive balls, wherein the plurality of conductive balls fill into the openings of the polymer layer to be electrically connected to the seed layers and the plurality of connection pads.

Metadata:
- Claim Count in Document: 42.0
- Percentile: 94.0
- Lexical Diversity: 3.44681
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15979494', '15359403', '15964091', '15806347', '15980541']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9013513047350162
- 35 USC 102 Novelty (BERT): 0.4870740701483477
- Combined Prediction Score: 0.8599235812763494
- Mean Citation Score: 216.98302200000003
- Max Citation Score: 238.03006
- Similarity Product: 206.76142532213925

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test