PATENT CLAIM ANALYSIS

Application Number: 15940800
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-08
Patent Classification: ["365", "154000"]

Abstract:
A circuit and method performs a write assist for a memory cell (e.g., a static random access memory cell (SRAM)). The method includes providing a lower supply voltage signal to a voltage supply node of the memory cell using a capacitor. The lower supply voltage signal is lower in voltage level than a supply voltage signal. The method further includes lowering a common signal provided to a write driver using the capacitor.

Claim (Index 3):
The integrated circuit of  claim 1 ,\n wherein the control circuit is further configured to provide a boost control signal; and wherein the transistor circuit further comprises a third transistor configured to couple a first end of the capacitor to the ground in response to the boost control signal provided by the control circuit.

Metadata:
- Claim Count in Document: 53.0
- Percentile: 90.0
- Lexical Diversity: 1.92857
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15135133', '14077559', '12959883', '14594673', '15476746']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8027860791682976
- 35 USC 102 Novelty (BERT): 0.4890552172424807
- Combined Prediction Score: 0.771412992975716
- Mean Citation Score: 192.171696
- Max Citation Score: 254.62741
- Similarity Product: 201.40328690939964

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test