PATENT CLAIM ANALYSIS

Application Number: 16001869
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["365", "222000"]

Abstract:
A memory device is described. The memory device includes logic circuitry to perform calibrations of resistive network terminations and data drivers of the memory device while the memory device is within a self refresh mode.

Claim (Index 5):
The memory controller of  claim 1  wherein the logic circuitry is to check a register of the memory device that contains information that indicates whether a most recent one of the calibrations was successfully performed, and, if a most recent one of the calibrations was not successfully performed, the logic circuitry is to command the memory device to perform a calibration of the resistive network terminations and data drivers as part of the memory device's transition out of the self refresh mode even though the memory device was commanded to perform the calibrations during the self refresh mode.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 94.0
- Lexical Diversity: 1.37037
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14738119', '14613282', '14937788', '13145542', '15174946']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7888763348300979
- 35 USC 102 Novelty (BERT): 0.4700060225643769
- Combined Prediction Score: 0.7569893036035258
- Mean Citation Score: 134.22747399999997
- Max Citation Score: 139.64342
- Similarity Product: 95.25819264856575

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test