PATENT CLAIM ANALYSIS

Application Number: 15965362
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["375", "344000"]

Abstract:
A clock synchronization method, a receiver, a transmitter, and a clock synchronization system, where the method includes obtaining a common reference clock signal, determining B t  according to the common reference clock signal and Mr d (t−1), where B t = mod  [ ∑ n = 0 t - 1   Mr d  ( n ) , 2 p ] , determining that Mr d (t−1) is a target Mr d  when C t  obtained by means of calculation according to Mr d (t−1) is less than or equal to a threshold, where C t =B t −A t , A t  is included in a residual time stamp (RTS) packet received by a receiver last time from the transmitter, and A t = mod  [ ∑ n = 0 t   M d  ( n ) , 2 p ] , performing frequency division on the common reference clock signal using the target Mr d  as a frequency dividing coefficient to obtain a first clock signal, and performing frequency multiplication processing on the first clock signal to obtain a service clock signal. Hence, random phase offset may be avoided.

Claim (Index 11):
A receiver, comprising:\n a memory comprising instructions; and a processor coupled to the memory, the instructions causing the processor to be configured to:\n obtain a common reference clock signal, a frequency of the common reference clock signal comprising f n ; \n determine B t  according to Mr d (t\u22121) and the common reference clock signal, the \n B t = mod \ue89e [ \u2211 n = 0 t - 1 \ue89e \ue89e Mr d \ue8a0 ( n ) , 2 p ] , the t comprising a positive integer, and Mr d (0) comprising an initial value;\n determine that the Mr d (t\u22121) comprises a target Mr d  when C t  obtained by calculation according to the Mr d (t\u22121) is less than or equal to a threshold, the C t =B t \u2212A t , the A t  being comprised in a residual time stamp (RTS) packet received by the receiver last time from a transmitter, the \n A t = mod \ue89e [ \u2211 n = 0 t \ue89e \ue89e M d \ue8a0 ( n ) , 2 p ] , the M d (n) comprising frequency offset information, the M d (n)=M q (n)\u2212M nom , the M q (n) comprising a quantity of rising edges of the common reference clock signal within an n th  RTS period from the transmitter, the M nom  comprising a reference quantity of clock periods of the common reference clock signal within the n th  RTS period from the transmitter, the P comprising a bit width of a counter in the transmitter configured to record the M q (n), and the n comprising a positive integer;\n perform frequency division on the common reference clock signal using the target Mr d  as a frequency dividing coefficient to obtain a first clock signal, a frequency of the first clock signal comprising  f sN ; and \n perform frequency multiplication processing on the first clock signal to obtain a service clock signal, a frequency of the service clock signal comprising  f s , the  f s = f sN \u00d7N, and the N comprising a multiplication factor.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 91.0
- Lexical Diversity: 2.42697
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10246408', '13027885', '10246399', '10759101', '10182186']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4652640202666263
- 35 USC 102 Novelty (BERT): 0.4848846024808865
- Combined Prediction Score: 0.4672260784880523
- Mean Citation Score: 171.99452
- Max Citation Score: 177.05733
- Similarity Product: 121.09340196968974

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test