PATENT CLAIM ANALYSIS

Application Number: 16376479
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-08
Patent Classification: ["382", "308000"]

Abstract:
In a general aspect, an apparatus can include image processing logic (IPL) configured to perform an image processing operation on pixel data corresponding with an image having a width of W pixels and a height of H pixels to produce output pixel data in vertical slices of K pixels using K vertically overlapping stencils of S×S pixels, K being greater than 1 and less than H, S being greater than or equal to 2, and W being greater than S. The apparatus can also include a linebuffer operationally coupled with the IPL, the linebuffer configured to buffer the pixel data for the IPL. The linebuffer can include a full-size buffer having a width of W and a height of (S−1). The linebuffer can also include a sliding buffer having a width of SB and a height of K, SB being greater than or equal to S and less than W.

Claim (Index 9):
The processor of  claim 7 , wherein the virtual linebuffer is configured to provide an input slice of data to the consumer kernel only after multiple output slices of data have been written by the producer kernel.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 100.0
- Lexical Diversity: 2.4697
- Patent Class: 382.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15479159', '14603354', '15598933', '12052040', '14444910']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3121495793118629
- 35 USC 102 Novelty (BERT): 0.5713560270041538
- Combined Prediction Score: 0.338070224081092
- Mean Citation Score: 277.627842
- Max Citation Score: 479.85947
- Similarity Product: 337.7941221037185

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test