PATENT CLAIM ANALYSIS

Application Number: 15947830
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["711", "122000"]

Abstract:
A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The processor includes logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor. Other processors, methods, and systems are also disclosed.

Claim (Index 1):
A system comprising:\n a plurality of cores to execute instructions and process data, the plurality of cores comprising symmetric multi-threaded cores; a cache subsystem to store the instructions and data, the cache subsystem comprising a plurality of first level caches and at least one higher level distributed cache comprising a plurality of cache portions shared by the plurality of cores, each first level cache integral to one of the plurality of cores and each cache portion accessible to each of the plurality of cores; cache management circuitry to provide coherent, non-uniform access to the plurality of cache portions by the plurality of cores; power management circuitry to enable a first frequency to be set for a first subset of the plurality of cores and a second frequency to be set for a second subset of the plurality of cores, the power management circuitry to selectively gate power to the first subset of the plurality of cores, the second subset of the plurality of cores, and/or one or more of the cache portions; a first integrated memory controller to couple the symmetric multi-threaded cores to a first system memory; and a second integrated memory controller to couple the symmetric multi-threaded cores to a second system memory.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 2.08
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13729579', '14498353', '15370904', '15221557', '13539044']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5076309209864724
- 35 USC 102 Novelty (BERT): 0.5003303774855995
- Combined Prediction Score: 0.5069008666363852
- Mean Citation Score: 203.732608
- Max Citation Score: 254.4563
- Similarity Product: 177.29216542842389

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test