PATENT CLAIM ANALYSIS

Application Number: 15936015
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["341", "118000"]

Abstract:
Certain aspects of the present disclosure provide methods and apparatus for performing background noise estimation using a circular histogram noise figure (CHNF) in an analog-to-digital converter (ADC) circuit with redundancy. The estimated noise may be used to reduce the noise (e.g., comparator noise) in the ADC circuit. One example ADC circuit generally includes at least one of a comparator or a digital-to-analog converter (DAC) and at least one digital feedback input. The at least one digital feedback input is coupled to the at least one of the comparator or the DAC and is configured to adjust at least one parameter of the at least one of the comparator or the DAC based on at least a portion of an output of the ADC circuit.

Claim (Index 5):
The ADC circuit of  claim 3 , wherein the first stage is a same stage as the second stage.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 2.14062
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15049933', '15912128', '14724555', '15899883', '13489865']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5738632612115409
- 35 USC 102 Novelty (BERT): 0.5281907475328224
- Combined Prediction Score: 0.569296009843669
- Mean Citation Score: 233.305826
- Max Citation Score: 240.66005
- Similarity Product: 132.62121624668836

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test