PATENT CLAIM ANALYSIS

Application Number: 16100676
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "343000"]

Abstract:
In an embodiment, a semiconductor device includes a semiconductor substrate having a front surface, a LDMOS transistor in the front surface, and a metallization structure arranged on the front surface. The metallization structure includes at least one cavity arranged in at least one dielectric layer. Related methods of manufacture are also described.

Claim (Index 2):
The method of  claim 1 , wherein forming the opening and covering the opening with a further dielectric layer to form a sealed cavity comprises:\n forming a first opening in the first dielectric layer and filling the first opening with a sacrificial material; forming a second dielectric layer over the first dielectric layer; forming a second opening in the second dielectric layer to expose a region of the sacrificial material within the first opening; removing the sacrificial material from the first opening through the second opening; and applying the further dielectric layer on the second dielectric layer to close and seal the second opening and seal the cavity.

Metadata:
- Claim Count in Document: 31.0
- Percentile: 96.0
- Lexical Diversity: 1.61111
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15191937', '15986433', '15279649', '15986942', '15192283']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9365801024040624
- 35 USC 102 Novelty (BERT): 0.5486597634989445
- Combined Prediction Score: 0.8977880685135506
- Mean Citation Score: 305.161798
- Max Citation Score: 408.88214
- Similarity Product: 309.6611727487206

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test