PATENT CLAIM ANALYSIS

Application Number: 15913474
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["257", "348000"]

Abstract:
An integrated circuit is provided with a memory cell array comprising poly lines, semiconductor lines extending in a first direction and transistor devices, wherein gates of the transistor device are formed in portions of the poly lines and channels of the transistor devices are formed in the semiconductor lines and wherein at least one portion of at least one of the poly lines runs across at least one of the semiconductor lines in a second direction inclined to a direction perpendicular to the first direction at an inclination angle of more than, for example, 5° or 10°, as measured from the direction perpendicular to first direction.

Claim (Index 5):
The integrated circuit of  claim 1 , wherein said memory cell array is comprised in an SRAM device.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 2.03636
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15375890', '14010278', '10764048', '12053398', '10700869']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9167323524858698
- 35 USC 102 Novelty (BERT): 0.4915381086685502
- Combined Prediction Score: 0.8742129281041379
- Mean Citation Score: 177.64598800000005
- Max Citation Score: 188.3493
- Similarity Product: 130.8361441426456

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test