PATENT CLAIM ANALYSIS

Application Number: 16264719
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-05
Patent Classification: ["716", "055000"]

Abstract:
A layout file for an integrated circuit has drawn geometries. Variable fill geometries are added to local areas based on densities of the drawn geometries in windows associated with the local areas and on the global density of all the drawn geometries in the layout file. Each window has a separate local area associated with it. The densities of the variable fill geometries in the local areas are not all equal. Densities of the fill geometries are higher in local areas associated with windows having lower densities of the drawn geometries, and for lower values of the global density. The layout file is stored in a computer-readable medium which may be used to produce a photomask for manufacturing an integrated circuit.

Claim (Index 6):
The integrated circuit of  claim 1 , wherein the functional structures include metal interconnects, and the functional structures and the fill structures both include a copper damascene structure.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 99.0
- Lexical Diversity: 2.2069
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14934130', '15949460', '11195334', '10861812', '12731057']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3282650489461637
- 35 USC 102 Novelty (BERT): 0.4777778927654575
- Combined Prediction Score: 0.3432163333280931
- Mean Citation Score: 194.039468
- Max Citation Score: 267.80048
- Similarity Product: 250.0626019040108

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test