PATENT CLAIM ANALYSIS

Application Number: 16146489
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["326", "030000"]

Abstract:
Systems and apparatuses are provided for an arbiter circuit for timing based ZQ calibration. An example system includes a resistor and a plurality of chips. Each of the plurality of chips further includes a terminal coupled to the resistor and a calibration circuit. The calibration circuit determines whether the resistor is available based, at least in part, on timing information that is unique to a corresponding chip of the plurality of chip. The timing information of each chip of the plurality of chips has a fixed duration of time common to the plurality of chips.

Claim (Index 11):
A method comprising:\n detecting a voltage at a terminal of a chip among a plurality of chips, wherein the terminal is coupled to a resistor and wherein each chip of the plurality of chips is coupled to the resistor; enabling a driver circuit included in the chip for a duration of time based on timing information having a fixed duration common to the plurality of chips; and determining whether the resistor is available, based, at least in part, on the timing information.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 2.0
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15630901', '15396259', '15683439', '16034233', '15882723']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7053926208564688
- 35 USC 102 Novelty (BERT): 0.5512766385904009
- Combined Prediction Score: 0.689981022629862
- Mean Citation Score: 311.395098
- Max Citation Score: 426.82623
- Similarity Product: 400.8970929692424

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test