PATENT CLAIM ANALYSIS

Application Number: 15904093
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["365", "148000"]

Abstract:
A memory device includes: a memory bit cell; a write circuit, coupled to the memory bit cell, and configured to use a first voltage to transition the memory bit cell to a first logic state by changing a respective resistance state of the memory bit cell, and compare a first current flowing through the memory bit cell with a first reference current; and a control logic circuit, coupled to the write circuit, and configured to determine whether the first logic state is successfully written into the memory bit cell based on a read-out of the first logic state and the comparison between the first current and first reference current.

Claim (Index 14):
The method of  claim 13 , wherein when the read-out of the first logic state is consistent with the first logic state, the method further comprises:\n ceasing providing the first voltage to the memory bit cell.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 88.0
- Lexical Diversity: 2.51064
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13974001', '14953866', '13761545', '10938014', '14308273']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.805323271346956
- 35 USC 102 Novelty (BERT): 0.4797741292688062
- Combined Prediction Score: 0.772768357139141
- Mean Citation Score: 185.861792
- Max Citation Score: 195.94127
- Similarity Product: 139.2701596599233

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test