PATENT CLAIM ANALYSIS

Application Number: 15988018
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-01
Patent Classification: ["438", "270000"]

Abstract:
A manufacturing method of a trench power semiconductor device is provided. The manufacturing method includes the steps of forming a protective layer on an epitaxial layer and forming a trench gate structure in a trench formed in an epitaxial layer. The trench gate structure includes a shielding electrode, a gate disposed on the shielding electrode and an inter-electrode dielectric layer disposed therebetween. The step of forming the trench gate structure includes forming an insulating layer covering an inner surface of the trench; and before the step of forming the inter-electrode dielectric layer, forming an initial spacing layer, the spacing layer including a first sidewall portion and a second sidewall portion, both of which include bottom end portions spaced apart from each other and extending portions protruding from the protective layer.

Claim (Index 11):
The manufacturing method of a trench power semiconductor device according to  claim 10 , wherein in the step of removing the extending portion, the protective layer is also removed

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 2.27869
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15975023', '15090966', '15005130', '14994250', '15186685']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8742572903531174
- 35 USC 102 Novelty (BERT): 0.5096266019836229
- Combined Prediction Score: 0.8377942215161679
- Mean Citation Score: 232.767146
- Max Citation Score: 257.19028
- Similarity Product: 167.40743900137662

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test