PATENT CLAIM ANALYSIS

Application Number: 16243634
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["455", "341000"]

Abstract:
A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.

Claim (Index 5):
A power amplifier module comprising:\n first and second power amplifying circuits coupled in parallel between an input node and an output node; and a bias supply circuit configured to supply a bias to the first and second power amplifying circuits, wherein the first power amplifying circuit is configured to:\n receive a first source voltage signal when the power amplifier module is operating in a first power mode, the first source voltage being time variable and correlated with an envelope signal of an input signal at the input node, and \n supply a second source voltage when the power amplifier module is operating in a second power mode, the second source voltage varying in proportion to an average power level of an output signal at the output node, and the second power mode being a lower power mode than the first power mode, and \n wherein the bias supply circuit is configured to:\n as a first operation, supply the bias to the first power amplifying circuit and not supply the bias to the second power amplifying circuit when the power amplifier module is operating in the first power mode, and \n as a second operation, supply the bias to the second power amplifying circuit and not supply the bias to the first power amplifying circuit when the power amplifier module is operating in the second power mode.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 99.0
- Lexical Diversity: 2.56667
- Patent Class: 455.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14369216', '15241991', '15403507', '15598608', '15720188']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8061886301027639
- 35 USC 102 Novelty (BERT): 0.5860611851729307
- Combined Prediction Score: 0.7841758856097806
- Mean Citation Score: 517.1529019999998
- Max Citation Score: 526.6980599999998
- Similarity Product: 431.8934414232372

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test