PATENT CLAIM ANALYSIS

Application Number: 15914944
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-04
Patent Classification: ["327", "530000"]

Abstract:
An integrated circuit comprises a timebase generator that comprises a linear feedback shift register (LFSR) and a switch mode direct current-to-direct current (DC-to-DC) voltage converter coupled to the timebase generator.

Claim (Index 14):
The integrated circuit of  claim 10 , wherein the timebase generator further comprises a digital divider, an input of the digital divider coupled to the output of the comparator and an output of the digital divider coupled to the clock input of the Fibonacci LFSR.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 90.0
- Lexical Diversity: 1.25
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12109354', '13737337', '13810036', '11233419', '13650588']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.773044271025496
- 35 USC 102 Novelty (BERT): 0.4705136398422468
- Combined Prediction Score: 0.7427912079071711
- Mean Citation Score: 168.53414400000003
- Max Citation Score: 174.6885
- Similarity Product: 131.92625952798127

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test