PATENT CLAIM ANALYSIS

Application Number: 15905828
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["711", "135000"]

Abstract:
A data backup method is provided. The data backup method includes maintaining a logical-to-physical table (L2P table) in a memory, where the L2P table records a plurality of physical addresses respectively corresponding to a plurality of first logical addresses and a plurality of trim marks; receiving a trim command, wherein the trim command indicates that data stored in one or more second logical addresses is invalid; according to the trim command, not clearing physical addresses respectively corresponding to the second logical addresses in the L2P table, and changing trim marks respectively corresponding to the second logical addresses from a first bit value to a second bit value; and when a predetermined condition is met, updating the L2P table according to the trim marks, and storing the updated L2P table into a rewritable non-volatile memory module.

Claim (Index 6):
A storage controller, used for controlling a storage device having a rewritable non-volatile memory module, the storage controller comprising:\n a connection interface circuit, coupled to a host system, wherein a plurality of logical addresses are configured to the host system; a memory interface control circuit, coupled to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module has a plurality of physical units, and the rewritable non-volatile memory module is configured with a plurality of physical addresses; and a processor, coupled to the connection interface circuit and the memory interface control circuit, wherein the processor maintains a first logical-to-physical table in a memory, wherein the first logical-to-physical table records a plurality of first trim marks respectively corresponding to the first logical addresses and a plurality of first physical addresses, among the physical addresses, respectively corresponding to the first logical addresses, wherein a preset value of the first trim marks is a first bit value, wherein the processor receives a trim command from the host system, wherein the trim command indicates that first data stored in a logical address section is invalid, wherein the logical address section comprises one or more second logical addresses, wherein the processor does not clear second physical addresses, among the first physical addresses of the first logical-to-physical table, respectively corresponding to the one or more the second logical addresses according to the trim command, and changes second trim marks, among the first trim marks, respectively corresponding to the one or more second logical addresses to a second bit value, wherein when a predetermined condition is met, the processor updates the first logical-to-physical table according to the first trim marks, and stores a second logical-to-physical table to the rewritable non-volatile memory module according to the updated first logical-to-physical table, wherein the second logical-to-physical table only includes the first physical addresses respectively corresponding to the first logical addresses of the updated first logical-to-physical table, and does not include the first trim marks.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 88.0
- Lexical Diversity: 2.3125
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15726353', '13860118', '15186549', '14149993', '13896328']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5628454584765165
- 35 USC 102 Novelty (BERT): 0.5313104073017823
- Combined Prediction Score: 0.5596919533590431
- Mean Citation Score: 319.191954
- Max Citation Score: 374.53387
- Similarity Product: 347.9285783558834

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test