PATENT CLAIM ANALYSIS

Application Number: 15951147
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-09
Patent Classification: ["257", "401000"]

Abstract:
A semiconductor device includes a semiconductor substrate, a gate structure, a source/drain region, a source/drain contact structure, a first dielectric layer, a first spacer, and a first connection structure. The gate structure is disposed on the semiconductor substrate. The source/drain region is disposed in the semiconductor substrate and disposed at a side of the gate structure. The source/drain contact structure is disposed on the source/drain region. The first dielectric layer is disposed on the source/drain contact structure and the gate structure. The first spacer is disposed in a first contact hole penetrating the first dielectric layer on the source/drain contact structure. The first connection structure is disposed in the first contact hole. The first connection structure is surrounded by the first spacer in the first contact hole, and the first connection structure is connected with the source/drain contact structure.

Claim (Index 4):
The semiconductor device according to  claim 3 , wherein the topmost surface of the first connection structure and the topmost surface of the first dielectric layer are coplanar.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 91.0
- Lexical Diversity: 4.52941
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14869987', '15665397', '14864881', '15176142', '14932993']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9280337042627852
- 35 USC 102 Novelty (BERT): 0.5033016244593999
- Combined Prediction Score: 0.8855604962824468
- Mean Citation Score: 244.45303200000004
- Max Citation Score: 261.22626
- Similarity Product: 190.2480736629832

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test