PATENT CLAIM ANALYSIS

Application Number: 16241143
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["438", "627000"]

Abstract:
Disclosed examples provide processes for fabricating a semiconductor product and for forming a patterned stack with an aluminum layer and a tungsten layer, including forming a first dielectric layer on a gate structure and on first and second regions of a substrate, forming a diffusion barrier layer on the first dielectric layer, forming a tungsten layer on the diffusion barrier layer, forming an aluminum layer on the tungsten layer, forming a hard mask on the aluminum layer, forming a patterned resist mask which covers the hard mask above the first region and exposes the hard mask layer above the second region, dry etching the hard mask and the aluminum layer above the second region using the patterned resist mask layer, removing the resist mask, and dry etching the tungsten layer using the hard mask layer to expose the first dielectric layer above the second region.

Claim (Index 19):
The semiconductor device of  claim 17 , wherein the gate structure is in the first region of the substrate.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 3.29787
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15928492', '14305969', '13398834', '14703556', '10246061']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8536031182990595
- 35 USC 102 Novelty (BERT): 0.5454477603803154
- Combined Prediction Score: 0.8227875825071852
- Mean Citation Score: 266.02227400000004
- Max Citation Score: 376.8924
- Similarity Product: 358.1961088490009

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test