PATENT CLAIM ANALYSIS

Application Number: 16137512
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-11
Patent Classification: ["257", "004000"]

Abstract:
In a shared three-dimensional vertical memory (3D-M v ), each horizontal address line comprises at least two regions: a lightly-doped region and a low-resistivity region. The lightly-doped region is formed around selected memory holes and shared by a plurality of low-leakage memory cells. The low-resistivity region forms a conductive network to reduce the resistance of the horizontal address line.

Claim (Index 19):
The semiconductor memory according to  claim 17 , wherein the total area of said first region is larger than said second region.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 97.0
- Lexical Diversity: 1.47727
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15947852', '15488489', '15919381', '15185004', '14884760']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.928972011566092
- 35 USC 102 Novelty (BERT): 0.5080351359589793
- Combined Prediction Score: 0.8868783240053808
- Mean Citation Score: 248.646154
- Max Citation Score: 274.2509
- Similarity Product: 195.8807216077805

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test