PATENT CLAIM ANALYSIS

Application Number: 15925835
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["257", "516000"]

Abstract:
Back end of the line precision resistors that allow for high currents and for configuration as an eFuse by embedding a single thin film high resistive metal material within a dielectric layer, wherein the resisters are coupled to sidewalls of adjacent metal interconnects are described. The resistors can be formed in the metal one (M1) dielectric layer and can be coupled to sidewalls of the M1 interconnects. Also described are processes for fabricating integrated circuits including the resistors and/or e-Fuses.

Claim (Index 12):
The process of  claim 10 , wherein depositing a metal conductor onto the dielectric layer comprises depositing a seed layer followed by electroplating the metal conductor onto the seed layer.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 90.0
- Lexical Diversity: 1.50877
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15268973', '12862599', '15474233', '10762962', '10453701']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9178007515754448
- 35 USC 102 Novelty (BERT): 0.5025163509030814
- Combined Prediction Score: 0.8762723115082084
- Mean Citation Score: 177.508984
- Max Citation Score: 186.70158
- Similarity Product: 109.80235151071072

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test