PATENT CLAIM ANALYSIS

Application Number: 15906588
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["365", "189140"]

Abstract:
The present disclosure relates to a structure which includes an assist circuit which is configured to add a boost voltage using a common boost logic device for both a read logic circuit and a write logic circuit of the assist circuit.

Claim (Index 8):
The structure of  claim 1 , wherein the common boost logic device is at least one NMOS transistor which is configured to control whether the boost voltage is added to the read logic circuit or the write logic circuit.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 88.0
- Lexical Diversity: 1.44828
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15891619', '14755557', '14077559', '15903826', '15798764']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8288637831181773
- 35 USC 102 Novelty (BERT): 0.5041510153364899
- Combined Prediction Score: 0.7963925063400087
- Mean Citation Score: 272.718366
- Max Citation Score: 285.612
- Similarity Product: 200.6378124639988

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test