PATENT CLAIM ANALYSIS

Application Number: 16060042
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["365", "158000"]

Abstract:
A magnetic wall utilization-analog memory element includes a magnetic wall driving layer including a magnetic wall, a first region, a second region, and a third region located between the first region and the second region, a magnetization fixed layer provided at a the third region through a nonmagnetic layer, and a lower electrode layer provided at a position in the third region that overlaps the magnetization fixed layer in plan view on a second surface opposite to a first surface on which the magnetization fixed layer is provided.

Claim (Index 11):
A volatile logic circuit comprising a magnetic wall utilization analog memory on which the magnetic wall utilization-analog memory element according to  claim 1 , and an STT-MRAM,\n wherein the circuit has a memory function and a logical function, and as the memory function, comprises the magnetic wall utilization analog memory and the STT-MRAM.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 94.0
- Lexical Diversity: 2.29268
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15781836', '16079436', '15945119', '12670462', '12864056']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.780849173111561
- 35 USC 102 Novelty (BERT): 0.5245307870846599
- Combined Prediction Score: 0.7552173345088709
- Mean Citation Score: 286.073214
- Max Citation Score: 355.3606
- Similarity Product: 341.3967836508393

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test