PATENT CLAIM ANALYSIS

Application Number: 15768305
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["327", "157000"]

Abstract:
Disclosed is a phase-locked loop having a high bandwidth using the rising edge and falling edge of a signal. The disclosed phase-locked loop controls the frequency of a voltage control oscillator by comparing both a phase difference between rising edge of a reference signal and rising edge of a feedback signal and a phase difference between falling edge of the reference signal and falling edge of the feedback signal.

Claim (Index 9):
The phase-locked loop of  claim 8 , wherein the proportional signal path comprises a proportional signal circuit A and a proportional signal circuit B that have the same structure, and the integrated signal path comprises an integrated signal circuit A and an integrated signal circuit B that have the same structure,\n wherein the proportional signal circuit A is connected with the charge pump A 1  and the charge pump B 1 , the proportional signal circuit B is connected with the charge pump A 2  and the charge pump B 2 , the integrated signal circuit A is connected with the charge pump A 3  and the charge pump B 3 , and the integrated signal circuit B is connected with the charge pump A 4  and the charge pump B 4 .

Metadata:
- Claim Count in Document: 11.0
- Percentile: 91.0
- Lexical Diversity: 2.21875
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15779119', '15151198', '14718677', '13870742', '10717778']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8020614941754063
- 35 USC 102 Novelty (BERT): 0.5055382736966547
- Combined Prediction Score: 0.7724091721275312
- Mean Citation Score: 259.790224
- Max Citation Score: 271.93344
- Similarity Product: 184.55468561279287

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test