PATENT CLAIM ANALYSIS

Application Number: 16044949
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["323", "315000"]

Abstract:
A regulator circuit and its manufacturing method are presented, relating to semiconductor technology. The regulator circuit comprises a mirror current source comprising two current output nodes; a depletion MOS transistor comprising a drain connected to one current output node of the mirror current source, a gate connected to the ground, and a source; an enhancement MOS transistor comprising a drain connected to the other current output node of the mirror current source, and a source connected to the ground; a first resistance device comprising a first node connected to the drain of the depletion MOS transistor, and a second node connected to a gate of the enhancement MOS transistor; and a second resistance device comprising a first node connected to the first resistance device, and a second node connected to the ground. This regulator circuit consumes less power than its conventional counterparts.

Claim (Index 7):
The method of  claim 5 , further comprising:\n connecting a drain of a regulator to a power source; connecting a gate of the regulator to the drain of the depletion MOS transistor; connecting a source of the regulator to the first node of the first resistance device; connecting a first node of a capacitance device to the gate of the regulator; and connecting a second node of the capacitance device to the source of the regulator.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 95.0
- Lexical Diversity: 3.03922
- Patent Class: 323.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13196983', '12962698', '11645612', '13010124', '15951772']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.736394458444684
- 35 USC 102 Novelty (BERT): 0.490752087729676
- Combined Prediction Score: 0.7118302213731832
- Mean Citation Score: 233.145554
- Max Citation Score: 259.3034
- Similarity Product: 202.0849937209368

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test