PATENT CLAIM ANALYSIS

Application Number: 16020428
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-11
Patent Classification: ["257", "774000"]

Abstract:
One or more embodiments of techniques or systems for forming a semiconductor structure are provided herein. A first metal region is formed within a first dielectric region. A cap region is formed on the first metal region. A second dielectric region is formed above the cap region and the first dielectric region. A trench opening is formed within the second dielectric region. A via opening is formed through the second dielectric region, the cap region, and within some of the first metal region by over etching. A barrier region is formed within the trench opening and the via opening. A via plug is formed within the via opening and a second metal region is formed within the trench opening. The via plug electrically connects the first metal region to the second metal region and has a tapered profile.

Claim (Index 5):
The semiconductor structure of  claim 4 , wherein a top surface of the barrier feature is substantially coplanar with a top surface of the cap feature.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 94.0
- Lexical Diversity: 3.10417
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13855812', '15898706', '15277100', '14212872', '15993970']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9173506041158184
- 35 USC 102 Novelty (BERT): 0.5095221188683239
- Combined Prediction Score: 0.876567755591069
- Mean Citation Score: 186.050784
- Max Citation Score: 266.9572
- Similarity Product: 183.26613714885707

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test