PATENT CLAIM ANALYSIS

Application Number: 16113037
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-06
Patent Classification: ["327", "536000"]

Abstract:
An electronic device includes: a clock booster including a doubler capacitor, the clock booster configured to precharge the doubler capacitor and provide a boosted intermediate voltage greater than an input voltage; a secondary booster including a booster capacitor, the secondary booster configured to use the voltage stored on the doubler capacitor to generate a stage output greater than the boosted intermediate voltage; and a connecting switch connected to the clock booster and the secondary booster, the connecting switch configured to electrically connect the doubler capacitor and the booster capacitor during a direct charging duration for charging the booster capacitor using source-secondary current from an input voltage supply instead of or in addition to the voltage stored on the doubler capacitor.

Claim (Index 12):
The method of  claim 11 , further comprising driving the clock master signal to the low state after the direct charging duration for operating the source switch including an NMOS device.

Metadata:
- Claim Count in Document: 22.0
- Percentile: 96.0
- Lexical Diversity: 2.35185
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15849098', '15849137', '16022444', '15849052', '11033184']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7969056313967046
- 35 USC 102 Novelty (BERT): 0.5335276403991843
- Combined Prediction Score: 0.7705678322969525
- Mean Citation Score: 313.262556
- Max Citation Score: 383.2484
- Similarity Product: 270.7254960120678

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test