PATENT CLAIM ANALYSIS

Application Number: 16026006
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-04
Patent Classification: ["257", "347000"]

Abstract:
A silicon-on-insulator (SOI) CMOS transistor and a SOI heterojunction bipolar transistor (HBT) are fabricated on the same semiconductor substrate. First and second SOI regions are formed over the semiconductor substrate. A SOI CMOS transistor is fabricated in the first SOI region, and a collector region of the SOI HBT is fabricated in the second SOI region. The collector region can be formed by performing a first implant to a local collector region in the second SOI region, and performing a second implant to an extrinsic collector region in the second SOI region, wherein the extrinsic collector region is separated from the local collector region. A SiGe base is formed over the collector region, wherein a dielectric structure separates portions of the SiGe region and the extrinsic collector region. The SOI CMOS transistor and SOI HBT may be used to implement a front end module of an RF system.

Claim (Index 7):
The method of  claim 6 , wherein the second implant also introduces an impurity of the first conductivity type into the collector contact region, which is continuous with the extrinsic collector region.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 95.0
- Lexical Diversity: 2.74576
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15727159', '10708743', '14709579', '12099437', '12557557']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9377072422379468
- 35 USC 102 Novelty (BERT): 0.5683325729811173
- Combined Prediction Score: 0.900769775312264
- Mean Citation Score: 319.433672
- Max Citation Score: 479.13196
- Similarity Product: 360.475231181028

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test