PATENT CLAIM ANALYSIS

Application Number: 16170765
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-06
Patent Classification: ["341", "143000"]

Abstract:
Disclosed is a successive approximation register (SAR) quantizer and a continuous-time sigma-delta modulator (CTSDM) using the SAR quantizer. The SAR quantizer is capable of generating M highly-significant bits as a digital output signal, and generating L lowly-significant bit(s) for the execution of noise shaping operation. Therefore, the SAR quantizer and the CTSDM can reduce the demand for the circuit area of a digital-to-analog converter and lower the delay of a critical path, so as to improve the performance and cut the cost.

Claim (Index 11):
The CTSDM of  claim 10 , wherein the digital input signal includes B highly-significant bit(s) and Q lowly-significant bit(s), the DEM circuit is configured to output a part of the digital input signal according to the B highly-significant bit(s) and directly output the Q lowly-significant bit(s) as the other part of the digital input signal, in which both the B and the Q are positive integers and a sum of the B and the Q is equal to the M.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 97.0
- Lexical Diversity: 1.66667
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15499872', '15069951', '15049933', '11679388', '12723680']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6276798132281466
- 35 USC 102 Novelty (BERT): 0.493014682999735
- Combined Prediction Score: 0.6142133002053054
- Mean Citation Score: 229.421768
- Max Citation Score: 232.33641
- Similarity Product: 185.08358429656505

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test