PATENT CLAIM ANALYSIS

Application Number: 15859756
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["257", "334000"]

Abstract:
A semiconductor device and a manufacturing method thereof are provided. The method includes providing a substrate, a plurality of word lines and a plurality of bit lines, and then forming a storage node contact on each source/drain region, so that a width of a top surface of each storage node contact in a direction is less than a width of a bottom surface of each storage node contact.

Claim (Index 9):
The manufacturing method of the semiconductor device according to  claim 7 , wherein the step of forming the insulation blocks comprises:\n depositing an insulation layer on the dielectric blocks and the bit lines, wherein the first through holes are filled with the insulation layer; and performing an etching process for etching the insulation layer till the dielectric blocks are exposed and forming the insulation blocks, wherein each of the insulation blocks has an upside-down ladder shape in the second direction.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 1.78049
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11134476', '10849000', '11376518', '12692197', '14973649']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.926354013011493
- 35 USC 102 Novelty (BERT): 0.4917486595526089
- Combined Prediction Score: 0.8828934776656046
- Mean Citation Score: 205.829274
- Max Citation Score: 215.11238
- Similarity Product: 151.97949794103388

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test