PATENT CLAIM ANALYSIS

Application Number: 15927494
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-08
Patent Classification: ["257", "712000"]

Abstract:
A device with thermal control is presented. In some embodiments, the device includes a plurality of die positioned in a stack, each die including a chip, interconnects through a thickness of the chip, metal features of electrically conductive composition connected to the interconnects on a bottom side of the chip, and adhesive or underfill layer on the bottom side of the chip. At least one thermally conducting layer, which can be a pyrolytic graphite layer, a layer formed of carbon nanotubes, or a graphene layer, is coupled between a top side of one of the plurality of die and a bottom side of an adjoining die in the stack. A heat sink can be coupled to the thermally conducting layer.

Claim (Index 10):
The device of  claim 1 , wherein the interconnects form signal posts and thermal posts, the signal posts on the top of each die being electrically isolated from the thermally conducting layer and the thermal posts being directly coupled to the thermally conducting layer.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 90.0
- Lexical Diversity: 2.11111
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14639942', '11464784', '15149834', '14201473', '14213890']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9002957221022598
- 35 USC 102 Novelty (BERT): 0.5238251852820482
- Combined Prediction Score: 0.8626486684202387
- Mean Citation Score: 183.54219
- Max Citation Score: 299.1315600000001
- Similarity Product: 211.9444713407636

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test