PATENT CLAIM ANALYSIS

Application Number: 15773536
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "616000"]

Abstract:
Embodiments of the present invention are directed to dual threshold voltage (VT) channel devices and their methods of fabrication. In an example, a semiconductor device includes a gate stack disposed on a substrate, the substrate having a first lattice constant. A source region and a drain region are formed on opposite sides of the gate electrode. A channel region is disposed beneath the gate stack and between the source region and the drain region. The source region is disposed in a first recess having a first depth and the drain region disposed in a second recess having a second depth. The first recess is deeper than the second recess. A semiconductor material having a second lattice constant different than the first lattice constant is disposed in the first recess and the second recess.

Claim (Index 5):
The semiconductor device of  claim 1  wherein the semiconductor substrate is a silicon monocrystalline substrate and wherein said semiconductor material is silicon germanium.

Metadata:
- Claim Count in Document: 48.0
- Percentile: 93.0
- Lexical Diversity: 2.48276
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15134093', '13996503', '13749139', '13629148', '13629178']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9192305995940252
- 35 USC 102 Novelty (BERT): 0.4641443631998635
- Combined Prediction Score: 0.8737219759546091
- Mean Citation Score: 169.87044200000005
- Max Citation Score: 170.85756
- Similarity Product: 139.53932538788794

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test