PATENT CLAIM ANALYSIS

Application Number: 15869917
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "203000"]

Abstract:
A semiconductor device includes a semiconductor column including a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductive region. A gate electrode is disposed to cover the intrinsic region, and a gate insulating layer is disposed between the gate electrode and the intrinsic region. The semiconductor device may operate as a switch or a volatile memory according to a gate voltage applied to a gate and a drain voltage applied to a drain.

Claim (Index 13):
A volatile memory device comprising:\n a substrate having a placement plane defined by a first direction and a second direction perpendicular to the first direction; source lines extending on the substrate in the second direction parallel to each other; semiconductor columns periodically disposed on the source line and extending perpendicular to the placement plane of the substrate; wordlines disposed to cover side surface of the semiconductor columns arranged in the first direction and extending in the first direction; a gate insulating layer disposed between the semiconductor column and the wordline to cover a side surface of the semiconductor column; gate isolation layers extending in the first direction and filling spaces between the wordlines; and bitlines extending in the second direction while being in contact with top surfaces of the semiconductor columns arranged in the second direction, wherein: the semiconductor column includes a first conductive region of first conductivity type, a second conductive region of second conductivity type, an intrinsic region disposed between the first conductive region and the second conductive region, and a barrier region of the first conductivity type disposed between the intrinsic region and the second conductivity type, the first conductive region is in contact with the source line, and the second conductive region is in contact with the bitline.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 2.80952
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15185388', '15870092', '15394584', '11433753', '11261729']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9202057968749728
- 35 USC 102 Novelty (BERT): 0.5356278764004253
- Combined Prediction Score: 0.881748004827518
- Mean Citation Score: 271.37967000000003
- Max Citation Score: 377.8438
- Similarity Product: 322.45743611953264

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test