PATENT CLAIM ANALYSIS

Application Number: 16037095
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "394000"]

Abstract:
A MOS transistor is produced on and in an active zone which includes a source region and a drain region. The active zone is surrounded by an insulating region. A conductive gate region of the transistor has two flanks which extend transversely to a source-drain direction, and the conductive gate region overlaps two opposite edges of the active zone act overlap zones. The conductive gate region includes, at a location of at least one overlap zone, at least one conductive tag which projects from at least one flank at a foot of the conductive gate region. The conductive tag covers a part of the active zone and a part of the insulating region.

Claim (Index 4):
The integrated circuit according to  claim 1 , wherein the conductive gate region includes a pair of conductive tags projecting perpendicularly from opposite flanks of the central zone.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 95.0
- Lexical Diversity: 2.32692
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16036240', '15804669', '15230699', '14027570', '15041593']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9059744818400496
- 35 USC 102 Novelty (BERT): 0.5045057871619284
- Combined Prediction Score: 0.8658276123722375
- Mean Citation Score: 187.291552
- Max Citation Score: 233.95917000000003
- Similarity Product: 153.24899501830103

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test