PATENT CLAIM ANALYSIS

Application Number: 15901715
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["710", "313000"]

Abstract:
A driver of a host bus adapter of a storage controller performs hardware resets of buses and other logic to which an embedded port of the host bus adapter is connected, in a first period of quiescing of I/O operations in the embedded port. The driver transmits one or more commands to the embedded port to resume selected I/O operations in the embedded port. A reinitialization of the driver is performed during a second period of quiescing of I/O operations in the embedded port, prior to sending a command to allow normal I/O operations in the embedded port.

Claim (Index 30):
The system of  claim 26 , wherein the second set of commands further comprises sending a message to the embedded port to terminate any remaining exchanges including operations to:\n send an abort sequence (ABTS) for every open exchange without sending response messages to the driver; not send any ABTS to host systems that have been indicated in port control block to not receive any ABTS; access host memory for offloaded exchanges to determine state information; and relinquish control of all buffer and I/O control block (IOCB) resources associated with the driver.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 88.0
- Lexical Diversity: 2.10204
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14870393', '14870410', '14870554', '14870385', '14870569']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7589596497225722
- 35 USC 102 Novelty (BERT): 0.6244633941267279
- Combined Prediction Score: 0.7455100241629877
- Mean Citation Score: 434.929724
- Max Citation Score: 585.70026
- Similarity Product: 552.2211327514743

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test