PATENT CLAIM ANALYSIS

Application Number: 15873215
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-10
Patent Classification: ["257", "329000"]

Abstract:
A method of forming vertical fin field effect transistors, including, forming a silicon-germanium cap layer on a substrate, forming at least four vertical fins and silicon-germanium caps from the silicon-germanium cap layer and the substrate, where at least two of the at least four vertical fins is in a first subset and at least two of the at least four vertical fins is in a second subset, forming a silicon-germanium doping layer on the plurality of vertical fins and silicon-germanium caps, removing the silicon-germanium doping layer from the at least two of the at least four vertical fins in the second subset, and removing the silicon-germanium cap from at least one of the at least two vertical fins in the first subset, and at least one of the at least two vertical fins in the second subset.

Claim (Index 18):
The plurality of vertical fin field effect transistors of  claim 16 , wherein at least one of the vertical fins has a threshold voltage in the range of about 100 mV to about 250 mV, and at least one of the vertical fins has a threshold voltage in the range of about 250 mV to about 500 mV.

Metadata:
- Claim Count in Document: 48.0
- Percentile: 86.0
- Lexical Diversity: 3.94595
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15492615', '15416281', '15488089', '15339072', '15450715']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9336854219918422
- 35 USC 102 Novelty (BERT): 0.5512775257746166
- Combined Prediction Score: 0.8954446323701197
- Mean Citation Score: 321.6191740000001
- Max Citation Score: 456.05243
- Similarity Product: 274.03594957830313

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test