PATENT CLAIM ANALYSIS

Application Number: 16026880
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["257", "321000"]

Abstract:
A method for fabricating a semiconductor device including a gate-all-around based non-volatile memory device includes forming gate-all-around field effect transistor (GAA FET) channels, depositing tunnel dielectric material around the GAA FET channels to isolate the GAA FET channels, forming a floating gate, including depositing first gate material over the isolated GAA FET channels, and forming at least one control gate, including depositing second gate material over the isolated GAA FET channels.

Claim (Index 4):
The method of  claim 3 , wherein forming the GAA FET channels further includes:\n removing the buffer layer; forming an interlevel dielectric (ILD) layer on the substrate to create a bottom isolation layer; and selectively etching the stack to form the GAA FET channels.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 95.0
- Lexical Diversity: 1.83721
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15947411', '15331440', '15149722', '15977949', '13745770']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9259752534347814
- 35 USC 102 Novelty (BERT): 0.517713488088234
- Combined Prediction Score: 0.8851490769001267
- Mean Citation Score: 241.109178
- Max Citation Score: 293.37134
- Similarity Product: 190.56084630327464

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test