PATENT CLAIM ANALYSIS

Application Number: 16230539
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["257", "774000"]

Abstract:
A semiconductor device, and a method of forming the device, are provided. The semiconductor device includes a first die having a first plurality of contact pads and a second die having a second plurality of contact pads. A substrate is bonded to a first contact pad of the first plurality of contact pads and a first contact pad of the second plurality of contact pads in a face-to-face orientation with the first die and the second die. A first through via extends through the substrate. Molding material is interposed between the first die, the second die and the substrate, the molding material extending along sidewalls of the first die, the second die, and the substrate. A second through via is positioned over a second contact pad of the first plurality of contact pads, the second through via extending through the molding material.

Claim (Index 14):
A method comprising:\n positioning a first die and a second die on a carrier substrate; bonding a first substrate to the first die and the second die, the first substrate being connected in a face-to-face connection with the first die and the second die, the first substrate comprising a first through-substrate via; forming a molding material along sidewalls of the first die, the second die, and the first substrate, the molding material covering the first substrate; after forming the molding material, forming an opening in the molding material over the first die; forming a first through-mold via in the opening so that the first through-mold via extends through the molding material to the first die, wherein after forming the first through-mold via, surfaces of the first through-mold via, the molding material, the first substrate, and the first through-substrate via being level; forming a first external connector over and directly contacting the first through-mold via, the first external connector comprising a first solder portion; and forming a second external connector over and directly contacting the first through-substrate via, the second external connector comprising a second solder portion.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 98.0
- Lexical Diversity: 3.52273
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14928844', '14304331', '13691536', '14871593', '16227725']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9015166577393214
- 35 USC 102 Novelty (BERT): 0.4917566906963327
- Combined Prediction Score: 0.8605406610350226
- Mean Citation Score: 210.098336
- Max Citation Score: 259.03485
- Similarity Product: 235.72264667427245

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test