PATENT CLAIM ANALYSIS

Application Number: 15953829
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["365", "148000"]

Abstract:
A resistive random access memory with superior area efficiency and higher reliability is provided. The resistive random access memory RRAM in the present invention includes a memory array, which includes a plurality of memory cells MC arranged in rows and columns. Each memory cell MC includes a variable resistive element and an access transistor. Gates of the access transistors in a column are connected to a word line WL. First electrodes of the variable resistive element in a row are connected to a bit line BL. Second electrodes of the variable resistive element in the row are connected to a source line SL. The source line SL includes a local source line  250 , which extends in a direction that is orthogonal to the bit lines BL 0 /BL 1 /BL 2 /BL 3  and is shared by the bit lines BL 0 /BL 1 /BL 2 /BL 3.

Claim (Index 7):
The resistive memory as claimed in  claim 6 ,\n wherein the first switch circuit connects unselected bit lines among the 2m bit lines to the global source line and disconnects a selected bit line among the 2m bit lines from the global source line, and wherein the second switch circuit connects the selected bit line among the 2m bit lines to the global bit line and disconnects the unselected bit lines among the 2m bit lines from the global bit line.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 91.0
- Lexical Diversity: 2.24286
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10729718', '11844511', '14979459', '14979458', '14316936']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8302363894271402
- 35 USC 102 Novelty (BERT): 0.5027624394024673
- Combined Prediction Score: 0.7974889944246729
- Mean Citation Score: 264.280646
- Max Citation Score: 281.59686
- Similarity Product: 198.5010244911504

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test