PATENT CLAIM ANALYSIS

Application Number: 16126562
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-05
Patent Classification: ["257", "324000"]

Abstract:
A vertical memory device includes a gate electrode structure on a substrate, and a channel. The gate electrode structure includes gate electrodes spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate. The channel extends through the gate electrode structure in the vertical direction on the substrate. The channel includes a first portion having a slanted sidewall with respect to the upper surface of the substrate and a second portion contacting an upper surface of the first portion and having a slanted sidewall with respect to the upper surface of the substrate. A width of an upper surface of the second portion is less than a width of the upper surface of the first portion. An impurity region doped with carbon or p-type impurities is formed at an upper portion of the substrate. The channel contacts the impurity region.

Claim (Index 15):
A vertical memory device, comprising:\n a substrate including an impurity region doped with carbon or p-type impurities; a channel structure on the substrate,\n the channel structure including a lower channel on an upper surface of the impurity region of the substrate and an upper channel contacting an upper surface of the lower channel, \n the lower channel having a slanted sidewall with respect to an upper surface of the substrate, \n the lower channel having a pillar shape, \n the upper channel having a slanted sidewall with respect to the upper surface of the substrate, and \n the upper channel having a hollow cylindrical shape; \n a charge storage structure covering an outer sidewall of the upper channel, a width of an upper surface of the charge storage structure being less than a maximum width of the lower channel; and a gate electrode structure on the substrate,\n the gate electrode structure including gate electrodes spaced apart from each other in a vertical direction substantially perpendicular to the upper surface of the substrate, each of the gate electrodes covering an outer sidewall of the channel structure or the charge storage structure.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 97.0
- Lexical Diversity: 2.67241
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16118647', '14601496', '12620923', '15155732', '15610923']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9036360524756945
- 35 USC 102 Novelty (BERT): 0.5130158281134388
- Combined Prediction Score: 0.8645740300394689
- Mean Citation Score: 239.539354
- Max Citation Score: 259.13647000000003
- Similarity Product: 172.36831111656906

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test