PATENT CLAIM ANALYSIS

Application Number: 16046369
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "392000"]

Abstract:
A method of forming a semiconductor device includes receiving a substrate with a plurality of gate structures; forming spacers on sidewalls of the gate structures; evaluating a pitch variation to the gate structures; determining an etch recipe according to the pitch variation; performing an etch process to source/drain regions associated with the gate structures using the etch recipe, thereby forming source/drain recesses with respective depths; and performing an epitaxy growth to form source/drain features in the source/drain recesses using a semiconductor material.

Claim (Index 16):
The semiconductor structure of  claim 15 , wherein the first field effect transistors are portions of static random access memory devices, and\n wherein the second field effect transistors are portions of logic devices, wherein the first pitch is less than 100 nm and the second pitch is greater than 100 nm.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 95.0
- Lexical Diversity: 1.89362
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15286795', '15635308', '15276475', '14456241', '15663089']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9204019698723552
- 35 USC 102 Novelty (BERT): 0.488459463669611
- Combined Prediction Score: 0.8772077192520809
- Mean Citation Score: 183.497486
- Max Citation Score: 195.48825
- Similarity Product: 137.23076329462228

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test