PATENT CLAIM ANALYSIS

Application Number: 15986531
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["365", "185050"]

Abstract:
A split memory bank may comprise a number of memory matrices forming a memory bank and a shift register in which the shift register physically separates the matrices. An integrated circuit may comprise a number of shift registers and a plurality of memory matrices forming a memory bank in which the matrices are spatially separated by the shift register. An integrated printhead may comprise a number of memory banks each comprising a plurality of memory matrices and a number of shift registers in which each shift register spatially separates a number of the matrices.

Claim (Index 6):
The split memory bank of  claim 1 , in which the two groups of 4 electrical connections run perpendicular to the group of 8 electrical connection outputs and electrically couple to corresponding row select inputs on the number of matrices.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 93.0
- Lexical Diversity: 2.93939
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15327927', '12867822', '15114823', '16095001', '15489272']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7910814606822246
- 35 USC 102 Novelty (BERT): 0.5002475089709394
- Combined Prediction Score: 0.7619980655110961
- Mean Citation Score: 173.77946799999995
- Max Citation Score: 292.1276
- Similarity Product: 264.7164868315457

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test