PATENT CLAIM ANALYSIS

Application Number: 16184794
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["327", "115000"]

Abstract:
Described is an apparatus for clock synchronization. The apparatus comprises a pair of interconnects; a first die including a first phase interpolator having an output coupled to one of the interconnects; and a second die, wherein the pair of interconnects is to couple the first die to the second die.

Claim (Index 3):
The apparatus of  claim 1 , wherein the clock synchronization circuit includes:\n a clock generator; a I/Q phase generator coupled to the clock generator; a phase interpolator coupled to a output of the I/Q phase generator; and a phase detector having an input coupled to an output of the phase interpolator.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 98.0
- Lexical Diversity: 1.77419
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15214364', '16102113', '15064799', '14059366', '11112162']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7309659231822501
- 35 USC 102 Novelty (BERT): 0.5461871435612916
- Combined Prediction Score: 0.7124880452201543
- Mean Citation Score: 197.455896
- Max Citation Score: 390.76187
- Similarity Product: 313.75454373648466

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test