PATENT CLAIM ANALYSIS

Application Number: 16249733
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-07
Patent Classification: ["326", "038000"]

Abstract:
A buffered multiplexer includes a multiplexer having N multiplexer inputs each input selectively coupleable to a single multiplexer output. A non-inverting buffer has an input coupled to the multiplexer output and an output forming the output node of the buffered multiplexer. At least one vertical resistor is coupled between the input and the output of the non-inverting buffer.

Claim (Index 11):
A buffered multiplexer comprising:\n a multiplexer having N multiplexer inputs each input selectively coupleable to a single multiplexer output; a non-inverting buffer having an input and an output, the input coupled to the multiplexer output; a first parallel circuit including a first pair of vertical resistors connected in parallel, a first end of the first parallel circuit coupled to the output of the non-inverting buffer; a second parallel circuit including a second pair of vertical resistors connected in parallel, a first end of the second parallel circuit coupled to the input of the non-inverting buffer; a second end of the first parallel circuit coupled to the second end of the second parallel circuit.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 99.0
- Lexical Diversity: 1.84848
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13785742', '11040731', '14790959', '11541986', '11454315']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6489754948682123
- 35 USC 102 Novelty (BERT): 0.4645826755006919
- Combined Prediction Score: 0.6305362129314602
- Mean Citation Score: 168.4103
- Max Citation Score: 172.15286
- Similarity Product: 131.33299438546422

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test