PATENT CLAIM ANALYSIS

Application Number: 15749293
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["349", "106000"]

Abstract:
The disclosure provides the COA-type array substrate, which is realized by all or part of the outer edge of the color-resisting units are located on the first metal layer and/or the second metal layer, which is used for padding to reduce the topography difference at the outer edge position of the color-resisting units, so that the thickness of the photoresist coated on which is reduced to be easily removed by the exposure and development when the transparent conductive layer is patterned; in addition, both the first metal layer and the second metal layer have a reflective property, so that the exposure effect can be enhanced and the photoresist coated on which; the COA-type array substrate of the disclosure can eliminate or reduce the metal oxide residue at which through the above two effects and prevent the electrical signal of the pixel electrode from being uncontrollable.

Claim (Index 1):
A COA-type array substrate, comprises a substrate, a TFT layer disposed on the substrate, a color-resisting layer disposed on the TFT layer, and a transparent conductive layer disposed on the color-resisting layer;\n the transparent conductive layer comprises a plurality of pixel electrodes set at intervals and arranged in an array, a first light-shielding common electrode located in an interval area of the plurality of pixel electrodes without connected to the plurality of pixel electrodes; the color-resisting layer comprises a plurality of color-resisting units set at intervals, the plurality of color-resisting units respectively correspond to a top and bottom sides of the plurality of pixel electrodes, and outer edges of the plurality of color-resisting units respectively extend beyond outer edges of the plurality of pixel electrodes; the TFT layer comprises a first metal layer disposed on the substrate, a gate insulating layer disposed on the first metal layer, an active layer disposed on the gate insulating layer, a second metal layer on the active layer, and a passivation layer on the second metal layer; the first metal layer comprises a gate, a scan line and a second light-shielding common electrode; the second metal layer comprises a source, a drain and a data line; and the second light-shielding common electrode comprises a frame-shaped electrode arranged along a periphery of the pixel electrode; and all or part of the outer edges of the color-resisting units are located on the first metal layer and/or the second metal layer.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 86.0
- Lexical Diversity: 1.9125
- Patent Class: 349.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15323975', '14786164', '14411919', '14408004', '15508796']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8565361009751834
- 35 USC 102 Novelty (BERT): 0.4945994531514681
- Combined Prediction Score: 0.8203424361928119
- Mean Citation Score: 238.01054400000004
- Max Citation Score: 256.91675
- Similarity Product: 202.55540001542863

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test