PATENT CLAIM ANALYSIS

Application Number: 16015392
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-11
Patent Classification: ["257", "407000"]

Abstract:
A gate structure includes at least one spacer defining a gate region over a semiconductor substrate, a gate dielectric layer disposed on the gate region over the semiconductor substrate, a first work function metal layer disposed over the gate dielectric layer and lining a bottom surface of an inner sidewall of the spacer, and a filling metal partially wrapped by the first work function metal layer. The filling metal includes a first portion and a second portion, wherein the first portion is between the second portion and the semiconductor substrate, and the second portion is wider than the first portion.

Claim (Index 2):
The gate structure of  claim 1 , comprising:\n a protection layer over the filling metal.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 94.0
- Lexical Diversity: 2.37778
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15293259', '15793521', '15135476', '13564792', '15467643']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9041816867341044
- 35 USC 102 Novelty (BERT): 0.4966679268085673
- Combined Prediction Score: 0.8634303107415507
- Mean Citation Score: 158.46251
- Max Citation Score: 212.98546
- Similarity Product: 140.68731672877792

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test