PATENT CLAIM ANALYSIS

Application Number: 15997029
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["341", "156000"]

Abstract:
A comparator includes a first comparison block suitable for accumulating a difference value between a voltage of a pixel signal and a coarse step voltage, and outputting a residue voltage, representing a difference between a coarse ramping voltage of a ramp signal and the accumulated difference value; and a second comparison block suitable for comparing a fine ramping voltage to the residue voltage of the first comparison block and outputting a third comparison result signal.

Claim (Index 7):
A complementary metal oxide semiconductor (CMOS) image sensor, comprising:\n a pixel array suitable for outputting a pixel signal corresponding to an incident light; a row decoder suitable for selecting and controlling pixels of the pixel array row by row according to a control signal of a controller; a ramp signal generator suitable for generating a coarse ramping signal and a fine ramping signal according to the control signal of the controller; a first comparison block suitable for accumulating a difference value between a voltage of a pixel signal and a coarse step voltage, and outputting a residue voltage, representing a difference between a coarse ramping voltage of a ramp signal and the accumulated difference value; a second comparison block suitable for comparing a fine ramping voltage to the residue voltage outputted from the first comparison block and outputting a third comparison result signal; a counter suitable for counting a clock of the controller according to a first comparison signal outputted from the first comparison block and a second comparison signal outputted from the second comparison block; a memory suitable for storing counting information of the counter according to the control signal of the controller; a column read-out circuit suitable for outputting data stored in the memory according to the control signal of the controller; and the controller suitable for controlling operations of the row decoder, the ramp signal generator, the first comparison block, the second comparison block, the counter, the memory and the column read-out circuit wherein the second comparison block is serially coupled to the first comparison block.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 94.0
- Lexical Diversity: 2.19444
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15996987', '14816982', '14816955', '15902584', '13270968']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6239959255622319
- 35 USC 102 Novelty (BERT): 0.5595139227673468
- Combined Prediction Score: 0.6175477252827435
- Mean Citation Score: 307.262814
- Max Citation Score: 419.79202
- Similarity Product: 388.9984936382008

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test