PATENT CLAIM ANALYSIS

Application Number: 15866915
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["257", "072000"]

Abstract:
A transistor display panel includes a substrate, a gate line disposed on the substrate, a data line disposed on the substrate, and a transistor disposed on the substrate. The transistor includes a first electrode, a second electrode overlapping the first electrode, a semiconductor layer disposed between the first electrode and the second electrode, and a gate electrode. The semiconductor layer is disposed in an overlapping region where the gate line and the data line overlap each other.

Claim (Index 16):
The transistor display panel of  claim 14 , wherein the semiconductor layer includes a central portion and a peripheral portion extending away from the central portion, wherein the central portion has an incline and the peripheral portion is substantially horizontal, and the second contact hole overlaps the peripheral portion, but does not overlap the central portion.

Metadata:
- Claim Count in Document: 42.0
- Percentile: 86.0
- Lexical Diversity: 2.6875
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13419154', '13173457', '12823043', '15069239', '14838055']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9299070689759298
- 35 USC 102 Novelty (BERT): 0.5074520116727465
- Combined Prediction Score: 0.8876615632456115
- Mean Citation Score: 256.849638
- Max Citation Score: 259.48322
- Similarity Product: 174.37149964309933

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test