PATENT CLAIM ANALYSIS

Application Number: 16238092
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["327", "156000"]

Abstract:
A PFD outputs a detection signal based on a phase difference or a frequency difference between a reference signal and a feedback signal, a charge pump circuit outputs a pulse signal based on the detection signal, and a loop filter outputs a control voltage based on the pulse signal. A VCO includes a ring oscillator where a plurality of delay element units, which include a plurality of delay elements (for example, inverter circuits) connected in parallel, are connected in series in a ring, controls the frequency of the output signal of the ring oscillator based on the control voltage, and controls the phase of the output signal of the ring oscillator by controlling the active number of delay elements, out of the plurality of delay elements, based on the detection signal. A frequency divider circuit generates and outputs a feedback signal by dividing the frequency of the output signal.

Claim (Index 3):
The injection-locked PLL circuit according to  claim 2 , wherein\n the detection signal includes a first signal and a second signal, the switch unit has a first switch unit connected to power supply terminals of the plurality of delay elements and a second switch unit connected to ground terminals of the plurality of delay elements, the first switch unit and the second switch unit each include:\n a first transistor that is controlled based on the first signal and a second transistor that is connected in series to the first transistor and is controlled based on the second signal, the first transistor and the second transistor being provided on a first current path, which supplies a current based on a power supply voltage to the first delay elements; and \n a third transistor that is controlled based on the first signal and a fourth transistor that is connected in parallel to the third transistor and is controlled based on the second signal, the third transistor and the fourth transistor being provided on a second current path, which supplies a current based on the power supply voltage to the second delay elements, \n in the first state, the first transistor and the second transistor turn on to supply the current to the first delay elements, and after the first period, the first transistor remains on and the second transistor changes from on to off to cut off supplying of the current to the first delay elements, and in the second state, the third transistor and the fourth transistor turn off to cut off supplying of the current to the second delay elements, and after the second time, the third transistor remains off and the fourth transistor changes from off to on to supply the current to the second delay elements.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 99.0
- Lexical Diversity: 2.67213
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['11712034', '11811552', '10653919', '13543971', '11594448']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7982515900502183
- 35 USC 102 Novelty (BERT): 0.4962941430022621
- Combined Prediction Score: 0.7680558453454227
- Mean Citation Score: 239.91027000000005
- Max Citation Score: 252.33823
- Similarity Product: 183.51907916929008

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test