PATENT CLAIM ANALYSIS

Application Number: 15862859
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-12
Patent Classification: ["711", "103000"]

Abstract:
A memory system includes: a memory device suitable for including a plurality of pages where data are stored and a plurality of memory blocks including the pages; and a controller suitable for receiving a plurality of commands from a host, performing command operations in response to the commands in the memory blocks, updating map data for the memory blocks according to the command operations being performed, and registering information on the map data in a data table for each of the memory blocks.

Claim (Index 20):
A memory system, comprising:\n a plurality of memory blocks; and a controller suitable for selecting among the memory blocks a source memory block having the least loading time of corresponding map data and the least scanning time of loaded map data, and controlling a garbage collection operation to the memory blocks with the selected source memory block, wherein the controller determines the least loading time and the least scanning time based on a size of map data, a number of valid addresses included in the map data, and locality distribution of the valid addresses.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 86.0
- Lexical Diversity: 2.02273
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15407046', '15603519', '15406320', '15701624', '15448781']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.548355941735903
- 35 USC 102 Novelty (BERT): 0.5053056144994826
- Combined Prediction Score: 0.5440509090122609
- Mean Citation Score: 268.91025
- Max Citation Score: 282.5156
- Similarity Product: 202.51316962947843

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test