PATENT CLAIM ANALYSIS

Application Number: 15878416
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["345", "174000"]

Abstract:
Provided is a display panel including: a plurality of pixel electrodes divided into a plurality of groups; and a plurality of common electrodes arranged at a ratio of one to a plurality of pixel electrodes included in one of the plurality of groups. Each of a plurality of sensor electrode lines overlaps with corresponding one of a plurality of data signal lines in plan view. The plurality of sensor electrode lines and each of the plurality of common electrodes overlap each other in plan view. The each of the plurality of common electrodes is electrically connected to the plurality of sensor electrode lines. At least one insulating film is formed between each of a region between the data signal lines and the sensor electrode lines, a region between the sensor electrode lines and the common electrodes, and a region between the common electrodes and the pixel electrodes.

Claim (Index 1):
A display panel comprising;\n a substrate; a plurality of gate signal lines extending in a first direction and formed on the substrate; a plurality of data signal lines and a plurality of sensor electrode lines, which extend in a second direction different from the first direction; a plurality of pixel electrodes arranged so as to respectively correspond to a plurality of pixels arrayed in the first direction and the second direction, the plurality of pixel electrodes being divided into a plurality of groups; and a plurality of common electrodes arranged at a ratio of one to a plurality of pixel electrodes included in one of the plurality of groups, wherein: each of the plurality of sensor electrode lines overlaps with corresponding one of the plurality of data signal lines in a plan view; each of the plurality of common electrodes has at least two Overlapping portions spaced apart from each other, each of the overlapping portions overlapping a corresponding one of the plurality of sensor electrode lines in the plan view; a first insulating film are formed on the substrate and to cover the plurality of gate signal lines; the plurality of data signal lines are formed on the first insulating film; a second insulating film is formed to cover the plurality of data signal lines; a third insulating film is formed on the second insulating film; the plurality of sensor electrode lines are formed on the third insulating film; and a fourth insulating film is formed to cover the third insulating film and the plurality of sensor electrode lines, wherein a through-hole is formed through a part of the fourth insulating film, wherein the plurality of common electrodes are formed on the fourth insulating film and inside the through hole to electrically connect one of the plurality of sensor electrode lines and corresponding one of the plurality of common electrodes to each other, wherein a fifth insulating film formed to cover the plurality of common electrodes, where the plurality of pixel electrodes are formed on the fifth insulating film, and wherein the third insulating film has a greater thickness than the fifth insulating film.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 3.05882
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14681115', '15878413', '13337390', '15389171', '13337375']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6699715523458722
- 35 USC 102 Novelty (BERT): 0.4990302492394519
- Combined Prediction Score: 0.6528774220352302
- Mean Citation Score: 262.413778
- Max Citation Score: 304.7457
- Similarity Product: 301.3375037186623

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test