PATENT CLAIM ANALYSIS

Application Number: 16039975
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "324000"]

Abstract:
The inventive concepts relate to a semiconductor memory device. The semiconductor memory device includes a substrate including a circuit region and first and second connection regions respectively disposed at both sides of the circuit region opposite to each other, a logic structure including a logic circuit disposed on the circuit region and a lower insulating layer covering the logic circuit, and a memory structure on the logic structure. The logic circuit includes a first page buffer disposed adjacently to the first connection region and a second page buffer disposed adjacently to the second connection region. The memory structure includes bit lines extending onto at least one of the first and second connection regions.

Claim (Index 14):
The semiconductor memory device of  claim 12 , wherein the average width of the one of the first connection conductive lines is greater than the average width of the one of the first bit lines.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 95.0
- Lexical Diversity: 2.53191
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14989955', '14523977', '15087127', '16021775', '14735811']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9253913706490744
- 35 USC 102 Novelty (BERT): 0.5254219867261685
- Combined Prediction Score: 0.8853944322567837
- Mean Citation Score: 243.336852
- Max Citation Score: 337.9989
- Similarity Product: 254.16275397330529

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test