PATENT CLAIM ANALYSIS

Application Number: 15867043
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-06
Patent Classification: ["257", "301000"]

Abstract:
The present disclosure provides a semiconductor memory structure including a substrate, a plurality of first trenches disposed in the substrate, a plurality of second trenches disposed in the substrate and spaced apart from the first trenches, a plurality of buried digit lines disposed in the first trenches, and a plurality of buried word lines disposed in the second trenches. The first trenches include a first depth, and the second trenches include a second depth. The second depth of the second trenches is greater than the first depth of the first trenches. Top surfaces of the buried word lines are lower than bottom surfaces of the buried digit lines.

Claim (Index 8):
The semiconductor memory structure of  claim 7 , further comprising a plurality of capacitors individually electrically connected to the second doped regions.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 86.0
- Lexical Diversity: 3.07895
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13240135', '13182450', '13354957', '11189945', '15253894']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9176043809618498
- 35 USC 102 Novelty (BERT): 0.5058940820451518
- Combined Prediction Score: 0.8764333510701801
- Mean Citation Score: 230.562354
- Max Citation Score: 243.95776
- Similarity Product: 153.41386569335938

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test