PATENT CLAIM ANALYSIS

Application Number: 16028570
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-05
Patent Classification: ["711", "202000"]

Abstract:
Provided herein may be a memory controller and a method of operating the same. The memory controller controls a semiconductor memory device including a plurality of pages. The memory controller may include a processing unit and a command control unit. The processing unit receives a command and a logical address corresponding to the command from a host, and generates a command physical address by converting the logical address. The command control unit temporarily stores a cache physical address corresponding to cache data that is cached in a page buffer of the semiconductor memory device and converts the command by comparing the cache physical address to the command physical address.

Claim (Index 6):
The memory controller according to  claim 3 , wherein the page buffer logging unit is configured to update the cache physical address when a read operation of the semiconductor memory device is completed.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 95.0
- Lexical Diversity: 2.3
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15832966', '14727079', '13365485', '15083524', '13494672']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5649469397441929
- 35 USC 102 Novelty (BERT): 0.4938859229645612
- Combined Prediction Score: 0.5578408380662296
- Mean Citation Score: 236.18167000000005
- Max Citation Score: 260.9365
- Similarity Product: 211.293040717721

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test