PATENT CLAIM ANALYSIS

Application Number: 16115730
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-04
Patent Classification: ["257", "072000"]

Abstract:
A display panel includes a base layer having a first region and a bent second region. An inorganic layer is disposed on the base layer. A lower groove is formed within the inorganic layer and overlaps the second region. A first thin-film transistor is disposed on the inorganic layer and includes a silicon semiconductor pattern overlapping the first region. A second thin-film transistor is disposed on the inorganic layer and includes an oxide semiconductor pattern overlapping the first region. Insulating layers overlap the first and second regions. An upper groove is formed within the insulating layers. A signal line electrically connects the second thin-film transistor. An organic layer overlaps the first and second regions and is disposed in the lower and upper grooves. A luminescent device is disposed on the organic layer and overlaps the first region.

Claim (Index 22):
A method of fabricating a display panel, comprising:\n forming at least one inorganic layer on a base layer, the base layer including a first region and a second region extended from the first region, the at least one inorganic layer overlapping the first region and the second region of the base layer; forming a silicon semiconductor pattern on the at least one inorganic layer, the silicon semiconductor pattern overlapping the first region of the base layer; forming a first control electrode on the silicon semiconductor pattern, the first control electrode overlapping the silicon semiconductor pattern, with a first insulating layer interposed between the first control electrode and the silicon semiconductor pattern; forming an upper electrode on the first control electrode, the upper electrode overlapping the first control electrode, with a second insulating layer interposed between the upper electrode and the first control electrode; forming a third insulating layer covering the upper electrode; forming an oxide semiconductor pattern on the third insulating layer; forming a second control electrode on the oxide semiconductor pattern, the second control electrode overlapping the oxide semiconductor pattern; forming a fourth insulating layer covering the second control electrode; performing a first etching step including partially removing the first to fourth insulating layers, thereby forming a first contact hole and a second contact hole respectively exposing a first portion and a second portion of the silicon semiconductor pattern and forming an upper groove exposing a portion of the at least one inorganic layer overlapped with the second region; performing a second etching step including partially removing the fourth insulating layer, thereby forming a third contact hole and a fourth contact hole respectively exposing a first portion and a second portion of the oxide semiconductor pattern, and of partially removing the at least one inorganic layer, thereby forming a lower groove in the second region of the at least one inorganic layer, the lower groove extending from the upper groove; performing an electrode forming step including forming a first input electrode and a first output electrode, which are respectively connected to the first portion and the second portion of the silicon semiconductor pattern, and forming a second input electrode and a second output electrode, which are respectively connected to the first portion and the second portion of the oxide semiconductor pattern; forming an organic layer covering the first input electrode, the first output electrode, the second input electrode, and the second output electrode, the organic layer being disposed within the upper groove and the lower groove; performing a third etching step including partially removing the organic layer, thereby forming a fifth contact hole exposing the first output electrode; and forming a luminescent device, which is electrically connected to the first output electrode, on the organic layer.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 96.0
- Lexical Diversity: 3.0625
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15583698', '14506061', '15483749', '15941767', '14707287']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9195645461691212
- 35 USC 102 Novelty (BERT): 0.4871309178805458
- Combined Prediction Score: 0.8763211833402638
- Mean Citation Score: 236.552372
- Max Citation Score: 244.88853
- Similarity Product: 201.110857042864

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test