PATENT CLAIM ANALYSIS

Application Number: 15884614
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-05
Patent Classification: ["257", "347000"]

Abstract:
The semiconductor structure includes a semiconductor substrate having a first region and a second region being adjacent to the first region; first fins formed on the semiconductor substrate within the first region; a first shallow trench isolation (STI) feature disposed on the semiconductor substrate within the second region; and a first gate stack that includes a first segment disposed directly on the first fins within the first region and a second segment extending to the first STI feature within the second region. The second segment of the first gate stack includes a low resistance metal (LRM) layer, a first tantalum titanium nitride layer, a titanium aluminum nitride layer, and a second tantalum titanium nitride layer stacked in sequence. The first segment of the first gate stack within the first region is free of the LRM layer.

Claim (Index 20):
The method of  claim 19 , wherein the filling the low resistance metal layer in the first gate trench includes depositing one of tungsten, copper, aluminum, copper aluminum alloy and a combination thereof.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 86.0
- Lexical Diversity: 2.92157
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15884711', '15864525', '14969077', '12536878', '15800359']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9247708073371608
- 35 USC 102 Novelty (BERT): 0.5119969994660903
- Combined Prediction Score: 0.8834934265500537
- Mean Citation Score: 226.86826
- Max Citation Score: 263.53586
- Similarity Product: 167.80010831473348

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test