PATENT CLAIM ANALYSIS

Application Number: 15918526
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-11
Patent Classification: ["326", "030000"]

Abstract:
A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.

Claim (Index 16):
A system comprising:\n a first memory rank comprising a plurality of first memory devices connected to a first on die termination (ODT) circuit; and a second memory rank comprising a plurality of second memory devices connected to a second ODT circuit, wherein the first and second ODT circuits are enabled during a write operation of the first memory rank, and the first ODT circuit is disabled and the second ODT circuit is enabled during a read operation of the first memory rank.

Metadata:
- Claim Count in Document: 22.0
- Percentile: 90.0
- Lexical Diversity: 2.36957
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12288882', '13048219', '11475679', '13615373', '12917566']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6975036567887009
- 35 USC 102 Novelty (BERT): 0.5007373151615402
- Combined Prediction Score: 0.6778270226259848
- Mean Citation Score: 278.319194
- Max Citation Score: 284.3477
- Similarity Product: 208.12063406102047

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test