PATENT CLAIM ANALYSIS

Application Number: 15982997
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["716", "102000"]

Abstract:
The independent claims of this patent signify a concise description of embodiments. A hardware emulation system is configured to define a variable delay associated with each of a multitude of design clocks used in the circuit design, compute a compression value in accordance with the multitude of variable delays, detect a change in one or more of the variable delays, and recompute the time compression value in response to the detected change. The hardware emulation system is further configured to recompute the time compression using programmable circuitry disposed in the hardware emulation system and without stopping the hardware emulation system. Such circuitry may be disposed in a single programmable device disposed in the hardware emulation system or a multitude of programmable devices disposed in the hardware emulation system. This Abstract is not intended to limit the scope of the claims.

Claim (Index 8):
The hardware emulation system of  claim 6  wherein the hardware emulation system is further configured to recompute the time compression value using circuitry disposed in the hardware emulation system.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 93.0
- Lexical Diversity: 2.20896
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14300165', '14975572', '14715428', '14745239', '15369656']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3632937009671276
- 35 USC 102 Novelty (BERT): 0.4779914668929957
- Combined Prediction Score: 0.3747634775597144
- Mean Citation Score: 191.801398
- Max Citation Score: 206.36304
- Similarity Product: 136.93143655529022

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test