PATENT CLAIM ANALYSIS

Application Number: 16221272
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["257", "077000"]

Abstract:
A MOS gate having a trench gate structure is formed on the front surface side of a silicon carbide substrate. A gate trench of the trench gate structure goes through an n +  source region and a p-type base region and reaches an n −  drift region. Between adjacent gate trenches, a first p +  region that goes through the p-type base region in the depth direction and reaches the n −  drift region is formed at a position separated from the gate trenches. The first p +  region is formed directly beneath a p ++  contact region. The width of the first p +  region is less than the width w1 of the gate trench. A second p +  region is formed at the bottom of the gate trench. The first and second p +  regions are silicon carbide epitaxial layers.

Claim (Index 12):
The semiconductor device according to  claim 1 , wherein the third semiconductor region is an epitaxial layer.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 98.0
- Lexical Diversity: 2.45902
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15665883', '15722934', '15716919', '15800577', '16121096']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9408492348862012
- 35 USC 102 Novelty (BERT): 0.5383524115059697
- Combined Prediction Score: 0.900599552548178
- Mean Citation Score: 328.31150400000007
- Max Citation Score: 374.74054
- Similarity Product: 367.00593408020967

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test