PATENT CLAIM ANALYSIS

Application Number: 16231268
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-07
Patent Classification: ["327", "050000"]

Abstract:
A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator. The amplifiers may be abutted to one another such that an active transistor of a first differential stage in a first amplifier behaves as a dummy transistor for an adjacent differential stage in a second amplifier

Claim (Index 11):
The apparatus recited in  claim 10 , wherein a differential signal of the first amplifier drives the first node and the second node.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 98.0
- Lexical Diversity: 2.33333
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15652934', '14672214', '14995471', '15340430', '13602216']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8195320506555313
- 35 USC 102 Novelty (BERT): 0.580393391708218
- Combined Prediction Score: 0.7956181847607999
- Mean Citation Score: 432.051426
- Max Citation Score: 473.43466
- Similarity Product: 439.8077714875651

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test