PATENT CLAIM ANALYSIS

Application Number: 15909929
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["714", "764000"]

Abstract:
Uncorrectable memory errors may be reduced by determining a logical array address for a set of memory arrays and transforming the logical array address to at least two unique array addresses based, at least in part, on logical locations of at least two memory arrays within the set of memory arrays. The at least two memory arrays are then accessed using the at least two unique array addresses, respectively.

Claim (Index 19):
A system comprising:\n supervisory circuitry to generate memory read commands that include a logical array address; and a memory, coupled to the supervisory circuitry, to respond to the memory read commands, the memory comprising:\n a set of memory arrays; \n circuitry to transform the logical array address to at least two unique array addresses based, at least in part, on a logical location of at least two memory arrays within the set of memory arrays, the at least two unique array addresses coupled to the at least two memory arrays, respectively, the circuitry is to perform operations that includes at least one of:\n a rotation of the logical array address by a number of locations based on the logical location; \n a rotation of upper lines of the logical array address by a first multiple and rotating lower lines of the logical array address by a second multiple, different than the first multiple; or \n add a multiple of the logical location to the logical array address and discard any additional upper bits; and \n \n circuitry to provide data identified by the at least two unique array addresses stored in the at least two memory arrays to the supervisory circuitry in response to the memory read commands; \n wherein the data identified by the logical array address is included in a particular error correction codeword to reduce uncorrectable errors in data read from the at least two memory arrays; and \n the supervisory circuitry is configured to correct errors in data included in error correction codewords.

Metadata:
- Claim Count in Document: 54.0
- Percentile: 90.0
- Lexical Diversity: 1.89744
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13792597', '14844843', '13365064', '15787644', '11391000']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2724911336842245
- 35 USC 102 Novelty (BERT): 0.5310534790137585
- Combined Prediction Score: 0.2983473682171779
- Mean Citation Score: 256.56980200000004
- Max Citation Score: 365.56512
- Similarity Product: 361.9207156059264

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test