PATENT CLAIM ANALYSIS

Application Number: 15956404
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["438", "002000"]

Abstract:
Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.

Claim (Index 72):
The method of  claim 70 , wherein planarizing the metal layer to remove at least some of the first portion of the metal layer includes planarizing the metal layer to form a metal trace that is embedded in the dielectric layer.

Metadata:
- Claim Count in Document: 56.0
- Percentile: 91.0
- Lexical Diversity: 1.73684
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12992049', '15289782', '14589574', '15503367', '14600962']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8877135374767031
- 35 USC 102 Novelty (BERT): 0.5622628936825872
- Combined Prediction Score: 0.8551684730972915
- Mean Citation Score: 417.61082000000016
- Max Citation Score: 484.4324
- Similarity Product: 290.03281886262886

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test