PATENT CLAIM ANALYSIS

Application Number: 15867118
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["438", "014000"]

Abstract:
Aspects of the present disclosure provide an integrated circuit (IC) wafer having a plurality of circuit dies each bounded by a set of scribe lines. The IC structure includes: a plurality of reference features each respectively positioned in a first layer of one of the plurality of circuit dies. The reference feature of each circuit die is equidistant from a respective set of scribe lines for the circuit die, and a plurality of identification features each positioned in a second layer of one of the plurality of circuit dies. The reference feature of each circuit die has a distinct offset vector indicative of a positional difference between the identification feature for the circuit die and the reference feature for the circuit die, relative to the identification feature of each other circuit die.

Claim (Index 14):
A method for identifying circuit dies, the method comprising:\n selecting one of a plurality of circuit dies for analysis, the plurality of circuit dies being diced from an IC wafer; measuring an offset vector between an identification feature of a first layer in the selected circuit die and a reference feature of a second layer in the selected circuit die, wherein each of the plurality of circuit dies includes the reference feature at a same location, and wherein each of the plurality of circuit dies includes a distinct offset vector indicative of a positional difference between the identification feature and the reference feature for one of the plurality of circuit dies, relative to the identification feature of each other circuit die; comparing the measured offset vector for the selected circuit die with an index of offset vectors for the IC wafer; and identifying a location of the selected circuit die in the plurality of circuit dies of the IC wafer, based on the comparing of the measured offset vector with the index of offset vectors for the IC wafer.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 86.0
- Lexical Diversity: 2.43103
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15346512', '15168479', '15802121', '13692414', '15657438']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8569129589073348
- 35 USC 102 Novelty (BERT): 0.4965464184228246
- Combined Prediction Score: 0.8208763048588839
- Mean Citation Score: 216.570688
- Max Citation Score: 252.14272000000005
- Similarity Product: 190.9694936142349

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test