PATENT CLAIM ANALYSIS

Application Number: 15958747
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["438", "787000"]

Abstract:
Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH 4 ) is introduced to a PECVD process to form Si x Ge (1-x)  films with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.

Claim (Index 11):
The method of  claim 8 , further comprising:\n generating a plasma in the PECVD chamber.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 91.0
- Lexical Diversity: 1.82143
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14871233', '12241826', '13907742', '10458544', '13546937']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8310122211998316
- 35 USC 102 Novelty (BERT): 0.4796203605052097
- Combined Prediction Score: 0.7958730351303694
- Mean Citation Score: 196.741658
- Max Citation Score: 202.85779
- Similarity Product: 166.00119141546725

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test