PATENT CLAIM ANALYSIS

Application Number: 15952509
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "678000"]

Abstract:
Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die and a protection layer encapsulating the semiconductor die. The chip package also includes a conductive structure in the protection layer and separated from the semiconductor die by the protection layer. The chip package further includes an interconnection structure over the conductive structure and the protection layer. The interconnection structure has a protruding portion between the conductive structure and the semiconductor die, and the protruding portion extends into the protection layer.

Claim (Index 6):
The chip package as claimed in  claim 1 , wherein the protection layer is in direct contact with the semiconductor die.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 91.0
- Lexical Diversity: 2.51351
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15195321', '15292762', '15293577', '15499962', '14981458']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.919808751705732
- 35 USC 102 Novelty (BERT): 0.4835876279967935
- Combined Prediction Score: 0.8761866393348381
- Mean Citation Score: 178.682288
- Max Citation Score: 188.41919
- Similarity Product: 136.29260337786553

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test