PATENT CLAIM ANALYSIS

Application Number: 16114816
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["257", "029000"]

Abstract:
A semiconductor device includes a first gate stack arranged about a first nanowire and a second nanowire, the first nanowire is arranged above a second nanowire, the first nanowire is connected to a first source/drain region and a second source/drain region. A second gate stack is arranged about a third nanowire and a fourth nanowire, the third nanowire is arranged above a fourth nanowire, the third nanowire is connected to a third source/drain region and a fourth source/drain region. An insulator layer having a first thickness is arranged adjacent to the first gate stack.

Claim (Index 17):
The semiconductor device of  claim 11 , wherein the first and second stack of nanowires are adjacent to the intervening layer.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 96.0
- Lexical Diversity: 3.36667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15463155', '15339665', '15207802', '15628821', '15015347']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.942673153930022
- 35 USC 102 Novelty (BERT): 0.5939209272653291
- Combined Prediction Score: 0.9077979312635528
- Mean Citation Score: 417.898254
- Max Citation Score: 532.40674
- Similarity Product: 449.2063818587637

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test