PATENT CLAIM ANALYSIS

Application Number: 15765120
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-10
Patent Classification: ["257", "330000"]

Abstract:
A provided method of manufacturing a semiconductor device includes formation of an interlayer insulating. The interlayer insulating film includes first and second insulating layers. The first insulating layer covers an upper surface of each of the gate electrodes. The second insulating layer is located on the first insulating layer. A contact hole is provided in the interlayer insulating film at a position between the trenches. Then the interlayer insulating film is heated at a temperature lower than the softening temperature of the first insulating layer and higher than the softening temperature of the second insulating layer so as to make a surface of the second insulating layer into a curved surface so that surfaces of end portions of the second insulating layer are sloping from the corresponding contact holes so as to be displaced upward toward a center of the corresponding trench.

Claim (Index 6):
A method of manufacturing a semiconductor device, the method comprising:\n forming a plurality of trenches in an upper surface of a semiconductor substrate; forming a gate insulating film in each of the trenches; forming a gate electrode insulated from the semiconductor substrate by the gate insulating film in each of the trenches; forming an interlayer insulating film including a first insulating layer and a second insulating layer, wherein the first insulating layer covers an upper surface of each of the gate electrodes and the upper surface of the semiconductor substrate, the second insulating layer is located on the first insulating layer and has a softening temperature lower than a softening temperature of the first insulating layer, and a contact hole is provided in the interlayer insulating film at a position between each pair of adjacent two of the trenches; heating the interlayer insulating film at a temperature lower than the softening temperature of the first insulating layer and higher than the softening temperature of the second insulating layer so as to make a surface of the second insulating layer into a curved surface so that surfaces of end portions of the second insulating layer are sloping from the corresponding contact holes so as to be displaced upward toward a center of the corresponding trench, and forming an upper electrode layer so as to cover the interlayer insulating film and the contact holes, wherein the formation of the interlayer insulating film comprises:\n forming the first insulating layer so as to cover the upper surface of each of the gate electrodes and the upper surface of the semiconductor substrate; \n forming the second insulating layer on the first insulating layer; \n etching the second insulating layer in a range between each pair of the adjacent two of the trenches; and \n forming the contact hole by etching the first insulating layer in a range within and narrower than the range in which the second insulating layer was etched, \n wherein the heating is performed so as to form a surface of a center portion of the second insulating layer into a convex curved surface, and form the surfaces of the end portions of the second insulating layer into concave surfaces.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 90.0
- Lexical Diversity: 2.24242
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15174337', '15425411', '14886281', '15425714', '15325954']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9188343996399532
- 35 USC 102 Novelty (BERT): 0.4894292084382866
- Combined Prediction Score: 0.8758938805197867
- Mean Citation Score: 235.84134
- Max Citation Score: 257.613
- Similarity Product: 218.48049679505823

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test