PATENT CLAIM ANALYSIS

Application Number: 15889248
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["438", "013000"]

Abstract:
A method of tailoring BEOL RC parametrics to improve chip performance. According to the method, an integrated circuit design on an integrated circuit chip is analyzed. The analysis comprises calculating Vmax for vias and metal lines in the integrated circuit design over a range of sizes for the vias and the metal lines. Predicted use voltage for applications on the integrated circuit chip is determined. The size or the location of at least one of the vias and the metal lines is tailored based on performance parameters of the integrated circuit chip.

Claim (Index 9):
The system according to  claim 8 , wherein creating a modified circuit design based on performance parameters of said integrated circuit chip further comprises said data processor tailoring one of the size and the location of at least one of said vias and said metal lines based on performance parameters of said integrated circuit chip.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 88.0
- Lexical Diversity: 1.92157
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14872302', '15083692', '13649699', '13745732', '13677373']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8343503064297316
- 35 USC 102 Novelty (BERT): 0.5251941693388344
- Combined Prediction Score: 0.8034346927206418
- Mean Citation Score: 189.405578
- Max Citation Score: 325.0479
- Similarity Product: 285.7440564760924

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test