PATENT CLAIM ANALYSIS

Application Number: 15888300
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-04
Patent Classification: ["375", "219000"]

Abstract:
An envelope tracking (ET) system is provided. The ET amplifies a radio frequency (RF) signal correspond to an amplitude bandwidth exceeding a voltage modulation bandwidth limitation of the ET system. The ET system compresses the amplitude bandwidth to match the voltage modulation bandwidth of the ET system. More specifically, the ET system compresses a predefined voltage waveform, which tracks time-variant amplitudes of a digital form of the RF signal, to generate a modified voltage waveform at a reduced bandwidth. To ensure that signal distortion(s) resulted from the bandwidth compression can be corrected, the ET system nonlinearly modifies predefined amplitude(s) of the predefined voltage waveform to generate modified amplitude(s) of the modified voltage waveform that is never less than the predefined amplitude(s) of the predefined voltage waveform. As such, the ET system can amplify the RF signal with improved linearity and efficiency, without degrading spectral performance of the RF signal.

Claim (Index 3):
The ET system of  claim 2  wherein the digital voltage processing circuitry comprises:\n voltage look-up table (LUT) circuitry coupled to the signal input and configured to:\n receive the plurality of signal amplitudes from the signal input; and \n generate the plurality of predefined voltage amplitudes based on the plurality of signal amplitudes, respectively; \n \n a nonlinear bandwidth compression circuit coupled to the voltage LUT circuitry and configured to:\n receive the plurality of predefined voltage amplitudes from the voltage LUT circuitry; and \n nonlinearly modify the plurality of predefined voltage amplitudes to generate the digital voltage signal comprising the plurality of modified voltage amplitudes greater than or equal to the plurality of predefined voltage amplitudes, respectively; \n \n voltage signal delay circuitry coupled to the voltage LUT circuitry and configured to delay the plurality of predefined voltage amplitudes by a defined delay to generate a plurality of delayed predefined voltage amplitudes, respectively; and \n voltage combiner circuitry coupled to the nonlinear bandwidth compression circuit and the voltage signal delay circuitry, the voltage combiner circuitry configured to combine the plurality of modified voltage amplitudes and the plurality of delayed predefined voltage amplitudes to generate the plurality of voltage differential amplitudes, respectively.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 88.0
- Lexical Diversity: 2.42466
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15888260', '15792909', '13624358', '15459449', '15723460']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4862504361963079
- 35 USC 102 Novelty (BERT): 0.5628170774118284
- Combined Prediction Score: 0.49390710031786
- Mean Citation Score: 295.18246800000014
- Max Citation Score: 454.60275
- Similarity Product: 374.74473162916297

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test