PATENT CLAIM ANALYSIS

Application Number: 15927442
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["327", "540000"]

Abstract:
An integrated circuit having at least one electrically-controlled control loop that includes one or more loop error amplifiers also includes an analog-to-digital converter having both an input that operably couples to two inputs of each loop error amplifier and an output that couples to an off-chip hardware component comprising a control circuit. This control circuit reads digital versions that correspond to the loop error amplifier inputs. When a particular first input is greater than a second input, the control circuit sources a calibration signal to modify and offset for the loop error amplifier in a first direction. When the first input is less than the second input, the control circuit sources a calibration signal to modify the offset for the loop error amplifier in a second direction that is different from the aforementioned first direction. By one approach the control circuit also controls a sampling rate of the analog-to-digital converter.

Claim (Index 10):
The control loop automatic zeroing apparatus of  claim 9  wherein the electrically-controlled control loop further comprises a second loop error amplifier and the input of the analog-to-digital converter further selectively operably couples to two inputs of the second loop error amplifier, and wherein the control circuit is configured to read digital versions corresponding to the inputs of both of the loop error amplifiers and to use a first sampling rate for the analog-to-digital converter when sampling the loop error amplifier and a second sampling rate that is different than the first sampling rate for the analog-to-digital converter when sampling the second loop error amplifier.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 90.0
- Lexical Diversity: 2.27536
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13310434', '12136226', '10446392', '10362755', '12277465']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7495666475827525
- 35 USC 102 Novelty (BERT): 0.4831977667567843
- Combined Prediction Score: 0.7229297595001557
- Mean Citation Score: 187.19276
- Max Citation Score: 190.98398
- Similarity Product: 142.9425254195249

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test