PATENT CLAIM ANALYSIS

Application Number: 15895321
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["326", "038000"]

Abstract:
A programmable logic unit (PLU). The PLU includes a plurality of four-input reconfigurable hard logics (RHLs), a three-input look-up-table (LUT), and a plurality of reconfigurable inverters. The plurality of RHLs include a first RHL, a second RHL, and a third RHL. The plurality of reconfigurable inverters are associated with the plurality of RHLs.

Claim (Index 5):
The PLU of  claim 2 , wherein the third RHL includes:\n a fourteenth reconfigurable inverter of the plurality of reconfigurable inverters, the fourteenth reconfigurable inverter associated with the first configuration cell, the fourteenth reconfigurable inverter arranged to receive the first input; a fifteenth reconfigurable inverter of the plurality of reconfigurable inverters, the fifteenth reconfigurable inverter associated with the second configuration cell, the fifteenth reconfigurable inverter arranged to receive the fourth input; a sixteenth reconfigurable inverter of the plurality of reconfigurable inverters, the sixteenth reconfigurable inverter associated with the third configuration cell, the sixteenth reconfigurable inverter arranged to receive the second input; a seventeenth reconfigurable inverter of the plurality of reconfigurable inverters, the seventeenth reconfigurable inverter associated with the fourth configuration cell, the seventeenth reconfigurable inverter arranged to receive the third input; an eighteenth reconfigurable inverter of the plurality of reconfigurable inverters, the eighteenth reconfigurable inverter associated with the fifth configuration cell, the eighteenth reconfigurable inverter arranged to receive the fourth input; a second two-input NOR gate arranged to receive the third input and coupled with the sixteenth reconfigurable inverter to receive the output of the sixteenth reconfigurable inverter; a third two-input NOR gate arranged to receive the second input and coupled with the seventeenth reconfigurable inverter to receive the output of the seventeenth reconfigurable inverter; a nineteenth reconfigurable inverter of the plurality of reconfigurable inverters, the nineteenth reconfigurable inverter associated with the sixth configuration cell, the nineteenth reconfigurable inverter coupled with the second two-input NOR gate to receive the output of the second two-input NOR gate; a twentieth reconfigurable inverter of the plurality of reconfigurable inverters, the twentieth reconfigurable inverter associated with the seventh configuration cell, the twentieth reconfigurable inverter coupled with the third two-input NOR gate to receive the output of the third two-input NOR gate; a first three-input NAND gate coupled with the fourteenth reconfigurable inverter, the fifteenth reconfigurable inverter, and the nineteenth reconfigurable inverter, to receive the outputs of the fourteenth reconfigurable inverter, the fifteenth reconfigurable inverter, and the nineteenth reconfigurable inverter; a second three-input NAND gate arranged to receive the first input and coupled with the eighteenth reconfigurable inverter and the twentieth reconfigurable inverter to receive the outputs of the eighteenth reconfigurable inverter and the twentieth reconfigurable inverter; a fourth two-input NOR gate coupled with the first three-input NAND gate and the second three-input NAND gate to receive the outputs of the first three-input NAND gate and the second three-input NAND gate; and a twenty first reconfigurable inverter of the plurality of reconfigurable inverters, the twenty first reconfigurable inverter associated with the eighth configuration cell, the twenty first reconfigurable inverter coupled with the fourth two-input NOR gate to receive the output of the fourth two-input NOR gate, the output of the twenty first reconfigurable inverter connected to the third output.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 88.0
- Lexical Diversity: 2.0303
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['09754632', '14458456', '14089238', '14890911', '15224224']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6734091442857395
- 35 USC 102 Novelty (BERT): 0.4865877388475621
- Combined Prediction Score: 0.6547270037419218
- Mean Citation Score: 170.86310399999996
- Max Citation Score: 185.4701
- Similarity Product: 121.50462197685242

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test