PATENT CLAIM ANALYSIS

Application Number: 15922929
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-06
Patent Classification: ["710", "074000"]

Abstract:
A host device includes a first serial peripheral interface (SPI) and a second SPI to communicate with an embedded multimedia card (eMMC) device. The host device has a mode controller that controls the first SPI to toggle between first transmission and first reception modes for command transmission and response reception, respectively. The mode controller controls the second SPI to toggle between second transmission and second reception modes for data transmission and data reception, respectively.

Claim (Index 1):
A host device that communicates with an embedded multimedia card (eMMC) device, the host device comprising:\n a first serial peripheral interface (SPI) that has a command output terminal SPI 1  MOSI connected to a command terminal CMD of the eMMC device for transmitting at least one of a data-write command to execute a data-write operation on the eMMC device and a data-read command to execute a data-read operation on the eMMC device, a response input terminal SPI 1  MISO connected to the command terminal CMD for receiving a response to the at least one of the data-write command and the data-read command, a first clock terminal SPI 1  CLK, and a first chip-select terminal SPI 1  CS, wherein the first SPI is operable in one of first transmission and first reception modes; a second SPI that has a data output terminal SPI 2  MISO connected to a data terminal DO of the eMMC device for transmitting write-data to the eMMC device based on the data-write command, a data input terminal SPI 2  MOSI connected to the data terminal DO for receiving read-data from the eMMC device based on the data-read command, a second clock terminal SPI 2  CLK, and a second chip-select terminal SPI 2  CS, wherein the second SPI is operable in one of second transmission and second reception modes; a mode controller, connected to the first and second SPIs, that enables the first SPI to operate in the first transmission mode and the first reception mode, and the second SPI to operate in the second transmission mode and the second reception mode, based on the data-read and data-write commands; and first and second resistors that act as fail-safe resistors for preventing an open circuit condition of the command and data channels.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 90.0
- Lexical Diversity: 2.02439
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14025886', '14024655', '14025909', '14025866', '14592114']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6616452145342064
- 35 USC 102 Novelty (BERT): 0.4713715261113903
- Combined Prediction Score: 0.6426178456919248
- Mean Citation Score: 170.09868799999995
- Max Citation Score: 176.71739
- Similarity Product: 130.18403538081228

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test