PATENT CLAIM ANALYSIS

Application Number: 15965230
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["257", "048000"]

Abstract:
A power semiconductor device includes a power transistor arranged in a power device region of a semiconductor substrate. The power semiconductor device further includes a first circuit arranged in a first circuit region of the semiconductor substrate. The power semiconductor device further includes a second circuit arranged in a second circuit region of the semiconductor substrate. The first circuit region is arranged at a first edge of the semiconductor substrate. The second circuit region is arranged at a second edge of the semiconductor substrate. The power device region is arranged between the first circuit region and the second circuit region.

Claim (Index 16):
The power semiconductor device of  claim 1 , wherein a breakdown voltage of transistors arranged in the first circuit region and in the second circuit region is less than 10 V.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 91.0
- Lexical Diversity: 4.41667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14040891', '15642893', '15196838', '14834542', '15627481']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.921754458151381
- 35 USC 102 Novelty (BERT): 0.4826770405060598
- Combined Prediction Score: 0.877846716386849
- Mean Citation Score: 192.478624
- Max Citation Score: 198.54843
- Similarity Product: 149.0130984143114

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test