PATENT CLAIM ANALYSIS

Application Number: 15870910
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-01
Patent Classification: ["257", "777000"]

Abstract:
A semiconductor package is provided including a package substrate, a first semiconductor chip on the substrate, with a first surface and a second surface opposite to each other; a plurality of first connection terminals disposed on the first surface contacting an upper surface of the substrate; a second semiconductor chip disposed on the second surface, with a third surface and a fourth surface opposite to each other; a plurality of second connection terminals disposed on the third surface contacting the second surface, wherein an absolute value between a first area, the sum of areas in which the plurality of first connection terminals contact the upper surface of the package substrate, and a second area, the sum of areas in which the plurality of second connection terminals contact the second surface of the first semiconductor chip, is equal to or less than about 0.3 of the first area.

Claim (Index 13):
A semiconductor package comprising:\n a package substrate; a first semiconductor chip disposed on a package substrate, the first semiconductor chip including a first surface and a second surface opposite to each other; a first signal connection terminal disposed between the first surface of the first semiconductor chip and an upper surface of the package substrate, the first signal connection terminal electrically connecting the first semiconductor chip and the package substrate; a first dummy connection terminal interposed between the first surface of the first semiconductor chip and the upper surface of the package substrate, the first dummy connection terminal spaced apart from the first signal connection terminal; a second semiconductor chip overlying the second surface of the first semiconductor chip, the second semiconductor chip including a third surface and a fourth surface opposite to each other; a second signal connection terminal disposed between the third surface of the second semiconductor chip and the second surface of the first semiconductor chip, the second signal connection terminal electrically connecting the first semiconductor chip and the second semiconductor chip; and a second dummy connection terminal and a third dummy connection terminal which are disposed between the third surface of the second semiconductor chip and the second surface of the first semiconductor chip, the second dummy connection terminal and the third dummy connection terminal spaced apart from the second signal connection terminal, wherein at least a portion of the first dummy connection terminal and at least a portion of the second dummy connection terminal vertically overlap each other, and the first dummy connection terminal and the third dummy connection terminals does not vertically overlap each other; wherein a first area is a sum of an area in which the first signal connection terminal contacts the upper surface of the package substrate, and an area in which the first dummy connection terminal contacts the upper surface of the package substrate, wherein a second area is a sum of an area in which the second signal connection terminal contacts the second surface of the first semiconductor chip, an area in which the second dummy connection terminal contacts the second surface of the first semiconductor chip, and an area in which the third dummy connection terminal contacts the second surface of the first semiconductor chip, and wherein the first area and the second area are different each other.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 86.0
- Lexical Diversity: 3.2449
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15798655', '12788901', '15786698', '14175162', '13599838']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9187356809442137
- 35 USC 102 Novelty (BERT): 0.4899136199043019
- Combined Prediction Score: 0.8758534748402224
- Mean Citation Score: 233.489502
- Max Citation Score: 247.67482
- Similarity Product: 199.03783654015183

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test