PATENT CLAIM ANALYSIS

Application Number: 15994231
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-12
Patent Classification: ["257", "401000"]

Abstract:
First and second fin-type field effect transistors (finFETs) are formed laterally adjacent one another extending from a top surface of an isolation layer. The first finFET has a first fin structure and the second finFET has a second fin structure. An insulator layer is on the first fin structure and the second fin structure. A gate conductor intersects the first fin structure and the second fin structure, and at least the insulator layer separates the gate conductor from the first fin structure and the second fin structure. Source and drain structures are on the first fin structure and the second fin structure laterally adjacent the gate conductor. The first fin structure has sidewalls that include a step and the second fin structure has sidewalls that do not include the step. The step is approximately parallel to the surface of the isolation layer.

Claim (Index 8):
An integrated circuit device comprising:\n a substrate; an isolation layer on the substrate, wherein the isolation layer has a surface opposite where the isolation layer contacts the substrate, and wherein the isolation layer has a first area separated from a second area; first fin-type field effect transistors (finFETs) in the first area of the isolation layer, wherein the first finFETs have first fin structures extending from the substrate through the isolation layer and extending external to the isolation layer; second finFETs in the second area of the isolation layer, wherein the second finFETs have second fin structures extending from the substrate through the isolation layer and extending external to the isolation layer; an insulator layer on the first fin structures and the second fin structures, wherein the insulator layer comprises a first portion on the first fin structures and a second portion on the second fin structures, and wherein the first portion of the insulator layer is thicker than the second portion of the insulator layer; a gate conductor intersecting the first fin structures and the second fin structures, wherein at least the insulator layer separates the gate conductor from the first fin structures and the second fin structures; and source and drain structures on the first fin structures and the second fin structures laterally adjacent the gate conductor, wherein the first fin structures have sidewalls that include a step at a location where the first fin structures intersect the surface of the isolation layer, wherein the second fin structures have sidewalls that do not include the step, and wherein the step is approximately parallel to the surface of the isolation layer.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 93.0
- Lexical Diversity: 2.66667
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15814724', '11671795', '15798546', '14526072', '15833285']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9207141295157836
- 35 USC 102 Novelty (BERT): 0.4845901291260502
- Combined Prediction Score: 0.8771017294768103
- Mean Citation Score: 239.465492
- Max Citation Score: 249.60542
- Similarity Product: 215.60105079101805

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test