PATENT CLAIM ANALYSIS

Application Number: 15918394
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "401000"]

Abstract:
In a method of manufacturing a semiconductor device, a first fin structure for an n-channel fin field effect transistor (FinFET) is formed over a substrate. An isolation insulating layer is formed over the substrate such that an upper portion of the first fin structure protrudes from the isolation insulating layer. A gate structure is formed over a part of the upper portion of the first fin structure. A first source/drain (S/D) epitaxial layer is formed over the first fin structure not covered by the gate structure. A cap epitaxial layer is formed over the first S/D epitaxial layer. The first S/D epitaxial layer includes SiP, and the cap epitaxial layer includes SiC with a carbon concentration is in a range from 0.5 atomic % to 5 atomic %.

Claim (Index 18):
A method of manufacturing a semiconductor device, the method comprising:\n forming a first pair of first fin structures and a second pair of first fin structures for n-channel fin field effect transistors (FinFETs) and a pair of second fin structures for p-channel FinFETs over a substrate; forming an isolation insulating layer over the substrate such that upper portions of the first and second pairs of first fin structures and upper portions of the pair of second fin structures protrude from the isolation insulating layer; forming a first source/drain (S/D) epitaxial layer over the first pair of first fin structures and a second S/D epitaxial layer over the second pair of first fin structures; forming a first cap epitaxial layer over the first S/D epitaxial layer and a second cap epitaxial layer over the second S/D epitaxial layer; and forming a third S/D epitaxial layer over the pair of second fin structures, wherein: the pair of second fin structures are disposed between the first pair of first fin structures and the second pair of first fin structures, the first and second S/D epitaxial layers include SiP, the cap epitaxial layers include SiC or SiCP, and during the forming the second S/D epitaxial layer, no cover layer that protects the cap epitaxial layers is disposed on the cap epitaxial layers.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 90.0
- Lexical Diversity: 2.29508
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15098060', '15340025', '15707682', '15725091', '15707634']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9136017384993416
- 35 USC 102 Novelty (BERT): 0.5039484006008408
- Combined Prediction Score: 0.8726364047094916
- Mean Citation Score: 221.173712
- Max Citation Score: 311.57138
- Similarity Product: 309.63144274492737

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test