PATENT CLAIM ANALYSIS

Application Number: 16227975
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-12
Patent Classification: ["327", "206000"]

Abstract:
A semiconductor apparatus includes a first voltage detection circuit configured to generate a first voltage detection signal in response to the voltage level of a first voltage, a current control signal and a second voltage detection signal; and a storage and output circuit configured to generate a power control signal and the current control signal in response to the voltage detection signal.

Claim (Index 14):
The semiconductor apparatus according to  claim 12 , wherein the power control signal output circuit comprises:\n a first transistor with a first gate configured to receive the latch signal from the latch circuit, with a first source configured to be coupled to a ground terminal, and with a first drain; a second transistor with a second gate configured to receive the latch inversion signal, with a second source configured to be coupled to the ground terminal, and with a second drain; a third transistor with a third gate configured to be coupled to the drain of the second transistor, with a third source configured to receive the first voltage, and with a third drain configured to be coupled to the first drain of the first transistor; a fourth transistor with a fourth gate configured to be coupled to the drain of the first transistor, with a fourth source configured to receive the first voltage, and with a fourth drain configured to be coupled to the second drain of the first transistor; a fifth transistor with a fifth gate configured to receive the second voltage detection signal, with a fifth source configured to receive the first voltage, and with a fifth drain configured to be coupled to a node to which the second and fourth transistors are coupled in common; an inverter configured to have an input terminal coupled to a node to which the second, fourth, and fifth transistors are coupled in common and configured to have an output terminal to output the power control signal; and a capacitor configured to have one terminal coupled to the output terminal of the inverter and configured to have the other terminal coupled to the ground terminal.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 98.0
- Lexical Diversity: 2.32143
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12347366', '16201426', '11641044', '10785599', '12493354']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7843317830968204
- 35 USC 102 Novelty (BERT): 0.472547850962853
- Combined Prediction Score: 0.7531533898834237
- Mean Citation Score: 187.125262
- Max Citation Score: 193.6809
- Similarity Product: 151.1676874599159

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test