PATENT CLAIM ANALYSIS

Application Number: 16424320
Application Type: Utility
Filing Date: 2019-05
Publication Date: 2019-09
Patent Classification: ["716", "103000"]

Abstract:
Systems, methods and devices are disclosed that may a user to specify various layout and operational parameters of a resistive-based memory array in a manner that accommodates the unique characteristics of resistance-based memory cells and magnetic-based memory cells.

Claim (Index 1):
A method of generating one or more netlist files for configuring a memory array based on user input, the method comprising:\n providing a memory block including a controller, a number of reference voltage generators, a number of sense amplifiers, and a number of memory columns each including a plurality of resistance-based memory (RBM) cells; selecting the number of reference voltage generators to include in the memory block based on the user input; selecting the number of sense amplifiers to include in the memory block based on the user input; and determining how many of the sense amplifiers are to be coupled to each of the reference voltage generators based on the user input.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 100.0
- Lexical Diversity: 1.29032
- Patent Class: 716.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15826597', '12343617', '12390213', '14687331', '13898803']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3142423215279609
- 35 USC 102 Novelty (BERT): 0.5414040905052728
- Combined Prediction Score: 0.3369584984256921
- Mean Citation Score: 232.860086
- Max Citation Score: 441.46878
- Similarity Product: 361.45515288223737

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test