PATENT CLAIM ANALYSIS

Application Number: 15905083
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-07
Patent Classification: ["708", "620000"]

Abstract:
Examples of the present disclosure provide apparatuses and methods for performing multi-variable bit-length multiplication operations in a memory. An example method comprises performing a multiplication operation on a first vector and a second vector. The first vector includes a number of first elements stored in a group of memory cells coupled to a first access line and a number of sense lines of a memory array. The second vector includes a number of second elements stored in a group of memory cells coupled to a second access line and the number of sense lines of the memory array. The example multiplication operation can include performing a number of AND operations, OR operations and SHIFT operations without transferring data via an input/output (I/O) line.

Claim (Index 24):
The system of  claim 21 , wherein the memory device comprises control circuitry configured to provide control signals to the array and sensing circuitry to perform the logical operation processing.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 88.0
- Lexical Diversity: 2.29825
- Patent Class: 708.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14834065', '15692959', '14836726', '15410199', '15898894']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.530848057482933
- 35 USC 102 Novelty (BERT): 0.5654075783514809
- Combined Prediction Score: 0.5343040095697877
- Mean Citation Score: 415.1248000000001
- Max Citation Score: 441.8559
- Similarity Product: 330.4299520121455

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test