PATENT CLAIM ANALYSIS

Application Number: 15957561
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["257", "685000"]

Abstract:
A power semiconductor arrangement includes a plurality of half-bridges arranged in parallel alongside one another by way of a longer longitudinal side of the half-bridges. An input load current terminal, an output load current terminal and a phase terminal are arranged on a top side of each of the half-bridges, the input load current terminals and the output load current terminals being arranged on an imaginary line that runs orthogonal to the longer longitudinal side of the half-bridges. First connection plates are connected to respective ones of the output load current terminals, and second connection plates are connected to respective ones of the input load current terminals. The first connection plates are arranged above the second connection plates. The first and the second connection plates are arranged in parallel with one another and electrically insulated from one another.

Claim (Index 16):
The power semiconductor arrangement of  claim 13 , wherein the module housings have long and short flanks which are arranged in such a way that, except for one flank of the outermost module housing, in each case one long flank of a module housing is arranged most closely adjacent to a flank of another module housing.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 2.51724
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14830446', '11755074', '11457636', '11555764', '13163200']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9142027166473334
- 35 USC 102 Novelty (BERT): 0.4671896203862452
- Combined Prediction Score: 0.8695014070212246
- Mean Citation Score: 135.17289799999998
- Max Citation Score: 141.83406000000005
- Similarity Product: 105.42469331731084

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test