PATENT CLAIM ANALYSIS

Application Number: 16004573
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "774000"]

Abstract:
Semiconductor package structures are provided. A semiconductor package structure includes a chip, a molding material surrounding the chip, a through-via extending from a first surface to a second surface of the molding material, and a first re-distribution layer (RDL) wire disposed on the second surface of the molding material and electrically separated from the through-via. The second surface is opposite to the first surface. A portion of the first RDL wire across the through-via has a first segment with a first width and a second segment with a second width different from the first width.

Claim (Index 5):
The semiconductor package structure as claimed in  claim 4 , wherein the connecting pattern further comprises a first taper portion disposed on a side of the main portion and a second taper portion disposed on an opposite side of the main portion.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 94.0
- Lexical Diversity: 2.26087
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15498254', '15370865', '15203418', '15418896', '15431514']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9197600410951032
- 35 USC 102 Novelty (BERT): 0.4993277533477731
- Combined Prediction Score: 0.8777168123203701
- Mean Citation Score: 191.204508
- Max Citation Score: 296.83603
- Similarity Product: 294.81418458010137

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test