PATENT CLAIM ANALYSIS

Application Number: 16105305
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["714", "755000"]

Abstract:
A memory device includes a memory array that includes a buffer data. The memory device also includes a memory controller. The memory controller includes an error correction code (ECC) component. The memory controller further receives a status command and an indication related to the quality of the data to analyze with the ECC component. Based on a status value, the memory controller utilizes one of a plurality of error correction techniques via the ECC component to correct an error (e.g., soft state, calibration, etc.).

Claim (Index 9):
The memory controller of  claim 7 , wherein the memory controller is configured to apply the channel calibration value to the second data to alleviate channel errors in the second data to generate third data.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 96.0
- Lexical Diversity: 2.0
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15583678', '14657878', '13001300', '14285848', '13114049']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3775235659654748
- 35 USC 102 Novelty (BERT): 0.4988604071904539
- Combined Prediction Score: 0.3896572500879727
- Mean Citation Score: 201.119252
- Max Citation Score: 283.78867
- Similarity Product: 218.5682864977265

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test