PATENT CLAIM ANALYSIS

Application Number: 15871271
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-12
Patent Classification: ["257", "072000"]

Abstract:
A display device includes at least one transistor. The transistor has an active pattern including a first active area and a second active area. The first active area includes a first channel area and an n-doped area contacting the first channel area. The second active area includes a second channel area and a p-doped area contacting the second channel area. A first insulation layer covers at least a portion of the active pattern. A first gate electrode is disposed on the first insulation layer and at least partially overlaps the first channel area. A second gate electrode is disposed on the first insulation layer and at least partially overlaps the second channel area. A taper angle of the second gate electrode is larger than a taper angle of the first gate electrode.

Claim (Index 10):
A method for manufacturing a display device, the method comprising:\n forming a semiconductor pattern including a first semiconductor area and a second semiconductor area on a base substrate; forming a first insulation layer covering the semiconductor pattern; forming a gate metal layer on the first insulation layer; etching the gate metal layer to form a gate pattern at least partially overlapping the first semiconductor area; doping a first area of the first semiconductor area with a high concentration of n-type impurities to form a high-concentration-doped area; etching the gate pattern to form a first gate electrode having a taper angle smaller than a taper angle of the gate pattern; doping a second area of the first semiconductor area, contacting the first area of the first semiconductor area, with a low concentration of n-type impurities to form a low-concentration-doped area; etching the gate metal layer to form a second gate electrode at least partially overlapping the second semiconductor area and having a taper angel larger than the taper angle of the first gate electrode; and doping the second semiconductor area with p-type impurities to form a p-doped area.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 3.41463
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15870095', '15869748', '10998844', '14800421', '14510618']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9176852830263666
- 35 USC 102 Novelty (BERT): 0.496700403146047
- Combined Prediction Score: 0.8755867950383347
- Mean Citation Score: 235.41787800000003
- Max Citation Score: 282.89404
- Similarity Product: 250.68690834522488

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test