PATENT CLAIM ANALYSIS

Application Number: 16030283
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["438", "734000"]

Abstract:
A device including a gate stack over a semiconductor substrate having a pair of spacers abutting sidewalls of the gate stack. A recess is formed in the semiconductor substrate adjacent the gate stack. The recess has a first profile having substantially vertical sidewalls and a second profile contiguous with and below the first profile. The first and second profiles provide a bottle-neck shaped profile of the recess in the semiconductor substrate, the second profile having a greater width within the semiconductor substrate than the first profile. The recess is filled with a semiconductor material. A pair of spacers are disposed overly the semiconductor substrate adjacent the recess.

Claim (Index 1):
A device, comprising:\n a semiconductor substrate having a top surface; a gate structure disposed over the top surface of the semiconductor substrate; at least one dielectric material forming a spacer element abutting a gate sidewall of the gate structure, the spacer element having a first and second sidewall, the second sidewall abutting the gate sidewall of the gate structure and the first sidewall defining an outer point of the spacer element, the outer point a furthest lateral distance from the gate structure;\n a recess in the semiconductor substrate adjacent the gate structure, wherein the recess is defined by semiconductor substrate sidewalls, the recess having:\n a top portion having semiconductor substrate sidewalls substantially perpendicular to the top surface of the semiconductor substrate and extending a first distance into the semiconductor substrate, wherein the semiconductor substrate sidewalls of the top portion define first width of the recess, wherein the semiconductor substrate sidewalls of the top portion include a first sidewall that is collinear with the first sidewall of the spacer element at the outer point; and \n a bottom portion having semiconductor substrate sidewalls defining a second width greater than the first width, wherein the first and second widths are defined along horizontally oriented planes parallel to one another; and \n \n a semiconductor material filling the recess.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 95.0
- Lexical Diversity: 2.42553
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14732493', '12841763', '12415021', '13399394', '14688720']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8316484083592843
- 35 USC 102 Novelty (BERT): 0.5011420149550525
- Combined Prediction Score: 0.7985977690188611
- Mean Citation Score: 215.134976
- Max Citation Score: 276.77417
- Similarity Product: 248.2445595246726

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test