PATENT CLAIM ANALYSIS

Application Number: 15970242
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-03
Patent Classification: ["326", "030000"]

Abstract:
A memory system includes: a buffer memory device including a reference voltage pad; a memory controller including a controller ZQ pad; and a controller calibration resistor, wherein the reference voltage pad, the controller ZQ pad, and the controller calibration resistor are coupled to each other.

Claim (Index 20):
The memory system of  claim 16 , wherein the memory controller includes an impedance calibration circuit coupled to the first pad,\n wherein the impedance calibration circuit is configured to change the voltage output through the first pad, based on the resistance of the controller calibration resistor and the reference voltage.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 93.0
- Lexical Diversity: 1.92593
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15968026', '15968065', '15922332', '13239478', '14723614']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7161703573001136
- 35 USC 102 Novelty (BERT): 0.5259086681247778
- Combined Prediction Score: 0.6971441883825801
- Mean Citation Score: 289.317988
- Max Citation Score: 361.8324
- Similarity Product: 276.7373820854187

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test