PATENT CLAIM ANALYSIS

Application Number: 15948023
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "774000"]

Abstract:
An integrated circuit (IC) chip carrier includes one or more memory devices therein. The memory is integrated into the carrier prior to the IC chip being connected to the carrier. Therefore, the IC chip may be connected to the memory at the same time as the IC chip is connected to the carrier. Because the memory is integrated into the IC chip carrier, prior to the IC chip being attached thereto, reliability concerns that result from attaching the memory to the IC chip carrier affect the IC chip carrier and do not affect the yield of the relatively more expensive IC chip.

Claim (Index 15):
An electronic system comprising:\n an integrated circuit (IC) carrier and memory joined by a dielectric material such that a contact surface of the memory and an IC chip facing surface of the dielectric material are coplanar with an IC chip facing surface of the carrier; a vertical interconnect access (VIA) within the dielectric material from the IC chip facing surface of the dielectric material to a system facing surface of the dielectric material; a first carrier interconnect directly upon the contact surface of the memory, directly upon the IC chip facing surface of the dielectric material, and directly upon the IC chip facing surface of the carrier, the first carrier interconnect electrically connecting a signal contact of the memory and a wiring line within the IC chip carrier; a second carrier interconnect directly upon the IC chip facing surface of the dielectric material, the second carrier interconnect electrically connecting a power or ground contact of the memory and the VIA; a third carrier interconnect directly upon the system facing surface of the dielectric material, the third carrier interconnect being electrically connected to the VIA; an IC chip comprising an IC chip contact electrically connected to the first carrier interconnect; and a system board comprising a system board contact electrically connected to the third carrier interconnect.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 91.0
- Lexical Diversity: 2.26531
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15948038', '14734600', '15803365', '15803345', '14964281']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9128124834593538
- 35 USC 102 Novelty (BERT): 0.573052664666398
- Combined Prediction Score: 0.8788365015800583
- Mean Citation Score: 263.29517000000004
- Max Citation Score: 458.23444000000006
- Similarity Product: 432.2731178869272

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test