PATENT CLAIM ANALYSIS

Application Number: 16156507
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-06
Patent Classification: ["327", "306000"]

Abstract:
A circuit includes: a first type of swing reduction circuit coupled between an input/output pad and a buffer circuit; and a second type of swing reduction circuit coupled between the input/output pad and the buffer circuit, wherein the first type of swing reduction circuit is configured to increase a voltage received by respective gates of a first subset of transistors of the buffer circuit when a voltage applied on the input/output pad is equal to a first supply voltage, and the second type of swing reduction circuit is configured to reduce a voltage received by respective gates of a second subset of transistors of the buffer circuit when the voltage applied on the input/output pad is equal to a second supply voltage.

Claim (Index 9):
The circuit of  claim 1 , wherein the second type of swing reduction circuit comprises a first n-type metal-oxide-semiconductor field-effect-transistor gated by a second bias voltage, and a second n-type metal-oxide-semiconductor field-effect-transistor sourced by the second bias voltage, the second bias voltage being higher than the first supply voltage but lower than the second supply voltage.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 97.0
- Lexical Diversity: 3.175
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12905294', '13799866', '10977146', '13341380', '14043535']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7714063345996461
- 35 USC 102 Novelty (BERT): 0.4742178305205658
- Combined Prediction Score: 0.7416874841917381
- Mean Citation Score: 155.56063799999995
- Max Citation Score: 165.84633
- Similarity Product: 118.6106372486758

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test