PATENT CLAIM ANALYSIS

Application Number: 16039570
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["438", "666000"]

Abstract:
A method for fabricating semiconductor wafers comprises creating a semiconductor wafer having a plurality of wide copper wires and a plurality of narrow copper wires embedded in a dielectric insulator. The width of each wide copper wire is greater than a cutoff value and each narrow copper is less than the cutoff value. An optical pass through layer is deposited over a top surface of the wafer and a photo-resist layer is deposited over the optical pass through layer. The wafer is exposed to a light source to selectively remove photo-resist, forming a self-aligned pattern where photo-resist only remains in areas above wide copper wires. The self-aligned pattern is transferred to the optical pass through layer and the remaining photo-resist is removed. The wafer is chemically etched to remove the narrow copper wires, defining narrow gaps in the dielectric insulator. The wafer is metallized with non-copper metal, forming narrow non-copper metal wires.

Claim (Index 19):
The method of  claim 17 , wherein the photo-resist is a positive tone photo-resist.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 95.0
- Lexical Diversity: 2.31429
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13160713', '15005700', '14146887', '13161036', '10674381']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8599578883221687
- 35 USC 102 Novelty (BERT): 0.5175832523113871
- Combined Prediction Score: 0.8257204247210905
- Mean Citation Score: 162.929854
- Max Citation Score: 166.99022
- Similarity Product: 78.78400000655769

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test