PATENT CLAIM ANALYSIS

Application Number: 16217185
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["365", "158000"]

Abstract:
A memory device is configured to identify a set of bit cells to be changed from a first state to a second state. In some examples, the memory device may apply a first voltage to the set of bit cells to change a least a first portion of the set of bit cells to the second state. In some cases, the memory device may also identify a second portion of the bit cells that remained in the first state following the application of the first voltage. In these cases, the memory device may apply a second voltage having a greater magnitude, duration, or both to the second portion of the set of bit cells in order to set the second portion of bit cells to the second state.

Claim (Index 36):
The method of  claim 29 , wherein the second voltage includes a second magnitude and a second duration, wherein the second magnitude is different from the first magnitude and the second duration is different from the first duration\n and wherein the method further comprises: identifying a first subset of bit cells from the first set of bit cells, wherein the first subset of bit cells contains each bit cell in the first set that remains in the second state, and identifying a second subset of bit cells from the second set of bit cells, wherein the second subset of bit cells contains each bit cell in the second set that remains in the first state; applying a third voltage to each bit cell of the first subset of bit cells to change each bit cell of the first subset of bit cells from the second state to the first state, wherein the third voltage includes a third magnitude and a third duration, and wherein at least one of the third magnitude and the third duration is greater than the first magnitude and the first duration, respectively; and applying a fourth voltage to each bit cell of the second subset of bit cells to change each bit cell of the second subset of bit cells from the first state to the second state, wherein the fourth voltage includes a fourth magnitude and a fourth duration, and wherein at least one of the fourth magnitude and the fourth duration is greater than the second magnitude and the second duration, respectively. wherein the magnitude or duration of the third voltage is configured to set each bit cell of the first subset of bit cells to the first state; and wherein the magnitude or duration of the fourth voltage is configured to set each bit cell of the second subset of bit cells to the second state.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 98.0
- Lexical Diversity: 3.04444
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14502367', '15605508', '14872438', '15852678', '15356223']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8281985642020914
- 35 USC 102 Novelty (BERT): 0.5088046803627089
- Combined Prediction Score: 0.7962591758181531
- Mean Citation Score: 248.76199
- Max Citation Score: 314.7376
- Similarity Product: 246.55667473258967

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test