PATENT CLAIM ANALYSIS

Application Number: 16107942
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-03
Patent Classification: ["438", "014000"]

Abstract:
A system for reconstructing wafer maps of semiconductor wafers includes: a processor; and memory having instructions stored thereon that, when executed by the processor, cause the processor to: receive test data of a wafer at sparse sampling locations of the wafer, the sparse sampling locations being selected based on a probing mask; and compute a reconstructed wafer map by performing compressed sensing with Zernike polynomials on the test data at sparse locations of the wafer.

Claim (Index 19):
The method of  claim 16 , further comprising:\n supplying the reconstructed wafer map to a feature extractor to compute a feature map; and supplying the feature map to a second trained classifier to classify the reconstructed wafer map with one of the plurality of labels, wherein the feature extractor is a second convolutional neural network, the second convolutional neural network being trained by training the classifier to predict the plurality of labels based on the training set of ground truth wafer maps.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 96.0
- Lexical Diversity: 1.62745
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15943392', '15886873', '16104449', '15882770', '15966375']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8593265254788173
- 35 USC 102 Novelty (BERT): 0.4967144364229007
- Combined Prediction Score: 0.8230653165732256
- Mean Citation Score: 233.289106
- Max Citation Score: 253.72859
- Similarity Product: 192.5183425450146

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test