PATENT CLAIM ANALYSIS

Application Number: 16427945
Application Type: Utility
Filing Date: 2019-05
Publication Date: 2019-09
Patent Classification: ["438", "586000"]

Abstract:
Electrical fuse (eFuse) and resistor structures and methods of manufacture are provided. The method includes forming metal gates having a capping material on a top surface thereof. The method further includes protecting the metal gates and the capping material during an etching process which forms a recess in a dielectric material. The method further includes forming an insulator material and metal material within the recess. The method further includes forming a contact in direct electrical contact with the metal material.

Claim (Index 6):
The semiconductor structure of  claim 1 , wherein the dielectric material and the metal gates are on a buried insulator layer.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 100.0
- Lexical Diversity: 1.8913
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15786730', '15466380', '14826628', '16132922', '15800888']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8970116406511706
- 35 USC 102 Novelty (BERT): 0.5327637936794218
- Combined Prediction Score: 0.8605868559539956
- Mean Citation Score: 352.728346
- Max Citation Score: 358.32132
- Similarity Product: 302.5806359250212

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test