PATENT CLAIM ANALYSIS

Application Number: 16119757
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["257", "369000"]

Abstract:
An integrated circuit includes a first gate electrode track and a second gate electrode track. The first gate electrode track includes a first gate electrode feature that forms an n-channel transistor as it crosses an n-diffusion region. The first gate electrode track does not cross a p-diffusion region. The second gate electrode track includes a second gate electrode feature that forms a p-channel transistor as it crosses a p-diffusion region. The second gate electrode track does not cross an n-diffusion region. The integrated circuit also includes a linear shaped conductor that crosses both the first and second gate electrode features in a reference direction perpendicular to the first and second gate electrode tracks. The linear shaped conductor provides electrical connection between the first and second gate electrode features.

Claim (Index 10):
The semiconductor chip as recited in  claim 9 , further comprising:\n a third-metal layer formed above the second-metal layer within the region of the semiconductor chip, the third-metal layer positioned third in the stack of metal layers counting upward from top surfaces of the gate electrode features, the third-metal layer separated from the second-metal layer by at least one insulator material, the third-metal layer including third-metal structures formed in part based on corresponding third-metal structure layout shapes used as an input to a lithography process, the third-metal layer layout shapes positioned in accordance with a third-metal vertical grid, the third-metal vertical grid including at least eight third-metal gridlines, wherein all third-metal gridlines extend in the x-direction, wherein at least eight of the at least eight third-metal gridlines have at least one third-metal structure layout shape positioned thereon, each third-metal structure layout shape in the region having a substantially rectangular shape and positioned to extend lengthwise in the x-direction in a substantially centered manner along an associated third-metal gridline, wherein some third-metal structures within the region are electrically connected to at least one second-metal structure within the region through at least one second-metal-to-third-metal via structure, each second-metal-to-third-metal via structure within the region formed in part based on corresponding second-metal-to-third-metal via structure layout shape used as an input to a lithography process, wherein at least one second-metal-to-third-metal via structure layout shape within the region is positioned in a substantially centered manner along an associated third-metal gridline.

Metadata:
- Claim Count in Document: 74.0
- Percentile: 96.0
- Lexical Diversity: 2.93478
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['16119794', '16119727', '15696728', '15696651', '15688187']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9340907955678516
- 35 USC 102 Novelty (BERT): 0.5824451212645543
- Combined Prediction Score: 0.898926228137522
- Mean Citation Score: 441.881312
- Max Citation Score: 468.04865
- Similarity Product: 462.386441794461

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test