PATENT CLAIM ANALYSIS

Application Number: 15928976
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["365", "185210"]

Abstract:
A circuit includes a detection circuit configured to determine a capacitance delay (RC-delay) in an initial stage of a read or program operation and to adjust timing for detecting data in a subsequent stage, or portion of a stage, of the same read or programing operation. In particular, during a program operation a detection circuit may be configured to detect a pre-charge time for a bit line and adjust a timing of subsequent verify stages of the bit line during the same program operation based on the detected pre-charge time. Additionally, a word line circuit may be configured to detect a pre-charge time for a word line during an initial stage of a read operation and adjust read timing for a subsequent portion of the same read stage, or subsequent read stage of the read operation based on the detected word line pre-charge time.

Claim (Index 8):
The circuit of  claim 1 , further comprising:\n a sense circuit controller configured to:\n identify the verify time; and \n output a control signal in response to identification of the verify time; and \n a sense circuit configured to sense a status of the memory cell in response to receipt of the control signal.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 90.0
- Lexical Diversity: 2.96154
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12947693', '13951228', '11297467', '13032855', '13053796']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.791599159989511
- 35 USC 102 Novelty (BERT): 0.4801946859535677
- Combined Prediction Score: 0.7604587125859167
- Mean Citation Score: 203.410328
- Max Citation Score: 208.92558
- Similarity Product: 149.5918776867628

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test