PATENT CLAIM ANALYSIS

Application Number: 15947830
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["711", "122000"]

Abstract:
A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The processor includes logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor. Other processors, methods, and systems are also disclosed.

Claim (Index 17):
The method of  claim 16  further comprising executing instructions to implement a virtual machine monitor (VMM), the VMM to form the first virtual processor by combining the first subset of the plurality of cores and to form the second virtual processor by combining the second subset of the plurality of cores.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 2.08
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13729579', '14498353', '15370904', '15221557', '13539044']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5076147034073869
- 35 USC 102 Novelty (BERT): 0.5004051766884349
- Combined Prediction Score: 0.5068937507354917
- Mean Citation Score: 203.732608
- Max Citation Score: 254.4563
- Similarity Product: 177.08371324021817

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test