PATENT CLAIM ANALYSIS

Application Number: 15893269
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["330", "296000"]

Abstract:
A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.

Claim (Index 4):
The circuit recited in  claim 3  wherein the gate electrode of the output transistor is coupled to a potential more negative than the reference potential and the voltage source is at a potential more positive than the reference potential.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 88.0
- Lexical Diversity: 2.40426
- Patent Class: 330.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15175610', '15843922', '13719619', '15718504', '15073853']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7719837069894784
- 35 USC 102 Novelty (BERT): 0.5284711746965586
- Combined Prediction Score: 0.7476324537601864
- Mean Citation Score: 244.618042
- Max Citation Score: 337.23526
- Similarity Product: 250.1125759065294

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test