PATENT CLAIM ANALYSIS

Application Number: 15866286
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["375", "226000"]

Abstract:
A dynamically reconfigurable interface for an automatic test equipment is disclosed where one or more synthetic instruments transmit the high speed signals as well as receive the high speed signals from a device under test so that testing can be performed at speeds higher than the ATE was originally designed to accommodate. Synthetic instruments are implemented on a field programmable gate array (FPGA) that operate at higher speeds than COTS instruments and can reach the frequencies that high speed I/O buses use. SIs can be created by configuring the FPGA, with different configurations creating different SIs. A single FPGA can house a number of SIs.

Claim (Index 6):
The interface of  claim 1 , wherein the field programmable gate array compresses the test results to facilitate transmission.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 1.4359
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['10206943', '14024949', '10207094', '10348999', '10207093']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4958986785195866
- 35 USC 102 Novelty (BERT): 0.4891807239327341
- Combined Prediction Score: 0.4952268830609013
- Mean Citation Score: 172.924402
- Max Citation Score: 180.58984
- Similarity Product: 120.34813988688472

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test