PATENT CLAIM ANALYSIS

Application Number: 16110555
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "326000"]

Abstract:
A semiconductor device in which the cell size is small and disturbance in reading operation is suppressed, and a method for manufacturing the semiconductor device. A first memory cell has a first memory transistor. A second memory cell has a second memory transistor. A control gate is shared by the first memory cell and the second memory cell. In plan view, the control gate is sandwiched between a first memory gate of the first memory transistor and a second memory gate of the second memory transistor.

Claim (Index 14):
The semiconductor device according to  claim 11 ,\n wherein the first charge accumulation film comprises a silicon nitride film, and wherein the first gate insulating film comprises a silicon oxide film.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 96.0
- Lexical Diversity: 2.58333
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15796815', '15880212', '13471949', '15486741', '15626092']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9298761482748364
- 35 USC 102 Novelty (BERT): 0.5284623549558968
- Combined Prediction Score: 0.8897347689429425
- Mean Citation Score: 251.519988
- Max Citation Score: 347.80258
- Similarity Product: 256.5717815061367

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test