PATENT CLAIM ANALYSIS

Application Number: 16159535
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-04
Patent Classification: ["327", "148000"]

Abstract:
Systems, methods, and apparatus for a circuit for synchronization of a reference signal and an output signal of a phased-lock loop (PLL) are disclosed. The method comprises continuously generating, by a clock detect circuit connected to the PLL, a clock detect signal indicating whether the reference signal of the PLL is present or lost. The method further comprises continuously sampling and storing, by a loop sampler circuit connected to the PLL, a voltage from a loop filter of the PLL, when the reference signal is present. In addition, the method comprises configuring a charge pump of the PLL into a high impedance state, thereby disabling the charge pump, when the clock detect signal indicates that the reference signal is lost. Further, the method comprises supplying the voltage to the PLL to maintain a frequency of the output signal of the PLL, when the reference signal is lost.

Claim (Index 8):
The method of  claim 7 , wherein supplying the stored control voltage to the PLL to stabilize the output signal when the clock detect signal indicates the reference signal is lost further comprises:\n controlling a switch of a loop sampler circuit with the clock detect signal, wherein the switch is open when the corresponding clock detect signal is present, and wherein the switch is closed when the corresponding clock detect signal is lost.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 97.0
- Lexical Diversity: 2.59375
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15170797', '12354614', '15172442', '11516383', '11321768']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8102296273442021
- 35 USC 102 Novelty (BERT): 0.4872404802557836
- Combined Prediction Score: 0.7779307126353603
- Mean Citation Score: 229.51562
- Max Citation Score: 248.19296
- Similarity Product: 201.7152437271118

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test