PATENT CLAIM ANALYSIS

Application Number: 16160223
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["257", "043000"]

Abstract:
Disclosed is an array substrate and a display device. The array substrate includes: a plurality of gate lines and a plurality of data lines formed on a base substrate, and a plurality of pixel units defined by the plurality of gate lines and the plurality of data lines intersecting each other, wherein each pixel unit includes a thin film transistor and a pixel electrode connected with the thin film transistor, the pixel electrode, the data line, as well as an active layer, a source and a drain of the thin film transistor are disposed in a same layer and are formed through a single patterning process,

Claim (Index 1):
An array substrate, comprising: a plurality of gate lines and a plurality of data lines formed on a base substrate, and a plurality of pixel units defined by the plurality of gate lines and the plurality of data lines intersecting each other, wherein each pixel unit comprises a thin film transistor and a pixel electrode connected with the thin film transistor, the pixel electrode, the data line, as well as an active layer, a source and a drain of the thin film transistor are disposed in a same layer and are formed through a single patterning process,\n wherein forming the pixel electrode, the data line, as well as the active layer, the source and the drain of the thin film transistor through the single patterning process comprises: forming a semiconductor film on the base substrate; coating a photoresist on the semiconductor film, exposing the photoresist with a dual tone mask and developing to completely remain the photoresist corresponding to an active layer region, to partially remain the photoresist corresponding to regions of the source, the drain, the data line and the pixel electrode, and to completely remove the photoresist in remaining regions so as to expose the semiconductor film; etching the exposed semiconductor film; ashing the photoresist to thin the photoresist corresponding to the active layer region and to expose the semiconductor film in regions other than the active layer region; transforming the exposed semiconductor film into a conductor by plasma processing to form a pattern comprising the active layer, the source, the drain, the data line and the pixel electrode; and removing residual photoresist.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 97.0
- Lexical Diversity: 2.16981
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14421947', '13985196', '14379818', '14380168', '14436995']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9205303449106532
- 35 USC 102 Novelty (BERT): 0.5176755031255438
- Combined Prediction Score: 0.8802448607321425
- Mean Citation Score: 277.96001800000005
- Max Citation Score: 330.26465
- Similarity Product: 275.773081991154

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test