PATENT CLAIM ANALYSIS

Application Number: 16191358
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["257", "738000"]

Abstract:
Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a system comprises a semiconductor component including an interposer substrate, a microelectronic die over the interposer substrate, and a connection structure composed of a volume of solder material between the interposer substrate and the microelectronic die. The connection structure can include at least one of (a) a single, unitary structure covering approximately all of the back side of the microelectronic die, and (b) a structure electrically isolated from internal active features of the microelectronic die. In some embodiments, the connection structure can be positioned to provide generally consistent stress distribution within the system.

Claim (Index 6):
The system of  claim 1 , further comprising an encapsulant over the interposer substrate and at least partially coveting the microelectronic die, first terminals, second terminals, and wire bonds.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 98.0
- Lexical Diversity: 1.8209
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15787041', '13155203', '11685621', '15144699', '11217627']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9145832637156638
- 35 USC 102 Novelty (BERT): 0.5073011040963535
- Combined Prediction Score: 0.8738550477537328
- Mean Citation Score: 273.278728
- Max Citation Score: 305.62338
- Similarity Product: 297.3233810606039

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test