PATENT CLAIM ANALYSIS

Application Number: 15894246
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "411000"]

Abstract:
A method of forming a gate stack that includes treating a semiconductor substrate with a wet etch chemistry to clean a surface of the semiconductor substrate and form an oxide containing interfacial layer, and converting the oxide containing interfacial layer to a binary alloy oxide based interlayer using a plasma deposition sequence including alternating a metal gas precursor and a nitrogen and/or hydrogen containing plasma. The method of forming the gate stack may further include forming a high-k dielectric layer atop the binary alloy oxide based interlayer.

Claim (Index 7):
The method of  claim 6 , wherein the converting the oxide containing interfacial layer to a metal oxide based alloy employs an atomic layer deposition (ALD) apparatus.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 88.0
- Lexical Diversity: 1.69811
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15228160', '15684263', '15684498', '14027398', '14030520']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9363109203476828
- 35 USC 102 Novelty (BERT): 0.5608725994878746
- Combined Prediction Score: 0.8987670882617022
- Mean Citation Score: 346.668944
- Max Citation Score: 447.74347
- Similarity Product: 359.0541484385597

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test