PATENT CLAIM ANALYSIS

Application Number: 16182138
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["365", "145000"]

Abstract:
An integrated circuit including a ferroelectric random access memory (FRAM) for storing firmware, and a method of updating that firmware. The FRAM is constructed to selectively operate as a 2T2C FRAM memory in a normal operating mode, and as a 1T1C FRAM memory in an update mode. Updating of the stored firmware is performed by placing the FRAM in its update (1T1C) mode and writing the updated code into alternate rows of the 1T1C half-cells at each of a plurality of memory locations, while the other 1T1C half-cells in the other alternate rows retain the original data. Following verification of the updated contents, the original data in the other half-cells are overwritten with the verified updated data, and the operating mode is changed back to the normal (2T2C) operating mode.

Claim (Index 1):
An integrated circuit, comprising:\n a ferroelectric random access memory (FRAM) operable as a two-transistor two-capacitor (2T2C) memory in a normal operating mode, and as a one-transistor one-capacitor (1T1C) memory in an update mode, comprising:\n an array of memory cells arranged in rows and columns, the memory cells in each column coupled to first and second bit lines, and each memory cell in the array comprising first and second half-cells, each comprising a ferroelectric capacitor and a pass transistor; and \n a plurality of sense amplifiers, each associated with a column of memory cells and coupled to the first and second bit lines for that column; and \n logic circuitry for controlling the FRAM to update its contents by performing a sequence of operations comprising:\n storing a first data set as complementary polarization states in each of a plurality of the memory cells; \n placing the FRAM array into the update mode; \n writing a second data set in the second half-cell of each of a selected plurality of the memory cells; \n verifying the second data set; \n responsive to successfully verifying the second data set, writing the second data set into the first half-cell of each of the selected plurality of memory cells; and \n then placing the FRAM array into the normal operating mode.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 98.0
- Lexical Diversity: 2.10145
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15139865', '12966963', '15019026', '16120107', '15678357']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7621980133392707
- 35 USC 102 Novelty (BERT): 0.58163467501033
- Combined Prediction Score: 0.7441416795063767
- Mean Citation Score: 289.107706
- Max Citation Score: 487.24094
- Similarity Product: 439.2661715041543

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test