PATENT CLAIM ANALYSIS

Application Number: 15939288
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["257", "737000"]

Abstract:
A package structure including a first semiconductor die, a second semiconductor die, a molding compound, a bridge structure, through insulator vias, an insulating encapsulant, conductive bumps, a redistribution layer and seed layers is provided. The molding compound encapsulates the first and second semiconductor die. The bridge structure is disposed on the molding compound and electrically connects the first semiconductor die with the second semiconductor die. The insulating encapsulant encapsulates the bridge structure and the through insulator vias. The conductive bumps are electrically connecting the first and second semiconductor dies to the bridge structure and the through insulator vias. The redistribution layer is disposed on the insulating encapsulant and over the bridge structure. The seed layers are respectively disposed in between the through insulator vias and the redistribution layer.

Claim (Index 17):
A method of fabricating a package structure, comprising:\n providing a carrier; forming a redistribution layer on the carrier, the redistribution layer has a first surface and a second surface opposite to the first surface; disposing a bridge structure on the first surface of the redistribution layer; forming a plurality of seed layers on the first surface of the redistribution layer and a plurality of through insulator vias on the plurality of seed layers; forming an insulating encapsulant on the first surface of the redistribution layer encapsulating the bridge structure, the plurality of through insulator vias and the seed layers; bonding a first semiconductor die and a second semiconductor die to the plurality of through insulator vias and the bridge structure through a plurality of conductive bumps, wherein the first semiconductor die and the second semiconductor die each comprises a plurality of conductive pillars that is physically joined with the plurality of conductive bumps; forming an underfill structure filling up the spaces in between each of the conductive pillars, wherein the underfill structure covers and is in physical contact with sidewalls of the plurality of conductive pillars; forming a molding compound encapsulating the first semiconductor die and the second semiconductor die; de-bonding the carrier to reveal the second surface of the redistribution layer; and forming a plurality of conductive balls on the second surface of the redistribution layer.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 90.0
- Lexical Diversity: 3.15556
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15716506', '15841331', '13112172', '15806347', '12949396']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9143202947650934
- 35 USC 102 Novelty (BERT): 0.4711368149550474
- Combined Prediction Score: 0.8700019467840888
- Mean Citation Score: 196.025222
- Max Citation Score: 203.83536
- Similarity Product: 169.90548941342354

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test