PATENT CLAIM ANALYSIS

Application Number: 16141923
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["257", "338000"]

Abstract:
A semiconductor device and a method for manufacturing the same are disclosed. The method comprises forming active patterns on a substrate that includes first and second logic cell regions adjacent to each other in a first direction, and forming on the substrate a device isolation layer exposing upper portions of the active patterns. The forming the active patterns comprises forming first line mask patterns extending parallel to each other in the first direction and running across the first and second logic cell regions, forming on the first line mask patterns an upper separation mask pattern including a first opening overlapping at least two of the first line mask patterns, forming first hardmask patterns from the at least two first line mask patterns, and etching the substrate to form trenches defining the active patterns.

Claim (Index 9):
The method of  claim 8 , wherein the active patterns comprise:\n first active patterns on the first logic cell region; second active patterns on the second logic cell region; third active patterns on the third logic cell region; and fourth active patterns on the fourth logic cell region, wherein the first and second active patterns are spaced apart from each other along the first direction with the first cell boundary interposed therebetween, and the third and fourth active patterns are spaced apart from each other in the first direction with the second cell boundary interposed therebetween, wherein the trenches comprise: first trenches defining long sidewalls of the first to fourth active patterns; and second trenches defining short sidewalls of the first to fourth active patterns, and wherein the device isolation layer is formed by filling lower portions of the first and second trenches with an insulation layer.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 97.0
- Lexical Diversity: 2.29508
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15478234', '14814601', '13618428', '15392725', '14682132']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9266597751235842
- 35 USC 102 Novelty (BERT): 0.5351423757816
- Combined Prediction Score: 0.8875080351893858
- Mean Citation Score: 256.3933
- Max Citation Score: 367.91516
- Similarity Product: 212.54909041699645

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test