PATENT CLAIM ANALYSIS

Application Number: 16002100
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "043000"]

Abstract:
According to one embodiment, A semiconductor device includes: a first semiconductor layer; and a plurality of first transistors including a plurality of first gate structures provided on the first semiconductor layer, a first channel region provided in the first semiconductor layer and under the first gate structure, and a plurality of first diffusion regions provided in the first semiconductor layer in a manner to sandwich the first channel region.

Claim (Index 13):
The manufacturing method of a semiconductor device of  claim 9 , wherein the second semiconductor layer is gallium arsenic (GaAs), indium gallium arsenic (InGaAs), indium arsenic (InAs), indium phosphorus (InP), indium antimony (InSb), indium gallium phosphorus (InGaP), gallium antimony (GaSb), gallium phosphorus (GaP), or a compound thereof.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 94.0
- Lexical Diversity: 2.20588
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14220643', '12886225', '10943250', '13795904', '16060058']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9160632178678972
- 35 USC 102 Novelty (BERT): 0.4899979600187711
- Combined Prediction Score: 0.8734566920829846
- Mean Citation Score: 160.55078799999995
- Max Citation Score: 170.31761
- Similarity Product: 110.8434805162722

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test