PATENT CLAIM ANALYSIS

Application Number: 16235926
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["326", "039000"]

Abstract:
An integrated circuit may include multiple programmable logic regions and a first plurality of routers. Each of the first plurality of routers is coupled to a respective region of a first portion of the programmable logic regions, and each of the first portion of the plurality of regions transmits configuration data to a first set of adjacent regions of the first portion of regions. The integrated circuit may also include a second plurality of routers, and each of the second plurality of routers is coupled to a respective region of a second portion of the regions. Each of the second portion of the regions transmits the configuration data to a second set of adjacent regions of the first portion of regions. The integrated circuit may also include a voltage regulator that distributes a voltage to each of the regions.

Claim (Index 8):
The integrated circuit of  claim 1 , comprising a pass gate between each adjacent programmable logic region of the plurality of logic regions.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 98.0
- Lexical Diversity: 3.84211
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15828238', '14882065', '15392225', '12998395', '16146849']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6569371614827505
- 35 USC 102 Novelty (BERT): 0.5252936002916928
- Combined Prediction Score: 0.6437728053636448
- Mean Citation Score: 204.679594
- Max Citation Score: 364.9466
- Similarity Product: 327.9135131107092

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test