PATENT CLAIM ANALYSIS

Application Number: 15860786
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["365", "063000"]

Abstract:
A non-volatile memory includes a first memory cell. The first memory cell includes five transistors and a first capacitor. The first transistor includes a first gate, a first terminal and a second terminal. The second transistor includes a second gate, a third terminal and a fourth terminal. The third transistor includes a third gate, a fifth terminal and a sixth terminal. The fourth transistor includes a fourth gate, a seventh terminal and an eighth terminal. The fifth transistor includes a fifth gate, a ninth terminal and a tenth terminal. The first capacitor is connected between the third gate and a control line. The third gate is a floating gate. The second terminal is connected with the third terminal. The fourth terminal is connected with the fifth terminal. The sixth terminal is connected with the seventh terminal. The eighth terminal is connected with the ninth terminal.

Claim (Index 16):
The non-volatile memory as claimed in  claim 13 , wherein the third word line and the fourth word line are connected with each other, and the third auxiliary line and the fourth auxiliary line are connected with each other.

Metadata:
- Claim Count in Document: 34.0
- Percentile: 86.0
- Lexical Diversity: 4.65714
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15151013', '15257359', '14471613', '15481889', '15257292']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8344860835257208
- 35 USC 102 Novelty (BERT): 0.5127871241449529
- Combined Prediction Score: 0.8023161875876441
- Mean Citation Score: 290.654716
- Max Citation Score: 299.1154
- Similarity Product: 182.24099870076185

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test