PATENT CLAIM ANALYSIS

Application Number: 15919514
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["257", "686000"]

Abstract:
A semiconductor device includes a base member having a first surface and a second surface on a side opposite to the first surface, the base member including at least one interconnect extending in a first direction along the first surface; two or more stacked bodies arranged in the first direction on the first surface, each of the two or more stacked bodies including semiconductor chips stacked in a second direction perpendicular to the first surface; and logic chips electrically connected respectively to the stacked bodies. Each of semiconductor chips includes first and second semiconductor layers. The first and second semiconductor layers each have an element surface and a back surface. An active element is provided on the element surface. The first semiconductor layer and the second semiconductor layer are bonded such that the element surface of the second semiconductor layer faces the element surface of the first semiconductor layer.

Claim (Index 2):
The device according to  claim 1 , wherein the base member includes an interconnect electrically connecting one of the logic chips and one of the stacked bodies.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 90.0
- Lexical Diversity: 2.63333
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15630496', '15905570', '14479078', '14475298', '14626569']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9227552128771214
- 35 USC 102 Novelty (BERT): 0.4707225919286741
- Combined Prediction Score: 0.8775519507822767
- Mean Citation Score: 153.98933200000005
- Max Citation Score: 163.98521000000005
- Similarity Product: 127.3524687282712

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test