PATENT CLAIM ANALYSIS

Application Number: 15975743
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["257", "099000"]

Abstract:
Provided is a light emitting diode (LED) mounted on a carrier substrate and including a semiconductor epitaxial structure and at least one electrode pad structure. The semiconductor epitaxial structure is electrically connected to the carrier substrate. The electrode pad structure includes a eutectic layer, a barrier layer and a ductility layer. The eutectic layer is adapted for eutectic bonding to the carrier substrate. The barrier layer is between the eutectic layer and the semiconductor epitaxial structure. The barrier layer blocks the diffusion of the material of the eutectic layer in the eutectic bonding process. The ductility layer is between the eutectic layer and the semiconductor epitaxial structure. The ductility layer reduces the stress on the LED produced by thermal expansion and contraction of the substrate during the eutectic bonding process, so as to prevent the electrode pad structure from cracking, and maintain the quality of the LED.

Claim (Index 1):
A light emitting diode, configured to be mounted to an external carrier substrate,\n the light emitting diode comprising: a semiconductor epitaxial structure comprising a first semiconductor layer, a second semiconductor layer and a light emitting layer disposed therebetween, wherein a portion of the first semiconductor layer is exposed by the second semiconductor layer and the light emitting layer; a current blocking layer disposed on the second semiconductor layer; a current dispersing layer covering the current blocking layer and in contact with the second semiconductor layer; a first metal layer disposed on the exposed first semiconductor layer; a second metal layer disposed on the current dispersing layer; a distributed Bragg reflector (DBR) layer disposed over the semiconductor epitaxial structure, wherein the DBR layer comprises at least one first opening to expose the first metal layer and a plurality of second openings to expose the second metal layer; a first electrode pad structure disposed on a top surface of the DBR layer and filled into the first opening; and a second electrode pad structure disposed on the top surface of the DBR layer and filled into the second openings, wherein at least one of the first electrode pad structure and the second electrode pad structure comprises:\n a ductility layer, comprising gold and disposed on the top surface of the DBR layer and filled into the opening; \n a eutectic layer for soldering, disposed on the ductility layer and comprising a plurality of blocks; and \n a barrier layer for blocking diffusion of material of the eutectic layer, disposed between the ductility layer and the eutectic layer, \n wherein the blocks of the eutectic layer are separately disposed within a region of the ductility layer.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 2.66667
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14980937', '15355219', '12721923', '13279782', '13077254']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.925775981928228
- 35 USC 102 Novelty (BERT): 0.5007076786926944
- Combined Prediction Score: 0.8832691516046747
- Mean Citation Score: 253.143858
- Max Citation Score: 257.70227
- Similarity Product: 184.17108351857425

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test