PATENT CLAIM ANALYSIS

Application Number: 16021195
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "421000"]

Abstract:
A semiconductor structure. The semiconductor structure includes two or more pillar structures disposed over a top surface of a substrate. The semiconductor structure further includes two or more contacts to the two or more pillar structures. The semiconductor structure further includes an insulator disposed between the two or more pillar structures and the two or more contacts. The two or more contacts are self-aligned to the two or more pillar structures.

Claim (Index 18):
The integrated circuit of  claim 17 , wherein the MTJ stack comprises an insulating layer formed between a first ferromagnetic layer and a second ferromagnetic layer.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 94.0
- Lexical Diversity: 2.71429
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15453432', '16021214', '15219652', '15411126', '15174030']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9202871614243784
- 35 USC 102 Novelty (BERT): 0.5130173264438106
- Combined Prediction Score: 0.8795601779263216
- Mean Citation Score: 210.516678
- Max Citation Score: 293.76788
- Similarity Product: 216.80278948756447

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test