PATENT CLAIM ANALYSIS

Application Number: 16133543
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-03
Patent Classification: ["710", "316000"]

Abstract:
Methods and apparatus for an inter-processor communication (IPC) link between two (or more) independently operable processors. In one aspect, the IPC protocol is based on a “shared” memory interface for run-time processing (i.e., the independently operable processors each share (either virtually or physically) a common memory interface). In another aspect, the IPC communication link is configured to support a host driven boot protocol used during a boot sequence to establish a basic communication path between the peripheral and the host processors. Various other embodiments described herein include sleep procedures (as defined separately for the host and peripheral processors), and error handling.

Claim (Index 35):
A peripheral-side processor apparatus configured to:\n execute an initial boot sequence; retrieve a first secondary boot image from a host-side processor apparatus; via a data communication link, transmit a notification to the host-side processor apparatus that the first secondary boot image has successfully been retrieved; and execute the first secondary boot image.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 97.0
- Lexical Diversity: 1.72857
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15721200', '14879024', '15942230', '14879027', '14879030']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7571143285201526
- 35 USC 102 Novelty (BERT): 0.5430866862510744
- Combined Prediction Score: 0.7357115642932448
- Mean Citation Score: 374.050128
- Max Citation Score: 421.94257000000016
- Similarity Product: 322.6864419058044

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test