PATENT CLAIM ANALYSIS

Application Number: 15940808
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-05
Patent Classification: ["330", "311000"]

Abstract:
An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.

Claim (Index 30):
The apparatus of  claim 24 , wherein the amplifier circuit and the multiple inductors comprise a low-noise amplifier.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 90.0
- Lexical Diversity: 2.78182
- Patent Class: 330.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12233352', '13988595', '15616824', '15389097', '15246977']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7871863430752909
- 35 USC 102 Novelty (BERT): 0.5244780465733352
- Combined Prediction Score: 0.7609155134250953
- Mean Citation Score: 277.30874600000004
- Max Citation Score: 298.13867
- Similarity Product: 210.45856125449657

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test