PATENT CLAIM ANALYSIS

Application Number: 15881627
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-08
Patent Classification: ["345", "690000"]

Abstract:
A semiconductor device array includes a plurality of first semiconductor devices arranged in an array and a plurality of second semiconductor devices distributed throughout the array of the plurality of first semiconductor devices. Each of the second semiconductor devices is interconnected with at least one of the first semiconductor devices. The second semiconductor devices are configured to function as a controller over a function of the at least one of the first semiconductor devices, respectively.

Claim (Index 7):
The semiconductor device array of  claim 1 , wherein the plurality of second semiconductor devices are controller chips that include one or more of the following properties:\n Used as a bare die mounted like a \u201cflip chip\u201d using a direct transfer system\n Passivated to prevent shorts from a circuit substrate to electrical components of the controller that are between contact pads \n Specific contact pad placement to facilitate a repeating, continuous circuit layout \n Directly mounted to the circuit substrate with solder, Anisotropic Conductive Film (\u201cACF,\u201d or Z-axis adhesive), or similar materials \n No external components are required to define the controller's behavior\n No required passive components to set current limit, define controller address, or stabilize power \n Output buffer design that allows one frame of data to be displayed while a next frame is being clocked (transferred) in to the controller\n A signal may be encoded into one or more communication lines to cause a switch to a subsequent buffer \n Controls approximately 3 to 16 LEDs with 6 to 16 bit dimming resolution\n For RGB, RGBW, or W (for illumination or backlighting) control \n One or more channels support defining of an original calibration offset that may scale input data during operation so a host does not calibrate brightness across the semiconductor device array \n High depth resolution that allows extra bits for calibration and offset of max output \n One or more channels that are individually current controlled with a maximum current according to peak efficiency of the LEDs under control \n One or more channels that are current limited on each pulse to operate near the LEDs peak efficiency point throughout respective dimming ranges \n Tolerant of 12V operation to endure large runs which result in large voltage drop toward a far end Communications rate is sufficient to communicate with thousands of controllers while maintaining high frame rates\n Up to 240 Hz refresh rate \n Up to 48 bits per controller \n 4096 controllers in a single network \n 50 Mbps serial communication \n Controller addressing is implied by position in the semiconductor device array, where a controller removes a certain number of data bits from a received frame data then forwards it to a next controller in the semiconductor device array \n Communications protocol\n Start of frame (buffer swap) \n Calibration save mode (optional) \n 1-wire, 2-wire, and 3-wire designs \n 7 to 12 pin controller design\n Power (12V) \n LED cathode 1 \n LED cathode 2 \n LED cathode 3 \n optional LED cathode n \n GND \n Received data in (frame data from host or previous controller) \n Received data out (buffered output to next controller) \n Clock in (optional) \n Clock out (optional) \n Transmitted data out (diagnostic/status data to host or next controller) \n Transmitted data in (diagnostic/status data from previous controller) \n Sized approximately 0.75 mm\u00d70.75 mm \n Contact pad size approximately 75 to 100 \u03bcm square, contact pad spacing approximately 75 to 100 \u03bcm \n Pins may be strategically laid out to support continuous circuit replication on a single layer circuit substrate, where no signals cross over others to go from a first controller to a subsequent controller.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 86.0
- Lexical Diversity: 2.19444
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15247698', '15247661', '15247678', '14864798', '15754107']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6487745345569486
- 35 USC 102 Novelty (BERT): 0.4831472527393617
- Combined Prediction Score: 0.6322118063751899
- Mean Citation Score: 152.00105000000005
- Max Citation Score: 155.01411000000004
- Similarity Product: 103.20868628986004

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test