PATENT CLAIM ANALYSIS

Application Number: 16179291
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["257", "077000"]

Abstract:
An ESD protection device includes a substrate structure having a substrate, first and second fins, and first and second doped regions having different conductivity types. The first doped region includes a first portion of the substrate and a first region of the first fin, the second doped region includes a second portion of the substrate, a second region of the first fin adjacent to the first region and the second fin. The ESD device also includes a first gate structure on a surface portion of the first region and on an entire surface of the second region of the first fin and including, from bottom to top, an interface layer on the surface portion of the first region and the surface portion of the second region of the first fin, a spacer, a high-k dielectric layer, a first work-function adjusting layer, a second work-function adjusting layer, and a gate.

Claim (Index 15):
The semiconductor device of  claim 14 , wherein the one or more ESD protection devices comprise a first ESD protection device and a second ESD protection device, the first ESD protection device being a same ESD protection device of  claim 1 , and further comprising: a first highly doped region in the first region and having a same conductivity type as a conductivity type of the first doped region and a doping concentration higher than a doping concentration of the first doped region; and a second highly doped region in the second fin and having a same conductivity type as a conductivity type of the second doped region and a doping concentration higher than a doping concentration of the second doped region, and the second ESD protection device comprising:\n a second substrate structure comprising:\n a second semiconductor substrate; \n a fourth fin and a fifth fin on the second semiconductor substrate; \n a fourth doped region and a fifth doped region having different conductivity types, the fourth doped region comprising a first portion of the second semiconductor substrate and a first region of the fourth fin, the fifth doped region comprising a second portion of the second semiconductor substrate, a second region of the fourth fin on the fifth doped region and adjacent to the first region of the fourth fin, and the fifth fin on the fifth doped region; \n a third gate structure on a surface portion of the first region of the fourth fin and a surface portion of the second region of the fourth fin, the third gate structure comprising: \n an interface layer on the surface portion of the first region of the fourth fin and the surface portion of the second region of the fourth fin; \n a spacer on the fourth fin and adjacent to the interface layer; \n a high-k dielectric layer on the interface layer and on opposite inner sidewalls of the spacer; \n a work-function adjusting layer on the high-k dielectric layer; and \n a gate on the work-function adjusting layer; and \n a fourth highly doped region in the first region of the fourth fin and having a same conductivity type as a conductivity type of the fourth doped region and a doping concentration higher than a doping concentration of the fourth doped region; and a fifth highly doped region in the fifth fin and having a same conductivity type as a conductivity type of the fifth doped region and a doping concentration higher than a doping concentration of the fifth doped region, wherein: the first doped region is a P-type doped region, the second doped region is an N-type doped region, the first highly doped region and the gate of the first gate structure are electrically connected to ground; the fourth doped region is an N-type doped region, the fifth doped region is a P-type doped region, the fourth highly doped region and the third gate structure are electrically connected to a power supply; the second highly doped region and the fifth highly doped region are electrically connected to each other and connected to an input terminal for receiving an external signal.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 98.0
- Lexical Diversity: 3.62222
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15397376', '15334130', '15262930', '14938850', '16136671']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9236519570472498
- 35 USC 102 Novelty (BERT): 0.5328403609600842
- Combined Prediction Score: 0.8845707974385332
- Mean Citation Score: 294.4419420000001
- Max Citation Score: 371.5673
- Similarity Product: 276.4731858511508

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test