PATENT CLAIM ANALYSIS

Application Number: 16058045
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "676000"]

Abstract:
An integrated circuit (IC) device includes an IC die and a plurality of leads. Each lead includes an unplated proximal end including a first material, and an unplated distal end including the first material. A plated bond wire portion extends between the proximal and distal ends and includes the first material and a plating of a second material thereon. A plurality of bond wires extend between the IC die and the plated bond wire portions of the leads. An encapsulation material surrounds the IC die and bond wires so that the unplated proximal end and plated bond wire portion of each lead are covered by the encapsulation material.

Claim (Index 19):
An integrated circuit (IC) device, comprising:\n an IC die; a plurality of leads, each lead of the plurality of leads having a planar shape along a plane parallel to a major surface of the IC die and comprising:\n a first edge surface and an opposite second edge surface, the second edge surface facing the IC die and the first edge surface facing away from the IC die; \n a first portion comprising a first material and being un-plated, the first portion being disposed between the first edge surface and the second edge surface, the first portion comprising a first major surface parallel to the plane; \n a second portion comprising the first material and being un-plated, the second portion being disposed between the second edge surface and the first portion, the second portion comprising a second major surface parallel to the plane; and \n a third portion comprising the first material and being disposed between the first portion and the second portion, the third portion comprising a third major surface parallel to the plane, the third portion further comprising a first plating layer comprising a second material, the third portion being spaced from the second edge surface by the second portion; and \n a plurality of bond wires, each bond wire of the plurality of bond wires extending between the IC die and the third portion of a respective lead; and an encapsulation material surrounding the IC die and the plurality of bond wires such that the second edge surface and the third portion of each lead are covered by the encapsulation material.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 96.0
- Lexical Diversity: 2.36735
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14565686', '14566826', '14293364', '13009362', '12581609']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.922913483502958
- 35 USC 102 Novelty (BERT): 0.5855927950165122
- Combined Prediction Score: 0.8891814146543133
- Mean Citation Score: 314.458814
- Max Citation Score: 504.92255
- Similarity Product: 440.0503930560917

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test