PATENT CLAIM ANALYSIS

Application Number: 15900706
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["370", "475000"]

Abstract:
A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.

Claim (Index 11):
The non-transitory computer-readable storage medium of  claim 9 , wherein the program code stored in the local memory of the first processing core includes a subset of the instructions stored in the local memory of the second processing core.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 88.0
- Lexical Diversity: 3.56098
- Patent Class: 370.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13196454', '14079308', '12240892', '15397363', '14818218']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5491502283201759
- 35 USC 102 Novelty (BERT): 0.5142306960872105
- Combined Prediction Score: 0.5456582750968794
- Mean Citation Score: 255.738896
- Max Citation Score: 267.60648
- Similarity Product: 179.46141871358867

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test