PATENT CLAIM ANALYSIS

Application Number: 15935831
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["324", "309000"]

Abstract:
An approach for accurately setting a duty cycle of PA switching waveforms uses an all-digital PVT sensor circuit. In various embodiments, the all-digital PVT sensor circuit measures a pulse width of a periodic reference signal using digital delay line, and subsequently, implements an off-chip digital calculation to program the digital delay line to delay this periodic reference signal so that, when the delayed periodic reference signal is combined with the original (undelayed) reference via a logical AND operation, the resulting signal conforms to a desired duty cycle. In one implementation, the PA is a class-D PA, which may have a single-ended configuration or a differential configuration having two single-ended structures operating in opposite phases.

Claim (Index 9):
The circuitry of  claim 1 , further comprising a processor configured to determine the number of the delay elements required for generating the desired duty cycle based on a measurement of the time-to-digital converter.

Metadata:
- Claim Count in Document: 46.0
- Percentile: 90.0
- Lexical Diversity: 1.63636
- Patent Class: 324.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13330880', '13128197', '15153496', '14501488', '12919215']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.547678743915615
- 35 USC 102 Novelty (BERT): 0.4653241191678788
- Combined Prediction Score: 0.5394432814408414
- Mean Citation Score: 158.04576400000005
- Max Citation Score: 175.95166
- Similarity Product: 134.2252877919662

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test