PATENT CLAIM ANALYSIS

Application Number: 15980238
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-02
Patent Classification: ["711", "100000"]

Abstract:
A memory system includes: a memory controller; and a plurality of memory devices each of which includes a plurality of input pads, where signals of different input pads are set as valid signals, wherein when the memory controller transfers a mask command to the memory devices and one or more valid signals among the valid signals of the memory devices are enabled along with the mask command, commands of a first kind among commands that are transferred to the memory devices from the memory controller after the mask command are implemented in one or more memory devices which correspond to the enabled one or more valid signals.

Claim (Index 15):
The memory device of  claim 14 , wherein the command mask mode control circuit controls the command decoder circuit in a normal mode when the internal mask signal is enabled and a valid signal corresponding to the memory device is enabled, and\n the command mask mode control circuit controls the command decoder circuit in the command mask mode when the internal mask signal is enabled and the valid signal corresponding to the memory device is disabled.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 93.0
- Lexical Diversity: 2.30612
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14031814', '14192531', '14569466', '10916156', '15183395']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5537808149334611
- 35 USC 102 Novelty (BERT): 0.4980060081584864
- Combined Prediction Score: 0.5482033342559637
- Mean Citation Score: 218.125448
- Max Citation Score: 230.8894
- Similarity Product: 156.3283461003065

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test