PATENT CLAIM ANALYSIS

Application Number: 16296094
Application Type: Utility
Filing Date: 2019-03
Publication Date: 2019-09
Patent Classification: ["327", "203000"]

Abstract:
The present disclosure is directed to a master-slave flip-flop memory circuit having a partial pass gate transistor at the input of the master latch. The partial pass gate transistor includes a pull-up clock enabled transistor for selectively coupling a high output of a test switch to the input of the master latch. The input of the master latch is also directly coupled to a low output of the test switch around the partial pass gate. In addition, a revised circuit layout is provided in which the master latch has three inverters. A first inverter is coupled to the input of the master latch. Second and third inverters are coupled to an output of the first inverter, with the second inverter having an output coupled to the input of the first inverter, and the third inverter having an output coupled to an output of the master latch. The first and second inverters are clock enabled, and the third inverter is reset enabled.

Claim (Index 2):
A device, comprising:\n a master slave flip flop memory circuit including:\n a master latch including an input and an output; \n a first node coupled to the input of the master latch; \n a second node; \n a test switch, including:\n a first transistor coupled to a clock signal, a first terminal of the first transistor directly coupled to the first node, and a second terminal of the first transistor directly coupled to the second node; and \n \n a slave latch including:\n a first inverter coupled to the output of the master latch; \n a second inverter coupled to the first inverter; \n a third inverter coupled to the first inverter and the second inverter; \n a first feedback loop that includes the second inverter and the third inverter; \n a fourth inverter coupled to the second inverter; \n a fifth inverter coupled the third inverter and the fourth inverter; and \n a second feedback loop coupled to the fifth inverter.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 99.0
- Lexical Diversity: 2.81967
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15892308', '14863369', '14498048', '10572446', '14498412']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7948184724531457
- 35 USC 102 Novelty (BERT): 0.5231002657828127
- Combined Prediction Score: 0.7676466517861125
- Mean Citation Score: 311.91591
- Max Citation Score: 357.8017
- Similarity Product: 291.61770439002515

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test