PATENT CLAIM ANALYSIS

Application Number: 15984133
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["257", "421000"]

Abstract:
A three dimensional magnetic random access memory array that includes a sourceline formed on a substrate and a magnetic memory element pillar that includes a plurality of magnetic memory element pillars formed over the substrate. The three dimensional magnetic random access memory array also includes a transistor formed between the magnetic memory element pillar, the transistor being functional to electrically connect the sourceline and magnetic memory element pillar. A plurality of magnetic memory element pillars may be formed over the substrate with a transistor between each memory element pillar to selectively connect or disconnect each of the magnetic memory element pillars. The transistor can include an epitaxial semiconductor structure having a gate dielectric formed at a side of the epitaxial semiconductor and a gate material formed on the gat dielectric such that the gate dielectric material is between the gate material and the semiconductor material.

Claim (Index 5):
The magnetic memory random access memory array as in  claim 3 , wherein the gate material comprises one or more of W, TiNi, TaN, TiN, and Ti.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 93.0
- Lexical Diversity: 2.67857
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15859070', '15859114', '15855953', '15865109', '15862495']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9299253184224868
- 35 USC 102 Novelty (BERT): 0.5315001358922142
- Combined Prediction Score: 0.8900828001694595
- Mean Citation Score: 281.9226940000001
- Max Citation Score: 351.95206
- Similarity Product: 226.7613640285588

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test