PATENT CLAIM ANALYSIS

Application Number: 16028430
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-09
Patent Classification: ["345", "214000"]

Abstract:
A pixel circuit is provided. The pixel circuit includes a light emitting element, first to third transistors, first to second capacitors and a voltage setting circuit. The light emitting element receives a system low voltage. The first transistor receives a system high voltage and controlled by an emission signal. The second transistor is coupled between the first transistor and the light emitting device. The first capacitor is coupled to the second transistor. The second capacitor is coupled between the first capacitor and the first transistor. The voltage setting circuit receives first to second scan signals, a source driving signal and a data voltage to remove charges stored in the first capacitor according to the first to second scan signal, and writes the data voltage to the first capacitor according to the source driving signal. The third transistor is controlled by the second scan signal and receives a first reference voltage.

Claim (Index 1):
A pixel circuit, comprising:\n a light emitting element, having an anode and a cathode receiving a system low voltage; a first transistor, having a first terminal receiving a system high voltage, a control terminal receiving an emission signal and a second terminal; a second transistor, having a first terminal coupled to the second terminal of the first transistor, a control terminal and a second terminal coupled to the anode of the light emitting element; a first capacitor, having a first end and a second end coupled to the control terminal of the second transistor; a second capacitor, having a first end coupled to the first end of the first capacitor and a second end coupled to the second terminal of the first transistor; a voltage setting circuit, coupled to the first end and the second end of the first capacitor, and receiving a first scan signal, a second scan signal, a source driving signal and a data voltage and writing the data voltage to the first capacitor according to the source driving signal; and a third transistor, having a first terminal coupled to the second terminal of the second transistor, a control terminal coupled to the first scan signal and a second terminal receiving a first reference voltage.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 95.0
- Lexical Diversity: 3.32653
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15146292', '14728844', '15380140', '12832924', '12883017']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6796920225705779
- 35 USC 102 Novelty (BERT): 0.4948671193679511
- Combined Prediction Score: 0.6612095322503152
- Mean Citation Score: 277.51531400000005
- Max Citation Score: 279.47577
- Similarity Product: 242.5869758554029

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test