PATENT CLAIM ANALYSIS

Application Number: 16217122
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["345", "213000"]

Abstract:
A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Claim (Index 9):
The display device according to  claim 6 , wherein the second clock signal line is connected to a sixth transistor through diode connection.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 98.0
- Lexical Diversity: 3.02128
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14883338', '15358209', '14161723', '15097414', '16172003']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6705676239226993
- 35 USC 102 Novelty (BERT): 0.5341690010073967
- Combined Prediction Score: 0.6569277616311691
- Mean Citation Score: 310.1011220000001
- Max Citation Score: 354.85666000000015
- Similarity Product: 307.14759265558484

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test