PATENT CLAIM ANALYSIS

Application Number: 15880897
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2020-01
Patent Classification: ["370", "536000"]

Abstract:
The system can utilize a standard high speed FPGA interface for a non-traditional use to facilitate the processing of high amounts of streaming digital data or the method can be implemented in other high speed data transfer systems. This system and method include the use of training/calibration pattern techniques implemented in a FPGA, or other system, to calibrate numerous multi-arm demultiplexers. The training/calibration sequence data rate being slower than the input data rate. In one example, the system and method utilized a mono-bit receiver capable of digitizing signals of at least 40 GHz with at least 20 GHz of instantaneous bandwidth.

Claim (Index 15):
The method of calibrating a high-speed data transfer system according to  claim 11 , wherein M is 4, 8, 16, 32, 64, 128, or 256.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 1.66154
- Patent Class: 370.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['11790707', '11035773', '11839466', '12219642', '12585410']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5065976330106007
- 35 USC 102 Novelty (BERT): 0.5029092690571829
- Combined Prediction Score: 0.506228796615259
- Mean Citation Score: 168.316846
- Max Citation Score: 184.42781
- Similarity Product: 113.36818510934827

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test