PATENT CLAIM ANALYSIS

Application Number: 15906760
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["257", "326000"]

Abstract:
A memory device includes a circuit having an element on a substrate, an interconnection layer above the circuit and that includes a pad electrode having a region for metal wiring bonding, a plurality of electrode layers between the circuit and the interconnection layer and that are stacked in a first direction from the circuit to the interconnection layer, a semiconductor pillar that extends in the first direction, and a storage film between the electrode layers and the semiconductor pillar. The pad electrode overlaps the circuit element as viewed in the first direction.

Claim (Index 4):
The memory device according to  claim 2 , further comprising:\n a conductive layer between the circuit and the plurality of electrode layers and connected to the semiconductor pillar, wherein the circuit includes an interconnection between the substrate and the conductive layer and is connected to the circuit element, and the contact plug is electrically connected to the interconnection.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 88.0
- Lexical Diversity: 2.13043
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15855186', '15906423', '15906890', '15457201', '14204512']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9104057675004524
- 35 USC 102 Novelty (BERT): 0.4837850843451773
- Combined Prediction Score: 0.867743699184925
- Mean Citation Score: 184.733368
- Max Citation Score: 233.47305
- Similarity Product: 191.9491564671904

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test