PATENT CLAIM ANALYSIS

Application Number: 15982595
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["710", "005000"]

Abstract:
A circuit device includes a first physical layer circuit to which a first bus is connected, a second physical layer circuit to which a second bus is connected, and a processing circuit that performs transfer processing in which a packet received from the first bus via the first physical layer circuit is transmitted to the second bus via the second physical layer circuit. The processing circuit includes a SYNC generation circuit that generates an m-bit SYNC, and when the packet is received from the first bus, the processing circuit outputs the m-bit SYNC to the second physical layer circuit.

Claim (Index 10):
An electronic device comprising:\n the circuit device according to  claim 1 ; and a processing device that is connected to the first bus.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 93.0
- Lexical Diversity: 2.91667
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12054315', '10997871', '09983971', '09974796', '11378234']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6684166749929802
- 35 USC 102 Novelty (BERT): 0.4807288372605824
- Combined Prediction Score: 0.6496478912197404
- Mean Citation Score: 186.59568
- Max Citation Score: 189.31062
- Similarity Product: 131.57739029407742

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test