PATENT CLAIM ANALYSIS

Application Number: 15968968
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["257", "384000"]

Abstract:
Various aspects of the disclosure include nanosheet-FET structures having a wrap-all-around contact where the contact wraps entirely around the S/D epitaxy structure, not just on the top and sides of the S/D epitaxy structure, thereby increasing contact area and ultimately allowing for improved S/D contact resistance. Other aspects of the disclosure include nanosheet-FET structures having a bottom isolation to reduce parasitic S/D leakage to the substrate.

Claim (Index 16):
The method of  claim 12 , further comprising:\n before the forming of the nanosheet stacks on the substrate:\n forming a bottom isolation layer on the substrate such that the bottom isolation layer is between the substrate and each nanosheet stack, each nanosheet stack comprising alternating sheets of silicon germanium (SiGe) and silicon (Si), the bottom-most SiGe layer of the nanosheet stacks being thicker than other SiGe layers of the nanosheet stacks; \n before the growing of the S/D epitaxy structure:\n forming an oxide layer between adjacent nanosheet stacks such that a top surface of the oxide layer is below a top level of the nanosheet stacks; \n removing any portions of the nanosheet stacks remaining between two given adjacent gate structures; \n partially indenting the SiGe layers of the nanosheet stacks; \n forming inner spacers within the indentations of the SiGe layers of the nanosheet stacks; \n forming a bottom sacrificial SiGe layer on the bottom isolation layer and on bottom-most inner spacers formed on adjacent bottom-most SiGe layers of the nanosheet stacks; \n after the growing of the S/D epitaxy structure:\n removing the oxide layer; \n forming a sacrificial SiGe cap layer around the S/D epitaxy structure such that the sacrificial SiGe cap layer merges with the bottom sacrificial SiGe layer, thereby forming a sacrificial SiGe-encapsulated S/D structure; \n forming a conformal liner layer on exposed surfaces of the sacrificial SiGe-encapsulated S/D structure; \n forming a dielectric fill on the conformal liner layer; \n removing a portion of the dielectric fill and a corresponding portion of the conformal liner layer such that at least a portion of the sacrificial SiGe cap layer is exposed; \n removing the sacrificial SiGe encapsulating the S/D structure.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 93.0
- Lexical Diversity: 1.62791
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15888401', '15434205', '15657659', '15241772', '15868742']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9137750985281752
- 35 USC 102 Novelty (BERT): 0.5315391986156977
- Combined Prediction Score: 0.8755515085369275
- Mean Citation Score: 305.3313100000001
- Max Citation Score: 339.0741
- Similarity Product: 225.89574713187213

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test