PATENT CLAIM ANALYSIS

Application Number: 15911403
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["385", "014000"]

Abstract:
A method of fabricating a waveguide device is disclosed. The method includes providing a substrate having an elector-interconnection region and a waveguide region and forming a patterned dielectric layer and a patterned redistribution layer (RDL) over the substrate in the electro-interconnection region. The method also includes bonding the patterned RDL to a vertical-cavity surface-emitting laser (VCSEL) through a bonding stack. A reflecting-mirror trench is formed in the substrate in the waveguide region, and a reflecting layer is formed over a reflecting-mirror region inside the waveguide region. The method further includes forming and patterning a bottom cladding layer in a wave-tunnel region inside the waveguide region and forming and patterning a core layer and a top cladding layer in the waveguide region.

Claim (Index 3):
The device of  claim 2 , wherein the substrate includes silicon.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 90.0
- Lexical Diversity: 2.4717
- Patent Class: 385.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14715039', '13399098', '13905404', '13628927', '15342669']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7828152961542378
- 35 USC 102 Novelty (BERT): 0.5064734840334273
- Combined Prediction Score: 0.7551811149421568
- Mean Citation Score: 165.94493799999995
- Max Citation Score: 211.4566
- Similarity Product: 135.11518361608984

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test