PATENT CLAIM ANALYSIS

Application Number: 16270886
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-12
Patent Classification: ["385", "014000"]

Abstract:
Techniques are provided for single edge coupling of chips with integrated waveguides. For example, a package structure includes a first chip with a first critical edge, and a second chip with a second critical edge. The first and second chips include integrated waveguides with end portions that terminate on the first and second critical edges. The second chip includes a signal reflection structure that is configured to reflect an optical signal propagating in one or more of the integrated waveguides of the second chip. The first and second chips are edge-coupled at the first and second critical edges such that the end portions of the integrated waveguides of the first and second chips are aligned to each other, and wherein all signal input/output between the first and second chips occurs at the single edge-coupled interface.

Claim (Index 18):
The package structure of  claim 17 , wherein the first and second integrated waveguides of the second chip have end portions that terminate on third edge of the second chip, wherein the third edge of the second chip comprises the signal reflection structure.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 99.0
- Lexical Diversity: 2.42373
- Patent Class: 385.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['16015884', '16239864', '14662610', '15222169', '15480277']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8522943265944035
- 35 USC 102 Novelty (BERT): 0.5527799304760947
- Combined Prediction Score: 0.8223428869825726
- Mean Citation Score: 308.358284
- Max Citation Score: 435.08148
- Similarity Product: 326.60783397936336

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test