PATENT CLAIM ANALYSIS

Application Number: 16184307
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-05
Patent Classification: ["711", "165000"]

Abstract:
Direct data transfer between devices having a shared bus may be implemented with reduced involvement from a controller associated with the devices. A controller, a source memory device, and a target memory device may be coupled with a shared bus. The controller may identify a source address at the source memory device for data to be transferred to the target memory device. The controller also may identify a target address in the target memory device, and initiate a data transfer directly from the source to the target through a command that is received at both the source and the target memory device. In response to the command, the source memory device may read data out to the bus, and the target memory may read the data from the bus and store the data starting at the target address without further commands from the controller.

Claim (Index 9):
The method of  claim 8 , wherein the read operation and the write operation occur concurrently.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 98.0
- Lexical Diversity: 2.85185
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14928988', '15855649', '15199802', '15189900', '10915039']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5749669851326257
- 35 USC 102 Novelty (BERT): 0.517570048523204
- Combined Prediction Score: 0.5692272914716835
- Mean Citation Score: 203.900334
- Max Citation Score: 270.3864
- Similarity Product: 149.87400779027936

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test