PATENT CLAIM ANALYSIS

Application Number: 15741742
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-11
Patent Classification: ["377", "064000"]

Abstract:
The present application discloses a shift, register circuit having a plurality of shift register units cascaded in series. The shift register circuit includes a first shift register unit and a second shift register unit. The first shift register unit includes a first pull-up node and a first output terminal and the second shift register unit includes a second pull-up node and a second output terminal. The shift register circuit includes a stabilizer circuit coupled to both the first shift register unit and the second shift register unit such that the first pull-up node is directly connected to the second pull-up node as a common pull-up node and configured to maintain a potential level of the common pull-up node stable during a stabilizing period when none of the first output terminal and the second output terminal output a turn-on signal.

Claim (Index 17):
The shift register circuit of  claim 9 , wherein the first shift register unit is a n-th unit of the plurality of shift register units and the second shift register unit is a (n+1)-th unit of the plurality of shift register units, wherein the n-th unit receives an input signal which is an output signal of a (n\u22122)-th unit of the plurality of shift register units and a reset signal which is an output signal of a (n+3)-th unit of the plurality of shift register units, wherein n is an integer greater than 2, wherein the n-th unit is configured to receive a first clock signal and the (n+1)-th unit is configured to receive a second clock signal, wherein the first clock signal and the second clock signal have a same clock period, the second clock signal has a time delay relative to the first clock signal, the time delay being set to be a quarter of the clock period.

Metadata:
- Claim Count in Document: 51.0
- Percentile: 86.0
- Lexical Diversity: 2.88
- Patent Class: 377.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15752518', '15520557', '15529731', '15506398', '15327852']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7719406392603714
- 35 USC 102 Novelty (BERT): 0.5019659494024667
- Combined Prediction Score: 0.7449431702745809
- Mean Citation Score: 333.4888660000001
- Max Citation Score: 342.74957
- Similarity Product: 245.4778120324552

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test