PATENT CLAIM ANALYSIS

Application Number: 15937174
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["710", "110000"]

Abstract:
An information handling system includes an Inter-Integrated Circuit (I2C) master device and an I2C slave device coupled to the I2C master device via an I2C bus. The I2C slave device is configured with a pre-set I2C address and includes seeding data that is unique to the I2C slave device. The I2C master device receives the seeding data and addresses the I2C slave device at an I2C slave address instead of at the pre-set I2C address, wherein the I2C slave address is based upon the seeding data.

Claim (Index 16):
The I2C master device of  claim 15 , wherein the I2C address logic further:\n selects the I2C slave address from a pool of I2C addresses; and provides an address command to the I2C slave device.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 90.0
- Lexical Diversity: 2.2439
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14658553', '13550715', '15486685', '14053823', '15835457']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6415093116560111
- 35 USC 102 Novelty (BERT): 0.53104790807028
- Combined Prediction Score: 0.630463171297438
- Mean Citation Score: 203.44875
- Max Citation Score: 349.10706
- Similarity Product: 283.775148191489

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test