PATENT CLAIM ANALYSIS

Application Number: 15917415
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["438", "135000"]

Abstract:
A method for fabricating an anode-shorted field stop insulated gate bipolar transistor (IGBT) comprises selectively forming first and second semiconductor implant regions of opposite conductivity types. A field stop layer of a second conductivity type can be grown onto or implanted into the substrate. An epitaxial layer can be grown on the substrate or on the field stop layer. One or more insulated gate bipolar transistors (IGBT) component cells are formed within the epitaxial layer.

Claim (Index 6):
A method for fabricating an anode-shorted field stop insulated gate bipolar transistor (IGBT), comprising:\n a) forming one or more insulated gate bipolar transistors (IGBT) component cells within a top surface of an epitaxial layer of a first conductivity type; b) thinning a back surface of the epitaxial layer to a desired thickness; c) performing a blanket implant of the first conductivity type to the back surface of the epitaxial layer to form a field stop layer, wherein a charge carrier concentration of the field stop layer is greater than that of the epitaxial layer; d) performing a blanket implant of a second conductivity type that is opposite the first conductivity type to a back surface of the field stop layer to form first semiconductor implant regions; e) laser activating the field stop layer and first semiconductor layer; f) depositing a first metal layer to a backside of the first semiconductor layer; g) selectively forming isolated semiconductor implant regions by laser cutting through one or more portions of the first metal layer and the first semiconductor implant region to expose one or more portions of the field stop layer; h) performing a blanket implant of the first conductivity type to the exposed portions of the field stop layer form second semiconductor implant regions within the exposed portions of the field stop layer, wherein a charge carrier concentration of the second semiconductor implant regions is greater than that of the field stop layer; i) depositing a second metal layer on the first metal layer and exposed portions of the second semiconductor implant regions.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 1.59615
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13192385', '15177191', '12484170', '13024256', '15479281']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8760448790019848
- 35 USC 102 Novelty (BERT): 0.5519834865837069
- Combined Prediction Score: 0.843638739760157
- Mean Citation Score: 316.872154
- Max Citation Score: 423.19415
- Similarity Product: 353.9182831566273

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test