PATENT CLAIM ANALYSIS

Application Number: 15995983
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["710", "100000"]

Abstract:
A system and method wherein die-to-die communication are provided between a first die and a second die contained in a common integrated circuit (IC) package, a first processor on the first die communicatively coupled to the first connectivity circuitry by the first processor bus and configured to provide first bus transactions, to be provided to the second connectivity circuitry, to the first processor bus, the first connectivity circuitry configured to utilize a multiple simultaneous outstanding transaction capability supporting multiple simultaneous outstanding write transactions concurrent with multiple simultaneous outstanding read transactions, the second connectivity circuitry configured to provide processor bus flow control information and elasticity buffer status information pertaining to the elasticity buffer to the first connectivity circuitry via a common message for flow control.

Claim (Index 15):
Apparatus comprising:\n a common integrated circuit (IC) package; a first processor on a first semiconductor die, the first semiconductor die contained in the common IC package; a second processor on a second semiconductor die, the second semiconductor die contained in the common IC package; first connectivity circuitry on the first semiconductor die, the first connectivity circuitry connected to the first processor via a first processor bus, the first connectivity circuitry configured to convert first processor bus transactions on the first processor bus into die-to-die message packets for communication via a die-to-die interconnect, the first connectivity circuitry further configured to utilize a multiple simultaneous outstanding transaction capability supporting multiple simultaneous outstanding write transactions concurrent with multiple simultaneous outstanding read transactions; second connectivity circuitry on the second semiconductor die, the second connectivity circuitry connected to the die-to-die interconnect for receiving the die-to-die message packets, the second connectivity circuitry connected to the second processor via a second processor bus, the second connectivity circuitry configured to convert the die-to-die message packets into second processor bus transactions on the second processor bus, the second connectivity circuitry further configured to provide processor bus flow control information and elasticity buffer status information pertaining to an elasticity buffer in the second connectivity circuitry to the first connectivity circuitry for flow control, wherein two message classifications are used for the flow control, the two message classifications comprising:\n a first message classification for processor bus interface messages communicating processor bus interface protocol information and elasticity buffer flow control information; and \n a second message classification for non-processor-bus-interface messages communicating elasticity buffer flow control information.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 94.0
- Lexical Diversity: 2.2
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15995881', '13434605', '15043622', '13028250', '11855706']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5948119161341894
- 35 USC 102 Novelty (BERT): 0.4847875324815952
- Combined Prediction Score: 0.58380947776893
- Mean Citation Score: 145.331639
- Max Citation Score: 235.63698
- Similarity Product: 200.25007592077367

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test