PATENT CLAIM ANALYSIS

Application Number: 15992484
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["348", "308000"]

Abstract:
A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.

Claim (Index 8):
A method of operating an image sensor linked with read out circuitry, the image sensor comprising a photodiode with a full well capacity, a storage node with a charge storage capacity at least twice the full well capacity, and a transfer gate linking the photodiode and the storage node, the method comprising:\n determining to perform multiple charge transfers from the photodiode to the storage node during an image exposure time frame; acquiring a first charge in the photodiode during a first integration period within the image exposure time frame; after the first integration period, activating the transfer gate to transfer the first charge from the photodiode to the storage node; deactivating the transfer gate after the transfer of the first charge from the photodiode to the storage node; acquiring a second charge in the photodiode during a second integration period within the image exposure time frame, the second integration period starting after the deactivation of the transfer gate; after the second integration period, activating the transfer gate to transfer the second charge from the photodiode to the storage node; and at an end of the image exposure time frame, transferring a total charge accumulated in the storage node to the read out circuitry, the total charge comprising the first charge and the second charge.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 93.0
- Lexical Diversity: 2.77778
- Patent Class: 348.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14324179', '14886029', '13756459', '15225681', '13782532']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7038597841586962
- 35 USC 102 Novelty (BERT): 0.5558478554198564
- Combined Prediction Score: 0.6890585912848123
- Mean Citation Score: 408.153986
- Max Citation Score: 452.12228
- Similarity Product: 350.7643291549492

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test