PATENT CLAIM ANALYSIS

Application Number: 15973285
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["385", "130000"]

Abstract:
By using various anisotropic silicon etching techniques, a silicon substrate layer ( 1 ) and an expitaxial buffer layer ( 2 ) under the device structure are removed to obtain a monolithic photonic integration of silicon substrate suspended light-emitting diode (LED) with optical waveguide, and an ultra-thin device monolithically integrated with a suspended LED and an optical waveguide is obtained by further using the nitride back thinning etching technique. Therefore, internal loss of the LED is reduced and light emitting efficiency is improved. In the device according to the present disclosure, the light source and the optical waveguide are integrated on the same wafer, which solves the problem of monolithic integration of planar photons, enables the light emitted by the LED to be transmitted along the optical waveguide, addresses the problem of transmission of light in the optical waveguide, and implements the function of transmitting light within a plane.

Claim (Index 6):
A method for fabricating monolithic photonic integration of silicon substrate suspended LED with optical waveguide according to  claim 1 , the method comprising:\n step (1): polishing to thin the silicon substrate of nitride-on-silicon wafer from backside; step (2): uniformly coating a photoresist layer on the upper surface of the silicon-based nitride wafer, and defining an optical waveguide region and an n-GaN step region on the photoresist layer by using exposure technique; step (3): etching the n-GaN step region and the optical waveguide region by using a reactive ion beam; step (4): removing residual photoresist to obtain the step-shaped stage, the p-GaN layer, the InGaN/GaN quantum well and the optical waveguide; step (5): uniformly coating a photoresist layer on the upper surface of the silicon-based nitride wafer, lithographically defining a p-electrode window region and an n-electrode window region, vapor depositing Ni/Au in the p-electrode window region and the n-electrode window region respectively to form ohmic contact and practice the p-electrode and the n-electrode, wherein after the residual photoresist is removed, an LED is obtained; step (6): fully covering a thick photoresist on the top device structures for device protection, and spin coating a photoresist layer on the bottom silicon substrate, and photolithographically defining a backside etching window aligning with and totally covering the conductive region and the light-emitting region in a p-electrode region, and the conductive region and the optical waveguide region in an n-electrode region by the double-sided alignment technique; step (7): using the epitaxial buffer layer as an etching barrier layer, and etching the silicon-based substrate layer to a lower surface of the epitaxial buffer layer to form a cavity via a back etching window by using the back deep silicon etching technique; step (8): thinning the nitride on the epitaxial buffer layer and the n-GaN layer from bottom to top by using the nitride back thinning etching technique; and step (9): removing residual photoresist to obtain the photonic wavelength integrated photonic device of a silicon substrate suspended LED.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 93.0
- Lexical Diversity: 1.92857
- Patent Class: 385.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15809598', '16311818', '14141549', '14918342', '10394559']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8183649288234284
- 35 USC 102 Novelty (BERT): 0.497767884933338
- Combined Prediction Score: 0.7863052244344193
- Mean Citation Score: 250.061032
- Max Citation Score: 264.77078
- Similarity Product: 201.0428661169136

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test