PATENT CLAIM ANALYSIS

Application Number: 16034632
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["345", "077000"]

Abstract:
Column circuit blocks and row circuit blocks include circuit block units each being opposed to a step of the series of steps. Each of the circuit block units consists of m column circuit blocks and n row circuit blocks disposed side by side along a virtual line connecting outer vertices of the opposite step in an order corresponding to an order of pixel rows and pixel columns of the opposite step. A total sum of lengths of sides of the m column circuit blocks opposed to the virtual line projected to the virtual line and lengths of sides of the n row circuit blocks opposed to the virtual line projected to the virtual line is not greater than the virtual line length. A power line is provided outer than the display region and between the display region and the row circuit blocks and the column circuit blocks.

Claim (Index 13):
A method of designing a display device,\n the display device including a display region including a plurality of pixel columns and a plurality of pixel rows, a plurality of row circuit blocks and a plurality of column circuit blocks disposed side by side along the boundary of the display region, and a first power line configured to supply electric power to pixels in the display region, each of the plurality of row circuit blocks being configured to supply a first signal to a pixel row associated therewith, each of the plurality of column circuit blocks being configured to supply a second signal to a pixel column associated therewith, the perimeter of the display region including a series of steps each including sides of a plurality of pixels, each step of the series of steps being defined by pixels in m pixel columns and pixels in n pixel rows, n and m each being a variable to take a natural number determined depending on the step, the plurality of column circuit blocks and the plurality of row circuit blocks including a plurality of circuit block units each being opposed to a step of the series of steps, and the method comprising designing each of the plurality of circuit block units to satisfy the following conditions: that the circuit block unit consists of m column circuit blocks and n row circuit blocks disposed side by side along a virtual line connecting outer vertices of the opposite step in an order corresponding to an order of pixel rows and pixel columns at the opposite step; that a total sum of lengths of sides of the m column circuit blocks opposed to the virtual line that are projected to the virtual line and lengths of sides of the n row circuit blocks opposed to the virtual line that are projected to the virtual line is equal to or shorter than a length of the virtual line; and that the first power line is provided outer than the display region and between the display region and the plurality of row circuit blocks and the plurality of column circuit blocks.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 95.0
- Lexical Diversity: 2.64912
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13422124', '11555514', '10224383', '11750013', '13421990']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5975972668674499
- 35 USC 102 Novelty (BERT): 0.470216430843223
- Combined Prediction Score: 0.5848591832650272
- Mean Citation Score: 177.747774
- Max Citation Score: 180.1073
- Similarity Product: 148.1187573517084

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test