PATENT CLAIM ANALYSIS

Application Number: 15910938
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["711", "122000"]

Abstract:
Examples may include techniques to manage data in a data acquisition system including allocating memory in a first stage buffer; storing data received by a data provider into the allocated memory in the first stage buffer; and storing a key identifying the stored data and an address in the first stage buffer for the stored data in an entry in a first keys data structure. Further steps include receiving a request from a filtering unit to get the stored data from the first stage buffer, the request including the key; retrieving the address in the first stage buffer from the entry in the first keys data structure associated with the key; and returning the address in the first stage buffer to the filtering unit. Further steps include receiving a request to store at least a portion of the stored data in a second stage buffer, the request including the key; moving the at least a portion of the stored data from the first stage buffer to the second stage buffer; moving the key from the first keys data structure to a second keys data structure; updating an address for the second stage buffer of the at least a portion of the stored data in the second keys data structure; and freeing memory allocated to the stored data in the first stage buffer.

Claim (Index 1):
A data acquisition apparatus comprising:\n circuitry; and a first logic for execution by the circuitry to allocate memory in a first stage buffer, to store data received by a data provider into the allocated memory in the first stage buffer, and to store a key identifying the data and an address in the first stage buffer for the stored data in an entry in a first keys data structure; a second logic for execution by the circuitry to receive a request from a filtering unit to get the stored data from the first stage buffer, the request including the key, to retrieve the address in the first stage buffer from the entry in the first keys data structure associated with the key, and to return the address in the first stage buffer to the filtering unit; and a third logic for execution by the circuitry to receive a request to store at least a portion of the stored data in a second stage buffer, the request including the key, to move the at least a portion of the stored data from the first stage buffer to the second stage buffer, to move the key from the first keys data structure to a second keys data structure, to update an address for the second stage buffer of the at least a portion of the stored data in the second keys data structure, and to free memory allocated to the stored data in the first stage buffer.

Metadata:
- Claim Count in Document: 68.0
- Percentile: 90.0
- Lexical Diversity: 4.05172
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15396420', '15194515', '13840420', '14512203', '14996748']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4781699077755195
- 35 USC 102 Novelty (BERT): 0.4627035892877493
- Combined Prediction Score: 0.4766232759267425
- Mean Citation Score: 122.2496992
- Max Citation Score: 127.34961
- Similarity Product: 91.80374533545611

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test