PATENT CLAIM ANALYSIS

Application Number: 15888944
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-10
Patent Classification: ["257", "077000"]

Abstract:
In a vertical power MOSFET having a superjunction structure, the withstand voltage of the power MOSFET can be ensured even if the aspect ratios of an n-type column region and a p-type column region are increased so as to vary the impurity concentration of the p-type column region. P-type semiconductor regions PR 1  are formed on the sides of an n-type column NC 1  adjacent to a p-type column region PC 1 . In this configuration, the p-type semiconductor region PR 1  is formed from the upper end of the n-type column region NC 1  to about a half depth of a height from the upper end to the lower end of the side of the n-type column region NC 1 . This inclines the sides of the overall p-type column region including the p-type semiconductor regions PR 1  and the p-type column region PC 1.

Claim (Index 5):
The semiconductor device according to  claim 1 ,\n wherein the first pillar under the first semiconductor region is in contact with the second pillar.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 88.0
- Lexical Diversity: 2.41935
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15869023', '14965899', '14826075', '15640375', '15355469']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.930089565699488
- 35 USC 102 Novelty (BERT): 0.499040778910881
- Combined Prediction Score: 0.8869846870206274
- Mean Citation Score: 249.31818
- Max Citation Score: 261.54218
- Similarity Product: 207.42155767003769

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test