PATENT CLAIM ANALYSIS

Application Number: 15903665
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "691000"]

Abstract:
The power module semiconductor device ( 2 ) includes: an insulating substrate ( 10 ); a first pattern ( 10 a ) (D) disposed on the insulating substrate ( 10 ); a semiconductor chip (Q) disposed on the first pattern; a power terminal (ST, DT) and a signal terminal (CS, G, SS) electrically connected to the semiconductor chip; and a resin layer ( 12 ) configured to cover the semiconductor chip and the insulating substrate. The signal terminal is disposed so as to be extended in a vertical direction with respect to a main surface of the insulating substrate.

Claim (Index 1):
A power module semiconductor device comprising:\n an insulating substrate; a first pattern of a copper plate layer disposed on the insulating substrate; a semiconductor chip disposed on the first pattern; a power terminal and a signal terminal electrically connected to the semiconductor chip; and a resin layer configured to cover the semiconductor chip and the insulating substrate, wherein the signal terminal is disposed so as to be extended in a vertical direction with respect to a main surface of the insulating substrate.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 88.0
- Lexical Diversity: 2.12727
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14663135', '14829026', '13950904', '15227579', '15827944']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9097790801028756
- 35 USC 102 Novelty (BERT): 0.5299898883170983
- Combined Prediction Score: 0.8718001609242979
- Mean Citation Score: 249.39417000000003
- Max Citation Score: 343.45593
- Similarity Product: 317.75504237198174

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test