PATENT CLAIM ANALYSIS

Application Number: 15964929
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["365", "185110"]

Abstract:
Provided are a programming method, programming apparatus and storage medium to reduce threshold voltage distribution in a non-volatile memory. The method includes performing program loops on a target page by sequentially using first programming voltages Vn; and when a predetermined condition is reached, proceeding to perform program loops on the target page by sequentially using second programming voltages Um until the target page is successfully programmed. Vn=V 1 +(n−1)×d 1 , where n denotes a program loop count of the first programming voltages, n is an integer greater than or equal to 1, and V 1  and d 1  are all positive numbers. Um=Vn+(m−1)×d 2 , where m denotes a program loop count of the second programming voltages, m is an integer greater than or equal to 2, and d 2  is a positive number not equal to d 1.

Claim (Index 17):
The programming apparatus of  claim 13 , wherein the predetermined condition is that a number of memory cells that have failed to be programmed in the target page is less than a preset number.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 2.06494
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15964913', '14947567', '13022688', '14211077', '13919010']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7856560950048758
- 35 USC 102 Novelty (BERT): 0.5260742982855154
- Combined Prediction Score: 0.7596979153329397
- Mean Citation Score: 241.544132
- Max Citation Score: 327.07104
- Similarity Product: 203.07186984798432

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test