PATENT CLAIM ANALYSIS

Application Number: 16055401
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-11
Patent Classification: ["438", "591000"]

Abstract:
A semiconductor device includes a metal gate stack. The metal gate stack includes a high-k gate dielectric and a metal gate electrode over the high-k gate dielectric. The metal gate electrode includes a first top surface and a second bottom surface substantially diametrically opposite the first top surface. The first top surface includes a first surface length and the second bottom surface includes a second surface length. The first surface length is larger than the second surface length. A method of forming a semiconductor device is provided.

Claim (Index 6):
The semiconductor device of  claim 1 , wherein the metal gate stack comprises an interfacial layer below the high-k gate dielectric.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 96.0
- Lexical Diversity: 2.90625
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15376610', '14024848', '13245494', '14284559', '13714452']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8667617737818581
- 35 USC 102 Novelty (BERT): 0.4863725849899376
- Combined Prediction Score: 0.8287228549026662
- Mean Citation Score: 194.146518
- Max Citation Score: 239.4374
- Similarity Product: 201.825932261014

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test