PATENT CLAIM ANALYSIS

Application Number: 15992557
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-02
Patent Classification: ["711", "141000"]

Abstract:
There is disclosed in one example a computing apparatus, including: a cache; a caching agent (CA); an integrated input/output (IIO) block to provide a cache coherent interface to a peripheral device at a first speed; a core configured to poll an address within the cache via the CA, wherein the address is to receive incoming data from the peripheral device via the IIO, and wherein the core is capable of polling the address at a second speed substantially greater than the first speed; and a hardware uncore agent configured to: identify a collision between the core and the IIO including determining that the core is polling the address at a rate that is determined to interfere with access to the address by the IIO; and throttle the core's access to the address.

Claim (Index 19):
The hardware uncore agent of  claim 18 , wherein the CA is a cache home agent (CHA).

Metadata:
- Claim Count in Document: 65.0
- Percentile: 93.0
- Lexical Diversity: 2.14493
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12614619', '14998085', '14866923', '14583156', '12953120']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4594178219176941
- 35 USC 102 Novelty (BERT): 0.4899909505918632
- Combined Prediction Score: 0.462475134785111
- Mean Citation Score: 124.801677
- Max Citation Score: 148.4728
- Similarity Product: 96.78585092658994

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test