PATENT CLAIM ANALYSIS

Application Number: 15889248
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["438", "013000"]

Abstract:
A method of tailoring BEOL RC parametrics to improve chip performance. According to the method, an integrated circuit design on an integrated circuit chip is analyzed. The analysis comprises calculating Vmax for vias and metal lines in the integrated circuit design over a range of sizes for the vias and the metal lines. Predicted use voltage for applications on the integrated circuit chip is determined. The size or the location of at least one of the vias and the metal lines is tailored based on performance parameters of the integrated circuit chip.

Claim (Index 17):
The computer program product according to  claim 16 , said modified circuit design being based on performance parameters of said integrated circuit chip using selected sizes of said vias and said metal lines.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 88.0
- Lexical Diversity: 1.92157
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14872302', '15083692', '13649699', '13745732', '13677373']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.834389221964965
- 35 USC 102 Novelty (BERT): 0.5239090241724332
- Combined Prediction Score: 0.8033412021857118
- Mean Citation Score: 189.405578
- Max Citation Score: 325.0479
- Similarity Product: 297.2449893010855

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test