PATENT CLAIM ANALYSIS

Application Number: 15944244
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["326", "086000"]

Abstract:
A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.

Claim (Index 26):
The circuit of  claim 21 , wherein the program information written to the at least one configuration register is for dynamically reconfiguring the plurality of programmable digital blocks in response to the DMA request.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 2.51515
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13916386', '14860515', '12774680', '14042268', '12870706']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8020499131124812
- 35 USC 102 Novelty (BERT): 0.5417536572880939
- Combined Prediction Score: 0.7760202875300425
- Mean Citation Score: 410.99884600000007
- Max Citation Score: 434.6432
- Similarity Product: 276.5438945507049

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test