PATENT CLAIM ANALYSIS

Application Number: 16397585
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-08
Patent Classification: ["708", "620000"]

Abstract:
Memristor-based multipliers using memristors-as-drivers (MAD) gates. As a result of employing MAD gates in memristor-based multipliers, such as shift-and-add multipliers, Booth multipliers and array multipliers, the number of delay steps may be less than half than the number of delay steps required in traditional CMOS implementations of multipliers. Furthermore, by using MAD gates, memristor-based multipliers can be implemented with less complexity (e.g., fewer memristors and drivers). As a result, by the memristor-based multipliers using MAD gates, the speed and complexity of a wide variety of arithmetic operations is improved.

Claim (Index 11):
The shift-and-add multiplier as recited in  claim 10 , wherein said third and fourth switches are connected to a second power source, wherein said second memristor is connected to a fifteenth switch, wherein said fifteenth switch is connected to said second power source.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 100.0
- Lexical Diversity: 1.98113
- Patent Class: 708.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['16115123', '15887823', '16384735', '16114956', '15369364']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4816218263495386
- 35 USC 102 Novelty (BERT): 0.5787914761072165
- Combined Prediction Score: 0.4913387913253064
- Mean Citation Score: 374.022836
- Max Citation Score: 491.78275
- Similarity Product: 349.19578729701044

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test