PATENT CLAIM ANALYSIS

Application Number: 15884504
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-12
Patent Classification: ["257", "506000"]

Abstract:
A semiconductor device includes first wiring line patterns on a support layer, second wiring line patterns on the first wiring line patterns, and a multiple insulation pattern. The first wiring line patterns extend in a first direction and are spaced apart from each other in a second direction. The support layer includes first contact hole patterns between the first wiring line patterns that are spaced apart from each other in the first and second directions. The second wiring line patterns extend in the second direction perpendicular and are spaced apart from each other in the first direction. The multiple insulation pattern is on an upper surface of the support layer where the first contact hole patterns are not formed, arranged in a third direction perpendicular to the first direction and the second direction, and between the first wiring line patterns and the second wiring line patterns.

Claim (Index 9):
The semiconductor device of  claim 4 , wherein the multiple insulation pattern includes a third protection pattern on the second protection pattern.

Metadata:
- Claim Count in Document: 42.0
- Percentile: 86.0
- Lexical Diversity: 3.29787
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15608076', '14445829', '14859435', '14965532', '14591929']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.916049014730902
- 35 USC 102 Novelty (BERT): 0.5017915190994916
- Combined Prediction Score: 0.8746232651677609
- Mean Citation Score: 246.71885
- Max Citation Score: 252.1316
- Similarity Product: 199.2849740395069

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test