PATENT CLAIM ANALYSIS

Application Number: 16144544
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-02
Patent Classification: ["365", "189070"]

Abstract:
A semiconductor memory instance is provided that includes an array of memory cells. The array includes a plurality of semiconductor memory cells arranged in at least one column and at least one row. Each of the semiconductor memory cells includes a floating body region configured to be charged to a level indicative of a state of the memory cell. Further includes are a plurality of buried well regions, wherein each of the buried well regions can be individually selected, and a decoder circuit to select at least one of the buried well regions.

Claim (Index 22):
The semiconductor memory instance of  claim 21 , wherein each said memory cell is configured to provide at least two stable states.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 97.0
- Lexical Diversity: 1.94118
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14825268', '15712041', '15867877', '15403757', '15287903']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8344899880657118
- 35 USC 102 Novelty (BERT): 0.5729511943909852
- Combined Prediction Score: 0.8083361086982391
- Mean Citation Score: 422.81033400000007
- Max Citation Score: 478.25507000000016
- Similarity Product: 405.76006618565873

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test