PATENT CLAIM ANALYSIS

Application Number: 16102391
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-07
Patent Classification: ["257", "737000"]

Abstract:
A semiconductor package includes a lower chip, an upper chip on the lower chip, and an adhesive layer between the lower chip and the upper chip. The lower chip has first through silicon vias (TSVs) and pads on an upper surface thereof. The pads are connected to the first TSVs, respectively. The upper chip includes bumps on a lower surface thereof. The bumps are bonded to the pads. Vertical centerlines of the bumps are aligned with vertical centerlines of the first TSVs, respectively. The vertical centerlines of the bumps are offset from the vertical centerlines of the pads, respectively, in a peripheral region of the lower chip.

Claim (Index 22):
The semiconductor device according to  claim 21 , wherein the buffer chip includes pads disposed on and electrically connected to the first TSVs, respectively,\n the memory chip includes a memory chip body, and second bumps on a lower surface of the memory chip body, each of the second bumps bonded to a respective one of the pads of the buffer chip and including a pillar and a solder layer, each of the pillars of the second bumps and the pads of the buffer chip has a centerline extending in a direction perpendicular to the upper surface of the buffer chip body, the centerlines of the pillars of the second bumps extend through geometric centers of the pillars of the second bumps, respectively, as viewed in a plan view of the HBM package, the centerlines of the pads of the buffer chip extend vertically through geometric centers of the pads of the buffer chip, respectively, as viewed in a plan view of the HBM package, the centerlines of the pillars of the second bumps are aligned with the centerlines of the first TSVs, respectively, and in a peripheral region of the buffer chip, the centerline of the pillar of a second bump is offset from the centerline of the corresponding one of the pads of the buffer chip to which the second bump is bonded.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 96.0
- Lexical Diversity: 2.65217
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12907028', '15493096', '13188554', '15943072', '10424096']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9297117724404168
- 35 USC 102 Novelty (BERT): 0.5033063943412142
- Combined Prediction Score: 0.8870712346304965
- Mean Citation Score: 252.506064
- Max Citation Score: 268.55466
- Similarity Product: 202.0267621026564

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test