PATENT CLAIM ANALYSIS

Application Number: 16142946
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-05
Patent Classification: ["365", "145000"]

Abstract:
In one embodiment, a device is described for using ferroelectric material in a memory cell without a selector device. In another embodiment, a method of operating a ferroelectric memory cell without a selector device is described. Other embodiments are likewise described.

Claim (Index 1):
An apparatus comprising: a ferroelectric memory cell;\n the ferroelectric memory cell having at least one word-line and at least one bit-line, wherein the lines are connected to the ferroelectric memory cell so as to generate a voltage signal level difference across the ferroelectric memory cell, the ferroelectric memory cell comprising a ferroelectric capacitor of ferroelectric material such that polarization of the ferroelectric memory cell is capable of being switched to an opposite polarization via a sufficient voltage signal level difference of opposite polarity to be generated across the ferroelectric memory cell, the ferroelectric material further being such that polarization of the ferroelectric memory cell does not change unless the sufficient voltage signal level difference to be generated is to exceed a coercive voltage signal level value associated with the particular ferroelectric material; wherein the at least one word-line to comprise a first word-line voltage signal level or a second word-line voltage signal level; the first word-line voltage signal level to exceed the second word-line voltage signal level; wherein the at least one bit-line to comprise a first bit-line voltage signal level or a second bit-line voltage signal level; the first bit-line voltage signal level to exceed the second bit-line voltage signal level; wherein the first word-line voltage signal level to comprise a voltage signal level of about half of the sufficient voltage level difference in a first polarity, and the second bit-line voltage signal level to comprise a voltage signal level of about half of the sufficient voltage level difference in a second polarity; wherein a binary signal value state is to be written to or to be read from the ferroelectric memory cell, the ferroelectric memory cell to not have an associated memory cell selector, the at least one word-line to comprise the first word-line voltage signal level and the at least one bit-line to comprise the second level bit-line voltage signal level such that the voltage signal level difference across the ferroelectric memory cell to be generated is to exceed the coercive voltage signal level value in the first polarity.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 97.0
- Lexical Diversity: 1.76923
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15224438', '10716565', '11015428', '11482128', '10654352']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7876316573185472
- 35 USC 102 Novelty (BERT): 0.4657315096989012
- Combined Prediction Score: 0.7554416425565826
- Mean Citation Score: 204.031742
- Max Citation Score: 241.41295
- Similarity Product: 240.38814169455767

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test