PATENT CLAIM ANALYSIS

Application Number: 15908838
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "686000"]

Abstract:
A semiconductor assembly having heat dissipation characteristics includes stacked semiconductor chips thermally conductible to a thermal pad of an interconnect substrate and electrically connected to the interconnect substrate through bonding wire. The bonding wires extending from a primary routing circuitry in between the stacked chips can accommodate the height difference between the stacked chips and the interconnect substrate. These wires can also effectively compensate for the thermal expansion mismatch between the stacked chips and the interconnect substrate, thereby allowing a higher manufacturing yield and better reliability.

Claim (Index 1):
A three-dimensional semiconductor assembly, comprising:\n a stacked semiconductor subassembly that includes a primary routing circuitry, a first device and a second device, wherein (i) the primary routing circuitry has a first surface in a first direction, a second surface in an opposite second direction, first conductive pads at the first surface, and second conductive pads at the second surface electrically connected to the first conductive pads, (ii) the first device is disposed over the first surface of the primary routing circuitry and electrically coupled to the primary routing circuitry through the first conductive pads, and (iii) the second device is disposed over the second surface of the primary routing circuitry and electrically coupled to the primary routing circuitry through the second conductive pads; an interconnect substrate having a thermal pad and a plurality of metal leads disposed about a periphery of the thermal pad, wherein the thermal pad and the metal leads each have a front side facing in the first direction and the front side of the thermal pad is attached to the second device by a thermal conducting material; and a plurality of bonding wires that electrically connect the first surface of the primary routing circuitry to the front sides of the metal leads.

Metadata:
- Claim Count in Document: 22.0
- Percentile: 90.0
- Lexical Diversity: 1.60714
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15872828', '15166185', '15438937', '15353537', '15473629']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9117552712674968
- 35 USC 102 Novelty (BERT): 0.508460129332309
- Combined Prediction Score: 0.8714257570739781
- Mean Citation Score: 276.43282600000003
- Max Citation Score: 287.8713
- Similarity Product: 239.3784192448497

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test