PATENT CLAIM ANALYSIS

Application Number: 16007325
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-01
Patent Classification: ["363", "126000"]

Abstract:
AC to DC converters, more specifically Power Factor Correction (PFC) circuits, using a multi-level waveform and hybrid devices are presented. From an AC voltage input a multi-level waveform is generated, which is used to generate high and low DC output voltage levels. The multi-level waveform is connected to the DC outputs through a correpsonding intermediate node by an initial switch, and from the intermediate node to the correpsonding output by a hybrid device. The hybrid device includes a first current path, such as a series connected switch-diode pair, in parallel with second current path of a relativley faster and lower current device, such as a diode. The resultant arrangement can use devices having lower voltage ratings relative to typical PFC cirucit designs.

Claim (Index 10):
An alternating current (AC) to direct current (DC) conversion system, comprising:\n an input node configured to accept an AC signal; a power factor correction circuit, comprising:\n a first switch connected between the input node and a first intermediate node; \n a second switch connected between the input node and a second intermediate node; \n a first circuit element configured to allow current to flow from a mid-level node to the second intermediate node; \n a second circuit element configured to allow current to flow from the second intermediate node to the mid-level node; \n a first hybrid device, comprising first and second current paths in parallel from the first intermediate node to a first output node, wherein the first current path is a faster switching, lower current rated path than the second current path; and \n a second hybrid device, comprising third and fourth current paths in parallel from a second output node to the second intermediate node, wherein the third current path is a faster switching, lower current rated path than the fourth current path, wherein the power factor correction circuit is configured to provide a DC output between the first output node and the second output node; and \n a control circuit connected to the input node and to the first and second output nodes, the control circuit configured to generate switching signals for the first and second switches and for the first and second hybrid devices based upon a voltage and a current at the input node and voltage levels on the first and second output nodes.

Metadata:
- Claim Count in Document: 34.0
- Percentile: 94.0
- Lexical Diversity: 1.74359
- Patent Class: 363.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13177290', '16075882', '16073862', '15594194', '14246194']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7839176540220993
- 35 USC 102 Novelty (BERT): 0.4726186938802903
- Combined Prediction Score: 0.7527877580079184
- Mean Citation Score: 207.999834
- Max Citation Score: 212.4546
- Similarity Product: 185.4053759829998

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test