PATENT CLAIM ANALYSIS

Application Number: 15989197
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-10
Patent Classification: ["711", "103000"]

Abstract:
A wear leveling method for a rewritable non-volatile memory module, a memory control circuit unit, and a memory storage apparatus are provided. The rewritable non-volatile memory module includes a plurality of physical erasing units. The method includes: recording an operation value of each of the physical erasing units; recording a usage situation value of each of the physical erasing units; and selecting a first physical erasing unit and a second physical erasing unit from the physical erasing units according to the operation values of the physical erasing units and the usage situation values of the physical erasing units and copying valid data stored in the first physical erasing unit to the second physical erasing unit.

Claim (Index 8):
A memory control circuit unit for controlling a rewritable non-volatile memory module, the writable non-volatile memory module comprising a plurality of physical erasing units, the memory control circuit unit comprising:\n a host interface, coupled to a host system; a memory interface, coupled to the rewritable non-volatile memory module; and a memory management circuit, coupled to the host interface and the memory interface, wherein the memory manage circuit is configured for recording an operation value of each of the physical erasing units, wherein the operation values are configured for reflecting absolute or relative erasing or programming counts of the physical erasing units, wherein the memory manage circuit is further configured for recording a usage situation value of each of the physical erasing units, wherein the usage situation values are configured for reflecting absolute or relative no operation time lengths of the physical erasing units, wherein the memory management circuit is further configured for selecting a first physical erasing unit and a second physical erasing unit from the physical erasing units according the operation values of the physical erasing units and the usage situation values of the physical erasing units and copying valid data stored in the first physical erasing unit to the second physical erasing unit, wherein the memory management circuit is further configured for grouping the physical erasing units at least into a first area and a second area, wherein the memory management circuit is further configured for selecting a third physical erasing unit from the physical erasing units of the second area, wherein the memory management circuit is further configured for sending a write command sequence which instructs a writing of data from a host system into the third physical erasing unit, wherein the memory management circuit is further configured for associating the third physical erasing unit with the first area, wherein the memory management circuit is further configured for setting the usage situation value of the third physical erasing unit as a usage situation default value and counting the usage situation values of the rest of the physical erasing units of the first area.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 93.0
- Lexical Diversity: 2.5102
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14860722', '15333197', '14824092', '14263979', '15655895']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5575098395106162
- 35 USC 102 Novelty (BERT): 0.4952629715302439
- Combined Prediction Score: 0.5512851527125789
- Mean Citation Score: 282.32891600000005
- Max Citation Score: 288.3381
- Similarity Product: 257.63829887223244

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test