PATENT CLAIM ANALYSIS

Application Number: 15994284
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["438", "199000"]

Abstract:
There is provided a semiconductor device including a memory region and a logic region. The memory region includes a transistor (memory transistor) that stores information by accumulating charge in a sidewall insulating film. The width of the sidewall insulating film of the memory transistor included in the memory region is made larger than the width of a sidewall insulating film of a transistor (logic transistor) included in the logic region.

Claim (Index 1):
A method for manufacturing a semiconductor device, comprising:\n forming a first impurity region in a first region of a semiconductor substrate; forming a second impurity region in a second region of the semiconductor substrate; forming a first channel region by an epitaxial growth above the first impurity region; forming an isolation film that separates the first region and the second region in the semiconductor substrate; forming a first gate insulating film above the first region; forming a second gate insulating film above the second region; forming a gate electrode film above the first gate insulating film and the second gate insulating film; forming a first gate electrode of the gate electrode film above the first region remaining the gate electrode film above the second region; forming a first sidewall insulating film on a sidewall of the first gate electrode and above the first region; forming a second gate electrode of the gate electrode film above the second region; forming a second sidewall insulating film on a sidewall of the second gate electrode and above the second region; forming a first source region and a first drain region on both sides of the first gate electrode above the first region; and forming a second source region and a second drain region on both sides of the second gate electrode above the second region, wherein: a first transistor including the first impurity region, the first channel region, the first gate insulating film, the first gate electrode, the first sidewall insulating film, the first source region and the first drain region; a second transistor including the second impurity region, the second gate insulating film, the second gate electrode, the second sidewall insulating film, the second source region and the second drain region; the first transistor storing information by accumulating charge in the first sidewall insulating film; and the first impurity region includes a first impurity and a second impurity which suppresses a diffusion of the first impurity, and includes at least Boron, Germanium and Carbon.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 93.0
- Lexical Diversity: 2.26471
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15647946', '15066309', '12699938', '11135415', '11889358']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8698671308188196
- 35 USC 102 Novelty (BERT): 0.5514313259460094
- Combined Prediction Score: 0.8380235503315385
- Mean Citation Score: 292.75565
- Max Citation Score: 369.65048
- Similarity Product: 363.8438672431136

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test