PATENT CLAIM ANALYSIS

Application Number: 15755933
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-11
Patent Classification: ["257", "434000"]

Abstract:
A packaging structure and a packaging method are provided. The packaging structure includes: a chip unit, where a first surface of the chip unit includes a sensing region; an upper cover plate, where a first surface of the upper cover plate is provided with a support structure, the upper cover plate covers the first surface of the chip unit, the support structure is located between the upper cover plate and the chip unit, and the sensing region is located in a cavity enclosed by the support structure and the first surface of the chip unit; and a light shielding layer covering a second surface of the upper cover plate opposite to the first surface of the upper cover plate, where a central region of the second surface which overlaps with the sensing region in a light-transmission direction is exposed through the light shielding layer.

Claim (Index 9):
A packaging method for forming a packaging structure, comprising:\n providing a wafer to be packaged, wherein a first surface of the wafer to be packaged comprises a plurality of chip units and cutting channel regions located between the plurality of chip units, and each of the plurality of chip units comprises a sensing region; providing a cover substrate, wherein a plurality of support structures are formed on a first surface of the cover substrate, and the support structures correspond to the sensing regions on the wafer to be packaged; attaching the first surface of the cover substrate with the first surface of the wafer to be packaged, wherein cavities are formed by the support structures and the first surface of the wafer to be packaged, and the sensing regions are located in the cavities; forming a light shielding material layer on a second surface of the cover substrate opposite to the first surface of the cover substrate, wherein the light shielding material layer comprises openings corresponding to the sensing regions; and cutting the wafer to be packaged, the cover substrate, and the light shielding material layer along the cutting channel regions, to form a plurality of packaging structures, wherein each of the plurality of packaging structures comprises one of the plurality chip unit, an upper cover plate formed by cutting the cover substrate, and a light shielding layer formed by cutting the light shielding material layer, the light shielding layer covers a second surface of the upper cover plate, and a central region of the second surface which overlaps with the sensing region in a light-transmission direction is exposed through the light shielding layer.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 88.0
- Lexical Diversity: 3.03922
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15748651', '12981640', '14450143', '15507901', '15767121']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.921113068458846
- 35 USC 102 Novelty (BERT): 0.5070490464432508
- Combined Prediction Score: 0.8797066662572866
- Mean Citation Score: 236.866632
- Max Citation Score: 312.7335
- Similarity Product: 289.88307296195626

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test