PATENT CLAIM ANALYSIS

Application Number: 16438666
Application Type: Utility
Filing Date: 2019-06
Publication Date: 2019-10
Patent Classification: ["345", "100000"]

Abstract:
A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.

Claim (Index 2):
A semiconductor device comprising:\n first to seventh transistors; wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the one of the source and the drain of the third transistor is electrically connected to a gate of the first transistor, wherein the one of the source and the drain of the third transistor is electrically connected to a gate of the seventh transistor, wherein one of a source and a drain of the fifth transistor is electrically connected to a gate of the fourth transistor, wherein one of a source and a drain of the sixth transistor is electrically connected to one of a source and a drain of the seventh transistor, wherein the one of the source and the drain of the sixth transistor is electrically connected to a gate of the fifth transistor, wherein the other of the source and the drain of the second transistor is electrically connected to a first wring, wherein the other of the source and the drain of the fourth transistor is electrically connected to the first wring, wherein the other of the source and the drain of the seventh transistor is electrically connected to the first wring, wherein the other of the source and the drain of the fifth transistor is electrically connected to a second wring, wherein a gate of the second transistor is electrically connected to the second wring, and wherein the other of the source and the drain of the sixth transistor is electrically connected to a gate of the sixth transistor.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 100.0
- Lexical Diversity: 6.91667
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16143059', '15624987', '12977556', '11845415', '13904147']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7238141556643218
- 35 USC 102 Novelty (BERT): 0.5857484528620555
- Combined Prediction Score: 0.7100075853840953
- Mean Citation Score: 479.834342
- Max Citation Score: 490.4301
- Similarity Product: 444.8768424134016

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test