PATENT CLAIM ANALYSIS

Application Number: 15768546
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["365", "148000"]

Abstract:
A circuit includes a resistive memory cell in a memory array to store a memory state for the resistive memory cell. A reference cell in the memory array stores a reference memory state for the resistive memory cell. A function generator concurrently applies a read voltage to the resistive memory cell and the reference cell via a memory row address. A sensing circuit enables the function generator and monitors a target current received from the resistive memory cell when selected via a memory column address and monitors a reference current received when selected via a reference column address in response to the read voltage applied to the memory row address. A current comparator circuit in the sensing circuit compares a difference between the target current and the reference current to determine the memory state of the resistive memory cell.

Claim (Index 1):
A circuit, comprising:\n a resistive memory cell in a memory array to store a memory state for the resistive memory cell, the memory state sensed as a target current from the resistive memory cell that is selected via a memory row address and memory column address in the memory array; a reference cell in the memory array to store a reference memory state for the resistive memory cell, the reference memory state sensed as a reference current from the reference cell that is selected via the memory row address and a reference column address in the memory array, a function generator to concurrently apply a read voltage to the resistive memory cell and the reference cell via the memory row address; a sensing circuit to enable the function generator and to monitor the target current received from the resistive memory cell when selected via the memory column address for the resistive memory cell and to monitor the reference current received when selected via the reference column address of the reference cell in response to the read voltage applied to the memory row address; and a current comparator circuit in the sensing circuit to compare a difference between the target current and the reference current to determine the memory state of the resistive memory cell.

Metadata:
- Claim Count in Document: 22.0
- Percentile: 91.0
- Lexical Diversity: 3.2
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15325040', '15111194', '14678889', '14297446', '13844923']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7614975238867496
- 35 USC 102 Novelty (BERT): 0.4782190177743797
- Combined Prediction Score: 0.7331696732755126
- Mean Citation Score: 203.893062
- Max Citation Score: 209.1135
- Similarity Product: 164.71894023013115

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test