PATENT CLAIM ANALYSIS

Application Number: 16202012
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-05
Patent Classification: ["326", "083000"]

Abstract:
An input/output circuit including: a first transistor that, based on an input signal and an enable signal input to an enable terminal that switches a validity and invalidity of an output, drives a load connected between an output terminal and an external power supply; a first switch provided between the input terminal and a control terminal of the first transistor, and including a first switching terminal that switches between connecting or blocking the input signal; and a switch control section that controls the first switching terminal based on the enable signal, wherein, when a logic of the enable signal has transitioned, the switch control section controls the first switching terminal to cause the first switch to be in a connecting state for a predetermined period, to input the input signal to the control terminal of the first transistor, and to suppress a current flowing to the load.

Claim (Index 2):
The input/output circuit according to  claim 1 , wherein:\n the switch control section includes a second transistor connected to the first switching terminal, and a delay section having one end connected to a control terminal of the second transistor and another end connected to the enable terminal; and the predetermined period is determined by a delay time of the delay section.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 98.0
- Lexical Diversity: 2.74138
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12039942', '11164479', '14136469', '13127141', '11636308']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6900133883696254
- 35 USC 102 Novelty (BERT): 0.4856244056342051
- Combined Prediction Score: 0.6695744900960834
- Mean Citation Score: 205.817124
- Max Citation Score: 217.36209
- Similarity Product: 156.9201158579063

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test