PATENT CLAIM ANALYSIS

Application Number: 16106658
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["375", "375000"]

Abstract:
A clock generation circuit includes a clock generation unit suitable for generating a first clock, a first inversion clock having an opposite phase to the first clock, a second clock having a different phase from the first clock, and a second inversion clock having an opposite phase to the second clock; and a reset control unit suitable for comparing the phases of the first and second clocks, and controlling the clock generation unit to disable for a time and then enable the second clock and the second inversion clock when the second clock leads the first clock.

Claim (Index 4):
The clock generation circuit of  claim 1 , wherein the clock transfer unit outputs the first to fourth output clocks so that the second output clock lags behind the first output clock, the third output clock lags behind the second output clock, and the fourth output clock lags behind the third output clock, each by a phase amount of 90\u00b0.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 96.0
- Lexical Diversity: 2.71053
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14793451', '15869167', '13845181', '13444271', '12379019']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4665857104279802
- 35 USC 102 Novelty (BERT): 0.564148769601886
- Combined Prediction Score: 0.4763420163453708
- Mean Citation Score: 266.166648
- Max Citation Score: 430.5481
- Similarity Product: 358.4713444604456

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test