PATENT CLAIM ANALYSIS

Application Number: 15899177
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["375", "350000"]

Abstract:
A crest factor reduction (CRF) circuit may include a scaler configured to receive the input signal and generate a scaled input signal. A clipping circuit may be configured to receive the input signal and generate a clipped input signal. A negator circuit may be configured to receive the clipped input signal and generate a negated clipped input signal. A first summer may be configured to sum the scaled input signal and the negated clipped input signal to generate a summed signal. A first digital filter may be configured to receive the summed signal and provide a first digital filter output. A second digital filter may be configured to receive the clipped input signal and provide a second digital filter output. A multiplexer may be configured to receive the first digital filter output and the second digital filter output and generate an output signal.

Claim (Index 13):
The method of  claim 10 , further comprising generating the summed signal based at least in part on a sum of the negated clipped input signal and the scaled input signal, wherein the summed signal is provided to the first digital filter.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 88.0
- Lexical Diversity: 4.0
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14444612', '12837087', '11784433', '12764755', '13897119']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4786798655323951
- 35 USC 102 Novelty (BERT): 0.4882039056501244
- Combined Prediction Score: 0.4796322695441681
- Mean Citation Score: 199.489296
- Max Citation Score: 204.16574
- Similarity Product: 142.56616247615102

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test