PATENT CLAIM ANALYSIS

Application Number: 16113940
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-09
Patent Classification: ["327", "175000"]

Abstract:
A duty cycle correction circuit is provided. The duty cycle correction circuit may include a correction circuit configured to correct a duty cycle of an external clock signal according to a locking signal. The duty cycle correction circuit may include a locking signal detection circuit configured to generate the locking signal for correcting the duty cycle of the external clock signal, using an internal clock signal generated in a semiconductor circuit.

Claim (Index 10):
The duty cycle correction circuit according to  claim 6 , further comprising an enable control circuit configured to enable the locking signal detection circuit until the duty locking is completed after duty calibration is started, and disable the locking signal detection circuit after the duty locking is completed.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 96.0
- Lexical Diversity: 2.27273
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14625970', '11235646', '13234062', '12630400', '13900279']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7729298011225266
- 35 USC 102 Novelty (BERT): 0.499080014303856
- Combined Prediction Score: 0.7455448224406597
- Mean Citation Score: 228.142034
- Max Citation Score: 251.77344
- Similarity Product: 169.57152816833496

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test