PATENT CLAIM ANALYSIS

Application Number: 16174631
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["711", "103000"]

Abstract:
The present disclosure includes apparatuses, systems, and methods related to multiple address registers for a solid state device (SSD). An example apparatus includes a controller including a plurality of base address registers (BARs) each including same addresses for data storage in a same memory resource and an SSD that includes the same memory resource.

Claim (Index 13):
The system of  claim 12 , wherein the apparatus further comprises a peripheral component interconnect express (PCIe) bus as a communication interface between the host computing device, the device driver, and a peripheral memory resource comprising the same secondary memory resource to form a PCIe circuit.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 1.44186
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15047000', '15296188', '14102061', '15592528', '15642425']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4782951297100069
- 35 USC 102 Novelty (BERT): 0.4954358411377312
- Combined Prediction Score: 0.4800092008527793
- Mean Citation Score: 149.45051500000002
- Max Citation Score: 261.7355
- Similarity Product: 206.54972417336705

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test