PATENT CLAIM ANALYSIS

Application Number: 15870175
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-12
Patent Classification: ["438", "637000"]

Abstract:
A method of manufacturing a semiconductor device is disclosed. The method includes forming a first insulting layer on a substrate, forming a first conductor pattern in the first insulating layer, forming a second insulating layer on the first insulating layer, and forming a second wiring pattern and a contact via in the second insulating layer, wherein a top surface of the first insulating layer is higher than a top surface of the first conductor pattern.

Claim (Index 19):
The method of  claim 18 , further comprising;\n forming an etch stop layer between the first insulating layer and the second insulating layer, the etch stop layer having an etching selectivity with respect to the second insulating layer, wherein the first via hole is formed through the etch stop layer to expose an upper surface of the first conductor pattern.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 86.0
- Lexical Diversity: 2.38235
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15296202', '14199031', '12960150', '15236427', '13600025']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8693408501863192
- 35 USC 102 Novelty (BERT): 0.5023410107336317
- Combined Prediction Score: 0.8326408662410505
- Mean Citation Score: 265.51472
- Max Citation Score: 285.35635
- Similarity Product: 232.59204297212364

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test