PATENT CLAIM ANALYSIS

Application Number: 15907008
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-07
Patent Classification: ["257", "029000"]

Abstract:
A semiconductor device including a field effect transistor (FET) device includes a substrate and a channel structure formed of a two-dimensional (2D) material. An interfacial layer is formed on the channel structure. A gate stack including a gate electrode layer and a gate dielectric layer is formed over the interfacial layer. Source and drain contacts are formed over openings in the interfacial layer. The source and drain contacts have a side contact with the interfacial layer and a side contact and a surface contact with the channel structure.

Claim (Index 9):
The semiconductor device of  claim 8 , wherein the high-k dielectric material comprises metal oxides including oxides of Li, Be, Mg, Ca, Sr, Sc, Y, Zr, Hf, Al, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, and mixtures thereof.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 88.0
- Lexical Diversity: 2.1087
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15401463', '15649331', '15429335', '15807317', '15904699']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9156052793546466
- 35 USC 102 Novelty (BERT): 0.4870929702669141
- Combined Prediction Score: 0.8727540484458735
- Mean Citation Score: 167.801982
- Max Citation Score: 219.09525
- Similarity Product: 169.22003445598483

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test