PATENT CLAIM ANALYSIS

Application Number: 16241270
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["363", "021020"]

Abstract:
A switch control circuit includes a first pin connected to a first voltage, and a second pin connected to another end of a first resistor including an end connected to the first pin and a first capacitor. In the switch control circuit, at least two of first dead time information, second dead time information, and a protection mode are set by using a multi-voltage of the second pin. The first dead time information is information about a dead time of a first switch and a second switch controlling power supply, the second dead time information is information about a dead time for synchronous rectification, and the protection mode includes an auto-restart mode and a latch mode.

Claim (Index 16):
A power supply device comprising:\n a first switch and a second switch configured to be connected in series between an input voltage and a primary side ground; a transformer configured to include a primary side wire connected between the input voltage and a node situated between the first switch and the second switch; a first synchronous rectification switch configured to rectify a current flowing through a first secondary side wire of the transformer; a second synchronous rectification switch configured to rectify a current flowing through a second secondary side wire of the transformer; a switch control circuit configured to include a first pin connected to a first voltage and a second pin and to set at least two of first dead time information, second dead time information, and a protection mode based on a multi-voltage of the second pin, the switch control circuit including a sink current source and a third switch, wherein the sink current source is connected in series to the third switch, and wherein the sink current source and third switch are connected in series between the second pin and a secondary side ground; a first resistor configured to be connected between the first pin and the second pin; a first capacitor configured to be connected to the second pin; and wherein the first dead time information includes information about a dead time of the first switch and the second switch, the second dead time information includes information about a dead time of the first synchronous rectification switch and the second synchronous rectification switch, and the protection mode includes an auto-restart mode and a latch mode.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 99.0
- Lexical Diversity: 2.60417
- Patent Class: 363.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15446513', '15730490', '14964998', '14965125', '14619201']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7775962540128248
- 35 USC 102 Novelty (BERT): 0.5211213949297964
- Combined Prediction Score: 0.751948768104522
- Mean Citation Score: 228.346994
- Max Citation Score: 332.62817
- Similarity Product: 293.3715328006697

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test