PATENT CLAIM ANALYSIS

Application Number: 16076444
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-02
Patent Classification: ["363", "056120"]

Abstract:
A semiconductor module according to an embodiment includes an insulating substrate having a power conversion circuit mounted thereon, a first transistor constituting an upper arm, a second transistor constituting a lower arm, a first input interconnection pattern coupled to a positive-side input terminal, a second input interconnection pattern coupled to a negative-side input terminal, an output interconnection pattern coupled to an output terminal, and an absorbing device configured to absorb surge voltage, wherein the first input interconnection pattern includes a first-transistor mounting area on which the first transistor is mounted, wherein the output interconnection pattern includes a second-transistor mounting area on which the second transistor is mounted, wherein the second input interconnection pattern includes an absorbing-device connecting area disposed between the first and second transistor mounting areas, and wherein the absorbing-device connecting area is electrically coupled to the first-transistor mounting area through the absorbing device.

Claim (Index 1):
A semiconductor module including a power conversion circuit, comprising:\n an insulating substrate; a first transistor constituting an upper arm of the power conversion circuit; a second transistor constituting a lower arm of the power conversion circuit and electrically series-coupled to the first transistor; a first input interconnection pattern disposed on the insulating substrate and coupled to a positive-side input terminal for supplying positive power to the power conversion circuit; a second input interconnection pattern disposed on the insulating substrate and coupled to a negative-side input terminal for supplying negative power to the power conversion circuit; an output interconnection pattern disposed on the insulating substrate and coupled to an output terminal for outputting output power of the power conversion circuit; and an absorbing device configured to absorb surge voltage in the power conversion circuit, wherein the first input interconnection pattern includes a first-transistor mounting area on which the first transistor is mounted, wherein the output interconnection pattern includes a second-transistor mounting area on which the second transistor is mounted, wherein the second input interconnection pattern includes an absorbing-device connecting area that is disposed between the first-transistor mounting area and the second-transistor mounting area, and wherein the absorbing-device connecting area is electrically coupled to the first-transistor mounting area through the absorbing device.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 96.0
- Lexical Diversity: 2.73684
- Patent Class: 363.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16078218', '14213424', '15325784', '14663135', '14957113']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.794093233666653
- 35 USC 102 Novelty (BERT): 0.5034044419255845
- Combined Prediction Score: 0.7650243544925461
- Mean Citation Score: 183.21601400000003
- Max Citation Score: 302.4866
- Similarity Product: 260.9284475289941

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test