PATENT CLAIM ANALYSIS

Application Number: 16113940
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-09
Patent Classification: ["327", "175000"]

Abstract:
A duty cycle correction circuit is provided. The duty cycle correction circuit may include a correction circuit configured to correct a duty cycle of an external clock signal according to a locking signal. The duty cycle correction circuit may include a locking signal detection circuit configured to generate the locking signal for correcting the duty cycle of the external clock signal, using an internal clock signal generated in a semiconductor circuit.

Claim (Index 2):
The duty cycle correction circuit according to  claim 1 , wherein the external clock signal comprises a single-phase clock signal provided from outside the semiconductor circuit.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 96.0
- Lexical Diversity: 2.27273
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14625970', '11235646', '13234062', '12630400', '13900279']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7944509166096558
- 35 USC 102 Novelty (BERT): 0.4920817982937093
- Combined Prediction Score: 0.7642140047780612
- Mean Citation Score: 228.142034
- Max Citation Score: 251.77344
- Similarity Product: 194.6496227563476

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test