PATENT CLAIM ANALYSIS

Application Number: 16396937
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-08
Patent Classification: ["257", "324000"]

Abstract:
The present disclosure relates to a structure and method for embedding a non-volatile memory (NVM) in a HKMG (high-κ metal gate) integrated circuit which includes a high-voltage (HV) HKMG transistor. NVM devices (e.g., flash memory) are operated at high voltages for its read and write operations and hence a HV device is necessary for integrated circuits involving non-volatile embedded memory and HKMG logic circuits. Forming a HV HKMG circuit along with the HKMG periphery circuit reduces the need for additional boundaries between the HV transistor and rest of the periphery circuit. This method further helps reduce divot issue and reduce cell size.

Claim (Index 16):
The IC of  claim 15 , wherein the high-\u03ba dielectric layer comprises HfO (hafnium oxide), HfSiO (hafnium silicon oxide), HfAlO (hafnium aluminum oxide), or HMO (hafnium tantalum oxide).

Metadata:
- Claim Count in Document: 29.0
- Percentile: 100.0
- Lexical Diversity: 1.64286
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15582889', '14324369', '14296496', '14547251', '14580454']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.922401503741318
- 35 USC 102 Novelty (BERT): 0.5163842862574688
- Combined Prediction Score: 0.8817997819929332
- Mean Citation Score: 213.67021
- Max Citation Score: 261.62045
- Similarity Product: 212.1492789164931

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test