PATENT CLAIM ANALYSIS

Application Number: 15882607
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["365", "189050"]

Abstract:
Disclosed herein is an apparatus that includes a first circuit that activates first and second timing signals in response to a first command und activates the second timing signal in response to a second command, a second circuit that amplifies a first data read out from a first memory area in response to the first command in synchronization with the first timing signal, and a third circuit that outputs one of the first data output from the second circuit and a second data read out from a second memory area in response to the second command, in synchronization with the second timing signal.

Claim (Index 3):
The apparatus of  claim 1 , further comprising a first delay circuit that delays the first timing signal,\n wherein the second circuit amplifies the first data in synchronization with the first timing signal delayed by the first delay circuit.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 2.81579
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15236281', '15641118', '12801326', '13317598', '12167719']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7694560819041573
- 35 USC 102 Novelty (BERT): 0.469049655947681
- Combined Prediction Score: 0.7394154393085096
- Mean Citation Score: 136.144932
- Max Citation Score: 143.82451
- Similarity Product: 97.8538608664942

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test