PATENT CLAIM ANALYSIS

Application Number: 15865374
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-08
Patent Classification: ["363", "097000"]

Abstract:
An electric-power converting device having an inverter circuit of a 4-parallel configuration is realized by a combination of four first to third power semiconductor module devices. In each of module device groups, a single unit of the first power semiconductor module device and a single unit of the second power semiconductor module device are mixedly disposed so as to be alternately disposed. Furthermore, the first to third power semiconductor module devices have circuit element groups which have a common point that each circuit element group includes at least one of first and second transistors and first and second diodes.

Claim (Index 1):
An electric-power converting device comprising: a plurality of first semiconductor modules and a plurality of second semiconductor modules; wherein\n a combination of said plurality of first and second semiconductor modules constitutes at least part of an inverter circuit; said inverter circuit includes: first to fourth switching elements provided in series between a first potential terminal of a high potential side and a second potential terminal of a low potential side, first to fourth diodes provided to respectively correspond to said first to fourth switching elements and reversely connected so as to respectively have anodes in a side of said second potential terminal, a fifth diode connected between an intermediate potential terminal and a first intermediate connection terminal so as to have an anode in a side of said intermediate potential terminal, and a sixth diode connected between said intermediate potential terminal and a second intermediate connection terminal so as to have a cathode in a side of said intermediate potential terminal; said electric-power converting device has a 3-level I-type configuration that defines a connection point between said first and second switching elements as said first intermediate connection terminal, a connection point between said third and fourth switching elements as said second intermediate connection terminal, and a connection point between said second and third switching elements as an output potential terminal; each of said plurality of first and second semiconductor modules has a circuit element group including: first and second in-module diodes connected in series between a first external terminal and a second external terminal so as to respectively have anodes in a side of said second external terminal and at least one in-module switching element connected in parallel to at least one of said first and second in-module diodes; a connection point between said first and second in-module diodes serves as a third external terminal; said first switching element, said first diode, and said fifth diode of said inverter circuit are allocated to said circuit element group of each of said plurality of first semiconductor modules; said fourth switching element, said fourth diode, and said sixth diode of said inverter circuit are allocated to said circuit element group of each of said plurality of second semiconductor modules; and a single unit of said first semiconductor module and a single unit of said second semiconductor module are mixedly disposed so as to be alternately disposed between said plurality of first and second semiconductor modules.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 86.0
- Lexical Diversity: 1.89091
- Patent Class: 363.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13788805', '13043012', '14157025', '14124871', '14147968']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8176404887284046
- 35 USC 102 Novelty (BERT): 0.4796598701973446
- Combined Prediction Score: 0.7838424268752986
- Mean Citation Score: 224.033442
- Max Citation Score: 226.26636
- Similarity Product: 179.82156961063384

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test