PATENT CLAIM ANALYSIS

Application Number: 16219981
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["257", "737000"]

Abstract:
A package structure and a method of forming the same are provided. The package structure includes a die, an encapsulant, and an RDL structure. The encapsulant is laterally encapsulating the die. The RDL structure is electrically connected to the die. The RDL structure includes a first dielectric layer, a first RDL, a second dielectric layer and a second RDL. The first dielectric layer is disposed on the encapsulant and the die. The first RDL is embedded in the first dielectric layer. The first RDL includes a first via and a first trace connected to each other. A top surface of the first RDL is coplanar with a top surface of the first dielectric layer. The second dielectric layer is on the first dielectric layer and the first RDL. The second RDL is embedded in the second dielectric layer and includes a second via and a second trace connected to each other. A top surface of the second RDL is coplanar with a top surface of the second dielectric layer. The second via is stacked directly on the first via.

Claim (Index 14):
A method of forming a package structure, comprising:\n forming an encapsulant laterally aside a die and laterally aside an adhesive layer, wherein the die is located on the adhesive layer; forming a redistribution layer (RDL) structure on the encapsulant and the die to electrically connect to the die, comprising:\n forming a first dielectric layer on the encapsulant and the die; \n forming a recess in the first dielectric layer to expose a connector of the die; \n forming a first seed layer in the recess and on the first dielectric layer; \n forming a first conductive layer on the first seed layer; and \n performing a planarization process to remove portions of the first conductive layer and the first seed layer on the first dielectric layer, the first seed layer and the first conductive layer remained in the recess form a first RDL, \n wherein the first seed layer surrounds sidewalls and bottoms of the first conductive layer, and is disposed between the first conductive layer and the first dielectric layer.

Metadata:
- Claim Count in Document: 28.0
- Percentile: 98.0
- Lexical Diversity: 4.45455
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15662279', '15905756', '15706783', '15717974', '15884254']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.926738499623808
- 35 USC 102 Novelty (BERT): 0.5133021192280657
- Combined Prediction Score: 0.8853948615842337
- Mean Citation Score: 295.163896
- Max Citation Score: 317.2723
- Similarity Product: 256.01167869797945

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test