PATENT CLAIM ANALYSIS

Application Number: 16107340
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["257", "040000"]

Abstract:
A display device includes, on a substrate, light emitting elements each formed by sequentially stacking a first electrode layer, an organic layer including a light emission layer, and a second electrode layer and arranged in first and second directions which cross each other, a drive circuit including drive elements that drive light emitting elements, and a wiring extending in the first direction, and an insulating layer disposed in a gap region sandwiched by the light emitting elements neighboring in the second direction and having a recess or a projection. The wiring is disposed in an overlap region overlapping with the recess or the projection in the insulating layer in a thickness direction, in the gap region, and the second electrode layers in the light emitting elements neighboring in the second direction are separated from each other by the recess or the projection in the insulating layer.

Claim (Index 1):
A display device comprising:\n a substrate; a planarization film; a first light emitting element and a second light emitting element, each of the first and second light emitting elements including\n a first electrode formed on the planarization film, \n an organic light emission layer formed on the first electrode, and \n a second electrode formed on the organic light emission layer \n a scan line that propagates a scan signal, extending along a first direction and disposed on the substrate; a signal line that propagates an image signal, extending along a second direction that is perpendicular to the first direction and disposed on the substrate; a pixel circuit disposed on the substrate, the pixel circuit including a first transistor connected to the signal line and the scan line, and a second transistor that supplies a driving current to the first electrode, wherein the planarization film covers the scan line, the signal line and the pixel circuit; and an element isolation insulating layer formed on the planarization film and disposed between the first light emitting element and the second light emitting element; wherein the element isolation insulating layer has a groove between light emitting regions of the first and the second light emitting elements, and the first and the second light emitting elements are adjacent each other along the first direction in a plan view.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 96.0
- Lexical Diversity: 2.66102
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15287286', '15190556', '15794641', '14512028', '13782130']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9170754082230572
- 35 USC 102 Novelty (BERT): 0.5261101085949313
- Combined Prediction Score: 0.8779788782602446
- Mean Citation Score: 326.000544
- Max Citation Score: 344.80353
- Similarity Product: 336.08644504088045

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test