PATENT CLAIM ANALYSIS

Application Number: 16106276
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-08
Patent Classification: ["455", "063300"]

Abstract:
A control buffer circuit includes a voltage detection circuit configured to detect whether a received voltage is a negative voltage or a ground voltage and provide a voltage detection signal based on a result of the detecting, and a buffer circuit configured to provide a switching signal based on the voltage detection signal, wherein the switching signal comprises a positive voltage as a switching-on level voltage and includes one or more of the ground voltage and the negative voltage as a switching-off level voltage.

Claim (Index 8):
The control buffer circuit of  claim 6 , wherein the n-th buffer circuit comprises:\n a VNEG buffer configured to provide one of the positive voltage and the negative voltage as the switching level voltage of the switching signal based on the n-th band selection signal when the voltage detection signal is the first voltage; and a VSS buffer configured to provide one of the positive voltage and the ground voltage as the switching level voltage of the switching signal based on the n-th band selection signal when the voltage detection signal is the second voltage.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 96.0
- Lexical Diversity: 2.28947
- Patent Class: 455.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13511128', '13204400', '15667808', '15801137', '13052142']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7028528704142679
- 35 USC 102 Novelty (BERT): 0.4879918475013589
- Combined Prediction Score: 0.681366768122977
- Mean Citation Score: 170.350144
- Max Citation Score: 175.933
- Similarity Product: 117.08746714544296

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test