PATENT CLAIM ANALYSIS

Application Number: 16037546
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["365", "189050"]

Abstract:
Apparatuses and methods for creating a constant DQS-DQ delay in a memory device are described. An example apparatus includes a first adjustable delay line configured to provide a delay corresponding to a loop delay of a data strobe signal pathway internal to a memory, a second adjustable delay line included in the internal data strobe signal pathway, and a timing control circuit coupled to the first and second adjustable delay lines and configured to adjust a delay of the second adjustable delay line responsive to output from the first adjustable delay line and the data strobe signal pathway.

Claim (Index 14):
The method of  claim 13 , wherein:\n receiving the second input from the second delayed data strobe signal comprises receiving the second input from an end of the data strobe signal pathway that is proximate to the data latch; and receiving the data strobe signal to provide the first delayed data strobe signal comprises receiving the data strobe signal from end of the data strobe signal pathway that is proximate to a data strobe pad.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 95.0
- Lexical Diversity: 2.21739
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['10940187', '11588954', '14566358', '13736857', '12059593']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.812564980597476
- 35 USC 102 Novelty (BERT): 0.4751116664804773
- Combined Prediction Score: 0.7788196491857762
- Mean Citation Score: 193.255072
- Max Citation Score: 198.84665
- Similarity Product: 150.99747524057332

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test