PATENT CLAIM ANALYSIS

Application Number: 15912594
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["326", "038000"]

Abstract:
A semiconductor integrated circuit according to an embodiment includes: a first memory bank that performing a read operation and outputting first data in accordance with a first clock signal; a second memory bank performing a read operation and outputting second data in accordance with the first clock signal; a configurable decoder supplying address information to the first and second memory banks; and an output module reconfigurable in one of a first and second modes, the first mode including a function of holding the first and second data in accordance with the first clock signal, and selecting and outputting the first data or the second data in accordance with a second clock signal having a frequency at least twice higher than the first clock signal, the second mode including a function of selecting and outputting the first data or the second data in accordance with the first clock signal.

Claim (Index 2):
The semiconductor integrated circuit according to  claim 1 , wherein\n the output module includes: a first register group connected to the first memory bank, the first register group holding the first data in accordance with the first clock signal; a second register group connected to the second memory bank, the second register group holding the second data in accordance with the first clock signal; a first multiplexer that selects and outputs the first data or data held in the first register group; a second multiplexer that selects and outputs the second data or data held in the second register group; a bank selection address register that holds a bank selection address signal in accordance with the first clock signal; a third multiplexer that selects and outputs one of the second clock signal and the bank selection address signal; and a bank selection multiplexer that selects and outputs one of an output of the first multiplexer and an output of the second multiplexer in accordance with an output of the third multiplexer.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 90.0
- Lexical Diversity: 2.78571
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14530576', '10189839', '14180664', '11880141', '15421090']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6791491046453798
- 35 USC 102 Novelty (BERT): 0.4813929432427441
- Combined Prediction Score: 0.6593734885051162
- Mean Citation Score: 176.87999200000004
- Max Citation Score: 196.31085
- Similarity Product: 139.61242665368022

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test