PATENT CLAIM ANALYSIS

Application Number: 16116843
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "343000"]

Abstract:
A method for fabricating a LDMOS device, including: forming a semiconductor substrate; forming a dielectric layer atop the semiconductor substrate and an electric conducting layer on the dielectric layer; forming a first photoresist layer on the electric conducting layer; patterning the first photoresist layer through a first mask to form a first opening; etching the electric conducting layer through the first opening; implanting dopants of a first doping type into the semiconductor substrate through the first opening to form a first body region adjacent to the surface of the semiconductor substrate, and a second body region located beneath the first body region; removing the first photoresist layer; etching the electric conducting layer using a second photoresist layer and a second mask.

Claim (Index 4):
The LDMOS of  claim 2 , wherein the semiconductor substrate further comprises a resurf layer of the first doping type formed above the buried layer and contacting the second body region.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 96.0
- Lexical Diversity: 2.75
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15279190', '14080758', '15254836', '14862453', '14808991']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9149781009676102
- 35 USC 102 Novelty (BERT): 0.5272639576101191
- Combined Prediction Score: 0.8762066866318611
- Mean Citation Score: 264.246142
- Max Citation Score: 335.496
- Similarity Product: 300.6849336833953

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test