PATENT CLAIM ANALYSIS

Application Number: 15990162
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["257", "522000"]

Abstract:
A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.

Claim (Index 33):
The method of manufacturing a semiconductor structure of  claim 32 , wherein the depositing the dielectric material includes forming a void within the dielectric material.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 93.0
- Lexical Diversity: 2.40476
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15088126', '14514874', '15687308', '15168822', '15603923']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9158302896631296
- 35 USC 102 Novelty (BERT): 0.497956231465069
- Combined Prediction Score: 0.8740428838433234
- Mean Citation Score: 176.88592599999996
- Max Citation Score: 203.7577
- Similarity Product: 134.92691055570842

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test