PATENT CLAIM ANALYSIS

Application Number: 15895321
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["326", "038000"]

Abstract:
A programmable logic unit (PLU). The PLU includes a plurality of four-input reconfigurable hard logics (RHLs), a three-input look-up-table (LUT), and a plurality of reconfigurable inverters. The plurality of RHLs include a first RHL, a second RHL, and a third RHL. The plurality of reconfigurable inverters are associated with the plurality of RHLs.

Claim (Index 4):
The PLU of  claim 2 , wherein the second RHL includes:\n a sixth reconfigurable inverter of the plurality of reconfigurable inverters, the sixth reconfigurable inverter associated with the first configuration cell, the sixth reconfigurable inverter arranged to receive the first input; a seventh reconfigurable inverter of the plurality of reconfigurable inverters, the seventh reconfigurable inverter associated with the second configuration cell, the second reconfigurable inverter arranged to receive the second input; an eighth reconfigurable inverter of the plurality of reconfigurable inverters, the eighth reconfigurable inverter associated with the third configuration cell, the eighth reconfigurable inverter arranged to receive the third input; a ninth reconfigurable inverter of the plurality of reconfigurable inverters, the ninth reconfigurable inverter associated with the fourth configuration cell, the ninth reconfigurable inverter arranged to receive the fourth input; a third two-input NAND gate arranged to receive the third input and coupled with the seventh reconfigurable inverter to receive the output of the seventh reconfigurable inverter; a fourth two-input NAND gate coupled with the eighth reconfigurable inverter and the ninth reconfigurable inverter to receive the outputs of the eighth reconfigurable inverter and the ninth reconfigurable inverter; a tenth reconfigurable inverter of the plurality of reconfigurable inverters, the tenth reconfigurable inverter associated with the fifth configuration cell, the tenth reconfigurable inverter coupled with the third two-input NAND gate to receive the output of the third two-input NAND gate; an eleventh reconfigurable inverter of the plurality of reconfigurable inverters, the eleventh reconfigurable inverter associated with the sixth configuration cell, the eleventh reconfigurable inverter coupled with the fourth two-input NAND gate to receive the output of the fourth two-input NAND gate; a fifth two-input NAND gate coupled with the tenth reconfigurable inverter and the eleventh reconfigurable inverter to receive the outputs of the tenth reconfigurable inverter and the eleventh reconfigurable inverter; a twelfth reconfigurable inverter of the plurality of reconfigurable inverters, the twelfth reconfigurable inverter associated with the seventh configuration cell, the twelfth reconfigurable inverter coupled with the fifth two-input NAND gate to receive the output of the fifth two-input NAND gate; a sixth two-input NAND gate coupled with the sixth reconfigurable inverter and the twelfth reconfigurable inverter to receive the outputs of the sixth reconfigurable inverter and the twelfth reconfigurable inverter; and a thirteenth reconfigurable inverter of the plurality of reconfigurable inverters, the thirteenth reconfigurable inverter associated with the eighth configuration cell, the thirteenth reconfigurable inverter coupled with the sixth two-input NAND gate to receive the output of the sixth two-input NAND gate, the output of the thirteenth reconfigurable inverter connected to the second output.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 88.0
- Lexical Diversity: 2.0303
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['09754632', '14458456', '14089238', '14890911', '15224224']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6744759214636314
- 35 USC 102 Novelty (BERT): 0.4818647766690482
- Combined Prediction Score: 0.6552148069841732
- Mean Citation Score: 170.86310399999996
- Max Citation Score: 185.4701
- Similarity Product: 127.55819656689764

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test