PATENT CLAIM ANALYSIS

Application Number: 15870038
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-01
Patent Classification: ["257", "314000"]

Abstract:
Provided herein may be a semiconductor device and a method of manufacturing the same. The method may include forming a second preliminary stack on a first preliminary stack; forming a first hard mask layer on the second preliminary stack; etching the first hard mask layer and forming holes through which the second preliminary stack is exposed; forming a second hard mask layer on the first hard mask layer to fill the holes; forming a linear trench by etching the second hard mask layer; forming a waved select line separation mask pattern by etching the exposed first hard mask layer; forming a select line separation trench by etching the exposed second preliminary stack using the select line separation mask pattern as an etching mask; and forming a select line separation layer by filling the select line separation trench with a non-conductor.

Claim (Index 7):
The method according to  claim 5 , wherein the forming of the plug mask pattern further comprises etching back the second hard mask layer and the third hard mask layer such that the first hard mask layer is exposed.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 86.0
- Lexical Diversity: 3.10417
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13009298', '11519081', '11450936', '14158223', '10748900']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.928676135056257
- 35 USC 102 Novelty (BERT): 0.5082633261570704
- Combined Prediction Score: 0.8866348541663384
- Mean Citation Score: 248.698962
- Max Citation Score: 264.07166
- Similarity Product: 178.92319027304885

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test