PATENT CLAIM ANALYSIS

Application Number: 15949479
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["341", "158000"]

Abstract:
Embodiments of the present disclosure include a differential digital delay line analog-to-digital converter (ADC). The ADC includes differential digital delay lines, a circuit including a set of delay elements included in the differential digital delay lines, and another circuit including another set of delay elements included in the differential digital delay lines. The first circuit is configured to generate data representing an analog to digital conversion of an input. The second circuit is configured to calibrate a source to the differential digital delay lines.

Claim (Index 19):
The ADC of  claim 11 , further comprising a third circuit comprising a yet another set of delay elements included in the differential digital delay line, wherein the third circuit is configured to calibrate a source to the differential digital delay lines.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 91.0
- Lexical Diversity: 2.13953
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15484949', '15484965', '15484987', '15901294', '15915796']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6296999158723016
- 35 USC 102 Novelty (BERT): 0.5243172942054994
- Combined Prediction Score: 0.6191616537056214
- Mean Citation Score: 313.886356
- Max Citation Score: 340.81824
- Similarity Product: 333.5121839764023

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test