PATENT CLAIM ANALYSIS

Application Number: 16243249
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["345", "209000"]

Abstract:
A differential amplifier circuit includes a differential input stage, a first current mirror, a second current mirror, a first current source circuit, and a second current source circuit. The first current source circuit has a first transistor of a first conductivity type with a control terminal supplied with a first bias voltage, and a second transistor of a second conductivity type with a control terminal supplied with a second bias voltage. An output amplifier circuit includes a third transistor of the first conductivity type and a fourth transistor of the second conductivity type. A control circuit has a fifth transistor of the first conductivity type with a first terminal connected to a connection point between the other end of the second current source circuit and the control terminal of the fourth transistor in the output amplifier circuit, with a second terminal connected to an output node of the second current mirror, and with a control terminal receiving the first bias voltage.

Claim (Index 4):
The output circuit according to  claim 1 , wherein the differential input stage includes:\n a first current source with one end connected to the second power supply terminal; a differential transistor pair of the second conductivity type with first terminals connected together being connected to the other end of the first current source, control terminals connected respectively to the input terminal and the output terminal, and second terminals respectively connected to the transistor pair of the first conductivity type of the first current mirror; a second current source with one end connected to the first power supply terminal; and a differential transistor pair of the first conductivity type with first terminals connected together being connected to the other end of the second current source, control terminals respectively connected to the input terminal and the output terminal, and second terminals respectively connected to the transistor pair of the second conductivity type of the second current mirror.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 3.82222
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15818628', '13204403', '13317858', '14664076', '11648530']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6871399547985012
- 35 USC 102 Novelty (BERT): 0.578527311169547
- Combined Prediction Score: 0.6762786904356057
- Mean Citation Score: 374.23268
- Max Citation Score: 450.50867
- Similarity Product: 445.73882284124375

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test