PATENT CLAIM ANALYSIS

Application Number: 16038503
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["716", "104000"]

Abstract:
A computer-implemented method obtains data describing a plurality of synthesis scenarios associated with a very-large-scale integration design (VLSI), wherein each synthesis scenario describes a different combination of tunable design parameters for a macro of the VLSI design, and wherein the VLSI design includes a plurality of macros being tuned. The plurality of macros is ranked based on the data. The ranking produces a macro waiting list that identifies those of the synthesis scenarios that are associated with each of the macros. A subset of the synthesis scenarios is pushed from the macro waiting list to a job submission queue that is separate from the macro waiting list. The job submission queue ranks the subset of synthesis scenarios in an order in which they are to be synthesized by a synthesis tuning system. At least one synthesis scenario is submitted to the synthesis tuning system according to the order.

Claim (Index 20):
A non-transitory machine-readable storage medium encoded with instructions executable by a processor, the non-transitory machine-readable storage medium comprising:\n instructions to obtain a plurality of synthesis scenarios associated with a very-large-scale integration design, wherein each synthesis scenario of the plurality of synthesis scenarios describes a different combination of tunable design parameters for a macro of the very-large-scale integration design, and wherein the very-large-scale integration design includes a plurality of macros being tuned; instructions to rank the plurality of macros, before the plurality of synthesis scenarios is submitted for synthesis by a synthesis tuning system, wherein the ranking produces a macro waiting list, and wherein the macro waiting list identifies those of the plurality of synthesis scenarios that are associated with each of the plurality of macros; instructions to push a subset of the plurality of synthesis scenarios from the macro waiting list to a job submission queue, wherein the job submission queue ranks the subset of the plurality of synthesis scenarios in an order in which the subset of the plurality of synthesis scenarios is to be synthesized by the synthesis tuning system; instructions to submit a synthesis scenario of the subset of the plurality of synthesis scenarios to the synthesis tuning system according to the order; instructions to tune the design parameters of the very-large-scale integration design based on a result of the synthesis tuning run; and instructions to fabricate an integrated circuit according to the design parameters of the very-large-scale integration as tuned.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 95.0
- Lexical Diversity: 2.13514
- Patent Class: 716.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15352895', '14861697', '15358615', '15454919', '15392883']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.374579224133189
- 35 USC 102 Novelty (BERT): 0.5793715165461144
- Combined Prediction Score: 0.3950584533744816
- Mean Citation Score: 350.59920800000015
- Max Citation Score: 527.79486
- Similarity Product: 471.836993187983

Labels:
- Claim Label 101: 0
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test