PATENT CLAIM ANALYSIS

Application Number: 16101667
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-02
Patent Classification: ["257", "192000"]

Abstract:
A method of forming a semiconductor device includes forming a gate dielectric layer on a substrate; forming a barrier layer over the gate dielectric layer; treating the barrier layer to roughen an outer surface of the barrier layer, resulting in a treated barrier layer; and forming a metal layer over the treated barrier layer.

Claim (Index 12):
A semiconductor structure, comprising:\n a gate stack over a substrate; and source and drain features adjacent to the gate stack, wherein the gate stack includes:\n a gate dielectric layer, \n a barrier layer over the gate dielectric layer, the barrier layer having a roughened surface, and \n a metal layer over the roughened surface.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 96.0
- Lexical Diversity: 1.96667
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15800164', '13329877', '12424153', '15219967', '12702012']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8959768142960993
- 35 USC 102 Novelty (BERT): 0.4961648002396064
- Combined Prediction Score: 0.8559956128904501
- Mean Citation Score: 198.64231
- Max Citation Score: 252.42685
- Similarity Product: 211.41297257831988

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test