PATENT CLAIM ANALYSIS

Application Number: 16027356
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-12
Patent Classification: ["257", "296000"]

Abstract:
A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first trench and a second trench in substrate on the memory region, wherein a width of the second trench is greater than a width of the first trench; forming a first liner in the first trench and the second trench; forming a second liner on the first liner, wherein the second liner completely fills the first trench and partly fills the second trench; and planarizing the second liner and the first liner to form a first isolation structure and a second isolation structure.

Claim (Index 3):
The method of  claim 2 , further comprising;\n forming a third liner on the second liner; forming a fourth liner on the third liner; and planarizing the fourth liner, the third liner, the second liner, and the first liner to form the first isolation structure, the second isolation structure, the third isolation structure, and the fourth isolation structure.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 95.0
- Lexical Diversity: 2.71429
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12164579', '13455660', '14819508', '15830878', '11453423']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9104664371349148
- 35 USC 102 Novelty (BERT): 0.5055121194246636
- Combined Prediction Score: 0.8699710053638896
- Mean Citation Score: 189.488794
- Max Citation Score: 193.30699
- Similarity Product: 107.80754610009552

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test