PATENT CLAIM ANALYSIS

Application Number: 15909844
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["716", "105000"]

Abstract:
A method for designing a system on a target device is disclosed. The system is synthesized. The system is partitioned into a plurality of logical sections utilizing information derived from synthesizing the system and prior to performing placement of the system on the target device. Other embodiments are described and claimed.

Claim (Index 18):
The system of  claim 16 , wherein producing the partitioned circuit design comprises minimizing the number of cross-boundary couplings in the plurality of cross-boundary couplings.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 90.0
- Lexical Diversity: 1.52778
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12587064', '13553995', '12590643', '12040730', '10931953']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3517817330168136
- 35 USC 102 Novelty (BERT): 0.4610101561403443
- Combined Prediction Score: 0.3627045753291667
- Mean Citation Score: 167.012932
- Max Citation Score: 194.26701
- Similarity Product: 149.43561998743058

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test