PATENT CLAIM ANALYSIS

Application Number: 16053981
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-04
Patent Classification: ["438", "259000"]

Abstract:
A method for manufacturing a semiconductor device includes forming a gate electrode over a substrate; forming a hard mask over the gate electrode, in which the hard mask comprises a metal oxide; forming an interlayer dielectric (ILD) layer over the hard mask; forming a contact hole in the ILD layer, wherein the contact hole exposes a source/drain; filling the contact hole with a conductive material; and applying a chemical mechanical polish process to the ILD layer and the conductive material, wherein the chemical mechanical polish process stops at the hard mask, the chemical mechanical polish process uses a slurry containing a boric acid or its derivative, the chemical mechanical polish process has a first removal rate of the ILD layer and a second removal rate of the hard mask, and a first ratio of the first removal rate to the second removal rate is greater than about 5.

Claim (Index 14):
The method of  claim 11 , wherein the second removal rate of the hard mask is less than about 20 \u212b/min.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 96.0
- Lexical Diversity: 2.34783
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13707769', '15907030', '12499439', '15236210', '10711145']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8591833139016627
- 35 USC 102 Novelty (BERT): 0.4962669584070359
- Combined Prediction Score: 0.8228916783522
- Mean Citation Score: 163.327154
- Max Citation Score: 169.03073
- Similarity Product: 103.3060769934797

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test