PATENT CLAIM ANALYSIS

Application Number: 16098916
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-06
Patent Classification: ["365", "149000"]

Abstract:
In an embodiment, a memory system may include at least two types of DRAM, which differ in at least one characteristic. For example, one DRAM type may be a high density DRAM, while another DRAM type may have lower density but may also have lower latency and higher bandwidth than the first DRAM type. DRAM of the first type may be on one or more first integrated circuits and DRAM of the second type may be on one or more second integrated circuits. In an embodiment, the first and second integrated circuits may be coupled together in a stack. The second integrated circuit may include a physical layer circuit to couple to other circuitry (e.g. an integrated circuit having a memory controller, such as a system on a chip (SOC)), and the physical layer circuit may be shared by the DRAM in the first integrated circuits.

Claim (Index 2):
The system as recited in  claim 1  wherein the second integrated circuit comprises a physical layer circuit configured to communicate on behalf of the memory, including the first type of DRAM and the second type of DRAM.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 98.0
- Lexical Diversity: 2.39706
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15430747', '14536312', '13758613', '14227041', '13307776']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7586423974619794
- 35 USC 102 Novelty (BERT): 0.4709793015939333
- Combined Prediction Score: 0.7298760878751748
- Mean Citation Score: 140.397368
- Max Citation Score: 153.68051
- Similarity Product: 113.49772812526464

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test