PATENT CLAIM ANALYSIS

Application Number: 15914852
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-11
Patent Classification: ["257", "690000"]

Abstract:
The semiconductor device includes a first insulating circuit substrate; a semiconductor chip including a plurality of control electrodes, disposed on the first insulating circuit substrate; a second insulating circuit substrate including a plurality of first through-holes in which conductive members are arranged on inner walls and/or an outer periphery of ends of the first through-holes, the second insulating circuit substrate being disposed above the semiconductor chips; and first pins inserted into the first through-holes and having at one end a columnar part connected to the control electrodes of the semiconductor chips, and having at another end a head part that is wider than an inner diameter of the first through-holes.

Claim (Index 7):
The semiconductor device according to  claim 3 ,\n wherein the semiconductor chip is provided in a plurality, including a first semiconductor chip and a second semiconductor chip, and the first insulating circuit substrate includes:\n a first insulating plate; \n a first conductive member on the first insulating plate, mounting the first semiconductor chip on a top thereof; and \n a second conductive member on the first insulating plate, mounting the second semiconductor chip on a top thereof, and \n wherein the second insulating circuit substrate includes an insulating layer, a first conductive layer below the insulating layer in a first region corresponding to the first conductive member in position of the first insulating circuit substrate, and a second conductive layer on the insulating layer in a second region corresponding to the second conductive member in position of the first insulating circuit substrate, wherein the second insulating circuit substrate further includes a third conductive layer below the insulating layer in the second region opposite to the second conductive layer, and a fourth conductive layer on the insulating layer in the first region opposite to the first conductive layer, and wherein the third conductive layer is conductively connected to the fourth conductive layer through a hole in the insulating layer.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 90.0
- Lexical Diversity: 2.01724
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13500034', '14525780', '14368432', '13093220', '14706601']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9082456870182736
- 35 USC 102 Novelty (BERT): 0.4790700506688964
- Combined Prediction Score: 0.8653281233833359
- Mean Citation Score: 188.914364
- Max Citation Score: 195.36574
- Similarity Product: 160.34372916068554

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test