PATENT CLAIM ANALYSIS

Application Number: 15881506
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["438", "703000"]

Abstract:
Methods and apparatuses for spacer profile control using atomic layer deposition (ALD) in multi-patterning processes are described herein. A silicon oxide spacer is deposited over a patterned core material and a target layer of a substrate in a multi-patterning scheme. A first thickness of the silicon oxide spacer is deposited by multiple ALD cycles under a first oxidation condition that includes an oxidation time, a plasma power, and a substrate temperature. A second thickness of the silicon oxide spacer is deposited by multiple ALD cycles under a second oxidation condition, where the second oxidation condition is different than the first oxidation condition by one or more parameters. After etching the patterned core material, a resulting profile of the silicon oxide spacer is dependent at least in part on the first and second oxidation conditions.

Claim (Index 1):
A method comprising:\n depositing, in a plasma chamber, a first thickness of a silicon oxide layer by atomic layer deposition (ALD) on a substrate, wherein the substrate includes a patterned core material and a target layer underlying the patterned core material, wherein depositing the first thickness of the silicon oxide spacer layer by AT D includes exposing the substrate to a first dose of a silicon-containing precursor and exposing the substrate to plasma of an oxidant under a first oxidation condition; depositing, in the plasma chamber, a second thickness of the silicon oxide layer by ALD on the substrate, wherein depositing the second thickness of the silicon oxide layer by ALD includes exposing the substrate to a second dose of the silicon-containing precursor and exposing the substrate to plasma of the oxidant under a second oxidation condition, the second oxidation condition being different from the first oxidation condition; and etching, in the plasma chamber, a portion of the silicon oxide layer and the patterned core material to form a plurality of spacers, wherein the plurality of spacers comprise a remaining portion of the silicon oxide layer to serve as a mask for the target layer.

Metadata:
- Claim Count in Document: 56.0
- Percentile: 86.0
- Lexical Diversity: 2.10145
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15279312', '15705955', '14878576', '15874766', '14194324']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7857160615108039
- 35 USC 102 Novelty (BERT): 0.5012176524944739
- Combined Prediction Score: 0.7572662206091709
- Mean Citation Score: 256.7855
- Max Citation Score: 263.5553
- Similarity Product: 206.4448883668541

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test