PATENT CLAIM ANALYSIS

Application Number: 15893623
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["365", "148000"]

Abstract:
A semiconductor memory cell including a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell, and a non-volatile memory comprising a bipolar resistive change element, and methods of operating.

Claim (Index 34):
The integrated circuit of  claim 31 , wherein said bipolar resistive change element is configured to a predetermined resistivity after said floating body region is charged to a level based on resistivity of said bipolar resistive change element.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 88.0
- Lexical Diversity: 1.22857
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15191137', '13652457', '14680268', '15867877', '15403757']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8568692772781187
- 35 USC 102 Novelty (BERT): 0.5499778556488413
- Combined Prediction Score: 0.826180135115191
- Mean Citation Score: 369.306006
- Max Citation Score: 409.5092
- Similarity Product: 297.04404887690544

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test