PATENT CLAIM ANALYSIS

Application Number: 16132462
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["174", "251000"]

Abstract:
A circuit board element includes a glass substrate, a first dielectric layer, and a first patterned metal layer. The glass substrate has an edge. The first dielectric layer is disposed on the glass substrate and has a central region and an edge region. The edge region is in contact with the edge of the glass substrate, and the thickness of the central region is greater than the thickness of the edge region. The first patterned metal layer is disposed on the glass substrate and in the central region of the first dielectric layer.

Claim (Index 7):
The method of  claim 1 , wherein one of a plurality of the second circuit layers is formed on the dielectric layer, the others of the second circuit layers are formed in the dielectric layer, a part of the conductive vias connect the first circuit layer and the lowermost one of the second circuit layers, and the others of the conductive vias connect the second circuit layers.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 97.0
- Lexical Diversity: 3.06061
- Patent Class: 174.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15813222', '15867199', '11527632', '11808028', '14520117']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8487133472229527
- 35 USC 102 Novelty (BERT): 0.4841441083387789
- Combined Prediction Score: 0.8122564233345353
- Mean Citation Score: 195.976212
- Max Citation Score: 198.94604
- Similarity Product: 143.02777969575402

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test