PATENT CLAIM ANALYSIS

Application Number: 16200593
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["257", "368000"]

Abstract:
The invention includes semiconductor constructions having trenched isolation regions. The trenches of the trenched isolation regions can include narrow bottom portions and upper wide portions over the bottom portions. Electrically insulative material can fill the upper wide portions while leaving voids within the narrow bottom portions. The trenched isolation regions can be incorporated into a memory array, and/or can be incorporated into an electronic system. The invention also includes methods of forming semiconductor constructions.

Claim (Index 31):
The method of  claim 25  wherein the sacrificial material comprises silicon.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 98.0
- Lexical Diversity: 1.81818
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12835042', '14480454', '11218231', '15385783', '15895882']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9489665401327948
- 35 USC 102 Novelty (BERT): 0.5450103023659707
- Combined Prediction Score: 0.9085709163561124
- Mean Citation Score: 410.127812
- Max Citation Score: 425.80792
- Similarity Product: 275.42014347743043

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test