PATENT CLAIM ANALYSIS

Application Number: 15914121
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["710", "200000"]

Abstract:
A Joint Test Action Group (JTAG) communication lockout processor is disclosed. The processor is configured to generate a unlock sequence based on an operational mode change of an operably connected programmable device, and save the unlock sequence to one or more memory registers. The processor can also receive an execution of the unlock sequence via a dual function JTAG communication bus, determine, via an unlock logic, whether the execution of the unlock sequence is valid, and responsive to determining that the execution of the unlock sequence is valid, allow or disallow the JTAG communication with an embedded processor.

Claim (Index 11):
The JTAG lockout processor of  claim 9 , wherein the lockout processor comprises:\n unlock logic configured to:\n validate the unlock sequence based on an operational mode change; and \n a gate operatively connected to the unlock logic and configured to connect the JTAG communication bus with the programmable device when the test interface has executed a valid unlock sequence.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 90.0
- Lexical Diversity: 1.81667
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15482336', '12565133', '10850123', '13204037', '11464393']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6816013329870283
- 35 USC 102 Novelty (BERT): 0.5267006400938109
- Combined Prediction Score: 0.6661112636977066
- Mean Citation Score: 201.519022
- Max Citation Score: 355.98724
- Similarity Product: 284.42770266091344

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test