PATENT CLAIM ANALYSIS

Application Number: 16045298
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "401000"]

Abstract:
An integrated circuit structure includes a semiconductor substrate having a plurality of semiconductor strips, a first recess being formed by two adjacent semiconductor strips among the plurality of semiconductor strips, a second recess being formed within the first recess, and an isolation region being provided in the first recess and the second recess. The second recess has a lower depth than the first recess.

Claim (Index 10):
The method of  claim 9  further comprising:\n applying a photo resist as an under layer over the plurality of semiconductor strips, wherein the spaces between the remaining ones of the plurality of semiconductor strips are filled by the under layer; \n forming a patterned middle layer over the under layer; \n removing the patterned middle layer; and \n performing an anisotropic etching to etch the phot resist and the first semiconductor strip simultaneously.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 95.0
- Lexical Diversity: 1.91667
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15399237', '15407094', '15203866', '15691852', '14142435']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9080424641832332
- 35 USC 102 Novelty (BERT): 0.476646416994037
- Combined Prediction Score: 0.8649028594643134
- Mean Citation Score: 167.44550199999995
- Max Citation Score: 200.86118
- Similarity Product: 158.2112035300064

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test