PATENT CLAIM ANALYSIS

Application Number: 15757197
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["257", "676000"]

Abstract:
The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device, and more particularly, to a semiconductor device capable of reducing the uppermost semiconductor chip damage and stably performing wire bonding even if an excessive force is applied during a die bonding process or a wire bonding process, and a method for manufacturing the semiconductor device.

Claim (Index 2):
The semiconductor device of  claim 1 , further comprising one to five die-bonded semiconductor chips between the substrate and the first die bonding layer.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 90.0
- Lexical Diversity: 1.71053
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14781537', '12863063', '15125705', '12881577', '12529211']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9118448631526812
- 35 USC 102 Novelty (BERT): 0.4960998310161144
- Combined Prediction Score: 0.8702703599390247
- Mean Citation Score: 192.14636
- Max Citation Score: 194.21535
- Similarity Product: 121.52290543423894

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test