PATENT CLAIM ANALYSIS

Application Number: 15983116
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-02
Patent Classification: ["257", "048000"]

Abstract:
A test circuit including: a plurality of first leads; a plurality of controllable switches each having a control terminal for receiving a control signal, a first terminal connected to a respective one of the plurality of first leads, and a second terminal for connection to a respective first signal line; and at least two short-circuit lines intersecting the first leads. Each of the short-circuit lines is connected to a respective subset of the plurality of first leads. Each of the plurality of first leads belongs to a corresponding one of the respective subsets, and the respective subsets are disjoint from each other.

Claim (Index 16):
An array substrate comprising the test circuit according to  claim 1 .

Metadata:
- Claim Count in Document: 44.0
- Percentile: 93.0
- Lexical Diversity: 2.3617
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14025593', '14065540', '15880489', '14383035', '13641108']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9093597304786412
- 35 USC 102 Novelty (BERT): 0.491119824061453
- Combined Prediction Score: 0.8675357398369224
- Mean Citation Score: 171.88848000000004
- Max Citation Score: 179.75023000000004
- Similarity Product: 115.1279775793362

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test