PATENT CLAIM ANALYSIS

Application Number: 16274118
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-06
Patent Classification: ["375", "244000"]

Abstract:
Methods and systems are described for receiving a control step input at a binary-to-thermometer decoder and responsively generating bits of a thermometer codeword representative of the control step input, providing the bits of the thermometer codeword to a plurality of differential pairs comprising a first transistor and a second transistor, each differential pair configurable for one of directing current to an in-phase (I) common node or directing current to a quadrature phase (Q) common node and switching between directing current to the I common node and the Q common node, and forming an output signal based on current drawn through the I and Q common nodes, the output signal having an intermediate phase with respect to a first and a second reference signal.

Claim (Index 11):
A method comprising:\n generating a plurality of bits of a thermometer codeword representative of a received control step input; providing each bit of the plurality of bits of the thermometer code to a corresponding differential pair of transistors of a plurality of differential pairs of transistors, each differential pair of transistor selective connecting a corresponding equal-sized current source of a plurality of equal-sized current sources to one of an in-phase (I) and a quadrature phase (Q) output node, the plurality of differential pairs of transistors comprising (i) a first subset configured to selectively switch the corresponding equal-sized current source between both the I and Q output nodes and (ii) a second subset configured to selectively connect the corresponding equal-sized current source to only one of the I and Q output nodes; generating analog I and Q control signals by drawing respective amounts of current through the I and Q output nodes using the plurality of equal-sized current sources, respectively; and providing the I and Q control signals to a phase interpolator, the phase interpolator further receiving first and second reference signals and responsively generating an interpolated signal having an intermediate phase with respect to the first and second reference signals.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 2.03077
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15675412', '15220656', '12183563', '14300127', '14925686']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.512874668328878
- 35 USC 102 Novelty (BERT): 0.5373264362963254
- Combined Prediction Score: 0.5153198451256227
- Mean Citation Score: 206.464318
- Max Citation Score: 368.82797
- Similarity Product: 329.6468835324943

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test