PATENT CLAIM ANALYSIS

Application Number: 16018304
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["257", "615000"]

Abstract:
A method of forming a semiconductor on a porous semiconductor structure. The method may include forming a stack, the stack includes (from bottom to top) a substrate, a base silicon layer, a thick silicon layer, and a thin silicon layer, where the thin silicon layer and the thick silicon layer are relaxed; converting the thick silicon layer into a porous silicon layer using a porousification process; and forming a III-V layer on the thin silicon layer, where the layer is relaxed, the thin silicon layer is strained, and the porous silicon layer is partially strained.

Claim (Index 9):
A semiconductor structure comprising:\n a stack of layers including a first semiconductor layer on a substrate, a second semiconductor layer on the first semiconductor layer, and a third semiconductor layer on the second semiconductor layer, wherein the third semiconductor layer is thinner than the second semiconductor layer; and a fourth semiconductor layer directly on the third semiconductor layer, wherein the fourth semiconductor layer is relaxed, the third semiconductor layer is strained, and the second semiconductor layer is partially strained.

Metadata:
- Claim Count in Document: 31.0
- Percentile: 94.0
- Lexical Diversity: 2.53488
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14645449', '11934479', '10763978', '14541179', '11280336']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9128803325870208
- 35 USC 102 Novelty (BERT): 0.5157400243942701
- Combined Prediction Score: 0.8731663017677458
- Mean Citation Score: 217.29601
- Max Citation Score: 310.29636
- Similarity Product: 227.5694229678011

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test