PATENT CLAIM ANALYSIS

Application Number: 16141946
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-05
Patent Classification: ["330", "295000"]

Abstract:
Cascode power amplifier with voltage limiter. A power amplification system can include an input transistor having an input transistor gate configured to receive a radio-frequency (RF) signal, an input transistor source coupled to a ground voltage, and an input transistor drain. The power amplification can further include an output transistor having an output transistor drain configured to output an amplified version of the RF signal, an output transistor gate coupled to a bias voltage, and an output transistor source. The power amplification system can further include a high voltage limiter coupled between the output transistor drain and output transistor gate. The high voltage limiter can be configured to prevent a gate-drain voltage of the output transistor from exceeding a high voltage threshold.

Claim (Index 10):
The method of  claim 8  wherein preventing voltages from dropping below the low voltage threshold comprises maintaining a middle transistor coupled to the input transistor in an active mode.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 97.0
- Lexical Diversity: 2.77083
- Patent Class: 330.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15584341', '14829472', '14958848', '15040952', '14626833']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.760169903039122
- 35 USC 102 Novelty (BERT): 0.5182006584276669
- Combined Prediction Score: 0.7359729785779765
- Mean Citation Score: 230.286346
- Max Citation Score: 287.47253
- Similarity Product: 221.8917007881629

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test