PATENT CLAIM ANALYSIS

Application Number: 16043789
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["327", "147000"]

Abstract:
An integrated circuit device includes: an AFE circuit (analog front-end circuit) that receives a first signal and a second signal, carries out waveform shaping of the first signal and waveform shaping of the second signal, outputs the first signal whose waveform is shaped to a first signal line, and outputs the second signal whose waveform is shaped to a second signal line; and a time-to-digital converter that receives the first signal from the AFE circuit via the first signal line, receives the second signal from the AFE circuit via the second signal line, and converts a time difference between transition timings of the first signal and the second signal into a digital value. At least one of the first signal line and the second signal line has redundant wiring for isometric wiring.

Claim (Index 12):
An integrated circuit device comprising:\n an analog front-end circuit which outputs first to n-th start signals (n being an integer equal to or greater than 2) whose waveforms are shaped, from first to n-th start signal output terminals, based on a start signal, and outputs first to n-th stop signals whose waveforms are shaped, from first to n-th stop signal output terminals, based on a stop signal; a time-to-digital converter that receives the first to n-th start signals from the analog front-end circuit from first to n-th start signal input terminals, receives the first to n-th stop signals from the analog front-end circuit from first to n-th stop signal input terminals, and carries out time-digital conversion based on the first to n-th start signals and the first to n-th stop signals; first to n-th start signal lines connecting the first to n-th start signal output terminals and the first to n-th start signal input terminals; and first to n-th stop signal lines connecting the first to n-th stop signal output terminals and the first to n-th stop signal input terminals, wherein the j-th stop signal line (where 1\u2264j\u2264n) has j-th redundant wiring, the k-th stop signal line (where 1\u2264k\u2264n, j\u2260k) has k-th redundant wiring, a distance between the j-th stop signal output terminal and the j-th stop signal input terminal is shorter than a distance between the k-th stop signal output terminal and the k-th stop signal input terminal, and the j-th redundant wiring is longer than the k-th redundant wiring.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 95.0
- Lexical Diversity: 2.6
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16043681', '15715607', '16021458', '15715458', '15712796']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7422306786324323
- 35 USC 102 Novelty (BERT): 0.5250669339451921
- Combined Prediction Score: 0.7205143041637083
- Mean Citation Score: 252.963668
- Max Citation Score: 341.3278200000001
- Similarity Product: 277.6714792378414

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test