PATENT CLAIM ANALYSIS

Application Number: 16430766
Application Type: Utility
Filing Date: 2019-06
Publication Date: 2019-09
Patent Classification: ["029", "846000"]

Abstract:
A method for manufacturing a high-current printed circuit board, comprising: providing a circuit substrate comprising a substrate layer; a first circuit layer formed on the substrate layer; and a second circuit layer formed on the substrate layer and facing away from the first circuit layer, wherein first conductive circuits are defined on the first circuit layer, second conductive circuits are defined on the second circuit layer, and a line width of each of the first conductive circuits is greater than a line width of each of the second conductive circuits; and forming buffering circuits by plating, wherein the buffering circuits are electrically connected the first circuit layer to the second circuit layer; wherein a line width of each of the buffering circuits is greater than the line width of each of the second conductive circuits.

Claim (Index 8):
The method of  claim 6 , wherein the dielectric layer is made of adhesive.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 100.0
- Lexical Diversity: 3.24444
- Patent Class: 29.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15835817', '15945426', '15137007', '12732512', '15474293']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8601403330599292
- 35 USC 102 Novelty (BERT): 0.5025905482485968
- Combined Prediction Score: 0.824385354578796
- Mean Citation Score: 143.92591399999995
- Max Citation Score: 220.90587
- Similarity Product: 139.71528482468247

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test