PATENT CLAIM ANALYSIS

Application Number: 16100321
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["438", "106000"]

Abstract:
A packaged semiconductor device includes a substrate and a contact pad disposed on the semiconductor substrate. The packaged semiconductor device also includes a dielectric layer disposed over the contact pad, the dielectric layer including a first opening over the contact pad, and an insulator layer disposed over the dielectric layer, the insulator layer including a second opening over the contact pad. The packaged semiconductor device also includes a molding material disposed around the substrate, the dielectric layer, and the insulator layer and a wiring over the insulator layer and extending through the second opening, the wiring being electrically coupled to the contact pad.

Claim (Index 20):
The semiconductor structure of  claim 19 , wherein the second surface of the through via is level with a second surface of the molding material.

Metadata:
- Claim Count in Document: 43.0
- Percentile: 96.0
- Lexical Diversity: 3.11111
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15431486', '15167258', '13890162', '14531916', '13660867']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8573299170294705
- 35 USC 102 Novelty (BERT): 0.5172962692475325
- Combined Prediction Score: 0.8233265522512767
- Mean Citation Score: 254.49326600000003
- Max Citation Score: 303.83878
- Similarity Product: 255.06747933458448

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test