PATENT CLAIM ANALYSIS

Application Number: 16030181
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["211", "041180"]

Abstract:
This specification describes semiconductor wafer carriers, methods for manufacturing the semiconductor wafer carriers, and methods for using the semiconductor wafer carriers. The semiconductor wafer carriers can include features for avoiding double-slotting, for preventing glove marks on semiconductor wafers, and for providing additional sitting and storage options for the wafer carrier. In some examples, a semiconductor wafer carrier includes multiple notched left-side rods that are parallel in a vertical direction and multiple notched right-side rods that are parallel in the vertical direction. The semiconductor wafer carrier includes one or more bottom rods. The left-side rods, the right-side rods, and the one or more bottom rods are joined to define semiconductor wafer slots.

Claim (Index 31):
The semiconductor wafer carrier of  claim 26 , wherein each of the plurality of bottom rods comprises a smooth surface facing vertically towards the plurality of semiconductor wafer slots.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 95.0
- Lexical Diversity: 2.23636
- Patent Class: 211.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15395824', '15395955', '14127971', '13871279', '13232684']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7599591064374761
- 35 USC 102 Novelty (BERT): 0.515494374091169
- Combined Prediction Score: 0.7355126332028454
- Mean Citation Score: 190.469722
- Max Citation Score: 311.84256
- Similarity Product: 242.6508340159606

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test