PATENT CLAIM ANALYSIS

Application Number: 15868058
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["438", "199000"]

Abstract:
One illustrative method disclosed herein includes, among other things, performing at least one etching process to expose at least a portion of an upper surface of a gate electrode of a first transistor device and at least a vertical portion of one side surface of the gate electrode and performing a material growth process to form a conductive gate-to-source/drain (GSD) contact structure that conductively couples the gate electrode of the first transistor device to a source/drain region of the first transistor device, wherein the conductive GSD contact structure comprises a non-single crystal material portion positioned on previously exposed portions of the gate electrode and a single crystal material portion positioned in the source/drain region.

Claim (Index 11):
A method of forming a conductive gate-to-source/drain (GSD) contact structure for a first transistor device, the method comprising:\n performing a source/drain epitaxial growth process to form a first single crystal epi semiconductor material in a source/drain region of said first transistor device; performing at least one etching process to expose at least a portion of an upper surface of a gate electrode of said first transistor device, at least a vertical portion of one side surface of said gate electrode of said first transistor device and at least a portion of said first single crystal epi semiconductor material; and performing a GSD contact material growth process to form a second single crystal epi semiconductor material in a source/drain region of a second transistor device and a layer of said second single crystal epi semiconductor on said first single crystal epi semiconductor material on said first transistor device, wherein said first and second transistor devices are opposite type devices, and wherein said conductive GSD contact structure comprises a non-single crystal material portion positioned on previously exposed portions of said gate electrode of said first transistor device and said layer of said second single crystal epi semiconductor positioned on said first single crystal epi semiconductor.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 86.0
- Lexical Diversity: 2.0
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15791650', '15791711', '15813471', '15047137', '15214670']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8654043069073467
- 35 USC 102 Novelty (BERT): 0.4991313611075343
- Combined Prediction Score: 0.8287770123273654
- Mean Citation Score: 251.400774
- Max Citation Score: 277.93906
- Similarity Product: 229.6042292684936

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test