PATENT CLAIM ANALYSIS

Application Number: 15749858
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["257", "031000"]

Abstract:
The present disclosure provides a scalable architecture for an advanced processing apparatus for performing quantum processing. The architecture is based on an all-silicon CMOS fabrication technology. Transistor-based control circuits, together with floating gates, are used to operate a two-dimensional array of qubits. The qubits are defined by the spin states of a single electron confined in a quantum dot.

Claim (Index 42):
The apparatus of  claim 41  wherein the electrode arrangement is disposed onto the dielectric layer and the quantum dot is formed within the silicon layer and in proximity of the interface.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 88.0
- Lexical Diversity: 1.35417
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14931738', '14931768', '14054659', '10787075', '14996918']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9243015742119832
- 35 USC 102 Novelty (BERT): 0.5001792325288146
- Combined Prediction Score: 0.8818893400436665
- Mean Citation Score: 222.40535200000005
- Max Citation Score: 242.55023
- Similarity Product: 171.81817619355022

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test