PATENT CLAIM ANALYSIS

Application Number: 15879035
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["257", "382000"]

Abstract:
A method for forming a semiconductor device includes recessing a gate conductor in a gate structure to form a first divot, forming a gate cap in the first divot and recessing a dielectric fill that encapsulates the gate structures to a position below a top of the gate cap. An extension layer is deposited over the dielectric fill and the top of the gate cap and is planarized to the top of the gate cap. The extension layer is expanded to form a profile growth layer that is thicker than the extension layer and creates a second divot over the gate cap. A top cap is formed in the second divot to provide a cap with a thickness of the gate cap and the top cap.

Claim (Index 4):
The method as recited in  claim 3 , wherein expanding the extension layer includes oxidizing the polysilicon layer to form the profile growth layer having second divots formed therein.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 86.0
- Lexical Diversity: 2.62
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15216154', '15449218', '15193831', '15282836', '15180251']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9115830687047418
- 35 USC 102 Novelty (BERT): 0.5737316899854832
- Combined Prediction Score: 0.8777979308328159
- Mean Citation Score: 281.023724
- Max Citation Score: 434.8111
- Similarity Product: 432.4246846323967

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test