PATENT CLAIM ANALYSIS

Application Number: 15988805
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-05
Patent Classification: ["257", "066000"]

Abstract:
The disclosure provides a thin film transistor and a fabricating method thereof, and an array substrate. The thin film transistor includes a gate, a first active layer, a second active layer, a first source, a first drain, a second source and a second drain which are provided above a base substrate. The first active layer is located at a side of the gate facing the base substrate, and the second active layer is located at a side of the gate facing away from the first active layer. The first source and the first drain are located at a side of the first active layer facing away from the gate and are connected with the first active layer. The second source and the second drain are located at a side of the second active layer facing away from the gate and are connected with the second active layer.

Claim (Index 2):
The thin film transistor of  claim 1 , further comprising a first conductive pattern, a second conductive pattern, a first insulation layer and a second insulation layer, wherein\n the first conductive pattern is located at a side of the first source facing away from the first active layer, and extends beyond a region surrounded by the first drain; the first insulation layer is formed between the first conductive pattern and the first active layer, the first insulation layer is provided with a first via therein, and the first source is connected to the first conductive pattern through the first via; the second conductive pattern is located at a side of the second source facing away from the second active layer, and extends beyond a region surrounded by the second drain; the second insulation layer is formed between the second conductive pattern and the second active layer, the second insulation layer is provided with a second via therein, and the second source is connected to the second conductive pattern through the second via; and a portion of the first conductive pattern located outside of the region surrounded by the first drain is connected with a portion of the second conductive pattern located outside of the region surrounded by the second drain.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 93.0
- Lexical Diversity: 3.975
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14764307', '14769577', '14912822', '11316967', '15127262']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9185698867033651
- 35 USC 102 Novelty (BERT): 0.4847272022467249
- Combined Prediction Score: 0.8751856182577011
- Mean Citation Score: 230.082852
- Max Citation Score: 236.87231
- Similarity Product: 193.54022940224232

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test