PATENT CLAIM ANALYSIS

Application Number: 15911383
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["365", "185210"]

Abstract:
According to one embodiment, a semiconductor memory device includes a first conductor extending in a first direction, bit lines, sense amplifiers, and a second conductor extending in the first direction. A plurality of first memory cells being connected to the first conductor. The bit lines respectively connected to the first memory cells. The first sense amplifiers are respectively connected to a plurality of first bit lines included in the bit lines, each of the first sense amplifiers including a first sense node, and a first transistor connected between the first sense node and a corresponding one of the first bit lines. The second conductor function as gate electrodes of the first transistors included in the first sense amplifiers.

Claim (Index 21):
A semiconductor memory device comprising:\n first and second memory cells; a first word line connected to the first and second memory cells and extending in a first direction, a voltage being applied to the first word line by a first driver from one side in the first direction; a first sense amplifier including a first transistor which is connected to the first memory cell and includes a gate to which a voltage is applied by a second driver; and a second sense amplifier including a second transistor which is connected to the second memory cell and includes a gate to which a voltage is applied by a third driver, wherein in a read operation, the second driver is configured to apply a first voltage to the gate of the first transistor when the first sense amplifier judge data stored in the first memory cell, the third driver is configured to apply the first voltage to the gate of the second transistor when the second sense amplifier judge data stored in the second memory cell, the first driver is configured to apply a kick voltage which is higher than a read voltage to the first word line before applying the read voltage to the first word line, the second driver is configured to apply a second voltage which is less than or equal to the first voltage to the gate of the first transistor while the kick voltage is being applied to the first word line, and the third driver is configured to apply a third voltage which is lower than the second voltage to the gate of the second transistor while the kick voltage is being applied to the first word line, the second driver is configured to apply a plurality of voltages in a stepwise manner while an output voltage of the second driver varies from the second voltage to the first voltage, and the third driver is configured to apply a plurality of voltages in a stepwise manner while an output voltage of the third driver varies from the third voltage to the first voltage.

Metadata:
- Claim Count in Document: 51.0
- Percentile: 90.0
- Lexical Diversity: 2.93182
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15886464', '15909404', '15881662', '14020246', '15346716']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7638516363396671
- 35 USC 102 Novelty (BERT): 0.5148117291894072
- Combined Prediction Score: 0.7389476456246411
- Mean Citation Score: 238.588434
- Max Citation Score: 324.91754
- Similarity Product: 278.2070569316888

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test