PATENT CLAIM ANALYSIS

Application Number: 16238215
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["257", "329000"]

Abstract:
A semiconductor device includes a vertical transistor on a substrate. The vertical transistor includes at least one fin. A bottom source/drain is disposed on the substrate and around the at least one fin. A spacer layer is disposed on the bottom source/drain and around the at least one fin. A gate structure is disposed on the spacer layer and around the at least one fin. The gate length is the same or substantially the same on each side of the at least one fin.

Claim (Index 6):
The semiconductor device according to  claim 1 , further comprising a first dielectric layer disposed on the substrate and the exterior surface of the gate structure, the spacer layer and the bottom source/drain.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 99.0
- Lexical Diversity: 2.72727
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15608159', '16117221', '16023535', '15156923', '15916525']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9223601257879916
- 35 USC 102 Novelty (BERT): 0.510836580121127
- Combined Prediction Score: 0.8812077712213052
- Mean Citation Score: 268.989084
- Max Citation Score: 295.1366
- Similarity Product: 213.9403015161991

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test