PATENT CLAIM ANALYSIS

Application Number: 16016971
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "089000"]

Abstract:
Wafer-level packaging of solid-state transducers (“SSTs”) is disclosed herein. A method in accordance with a particular embodiment includes forming a transducer structure having a first surface and a second surface opposite the first surface, and forming a plurality of separators that extend from at least the first surface of the transducer structure to beyond the second surface. The separators can demarcate lateral dimensions of individual SSTs. The method can further include forming a support substrate on the first surface of the transducer structure, and forming a plurality of discrete optical elements on the second surface of the transducer structure. The separators can form barriers between the discrete optical elements. The method can still further include dicing the SSTs along the separators. Associated SST devices and systems are also disclosed herein.

Claim (Index 14):
The SST of  claim 10  wherein a lowermost surface of the dielectric material is co-planar with the first surface of the transducer structure.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 94.0
- Lexical Diversity: 2.07246
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14614382', '13190971', '13863625', '15426897', '13218289']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9313891970125384
- 35 USC 102 Novelty (BERT): 0.520598709932069
- Combined Prediction Score: 0.8903101483044915
- Mean Citation Score: 277.50084000000004
- Max Citation Score: 317.0754
- Similarity Product: 220.5988966235876

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test