PATENT CLAIM ANALYSIS

Application Number: 16043503
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["257", "774000"]

Abstract:
Multi-chip package structures and methods for constructing multi-chip package structures are provided, which utilize chip interconnection bridge devices that are designed to provide high interconnect density between adjacent chips (or dies) in the package structure, as well as provide vertical power distribution traces through the chip interconnection bridge device to supply power (and ground) connections from a package substrate to the chips connected to the chip interconnection bridge device.

Claim (Index 26):
The method of  claim 14 , wherein the first integrated circuit die comprises a memory die and wherein the second integrated circuit die comprises a processor die.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 95.0
- Lexical Diversity: 1.52
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13280368', '12905095', '14220912', '15234425', '12370537']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9366185872261712
- 35 USC 102 Novelty (BERT): 0.5172659918719497
- Combined Prediction Score: 0.8946833276907491
- Mean Citation Score: 300.693974
- Max Citation Score: 306.84738
- Similarity Product: 212.819191757462

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test