PATENT CLAIM ANALYSIS

Application Number: 16006657
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-08
Patent Classification: ["257", "531000"]

Abstract:
An integrated circuit includes a capacitor (e.g., a folded metal-oxide-metal (MOM) capacitor) formed in the lower BEOL interconnect levels, without degrading an inductor's Q-factor. The integrated circuit includes the capacitor in one or more back-end-of-line (BEOL) interconnect levels. The capacitor includes multiple folded capacitor fingers having multiple sides and a pair of manifolds on a same side of the folded capacitor fingers. Each of the pair of manifolds is coupled to one or more of the folded capacitor fingers. The integrated circuit also includes an inductive trace having one or more turns in one or more different BEOL interconnect levels. The inductive trace overlaps one or more portions of the capacitor.

Claim (Index 5):
The integrated circuit of  claim 1 , in which the pair of manifolds are on a different layer than the inductive trace.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 94.0
- Lexical Diversity: 2.33333
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['16004920', '15687129', '15687234', '13770127', '14512191']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9185458444711674
- 35 USC 102 Novelty (BERT): 0.5207844271758116
- Combined Prediction Score: 0.8787697027416319
- Mean Citation Score: 212.803106
- Max Citation Score: 322.8238
- Similarity Product: 262.0588178934097

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test