PATENT CLAIM ANALYSIS

Application Number: 16122183
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-03
Patent Classification: ["257", "414000"]

Abstract:
Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays of well-controlled, solid-state nanopores by a cyclic process including atomic layer deposition (ALD), or chemical vapor deposition (CVD), and etching. One or more features are formed in a thin film deposited on a topside of a substrate. A dielectric material is deposited over the substrate having the one or more features in the thin film. An etching process is then used to etch a portion of the dielectric material deposited over the substrate having the one or more features in the thin film. The dielectric material deposition and etching processes are optionally repeated to reduce the size of the features until a well-controlled nanopore is formed through the thin film on the substrate.

Claim (Index 16):
The substrate of  claim 15 , wherein a thickness of the thin film is between about 1 nanometer and about 5 nanometers.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 97.0
- Lexical Diversity: 2.15873
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15156213', '14391661', '11185004', '11185007', '12854192']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.918023428698308
- 35 USC 102 Novelty (BERT): 0.5066576955634751
- Combined Prediction Score: 0.8768868553848246
- Mean Citation Score: 203.408436
- Max Citation Score: 224.04929
- Similarity Product: 136.64822234208228

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test