PATENT CLAIM ANALYSIS

Application Number: 15979983
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["345", "633000"]

Abstract:
Systems and methods are disclosed herein for providing improved cache structures and methods that are optimally sized to support a predetermined range of late stage adjustments and in which image data is intelligently read out of DRAM and cached in such a way as to eliminate re-fetching of input image data from DRAM and minimize DRAM bandwidth and power. The systems and methods can also be adapted to work with compressed image data.

Claim (Index 18):
The HMD device of  claim 12  further comprising performing additional retrieval operations, as needed, to retrieve and decompress one or more additional tiles of compressed GPU image data from the first cache to the second cache, the one or more additional tiles of compressed GPU image data in the first cache being selected and being written into the second cache in the order needed to construct the output image based on the late stage adjustment matrix.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 93.0
- Lexical Diversity: 1.41509
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15415542', '15415569', '15485899', '15470790', '15403649']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6235282494632144
- 35 USC 102 Novelty (BERT): 0.556552503511251
- Combined Prediction Score: 0.616830674868018
- Mean Citation Score: 295.7729720000001
- Max Citation Score: 421.43912
- Similarity Product: 340.02753511899

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test