PATENT CLAIM ANALYSIS

Application Number: 15873069
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-01
Patent Classification: ["365", "185170"]

Abstract:
Disclosed are a semiconductor memory device and an operating method thereof. The semiconductor memory device includes: a memory cell array including a plurality of memory blocks sharing one or more drain select lines; a peripheral circuit configured to perform a program operation on the memory cell array; and a control logic configured to control the peripheral circuit to coding-program one or more drain select transistors included in each of the plurality of memory blocks.

Claim (Index 12):
The semiconductor memory device of  claim 11 , wherein each of the plurality of memory blocks further includes a dummy connection control transistor connected between the connection control transistor and the one or more drain select transistors.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 86.0
- Lexical Diversity: 1.75556
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15290625', '14601841', '15648681', '14692323', '14703196']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8324097073242512
- 35 USC 102 Novelty (BERT): 0.5007178259266443
- Combined Prediction Score: 0.7992405191844906
- Mean Citation Score: 280.137216
- Max Citation Score: 293.8583
- Similarity Product: 233.2857008279324

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test