PATENT CLAIM ANALYSIS

Application Number: 16143627
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-03
Patent Classification: ["361", "748000"]

Abstract:
A printed wiring board includes a first build-up layer including first insulating layer, conductor layer and via conductor, a second build-up layer formed on the first build-up layer and including second insulating layer, conductor layer and via conductor, and a third build-up layer formed on the second build-up layer and including third insulating layer, conductor layer and via conductor. The first via conductor has first via conductor diameter at interface between the first conductor layer and first via conductor, the second via conductor has second via conductor diameter at interface between the second conductor layer and second via conductor, and the third via conductor has third via conductor diameter at interface between the third conductor layer and third via conductor such that the first via conductor diameter is larger than the second via conductor diameter and that the second via conductor diameter is larger than the third via conductor diameter.

Claim (Index 9):
The printed wiring board according to  claim 5 , further comprising:\n a core substrate having a first surface on which the first build-up layer is formed; and a lower side build-up layer formed on the second surface of the core substrate on an opposite side with respect to the first surface of the core substrate, wherein the lower side build-up layer includes a plurality of fourth resin insulating layers, a plurality of fourth conductor layers formed on the fourth resin insulating layers respectively, and a plurality of fourth via conductors penetrating through the fourth resin insulating layers and connecting to the fourth conductor layers respectively, each of the fourth via conductors has a fourth via conductor diameter at an interface between respective fourth conductor layer and fourth via conductor such that the fourth via conductor diameter is substantially equal to the first via conductor diameter, the plurality of first conductor layers and the plurality of fourth conductor layers are formed such that a thickness of each of the fourth conductor layers is substantially equal to the thickness of each of the first conductor layers, the plurality of first resin insulating layers and the plurality of fourth resin insulating layers are formed such that a thickness of each of the fourth resin insulating layers is substantially equal to the thickness of each of the first resin insulating layers, and the lower side build-up layer is formed such that the plurality of fourth conductor layers has a number of layers equal to a number of layers of the plurality of first conductor layers and that the plurality of fourth resin insulating layers has a number of layers equal to a number of layers of the plurality of first resin insulating layers.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 97.0
- Lexical Diversity: 4.96875
- Patent Class: 361.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14857074', '14920974', '15581253', '14700313', '15040129']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8453924717260658
- 35 USC 102 Novelty (BERT): 0.4931999375342213
- Combined Prediction Score: 0.8101732183068814
- Mean Citation Score: 244.903306
- Max Citation Score: 256.69
- Similarity Product: 192.2191822326183

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test