PATENT CLAIM ANALYSIS

Application Number: 15919657
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["375", "227000"]

Abstract:
According to one embodiment, in a reception apparatus, a reception node is capable of being connected to a wired communication channel. A first frequency conversion circuit is electrically connected to the reception node. A second frequency conversion circuit is electrically connected to the reception node. A first adder circuit is electrically connected to the first frequency conversion circuit. A second adder circuit is electrically connected to the second frequency conversion circuit. A first correction circuit is electrically connected between the first frequency conversion circuit and the second adder circuit. A second correction circuit is electrically connected between the second frequency conversion circuit and the first adder circuit. The first correction circuit includes a reverse phase amplifier and a first capacitative element. The second correction circuit includes a positive phase amplifier and a second capacitative element.

Claim (Index 3):
The reception apparatus according to  claim 1 , wherein\n the first frequency conversion circuit performs frequency conversion of a reception signal at the reception node with a first local signal to extract a first component, the second frequency conversion circuit performs frequency conversion of a reception signal at the reception node with a second local signal having a phase approximately 90 degrees different from that of the first local signal to extract a second component, a gain of the reverse phase amplifier and a capacitance value of the first capacitative element are set so that the first correction circuit differentiates the second component and compensates interference of the second component with respect to the first component to generate a first correction value, a gain of the positive phase amplifier and a capacitance value of the second capacitative element are set so that the second correction circuit differentiates the first component and compensates interference of the first component with respect to the second component to generate a second correction value, the first adder circuit adds the extracted first component and the generated first correction value, and the second adder circuit adds the extracted second component and the generated second correction value.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 90.0
- Lexical Diversity: 3.74359
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14123685', '14357756', '15178401', '13711821', '15445986']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4881441977013926
- 35 USC 102 Novelty (BERT): 0.4701608003738475
- Combined Prediction Score: 0.4863458579686381
- Mean Citation Score: 152.04919999999996
- Max Citation Score: 158.00537
- Similarity Product: 118.51316281833292

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test