PATENT CLAIM ANALYSIS

Application Number: 16151323
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-01
Patent Classification: ["257", "296000"]

Abstract:
A semiconductor IC structure includes a substrate including at least a memory cell region and a peripheral region defined thereon, a plurality of memory cells formed in the memory cell region, at least an active device formed in the peripheral region, a plurality of contact plugs formed in the memory cell region, and at least a bit line formed in the memory cell region. The contact plugs are physically and electrically connected to the bit line. More important, bottom surfaces of the contact plugs are lower a surface of the substrate.

Claim (Index 5):
The semiconductor IC structure according to  claim 3 , wherein the contact plugs and the bit line in the memory cell region and the gate electrode of the active device in the peripheral region comprise a same material.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 97.0
- Lexical Diversity: 2.25
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15261845', '15479290', '15820455', '15232833', '15465580']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9072501301087208
- 35 USC 102 Novelty (BERT): 0.5008206827322282
- Combined Prediction Score: 0.8666071853710714
- Mean Citation Score: 205.68299
- Max Citation Score: 278.409
- Similarity Product: 261.570127105236

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test