PATENT CLAIM ANALYSIS

Application Number: 15948565
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-01
Patent Classification: ["347", "211000"]

Abstract:
A fluidic die may include a number of actuators. The number of actuators form a number of primitives. The fluidic die may include a digital-to-analog converter (DAC) to drive a number of the delay circuits. The delay circuits delay a number of activation pulses that activate the actuators associated with the primitives to reduce peak power demands of the fluidic die. A number of delay circuits may be coupled to each primitive.

Claim (Index 16):
The print circuit of  claim 13 , wherein the delay circuit comprises a number of transistors, wherein the transistors are tuned to an operating point of the delay circuit based on an output signal of the DAC and the delay circuit is tuned to produce a delay greater than one clock cycle of a clock signal available on the print circuit.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 91.0
- Lexical Diversity: 2.13514
- Patent Class: 347.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15665560', '15518306', '15684465', '10714762', '13819893']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7148027754423775
- 35 USC 102 Novelty (BERT): 0.5065721787829397
- Combined Prediction Score: 0.6939797157764338
- Mean Citation Score: 163.724826
- Max Citation Score: 237.7957
- Similarity Product: 158.4379594671011

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test