PATENT CLAIM ANALYSIS

Application Number: 15979046
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["385", "014000"]

Abstract:
An integrated photo detector with enhanced electrostatic discharge damage (ESD) protection. The integrated photo detector includes a first photodiode formed in the SOI substrate and associated with a first p-electrode and a first n-electrode. Additionally, the integrated photo detector includes a second photodiode formed in the SOI substrate associated with a second p-electrode and a second n-electrode forming a capacitance no larger than a few femto Faradays. Moreover, the integrated photo detector includes a first electrode and a second electrode disposed respectively on the SOI substrate. The first/second electrode is respectively connected to the first p/n-electrode via a first/second metallic layer patterned with a reduced width from the first/second electrode to the first p/n-electrode and connected to the second p/n-electrode via a first/second metallic wire to make a parallel coupling between the first photodiode and the second photodiode with an ESD threshold of about 100V.

Claim (Index 15):
A method for manufacturing an integrated photo detector with an electrostatic discharge damage (ESD) protection, the method comprising:\n forming a first Silicon base block and a second Silicon base block on a substrate; forming a Germanium photodiode partially in the first Silicon base block, the Germanium photodiode being associated with a first p-electrode and a first n-electrode; forming a Silicon photodiode in the second Silicon bask block, the Silicon photodiode being associated with a second p-electrode and a second n-electrode, the second p-electrode and the second n-electrode serving as two terminals of a capacitance no larger than a few femto Faradays; forming a first electrode and a second electrode separately on the substrate; forming a first metallic layer on the substrate to connect the first electrode respectively to the first p-electrode and the second p-electrode, the first metallic layer being patterned to have a first portion with a reducing width connecting the first electrode to the first p-electrode and a second portion with a first trace line connecting the first electrode to the second p-electrode; forming a second metallic layer on the substrate to connect the second electrode respectively to the first n-electrode and the second n-electrode, the second metallic layer being patterned to have a third portion with a reducing width to connect the second electrode to the first n-electrode and a fourth portion with a second trace line to connect the second electrode to the second n-electrode; and coupling the device to a network.

Metadata:
- Claim Count in Document: 53.0
- Percentile: 93.0
- Lexical Diversity: 2.33333
- Patent Class: 385.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15637889', '15208547', '14945003', '14339443', '15309922']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7920592097833842
- 35 USC 102 Novelty (BERT): 0.5808672134096963
- Combined Prediction Score: 0.7709400101460153
- Mean Citation Score: 320.227198
- Max Citation Score: 463.90576
- Similarity Product: 443.6075935023308

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test