PATENT CLAIM ANALYSIS

Application Number: 15919885
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-08
Patent Classification: ["717", "140000"]

Abstract:
An algorithmic matching pipelined compiler and a reusable algorithmic pipelined core comprise a system. The reusable algorithmic pipelined core is a reconfigurable processing core with a pipelined structure comprising a processor with a setup interface for programming any of a plurality of operations as determined by setup data, a logic decision processor for programming a look up table, a loop counter and a constant register, and a block of memory. This can be used to perform functions. A reconfigurable, programmable circuit routes data and results from one core to another core and/or IO controller and/or interrupt generator, as required to complete an algorithm without further intervention from a central or peripheral processor during processing of an algorithm.

Claim (Index 15):
The system of  claim 14 , further comprising setting up the look up table by the logic processor, wherein the look up table is an n-bit look up table, and the n-bit look up table is used to encode an n-bit Boolean logic function as truth tables.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 90.0
- Lexical Diversity: 1.68
- Patent Class: 717.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12403224', '11973184', '10523764', '10884589', '12570943']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4011618892877479
- 35 USC 102 Novelty (BERT): 0.4924633288064848
- Combined Prediction Score: 0.4102920332396216
- Mean Citation Score: 148.97728
- Max Citation Score: 154.91838
- Similarity Product: 99.39370471204164

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test