PATENT CLAIM ANALYSIS

Application Number: 15925096
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "043000"]

Abstract:
A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.

Claim (Index 7):
The semiconductor device according to  claim 6 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 90.0
- Lexical Diversity: 3.01887
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14926722', '13932654', '13613413', '13671858', '13014036']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9332646208608624
- 35 USC 102 Novelty (BERT): 0.4958390343360067
- Combined Prediction Score: 0.8895220622083768
- Mean Citation Score: 248.109242
- Max Citation Score: 250.47104
- Similarity Product: 190.50115939765925

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test