PATENT CLAIM ANALYSIS

Application Number: 16265062
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-05
Patent Classification: ["716", "115000"]

Abstract:
A method, system, and computer program product for enhancing integrated circuit noise performance. The method is for arranging target wires in a target region, the method including: for each wire in the target wires, obtaining a signal jump interval with respect to each of the other wires in the target wires, wherein the signal jump interval of one wire with respect to a further wire is a time interval between occurrence of signal jump on the one wire and occurrence of signal jump on the further wire; calculating a corresponding time influence factor based on the signal jump interval, wherein the time influence factor is a decreasing function of the signal jump interval; and arranging the target wires in the target region based on the time influence factor. Coupling noise between wires may be reduced according to the technical solution of an embodiment of the present invention.

Claim (Index 13):
A computer program product, the computer program product comprising:\n one or more computer-readable storage media and program instructions stored on the one or more computer-readable storage media, the program instructions comprising: program instructions toto obtain a signal jump interval between each wire in a set of target wires, wherein the signal jump interval of one wire in the set of target wires with respect to another wire in the set of target wires is equal to a time interval between an occurrence of a signal jump on the one wire and an occurrence of a signal jump on the other wire; program instructions to calculate a corresponding time influence factor based on the signal jump interval, wherein the time influence factor is a decreasing function of the signal jump interval; program instructions to arrange, in priority, a wire with a larger total time influence factor on a channel adjacent to a wire without a coupling effect; program instructions to provide a circuit derived from the arranged set of target wires; and program instructions to fabricate a hardware device of the derived circuit.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 99.0
- Lexical Diversity: 2.52381
- Patent Class: 716.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16265106', '14967433', '10888635', '16169223', '14973631']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2944060776845373
- 35 USC 102 Novelty (BERT): 0.525381056229224
- Combined Prediction Score: 0.317503575539006
- Mean Citation Score: 232.253564
- Max Citation Score: 377.60703
- Similarity Product: 342.7765666420805

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test