PATENT CLAIM ANALYSIS

Application Number: 15906588
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["365", "189140"]

Abstract:
The present disclosure relates to a structure which includes an assist circuit which is configured to add a boost voltage using a common boost logic device for both a read logic circuit and a write logic circuit of the assist circuit.

Claim (Index 19):
A method, comprising:\n adding a boost voltage to a read logic circuit of an assist circuit using a common boost logic device during a read operation; adding the boost voltage to a write logic circuit of the assist circuit using the common boost logic device during a write operation; and preventing data from being propagated through the write logic circuit during the read operation, wherein the write logic circuit comprises a write logic core, a write logic, the common boost logic device, and at least one bitline, the read logic circuit comprises a read logic core, a read logic, a sense amplifier, and the at least one bitline, and the sense amplifier is directly connected to the added boost voltage through a boost signal such that the sense amplifier is configured to receive the added boost voltage during a read operation.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 88.0
- Lexical Diversity: 1.44828
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15891619', '14755557', '14077559', '15903826', '15798764']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8114590479053352
- 35 USC 102 Novelty (BERT): 0.5007220341045763
- Combined Prediction Score: 0.7803853465252593
- Mean Citation Score: 272.718366
- Max Citation Score: 285.612
- Similarity Product: 205.45641658830644

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test