PATENT CLAIM ANALYSIS

Application Number: 16240459
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["711", "120000"]

Abstract:
Methods, systems, and apparatus, including an apparatus for transferring data using multiple buffers, including multiple memories and one or more processing units configured to determine buffer memory addresses for a sequence of data elements stored in a first data storage location that are being transferred to a second data storage location. For each group of one or more of the data elements in the sequence, a value of a buffer assignment element that can be switched between multiple values each corresponding to a different one of the memories is identified. A buffer memory address for the group of one or more data elements is determined based on the value of the buffer assignment element. The value of the buffer assignment element is switched prior to determining the buffer memory address for a subsequent group of one or more data elements of the sequence of data elements.

Claim (Index 9):
A method performed by a computing system for transferring data, the method comprising:\n determining buffer memory addresses for data of an N-dimensional tensor stored in a first data storage location that is being transferred to a second data storage location, wherein N is an integer that is equal to or greater than two, the determining comprising:\n identifying a current value of a buffer assignment element that can be switched between a plurality of values each corresponding to a different one of a plurality of memories; and \n assigning a first portion of the data of the N-dimensional tensor to the memory corresponding to the current value of the buffer assignment element until the memory corresponding to the current value of the buffer assignment element is full, including:\n determining the buffer memory address for each data element of the first portion of data based on at least on a combination of (i) a base address for the plurality of memories, (ii) a memory address offset value for the memory corresponding to the current value of the buffer assignment element, and (iii) a memory offset value for the data element, wherein the memory offset value for each data element is based on current index values of multiple loops in a loop nest used to traverse the N-dimensional tensor; \n \n transferring the first portion of the data of the N-dimensional tensor to a respective memory location of the memory corresponding to the current value of the buffer assignment element using the determined buffer memory address for each data element; and switching the value of the buffer assignment element prior to determining buffer memory addresses for a next portion of the data of the N-dimensional tensor.

Metadata:
- Claim Count in Document: 22.0
- Percentile: 99.0
- Lexical Diversity: 2.38462
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15641824', '15903991', '15664842', '15603061', '15844192']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.469283019636159
- 35 USC 102 Novelty (BERT): 0.5095912454151106
- Combined Prediction Score: 0.4733138422140542
- Mean Citation Score: 218.95867400000003
- Max Citation Score: 305.1316
- Similarity Product: 278.8266738381863

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test