PATENT CLAIM ANALYSIS

Application Number: 16035458
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "351000"]

Abstract:
A method for forming a complementary metal oxide semiconductor (CMOS) semiconductor device includes providing a stressed silicon-on-insulator (sSOI) wafer comprising a stressed semiconductor layer having first and second laterally adjacent stressed semiconductor portions. The first stressed semiconductor portion defines a first active region. The second stressed semiconductor portion is replaced with an unstressed semiconductor portion. The unstressed semiconductor portion includes a first semiconductor material. The method further includes driving a second semiconductor material into the first semiconductor material of the unstressed semiconductor portion defining a second active region.

Claim (Index 16):
The device of  claim 15 , wherein the first source and the first drain are a raised source and a raised drain, respectively.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 95.0
- Lexical Diversity: 2.1087
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15162441', '14675156', '14048263', '15191369', '12869978']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9327514716647224
- 35 USC 102 Novelty (BERT): 0.5315990179847403
- Combined Prediction Score: 0.8926362262967243
- Mean Citation Score: 301.394978
- Max Citation Score: 352.56107000000014
- Similarity Product: 204.43869997747785

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test