PATENT CLAIM ANALYSIS

Application Number: 15743672
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["381", "094500"]

Abstract:
A microphone circuit including a JFET or MOSFET transistor, a terminal of an input-impedance-network connected to the transistor's gate, one terminal of a source resistor connected to the transistor's source, and another terminal connected to ground, a bypass capacitor connected in parallel to the source resistor, one terminal of a load resistor connected to the transistor's drain, a charge-pump generating low-voltage connected to the second terminal of the load resistor, and an inverted voltage connected to a power supply terminal of an op amplifier, one input of the op-amplifier connected to the source terminal of the transistor through a bi-directional low-pass-filter, another input connected to a reference voltage, one power supply terminal connected to the inverted voltage, another power supply terminal connected to main supply voltage, an output terminal connected to another terminal of the input-impedance-network through a low pass filter, where the input-impedance-network connected to a microphone.

Claim (Index 13):
A method for sensing an acoustic signal, the method comprising:\n connecting an input-impedance-network comprising a first terminal to a gate terminal of a transistor comprising at least one of a JFET transistor and a MOSFET transistor; connecting a first terminal of a source resistor to a source terminal of said transistor, and a second terminal of said source resistor to a ground terminal; connecting a bypass capacitor (CS) in parallel to said source resistor; connecting a first terminal of a load resistor (RD) to a drain terminal of said transistor; connecting a low-voltage (VCC_LOW) generated by a charge-pump to said second terminal of said load resistor; and connecting an inverted voltage (\u2212VEE) generated by said charge-pump to a first power supply node of an op amplifier; connecting a first input terminal of said op-amplifier to said source terminal of said transistor through a bi-directional low-pass-filter; connecting a second input terminal of said op-amplifier to a reference voltage Vref; connecting a first power supply terminal of said op-amplifier to said inverted voltage; connecting a second power supply terminal of said op-amplifier to main supply voltage, connecting an output terminal of said op-amplifier to a second terminal of said input-impedance-network through a second low pass filter; and connecting an electret capacitor in parallel to said input-impedance-network.

Metadata:
- Claim Count in Document: 71.0
- Percentile: 86.0
- Lexical Diversity: 3.05556
- Patent Class: 381.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15107110', '13762300', '12416538', '10595403', '14700666']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6520383809050154
- 35 USC 102 Novelty (BERT): 0.4895198258473909
- Combined Prediction Score: 0.635786525399253
- Mean Citation Score: 205.14247400000005
- Max Citation Score: 247.72614
- Similarity Product: 219.31720350989696

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test