PATENT CLAIM ANALYSIS

Application Number: 16122339
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-04
Patent Classification: ["257", "072000"]

Abstract:
The present application provides a thin film transistor, an array substrate, a display device and a method of fabricating a thin film transistor. According to embodiments of the present application, the thin film transistor includes: a substrate; a first source/drain electrode on the substrate; an active layer at a side of the first source/drain electrode facing away from the substrate; and a second source/drain electrode at a side of the active layer facing away from the first source/drain electrode. The first source/drain electrode and the second source/drain electrode are electrically connected to the active layer independently.

Claim (Index 7):
The thin film transistor of  claim 6 , wherein in a case where the thin film transistor comprises the buffer layer and the interlayer dielectric layer, an orthographic projection of the first via on the substrate and an orthographic projection of the second via on the substrate do not overlap with each other.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 97.0
- Lexical Diversity: 2.52381
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16080207', '15154257', '16037481', '15156858', '15759498']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9337893578637944
- 35 USC 102 Novelty (BERT): 0.5164154970072116
- Combined Prediction Score: 0.8920519717781361
- Mean Citation Score: 291.577288
- Max Citation Score: 305.12952
- Similarity Product: 216.5134423450613

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test