PATENT CLAIM ANALYSIS

Application Number: 16155552
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-08
Patent Classification: ["341", "155000"]

Abstract:
A dynamic current correlating circuit is disclosed. The current correlating circuit includes a reset circuit, a first current generating circuit and a second current generating circuit. The reset circuit executes a discharging procedure during a first time interval and executes a charging procedure during a second time interval. The first current generating circuit is electrically connected to the reset circuit. The first current generating circuit generates a first sub-current and a second sub-current during a third time interval according to a first input voltage and a second input voltage and generates a first current after the third time interval. The second current generating circuit is electrically connected to the reset circuit. The second current generating circuit generates a second current according to the first input voltage and the second input voltage after the third time interval.

Claim (Index 9):
An analog-to-digital converter comprising:\n a comparator, which comprises: a dynamic current correlating circuit, which comprises:\n a reset circuit, which executes a discharge program at a first time and performs a charge program at a second time; \n a first current generating circuit, which is electrically connected to the reset circuit, generates a first sub-current and a second sub-current at a third time in accordance with a first input voltage and a second input voltage, then generates a first current after the third time; and \n a second current generating circuit, which is electrically connected to the reset circuit, generates a second current after the third time in accordance with the first input voltage and the second input voltage; \n a first latch circuit, which is electrically connected to the dynamic current correlating circuit, generates a first sub-voltage and a second sub-voltage in accordance with the first sub-current and the second sub-current, then generates a first output voltage and a second output voltage; a second latch circuit, which is electrically connected to the dynamic current associated circuit, generates a first voltage and a second voltage in accordance with the first current and the second current, then generates a first bypass trigger voltage and a second bypass trigger voltage; a control unit, which is electrically connected with the comparator, the control unit receives the first output voltage, the second output voltage, the first bypass trigger voltage and the second bypass trigger voltage, and thereby outputs a bypass trigger signal and a ready signal; and a bypass switching logic unit, which is electrically connected with the control unit and generates a set of digital control signals in sequence in accordance with the bypass trigger signal, the ready signal and a first frequency signal.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 97.0
- Lexical Diversity: 4.11429
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15480928', '12393847', '13283907', '13064911', '12748345']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5203392698633242
- 35 USC 102 Novelty (BERT): 0.4757742230243876
- Combined Prediction Score: 0.5158827651794305
- Mean Citation Score: 162.571822
- Max Citation Score: 166.42972
- Similarity Product: 133.03794167106628

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test