PATENT CLAIM ANALYSIS

Application Number: 15971904
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["708", "514000"]

Abstract:
A system for block floating point computation in a neural network receives a block floating point number comprising a mantissa portion. A bit-width of the block floating point number is reduced by decomposing the block floating point number into a plurality of numbers each having a mantissa portion with a bit-width that is smaller than a bit-width of the mantissa portion of the block floating point number. One or more dot product operations are performed separately on each of the plurality of numbers to obtain individual results, which are summed to generate a final dot product value. The final dot product value is used to implement the neural network. The reduced bit width computations allow higher precision mathematical operations to be performed on lower-precision processors with improved accuracy.

Claim (Index 6):
The system of  claim 1 , wherein performing one or more dot product operations comprises performing one of matrix-vector multiply operations and matrix-matrix multiply operations.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 93.0
- Lexical Diversity: 1.97059
- Patent Class: 708.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15592021', '10786332', '14106442', '12127898', '14295818']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4638260464125101
- 35 USC 102 Novelty (BERT): 0.4935600352801984
- Combined Prediction Score: 0.4667994452992789
- Mean Citation Score: 203.921026
- Max Citation Score: 222.03918
- Similarity Product: 168.50451169701574

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test