PATENT CLAIM ANALYSIS

Application Number: 16227928
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["438", "624000"]

Abstract:
An interconnect structure for an integrated circuit, such as a three dimensional integrated circuit (3DIC), and a method of forming the same is provided. An example interconnect structure includes a substrate, a through via extending through the substrate, and a liner disposed between the substrate and the through via. The substrate includes a tapered profile portion. The tapered profile portion abuts the liner.

Claim (Index 6):
The interconnect structure of  claim 5 , wherein the redistribution layer adjoins the first surface of the first portion of the dielectric capping layer and the second surface of the second portion of the dielectric capping layer.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 98.0
- Lexical Diversity: 1.87179
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14263466', '15863205', '14624008', '13943543', '15282012']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8319896446150201
- 35 USC 102 Novelty (BERT): 0.4982687167795693
- Combined Prediction Score: 0.7986175518314751
- Mean Citation Score: 144.504828
- Max Citation Score: 198.46736
- Similarity Product: 137.71933804464342

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test