PATENT CLAIM ANALYSIS

Application Number: 16056564
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "401000"]

Abstract:
A method for fabricating a semiconductor device is disclosed. A dummy gate is formed on a semiconductor substrate. The dummy gate has a first sidewall and a second sidewall opposite to the first sidewall. A low-k dielectric layer is formed on the first sidewall of the dummy gate and the semiconductor substrate. A spacer material layer is deposited on the low-k dielectric layer, the second sidewall of the dummy gate, and the semiconductor substrate. The spacer material layer and the low-k dielectric layer are etched to form a first spacer structure on the first sidewall and a second spacer structure on the second sidewall. A drain doping region is formed in the semiconductor substrate adjacent to the first spacer structure. A source doping region is formed in the semiconductor substrate adjacent to the second spacer structure.

Claim (Index 9):
The method for fabricating a semiconductor device according to  claim 8 , wherein the low-k dielectric layer comprises silicon oxycarbonitride (SiOCN), silicon carbide (SiC), or black diamond.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 96.0
- Lexical Diversity: 3.47619
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15394833', '13940283', '14970881', '14307011', '14952549']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9348148729740376
- 35 USC 102 Novelty (BERT): 0.5157852149104085
- Combined Prediction Score: 0.8929119071676747
- Mean Citation Score: 264.225072
- Max Citation Score: 318.37125
- Similarity Product: 288.9832502254844

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test