PATENT CLAIM ANALYSIS

Application Number: 16141285
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["712", "215000"]

Abstract:
Fast issuance and execution of a multi-width instruction across multiple slices in a parallel slice processor core is supported in part through the use of an early notification signal passed between issue logic associated with multiple slices handling that multi-width instruction coupled with an issuance of a different instruction by the originating issue logic for the early notification signal.

Claim (Index 1):
A circuit arrangement, comprising:\n a plurality of parallel execution slices configured to execute instructions from one or more instruction streams, the plurality of parallel execution slices including first and second execution slices; a first issue logic circuit of the first execution slice, the first issue logic circuit configured to queue instructions dispatched to the first execution slice and to issue queued instructions for execution by the first execution slice, the first issue logic circuit further configured to queue a first portion of a multi-width instruction dispatched to the first execution slice; and a second issue logic circuit of the second execution slice, the second issue logic circuit configured to queue instructions dispatched to the second execution slice and to issue queued instructions for execution by the second execution slice, the second issue logic circuit further configured to queue a second portion of the multi-width instruction dispatched to the second execution slice; wherein the first issue logic circuit is further configured to initiate execution of the multi-width instruction by the first and second execution slices by:\n in a first issue cycle, communicating an early issue notification signal to the second issue logic circuit to cause the second issue logic circuit to prepare for issuance of the multi-width instruction during a second issue cycle; \n also in the first issue cycle, issuing a queued instruction other than the first portion of the multi-width instruction for execution by the first execution slice; and \n in the second issue cycle, issuing the first portion of the multi-width instruction for execution by the first execution slice.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 97.0
- Lexical Diversity: 1.5
- Patent Class: 712.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15939367', '15093192', '14595549', '16048946', '15093172']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6294669163456814
- 35 USC 102 Novelty (BERT): 0.5609901203997464
- Combined Prediction Score: 0.6226192367510879
- Mean Citation Score: 354.655344
- Max Citation Score: 439.212
- Similarity Product: 435.07387357664106

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test