PATENT CLAIM ANALYSIS

Application Number: 15927076
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["326", "068000"]

Abstract:
A semiconductor die. The die comprises a level shifter coupled to a positive differential input and to a negative differential input comprising a first operational amplifier, wherein the first operational amplifier is configured to generate an internal common mode voltage coupled to a positive differential output and to a negative differential output, a positive alternating current (AC) coupled feed-forward path comprising a first capacitor coupled to the positive differential input and to the positive differential output, a negative AC coupled feed-forward path comprising a second capacitor coupled to the negative differential input and to the negative differential output, a positive direct current (DC) feed-forward path coupled to the differential input, to the internal common mode voltage sense node, and to the positive differential output, and a negative DC feed-forward path coupled to the differential input, to the internal common mode voltage sense node, and to the negative differential output.

Claim (Index 1):
A semiconductor die, comprising:\n a level shifter coupled to a positive differential input and coupled to a negative differential input, comprising a first operational amplifier, wherein the first operational amplifier is configured to generate an internal common mode voltage at an internal common mode voltage sense node independent of an input common mode voltage of the positive differential input and the negative differential input and where the internal common mode voltage sense node is coupled to a positive differential output and is coupled to a negative differential output; a positive alternating current (AC) coupled feed-forward path comprising a first capacitor coupled to the positive differential input and coupled to the positive differential output; a negative AC coupled feed-forward path comprising a second capacitor coupled to the negative differential input and coupled to the negative differential output; a positive direct current (DC) feed-forward path coupled to the differential input, coupled to the internal common mode voltage sense node, and coupled to the positive differential output; and a negative DC feed-forward path coupled to the differential input, coupled to the internal common mode voltage sense node, and coupled to the negative differential output; wherein the positive DC feed-forward path comprises the third resistor, a seventh resistor, and a second operational amplifier, the second operational amplifier configured as a buffer amplifier having an output coupled to a first lead of the seventh resistor and having a positive input coupled to the third node, the seventh resistor having a second lead coupled to the positive differential output, and the negative DC feed-forward path comprises the sixth resistor, an eighth resistor, and a third operational amplifier, the third operational amplifier configured as a buffer amplifier having an output coupled to a first lead of the eighth resistor and having a positive input coupled to the fourth node, the eighth resistor having a second lead coupled to the negative differential output.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 90.0
- Lexical Diversity: 3.64444
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15193518', '14138557', '11205691', '11423479', '11197992']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.667790015151507
- 35 USC 102 Novelty (BERT): 0.481113466013571
- Combined Prediction Score: 0.6491223602377134
- Mean Citation Score: 208.54394399999995
- Max Citation Score: 213.42982
- Similarity Product: 155.7329907533693

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test