PATENT CLAIM ANALYSIS

Application Number: 16453257
Application Type: Utility
Filing Date: 2019-06
Publication Date: 2019-10
Patent Classification: ["385", "017000"]

Abstract:
Techniques for using planar photonic switch fabrics with reduced waveguide crossings are described. In one embodiment, a system is provided that comprises a memory that stores computer-executable components and a processor that executes computer-executable components stored in the memory. In one implementation, the computer-executable components comprise an arrangement component that arranges a first planar switch fabric topology. The computer-executable components further comprise a transformation component that interleaves a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology to form a second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings than the first planar switch fabric topology.

Claim (Index 4):
The system of  claim 3 , wherein a first layer of the second planar switch fabric topology is fabricated in a first material, and a second layer of the second planar switch fabric topology is fabricated in a second material that is different from the first material.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 100.0
- Lexical Diversity: 2.15517
- Patent Class: 385.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15839309', '15839337', '15839275', '14750356', '14664108']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8591387100030634
- 35 USC 102 Novelty (BERT): 0.5814183861153858
- Combined Prediction Score: 0.8313666776142956
- Mean Citation Score: 452.33349
- Max Citation Score: 557.82855
- Similarity Product: 364.7618763652592

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test