PATENT CLAIM ANALYSIS

Application Number: 15942119
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["331", "034000"]

Abstract:
Aspects of this disclosure relate to reducing settling time of a ramp signal in a phase-locked loop. An offset signal can be applied to adjust an input signal provided to an integrator of a loop filter of the phase-locked loop to cause the settling time to be reduced. Disclosed methods of reducing settling time of a ramp signal can improve settling time of a ramp signal independent of the profile of the ramp signal.

Claim (Index 20):
The phase-locked loop of  claim 17 , wherein phase-locked loop is configured such that an output signal of the phase detector provided to the digital loop filter remains at approximately zero while the loop filter generates the ramp signal.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 90.0
- Lexical Diversity: 2.2
- Patent Class: 331.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15284190', '15284195', '15284374', '15377917', '15156584']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.765274948534897
- 35 USC 102 Novelty (BERT): 0.5542027506502285
- Combined Prediction Score: 0.7441677287464302
- Mean Citation Score: 300.659222
- Max Citation Score: 411.46494
- Similarity Product: 315.0256619427788

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test