PATENT CLAIM ANALYSIS

Application Number: 15860539
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-03
Patent Classification: ["365", "185110"]

Abstract:
A semiconductor memory device and a method of operating the same are provided. The method of operating the semiconductor memory device includes determining a target word line coupled to an over-programmed memory cell, backing up data stored in memory cells coupled to the target word line in a second memory area, wherein the se second memory area is different from a first memory area where the memory cells coupled to the target word line are disposed, and applying a stepped-up read pass voltage to the target word line when a read operation is performed on a selected memory cell in a memory block coupled to the target word line, wherein the selected memory cell is different from the over-programmed memory cell. Therefore, the operation reliability of the semiconductor memory device is improved.

Claim (Index 6):
The method according to  claim 1 , further comprising, after backing up the data stored in the memory cells coupled to the target word line in the second memory area, invalidating the data stored in the memory cells coupled to the target word line.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 86.0
- Lexical Diversity: 2.5
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15693778', '14743311', '15648639', '15818896', '15148123']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8022372982729461
- 35 USC 102 Novelty (BERT): 0.4960903391837203
- Combined Prediction Score: 0.7716226023640235
- Mean Citation Score: 238.713164
- Max Citation Score: 243.93309
- Similarity Product: 158.66884974977552

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test