PATENT CLAIM ANALYSIS

Application Number: 15756958
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["257", "072000"]

Abstract:
Embodiments of the present disclosure provide an array substrate, a method for manufacturing an array substrate and a display device. The array substrate includes a base substrate and a transistor disposed on the base substrate, and the transistor includes a gate electrode and an active layer. A light absorbing layer is formed on a side of the gate electrode facing the active layer, and the light absorbing layer is configured to absorb light irradiated thereto.

Claim (Index 13):
The method according to  claim 12 , wherein processing the surface material of the surface of the gate electrode facing the active layer to form the light absorbing layer comprises:\n when forming the pattern of the gate electrode, continuing to, after photoresist on the pattern of the gate electrode has been ashed off, implement an ashing process to the pattern of the gate electrode so as to form the light absorbing layer on the surface of the pattern of the gate electrode facing the active layer.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 90.0
- Lexical Diversity: 2.025
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13985196', '14764307', '14538739', '15754120', '12410839']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9161831786616494
- 35 USC 102 Novelty (BERT): 0.4776343293641244
- Combined Prediction Score: 0.872328293731897
- Mean Citation Score: 172.289856
- Max Citation Score: 177.77200000000005
- Similarity Product: 137.44619610214238

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test