PATENT CLAIM ANALYSIS

Application Number: 16002100
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "043000"]

Abstract:
According to one embodiment, A semiconductor device includes: a first semiconductor layer; and a plurality of first transistors including a plurality of first gate structures provided on the first semiconductor layer, a first channel region provided in the first semiconductor layer and under the first gate structure, and a plurality of first diffusion regions provided in the first semiconductor layer in a manner to sandwich the first channel region.

Claim (Index 12):
The manufacturing method of a semiconductor device of  claim 9 , wherein the second semiconductor layer is silicon (Si), polysilicon (poly-Si), amorphous silicon (a-Si), germanium (Ge), polygermanium (poly-Ge), amorphous germanium (a-Ge), germanium tin (GeSn), polygermanium tin (poly-GeSn), amorphous germanium tin (a-GeSn), or a compound thereof.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 94.0
- Lexical Diversity: 2.20588
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14220643', '12886225', '10943250', '13795904', '16060058']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9164341061988974
- 35 USC 102 Novelty (BERT): 0.4853856642090847
- Combined Prediction Score: 0.8733292619999162
- Mean Citation Score: 160.55078799999995
- Max Citation Score: 170.31761
- Similarity Product: 115.86226786433876

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test