PATENT CLAIM ANALYSIS

Application Number: 16154304
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["327", "434000"]

Abstract:
A RF switch circuit includes a voltage divider circuit and a semiconductor device. The semiconductor device has an activated state and a deactivated state. The voltage divider circuit has an input terminal connected to a first line and an output terminal connected to a second line. The first line is connected to a power source. A gate terminal of the semiconductor device is connected to the second line. In the activated state, a source terminal and a drain terminal of the semiconductor device are each selectively connected to ground. In the deactivated state, the source terminal and the drain terminal of the semiconductor device are each selectively connected to the power source.

Claim (Index 6):
The method of  claim 5 , wherein, when the triple-well NMOS transistor is in a deactivated state, a source terminal and a drain terminal of the triple-well NMOS transistor are each selectively connected to a power source, the power source being connected to the voltage divider circuit over the first line.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 97.0
- Lexical Diversity: 3.10256
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14808898', '15661774', '13273529', '12442519', '14272747']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7823414031972313
- 35 USC 102 Novelty (BERT): 0.5358551093576795
- Combined Prediction Score: 0.7576927738132762
- Mean Citation Score: 268.146864
- Max Citation Score: 387.94855
- Similarity Product: 268.7744032979697

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test