PATENT CLAIM ANALYSIS

Application Number: 15928516
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-08
Patent Classification: ["257", "336000"]

Abstract:
A semiconductor device includes first source/drain regions disposed at both sides of a first gate structure and including dopants of a first conductivity type, counter regions being in contact with upper portions of the first source/drain regions and under both end portions of the first gate structure, and first halo regions in contact with bottom surfaces of the first source/drain regions. The counter regions include dopants of a second conductivity type that is different from the first conductivity type. The first halo regions include dopants of the second conductivity type.

Claim (Index 9):
A method of fabricating a semiconductor device, the method comprising:\n forming a device isolation pattern on a substrate, the device isolation pattern defining a first active pattern of a first region of the substrate and a second active pattern of a second region of the substrate; forming a first preliminary N-type gate structure and a first preliminary P-type gate structure intersecting the first active pattern and the device isolation pattern on the first region; forming a second preliminary N-type gate structure and a second preliminary P-type gate structure intersecting the second active pattern and the device isolation pattern on the second region; injecting P-type dopants into the first active pattern and the second active pattern to form first counter regions in the first active pattern at both sides of the first preliminary N-type gate structure and to form first LDD regions in the second active pattern at both sides of the second preliminary P-type gate structure; and etching the first active pattern at both sides of the first preliminary N-type gate structure, the first active pattern at both sides of the first preliminary P-type gate structure, the second active pattern at both sides of the second preliminary N-type gate structure, and the second active pattern at both sides of the second preliminary P-type gate structure to form first recess regions in the first region and second recess regions in the second region.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 90.0
- Lexical Diversity: 2.2619
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15385060', '10750318', '10934378', '15442871', '10761613']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.917585805875638
- 35 USC 102 Novelty (BERT): 0.5187254498372516
- Combined Prediction Score: 0.8776997702717995
- Mean Citation Score: 249.002678
- Max Citation Score: 331.85925
- Similarity Product: 275.35645489521323

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test