PATENT CLAIM ANALYSIS

Application Number: 16231764
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["257", "384000"]

Abstract:
A semiconductor device includes semiconductor fins on semiconductor strips on a substrate. The semiconductor fins are parallel to each other. A gate stack is over the semiconductor fins, and a drain epitaxy semiconductor region is disposed laterally from a side of the gate stack and on the semiconductor strips. A first dielectric layer is over the substrate, and the first dielectric layer has a first metal layer. A second dielectric layer is over the first dielectric layer, and the second dielectric layer has a second metal layer. Vias extend from the second metal layer and through the first dielectric layer, and the vias are electrically coupled to the drain epitaxy semiconductor region.

Claim (Index 2):
The semiconductor device of  claim 1 , wherein the upper surface of the common drain region has a first height proximate the first gate stack and has a second height midway between the first gate stack and the second gate stack, wherein the first height is larger than the second height.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 98.0
- Lexical Diversity: 2.83721
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14555423', '15894327', '13415552', '15212579', '14310934']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9281991319551064
- 35 USC 102 Novelty (BERT): 0.4924989647613378
- Combined Prediction Score: 0.8846291152357296
- Mean Citation Score: 239.35420800000003
- Max Citation Score: 263.4674
- Similarity Product: 227.84433992986683

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test