PATENT CLAIM ANALYSIS

Application Number: 16002077
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-06
Patent Classification: ["257", "066000"]

Abstract:
An array substrate is disclosed, including a thin film transistor including a substrate, a first gate, a first insulating layer, an active layer, a source, a drain, a second and a third insulating layers, and a second gate. The first gate is disposed on the substrate, the first insulating layer is disposed on the first gate and the substrate, and the active layer is disposed on the first insulating layer, the source and the drain disposed on the active layer form a channel with the active layer, the second insulating layer, the third insulating layer, and the second gate are sequentially disposed in the channel region, a distance between an edge of the second insulating layer and the source and the drain is greater than a distance between an edge of the third insulating layer and the source and the drain.

Claim (Index 2):
The array substrate according to  claim 1 , wherein a material of the active layer and the second gate, the source, and the drain is the same or different.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 94.0
- Lexical Diversity: 3.85366
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15073278', '14731081', '10615840', '15865433', '15129735']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9093817164565108
- 35 USC 102 Novelty (BERT): 0.4916563401314396
- Combined Prediction Score: 0.8676091788240036
- Mean Citation Score: 204.327232
- Max Citation Score: 206.37718
- Similarity Product: 155.3371697949743

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test