PATENT CLAIM ANALYSIS

Application Number: 15896696
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["438", "694000"]

Abstract:
Methods of forming integrated circuits are provided herein. In an embodiment, a method of forming an integrated circuit includes providing a semiconductor substrate. The semiconductor substrate includes a plurality of gate structures that have sidewalls spacers disposed adjacent to the gate structures. A gap is defined between sidewall spacers of adjacent gate structures. The method proceeds with decreasing an aspect ratio between a width of the gap at an opening thereto and a depth of the gap, wherein an aspect ratio between a width of the gap at a base of the sidewall spacers and the depth of the gap remains substantially unchanged after decreasing the aspect ratio between the width of the gap at the opening thereto.

Claim (Index 4):
The method of  claim 3 , wherein increasing the pitch comprises selectively etching the sidewall spacers at the top portion thereof.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 88.0
- Lexical Diversity: 2.27273
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14014906', '14080558', '13753269', '14567544', '13231750']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8533096367609101
- 35 USC 102 Novelty (BERT): 0.5083612182594567
- Combined Prediction Score: 0.8188147949107648
- Mean Citation Score: 230.575664
- Max Citation Score: 241.93727
- Similarity Product: 168.74745090384187

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test