PATENT CLAIM ANALYSIS

Application Number: 15959319
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["438", "283000"]

Abstract:
A method of fabricating a semiconductor device includes forming first and second active patterns on first and second regions, respectively, of a substrate, forming first and second gate structures on the first and second active patterns, respectively, forming a coating layer to cover the first and second gate structures and the first and second active patterns, and forming a first recess region in the first active pattern between the first gate structures and a second recess region in the second active pattern between the second gate structures.

Claim (Index 6):
A semiconductor device, comprising:\n an active pattern on a substrate; a gate electrode provided to cross the active pattern; gate spacers provided on side surfaces of the gate electrode; and source/drain regions provided on the active pattern at both sides of the gate electrode, wherein the gate spacer comprises: a first portion in contact with the side surfaces of the gate electrode; and a second portion protruding from a lower portion of the first portion in a direction parallel to the active pattern.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 91.0
- Lexical Diversity: 2.9375
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15260952', '15245549', '14861748', '14989485', '14673519']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8654213549647011
- 35 USC 102 Novelty (BERT): 0.5039839964914241
- Combined Prediction Score: 0.8292776191173734
- Mean Citation Score: 254.42122200000003
- Max Citation Score: 298.47305
- Similarity Product: 260.8312742225111

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test