PATENT CLAIM ANALYSIS

Application Number: 16277549
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-08
Patent Classification: ["341", "143000"]

Abstract:
An offset compensation circuit comprises an error signal generation block arranged for receiving an input phase and an output phase, and for generating an error signal indicative of an error between the input phase and the output phase. Means are provided for combining the error signal with an offset compensation signal, yielding an offset compensated signal. A loop filter is arranged for receiving the offset compensated signal and for outputting the output phase. An offset compensation block is arranged for receiving the output phase and for determining the offset compensation signal. The offset compensation signal comprises at least a contribution proportional to a periodic function of the output phase.

Claim (Index 10):
The offset compensation circuit as in  claim 1 , wherein said loop filter comprises an analog-to-digital converter.

Metadata:
- Claim Count in Document: 37.0
- Percentile: 99.0
- Lexical Diversity: 2.52174
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10640034', '12585220', '11481895', '12036087', '11326001']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5892499655402068
- 35 USC 102 Novelty (BERT): 0.4868579177368064
- Combined Prediction Score: 0.5790107607598668
- Mean Citation Score: 166.94085800000005
- Max Citation Score: 175.94313
- Similarity Product: 126.1817218290782

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test