PATENT CLAIM ANALYSIS

Application Number: 15964250
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["710", "022000"]

Abstract:
A memory access control device includes: a memory configured to hold data from a host device; and a processor coupled to the memory, the processor: detects an overlapping portion of addresses of data transfer sources of a plurality of memory access requests; merges, in a case where the overlapping portion is detected, read accesses to the data transfer sources for the overlapping portion of the plurality of memory access requests collectively to generate a merged memory access request; executes a data transfer in accordance with the merged memory access request; and instructs writing of data transferred in the data transfer to a plurality of addresses of data transfer destinations of the plurality of memory access requests.

Claim (Index 2):
The memory access control device according to  claim 1 , wherein\n the processor refers to table information indicating correspondence between the addresses of the data transfer destinations and the addresses of the data transfer sources of the merged memory access request and instructs the writing of data transferred in the data transfer.

Metadata:
- Claim Count in Document: 22.0
- Percentile: 91.0
- Lexical Diversity: 2.47059
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11140732', '09932381', '11088344', '10324310', '11079136']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6806926751478937
- 35 USC 102 Novelty (BERT): 0.4695982797842968
- Combined Prediction Score: 0.659583235611534
- Mean Citation Score: 153.410178
- Max Citation Score: 155.58921999999995
- Similarity Product: 112.72862810915709

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test