PATENT CLAIM ANALYSIS

Application Number: 16048777
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "773000"]

Abstract:
An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. A multi-layer dielectric film is formed along sidewalls and a bottom of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits. A dielectric liner is formed, and the opening is filled with a conductive material to form a conductive plug.

Claim (Index 9):
An apparatus comprising:\n a bonded structure comprising a first semiconductor chip and a second semiconductor chip, the first semiconductor chip comprising a first substrate, one or more first dielectric layers on the first substrate and a first conductive interconnect in the one or more first dielectric layers, the second semiconductor chip comprising a second substrate, one or more second dielectric layers on the second substrate and a second conductive interconnect in the one or more second dielectric layers, the first dielectric layers and the second dielectric layers being interposed between the first substrate and the second substrate; a conductive plug electrically connecting the first semiconductor chip to the second semiconductor chip, the conductive plug comprising:\n a first portion extending from a first surface of the first substrate toward a second surface of the first substrate, the first portion having a first width; \n a second portion extending from the second surface of the first substrate to the first conductive interconnect, the second portion having a second width less than the first width; and \n a third portion extending from the first conductive interconnect to the second conductive interconnect, the third portion having a third width less than the second width; \n a first liner extending along a sidewall and a bottom surface of the first portion of the conductive plug, a topmost surface of the first liner being level with a topmost surface of the conductive plug; and a second liner comprising a first portion and a second portion, the first portion of the second liner being interposed between the first liner and the first substrate, the second portion of the second liner extending along the first surface of the first substrate, a topmost surface of the second liner being level with the topmost surface of the first liner.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 95.0
- Lexical Diversity: 1.91111
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14135153', '15231419', '15944069', '14020370', '15076115']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.914787725484639
- 35 USC 102 Novelty (BERT): 0.4662620786443482
- Combined Prediction Score: 0.86993516080061
- Mean Citation Score: 190.857476
- Max Citation Score: 208.36946
- Similarity Product: 184.4119380278921

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test