PATENT CLAIM ANALYSIS

Application Number: 15870922
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-12
Patent Classification: ["257", "777000"]

Abstract:
A semiconductor device includes a first conductive pattern at an upper portion of a first insulating interlayer on a first substrate, a first plurality of conductive nanotubes (CNTs) extending vertically, a second conductive pattern at a lower portion of a second insulating interlayer beneath a second substrate, and a second plurality of CNTs extending vertically. A lower surface of the second insulating interlayer contacts an upper surface of the first insulating interlayer. At least a portion of a sidewall of each of the first plurality of CNTs is covered by the first conductive pattern, and at least a portion of a sidewall of each of the second plurality of CNTs is covered by the second conductive pattern. The first and second conductive patterns vertically face each other, and at least one of the first plurality of CNTs and at least one of the second plurality of CNTs contact each other.

Claim (Index 19):
The semiconductor device of  claim 18 , wherein an upper sidewall of the at least one of the first plurality of CNTs and a lower sidewall of the at least one of the second plurality of CNTs contact each other.

Metadata:
- Claim Count in Document: 22.0
- Percentile: 86.0
- Lexical Diversity: 3.5
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14937406', '15001568', '13104377', '14956382', '13865580']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.929067496921786
- 35 USC 102 Novelty (BERT): 0.4949323991596437
- Combined Prediction Score: 0.8856539871455718
- Mean Citation Score: 245.882904
- Max Citation Score: 252.51875
- Similarity Product: 199.5094749037177

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test