PATENT CLAIM ANALYSIS

Application Number: 15915582
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-11
Patent Classification: ["345", "211000"]

Abstract:
A voltage generator configured to generate a plurality of voltage groups, each of the plurality of voltage groups including a plurality of reference voltages, and a decoder having an output node configured to output one of the plurality of reference voltages is disclosed. The decoder includes switch blocks that correspond to the plurality of voltage groups. Each of the switch blocks includes transistors that are turned on or off by or in response to a control signal, and each transistor in one of the switch blocks has a channel width different from a channel width of each transistor in another one of the switch blocks.

Claim (Index 18):
The digital-to-analog converter according to  claim 17 , wherein the channel width of one of the (m\u22121)-th connection transistors has a value between the channel widths of two (m\u22122)-th connection transistors directly connected to an (m\u22121)-th connection node to which the one (m\u22121)-th connection transistor is connected.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 90.0
- Lexical Diversity: 2.17647
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14503300', '11633518', '11408045', '14801354', '14665896']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6303361030204003
- 35 USC 102 Novelty (BERT): 0.4931129006770228
- Combined Prediction Score: 0.6166137827860626
- Mean Citation Score: 206.191834
- Max Citation Score: 232.76813
- Similarity Product: 188.1033631573368

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test