PATENT CLAIM ANALYSIS

Application Number: 15980833
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-01
Patent Classification: ["438", "197000"]

Abstract:
A substrate structure having a set of nanosheet layers and a set of sacrificial layers stacked upon a substrate is received and a dummy gate is formed upon the nanosheet layers and the sacrificial layers. A portion of a subset of the set of sacrificial layers and a subset of the set of nanosheet layers is etched. A portion of a subset of the subset of sacrificial layers is etched to create divots within the sacrificial layers. A divot fill layer is deposited. The divot fill layer is etched to form an inner spacer between the nanosheet layers. A source/drain region is formed adjacent to the nanosheet layers and the divots. A remaining portion of the subset of the sacrificial layers is removed. The subset of the nanosheet layers is etched to a desired channel thickness producing faceted surfaces between the subset of nanosheet layers and the inner spacer.

Claim (Index 16):
A computer system comprising one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions comprising:\n program instructions to receive a substrate structure having a set of nanosheet layers and a set of sacrificial layers stacked upon a substrate; program instructions to form a dummy gate upon the stacked set of nanosheet layers and the set of sacrificial layers; program instructions to etch a portion of a subset of the set of sacrificial layers and a subset of the set of nanosheet layers; program instructions to etch a portion of a subset of the subset of sacrificial layers to create divots within the subset of the subset of sacrificial layers; program instructions to deposit a divot fill layer upon the subset of the set of sacrificial layers and the subset of the set of nanosheet layers to fill the divots; program instructions to etch the divot fill layer to form an inner spacer between the subset of the set of nanosheet layers; program instructions to form a source/drain (S/D) region adjacent to the subset of nanosheet layers and the divots; program instructions to remove a remaining portion of the subset of the set of sacrificial layers; and program instructions to etch the subset of the set of nanosheet layers to a desired channel thickness, thereby producing faceted surfaces between the subset of the set of nanosheet layers and the inner spacer.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 93.0
- Lexical Diversity: 3.27083
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15659400', '15942971', '15880757', '15967524', '15868003']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8773670406058085
- 35 USC 102 Novelty (BERT): 0.552588666025329
- Combined Prediction Score: 0.8448892031477605
- Mean Citation Score: 334.13516
- Max Citation Score: 447.64136
- Similarity Product: 308.0582978675556

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test