PATENT CLAIM ANALYSIS

Application Number: 15780601
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-01
Patent Classification: ["330", "253000"]

Abstract:
An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second differential stage and the second complementary differential stage are symmetrically connected to form respective first, second, third and fourth current paths. A pair of output terminals is coupled to the first and the fourth current path. Gate terminals of the transistors are coupled to a respective pair of input terminals.

Claim (Index 1):
An amplifier arrangement comprising\n a first differential stage comprising a first and a second transistor; a second differential stage comprising a first, a second, a third and a fourth transistor, said first and second transistor having a common source connection coupled to a drain terminal of the first transistor of the first differential stage, and said third and fourth transistor having a common source connection coupled to a drain terminal of the second transistor of the first differential stage; a first complementary differential stage comprising a first and a second complementary transistor having opposite conductivity type compared to the transistors of the first differential stage; a second complementary differential stage comprising a first, a second, a third and a fourth complementary transistor having opposite conductivity type compared to the transistors of the second differential stage, said first and second transistor having a common source connection coupled to a drain terminal of the first transistor of the first complementary differential stage, and said third and fourth transistor having a common source connection coupled to a drain terminal of the second transistor of the first complementary differential stage; a first, a second, a third and a fourth pair of distinct input terminals; and a pair of output terminals; wherein\n the complementary transistors of the second complementary differential stage are symmetrically connected to the transistors of the second differential stage such that respective first, second, third and fourth current paths are formed; \n the pair of output terminals is coupled to the first and the fourth current path; \n gate terminals of the transistors of the first differential stage are coupled to the first pair of input terminals; \n gate terminals of the transistors of the second differential stage) are coupled to the second pair of input terminals; \n gate terminals of the complementary transistors of the first complementary differential stage are coupled to the third pair of input terminals; and \n gate terminals of the complementary transistors of the second complementary differential stage are coupled to the fourth pair of input terminals.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 3.22917
- Patent Class: 330.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15100278', '11002616', '13661883', '11339716', '14837364']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8042878478055335
- 35 USC 102 Novelty (BERT): 0.4917260909822997
- Combined Prediction Score: 0.7730316721232101
- Mean Citation Score: 239.920512
- Max Citation Score: 246.97672000000003
- Similarity Product: 199.7421950083828

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test