PATENT CLAIM ANALYSIS

Application Number: 16236882
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["257", "432000"]

Abstract:
A semiconductor device includes a chip stack structure including a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first semiconductor chip includes a first substrate, a first circuit layer on a front surface of the first substrate, and a first connecting layer disposed on the first circuit layer and including a first metal pad electrically connected to the first circuit layer. The second semiconductor chip includes a second substrate, a second circuit layer on a front surface of the second substrate, and a second connecting layer disposed on the second circuit layer and including a second metal pad electrically connected to the second circuit layer. The first connecting layer faces the second connecting layer. The first and second metal pads are in contact with each other to couple the first and second semiconductor chips to each other.

Claim (Index 1):
A semiconductor device comprising:\n a chip stack structure comprising a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip, wherein the first semiconductor chip comprises: a first substrate; a first circuit layer on a front surface of the first substrate; and a first connecting layer on the first circuit layer, the first connecting layer comprising a first metal pad electrically connected to the first circuit layer, wherein the second semiconductor chip comprises: a second substrate; a second circuit layer on a front surface of the second substrate; and a second connecting layer on the second circuit layer, the second connecting layer comprising a second metal pad electrically connected to the second circuit layer, wherein the first connecting layer and the second connecting layer face each other, wherein the first metal pad and the second metal pad are in contact with each other to couple the first and second semiconductor chips to each other, wherein the first metal pad comprises a plurality of first metal pad portions separated from each other by first partitions, and wherein the second metal pad comprises a plurality of second metal pad portions separated from each other by second partitions.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 98.0
- Lexical Diversity: 3.73171
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15358579', '15273029', '14955124', '16001461', '15583224']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9030710465031088
- 35 USC 102 Novelty (BERT): 0.5159765652954964
- Combined Prediction Score: 0.8643615983823476
- Mean Citation Score: 247.923164
- Max Citation Score: 321.0441
- Similarity Product: 313.062706195128

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test