PATENT CLAIM ANALYSIS

Application Number: 16174631
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["711", "103000"]

Abstract:
The present disclosure includes apparatuses, systems, and methods related to multiple address registers for a solid state device (SSD). An example apparatus includes a controller including a plurality of base address registers (BARs) each including same addresses for data storage in a same memory resource and an SSD that includes the same memory resource.

Claim (Index 11):
The method of  claim 9 , wherein the method further comprises:\n enabling, by a device driver, Write Protected as the first cache attribute assigned for the requested read operation for use with the first BAR that includes the mapped addresses; and enabling, by the device driver, Write Combining as the second cache attribute assigned for the requested write operation for use with the second BAR that includes the mapped addresses.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 1.44186
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15047000', '15296188', '14102061', '15592528', '15642425']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5083466438365717
- 35 USC 102 Novelty (BERT): 0.496088062353735
- Combined Prediction Score: 0.507120785688288
- Mean Citation Score: 149.45051500000002
- Max Citation Score: 261.7355
- Similarity Product: 211.58162071162465

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test