PATENT CLAIM ANALYSIS

Application Number: 15947222
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["341", "154000"]

Abstract:
Embodiments of the disclosure can provide digital-to-analog converter (DAC) termination circuits. A single or multiple parallel impedance networks can be coupled to a DAC to reduce the DAC's AC impedance, increase the DAC speed, and reduce the DAC settling time. The parallel impedance networks can be coupled to one or more of the DAC terminals in termination specific cases, or to nodes within the DAC. In an example, one-sided T-termination can be used with a single termination impedance path coupled in parallel with the DAC terminals, for reducing AC impedance at the DAC reference terminals, increasing speed, and reducing settling time. In an example, multiple impedance networks can be used in an H-bridge termination solution, which can be useful for high resolution DACs with or within a high voltage range.

Claim (Index 18):
A method for reducing alternating current (AC) impedance of a digital-to-analog converter (DAC) circuit, the method comprising:\n configuring via switching circuitry, an impedance string to receive a first voltage reference signal of a pair of voltage reference signals via a first termination impedance element of a termination impedance path, to reduce a first AC termination impedance of the impedance string; configuring via the switching circuitry, the impedance string to receive, a second voltage reference signal of the pair of voltage reference signals while coupled in shunt with a second termination impedance element of the termination impedance path, to reduce a second AC termination impedance of the impedance string during a shunt AC operation mode; generating a plurality of voltage reference signals in response to applying the first voltage reference signal and the second voltage reference signal; receiving a digital signal comprising digital data; and in response to the digital signal, selectively coupling one or more of the plurality of generated voltage signals to generate a combined analog voltage DAC output signal providing an analog representation of the digital signal.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 91.0
- Lexical Diversity: 2.26154
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15586848', '13791536', '14214341', '10641658', '15668088']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5943044024392985
- 35 USC 102 Novelty (BERT): 0.498351584242009
- Combined Prediction Score: 0.5847091206195696
- Mean Citation Score: 232.25793400000003
- Max Citation Score: 243.58247000000003
- Similarity Product: 185.4943086739821

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test