PATENT CLAIM ANALYSIS

Application Number: 16215870
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["257", "192000"]

Abstract:
A cascode switch structure includes a group III-V transistor structure having a first current carrying electrode, a second current carrying electrode and a first control electrode. A semiconductor MOSFET device includes a third current carrying electrode electrically connected to the first current carrying electrode, a fourth current carrying electrode electrically connected to the first control electrode, and a second control electrode. A first diode includes a first cathode electrode electrically connected to the second current carrying electrode and a first anode electrode. A second diode includes a second anode electrode electrically connected to the first anode electrode and a second cathode electrode electrically connected to the fourth current carrying electrode. In one embodiment, the group III-V transistor structure, the first diode, and the second diode are integrated within a common substrate.

Claim (Index 5):
The cascode switch structure of  claim 1 , wherein:\n the group III-V transistor structure, the first diode, and the second diode comprise an integrated structure comprising:\n a semiconductor substrate having a first major surface and an opposing second major surface; \n a heterostructure adjacent the first major surface, the heterostructure comprising:\n a channel layer; and \n a barrier layer over the channel layer; \n \n the first current carrying electrode disposed proximate to a first portion of the channel layer; \n the second current carrying electrode disposed proximate to a second portion of the channel layer and spaced apart from the first current carrying electrode, wherein the second current carrying electrode is electrically decoupled from the semiconductor substrate; \n the first control electrode disposed between the first current carrying electrode and the second current carrying electrode and configured to control a first current path between the first current carrying electrode and the second current carrying electrode; \n a conductive electrode disposed on the second major surface of the semiconductor substrate; \n a first trench electrode extending through the heterostructure into the semiconductor substrate, wherein the first trench electrode is electrically coupled to the second current carrying electrode; \n a first doped region of a first conductivity type disposed in the semiconductor substrate adjacent the first trench electrode; \n a second doped region of a second conductivity type opposite to the first conductivity type disposed in the semiconductor substrate between the second major surface and the first doped region; \n a first semiconductor region disposed between the first doped region and the second doped region; and \n a third doped region of the first conductivity type disposed between the second major surface and the second doped region; \n the first diode includes the first doped region, the first semiconductor region and the second doped region; and the second diode includes the second doped region and the third doped region.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 98.0
- Lexical Diversity: 3.64103
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15648211', '14853720', '15648264', '14989370', '14853729']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9113536018873108
- 35 USC 102 Novelty (BERT): 0.55883536947082
- Combined Prediction Score: 0.8761017786456617
- Mean Citation Score: 318.612908
- Max Citation Score: 421.7774
- Similarity Product: 358.757548096931

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test