PATENT CLAIM ANALYSIS

Application Number: 15889269
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-05
Patent Classification: ["711", "006000"]

Abstract:
An approach to virtualizing a coherent memory hardware accelerator is provided comprising creating a segment table for a client logical partition (LPAR), wherein a virtual address space is reserved in the segment table, receiving an Input/Output (I/O) request to use the coherent memory hardware accelerator, generating an I/O operation associated with the I/O request, wherein the I/O operation is passed to the coherent memory hardware accelerator, receiving a map request from the coherent memory hardware accelerator, creating an entry in the reserved virtual address space in the segment table, creating a hardware page table map request for mapping a memory address associated with the client LPAR and returning the reserved virtual address space to the coherent memory hardware accelerator, wherein the coherent memory hardware accelerator has remote direct memory access to memory associated with the client LPAR for performing an acceleration of one or more processes.

Claim (Index 1):
A method for virtualizing a coherent memory hardware accelerator, the method comprising:\n creating, by an accelerator virtualizer, a segment table for a client logical partition (LPAR), wherein a virtual address space is reserved in the segment table; receiving, by the accelerator virtualizer, an Input/Output (I/O) request to use the coherent memory hardware accelerator,\n wherein the I/O request originates from the client LPAR and is associated with I/O buffer pages in client LPAR memory, \n wherein the I/O request comprises a handle to a virtual address range associated with a translation control entry and a size of the I/O buffer pages, and \n wherein the translation control entry is populated with a physical memory address corresponding to the I/O buffer pages; \n generating, by the accelerator virtualizer, an I/O operation associated with the I/O request, wherein the I/O operation is passed to the coherent memory hardware accelerator, and wherein the I/O operation comprises the handle and a flag associating the I/O operation with the client LPAR; receiving, by the accelerator virtualizer, a map request from the coherent memory hardware accelerator; creating, by the accelerator virtualizer, an entry in the reserved virtual address space in the segment table, wherein the entry in the reserved virtual address space is populated with the virtual address range associated with the translation control entry and the size of the I/O buffer pages; creating, by the accelerator virtualizer, a hardware page table map request for mapping a memory address associated with the client LPAR, wherein the hardware page table map request is passed to a hypervisor and requests the hypervisor to map the virtual address range to the physical memory address of the I/O buffer pages in a hardware page table; and returning, by the accelerator virtualizer, the reserved virtual address space to the coherent memory hardware accelerator, wherein the coherent memory hardware accelerator has remote direct memory access to memory associated with the client LPAR for performing an acceleration of one or more processes.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 88.0
- Lexical Diversity: 2.65
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15262058', '14836516', '14987537', '14987074', '15846119']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4548657104060244
- 35 USC 102 Novelty (BERT): 0.5481283083437978
- Combined Prediction Score: 0.4641919701998018
- Mean Citation Score: 225.837956
- Max Citation Score: 394.89697
- Similarity Product: 341.2152818299884

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test