PATENT CLAIM ANALYSIS

Application Number: 15910117
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-04
Patent Classification: ["345", "055000"]

Abstract:
The present disclosure provides a gate driving circuit and a display apparatus. The gate driving circuit comprises a plurality of cascaded shift registers, wherein the shift registers each comprise an input sub-circuit, an output sub-circuit, an output de-noising sub-circuit, a capacitor sub-circuit and a reset sub-circuit, wherein the output de-noising sub-circuit is electrically connected to a first reference voltage signal terminal, a second reference voltage signal terminal and an output signal terminal, and for each stage of shift register except for a first stage of shift register, the second reference voltage signal terminal is electrically connected to an input signal terminal of a stage of shift register immediately prior to the current stage of shift register.

Claim (Index 19):
A display apparatus, comprising the gate driving circuit according to  claim 2 .

Metadata:
- Claim Count in Document: 48.0
- Percentile: 90.0
- Lexical Diversity: 2.68085
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15743617', '15508921', '15827553', '15761749', '15652474']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6690301650855944
- 35 USC 102 Novelty (BERT): 0.5024177276300072
- Combined Prediction Score: 0.6523689213400357
- Mean Citation Score: 259.89851200000004
- Max Citation Score: 272.6986
- Similarity Product: 201.55356140547988

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test