PATENT CLAIM ANALYSIS

Application Number: 15989609
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-05
Patent Classification: ["365", "063000"]

Abstract:
A semiconductor memory apparatus includes first and second byte pads. A left-side peri-line couples the first byte pad and a first memory bank region and a right-side peri-line couples the second byte pad and a second memory bank region. A peri-repeater couples the left-side peri-line and the right-side peri-line based on a peri-strobe signal. The peri-strobe signal is generated based on byte information and memory bank selection information.

Claim (Index 15):
The semiconductor memory apparatus of  claim 12 , wherein when the second even bank is selected the control circuit is configured to enable the second even bank strobe signal and disable the second odd bank strobe signal, the first even bank strobe signal, and the first odd bank strobe signal.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 93.0
- Lexical Diversity: 2.4
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12469864', '11778380', '15918536', '11701104', '14148254']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8080491594250313
- 35 USC 102 Novelty (BERT): 0.4769253744932497
- Combined Prediction Score: 0.7749367809318531
- Mean Citation Score: 191.334498
- Max Citation Score: 199.30661
- Similarity Product: 147.18724227814437

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test