PATENT CLAIM ANALYSIS

Application Number: 15958614
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["711", "155000"]

Abstract:
The present disclosure includes apparatuses and methods for counter update operations. An example apparatus comprises a memory including a managed unit that includes a plurality of first groups of memory cells and a second group of memory cells, in which respective counters associated with the managed unit are stored on the second group of memory cells. The example apparatus further includes a controller. The controller includes a core configured to route a memory operation request received from a host and a datapath coupled to the core and the memory. The datapath may be configured to issue, responsive to a receipt of the memory operation request routed from the core, a plurality of commands associated with the routed memory operation request to the memory to perform corresponding memory operations on the plurality of first groups of memory cells. The respective counters may be updated independently of the plurality of commands.

Claim (Index 8):
An apparatus, comprising:\n a system controller coupled to a host and configured to issue a plurality of commands corresponding to a memory operation request received from the host; and a memory device coupled to the system controller and including a managed unit, wherein the managed unit includes a plurality of first groups of memory cells and a second group of memory cells, wherein:\n at least one of the first groups of memory cells and the second group of memory cells comprises non-volatile memory cells; and \n respective counters and a respective logical to physical table associated with the managed unit are stored on the second group of memory cells; and \n the memory device, via a control logic, configured to:\n receive, from a system controller, the plurality of commands; \n perform, responsive to the receipt of the plurality of commands, corresponding memory operations on the managed unit; and \n perform, independently of the plurality of commands, a counter update operation on the second group of memory cells such that the respective counters stored on the second group of memory cells are updated according to the corresponding memory operations performed on the plurality of first groups of memory cells.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 91.0
- Lexical Diversity: 2.46875
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15664014', '15229301', '15689747', '15609569', '15819692']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5022443078429679
- 35 USC 102 Novelty (BERT): 0.4670669162220633
- Combined Prediction Score: 0.4987265686808775
- Mean Citation Score: 170.66711999999995
- Max Citation Score: 192.90541
- Similarity Product: 158.20420064485668

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test