PATENT CLAIM ANALYSIS

Application Number: 16110055
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "668000"]

Abstract:
A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.

Claim (Index 1):
A semiconductor package comprising:\n a flexible substrate; a plurality of traces formed on said flexible substrate, each trace comprising:\n a copper layer on said flexible substrate; \n a nickel-phosphorus layer on top and side surfaces of said copper layer; \n a palladium layer on said nickel-phosphorus layer; and \n a gold layer on said palladium layer; and \n at least one die mounted on said substrate wherein there is a diffusion bond between at least one of said plurality of traces and said at least one die and an underfill between said at least one die and said substrate.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 96.0
- Lexical Diversity: 1.31481
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15286849', '15887346', '13741810', '12562950', '13047991']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8988923332883739
- 35 USC 102 Novelty (BERT): 0.5256816737078377
- Combined Prediction Score: 0.8615712673303203
- Mean Citation Score: 232.141442
- Max Citation Score: 337.56677
- Similarity Product: 311.1890743897802

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test