PATENT CLAIM ANALYSIS

Application Number: 15982964
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["714", "770000"]

Abstract:
A method for memory page erasure reconstruction in a storage array includes dividing data into multiple stripes for storage in a storage array including multiple storage devices with a topology of a hypercube of a dimension t≥3. The storage devices in same hypercubes of dimension t−1 including the hypercube of dimension t have even parity. An intersection of two non-parallel planes in the hypercube topology is a line, and each point along a line is a storage device in the storage array. A reconstructor processor reconstructs erased data for erased memory pages from non-erased data in the storage array by using parities in at least three dimensions based on the hypercube topology of the storage devices.

Claim (Index 2):
The method of  claim 1 , further comprising:\n generating erasure-correcting properties for the data using three nested codes, wherein a first nested code has even parity over planes of class 0, 1 and 2, a second nested code has a first global parity, and a third nested code has a second global parity and a third global parity.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 93.0
- Lexical Diversity: 1.89062
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14968713', '15967350', '15019633', '13563123', '14722356']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2791937031445403
- 35 USC 102 Novelty (BERT): 0.5214983663651298
- Combined Prediction Score: 0.3034241694665992
- Mean Citation Score: 217.68642000000003
- Max Citation Score: 334.47412
- Similarity Product: 257.85523359284883

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test