PATENT CLAIM ANALYSIS

Application Number: 15900516
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-09
Patent Classification: ["365", "185200"]

Abstract:
A storage device includes a data memory unit and a status memory unit. The data memory unit includes a pair of flash memory cells to be read by a complementary read mode, and 1-bit data is stored therein by the pair of flash memory cells. The status memory unit includes a flash memory cell to be read by a reference read mode, and a status flag is stored therein by the flash memory cell.

Claim (Index 3):
The storage device according to  claim 2 , wherein the determination circuit pre-charges a first signal line connected to each of the plurality of flash memory cells and a second signal line connected to a current source configured to supply the reference current, discharges the first signal line and the second signal line by the sum current and the reference current, and compares the sum current with the reference current by comparing a voltage of the first signal line with a voltage of the second signal line after discharge.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 88.0
- Lexical Diversity: 2.54839
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15466326', '14910645', '11869144', '11167301', '14909970']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8150497707311519
- 35 USC 102 Novelty (BERT): 0.4912331530058189
- Combined Prediction Score: 0.7826681089586186
- Mean Citation Score: 218.869578
- Max Citation Score: 225.13586
- Similarity Product: 152.46879883687618

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test