PATENT CLAIM ANALYSIS

Application Number: 15945343
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["365", "222000"]

Abstract:
Apparatuses and methods of for refresh control of a semiconductor device are described. An example apparatus includes a command control circuit that provides a plurality of pulses on a first control signal in series responsive to a plurality of refresh commands issued in series; a signal generation circuit that produces a plurality of pulses on a second control signal in sequence; and a refresh control circuit that receives two or more of the plurality of pulses on the first control signal during a period of time between one pulse and a succeeding pulse of the plurality of pulses on the second control signal, disables refresh operations responsive to at least one of the two or more of the plurality of first control signal and executes a refresh operation responsive to remaining one or more pulses of the two or more of the plurality of pulses on the first control signal.

Claim (Index 20):
The apparatus of  claim 19 , wherein the latch circuit is configured to set the latch signal responsive to the second control signal, and\n wherein the first circuit is an AND gate configured to receive the first control signal and the latch signal.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 91.0
- Lexical Diversity: 2.7193
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15089346', '10747937', '14689994', '13716418', '10814675']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8070844312079909
- 35 USC 102 Novelty (BERT): 0.5680207013022841
- Combined Prediction Score: 0.7831780582174203
- Mean Citation Score: 332.424478
- Max Citation Score: 478.76486
- Similarity Product: 364.3779728841424

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test