PATENT CLAIM ANALYSIS

Application Number: 15937188
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "532000"]

Abstract:
A package includes a chip formed in a first area of the package and a molding compound formed in a second area of the package adjacent to the first area. A first polymer layer is formed on the chip and the molding compound, a second polymer layer is formed on the first polymer layer, and a plurality of interconnect structures is formed between the first polymer layer and the second polymer layer. A metal-insulator-metal (MIM) capacitor is formed on the second polymer layer and electrically coupled to at least one of the plurality of interconnect structures. A metal bump is formed over and electrically coupled to at least one of the plurality of interconnect structures.

Claim (Index 5):
The package according to  claim 1 , further comprising a third interconnect structure between the polymer layers and laterally spaced from the first interconnect structure, wherein the capacitor overlies the first interconnect structure, and wherein the conductive structure extends continuously from the capacitor to the third interconnect structure.

Metadata:
- Claim Count in Document: 39.0
- Percentile: 90.0
- Lexical Diversity: 3.075
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13536877', '14990976', '13764197', '15600224', '13267200']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9066136723654358
- 35 USC 102 Novelty (BERT): 0.5139271921093519
- Combined Prediction Score: 0.8673450243398273
- Mean Citation Score: 229.293218
- Max Citation Score: 306.88614
- Similarity Product: 236.19871696846965

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test