PATENT CLAIM ANALYSIS

Application Number: 16042424
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "324000"]

Abstract:
According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N-2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.

Claim (Index 15):
The manufacturing method of a semiconductor device according to  claim 11 , wherein a non-arrangement region excluding the memory holes is arranged perpendicular to the first slit, between the first slit and the second slit, and the non-arrangement region has a width larger than the second distance.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 95.0
- Lexical Diversity: 1.75862
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15257613', '14844250', '14965159', '15267924', '15213537']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9070837457660458
- 35 USC 102 Novelty (BERT): 0.5113295920740043
- Combined Prediction Score: 0.8675083303968417
- Mean Citation Score: 205.90059
- Max Citation Score: 267.39197
- Similarity Product: 199.80071803901728

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test