PATENT CLAIM ANALYSIS

Application Number: 15913764
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["375", "375000"]

Abstract:
A circuit for performing clock recovery according to a received digital signal. The circuit includes at least an edge sampler and a data sampler for sampling the digital signal, and a clock signal supply circuit. The clock signal supply circuit provides edge clock and data clock signals offset in phase from one another to the respective clock inputs of the edge sampler and the data sampler. A digital phase detector determines if the data clock is early, late or synchronized with respect to data value transitions in the digital signal, and based on that determination provides a phase adjustment signal to the clock signal supply circuit, which is operable to vary phases of the data and edge clock signals accordingly.

Claim (Index 8):
The circuit of  claim 7 , wherein the threshold detection circuit is configured to compare a combination of the first-order component and the second-order component to a threshold.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 90.0
- Lexical Diversity: 2.16949
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15369806', '12225999', '13710404', '14321723', '14820266']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5464518822135721
- 35 USC 102 Novelty (BERT): 0.5210307039557676
- Combined Prediction Score: 0.5439097643877916
- Mean Citation Score: 293.074772
- Max Citation Score: 320.82776
- Similarity Product: 221.1326155201673

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test