PATENT CLAIM ANALYSIS

Application Number: 16131770
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["365", "185090"]

Abstract:
A booster circuit includes a charge pump circuit and a clock processing circuit. The clock processing circuit includes a first transistor of a first conductivity type, a second transistor of a second conductivity type, and a third transistor of a third conductivity type. The first and second transistors are connected in series between a high-voltage node and a low-voltage node, and gates of the first and second transistors are connected to each other. The third transistor is connected in parallel with the first transistor between the high-voltage node and an output terminal of the clock processing circuit that is connected to a node between the first transistor and the second transistor and to the charge pump circuit.

Claim (Index 19):
The semiconductor device according to  claim 11 , wherein the first conductivity type is P type, and the second conductivity type is N type.

Metadata:
- Claim Count in Document: 53.0
- Percentile: 97.0
- Lexical Diversity: 3.02439
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15412221', '15804355', '12776586', '11642965', '11627646']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8120988169488834
- 35 USC 102 Novelty (BERT): 0.5117372707466373
- Combined Prediction Score: 0.7820626623286588
- Mean Citation Score: 247.864478
- Max Citation Score: 321.46695
- Similarity Product: 248.8459774471521

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test