PATENT CLAIM ANALYSIS

Application Number: 15943147
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "409000"]

Abstract:
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided on the first semiconductor region, a third semiconductor region of the first conductivity type provided on the second semiconductor region, a first insulating part provided in the first semiconductor region, a first electrode provided in the first semiconductor region, the first insulating part disposed between the first electrode and the first semiconductor region, a second insulating part provided on the first electrode, a gate electrode provided on the second insulating part, a gate insulating part provided between the gate electrode and the second semiconductor region, and a second electrode provided on the second semiconductor region and on the third semiconductor region, and is electrically connected to the second semiconductor region, the third semiconductor region, and the first electrode.

Claim (Index 9):
A method of manufacturing a semiconductor device, comprising:\n providing a first semiconductor layer having an upper surface; forming a trench in the upper surface of the first semiconductor layer; forming a first insulating layer along an inner wall of the trench; forming a first electrode on the first insulating layer; forming a second insulating layer on an upper surface of the first electrode; forming a third insulating layer along a surface of the first insulating layer and along a surface of the second insulating layer; forming a fourth insulating layer on the third insulating layer; removing at least a portion of the first insulating layer, a portion of the third insulating layer, and a portion of the fourth insulating layer to form a first projection and a second projection in an upper surface of the third insulating layer, positioned on the second insulating layer and protruding upward; and forming a gate electrode on the second insulating layer and the third insulating layer.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 91.0
- Lexical Diversity: 5.31034
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15448126', '13783331', '13712343', '10744818', '10844323']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9205152906580214
- 35 USC 102 Novelty (BERT): 0.502423776845321
- Combined Prediction Score: 0.8787061392767513
- Mean Citation Score: 230.612368
- Max Citation Score: 282.22308
- Similarity Product: 225.1936404419875

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test