PATENT CLAIM ANALYSIS

Application Number: 16004478
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["327", "115000"]

Abstract:
An object of the present invention is to reduce burden on a program for changing an operation mode of an internal circuit in accordance with an internal clock frequency without mounting a large-scale circuit in an LSI in which setting of the frequency of an internal clock can be dynamically changed. In an LSI including an internal clock generation circuit generating an internal clock from a clock source in accordance with a parameter supplied, a register storing frequency information of the clock source, a register storing the parameter, and an internal circuit having a plurality of operation modes, a table circuit controlling the operation mode of the internal circuit in association with the frequency information and the parameter supplied from the registers is provided.

Claim (Index 5):
The semiconductor integrated circuit according to  claim 2 , wherein the decode result includes a first decode value indicating a state in which setting of the first information is inhibited, and the control information stored in the storage circuit includes first control information associated in the case where the decode result is the first decode value.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 94.0
- Lexical Diversity: 2.2807
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15473813', '10867013', '11188873', '11446217', '11708346']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7942788782426516
- 35 USC 102 Novelty (BERT): 0.512615136019328
- Combined Prediction Score: 0.7661125040203193
- Mean Citation Score: 216.04705
- Max Citation Score: 326.5345
- Similarity Product: 312.2946494484544

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test