PATENT CLAIM ANALYSIS

Application Number: 16027356
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-12
Patent Classification: ["257", "296000"]

Abstract:
A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first trench and a second trench in substrate on the memory region, wherein a width of the second trench is greater than a width of the first trench; forming a first liner in the first trench and the second trench; forming a second liner on the first liner, wherein the second liner completely fills the first trench and partly fills the second trench; and planarizing the second liner and the first liner to form a first isolation structure and a second isolation structure.

Claim (Index 11):
The semiconductor device of  claim 10 , further comprising a third isolation structure and a fourth isolation structure in the substrate on the periphery region, wherein a width of the third isolation structure is greater than a width of the second isolation structure and a width of the fourth isolation structure is greater than a width of the third isolation structure.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 95.0
- Lexical Diversity: 2.71429
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12164579', '13455660', '14819508', '15830878', '11453423']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.910784645830017
- 35 USC 102 Novelty (BERT): 0.5016597568840986
- Combined Prediction Score: 0.8698721569354251
- Mean Citation Score: 189.488794
- Max Citation Score: 193.30699
- Similarity Product: 113.17462938887716

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test