PATENT CLAIM ANALYSIS

Application Number: 15964430
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-05
Patent Classification: ["438", "675000"]

Abstract:
In a method for manufacturing a semiconductor device, a substrate is provided. Various first metal layers are formed on the substrate. A dielectric structure with through holes is formed over the first metal layers. The through holes expose the first metal layers. A pre-clean operation is performed on the dielectric structure and the first metal layers by using an alcohol base vapor and/or an aldehyde base vapor as a reduction agent. Conductors are formed on the first metal layers. In forming the conductors, the through holes are filled with the conductors.

Claim (Index 10):
The method of  claim 9 , wherein forming the dielectric layers comprises:\n forming a first dielectric layer on the substrate, wherein the first dielectric layer is formed to be an etch stop layer; forming a second dielectric layer on the first dielectric layer, wherein the second dielectric layer is formed from a low dielectric constant dielectric material; and forming a third dielectric layer on the second dielectric layer, wherein the third second dielectric layer is formed to have an etch selectivity with respect to the second dielectric layer.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 2.08333
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15909838', '12249172', '14048043', '14746061', '10637406']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8242355682856339
- 35 USC 102 Novelty (BERT): 0.4796033797706925
- Combined Prediction Score: 0.7897723494341398
- Mean Citation Score: 110.9443338
- Max Citation Score: 114.21741000000002
- Similarity Product: 77.38247336935402

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test