PATENT CLAIM ANALYSIS

Application Number: 16052449
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-11
Patent Classification: ["327", "109000"]

Abstract:
A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.

Claim (Index 9):
The circuit of  claim 1 , wherein the reference node is a ground node.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 96.0
- Lexical Diversity: 2.05263
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15396964', '14848859', '15592757', '12893584', '15014320']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7403678892360253
- 35 USC 102 Novelty (BERT): 0.5380720006924536
- Combined Prediction Score: 0.720138300381668
- Mean Citation Score: 226.625884
- Max Citation Score: 366.44745
- Similarity Product: 202.9684728023708

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test