PATENT CLAIM ANALYSIS

Application Number: 15892887
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "435000"]

Abstract:
Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.

Claim (Index 4):
The solid-state imaging device according to  claim 3 , wherein the first multilayer wiring layer further comprises an electrically-conductive via between the first connecting interconnect and the first metal wiring.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 88.0
- Lexical Diversity: 2.31818
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15342081', '14867476', '14168524', '13362758', '13312261']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9460319347605186
- 35 USC 102 Novelty (BERT): 0.5535620157336482
- Combined Prediction Score: 0.9067849428578316
- Mean Citation Score: 377.406996
- Max Citation Score: 411.16245
- Similarity Product: 410.0578863594085

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test