PATENT CLAIM ANALYSIS

Application Number: 15913194
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "347000"]

Abstract:
A semiconductor device comprises an insulation layer, an active semiconductor layer formed on an upper surface of the insulation layer, and a plurality of fins formed on the insulation layer. The fins are formed in the gate and spacer regions between a first source/drain region and second source/drain region, without extending into the first and second source/drain regions.

Claim (Index 11):
The method of  claim 10 , further comprising extending the recessed gate insulation region below the insulation layer at a predetermined depth.

Metadata:
- Claim Count in Document: 25.0
- Percentile: 90.0
- Lexical Diversity: 1.85294
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13965322', '15860840', '13954453', '14953481', '14533629']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9162908598371572
- 35 USC 102 Novelty (BERT): 0.5529994423517735
- Combined Prediction Score: 0.8799617180886188
- Mean Citation Score: 271.03246
- Max Citation Score: 430.16193
- Similarity Product: 336.51398365303874

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test