PATENT CLAIM ANALYSIS

Application Number: 15941611
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-08
Patent Classification: ["257", "738000"]

Abstract:
Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.

Claim (Index 1):
A method of manufacturing a semiconductor device assembly, comprising:\n at least partially encapsulating a semiconductor device and a feature attached to the semiconductor device with a first material, wherein the feature includes a plated material;\n forming a second material that covers an outer surface of the first material; and \n contacting the second material with at least a portion of the feature.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 90.0
- Lexical Diversity: 1.91228
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13739331', '14563982', '15334069', '15229651', '15938305']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9136208387576606
- 35 USC 102 Novelty (BERT): 0.4883547502083949
- Combined Prediction Score: 0.8710942299027341
- Mean Citation Score: 206.806312
- Max Citation Score: 243.24673
- Similarity Product: 196.6150024385667

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test