PATENT CLAIM ANALYSIS

Application Number: 15985995
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-04
Patent Classification: ["330", "136000"]

Abstract:
An envelope tracking (ET) current bias circuit includes a rectifying circuit, a phase compensation circuit, and a voltage/current conversion circuit. The rectifying circuit is configured to detect an envelope voltage from a radio frequency (RF) signal. The phase compensation circuit is configured to compensate for a phase of the envelope voltage in which the phase thereof is delayed in the rectifying circuit to output a phase compensated enveloped voltage. The voltage/current conversion circuit is configured to convert the phase compensated envelope voltage into an ET bias current.

Claim (Index 5):
The envelope tracking current bias circuit of  claim 4 , wherein the phase leading circuit comprises:\n a capacitor circuit connected between an input terminal and an output terminal of the phase leading circuit; a first resistor circuit connected to the capacitor circuit in parallel; and a second resistor circuit connected between the output terminal of the phase leading circuit and a ground and having a resistance value varied responsive to the first control signal.

Metadata:
- Claim Count in Document: 28.0
- Percentile: 93.0
- Lexical Diversity: 2.20455
- Patent Class: 330.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15875463', '15810764', '15719843', '15984664', '15479323']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7808244595744972
- 35 USC 102 Novelty (BERT): 0.5144629569993712
- Combined Prediction Score: 0.7541883093169846
- Mean Citation Score: 259.578454
- Max Citation Score: 298.0253600000001
- Similarity Product: 264.0989216427661

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test