PATENT CLAIM ANALYSIS

Application Number: 15877219
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["257", "316000"]

Abstract:
A three-dimensional memory device includes semiconductor devices located on a semiconductor substrate, lower interconnect level dielectric layers embedding lower interconnect structures, an alternating stack of insulating layers and electrically conductive layers overlying the lower interconnect level dielectric layers and including stepped surfaces, memory stack structures vertically extending through the alternating stack, and contact via structures extending downward from the stepped surfaces through underlying portions of the alternating stack to the lower interconnect structures. Each of the contact via structures laterally contacts an electrically conductive layer located at the stepped surfaces, and provides electrical interconnection to an underlying semiconductor device. A top portion of each contact via structures contacts an electrically conductive layer, and is electrically isolated from other underlying electrically conductive layers.

Claim (Index 16):
The method of  claim 13 , further comprising:\n removing remaining portions of the sacrificial contact opening pillars selective to materials of the insulating layers and the sacrificial material layers after formation of the stepped surfaces to form contact via cavities; forming a continuous insulating liner layer within each of the contact via cavities and over the stepped surfaces of the alternating stack; forming insulating tubular liners within each of the contact via cavities by anisotropically etching the continuous insulating liner layer, wherein the contact via structures are formed on a sidewall of a respective one of the insulating tubular liners; depositing a continuous metallic nitride liner layer on top surfaces of the lower interconnect structures and on inner sidewalls of the insulating tubular liners; depositing a continuous metal fill layer on the continuous metallic nitride liner layer; anisotropically etching the continuous metal fill layer and the continuous metallic nitride liner layer, wherein remaining portions of the continuous metallic nitride liner layer constitute metallic nitride liners located within a respective one of the contact via cavities, and remaining portions of the continuous metal fill layer constitute metal fill portions located within a respective one of the metallic nitride liners; and forming a metallic pillar structure on top of each adjoining pair of a metallic nitride liner and a metal fill portion.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 86.0
- Lexical Diversity: 2.29825
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15489050', '15269294', '15632983', '15269041', '15638672']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9427219893283836
- 35 USC 102 Novelty (BERT): 0.5450860305007168
- Combined Prediction Score: 0.9029583934456168
- Mean Citation Score: 437.393132
- Max Citation Score: 450.66562000000016
- Similarity Product: 265.410401004746

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test