PATENT CLAIM ANALYSIS

Application Number: 16052570
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-11
Patent Classification: ["377", "075000"]

Abstract:
A shift register unit, a driving method, a gate driving circuit and a display device are described. The shift register unit comprises a control circuit, a first output circuit and a second output circuit, wherein the first output circuit is connected with a first signal terminal, a first node and an output terminal, respectively; the second output circuit is connected with the output terminal, a second node, a first clock signal terminal and a second signal terminal, respectively; the control circuit is connected with the first node, the second node, the first signal terminal, the second signal terminal, the first clock signal terminal, a second clock signal terminal and an input terminal, respectively, and used for controlling the potentials of the first node and the second node. The shift register unit provided by the disclosure solves the problems that the circuit structure of a shift register unit is complex and its control process is cumbersome, and achieves the goal of simplifying the circuit structure and control process of the shift register unit.

Claim (Index 3):
The shift register unit as claimed in  claim 2 , wherein the pull-down sub-circuit comprises a first transistor, a second transistor and a first capacitor; and\n a first terminal of the first transistor is connected with the second signal terminal, a second terminal of the first transistor is connected with the third node, and a third terminal of the first transistor is connected with the first clock signal terminal; a first terminal of the second transistor is connected with the second signal terminal, a second terminal of the second transistor is connected with the fourth node, and a third terminal of the second transistor is connected with the third node; and a first terminal of the first capacitor is connected with the third node, and a second terminal of the first capacitor is connected with the second signal terminal.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 96.0
- Lexical Diversity: 3.59259
- Patent Class: 377.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15539124', '15827553', '15300930', '16091128', '15752518']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7809404012259936
- 35 USC 102 Novelty (BERT): 0.5166820656232068
- Combined Prediction Score: 0.754514567665715
- Mean Citation Score: 344.749524
- Max Citation Score: 385.89087
- Similarity Product: 354.9454059748238

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test