PATENT CLAIM ANALYSIS

Application Number: 15912450
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["714", "747000"]

Abstract:
Provided are an apparatus and method to store data from a cache line at locations having errors in a sparing directory. In response to a write operation having write data for locations in one of the cache lines, the write data for a location in the cache line having an error is written to an entry in a sparing directory including an address of the cache line.

Claim (Index 26):
An apparatus for storing data in cache lines in memory dies, comprising:\n a memory controller to perform read and write operation with respect to the memory dies comprising:\n a sparing directory to store write data from write operations for locations in cache lines having errors, wherein the sparing directory stores data for locations in the cache lines having errors separately from a storage of data for the cache lines in the memory dies; and \n logic to use the sparing directory during to return data to a read operation from the sparing directory for the locations in the cache line to read having errors.

Metadata:
- Claim Count in Document: 77.0
- Percentile: 90.0
- Lexical Diversity: 1.84211
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14757905', '14497834', '14396327', '11508758', '15875136']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2428546545972364
- 35 USC 102 Novelty (BERT): 0.5091355658288725
- Combined Prediction Score: 0.2694827457204001
- Mean Citation Score: 185.915798
- Max Citation Score: 301.5376
- Similarity Product: 256.90241405525205

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test