PATENT CLAIM ANALYSIS

Application Number: 16458852
Application Type: Utility
Filing Date: 2019-07
Publication Date: 2019-10
Patent Classification: ["716", "052000"]

Abstract:
A method of fabricating an integrated circuit is disclosed. The method includes defining a via grid, generating a first layout design of the integrated circuit based on at least the via grid or design criteria, generating a standard cell layout design of the integrated circuit, generating a via color layout design of the integrated circuit based on the first layout design and the standard cell layout design, performing a color check on the via color layout design based on design rules, and fabricating the integrated circuit based on at least the via color layout design. The first layout design has a first set of vias arranged in first rows and first columns based on the via grid. The standard cell layout design has standard cells and a second set of vias arranged in the standard cells. The via color layout design has a third set of vias.

Claim (Index 6):
The method of  claim 5 , wherein the second set of spacing requirements comprises at least one or more of:\n a via pitch (P V1 ) between the first via and a second via of the third set of vias in the same mask, and the first via and the second via of the third set of vias are aligned in the second direction, P V1  being expressed by:\n P V1 =P V *N 1 \n \u2003where N 1  is a positive integer and pitch P V  is the minimum pitch of at least the via color layout design in the second direction; a via pitch (P H ) between the first via and a third via of the third set of vias in the same mask, and the first via and the third via of the third set of vias are aligned in the first direction,\n P H1 =P H *M*N  \n \u2003where M is a number of masks, N is a positive integer, and pitch P H  is the minimum pitch of at least the via color layout design in the first direction; a pitch (S 1 ) between the second via and the third via of the third set of vias, and the second via and the third via are not aligned in the first direction and the second direction, S 1  is greater than or equal to S HOSH ; a pitch (S 2 ) between the first via and the first HOSH via, and the first via and the first HOSH via are not aligned in the first direction and the second direction, S 2  is greater than or equal to S HOSH ; a via pitch (P 1 ) between the first HOSH via and the second HOSH via, and the first HOSH via and the second HOSH via being aligned in the first direction or the second direction; P 1  is less than or equal to G 0 ; P 1  is greater than or equal to G 0 HOSH ; or P V1  or P H1  is greater than or equal to G 0 .

Metadata:
- Claim Count in Document: 50.0
- Percentile: 100.0
- Lexical Diversity: 3.48889
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15258932', '15465167', '15966693', '14554958', '14484588']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3570180361769919
- 35 USC 102 Novelty (BERT): 0.5146672529993379
- Combined Prediction Score: 0.3727829578592265
- Mean Citation Score: 222.11727
- Max Citation Score: 357.15204
- Similarity Product: 273.5981868349886

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test