PATENT CLAIM ANALYSIS

Application Number: 16120030
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-06
Patent Classification: ["327", "536000"]

Abstract:
An electronic device includes: a clock booster configured to generate a boosted intermediate voltage greater than a source voltage, wherein the clock booster includes: a controller capacitor configured to store energy for providing a gate signal, wherein the gate signal is for controlling charging operations to generate the boosted intermediate voltage based on the source voltage, and a booster capacitor configured to store energy according to the gate signal for providing the boosted intermediate voltage, wherein the booster capacitor has greater capacitance level than the controller capacitor; and a secondary booster operatively coupled to the clock booster, the secondary booster configured to generate an output voltage based on the boosted intermediate voltage, wherein the output voltage is greater than both the source voltage and the boosted intermediate voltage.

Claim (Index 9):
The electronic device of  claim 8 , wherein the booster circuit groupings are implemented using circuits formed in a silicon wafer.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 96.0
- Lexical Diversity: 2.93617
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15849052', '15849098', '16113037', '15849137', '16022444']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8153397157840393
- 35 USC 102 Novelty (BERT): 0.5828993892857184
- Combined Prediction Score: 0.7920956831342072
- Mean Citation Score: 349.802602
- Max Citation Score: 485.10675
- Similarity Product: 452.7001163727343

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test