PATENT CLAIM ANALYSIS

Application Number: 15994555
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-12
Patent Classification: ["257", "040000"]

Abstract:
The present disclosure provides a light-emitting display device including a lower substrate, a transistor, a planarization layer, a sacrificial layer, an isolation layer, a lower electrode layer, an organic emission layer and an upper electrode layer. The isolation layer is positioned on the sacrificial layer, and exposes part of the planarization layer through an opening that extends through the isolation layer and the sacrificial layer. The planarization layer includes a first contact hole positioned in the opening, and the lower electrode layer is electrically connected to one electrode of the transistor through the first contact hole.

Claim (Index 11):
A light-emitting display device, comprising:\n a display panel including a plurality of sub-pixels, each of the sub-pixels having a transistor and an organic light-emitting diode; an opening that defines an emission area of a sub-pixel of the plurality of sub-pixels; and a first contact hole positioned in the opening, one electrode of the transistor being electrically connected to a lower electrode layer of the organic light-emitting diode in the first contact hole.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 93.0
- Lexical Diversity: 2.43182
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15226030', '15203624', '14023666', '14582912', '15741738']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9184934505994754
- 35 USC 102 Novelty (BERT): 0.4750665566747638
- Combined Prediction Score: 0.8741507612070042
- Mean Citation Score: 218.027046
- Max Citation Score: 218.79628
- Similarity Product: 184.52360182857512

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test