PATENT CLAIM ANALYSIS

Application Number: 16017060
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "724000"]

Abstract:
A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.

Claim (Index 7):
The method of  claim 1 , wherein the first through substrate via is one of a plurality of through substrate vias, the plurality of through substrate vias having a pitch of less than about 100 \u03bcm.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 94.0
- Lexical Diversity: 1.70492
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14886775', '15401851', '13608946', '15675288', '15712987']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9187950505381788
- 35 USC 102 Novelty (BERT): 0.5103385377320133
- Combined Prediction Score: 0.8779493992575623
- Mean Citation Score: 147.570698
- Max Citation Score: 164.40265
- Similarity Product: 84.53566166692376

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test