PATENT CLAIM ANALYSIS

Application Number: 16196313
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["257", "686000"]

Abstract:
In a multi-chip module (MCM), a “super” chip ( 110 N) is attached to multiple “plain” chips ( 110 F′ “super” and “plain” chips can be any chips). The super chip is positioned above the wiring board (WB) but below at least some of plain chips ( 110 F). The plain chips overlap the super chip. Further, the plain chips' low speed IOs can be connected to the WB by long direct connections such as bond wires (e.g. BVAs) or solder stacks; such connections can be placed side by side with the super chip. Such connections can be long, so the super chip is not required to be thin. Also, if through-substrate vias (TSVs) are omitted, the manufacturing yield is high and the manufacturing cost is low. Other structures are provided that combine the short and long direct connections to obtain desired physical and electrical properties.

Claim (Index 1):
An assembly, comprising:\n a wiring board comprising contact pads at each of a top and a bottom side of the wiring board; a first multi-chip module directly connected to a first portion of the contact pads on the top side of the wiring board; a second multi-chip module directly connected to a second portion of the contact pads on the bottom side of the wiring board; each of the first multi-chip module and the second multi-chip module comprising:\n first chips with each comprising:\n one or more first contact pads at a bottom side of a first chip; and \n one or more second contact pads at the bottom surface of the first chip directly connected to one or more of the contact pads of the wiring board; and \n \n a second chip overlying the wiring board comprising third contact pads at a top side of the second chip, wherein at least one first contact pad of each of the first chips is attached to at least one third contact pad of the second chip; and \n wherein at least one direct connection of at least one of the second contact pads of at least one of the first chips to at least one of the contact pads of the wiring board lies between the at least one of the first chips and the wiring board and is longer than a thickness of the second chip.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 98.0
- Lexical Diversity: 1.97802
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15584961', '14809036', '14558462', '15005220', '15364534']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9141373641662218
- 35 USC 102 Novelty (BERT): 0.5779663393974616
- Combined Prediction Score: 0.8805202616893457
- Mean Citation Score: 276.32361000000003
- Max Citation Score: 465.52554
- Similarity Product: 451.8901486686015

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test