PATENT CLAIM ANALYSIS

Application Number: 15901606
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["327", "109000"]

Abstract:
According to one embodiment, a gate control circuit includes a controller, a delay circuit, a power circuit, a boosting circuit, a first transistor, and a control circuit. The controller outputs first and second control signals based on a control signal from outside. The delay circuit delays the first control signal. The power circuit is capable of controlling a power supply voltage to be output based on the delayed first control signal. The boosting circuit is capable of boosting and outputting an input voltage. The first transistor has one end connected to an output node of the boosting circuit, and the other end grounded. The control circuit is capable of controlling a gate voltage of the first transistor based on the second control signal.

Claim (Index 5):
The circuit of  claim 1 , wherein the delay circuit is configured by a resistor element and a capacitative element.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 88.0
- Lexical Diversity: 2.91489
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15441078', '10950570', '11046128', '10237684', '14836805']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7666954289862172
- 35 USC 102 Novelty (BERT): 0.4894497461360762
- Combined Prediction Score: 0.7389708607012031
- Mean Citation Score: 150.68942199999995
- Max Citation Score: 156.52765
- Similarity Product: 95.28124125806688

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test