PATENT CLAIM ANALYSIS

Application Number: 16001798
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["365", "163000"]

Abstract:
Techniques are provided for programming a multi-level self-selecting memory cell that includes a chalcogenide material. To program one or more intermediate memory states to the self-selecting memory cell, a programming pulse sequence that includes two pulses may be used. A first pulse of the programming pulse sequence may have a first polarity and a first magnitude and the second pulse of the programming pulse sequence may have a second polarity different than the first polarity and a second magnitude different than the first magnitude. After applying both pulses in the programming pulse sequence, the self-selecting memory cell may store an intermediate state that represents two bits of data (e.g., a logic ‘01’ or a logic ‘10’).

Claim (Index 10):
The method of  claim 1 , further comprising:\n determining one or more parameters associated with a programming sequence based at least in part on identifying the first logic state to store to the self-selecting memory cell, wherein storing the first logic state is based at least in part on determining the one or more parameters associated with the programming sequence.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 94.0
- Lexical Diversity: 2.15
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15842496', '15842504', '15582329', '15893106', '15338154']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7585098732906788
- 35 USC 102 Novelty (BERT): 0.4938214581820359
- Combined Prediction Score: 0.7320410317798145
- Mean Citation Score: 209.521202
- Max Citation Score: 264.6577
- Similarity Product: 218.9520125078857

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test