PATENT CLAIM ANALYSIS

Application Number: 16256696
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-06
Patent Classification: ["257", "072000"]

Abstract:
An array structure and a manufacturing method thereof are disclosed. The method for manufacturing the array structure includes: forming a gate insulating layer on a substrate; and etching the gate insulating layer at a position corresponding to a source/drain signal access terminal to form a through-hole structure provided with an outward-inclined side wall in the gate insulating layer.

Claim (Index 12):
The array structure according to  claim 11 , further comprising:\n a passivation layer formed on the source/drain layer and provided with a through-hole structure, which comprises an outward-inclined side wall, at a position corresponding to the through hole of the source/drain layer; and a conductive film formed on the passivation layer.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 99.0
- Lexical Diversity: 1.5122
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14409316', '14422334', '14487966', '15326383', '14362038']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9115146232810076
- 35 USC 102 Novelty (BERT): 0.5416141456953835
- Combined Prediction Score: 0.8745245755224452
- Mean Citation Score: 235.466912
- Max Citation Score: 394.7637
- Similarity Product: 305.4690983489156

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test