PATENT CLAIM ANALYSIS

Application Number: 15882053
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["257", "051000"]

Abstract:
Fabrication methods and device structures for a silicon controlled rectifier. A cathode is arranged over a top surface of a substrate and a well is arranged beneath the top surface of the substrate. The cathode is composed of a semiconductor material having a first conductivity type, and the well also has the first conductivity type. A semiconductor layer, which has a second conductivity type opposite to the first conductivity type, includes a section over the top surface of the substrate. The section of the semiconductor layer is arranged to form an anode that adjoins the well along a junction.

Claim (Index 19):
The method of  claim 14  wherein the first well extends beneath the cathode and the second section of the first semiconductor layer, and further comprising:\n forming a doped region in the first well, \n wherein the doped region has the second conductivity type and adjoining the first well along a second junction, the cathode and the second section of the first semiconductor layer are arranged over the doped region, and the cathode and the second section of the first semiconductor layer define a third junction.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 86.0
- Lexical Diversity: 2.22917
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13956795', '15398946', '14151200', '13226838', '13455653']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9204093417456148
- 35 USC 102 Novelty (BERT): 0.4886092805000481
- Combined Prediction Score: 0.8772293356210581
- Mean Citation Score: 242.436786
- Max Citation Score: 244.53873
- Similarity Product: 196.5414982529837

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test