PATENT CLAIM ANALYSIS

Application Number: 16205038
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-05
Patent Classification: ["363", "015000"]

Abstract:
A controller for use in a power converter of a motor drive includes a control circuit configured to turn ON a high side switch by sinking a current of an ON signal. A high side signal interface circuit is coupled to receive the ON signal to generate a drive signal to control switching of the high side switch in a presence of a common mode signal caused by slewing at a half bridge node. The high side signal interface circuit includes a common mode cancellation circuit coupled to provide a common rejection signal to provide a cancellation or rejection of the common mode signal. A first current hysteresis comparator is coupled to receive a common mode rejection signal, a first current signal, and a fourth current signal, and generate a first output signal in a presence of a common mode voltage.

Claim (Index 13):
The resonant power converter of  claim 9 , wherein the common mode cancellation circuit comprises:\n a first pull up resistor coupled to pull up the ON signal to a bypass voltage during an initial state; a second pull up resistor coupled to pull up the OFF signal the bypass voltage during the initial state; a first resistor divider coupled to generate the first current signal at one end of the first resistor divider, wherein an intermediate terminal of the first resistor divider is coupled to the first pull up resistor and is coupled receive the ON signal; a second resistor divider coupled to generate a second current signal at an intermediate terminal of the second resistor divider, wherein the first and second resistor dividers share a resistor such that one end of the second resistor divider is coupled receive the ON signal, an other end of the second resistor divider is coupled to receive the bypass voltage, and the intermediate terminal of the second resistor divider is an other end of the first resistor divider; a third resistor divider coupled to generate a third current signal at one end of the third resistor divider, wherein the third resistor divider includes the second pull up resistor such that an intermediate terminal of the third resistor divider is coupled to receive the OFF signal; a fourth resistor divider coupled to generate the fourth current signal at an intermediate terminal of the fourth resistor divider, wherein one end of the fourth resistor divider is coupled to receive the bypass voltage, and wherein an other end of the fourth resistor divider is coupled to receive the OFF signal; a fifth resistor divider having one end coupled to receive the ON signal and an other end coupled to receive the OFF signal; and a current source coupled to an intermediate terminal of the fifth resistor divider through a first transistor, wherein the common mode rejection signal is coupled to be generated at a gate terminal coupled to a drain terminal of the first transistor, wherein the common mode rejection signal coupled to provide common mode cancellation to the first current hysteresis comparator and the second current hysteresis comparator.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 98.0
- Lexical Diversity: 2.64286
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15994854', '15486191', '13078768', '16054299', '15816593']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8057488767023419
- 35 USC 102 Novelty (BERT): 0.5271993782975388
- Combined Prediction Score: 0.7778939268618617
- Mean Citation Score: 251.965052
- Max Citation Score: 338.9839
- Similarity Product: 278.083196666491

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test