PATENT CLAIM ANALYSIS

Application Number: 15935168
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-08
Patent Classification: ["257", "043000"]

Abstract:
The degree of integration of a semiconductor device is enhanced and the storage capacity per unit area is increased. The semiconductor device includes a first transistor provided in a semiconductor substrate and a second transistor provided over the first transistor. In addition, an upper portion of a semiconductor layer of the second transistor is in contact with a wiring, and a lower portion thereof is in contact with a gate electrode of the first transistor. With such a structure, the wiring and the gate electrode of the first transistor can serve as a source electrode and a drain electrode of the second transistor, respectively. Accordingly, the area occupied by the semiconductor device can be reduced.

Claim (Index 14):
The semiconductor device according to  claim 2 , wherein the oxide semiconductor layer includes a c-axis aligned crystal.

Metadata:
- Claim Count in Document: 39.0
- Percentile: 90.0
- Lexical Diversity: 2.31481
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14722236', '13336549', '13045873', '14595692', '13185965']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9330767320875116
- 35 USC 102 Novelty (BERT): 0.5168265529117404
- Combined Prediction Score: 0.8914517141699345
- Mean Citation Score: 297.7358460000001
- Max Citation Score: 325.02197
- Similarity Product: 273.72382999097346

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test