PATENT CLAIM ANALYSIS

Application Number: 15864732
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["711", "103000"]

Abstract:
The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.

Claim (Index 9):
The method of  claim 2 , wherein the timing-calibration operation involves multiple phase comparisons at different phase offsets which vary by at least one transmit bit (tBIT) time.

Metadata:
- Claim Count in Document: 51.0
- Percentile: 86.0
- Lexical Diversity: 2.21739
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15169331', '15682257', '13345987', '14698755', '10278478']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.537165748082589
- 35 USC 102 Novelty (BERT): 0.4790529466489168
- Combined Prediction Score: 0.5313544679392218
- Mean Citation Score: 172.663998
- Max Citation Score: 175.09268
- Similarity Product: 124.51472606236456

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test