PATENT CLAIM ANALYSIS

Application Number: 15916411
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["455", "307000"]

Abstract:
An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Claim (Index 8):
A wireless communication device comprising one or more amplifiers wherein each amplifier of the one or more amplifiers is a low noise amplifier for converting a single-ended input signal to a differential output signal, the amplifier comprising:\n a first transistor configured in common-source or common-emitter mode, to receive the single-ended input signal and generate a first part of the differential output signal, a source or emitter of the first transistor being connected to a first end of a first inductor, and a gate or base of the first transistor being coupled to the single-ended input signal; a second transistor configured in common-source or common-emitter mode, to generate a second part of the differential output signal, a source or emitter of the second transistor being connected to a first end of a second inductor; and a third transistor and a fourth transistor, and wherein the third transistor and forth transistor are cross-coupled and connected to the first and second transistors such that:\n a drain or collector of the first transistor is coupled to a gate or base of the fourth transistor via a first capacitor; \n a drain or collector of the second transistor is coupled to a gate or base of the third transistor via a second capacitor; and \n the drain or collector of the first transistor is connected to a source or emitter of the third transistor, the drain or collector of the second transistor is connected to a source or emitter of the fourth transistor; and \n the drain or collector of the first transistor is coupled to a gate or base of the second transistor directly or via a third capacitor; \n wherein a second end of the first inductor is connected to a second end of the second inductor to form a first node having a zero or essentially zero voltage relative to ground at an operating frequency.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 90.0
- Lexical Diversity: 2.74468
- Patent Class: 455.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15120304', '12624417', '14913466', '15730133', '12370159']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6907907750556909
- 35 USC 102 Novelty (BERT): 0.5337850975700751
- Combined Prediction Score: 0.6750902073071293
- Mean Citation Score: 253.214838
- Max Citation Score: 366.87003
- Similarity Product: 311.13025111591463

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test