PATENT CLAIM ANALYSIS

Application Number: 15771047
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-08
Patent Classification: ["257", "040000"]

Abstract:
The present disclosure relates to a thin film transistor (TFT) substrate, a manufacturing method thereof, and an organic light-emitting (OLED) substrate. The interlayer dielectric layer manufactured by the manufacturing method may be configured in the structure of two silicon oxide layers sandwiching one silicon nitride layer. As such, the bonding force between the interlayer dielectric layer and the gate, and the bonding force between the interlayer dielectric layer, and the source and the drain may be improved. The source and the drain may be prevented from falling off from the interlayer dielectric layer during the annealing process. Production yield of the TFT substrate may be improved. The OLED substrate adopting the manufactured of the OLED substrate of the present disclosure may have a better production yield and quality.

Claim (Index 1):
A manufacturing method of a thin film transistor (TFT) substrate, comprising:\n step S 1 , providing a base substrate, depositing a buffer layer on the base substrate, and forming an active layer on the buffer layer; depositing a gate insulation layer on the active layer and the buffer layer, and forming a gate on the gate insulation layer; step S 2 , depositing an interlayer dielectric layer on the gate and the gate insulation layer, wherein the interlayer dielectric layer comprises a first silicon oxide layer, a first silicon nitride layer, and a second silicon oxide layer being stacked on the gate and the gate insulation layer in sequence from bottom to up; step S 3 , conducting a patterned process on the interlayer dielectric layer and the gate insulation layer, and forming a source-contacting hole and a drain-contacting hole on the interlayer dielectric layer and the gate insulation layer, wherein the source-contacting hole and the drain-contacting hole respectively correspond to two ends of the active layer; forming a source and a drain on the interlayer dielectric layer to obtain a TFT substrate, wherein the source and the drain contact with the two ends of the active layer respectively via the source-contacting hole and the drain-contacting hole

Metadata:
- Claim Count in Document: 1.0
- Percentile: 91.0
- Lexical Diversity: 2.2
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15569775', '15544023', '15773690', '14422343', '15569776']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9267652213524
- 35 USC 102 Novelty (BERT): 0.5189285619466252
- Combined Prediction Score: 0.8859815554118224
- Mean Citation Score: 296.644552
- Max Citation Score: 331.61557
- Similarity Product: 276.6272729933238

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test