PATENT CLAIM ANALYSIS

Application Number: 15956760
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-07
Patent Classification: ["327", "379000"]

Abstract:
An integrated circuit and a transmission circuit thereof are provided. The transmission circuit includes an input buffer and a voltage holding circuit. The voltage holding circuit has a first end coupled to the input end of the input buffer, and a second end coupled to a reference voltage end. The voltage holding circuit includes a switch and a diode apparatus coupled in series between the first end and the second end of the voltage holding circuit. The switch is configured to receive a mode signal, and is turned on or cut off according to the mode signal.

Claim (Index 20):
The integrated circuit according to  claim 13 , wherein, when the at least one mode signal instructs the transmission circuit to operate in a first mode, the input buffer is enabled, and the switch is configured to be turned on according to the at least one mode signal, and when the at least one mode signal instructs the transmission circuit to operate in a second mode, the input buffer is disabled, and the switch is configured to be cut off according to the at least one mode signal.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 91.0
- Lexical Diversity: 2.36364
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14734161', '15154455', '12979149', '14499363', '12828052']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7640211144686722
- 35 USC 102 Novelty (BERT): 0.4731668387332083
- Combined Prediction Score: 0.7349356868951259
- Mean Citation Score: 145.39442
- Max Citation Score: 151.1529
- Similarity Product: 107.07302217203376

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test