PATENT CLAIM ANALYSIS

Application Number: 16048013
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "737000"]

Abstract:
A device includes a first chip is embedded in a molding compound layer, wherein the first chip is shifted toward a first direction, a second chip over the first chip and embedded in the molding compound layer, wherein the second chip is shifted toward a second direction opposite to the first direction and a plurality of bumps between the first chip and the second chip.

Claim (Index 3):
The device of  claim 2 , wherein:\n the first chip comprises a plurality of logic circuits, wherein the first chip comprise a plurality of through vias connected to the redistribution layer; and the second chip comprises a plurality of memory dies stacked together, wherein the second chip is electrically connected to the first chip through the plurality of bumps.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 95.0
- Lexical Diversity: 2.46429
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15594756', '14177947', '15085837', '14561581', '14561678']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9342531891740906
- 35 USC 102 Novelty (BERT): 0.5099354079377805
- Combined Prediction Score: 0.8918214110504596
- Mean Citation Score: 292.161964
- Max Citation Score: 309.81885
- Similarity Product: 269.7081944936872

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test