PATENT CLAIM ANALYSIS

Application Number: 15883179
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["257", "401000"]

Abstract:
A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.

Claim (Index 5):
The semiconductor device of  claim 1 , wherein an upper surface of the epitaxy structure distal the intra-device isolation structure is recessed.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 2.82143
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14854915', '14852441', '15635337', '15640645', '13970790']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9282454539500438
- 35 USC 102 Novelty (BERT): 0.4942544462048437
- Combined Prediction Score: 0.8848463531755237
- Mean Citation Score: 214.347494
- Max Citation Score: 267.83072000000004
- Similarity Product: 239.8816662745667

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test