PATENT CLAIM ANALYSIS

Application Number: 15905720
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-10
Patent Classification: ["365", "185180"]

Abstract:
A memory device that generates a unique identifying number, and includes a plurality of memory cells and a controller. Each of the memory cells includes first and second regions formed in a semiconductor substrate, wherein a channel region of the substrate extends between the first and second regions, a floating gate disposed over and insulated from a first portion of the channel region, and a select gate disposed over and insulated from a second portion of the channel region. The controller is configured to apply one or more positive voltages to the first regions of the memory cells while the memory cells are in a subthreshold state for generating leakage current through each of the channel regions, measure the leakage currents, and generate a number based on the measured leakage currents.

Claim (Index 18):
The method of  claim 12 , further comprising:\n applying a positive voltage to the select gates while the memory cells are in a subthreshold state.

Metadata:
- Claim Count in Document: 56.0
- Percentile: 88.0
- Lexical Diversity: 2.15385
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15593231', '15374588', '10863030', '14190010', '10781112']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.807423757923733
- 35 USC 102 Novelty (BERT): 0.4894036833815623
- Combined Prediction Score: 0.775621750469516
- Mean Citation Score: 242.11079
- Max Citation Score: 263.52292
- Similarity Product: 205.73302641670227

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test