PATENT CLAIM ANALYSIS

Application Number: 15950773
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "411000"]

Abstract:
Methods are provided to form pure silicon oxide layers on silicon-germanium (SiGe) layers, as well as an FET device having a pure silicon oxide interfacial layer of a metal gate structure formed on a SiGe channel layer of the FET device. For example, a method comprises growing a first silicon oxide layer on a surface of a SiGe layer using a first oxynitridation process, wherein the first silicon oxide layer comprises nitrogen. The first silicon oxide layer is removed, and a second silicon oxide layer is grown on the surface of the SiGe layer using a second oxynitridation process, which is substantially the same as the first oxynitridation process, wherein the second silicon oxide layer is substantially devoid of germanium oxide and nitrogen. For example, the first silicon oxide layer comprises a SiON layer and the second silicon oxide layer comprises a pure silicon dioxide layer.

Claim (Index 4):
The semiconductor device of  claim 1 , wherein the SiGe channel layer comprises a Ge content in a range of about 20% to about 70%.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 91.0
- Lexical Diversity: 2.78947
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15262206', '15951149', '14495639', '15439181', '15933949']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9377811409729148
- 35 USC 102 Novelty (BERT): 0.5941165823495451
- Combined Prediction Score: 0.903414685110578
- Mean Citation Score: 381.99306
- Max Citation Score: 526.3897
- Similarity Product: 452.2598803943455

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test