PATENT CLAIM ANALYSIS

Application Number: 15933505
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "411000"]

Abstract:
A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.

Claim (Index 3):
The semiconductor device of  claim 2 , wherein an upper surface of the substrate insulating layer and the upper surface of the protruding region are co-planar.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 90.0
- Lexical Diversity: 2.14035
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15666844', '15222276', '15252040', '15611893', '15206868']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9358147679672972
- 35 USC 102 Novelty (BERT): 0.5401816898374929
- Combined Prediction Score: 0.896251460154317
- Mean Citation Score: 327.85262
- Max Citation Score: 383.1335
- Similarity Product: 380.9473355560006

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test