PATENT CLAIM ANALYSIS

Application Number: 16008877
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["365", "051000"]

Abstract:
A memory device may include a first half memory block, a second half memory block, a row decoder group, and a read/write circuit which may be disposed between the first half memory block and the second half memory block. The read/write circuit may be coupled to the first half memory block and the second half memory block through a first bit line and a second bit line. The row decoder group may be configured to simultaneously select the first half memory block and the second half memory block in response to a single block selection signal.

Claim (Index 13):
The memory device of  claim 12 , wherein the read/write circuit and the first row decoder group are also disposed in the plane together with the first half memory block and the second half memory block.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 94.0
- Lexical Diversity: 2.75676
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14512965', '13717160', '14996249', '13772868', '14966894']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8052043816280309
- 35 USC 102 Novelty (BERT): 0.4895096721286427
- Combined Prediction Score: 0.7736349106780921
- Mean Citation Score: 187.015568
- Max Citation Score: 190.14247
- Similarity Product: 119.7612857568848

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test