PATENT CLAIM ANALYSIS

Application Number: 15947411
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "288000"]

Abstract:
A semiconductor device includes a first gate-all-around field-effect transistor (GAA FET) device including a first gate stack having first channels, interfacial layers formed around the first channels, and dielectric material including first and second portions having respective thicknesses formed on the first interfacial layers. The semiconductor device further includes a second GAA FET device including a second gate stack having second channels, the interfacial layers formed around the second channels, and the dielectric material formed on the second interfacial layers. A threshold voltage (Vt) shift associated with the semiconductor device is achieved based on a thickness of the first portion of the dielectric material.

Claim (Index 8):
The method of  claim 7 , further comprising, after forming the first metal oxide layer:\n forming second protective layers on the second metal oxide layers; and forming layers including amorphous silicon (a-Si) on the second protective layers.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 91.0
- Lexical Diversity: 2.44681
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15262206', '15367650', '13761476', '15642690', '13971974']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9025513192810024
- 35 USC 102 Novelty (BERT): 0.5076662020618605
- Combined Prediction Score: 0.8630628075590883
- Mean Citation Score: 229.11706400000003
- Max Citation Score: 235.66905
- Similarity Product: 156.10875368875264

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test