PATENT CLAIM ANALYSIS

Application Number: 16117470
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-07
Patent Classification: ["365", "185220"]

Abstract:
There are provided a signal generation circuit and a semiconductor memory device including the same. The signal generation circuit includes: a signal input component configured to generate a first internal output signal and a second internal output signal in response to an input signal, and to adjust potential levels of the first internal output signal and the second internal output signal in response to an output signal; and a signal output component configured to generate the output signal in response to the first internal output signal and the second internal output signal.

Claim (Index 4):
The signal generation circuit of  claim 2 , further comprising a first compensator coupled between an output node of the signal output component and a node between the third transistor and the fourth transistor,\n wherein the first compensator adjusts a potential level of the node between the third transistor and the fourth transistor according to a potential level of the output signal.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 96.0
- Lexical Diversity: 2.69444
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15164309', '15068394', '15398140', '15350512', '15421067']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7859869863871064
- 35 USC 102 Novelty (BERT): 0.4707376869727507
- Combined Prediction Score: 0.7544620564456709
- Mean Citation Score: 183.686812
- Max Citation Score: 197.42752
- Similarity Product: 150.92030487277984

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test