PATENT CLAIM ANALYSIS

Application Number: 15945588
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "337000"]

Abstract:
A semiconductor device includes an active region formed over a substrate. The active region includes a FET and a diode. The FET includes one or more FET fingers. Each FET finger includes a FET source region, a FET drain region, and a lateral FET gate electrode. The diode includes one or more diode fingers. Each of the diode fingers includes a diode anode region electrically coupled to the FET source region, a diode cathode region electrically coupled to the FET drain region, and a lateral diode gate electrode electrically coupled to the diode anode region and electrically isolated from the lateral FET gate electrode. The FET fingers are active fingers of the semiconductor device and the diode fingers are dummy fingers of the semiconductor device. The diode is configured to clamp a maximum voltage developed across the FET drain region and the FET source region.

Claim (Index 14):
A semiconductor device, comprising:\n a substrate; an active region formed over the substrate, the active region comprising one or more active fingers and one or more diode fingers, wherein: each active finger comprises an active lateral gate electrode, a plurality of first active doped regions of a first conductivity type, and one or more second active doped regions doped of a second conductivity type; each diode finger comprises a diode lateral gate electrode, one or more first diode doped regions of the first conductivity type, and one or more second diode doped regions of the second conductivity type; each active finger includes more regions doped to the first conductivity type than does the diode finger; the active finger includes the same number of regions doped to the second conductivity type as does the diode finger; the active lateral gate electrode is electrically isolated from the diode lateral gate electrode; the diode lateral gate electrode is electrically coupled to a diode region of the second diode doped regions; the one or more diode fingers are dummy fingers of the semiconductor device; and the one or more diode fingers are configured to clamp a maximum voltage developed across two of the first active doped regions.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 91.0
- Lexical Diversity: 3.41304
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15228213', '13887704', '14082742', '15850854', '13365983']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.906927527585604
- 35 USC 102 Novelty (BERT): 0.5036986392501253
- Combined Prediction Score: 0.8666046387520561
- Mean Citation Score: 254.438758
- Max Citation Score: 260.5234
- Similarity Product: 201.3256584010244

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test