PATENT CLAIM ANALYSIS

Application Number: 15873908
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["714", "699000"]

Abstract:
A method for determining two bits errors in transmission of 128 bits and the device for realization of this method is provided. By the method and device, the two error bits transferred bits can be determined and corrected by using least bits in operation. Therefore, the amount of data in transmission is increased with a least quantity and thus the transmission quality is not affected.

Claim (Index 1):
A two bit error calibration device for 128 bit transfer, comprising:\n 16 memories for data storage; each memory having four output ports; two calibration chips each of which having four output ports; a data bus for data transfer; the data bus including receiving ports; each receiving port connected to a corresponding output port of the memories; the data bus could receive 64 bits; the data bus further including 8 checking ports which are connected to the output ports of the two checking chips; wherein when the 64 receiving ports of the data bus receive data from the output ports of the memories; the receiving operation is a two stage operation and thus totally 128 bit data is received; before data are written into the memory; an operator connected to the data bus and the memories for calculating the checksums and bit sums for above said data of 128 bits; wherein in the operator, the 128 bit data is stored as 32 data sets; each data set includes four bits; all the 128 bits from the memories being divided into 32 data sets, in that, each data set includes four bits which are a 0 th  bit (b0), a 1 th  bit (b1), a 2 th  bit (b2), and a 3 th  bit (b3); totally, there are 128 bits which are the data read by the data bus; the operator calculating a calibration bit set from the 32 data sets; before data are written into the memory, all the stored data being operated for deriving the checksums and bit sums; the results of operation being transferred to the two calibration chips; wherein the calibration bit set includes 16 calibration bits which are stored in the two calibration chips; wherein the 16 calibration bits are 0 th  calibration bit (cb0), 1 th  calibration bit (cb1), 2 th  calibration bit (cb2), 3 th  calibration bit (cb3), 4 th  calibration bit (cb4), 5 th  calibration bit (cb5), 6 th  calibration bit (cb6), 7 th  calibration bit (cb7), 8 th  calibration bit (cb8), 9 th  calibration bit (cb9), 10 th  calibration bit (cb10), 11 th  calibration bit (cb11), 12 th  calibration bit (cb12), 13 th  calibration bit (cb13), 14 th  calibration bit (cb14), and 15 th  calibration bit (cb15); a receiving end receiving the data transferred from the data bus, in that, the data includes the 128 bits data originally stored in the memories and the 16 calibration bits originally stored in the calibration chips; a comparator in the receiving end for calculating the same operations of checksums and bit sums for the received data so as to derive another calibration bit set which includes 16 calibration bits; the calibration bits derived in the comparator from 128 bits transferred to the receiving end is compared with the calibration bits transferred from the calibration bit set originally stored in the two calibration chips as so to determine which two bits of the 128 bits are deviated in transfer; and wherein the data comparator compares all the calibration bits based on the received data with all the calibration bits  91  originally stored in the calibration chips.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 1.66667
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12124529', '15514112', '15551912', '09948872', '09948890']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2546897756188268
- 35 USC 102 Novelty (BERT): 0.492913987582142
- Combined Prediction Score: 0.2785121968151584
- Mean Citation Score: 190.159694
- Max Citation Score: 206.22365
- Similarity Product: 141.40493849531413

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test