PATENT CLAIM ANALYSIS

Application Number: 15927715
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["711", "122000"]

Abstract:
One embodiment provides an apparatus. The apparatus includes last level cache circuitry and cache management circuitry. The last level cache circuitry stores cache blocks that at least partially include a subset of cache blocks stored by near memory circuitry. The near memory circuitry is configured in an n-way set associative format that references the cache blocks stored by the near memory circuitry using set identifiers and way identifiers. The cache management circuitry stores way identifiers for the cache blocks of the near memory circuitry within the cache blocks in the last level cache circuitry. Storing way identifiers in the cache blocks of the last level cache enables the cache management circuitry or memory controller circuitry to write back a cache block without reading tags in one or more ways of the near memory circuitry.

Claim (Index 23):
The system of  claim 21 , wherein the at least one processor core, the first memory circuity and the cache memory circuitry are included in a processor package, the system further comprising:\n main memory communicatively coupled to the processor package through at least one conductive bus, wherein the main memory includes the second memory circuitry.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 90.0
- Lexical Diversity: 2.5
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13977603', '14457128', '12580732', '14293521', '11709279']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5008323547026439
- 35 USC 102 Novelty (BERT): 0.4941341762290182
- Combined Prediction Score: 0.5001625368552813
- Mean Citation Score: 179.31399199999996
- Max Citation Score: 191.70267
- Similarity Product: 118.89198074290216

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test