PATENT CLAIM ANALYSIS

Application Number: 16243249
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["345", "209000"]

Abstract:
A differential amplifier circuit includes a differential input stage, a first current mirror, a second current mirror, a first current source circuit, and a second current source circuit. The first current source circuit has a first transistor of a first conductivity type with a control terminal supplied with a first bias voltage, and a second transistor of a second conductivity type with a control terminal supplied with a second bias voltage. An output amplifier circuit includes a third transistor of the first conductivity type and a fourth transistor of the second conductivity type. A control circuit has a fifth transistor of the first conductivity type with a first terminal connected to a connection point between the other end of the second current source circuit and the control terminal of the fourth transistor in the output amplifier circuit, with a second terminal connected to an output node of the second current mirror, and with a control terminal receiving the first bias voltage.

Claim (Index 20):
A data driver comprising:\n an output circuit group including a plurality of the output circuits according to  claim 11 ; and at least one bias circuit provided to be common to the plurality of output circuits, wherein the bias circuit includes:\n a sixth transistor of the second conductivity type with a first terminal connected to the third power supply terminal and with a second terminal and a control terminal connected together; \n a first current source connected between the second terminal of the sixth transistor and the first power supply terminal; \n a seventh transistor of the first conductivity type with a second terminal and a control terminal connected together; \n a second current source connected between the second terminal of the seventh transistor and the second power supply terminal; \n an eighth transistor of the second conductivity type with a first terminal connected to a first terminal of the seventh transistor and with a control terminal connected to the control terminal of the sixth transistor; and \n a load element connected between a second terminal of the eighth transistor and the first power supply terminal, and \n the bias circuit supplies a voltage of the second terminal of the sixth transistor as the second bias voltage, and supplies a voltage of the second terminal of the seventh transistor as the first bias voltage.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 3.82222
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15818628', '13204403', '13317858', '14664076', '11648530']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6617636942733788
- 35 USC 102 Novelty (BERT): 0.5746416083680617
- Combined Prediction Score: 0.6530514856828471
- Mean Citation Score: 374.23268
- Max Citation Score: 450.50867
- Similarity Product: 433.33545333994937

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test