PATENT CLAIM ANALYSIS

Application Number: 16164845
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-06
Patent Classification: ["365", "185290"]

Abstract:
A method of operating a memory device includes performing a data read operation on at least one victim sub-block within a memory block containing a plurality of sub-blocks therein, in response to an erase command directed to a selected sub-block within the plurality of sub-blocks. Next, a soft program operation is performed on the at least one victim sub-block. This soft programming operation is then followed by an operation to erase the selected sub-block within the plurality of sub-blocks. This operation to erase the selected sub-block may include providing an erase voltage to a bulk region of a substrate on which the memory block extends, and the at least one victim sub-block may be disposed between the selected sub-block and the substrate.

Claim (Index 21):
The method of  claim 11 , wherein performing the data read operation on the at least one victim sub-block includes:\n reading first victim memory cells among a plurality of victim memory cells included in the at least one victim sub-block based on a first read voltage, the first victim memory cells being connected to two or more wordlines.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 97.0
- Lexical Diversity: 2.22414
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15607551', '13540951', '14606252', '16110088', '13607038']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8321260667211283
- 35 USC 102 Novelty (BERT): 0.4938997589690114
- Combined Prediction Score: 0.7983034359459167
- Mean Citation Score: 265.98259799999994
- Max Citation Score: 275.78714
- Similarity Product: 220.55978720817924

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test