PATENT CLAIM ANALYSIS

Application Number: 16194991
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-05
Patent Classification: ["326", "040000"]

Abstract:
Systems and methods are provided herein for implementing a programmable integrated circuit device that enables high-speed FPGA boot-up through a significant reduction of configuration time. By enabling high-speed FPGA boot-up, the programmable integrated circuit device will be able to accommodate applications that require faster boot-up time than conventional programmable integrated circuit devices are able to accommodate. In order to enable high-speed boot-up, dedicated address registers are implemented for each data line segment of a data line, which in turn significantly reduces configuration random access memory (CRAM) write time (e.g., by a factor of at least two).

Claim (Index 21):
A programmable integrated circuit device, comprising:\n a first data line segment of a plurality of data line segments, wherein the first data line segment comprises:\n a first plurality of configuration random access memory (CRAM) cells; and \n a first pipeline column coupled to the first plurality of CRAMs, wherein the first pipeline column is configured to:\n receive a plurality of data frames; \n transmit a first data frame of the plurality of data frames to the first plurality of CRAMs, wherein the first data frame is associated with the first data line segment; and \n transmit a second data frame of the plurality of data frames to a second data line segment of the plurality of data line segments, wherein the second data frame is associated with the second data line segment, and wherein the second data line segment comprises a second pipeline column coupled to a second plurality of CRAMs.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 98.0
- Lexical Diversity: 1.55072
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15197356', '15489535', '14685098', '16146849', '11055475']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6626795509840934
- 35 USC 102 Novelty (BERT): 0.4818117599204783
- Combined Prediction Score: 0.6445927718777319
- Mean Citation Score: 210.204742
- Max Citation Score: 259.158
- Similarity Product: 227.60631748652457

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test