PATENT CLAIM ANALYSIS

Application Number: 16416603
Application Type: Utility
Filing Date: 2019-05
Publication Date: 2019-09
Patent Classification: ["711", "101000"]

Abstract:
According to one embodiment, a memory system includes a nonvolatile memory including a plurality of nonvolatile memory dies, and a controller. The controller classifies the nonvolatile memory dies into a plurality of physical sets such that each of the nonvolatile memory dies belongs to only one physical set. The controller creates a plurality of storage regions which share each of the physical sets and each of which spans the physical sets. The controller sets one of the physical sets to a first mode for permitting a write operation and a read operation, and sets each of the other physical sets to a second mode for permitting a read operation and inhibiting a write operation.

Claim (Index 7):
The memory system of  claim 5 , wherein the first read cache is implemented in a random access memory in the memory system.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 100.0
- Lexical Diversity: 2.68889
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15820494', '15700376', '15700365', '16126231', '15913987']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5405070452859886
- 35 USC 102 Novelty (BERT): 0.5343772365024462
- Combined Prediction Score: 0.5398940644076343
- Mean Citation Score: 237.938066
- Max Citation Score: 367.23254
- Similarity Product: 264.6485221653819

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test