PATENT CLAIM ANALYSIS

Application Number: 15972509
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["345", "076000"]

Abstract:
Disclosed herein is a display including: a pixel array part configured to include pixels that are arranged in a matrix and each have an electro-optical element, a write transistor for writing a video signal, a drive transistor for driving the electro-optical element based on the video signal written by the write transistor, and a holding capacitor connected between gate and source of the drive transistor, wherein the holding capacitor includes a first electrode, a second electrode disposed to face one surface of the first electrode for forming a first capacitor, and a third electrode disposed to face the other surface of the first electrode for forming a second capacitor, and the first capacitor and the second capacitor are connected in parallel to each other electrically.

Claim (Index 16):
A self-luminous display device comprising:\n a substrate; a pixel array including a plurality of pixels arranged in a matrix on the substrate, respective ones of the pixels comprising a write transistor configured to write a video signal, a drive transistor configured to control a current based on the video signal, a holding capacitor configured to store a voltage dependent on the video signal, and a light emitting element configured to emit light in response to the current; and a drive circuit configured to drive the pixels, wherein the holding capacitor includes:\n a first electrode, \n a second electrode disposed above the first electrode, \n a first insulating layer interposed between the first electrode and the second electrode, \n a third electrode disposed above the second electrode \n a second insulating layer interposed between the second electrode and the third electrode, and \n a planarization layer disposed on the second insulating layer, \n the light emitting element includes an anode electrode, a cathode electrode and a light-emitting layer disposed between the anode electrode and the cathode electrode, the anode electrode and the third electrode are continuously formed as a portion of an anode electrode layer, the anode electrode is disposed on the planarization layer, a source electrode of the drive transistor and the second electrode are distinctly formed as portions of a same metal layer, the anode electrode is connected to the first electrode via the source electrode, and the second electrode is connected to a gate electrode of the drive transistor.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 93.0
- Lexical Diversity: 2.19672
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15063414', '13710161', '12078239', '13710135', '15683919']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7098665540284286
- 35 USC 102 Novelty (BERT): 0.544223106636667
- Combined Prediction Score: 0.6933022092892523
- Mean Citation Score: 383.883412
- Max Citation Score: 400.9245
- Similarity Product: 355.02675136435033

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test