PATENT CLAIM ANALYSIS

Application Number: 15903549
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["712", "220000"]

Abstract:
Mechanisms for reducing register bank conflicts based on software hint and hardware thread switch are disclosed. In some embodiments, an apparatus for thread switching includes a graphics processing unit (GPU) that includes a plurality of register banks to store operands that are assigned at least partially to avoid register bank conflicts. A decoding circuitry checks a thread switching field of a first instruction to be executed by a first thread. The GPU performs a thread switch mechanism to cause a second instruction to be executed by a second thread when the thread switching field of the first instruction is set.

Claim (Index 10):
The graphics processing unit of  claim 9 , wherein the first thread switch mechanism to cause a second instruction to execute with a second thread due to a register bank conflict between a first operand of the first instruction and a second operand of a different instruction.

Metadata:
- Claim Count in Document: 33.0
- Percentile: 88.0
- Lexical Diversity: 1.69841
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15819152', '15798574', '15494773', '15494710', '15789565']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6047736533394162
- 35 USC 102 Novelty (BERT): 0.5115582253139486
- Combined Prediction Score: 0.5954521105368694
- Mean Citation Score: 219.229302
- Max Citation Score: 232.5576
- Similarity Product: 125.69347041563988

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test