PATENT CLAIM ANALYSIS

Application Number: 15881692
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-08
Patent Classification: ["375", "150000"]

Abstract:
A signal detection circuit includes: a correlation circuit including the first through nth correlators connected sequentially as the first through nth stage correlators and each computing a correlation value between a received signal and a spreading sequence while shifting the received signal to the next stage depending on the chip rate period of the spreading sequence; a first adder that adds k correlation values computed by k correlators so as to generate a first addition value; a second adder that adds r correlation values computed by r correlators so as to generate a second addition value; a subtractor that subtracts the first addition value from the second addition value so as to generate a subtraction value; and a synchronization detection unit that compares the subtraction value with a threshold value, so as to detect the synchronization timing of the spreading sequence and the received signal.

Claim (Index 1):
A signal detection circuit for receiving a signal transmitted by spectrum spreading communications using a spreading sequence and acquiring reception data from the resulting received signal on a basis of the spreading sequence, the signal detection circuit comprising:\n a correlation circuit including first through nth correlators (n is an integer equal to three or greater) connected sequentially as first through nth stage correlators, the first through nth correlators each being configured to compute a correlation value between said received signal and said spreading sequence while shifting said received signal to a next stage depending on a chip rate period of said spreading sequence; a first adder configured to add k number of correlation values which have been computed by respective ones of k number of correlators (k is an integer such that 1<k\u2264j where j is an integer such that 1<j<n\u22122) including said jth correlator among the first through jth correlators of said correlation circuit, so as to generate a first additional value; a second adder configured to add r number of correlation values which have been computed by respective ones of r number of correlators (r is an integer such that k<r\u2264p where p is an integer such that j<p\u2264n) including said pth correlator among the first through pth correlators of said correlation circuit, so as to generate a second addition value; a subtractor configured to subtract said first addition value from said second addition value so as to generate a subtraction value; and a synchronization detection unit configured to compare said subtraction value with a threshold value, so as to detect a synchronization timing of said spreading sequence and said received signal according to the comparison result.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 86.0
- Lexical Diversity: 2.45161
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['10292447', '09699553', '10088553', '15881696', '11039009']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5009232322355515
- 35 USC 102 Novelty (BERT): 0.5118457775718827
- Combined Prediction Score: 0.5020154867691846
- Mean Citation Score: 257.556946
- Max Citation Score: 310.7614700000001
- Similarity Product: 245.8675049390073

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test