PATENT CLAIM ANALYSIS

Application Number: 15884934
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["257", "401000"]

Abstract:
A FinFET and method for fabricating an air gap spacer in a FinFET is disclosed. The FinFET includes a sidewall spacer between a gate material and an interlayer dielectric material. The sidewall spacer includes a lower portion that extends fully between the gate and the interlayer dielectric material and an upper portion that includes an airgap. The sidewall spacer is fabricated by depositing a sacrificial gate structure in a gate region having an upper sacrificial layer and a lower sacrificial layer, and removing the upper sacrificial layer to expose a sidewall spacer region. Airgap spacer material is deposited in the exposed sidewall spacer region to form an upper portion of the sidewall spacer having the air gap.

Claim (Index 6):
The method of  claim 5 , wherein the sacrificial gate structure is confined by a first sidewall spacer material, further comprising removing an upper portion of the first sidewall spacer material exposed by removal of the upper sacrificial layer material and retaining an unexposed lower portion of the sidewall spacer.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 2.5625
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15786828', '15173132', '14985711', '14175441', '15371350']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9275639212698228
- 35 USC 102 Novelty (BERT): 0.5214616888596171
- Combined Prediction Score: 0.8869536980288023
- Mean Citation Score: 304.312576
- Max Citation Score: 321.0993
- Similarity Product: 202.83275601806045

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test