PATENT CLAIM ANALYSIS

Application Number: 15897441
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["716", "114000"]

Abstract:
A method, system and computer program product perform timing analysis of an integrated circuit design with callback-based constraint processing for clock domain independence. A timing graph representation of the integrated circuit design includes nodes interconnected by edges. Loading timing abstracts representing the nodes of the timing graph precedes obtaining a timing result based on propagating timing values and associated timing tags from an input to an output of the integrated circuit design and processing timing constraints at one or more of the nodes as callbacks. Each timing tag indicates a clock domain. After applying a design change, one or more modified timing tags that are added or changed as a result of the design change are determined. The timing constraints associated with the modified timing tags are processed as callbacks, and the timing result are re-computed.

Claim (Index 9):
The system according to  claim 7 , wherein the processor determines the one or more modified timing tags based on maintaining an incremental timing tag invalidation list based on the applying the design change, the incremental timing tag invalidation list including a list of modified edges that are added or deleted as a result of the applying the design change.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 88.0
- Lexical Diversity: 2.01389
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15207898', '15483307', '15160387', '11845056', '15195517']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3040314896267229
- 35 USC 102 Novelty (BERT): 0.5122641879546374
- Combined Prediction Score: 0.3248547594595144
- Mean Citation Score: 192.164134
- Max Citation Score: 339.63043
- Similarity Product: 303.59668630052505

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test