PATENT CLAIM ANALYSIS

Application Number: 16032306
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["365", "222000"]

Abstract:
A flash memory refreshes at a time before a read error might occur. A controller performs a first read operation and a second read operation using a sense amplifier. In the second read operation, a bit line potential controller draws out a potential of a bit line feeding the sense amplifier so that, if memory cell degradation has occurred, the degradation can be detected. For example, when first data read by the first read operation and second data read by the second read operation are determined to be different, the memory cell is refreshed.

Claim (Index 11):
A flash memory, comprising:\n a plurality of memory cells; a sense amplifier to read data stored in a pair of memory cells, wherein the pair of memory cells includes a first memory cell and a second memory cell; a bit line potential controller configured to control a potential of a selected bit line; an error corrector configured to generate error correcting data, and to correct a first error output by the sense amplifier; and a controller, wherein a data value is stored in the pair of memory cells, by storing the data value in the first memory cell and storing an inverted data value, corresponding to the inverse of the data value, in the second memory cell, wherein the sense amplifier is coupled, at an input terminal, to a first bit line coupled to the first memory cell and to a second bit line coupled to the second memory cell, and the sense amplifier is configured to read the data value stored in the pair of memory cells, based on a first potential of the first bit line and a second potential of the second bit line, wherein the controller is configured to perform: a first read operation in which the first memory cell is made to draw out the first potential of the first bit line, the second memory cell is made to draw out the second potential of the second bit line, and concurrently, the sense amplifier is made to generate a first data read value, a second read operation in which, based on the first data read value, a memory cell with a low threshold voltage of the pair of memory cells is made to draw out a third potential of a bit line coupled to the memory cell with the low threshold voltage, a memory cell with a high threshold voltage of the pair of memory cells and the bit line potential controller are made to draw out a fourth potential of a bit line coupled to the memory cell with a high threshold voltage, and concurrently, the sense amplifier is made to generate a second data read value based on the third potential and the fourth potential, a first error detection operation in which the error corrector is made to detect an error of the first data read value based on the second data read value and based on error correcting data, a first refresh operation in which, when the error corrector detects an error of the second data read value, the error corrector is made to generate error corrected data of which the error is corrected based on the second data read value and the error correcting data, and write the error corrected data in the pair of memory cells.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 95.0
- Lexical Diversity: 1.9434
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15650282', '15709125', '11177355', '11111870', '11766341']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7899230862957615
- 35 USC 102 Novelty (BERT): 0.5247065228451898
- Combined Prediction Score: 0.7634014299507043
- Mean Citation Score: 247.559772
- Max Citation Score: 364.27005
- Similarity Product: 331.2884998350799

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test