PATENT CLAIM ANALYSIS

Application Number: 15976856
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "071000"]

Abstract:
A display panel including a display region and a non-display region, a plurality of gate lines, a plurality of data lines, a pixel array and a gate on array circuit. The non-display region is located at one side of the display region. The plurality of gate lines and the plurality of data lines are disposed in the display region. The pixel array is located in the display region, wherein the pixel array is composed of a plurality of pixel units that are repeatedly arranged. The pixel units consist of three gate lines, two data lines and six sub-pixels, and each sub-pixel is electrically connected to one of the gate lines and one of the data lines located in the pixel array respectively. The gate on array circuit is disposed in the pixel array.

Claim (Index 13):
The display panel according to  claim 12 , wherein each of the plurality of driving units respectively comprises:\n a first active element, having a control end, a first end and a second end, wherein the control end is electrically connected to the post-stage input line, the first end is electrically connected to the power signal line; a second active element, having a control end, a first end and a second end, wherein the first end is electrically connected to the power signal line, the control end is electrically connected to the second end of the first active element; a third active element, having a control end, a first end and a second end, wherein the control end is electrically connected to the second end of the second active element, the first end is electrically connected to the power signal line; a fourth active element, having a control end, a first end and a second end, wherein the control end and the first end are electrically connected to the pre-stage input line, the second end is electrically connected to the second end of the first active element; a fifth active element, having a control end, a first end and a second end, wherein the control end is electrically connected to the second clock signal line, the first end is electrically connected to the output line, and the second end is electrically connected to the power signal line; a sixth active element, having a control end, a first end and a second end, wherein the control end is electrically connected to the second end of the second active element, the first end is electrically connected to the power signal line, and the second end is electrically connected to the output line; a seventh active element, having a control end, a first end and a second end, wherein the control end is electrically connected to the second end of the fourth active element, the first end is electrically connected to the output line, and the second end is electrically connected to the first clock signal line.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 93.0
- Lexical Diversity: 3.15217
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14788553', '13969618', '15924830', '13447309', '15180220']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9270925732598594
- 35 USC 102 Novelty (BERT): 0.4999232937542969
- Combined Prediction Score: 0.8843756453093032
- Mean Citation Score: 234.40719
- Max Citation Score: 243.18643
- Similarity Product: 172.69693075403214

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test