PATENT CLAIM ANALYSIS

Application Number: 15983682
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-02
Patent Classification: ["257", "773000"]

Abstract:
A semiconductor device includes a wiring structure, a stacked structure located over the wrong structure, channel structures passing through the stacked structure, contact plugs passing through the stacked structure and electrically connected to the wiring structure, and insulating spacers each including loop patterns surrounding a sidewall of each of the contact plugs and stacked along the side all of each of the contact plugs.

Claim (Index 9):
The semiconductor device of  claim 1 , wherein the contact plugs include first to 2nth contact plugs, first to nth insulating spacers of the first to nth contact plugs are coupled to each other, the nth insulating spacer of the nth contact plug and an (n+1)th insulating spacer of an (n+1)th contact plug are separated from each other, and the (n+1)th to 2nth insulating spacers of the (n+1)th to 2nth contact plugs are coupled to each other, where n is an integer of 2 or more.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 93.0
- Lexical Diversity: 1.91667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15815845', '15094016', '14731115', '15486845', '15980382']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9271319185194646
- 35 USC 102 Novelty (BERT): 0.4875820443136207
- Combined Prediction Score: 0.8831769310988802
- Mean Citation Score: 229.15042000000005
- Max Citation Score: 233.66798
- Similarity Product: 187.18008528731585

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test