PATENT CLAIM ANALYSIS

Application Number: 15960686
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-02
Patent Classification: ["375", "287000"]

Abstract:
A data recovery circuit adjusts skew between a first and second clock signals when a signal level of recovered data changes relative to first reference level between a first timing of the first clock signal and a second timing of the second clock signal. Prior to adjusting the skew, a first signal level of the recovered data at the first timing is compared to a second and/or a third reference level. A second signal level at the second timing is compared to the second and/or the third reference level. The skew is adjusted based on a first sign of an error of the first signal level relative to one of the second and third reference levels. The first sign is opposite to a second sign of an error of the second signal level relative to another one of the second and third reference levels.

Claim (Index 8):
The electronic circuit as claimed in  claim 1 , wherein:\n a second delay of the second clock signal increases when a first delay of the first clock signal decreases to adjust the skew, and the second delay decreases when the first delay increases to adjust the skew.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 91.0
- Lexical Diversity: 3.40909
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15392244', '11197118', '13055982', '12289073', '09978726']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5109654837519031
- 35 USC 102 Novelty (BERT): 0.4743108899571789
- Combined Prediction Score: 0.5073000243724307
- Mean Citation Score: 197.809936
- Max Citation Score: 209.17325
- Similarity Product: 175.19054627877475

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test