PATENT CLAIM ANALYSIS

Application Number: 15874680
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["257", "329000"]

Abstract:
A method of making a vertical field effect transistor includes forming a semiconductor nanowire that extends from a substrate surface. A first sacrificial layer is deposited over the substrate surface, and a second sacrificial layer is deposited over the first sacrificial layer such that each of the first and second sacrificial layers are formed peripheral to the nanowire. The second sacrificial layer is then patterned to form a dummy gate structure. Thereafter, the first sacrificial layer is removed and source and drain regions are deposited via epitaxy directly over respective portions of the nanowire.

Claim (Index 9):
The structure of  claim 1 , wherein the semiconductor nanowire has a height from 50 nm to 200 nm, and a rectangular or square cross section having a length from 1 nm to 50 nm, and a width from 1 nm to 50 nm.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 86.0
- Lexical Diversity: 1.88679
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15012468', '15399064', '13893896', '15338515', '15016875']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9261475181191606
- 35 USC 102 Novelty (BERT): 0.5162979586543006
- Combined Prediction Score: 0.8851625621726746
- Mean Citation Score: 258.46077599999995
- Max Citation Score: 281.13245
- Similarity Product: 175.7892863243103

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test