PATENT CLAIM ANALYSIS

Application Number: 15890127
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["341", "155000"]

Abstract:
The present disclosure provides a simplified, multiple-gain, front-end circuit for analog-to-digital converter systems. In an example, a front-end circuit for an analog-to-digital converter (ADC) can include first and second input amplifiers configured to receive an input signal, and a gain selection circuit coupled to the first input amplifier and the second input amplifier; the gain selection circuit comprising a plurality resistor strings, each resistor string including a plurality of resistors coupled in series, and wherein each string includes a first end node coupled to an output of the first input amplifier and a second end node coupled to an output of the second input amplifier.

Claim (Index 7):
The front-end circuit of  claim 6 , wherein the multiplexer is configured to bypass the resistor strings, and to couple the output of the first JFET input amplifier to an input of the first JFET input amplifier and coupling the output of the second JFET input amplifier to an input of the second JFET input amplifier.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 88.0
- Lexical Diversity: 2.14815
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14622750', '13719091', '14694428', '12196313', '15877098']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5808800930793028
- 35 USC 102 Novelty (BERT): 0.4700614105772978
- Combined Prediction Score: 0.5697982248291024
- Mean Citation Score: 137.64908799999998
- Max Citation Score: 139.32381999999998
- Similarity Product: 105.18435134932992

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test