PATENT CLAIM ANALYSIS

Application Number: 15877633
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["365", "185140"]

Abstract:
Techniques for suppression of program disturb in flash memory devices are described herein. In an example embodiment, an apparatus comprises a flash memory device coupled to a microprocessor. The flash memory device comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). A control circuit in the flash memory device is configured to regulate both a first voltage, of a selected SG line, and a second voltage, of an unselected BL, independently of a power supply voltage of the flash memory device, and to adjust at least one of the first voltage and the second voltage based on a measure of an operating temperature of the flash memory device.

Claim (Index 25):
The apparatus of  claim 21 , wherein the control circuit is configured to operate the first voltage lower than the power supply voltage.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 86.0
- Lexical Diversity: 2.26087
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15496993', '14869820', '15439086', '15365575', '11025822']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7737464811510973
- 35 USC 102 Novelty (BERT): 0.4915343585446976
- Combined Prediction Score: 0.7455252688904573
- Mean Citation Score: 192.625584
- Max Citation Score: 246.46634
- Similarity Product: 199.23552373006584

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test