PATENT CLAIM ANALYSIS

Application Number: 15956692
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "005000"]

Abstract:
A resistive random-access memory device formed on a semiconductor substrate includes an interlayer dielectric formed over the semiconductor substrate and includes a first via. A chemical-mechanical-polishing stop layer is formed over the interlayer dielectric. A lower metal layer formed in the first via presents a substantially planar top surface. A dielectric layer is formed over the chemical-mechanical-polishing stop layer and is in electrical contact with the lower metal layer. A barrier metal layer is formed over the dielectric layer. Edges of the dielectric layer and the first barrier metal layer form an aligned stack having edges extending beyond outer edges of the first via. A dielectric barrier layer including a second via is formed over the aligned stack and at least a portion of the chemical-mechanical-polishing stop layer. An upper metal layer formed in the second via in electrical contact with the barrier metal layer.

Claim (Index 20):
The resistive random-access memory device of  claim 19  wherein;\n the upper metal layer is formed from Cu; and \n the second barrier metal liner is formed from one of Ta, TaN, Ti, and TiN.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 91.0
- Lexical Diversity: 2.88679
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12829300', '12829305', '12829311', '14621139', '13840815']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9549068034074796
- 35 USC 102 Novelty (BERT): 0.62431478868288
- Combined Prediction Score: 0.9218476019350196
- Mean Citation Score: 476.844496
- Max Citation Score: 551.19934
- Similarity Product: 426.38174639223456

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test