PATENT CLAIM ANALYSIS

Application Number: 15948483
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["345", "204000"]

Abstract:
A timing controller includes a count control circuit, a pulse width detector, and a pulse generator. The count control circuit receives an external enable signal. Pulses of the external enable signal include an effective and a blank period of image data. The count control circuit counts pulse widths of each of the pulses. The pulse width detector receives the counted pulse widths, compares a pulse width of a present pulse with pulse widths of previous pulses, and detects a pulse width of a previous pulse that has a pulse width smaller than the pulse width of the present pulse. The pulse generator generates three output pulses having pulse widths that are one-third a period of the detected previous pulse. The pulse generator outputs the first, second and third pulses as an internal enable signal.

Claim (Index 9):
The timing controller of  claim 1 , wherein the first input pulse is immediately consecutive to the second input pulses, wherein the second input pulses are immediately consecutive pulses, and wherein the first output pulse, the second output pulse, and the third output pulse are immediately consecutive pulses.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 91.0
- Lexical Diversity: 2.5614
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12181522', '12364868', '14569938', '12243295', '12348186']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6718915214617617
- 35 USC 102 Novelty (BERT): 0.5495097422599856
- Combined Prediction Score: 0.6596533435415841
- Mean Citation Score: 253.27238
- Max Citation Score: 407.82785
- Similarity Product: 352.61705159227546

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test