PATENT CLAIM ANALYSIS

Application Number: 16215026
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["365", "205000"]

Abstract:
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry is configured to perform a logical operation using a data value stored in a first memory cell coupled to a sense line as a first input and a data value stored in a second memory cell coupled to the sense line as a second input. The sensing circuitry is configured to perform the logical operation without transferring data via a sense line address access.

Claim (Index 30):
A method, comprising:\n providing an instruction to a memory device from a host, wherein the memory device comprises an array of memory cells coupled to sensing circuitry comprising a sense amplifier and a compute component; and executing, on the memory device, the instruction to perform at least one of a NAND operation and an AND operation using data values stored in the array as inputs by controlling the sensing circuitry without transferring data externally from the array and the sensing circuitry.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 98.0
- Lexical Diversity: 2.125
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14715161', '13784219', '15688545', '13962399', '15439681']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8039331153752333
- 35 USC 102 Novelty (BERT): 0.4794931339695655
- Combined Prediction Score: 0.7714891172346665
- Mean Citation Score: 277.81162200000006
- Max Citation Score: 281.89883
- Similarity Product: 210.43880829232512

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test