PATENT CLAIM ANALYSIS

Application Number: 15964738
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["257", "365000"]

Abstract:
Semiconductor devices and fabrication methods are provided. A fabrication method includes: forming a source and drain material layer over a substrate; forming a mask layer over the source and drain material layer and including a first trench exposing a portion of the source and drain material layer; forming a protective layer on sidewalls of the first trench; forming a second trench in the source and drain material layer using the mask layer and the protective layer as an etch mask; removing the protective layer after the second trench is formed; forming a channel material layer and a gate structure on the channel material layer after the protective layer is removed; and removing the mask layer after the channel material layer and the gate structure are formed. The channel material layer is on the sidewalls and the bottom of the first trench and the second trench.

Claim (Index 8):
The method according to  claim 4 , further comprising:\n removing the filling layer after the gate structure material layer and the channel material film are planarized.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 91.0
- Lexical Diversity: 3.22917
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['11024935', '14554651', '10869764', '14900594', '15177362']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9191050080005838
- 35 USC 102 Novelty (BERT): 0.5003895478607551
- Combined Prediction Score: 0.8772334619866009
- Mean Citation Score: 237.931146
- Max Citation Score: 245.15678
- Similarity Product: 168.41655027665374

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test