PATENT CLAIM ANALYSIS

Application Number: 15903393
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["717", "128000"]

Abstract:
In one example, an apparatus comprises processing circuitry to analyze a program at compile time to determine a set of latency parameters associated with instruction sets implemented to execute the program and select a latency management technique based at least in part on the set of latency parameters associated with instruction sets implemented to execute the program. Other examples may be described and claimed.

Claim (Index 18):
The electronic device of  claim 16 , further comprising processing circuitry to:\n determine the set of latency parameters associated with instruction sets implemented to execute the program at a current hardware thread count; determine a composite latency score for the program from the set of latency parameters at the current thread count; and compare the composite latency score at the current hardware thread count to a threshold.

Metadata:
- Claim Count in Document: 48.0
- Percentile: 88.0
- Lexical Diversity: 1.52273
- Patent Class: 717.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15190663', '15482808', '14843698', '15482724', '15488547']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3584002404213857
- 35 USC 102 Novelty (BERT): 0.473837330616127
- Combined Prediction Score: 0.3699439494408598
- Mean Citation Score: 146.58155800000003
- Max Citation Score: 148.558
- Similarity Product: 114.1449208191633

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test