PATENT CLAIM ANALYSIS

Application Number: 16101566
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2020-02
Patent Classification: ["null", "null"]

Abstract:
A semiconductor device includes a semiconductor substrate, a metal layer, a dielectric layer, and a via. The metal layer is disposed above the semiconductor substrate. The dielectric layer is disposed between the metal layer and the semiconductor substrate. The via is embedded in the dielectric layer and comprises a first portion and a second portion between the first portion and the semiconductor substrate. The first portion of the via has a first width. The second portion of the via has a second width greater than the first width of the first portion.

Claim (Index 10):
The semiconductor device of  claim 9 , further comprising a hard mask layer adjacent to the source contact, wherein a top surface of the hard mask layer is lower than a bottom of the source via.

Metadata:
- Claim Count in Document: 33.0
- Percentile: 96.0
- Lexical Diversity: 3.36667
- Patent Class: nan
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14958769', '15986619', '15940872', '11377455', '12805226']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5107864647882084
- 35 USC 102 Novelty (BERT): 0.4637012959512044
- Combined Prediction Score: 0.5060779479045081
- Mean Citation Score: 168.989606
- Max Citation Score: 170.57983000000004
- Similarity Product: 135.05708096148376

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test