PATENT CLAIM ANALYSIS

Application Number: 15952798
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-02
Patent Classification: ["257", "401000"]

Abstract:
A semiconductor device includes a substrate including an active region defined by a device isolation layer. A word line structure is in a trench formed in an upper portion of the substrate. The word line structure includes a gate insulation pattern covering an inner surface of the trench. A gate electrode pattern is on the gate insulation pattern. A first work function pattern is between the gate insulation pattern and the gate electrode pattern. A second work function pattern is on the first work function pattern and extends along a side surface of the gate electrode pattern. The first work function pattern has a top surface at a level below that of a bottom surface of the gate electrode pattern. The first work function pattern has a work function greater than that of the second work function pattern.

Claim (Index 5):
The semiconductor device of  claim 3 , wherein the second work function pattern and the gate insulation pattern are in direct contact with each other on the top surface of the device isolation layer and the top surface of the fin region.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 91.0
- Lexical Diversity: 2.75472
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14165930', '14802643', '14455036', '15920628', '15618623']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.931229243924244
- 35 USC 102 Novelty (BERT): 0.4970283643516406
- Combined Prediction Score: 0.8878091559669837
- Mean Citation Score: 262.87960200000003
- Max Citation Score: 266.18042
- Similarity Product: 217.6705395936048

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test