PATENT CLAIM ANALYSIS

Application Number: 16016219
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "004000"]

Abstract:
A method is provided that includes forming a first vertically-oriented transistor above a substrate, the first vertically-oriented transistor comprising a first sidewall gate disposed in a first direction, forming a second vertically-oriented transistor above the substrate, the second vertically-oriented transistor including a second sidewall gate disposed in the first direction, and forming an air gap chamber above the substrate disposed between the first sidewall gate and the second sidewall gate, and extending in the first direction, the air gap chamber including an air gap.

Claim (Index 2):
The apparatus of  claim 1 , wherein the liner comprises a material having a tensile stress.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 94.0
- Lexical Diversity: 2.93548
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15370193', '14522777', '14542213', '15240998', '15172483']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9215618556667754
- 35 USC 102 Novelty (BERT): 0.5072553265837135
- Combined Prediction Score: 0.8801312027584692
- Mean Citation Score: 202.196862
- Max Citation Score: 204.26823
- Similarity Product: 117.31079218990445

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test