PATENT CLAIM ANALYSIS

Application Number: 15861055
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-09
Patent Classification: ["257", "295000"]

Abstract:
A ferroelectric memory device includes a first electrode layer disposed on a substrate, a first tunnel barrier layer disposed on the first electrode layer, a second electrode layer disposed on the first tunnel barrier layer, a second tunnel barrier layer disposed on the second electrode layer, and a third electrode layer disposed on the second tunnel barrier layer. Any one of the first and second tunnel barrier layers includes a ferroelectric material.

Claim (Index 9):
The ferroelectric memory device of  claim 8 ,\n wherein the first electrode layer or the third electrode layer having the electron accumulation region or the electron depletion region comprises at least one selected from doped silicon, a ruthenium oxide (RuO 2 ), an iridium oxide (IrO 2 ), a niobium-doped strontium titanium oxide (Nb-doped SrTiO 3 , Nb:STO), a lanthanum strontium manganese oxide (La 0.7 Sr 0.3 MnO 3 ), and a lanthanum calcium manganese oxide (La 0.5 Ca 0.5 MnO 3 ).

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 3.12
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15860851', '15839849', '15858056', '15218795', '10925147']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.925704263788336
- 35 USC 102 Novelty (BERT): 0.5046265963821628
- Combined Prediction Score: 0.8835964970477188
- Mean Citation Score: 247.556956
- Max Citation Score: 278.64154
- Similarity Product: 218.15408514024853

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test