PATENT CLAIM ANALYSIS

Application Number: 15757057
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["257", "607000"]

Abstract:
A method of manufacturing a substrate with reduced threading dislocation density is disclosed, which comprises: (i) at a first temperature, forming a first layer of wafer material on a semiconductor substrate, the first layer arranged to be doped with a first concentration of at least one dopant that is different to the wafer material; and (ii) at a second temperature higher than the first temperature, forming a second layer of the wafer material on the first layer to obtain the substrate, the second layer arranged to be doped with a progressively decreasing concentration of the dopant during formation, the doping configured to be decreased from the first concentration to a second concentration. The wafer material and dopant are different to silicon. A related substrate is also disclosed.

Claim (Index 5):
The method of  claim 1 , wherein the semiconductor substrate is a silicon substrate with 6\u00b0 off-cut toward [110] direction.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 90.0
- Lexical Diversity: 2.32787
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13643766', '12893777', '15309989', '11941629', '11227770']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9338897845403488
- 35 USC 102 Novelty (BERT): 0.5035099214036504
- Combined Prediction Score: 0.890851798226679
- Mean Citation Score: 254.752322
- Max Citation Score: 258.98157000000003
- Similarity Product: 180.85427176349404

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test