PATENT CLAIM ANALYSIS

Application Number: 16003996
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["365", "189090"]

Abstract:
Various implementations described herein refer to an integrated circuit having dummy wordline driver circuitry coupled to a dummy wordline and dummy bitline pulldown circuitry coupled between a dummy bitline and the dummy wordline. The integrated circuit may include dummy wordline tracking circuitry coupled to the dummy wordline between the dummy wordline driver circuitry and the dummy bitline pulldown circuitry. The dummy wordline tracking circuitry may have one or more variable capacitors that are coupled between the dummy wordline and a variable voltage source.

Claim (Index 21):
The integrated circuit of  claim 19 , wherein the at least one first variable capacitor and the at least one second variable capacitor are implemented with a transistor that is coupled together to operate as a capacitor, wherein the at least one variable capacitor have a first terminal that is a gate of the transistor, and wherein the at least one variable capacitor have a second terminal that is a source/drain connection of the transistor.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 94.0
- Lexical Diversity: 2.38889
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15357691', '15789715', '15690562', '13662504', '15238551']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7861973641903116
- 35 USC 102 Novelty (BERT): 0.4884609776235039
- Combined Prediction Score: 0.7564237255336308
- Mean Citation Score: 220.842534
- Max Citation Score: 242.51895
- Similarity Product: 198.73747815365195

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test