PATENT CLAIM ANALYSIS

Application Number: 16012715
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["365", "230060"]

Abstract:
Examples described herein include command latency shifters which may include a plurality of registers arranged in a folded topology.

Claim (Index 13):
A shifter comprising:\n an input register; a first plurality of registers, including the input register, coupled in series and positioned for signal propagation along a first direction; an output register; a second plurality of registers, including the output register, coupled in series and positioned for signal propagation along a second direction, opposite to the first direction; and a multiplexer configured to combine an output of a selected one of the first plurality of registers with an output of a selected one of the second plurality of registers responsive to a control signal; and wherein the input register and the output register are positioned adjacent one another on a same end of the shifter.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 94.0
- Lexical Diversity: 1.11111
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['11594807', '15063229', '12585428', '14698550', '11896788']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7865513616756963
- 35 USC 102 Novelty (BERT): 0.4614644045071058
- Combined Prediction Score: 0.7540426659588373
- Mean Citation Score: 158.75661200000005
- Max Citation Score: 165.16328
- Similarity Product: 124.98813703022957

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test