PATENT CLAIM ANALYSIS

Application Number: 16291231
Application Type: Utility
Filing Date: 2019-03
Publication Date: 2019-06
Patent Classification: ["708", "204000"]

Abstract:
Embodiments of an instruction, its operation, and executional support for the instruction are described. In some embodiments, a processor comprises decode circuitry to decode an instruction having fields for an opcode, a packed data source operand identifier, and a packed data destination operand identifier; and execution circuitry to execute the decoded instruction to convert a single precision floating point data element of a least significant packed data element position of the identified packed data source operand to a fixed-point representation, store the fixed-point representation as 32-bit integer and a 32-bit integer exponent in the two least significant packed data element positions of the identified packed data destination operand, and zero of all remaining packed data elements of the identified packed data destination operand.

Claim (Index 5):
The processor of  claim 4 , wherein the execution circuitry is to:\n deconstruct the floating point value into sign, exponent, and fractional components, determine if the exponent component is 0, when the exponent component is 0, set the fixed-point integer and exponent components to zero, when the exponent component is not 0, determine if the exponent component is all ones,\n when the exponent component is all ones,\n determine if the most significant bit of the fractional component is 0,\n when the most significant bit of the fractional component is 0, determine if the sign is 0, \n \u2003when the sign is 0, set the fixed-point integer component to a value corresponding to hexadecimal 7fffffff and the exponent component to a value corresponding to hexadecimal 7fffffff, and \n \u2003when the sign is not 0, set the fixed-point integer component to a value corresponding to hexadecimal 8000000 and the exponent component to a value corresponding to hexadecimal 7fffffff, \n when the most significant bit of the fractional component is not 0, set the fixed-point integer component to h8000000 and the exponent component to h7fffffff, and \n \n \n when the exponent component is not all ones or zeros,\n concatenate b000000001 with the fractional to generate an absolute value of the integer, \n determine if the sign is 0,\n when the sign is 0 set the integer component as the absolute value of the integer, and \n when the sign is not 0 set the integer component as the complement of the absolute value of the integer plus 1, and \n \n generate a temporary value by concatenating b0 with the exponent added to b101101010, \n generate the exponent component by concatenating 23 copies of the most significant bit of the temporary value with the temporary value, and \n \n store the integer and exponent components.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 2.18033
- Patent Class: 708.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15721573', '15721602', '16291245', '13991885', '12549724']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4941916712285479
- 35 USC 102 Novelty (BERT): 0.5637960098791178
- Combined Prediction Score: 0.501152105093605
- Mean Citation Score: 286.750904
- Max Citation Score: 415.42297
- Similarity Product: 412.9218721553559

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test