PATENT CLAIM ANALYSIS

Application Number: 16198546
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["438", "128000"]

Abstract:
An interconnection structure of the semiconductor integrated circuit device may be provided. The interconnection structure may include a first conductive pattern, a second conductive pattern, a dielectric layer and a contact part. The first conductive pattern may have a first width and a first length. The second conductive pattern may be formed over the first conductive pattern. The second conductive pattern may have a second width and a second length. The dielectric layer may be interposed between the first conductive to pattern and the second conductive pattern. The contact part may be configured to simultaneously make contact with the first conductive pattern and the second conductive pattern.

Claim (Index 7):
The method of  claim 5 , wherein forming the contact part comprises;\n forming an insulating interlayer on the semiconductor substrate after forming the first conductive pattern; etching the insulating interlayer and the spacer to form a contact hole configured to simultaneously expose the first and second conductive patterns; and filling the contact hole with a conductive material.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 98.0
- Lexical Diversity: 3.05263
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15651117', '11627139', '11264023', '10989930', '10932416']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8637869283507815
- 35 USC 102 Novelty (BERT): 0.4939360288033507
- Combined Prediction Score: 0.8268018383960385
- Mean Citation Score: 177.187736
- Max Citation Score: 229.60295
- Similarity Product: 173.22625009596646

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test