PATENT CLAIM ANALYSIS

Application Number: 16050240
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-02
Patent Classification: ["707", "705000"]

Abstract:
In some embodiments, a PPM interface may be provided with functionality to facilitate to an OS memory power state management for one or more memory nodes, regardless of a particular platform hardware configuration, as long as the platform hardware is in conformance with the PPM interface.

Claim (Index 39):
The apparatus of  claim 38 , further comprising:\n a fourth field to provide an indication of average power consumed for the memory power node in the first memory power state; a fifth field to provide a percentage of power saved in the first memory power state relative to an active MPS0 state; and a sixth field to provide latency of exiting out of the first memory power state to the active MPS0 state.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 95.0
- Lexical Diversity: 1.31579
- Patent Class: 707.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13977635', '13683748', '13977625', '13977593', '15396726']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.1852656855729268
- 35 USC 102 Novelty (BERT): 0.5269502171647883
- Combined Prediction Score: 0.2194341387321129
- Mean Citation Score: 240.312764
- Max Citation Score: 313.29358
- Similarity Product: 171.17468937474132

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test