PATENT CLAIM ANALYSIS

Application Number: 15868901
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["365", "182000"]

Abstract:
A microelectronic component is capable of being used as a memory cell. The component includes a semiconductor layer resting on an insulating layer and including a doped source region of a first conductivity type, a doped drain region of a second conductivity type, and an intermediate region, non-doped or more lightly doped, with the second conductivity type, than the drain region, the intermediate region including first and second portions respectively extending from the drain region and from the source region. An insulated front gate electrode rests on the first portion. A first back gate electrode and a second back gate electrode are arranged under the insulating layer, respectively opposite the first portion and the second portion.

Claim (Index 16):
The method of  claim 15 , wherein writing the second logic value comprises maintaining the first control signal at the reference voltage and, wherein the reading comprises maintaining the second control signal at the second voltage level.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 2.26786
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15464537', '10848236', '15185388', '10121596', '10848614']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7837453156330597
- 35 USC 102 Novelty (BERT): 0.4900159221329102
- Combined Prediction Score: 0.7543723762830448
- Mean Citation Score: 139.09598899999995
- Max Citation Score: 224.66919
- Similarity Product: 157.09980672885237

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test