PATENT CLAIM ANALYSIS

Application Number: 15935867
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["438", "466000"]

Abstract:
A method of structuring and/or thinning a semiconductor wafer having a plurality of functional chip sites includes forming one or more semiconductor devices in a device region of each functional chip site at a frontside of the semiconductor wafer, and forming an electrode at one of the frontside or a backside of the semiconductor wafer. The side of the semiconductor wafer at which the electrode is formed is structured by applying voltage pulses between the electrode and a tool electrode positioned above the semiconductor wafer as part of an electrical discharge machining (EDM) process before the electrode is removed by the EDM process, and between the tool electrode and an intrinsic conductive layer formed on the side of the semiconductor wafer being structured after the electrode is removed by the EDM process.

Claim (Index 10):
The method of  claim 1 , further comprising:\n rotating the tool electrode and/or the semiconductor wafer as part of the EDM process.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 90.0
- Lexical Diversity: 2.12308
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10065589', '14179526', '13019658', '13614433', '13284546']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8563381510262429
- 35 USC 102 Novelty (BERT): 0.500212027909946
- Combined Prediction Score: 0.8207255387146133
- Mean Citation Score: 204.639812
- Max Citation Score: 224.48564
- Similarity Product: 145.439747049098

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test