PATENT CLAIM ANALYSIS

Application Number: 15903666
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["365", "230030"]

Abstract:
Disclosed herein is a semiconductor device that includes an access control circuit generating an internal command based on a verification result signal and an external command. The external command indicates at least one of a first command that enables the access control circuit to access a first circuit and a second command that enables the access control circuit not to access the first circuit or enables the access control circuit to maintain a current state of the first circuit. The access control circuit, when the verification result signal indicates a first logic level, generates the internal command based on the external command. The access control circuit, when the verification result signal indicates a second logic level, generates the internal command that corresponds to a second command even if the external command indicates a first command.

Claim (Index 14):
The system of  claim 9 , wherein the verification signal is a parity signal, the parity signal being indicative of whether the address signal ADD and the command signal CMD comprise an even number of high level bits.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 88.0
- Lexical Diversity: 3.04255
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14836315', '13618834', '14295231', '15229417', '15875574']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8588295293680434
- 35 USC 102 Novelty (BERT): 0.5637045448677808
- Combined Prediction Score: 0.8293170309180171
- Mean Citation Score: 413.796906
- Max Citation Score: 494.91815
- Similarity Product: 371.2637475240737

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test