PATENT CLAIM ANALYSIS

Application Number: 15939987
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-10
Patent Classification: ["330", "069000"]

Abstract:
Provided is a differential amplification device reduced in DC offset voltage. The amplification device amplifies an input signal, and includes a chopper switch circuit which switches the polarity of the input signal between a normal phase and a reverse phase and outputs the input signal, a V-I conversion circuit which is connected to the chopper switch circuit, a capacitance circuit which is connected to the V-I conversion circuit to store electric charges supplied from the V-I conversion circuit, and an amplification circuit which is connected to the V-I conversion circuit to switch the polarity of an input signal between the normal phase and the reverse phase and amplify the input signal.

Claim (Index 2):
A differential amplification device according to  claim 1 ,\n wherein the capacitance circuit includes a terminal  1 , a terminal  2 , a terminal  3 , a switch  1 , a switch  2 , a switch  3 A, a switch  3 B, a switch  4 A, a switch  4 B, a capacitor  1 , a capacitor  2 , a capacitor  3 , and a capacitor  4 , wherein the terminal  1  is connected to a first terminal of the switch  1 , wherein the switch  1  includes a second terminal connected to a first terminal of the switch  3 A, to a first terminal of the switch  4 A, and to a first terminal of the capacitor  1 , wherein the switch  3 A includes a second terminal connected to a second terminal of the switch  4 B and to a first terminal of the capacitor  2 , wherein the switch  4 A includes a second terminal connected to a second terminal of the switch  3 B and to a first terminal of the capacitor  3 , wherein the terminal  2  is connected to a first terminal of the switch  2 , wherein the switch  2  includes a second terminal connected to a first terminal of the switch  3 B, to a first terminal of the switch  4 B, and to a first terminal of the capacitor  4 , wherein the terminal  3  is connected to a second terminal of the capacitor  1 , to a second terminal of the capacitor  2 , to a second terminal of the capacitor  3 , and to a second terminal of the capacitor  4 , wherein on/off operation of the switch  1  and on/off operation of the switch  2  are opposite to each other, and wherein on/off operation of the switch  3 A and the switch  3 B and on/off operation of the switch  4 A and switch  4 B are opposite to each other.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 90.0
- Lexical Diversity: 2.65909
- Patent Class: 330.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11896899', '15608182', '15565191', '14017447', '15293675']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7617869324004145
- 35 USC 102 Novelty (BERT): 0.4874721726883498
- Combined Prediction Score: 0.7343554564292081
- Mean Citation Score: 191.761112
- Max Citation Score: 199.341
- Similarity Product: 157.0430882263184

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test