PATENT CLAIM ANALYSIS

Application Number: 16021083
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["307", "052000"]

Abstract:
A load balancing circuit comprising a first power source, a first field effect transistor (FET) device having a drain terminal connected to the first power source and a source terminal connected to a first node, a first resistor connected to the first node and a second node, a load connected to the second node, a second FET device having a drain terminal connected to the first node and a source terminal connected to the second node, a third FET device having a collector terminal connected to a gate terminal of the first FET device and an emitter terminal connected to the second node, and a second resistor connected to a base terminal of the third FET device and the first node.

Claim (Index 3):
The system of  claim 1 , wherein the second load balancing switching circuit comprises:\n a first field effect transistor (FET) device having a drain terminal connected to the second power source and a source terminal connected to a first node; a first resistor connected to the first node and a second node; a second resistor connected to the second node and a third node; a second FET device having a source terminal connected to the third node, a drain terminal connected to a load, and a gate terminal connected to a gate terminal of the first FET device; a third FET device having a drain terminal connected to the first node and a source terminal connected to the second node; a fourth FET device having a source terminal connected to the second node and a drain terminal connected to the third node; a first bipolar device having a collector terminal connected to a gate terminal of the first FET device and an emitter terminal connected to the second node; a second bipolar device having a collector terminal connected to a gate terminal of the second FET device and an emitter terminal connected to the second node; a third resistor connected to a base terminal of the first bipolar device and the first node; and a fourth resistor connected to a base terminal of the second bipolar device and the third node.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 94.0
- Lexical Diversity: 3.71429
- Patent Class: 307.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14845379', '13687739', '14238770', '14905737', '14557113']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7896902594474889
- 35 USC 102 Novelty (BERT): 0.4987842929404085
- Combined Prediction Score: 0.7605996627967809
- Mean Citation Score: 212.069778
- Max Citation Score: 289.35327
- Similarity Product: 273.3862180970227

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test