PATENT CLAIM ANALYSIS

Application Number: 15960096
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["438", "587000"]

Abstract:
A semiconductor device includes first and second FETs including first and second channel regions, respectively. The first and second FETs include first and second gate structures, respectively. The first and second gate structures include first and second gate dielectric layers formed over the first and second channel regions and first and second gate electrode layers formed over the first and second gate dielectric layers. The first and second gate structures are aligned along a first direction. The first gate structure and the second gate structure are separated by a separation plug made of an insulating material. A width of the separation plug in a second direction perpendicular to the first direction is smaller than a width of the first gate structure in the second direction, when viewed in plan view.

Claim (Index 20):
The semiconductor device of  claim 19  wherein the first and the second separation plugs are aligned in the second direction.

Metadata:
- Claim Count in Document: 48.0
- Percentile: 91.0
- Lexical Diversity: 2.78
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14932383', '15481672', '15486549', '15392693', '15086433']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8706808786095284
- 35 USC 102 Novelty (BERT): 0.4895696346388974
- Combined Prediction Score: 0.8325697542124654
- Mean Citation Score: 215.637522
- Max Citation Score: 222.4193
- Similarity Product: 168.37532745041847

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test