PATENT CLAIM ANALYSIS

Application Number: 16013956
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["174", "251000"]

Abstract:
A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.

Claim (Index 13):
The manufacturing method of the circuit board structure as recited in  claim 1 , wherein the first build-up circuit structure comprises at least one first dielectric layer, at least one the first patterned conductive layer, and at least one first conductive through hole structure passing through the first dielectric layer, the first dielectric layer and the first patterned conductive layer are stacked in sequence on the upper surface of the core layer, and the first patterned conductive layer is electrically connected to the first patterned circuit layer through the first conductive through hole structure, and wherein the second build-up circuit structure comprises at least one second dielectric layer, at least one second patterned conductive layer, and at least one second conductive through hole structure passing through the second dielectric layer, the second dielectric layer and the second patterned conductive layer are stacked in sequence on the lower surface of the core layer, and the second patterned conductive layer is electrically connected to the second patterned circuit layer through the second conductive through hole structure.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 94.0
- Lexical Diversity: 2.83929
- Patent Class: 174.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14997583', '15287718', '15011649', '16008060', '15822222']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8648197437651621
- 35 USC 102 Novelty (BERT): 0.5065985992698249
- Combined Prediction Score: 0.8289976293156285
- Mean Citation Score: 264.46526600000004
- Max Citation Score: 318.1863
- Similarity Product: 310.1062130536796

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test