PATENT CLAIM ANALYSIS

Application Number: 16104709
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["365", "145000"]

Abstract:
Apparatuses and methods are disclosed that include ferroelectric memory cells. An example ferroelectric memory cell includes two transistors and two capacitors. Another example ferroelectric memory cell includes three transistors and two capacitors. Another example ferroelectric memory cell includes four transistors and two capacitors.

Claim (Index 1):
An apparatus, comprising:\n a first capacitor including a first plate, a second plate, and a ferroelectric material disposed between the first and second plates, the first plate coupled to a plate line structure; a second capacitor including a first plate, a second plate, and a ferroelectric material disposed between the first and second plates, the first plate coupled to the plate line structure; a first transistor vertically displaced relative to the first capacitor and coupled to the second plate of the first capacitor; and a second transistor vertically displaced relative to the second capacitor and coupled to the second plate of the second capacitor.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 96.0
- Lexical Diversity: 2.2381
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15678978', '15679016', '16058202', '15679032', '15919994']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8123529096069648
- 35 USC 102 Novelty (BERT): 0.5106679856345987
- Combined Prediction Score: 0.7821844172097282
- Mean Citation Score: 249.98536600000003
- Max Citation Score: 334.1724
- Similarity Product: 318.8473159955978

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test