PATENT CLAIM ANALYSIS

Application Number: 16140201
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-03
Patent Classification: ["257", "401000"]

Abstract:
A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a first conductive region within the first ILD layer, selectively removing a portion of the first conductive region to form a concave top surface of the first conductive region. The method also includes forming a second ILD layer over the first ILD layer and forming a second conductive region within the second ILD layer and on the concave top surface. The concave top surface provides a large contact area, and hence reduced contact resistance between the first and second conductive regions.

Claim (Index 14):
A semiconductor device, comprising:\n a fin structure on a substrate; a source/drain region over the fin structure; and a contact structure over the source/drain region, wherein:\n the contact structure comprises a plurality of contact sub-structures connected to one another; and \n the contact structure comprises at least one concave surface over one or more of the plurality of contact sub-structures.

Metadata:
- Claim Count in Document: 48.0
- Percentile: 97.0
- Lexical Diversity: 2.57447
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15684257', '15598717', '14180932', '15236765', '11833128']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9233794802087776
- 35 USC 102 Novelty (BERT): 0.5131055827644264
- Combined Prediction Score: 0.8823520904643424
- Mean Citation Score: 236.719892
- Max Citation Score: 295.1766
- Similarity Product: 217.24492857398988

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test