PATENT CLAIM ANALYSIS

Application Number: 16045468
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-04
Patent Classification: ["365", "189020"]

Abstract:
Apparatuses and methods for a multi-level communication architectures are disclosed herein. An example apparatus may include an input/output (I/O) circuit comprising a driver circuit configured to convert a first bitstream directed to a first memory device and a second bitstream directed to a second memory device into a single multilevel signal. The driver circuit is further configured to drive the multilevel signal onto a signal line coupled to the first memory device and to the second memory device using a driver configured to drive more than two voltages.

Claim (Index 8):
The apparatus of  claim 7 , wherein the receiver and decoder circuit comprises a plurality of comparators, wherein a comparator of the plurality of comparators is configured to compare a signal level of the second multilevel signal with a reference level and to provide a comparison signal based on the comparison, wherein the decoded second multilevel signal to provide the third signal and the fourth signal is based at least in part on the comparison signal.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 95.0
- Lexical Diversity: 1.82353
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15729393', '15004777', '15465421', '15783688', '15348578']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7603658699061425
- 35 USC 102 Novelty (BERT): 0.5100852749339011
- Combined Prediction Score: 0.7353378104089184
- Mean Citation Score: 177.66978600000004
- Max Citation Score: 317.33258
- Similarity Product: 309.484766586392

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test