PATENT CLAIM ANALYSIS

Application Number: 15970242
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-03
Patent Classification: ["326", "030000"]

Abstract:
A memory system includes: a buffer memory device including a reference voltage pad; a memory controller including a controller ZQ pad; and a controller calibration resistor, wherein the reference voltage pad, the controller ZQ pad, and the controller calibration resistor are coupled to each other.

Claim (Index 21):
A transmission system comprising:\n first and second devices; and a transmission line suitable for transferring a signal between the first and second devices, wherein the first device matches impedances between the first device and the transmission line with reference to a first calibration resistance, and wherein the second device matches impedances between the second device and the transmission line with reference to a second calibration resistance and the voltage of the first calibration resistance when the first device completes the impedance matching.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 93.0
- Lexical Diversity: 1.92593
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15968026', '15968065', '15922332', '13239478', '14723614']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6919985672107501
- 35 USC 102 Novelty (BERT): 0.5243722063986451
- Combined Prediction Score: 0.6752359311295397
- Mean Citation Score: 289.317988
- Max Citation Score: 361.8324
- Similarity Product: 241.7349639113903

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test