PATENT CLAIM ANALYSIS

Application Number: 15861128
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-11
Patent Classification: ["257", "183000"]

Abstract:
An integrated circuit includes a first and second set of gate structures. A center of each of the first set of gate structures is separated from a center of an adjacent gate of the first set of gate structures in a first direction by a first pitch. A center of each of the second set of gate structures is separated from a center of an adjacent gate of the second set of gate structures in the first direction by the first pitch. The first and second set of gate structures extend in a second direction. A gate of the first set of gate structures is aligned in the second direction with a corresponding gate of the second set of gate structures. The gate of the first set of gate structures is separated from the corresponding gate of second set of gate structures in the second direction by a first distance.

Claim (Index 15):
The method of  claim 12 , wherein\n a layout pattern of the first set of gate layout patterns is aligned in the first direction with a corresponding layout pattern of the second set of gate layout patterns.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 86.0
- Lexical Diversity: 4.875
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15682885', '14484588', '15465167', '15258932', '14554958']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9169754642866774
- 35 USC 102 Novelty (BERT): 0.4903713860987221
- Combined Prediction Score: 0.874315056467882
- Mean Citation Score: 174.56595199999995
- Max Citation Score: 199.45
- Similarity Product: 139.369911596179

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test