PATENT CLAIM ANALYSIS

Application Number: 15960523
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["327", "157000"]

Abstract:
An apparatus includes an oscillator, a frequency divider, a phase circuit, a charge pump, and a filter. The frequency divider may generate an early feedback signal using a clock signal, and may assert a feedback signal a number of periods of the clock signal after asserting the early feedback signal. The phase circuit may generate a charge control signal using a reference clock signal and the feedback signal, and may generate a discharge control signal using the early feedback signal, the reference clock signal, and the feedback signal. The charge pump may charge or discharge a circuit node using the charge control signal and the discharge control signal to generate a frequency control signal. The filter circuit may attenuate at least one frequency component of the frequency control signal. The oscillator circuit may modify a frequency of the clock signal using the frequency control signal.

Claim (Index 11):
The method of  claim 10 , further comprising de-asserting the charge signal and the discharge signal after a delay of a particular amount of time from determining that the charge signal and the control signal are asserted.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 91.0
- Lexical Diversity: 3.69767
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15421884', '15429948', '12353846', '15675160', '14868785']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7850683097588675
- 35 USC 102 Novelty (BERT): 0.5401450827049415
- Combined Prediction Score: 0.760575987053475
- Mean Citation Score: 291.572802
- Max Citation Score: 410.62427
- Similarity Product: 302.95775511365656

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test