PATENT CLAIM ANALYSIS

Application Number: 15957742
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["365", "065000"]

Abstract:
Methods and devices for reading a memory cell using multi-stage memory sensing are described. The memory cell may be coupled to a digit line after the digit line during a read operation. A transistor may be activated to couple an amplifier capacitor with the digit line during the read operation. The transistor may be deactivated for a portion of the read operation to isolate the amplifier capacitor from the digit line while the memory cell is coupled to the digit line. The transistor may be reactivated to recouple the amplifier capacitor to the digit line to help determine the value of the memory cell.

Claim (Index 23):
The memory device of  claim 22 , wherein the controller is further configured to:\n compare a voltage at a first node of the amplifier capacitor to a reference voltage, wherein determining the value is based at least in part on the comparison.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 91.0
- Lexical Diversity: 2.36957
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15923700', '15957790', '15857091', '15276139', '15858747']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8272646955260288
- 35 USC 102 Novelty (BERT): 0.5072250927112107
- Combined Prediction Score: 0.795260735244547
- Mean Citation Score: 267.48352400000005
- Max Citation Score: 285.1140000000001
- Similarity Product: 187.1415802080632

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test