PATENT CLAIM ANALYSIS

Application Number: 15765266
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["709", "213000"]

Abstract:
Processing apparatus in the form of a parallel processing configuration having a plurality of processors and at least one shared memory that is shared between the processors. Each processor is operated at a clock speed that is lower than the clock speed of the memory.

Claim (Index 3):
Processing apparatus as claimed in  claim 1  wherein each processor is connected to more than one other processor via at least one shared data memory.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 91.0
- Lexical Diversity: 1.56667
- Patent Class: 709.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12147332', '11850761', '09909507', '11531387', '12781314']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2344742158663871
- 35 USC 102 Novelty (BERT): 0.4599611016601398
- Combined Prediction Score: 0.2570229044457623
- Mean Citation Score: 132.88912
- Max Citation Score: 142.53603
- Similarity Product: 113.7924043141812

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test