PATENT CLAIM ANALYSIS

Application Number: 15933695
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-01
Patent Classification: ["257", "324000"]

Abstract:
A semiconductor device includes first gate electrodes including a first lower electrode, a first upper electrode disposed above the first lower electrode and including a first pad region, and one or more first intermediate electrodes disposed between the first lower electrode and the first upper electrode. Second gate electrodes include a second lower electrode, a second upper electrode disposed above the second lower electrode, and one or more second intermediate electrodes disposed between the second lower electrode and the second upper electrode. The second gate electrodes are sequentially stacked above the first upper electrode, while exposing the first pad region. The first lower electrode extends by a first length, further than the first upper electrode, in a first direction. The second lower electrode extends by a second length, different from the first length, further than the second upper electrode, in the first direction.

Claim (Index 7):
A semiconductor device comprising:\n a substrate including a memory cell region and a contact region; and gate electrodes disposed on the memory cell region of the substrate and extending into the contact region, wherein the gate electrodes include word lines having word line pad regions, and upper gate lines disposed on the word lines and having upper pad regions, the word line pad regions are arranged to have a first step in a first direction from the memory cell region to the contact region while being substantially parallel to an upper surface of the substrate, and are arranged to have a second step, smaller than the first step, in a second direction, perpendicular to the first direction, while being parallel to the upper surface of the substrate, among the word lines, word lines located at different heights extend to have different lengths in the first direction from the memory cell region, and the upper gate lines include upper pad regions arranged to have a third step, smaller than the first step in the first direction and arranged to have the same height in the second direction.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 90.0
- Lexical Diversity: 3.67442
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15608076', '15415248', '15928559', '15381823', '15437426']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9057714027740196
- 35 USC 102 Novelty (BERT): 0.5044655539178178
- Combined Prediction Score: 0.8656408178883993
- Mean Citation Score: 245.958108
- Max Citation Score: 278.02454
- Similarity Product: 234.62957283293963

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test