PATENT CLAIM ANALYSIS

Application Number: 15991739
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["365", "154000"]

Abstract:
A device is disclosed that includes a plurality of first memory cells, a plurality of second memory cells, a power circuit, and a header circuit. The power circuit us configured to provide the first power voltage for the plurality of first memory cells, and to provide the second power voltage, that is independent from the first power voltage, for the plurality of second memory cells. The header circuit is configured to provide, during the write operation, the first voltage smaller than the first power voltage, the second power voltage, or the combination thereof, for corresponding memory cells of the plurality of first memory cells and the plurality of second memory cells.

Claim (Index 7):
The device of  claim 5 , further comprising:\n a control circuit configured to receive data signals that are received by the plurality of first memory cells, and configured to generate, based on the received data signals, a control signal for turning off the first switch.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 3.28947
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15336633', '13646238', '14461156', '15066914', '13902439']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7898007503735983
- 35 USC 102 Novelty (BERT): 0.4981878526113875
- Combined Prediction Score: 0.7606394605973772
- Mean Citation Score: 211.3533
- Max Citation Score: 308.12067
- Similarity Product: 293.0861102396214

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test