PATENT CLAIM ANALYSIS

Application Number: 16170124
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["327", "543000"]

Abstract:
A low dropout voltage (LDO) regulator including: a coarse loop circuit configured to receive an input voltage, generate a coarse code and adjust a coarse current according to the coarse code; a digital controller configured to receive the coarse code and generate a fine loop control signal according to the coarse code; and a fine loop circuit configured to receive the input voltage and the fine loop control signal and adjust a fine current according to the input voltage and the fine loop control signal, wherein the coarse current and the fine current adjust a level of an output voltage.

Claim (Index 18):
A user device, comprising:\n a power management integrated circuit (PMIC) configured to generate a power supply voltage; and an application processor configured to receive the power supply voltage from the PMIC through a power line, wherein the application processor includes a plurality of low dropout voltage (LDO) regulators each configured to generate an internal power supply voltage to provide a load circuit with the internal power supply voltage through an output terminal, at least one of the LDO regulators comprising: a coarse loop circuit configured to receive an input voltage from the output terminal, output a coarse code, adjust a coarse current according to the coarse code and supply the coarse current to the output terminal of the LDO regulator; a fine loop circuit configured to receive the input voltage, generate fine code in response to a fine loop control signal and supply a fine current to the output terminal after the coarse current has been supplied to the output terminal; and a digital controller configured to receive the coarse code from the coarse loop circuit, generate the fine loop control signal, and set an initial current of the fine loop circuit in a way that reduces a transition effect due to a loop change.  19 : The user device of  claim 18 , wherein the load circuit includes one or more of a central processing unit (CPU), a display, and a memory controller,

Metadata:
- Claim Count in Document: 9.0
- Percentile: 97.0
- Lexical Diversity: 2.84211
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15216147', '13528303', '15271680', '14556110', '14714256']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7792571338977305
- 35 USC 102 Novelty (BERT): 0.5666238026518428
- Combined Prediction Score: 0.7579938007731417
- Mean Citation Score: 297.98982
- Max Citation Score: 467.24194000000006
- Similarity Product: 405.6253939310694

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test