PATENT CLAIM ANALYSIS

Application Number: 15921771
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["365", "189011"]

Abstract:
Provided are a voltage control circuit including an assist circuit and a memory device including the voltage control circuit. The memory device includes: a volatile memory cell array, which is connected to a plurality of word lines and includes a memory cell including at least one transistor; and an assist circuit, which is connected to at least one of the plurality of word lines and adjusts a driving voltage level of each of the plurality of word lines, wherein the assist circuit includes a diode N-channel metal oxide semiconductor (NMOS) transistor having a gate and a drain connected to each other.

Claim (Index 26):
The memory device according to  claim 25 , wherein one end of each of the plurality of switching transistors is connected to one of the plurality of NMOS transistors comprised in the assist circuit, and another end and the gate thereof are connected to one of the plurality of word lines.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 90.0
- Lexical Diversity: 2.15686
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15263724', '14658353', '12457936', '13836902', '15052188']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7874168124717764
- 35 USC 102 Novelty (BERT): 0.5112053194488959
- Combined Prediction Score: 0.7597956631694884
- Mean Citation Score: 231.25737
- Max Citation Score: 249.27936
- Similarity Product: 162.54506285671238

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test