PATENT CLAIM ANALYSIS

Application Number: 15862522
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["438", "785000"]

Abstract:
Embodiments of the present disclosure generally relate to a layer stack including a dielectric layer having a high K value capable of improving semiconductor display device electrical performance. In one embodiment, the layer stack includes a substrate, a channel layer disposed on the substrate, and a gate insulating layer. The gate insulating layer includes an interface layer disposed on the channel layer and a zirconium dioxide layer disposed on the interface layer. The gate insulating layer has a K value ranging from about 20 to about 50. The high k value of the gate insulating layer reduces the subthreshold swing (SS) causing a higher energy barrier which alleviates the short channel effect and leakage in display devices. Additionally, the high k value of the gate insulating layer enables for a faster driving current that improves brightness and performance of the display device.

Claim (Index 17):
The layer stack of  claim 16 , further comprising a metal gate layer.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 2.05333
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10927692', '12211530', '11008233', '11500254', '13300146']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8372663038097538
- 35 USC 102 Novelty (BERT): 0.4896391770049915
- Combined Prediction Score: 0.8025035911292775
- Mean Citation Score: 141.765452
- Max Citation Score: 144.4642
- Similarity Product: 88.08193585627079

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test