PATENT CLAIM ANALYSIS

Application Number: 15939020
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["257", "072000"]

Abstract:
An array substrate includes a first base substrate, and gate lines and data lines arranged on the first base substrate. The gate lines and the data lines crosswise define pixel regions, wherein the pixel regions include light transmission areas one-to-one. The array substrate further includes a first raised structure arranged between a main spacer initial contact area and one of the light transmission areas, wherein the first raised structure is configured to provide a blocking function to a movement of a main spacer.

Claim (Index 6):
The array substrate according to  claim 1 , wherein the gate lines arranged between adjacent ones of the pixel regions are in pair.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 90.0
- Lexical Diversity: 1.97778
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15704170', '16067987', '11303994', '14381626', '15325011']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9182475213001152
- 35 USC 102 Novelty (BERT): 0.4827780905970896
- Combined Prediction Score: 0.8747005782298127
- Mean Citation Score: 169.39149
- Max Citation Score: 180.449
- Similarity Product: 128.87494772809742

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test