PATENT CLAIM ANALYSIS

Application Number: 15980662
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["257", "684000"]

Abstract:
A package structure including a semiconductor die, an insulating encapsulant, a redistribution layer and a plurality of conductive terminals is provided. The semiconductor die includes a semiconductor substrate, a plurality of conductive pads and a plurality of conductive strips. The conductive pads are disposed on and connected to the plurality of conductive pads, wherein each of the conductive strips is physically connected to at least two conductive pads. The insulating encapsulant is encapsulating the semiconductor die. The redistribution layer is disposed on the insulating encapsulant and the semiconductor die, wherein the redistribution layer is electrically connected to the plurality of conductive strips. The plurality of conductive terminals is disposed on the redistribution layer.

Claim (Index 17):
A method of fabricating a package structure, comprising:\n forming a semiconductor die, wherein a method of forming the semiconductor die comprises:\n providing a semiconductor wafer having a semiconductor substrate; \n forming a first conductive material on the semiconductor substrate; \n pattering the first conductive material to form a plurality of conductive pads; \n forming a passivation layer over the plurality of conductive pads, and patterning the passivation layer to form at least one contact opening exposing the plurality of conductive pads; \n forming a plurality of conductive strips within the contact opening and on the plurality of conductive pads, wherein each of the plurality of conductive strips is formed with a plurality of conductive posts and a first connecting structure physically joining at least two of the plurality of conductive posts together, and the first connecting structures is physically connected to at least two of the plurality of conductive pads; and \n performing a wafer dicing process to cut the semiconductor wafer into a plurality of semiconductor dies; \n disposing at least one of the plurality of semiconductor dies on a carrier; forming an insulating encapsulant on the carrier and encapsulating the at least one of the plurality of semiconductor dies; forming a redistribution layer on the insulating encapsulant and the at least one of the plurality of semiconductor dies, wherein the redistribution layer is physically and electrically connected to the plurality of conductive posts and the plurality of first connecting structures; and forming a plurality of conductive terminals on the redistribution layer.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 93.0
- Lexical Diversity: 3.1
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15716494', '15806347', '15979494', '15964091', '14788258']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9114809457811696
- 35 USC 102 Novelty (BERT): 0.4779492458196269
- Combined Prediction Score: 0.8681277757850153
- Mean Citation Score: 181.357218
- Max Citation Score: 185.94249
- Similarity Product: 137.80504072182114

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test