PATENT CLAIM ANALYSIS

Application Number: 15956292
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["326", "063000"]

Abstract:
An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.

Claim (Index 12):
The analog multiplexer according to  claim 11 , wherein each transistor switch circuit is coupled to the input via a first resistive circuit and to the output via a second resistive circuit, wherein a sum of resistances of the first and second resistive circuits is greater than or equal to four fifths of an overall resistance of the transistor switch circuit in the on state.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 91.0
- Lexical Diversity: 1.78431
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15679933', '14837279', '10586507', '11871910', '11400018']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6910266413393323
- 35 USC 102 Novelty (BERT): 0.5293648411549144
- Combined Prediction Score: 0.6748604613208906
- Mean Citation Score: 255.805964
- Max Citation Score: 363.46228
- Similarity Product: 258.0647968691325

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test