PATENT CLAIM ANALYSIS

Application Number: 16129767
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2018-12
Patent Classification: ["438", "030000"]

Abstract:
A manufacture method of a low temperature poly-silicon array substrate is provided. A halftone mask is utilized to realize a patterning process applied to a polysilicon layer and an N type heavy doping process of a polysilicon section of an NMOS region. In comparison with prior art, one mask is saved, and thus, the production cost is reduced, and a low temperature poly-silicon array substrate manufactured with such a process possesses excellent electronic property.

Claim (Index 4):
The manufacture method of the low temperature poly-silicon array substrate according to  claim 1 , wherein in step 2, an operation of channel doping is: coating a photoresist layer on the polysilicon layer, and employing a mask to implement exposure and development to the photoresist layer, and after removing the photoresist layer in the NMOS region, implementing P type light doping to the polysilicon layer in the entire NMOS region.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 97.0
- Lexical Diversity: 1.58824
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15111822', '15115692', '15031279', '15105572', '16101534']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8660483944490894
- 35 USC 102 Novelty (BERT): 0.5817011029369933
- Combined Prediction Score: 0.8376136652978798
- Mean Citation Score: 335.336498
- Max Citation Score: 452.4254
- Similarity Product: 449.3204323473573

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test