PATENT CLAIM ANALYSIS

Application Number: 15906588
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["365", "189140"]

Abstract:
The present disclosure relates to a structure which includes an assist circuit which is configured to add a boost voltage using a common boost logic device for both a read logic circuit and a write logic circuit of the assist circuit.

Claim (Index 22):
The structure of  claim 21 , wherein the boosted capacitor is connected between the complement boost signal and the boost signal, the boost signal is directly connected to the write logic circuit through a first NMOS transistor and is directly connected to the read logic circuit through a second NMOS transistor, the first NMOS transistor is gated by the complement boost signal and has a source connected to ground, and the second NMOS transistor is gated by the sense amplifier enable signal and has a source connected to the boost signal.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 88.0
- Lexical Diversity: 1.44828
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15891619', '14755557', '14077559', '15903826', '15798764']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8289254664712782
- 35 USC 102 Novelty (BERT): 0.5035405040814693
- Combined Prediction Score: 0.7963869702322973
- Mean Citation Score: 272.718366
- Max Citation Score: 285.612
- Similarity Product: 203.2386918797493

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test