PATENT CLAIM ANALYSIS

Application Number: 16222488
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["257", "774000"]

Abstract:
In a method for manufacturing a semiconductor device, a first interlayer dielectric layer is formed over a substrate. First recesses are formed in the first interlayer dielectric layer. First metal wirings are formed in the first recesses. A first etch-resistance layer is formed in a surface of the first interlayer dielectric layer between the first metal wirings but not on upper surfaces of the first metal wirings. A first insulating layer is formed on the first etch-resistance layer and the upper surfaces of the first metal wirings.

Claim (Index 8):
The method of  claim 1 , further comprising:\n forming a second interlayer dielectric layer on the first insulating layer; forming second recesses in the second interlayer dielectric layer so that the upper surfaces of the first metal wirings are exposed; and forming second metal wirings in the second recesses.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 98.0
- Lexical Diversity: 2.58333
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15276051', '15878883', '14840830', '15157159', '15851671']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8972518891437766
- 35 USC 102 Novelty (BERT): 0.4858244310710221
- Combined Prediction Score: 0.8561091433365012
- Mean Citation Score: 197.449608
- Max Citation Score: 241.73523
- Similarity Product: 217.3186291243744

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test