PATENT CLAIM ANALYSIS

Application Number: 16134960
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-05
Patent Classification: ["341", "143000"]

Abstract:
The present invention provides a continuous-time delta-sigma modulator comprising two ADCs. One of the ADC is configured to generate MSBs of an output signal of the continuous-time delta-sigma modulator, and the other ADC is configured to generate LSBs of the output signal. In addition, the two ADCs sample an output of a loop filter at different times, but the MSBs and LSBs are feedback to the loop filter simultaneously.

Claim (Index 9):
The continuous-time delta-sigma modulator of  claim 8 , wherein the first delay circuit is configured to provide a first delay amount, the second delay circuit is configured to provide a second delay amount, and a summation of the first delay amount and the second delay amount is equal to or less than a cycle of the first clock signal.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 97.0
- Lexical Diversity: 1.875
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15440612', '13197756', '15455971', '15068231', '12723680']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5941309952522598
- 35 USC 102 Novelty (BERT): 0.5259575710933035
- Combined Prediction Score: 0.5873136528363642
- Mean Citation Score: 272.286376
- Max Citation Score: 293.55746
- Similarity Product: 209.6333025527978

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test