PATENT CLAIM ANALYSIS

Application Number: 16004705
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-01
Patent Classification: ["365", "148000"]

Abstract:
A system includes a cross-point memory array and a decoder circuit coupled to the cross-point memory array. The decoder circuit includes a predecoder having predecode logic to generate a control signal and a level shifter circuit to generate a voltage signal. The decoder circuit further includes a post-decoder coupled to the predecoder, the post-decoder including a first stage and a second stage coupled to the first stage, the control signal to control the first stage and the second stage to route the voltage signal through the first stage and the second stage to a selected conductive array line of a plurality of conductive array lines coupled to a memory array.

Claim (Index 18):
The method of  claim 16 , further comprising:\n selectively applying, by the Y-line decoder, the voltage in the second voltage range to the Y-line conductive array line.

Metadata:
- Claim Count in Document: 51.0
- Percentile: 94.0
- Lexical Diversity: 2.875
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15652148', '15090216', '12653899', '14312022', '13693214']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7838671808218003
- 35 USC 102 Novelty (BERT): 0.5145187078660494
- Combined Prediction Score: 0.7569323335262252
- Mean Citation Score: 284.54294600000014
- Max Citation Score: 319.84186
- Similarity Product: 253.4916090361785

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test