PATENT CLAIM ANALYSIS

Application Number: 16084124
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-06
Patent Classification: ["326", "009000"]

Abstract:
An asynchronous circuit which includes a first circuit suitable for receiving, from a first other circuit, a first data input signal, and for generating a first acknowledgement of receipt signal and a first data output signal; a second circuit suitable for receiving, from a second other circuit, a second data input signal, and for generating a second acknowledgement of receipt signal and a second data output signal, the second circuit being functionally equivalent to the first circuit; a comparator suitable for detecting an inconsistency between the first and second data input or output signals; and at least one circuit for pausing an acknowledgement of receipt suitable for preventing the propagation of the first and second acknowledgement of receipt signals towards the first and second other circuits if an inconsistency is detected by the comparator.

Claim (Index 5):
The asynchronous circuit of  claim 2 , wherein the non-volatile memory circuit comprises at least one non-volatile storage element programmable to maintain, in a non-volatile fashion, one of a plurality of resistive states.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 97.0
- Lexical Diversity: 2.95918
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15416705', '13782546', '13171725', '10542938', '12896720']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6260027728850361
- 35 USC 102 Novelty (BERT): 0.4919592713033097
- Combined Prediction Score: 0.6125984227268635
- Mean Citation Score: 167.77075
- Max Citation Score: 223.37828
- Similarity Product: 167.30046863808158

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test