PATENT CLAIM ANALYSIS

Application Number: 15744163
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["257", "324000"]

Abstract:
A memory cell includes a memory gate structure, a first select gate structure, and a second select gate structure. In the memory gate structure, a lower memory gate insulating film, a charge storage layer, an upper memory gate insulating film, and a metal memory gate electrode are stacked in this order. The first select gate structure includes a metal first select gate electrode along a first sidewall spacer provided on a sidewall of the memory gate structure. The second select gate structure includes a metal second select gate electrode along a second sidewall spacer provided on another sidewall of the memory gate structure. Thus, the metal memory gate electrode, the metal first select gate electrode, and the metal second select gate electrode can be formed of a same metallic material as a metal logic gate electrode, permitting the memory cell to be formed together with the metal logic gate electrode.

Claim (Index 3):
A memory cell disposed on a semiconductor substrate on which a peripheral circuit including a metal logic gate electrode containing a metallic material is provided, the memory cell comprising:\n a drain region disposed on a surface of the semiconductor substrate and connected with a bit line; a source region disposed on the surface of the semiconductor substrate and connected with a source line; a memory gate structure that is disposed between the drain region and the source region and in which a lower memory gate insulating film, a charge storage layer, an upper memory gate insulating film, and a metal memory gate electrode containing the metallic material are stacked in this order on the semiconductor substrate; a first select gate structure in which a metal first select gate electrode containing the metallic material is disposed on the semiconductor substrate between the drain region and the memory gate structure through a first select gate insulating film and that is disposed adjacent to a first sidewall of the memory gate structure through a first sidewall spacer; and a second select gate structure in which a metal second select gate electrode containing the metallic material is disposed on the semiconductor substrate between the source region and the memory gate structure through a second select gate insulating film and that is disposed adjacent to a second sidewall of the memory gate structure through a second sidewall spacer, wherein a first memory gate sidewall insulating film disposed along the first sidewall spacer and integrated with the upper memory gate insulating film is provided between the metal memory gate electrode and the first sidewall spacer, and a second memory gate sidewall insulating film disposed along the second sidewall spacer and integrated with the upper memory gate insulating film is provided between the metal memory gate electrode and the second sidewall spacer.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 86.0
- Lexical Diversity: 3.23529
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15570981', '11553251', '12913759', '15515199', '15602448']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9191294825993084
- 35 USC 102 Novelty (BERT): 0.5080802267468095
- Combined Prediction Score: 0.8780245570140585
- Mean Citation Score: 253.618924
- Max Citation Score: 310.42038
- Similarity Product: 274.1977836043096

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test