PATENT CLAIM ANALYSIS

Application Number: 16119462
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["375", "355000"]

Abstract:
A reference-less frequency detector circuit includes a sampling circuit that is configured to generate a frequency control voltage and a switch circuit control signal based on a frequency difference between a clock signal frequency and an input data rate. The frequency control voltage has a frequency down indication and a frequency up indication. A voltage-to-current converter circuit is coupled to the sampling circuit and is configured to convert the frequency control voltage to a frequency control current based on the switch circuit control signal. The voltage-to-current converter circuit includes an output switch circuit controlled by the switch control signal and is configured to have substantially equal respective latencies for the frequency down indication and the frequency up indication.

Claim (Index 4):
The circuit of  claim 2 , wherein the first and third transistors are p-type field effect transistors (PFETs), and the second and fourth transistors are n-type field, effect transistors (NFETs).

Metadata:
- Claim Count in Document: 1.0
- Percentile: 96.0
- Lexical Diversity: 2.54167
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15394506', '14108834', '10820691', '09712104', '16052027']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5057857516276233
- 35 USC 102 Novelty (BERT): 0.5241912085728081
- Combined Prediction Score: 0.5076262973221418
- Mean Citation Score: 239.427052
- Max Citation Score: 348.4434
- Similarity Product: 344.98814955035454

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test