PATENT CLAIM ANALYSIS

Application Number: 16032284
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["174", "266000"]

Abstract:
A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

Claim (Index 16):
The method as defined in  claim 11 , wherein forming shadow vias includes forming shadow vias with conductive material that interconnects two or more of the plurality of layers.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 95.0
- Lexical Diversity: 2.46
- Patent Class: 174.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15792953', '14947166', '14947065', '14947091', '15452096']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8798323049327041
- 35 USC 102 Novelty (BERT): 0.556718460166964
- Combined Prediction Score: 0.8475209204561301
- Mean Citation Score: 433.602678
- Max Citation Score: 453.13983
- Similarity Product: 302.30398209188104

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test