PATENT CLAIM ANALYSIS

Application Number: 15982210
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["710", "045000"]

Abstract:
A memory controller manages memory access operations through a flash memory interface of a memory array of a solid-state storage device connected to a host. The memory controller executes a first memory access operation in the memory array. The first memory access operation has a first priority. The memory controller detects a suspending memory access operation available for execution in the memory array and having a higher priority than the first priority. The detection operation distinguishes between suspending memory access operations and non-suspending memory access operations. The memory controller suspends execution of the first memory access operation in the memory array and executes one or more memory access operations having higher priorities than the first priority and being available for execution in the memory array. The memory controller resumes the execution of the first memory access operation in the memory array.

Claim (Index 9):
A system for managing memory access operations in a solid-state storage device connected to a host, the system comprising:\n one or more memory arrays; and a flash memory interface including a memory controller coupled to the one or more memory arrays and being configured to:\n execute a first memory access operation in a memory array of the one or more memory arrays, the first memory access operation having a first priority, \n detect at least one suspending memory access operation available for execution in the memory array and having a higher priority than the first priority, the detect operation distinguishing between suspending memory access operations and non-suspending memory access operations, \n suspend execution of the first memory access operation in the memory array, responsive to the detect operation, \n execute the at least one suspending memory access operation, responsive to suspending the execution of the first memory access operation, \n detect at least one resume trigger condition, wherein the at least one resume trigger condition is:\n a total number of suspending memory access operations executing during the suspend execution operation reaching or exceeding a predetermined threshold number of suspending memory access operations; or \n a ratio of executed higher priority memory access operations to executed lower priority memory access operations reaching or exceeding a predetermined threshold ratio; and \n \n resume the execution of the first memory access operation in the memory array, responsive to detection of the at least one resume trigger condition and before completion of the execute operation.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 93.0
- Lexical Diversity: 3.14894
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13834955', '13800628', '13755547', '15223595', '13919028']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6115827558916256
- 35 USC 102 Novelty (BERT): 0.4893948155591635
- Combined Prediction Score: 0.5993639618583794
- Mean Citation Score: 179.31698400000005
- Max Citation Score: 196.8474
- Similarity Product: 137.0556517899513

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test