PATENT CLAIM ANALYSIS

Application Number: 15949531
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["345", "211000"]

Abstract:
An EL display panel including: a pixel array section in which EL display elements whose light emission state is controlled by an active matrix driving system are arranged in a form of a matrix; a first writing control line driving section and a second writing control line driving section configured to drive each writing control line from both sides of the pixel array section; and a first power supply line driving section and a second power supply line driving section configured to drive a power supply line disposed along a direction of a horizontal line from both sides of the pixel array section, the first power supply line driving section and the second power supply line driving section being respectively arranged between the first writing control line driving section and the pixel array section and between the second writing control line driving section and the pixel array section.

Claim (Index 8):
A display device comprising:\n a plurality of pixel circuits arranged in a display area; a plurality of signal lines extending in a first direction; a plurality of first scanning lines extending in a second direction, the second direction being perpendicular to the first direction; driving circuitry configured to drive the pixel circuits, each of the pixel circuits including a sampling transistor, drive transistor, a capacitor and a light emitting element, the driving circuitry including writing control line driving circuitry configured to control operation of the sampling transistor, wherein the driving circuitry is configured to drive each of the pixel circuits by executing:\n a first process to provide a current through the drive transistor to the capacitor during a correction and sampling period, and \n a second process to provide a driving current based on a voltage stored in the capacitor, to the light emitting element via the drive transistor during an emission period, the first process occurring before the second process, \n wherein the writing control line driving circuitry includes:\n a first write control circuit arranged on a first side of the display area; and \n a second write control circuit arranged on a second side of the display area which is opposite to the first side, \n wherein the first and the second write control circuits are connected to the sampling transistor of the pixel circuits in a respective row via a corresponding one of the scanning lines, the display area being between the first and the second write control circuits, and wherein the second process begins when the writing control line driving circuitry changes a control signal on a corresponding one of the scanning lines from a first potential to a second potential, and the correction and sampling period ends when the writing control line driving circuitry changes the control signal from the second potential to the first potential.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 2.78182
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14450801', '12379017', '13739270', '12475227', '13626925']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6943544546950761
- 35 USC 102 Novelty (BERT): 0.5863019508117737
- Combined Prediction Score: 0.6835492043067458
- Mean Citation Score: 372.502008
- Max Citation Score: 488.792
- Similarity Product: 473.726346681118

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test