PATENT CLAIM ANALYSIS

Application Number: 16012551
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-01
Patent Classification: ["326", "004000"]

Abstract:
In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.

Claim (Index 123):
The method of  claim 122 , further comprising identifying resonant conditions for a plurality of transitions to be suppressed in the quantum processor circuit during application of the two-qubit quantum logic gate, wherein the one or more gate conditions that satisfy the operating criterion are identified based on avoiding the resonant conditions.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 94.0
- Lexical Diversity: 2.55769
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15916367', '15380822', '15121483', '15241783', '11833902']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6793917877586703
- 35 USC 102 Novelty (BERT): 0.5051871118569707
- Combined Prediction Score: 0.6619713201685004
- Mean Citation Score: 272.05197200000003
- Max Citation Score: 290.6305
- Similarity Product: 205.5890777591765

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test