PATENT CLAIM ANALYSIS

Application Number: 16003532
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-06
Patent Classification: ["345", "210000"]

Abstract:
The present disclosure provides a gate driver and driving circuit, wherein, the gate driver comprises a pull-up control module, a pull-down holding module, a pull-up module, a signal down-transmitting module, a pull-down module and a self-raising module. The pull-up control module, the pull-down holding module, the pull-up module, the signal down-transmitting module, the pull-down module, and the self-raising module are connected at a gate signal point; the pull-down holding module, the self-raising module, the pull-up module and the pull-down module are connected to a horizontal scan line, respectively. The present disclosure pulls down the level of the horizontal scan line by using the pull-up module together with the pull-down module so that the pull-down effect of the gate driver and the stability of the circuit are improved.

Claim (Index 7):
The gate driver according to  claim 1 , wherein the pull-down holding module comprises an inverter, a fifth-first transistor and a fifth-second transistor;\n an input terminal of the inverter is connected to the gate signal point, and an output terminal of the inverter is connected to a gate electrode of the fifth-first transistor and a gate electrode of the fifth-second transistor; a drain electrode of the fifth-first transistor is connected to the horizontal scan line, and a source electrode of the fifth-first transistor is connected to the third terminal of the pull-down module; a drain electrode of the fifth-second transistor is connected to the gate signal point, and a source electrode of the fifth-second transistor is connected to the third terminal of the pull-down module; when the input terminal of the inverter is at low level, the output terminal of the inverter outputs high level to the gate electrode of the fifth-first transistor to control the fifth-first transistor to transmit the signal of the low level signal line from the source electrode of the fifth-first transistor to the drain electrode of the fifth-first transistor.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 94.0
- Lexical Diversity: 3.15217
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14891422', '15323974', '15323738', '15329251', '14426354']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7058555794906092
- 35 USC 102 Novelty (BERT): 0.5088334616157034
- Combined Prediction Score: 0.6861533677031186
- Mean Citation Score: 284.0060220000001
- Max Citation Score: 292.33908
- Similarity Product: 222.6705749718905

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test