PATENT CLAIM ANALYSIS

Application Number: 15919421
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["711", "118000"]

Abstract:
According to one embodiment, a disk device includes a disk, a plurality of flash ROMs, a head, a cache memory, and a controller. The controller is configured to execute an operation when supply of power from an external power supply is interrupted while writing of data into the disk is performed by using power supplied from the external power supply, wherein the operation includes writing data stored in the cache memory into the flash ROMs in order, by means of serial communication, by using power supplied from an auxiliary power supply. Here, the controller writes data into a first flash ROM of the plurality of flash ROMs, and, in parallel therewith, reads data from a second flash ROM of the plurality of flash ROMs where writing of data is not performed, by means of serial communication.

Claim (Index 9):
The device according to  claim 4 , wherein the bus fight preventing circuit comprising:\n a multiplexer configured to output the data read from the flash ROM selectively in the controller according to selection control signals; and NOR gates configured to output the selection control signals into the multiplexer.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 2.62069
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14523145', '11876251', '10757464', '12937131', '11322447']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.486806556828108
- 35 USC 102 Novelty (BERT): 0.4745681421837671
- Combined Prediction Score: 0.4855827153636739
- Mean Citation Score: 130.2947108
- Max Citation Score: 136.57983000000002
- Similarity Product: 91.05885614183488

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test