PATENT CLAIM ANALYSIS

Application Number: 16186047
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-05
Patent Classification: ["341", "118000"]

Abstract:
This disclosure describes techniques for performing computational operations on input unary bit streams using one or more scaling networks. In some examples, a device is configured to perform a digital computational operation, where the device includes a plurality of input wires and a plurality of output wires. Each input wire is configured to receive a respective input bit of an encoded input value, and each output wire is configured to output a respective output bit of an encoded output value. The device also includes scaling network circuitry configured to apply a function to the encoded input value by electrically routing at least one input wire of the plurality of input wires to at least two output wires of the plurality of output wires. The device can also include hybrid binary/unary computations.

Claim (Index 7):
The device of  claim 1 , wherein at least one output wire of the plurality of output wires is hardwired to a logically true value to output a positive numerical offset for the encoded output value when a numerical value of the encoded input value is zero.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 98.0
- Lexical Diversity: 2.13846
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['09848752', '11900224', '15618530', '15808863', '15783470']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5936018425901557
- 35 USC 102 Novelty (BERT): 0.5005868230420211
- Combined Prediction Score: 0.5843003406353422
- Mean Citation Score: 190.225932
- Max Citation Score: 205.34721
- Similarity Product: 138.3929355110514

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test