PATENT CLAIM ANALYSIS

Application Number: 16020466
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-11
Patent Classification: ["365", "189110"]

Abstract:
A semiconductor memory apparatus may include a write data polarity change unit and a read data polarity change unit. The write data polarity change unit may invert a first data based on a write signal and a first bank address signal, and generate a write polarity change data. The read data polarity change unit may invert data outputted from a memory bank based on a read signal and the first bank address signal, and generate a read polarity change data.

Claim (Index 9):
The semiconductor memory apparatus of  claim 8 ,\n wherein the inversion change data is arranged as parallel data, and wherein the pipe latch unit is configured for arranging the parallel data into serial data and outputting the serial data to the data pad.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 94.0
- Lexical Diversity: 3.03571
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14713738', '15918536', '12650666', '14687208', '11501905']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7619914005285842
- 35 USC 102 Novelty (BERT): 0.5652620091285858
- Combined Prediction Score: 0.7423184613885843
- Mean Citation Score: 220.7705
- Max Citation Score: 454.22116
- Similarity Product: 366.7799068439341

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test