PATENT CLAIM ANALYSIS

Application Number: 16106584
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["716", "137000"]

Abstract:
A system for dynamic circuit board design, preferably including a library of modular circuits and a merge tool. A method for merging modular circuitry into a unified electronics module, preferably including: receiving a circuit board layout, the circuit board layout preferably including a set of modular circuits arranged on a virtual carrier board; converting the circuit board layout into a virtual circuit representation; applying transformations to the virtual circuit representation; and generating a unified circuit board design based on the transformed virtual circuit representation.

Claim (Index 10):
The method of  claim 9 , wherein the electrical property value is selected from the group consisting of: a resistance value, a capacitance value, and an inductance value.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 96.0
- Lexical Diversity: 2.11364
- Patent Class: 716.0
- Transitional Phrase Type: closed
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15816132', '15663582', '11368293', '15277984', '12198172']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3207234936291909
- 35 USC 102 Novelty (BERT): 0.4974092236318197
- Combined Prediction Score: 0.3383920666294537
- Mean Citation Score: 132.267268
- Max Citation Score: 238.44598
- Similarity Product: 143.05849769271612

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test