PATENT CLAIM ANALYSIS

Application Number: 15864972
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["375", "319000"]

Abstract:
A device includes a selection circuit that is configured to generate a bias level. The device also includes a combinational circuit coupled to the selection circuit. The combinational circuit is configured to generate a distortion correction factor used offset inter-symbol interference from a data stream on a distorted bit based on the bias level to generate a correction signal. The device additionally includes a latching element coupled to the combinational circuit and configured to receive the first correction signal.

Claim (Index 4):
The device of  claim 3 , wherein the modified version of the reference signal comprises a correction factor related to a desired level of correction of the adjustment signal.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 86.0
- Lexical Diversity: 2.075
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15716132', '15841144', '15716162', '15714818', '15850965']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4975342052297974
- 35 USC 102 Novelty (BERT): 0.4855963003959674
- Combined Prediction Score: 0.4963404147464144
- Mean Citation Score: 184.23715
- Max Citation Score: 206.28966
- Similarity Product: 153.4948681611228

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test