PATENT CLAIM ANALYSIS

Application Number: 16424320
Application Type: Utility
Filing Date: 2019-05
Publication Date: 2019-09
Patent Classification: ["716", "103000"]

Abstract:
Systems, methods and devices are disclosed that may a user to specify various layout and operational parameters of a resistive-based memory array in a manner that accommodates the unique characteristics of resistance-based memory cells and magnetic-based memory cells.

Claim (Index 3):
The method of  claim 1 , wherein:\n a first netlist file configuration provides a single reference voltage generator for all the sense amplifiers in the memory block; a second netlist file configuration provides a different reference voltage generator for a selected number of the sense amplifiers in the memory block; and a third netlist file configuration provides a dedicated reference voltage generator for each of the sense amplifiers in the memory block.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 100.0
- Lexical Diversity: 1.29032
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15826597', '12343617', '12390213', '14687331', '13898803']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.337752846583214
- 35 USC 102 Novelty (BERT): 0.5494836057218518
- Combined Prediction Score: 0.3589259224970778
- Mean Citation Score: 232.860086
- Max Citation Score: 441.46878
- Similarity Product: 409.23923735934375

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test