PATENT CLAIM ANALYSIS

Application Number: 16007730
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["710", "036000"]

Abstract:
An on-chip accelerator manager manages multiple accelerators in a programmable device. In one specific implementation, the multiple accelerators are identical accelerators. The accelerator manager and the multiple accelerators are deployed to the programmable device. One or more calls to a software library in a virtual function table are replaced with one or more calls to the on-chip accelerator manager. The on-chip accelerator manager receives an accelerator call, and in response, allocates the accelerator call to one of the multiple accelerators, performs load balancing to the multiple accelerators, and performs failover when one of the accelerators fails by allocating work that was allocated to the failed accelerator to a different accelerator. The on-chip accelerator can push work to the multiple accelerators in a first mode of operation, and the multiple accelerators can pull work from the on-chip accelerator manager in a second mode of operation.

Claim (Index 11):
An apparatus comprising:\n at least one processor;\n a memory coupled to the at least one processor; \n a field-programmable gate array (FPGA) coupled to the at least one processor, the FPGA comprising:\n an Open Coherent Accelerator Processor Interface (OpenCAPI); \n a plurality of identical accelerators; \n an accelerator communication interface that allows an on-chip accelerator manager to communicate with the plurality of identical accelerators; and \n the on-chip accelerator manager that receives an accelerator call from a program external to the FPGA via the OpenCAPI, and in response, allocates the accelerator call to one of the plurality of identical accelerators so the call is processed by the one accelerator in parallel with work being processed by other of the plurality of accelerators, performs load balancing to the plurality of identical accelerators, monitors progress of the plurality of identical accelerators, detects when each of the plurality of identical accelerators completes its work, and performs failover when a first of the plurality of identical accelerators fails by allocating work that was allocated to the first accelerator to a different accelerator.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 94.0
- Lexical Diversity: 2.47619
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15964115', '15964166', '15849582', '12502074', '13770711']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.696482048187669
- 35 USC 102 Novelty (BERT): 0.539191885700452
- Combined Prediction Score: 0.6807530319389473
- Mean Citation Score: 293.11917200000005
- Max Citation Score: 410.63
- Similarity Product: 291.1200965923071

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test