PATENT CLAIM ANALYSIS

Application Number: 16050240
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-02
Patent Classification: ["707", "705000"]

Abstract:
In some embodiments, a PPM interface may be provided with functionality to facilitate to an OS memory power state management for one or more memory nodes, regardless of a particular platform hardware configuration, as long as the platform hardware is in conformance with the PPM interface.

Claim (Index 27):
The apparatus of  claim 22 , wherein the table is a Memory Power Node Structure (MPST), and wherein the MPST is to store:\n a third flag to indicate one or both of: an Operating System (OS) Directed Power Management (OSPM) logic is to ignore the MPST, or a system firmware is to populate the MPST with static number of structures and selectively enable the MPST.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 95.0
- Lexical Diversity: 1.31579
- Patent Class: 707.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13977635', '13683748', '13977625', '13977593', '15396726']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.204327720750799
- 35 USC 102 Novelty (BERT): 0.5229938619776243
- Combined Prediction Score: 0.2361943348734815
- Mean Citation Score: 240.312764
- Max Citation Score: 313.29358
- Similarity Product: 214.2689110972213

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test