PATENT CLAIM ANALYSIS

Application Number: 16171609
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-05
Patent Classification: ["345", "619000"]

Abstract:
A hierarchical acceleration structure may be built for graphics processing using a 32 bit format. In one embodiment, the acceleration structure may be a k-d tree, but other acceleration structures may be used as well. 64 bit offsets are only used when 64 bit offsets are needed.

Claim (Index 23):
The apparatus of  claim 21  wherein said graphics processor is further configured to only test for a the bit extension if an internal node test is not passed.

Metadata:
- Claim Count in Document: 68.0
- Percentile: 97.0
- Lexical Diversity: 1.48571
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13505007', '13732103', '12241044', '12241045', '14248033']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6211459157087086
- 35 USC 102 Novelty (BERT): 0.5019181403150068
- Combined Prediction Score: 0.6092231381693384
- Mean Citation Score: 173.39871399999996
- Max Citation Score: 279.60123
- Similarity Product: 236.9792152557868

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test