PATENT CLAIM ANALYSIS

Application Number: 16139512
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-05
Patent Classification: ["257", "040000"]

Abstract:
A display panel includes a base layer including a first area and a second area. At least one inorganic layer disposed on the base layer overlaps the first area and the second area. The at least one inorganic layer comprises a lower groove. A first thin-film transistor is disposed on the at least one inorganic layer. The first thin-film transistor includes a silicon semiconductor pattern. A second thin-film transistor is disposed on the at least one inorganic layer. The second thin-film transistor includes an oxide semiconductor pattern. A plurality of insulation layers overlap the first area and the second area. An upper groove extends from the lower groove. A signal line is electrically connected to the second thin-film transistor. An organic layer is disposed in the lower groove and the upper groove. A light emitting element is disposed on the organic layer.

Claim (Index 24):
A method for manufacturing a display panel, comprising:\n forming, on a base layer comprising a first area and a second area extending from the first area, at least one inorganic layer overlapping the first area and the second area along a direction orthogonal to an upper surface of the base layer; forming first to third insulation layers overlapping the first area and the second area on the at least one inorganic layer along the direction orthogonal to the upper surface of the base layer and a silicon semiconductor pattern overlapping the first area on the at least one inorganic layer along the direction orthogonal to the upper surface of the base layer; performing a first etching partially removing the first to third insulation layers to expose a portion of the silicon semiconductor pattern and a portion, which overlaps the second area along the direction orthogonal to the upper surface of the base layer, of the at least one inorganic layer; forming an oxide semiconductor pattern above the first to third insulation layers and a plurality of electrodes connected to the oxide semiconductor pattern and the silicon semiconductor pattern; forming a fourth insulation layer substantially covering an upper surface of the oxide semiconductor pattern and upper and side surfaces of the plurality of electrodes on the first to third insulation layers; performing a second etching partially removing the fourth insulation layer so that at least one electrode of the plurality of electrodes and the portion of the at least one inorganic layer, which overlaps the second area along the direction orthogonal to the upper surface of the base layer, are exposed; performing a third etching partially removing the portion of the at least one inorganic layer, which overlaps the second area along the direction orthogonal to the upper surface of the base layer; forming an organic layer on the fourth insulation layer within the first area and disposed in an area in which the at least one inorganic layer is removed and an area in which the first to fourth insulation layers are removed within the second area; performing a fourth etching partially removing the organic layer so that the at least one electrode of the plurality of electrodes is exposed to the organic layer; forming a light emitting element electrically connected to the at least one electrode of the plurality of electrodes and a signal line on the organic layer; and bending the second area.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 97.0
- Lexical Diversity: 2.90566
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16133404', '15657369', '14506061', '15662105', '15654485']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9247706006348008
- 35 USC 102 Novelty (BERT): 0.5159819166236266
- Combined Prediction Score: 0.8838917322336834
- Mean Citation Score: 283.001324
- Max Citation Score: 323.7502
- Similarity Product: 260.44147725658416

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test