PATENT CLAIM ANALYSIS

Application Number: 15950184
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-05
Patent Classification: ["714", "764000"]

Abstract:
A data encoding method, a data decoding method, and a storage controller are provided. The encoding method includes: obtaining a verification data corresponding to a raw data according to a write command; adding the verification data to the raw data, and obtaining a scrambled data accordingly; and performing an encoding operation on the scrambled data to obtain a codeword data. The decoding method includes: performing a decoding operation on a codeword data to obtain a decoded codeword data, and obtaining a pre-scrambling data accordingly; identifying a verification data and a raw data in the pre-scrambling data; identifying one or more first system data corresponding to the raw data according to a read command; and determining whether the raw data is correct by comparing the one or more first system data and the verification data.

Claim (Index 9):
A storage controller configured to control a storage device provided with a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical units, and each of the physical units comprises a plurality of physical sub-units, wherein a plurality of physical addresses are assigned to the physical sub-units, the storage controller comprising:\n a memory interface control circuit configured to couple to the rewritable non-volatile memory module; an error checking and correcting circuit configured to encode a raw data to be stored to the rewritable non-volatile memory module; and a processor coupled to the memory interface control circuit and the error checking and correcting circuit, wherein the processor is configured to start to execute a write command to transmit the raw data to the error checking and correcting circuit, wherein the write command instructs writing the raw data to one or more target physical addresses among the physical addresses, wherein the error checking and correcting circuit is configured to obtain a verification data corresponding to the raw data according to the write command, wherein the error checking and correcting circuit is further configured to add the verification data to the raw data to form a pre-scrambling data, wherein the error checking and correcting circuit is further configured to perform a scramble operation on the pre-scrambling data to obtain a scrambled data, wherein the error checking and correcting circuit is further configured to perform an encoding operation on the scrambled data to obtain a codeword data and respond to the processor that encoding of the codeword data corresponding to the raw data is completed, wherein the processor is further configured to write the codeword data to the one or more target physical addresses, so as to complete execution of the write command.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 91.0
- Lexical Diversity: 2.90196
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14514395', '15250925', '14264040', '14295355', '14190103']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3152336660271197
- 35 USC 102 Novelty (BERT): 0.4876067768343982
- Combined Prediction Score: 0.3324709771078475
- Mean Citation Score: 245.56651
- Max Citation Score: 262.54504
- Similarity Product: 217.5852697811985

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test