PATENT CLAIM ANALYSIS

Application Number: 15959534
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "098000"]

Abstract:
A package substrate is provided. The package substrate includes a base layer having a first surface and a second surface opposite to the first surface, a plurality of through holes penetrating the base layer, a first metal layer disposed on the first surface, and comprising an encircling portion and a plurality of upper pads arranged separately, wherein the encircling portion surrounds the upper pads to form a trench between the encircling portion and the upper pads, and a second metal layer disposed on the second surface and comprising a plurality of bottom pads arranged separately, wherein the bottom pads are electrically connected to the upper pads via the through holes respectively. The through holes are positioned under the upper pads and the encircling portion of the first metal layer is electrically floating.

Claim (Index 5):
A package structure, comprising:\n a package substrate, comprising: a base layer; a plurality of through holes penetrating through the base layer; a first metal layer disposed on an upper surface and comprising an encircling portion and a plurality of upper pads arranged separately, wherein the encircling portion surrounds the upper pads to form a trench between the encircling portion and the upper pads, and at least one gap between the upper pads intercommunicates with the trench; and a second metal layer disposed on a lower surface comprising a plurality of bottom pads arranged separately, wherein the bottom pads are electrically connected to the upper pads via the through holes, and the encircling portion of the first metal layer is electrically floating; at least one chip disposed on the package substrate and electrically connected to the upper pads; a reflective layer disposed on the package substrate and having a portion filled into the trench, wherein the reflective layer covers the chip and exposes at least a portion of an upper surface of the chip; and a light transmissive layer covering the exposed portion of the upper surface of the chip.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 91.0
- Lexical Diversity: 2.82
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15073707', '13044457', '13204603', '15600793', '14490683']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.915725821512738
- 35 USC 102 Novelty (BERT): 0.4924800603587212
- Combined Prediction Score: 0.8734012453973363
- Mean Citation Score: 201.409946
- Max Citation Score: 272.94492
- Similarity Product: 249.52149753927472

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test