PATENT CLAIM ANALYSIS

Application Number: 15952144
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-02
Patent Classification: ["363", "040000"]

Abstract:
The various implementations described herein include inverter devices and systems. In one aspect, an inverter includes: a case; a capacitor within the case having a first terminal and a second terminal; a first bus bar including a first portion within the case and a second portion extending from the case to contact a first transistor; a second bus bar including a first portion situated in the case and a second portion extending from the case to contact a second transistor; and a phase-out bus bar including a first portion situated in the case, a second portion extending from the case to contact the first transistor, and a third portion extending from the case to contact the second transistor.

Claim (Index 14):
The inverter component of  claim 13 , wherein the phase-out bus-bar is a first phase-out bus bar to provide a first phase of alternating current, the inverter component further comprising:\n a second phase-out bus bar configured to electrically couple a third plurality of transistors to a fourth plurality of transistors and to provide a second phase of alternating current, the second phase-out bus bar comprising a portion situated in the case and a plurality of portions extending from the case to contact respective transistors of the third and fourth pluralities of transistors; a third phase-out bus bar configured to electrically couple a fifth plurality of transistors to a sixth plurality of transistors and to provide a third phase of alternating current, the third phase-out bus bar comprising a portion situated in the case and a plurality of portions extending from the case to contact respective transistors of the fifth and sixth pluralities of transistors; wherein: the first bus bar is configured to electrically couple the first terminal of the capacitor to the third and fifth pluralities of transistors and comprises a plurality of portions extending from the case to contact respective transistors of the third and fifth pluralities of transistors; and the second bus bar is configured to electrically couple the second terminal of the capacitor to the fourth and sixth pluralities of transistors and comprises a plurality of portions extending from the case to contact respective transistors of the fourth and sixth pluralities of transistors.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 91.0
- Lexical Diversity: 3.12195
- Patent Class: 363.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15831307', '15675615', '15861599', '15912350', '10422958']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8204336926497742
- 35 USC 102 Novelty (BERT): 0.5408739894795087
- Combined Prediction Score: 0.7924777223327477
- Mean Citation Score: 280.08040199999994
- Max Citation Score: 398.01096
- Similarity Product: 364.0695575234986

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test