PATENT CLAIM ANALYSIS

Application Number: 16259631
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-06
Patent Classification: ["327", "333000"]

Abstract:
Provided are semiconductor circuits. A semiconductor circuit includes: a first circuit configured to propagate a value of a first node to a second node based on a voltage level of a clock signal; a second circuit configured to propagate a value of the second node to a third node based on the voltage level of the clock signal; and a third circuit configured to determine a value of the third node based on a voltage level of the second node and the voltage level of the clock signal, wherein the first circuit comprises a first transistor gated to a voltage level of the first node, a second transistor connected in series with the first transistor and gated to the voltage level of the third node, and a third transistor connected in parallel with the first and second transistors and gated to a voltage level of the clock signal to provide the value of the first node to the second node.

Claim (Index 33):
The semiconductor circuit of  claim 28 , wherein the third transistor provides the power supply voltage to the third node when the clock signal is changed from the first voltage level to the second voltage level.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 99.0
- Lexical Diversity: 4.09756
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15139949', '16212193', '15247430', '14645818', '15499257']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8136203467936308
- 35 USC 102 Novelty (BERT): 0.5231139224530975
- Combined Prediction Score: 0.7845697043595775
- Mean Citation Score: 304.82528999999994
- Max Citation Score: 350.15747000000016
- Similarity Product: 274.66151104220404

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test