PATENT CLAIM ANALYSIS

Application Number: 16057204
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2020-02
Patent Classification: ["null", "null"]

Abstract:
An MCM-HIC device flexibly adds enhanced features to a VLSI “core” IC that are not directly supported by the core IC, such as unsupported communication protocols and/or support of cold spare operation. The core IC is mounted on an interconnecting substrate together with at least one “chiplet” that provides the required feature(s). The chiplet can be programmable. The chiplet can straddle a boundary of an interposer region of the substrate that provides higher density interconnections at lower currents. The disclosed method can include selecting a core IC and at least one active, passive, or “mixed” chiplet, configuring a substrate, and installing the core IC and chiplet(s) on the substrate. In embodiments, the core IC and/or chiplet(s) can be modified before assembly to obtain the desired result. Cost can be reduced by pre-designing and, in embodiments, pre-manufacturing the chiplets and modified core ICs in cost-effective quantities.

Claim (Index 13):
The circuit of  claim 1 , wherein the circuit includes at least one of radiation hardening and electrostatic discharge (ESD) mitigation.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 96.0
- Lexical Diversity: 1.88172
- Patent Class: nan
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13395813', '15725030', '14848477', '15178240', '12489486']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5878604927761121
- 35 USC 102 Novelty (BERT): 0.5072142089582511
- Combined Prediction Score: 0.579795864394326
- Mean Citation Score: 205.019484
- Max Citation Score: 214.88882
- Similarity Product: 111.2452046677959

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test