PATENT CLAIM ANALYSIS

Application Number: 15909462
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["257", "763000"]

Abstract:
A method for forming conductive structures for a semiconductor device includes depositing a reflow liner on walls of trenches formed in a dielectric layer and depositing a reflow material on the reflow liner. The reflow material is reflowed to collect in a lower portion of the trenches. The depositing and the reflowing steps are repeated until the trenches are aggregately filled with the reflow material. The reflow material is planarized to form conductive structures in the trenches.

Claim (Index 8):
The method as recited in  claim 7 , further comprising annealing the reflow material in the overburden layer.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 90.0
- Lexical Diversity: 1.92857
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15467113', '15813600', '14967618', '15592291', '15202656']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9201391788790192
- 35 USC 102 Novelty (BERT): 0.5887569531657596
- Combined Prediction Score: 0.8870009563076933
- Mean Citation Score: 309.1791540000001
- Max Citation Score: 459.99237
- Similarity Product: 411.2628144426012

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test