PATENT CLAIM ANALYSIS

Application Number: 16124932
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-10
Patent Classification: ["257", "675000"]

Abstract:
Provided is a small-sized power semiconductor device in which interference between power modules adjacently disposed is prevented and the areas of the gaps occurring between the power modules are reduced. In a power semiconductor device formed by adjacently disposing power modules in an arc shape on a heat sink, each of which power modules is obtained by sealing, with a mold resin, a switchable power semiconductor chip, a lead frame in which potential leads and signal terminals connected to the power semiconductor chip are formed, and a metallic inner lead electrically connecting an upper surface electrode of the power semiconductor chip and the lead frame, any one of the adjacent power modules is formed in a pentagonal shape having, at a portion adjacent to the other power module, an oblique side  10 a  obtained by cutting out one corner of a quadrangle.

Claim (Index 20):
The power module according to  claim 17 , wherein the mold resin is a transfer mold resin, and the power semiconductor chip, the lead frame, and the inner lead are over-molded therewith.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 2.05405
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15881883', '15218541', '13173248', '10318018', '13989932']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9246809995128048
- 35 USC 102 Novelty (BERT): 0.4875348787181832
- Combined Prediction Score: 0.8809663874333428
- Mean Citation Score: 187.283002
- Max Citation Score: 206.91234
- Similarity Product: 151.4480042125833

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test