PATENT CLAIM ANALYSIS

Application Number: 16144286
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-02
Patent Classification: ["257", "324000"]

Abstract:
The present disclosure relates to a method of forming an embedded flash memory cell that provides for improved performance by providing for a tunnel dielectric layer having a relatively uniform thickness, and an associated apparatus. The method is performed by forming a charge trapping dielectric structure over a logic region, a control gate region, and a select gate region within a substrate. A first charge trapping dielectric etching process is performed to form an opening in the charge trapping dielectric structure over the logic region, and a thermal gate dielectric layer is formed within the opening. A second charge trapping dielectric etching process is performed to remove the charge trapping dielectric structure over the select gate region. Gate electrodes are formed over the thermal gate dielectric layer and the charge trapping dielectric structure remaining after the second charge trapping dielectric etching process.

Claim (Index 2):
The integrated chip of  claim 1 , further comprising:\n first and second isolation regions arranged within the substrate on opposing sides of the control gate electrode along a first direction, wherein the control gate electrode is separated from the select gate electrode along a second direction that is substantially perpendicular to the first direction.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 97.0
- Lexical Diversity: 2.39683
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15365156', '14865179', '14645993', '14779938', '14983682']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.920522567420922
- 35 USC 102 Novelty (BERT): 0.5091055840292769
- Combined Prediction Score: 0.8793808690817575
- Mean Citation Score: 234.062562
- Max Citation Score: 295.94983
- Similarity Product: 226.5243018085212

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test