PATENT CLAIM ANALYSIS

Application Number: 15951941
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "713000"]

Abstract:
Examples of the present disclosure provide example Chip Scale Packages (CSPs). In some examples, a structure includes a first integrated circuit die, a shim die that does not include active circuitry thereon, an encapsulant at least laterally encapsulating the first integrated circuit die and the shim die, and a redistribution structure on the first integrated circuit die, the shim die, and the encapsulant. The redistribution structure includes one or more metal layers electrically connected to the first integrated circuit die.

Claim (Index 6):
The structure of  claim 1 , wherein the first integrated circuit die includes input/output (IO) connector components on an active side of the first integrated circuit die, the IO connector components being in one or more columns, each of the one or more columns having, in a layout of the first integrated circuit die, a first region of the first integrated circuit die and a second region of the first integrated circuit die on opposing sides of the respective column.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 91.0
- Lexical Diversity: 1.78431
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13891006', '11801317', '15722655', '12235000', '11949282']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.924442443121854
- 35 USC 102 Novelty (BERT): 0.5048758247966727
- Combined Prediction Score: 0.882485781289336
- Mean Citation Score: 214.143888
- Max Citation Score: 225.47943
- Similarity Product: 140.9055594877124

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test