PATENT CLAIM ANALYSIS

Application Number: 15901175
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-01
Patent Classification: ["714", "764000"]

Abstract:
A method for controlling error check and correction (ECC) of a non-volatile memory device includes storing write data in a plurality of storing regions. The write data may be generated by performing ECC encoding. Individual ECC decoding may be performed based on each of a plurality of read data read out from the storing regions. Logic operation data may be provided by performing a logic operation of the read data when the individual ECC decoding fails with respect to all of the read data. Combined ECC decoding may be performed based on the logic operation data.

Claim (Index 17):
The memory system as claimed in  claim 16 , wherein the ECC decoder includes:\n a storage area including a plurality of buffers to store the plurality of read data; a logic operator to perform the logic operation of the plurality of read data to provide the logic operation data; a selector to select and output one of the plurality of read data and the logic operation data; and an ECC decoder to perform the individual ECC decoding or the combined ECC decoding.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 88.0
- Lexical Diversity: 1.9434
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15204536', '14831442', '15398409', '14322404', '15238216']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3053675568987241
- 35 USC 102 Novelty (BERT): 0.4961704192794908
- Combined Prediction Score: 0.3244478431368007
- Mean Citation Score: 248.896212
- Max Citation Score: 254.038
- Similarity Product: 203.3932989941836

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test