PATENT CLAIM ANALYSIS

Application Number: 15938558
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["257", "295000"]

Abstract:
A memory cell is provided that includes a control gate, a tunneling layer, a charge storage region, a blocking layer including a ferroelectric material, a semiconductor channel, and a source region and a drain region each disposed adjacent the semiconductor channel. The tunneling layer is disposed between the control gate and the charge storage region, the charge storage region is disposed between the tunneling layer and the blocking layer, and the blocking layer is disposed above the semiconductor channel

Claim (Index 13):
The non-volatile memory system of  claim 10 , wherein the blocking layer comprises a combination of a ferroelectric dielectric material and one or more non-ferroelectric dielectric materials.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 90.0
- Lexical Diversity: 2.63636
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15938536', '15938655', '15376925', '15893157', '12031096']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.932558808618574
- 35 USC 102 Novelty (BERT): 0.512592495825178
- Combined Prediction Score: 0.8905621773392344
- Mean Citation Score: 270.11875200000003
- Max Citation Score: 313.71606
- Similarity Product: 265.8845038999308

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test