PATENT CLAIM ANALYSIS

Application Number: 16021383
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-11
Patent Classification: ["257", "738000"]

Abstract:
Some embodiments of the present disclosure disclose a method for forming semiconductor packages. The method includes disposing a plurality of semiconductor chips over a top side of a wafer, molding the plurality of semiconductor chips with a first molding material, and after molding the semiconductor chips, forming a composite layer over the plurality of semiconductor chips.

Claim (Index 6):
The semiconductor package of  claim 5 , further comprising an interposer material disposed between the substrate and the at least one semiconductor chip, wherein the interposer material comprises interconnect structures disposed inside, and wherein the interconnect structures are electrically connected between the at least one semiconductor chip and the through silicon vias.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 94.0
- Lexical Diversity: 1.90625
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14923449', '14611585', '13188554', '15499229', '15428124']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8946915192842891
- 35 USC 102 Novelty (BERT): 0.4959296265694625
- Combined Prediction Score: 0.8548153300128065
- Mean Citation Score: 184.991266
- Max Citation Score: 225.64558
- Similarity Product: 169.42269353736876

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test