PATENT CLAIM ANALYSIS

Application Number: 15908353
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-05
Patent Classification: ["716", "136000"]

Abstract:
The present disclosure describes a method for detecting unacceptable connection patterns. The method includes, using a processor to perform at least one of: performing an automated place-and-route (APR) process on a circuit layout that includes a first standard cell without a marker layer to generate a circuit graphic database system (GDS) file from the circuit layout, generating a standard-cell GDS file that includes a second standard cell with at least one marker layer applied to the second standard cell, and merging the circuit GDS file with the standard-cell GDS file to generate a merged GDS file that includes the first standard cell with at least one marker layer based on the second standard cell. The method further includes determining whether a connection pattern of the first standard cell in the merged GDS file is an unacceptable connection pattern.

Claim (Index 13):
The non-transitory computer-readable medium of  claim 10 , wherein the at least one marker layer comprises a pin-marker layer, a must-join pin marker layer, a must-join pin group marker layer, or a combination thereof.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 88.0
- Lexical Diversity: 2.32812
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14528314', '15483516', '14801239', '14690227', '14975482']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3445247634775431
- 35 USC 102 Novelty (BERT): 0.4658706068700089
- Combined Prediction Score: 0.3566593478167897
- Mean Citation Score: 157.666002
- Max Citation Score: 168.43979
- Similarity Product: 115.5635290089202

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test