PATENT CLAIM ANALYSIS

Application Number: 15902422
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-05
Patent Classification: ["257", "506000"]

Abstract:
A method for manufacturing a semiconductor structure including isolations includes receiving a substrate including a first region and a second region; forming a patterned hard mask, the patterned hard mask including a first opening exposing a portion of the first region and a second opening exposing a portion of the second region; removing portions of the substrate to form a first trench in the first region and to form a second trench in the second region; performing an ion implantation to a portion of the patterned hard mask in the first region and a portion of the substrate exposed from the first trench; enlarging the first opening to form a third opening over the first trench and enlarging the second opening to form a fourth opening over the second trench; and forming a first isolation by filling the first trench and a second isolation by filling the second trench.

Claim (Index 7):
The method of  claim 5 , further comprising forming a protecting layer  401  over the second region before performing the ion implantation, and removing the protecting layer before enlarging the first opening and enlarging the second opening.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 88.0
- Lexical Diversity: 3.31915
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10726788', '15658623', '14291512', '14564081', '11279962']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9081322189931468
- 35 USC 102 Novelty (BERT): 0.508727624980489
- Combined Prediction Score: 0.8681917595918811
- Mean Citation Score: 180.89468
- Max Citation Score: 186.04248
- Similarity Product: 104.7512464324665

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test