PATENT CLAIM ANALYSIS

Application Number: 16056250
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["257", "773000"]

Abstract:
Some embodiments include an apparatus having a first chip and a second chip. Each of the first and second chips comprises a multilevel wiring structure and a redistribution wiring layer over the multilevel wiring structure. The redistribution wiring layers include redistribution wiring and pads electrically coupled to the redistribution wiring. The first chip is mounted above the second chip so that the redistribution wiring layer of the first chip faces the redistribution wiring layer of the second chip. The pad of the first chip faces the pad of the second chip, and is vertically spaced from the pad of the second chip by an intervening insulative region. The redistribution wiring of the second chip is electrically coupled to the redistribution wiring of the first chip through a bonding region.

Claim (Index 29):
An apparatus comprising a first die and a second die, each of the first and second dies including a face-side and a back-side, the face-side of the first die being defined by first and second edges substantially parallel to each other, and the face-side of the second side being defined by third and fourth edges substantially parallel to each other;\n wherein the first die comprises, on the face-side thereof:\n at least one first interconnection region between the first and second edges; \n at least one first probe pad between the at least one first interconnection region and the first edge at a position that is closer to the at least one first interconnection region than the first edge; \n at least one first coupling region between the at least one first interconnection region and the second edge; and \n at least one first redistribution wiring including a first portion electrically coupling the at least one first interconnection region to the at least one first probe pad and a second portion electrically coupling the at least one first interconnection region to the at least one first coupling region; \n wherein the second die comprises, on the face-side thereof:\n at least one second interconnection region between the third and fourth edges; \n at least one second probe pad between the at least one second interconnection region and the fourth side edge at a position that is closer to the at least one second interconnection region than the fourth edge; \n at least one second coupling region between the at least one second interconnection region and the at least one second probe pad; and \n at least one second redistribution wiring including a third portion electrically coupling the at least one second interconnection region to the at least one second coupling region and a fourth portion electrically coupling the at least one coupling region to the at least one second probe pad; \n wherein a distance between the at least one first interconnection region and the at least one first probe pad is substantially equal to a distance between the at least one second interconnection region and the at least one second probe pad; and wherein the first die is bonded to the second die in a face-to-face relationship such that the at least one first interconnection region and the at least one second interconnection region are between the at least one first probe pad and the at least one second probe pad, and the at least one first coupling region is electrically coupled to the at least one second coupling region.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 96.0
- Lexical Diversity: 2.95652
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15644383', '14250317', '13444649', '15006805', '15393112']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9144838571000216
- 35 USC 102 Novelty (BERT): 0.5823878072512093
- Combined Prediction Score: 0.8812742521151404
- Mean Citation Score: 255.070922
- Max Citation Score: 522.8526
- Similarity Product: 402.3675268610359

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test