PATENT CLAIM ANALYSIS

Application Number: 16301160
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-06
Patent Classification: ["710", "005000"]

Abstract:
An Advanced Microcontroller Bus Architecture (AMBA)/Advanced eXtensible Interface (AXI) compatible device and corresponding method capable of efficient reordering of responses from a last level cache (LLC) and/or dynamic random access memory (DRAM).

Claim (Index 2):
An Advanced Microcontroller Bus Architecture (AMBA)/Advanced eXtensible Interface (AXI) compatible device comprising:\n a master device including a master request port and a master response port; a last level cache (LLC) configured to receive a first plurality of data requests from the master request port, the LLC including a plurality of banks, wherein each bank of the plurality of banks includes a work queue, an inter-bank coordinator and an intra-bank coordinator, and wherein the LLC is further configured to distribute the first plurality of data requests among a first bank and at least one second bank of the plurality of banks; a tagging unit configured to: receive ordering information about the first plurality of data requests from the master request port; and forward at least a portion of the ordering information to the LLC; and a memory configured to: receive a second plurality of data requests from the first bank and the at least one second bank of the LLC, the second plurality of data requests related to the first plurality of data requests, and in response to the second plurality of data requests, send a plurality of unordered data responses to the first bank and the at least one second bank of the LLC, each unordered data response of the plurality of unordered data responses sent the first bank or the at least one second bank that originated the corresponding data request. wherein the first bank is configured to: perform intra-bank coordination to iteratively determine, based on the ordering information from the tagging unit, that the work queue of the first bank contains a response from the memory corresponding to the oldest request of the first plurality of data requests, and transmit, to the master response port, the response corresponding to the oldest request of the first plurality of data requests, upon determining, based on the ordering information from the tagging unit, that the work queue of first bank does not contain a response from the memory corresponding to the oldest request of the first plurality of data requests, perform inter-bank coordination with the at least one second bank to determine whether the work queue of the first bank or the work queue of the at least one second bank contains a response from the memory corresponding to the oldest request of the first plurality of data requests so that the first bank and at least one second bank relay subsequent responses to the master response port in accordance with the ordering information from the tagging unit.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 98.0
- Lexical Diversity: 1.2
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['11490691', '13323162', '13436944', '10358745', '10172172']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6729851162206094
- 35 USC 102 Novelty (BERT): 0.4940147599946179
- Combined Prediction Score: 0.6550880805980103
- Mean Citation Score: 198.585306
- Max Citation Score: 231.22101
- Similarity Product: 158.9416078559035

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test