PATENT CLAIM ANALYSIS

Application Number: 16149261
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-01
Patent Classification: ["365", "185120"]

Abstract:
Memory devices include a first string of memory cells selectively connected to a first data line, a second string of memory cells selectively connected to a second data line, and a transistor that selectively connects the first data line to the second data line.

Claim (Index 18):
The memory device of  claim 17 , further comprising a plurality of page buffers connected in series with the second data line.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 97.0
- Lexical Diversity: 2.13636
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['16021306', '15019175', '16021250', '15191786', '15692565']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8004596270243274
- 35 USC 102 Novelty (BERT): 0.5029340595955126
- Combined Prediction Score: 0.7707070702814459
- Mean Citation Score: 252.319582
- Max Citation Score: 297.2899
- Similarity Product: 232.0622488917828

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test