PATENT CLAIM ANALYSIS

Application Number: 15956010
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["711", "129000"]

Abstract:
A device including a cache memory that is partitioned into at least a first partition and a second partition. The first partition and the second partition are distinguishable by memory addresses. The first partition is dedicated to a first category of software and the second partition is dedicated to a second category of software. The first category and the second category have different time-sensitivity constraints. The device further includes a processor operative to execute software that includes a first software portion belonging to the first category and a second software portion belonging to the second category.

Claim (Index 8):
The device of  claim 1 , wherein the cache memory is configurable to have different partition sizes.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 2.58974
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13731760', '12419139', '12572189', '13345410', '10603251']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5268018320453618
- 35 USC 102 Novelty (BERT): 0.4773692405966506
- Combined Prediction Score: 0.5218585729004908
- Mean Citation Score: 161.13078000000004
- Max Citation Score: 173.50568
- Similarity Product: 125.37484983645442

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test