PATENT CLAIM ANALYSIS

Application Number: 15882983
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["365", "154000"]

Abstract:
An SRAM cell is constructed by 7 transistors supporting transposed reading in addition to normal reading and writing, thereby retrieving a plurality of data through one-time reading even during column-wise parallel processing as well as row-wise parallel processing. Therefore, delay caused by multiple-time reading and increase in power consumption, occurring in a conventional SRAM, can be solved.

Claim (Index 3):
The SRAM structure according to  claim 2 , wherein,\n during the row-wise reading through the read transistor, the first metal line is a horizontal metal line being used as a wordline and the second metal line is a vertical metal line being used as a bit line and, during the column-wise transposed reading through the read transistor, the vertical metal line is used as the wordline and the horizontal metal line is used as the bit line.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 86.0
- Lexical Diversity: 1.34043
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11445428', '12137598', '11191349', '11828465', '14718574']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8006166239038375
- 35 USC 102 Novelty (BERT): 0.4814770792191383
- Combined Prediction Score: 0.7687026694353676
- Mean Citation Score: 172.81722799999997
- Max Citation Score: 176.92422
- Similarity Product: 117.7935049464941

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test