PATENT CLAIM ANALYSIS

Application Number: 15997849
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["174", "262000"]

Abstract:
The invention provides an interposer substrate and a method of fabricating the same. The method includes: etching a carrier to form a recessed groove thereon; filling a dielectric material in the recessed groove to form a first dielectric material layer, or forming a patterned first dielectric material layer on the carrier; forming a first wiring layer, a first conductive block and a second dielectric material layer on the carrier and the first dielectric material layer sequentially, with the first wiring layer and the first conductive block embedded in the second dielectric material layer; and forming a second wiring layer and a second conductive block on the second dielectric material layer. A coreless interposer substrate having fine pitches is thus fabricated.

Claim (Index 9):
The method of  claim 8 , wherein the first wiring layer is formed by forming on the carrier and the first dielectric material layer a first resist layer that has a plurality of openings, from which the carrier and the first dielectric material layer are exposed, and forming the first wiring layer in the openings of the first resist layer.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 94.0
- Lexical Diversity: 2.6
- Patent Class: 174.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14706101', '14541688', '13588030', '14810523', '13074467']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8583440888987917
- 35 USC 102 Novelty (BERT): 0.5141916487844059
- Combined Prediction Score: 0.8239288448873531
- Mean Citation Score: 254.37162200000003
- Max Citation Score: 316.51376
- Similarity Product: 249.2792321377182

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test