PATENT CLAIM ANALYSIS

Application Number: 16176289
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["711", "153000"]

Abstract:
Methods and apparatus to allocating and/or configuring persistent memory are described. In an embodiment, memory controller logic configures non-volatile memory into a plurality of partitions at least in part based on one or more attributes. One or more volumes (visible to an application or operating system) are formed from one or more of the plurality of partitions. Each of the one or more volumes includes one or more of the plurality of partitions having at least one similar attribute from the one or more attributes. In another embodiment, memory controller logic configures a Non-Volatile Memory (NVM) Dual Inline Memory Module (DIMM) into a persistent region and a volatile region. Other embodiments are also disclosed and claimed.

Claim (Index 6):
The apparatus of  claim 1 , wherein the non-volatile memory is to comprise one or more of: nanowire memory, Ferro-electric transistor random access memory (FeTRAM), magnetoresistive random access memory (MRAM), flash memory, Spin Torque Transfer Random Access Memory (STTRAM), Resistive Random Access Memory, byte addressable 3-Dimensional Cross Point Memory, and Phase Change Memory (PCM).

Metadata:
- Claim Count in Document: 42.0
- Percentile: 97.0
- Lexical Diversity: 1.9697
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14580125', '13928875', '15324107', '15055153', '13994731']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4828239038706995
- 35 USC 102 Novelty (BERT): 0.4869414415630834
- Combined Prediction Score: 0.4832356576399379
- Mean Citation Score: 182.524216
- Max Citation Score: 256.63315
- Similarity Product: 246.5453346977115

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test