PATENT CLAIM ANALYSIS

Application Number: 15986307
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-07
Patent Classification: ["257", "360000"]

Abstract:
An ESD protection circuit assembly for use in a CMOS manufacturing process is disclosed to include an I/O circuit including a power I/O unit and a signal I/O unit, and an electrostatic discharge clamp circuit connected to the power I/O unit and including a P-type substrate, a series of low voltage P-type structures arranged on the P-type substrate, a plurality of low voltage N-type wells formed on the P-type substrate corresponding to the low voltage P-type structures and a first P-type heavily doped area and a second P-type heavily doped area formed in each low voltage N-type well. By using a series of low voltage P-type structures to provide high ESD tolerance, the ESD protection circuit assembly can be more effectively utilized in the same circuit layout area.

Claim (Index 12):
The ESD protection circuit assembly as claimed in  claim 8 , wherein said electrostatic discharge clamp circuit further comprises a plurality of high voltage seal rings surrounding said low voltage P-type structure, each said high voltage seal ring comprising a high voltage P-type doped area formed in said P-type substrate, the said second P-type heavily doped are of the last said low voltage P-type structure and said high voltage seal rings being electrically connected to said high-voltage ground termination pad through said second power line.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 93.0
- Lexical Diversity: 2.12698
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15986245', '12628188', '13216016', '13556219', '10711673']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9226218531854634
- 35 USC 102 Novelty (BERT): 0.5478582184669453
- Combined Prediction Score: 0.8851454897136116
- Mean Citation Score: 300.69648
- Max Citation Score: 417.50394
- Similarity Product: 322.87749336900833

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test