PATENT CLAIM ANALYSIS

Application Number: 15923737
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-01
Patent Classification: ["257", "314000"]

Abstract:
Provided is an integrated circuit device including a plurality of word lines overlapping each other, in a vertical direction, on a substrate, a plurality of channel structures extending in the vertical direction through the plurality of word lines on an area of the substrate, a plurality of bit line contact pads on the plurality of channel structures, and a plurality or bit lines, wherein the plurality of bit lines include a plurality of first bit lines extending parallel to each other at a first pitch in a center region of the area, and a plurality of second bit lines extending at a second pitch in an edge region of the area, the second pitch being different from the first pitch.

Claim (Index 13):
The integrated circuit device of  claim 11 , further comprising\n a plurality of bit line contact pads arranged between the plurality of nonlinear channel structures and the plurality of nonlinear bit lines to connect each of the plurality of nonlinear channel structures to a respective one of the plurality of nonlinear bit lines, wherein the plurality of bit line contact pads are arranged at a variable pitch in the first horizontal direction.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 90.0
- Lexical Diversity: 2.6875
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15831498', '15245441', '13606789', '14804338', '14599064']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9053149937296155
- 35 USC 102 Novelty (BERT): 0.505618974782749
- Combined Prediction Score: 0.865345391834929
- Mean Citation Score: 244.38186
- Max Citation Score: 267.3759
- Similarity Product: 208.51397377343773

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test