PATENT CLAIM ANALYSIS

Application Number: 15898314
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["257", "401000"]

Abstract:
Fabricating a feedback field effect transistor includes receiving a semiconductor structure including a substrate, a first source/drain disposed on the substrate, a fin disposed on the first source/drain, and a hard mask disposed on a top surface of the fin. A bottom spacer is formed on a portion of the first source/drain. A first gate is formed upon the bottom spacer. A sacrificial spacer is formed upon the first gate, a gate spacer is formed on the first gate from the sacrificial spacer, and a second gate is formed on the gate spacer. The gate spacer is disposed between the first gate and the second gate. A top spacer is formed around portions of the second gate and hard mask, a recess is formed in the top spacer and hard mask, and a second source/drain is formed in the recess.

Claim (Index 11):
The method of  claim 1 , wherein the gate spacer is formed of a silicon nitride (SiN) material.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 88.0
- Lexical Diversity: 3.55814
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15426479', '15815663', '15822557', '15828386', '15894128']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9329004260986252
- 35 USC 102 Novelty (BERT): 0.5142146048065437
- Combined Prediction Score: 0.891031843969417
- Mean Citation Score: 283.470392
- Max Citation Score: 296.92023
- Similarity Product: 210.87538780483249

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test