PATENT CLAIM ANALYSIS

Application Number: 15871423
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["438", "481000"]

Abstract:
A method of forming an integrated circuit structure includes forming an insulation layer over at least a portion of a substrate; forming a plurality of semiconductor pillars over a top surface of the insulation layer. The plurality of semiconductor pillars is horizontally spaced apart by portions of the insulation layer. The plurality of semiconductor pillars is allocated in a periodic pattern. The method further includes epitaxially growing a III-V compound semiconductor film from top surfaces and sidewalls of the semiconductor pillars.

Claim (Index 4):
The device of  claim 1 , wherein the V-shaped bottom surface is lower than a top surface of the semiconductor substrate.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 86.0
- Lexical Diversity: 1.86957
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14926976', '14260713', '12842221', '13461595', '12827709']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8673300466399646
- 35 USC 102 Novelty (BERT): 0.4831882337756816
- Combined Prediction Score: 0.8289158653535363
- Mean Citation Score: 194.654904
- Max Citation Score: 217.0378
- Similarity Product: 173.06072782946822

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test