PATENT CLAIM ANALYSIS

Application Number: 16009109
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-01
Patent Classification: ["323", "273000"]

Abstract:
A method for voltage regulation includes reducing a power consumption of a voltage regulator during an IDLE phase, by disabling a feedback loop configured to regulate an internal voltage to a multiple of a reference voltage in response to the voltage regulator receiving a digital signal from a digital circuit. The internal voltage is proportional to an external voltage supplied to the digital circuit. A regulated accuracy of the external voltage is increased during a MEASUREMENT phase by enabling the feedback loop in response to the voltage regulator receiving the digital signal from the digital circuit.

Claim (Index 10):
A voltage regulator, comprising:\n a bandgap reference enabled by a first digital signal connected thereto, the bandgap reference configured to generate a reference voltage, and a bandgap status signal indicating that the reference voltage has stabilized; a feedback loop including an amplifier enabled by the bandgap status signal connected thereto, and configured to compare the reference voltage with a feedback voltage to generate a control voltage on a gate of an internal voltage transistor, the internal voltage transistor having a source follower configuration to generate an internal voltage on a source terminal of the internal voltage transistor, the feedback voltage generated by a resistive division of the internal voltage by a resistive divider connected between the source terminal of the internal voltage transistor and a fixed voltage reference; an external voltage transistor having the source follower configuration to generate an external voltage on a source terminal of the external voltage transistor, a gate of the external voltage transistor connected to the gate of the internal voltage transistor; a pull-up circuit including a pull-up comparator enabled by the bandgap status signal connected thereto, and configured to compare a supply voltage with the control voltage increased by an offset voltage, the pull-up comparator connected to a gate of an internal pull-up transistor, the internal pull-up transistor connected in parallel with the internal voltage transistor; and a Power On Reset (POR) circuit including a POR comparator enabled by the bandgap status signal connected thereto, and configured to compare the reference voltage with a scaled internal voltage to generate an internal POR signal, an external POR circuit configured to generate an external POR signal while the supply voltage is less than a start-up threshold, the internal POR signal and the external POR signal connected to an OR gate to generate a POR signal.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 94.0
- Lexical Diversity: 2.17391
- Patent Class: 323.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14457129', '13490115', '14318699', '15232373', '12367242']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7179195012715532
- 35 USC 102 Novelty (BERT): 0.4590589652972728
- Combined Prediction Score: 0.6920334476741252
- Mean Citation Score: 165.12769199999997
- Max Citation Score: 173.31212
- Similarity Product: 139.48338711984397

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test