PATENT CLAIM ANALYSIS

Application Number: 15862133
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-02
Patent Classification: ["257", "004000"]

Abstract:
Variable resistance memory devices are provided. A variable resistance memory device includes conductive lines and a memory cell including a variable resistance element on one of the conductive lines. The variable resistance memory device includes a first insulating region between the conductive lines. Moreover, the variable resistance memory device includes a second insulating region on the first insulating region between the conductive lines. Methods of forming variable resistance memory devices are also provided.

Claim (Index 35):
The variable resistance memory device of  claim 34 ,\n wherein the first, second, and fourth conductive lines comprise respective word lines, wherein the third conductive line comprises a bit line, wherein the variable resistance element and the chalcogenide layer comprise a first variable resistance element and a first chalcogenide layer, respectively, that are connected in series, and wherein the second memory cell stack comprises a second variable resistance element and a second chalcogenide layer that are connected in series.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 86.0
- Lexical Diversity: 2.39394
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15247987', '13351054', '14527176', '15854551', '15809373']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.931526752823998
- 35 USC 102 Novelty (BERT): 0.5085427821077573
- Combined Prediction Score: 0.889228355752374
- Mean Citation Score: 265.574876
- Max Citation Score: 277.45468
- Similarity Product: 198.51955040005203

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test