PATENT CLAIM ANALYSIS

Application Number: 16129762
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-04
Patent Classification: ["710", "308000"]

Abstract:
A device can include a server that includes a host processor and at least one hardware acceleration (hwa) module having at least one computing element formed thereon, the at least one computing element including processing circuits configured to execute a plurality of processes, first memory circuits, second memory circuits, and a data transfer fabric configured to enable data transfers between the processing circuits and the first and second memory circuits; wherein the at least one computing element is configured to transfer data to, or receive data from, any of: the processing circuits, the first memory circuits, the second memory circuits, or other computing elements coupled to the data transfer fabric.

Claim (Index 6):
The device of  claim 5 , wherein:\n the TDM fabric comprises buses formed with at least one programmable logic device.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 97.0
- Lexical Diversity: 2.17544
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13900318', '15396330', '13931910', '15396323', '13913410']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6570321424540018
- 35 USC 102 Novelty (BERT): 0.4831073981998439
- Combined Prediction Score: 0.639639668028586
- Mean Citation Score: 106.723194
- Max Citation Score: 117.63685
- Similarity Product: 70.89183373443484

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test