PATENT CLAIM ANALYSIS

Application Number: 15882301
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["257", "753000"]

Abstract:
A method for manufacturing a semiconductor device includes forming a plurality of trenches in a dielectric layer, wherein the plurality of trenches each comprise a rounded surface, depositing a liner layer on the rounded surface of each of plurality of trenches, and depositing a conductive layer on the liner layer in each of the plurality of trenches, wherein the conductive layer and the liner layer form a plurality of interconnects, and each of the plurality of interconnects has a cylindrical shape.

Claim (Index 12):
The method according to  claim 9 , wherein the conductive layer is deposited using a reflow process.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 86.0
- Lexical Diversity: 2.63636
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15210437', '15705426', '15609594', '15202656', '14755440']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9316508001822508
- 35 USC 102 Novelty (BERT): 0.5161253775050033
- Combined Prediction Score: 0.8900982579145259
- Mean Citation Score: 272.432104
- Max Citation Score: 301.54874
- Similarity Product: 211.40075717558383

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test