PATENT CLAIM ANALYSIS

Application Number: 16289561
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-06
Patent Classification: ["257", "368000"]

Abstract:
A method for fabricating a semiconductor die involves providing a semiconductor substrate, forming a plurality of active devices and a plurality of passive devices over the semiconductor substrate, forming one or more electrical connections to the plurality of active devices and the plurality of passive devices, forming one or more dielectric layers over at least a portion of the electrical connections, applying an interface material over at least a portion of the one or more dielectric layers, removing portions of the interface material to form a plurality of trenches, and covering at least a portion of the interface material and the plurality of trenches with a substrate layer to form a plurality of radio-frequency isolation cavities.

Claim (Index 4):
The method of  claim 3  wherein a first portion of the semiconductor die unit is covered by a cluster of the plurality of cavities and a second portion of the semiconductor die unit is not covered by any of the plurality of cavities.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 2.67391
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15833175', '15154777', '15792544', '15154646', '15154817']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9501692295851992
- 35 USC 102 Novelty (BERT): 0.5668813834356613
- Combined Prediction Score: 0.9118404449702452
- Mean Citation Score: 383.726326
- Max Citation Score: 393.34628
- Similarity Product: 247.9515926574421

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test