PATENT CLAIM ANALYSIS

Application Number: 15909010
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["365", "225700"]

Abstract:
A memory system comprising: a memory cell. The memory cell comprising a poly-fuse-resistor; and a bipolar junction transistor having a collector-emitter channel and a base-terminal. The collector-emitter channel of the bipolar junction transistor is connected in series with the poly-fuse resistor between a supply-voltage-terminal and a ground-terminal. The base-terminal of the bipolar junction transistor is configured to receive a transistor-control-signal to selectively control a current flow through the poly-fuse-resistor.

Claim (Index 7):
The memory system of  claim 5 , wherein the voltage-comparator, the poly-fuse-resistor and the bipolar junction transistor are provided on the same substrate.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 90.0
- Lexical Diversity: 1.875
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13724536', '12285520', '12109081', '13109858', '12515196']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8144211597204554
- 35 USC 102 Novelty (BERT): 0.477517847502999
- Combined Prediction Score: 0.7807308284987098
- Mean Citation Score: 197.162876
- Max Citation Score: 204.09947
- Similarity Product: 151.26196414990247

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test