PATENT CLAIM ANALYSIS

Application Number: 15884179
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["365", "149000"]

Abstract:
The present disclosure includes apparatuses and methods related to logical operations using memory cells. An example apparatus comprises a first memory cell controlled to invert a data value stored therein and a second memory cell controlled to invert a data value stored therein. The apparatus may further include a controller coupled to the first memory cell and the second memory cell. The controller may be configured to cause performance of a logical operation between the data value stored in the first memory cell and the data value stored in the second memory cell.

Claim (Index 16):
The apparatus of  claim 14 , further comprising write complement transistors coupled to respective write digit lines, wherein the write complement transistors are operable to transfer a complement of a result of the logical operation via the write digit line.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 86.0
- Lexical Diversity: 2.25581
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14721086', '14717580', '13784219', '15680776', '15261645']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8107581420517593
- 35 USC 102 Novelty (BERT): 0.4854948340530119
- Combined Prediction Score: 0.7782318112518846
- Mean Citation Score: 228.91938
- Max Citation Score: 235.8821
- Similarity Product: 174.64324427781102

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test