PATENT CLAIM ANALYSIS

Application Number: 15944617
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["710", "316000"]

Abstract:
A device may include a plurality of data processing engines, a subsystem, and an SoC interface block coupled to the plurality of data processing engines and the subsystem. The SoC interface block may be configured to exchange data between the subsystem and the plurality of data processing engines.

Claim (Index 19):
The tile of  claim 11 , wherein the interface circuitry comprises:\n a stream multiplexer/demultiplexer; a programmable logic interface; a direct memory access engine; and a Network-On-Chip stream interface; wherein the stream multiplexer/demultiplexer couples the stream switch to the programmable logic interface, the direct memory access engine, and the Network-On-Chip stream interface; and wherein the stream multiplexer/demultiplexer is programmable to route data between the stream switch, the programmable logic interface, the direct memory access engine, and the Network-On-Chip stream interface.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 91.0
- Lexical Diversity: 2.0
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15944303', '14322411', '12008352', '11404187', '11954859']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6801444580017285
- 35 USC 102 Novelty (BERT): 0.4849556761691829
- Combined Prediction Score: 0.660625579818474
- Mean Citation Score: 167.10253600000004
- Max Citation Score: 206.81427
- Similarity Product: 148.88594061669232

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test