PATENT CLAIM ANALYSIS

Application Number: 16370330
Application Type: Utility
Filing Date: 2019-03
Publication Date: 2019-07
Patent Classification: ["257", "401000"]

Abstract:
A semiconductor device includes a fin field effect transistor. The semiconductor device includes a first gate electrode, a first source/drain (S/D) region disposed adjacent to the first gate electrode, a first S/D contact disposed on the first S/D region, a first spacer layer disposed between the first gate electrode and the first S/D region, a first contact layer in contact with the first gate electrode and the first S/D contact, and a first wiring layer integrally formed with the first contact layer. There is no interface between the first contact layer and the first wiring layer in a cross sectional view, and the first contact layer has a smaller area than the first wiring layer in plan view.

Claim (Index 5):
The semiconductor device of  claim 1 , wherein the second contact layer is a contact layer closest to the third contact layer in a plan view.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 99.0
- Lexical Diversity: 2.74468
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15090202', '15886645', '15157283', '16049569', '15648269']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9093583551023148
- 35 USC 102 Novelty (BERT): 0.4900795395981873
- Combined Prediction Score: 0.867430473551902
- Mean Citation Score: 195.703246
- Max Citation Score: 222.34425
- Similarity Product: 167.52749638701974

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test