PATENT CLAIM ANALYSIS

Application Number: 15875985
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["365", "185250"]

Abstract:
Apparatuses and methods for refreshing memory of a semiconductor device are described. An example method includes producing, responsive to a first refresh command, a plurality of first refresh addresses and detecting, responsive to the plurality of first refresh addresses, that the plurality of first refresh addresses include, a first defective address and a first non-defective address. The example method further includes refreshing, responsive to a second refresh command following the first refresh command, the non-defective first address without refreshing the first defective address.

Claim (Index 14):
The apparatus of  claim 11  wherein the row address control circuit comprises a counter circuit configured to provide a plurality of count values, wherein the first refresh address is combined with each of the plurality of count values to provide a first plurality of refresh addresses, each of the first plurality of refresh addresses corresponds to a respective one of the first memory locations.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 86.0
- Lexical Diversity: 2.44737
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14835419', '15459844', '15236638', '15271734', '15789897']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.805611520970429
- 35 USC 102 Novelty (BERT): 0.45802674513036
- Combined Prediction Score: 0.7708530433864221
- Mean Citation Score: 178.935808
- Max Citation Score: 180.28357
- Similarity Product: 149.3653949116838

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test