PATENT CLAIM ANALYSIS

Application Number: 15926442
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-11
Patent Classification: ["341", "118000"]

Abstract:
A multi-bit continuous-time sigma-delta modulator, SDM, includes an input configured to receive an input analog signal, a first summing junction configured to subtract a feedback analog signal from the input analog signal, a loop filter configured to filter an output signal from the first summing junction: an analog-to-digital converter, ADC, configured to convert the filtered analog output signal to a digital output signal; and a feedback path for routing the digital output signal to the first summing junction. The feedback path includes a plurality of digital-to-analog converters, DACs, configured to convert the digital output signal to an analog form. The ADC includes multiple per-bit parallel loops, each loop configured to provide a per-bit current summation of the filtered analog output signal such that an output of the multiple per-bit parallel loops is a multi-bit quantization digital output signal.

Claim (Index 7):
An integrated circuit comprising a multi-bit continuous-time sigma-delta modulator, SDM, comprising:\n an input configured to receive an input analog signal; a first summing junction configured to subtract a feedback analog signal from the input analog signal; a loop filter configured to filter an output signal from the first summing junction: an analog-to-digital converter, ADC, configured to convert the filtered analog output signal to a digital output signal; and a feedback path for routing the digital output signal to the first summing junction, wherein the feedback path comprises a plurality of digital-to-analog converters, DACs, configured to convert the digital output signal to an analog form; wherein the multi-bit SDM  044 ) is characterised in that the ADC comprises multiple per-bit parallel loops, each loop configured to provide a per-bit current summation of the filtered analog output signal such that an output of the multiple per-bit parallel loops is a multi-bit quantization digital output signal.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 90.0
- Lexical Diversity: 2.62069
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14475852', '15440612', '11679388', '15499872', '11208430']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6318867008345205
- 35 USC 102 Novelty (BERT): 0.5215363831462837
- Combined Prediction Score: 0.6208516690656968
- Mean Citation Score: 310.35413000000005
- Max Citation Score: 331.5377200000001
- Similarity Product: 289.1198161021949

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test