PATENT CLAIM ANALYSIS

Application Number: 16240212
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["257", "686000"]

Abstract:
A semiconductor package may include a first redistribution layer (RDL); a first semiconductor chip on a top surface of the first RDL, the first semiconductor chip including a first circuit surface and a first bottom surface, the first circuit surface having first I/O pads thereon, the first I/O pads configured to electrically connect the first semiconductor chip to the first RDL via first wire bonds; a second semiconductor chip on the first semiconductor chip, the second semiconductor chip including a second circuit surface and a second bottom surface; and a second RDL on the second semiconductor chip, the second RDL facing both the first circuit surface and the second circuit surface.

Claim (Index 28):
The semiconductor package of  claim 27 , wherein the second semiconductor chip further includes contacts on the second circuit surface thereof, the contacts being interposed between the second circuit surface and the second RDL such that the contacts electrically connect the second semiconductor chip to the second RDL.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 99.0
- Lexical Diversity: 3.12821
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15477617', '15203418', '15644849', '15263391', '15891481']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9260726731910592
- 35 USC 102 Novelty (BERT): 0.529549803268648
- Combined Prediction Score: 0.886420386198818
- Mean Citation Score: 257.103278
- Max Citation Score: 356.29532
- Similarity Product: 311.2705307074857

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test