PATENT CLAIM ANALYSIS

Application Number: 16139415
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-09
Patent Classification: ["327", "166000"]

Abstract:
A clock and data recovery circuit includes a first phase detector, a first charge pump, a first voltage-controlled oscillator (VCO), and an auxiliary module. The auxiliary module includes: an auxiliary clock generator, generating an auxiliary clock signal; a second phase detector, coupled to the auxiliary clock generator, comparing a phase of the auxiliary clock signal with that of a first clock signal outputted by the first VCO; and a multiplexing selecting unit, outputting a multiplexing output signal to the first charge pump according to a selection signal.

Claim (Index 3):
The clock and data recovery circuit according to  claim 1 , wherein the first phase detector comprises:\n a third delay unit, receiving the data signal and the first clock signal to generate a third delayed signal; a forth delay unit, coupled to the third delay unit, receiving the third delayed signal and the first clock signal to generate a fourth delayed signal; a third XOR gate, performing an XOR operation on the data signal and the third delayed signal to generate a second rising signal; and a fourth XOR gate, performing an XOR operation on the third delayed signal and the fourth delayed signal to generate a second falling signal; wherein the second rising signal and the second falling signal form the first output signal.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 97.0
- Lexical Diversity: 2.19565
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10038613', '11472815', '10947891', '11228990', '11789330']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7895378170004307
- 35 USC 102 Novelty (BERT): 0.4793584552627308
- Combined Prediction Score: 0.7585198808266607
- Mean Citation Score: 194.63989
- Max Citation Score: 205.70082
- Similarity Product: 155.7020031443238

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test