PATENT CLAIM ANALYSIS

Application Number: 16082212
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-06
Patent Classification: ["257", "334000"]

Abstract:
A technique is provided for effectively suppressing a forward voltage shift due to occurrence of a stacking fault. A semiconductor device relating to the present technique includes a first well region of a second conductivity type, a second well region of the second conductivity type which is so provided as to sandwich the whole of a plurality of first well regions in a plan view and has an area larger than that of each of the first well regions, a third well region of the second conductivity type which is so provided as to sandwich the second well region in a plan view and has an area larger than that of the second well region, and a dividing region of a first conductivity type provided between the second well region and the third well region, having an upper surface which is in contact with an insulator.

Claim (Index 1):
A semiconductor device, comprising:\n a drift layer of a first conductivity type which is a wide-gap semiconductor layer provided on an upper surface of a semiconductor substrate of the first conductivity type; a plurality of first well regions each of a second conductivity type provided, being separated from one another in a surface layer of the drift layer; a first separation region of the first conductivity type provided penetrating from a surface layer of each of the first well regions in a depth direction; a source region of the first conductivity type provided in the surface layer of each of the first well regions; a first Schottky electrode provided on an upper surface of the first separation region; a first ohmic electrode provided at least partially in a surface layer of the source region; a second well region of the second conductivity type which is so provided in the surface layer of the drift layer as to sandwich the whole of the plurality of first well regions in a plan view and has an area larger than that of each of the first well regions; a third well region the second conductivity type which is so provided in the surface layer of the drift layer as to sandwich the second well region in a plan view and has an area larger than that of the second well region a second ohmic electrode provided in part of the second well region; a dividing region of the first conductivity type provided between the second well region the third well region; and a source electrode connected to the first Schottky electrode, the first ohmic electrode, and the second ohmic electrode, wherein the third well region has no ohmic connection to the source electrode.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 97.0
- Lexical Diversity: 2.62069
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14779255', '15567670', '15502409', '13643468', '14426062']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.925960641355276
- 35 USC 102 Novelty (BERT): 0.5037138610288042
- Combined Prediction Score: 0.8837359633226289
- Mean Citation Score: 289.476332
- Max Citation Score: 305.3279
- Similarity Product: 278.6987252622187

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test