PATENT CLAIM ANALYSIS

Application Number: 15765116
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["257", "773000"]

Abstract:
Some embodiments relate to a semiconductor power device that includes a first substrate, a second substrate, a stack and an interconnect structure. The first substrate includes a first patterned electrically conductive layer on a first surface and a switching semiconductor element. The second substrate includes a second surface facing the first surface and a second patterned electrically conductive layer on the second surface. The stack includes an electrically conductive track and a layer of a dielectric material. The layer of the dielectric material is provided on the first or second patterned electrically conductive layer and the layer of the dielectric material isolates the electrically conductive track from the patterned electrically conductive layer on which the stack is provided. The interconnect structure provides at least one electrical connection electrically conductive layers or areas of the substrates.

Claim (Index 1):
A semiconductor power device comprising:\n a first substrate including a switching semiconductor element and a first patterned electrically conductive layer, the first substrate having a first surface on which the first patterned electrically conductive layer is provided, the switching semiconductor element being provided on the first patterned electrically conductive layer, a second substrate including a second patterned electrically conductive layer and a second surface facing the first surface, the second patterned electrically conductive layer being provided on the second surface, a stack of an electrically conductive track and a layer of a dielectric material, the layer of the dielectric material being at least partly provided on the first patterned electrically conductive layer, or on the second patterned electrically conductive layer isolating the electrically conductive track from the patterned electrically conductive layer on which the stack is provided, and an interconnect structure for providing at least one electrical connection between\n the first patterned electrically conductive layer, a surface of the switching semiconductor element or the electrically conductive track at one side, and \n the second patterned electrically conductive layer or the electrically conductive track at the other side.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 90.0
- Lexical Diversity: 2.86
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['16078688', '12202665', '15632983', '14757572', '15274451']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8949073227966142
- 35 USC 102 Novelty (BERT): 0.4838803961776883
- Combined Prediction Score: 0.8538046301347216
- Mean Citation Score: 184.45426000000003
- Max Citation Score: 195.41823
- Similarity Product: 150.5182869222289

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test