PATENT CLAIM ANALYSIS

Application Number: 16242405
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-07
Patent Classification: ["716", "108000"]

Abstract:
Disclosed are techniques that can be used in a semiconductor chip to determine performance such as timing performance. Among other features, supply voltages and clock rates may be adjusted to accommodate the operating temperature and to compensate for the processing variations that occurred when that chip was produced, or may occur as the chip is used. The techniques include determining a series of variables that affect performance, determining the sensitivity of timing paths in the circuit to each variable, duplicating the most sensitive paths. A novel sensor circuit is produced that includes the sensitive paths, which can be used to determine when the chip is performing as required and when it is not, and adjusting one or more supply voltages and/or clock rates in a static or real time manner when the circuit is not performing as required.

Claim (Index 20):
The apparatus of  claim 13 , wherein the input of the timing circuit is configured to receive a logical inverse of the output of the logic circuit.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 99.0
- Lexical Diversity: 1.94737
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['10351061', '10351056', '15367803', '13294210', '14141473']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3314199275769811
- 35 USC 102 Novelty (BERT): 0.4596226956869121
- Combined Prediction Score: 0.3442402043879742
- Mean Citation Score: 125.137844
- Max Citation Score: 131.53839
- Similarity Product: 88.18232050307033

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test