PATENT CLAIM ANALYSIS

Application Number: 16031129
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["358", "001140"]

Abstract:
In accordance with an embodiment, an image forming apparatus includes a first processor configured to generate a first operation signal and a second processor configured to generate a second operation signal indicating an operation state of the second processor. A pin input is configured to generate a second output signal, and an application-specific integrated circuit (ASIC) configured to generate data and output the data based on the first output signal or the second output signal.

Claim (Index 7):
The image forming apparatus according to  claim 6 , wherein the second data processing circuit operates according to the clock cycle of the first PLL.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 95.0
- Lexical Diversity: 2.025
- Patent Class: 358.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13444180', '12332702', '09822733', '09821948', '13729603']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4970357707065972
- 35 USC 102 Novelty (BERT): 0.4688993244036055
- Combined Prediction Score: 0.4942221260762981
- Mean Citation Score: 121.53256000000002
- Max Citation Score: 129.14777
- Similarity Product: 93.81161069826425

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test