PATENT CLAIM ANALYSIS

Application Number: 15914146
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["257", "369000"]

Abstract:
A method for fabricating a semiconductor structure includes providing a substrate including a first region and a second region, forming a dielectric layer with a first opening in the first region and a second opening in the second region, forming a functional layer, forming a first doped layer containing first work function adjusting ions in the first opening, forming a second doped layer containing second work function adjusting ions in the second opening, performing an annealing process to diffuse the first work function adjusting ions into the functional layer in the first opening and the second work function adjusting ions into the functional layer in the second opening, removing the first doped layer and the second doped layer, forming a work function layer in both the first opening and the second opening, and forming a gate electrode layer in each of the first opening and the second opening.

Claim (Index 11):
The method for fabricating the semiconductor structure according to  claim 1 , wherein:\n the functional layer is made of one or more of HfO 2 , La 2 O 3 , HfSiON, HfAlO 2 , ZrO 2 , Al 2 O 3 , and HfSiO 4 .

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 3.56818
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15491501', '14609520', '15407387', '15697905', '14992448']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.921874291927684
- 35 USC 102 Novelty (BERT): 0.5017085581002468
- Combined Prediction Score: 0.8798577185449402
- Mean Citation Score: 202.676618
- Max Citation Score: 230.37303
- Similarity Product: 153.50706539610383

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test