PATENT CLAIM ANALYSIS

Application Number: 15958426
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "369000"]

Abstract:
A semiconductor device at least one first transistor of a first type disposed above a substrate and comprising a channel wider in one cross-section than tall, wherein the first type is a PFET transistor or an NFET transistor; and at least one second transistor of a second type disposed above the at least one first transistor and comprising a channel taller in the one cross-section than wide, wherein the second type is a PFET transistor or an NFET transistor, and the second type is different from the first type. Methods and systems for forming the semiconductor structure.

Claim (Index 11):
The method of  claim 9 , wherein forming the spacer comprises forming at least one crenel on the spacer, and the at least one fin is formed on one crenel.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 91.0
- Lexical Diversity: 2.45238
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15918077', '15652873', '15868683', '15056966', '15622061']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9302345811280518
- 35 USC 102 Novelty (BERT): 0.5195297049229853
- Combined Prediction Score: 0.8891640935075451
- Mean Citation Score: 267.90535199999994
- Max Citation Score: 292.11984
- Similarity Product: 177.45331829916

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test