PATENT CLAIM ANALYSIS

Application Number: 15871904
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-09
Patent Classification: ["725", "118000"]

Abstract:
A system includes a processor and a memory. The memory stores instructions executable by the processor to receive first and second media units with respective first and second time stamps that are assigned based on a first clock cycle time and a data transmission rate, and to assign an adjusted time stamp to the second media unit based on the first clock cycle time, a second clock cycle time, the first time stamp, and the data transmission rate.

Claim (Index 4):
The system of  claim 1 , wherein the instructions include further instructions executable by the processor to assign the adjusted time stamp to the second media unit only upon determining that the second time stamp is within an expected time interval.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 2.1
- Patent Class: 725.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15278224', '14853868', '13210652', '12616959', '14317181']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4258988448364811
- 35 USC 102 Novelty (BERT): 0.4789114550110878
- Combined Prediction Score: 0.4312001058539418
- Mean Citation Score: 101.10330100000002
- Max Citation Score: 104.60743
- Similarity Product: 66.07941399056494

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test