PATENT CLAIM ANALYSIS

Application Number: 16141717
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["365", "185190"]

Abstract:
Embodiments are provided that include a memory device having a memory array including a plurality of access lines and data lines. The memory device further includes a circuit coupled to the plurality of access lines and configured to provide consecutive pulses to a selected one of the plurality of access lines. Each pulse of the consecutive pulses includes a first voltage and a second voltage. The first voltage is greater in magnitude than the second voltage, and the first voltage is applied for a shorter duration than the second voltage.

Claim (Index 2):
The memory device of  claim 1 , wherein each pulse of the consecutive pulses further comprises a third voltage, wherein the third voltage is provided after the first voltage, and wherein the third voltage is less than the second voltage in magnitude.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 2.06522
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14331056', '15673218', '13047562', '13971626', '13480378']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8536084224211236
- 35 USC 102 Novelty (BERT): 0.5231253344647214
- Combined Prediction Score: 0.8205601136254833
- Mean Citation Score: 354.77047000000016
- Max Citation Score: 364.59955
- Similarity Product: 319.5664676160157

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test