PATENT CLAIM ANALYSIS

Application Number: 16258666
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-06
Patent Classification: ["365", "051000"]

Abstract:
A multi-level distributed pattern processor comprises a plurality of storage-processing units (SPU's). Each of the SPU's comprises at least a non-volatile memory (NVM) array and a pattern-processing circuit. The NVM array and the pattern-processing circuit are disposed on different physical levels.

Claim (Index 17):
The pattern processor according to  claim 11  being a big-data processor, wherein:\n said search pattern on said input bus includes at least a keyword or a regular expression; \n said target pattern in said NVM array includes at least a portion of big data; \n said pattern-processing circuit searches said portion of big data for said keyword or said regular expression.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 1.47059
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15729643', '15729640', '11952103', '13669727', '15737151']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.778629743625176
- 35 USC 102 Novelty (BERT): 0.5096119305324366
- Combined Prediction Score: 0.7517279623159021
- Mean Citation Score: 177.9861328
- Max Citation Score: 269.11395
- Similarity Product: 167.8786500912845

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test