PATENT CLAIM ANALYSIS

Application Number: 16117094
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "347000"]

Abstract:
A semiconductor device includes a plurality of semiconductor layers formed on a plurality of fin structures, an epitaxial layer formed on the plurality of fin structures and on a sidewall of the plurality of semiconductor layers, a gate structure formed on the plurality of semiconductor layers, and a wrap around contact formed on the epitaxial layer.

Claim (Index 19):
A semiconductor device, comprising:\n a plurality of semiconductor layers formed on a plurality of fin structures; a shallow trench isolation (STI) region formed between the plurality of fin structures, an upper surface of the STI region being coplanar with an upper surface of the plurality of fin structures; an epitaxial layer formed on the plurality of fin structures and on a sidewall of the plurality of semiconductor layers; a plurality of gate structures formed on the plurality of semiconductor layers, and comprising a metal layer and a spacer formed on a side of the metal layer; and a wrap around contact formed on the spacer and on the epitaxial layer between the plurality of gate structures.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 96.0
- Lexical Diversity: 2.4
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15199334', '14949964', '15387933', '15841942', '14964968']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9182755649432394
- 35 USC 102 Novelty (BERT): 0.5566996125385721
- Combined Prediction Score: 0.8821179697027727
- Mean Citation Score: 283.098716
- Max Citation Score: 436.03226
- Similarity Product: 358.61454253409147

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test