PATENT CLAIM ANALYSIS

Application Number: 15979983
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["345", "633000"]

Abstract:
Systems and methods are disclosed herein for providing improved cache structures and methods that are optimally sized to support a predetermined range of late stage adjustments and in which image data is intelligently read out of DRAM and cached in such a way as to eliminate re-fetching of input image data from DRAM and minimize DRAM bandwidth and power. The systems and methods can also be adapted to work with compressed image data.

Claim (Index 12):
A head-mounted, augmented, mixed or virtual reality display device (HMD) comprising:\n a display; a graphics processing unit (GPU) that generates images that can include text, holographic objects and other visual elements that can be displayed on the display; system memory that stores GPU images as compressed image data; a holographic processing unit (HPU), with an on-chip cache, the HPU configured to perform late stage adjustments to correct GPU images for movement of the HMD that may occur during the image rendering process, the cache for constructing an output image based on the GPU generated image and the late stage adjustments, the cache being divided into a first cache, a second cache and a third cache, and the HPU generating a late stage adjustment matrix that maps each pixel of the late stage adjusted output image to the corresponding pixel of the GPU image; one or more processors; and one or more physical computer-readable storage media having stored thereon instructions that are executable by the one or more processors to configure the HPU to perform at least the following acts:\n retrieving one or more tiles of compressed GPU image data from system memory and placing the compressed GPU image data in the first cache, the one or more tiles of compressed GPU image data being selected in the order needed to construct the output image; \n retrieving and decompressing one or more tiles of compressed GPU image data from the first cache and placing the decompressed GPU image data in the second cache, the one or more tiles being selected in the order needed to construct the output image; \n retrieving one or more rows of decompressed GPU image data from the second cache and writing the one or more rows of decompressed GPU image data into the third cache in the order needed to construct the output image based on the late stage adjustment matrix; and \n constructing the output image by walking the one or more rows of the decompressed GPU image data in the third cache according to the adjustment matrix and outputting the output image.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 93.0
- Lexical Diversity: 1.41509
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15415542', '15415569', '15485899', '15470790', '15403649']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6202122825521867
- 35 USC 102 Novelty (BERT): 0.56254538271849
- Combined Prediction Score: 0.6144455925688171
- Mean Citation Score: 295.7729720000001
- Max Citation Score: 421.43912
- Similarity Product: 406.6117477778053

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test