PATENT CLAIM ANALYSIS

Application Number: 16149261
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-01
Patent Classification: ["365", "185120"]

Abstract:
Memory devices include a first string of memory cells selectively connected to a first data line, a second string of memory cells selectively connected to a second data line, and a transistor that selectively connects the first data line to the second data line.

Claim (Index 13):
The memory device of  claim 12 , wherein the first transistor selectively connects the plurality of page buffers in parallel to the first data line and the second transistor selectively connects the plurality of page buffers in parallel to the second data line.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 97.0
- Lexical Diversity: 2.13636
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['16021306', '15019175', '16021250', '15191786', '15692565']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8197733582473999
- 35 USC 102 Novelty (BERT): 0.4943328156468005
- Combined Prediction Score: 0.78722930398734
- Mean Citation Score: 252.319582
- Max Citation Score: 297.2899
- Similarity Product: 287.9547239423037

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test