PATENT CLAIM ANALYSIS

Application Number: 15982033
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["257", "288000"]

Abstract:
A method for fabricating a semiconductor device includes providing a first wafer comprising a substrate and a first semiconductor material layer, bonding the first wafer to a second wafer, the second wafer comprising a sacrificial layer and a second semiconductor material layer, removing the sacrificial layer, patterning the bonded wafers to create a first structure and a second structure, removing the second semiconductor material from the first structure, forming a first type of transistor in the first semiconductor material of the first structure, and forming a second type of transistor in the second semiconductor material of the second structure.

Claim (Index 3):
The method of  claim 1 , wherein forming the first type of transistor and the second type of transistor comprises epitaxially growing source/drain regions within the first semiconductor material layer and the second semiconductor material layer, the source/drain regions having vertexes pointed towards a region underneath a gate device.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 93.0
- Lexical Diversity: 3.05714
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14581970', '15053365', '15369635', '15344856', '14582431']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.911520463829042
- 35 USC 102 Novelty (BERT): 0.4767903655103899
- Combined Prediction Score: 0.8680474539971769
- Mean Citation Score: 165.30527
- Max Citation Score: 196.5959
- Similarity Product: 159.34931353065372

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test