PATENT CLAIM ANALYSIS

Application Number: 15982766
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["257", "503000"]

Abstract:
Disclosed herein is a configuration for ensuring sufficient power supply ability and ESD protection capability for I/O cells in a semiconductor integrated circuit device, without increasing its circuit area. In two I/O cell rows, a pair of I/O cells for supplying a power supply potential or ground potential are connected together via a common power supply interconnect. The I/O cells are arranged so as to overlap with each other in a first direction in which the I/O cells are arranged. The common power supply interconnect extends in a second direction perpendicular to the first direction, and is connected to first pads that are located closest in the first direction to the common power supply interconnect.

Claim (Index 6):
A semiconductor integrated circuit device comprising:\n at least two I/O cell rows each including a plurality of I/O cells arranged in a first direction; a plurality of external connection pads; a first common power supply interconnect that connects together a plurality of first I/O cells configured either as I/O cells for supplying a power supply potential or as I/O cells for supplying a ground potential, the first I/O cells each included in a respective one of the at least two I/O cell rows; and a second common power supply interconnect that connects together a plurality of second I/O cells configured either as I/O cells for supplying a power supply potential or as I/O cells for supplying a ground potential, the second I/O cells each included in a respective one of the at least two I/O cell rows, wherein the first I/O cells connected together via the first common power supply interconnect are arranged so as to overlap with each other in the first direction, the second I/O cells connected together via the second common power supply interconnect are arranged so as to overlap with each other in the first direction, the first common power supply interconnect extends in a second direction perpendicular to the first direction, and is connected to a first pad which is included by the plurality of external connection pads and is located closest to the first common power supply interconnect in the first direction among the plurality of external connection pads, the second common power supply interconnect extends in the second direction and is connected to a second pad which is included by the plurality of external connection pads, and the first pad and the second pad are arranged at a same position in the first direction.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 93.0
- Lexical Diversity: 1.90625
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15493338', '15493321', '12268904', '14243523', '12872678']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9038918404503284
- 35 USC 102 Novelty (BERT): 0.5264810234424859
- Combined Prediction Score: 0.8661507587495442
- Mean Citation Score: 256.64721799999995
- Max Citation Score: 340.84595
- Similarity Product: 317.4933763901323

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test