PATENT CLAIM ANALYSIS

Application Number: 15766428
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-12
Patent Classification: ["257", "506000"]

Abstract:
A dielectric capacitor includes: a bottom silicon layer ( 102 ); a buried oxide layer ( 104 ) formed on a surface of the bottom silicon layer ( 102 ); a top silicon layer ( 106 ) formed on a surface of the buried oxide layer ( 104 ); an interlayer dielectric layer ( 108 ) formed on a surface of the top silicon layer ( 106 ); a lower plate ( 110 ), an insulation layer ( 112 ), and an upper plate ( 114 ) sequentially formed on the interlayer dielectric layer ( 108 ) and forming the main portion of the dielectric capacitor; a shallow trench isolation structure ( 116 ) formed on the top silicon layer ( 106 ) and configured to isolate an active region; and a deep trench isolation structure ( 118 ) formed below the lower plate ( 110 ) and passing through the top silicon layer ( 106 ) to be connected to the buried oxide layer ( 104 ).

Claim (Index 2):
The dielectric capacitor according to  claim 1 , wherein the number of the deep trench isolation structure is plural, and the plurality of spaced apart deep trench isolation structures are distributed in the top silicon layer beneath the lower plate.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 91.0
- Lexical Diversity: 3.12281
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14686784', '13932009', '12191430', '14068353', '12016312']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.920645821615411
- 35 USC 102 Novelty (BERT): 0.4826825355679053
- Combined Prediction Score: 0.8768494930106604
- Mean Citation Score: 186.439
- Max Citation Score: 191.0244
- Similarity Product: 142.79464483337404

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test