PATENT CLAIM ANALYSIS

Application Number: 16113542
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-04
Patent Classification: ["257", "077000"]

Abstract:
At bottom of a gate trench, a conductive layer is provided. A Schottky junction is formed along a side wall of the gate trench by the conductive layer and the n-type current spreading region. The Schottky junction constitutes one unit cell of a trench-type SBD. In the gate trench, a gate electrode is provided on the conductive layer, via an insulating layer. The gate electrode constitutes one unit cell of a trench-gate-type vertical MOSFET. In other words, one unit cell of the trench gate MOSFET and one unit cell of the trench-type SBD are disposed built into a single gate trench and oppose each other in a depth direction.

Claim (Index 2):
The semiconductor device according to  claim 1 , wherein\n an interface of the conductive layer and the insulating layer is positioned closer to the semiconductor substrate than is an interface of the second semiconductor layer and the first semiconductor layer.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 96.0
- Lexical Diversity: 2.2037
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15943696', '16113523', '15846040', '15397677', '15988764']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9318962921633784
- 35 USC 102 Novelty (BERT): 0.5057396888341312
- Combined Prediction Score: 0.8892806318304537
- Mean Citation Score: 272.10445
- Max Citation Score: 299.72046
- Similarity Product: 263.1459236383152

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test