PATENT CLAIM ANALYSIS

Application Number: 16032822
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-05
Patent Classification: ["365", "205000"]

Abstract:
A semiconductor memory device includes a cell array that includes a first row block and a second row block, a bit line sense amplifier block that senses data stored in the first row block or the second row block, a local sense amplifier that latches the sensed data transferred from the bit line sense amplifier block, and a switch that connects the local sense amplifier with a selected one of a first global data line and a second global data line in response to a select signal. The second row block may be placed at an edge of the cell array, and the switch connects the local sense amplifier with the first global data line when the first row block is activated and connects the local sense amplifier with the second global data line when the second row block is activated.

Claim (Index 15):
The semiconductor memory device of  claim 9 , wherein the multiplexer is formed in a peripheral area of the cell array.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 95.0
- Lexical Diversity: 2.82692
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11589038', '11024348', '10892361', '11017683', '12015244']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8252158544080709
- 35 USC 102 Novelty (BERT): 0.4928872525407534
- Combined Prediction Score: 0.7919829942213391
- Mean Citation Score: 251.26511
- Max Citation Score: 256.9631
- Similarity Product: 191.1070485171676

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test