PATENT CLAIM ANALYSIS

Application Number: 16031212
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "532000"]

Abstract:
A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.

Claim (Index 7):
The chip capacitor according to  claim 1 , wherein the substrate is a semiconductor substrate,\n the lower electrode includes an impurity diffusion layer formed inside the semiconductor substrate, and the diode includes an impurity diffusion layer continuous to the impurity diffusion layer of the lower electrode.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 95.0
- Lexical Diversity: 2.59459
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14440016', '15051648', '14349901', '15498454', '14373900']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9336096687965284
- 35 USC 102 Novelty (BERT): 0.5458072578241957
- Combined Prediction Score: 0.8948294276992952
- Mean Citation Score: 311.8674620000001
- Max Citation Score: 394.5146
- Similarity Product: 386.7549408086657

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test