PATENT CLAIM ANALYSIS

Application Number: 16009661
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["257", "315000"]

Abstract:
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, and a memory stack structure extending through the alternating stack. The memory stack structure includes a tunneling dielectric layer, a vertical semiconductor channel, and a vertical stack of charge storage structures. Each of the charge storage structures includes an annular silicon nitride portion, a lower silicon nitride portion underlying the upper silicon nitride portion, and a spacer located between the upper silicon nitride portion and the lower silicon nitride portion. The upper and lower silicon nitride portions may be charge storage regions, while the spacer may be a floating gate or a dielectric spacer.

Claim (Index 8):
The three-dimensional memory device of  claim 1 , wherein the spacer comprises a floating gate including a conductive material or a semiconductor material.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 94.0
- Lexical Diversity: 2.36538
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15715629', '15863205', '15626766', '15434544', '15235864']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9344335381772236
- 35 USC 102 Novelty (BERT): 0.5520685087456165
- Combined Prediction Score: 0.8961970352340629
- Mean Citation Score: 397.528202
- Max Citation Score: 406.55264
- Similarity Product: 321.5018177088547

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test