PATENT CLAIM ANALYSIS

Application Number: 16229155
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-07
Patent Classification: ["375", "362000"]

Abstract:
A transceiver and a clock generation module are provided. The transceiver includes a receiver and the clock generation module. The receiver receives a receiving-input-data and a receiving-input-strobe. The receiver includes a data-receiving circuit for delaying the receiving-input-data and a strobe-receiving circuit for delaying the receiving-input-strobe. The clock generation module includes a calibration circuit, a phase-compensation module, and a multi-phase signal generator. The phase-compensation module compensates one of the data-receiving circuit and the strobe-receiving circuit according to a data-phase-compensation signal and a strobe-phase-compensation signal generated by the calibration circuit. The multi-phase signal generator generates shifted system-clock signals. A phase difference between the first and the second shifted system-clock signals is equivalent to a phase difference between the receiving-path-data and the receiving-path-strobe.

Claim (Index 19):
A clock generation module, electrically connected to a receiver, wherein the receiver receives a receiving-input-data and a receiving-input-strobe, wherein the receiving-input-data and the receiving-input-strobe have a receiving-input phase difference, the receiving-input-data is delayed to generate a receiving-delayed-data, and the receiving-input-strobe is delayed to generate a receiving-delayed-strobe, and the clock generation module comprises:\n a calibration circuit, configured to selectively generate one of a first set of phase control signals comprising a strobe-phase-compensation signal and a second set of phase control signals comprising a data-phase-compensation signal; and a phase-compensation module, comprising:\n a data-phase-compensation circuit, electrically connected to the receiver, configured to generate a receiving-path-data by delaying the receiving-delayed-data with a receiving-data compensation when the data-phase-compensation signal is generated; and \n a strobe-phase-compensation circuit, electrically connected to the strobe-receiving circuit and the calibration circuit, configured to generate a receiving-path-strobe by delaying the receiving-delayed-strobe with a receiving-strobe compensation when the strobe-phase-compensation signal is generated,\n wherein the receiving-path-data and the receiving-path-strobe have a receiving-path phase difference which is different from the receiving-input phase difference; and \n \n a multi-phase signal generator, electrically connected to the calibration circuit, configured to generate a first shifted system-clock signal and a second shifted system-clock signal based on a system-clock signal, wherein a first shifted system-clock difference between the second shifted system-clock signal and the first shifted system-clock signal is equivalent to the receiving-path phase difference.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 98.0
- Lexical Diversity: 2.6
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12079388', '15722209', '10852864', '13249954', '10923421']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.459281363142154
- 35 USC 102 Novelty (BERT): 0.5107522150350202
- Combined Prediction Score: 0.4644284483314406
- Mean Citation Score: 278.11861600000003
- Max Citation Score: 291.84943
- Similarity Product: 236.7379486603469

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test