PATENT CLAIM ANALYSIS

Application Number: 15754887
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["257", "347000"]

Abstract:
Semiconductor contact architectures are provided, wherein contact metal extends into the semiconductor layer to which contact is being made, thereby increasing contact area. An offset spacer allows a relatively deep etch into the semiconductor material to be achieved. Thus, rather than just a flat horizontal surface of the semiconductor being exposed for contact area, relatively long vertical trench sidewalls and a bottom wall are exposed and available for contact area. The trench can then be filled with the desired contact metal. Doping of the semiconductor layer into which the contact is being formed can be carried out in a manner that facilitates an efficient contact trench etch process, such as by, for example, utilization of post trench etch doping or a semiconductor layer having an upper undoped region through which the contact trench etch passes and a lower doped S/D region. The offset spacer may be removed from final structure.

Claim (Index 14):
The device of  claim 1  wherein the first and second trenches have a rectangular or tapered shape.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 88.0
- Lexical Diversity: 1.81111
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15859412', '15024750', '14020299', '14739994', '13622974']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9202283056197124
- 35 USC 102 Novelty (BERT): 0.5025975282154105
- Combined Prediction Score: 0.8784652278792823
- Mean Citation Score: 193.74111
- Max Citation Score: 205.04637
- Similarity Product: 125.57793682861804

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test