PATENT CLAIM ANALYSIS

Application Number: 15960875
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["711", "122000"]

Abstract:
A processor includes multiple processing units (e.g., processor cores), with each processing unit associated with at least one private, dedicated cache. The processor is also associated with a system memory that stores all data that can be accessed by the multiple processing units. A coherency manager (e.g., a coherence directory) of the processor enforces a specified coherency scheme to ensure data coherency between the different caches and between the caches and the system memory. In response to a memory access request to a given cache resulting in a cache miss, the coherency manager identifies the current access latency to the system memory as well as the current access latencies to other caches of the processor. The coherency manager transfers the targeted data to the given cache from the cache or system memory having the lower access latency.

Claim (Index 14):
A processor, comprising:\n a plurality of processor cores including a first processor core and a second processor core; a plurality of caches, including a first cache associated with the first processor core and a second cache associated with the second processor core, the first cache to:\n in response to a first memory access request targeting first data associated with a first memory address, identify a first cache miss; \n a coherency manager to:\n in response to the first cache miss, identify a first latency associated with retrieving the first data from the second cache; and \n in response to identifying that the first latency exceeds a first threshold, provide the first memory access request to a system memory associated with the first processor core and the second processor core.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 91.0
- Lexical Diversity: 2.09722
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12639191', '12256002', '12649725', '12177912', '11388016']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.527062986392601
- 35 USC 102 Novelty (BERT): 0.472711777615629
- Combined Prediction Score: 0.5216278655149038
- Mean Citation Score: 194.875498
- Max Citation Score: 203.17009
- Similarity Product: 161.7779595390141

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test