PATENT CLAIM ANALYSIS

Application Number: 15875985
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["365", "185250"]

Abstract:
Apparatuses and methods for refreshing memory of a semiconductor device are described. An example method includes producing, responsive to a first refresh command, a plurality of first refresh addresses and detecting, responsive to the plurality of first refresh addresses, that the plurality of first refresh addresses include, a first defective address and a first non-defective address. The example method further includes refreshing, responsive to a second refresh command following the first refresh command, the non-defective first address without refreshing the first defective address.

Claim (Index 7):
An apparatus, comprising:\n a refresh counter circuit configured to provide a refresh address responsive a first active refresh command; a first latch circuit configured to latch the refresh address and provide a first latched refresh address; an address counter circuit configured to provide a count, wherein the count changes responsive to an oscillating signal; a redundancy circuit configured to receive the first latched refresh address and the count as a combined address, the redundancy circuit further configured to provide redundancy information indicative of whether the combined address matches any of a plurality of stored addresses; a redundancy information latch circuit configured to latch the redundancy information responsive to the oscillating signal and provide the latched redundancy information; a second latch circuit configured to latch the first latched refresh address responsive to a number of oscillations of the oscillating signal and provide a second latched refresh address; a third latch circuit configured to latch the second latched refresh address responsive to a second active refresh command and provide a third latched address; and an address predecoder circuit configured to receive the latched redundancy information and the third latched refresh address and perform or skip a refresh operation to the third latched refresh address based on the latched redundancy information.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 86.0
- Lexical Diversity: 2.44737
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14835419', '15459844', '15236638', '15271734', '15789897']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7862967041015587
- 35 USC 102 Novelty (BERT): 0.4558558090379787
- Combined Prediction Score: 0.7532526145952007
- Mean Citation Score: 178.935808
- Max Citation Score: 180.28357
- Similarity Product: 149.2312880995881

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test