PATENT CLAIM ANALYSIS

Application Number: 15879082
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["438", "113000"]

Abstract:
Disclosed herein is a method of manufacturing a semiconductor package including a semiconductor chip sealed by a sealing synthetic resin. The method includes preparing a wiring board in which upstanding encircling walls with side-surface shield layers embedded therein surround mounts on which semiconductor chips are to be mounted, mounting the semiconductor chips on the mounts surrounded by the upstanding encircling walls on the wiring board, supplying a sealing synthetic resin to spaces surrounded by the upstanding encircling walls thereby to produce an sealed board, dividing the sealed board along projected dicing lines into individual semiconductor packages, and forming an upper-surface shield layer for blocking electromagnetic waves on the semiconductor packages.

Claim (Index 1):
A method of manufacturing a semiconductor package including a semiconductor chip sealed by a sealing synthetic resin, comprising the steps of:\n preparing a wiring board having a plurality of mounts for mounting semiconductor chips thereon, the mounts being disposed in respective areas demarcated on an upper surface of a wiring board by a plurality of projected dicing lines which cross each other, upstanding encircling walls disposed between said mounts and said projected dicing lines in surrounding relation to said mounts individually, and side-surface shield layers for blocking electromagnetic waves, disposed individually in said upstanding encircling walls in surrounding relation to said mounts and extending in thicknesswise directions of said upstanding encircling walls; mounting the semiconductor chips individually on said mounts on said wiring board; supplying a sealing synthetic resin to spaces surrounded by said upstanding encircling walls over the semiconductor chips mounted on said mounts on said wiring board to seal said semiconductor chips, thereby producing an sealed board; after said sealed board has been produced, dividing said sealed board along said projected dicing lines into individual semiconductor packages; and after said sealed board has been produced, forming an upper-surface shield layer for blocking electromagnetic waves on upper surfaces of the sealing synthetic resin of said semiconductor packages.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 86.0
- Lexical Diversity: 1.75758
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15721118', '15845803', '12081723', '12913105', '14482378']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8628504607299486
- 35 USC 102 Novelty (BERT): 0.5011239735631732
- Combined Prediction Score: 0.8266778120132712
- Mean Citation Score: 242.47789000000003
- Max Citation Score: 289.60617
- Similarity Product: 250.4035590548444

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test