PATENT CLAIM ANALYSIS

Application Number: 15885381
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["438", "617000"]

Abstract:
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.

Claim (Index 6):
The method of  claim 4  wherein singulating the first and second assemblies comprises dicing the first assembly with a first cutting device having a first width and dicing the second assembly with a second cutting device having a second width greater than the first width.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 1.9375
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11846928', '12973607', '13441533', '14152622', '11848836']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8952466602132797
- 35 USC 102 Novelty (BERT): 0.5261756521641725
- Combined Prediction Score: 0.858339559408369
- Mean Citation Score: 296.8694040000001
- Max Citation Score: 321.4715
- Similarity Product: 180.61081402754783

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test