PATENT CLAIM ANALYSIS

Application Number: 16206455
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-06
Patent Classification: ["174", "257000"]

Abstract:
A printed circuit board ( 1 ) for converting an input phase to at least one output phase (U,V,W), which has an input phase surface area with at least one conductive DC+ layer ( 28 ) and one conductive DC− layer ( 29 ) for each conductive DC+ layer ( 28 ), for conducting the input phase. There is at least one high-side power semiconductor ( 6 ) for each output phase (U, V, W) and one low-side power semiconductor ( 7 ) for each high-side power semiconductor ( 6 ), for switching the input phase. The at least one DC+ layer ( 28 ) corresponding to a respective DC− layer ( 29 ) is formed in a cover surface area ( 2 ), which covers at least 75% of the input phase surface area.

Claim (Index 13):
The printed circuit board according to  claim 12 , wherein all of the high-side power semiconductors and/or all of the low-side power semiconductors are disposed along a circuitry arc delimiting, at least in sections, the input phase surface area.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 98.0
- Lexical Diversity: 2.63793
- Patent Class: 174.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13498086', '10711060', '12091601', '16111984', '13839032']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.836359585327513
- 35 USC 102 Novelty (BERT): 0.4817442768326207
- Combined Prediction Score: 0.8008980544780238
- Mean Citation Score: 155.512454
- Max Citation Score: 160.74396000000004
- Similarity Product: 107.84203804702524

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test