PATENT CLAIM ANALYSIS

Application Number: 16159491
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-06
Patent Classification: ["323", "317000"]

Abstract:
A circuit can have a low mirror input voltage and fast settling while providing a large current mirror gain. The circuit can include a current source, a first current mirror device having a first transistor and a second transistor and electrically coupled with the current source, a third transistor electrically coupled with the first transistor, a second current mirror device having a fourth transistor and a fifth transistor and electrically coupled between the third transistor and the second transistor, and an output device electrically coupled with the first and second current mirror devices.

Claim (Index 30):
The current mirror module of  claim 29  wherein the output device includes a fifth transistor, a gate of the fifth transistor in electrical communication with the drain of the second transistor, the gate of the second transistor, and the gate of the first transistor.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 97.0
- Lexical Diversity: 2.60526
- Patent Class: 323.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15852757', '15747379', '11961190', '11355976', '11309075']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7408901458028296
- 35 USC 102 Novelty (BERT): 0.5125069854091078
- Combined Prediction Score: 0.7180518297634575
- Mean Citation Score: 218.620674
- Max Citation Score: 295.45535
- Similarity Product: 217.9935441810727

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test