PATENT CLAIM ANALYSIS

Application Number: 15875609
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "401000"]

Abstract:
Generally, in one embodiment, the present disclosure is directed to a method for forming a transistor. The method includes: implanting a substrate to form at least one of an n and p doped region; depositing an epitaxial semiconductor layer over the substrate; forming trenches through the epitaxial layer and partially through at least one of an n and p doped region; forming dielectric isolation regions in the trenches; forming a fin in an upper portion of the epitaxial semiconductor layer by partially recessing the dielectric isolation regions; forming a gate dielectric adjacent at least two surfaces of the fin; and diffusing dopant from at least one of the n and p doped regions at least partially into the epitaxial semiconductor layer to form a diffusion doped transition region adjacent a bottom portion of the fin.

Claim (Index 29):
The finFET transistor of  claim 24 , wherein the doped channel region of the first fin and the doped channel region of the second fin each have an average active dopant concentration of less than about 8\u00d710 17  cm \u22123 .

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 2.43333
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15208495', '15053984', '14226488', '14245683', '15199544']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.930511119069512
- 35 USC 102 Novelty (BERT): 0.5321560603084551
- Combined Prediction Score: 0.8906756131934063
- Mean Citation Score: 279.2960939999999
- Max Citation Score: 356.76883
- Similarity Product: 222.3990038892996

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test