PATENT CLAIM ANALYSIS

Application Number: 15980437
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-03
Patent Classification: ["345", "694000"]

Abstract:
A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

Claim (Index 17):
The display defined in  claim 16  further comprising data lines coupled to the array of pixels, wherein the metal layer is formed from the same material as the data lines.

Metadata:
- Claim Count in Document: 56.0
- Percentile: 93.0
- Lexical Diversity: 2.42188
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15919057', '14174471', '14226710', '12975284', '13762276']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6822803384143421
- 35 USC 102 Novelty (BERT): 0.5193726671644235
- Combined Prediction Score: 0.6659895712893503
- Mean Citation Score: 298.8267160000001
- Max Citation Score: 332.41064
- Similarity Product: 251.72697579987525

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test