PATENT CLAIM ANALYSIS

Application Number: 15776907
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["701", "041000"]

Abstract:
An electronic control unit where an external watch dog timer (WDT) can always normally detect an abnormality (a failure) to a micro controller unit (MCU) related to a built-in self-test (BIST) function and which can maintain safety of a system. The control unit includes an external WDT to detect an abnormality of the MCU, a reset circuit to reset the MCU when the external WDT detects the abnormality of the MCU, and an ON/OFF control section to turn a gate of the semiconductor switching device on or off in accordance with the external WDT. The inverter is stopped by turning the gate off via the ON/OFF control section when the external WDT is a disable state. When the abnormality of the MCU is not detected in an enable state, the inverter is driven by turning the gate on via the ON/OFF control section. When the abnormality of the MCU is detected, the inverter is stopped by turning the gate off via the ON/OFF control section and the MCU is reset by the reset circuit.

Claim (Index 8):
An electronic control unit that is controlled by a micro controller unit (an MCU) via an inverter constituted by a semiconductor switching device, comprising:\n an external watch dog timer (WDT) to detect an abnormality of said MCU, a reset circuit to reset said MCU when said external WDT detects said abnormality of said MCU, and an ON/OFF control section to turn a gate of said semiconductor switching device on or off in accordance with said external WDT, wherein said MCU has a built-in self-test (BIST) function or said MCU cooperates with an external circuit having said BIST function, wherein said inverter is stopped by turning said gate off via said ON/OFF control section when said external WDT is a disable state, wherein said external WDT comprises a control terminal for said disable state/said enable-state, and transits to said enable state by operating said control terminal from said MCU, and wherein when said abnormality of said MCU is not detected in an enable state to which said external WDT transits from said disable state, said inverter is driven by turning said gate on via said ON/OFF control section, and when said abnormality of said MCU is detected, said inverter is stopped by turning said gate off via said ON/OFF control section and said MCU is reset by said reset circuit.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 93.0
- Lexical Diversity: 2.72857
- Patent Class: 701.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15746682', '16306775', '16080061', '15507814', '15317572']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.442653892270956
- 35 USC 102 Novelty (BERT): 0.4920449020831433
- Combined Prediction Score: 0.4475929932521747
- Mean Citation Score: 219.784276
- Max Citation Score: 242.85313
- Similarity Product: 173.3639979030245

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test