PATENT CLAIM ANALYSIS

Application Number: 15887347
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "192000"]

Abstract:
A semiconductor includes a first transistor and a second transistor. The first transistor includes a first and a second epitaxial layer, formed of a first semiconductor material. The second epitaxial layer is disposed over the first epitaxial layer. The first transistor also includes a first gate dielectric layer surrounds the first and second epitaxial layers and extends from a top surface of the first epitaxial layer to a bottom surface of the second epitaxial layer and a first metal gate layer surrounding the first gate dielectric layer. The second transistor includes a third epitaxial layer formed of the first semiconductor material and a fourth epitaxial layer disposed directly on the third epitaxial layer and formed of a second semiconductor. The second transistor also includes a second gate dielectric layer disposed over the third and fourth epitaxial layers and a second metal gate layer disposed over the second gate dielectric layer.

Claim (Index 12):
A device comprising:\n a N-type field-effect transistor (NFET) disposed over a semiconductor substrate, the NFET including:\n a plurality of first epitaxial layers formed of a first semiconductor material; \n a first gate dielectric layer surrounding each first epitaxial layer of the plurality of first epitaxial layers and extending from a top surface of one of the first epitaxial layers to a bottom surface of another one of the first epitaxial layers, the top surface of the one of the first epitaxial layers facing away the semiconductor substrate and the bottom surface of the another one of the first epitaxial layers facing the semiconductor substrate; \n a first metal gate layer surrounding the first gate dielectric layer including the plurality of first epitaxial layers; and \n a first sidewall spacer disposed along a sidewall of the first metal gate layer; and \n a P-type field-effect transistor (PFET) disposed over the semiconductor substrate, the PFET including:\n a stack of epitaxial layers, having a plurality of second epitaxial layers formed of a second semiconductor material that is different than the first semiconductor material and an another plurality of the first epitaxial layers, wherein each second epitaxial layer is physically contacting at least one first epitaxial layer of the another plurality of the first epitaxial layers; \n a second gate dielectric layer disposed directly on sidewalls of the stack of epitaxial layers; and \n a second metal gate layer disposed over the second gate dielectric layer.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 88.0
- Lexical Diversity: 4.24324
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14941745', '14504258', '15256313', '14959821', '14788161']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.921218672833524
- 35 USC 102 Novelty (BERT): 0.5079055487227282
- Combined Prediction Score: 0.8798873604224443
- Mean Citation Score: 255.159076
- Max Citation Score: 291.95743
- Similarity Product: 221.4130561561084

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test