PATENT CLAIM ANALYSIS

Application Number: 16514003
Application Type: Utility
Filing Date: 2019-07
Publication Date: 2019-11
Patent Classification: ["438", "098000"]

Abstract:
A method of manufacturing a semiconductor device includes a first process in which a first wiring  3  is provided on a first surface  2 a  of a semiconductor substrate  2 ; a second process in which a light transmitting substrate  5  is attached to the first surface  2 a ; a third process in which the semiconductor substrate  2  is thinned so that the thickness of the semiconductor substrate  2  is smaller than the thickness of the light transmitting substrate  5 ; a fourth process in which a through hole  7  is formed in the semiconductor substrate  2 ; a fifth process in which a dip coating method is performed using a first resin material and thus a resin insulating layer  10  is provided; a sixth process in which a contact hole  16  is formed in the resin insulating layer  10 ; and a seventh process in which a second wiring  8  is provided on a surface  10 b  of the resin insulating layer  10 , and the first wiring  3  and the second wiring  8  are electrically connected via a contact hole  16.

Claim (Index 10):
A method of manufacturing a semiconductor device comprising:\n a preparing process in which a semiconductor substrate including a first surface and a second surface opposite to each other, a support substrate attached to the first surface, and a first wiring provided between the first surface and the support substrate are prepared; a first forming process in which a through hole to extend from the first surface to the second surface is formed in the semiconductor substrate, and a part of the first wiring is exposed to a first opening of the through hole on the first surface side after the preparing process; a first dip coating process in which a dip coating method is performed using a first resin material and thus a resin insulating layer that is continuous through a second opening of the through hole on the second surface side is provided on the part of the first wiring exposed to the first opening, an inner surface of the through hole and the second surface after the first forming process; a second forming process in which a contact hole is formed in the resin insulating layer, and the part of the first wiring is exposed to an opening of the contact hole on the first surface side after the first dip coating process; and a connecting process in which a second wiring is provided on a surface of the resin insulating layer, and the first wiring and the second wiring are electrically connected in the opening of the contact hole on the first surface side after the second forming process.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 100.0
- Lexical Diversity: 2.90625
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15562001', '15562004', '15561996', '15561992', '10761510']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8334474785705783
- 35 USC 102 Novelty (BERT): 0.5181154168607304
- Combined Prediction Score: 0.8019142723995936
- Mean Citation Score: 228.91899
- Max Citation Score: 306.60645
- Similarity Product: 247.66914111565947

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test