PATENT CLAIM ANALYSIS

Application Number: 15948918
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["365", "072000"]

Abstract:
A storage bitcell comprising a first inverter cross-coupled with a second inverter, both the first and second inverter being in a path between a first potential and a second potential; wherein a first isolator is connected in the path between the first inverter and the first potential. The storage bitcell has particular application as Static Random-Access Memory (SRAM) circuitry.

Claim (Index 16):
The electrical circuit of  claim 15 , wherein the first plurality of transistors comprises a first access transistor and a first feedback transistor.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 91.0
- Lexical Diversity: 1.75676
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15093457', '13539577', '12038314', '15033456', '15760681']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8097518442253229
- 35 USC 102 Novelty (BERT): 0.5169041571952481
- Combined Prediction Score: 0.7804670755223154
- Mean Citation Score: 226.93954
- Max Citation Score: 316.5745
- Similarity Product: 198.2095788140297

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test