PATENT CLAIM ANALYSIS

Application Number: 15975607
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["710", "052000"]

Abstract:
Methods, systems, and devices for memory buffer management and bypass are described. Data corresponding to a page size of a memory array may be received at a virtual memory bank of a memory device, and a value of a counter associated with the virtual memory bank may be incremented. Upon determining that a value of the counter has reached a threshold value, the data may be communicated from the virtual memory bank to a buffer of the same memory device. For instance, the counter may be incremented based on the virtual memory bank receiving an access command from a host device.

Claim (Index 25):
The apparatus of  claim 24 , wherein the at least one characteristic comprises a quantity of prior memory access operations associated with the data, a type of data that is buffered at the SoC or processor, at least one application associated with the data, or a data type indicated to be buffered by the SoC or processor, or a combination thereof.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 93.0
- Lexical Diversity: 2.07547
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15223753', '15975624', '14963035', '15188890', '15684792']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6689119991278653
- 35 USC 102 Novelty (BERT): 0.4773582861540964
- Combined Prediction Score: 0.6497566278304885
- Mean Citation Score: 131.04088900000002
- Max Citation Score: 146.07619
- Similarity Product: 97.3241918240863

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test