PATENT CLAIM ANALYSIS

Application Number: 15958847
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["438", "113000"]

Abstract:
A semiconductor package has a semiconductor chip on a wiring board, sealed with a sealant. A semiconductor package substrate is formed with V grooves along division lines from a resin layer side by use of a V blade. The wiring board is divided along the V grooves into individual semiconductor packages, while forming an inclined surface and a vertical surface at each package side surface. A shield layer is formed on the package upper surface and the package side surfaces. In this instance, the aspect ratio at the vertical surface side of the package interval is controlled, whereby an appropriate shield layer is formed on the package upper surface and the package inclined surfaces, thereby securing a shielding effect, and the shield layer is formed in a thin form on the package vertical surfaces and on the groove bottom between the packages, thereby restraining generation of burs.

Claim (Index 1):
A method of manufacturing a semiconductor package, the semiconductor package obtained by dividing a semiconductor package substrate having a plurality of semiconductor chips which are mounted in a plurality of regions on a wiring board partitioned by a plurality of intersecting division lines and which are sealed with a sealant, the semiconductor package substrate being divided along the division lines, the method comprising:\n an adhering step of adhering a wiring board side of the semiconductor package substrate onto a support member having an adhesive layer; a groove forming step of cutting in from a sealant side to at least an intermediate position in the sealant along the division lines by a processing tool, to form grooves having a first width at least at an upper surface of the sealant, after the adhering step is conducted; a dividing step of cutting in from the sealant side to an intermediate position in the support member along the grooves by use of a cutting blade having a second width smaller than the first width, to divide the semiconductor package substrate such that the adjacent semiconductor packages are spaced by a predetermined interval X mm from each other, after the groove forming step is conducted; a shield layer forming step of forming a shield layer on side surfaces of the semiconductor packages and an upper surface of the sealant from a conductive material supplied from above the sealant, after the dividing step is conducted; and a picking-up step of picking up the semiconductor package formed with the shield layer, after the shield layer forming step is conducted, wherein the first width and the second width are so set that an inclination or a step is generated in each side surface in such a manner that outer shape size of the semiconductor package becomes larger than that at an upper surface of the sealant of each of the divided semiconductor packages on route from the upper surface toward the lower surface of the sealant, and where the side surface length from a lower end of the inclination or step of the semiconductor package to a groove bottom of the cut into the support member is Y mm, then the first width, the second width, the side surface length Y mm, and shield layer forming conditions are so set as to obtain such an aspect ratio Y/X that at the time of formation of the shield layer, the shield layer is formed on the side surfaces but the amount of the shield layer formed on the groove bottom between the semiconductor packages is reduced.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 91.0
- Lexical Diversity: 2.27143
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15845803', '15721118', '15879082', '15431171', '14482378']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8608776571965814
- 35 USC 102 Novelty (BERT): 0.4951147444092392
- Combined Prediction Score: 0.8243013659178472
- Mean Citation Score: 228.95612000000003
- Max Citation Score: 277.5685
- Similarity Product: 245.08220306962727

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test