PATENT CLAIM ANALYSIS

Application Number: 16273337
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-06
Patent Classification: ["438", "257000"]

Abstract:
A method of forming a memory device that includes forming on a substrate, a first insulation layer, a first conductive layer, a second insulation layer, a second conductive layer, a third insulation layer. First trenches are formed through third insulation layer, the second conductive layer, the second insulation layer and the first conductive layer, leaving side portions of the first conductive layer exposed. A fourth insulation layer is formed at the bottom of the first trenches that extends along the exposed portions of the first conductive layer. The first trenches are filled with conductive material. Second trenches are formed through the third insulation layer, the second conductive layer, the second insulation layer and the first conductive layer. Drain regions are formed in the substrate under the second trenches. A pair of memory cells results, with a single continuous channel region extending between drain regions for the pair of memory cells.

Claim (Index 4):
The memory device of  claim 2 , wherein the first positive voltage is greater than the third and fourth positive voltages.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 99.0
- Lexical Diversity: 3.0
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['11950331', '14252929', '11950345', '10863030', '15476663']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8733930990054776
- 35 USC 102 Novelty (BERT): 0.5295878072402994
- Combined Prediction Score: 0.8390125698289598
- Mean Citation Score: 301.949938
- Max Citation Score: 304.98328
- Similarity Product: 179.12713372084613

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test