PATENT CLAIM ANALYSIS

Application Number: 15996589
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["257", "288000"]

Abstract:
A method of manufacturing a semiconductor device is provided with: (a) providing a wide bandgap substrate product, (b) forming source regions by applying a first mask with a first and second mask layer and applying an n dopant, forming a well layer by removing such part of the first mask, which is arranged between the two source regions, and applying a p dopant, forming two channel regions by forming a third mask by performing an etching step, by which the first mask layer is farther removed at the openings than the second mask layer, and then removing the second mask layer, wherein the remaining first mask layer forms a third mask and applying a p dopant, wherein a well layer depth is at least as large as a channel layer depth, (c) after step (b) for forming a plug applying a fourth mask, which covers the source regions and the channel layers and applying a p fourth dopant to a greater depth than the well layer depth and with a higher doping concentration than the well layers.

Claim (Index 9):
A wide bandgap semiconductor device comprising a lowly doped drift layer of a first conductivity type between a first main side and a second main side of the device opposite to the first main side,\n further comprising on the first main side two source regions of the first conductivity type having a source region depth, which two source regions have higher doping concentration than the drift layer, two channel layers of a second conductivity type, which is different from the first conductivity type, having a channel layer depth, which is at least as great as the source region depth, wherein each source region is separated from the drift layer by a channel layer in a direction parallel to the first main side, and two well layers of the second conductivity type having a well layer depth, which is at least as large as the channel layer depth, wherein the well layers have a higher doping concentration than the channel layers and wherein the well layers separate the two source regions from the drift layer on a side of the well layers opposite to the first main side, a plug of the second conductivity type having a plug depth, which is at least as great as the well layer depth, and having a higher doping concentration than the well layers, wherein the plug is arranged between the two source regions, wherein the two well layers surround the plug in the lateral direction and the two well layers separate the plug from the two source regions two gate electrodes, each of which is arranged on the first main side, wherein each gate electrode comprises a gate layer, which is separated from any doped layer by a first insulating layer, and a first main electrode as an ohmic contact on the first main side, which at least contacts the two source regions and the plug.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 94.0
- Lexical Diversity: 2.67568
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15997298', '15997307', '14149412', '14154790', '14154736']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9088663207203996
- 35 USC 102 Novelty (BERT): 0.5456253005294077
- Combined Prediction Score: 0.8725422187013006
- Mean Citation Score: 299.4998480000001
- Max Citation Score: 383.7313
- Similarity Product: 377.0933623257935

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test