PATENT CLAIM ANALYSIS

Application Number: 15909067
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["455", "073000"]

Abstract:
A front end circuit includes a bypass circuit comprising a first bypass switch and a second bypass switch configured to bypass a signal to a first terminal according to switching operations of the first bypass switch and the second bypass switch; and an amplifier connected in parallel to the bypass circuit and configured to amplify the signal.

Claim (Index 10):
The front end circuit of  claim 4 , wherein the reducer comprises:\n a first resistor, one end of which is connected to an end of the first bypass switch and the other end of the first resistor being connected to an other end of the second bypass switch; a second resistor, one end of which is connected to the one end of the first resistor and the other end of which is grounded; and a third resistor, one end of which is connected to the other end of the first resistor and the other end of which is grounded.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 90.0
- Lexical Diversity: 2.03448
- Patent Class: 455.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15073897', '15130691', '14381865', '10450634', '12679503']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7298045139975671
- 35 USC 102 Novelty (BERT): 0.5084533407025005
- Combined Prediction Score: 0.7076693966680604
- Mean Citation Score: 204.16114800000005
- Max Citation Score: 282.97705
- Similarity Product: 211.20093054662647

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test