PATENT CLAIM ANALYSIS

Application Number: 16126680
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-03
Patent Classification: ["712", "225000"]

Abstract:
A streaming engine employed in a digital data processor specifies a fixed read only data stream defined by plural nested loops. An address generator produces address of data elements. A steam head register stores data elements next to be supplied to functional units for use as operands. The streaming engine fetches stream data ahead of use by the central processing unit core in a stream buffer constructed like a cache. The stream buffer cache includes plural cache lines, each includes tag bits, at least one valid bit and data bits. Cache lines are allocated to store newly fetched stream data. Cache lines are deallocated upon consumption of the data by a central processing unit core functional unit. Instructions preferably include operand fields with a first subset of codings corresponding to registers, a stream read only operand coding and a stream read and advance operand coding.

Claim (Index 4):
The digital data processor of  claim 2 , wherein:\n said streaming engine further configured to\n allocate a stream buffer cache line to said next data element only from unallocated stream buffer cache lines.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 97.0
- Lexical Diversity: 1.81395
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15384342', '15384416', '15384355', '15384378', '15384514']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6940075341793767
- 35 USC 102 Novelty (BERT): 0.5650017291229196
- Combined Prediction Score: 0.681106953673731
- Mean Citation Score: 430.39085
- Max Citation Score: 472.44138
- Similarity Product: 385.195643836012

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test