PATENT CLAIM ANALYSIS

Application Number: 15898606
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["257", "797000"]

Abstract:
This disclosure relates to a structure for aligning layers of an integrated circuit (IC) structure that may include a first dielectric layer positioned above a semiconductor substrate having one or more active devices, a trench stop layer positioned above the first dielectric layer, a second dielectric layer positioned above the trench stop layer, and a plurality of metal-filled marking trenches extending vertically through the second dielectric layer and the trench stop layer and at least partially into the first dielectric layer. The metal-filled trenches are electrically isolated from any active devices contained in the IC.

Claim (Index 8):
The structure of  claim 6 , wherein each set of marking trenches includes at least three marking trenches having a common orientation, and wherein the orientation of marking trenches is different between adjacent sets of marking trenches.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 88.0
- Lexical Diversity: 1.75862
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15811953', '15888366', '11160919', '15811961', '15384741']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9226250015141978
- 35 USC 102 Novelty (BERT): 0.5200510686519569
- Combined Prediction Score: 0.8823676082279737
- Mean Citation Score: 220.08036
- Max Citation Score: 262.55002
- Similarity Product: 142.06710566667795

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test