PATENT CLAIM ANALYSIS

Application Number: 15961210
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-03
Patent Classification: ["365", "185030"]

Abstract:
There are provided a memory system and an operating method thereof. A memory system includes: a memory device configured to generate first read voltages and second read voltages, based on initial read voltages and first and second offset voltages, in response to a user read command, and output first data and second data, which are acquired by performing read operations on multi-bit memory cells, based on the first read voltages and the second read voltages; and a memory controller configured to output the user read command, wherein the memory controller includes a state counter configured to count numbers of data bits respectively corresponding to a plurality of threshold voltage states from the first data and the second data, and extract numbers of memory cells respectively included in a plurality of threshold voltage regions divided by the first read voltages and the second read voltages by calculating the counted result.

Claim (Index 12):
A memory system comprising:\n a memory device; and a memory controller, wherein the memory device includes: multi-bit memory cells; an input/output circuit configured to receive a user read command from the memory controller; a voltage generating circuit configured to generate first read voltages, based on initial read voltages and a first offset voltage, and generate second read voltages, based on the initial read voltages and a second offset voltage, in response to the user read command; and a page buffer group configured to store first data acquired by a first MSB read operation and a first LSB read operation on the multi-bit memory cells, based on the first read voltages, and store second data acquired by a second MSB read operation and a second LSB read operation on the multi-bit memory cells, based on the second read voltages, wherein the memory controller includes a state counter configured to derive a first addition result by adding number of data bits respectively corresponding to a plurality of threshold voltage states from the first data, derive a second addition result by adding number of data bits respectively corresponding to a plurality of threshold voltage states from the second data, and extract a number of memory cells included in any one of a plurality of threshold voltage regions divided by the first read voltages and the second read voltages, based on a result obtained by subtracting the second addition result from the first addition result.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 91.0
- Lexical Diversity: 2.46154
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13177603', '13178880', '14743445', '13337196', '14990817']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7740469117541662
- 35 USC 102 Novelty (BERT): 0.4891481269972552
- Combined Prediction Score: 0.7455570332784751
- Mean Citation Score: 241.06824800000004
- Max Citation Score: 249.48883
- Similarity Product: 202.281428155464

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test