PATENT CLAIM ANALYSIS

Application Number: 16104709
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["365", "145000"]

Abstract:
Apparatuses and methods are disclosed that include ferroelectric memory cells. An example ferroelectric memory cell includes two transistors and two capacitors. Another example ferroelectric memory cell includes three transistors and two capacitors. Another example ferroelectric memory cell includes four transistors and two capacitors.

Claim (Index 6):
The apparatus of  claim 5 , wherein the first transistor includes a first semiconductor pillar extending upwardly from the first digit line, the first semiconductor pillar including the first source/drain region of the first transistor.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 96.0
- Lexical Diversity: 2.2381
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15678978', '15679016', '16058202', '15679032', '15919994']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8298493016584764
- 35 USC 102 Novelty (BERT): 0.5201725928885969
- Combined Prediction Score: 0.7988816307814884
- Mean Citation Score: 249.98536600000003
- Max Citation Score: 334.1724
- Similarity Product: 236.60174906981

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test