PATENT CLAIM ANALYSIS

Application Number: 15887190
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["365", "154000"]

Abstract:
When threshold voltages of constituent transistors are reduced in order to operate an SRAM circuit at a low voltage, there is a problem in that a leakage current of the transistors is increased and, as a result, electric power consumption when the SRAM circuit is not operated while storing data is increased. Therefore, there is provided a technique for reducing the leakage current of MOS transistors in SRAM memory cells MC by controlling a potential of a source line ssl of the driver MOS transistors in the memory cells.

Claim (Index 4):
A semiconductor device according to  claim 2 ,\n wherein the first line is a ground potential line.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 88.0
- Lexical Diversity: 1.66667
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13443511', '10733270', '12222753', '12891208', '11717629']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.850436946164717
- 35 USC 102 Novelty (BERT): 0.5503769808114194
- Combined Prediction Score: 0.8204309496293872
- Mean Citation Score: 395.351422
- Max Citation Score: 419.2212
- Similarity Product: 361.0025523024559

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test