PATENT CLAIM ANALYSIS

Application Number: 15884573
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["716", "053000"]

Abstract:
Various embodiments include approaches for modifying a design layer of an integrated circuit (IC). In some cases, an approach includes: identifying at least one empty region in a design layer used to form the IC; determining whether the at least one empty region requires a fill object; placing at least one fill object in the at least one empty region and tagging the at least one fill object in response to determining the at least one empty region requires a fill object; performing a simplified optical proximity correction (OPC) on the tagged at least one fill object and a complete OPC on the design layer; and generating a modified design layer including a corrected version of the design layer and modified fill objects after the performing of the simplified OPC on the tagged at least one fill object and the complete OPC on the design layer.

Claim (Index 6):
The computer program product of  claim 1 , wherein at least one of the nested fill object or the non-nested fill object has a dimension requiring proximity correction in order to print on a wafer with desired dimensions.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 86.0
- Lexical Diversity: 2.59016
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14918057', '14231913', '13353035', '15239072', '13474752']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3120405325427665
- 35 USC 102 Novelty (BERT): 0.5303578799214684
- Combined Prediction Score: 0.3338722672806367
- Mean Citation Score: 211.22704600000003
- Max Citation Score: 388.19128
- Similarity Product: 284.98268895220764

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test