PATENT CLAIM ANALYSIS

Application Number: 16029610
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["341", "120000"]

Abstract:
A method of incorporating Programmable Gain Amplifier (PGA) function into pipelined ADC for wide input range. The power consumption is saved without adding extra stage to reduce input range. The ADC input range can be adjusted on the fly using resistor bank and capacitor bank to achieve optimal system performance.

Claim (Index 1):
A Programmable Gain Amplifier (PGA) embedded pipelined ADC for wide input range, comprising:\n a configuration of 1PstP stage and 2PndP stage coupled together; a gain stage before the 1PstP stage Flash ADC; sampling capacitors in specific ratio; a shared OPAMP between two stages; and multiple associated switches operating in two clock phases, wherein one OPAMP amplifier is shared by two pipelined stages, the operating phase is determined by internal built-in switches of the amplifier, wherein two differential input pairs couples to one tail current source and one folded cascoded gain stage, each differential pair is enabled at specific clock phase.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 95.0
- Lexical Diversity: 1.22222
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15983658', '12549363', '11161211', '12882496', '13088221']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5772313796288575
- 35 USC 102 Novelty (BERT): 0.4880547367409148
- Combined Prediction Score: 0.5683137153400633
- Mean Citation Score: 195.702732
- Max Citation Score: 206.37764
- Similarity Product: 155.58062199624774

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test