PATENT CLAIM ANALYSIS

Application Number: 15937741
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-11
Patent Classification: ["257", "339000"]

Abstract:
The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a semiconductor substrate, and includes: a gate, a source, a drain, and at least one plug plate electrode. The plug plate electrode is in direct contact with the gate, and is electrically connected to the gate. The plug plate electrode extends downwards from the bottom of the gate to the semiconductor substrate, through a current vertical height of a conductive current when the high voltage is ON. The plug plate electrode is between the source and the drain in a lateral direction. The plug plate electrode includes a dielectric layer and a conductive layer.

Claim (Index 12):
A manufacturing method of a high voltage device, comprising:\n providing a semiconductor substrate, which includes a top surface and a bottom surface opposite to the top surface in a vertical direction; forming a gate on the top surface of the semiconductor substrate, wherein the gate stacks on and contacts the top surface, and the gate is configured to operably control the high voltage device to be ON or OFF according to a gate voltage; forming at least one plug plate electrode, which contacts a bottom of the gate and is electrically connected to the gate; forming a source with a first conductive type in the semiconductor substrate, wherein the source is located beneath the top surface and contacts the top surface in the vertical direction, and is located adjacent to a first side of the gate in a lateral direction; and forming a drain with the first conductive type in the semiconductor substrate, wherein the drain is located beneath the top surface and contacts the top surface in the vertical direction, and is located outside a second side opposite to the first side of the gate in the lateral direction, wherein the drain is separated from the gate by a drift region in the lateral direction; wherein the plug plate electrode extends downward from the bottom of the gate into the semiconductor substrate, wherein the downward extension extends by a vertical length which is longer than a current vertical height of a conductive current when the high voltage device is ON, wherein the current vertical height is a length of a vertical distribution of the conductive current; wherein the plug plate electrode includes a dielectric layer and a conductive layer, wherein the dielectric layer contacts the top surface, and the conductive layer is electrically connected to the gate.

Metadata:
- Claim Count in Document: 56.0
- Percentile: 90.0
- Lexical Diversity: 2.35185
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15662277', '13472344', '13726579', '14559542', '15909989']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.902910857422052
- 35 USC 102 Novelty (BERT): 0.4997082002824253
- Combined Prediction Score: 0.8625905917080894
- Mean Citation Score: 229.930148
- Max Citation Score: 237.71892000000005
- Similarity Product: 176.88502705830575

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test