PATENT CLAIM ANALYSIS

Application Number: 15910730
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["716", "119000"]

Abstract:
Respective large block synthesis (LBS) blocks of an integrated circuit (IC) are overlapped along a corner of each respective LBS block to form an overlap area having an area less than respective areas of respective LBS blocks that are overlapped. A first portion of the overlap area is allocated to a first LBS block and configured to be used by the first LBS block, and a second portion of the overlap area is allocated to a second LBS block and configured to be used by the second LBS block.

Claim (Index 9):
An integrated circuit comprising:\n a plurality of large block synthesis (LBS) blocks comprising respective pluralities of macros merged therein and including a first LBS block having a first area and a second LBS block having a second area, wherein respective LBS blocks comprise internal interconnects configured for communication within a respective LBS block and external interconnects configured for communication between respective LBS blocks;\n wherein the first LBS block and the second LBS block are overlapped to form an overlap area less than the first area and less than the second area; and \n wherein the overlap area is apportioned such that a first portion of the overlap area is utilized by the first LBS block and a second portion of the overlap area is utilized by the second LBS block.

Metadata:
- Claim Count in Document: 31.0
- Percentile: 90.0
- Lexical Diversity: 2.23256
- Patent Class: 716.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15170157', '15007754', '15840595', '15195363', '15840631']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3520263448008254
- 35 USC 102 Novelty (BERT): 0.5479036106506545
- Combined Prediction Score: 0.3716140713858083
- Mean Citation Score: 296.721838
- Max Citation Score: 433.23935
- Similarity Product: 412.3669695779204

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test