PATENT CLAIM ANALYSIS

Application Number: 16109955
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "738000"]

Abstract:
An embedded silicon substrate fan-out type 3D packaging structure, comprising: a silicon substrate; and at least one functional chip, wherein the silicon substrate includes at least one groove, the at least one functional chip is embedded in the at least one groove with a pad surface facing upward, the at least one functional chip is bonded with the at least one groove through a polymer; a front surface of the silicon substrate, the pad surface of the at least one functional chip, and at least one gap between the at least one chip and the at least one groove are covered with a polymer material, and the polymer on pads on the at least one functional chip is opened; at least one conductive through hole is formed on the silicon substrate; and the silicon substrate further includes electrical interconnect structures, a first metal re-wiring and a second metal re-wiring.

Claim (Index 5):
The packaging structure according to  claim 1 , wherein a metal filled in the at least one conductive through hole is one or more of titanium, tantalum, chromium, tungsten, copper, aluminum, nickel and gold.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 96.0
- Lexical Diversity: 2.91071
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13024083', '15411889', '13984967', '12591812', '11219315']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9076194180921388
- 35 USC 102 Novelty (BERT): 0.5032792156197147
- Combined Prediction Score: 0.8671853978448965
- Mean Citation Score: 201.305592
- Max Citation Score: 224.55862
- Similarity Product: 157.59258681107997

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test