PATENT CLAIM ANALYSIS

Application Number: 15963744
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "290000"]

Abstract:
A semiconductor device includes a semiconductor structure formed on a substrate, a gate dielectric formed on a first side of the semiconductor structure, and a dielectric layer formed on a second side of the semiconductor structure.

Claim (Index 15):
The method of  claim 14 , further comprising:\n forming a first transistor including the first fin structure; and forming a second transistor including the second fin structure, wherein the forming of the first transistor comprises forming a first plurality of vertical field effect transistors (VFETs) on the first region, and the first region comprises a sensor region of the substrate, wherein the second region comprises a logic region of the substrate, wherein the replacing of the gate comprises:\n forming a mask on the logic region, so as to expose the sensor region; \n removing the gate from the outer side of the first fin structure; and \n forming the dielectric layer on the outer side of the first fin structure, and \n wherein the forming of the dielectric layer comprises forming a charge collector dielectric layer on the outer side of the first fin structure.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 1.95
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15610335', '15198426', '15674002', '15821345', '15637261']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.903161177967064
- 35 USC 102 Novelty (BERT): 0.5085735189096474
- Combined Prediction Score: 0.8637024120613223
- Mean Citation Score: 244.458462
- Max Citation Score: 304.08514
- Similarity Product: 292.00082488082285

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test