PATENT CLAIM ANALYSIS

Application Number: 16278349
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2020-02
Patent Classification: ["null", "null"]

Abstract:
A non-volatile memory device is provided that uses one or more volatile elements. In some embodiments, the non-volatile memory device can include a resistive two-terminal selector that can be in a low resistive state or a high resistive state depending on the voltage being applied. A MOS (“metal-oxide-semiconductor”) transistor in addition to a capacitor or transistor acting as a capacitor can also be included. A first terminal of the capacitor can be connected to a voltage source, and the second terminal of the capacitor can be connected to the selector device. A floating gate of an NMOS transistor can be connected to the other side of the selector device, and a second NMOS transistor can be connected in series with the first NMOS transistor.

Claim (Index 16):
The semiconductor device of  claim 10  wherein the memory device further comprises a second transistor having a gate, a source and a drain, wherein the source of the second transistor is coupled to the drain of the transistor.

Metadata:
- Claim Count in Document: 52.0
- Percentile: 99.0
- Lexical Diversity: 2.125
- Patent Class: nan
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15256007', '14717185', '14795105', '15469179', '14726071']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6184326175331447
- 35 USC 102 Novelty (BERT): 0.5134444983922001
- Combined Prediction Score: 0.6079338056190503
- Mean Citation Score: 277.139524
- Max Citation Score: 333.4531
- Similarity Product: 261.4085606058717

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test