PATENT CLAIM ANALYSIS

Application Number: 16189416
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-06
Patent Classification: ["365", "065000"]

Abstract:
Methods, systems, and devices for periphery fill and localized capacitance are described. A memory array may be fabricated with certain containers connected to provide capacitance rather than to operate as memory cells. For example, a memory cell having one or two transistors, or other switching components, and one capacitor, such as a ferroelectric or dielectric capacitor, may be electrically isolated from one or more containers sharing a common access line, and the isolated containers may be used as capacitors. The capacitors may be used for filtering in some examples. Or the capacitance may be used to boost or regulate voltage in, for example, support circuitry.

Claim (Index 20):
The apparatus of  claim 17 , wherein the memory controller is configured to:\n activate a selector device included in the memory cell, wherein the memory controller is configured to perform the access operation on the memory cell based at least in part on activating the selector device.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 98.0
- Lexical Diversity: 1.76471
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15662002', '15975624', '15969302', '15469865', '15252886']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8084231029206198
- 35 USC 102 Novelty (BERT): 0.4890498245291507
- Combined Prediction Score: 0.7764857750814729
- Mean Citation Score: 195.95743
- Max Citation Score: 240.1986
- Similarity Product: 179.25803469672204

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test