PATENT CLAIM ANALYSIS

Application Number: 16309762
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["710", "005000"]

Abstract:
The present invention relates to a method of processing data in a computer system, the method comprising the steps of: 1) allocating at least one processing node ( 100 ); 2) receiving data at a data source node ( 200, 400 ); 3) transferring the data to the or each processing node ( 100 ) through a serial data connection; 4) processing the data at the or each processing node ( 100 ); and 5) transferring the processed data from the or each processing node ( 100 ) to a data sink node ( 300, 400 ) through the serial data connection, wherein the at least one processing node ( 100 ), the data source node ( 200, 400 ) and the data sink ( 300, 400 ) each comprise no more than one Field Programmable Gate Array ( 101 ) or Application Specific Integrated Circuit.

Claim (Index 50):
The computer architecture system of  claim 44 , wherein the plurality of processing nodes ( 100 ), the data source node ( 200 ,  400 ) and the data sink node ( 300 ,  400 ) comprise a microcontroller unit ( 103 ,  203 ,  303 ,  403 ).

Metadata:
- Claim Count in Document: 53.0
- Percentile: 98.0
- Lexical Diversity: 2.64516
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13768773', '15263111', '10673678', '10367188', '15989993']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6796614563491121
- 35 USC 102 Novelty (BERT): 0.4754628368119184
- Combined Prediction Score: 0.6592415943953928
- Mean Citation Score: 145.23355
- Max Citation Score: 153.61626
- Similarity Product: 105.39612607984186

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test