PATENT CLAIM ANALYSIS

Application Number: 15875931
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["341", "118000"]

Abstract:
Circuits for compensating delta-sigma modulators for excess loop delay are described. These circuits may be coupled to quantizers, and may configured to select the threshold values supplied to the quantizers for comparison with an analog signal. The threshold values may each be selected from a corresponding plurality of reference values, and may be set such that the numerical order of threshold values varies over time. For example, the threshold value provided to a first comparator of the quantizer may be greater than the threshold value provided to a second comparator of the quantizer in a first time interval, but the opposite scenario may occur in a second time interval. The circuits may include multiplexers for selecting the threshold values, thermometric encoders, reference selectors and reference multiplexers.

Claim (Index 16):
The delta-sigma modulator of  claim 14 , wherein at least one of the plurality of multiplexers is a 2-to-1 multiplexer.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 1.95714
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['11388425', '12202339', '11388436', '11388397', '12579113']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6292404727249951
- 35 USC 102 Novelty (BERT): 0.5144207032165332
- Combined Prediction Score: 0.6177584957741489
- Mean Citation Score: 247.129096
- Max Citation Score: 262.2328
- Similarity Product: 174.7443612543106

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test