PATENT CLAIM ANALYSIS

Application Number: 16152061
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-01
Patent Classification: ["365", "185190"]

Abstract:
An operating method of the semiconductor memory device including a plurality of memory cells each having one of “n” number of program statuses as a target program status. The operating method includes performing a program operation to the memory cells according to one of first to third program mode set until a first condition is met; performing the program operation to the memory cells according to another one of first to third program mode set until a second condition is met; and performing the program operation to the memory cells according to a remaining one of first to third program mode set.

Claim (Index 6):
The operating method of  claim 1 , wherein the third program mode set defines the memory cells having a target program statuses of first to fourth program statuses as the program inhibit mode, and the memory cells having the target program statuses of fifth to seventh program statuses as the program permit mode.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 97.0
- Lexical Diversity: 2.45455
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15130593', '15599576', '13453960', '14980083', '15174398']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8060854437764708
- 35 USC 102 Novelty (BERT): 0.520549808789463
- Combined Prediction Score: 0.7775318802777701
- Mean Citation Score: 220.953878
- Max Citation Score: 336.62177
- Similarity Product: 221.0387348982537

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test