PATENT CLAIM ANALYSIS

Application Number: 16011124
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "288000"]

Abstract:
A method of forming a strained channel for a field effect transistor, including forming a sacrificial layer on a substrate, forming a channel layer on the sacrificial layer, forming a stressor layer on the channel layer, wherein the stressor layer applies a stress to the channel layer, forming at least one etching trench by removing at least a portion of the stressor layer, channel layer, and sacrificial layer, wherein the etching trench exposes at least a portion of a sidewall of the sacrificial layer, and separates the stressor layer, channel layer, and sacrificial layer into two or more stressor islands, channel blocks, and sacrificial slabs, and removing the sacrificial slabs to release the channel blocks from the substrate using a selective etch, wherein the channel blocks adhere to the substrate surface.

Claim (Index 12):
The method of  claim 11 , wherein the channel block has a thickness in the range of about 5 nm to about 100 nm, and the stressor island has a thickness in the range of about 5 nm to about 100 nm, where the stressor island is at least as thick as the channel block.

Metadata:
- Claim Count in Document: 46.0
- Percentile: 94.0
- Lexical Diversity: 2.94
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15606937', '15226834', '15152080', '15628102', '15392815']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9421533082639686
- 35 USC 102 Novelty (BERT): 0.5689865043169327
- Combined Prediction Score: 0.904836627869265
- Mean Citation Score: 381.174676
- Max Citation Score: 472.37167
- Similarity Product: 383.5124865552199

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test