PATENT CLAIM ANALYSIS

Application Number: 16099457
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-07
Patent Classification: ["257", "700000"]

Abstract:
In order to address the problem in that, by increasing the gate resistance of a power semiconductor element, while variation of switching time can be controlled, loss due to the gate resistance becomes larger and power efficiency for the entire system is lowered, the present invention provides an insulating substrate capable of uniformizing switching speeds of circuit elements while suppressing influence on power efficiency of the circuit elements. In the insulating substrate according to the present invention, part of a wiring layer is formed as a control signal circuit layer, and part of the control signal circuit layer is formed as a resistance layer that increases input resistance when the circuit element receives a control signal.

Claim (Index 5):
The insulating substrate according to  claim 1 ,\n wherein a difference between an input resistance of the first circuit element and an input resistance of the second circuit element is smaller than a difference between resistances of portions of signal wires forming a signal propagation path of the control signal circuit layer excluding the resistance layer.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 98.0
- Lexical Diversity: 1.96825
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13643652', '13964348', '14438697', '12869327', '12835117']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9054501355960224
- 35 USC 102 Novelty (BERT): 0.477795891062413
- Combined Prediction Score: 0.8626847111426614
- Mean Citation Score: 146.99938600000004
- Max Citation Score: 152.95844
- Similarity Product: 112.39019377626418

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test