PATENT CLAIM ANALYSIS

Application Number: 15960475
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["365", "156000"]

Abstract:
Various implementations described herein refer to an integrated circuit having a bitcell coupled to a bitline and a column multiplexer device coupled to the bitline between the bitcell and an output of a write driver. The integrated circuit may include a first signal line coupled to a gate of the column multiplexor device that provides a first transition signal. The integrated circuit may include a second signal line coupled to an input of the write driver that provides a second transitioning signal, and the second transition signal transitions substantially similar to the first transitioning signal. The integrated circuit may include a coupling device coupled between the first signal line and the second signal line.

Claim (Index 16):
The integrated circuit of  claim 9 , wherein the coupling device comprises a transistor that is coupled together to operate as a capacitor.

Metadata:
- Claim Count in Document: 34.0
- Percentile: 91.0
- Lexical Diversity: 2.70455
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15907951', '15256200', '15891212', '15188873', '15477516']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.786284624241665
- 35 USC 102 Novelty (BERT): 0.493143851233999
- Combined Prediction Score: 0.7569705469408985
- Mean Citation Score: 219.36693800000003
- Max Citation Score: 242.19717000000003
- Similarity Product: 186.8119651441937

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test