PATENT CLAIM ANALYSIS

Application Number: 15912630
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["331", "10800R"]

Abstract:
Provided is an oscillator arranged to output an oscillation signal of an oscillation frequency having an increasing and decreasing component that increases and decreases in one period, and an offset component for each period.

Claim (Index 13):
The oscillator according to  claim 9 , further comprising another counter different form the counter, wherein\n the output of the counter is constituted of K bits, the input of the DAC is constituted of N bits, an output of the another counter is constituted of (N\u2212K) bits, the counter performs counting up and counting down, the output of the counter is connected to upper K bits in the DAC, the another counter counts edges of the most significant bit in the output of the counter, the output of the another counter is connected to bits other than the upper K bits in the input of the DAC, the upper K bits in the input of the DAC are the first bits, and the bits other than the upper K bits in the input of the DAC are the second bits.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 1.33333
- Patent Class: 331.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12936680', '12323149', '12365743', '13069695', '11900110']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7571516499077984
- 35 USC 102 Novelty (BERT): 0.4868503438384831
- Combined Prediction Score: 0.7301215193008669
- Mean Citation Score: 207.542014
- Max Citation Score: 224.53288
- Similarity Product: 169.94582139092446

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test