PATENT CLAIM ANALYSIS

Application Number: 15968184
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["361", "777000"]

Abstract:
Systems and methods for the design and use of a System-in-Package (SiP) device with a connection layout for minimizing a system Printed Circuit Board (PCB) using the SiP are provided.

Claim (Index 1):
A system, comprising:\n a System-in-Package (SiP), wherein said SiP comprises an array of connectors on a bottom surface of said SiP; a printed circuit board (PCB), wherein said PCB comprises a top layer, a ground layer, and a power layer, wherein said top layer comprises a plurality of escape traces on a top surface of said PCB; and a plurality of electronic components mounted on said top surface of said PCB, wherein at least one of said plurality of electronic components is electrically connected to at least one of said plurality of escape traces; wherein said SiP is mounted on said top surface of said PCB and is arranged such that all external signals of said SiP are connected to said plurality of escape traces using said array of connectors.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 1.2963
- Patent Class: 361.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10442355', '11934340', '11696670', '13707175', '15085080']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8231746266540344
- 35 USC 102 Novelty (BERT): 0.4715799034946437
- Combined Prediction Score: 0.7880151543380953
- Mean Citation Score: 166.60554399999995
- Max Citation Score: 170.70906000000005
- Similarity Product: 124.22126822113398

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test