PATENT CLAIM ANALYSIS

Application Number: 15940949
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["257", "666000"]

Abstract:
A high voltage (HV) converter implemented on a printed circuit board (PCB) includes a double diffused metal oxide semiconductor (DMOS) package comprising a lead frame and a main DMOS chip. The lead frame includes a gate section electrically connected to a gate electrode of the main DMOS chip, a source section electrically connected to a source electrode of the main DMOS chip and a drain section electrically connected to a drain electrode of the main DMOS chip. The PCB layout includes a large area source copper pad attached to and overlapping the source section of the DMOS package to facilitate cooling and a small area drain copper pad attached to and overlapping the drain section of the DMOS package to reduce electromagnetic interference (EMI) noise.

Claim (Index 4):
The DMOS package of  claim 1 , wherein the insulation material is directly attached to the first surface of the main DMOS chip, the one or more first metal bumps, the one or more second metal bumps, the gate section of the lead frame and the source section of the lead frame; and\n wherein the insulation material is embedded in the molding encapsulation.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 90.0
- Lexical Diversity: 2.44643
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12698819', '13099252', '11982764', '15197861', '13096634']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.907106602626497
- 35 USC 102 Novelty (BERT): 0.5010903717087889
- Combined Prediction Score: 0.8665049795347262
- Mean Citation Score: 187.211856
- Max Citation Score: 198.12987
- Similarity Product: 131.58082017076492

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test