PATENT CLAIM ANALYSIS

Application Number: 16083215
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-02
Patent Classification: ["341", "155000"]

Abstract:
To reduce power consumption of an analog-to-digital converter in which a comparator is provided. An analog-to-digital converter includes a comparator and a mode control unit. The comparator is configured to generate a comparison result by comparing an analog signal to a threshold indicating a boundary of a predetermined range in a determination mode and convert the analog signal into a digital signal in a conversion mode. The mode control unit is configured to transition the determination mode to the conversion mode in a case in which the comparison result indicating that the analog signal is not within the predetermined range is generated.

Claim (Index 10):
The electronic device according to  claim 9 , further comprising:\n a clock signal supply unit configured to supply a clock signal, wherein at least one of the sampling switch and the comparator operates in synchronization with the clock signal, and the mode control unit controls the clock signal supply unit in the determination mode such that the supply of the clock signal is stopped.

Metadata:
- Claim Count in Document: 25.0
- Percentile: 97.0
- Lexical Diversity: 2.20833
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16325146', '16077003', '11680778', '15738779', '15924945']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6000705222178426
- 35 USC 102 Novelty (BERT): 0.5142276616929039
- Combined Prediction Score: 0.5914862361653488
- Mean Citation Score: 252.75045
- Max Citation Score: 282.83325
- Similarity Product: 200.84462659665945

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test