PATENT CLAIM ANALYSIS

Application Number: 16078249
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-03
Patent Classification: ["257", "072000"]

Abstract:
A method of producing a semiconductor device according to an embodiment of the present invention includes: step (C) of forming an oxide semiconductor layer of a plurality of thin film transistors on a gate dielectric layer; step (F) of forming an aperture in an interlevel dielectric layer, the aperture being located between an active region and a plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming an upper conductive portion on the interlevel dielectric layer. In step (C), a protection layer made of the same oxide semiconductor film as the oxide semiconductor layer is formed above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions. In step (F), the aperture is formed so as to overlap the protection layer.

Claim (Index 1):
A method of producing a semiconductor device which includes a substrate, a plurality of first thin film transistors supported on the substrate, an interlevel dielectric layer covering the plurality of first thin film transistors, and a plurality of terminal portions electrically connecting the plurality of first thin film transistors to corresponding external wiring lines, each of the plurality of terminal portions including an upper conductive portion provided on the interlevel dielectric layer,\n the semiconductor device having an active region in which the plurality of first thin film transistors are provided, and a peripheral region being located around the active region and having the plurality of terminal portions provided therein, the method comprising: step (A) of forming gate electrodes of the plurality of first thin film transistors on the substrate; step (B) of forming a gate dielectric layer covering the gate electrodes; step (C) of forming an oxide semiconductor layer of the plurality of thin film transistors on the gate dielectric layer; step (D) of forming source electrodes and drain electrodes of the plurality of thin film transistors; step (E) of forming the interlevel dielectric layer so as to cover the plurality of thin film transistors; step (F) of forming an aperture in the interlevel dielectric layer, the aperture being located between the active region and the plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming the upper conductive portion on the interlevel dielectric layer, wherein, in step (C), above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions, a protection layer is formed from a same oxide semiconductor film as the oxide semiconductor layer; and in step (F), the aperture is formed so as to overlap the protection layer.

Metadata:
- Claim Count in Document: 24.0
- Percentile: 96.0
- Lexical Diversity: 2.5873
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16072910', '14358778', '14370996', '15423759', '15124385']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9236965036461304
- 35 USC 102 Novelty (BERT): 0.5103898259797109
- Combined Prediction Score: 0.8823658358794885
- Mean Citation Score: 276.186028
- Max Citation Score: 302.52667
- Similarity Product: 233.05366800198016

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test