PATENT CLAIM ANALYSIS

Application Number: 15873644
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "190000"]

Abstract:
Channel-to-substrate leakage in a FinFET device is prevented by inserting an insulating layer between the semiconducting channel and the substrate during fabrication of the device. Similarly, source/drain-to-substrate leakage in a FinFET device is prevented by isolating the source/drain regions from the substrate by inserting an insulating layer between the source/drain regions and the substrate. Forming such an insulating layer isolates the conduction path from the substrate both physically and electrically, thus preventing current leakage. In an array of semiconducting fins made up of a multi-layer stack, the bottom material is removed thus yielding a fin array that is suspended above the silicon surface. A resulting gap underneath the remaining top fin material is then filled with oxide to better support the fins and to isolate the array of fins from the substrate.

Claim (Index 13):
The device of  claim 10  wherein the substrate includes a plurality of raised regions, each raised region being aligned with one of the fins.

Metadata:
- Claim Count in Document: 25.0
- Percentile: 86.0
- Lexical Diversity: 1.94444
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15345250', '14587872', '13725528', '13691070', '15365640']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9375069687092172
- 35 USC 102 Novelty (BERT): 0.5770835229932769
- Combined Prediction Score: 0.9014646241376232
- Mean Citation Score: 407.985692
- Max Citation Score: 460.76382
- Similarity Product: 449.3077371302605

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test