PATENT CLAIM ANALYSIS

Application Number: 16230286
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-06
Patent Classification: ["257", "390000"]

Abstract:
A memory circuit includes a first memory cell and a second memory adjacent to the first memory cell. The first memory cell includes a first word line strapping line segment electrically coupled with a pass device of the first memory cell; and a second word line strapping line segment. The second memory cell includes a first word line strapping line segment; and a second word line strapping line segment electrically coupled with a pass device of the second memory cell. The first word line strapping line segment of the first memory cell and the first word line strapping line segment of the second memory cell are connected with each other at a first interconnection layer. The second word line strapping line segment of the first memory cell and the second word line strapping line segment of the second memory cell are connected with each other at the first interconnection layer.

Claim (Index 16):
A method comprising:\n forming a plurality of first fin structures over a substrate; forming a plurality of second fin structures over a substrate; forming a gate structure extending over the plurality of first fin structures and the plurality of second fin structures; forming a plurality of gate contact structures over and electrically connected to the gate structure; forming a plurality of first via plugs in a first via layer over the plurality of gate contact structures, the plurality of first via plugs electrically connected to the plurality of gate contact structures; forming a plurality of word line strapping lines in a first interconnection layer over the first via layer, the plurality of word line strapping lines electrically connected to the plurality of first via plugs; forming a plurality of second via plugs in a second via layer over the plurality of word line strapping lines, the plurality of second via plugs electrically connected to the plurality of word line strapping lines; and forming a plurality of word lines in a second interconnection layer over the second via layer, the plurality of word lines electrically connected to the plurality of second via plugs.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 98.0
- Lexical Diversity: 4.90625
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15887210', '14723615', '13605167', '12635950', '11781287']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9000231345680283
- 35 USC 102 Novelty (BERT): 0.5155974389241346
- Combined Prediction Score: 0.861580565003639
- Mean Citation Score: 228.881188
- Max Citation Score: 299.7773
- Similarity Product: 240.5491296407461

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test