PATENT CLAIM ANALYSIS

Application Number: 15860422
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "139000"]

Abstract:
A method for fabricating a high-voltage insulated gate type bipolar semiconductor device by comparing to a reference structure of the same includes determining a width S of a mesa region in which the gate insulating film and the MOS transistor are formed, and a trench depth D T , based on a scaling ratio K, in comparison with a second width and a second trench depth of the reference structure, and setting a cell width 2W of the high-voltage insulated gate type bipolar semiconductor device to be equal in length to a second length of the reference structure, the scaling ratio K being defined as K=Y/X, where X indicates a size of a target portion to be miniaturized in the high-voltage insulated gate type bipolar semiconductor device, and Y indicates a size of a target portion to be miniaturized in the reference structure.

Claim (Index 1):
A method for fabricating a high-voltage insulated gate type bipolar semiconductor device by comparing to a reference structure of the same, the high-voltage insulated gate type bipolar semiconductor device comprising:\n a low-concentration base layer having a first conductivity type; a plurality of trenches formed on a front surface of the low-concentration first conductivity type base layer, the trenches being arranged such that adjacent trenches are spaced away from each other alternately by a large interval and a small interval; a gate insulating film formed on a surface of each of the trenches; a gate electrode formed inside of the gate insulating film; a base layer having a second conductivity type, the base layer being formed between the adjacent trenches spaced away from each other by the small interval; a high-concentration source layer having a first conductivity type, the high-concentration source layer being formed on a front surface of the second conductivity type base layer; a first main electrode electrically connecting to both the second conductivity type base layer and the first conductivity type source layer; a MOS transistor formed on front surfaces of the first conductivity type source layer, the second conductivity type base layer, and the low-concentration first conductivity type base layer; a buffer layer having a first conductivity type, the buffer layer being formed on a back surface of the low-concentration first conductivity type base layer, and having an impurity concentration higher than the same of the low-concentration first conductivity type base layer; a high-concentration emitter layer having a second conductivity type, the high-concentration emitter layer being formed on a front surface of the first conductivity type buffer layer; and a second main electrode formed on a front surface of the second conductivity type emitter layer, the method including: determining a width S of a mesa region in which the gate insulating film and the MOS transistor are formed, and a trench depth D T , wherein S is equal to R1/K; D T  is equal to R2/K; R1 is a second width of the reference structure; R2 is a second trench depth of the reference structure; and K is a scaling ratio defined as K=Y/X, wherein X indicates a size of a target portion to be miniaturized in the high-voltage insulated gate type bipolar semiconductor device, and Y indicates a size of a target portion to be miniaturized in the reference structure; and setting a cell width 2W of the high-voltage insulated gate type bipolar semiconductor device to be equal in length to a second length of the reference structure.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 86.0
- Lexical Diversity: 2.23881
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15337405', '11226860', '12171041', '14817095', '14659915']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9237207151041548
- 35 USC 102 Novelty (BERT): 0.5004875045250056
- Combined Prediction Score: 0.8813973940462397
- Mean Citation Score: 270.04843
- Max Citation Score: 284.1090000000001
- Similarity Product: 235.23243272870783

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test