PATENT CLAIM ANALYSIS

Application Number: 15976255
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["711", "103000"]

Abstract:
A method and system for controlling an MBC configured flash memory device to store data in an SBC storage mode, or a partial MBC storage mode. In a full MBC storage mode, pages of data are programmed sequentially from a first page to an Nth page for each physical row of memory cells. Up to N virtual page addresses per row of memory cells accompany each page to be programmed for designating the virtual position of the page in the row. For SBC or partial MBC data storage, a flash memory controller issues program command(s) to the MBC memory device using less than the maximum N virtual page addresses for each row. The MBC memory device sequentially executes programming operations up to the last received virtual page address for the row.

Claim (Index 2):
A non-volatile memory system comprising:\n a non-volatile memory device comprising;\n a plurality of non-volatile memory blocks, each non-volatile memory block comprising a plurality of physical rows, each physical row configured to store a maximum of N logical rows, N being an integer greater than two, and each non-volatile memory block configured to operate in a plurality of storage modes, the plurality of storage modes comprising:\n a first storage mode for programming all of the N logical rows for each physical row; \n a second storage mode for programming a subset of the N logical rows comprising at least two and less than the N logical rows for each physical row; and \n a third storage mode for programming a single logical row for each physical row; and \n \n a memory controller communicatively coupled to the non-volatile memory device, the memory controller configured to: determine one of the plurality of storage modes for each non-volatile memory block of the non-volatile memory device, and issue a program command packet set comprising at least one program command packet, the program command packet set limited to addressing a subset of logical row addresses selected from all possible logical row addresses corresponding to each physical row of the non-volatile memory device, each program command packet comprising a row address having at least one bit representing a selected physical row and at least one bit representing a logical row address of the subset of logical row addresses corresponding to the selected physical row when the second storage mode is determined.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 93.0
- Lexical Diversity: 2.05797
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15419246', '13455780', '11829410', '14022805', '13239813']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5469444809768014
- 35 USC 102 Novelty (BERT): 0.5781062212042267
- Combined Prediction Score: 0.5500606549995439
- Mean Citation Score: 391.418788
- Max Citation Score: 494.2468
- Similarity Product: 395.822928077507

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test