PATENT CLAIM ANALYSIS

Application Number: 15925491
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["330", "297000"]

Abstract:
A receiver front end having low noise amplifiers (LNAs) with enhanced input third order intercept point is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured load FET have a degeneration circuit comprising a tank circuit tuned to a harmonic of the operating frequency.

Claim (Index 15):
The front end of  claim 13 , wherein at least one degeneration circuit comprises two tank circuits, each tuned to a unique harmonic of the operating frequency of the front end amplifier.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 90.0
- Lexical Diversity: 1.31111
- Patent Class: 330.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15895863', '15616824', '11969375', '15430332', '15887816']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7749248387474361
- 35 USC 102 Novelty (BERT): 0.5242777622370914
- Combined Prediction Score: 0.7498601310964017
- Mean Citation Score: 243.597264
- Max Citation Score: 261.65985
- Similarity Product: 156.0893904608041

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test