PATENT CLAIM ANALYSIS

Application Number: 15748455
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-01
Patent Classification: ["345", "174000"]

Abstract:
An array substrate and a manufacturing method thereof and a display panel are provided. The array substrate includes: a base substrate; a first layer, located on the base substrate, including a force electrode configured to detect a touch force; a buffer layer located on the first layer; a thin film transistor including a gate electrode located on the buffer layer; and a second layer including a force electrode wire and the gate electrode; the force electrode wire and the force electrode being electrically connected.

Claim (Index 14):
The manufacturing method of the array substrate according to  claim 13 , wherein the first layer further comprises a light shielding layer located on the base substrate, the thin film transistor further comprises an active layer, the active layer comprises a channel region, the light shielding layer is configured to block light incident on the channel region of the active layer.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 86.0
- Lexical Diversity: 2.29268
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15742814', '15154257', '15257471', '14102716', '15578256']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6844256390623296
- 35 USC 102 Novelty (BERT): 0.4833252560516154
- Combined Prediction Score: 0.6643156007612582
- Mean Citation Score: 226.90917600000003
- Max Citation Score: 230.07822
- Similarity Product: 188.82822354066607

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test