PATENT CLAIM ANALYSIS

Application Number: 15868797
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-02
Patent Classification: ["365", "185110"]

Abstract:
A driver of a multi-level signaling interface is provided. The driver may be configured reduce noise in a multi-level signal (e.g., a pulse amplitude modulation signal) generated by the driver using switching components of different polarities. The driver may include a pull-up circuit and/or a pull-down circuit. The pull-up circuit and the pull-down circuit may include at least one switching component of a first polarity (e.g., nmos transistor) and at least one switching component of a second polarity different from the first polarity (e.g., pmos transistor). Such a configuration of pull-up and pull down circuits may generate a more linear relationship between an output current and an output voltage of an output of the driver, thereby improving one or more characteristics of the multi-level signal.

Claim (Index 7):
The apparatus of  claim 5 , wherein:\n the third switching component and the fourth switching component are coupled with a common ground node and an output node of the driver in parallel.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 2.05882
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15854600', '11638454', '13730642', '15486168', '11973022']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7628100720617483
- 35 USC 102 Novelty (BERT): 0.4832378591770799
- Combined Prediction Score: 0.7348528507732816
- Mean Citation Score: 150.21314999999996
- Max Citation Score: 171.15665
- Similarity Product: 118.4826831611216

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test