PATENT CLAIM ANALYSIS

Application Number: 16154165
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-08
Patent Classification: ["365", "185130"]

Abstract:
The semiconductor memory device may include a memory cell array and a peripheral circuit. The memory cell array may include a plurality of memory blocks. The peripheral circuit may perform a multi-page read operation on a selected memory block among the plurality of memory blocks. The peripheral circuit may select a first word line and a second word line, which are coupled to the selected memory block, and perform the multi-page read operation on the first and second word lines.

Claim (Index 2):
The semiconductor memory device of  claim 1 , further comprising:\n a control logic configured to control the multi-page read operation of the peripheral circuit, and configured to control the peripheral circuit to select the first word line and the second word line and perform the multi-page read operation on the first and second word lines.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 97.0
- Lexical Diversity: 2.38889
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15860539', '14970755', '15066559', '16050096', '13599931']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8041589254149738
- 35 USC 102 Novelty (BERT): 0.4849580175293105
- Combined Prediction Score: 0.7722388346264075
- Mean Citation Score: 243.694832
- Max Citation Score: 261.73566
- Similarity Product: 217.02168495611068

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test