PATENT CLAIM ANALYSIS

Application Number: 15952590
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-01
Patent Classification: ["257", "059000"]

Abstract:
A thin film transistor, a method for fabricating the same, a display device, and an exposure device are disclosed. The method comprises: patterning a source and drain layer by using a single slit mask and an exposure machine, to form a source, a drain, and an active region of the thin film transistor; wherein a pattern resolution of the single slit mask is not larger than a resolution of the exposure machine to form a groove shaped exposure pattern, wherein the groove shaped exposure pattern corresponds to the active region.

Claim (Index 4):
The method of  claim 2 , wherein the ashing is performed at a temperature of about 25\u02dc60\u00b0 C.

Metadata:
- Claim Count in Document: 31.0
- Percentile: 91.0
- Lexical Diversity: 2.10417
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16097327', '15121928', '15677542', '15707827', '15865793']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9306641118714516
- 35 USC 102 Novelty (BERT): 0.5215597292479337
- Combined Prediction Score: 0.8897536736090998
- Mean Citation Score: 269.48168
- Max Citation Score: 278.46887000000004
- Similarity Product: 150.5821816727257

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test