PATENT CLAIM ANALYSIS

Application Number: 15957272
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["712", "222000"]

Abstract:
A new zSeries floating-point unit has a fused multiply-add dataflow capable of supporting two architectures and fused MULTIPLY and ADD and Multiply and SUBTRACT in both RRF and RXF formats for the fused functions. Both binary and hexadecimal floating-point instructions are supported for a total of 6 formats. The floating-point unit is capable of performing a multiply-add instruction for hexadecimal or binary every cycle with a latency of 5 cycles. This supports two architectures with two internal formats with their own biases. This has eliminated format conversion cycles and has optimized the width of the dataflow. The unit is optimized for both hexadecimal and binary floating-point architecture supporting a multiply-add/subtract per cycle.

Claim (Index 1):
A computer program product for executing a hexadecimal floating point instruction in a computer system, the computer system comprising a plurality of general registers, and a general purpose processor in communications with a computer memory, the processor comprising one or more execution units, the execution units executing instructions fetched from the computer memory, the computer program product comprising:\n a computer readable storage medium readable by said computer system, said computer readable storage medium storing instructions for performing fetching a hexadecimal floating point instruction; determining that the hexadecimal floating point instruction is a multiply and subtract instruction; and responsive to the determining\n fetching a first operand comprising a first exponent value and a first fraction value and a second operand comprising a second exponent value and a second fraction value; \n multiplying the first fraction value and second fraction value to produce a full precision result; \n fetching a third operand comprising a third exponent value and a third fraction value; and \n subtracting the third operand from the full precision first, result to produce a second result.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 91.0
- Lexical Diversity: 1.90323
- Patent Class: 712.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15175140', '14486228', '15635703', '10435982', '13083760']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6488094158126632
- 35 USC 102 Novelty (BERT): 0.5938574222607735
- Combined Prediction Score: 0.6433142164574742
- Mean Citation Score: 491.409824
- Max Citation Score: 506.1344
- Similarity Product: 479.2971627948761

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test