PATENT CLAIM ANALYSIS

Application Number: 16110055
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "668000"]

Abstract:
A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.

Claim (Index 2):
The semiconductor package according to  claim 1 , wherein said diffusion bond is via a gold plated bump or a gold stud bump on said die.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 96.0
- Lexical Diversity: 1.31481
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15286849', '15887346', '13741810', '12562950', '13047991']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.90916951468256
- 35 USC 102 Novelty (BERT): 0.5261279205847309
- Combined Prediction Score: 0.8708653552727772
- Mean Citation Score: 232.141442
- Max Citation Score: 337.56677
- Similarity Product: 334.5994319085038

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test