PATENT CLAIM ANALYSIS

Application Number: 16079160
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-02
Patent Classification: ["365", "148000"]

Abstract:
A logic gate includes first and second inputs, first through fourth memristors each having a positive terminal and a negative terminal, and first and second outputs. The memristors are connected in a bridge arrangement: the negative terminal of the first memristor and the positive terminal of the second memristor are connected to the first input; the negative terminal of the third memristor and the positive terminal of the fourth memristor are connected to the second input; the negative terminal of the second memristor and the negative terminal of the fourth memristor are connected to the first output; and the positive terminal of the first memristor and the positive terminal of the third memristor are connected to the second output. A voltage of at least one of the outputs, or the voltage difference between the outputs, corresponds to the result of a logic operation relative to voltages applied to the inputs.

Claim (Index 1):
A logic gate comprising:\n a first input and a second input; a first memristor, a second memristor, a third memristor, and a fourth memristor, each of the memristors having a positive terminal and a negative terminal; and a first output and a second output, wherein the negative terminal of the first memristor and the positive terminal of the second memristor are connected in common to the first input, wherein the negative terminal of the third memristor and the positive terminal of the fourth memristor are connected in common to the second input, wherein the negative terminal of the second memristor and the negative terminal of the fourth memristor are connected in common to the first output, wherein the positive terminal of the first memristor and the positive terminal of the third memristor are connected in common to the second output, and wherein, in use, a voltage of at least one of the outputs, or a voltage difference between the first and second outputs, corresponds to a result of a logic operation relative to voltages applied to the first and second inputs.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 96.0
- Lexical Diversity: 3.35417
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13506856', '15603528', '15369364', '13385466', '15603370']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7981675096029244
- 35 USC 102 Novelty (BERT): 0.4686475194571318
- Combined Prediction Score: 0.7652155105883451
- Mean Citation Score: 191.602546
- Max Citation Score: 201.59416
- Similarity Product: 158.7799423727989

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test