PATENT CLAIM ANALYSIS

Application Number: 15881208
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-12
Patent Classification: ["365", "185230"]

Abstract:
A memory device includes a memory cell array including a first switch cell, a second switch cell, and a plurality of memory cells disposed between the first the second switch cells and connected to a plurality of word lines, and a control circuit configured to perform a program operation by providing a program voltage to a first word line among the plurality of word lines, a switch voltage to a second word line among the plurality of word lines, and a pass voltage to remaining word lines among the plurality of word lines, wherein the control circuit is configured to turn off the first switch cell and the second switch cell in a first section of the program operation, and configured to turn on the first switch cell and increase the switch voltage in a second section of the program operation later than the first section.

Claim (Index 9):
The memory device of  claim 6 , wherein the control circuit is configured to, in the second section, increase the switch voltage in response to a voltage provided to the first select line being higher than a threshold voltage of the second switch cell.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 86.0
- Lexical Diversity: 3.2766
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13349130', '15431442', '10640082', '13271161', '14043256']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8243274064170997
- 35 USC 102 Novelty (BERT): 0.4822769610381596
- Combined Prediction Score: 0.7901223618792057
- Mean Citation Score: 237.338562
- Max Citation Score: 241.01894
- Similarity Product: 192.59695200329784

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test