PATENT CLAIM ANALYSIS

Application Number: 16036216
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["711", "109000"]

Abstract:
According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.

Claim (Index 29):
A method of controlling a plurality of memory nodes, each of the memory nodes including a plurality of input ports, a plurality of output ports, and a memory in which data is stored, each of the memory nodes being configured to output a packet input to the input port to one of the output ports, the memory nodes being mutually connected at the input ports and the output ports and have addresses, the method comprising;\n determining which one of eight areas separated by a first straight line connecting the memory node of a destination address and the memory node of a source address, a second straight line orthogonal to the first straight line, and two straight lines passing through the memory node of the destination address and extending along a direction in which the memory nodes are arrayed the memory node of a current position address belongs to, the destination address indicating an address of a memory node of a target for tire packet to be forwarded, and forwarding a packet to an adjacent memory node in a direction determined by output port occupancy information of the memory node of the current position address in two directions allocated to the area to which the memory node, of the current position address belongs, wherein while the packet is forwarded from the memory node of the source address to the memory node of the destination address, a trajectory of the packet forwarded from the memory node of the source address to the memory node of the destination address is along the straight line, and the output port occupancy information indicates whether each of the output ports can forward the packet.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 95.0
- Lexical Diversity: 2.69643
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14974245', '13293399', '13817979', '14244701', '13715669']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.485532338821843
- 35 USC 102 Novelty (BERT): 0.5556675851362028
- Combined Prediction Score: 0.492545863453279
- Mean Citation Score: 279.906034
- Max Citation Score: 413.43652
- Similarity Product: 373.3921218038416

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test