PATENT CLAIM ANALYSIS

Application Number: 15886876
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["257", "295000"]

Abstract:
A circuit and method relating to a ferroelectric region free of extended grain boundaries through a thickness of ferroelectric film. The circuit includes an interlayer insulating film disposed on a semiconductor wafer; a first conductive film disposed on the interlayer insulating film; a ferroelectric film disposed on the first conductive film; a second conductive film disposed on the ferroelectric film; and a ferroelectric region patterned from the ferroelectric film, wherein the ferroelectric region is free of extended grain boundaries through a thickness of the ferroelectric film. The method includes depositing an interlayer insulating film over a semiconductor wafer; depositing a first conductive film over the interlayer insulating film; depositing a ferroelectric film over the first conductive film; depositing a second conductive film over the ferroelectric film; and forming a capacitor by patterning the first conductive film, the second conductive film, and the ferroelectric film.

Claim (Index 4):
The circuit of  claim 2 , wherein the perovskite material is Lead Zirconium Titanate (PZT).

Metadata:
- Claim Count in Document: 38.0
- Percentile: 88.0
- Lexical Diversity: 3.67442
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12177621', '11441195', '11102809', '11938956', '10113622']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9206508701078318
- 35 USC 102 Novelty (BERT): 0.5043866002418499
- Combined Prediction Score: 0.8790244431212335
- Mean Citation Score: 190.394974
- Max Citation Score: 196.1126
- Similarity Product: 114.79379286010264

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test