PATENT CLAIM ANALYSIS

Application Number: 16137562
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-05
Patent Classification: ["710", "009000"]

Abstract:
A bus node is capable of performing a method for the assigning of bus node addresses to bus nodes of a serial data bus. The method is performed with the aid of bus shunt resistors in the individual bus nodes of the data bus system in an assignment time period. After the assigning of bus node addresses to the bus nodes in the assignment time period, there follows an operating time period. For this purpose, the bus node comprises such a bus shunt resistor. The bus node is characterized by a bus shunt bypass switch which, prior to assigning a bus node address to the bus node in the assignment time period is opened and which after the assignment of bus node address to the bus node in the assignment time period is closed, and which is closed in the operating time period.

Claim (Index 15):
The method of  claim 13 , wherein:\n each of the at least two not-yet-addressed addressable bus nodes comprises a sole addressing current source; wherein: the sole addressing current source is operatively coupled to feed the address current or alternatively a test current into an input of a switching unit comprising the input, a first output, and a second output, the first output coupled to the first electrical node of a respective addressable bus node and the second output coupled to the second electrical node of the respective addressable bus node; the switching unit being transitioned into a first switching position in which the input of the switching unit is connected to the first output of the switching unit, or is preset into this first switching position; during feeding the address current in the first switching position of the switching unit, it is determined whether the current measurement circuit detects the address current or alternatively the test current; and in a case that it is determined that the current measurement circuit does not detect the address current or alternatively the test current, the switching unit is transitioned into a second switching position in which the input of the switching unit is connected to the second output.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 97.0
- Lexical Diversity: 2.86792
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16137563', '16137561', '14043186', '16470585', '15048354']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6642205877003802
- 35 USC 102 Novelty (BERT): 0.5738935675671979
- Combined Prediction Score: 0.6551878856870619
- Mean Citation Score: 325.28069
- Max Citation Score: 507.13895
- Similarity Product: 367.2986283471406

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test