PATENT CLAIM ANALYSIS

Application Number: 15951692
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["365", "185110"]

Abstract:
The present disclosure relate a method of operating a semiconductor memory device including at least two memory blocks sharing one block word line. The method including applying an erase voltage to a source line commonly coupled to the memory blocks, one of which is a selected memory block and applying a first voltage to the block word line and a third voltage to a global word line of an unselected memory block of the memory blocks when the erase voltage is applied to the source line, wherein the first voltage is higher than a turn-on voltage to turn on a pass transistor coupled to the block word line, and wherein the third voltage floats a local word line included in the unselected memory block according to a level of the first voltage.

Claim (Index 18):
The semiconductor memory device of  claim 15 , wherein the transfer block stores system information about a plurality of memory blocks included in the memory cell array.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 91.0
- Lexical Diversity: 2.44643
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15624991', '15628755', '15631054', '14219811', '15641485']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8340669988592193
- 35 USC 102 Novelty (BERT): 0.5459961750637449
- Combined Prediction Score: 0.8052599164796719
- Mean Citation Score: 320.6176200000001
- Max Citation Score: 422.32986
- Similarity Product: 350.55064254187

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test