PATENT CLAIM ANALYSIS

Application Number: 16008480
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["365", "185280"]

Abstract:
Systems include a first semiconductor die comprising a charge pump to generate power supply signals, a second semiconductor die comprising a memory array and programming circuitry, and a bus connected to the first and second semiconductor dies to carry the power supply signals to the programming circuitry. The programming circuitry is adapted to program memory cells of the memory array to respective threshold voltages that are each less than or equal to the first voltage.

Claim (Index 10):
The system of  claim 1 , wherein the memory cells of the memory array are arranged as n-transistor flash memory strings, where n is an integer value less than 12.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 94.0
- Lexical Diversity: 1.79545
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15216160', '13156961', '10881951', '11483241', '12719413']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7944291700582686
- 35 USC 102 Novelty (BERT): 0.5191033180573751
- Combined Prediction Score: 0.7668965848581792
- Mean Citation Score: 250.771412
- Max Citation Score: 340.65363
- Similarity Product: 338.35566384308515

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test