PATENT CLAIM ANALYSIS

Application Number: 16118863
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-07
Patent Classification: ["365", "193000"]

Abstract:
A read margin control circuit is provided. The read margin control circuit includes a delay circuit that delays a data input/output signal and generates delay signals having different phases from each other, a sampler that samples the delay signals based on a data strobe signal to generate sampling values, and a determiner configured to determine a data valid window of the data input/output signal based on the sampling values.

Claim (Index 19):
The electronic device of  claim 18 , wherein the first sampling value is generated by sampling a first delay signal of the plurality of delay signals,\n wherein the plurality of second sampling values are generated by sampling a plurality of second delay signals of the plurality of delay signals, wherein the plurality of third sampling values are generated by sampling a plurality of third delay signals of the plurality of delay signals, and wherein the first delay signal is more delayed than the plurality of second delay signals and is less delayed than the plurality of third delay signals.

Metadata:
- Claim Count in Document: 39.0
- Percentile: 96.0
- Lexical Diversity: 1.69767
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12044174', '12482190', '15264946', '13024448', '10931358']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7967120953474413
- 35 USC 102 Novelty (BERT): 0.4941484020840495
- Combined Prediction Score: 0.766455726021102
- Mean Citation Score: 240.87781000000004
- Max Citation Score: 246.19704
- Similarity Product: 189.3133717585229

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test