PATENT CLAIM ANALYSIS

Application Number: 15861183
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["327", "374000"]

Abstract:
A circuit for an RF switch using FET transistors that largely cancels the non-linearity of the C oss  of the FETs over a majority of the signal range, and reduces distortion. The RF switch includes two substantially identical FETs. The source of one FET is connected to the drain of the other FET and the node formed comprises one terminal of the switch. Two substantially identical capacitors are connected in series with each other and in parallel with the FETs, and the node thus formed comprises the second terminal of the switch. The capacitors are selected such that they have negligible impedance at AC frequencies for which the switch is expected be used, and in particular a much lower impedance than C oss  of each FET. A voltage source with a series impedance is also connected in parallel with the capacitors and the two FETs.

Claim (Index 7):
The RF switch as recited in  claim 6 , wherein the series impedance has a sufficiently large impedance at DC and low frequencies to limit DC current through the first and second FETs when the switch is on.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 86.0
- Lexical Diversity: 2.10959
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12177469', '12473351', '14052680', '15487112', '13936177']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7106740383592809
- 35 USC 102 Novelty (BERT): 0.4847369967312044
- Combined Prediction Score: 0.6880803341964733
- Mean Citation Score: 194.564122
- Max Citation Score: 198.18558
- Similarity Product: 139.93077915083168

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test