PATENT CLAIM ANALYSIS

Application Number: 15876161
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["710", "301000"]

Abstract:
A computing and communication chip architecture is provided wherein the interfaces of processor access to the memory chips are implemented as a high-speed packet switched serial interface as part of each chip. In one embodiment, the interface is accomplished through a gigabit Ethernet interface provided by protocol processor integrated as part of the chip. The protocol processor encapsulates the memory address and control information like Read, Write, number of successive bytes etc, as an Ethernet packet for communication among the processor and memory chips that are located on the same motherboard, or even on different circuit cards. In one embodiment, the communication over head of the Ethernet protocol is further reduced by using an enhanced Ethernet protocol with shortened data frames within a constrained neighborhood, and/or by utilizing a bit stream switch where direct connection paths can be established between elements that comprise the computing or communication architecture.

Claim (Index 1):
An apparatus implementing communication chip architecture for integrated circuitry, comprising:\n at least a pair of external ports; and at least one programmable switch operably connected to the said pair of external ports; and, the said pair of external ports and the said programmable switch are collocated on the semiconductor die package; wherein, the said programmable switch is adapted to provide translation between multiple serial communication protocols; and, each of the said pair of external ports is adapted to communicate with external devices using different packetized serial communication protocol; and, each of the said pair of external ports is adapted to provide a predefined serial communications interface; and, the said programmable switch is adapted to provide packetized serial communication among the said pair of external ports.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 1.70968
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14552471', '12025720', '12910867', '13421826', '13421548']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7165519747132632
- 35 USC 102 Novelty (BERT): 0.550719374895311
- Combined Prediction Score: 0.6999687147314679
- Mean Citation Score: 341.167458
- Max Citation Score: 427.61816
- Similarity Product: 379.67686055190086

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test