PATENT CLAIM ANALYSIS

Application Number: 16114217
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-03
Patent Classification: ["438", "396000"]

Abstract:
The present invention relates to a method of forming a memory capacitor. A substrate is provided with a plurality of storage node contacts. A patterned supporting structure is formed on the substrate, following by forming a bottom electrode conformally on surface of plural openings in the patterned supporting structure, thereby contacting the storage node contacts. A sacrificial layer is formed in the opening. A soft etching process is performed to remove the bottom electrode on top and partial sidewall of the patterned supporting structure, wherein the soft etching process includes using a fluoride containing compound, a nitrogen and hydrogen containing compound and an oxygen containing compound. The sacrificial layer is completely removed away. A capacitor dielectric layer and a top electrode are formed on the bottom electrode layer.

Claim (Index 7):
The method of forming a memory capacitor according to  claim 6 , wherein before the soft etching process, a bottom surface of the sacrificial layer is lower than a top surface of the patterned supporting layer.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 96.0
- Lexical Diversity: 2.10606
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11173189', '11159130', '10904479', '12949870', '12640846']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8424463400529459
- 35 USC 102 Novelty (BERT): 0.5056125555915087
- Combined Prediction Score: 0.8087629616068023
- Mean Citation Score: 189.509082
- Max Citation Score: 197.33784
- Similarity Product: 125.01935176480292

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test