PATENT CLAIM ANALYSIS

Application Number: 15753124
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["257", "401000"]

Abstract:
Embodiments of the present disclosure describe techniques for revealing a backside of an integrated circuit (IC) device, and associated configurations. The IC device may include a plurality of fins formed on a semiconductor substrate (e.g., silicon substrate), and an isolation oxide may be disposed between the fins along the backside of the IC device. A portion of the semiconductor substrate may be removed to leave a remaining portion. The remaining portion may be removed by chemical mechanical planarization (CMP) using a selective slurry to reveal the backside of the IC device. Other embodiments may be described and/or claimed.

Claim (Index 23):
The computing device of  claim 19 , wherein the plurality of fins have a dished surface at or near the backside of the integrated circuit.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 88.0
- Lexical Diversity: 1.86667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15775786', '15774952', '15275068', '15503377', '15810488']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9156331604386674
- 35 USC 102 Novelty (BERT): 0.4771740046826289
- Combined Prediction Score: 0.8717872448630636
- Mean Citation Score: 153.07082599999995
- Max Citation Score: 164.32771
- Similarity Product: 118.7511929587555

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test