PATENT CLAIM ANALYSIS

Application Number: 16133434
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-04
Patent Classification: ["712", "225000"]

Abstract:
Disclosed embodiments relate to a streaming engine employed in, for example, a digital signal processor. A fixed data stream sequence including plural nested loops is specified by a control register. The streaming engine includes an address generator producing addresses of data elements and a steam head register storing data elements next to be supplied as operands. The streaming engine fetches stream data ahead of use by the central processing unit core in a stream buffer. Parity bits are formed upon storage of data in the stream buffer which are stored with the corresponding data. Upon transfer to the stream head register a second parity is calculated and compared with the stored parity. The streaming engine signals a parity fault if the parities do not match. The streaming engine preferably restarts fetching the data stream at the data element generating a parity fault.

Claim (Index 1):
A digital data processor comprising:\n an instruction memory to store instructions each specifying a data processing operation and at least one data operand field; an instruction decoder connected to said instruction memory for sequentially recalling instructions from said instruction memory and determining said specified data processing operation and said specified at least one operand; at least one functional unit connected to said data register file and said instruction decoder for performing data processing operations upon at least one operand corresponding to an instruction decoded by said instruction decoder and storing results; a streaming engine connected to said instruction decoder operable in response to a stream start instruction to recall from memory a stream of an instruction specified sequence of a plurality of data elements, said streaming engine including\n an address generator for generating stream memory addresses corresponding to said stream of an instruction specified sequence of a plurality of data elements, \n a stream buffer receiving and temporarily storing data elements corresponding to said stream memory addresses, \n a stream head register storing a data element of said stream next to be used by said at least one functional unit; \n a first parity bit generator receiving data elements of said data stream recalled from the memory corresponding to stream memory addresses, having an output connected to said stream buffer, said first parity bit generator configured to form first parity bits from said data elements wherein said stream buffer stores both said data elements of said stream and corresponding parity bits; a second parity bit generator receiving said stored stream and corresponding parity bits at an output of said stream buffer before supply to said at least one operational unit, said second parity bit generator operable to\n form second parity bits from said data elements output from said stream buffer, \n compare said first parity bits with corresponding second parity bits, and \n signal a parity fault if said first parity bits do not match said corresponding second parity bits; and \n wherein said at least one functional unit is responsive to a stream operand instruction to receive at least one operand from said stream head register.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 97.0
- Lexical Diversity: 1.76744
- Patent Class: 712.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15384355', '15384342', '15384416', '15384378', '16126680']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6791422837253017
- 35 USC 102 Novelty (BERT): 0.5934812395588446
- Combined Prediction Score: 0.670576179308656
- Mean Citation Score: 472.763284
- Max Citation Score: 520.3698
- Similarity Product: 491.2955314286472

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test