PATENT CLAIM ANALYSIS

Application Number: 16042949
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["327", "143000"]

Abstract:
Various implementations described herein are directed to a circuit. The circuit may include a memory circuit having a first latch. The circuit may include a power-on-reset circuit having a second latch coupled to the first latch. The second latch may be configured to reset the first latch to a predetermined state at power-up.

Claim (Index 12):
A circuit comprising:\n multiple inversion stages that are arranged to generate a pulse based on at least one of an input signal and a power supply input, wherein at least one inversion stage of the multiple inversion stages provides an output as the power supply input to at least one other inversion stage of the multiple inversion stages, wherein the pulse is generated during ramp-up of the power supply input.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 95.0
- Lexical Diversity: 2.03571
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15143197', '12134309', '11849296', '15657406', '13491622']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7510100515003681
- 35 USC 102 Novelty (BERT): 0.5055022667260913
- Combined Prediction Score: 0.7264592730229404
- Mean Citation Score: 181.270854
- Max Citation Score: 258.23938
- Similarity Product: 162.56108214645624

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test