PATENT CLAIM ANALYSIS

Application Number: 16245289
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["257", "401000"]

Abstract:
A semiconductor device including at least one fin extending upward from a substrate and a gate on the substrate, wherein the gate includes outer sidewalls, wherein the fin extend through a width of the gate. A spacer material can be adjacent to the outer sidewalls of the gate, wherein a top surface of the spacer material is below the top surface of the gate and above the top surface of the fin. The semiconductor device can also include an epitaxial semiconductor layer over the fins on each side of the spacer material. A low-k dielectric material can be deposited above each epitaxial semiconductor layer. The semiconductor device also includes a dielectric top layer forming a top surface of the transistor, wherein the dielectric top layer seals an air gap between the top surface of the fins and the dielectric top layer.

Claim (Index 19):
The semiconductor device of  claim 11 , further comprising trench silicide regions in the low-k dielectric material.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 2.63158
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14957809', '15697529', '15697522', '15851149', '15804303']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9227010114795658
- 35 USC 102 Novelty (BERT): 0.5537380713412878
- Combined Prediction Score: 0.8858047174657381
- Mean Citation Score: 375.15578199999993
- Max Citation Score: 430.82782
- Similarity Product: 294.6002096676898

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test