PATENT CLAIM ANALYSIS

Application Number: 15899683
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-01
Patent Classification: ["257", "334000"]

Abstract:
An integrated circuit device may include a gate dielectric layer on an inner surface of a gate trench of a substrate, a gate structure filling a portion of the gate trench on the gate dielectric layer, and an insulating, capping pattern on an upper surface of the gate structure in the gate trench. The gate structure may include a lower gate line having a first work function, an upper gate line having a second work function lower than the first work function, a first blocking layer between the lower gate line and the upper gate line, and a second blocking layer between the upper gate line and the insulating capping pattern.

Claim (Index 6):
The integrated circuit device of  claim 1 ,\n wherein the first blocking layer comprises an inner metal-containing layer spaced apart from the gate dielectric layer and an outer metal-containing layer between the gate dielectric layer and the inner metal-containing layer, and wherein the inner metal-containing layer and the outer metal-containing layer comprise different compositions.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 88.0
- Lexical Diversity: 2.975
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13779179', '15878990', '15404703', '14151288', '13761376']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9285590492157718
- 35 USC 102 Novelty (BERT): 0.5008707457618806
- Combined Prediction Score: 0.8857902188703828
- Mean Citation Score: 242.175942
- Max Citation Score: 250.644
- Similarity Product: 180.53904224395748

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test