PATENT CLAIM ANALYSIS

Application Number: 15926159
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["363", "131000"]

Abstract:
A multi-level inverter having at least two banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.

Claim (Index 2):
The method of  claim 1  wherein the switching of the single bank includes switching at different times more than three low voltage MOSFET transistors.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 90.0
- Lexical Diversity: 1.46667
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15054647', '14485682', '13826556', '15482037', '12959694']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8616403289479123
- 35 USC 102 Novelty (BERT): 0.4908105934245417
- Combined Prediction Score: 0.8245573553955753
- Mean Citation Score: 213.341804
- Max Citation Score: 239.41556
- Similarity Product: 171.5311130742669

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test