PATENT CLAIM ANALYSIS

Application Number: 15980503
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-12
Patent Classification: ["257", "316000"]

Abstract:
Floating gate memory cells in vertical memory. A control gate is formed between a first tier of dielectric material and a second tier of dielectric material. A floating gate is formed between the first tier of dielectric material and the second tier of dielectric material, wherein the floating gate includes a protrusion extending towards the control gate. A charge blocking structure is formed between the floating gate and the control gate, wherein at least a portion of the charge blocking structure wraps around the protrusion.

Claim (Index 10):
The memory array of  claim 8 , wherein a portion of the barrier film extends around at least a portion of the second portion of the floating gate.

Metadata:
- Claim Count in Document: 30.0
- Percentile: 93.0
- Lexical Diversity: 2.52778
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15691477', '14925589', '13838297', '14987147', '13864794']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9211543355629148
- 35 USC 102 Novelty (BERT): 0.4913074414182499
- Combined Prediction Score: 0.8781696461484485
- Mean Citation Score: 212.31179
- Max Citation Score: 242.12383
- Similarity Product: 193.04636416978715

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test