PATENT CLAIM ANALYSIS

Application Number: 16180930
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["711", "151000"]

Abstract:
A nested wrap-around technology includes an address counter and associated logic for generating addresses to perform a nested wrap-around access operation. The nested wrap-around access operation may be a read or a write operation. A wrap-around section length and a wrap-around count define a wrap-around block. A wrap starting address, initially set to a supplied start address, is offset from a lower boundary of a wrap-around section. Access starts at a wrap starting address and proceeds in a wrap-around manner within a wrap-around section. After access of the address immediately preceding the wrap starting address, the wrap starting address is incremented by the wrap-around section length, or, if the wrap-around section is the last one in the wrap-around block, the wrap starting address is set to the lower boundary of the wrap-around block plus the offset. Access continues until a termination event.

Claim (Index 1):
A device configured to execute an access operation, comprising:\n logic responsive to a command specifying a supplied starting address to generate an address sequence for a block of memory, the block including a number N of sections having a number M of addressable units, the numbers N and M being integers greater than one, wherein the supplied starting address identifies a starting section with a non-zero address offset from a lower boundary of the block, and has a second non-zero address offset from a lower boundary of the starting section; the address sequence including the number N of address sub-sequences, including a starting sub-sequence for the starting section, and a series of sub-sequences incrementing by section to a section which includes an upper boundary of the block, and wrapping around to a section at the lower boundary of the block; and the sub-sequences for corresponding sections of the block having respective starting addresses having the second non-zero address offset from respective lower boundaries of the corresponding sections, and addresses incrementing by an addressable unit from the respective starting addresses to an upper boundary of the corresponding section, and wrapping around to a lower boundary of the corresponding section.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 98.0
- Lexical Diversity: 2.38462
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15139252', '12037028', '11093132', '12113756', '11359205']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4872450688811181
- 35 USC 102 Novelty (BERT): 0.5717030213776293
- Combined Prediction Score: 0.4956908641307692
- Mean Citation Score: 219.41612
- Max Citation Score: 466.20743
- Similarity Product: 417.0662926518572

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test