PATENT CLAIM ANALYSIS

Application Number: 15910506
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-11
Patent Classification: ["257", "329000"]

Abstract:
Provided is a method for forming a semiconductor structure. In one or more embodiments of the invention, the method includes forming a semiconductor fin on a substrate and decreasing a width of the semiconductor fin. The method further includes forming a spacer layer on a surface of the substrate and forming a high dielectric constant layer on exposed surfaces of the semiconductor fin and the spacer layer. The method also includes forming a work function metal layer on the high dielectric constant layer. The method also includes removing portions of the work function metal layer and the high dielectric constant layer to expose portions of the spacer layer. A thickness of the remaining work function metal layer on sidewalls of the semiconductor fin is uniform.

Claim (Index 19):
The structure according to  claim 11 , further comprising an interlayer dielectric layer on the top spacer layer.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 90.0
- Lexical Diversity: 2.75
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15597573', '15479567', '15599878', '15813528', '15618611']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9225260748870604
- 35 USC 102 Novelty (BERT): 0.5335472300057107
- Combined Prediction Score: 0.8836281903989256
- Mean Citation Score: 289.037698
- Max Citation Score: 373.50507000000016
- Similarity Product: 279.70754888232364

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test