PATENT CLAIM ANALYSIS

Application Number: 15875212
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "758000"]

Abstract:
The present disclosure relates to semiconductor structures and, more particularly, to self-aligned interconnect structures and methods of manufacture. The structure includes an interconnect structure which is self-aligned with an upper level via metallization, and both the interconnect structure and the upper level via metallization are composed of a Pt group material.

Claim (Index 16):
The method of  claim 15 , wherein the interconnect structure and the upper level via metallization are devoid of a dielectric capping material at an interface.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 1.6
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15643742', '15647400', '15338070', '15602801', '15868479']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.92174533801589
- 35 USC 102 Novelty (BERT): 0.4944061877758237
- Combined Prediction Score: 0.8790114229918834
- Mean Citation Score: 198.191998
- Max Citation Score: 203.74677
- Similarity Product: 137.01713115780473

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test