PATENT CLAIM ANALYSIS

Application Number: 15938393
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["365", "189090"]

Abstract:
A circuit includes a voltage node, a plurality of memory cells, a bit line coupled with the plurality of memory cells, and a switching circuit coupled between the voltage node and the bit line. The switching circuit is configured to couple the voltage node with the bit line responsive to a voltage level on the bit line.

Claim (Index 15):
The method of  claim 11 , wherein the using the logic circuit to couple the bit line with the voltage node comprises:\n generating a switching signal with the logic circuit; and in response to the switching signal, switching on a first transistor coupled between the bit line and the voltage node.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 90.0
- Lexical Diversity: 2.21429
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13804405', '13780772', '14659642', '15434541', '14504596']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8064074191875962
- 35 USC 102 Novelty (BERT): 0.4691935754714637
- Combined Prediction Score: 0.772686034815983
- Mean Citation Score: 185.340002
- Max Citation Score: 191.39548
- Similarity Product: 148.84375994492055

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test