PATENT CLAIM ANALYSIS

Application Number: 15881940
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["323", "313000"]

Abstract:
A startup circuit for a voltage reference circuit is provided. The startup circuit includes first, second, and third transistors. The first transistor has a first current electrode coupled to the voltage reference circuit, a control electrode, and a second current electrode coupled to a ground terminal. The second transistor has a first current electrode and a control electrode both coupled to a power supply voltage terminal, and a second current electrode. The third transistor has a first current electrode coupled to the second current electrode of the second transistor and to the control electrode of the first transistor, a control electrode coupled to the voltage reference circuit, and a second current electrode coupled to the ground terminal. During application of a power supply voltage, the second transistor is off, thus providing only a leakage current to the gate of the first transistor. This provides for reliable startup with very low residual current after startup is complete.

Claim (Index 16):
A circuit comprising:\n a voltage reference circuit comprising:\n a first P-channel transistor having a source coupled to the power supply voltage terminal, a gate, and a drain; \n a second P-channel transistor having a source coupled to the power supply voltage terminal, a gate and a drain both coupled to the gate of the first P-channel transistor; \n a first N-channel transistor having a drain and a gate both coupled to the drain of the first P-channel transistor, and a source coupled to a ground terminal; and \n a second N-channel transistor having a drain coupled to the drain of the second P-channel transistor, a gate coupled to the gate of the first N-channel transistor, and source coupled to the ground terminal; and \n a startup circuit comprising:\n a third N-channel transistor having a drain coupled to the gates of the first and second P-channel transistors, a gate, and a source coupled to the ground terminal; \n a third P-channel transistor having a gate and a source both directly connected to the power supply voltage terminal, and a drain coupled to the gate of the third N-channel transistor, wherein a gate-to-source voltage of the third P-channel transistor is substantially zero volts during application of a power supply voltage to the power supply voltage terminal; and \n a fourth N-channel transistor having a drain coupled to the drain of the third P-channel transistor, a gate coupled to the drain of the first P-channel transistor, and a source coupled to the ground terminal.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 86.0
- Lexical Diversity: 3.5102
- Patent Class: 323.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12407587', '11405912', '11677309', '15305041', '14020979']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7503906433506584
- 35 USC 102 Novelty (BERT): 0.4875324958578589
- Combined Prediction Score: 0.7241048286013785
- Mean Citation Score: 260.360196
- Max Citation Score: 264.3031
- Similarity Product: 219.5892216030061

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test