PATENT CLAIM ANALYSIS

Application Number: 15964636
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-03
Patent Classification: ["257", "336000"]

Abstract:
Various embodiments of the present application are directed towards an integrated circuit (IC) in which a high voltage metal-oxide-semiconductor (HVMOS) device is integrated with a high voltage junction termination (HVJT) device. In some embodiments, a first drift well and a second drift well are in a substrate. The first and second drift wells border in a ring-shaped pattern and have a first doping type. A peripheral well is in the substrate and has a second doping type opposite the first doping type. The peripheral well surrounds and separates the first and second drift wells. A body well is in the substrate and has the second doping type. Further, the body well overlies the first drift well and is spaced from the peripheral well by the first drift well. A gate electrode overlies a junction between the first drift well and the body well.

Claim (Index 14):
The integrated circuit according to  claim 13 , wherein the high side well has an indentation adjacent to the switching device, and wherein the high side contact region and the drift contact region conform to the indent.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 2.60656
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15694341', '14074802', '14567357', '12959538', '11692213']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9162637369692578
- 35 USC 102 Novelty (BERT): 0.4870733153201323
- Combined Prediction Score: 0.8733446948043453
- Mean Citation Score: 160.923292
- Max Citation Score: 170.03821000000005
- Similarity Product: 113.77819912183944

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test