PATENT CLAIM ANALYSIS

Application Number: 16107906
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-06
Patent Classification: ["326", "041000"]

Abstract:
A Look Up Table (LUT) includes a data storage circuit including a plurality of nonvolatile memory elements respectively corresponding to a plurality of applications, the data storage circuit being configured to select one of the plurality of nonvolatile memory elements according to an application selection signal; an amplification circuit configured to amplify a signal output from the selected nonvolatile memory element according to an enable signal output from a decoder; and a write control circuit configured to program the selected nonvolatile memory element with information corresponding to a data signal according to a write signal.

Claim (Index 9):
The FPGA of  claim 8 , further comprising:\n a reference data storage circuit including a reference nonvolatile memory element, wherein the amplification circuit is configured to amplify a signal corresponding to a difference between information stored in the selected nonvolatile memory element and information stored in the reference nonvolatile memory element.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 96.0
- Lexical Diversity: 2.06122
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15802148', '11546681', '11566573', '14444422', '11151988']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6484647846786555
- 35 USC 102 Novelty (BERT): 0.4888094865143159
- Combined Prediction Score: 0.6324992548622216
- Mean Citation Score: 183.229722
- Max Citation Score: 218.20924
- Similarity Product: 148.6010244490504

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test