PATENT CLAIM ANALYSIS

Application Number: 15940338
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["711", "005000"]

Abstract:
An example of a system includes a host interface, a set of non-volatile memory cells, and one or more control circuits coupled to the host interface and coupled to the set of non-volatile memory cells. The one or more control circuits are configured to access a host memory through the host interface by sending host memory access requests for two or more blocks of host data according to an interleaving scheme.

Claim (Index 8):
The system of  claim 1  wherein the one or more control circuits are configured to detect one or more patterns of host memory responses to host memory access requests and to modify the interleaving scheme in response to a pattern of host memory responses.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 90.0
- Lexical Diversity: 1.92308
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15901054', '14644021', '15385158', '15730511', '15873395']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5289312336474998
- 35 USC 102 Novelty (BERT): 0.4755735165857036
- Combined Prediction Score: 0.5235954619413202
- Mean Citation Score: 166.238044
- Max Citation Score: 171.25522
- Similarity Product: 124.8841457767725

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test