PATENT CLAIM ANALYSIS

Application Number: 16363622
Application Type: Utility
Filing Date: 2019-03
Publication Date: 2019-09
Patent Classification: ["716", "111000"]

Abstract:
A virtual fabrication environment for semiconductor device structures that includes the use of virtual metrology measurement data to optimize a virtual fabrication sequence is described. Further, calibration of the virtual fabrication environment is performed by comparing virtual metrology data generated from a virtual fabrication run with a subset of measurements performed in a physical fabrication environment. Additionally, virtual experiments conducted in the virtual fabrication environment of the present invention generate multiple device structure models using ranges of process and design parameter variations for an integrated process flow and design space of interest.

Claim (Index 40):
The virtual fabrication system of  claim 37 , further comprising:\n a hierarchical materials database.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 99.0
- Lexical Diversity: 1.67241
- Patent Class: 716.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13831440', '13831444', '13831450', '13831433', '15089999']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4642802466869271
- 35 USC 102 Novelty (BERT): 0.5699232397093842
- Combined Prediction Score: 0.4748445459891728
- Mean Citation Score: 508.18026
- Max Citation Score: 567.6293
- Similarity Product: 433.1690320816397

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test