PATENT CLAIM ANALYSIS

Application Number: 15948456
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "678000"]

Abstract:
Integrated component packages and methods of assembling integrated component packages are provided. The integrated component package can comprise a bump pitch relaxing layer. A high-bandwidth memory component directly mechanically coupled to the bump pitch relaxing layer on a first side of the bump pitch relaxing layer via a first set of bump bond connections. The high-bandwidth memory component directly electrically coupled to the bump pitch relaxing layer on the first side of the bump pitch relaxing layer via the first set of bump bond connections. The bump pitch relaxing layer mechanically coupled to a first side of a substrate via second set of bump bond connections. The high-bandwidth memory component electrically coupled to the substrate via the bump-pitch relaxing layer and the second set of bump bond connections, and a bump pitch of the second set of bump bond connections is larger than the first set of bump bond connections.

Claim (Index 19):
The method of  claim 12 , further comprising:\n coupling a decoupling on-package capacitor to a top side of the substrate.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 91.0
- Lexical Diversity: 3.65116
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12090686', '15816312', '14963151', '14171517', '13268091']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.908690486524413
- 35 USC 102 Novelty (BERT): 0.4970149146932271
- Combined Prediction Score: 0.8675229293412944
- Mean Citation Score: 168.994692
- Max Citation Score: 187.96509
- Similarity Product: 115.06561086195052

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test