PATENT CLAIM ANALYSIS

Application Number: 15892444
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "401000"]

Abstract:
Among other things, one or semiconductor arrangements, and techniques for forming such semiconductor arrangements are provided. An etch sequence is performed to form a first etched region over a planar region of a semiconductor arrangement. The first etched region exposes a planar structure, such as an alignment mark used for alignment during semiconductor fabrication. The etch sequence forms a second etched region over a semiconductor fin region of the semiconductor arrangement. In an embodiment, the etch sequence forms a first trench, a first fin nub and a first pillar in the semiconductor fin region, where the first trench is formed in a semiconductor substrate of the semiconductor fin region. A multi-depth STI structure is formed over at least one of the first trench, the first fin nub, or the first pillar.

Claim (Index 7):
The semiconductor arrangement of  claim 1 , comprising:\n an alignment mark overlaying the substrate.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 88.0
- Lexical Diversity: 2.45763
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14024885', '15368786', '14147851', '15130032', '14920923']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8957528376248257
- 35 USC 102 Novelty (BERT): 0.5045886693372504
- Combined Prediction Score: 0.8566364207960682
- Mean Citation Score: 206.836592
- Max Citation Score: 283.90393
- Similarity Product: 252.1553438186043

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test