PATENT CLAIM ANALYSIS

Application Number: 15936112
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-08
Patent Classification: ["365", "154000"]

Abstract:
A semiconductor device, includes: a semiconductor substrate having a first well region; an insulating layer formed on a first portion of the semiconductor substrate, and contacted with the first well region; a semiconductor layer formed on the insulating layer; an element isolation region reaching to an inside of the first well region, in cross-section view; a first gate electrode layer formed on a first portion of the semiconductor layer via a first gate insulating film; a second gate electrode layer formed on a second portion of the semiconductor layer via a second gate insulating film, and formed on a first portion of the element isolation region; an interlayer insulating film covering the first gate electrode layer, the second gate electrode layer and a second portion of the element isolation region; and a first plug conductor layer formed in the interlayer insulating film.

Claim (Index 10):
A semiconductor device, comprising:\n a semiconductor substrate having a first well region; an insulating layer formed on a first portion of the semiconductor substrate, and contacted with the first well region; a semiconductor layer formed on the insulating layer; a first gate electrode layer formed on the semiconductor layer via a first gate insulating film; a second gate electrode layer formed on the semiconductor layer via a second gate insulating film; an interlayer insulating film covering the first gate electrode layer and the second gate electrode layer; a first plug conductor layer formed in the interlayer insulating film, and connected to the semiconductor layer; a second plug conductor layer formed in the interlayer insulating film, and connected to a second portion of the semiconductor substrate; a first wiring formed on the interlayer insulating film, and connected to the first plug conductor layer; and a second wiring formed on the interlayer insulating film, and connected to the second plug conductor layer, wherein the second gate electrode layer is isolated from the first wiring and the second wiring so as to be electrically floating, and wherein the semiconductor device is configured to be supplied a first electric potential to the semiconductor layer via the first plug conductor layer during standby time, and to be supplied a second electric potential, which is different from the first electric potential, to the first well region via the second plug conductor layer during standby time.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 90.0
- Lexical Diversity: 3.71429
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15667505', '15264450', '13675682', '14495178', '15165651']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7872201848255572
- 35 USC 102 Novelty (BERT): 0.5689612726829729
- Combined Prediction Score: 0.7653942936112988
- Mean Citation Score: 333.952528
- Max Citation Score: 461.78525
- Similarity Product: 409.4643363519609

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test