PATENT CLAIM ANALYSIS

Application Number: 15888069
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-07
Patent Classification: ["438", "625000"]

Abstract:
A method for fabricating a semiconductor structure is disclosed. A bit line is formed on a substrate. The bit line comprises a tungsten layer and cap layer on the tungsten layer. A low-temperature physical vapor deposition (PVD) process is performed to deposit a silicon nitride spacer layer covering the bit line and the substrate. The silicon nitride spacer layer is in direct contact with the tungsten layer. The low-temperature PVD process is performed at a temperature ranging between 200˜400° C.

Claim (Index 8):
A semiconductor structure fabricated by the method according to any of  claims 1  to  7 .

Metadata:
- Claim Count in Document: 13.0
- Percentile: 88.0
- Lexical Diversity: 1.87234
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11614082', '10355667', '13615179', '10961896', '11321527']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8477415663170326
- 35 USC 102 Novelty (BERT): 0.4726835181153241
- Combined Prediction Score: 0.8102357614968617
- Mean Citation Score: 108.21532340000002
- Max Citation Score: 110.402695
- Similarity Product: 74.28588929353714

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test