PATENT CLAIM ANALYSIS

Application Number: 15754151
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["257", "327000"]

Abstract:
A high-voltage transistor structure is provided that includes a self-aligned isolation feature between the gate and drain. Normally, the isolation feature is not self-aligned. The self-aligned isolation process can be integrated into standard CMOS process technology. In one example embodiment, the drain of the transistor structure is positioned one pitch away from the active gate, with an intervening dummy gate structure formed between the drain and active gate structure. The dummy gate structure is sacrificial in nature and can be utilized to create a self-aligned isolation recess, wherein the gate spacer effectively provides a template for etching the isolation recess. This self-aligned isolation forming process eliminates a number of the variation and dimensional constraints attendant non-aligned isolation forming techniques, which in turn allows for smaller footprint and tighter alignment so as to reduce device variation. The structure and forming techniques are compatible with both planar and non-planar transistor architectures.

Claim (Index 17):
A method for forming a high-voltage transistor device, the method comprising:\n providing a first gate structure over a semiconductor region, the first gate structure having a gate spacer; providing a source region to one side of the first gate structure; providing a drain region to another side of the first gate structure; and providing an isolation aligned to a gate spacer of a second gate structure above the isolation, the isolation comprising insulation material and located between the semiconductor region and a contact structure on one of the source or drain regions.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 88.0
- Lexical Diversity: 1.87209
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14173831', '12041967', '15024750', '15397978', '14693978']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.89493214653802
- 35 USC 102 Novelty (BERT): 0.4677671271395942
- Combined Prediction Score: 0.8522156445981774
- Mean Citation Score: 174.32312399999995
- Max Citation Score: 179.56892
- Similarity Product: 151.67722846189258

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test