PATENT CLAIM ANALYSIS

Application Number: 16198495
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-04
Patent Classification: ["711", "100000"]

Abstract:
A memory system includes: a memory module including: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; and a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

Claim (Index 8):
The memory system of  claim 7 ,\n wherein the processor separately communicates with each of the first memory and the second memory according to the information of first latency and second latency provided from the first memory device and the second memory device.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 98.0
- Lexical Diversity: 2.52941
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15294387', '15292481', '15290824', '15292314', '15291795']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5745224946624258
- 35 USC 102 Novelty (BERT): 0.5013079724544727
- Combined Prediction Score: 0.5672010424416304
- Mean Citation Score: 263.22482
- Max Citation Score: 287.8834
- Similarity Product: 241.5089447502852

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test