PATENT CLAIM ANALYSIS

Application Number: 15865896
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["257", "659000"]

Abstract:
A semiconductor device chip includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, a semiconductor device disposed on the first surface of the semiconductor substrate, an interconnect pattern having an end connected to the semiconductor device and another end exposed on a surface of a function layer disposed on the first surface of the semiconductor substrate, plurality of external connection electrodes mounted on the surface of the function layer and electrically connected to the other end of the interconnect pattern, an electromagnetic wave shield film for shielding electromagnetic waves, which is disposed on the second surface of the semiconductor substrate and side surfaces of the function layer, and a ground interconnect electrically connected to the electromagnetic shield film and disposed on the function layer.

Claim (Index 4):
The method according to  claim 2 , wherein the dividing step of dividing said semiconductor wafer into the individual semiconductor device chips includes cutting the semiconductor wafer along said projected dicing lines with a cutting blade.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 2.89583
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15431171', '15679407', '14926308', '15702021', '14736872']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9116125932379756
- 35 USC 102 Novelty (BERT): 0.533227367076736
- Combined Prediction Score: 0.8737740706218516
- Mean Citation Score: 247.29970799999995
- Max Citation Score: 337.3737
- Similarity Product: 241.0799151972413

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test