PATENT CLAIM ANALYSIS

Application Number: 16039404
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["365", "226000"]

Abstract:
A memory device includes a first switch for switching a first power voltage and transmitting the first power voltage to a common node of a first power rail. A second switch switches a second power voltage and transmits the second power voltage to the common node. A control logic generates a first control signal for controlling the first switch during initial driving of the memory device. A masking circuit controls the first switch to maintain a turn on state in at least a partial period of the initial driving period of the memory device by providing a first masking control signal obtained by masking the first control signal to the first switch.

Claim (Index 18):
The method of  claim 17 , further comprising:\n generating a second DVFS control signal that controls the second DVFS switch; and maintaining a turn off state of the second DVFS switch in response to the second DVFS control signal in the initial driving period.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 95.0
- Lexical Diversity: 2.52174
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16039400', '15959344', '12786791', '10786708', '10507117']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8012811923659728
- 35 USC 102 Novelty (BERT): 0.5011845223252173
- Combined Prediction Score: 0.7712715253618974
- Mean Citation Score: 200.273266
- Max Citation Score: 270.52173
- Similarity Product: 186.7870690701484

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test