PATENT CLAIM ANALYSIS

Application Number: 16108236
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["711", "143000"]

Abstract:
A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.

Claim (Index 2):
The computer system of  claim 1 , wherein the cache controller is further arranged to write the memory address of a flagged cache line in the defined log upon the eviction of the cache row flagged with the image modification flag from the cache.

Metadata:
- Claim Count in Document: 24.0
- Percentile: 96.0
- Lexical Diversity: 2.22388
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15805326', '16106764', '14903833', '14903891', '16108583']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5959509935656646
- 35 USC 102 Novelty (BERT): 0.5607218142691
- Combined Prediction Score: 0.5924280756360081
- Mean Citation Score: 415.95782
- Max Citation Score: 418.52264
- Similarity Product: 415.5194288529921

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test