PATENT CLAIM ANALYSIS

Application Number: 16053665
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2020-01
Patent Classification: ["257", "344000"]

Abstract:
A structure of semiconductor device includes a gate structure, disposed on a substrate. A spacer is disposed on a sidewall of the gate structure, wherein the spacer is an l-like structure. A first doped region is disposed in the substrate at two sides of the gate structure. A second doped region is disposed in the substrate at the two sides of the gate structure, overlapping the first doped region. A silicide layer is disposed on the substrate within the second doped region, separating from the spacer by a distance. A dielectric layer covers over the second doped region and the gate structure with the spacer.

Claim (Index 9):
A method for fabricating semiconductor device, comprising:\n forming a first gate structure and a second gate structure on a substrate, wherein a gap is between the first gate structure and the second gate structure; forming a first spacer on a sidewall of the first gate structure and the second gate structure; forming a first doped region in the substrate at two sides of the first gate structure and the second gate structure; forming a second spacer on the first spacer and the substrate, wherein the second spacer comprises a liner spacer on the first spacer and an outer spacer on the liner spacer, wherein the liner spacer and the outer spacer are in different dielectric materials; forming a second doped region in the substrate at the two sides of the first gate structure and the second gate structure; forming a silicide layer on the substrate within the second doped region, abut the second spacer, wherein a portion of the second doped region under the second spacer is not covered by the silicide layer; removing the outer spacer and the liner spacer of the second spacer; and forming a dielectric layer over the second doped region and the first gate structure and the second gate structure with the first spacer, wherein the portion of the second doped region directly contacts the dielectric layer, wherein a part of the second doped region and a part of the silicide layer within the gap is a commonly shared by the first gate structure and the second gate structure, wherein a part of the dielectric layer within the gap is directly contacting and between the spacer by the  I -like structure of the first gate structure and the second gate structure.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 96.0
- Lexical Diversity: 2.80488
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13562659', '13875746', '13895376', '12706191', '12179395']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9243628874972768
- 35 USC 102 Novelty (BERT): 0.4942393924452833
- Combined Prediction Score: 0.8813505379920774
- Mean Citation Score: 249.09399
- Max Citation Score: 261.60583
- Similarity Product: 209.6523638256681

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test