PATENT CLAIM ANALYSIS

Application Number: 15897550
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["365", "185220"]

Abstract:
Apparatuses and techniques are described for reducing charge loss in a select gate transistor in a memory device. In one aspect, a dummy memory cell adjacent to a select gate transistor is weakly programmed during an erase operation by applying a program pulse to the dummy memory cell. The program pulse can be applied after an erase bias is applied to the memory cells and before an erase-verify test is performed, in one approach. The program pulse can be applied during the setup of the voltages for the erase-verify test. The magnitude of the program pulse can be increased in successive erase loops of an erase operation as the magnitude of a substrate voltage is also increased. The magnitude of the program pulse can also be set as an increasing function of a number of program-erase (P-E) cycles.

Claim (Index 4):
The apparatus of  claim 1 , wherein the erase circuit is configured to apply erase biases for the data memory cell concurrent with the application of the erase biases for the dummy memory cell, the apparatus further comprising:\n a sense circuit configured to perform an erase-verify test for the data memory cell between the application of the erase biases for the data memory cell, wherein the program bias for the dummy memory cell is applied before the erase-verify test is performed; and a voltage driver configured to increase a control gate voltage of the select gate transistor to a level used for the erase-verify test during the application of the program bias for the dummy memory cell.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 88.0
- Lexical Diversity: 2.14493
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14612561', '15816546', '14612601', '15163171', '15693982']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8225758463699353
- 35 USC 102 Novelty (BERT): 0.5051108451891179
- Combined Prediction Score: 0.7908293462518536
- Mean Citation Score: 312.745902
- Max Citation Score: 316.5821
- Similarity Product: 256.0805430213571

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test