PATENT CLAIM ANALYSIS

Application Number: 15909448
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["365", "163000"]

Abstract:
A variable resistance non-volatile semiconductor memory device comprises a memory cell having variable resistance element connected in series with a selection transistor. The selection transistor has a control terminal connected to a word line. A first end of the memory cell is connected to a bit line. A second end of the memory cell is connected to a first power supply line. An additional resistor is connected between a second power supply line and the bit line. The first power supply line is a low potential and the second power supply line is a high potential. During a reading operation of the memory cell, a read current flows through the first resistor and the memory cell.

Claim (Index 15):
The non-volatile memory device according to  claim 10 , wherein non-volatile memory device is one of a resistive random access memory (ReRAM), a phase-change random access memory (PCRAM), an interfacial phase change memory (iPCM), a conductive-bridging random access memory (CBRAM), an electrically erasable programmable read-only memory (EEPROM), a ferroelectric memory (FeRAM), or a magnetoresistive random access memory (MRAM).

Metadata:
- Claim Count in Document: 27.0
- Percentile: 90.0
- Lexical Diversity: 2.43137
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15694955', '15249845', '12926118', '15233733', '14644148']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8092385400923117
- 35 USC 102 Novelty (BERT): 0.4929791566480561
- Combined Prediction Score: 0.777612601747886
- Mean Citation Score: 211.923312
- Max Citation Score: 272.28998
- Similarity Product: 221.68702294790504

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test