PATENT CLAIM ANALYSIS

Application Number: 15915984
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["345", "213000"]

Abstract:
The present invention provides a display apparatus, including: a display panel circuit which includes a panel load line and performs a scanning display operation; and a panel driving circuit. The panel driving circuit determines at least a test phase and a scanning display phase according to a display control signal generated by a timing control circuit, wherein the test phase is a partial time period when the panel driving circuit does not perform the scanning display operation. The panel driving circuit generates a test driving signal on the panel load line, and detects an electronic characteristic of the display panel circuit so as to determine a failure item thereof during the test phase according to a pre-determined test instruction. The panel driving circuit generates a display driving signal on the panel load line for the scanning display operation according to the display control signal during the scanning display phase.

Claim (Index 6):
The display apparatus of  claim 2 , further comprising another driving stage circuit requiring protection, wherein the display panel circuit further includes another panel load line requiring protection, wherein the driving stage circuit requiring protection and the panel load line requiring protection need to avoid receiving the test driving signal; the driving stage circuit requiring protection being configured to operably generate another panel load driving signal requiring protection according to the display control signal, and the panel load driving signal requiring protection being coupled to the panel load line requiring protection to drive the display panel circuit to perform the scanning display operation;\n wherein the driving logic circuit further generates a test phase mask signal according to the phase determining signal, and the driving stage circuit requiring protection masks the display control signal during the test phase according to the test phase mask signal generated by the driving logic circuit, such that the driving stage circuit requiring protection stop generating the panel load driving signal requiring protection, whereby the display panel circuit stops the display driving operation.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 90.0
- Lexical Diversity: 2.54839
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15217060', '15916199', '14769244', '14984657', '14863193']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5743392146510764
- 35 USC 102 Novelty (BERT): 0.5864797846497685
- Combined Prediction Score: 0.5755532716509456
- Mean Citation Score: 232.18827
- Max Citation Score: 478.471
- Similarity Product: 437.105023816228

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test