PATENT CLAIM ANALYSIS

Application Number: 15879438
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-02
Patent Classification: ["257", "013000"]

Abstract:
A light emitting diode device with flip-chip structure includes a transparent protective substrate, a transparent conductor layer, a glue layer, a group III-V stack layer, a first conductivity metal electrode, a second conductivity metal electrode and an insulating layer. The transparent conductor layer is formed on the transparent protective substrate. The glue layer bonds the transparent protective substrate and the transparent conductor layer. The group III-V stack layer and the first conductivity metal electrode are respectively formed on a first portion and a second portion of the transparent conductor layer. The second conductivity metal electrode is formed on a portion of the group III-V stack layer. The insulating layer covers exposed portions of the transparent conductor layer and the group III-V stack layer, and the insulating layer further covers portions of the first and second conductivity metal electrodes, so as to expose the first and second conductivity metal electrodes.

Claim (Index 9):
A manufacturing method of a flip-chip LED device, comprising:\n providing a group III-V substrate, and forming a group III-V stack layer on the group III-V substrate; forming a transparent conductor layer on the group III-V stack layer; coating a glue layer on the transparent conductor layer, and bonding the transparent conductor layer with a transparent protective substrate; performing a separation process, so as to remove the group III-V substrate from the group III-V stack layer; flipping a stacking structure formed by the group III-V stack layer, the transparent conductor layer and the transparent protective substrate once; defining a second conductivity plat illumination region and performing a metal deposition to define a second conductivity metal electrode on the second conductivity region, then performing a reactive ion etching process to etch the group  111 -V stack layer through the transparent conductor layer within a non-protective region; defining a first conductivity metal electrode region and a first conductivity metal electrode on the first conductivity metal electrode region, and coating the first conductivity metal electrode region with a first metal to form and pad the first conductivity metal electrode on the first conductivity metal electrode region; defining a second conductivity metal electrode region on the second conductivity region, and coating the second conductivity metal electrode region with a second metal; using a physical deposition to coat the first conductivity metal electrode, the second conductivity metal electrode and the transparent conductor layer with an insulating layer, such that the insulating layer covers the first conductivity metal electrode, the second conductivity metal electrode and the transparent conductor layer; and defining the first conductivity metal electrode and the second conductivity metal electrode and performing an etching process to expose the first conductivity metal electrode and the second conductivity metal electrode.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 3.375
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['10708203', '12422027', '13369096', '12943020', '13174782']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9122806927415515
- 35 USC 102 Novelty (BERT): 0.482834638388162
- Combined Prediction Score: 0.8693360873062126
- Mean Citation Score: 190.710786
- Max Citation Score: 197.17043
- Similarity Product: 143.77681967389228

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test