PATENT CLAIM ANALYSIS

Application Number: 15886210
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "774000"]

Abstract:
A link device with a large density routing is attached to a package in order to provide a high-density interconnect pathway to interconnect semiconductor devices. In an embodiment the package is an integrated fan out package. The link device may be bonded on either side of the package, and the package may optionally comprise through package vias. The link device may also be an integrated passive device that includes resistors, inductor, and capacitor components.

Claim (Index 7):
A method of manufacturing a semiconductor device, the method comprising:\n encapsulating a first semiconductor die and a second semiconductor die with an encapsulant; forming a redistribution layer over the first semiconductor die and the second semiconductor die; placing a first linking device over the redistribution layer, wherein the first linking device is electrically connected to both the first semiconductor die and the second semiconductor die; and bonding a support substrate to the redistribution layer, wherein the support substrate is located on an opposite side of the first linking device than the redistribution layer.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 88.0
- Lexical Diversity: 1.62
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14463288', '15485616', '15200789', '15147617', '14942859']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9137648455042392
- 35 USC 102 Novelty (BERT): 0.4679101232392625
- Combined Prediction Score: 0.8691793732777414
- Mean Citation Score: 192.028754
- Max Citation Score: 210.12703
- Similarity Product: 184.6531535028815

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test