PATENT CLAIM ANALYSIS

Application Number: 16235814
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["257", "774000"]

Abstract:
The present disclosure relates to a chip including a wafer, a back-end-of-line (BEOL) layer deposited on the wafer, a chip TSV in the wafer containing a conductive material, and a chip cap layer disposed between the chip TSV and the BEOL layer, and configured to reduce via extrusion of conductive material in the chip TSV during operation of the chip. The present disclosure further includes a 3D integrated circuit including a plurality of electrically connected chips, at least one of which is a chip as described above. The disclosure further relates to a 3D integrated circuit with an interposer, a TSV in the interposer containing a conductive material, and an interposer cap layer configured to reduce via extrusion of the conductive material located in the interposer TSV during operation of the circuit. The present disclosure further includes methods of forming such chips and 3D integrated circuits.

Claim (Index 13):
A three dimensional (3D) integrated circuit comprising a plurality of electrically connected chips, at least one chip comprising\n a wafer; a back-end-of-line (BEOL) layer deposited on the wafer; a chip through-silicon-via (TSV) in the wafer, the chip TSV containing a conductive material; and a chip cap layer disposed over the chip TSV and between the chip TSV and the BEOL layer, wherein the chip cap layer is configured to reduce via extrusion of conductive material located in the chip TSV during operation of the chip.

Metadata:
- Claim Count in Document: 74.0
- Percentile: 98.0
- Lexical Diversity: 2.65
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15711241', '13194214', '14858373', '14749843', '15431099']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8984057878125269
- 35 USC 102 Novelty (BERT): 0.5427790271894803
- Combined Prediction Score: 0.8628431117502223
- Mean Citation Score: 247.147942
- Max Citation Score: 375.8693
- Similarity Product: 371.6630099370778

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test