PATENT CLAIM ANALYSIS

Application Number: 16192915
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["323", "235000"]

Abstract:
A buck converter includes a power switch having one end to which an input voltage is transferred, a synchronous switch connected between the other end of the power switch and the ground, an inductor having an end connected to the other end of the power switch, and a switch control circuit configured to calculate a zero voltage delay time based on at least an ON time of the power switch and a delay time. The delay time is determined based on the inductor and parasitic capacitors of the power switch and the synchronous switch.

Claim (Index 15):
The switch control circuit of  claim 9 , wherein the zero voltage delay calculation unit comprises:\n a multiplier multiplying the proportional constant, the detection voltage peak, and the delay time; a divider dividing an output of the multiplier by a comparison voltage, the comparison voltage corresponding to an output voltage generated by the inductor current; and an adder adding the delay time to an output of the divider to calculate the zero voltage delay time.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 98.0
- Lexical Diversity: 2.25
- Patent Class: 323.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15196678', '15196409', '12461979', '15008611', '11142859']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7744365196334957
- 35 USC 102 Novelty (BERT): 0.5677528566253939
- Combined Prediction Score: 0.7537681533326855
- Mean Citation Score: 327.352318
- Max Citation Score: 487.8627
- Similarity Product: 379.55816788623326

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test