PATENT CLAIM ANALYSIS

Application Number: 15873570
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["711", "141000"]

Abstract:
In response to receipt by a first coherency domain of a memory access request originating from a master in a second coherency domain and excluding from its scope a third coherency domain, coherence participants in the first coherency domain provide partial responses, and one of the coherence participants speculatively provides, to the master, data from a target memory block. The data includes a memory domain indicator indicating whether the memory block is cached, if at all, only within the first coherency domain. Based on the partial responses a combined response is generated representing a systemwide coherence response to the memory access request. In response to the combined response indicating success and the memory domain indicator indicating that a valid copy of the memory block may be cached outside the first coherence domain, the master discards the speculatively provided data and reissues the memory access request with a larger broadcast scope.

Claim (Index 1):
A method of data processing in a cache coherent data processing system including at least non-overlapping first, second, and third coherency domains employing a snoop-based coherence protocol, said method comprising:\n in response to receipt by the first coherency domain of a memory access request originating from a master in the second coherency domain and excluding from its broadcast scope the third coherency domain, coherence participants in the first coherency domain providing partial responses for the memory access request and one of the coherence participants speculatively providing, to the master, data from a memory block identified by a target memory address specified in the memory access request, wherein the data includes a memory domain indicator indicating whether the memory block identified by the target memory address is cached, if at all, only within the first coherency domain; based on the partial responses, a combined response generator generating and transmitting to the master a combined response representing a systemwide coherence response to the memory access request; and in response to the combined response indicating success and the memory domain indicator indicating that a valid copy of the memory block may be cached outside the first coherence domain, the master discarding the speculatively provided data and reissuing the memory access request with a larger broadcast scope including the third coherency domain.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 2.36765
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15873515', '15873366', '11342951', '11388001', '11388016']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6220836425318753
- 35 USC 102 Novelty (BERT): 0.5801864864398609
- Combined Prediction Score: 0.6178939269226739
- Mean Citation Score: 452.335562
- Max Citation Score: 507.7106
- Similarity Product: 432.18274354612834

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test