PATENT CLAIM ANALYSIS

Application Number: 15890665
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "072000"]

Abstract:
A pixel structure and a fabrication method thereof are provided, and the fabrication method includes steps as follows. A gate and a scan line connected to the gate electrode are formed on a substrate. An insulation layer is formed on the substrate and is patterned to form an opening corresponding to the gate electrode. A gate insulation layer is formed to cover the gate electrode and the scan line. A channel layer is formed on the gate insulation layer and is located in the opening. A first ohmic contact layer and a second ohmic contact layer are formed on the channel layer and are located in the opening. A source electrode, a drain electrode and a data line connected to the source electrode are formed on the first ohmic contact layer and the second ohmic contact layer. A first electrode is formed and is electrically connected to the drain electrode.

Claim (Index 3):
The fabrication method for a pixel structure according to  claim 1 , wherein the source electrode and a part of the drain electrode are formed in the opening, and the other part of the drain electrode extends from the opening to a surface of the insulation layer.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 88.0
- Lexical Diversity: 3.40426
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15275564', '15423587', '10604980', '14221262', '14016207']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9180980813930328
- 35 USC 102 Novelty (BERT): 0.5535330140050265
- Combined Prediction Score: 0.8816415746542322
- Mean Citation Score: 299.6635720000001
- Max Citation Score: 403.08292
- Similarity Product: 331.12937666750906

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test