PATENT CLAIM ANALYSIS

Application Number: 15980759
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["438", "114000"]

Abstract:
An integrated circuit process includes the following steps. A substrate including a first area and a second area is provided. A plurality of line patterns cover the substrate of the first area, and a sacrificial line pattern covers the substrate of the second area, wherein these line patterns separate from and are orthogonal to the sacrificial line pattern. The present invention also provides an integrated circuit formed by said process. A substrate includes a first area and a second area; a plurality of line patterns cover the substrate of the first area; a slot pattern is in the substrate of the second area, wherein these line patterns are orthogonal to the slot pattern. Additionally, a plurality of line patterns cover the substrate; a sacrificial line pattern is at ends of the line patterns, wherein these line patterns separate from and are orthogonal to the sacrificial line pattern.

Claim (Index 7):
The integrated circuit according to  claim 5 , wherein the sacrificial line pattern has a minimum size larger than a minimum size of the line patterns.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 93.0
- Lexical Diversity: 3.22
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13674965', '12014958', '15621618', '14810621', '15623862']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8478748984513113
- 35 USC 102 Novelty (BERT): 0.5113490371644583
- Combined Prediction Score: 0.814222312322626
- Mean Citation Score: 149.399646
- Max Citation Score: 160.06624
- Similarity Product: 82.410393151474

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test