PATENT CLAIM ANALYSIS

Application Number: 16166858
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-05
Patent Classification: ["341", "155000"]

Abstract:
A sampling circuit comprises a switch circuit and a gate bootstrapping circuit. The switch circuit includes a switch input to receive an input voltage, a gate input, and a switch output. The gate bootstrapping circuit provides a boosted clock signal to the gate input of the switch circuit. The boosted voltage of the boosted clock signal tracks the input voltage by a voltage offset. The gate bootstrapping circuit includes a single boost capacitance coupled between a first circuit node and a second circuit node. A high supply voltage is applied to the first circuit node and the input voltage is applied the second circuit node to generate the boosted voltage on the single boost capacitance.

Claim (Index 7):
The sampling circuit of  claim 5 , including a second transistor coupled between the second circuit node and a low supply voltage, wherein the second transistor applies a low supply voltage to the second circuit node according to the enable signal and the unboosted clock signal.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 97.0
- Lexical Diversity: 2.92857
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12249512', '12925916', '12784781', '10402080', '13180399']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6144405606073925
- 35 USC 102 Novelty (BERT): 0.5026286546550912
- Combined Prediction Score: 0.6032593700121625
- Mean Citation Score: 212.522686
- Max Citation Score: 230.1048
- Similarity Product: 162.63159532470704

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test