PATENT CLAIM ANALYSIS

Application Number: 16105305
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["714", "755000"]

Abstract:
A memory device includes a memory array that includes a buffer data. The memory device also includes a memory controller. The memory controller includes an error correction code (ECC) component. The memory controller further receives a status command and an indication related to the quality of the data to analyze with the ECC component. Based on a status value, the memory controller utilizes one of a plurality of error correction techniques via the ECC component to correct an error (e.g., soft state, calibration, etc.).

Claim (Index 18):
The device of  claim 14 , wherein the memory controller is configured to read no error correction data as the selective reading of error correction data associated with the data when the second read request type has been initiated.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 96.0
- Lexical Diversity: 2.0
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15583678', '14657878', '13001300', '14285848', '13114049']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3762231608588357
- 35 USC 102 Novelty (BERT): 0.5065068732523166
- Combined Prediction Score: 0.3892515320981838
- Mean Citation Score: 201.119252
- Max Citation Score: 283.78867
- Similarity Product: 186.8710208428246

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test