PATENT CLAIM ANALYSIS

Application Number: 16185921
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["326", "008000"]

Abstract:
A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

Claim (Index 21):
The method for generating a bitstring for a physically unclonable function according to  claim 9 , wherein the linear transformation subtracts a mean computed from a distribution of a regeneration phase and divides by a range also computed from the distribution of the regeneration phase.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 98.0
- Lexical Diversity: 1.34615
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14913454', '15534116', '15109747', '16051427', '14907423']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7156486978312692
- 35 USC 102 Novelty (BERT): 0.5867177846774507
- Combined Prediction Score: 0.7027556065158873
- Mean Citation Score: 343.219078
- Max Citation Score: 532.3981
- Similarity Product: 415.7800142324209

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test