PATENT CLAIM ANALYSIS

Application Number: 15766085
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-04
Patent Classification: ["341", "157000"]

Abstract:
The present application discloses an analog-to-digital conversion (ADC) circuit. The circuit includes an integral circuit including an operational amplifier and an integral capacitor. The circuit further includes a comparator and a timer. The operational amplifier includes a positive input terminal configured to receive a first voltage, a negative input terminal coupled to a signal-collection line configured to collect an analog current signal, and an output terminal configured to output a first output signal. The comparator is configured to compare the first output signal with a second voltage to generate a second output signal to the timer. The timer is configured to start a timing operation when the operational amplifier receives the analog current signal and end the timing operation when the second output signal changes. A binary data resulted from the timing operation characterizes a digital signal corresponding to the analog current signal.

Claim (Index 11):
The ADC circuit of  claim 1 , further comprising a register coupled to the timer and configured to store the binary data resulted from the timing operation and to send the binary data to an external processor, the binary data being positively correlated to the analog current signal.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 91.0
- Lexical Diversity: 2.48387
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['11938795', '14693740', '13688203', '12277465', '11421174']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5973172201852669
- 35 USC 102 Novelty (BERT): 0.4935312060210352
- Combined Prediction Score: 0.5869386187688437
- Mean Citation Score: 198.768292
- Max Citation Score: 203.41335
- Similarity Product: 141.9039308786541

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test