PATENT CLAIM ANALYSIS

Application Number: 16002459
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["257", "336000"]

Abstract:
A Field-Effect Transistor (FET) with a negative capacitance layer to increase power density provides a negative capacitor connected in series with a conventional positive capacitor. The dimensions of the negative capacitor are controlled to allow the difference in capacitances between the negative capacitor and the positive capacitor to approach zero, which in turn provides a large total capacitance. The large total capacitance provides for increased power density.

Claim (Index 1):
A Field-Effect Transistor (FET), comprising:\n a substrate including a source region, a drain region, and a channel region between the source region and the drain region; a source over and coupled to the source region; a drain over and coupled to the drain region; and a gate stack over the channel region, the gate stack comprising:\n a gate; \n a gate electrode having a first length between a first spacer and a second spacer; \n a negative capacitance layer below the gate electrode, the negative capacitance layer having a second length less than the first length; and \n an insulation layer below the negative capacitance layer and over the channel region.

Metadata:
- Claim Count in Document: 28.0
- Percentile: 94.0
- Lexical Diversity: 1.69767
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14614884', '12592011', '15454099', '15789325', '15241707']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.915705728913958
- 35 USC 102 Novelty (BERT): 0.4905006511723703
- Combined Prediction Score: 0.873185221139799
- Mean Citation Score: 216.876972
- Max Citation Score: 229.97093
- Similarity Product: 171.13161626618032

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test