PATENT CLAIM ANALYSIS

Application Number: 15913546
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-10
Patent Classification: ["438", "778000"]

Abstract:
At least one embodiment relates to a method for integrating Si 1-x Ge x  structures with Si 1-x′ Ge x′  structures in a semiconductor device. The method includes providing a device that includes a plurality of Si 1-x Ge x  structures, where 0≤x<1. The method also includes depositing a layer of GeO 2  on a subset of the Si 1-x Ge x  structures. Further, the method includes heating at least the subset of Si 1-x Ge x  structures at a temperature high enough and for a time long enough to transform the subset of Si 1-x Ge x  structures into a subset of Si 1-x′ Ge x′  structures with x′>x.

Claim (Index 12):
The semiconductor device according to  claim 11 , wherein the longitudinal Si 1-x Ge x  structure or the longitudinal Si 1-x\u2032 Ge x\u2032  structure have at least one dimension equal to or smaller than 25 nm, equal to or smaller than 15 nm, or equal to or smaller than 10 nm.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 90.0
- Lexical Diversity: 2.26415
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15205535', '15667305', '14934111', '10299880', '10756840']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.87058591296608
- 35 USC 102 Novelty (BERT): 0.4942400700019065
- Combined Prediction Score: 0.8329513286696627
- Mean Citation Score: 209.47837
- Max Citation Score: 216.65662000000003
- Similarity Product: 152.17397280249597

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test