PATENT CLAIM ANALYSIS

Application Number: 16032817
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["711", "103000"]

Abstract:
A flash-based accelerator configured to be connected to a host including a CPU and a system memory is provided. A plurality of processors execute a plurality of kernels offloaded from the host. A memory system includes a first memory that is used to map a data section of each kernel to the flash memory. A supervisor processor maps a region of the first memory pointed by a data section of a first kernel to a region of the flash memory to allow first data to move between the region of the first memory and the region of the flash memory, based on a first message which is transferred in accordance with execution of the first kernel by a first processor among the plurality of processors. A network integrates the flash backbone, the memory system, the plurality of processors, and the supervisor processor.

Claim (Index 18):
The flash-based accelerator of  claim 17 , wherein the read data move between the flash memory and the first memory without assistance of an operating system (OS) of the host.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 95.0
- Lexical Diversity: 2.60345
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14885741', '15861740', '15861219', '11321870', '14986980']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5323605918222603
- 35 USC 102 Novelty (BERT): 0.4875301130091811
- Combined Prediction Score: 0.5278775439409523
- Mean Citation Score: 174.00090999999995
- Max Citation Score: 177.76097
- Similarity Product: 117.5990067691493

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test