PATENT CLAIM ANALYSIS

Application Number: 15914833
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-10
Patent Classification: ["341", "143000"]

Abstract:
A multibit flash quantizer circuit, such as included as a portion of delta-sigma conversion circuit, can be operated in a dynamic or configurable manner. Information indicative of at least one of an ADC input slew rate or a prior quantizer output code can be used to establish a flash quantizer conversion window. Within the selected conversion window, comparators in the quantizer circuit can be made active. Comparators outside the conversion window can be made dormant, such as depowered or biased to save power. An output from such dormant converters can be preloaded and latched. In this manner, full resolution is available without requiring that all comparator circuits within the quantizer remain active at all times.

Claim (Index 8):
The reduced power ADC circuit of  claim 1 , wherein each of the comparator circuits includes:\n a dynamic latch comparator circuit; a multiplexer circuit coupled to an output of the dynamic latch comparator; and one of a latch or flip-flop coupled to an output of the multiplexer, wherein the dynamic latch comparator circuit and the multiplexer circuit are configured to receive the power control signal, and wherein, upon receiving the power control signal to cause the comparator circuit to enter the reduced power state, the output of the latch or flip-flop is latched to a fixed output state.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 1.7027
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12924785', '15389297', '14211233', '12579113', '10635826']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5754685155843523
- 35 USC 102 Novelty (BERT): 0.5110301152932233
- Combined Prediction Score: 0.5690246755552394
- Mean Citation Score: 228.349002
- Max Citation Score: 235.90631
- Similarity Product: 166.77462881904842

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test