PATENT CLAIM ANALYSIS

Application Number: 16100425
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["438", "149000"]

Abstract:
Field effect transistors and methods of forming the same include forming a stack of nanosheets of alternating layers of channel material and sacrificial material. A layer of sacrificial material forms a top layer of the stack. A dummy gate is formed over the stack. Stack material outside of a region covered by the dummy gate is removed. The sacrificial material is etched to form recesses in the sacrificial material layers. Spacers are formed in the recesses in the sacrificial material layers. At least one pair of spacers is formed in recesses above an uppermost layer of channel material. The dummy gates are etched away. The top layer of sacrificial material protects an uppermost layer of channel material from damage from the anisotropic etch. The sacrificial material is etched away to expose the layers of channel material. A gate stack is formed over, around, and between the layers of channel material.

Claim (Index 10):
The method of  claim 1 , further comprising forming lateral dummy gates on each side of the dummy gate.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 96.0
- Lexical Diversity: 2.67213
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15007920', '15045759', '16042388', '15493441', '15819708']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9057130164363012
- 35 USC 102 Novelty (BERT): 0.5888953748431188
- Combined Prediction Score: 0.874031252276983
- Mean Citation Score: 447.186544
- Max Citation Score: 511.81525
- Similarity Product: 445.2863169573098

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test