PATENT CLAIM ANALYSIS

Application Number: 16113243
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "737000"]

Abstract:
A semiconductor die, which includes a first semiconductor device, a first passivation layer, and a first interconnect bump, is disclosed. The first passivation layer is over the first semiconductor device, which includes a first group of device fingers. The first interconnect bump is thermally and electrically connected to each of the first group of device fingers. Additionally, the first interconnect bump protrudes through a first opening in the first passivation layer.

Claim (Index 16):
The semiconductor die of  claim 12  further comprising a second under bump metallization layer, wherein the first under bump metallization layer is on the interconnect layer, the second under bump metallization layer is on the first under bump metallization layer, and the interconnect bump is on the second under bump metallization layer.

Metadata:
- Claim Count in Document: 25.0
- Percentile: 96.0
- Lexical Diversity: 2.45455
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14863942', '11951729', '12858602', '12941683', '13546726']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9094424465895946
- 35 USC 102 Novelty (BERT): 0.4604477154968767
- Combined Prediction Score: 0.8645429734803228
- Mean Citation Score: 162.732394
- Max Citation Score: 167.42616
- Similarity Product: 136.9978625919628

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test