PATENT CLAIM ANALYSIS

Application Number: 16021295
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-11
Patent Classification: ["257", "314000"]

Abstract:
A three-dimensional semiconductor device includes an upper structure on a lower structure, the upper structure including conductive patterns, a semiconductor pattern connected to the lower structure through the upper structure, and an insulating spacer between the semiconductor pattern and the upper structure, a bottom surface of the insulating spacer being positioned at a vertical level equivalent to or higher than an uppermost surface of the lower structure.

Claim (Index 45):
The device as claimed in  claim 44 , wherein the semiconductor substrate includes:\n a doped region apart from the semiconductor pattern, the doped region having a different conductivity type from the semiconductor pattern; and a connection region directly connected to the semiconductor pattern, the connection region having the same conductivity type as the semiconductor pattern.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 94.0
- Lexical Diversity: 1.89474
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14657849', '15392521', '13290425', '13604665', '14621568']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9337854130984088
- 35 USC 102 Novelty (BERT): 0.5275198071173541
- Combined Prediction Score: 0.8931588525003032
- Mean Citation Score: 300.433394
- Max Citation Score: 350.53302
- Similarity Product: 280.5621436799991

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test