PATENT CLAIM ANALYSIS

Application Number: 15914009
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["711", "005000"]

Abstract:
According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.

Claim (Index 7):
The memory system of  claim 1 , wherein.\n the controller is configured, when receiving a first command to request a maximum block number from the host, to notify the host of the maximum block number indicative of number of the plurality of blocks, and when receiving a second command to request a block size from the host, to notify the host of the block size of each of the plurality of blocks.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 90.0
- Lexical Diversity: 2.3913
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15913987', '15914027', '15914051', '15700376', '15446796']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5740558329862806
- 35 USC 102 Novelty (BERT): 0.5324842625307603
- Combined Prediction Score: 0.5698986759407286
- Mean Citation Score: 284.201212
- Max Citation Score: 369.88147
- Similarity Product: 265.851358556394

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test