PATENT CLAIM ANALYSIS

Application Number: 15946991
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["345", "213000"]

Abstract:
The plurality of stages of circuit blocks of a driver circuit in a display device include a first transistor and a second transistor. The first transistor is connected at its gate with a first node and controls conductivity between a scanning signal line and a first clock signal line applied with a first clock signal. The first node is at an active potential when at least any one signal of signals output from one stage in each of a forward direction and a reverse direction is at the active potential. The second transistor is connected at its gate with the first node and controls conductivity between the first clock signal line and an input signal line of another stage of circuit block.

Claim (Index 2):
The driver circuit according to  claim 1  further comprising\n a fourth transistor, wherein \n the fourth transistor connects the constant voltage line and the first node of the next stage.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 91.0
- Lexical Diversity: 2.47059
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15097414', '14094962', '14615410', '11734407', '13644685']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6277986657057095
- 35 USC 102 Novelty (BERT): 0.5495953661426235
- Combined Prediction Score: 0.619978335749401
- Mean Citation Score: 293.813532
- Max Citation Score: 402.82214
- Similarity Product: 317.5564249355507

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test