PATENT CLAIM ANALYSIS

Application Number: 15947856
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-02
Patent Classification: ["257", "734000"]

Abstract:
The present invention discloses a semiconductor structure with capacitor landing pad and a method for fabricating a capacitor landing pad. The semiconductor structure with capacitor landing pad includes a substrate having a plurality of contact structures, a first dielectric layer disposed on the substrate and the contact structures, and a plurality of capacitor landing pads, each of the capacitor landing pads being located in the first dielectric layer and electrically connected to the contact structure, wherein the capacitor landing pads presents a shape of a wide top and a narrow bottom and a top surface of the capacitor landing pads have a concave shape.

Claim (Index 11):
The semiconductor structure with capacitor landing pad according to  claim 9 , further comprising a second dielectric layer disposed on the first dielectric layer and the capacitor landing pads, wherein a recess is formed in the second dielectric layer to expose the capacitor landing pads, and an exposed top surface of the capacitor landing pads are recessed greater in amplitude than a unexposed top surface of the capacitor landing pads.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 91.0
- Lexical Diversity: 2.29167
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15604684', '13010297', '11424518', '14255365', '15854465']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9170905497092946
- 35 USC 102 Novelty (BERT): 0.4886778708799336
- Combined Prediction Score: 0.8742492818263585
- Mean Citation Score: 219.803752
- Max Citation Score: 232.6689
- Similarity Product: 178.5822663492322

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test