PATENT CLAIM ANALYSIS

Application Number: 16277124
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-09
Patent Classification: ["710", "313000"]

Abstract:
A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.

Claim (Index 37):
The USB compatible power supply device of  claim 33 , wherein the register values are further to program a third reference voltage and a fourth reference voltage, wherein the programmable reference generator is to generate the third reference voltage and the fourth reference voltage in response to the register values, wherein the CPU comprises a third input to receive a third system interrupt and a fourth input to receive a fourth system interrupt, wherein the power control analog subsystem further comprises:\n a current sense amplifier (CSA) to output a third output voltage and a fourth output voltage; a third comparator coupled to receive the third reference voltage from the programmable reference generator and to receive the third output voltage from the CSA, wherein the third comparator is configured to output the third system interrupt to the CPU based on a third voltage condition; and a fourth comparator coupled to receive the fourth reference voltage from the programmable reference generator and to receive the fourth output voltage from the CSA, wherein the fourth comparator is configured to output the fourth system interrupt to the CPU based on a fourth voltage condition.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 99.0
- Lexical Diversity: 2.48485
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15848412', '15924689', '15280729', '15873248', '14042268']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.690920095169805
- 35 USC 102 Novelty (BERT): 0.5153935724044746
- Combined Prediction Score: 0.673367442893272
- Mean Citation Score: 216.155504
- Max Citation Score: 333.4268
- Similarity Product: 301.1941226184129

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test