PATENT CLAIM ANALYSIS

Application Number: 16109714
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2020-01
Patent Classification: ["257", "348000"]

Abstract:
A method for fabricating semiconductor device includes the steps of: providing a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer; forming a metal-oxide semiconductor (MOS) transistor on the substrate; forming an interlayer dielectric layer (ILD) on the MOS transistor; removing part of the ILD layer to form a first trench to expose the insulating layer; and performing a wet etching process through the first trench to remove part of the insulating layer for forming a first air gap under the MOS transistor.

Claim (Index 12):
The semiconductor device of  claim 11 , wherein the first air gap is under the source/drain region and the gate structure.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 96.0
- Lexical Diversity: 2.18
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15888072', '15893715', '15172161', '15643488', '15859775']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9223534323689015
- 35 USC 102 Novelty (BERT): 0.5099026436990866
- Combined Prediction Score: 0.8811083535019201
- Mean Citation Score: 211.602578
- Max Citation Score: 239.88094
- Similarity Product: 145.93006350130796

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test