PATENT CLAIM ANALYSIS

Application Number: 15966032
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["438", "637000"]

Abstract:
Methods of forming an interconnect of an IC are disclosed. The methods include forming a first interlayer dielectric (ILD) layer and a second ILD layer with an ILD etch stop layer (ESL) therebetween. The ILD ESL has an etch rate that is at least five times slower than the first and second ILD layers, and may include, for example, aluminum oxynitride. A dual damascene (DD) hard mask is used to form a wire trench opening in the second ILD layer and a via opening in the first ILD layer, creating a via-wire opening. Due to the slower etch rate, the ILD ESL defines the via opening in the first ILD layer as a chamferless via opening. A unitary via-wire conductive structure coupled to the conductive structure in the via-wire opening can be formed from the via-wire opening.

Claim (Index 2):
The method of  claim 1 , wherein the forming the first ILD layer includes forming the first ILD layer over an interconnect layer, the interconnect layer including a conductive structure therein under an interconnect layer etch stop layer (ESL); and\n wherein the forming the unitary via-wire conductive structure includes:\n forming a dual damascene (DD) hard mask over the second ILD layer, \n etching a preliminary via opening through the second ILD layer to the ILD ESL using the DD hard mask, \n removing the ILD ESL at a bottom of the preliminary via opening, creating a via ESL opening through the ILD ESL, \n etching to form a wire trench opening in the second ILD layer and a via opening in the first ILD layer, creating a via-wire opening, wherein the via ESL opening in the ILD ESL defines the via opening in the first ILD layer as the chamferless via opening, and \n depositing a barrier liner over the via-wire opening, depositing a conductor in the via-wire opening and planarizing to form the unitary via-wire conductive structure coupled to the conductive structure.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 91.0
- Lexical Diversity: 2.10959
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15912975', '10379757', '10963268', '14540367', '10246061']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8838969398494653
- 35 USC 102 Novelty (BERT): 0.5311227408497439
- Combined Prediction Score: 0.8486195199494931
- Mean Citation Score: 286.899104
- Max Citation Score: 356.33475
- Similarity Product: 256.6815839291811

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test