PATENT CLAIM ANALYSIS

Application Number: 16055405
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-11
Patent Classification: ["257", "298000"]

Abstract:
Representative methods of manufacturing memory devices include forming a transistor with a gate disposed over a workpiece, and forming an erase gate with a tip portion extending towards the workpiece. The transistor includes a source region and a drain region disposed in the workpiece proximate the gate. The erase gate is coupled to the gate of the transistor.

Claim (Index 15):
A method of manufacturing a memory device, the method comprising:\n forming a tip recess in a first region in a substrate using a first etch process; forming a first isolation region and a second isolation region in the substrate using a second etch process, the substrate having a second region and a third region, the second region being interposed between the first isolation region and the second isolation region, the third region being on an opposing side of the second isolation region from the first isolation region; forming a first plate of a first capacitor in the tip recess; forming a first plate of a second capacitor in the third region; forming source/drain regions of a transistor in the second region; forming an insulating layer over the first plate of the first capacitor, the source/drain regions, and the first plate of the second capacitor; and forming a semiconductor layer over the insulating layer over the first plate of the first capacitor, the source/drain regions, and the first plate of the second capacitor, wherein the semiconductor layer is a second plate of the first capacitor, a gate of the transistor, and a second plate of the second capacitor.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 96.0
- Lexical Diversity: 1.77143
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15242193', '13715641', '14599791', '14017022', '12822992']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8902285942193346
- 35 USC 102 Novelty (BERT): 0.4858306279925684
- Combined Prediction Score: 0.849788797596658
- Mean Citation Score: 166.29520399999996
- Max Citation Score: 210.7589
- Similarity Product: 168.1971548097253

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test