PATENT CLAIM ANALYSIS

Application Number: 15863704
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-08
Patent Classification: ["257", "330000"]

Abstract:
A semiconductor device includes a semiconductor substrate, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, a gate insulating film, and a gate electrode. The semiconductor device further includes, in a region of the first semiconductor layer across or adjacent to a p-n junction therein that does not overlap the second semiconductor region in a plan view except lateral edges thereof, a lifetime killer region having lifetime killers implanted therein.

Claim (Index 2):
The semiconductor device according to  claim 1 ,\n wherein said face of said region of the second semiconductor layer that is sandwiched between the first semiconductor layer and the first semiconductor region is a horizontal surface that is flush with a top surface of the first semiconductor layer, and wherein said p-n junction is defined by an interface between the first semiconductor layer and the second semiconductor layer.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 86.0
- Lexical Diversity: 2.32609
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15846040', '15800870', '15692690', '15397677', '15609487']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.933995949102334
- 35 USC 102 Novelty (BERT): 0.5032466390862234
- Combined Prediction Score: 0.8909210181007229
- Mean Citation Score: 277.945936
- Max Citation Score: 287.13644
- Similarity Product: 239.1701596305704

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test