PATENT CLAIM ANALYSIS

Application Number: 15908006
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-02
Patent Classification: ["257", "314000"]

Abstract:
According to one embodiment, a method for manufacturing a semiconductor device includes forming a first metal material inside the first holes; forming a plurality of metal layers on the first region, the metal layers being stacked with an insulator interposed, the metal layers including a plurality of terrace portions arranged in a staircase configuration with a level difference; forming a second insulating layer on the first insulating layer and on the terrace portions; simultaneously forming a second hole and a plurality of third holes piercing the second insulating layer, the second hole reaching the first metal material, the third holes reaching the terrace portions; and forming a second metal material inside the second hole and inside the third holes.

Claim (Index 7):
A method for manufacturing a semiconductor device, comprising:\n forming a transistor in a second region of a substrate, the substrate including a first region, the second region, and a third region, the second region being at a periphery of the first region, the third region being at a periphery of the second region, the transistor including an active region and a gate electrode; forming a first insulating layer on the second region and on the third region, the first insulating layer covering the transistor; forming a plurality of first holes and a first trench piercing the first insulating layer, the first holes reaching the active region and the gate electrode, the first trench reaching at least a surface of the substrate in the third region; forming a first metal material inside the first holes; forming a second metal material inside the first trench; forming a plurality of metal layers on the first region, the metal layers being stacked with an insulator interposed, the metal layers including a plurality of terrace portions arranged in a staircase configuration with a level difference; forming a second insulating layer on the first insulating layer and on the terrace portions; simultaneously forming a second hole, a second trench, and third holes piercing the second insulating layer, the second hole reaching the first metal material, the second trench reaching the second metal material, the third holes reaching the terrace portions; and forming a third metal material inside the second hole, inside the second trench, and inside the third holes.

Metadata:
- Claim Count in Document: 31.0
- Percentile: 88.0
- Lexical Diversity: 2.58
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15455674', '15667977', '15862665', '15410909', '15462395']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.909897004484382
- 35 USC 102 Novelty (BERT): 0.4762396693374058
- Combined Prediction Score: 0.8665312709696844
- Mean Citation Score: 174.223018
- Max Citation Score: 191.26266
- Similarity Product: 146.53050565378192

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test