PATENT CLAIM ANALYSIS

Application Number: 15940320
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["257", "536000"]

Abstract:
An array substrate includes a display region and a non-display region arranged adjacent to the display region. A plurality of signal connection lines is arranged at the non-display region, and each signal connection line is configured to connect a signal source and a signal line at the display region. At least one signal connection line includes a main line portion and at least one resistance adjustment portion connected in parallel to the main line portion.

Claim (Index 1):
An array substrate, comprising a display region and a non-display region arranged adjacent to the display region, wherein a plurality of signal connection lines is arranged at the non-display region, the signal connection line is configured to connect a signal source and a signal line at the display region, and at least one signal connection line comprises a main line portion and at least one resistance adjustment portion connected in parallel to the main line portion.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 90.0
- Lexical Diversity: 2.07895
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14433792', '14100501', '15315021', '15196517', '15147498']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8996881803946967
- 35 USC 102 Novelty (BERT): 0.468704647087193
- Combined Prediction Score: 0.8565898270639463
- Mean Citation Score: 115.314574
- Max Citation Score: 118.432816
- Similarity Product: 81.64574295764159

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test