PATENT CLAIM ANALYSIS

Application Number: 15910360
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "738000"]

Abstract:
A package structure and a method for fabricating thereof are provided. The package structure includes a substrate, a first connector, a redistribution layer, a second connector, and a chip. The first connector is disposed over the substrate. The redistribution layer is directly disposed over the first connector, and is connected to the substrate by the first connector. The redistribution layer includes a block layer, and a metal layer over the block layer. The second connector is directly disposed over the redistribution layer, and the chip is connected to the redistribution layer by the second connector.

Claim (Index 20):
The semiconductor device package of  claim 11 , wherein the openings of the dielectric material comprise at least one of lines, vias, holes, or trenches.

Metadata:
- Claim Count in Document: 48.0
- Percentile: 90.0
- Lexical Diversity: 3.375
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14731380', '14814524', '14731382', '15396817', '14745473']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9198651339634196
- 35 USC 102 Novelty (BERT): 0.5275726019360333
- Combined Prediction Score: 0.8806358807606809
- Mean Citation Score: 228.011048
- Max Citation Score: 326.79114
- Similarity Product: 214.2371265676403

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test