PATENT CLAIM ANALYSIS

Application Number: 16029366
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-05
Patent Classification: ["327", "116000"]

Abstract:
A system for correcting a duty cycle comprises a digital quadrature generator circuit, a frequency doubler circuit, a first duty cycle correction circuit coupled between the digital quadrature generator circuit and the frequency doubler circuit, and a second duty cycle correction circuit coupled between the digital quadrature generator circuit and the frequency doubler circuit. The first duty cycle correction circuit comprises a first stacked duty cycle correction circuit and the second duty cycle correction circuit comprises a second stacked duty cycle correction circuit.

Claim (Index 20):
The apparatus of  claim 19 , wherein the first frequency waveshaper circuit comprises:\n a voltage controlled oscillator (VCO) circuit configured to receive an oscillator current; an exclusive-OR (XOR) circuit coupled to the VCO circuit and configured to receive a drive current; and an inductor-capacitor (LC) tank circuit coupled to each of the VCO circuit and the XOR circuit, wherein the VCO circuit is configured to generate the first clock signal at an oscillation frequency, and wherein the oscillation frequency is the first frequency.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 95.0
- Lexical Diversity: 3.52
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14207751', '15389830', '10384262', '12786496', '12901313']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7756542770981757
- 35 USC 102 Novelty (BERT): 0.5164454475573738
- Combined Prediction Score: 0.7497333941440956
- Mean Citation Score: 267.762854
- Max Citation Score: 276.68668
- Similarity Product: 177.18526621129757

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test