PATENT CLAIM ANALYSIS

Application Number: 16042607
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["331", "008000"]

Abstract:
The present disclosure relates to a phase-locked loop (PLL) including a frequency detector, a sub-sampling phase detector (SSPD), and a voltage-controlled oscillator (VCO). The frequency detector is configured to receive a reference signal and an output signal, and to generate a coarse-tuning voltage that indicates a frequency difference between the reference signal and the output signal. The SSPD is configured to sub-sample the output signal using the reference signal, and to generate a fine-tuning voltage that indicates a phase difference between the reference signal and the output signal. The VCO is configured to update the output signal based on the coarse-tuning voltage and the fine-tuning voltage.

Claim (Index 13):
The PLL of  claim 1  wherein the controlled slope buffer is a current-starved delay stage including a current source, a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a third PMOS transistor, a NMOS transistor, and a buffer capacitor, wherein:\n the current source is coupled between a drain of the first PMOS transistor and ground; \n sources of the first PMOS transistor and the second PMOS transistor are coupled to a supply voltage, and gates of the first PMOS transistor and the second PMOS transistor are coupled together; \n a drain of the second PMOS transistor is coupled to a source of the third PMOS transistor; \n gates of the third PMOS transistor and the NMOS transistor are coupled together and configured to receive the divided signal; \n drains of the third PMOS transistor and the NMOS transistor are coupled together and configured to provide the buffered divided signal; \n a source of the NMOS transistor is coupled to ground; and \n the buffer capacitor is coupled between the drain of the NMOS and ground.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 95.0
- Lexical Diversity: 2.72727
- Patent Class: 331.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12824982', '13406228', '14057276', '15234743', '12219452']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7859721121369994
- 35 USC 102 Novelty (BERT): 0.5020463794670921
- Combined Prediction Score: 0.7575795388700086
- Mean Citation Score: 231.908976
- Max Citation Score: 235.40901
- Similarity Product: 156.26193334831777

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test