PATENT CLAIM ANALYSIS

Application Number: 16166762
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["257", "401000"]

Abstract:
An exemplary semiconductor device includes first spacers disposed along sidewalls of a first gate structure and second spacers disposed along sidewalls of a second gate structure. A source/drain region is disposed between the first gate structure and the second gate structure. A first ILD layer is disposed between the first spacers and the second spacers. A portion of the first ILD layer has a first recessed upper surface. A dielectric layer is disposed over the first spacers, the second spacers, and the first recessed upper surface of the first ILD layer. A portion of the dielectric layer has a second recessed upper surface that is disposed over the portion of the first ILD layer having the first recessed upper surface. A second ILD layer is disposed over the dielectric layer. A contact extends through the second ILD layer, the dielectric layer, and the first ILD layer to the source/drain region.

Claim (Index 15):
The semiconductor device  13 , wherein a material of the dielectric layer is different than a material of the first interlevel dielectric layer and a material of the second interlevel dielectric layer.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 97.0
- Lexical Diversity: 4.15385
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15445481', '14739233', '14832530', '15364488', '15153249']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9223396402303674
- 35 USC 102 Novelty (BERT): 0.4818222421843638
- Combined Prediction Score: 0.8782879004257671
- Mean Citation Score: 194.69188
- Max Citation Score: 199.36269
- Similarity Product: 151.1451204742831

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test