PATENT CLAIM ANALYSIS

Application Number: 15987169
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-12
Patent Classification: ["257", "401000"]

Abstract:
A semiconductor device and a manufacturing method thereof according to the present invention include: a first pad electrode formed in an uppermost wiring layer of a multilayer wiring layer; a first insulating film formed on the first pad electrode; and a first organic insulating film formed over the first insulating film. Also, the semiconductor device and the manufacturing method thereof include: a barrier metal film formed on the first organic insulating film and connected to the first pad electrode; and a conductive film formed on the barrier metal film. Then, a second insulating film made of an inorganic material is formed on an upper surface of the first organic insulating film between the barrier metal film and the first organic insulating film.

Claim (Index 14):
A manufacturing method of a semiconductor device, comprising the steps of:\n (a) preparing a semiconductor substrate, a multilayer wiring layer formed over the semiconductor substrate, a first pad electrode formed in an uppermost wiring layer of the multilayer wiring layer, and a first insulating film formed to cover the first pad electrode and made of an inorganic material; (b) forming a first organic insulating film over the first insulating film; (c) forming a first opening reaching the first pad electrode in the first organic insulating film; (d) forming a second insulating film made of an inorganic material over the first organic insulating film and in the first opening; (e) forming a first resist pattern over the second insulating film; (f) performing an etching process with using the first resist pattern as a mask, thereby selectively removing the second insulating film located on the first pad electrode; (g) after the step (f), selectively removing the first insulating film located on the first pad electrode; (h) after the step (g), forming a first barrier metal film connected to the first pad electrode, over the second insulating film and in the first opening; (i) forming a second resist pattern over the first barrier metal film; and (j) forming a first conductive film by a plating method over the first barrier metal film in a region exposed from the second resist pattern.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 93.0
- Lexical Diversity: 2.75
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14891319', '15259502', '14594063', '12605327', '15072148']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9199796361500824
- 35 USC 102 Novelty (BERT): 0.5099561374209629
- Combined Prediction Score: 0.8789772862771703
- Mean Citation Score: 258.127488
- Max Citation Score: 309.71808
- Similarity Product: 258.85607373550414

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test