PATENT CLAIM ANALYSIS

Application Number: 16004086
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["257", "758000"]

Abstract:
Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over a target layer, forming a plurality of spacers over the first mask layer, and forming a second mask layer over the plurality of spacers and patterning the second mask layer to form a first opening, where in a plan view a major axis of the opening extends in a direction that is perpendicular to a major axis of a spacer of the plurality of spacers. The method also includes depositing a sacrificial material in the opening, patterning the sacrificial material, etching the first mask layer using the plurality of spacers and the patterned sacrificial material, etching the target layer using the etched first mask layer to form second openings in the target layer, and filling the second openings in the target layer with a conductive material.

Claim (Index 10):
A method, comprising:\n forming a first cap layer over a second cap layer, the second cap layer being over a first mask layer, the first mask layer being over a dielectric layer; patterning a first opening in the first cap layer, the first opening having a target width; filling the first opening with a first material to form a masking element; forming a second mask layer over the first cap layer, and patterning the second mask layer to form a first mask, the first mask comprising a plurality of second openings; etching the first cap layer and the second cap layer using the first mask and the masking element, wherein the masking element prevents a portion of the second cap layer from being etched; patterning the first mask layer through the second cap layer to form a second mask; patterning the dielectric layer through the second mask, the patterning of the dielectric layer exposing a conductive feature underlying the dielectric layer; and forming a conductive line in the dielectric layer, the conductive line contacting the conductive feature.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 94.0
- Lexical Diversity: 2.92453
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15641009', '14935792', '15483100', '10849152', '14869610']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9146081903123144
- 35 USC 102 Novelty (BERT): 0.4624597423850259
- Combined Prediction Score: 0.8693933455195856
- Mean Citation Score: 175.79794199999995
- Max Citation Score: 188.37012
- Similarity Product: 159.88643647893903

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test