PATENT CLAIM ANALYSIS

Application Number: 15876430
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["712", "208000"]

Abstract:
An apparatus and method of operating a data processing apparatus are provided. The data processing circuitry is responsive to a hint instruction to then assert at least one performance modifying control signal, when subsequently generating control signals for other data processing instructions. This causes the data processing functional hardware which performs the data processing operations defined by the data processing instructions to operate in a modified manner, although the data processing results produced do not change in dependence on whether the at least one performance modifying control signal is asserted.

Claim (Index 13):
The apparatus as claimed in  claim 12 , wherein entries of the content addressable memory storage further comprise an indication of a thread identifier, wherein the decoding circuitry further requires the indication of the thread identifier to match a current thread to assert the at least one associated performance modifying control signal.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 86.0
- Lexical Diversity: 1.58333
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15642556', '10784672', '12585573', '10784835', '10784846']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6077303572111518
- 35 USC 102 Novelty (BERT): 0.4737016428853213
- Combined Prediction Score: 0.5943274857785688
- Mean Citation Score: 172.51583799999997
- Max Citation Score: 179.3257
- Similarity Product: 132.80815199548604

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test