PATENT CLAIM ANALYSIS

Application Number: 16069927
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "077000"]

Abstract:
A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate that includes a foundation layer; forming a deep trench in the foundation layer; and filling the deep trench with a deep layer having a second conductive type and a limiting layer having the first conductive type. In the filling the deep trench, growth of the deep layer from a bottom of the deep trench toward an opening inlet of the deep trench and growth of the limiting layer from a side face of the deep trench are achieved by: dominant epitaxial growth of a second conductive type layer over a first conductive type layer on the bottom of the deep trench; and dominant epitaxial growth of the first conductive type layer over the second conductive type layer on the side face of the deep trench, based on plane orientation dependency of the compound semiconductor during epitaxial growth.

Claim (Index 8):
The method for manufacturing the compound semiconductor device according to  claim 1 , the method further comprising:\n providing the semiconductor substrate that is formed of a compound semiconductor, and includes a rear face layer disposed on a rear face side of the semiconductor substrate and a drift layer disposed on a front face side of the semiconductor substrate, the drift layer having the first conductive type and an impurity concentration lower than the rear face layer, and corresponding to the foundation layer; forming a base area on the drift layer, the base area being formed of a compound semiconductor; forming a source area above the base area, the source area being formed of a compound semiconductor having the first conductive type and having an impurity concentration higher than the drift layer; forming a gate trench that extends from a front face of the source area to a position deeper than the base area; forming a trench gate structure by forming a gate insulation film on an inner wall surface of the gate trench and forming a gate electrode on the gate insulation film; forming a source electrode that is electrically connected to the source area; and forming a drain electrode that is electrically connected to the rear face layer disposed on the rear face side of the semiconductor substrate, wherein the filling the deep trench includes forming the deep trench in the drift layer and filling the deep trench with the deep layer and the limiting layer.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 95.0
- Lexical Diversity: 2.89091
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16069914', '16069622', '16070061', '14894668', '15570841']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9269257958076396
- 35 USC 102 Novelty (BERT): 0.5509355071187756
- Combined Prediction Score: 0.8893267669387533
- Mean Citation Score: 328.5816660000001
- Max Citation Score: 415.10687
- Similarity Product: 376.04115746041776

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test