PATENT CLAIM ANALYSIS

Application Number: 15896173
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "324000"]

Abstract:
According to one embodiment, a semiconductor device includes a substrate; a stacked body provided on the substrate, the stacked body including a plurality of electrode layers stacked with an insulator interposed; a semiconductor body provided in the stacked body; and an insulating film. The semiconductor body includes a channel portion extending in a stacking direction of the stacked body, and a lower end portion of the semiconductor body provided between the channel portion and the substrate. The insulating film includes a charge storage film provided between the stacked body and the semiconductor body. A lower end portion of the insulating film surrounds the lower end portion of the semiconductor body. An upper surface of the lower end portion of the insulating film is provided at a lower height than an upper surface of the lower end portion of the semiconductor body in the stacking direction.

Claim (Index 1):
A method for manufacturing a semiconductor device, comprising:\n forming a stacked body on a foundation member, the stacked body including the plurality of first layers stacked with an insulator interposed; forming a hole, the hole piercing the stacked body and reaching the foundation member; forming a semiconductor pillar on the foundation member exposed in the hole; forming an insulating film on an upper surface of the semiconductor pillar and on a side surface of the hole, the insulating film including a charge storage film; forming a first semiconductor portion on the insulating film; forming a recess portion reaching the semiconductor pillar by removing a bottom portion of the first semiconductor portion and a bottom portion of the insulating film; and forming a second semiconductor portion on the semiconductor pillar exposed from the recess portion, and forming a third semiconductor portion on the second semiconductor portion, an upper surface of the second semiconductor portion being formed at a height being an upper surface of a lower end portion of the insulating film or more, the lower end portion of the insulating film being formed on the upper surface of the semiconductor pillar.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 88.0
- Lexical Diversity: 3.12
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15264781', '15614144', '15059670', '15262274', '15008753']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9125809121636416
- 35 USC 102 Novelty (BERT): 0.4832321849758688
- Combined Prediction Score: 0.8696460394448643
- Mean Citation Score: 197.924422
- Max Citation Score: 209.15245
- Similarity Product: 159.41048677697182

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test