PATENT CLAIM ANALYSIS

Application Number: 15997061
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["318", "696000"]

Abstract:
A direction setting pin DIR receives a direction signal ROT that indicates the rotational direction of the stepping motor. A clock pin CLK receives a clock signal CLK that indicates the rotational direction of the stepping motor. A logic circuit generates a first internal signal and a second internal signal that respectively indicate the states of the first H-bridge circuit and the second H-bridge circuit according to the direction signal ROT and the clock signal CLK. When the clock signal CLK remains in a predetermined state for a predetermined judgment time, the logic circuit transits to a predetermined mode.

Claim (Index 2):
The driving circuit according to  claim 1 , wherein the predetermined mode is a high-impedance mode,\n and wherein, in the high-impedance mode, the first internal signal and the second internal signal are generated such that an output of the first H-bridge circuit and an output of the second H-bridge circuit are each set to a high-impedance state.

Metadata:
- Claim Count in Document: 25.0
- Percentile: 94.0
- Lexical Diversity: 2.4186
- Patent Class: 318.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14535660', '14887850', '12063697', '12439643', '10971097']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.68234404636497
- 35 USC 102 Novelty (BERT): 0.4957313501270539
- Combined Prediction Score: 0.6636827767411785
- Mean Citation Score: 187.523956
- Max Citation Score: 206.96408
- Similarity Product: 135.81901791407586

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test