PATENT CLAIM ANALYSIS

Application Number: 15892593
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-05
Patent Classification: ["257", "401000"]

Abstract:
A method of forming a semiconductor device includes forming a gate structure over first and second fins over a substrate; forming an interlayer dielectric layer surrounding first and second fins; etching a first trench in the interlayer dielectric layer between the first and second fins uncovered by the gate structure; forming a helmet layer in the first trench; and filling the first trench with a dielectric feature.

Claim (Index 23):
The semiconductor device of  claim 18 , further comprising:\n an isolation structure between the first and second fins, wherein the gate structures and the dielectric feature are over the isolation structure.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 88.0
- Lexical Diversity: 2.11765
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15827709', '15706456', '15864525', '15130370', '14511412']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9118384226780112
- 35 USC 102 Novelty (BERT): 0.4738907127148017
- Combined Prediction Score: 0.8680436516816902
- Mean Citation Score: 184.644846
- Max Citation Score: 206.73743
- Similarity Product: 169.9842838169348

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test