PATENT CLAIM ANALYSIS

Application Number: 16107650
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["365", "163000"]

Abstract:
A semiconductor memory apparatus may include a memory cell, a write driver, and a voltage adjustment circuit. The write driver may provide the memory cell with a program current based on a write data. The voltage adjustment circuit may adjust a voltage level of a global word line coupled to the memory cell when a current flowing through the memory cell or the voltage level of the global word line is greater than a threshold value.

Claim (Index 16):
The operating method of  claim 12 , wherein adjusting the voltage level of the global bit line includes decreasing the voltage level of the global bit line when the snapback of the memory cell occurs.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 96.0
- Lexical Diversity: 1.92857
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15471207', '15483326', '16014306', '15486516', '14616806']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8179242253777183
- 35 USC 102 Novelty (BERT): 0.5320955756646495
- Combined Prediction Score: 0.7893413604064113
- Mean Citation Score: 263.107046
- Max Citation Score: 386.1424
- Similarity Product: 268.38463905277246

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test