PATENT CLAIM ANALYSIS

Application Number: 15882847
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-09
Patent Classification: ["711", "103000"]

Abstract:
A memory access command, column address and plurality of write data values are received within an integrated-circuit memory chip via external signaling links. In response to the memory access command, the integrated-circuit memory chip (i) decodes the column address to select address-specified sense amplifiers from among a plurality of sense amplifiers that constitute a sense amplifier bank, (ii) reads first data, constituted by a plurality of read data values, out of the address-specified sense amplifiers, and (iii) overwrites the first data within the address-specified sense amplifiers with second data constituted by one or more of the write data values and by one or more of the read data values.

Claim (Index 25):
The integrated-circuit memory chip of  claim 24  wherein the core access circuitry to generate the second data comprises multiplexing circuitry to select between the plurality of read data values and the plurality of write data values according to respective states of the plurality of control values.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 86.0
- Lexical Diversity: 2.15789
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15497126', '14637369', '12709422', '15669538', '11194812']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5103220207281435
- 35 USC 102 Novelty (BERT): 0.5310213835841489
- Combined Prediction Score: 0.5123919570137441
- Mean Citation Score: 231.81877000000003
- Max Citation Score: 347.371
- Similarity Product: 290.994677619338

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test