PATENT CLAIM ANALYSIS

Application Number: 16117361
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-02
Patent Classification: ["327", "105000"]

Abstract:
A nested mixed-radix DDSM can guarantee zero systematic frequency error when used as a divider controller in a fractional-N frequency synthesizer is described. This disclosure presents a nested cascaded mixed-radix DDSM architecture which can also guarantee zero systematic frequency error. In addition, the disclosure allows one to use higher order auxiliary modulators and shaped dither signal to eliminate feedthrough spurs completely. By increasing the number of levels in the cascade, the moduli of the individual modulator stages can be reduced, thereby increasing the speed of the synthesizer.

Claim (Index 18):
A modulator system for use in a fractional-N frequency synthesizer, said modulator system comprising:\n a divider controller having a main n th  order modulator and an auxiliary n th  order modulator, wherein a noise shaping of the auxiliary n th  order modulator is the same order as a noise shaping of the main n th  order modulator, and wherein n is an integer value greater than one.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 96.0
- Lexical Diversity: 1.49206
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['16041648', '13715529', '14326816', '10638529', '14952138']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7892585880995101
- 35 USC 102 Novelty (BERT): 0.5380694991142125
- Combined Prediction Score: 0.7641396792009804
- Mean Citation Score: 300.979962
- Max Citation Score: 399.98755
- Similarity Product: 319.95168441284903

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test