PATENT CLAIM ANALYSIS

Application Number: 15948849
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["365", "145000"]

Abstract:
A semiconductor memory device includes: a first bit line; a second bit line connected to the first bit line via a first switch; a charge transfer section including: a first holding section connected to the second bit line, the first holding section being configured to hold a readout voltage from a memory section that stores data, and a second holding section connected to the first bit line, the second holding section being configured to hold a voltage generated due to transfer of charges between the first holding section and the second holding section, the charge transfer section being configured to transfer charges between the first holding section and the second holding section via the first bit line; and a comparison section configured to compare a voltage held in the second holding section with a reference voltage.

Claim (Index 7):
The semiconductor memory device according to  claim 1 , wherein the memory section includes a ferroelectric capacitor.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 91.0
- Lexical Diversity: 3.24444
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10753212', '11862225', '12475628', '11999240', '11405931']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.816279888267004
- 35 USC 102 Novelty (BERT): 0.4781164996079912
- Combined Prediction Score: 0.7824635494011027
- Mean Citation Score: 218.92161600000003
- Max Citation Score: 241.0095
- Similarity Product: 204.0358692575097

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test