PATENT CLAIM ANALYSIS

Application Number: 16056268
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-11
Patent Classification: ["326", "041000"]

Abstract:
The camouflage technique described herein introduces programmed configuration inputs to Micro Netlists, creating Programmable Micro Netlists (PMNLs). PMNLs are a group of camouflaged and non-camouflaged cells that may be configured to perform one of several possible logic functions. They retain all the protective properties of non-programmable MNLs, but also allow for secure post-manufacture configuration of their aggregate logic function.

Claim (Index 12):
A method of fabricating an application specific integrated circuit (ASIC), comprising:\n defining core logic having a first plurality of interconnected functional logic cells that perform one or more ASIC logical functions including a subset of the first plurality of interconnected functional logic cells for performing a programmable micro-netlist (PMNL) function; defining a PMNL for performing the PMNL function, the PMNL comprising:\n a second plurality of interconnected functional logic cells that together comprise logical inputs and a programming input to configure the PMNL to perform the PMNL function, the programming input communicatively coupleable to a non-volatile memory to receive configuration programming data from the non-volatile memory to configure the PMNL to perform the PMNL function; \n substituting the PMNL for the subset of the first plurality of interconnected functional logic cells for performing the PMNL function; wherein at least one of the first plurality of functional logic cells and the second plurality of logic cells comprise:\n an uncamouflaged functional logic cell performing a first functional logic cell function and having a first physical layout; and \n a camouflaged functional logic cell performing a second functional logic cell function and having a second physical layout substantially indistinguishable from the first physical layout; and \n wherein the combined first plurality of interconnected functional logic cells, the PMNL, and the configuration programming data perform one or more ASIC logical functions.

Metadata:
- Claim Count in Document: 56.0
- Percentile: 96.0
- Lexical Diversity: 1.22222
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15675418', '12578441', '14985270', '13789267', '15373334']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7255793520206171
- 35 USC 102 Novelty (BERT): 0.5086460942329231
- Combined Prediction Score: 0.7038860262418477
- Mean Citation Score: 321.6402080000001
- Max Citation Score: 339.0762
- Similarity Product: 268.753101687026

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test