PATENT CLAIM ANALYSIS

Application Number: 15952885
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["257", "040000"]

Abstract:
An organic light emitting display device includes a substrate. A buffer layer is disposed on the substrate. The buffer layer includes a first opening exposing an upper surface of the substrate in a bending region. Pixel structures are positioned in a pixel region on the buffer layer. A fan-out wiring is positioned in the peripheral region and the pad region on the insulation layer structure such that the upper surface of the substrate and the first portion of the buffer layer are exposed. A passivation layer is disposed on the fan-out wiring, side walls of the insulation layer structure adjacent to the bending region, and the first portion of the buffer layer. The passivation layer includes a third opening exposing the upper surface of the substrate in the bending region. A connection electrode is positioned in the bending region on the substrate.

Claim (Index 22):
A method of manufacturing an OLED device, the method comprising:\n providing a substrate comprising a display region including a pixel region and a peripheral region surrounding the pixel region, a pad region that is spaced apart from the display region, and a bending region that is positioned between the display region and the pad region; forming a buffer layer on the substrate; forming a semiconductor element and an insulation layer structure above the buffer layer such that a first opening exposing an upper surface of the substrate that is positioned in the bending region and a second opening exposing a first portion of the buffer layer that is positioned adjacent to the bending region are formed; forming a fan-out wiring in the peripheral region and the pad region that are positioned adjacent to the bending region on the insulation layer structure such that the upper surface of the substrate that is positioned in the bending region and the first portion of the buffer layer are exposed; forming a passivation layer on the fan-out wiring, side walls of the insulation layer structure that is positioned adjacent to the bending region, and the first portion of the buffer layer such that a third opening exposing the upper surface of the substrate that is positioned in the bending region is formed; forming a connection electrode in the bending region above the substrate such that the connection electrode is in direct contact with the fan-out wiring; and forming pixel structures above the semiconductor element.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 91.0
- Lexical Diversity: 2.86792
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15662512', '15392305', '15257147', '15678640', '15410352']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9071085625851616
- 35 USC 102 Novelty (BERT): 0.5048370966629561
- Combined Prediction Score: 0.8668814159929411
- Mean Citation Score: 253.995832
- Max Citation Score: 264.8816
- Similarity Product: 205.9491472740173

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test