PATENT CLAIM ANALYSIS

Application Number: 16108888
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-01
Patent Classification: ["717", "149000"]

Abstract:
A compiler system, method and computer program product for optimizing a program is disclosed. The compiler includes an extractor module configured to extract, from an initial program code, a hierarchical task representation wherein each node of the hierarchical task representation corresponds to a potential unit of execution. The root node of the hierarchical task representation represents the entire initial program code and each child node represents a sub-set of units of execution of its respective parent node. It further has a parallelizer module configured to apply to the hierarchical task representation pre-defined parallelization rules associated with the processing device to automatically adjust the hierarchical task representation by assigning particular units of execution to particular processing units of the processing device and by inserting communication and/or synchronization in that the adjusted hierarchical task representation reflects parallel program code for the processing device.

Claim (Index 15):
A computer program product comprising instructions that when loaded into a memory of a computing device and executed by at least one processor of the computing device cause the computing device carry out operations including:\n receiving an initial program code, the initial program code implementing an algorithm wherein the algorithm is to be executed by the processing device ( 190 ); extracting, from the initial program code, a hierarchical task representation wherein each node of the hierarchical task representation corresponds to a potential unit of execution, wherein the root node of the hierarchical task representation represents the initial program code and each child node represents a sub-set of units of execution of its respective parent node; applying, to the hierarchical task representation a plurality of pre-defined parallelization rules associated with the processing device to automatically adjust the hierarchical task representation by assigning units of execution to one or more processing units of the processing device and by inserting communication tasks or synchronization tasks such that the adjusted hierarchical task representation reflects parallel program code for communicating or synchronizing between two or more of the processing units corresponding to the processing device; generating a visual representation of the adjusted hierarchical task representation, wherein each node of at least a subset of nodes is represented by a user interface object and the user interface objects are arranged according to the respective parent-child relationships; receiving, for one or more interactive user interface objects, one or more user defined parallelization parameters modifying the arrangement of the interactive user interface objects of the scheduling view, wherein at least one interactive user interface object has a task length property representing an execution time interval of the corresponding unit of execution on a particular processing unit of the processing device; re-applying the pre-defined parallelization rules with the one or more user defined parallelization parameters to automatically generate a modified parallel program code for the processing device adjusted to the user defined parallelization parameters; and deploying the modified parallel program code to the processing device.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 96.0
- Lexical Diversity: 2.0274
- Patent Class: 717.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13669837', '11607196', '12475835', '15059907', '12475803']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3675762674272075
- 35 USC 102 Novelty (BERT): 0.4935513863256297
- Combined Prediction Score: 0.3801737793170497
- Mean Citation Score: 172.98799
- Max Citation Score: 180.13213000000005
- Similarity Product: 125.69884879448657

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test