PATENT CLAIM ANALYSIS

Application Number: 15946281
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["257", "192000"]

Abstract:
Device structures for a field-effect transistor and methods of forming a device structure for a field-effect transistor. A channel region is formed that includes first and second semiconductor layers, and a gate structure is formed that is arranged over the first and second semiconductor layers. First and second source/drain regions are formed in which the second source/drain region is separated from the first source/drain region by the channel region. The first semiconductor layer is composed of a semiconductor material having a first carrier mobility, and the second semiconductor layer is composed of a semiconductor material having a second carrier mobility that is greater than the first carrier mobility of the first semiconductor layer.

Claim (Index 3):
The device structure of  claim 1  wherein the first semiconductor layer is a first section of a device layer of the silicon-on-insulator substrate, and the second semiconductor layer is a second section of the device layer that is modified to provide the second semiconductor material.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 91.0
- Lexical Diversity: 2.53191
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15060067', '14522649', '13962322', '10892467', '14496285']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.90993915212595
- 35 USC 102 Novelty (BERT): 0.4996584917071898
- Combined Prediction Score: 0.868911086084074
- Mean Citation Score: 210.894452
- Max Citation Score: 232.90918
- Similarity Product: 175.7277069150376

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test