PATENT CLAIM ANALYSIS

Application Number: 15997907
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["257", "194000"]

Abstract:
The present invention provides an epitaxial structure of N-face group III nitride, its active device, and the method for fabricating the same. By using a fluorine-ion structure in device design, a 2DEG in the epitaxial structure of N-face group III nitride below the fluorine-ion structure will be depleted. Then the 2DEG is located at a junction between a i-GaN channel layer and a i-Al y GaN layer, and thus fabricating GaN enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs), hybrid Schottky barrier diodes (SBDs), or hybrid devices. After the fabrication step for polarity inversion, namely, generating stress in a passivation dielectric layer, the 2DEG will be raised from the junction between the i-GaN channel layer and the i-Al y GaN layer to the junction between the i-GaN channel layer and the i-Al x GaN layer.

Claim (Index 10):
A hybrid enhancement-mode N-face AlGaN/GaN high electron mobility transistor with polarity inversion, characterized in:\n an epitaxial structure of N-face AlGaN/GaN, divided into a left region and a right region, and comprising:\n a silicon substrate; \n a C-doped buffer layer, located on said silicon substrate; \n a C-doped GaN layer, located on said C-doped buffer layer; \n an i-Al y GaN layer, located on said C-doped GaN layer; \n an i-GaN channel layer, located on said i-Al y GaN layer; and \n an i-Al x GaN layer, located on said i-GaN channel layer; \n an enhancement-mode N-face AlGaN/GaN high electron mobility transistor with polarity inversion of GaN and gate moat structure, located in said left region, including said fluorine-ion structure, the two-dimensional electron gas below said fluorine-ion structure being depleted, depositing a passivation dielectric layer with larger compressive stress (dielectric constant n\u02dc1.45) or with larger expansive stress (dielectric constant n\u02dc2.0) and with thickness greater than 200 nanometers, and inverting said i-Al x GaN layer/said i-GaN channel layer/said i-Al y GaN layer in the active region of said epitaxial layer from the N-face polarity to the Ga-face polarity for raising said two-dimensional electron gas from the junction of said i-GaN channel layer/said i-Al y GaN layer to the junction of said i-GaN channel layer/said i-Al x GaN layer; and a depletion-mode N-face AlGaN/GaN high electron mobility transistor with polarity inversion of GaN and gate dielectric layer, located in said right region, and including a second gate dielectric layer.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 94.0
- Lexical Diversity: 1.96104
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15622286', '13723753', '11564780', '13019150', '14108642']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9185542964793628
- 35 USC 102 Novelty (BERT): 0.5967612908477782
- Combined Prediction Score: 0.8863749959162044
- Mean Citation Score: 394.413404
- Max Citation Score: 512.5436
- Similarity Product: 460.32748388450136

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test