PATENT CLAIM ANALYSIS

Application Number: 16012715
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["365", "230060"]

Abstract:
Examples described herein include command latency shifters which may include a plurality of registers arranged in a folded topology.

Claim (Index 3):
The apparatus of  claim 2 , wherein the shifter further comprises a second multiplexer, the second multiplexer comprising a third input end, a fourth input end, and a second output end, and the second multiplexer being inserted between the first register and the second register such that the third input end of the second multiplexer is coupled to the input node of the first register, the fourth input end of the second multiplexer is coupled to the output node of the first register and the second output end of the second multiplexer is coupled to the first input end of the first multiplexer.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 94.0
- Lexical Diversity: 1.11111
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['11594807', '15063229', '12585428', '14698550', '11896788']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7847480253183257
- 35 USC 102 Novelty (BERT): 0.4715830797491875
- Combined Prediction Score: 0.7534315307614118
- Mean Citation Score: 158.75661200000005
- Max Citation Score: 165.16328
- Similarity Product: 114.53618360765932

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test