PATENT CLAIM ANALYSIS

Application Number: 15989802
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["257", "401000"]

Abstract:
A method for forming the semiconductor device that includes forming a gate opening to a channel region of a fin structure; and forming a dielectric layer on the fin structure, in which an upper portion of the fin structure is exposed. A metal is formed within the gate opening. The portions of the metal directly contacting the upper surface of fin structure provide a body contact. The combination of the metal within the gate opening to the channel region of the fin structure and the dielectric layer provide a functional gate structure to the semiconductor device.

Claim (Index 15):
A semiconductor device comprising:\n a fin structure having a channel region portion; and a gate structure is present on the channel region portion including a dielectric layer and a gate electrode, wherein an upper portion of the channel region portion of the fin structure at which the dielectric layer is not present is in direct contact with the gate electrode to provide the body contact to the semiconductor device.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 93.0
- Lexical Diversity: 2.26667
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15182995', '14184229', '15342477', '15250166', '15715593']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.93176349270076
- 35 USC 102 Novelty (BERT): 0.5217074152198827
- Combined Prediction Score: 0.8907578849526722
- Mean Citation Score: 334.956038
- Max Citation Score: 336.47302
- Similarity Product: 244.31353036875728

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test