PATENT CLAIM ANALYSIS

Application Number: 15876176
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "347000"]

Abstract:
A method for forming a semiconductor device is provided. In this method, a stop layer is formed on a semiconductor substrate. A semiconductor fin is formed on the stop layer. Two cells adjacent to each other are formed on the semiconductor fin. A gate conductor is formed on a top of the semiconductor fin at a common boundary that is shared by the two cells. A gate spacer is formed to peripherally enclose the gate conductor. The gate conductor and the semiconductor fin are etched to form a gap extending from the top of the semiconductor fin to the stop layer, thereby dividing the semiconductor fin into two portions of the semiconductor fin. The gap is filled with a dielectric filler.

Claim (Index 20):
The method of  claim 17 , wherein etching the first gate conductor, the third gate conductor and their corresponding portions of the semiconductor fin divides each of the corresponding portions of the semiconductor fin into two portions of the semiconductor fin that are spaced at a distance substantially in a range from 5 nm to 50 nm.

Metadata:
- Claim Count in Document: 25.0
- Percentile: 86.0
- Lexical Diversity: 2.33929
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14939310', '15297105', '15414413', '14935115', '14883445']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9234261327227384
- 35 USC 102 Novelty (BERT): 0.4919459294930137
- Combined Prediction Score: 0.8802781123997659
- Mean Citation Score: 215.35042600000003
- Max Citation Score: 247.34978
- Similarity Product: 200.3390952058077

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test