PATENT CLAIM ANALYSIS

Application Number: 16067865
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "088000"]

Abstract:
Display integration schemes are described for passivating LEDs and providing conductive terminal connections. In accordance with embodiments, a sidewall passivation layer is formed around the LEDs. The sidewall passivation layer may or may not be contained within a well structure. A top electrode layer is formed to electrically connect the LEDs to conductive terminal routing.

Claim (Index 11):
A display comprising:\n an array of pads, and a corresponding array of LEDs bonded to the array of pads; an array of conductive terminal pads, and a corresponding array of conductive terminal studs on the conductive terminal pads; a sidewall passivation layer around each of the LEDs in the array of LEDs; and an electrode layer on and in electrical contact with the array of LEDs and the array of conductive terminal studs.

Metadata:
- Claim Count in Document: 33.0
- Percentile: 95.0
- Lexical Diversity: 1.39535
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['16077185', '15426947', '14864570', '13710443', '13842793']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9184666936491436
- 35 USC 102 Novelty (BERT): 0.5174013905116917
- Combined Prediction Score: 0.8783601633353983
- Mean Citation Score: 244.199056
- Max Citation Score: 315.55258
- Similarity Product: 225.63722087619303

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test