PATENT CLAIM ANALYSIS

Application Number: 15900638
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-02
Patent Classification: ["711", "138000"]

Abstract:
A memory storage control apparatus, system, and method are described. An apparatus can include a memory controller configured to couple to a primary memory resource (PMR) and to a cache memory resource (CMR) and is configured to receive a read or write data request associated with particular data. For a read data request, the memory controller is configured to perform a lookup of a cache table mapped to the CMR for a copy of the particular data, and determine, if the lookup returns a hit and the particular data is not altered compared to the copy of the particular data, whether the CMR is saturated. For a write data request, the memory controller is configured to determine whether the CMR is saturated with data requests. In accordance with a determination that the CMR is saturated with data requests, the bypass the CMR, and send the data request to the PMR.

Claim (Index 21):
The system of  claim 18 , wherein at least one of the primary memory resource or the cache memory resource comprises write-in-place three-dimensional (3D) cross-point memory.

Metadata:
- Claim Count in Document: 33.0
- Percentile: 88.0
- Lexical Diversity: 2.70968
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13862867', '14037021', '13422365', '14582121', '15476816']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5206968053226864
- 35 USC 102 Novelty (BERT): 0.4642850341854486
- Combined Prediction Score: 0.5150556282089626
- Mean Citation Score: 142.551628
- Max Citation Score: 145.8307
- Similarity Product: 109.83492782094478

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test