PATENT CLAIM ANALYSIS

Application Number: 15869888
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "326000"]

Abstract:
A semiconductor device includes a peripheral circuit region on a substrate, a polysilicon layer on the peripheral circuit region, a memory cell array region on the polysilicon layer and overlapping the peripheral circuit region, the peripheral circuit region being under the memory cell array region, an upper interconnection layer on the memory cell array region, and a vertical contact through the memory cell array region and the polysilicon layer, the vertical contact connecting the upper interconnection layer to the peripheral circuit region.

Claim (Index 23):
The semiconductor device of  claim 22 , wherein the second vertical contact includes an interconnection contact that is not disposed through the memory cell array region and the second substrate and separated from the memory cell array region and the second substrate.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 86.0
- Lexical Diversity: 2.96667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14534352', '15018477', '11541756', '14695249', '14974567']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9127503109903772
- 35 USC 102 Novelty (BERT): 0.5189836521848278
- Combined Prediction Score: 0.8733736451098222
- Mean Citation Score: 239.10362
- Max Citation Score: 282.26797
- Similarity Product: 196.1310970456326

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test