PATENT CLAIM ANALYSIS

Application Number: 15890548
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["712", "022000"]

Abstract:
There are provided a system, a method and a computer program product for selecting an active data stream (a lane) while running SPMD (Single Program Multiple Data) code on SIMD (Single Instruction Multiple Data) machine. The machine runs an instruction stream over input data streams. The machine increments lane depth counters of all active lanes upon the thread-PC reaching a branch operation. The machine updates the lane-PC of each active lane according to targets of the branch operation. The machine selects an active lane and activates only lanes whose lane-PCs match the thread-PC. The machine decrements the lane depth counters of the selected active lanes and updates the lane-PC of each active lane upon the instruction stream reaching a first instruction. The machine assigns the lane-PC of a lane with a largest lane depth counter value to the thread-PC and activates all lanes whose lane-PCs match the thread-PC.

Claim (Index 1):
A method for selecting an active data stream while running a SPMD (Single Program Multiple Data) program of instructions on a SIMD (Single Instruction Multiple Data) machine, an instruction stream having one thread-PC (Program Counter), a value of the thread-PC indicating an instruction memory address which stores an instruction to be fetched next for the instruction stream, comprising;\n running the instruction stream over a plurality of input data streams each of which corresponds to each of a plurality of lanes, each of the plurality of lanes being associated with a corresponding lane depth counter indicating a number of nested branches for each corresponding lane, a corresponding lane-PC of a lane of the plurality of lanes indicating a memory address which stores the instruction to be fetched next for the lane when the lane is activated, and a lane activation bit indicating whether the lane is active or not; incrementing values of the lane depth counters of all active_lanes of the plurality of lanes upon the thread-PC value reaching a branch operation in the instruction stream; updating the lane-PC value of each of the active_lanes according to targets of the branch operation; and selecting at least one active lane from the plurality of lanes and assigning a corresponding lane-PC value of the selected at least one active lane to the thread-PC, and activating only lanes of the plurality of lanes whose lane-PC values are equal to the thread-PC value.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 88.0
- Lexical Diversity: 2.28169
- Patent Class: 712.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14468904', '13753113', '13753098', '13912963', '15607165']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5721710443849182
- 35 USC 102 Novelty (BERT): 0.6038162382001293
- Combined Prediction Score: 0.5753355637664392
- Mean Citation Score: 297.25796
- Max Citation Score: 523.6311599999998
- Similarity Product: 520.2410063398004

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test