PATENT CLAIM ANALYSIS

Application Number: 16154522
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["375", "326000"]

Abstract:
Embodiments of the present invention provide techniques for duty cycle correction of clock signals. An input clock signal passes through a pair of output transistors, which provides an output clock signal based on the input clock signal. A duty cycle sensor generates a first correction signal based on the output clock signal. The first correction signal is at least partially opposite of the output clock signal. A duty cycle corrector generates a second correction signal based on the first correction signal. The duty cycle corrector includes two or more transistors for generating the second correction signal. The second correction signal is applied to the output clock signal. There are other embodiments as well.

Claim (Index 4):
The device of  claim 1  wherein further comprising an input terminal for receiving the first clock signal from a clock data recovery device.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 2.25926
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15389830', '15840984', '11819414', '13957004', '15206622']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.473205168082862
- 35 USC 102 Novelty (BERT): 0.5335577565361712
- Combined Prediction Score: 0.479240426928193
- Mean Citation Score: 305.343444
- Max Citation Score: 359.87744
- Similarity Product: 341.6628608841324

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test