PATENT CLAIM ANALYSIS

Application Number: 15985272
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "737000"]

Abstract:
A method for fabricating a semiconductor structure includes forming a semiconductor chip. Forming the semiconductor chip includes providing a substrate, forming a connection layer on the substrate, and forming a first passivation layer on the substrate. The first passivation layer contains a plurality of first openings to expose the connection layer. Forming the semiconductor chip also includes forming a plurality of second openings and a plurality of third openings in the second passivation layer. Each second opening is formed in a first opening to expose the connection layer, and each third opening is formed outside of the plurality of first openings to expose the first passivation layer. Further, forming the semiconductor chip includes forming a conductive bump in each second opening.

Claim (Index 16):
The semiconductor structure according to  claim 15 , wherein:\n at least one third opening is formed in the corner regions formed by the intersected cutting tracks.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 3.11905
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13793241', '11185819', '14964869', '11026919', '14494026']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9083491461596008
- 35 USC 102 Novelty (BERT): 0.494958596092543
- Combined Prediction Score: 0.8670100911528952
- Mean Citation Score: 200.23148
- Max Citation Score: 206.88821
- Similarity Product: 150.80149767799853

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test