PATENT CLAIM ANALYSIS

Application Number: 16283391
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-06
Patent Classification: ["365", "063000"]

Abstract:
A resistive memory apparatus includes a memory cell array, a local switch, and a global switch. The memory cell array may include a plurality of resistive memory cells coupled to a plurality of connection lines. The local switch may select a target connection line coupled to a target memory cell and a preset number of connection lines adjacent to the target connection line according to a signal obtained by decoding an address. The global switch may apply a preset level of voltage to the selected adjacent connection lines according to the signal obtained by decoding the address.

Claim (Index 1):
A resistive memory apparatus comprising:\n a memory cell array including a plurality of resistive memory cells coupled to a plurality of connection lines; a plurality of connection line groups in each of which a preset number of adjacent connection lines are grouped; plurality of local switches connected to each of the plurality of connection lines; a plurality of local switch groups in each of which the local switches included in a same connection line group are grouped; a plurality of global switches in each of which coupled in common to one or more local switches selected from each of the plurality of local switch groups; a first decoder configured to generate a local switch selection signal by decoding a portion of an address; a second decoder configured to generate a global switch selection signal by decoding another portion of the address used for generating the local switch selection signal; and wherein, the local switches included in a same local switch group are driven in response to the same local switch selection signal; a plurality of global switches are driven in response to the global switch selection signal; one of the plurality of connection line groups is selected by the local switch selection signal, and a selected connection line included in a selected connection line group is configured to be biased to a preset a first level of voltage by the global switch selection signal, and unselected connection lines included in the selected connection line group is configured to be biased to a preset a second level of voltage by the global switch selection signal.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 99.0
- Lexical Diversity: 2.45238
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15818425', '12973000', '13453152', '14783248', '13753648']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.799642264237313
- 35 USC 102 Novelty (BERT): 0.4788424373353397
- Combined Prediction Score: 0.7675622815471157
- Mean Citation Score: 195.490528
- Max Citation Score: 204.15483
- Similarity Product: 149.60049917278647

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test