PATENT CLAIM ANALYSIS

Application Number: 16032085
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "668000"]

Abstract:
The present invention provides a semiconductor substrate ( 105, 105 a ) comprising two or more layers of built-up structural layers ( 120, 220 ) formed on a sacrificial carrier ( 110 ). Each built-up structural layer, comprising a conductor trace layer ( 114 a ,) and an interconnect ( 118 a,  218 a ), is molded in a resin molding compound. A top surface of the molded compound is abrasively ground and then deposited with an adhesion layer ( 123, 124, 224 ). A multi-layer substrate ( 105, 105 a ) is then obtained after an outermost conductor trace layer ( 128 a,  228 a ) is formed on the adhesion layer and the carrier ( 110 ) or reinforcing ring ( 110 b ) is removed.

Claim (Index 1):
A multi-layer semiconductor substrate comprising:\n a sacrificial carrier that is electrically conductive and chemically etchable; a first conductor trace layer formed on the sacrificial carrier; a second conductor trace layer; and a (first) interconnect layer disposed between the first and second conductor trace layers, wherein studs connect selected areas between the first and second conductor trace layers.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 95.0
- Lexical Diversity: 2.15152
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14387843', '12168280', '13047991', '12961107', '11924156']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8895412588922172
- 35 USC 102 Novelty (BERT): 0.5054409854452042
- Combined Prediction Score: 0.851131231547516
- Mean Citation Score: 158.043542
- Max Citation Score: 261.1766
- Similarity Product: 201.5929545003653

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test