PATENT CLAIM ANALYSIS

Application Number: 16132762
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-11
Patent Classification: ["365", "230060"]

Abstract:
A semiconductor memory device includes a memory structural body including first and second planes each of which includes memory cells coupled to word lines extending in a first direction and bit lines extending in a second direction and which are disposed along the first direction; and a logic structural body disposed between a substrate and the memory structural body, and including a row decoder. The row decoder includes a pass transistor circuit which is coupled in common to the first and second planes and a block switch circuit which controls the pass transistor circuit. The block switch circuit is disposed in first and second plane regions of the logic structural body which overlap with the first and second planes in a third direction perpendicular to the first and second directions, and the pass transistor circuit is disposed in an interval region between the first and second plane regions.

Claim (Index 16):
A semiconductor memory device comprising:\n a memory structural body including first and second planes each of which includes a plurality of memory cells and which are disposed along a first direction; and a logic structural body disposed between a substrate and the memory structural body, and including a row decoder which simultaneously controls the first and second planes and first and second page buffer circuits which control the first and second planes, respectively, wherein the row decoder includes a pass transistor circuit and a block switch circuit which controls the pass transistor circuit, wherein the first and second page buffer circuits overlap with the first and second planes, respectively, and are disposed to have shapes which extend in the first direction, wherein the block switch circuit includes first and second sub block switch circuits which overlap with the first and second planes, respectively, and are disposed to have shapes which extend in a second direction, and wherein the pass transistor circuit is disposed in a region between the first plane and the second plane, and includes a plurality of pass transistors which are coupled in common to the first and second planes.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 97.0
- Lexical Diversity: 2.75
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15651058', '15226941', '14817281', '13456965', '16054465']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7910406515668194
- 35 USC 102 Novelty (BERT): 0.4650158028311906
- Combined Prediction Score: 0.7584381666932565
- Mean Citation Score: 193.072524
- Max Citation Score: 204.78793
- Similarity Product: 169.03962193119884

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test