PATENT CLAIM ANALYSIS

Application Number: 16008131
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["257", "088000"]

Abstract:
An LED module includes a substrate having a high thermal conductivity and at least one LED die mounted on the substrate. A wavelength conversion material, such as phosphor or quantum dots in a binder, has a very low thermal conductivity and is formed to have a relatively high volume and low concentration over the LED die so that the phosphor or quantum dots conduct little heat from the LED die. A transparent top plate having a high thermal conductivity is positioned over the wavelength conversion material, and a hermetic seal is formed between the top plate and the substrate surrounding the wavelength conversion material. The LED die is located in a cavity in either the substrate or the top plate. In this way, the temperature of the wavelength conversion material is kept well below the temperature of the LED die. The sealing is done in a wafer level process.

Claim (Index 1):
A light emitting diode (LED) module comprising:\n a substrate having a first thermal conductivity; a plurality of LED dies electrically and thermally mounted on the substrate, wherein the LED dies are connected in parallel; a wavelength conversion material having a second thermal conductivity substantially lower than the first thermal conductivity, wherein the wavelength conversion material is molded over each LED die to encapsulate each LED die; a light transmitting top plate having a third thermal conductivity greater than the second thermal conductivity, the top plate being positioned over the wavelength conversion material and having at least one cavity; and a hermetic seal formed by a sealant material between the top plate and the substrate surrounding the plurality of LED dies and wavelength conversion material, the LED module having first flat sidewall edges around its periphery, the top plate having second flat sidewall edges around its periphery, and the substrate having third flat sidewall edges around its periphery, wherein the second flat sidewall edges and the third flat sidewall edges coincide to form the first flat sidewall edges of the LED module due to the top plate and the substrate being sealed during a wafer level process and the wafer then singulated to form the LED module, the plurality of LED dies being located in a single cavity formed in the top plate, the cavity having walls that surround all the LED dies.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 94.0
- Lexical Diversity: 2.14865
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14762576', '14782774', '15697087', '13801743', '15105120']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.911587130224018
- 35 USC 102 Novelty (BERT): 0.6086338458364201
- Combined Prediction Score: 0.8812918017852582
- Mean Citation Score: 300.67099399999995
- Max Citation Score: 528.76215
- Similarity Product: 510.9265455524863

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test