PATENT CLAIM ANALYSIS

Application Number: 15949328
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["438", "586000"]

Abstract:
A split gate device that includes a memory gate and a select gate disposed side by side, a dielectric structure having a first portion disposed between the memory gate and a substrate and a second portion disposed along an inner sidewall of the select gate to separate the select gate from the memory gate, and a spacer formed over the select gate along an inner sidewall of the memory gate. Other embodiments of embedded split gate devices including high voltage and low voltage transistors are also disclosed.

Claim (Index 24):
The split gate device of  claim 20 , wherein the spacer insulates the first silicide layer from the memory gate.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 91.0
- Lexical Diversity: 1.93617
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15730979', '13715185', '14580454', '15281010', '15473372']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8683454636286461
- 35 USC 102 Novelty (BERT): 0.4934841708756791
- Combined Prediction Score: 0.8308593343533494
- Mean Citation Score: 165.663752
- Max Citation Score: 173.0237
- Similarity Product: 117.75401870012286

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test