PATENT CLAIM ANALYSIS

Application Number: 16020856
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["365", "063000"]

Abstract:
Semiconductor memory devices and electronic systems having the semiconductor memory devices are provided. One of the semiconductor memory device may include a plurality of first conductive interconnections extending in parallel in a first horizontal direction, a plurality of selection interconnections disposed on the first conductive interconnections, the selection interconnections extending in parallel in the first horizontal direction, a plurality of second conductive interconnections extending in parallel in a second horizontal direction that is perpendicular to the first horizontal direction, and a plurality of memory cell stacks respectively disposed in interconnection regions between the first conductive interconnections and the second conductive interconnections. Each of the memory cell stacks may include a variable resistive element.

Claim (Index 8):
The electronic system of  claim 1 ,\n wherein the semiconductor memory device further comprises barrier interconnections respectively disposed between the first conductive interconnections and the selection interconnections.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 94.0
- Lexical Diversity: 2.6087
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16019346', '14736525', '14955789', '14856488', '13766593']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8129191609555834
- 35 USC 102 Novelty (BERT): 0.4774963305028468
- Combined Prediction Score: 0.7793768779103097
- Mean Citation Score: 210.090902
- Max Citation Score: 233.36247000000003
- Similarity Product: 192.92418309380832

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test