PATENT CLAIM ANALYSIS

Application Number: 16143862
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["713", "166000"]

Abstract:
Disclosed embodiments relate to a system having a processor adapted to activate multiple security levels for the system and a monitoring device coupled to the processor and employing security rules pertaining to the multiple security levels. The monitoring device restricts usage of the system if the processor activates the security levels in a sequence contrary to the security rules.

Claim (Index 16):
The computing system of  claim 15 , wherein the register includes a single non-secure (NS) bit to indicate whether the processor is operating in the secure mode or the non-secure mode.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 97.0
- Lexical Diversity: 1.90625
- Patent Class: 713.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14590192', '15280495', '11343061', '13028459', '11678219']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4422591756204477
- 35 USC 102 Novelty (BERT): 0.5370482244279686
- Combined Prediction Score: 0.4517380805011998
- Mean Citation Score: 286.868114
- Max Citation Score: 365.68643
- Similarity Product: 258.1611820572698

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test