PATENT CLAIM ANALYSIS

Application Number: 15870390
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-01
Patent Classification: ["711", "103000"]

Abstract:
A sequencer circuit is configured to generate control signals for on-die memory control circuitry. The control signals may include memory operation pulses for implementing operations on selected non-volatile memory cells embodied within the same die as the sequencer (and other on-die memory control circuitry). The timing, configuration, and/or duration of the memory control signals are defined in configuration data, which can be modified after the design and/or fabrication of the die and/or on-die memory circuitry. As such, the timing, configuration, and/or duration of the memory control signals generated by the sequencer may be manipulated after the design and/or fabrication of the die, sequencer, and other on-die memory control circuitry.

Claim (Index 10):
A system, comprising:\n a volatile memory comprising plurality of sequencer instructions, each sequencer instruction comprising timer data and signal data; a semiconductor structure comprising a plurality of non-volatile memory elements and control circuitry configured for implementing operations on selected non-volatile memory elements in response to memory control signals; and a sequencer embodied within the control circuitry of the semiconductor structure and configured to execute sequencer instructions stored within the memory, wherein, to execute a sequencer instruction pertaining to a memory operation, the sequencer is further configured to:\n load the sequencer instruction from the volatile memory; \n determine a cycle count from timer data of the loaded sequencer instruction; and \n output memory control signals in accordance with signal data of the loaded sequencer instruction for the determined cycle count, the memory control signals output by the sequencer configured implement at least a portion of the memory operation on one or more of the non-volatile memory elements within the semiconductor structure.

Metadata:
- Claim Count in Document: 37.0
- Percentile: 86.0
- Lexical Diversity: 2.15789
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10486638', '15693390', '11818449', '14729659', '13915606']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5334196878590527
- 35 USC 102 Novelty (BERT): 0.4465028120045351
- Combined Prediction Score: 0.524728000273601
- Mean Citation Score: 143.17608
- Max Citation Score: 145.96693
- Similarity Product: 121.87022038868724

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test