PATENT CLAIM ANALYSIS

Application Number: 16418502
Application Type: Utility
Filing Date: 2019-05
Publication Date: 2019-09
Patent Classification: ["711", "154000"]

Abstract:
A stacked memory includes a logic semiconductor die, a plurality of memory semiconductor dies stacked with the logic semiconductor die, a plurality of through-silicon vias (TSVs) electrically connecting the logic semiconductor die and the memory semiconductor dies, a global processor disposed in the logic semiconductor die and configured to perform a global sub process corresponding to a portion of a data process, a plurality of local processors respectively disposed in the memory semiconductor dies and configured to perform local sub processes corresponding to other portions of the data process and a plurality of memory integrated circuits respectively disposed in the memory semiconductor dies and configured to store data associated with the data process.

Claim (Index 1):
A stacked memory device, comprising:\n a logic semiconductor die; a plurality of memory semiconductor dies stacked with the logic semiconductor die; a plurality of through-silicon vias (TSVs) electrically connecting the logic semiconductor die and the memory semiconductor dies; a global processor disposed in the logic semiconductor die and configured to perform a global sub process corresponding to a portion of a data process; a plurality of local processors respectively disposed in the memory semiconductor dies and configured to perform local sub processes corresponding to other portions of the data process; and a plurality of memory integrated circuits respectively disposed in the memory semiconductor dies and configured to store data associated with the data process wherein each of the memory integrated circuits includes a sense amplifier configured to sense data to be read from each of the memory integrated circuits and the sense amplifier is distinct from the local processor.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 100.0
- Lexical Diversity: 2.66667
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15617450', '16038269', '14803119', '16185453', '15450588']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4770263293384296
- 35 USC 102 Novelty (BERT): 0.5600217344189876
- Combined Prediction Score: 0.4853258698464854
- Mean Citation Score: 269.699244
- Max Citation Score: 417.0998
- Similarity Product: 407.5489416772485

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test