PATENT CLAIM ANALYSIS

Application Number: 16027347
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["365", "148000"]

Abstract:
A matrix-vector multiplication device includes a memory crossbar array with row lines, column lines, and junctions. Each junction comprises a programmable resistive element and an access element. A signal generator is configured to apply programming signals to the resistive elements to program conductance values for the matrix-vector multiplication and a readout circuit is configured to apply read voltages to the row lines and to read out current values of the column lines. Control circuitry is configured to control the signal generator and the readout circuit and to select, via the access terminals, a plurality of resistive elements in parallel according to a predefined selection scheme which applies the signals and/or the read voltages in parallel to resistive elements which do not share the same row and column line and applies the programming signals and/or the read voltages to at most one resistive element per row line and column line.

Claim (Index 16):
A design structure tangibly embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit, the design structure comprising:\n a memcomputing device for performing a matrix-vector multiplication of a matrix with a vector, the device comprising: a memory crossbar array comprising\n a plurality of row lines; \n a plurality of column lines; \n a plurality of junctions arranged between the plurality of row lines and the plurality of column lines, wherein each junction comprises a programmable resistive element and an access element comprising an access terminal for accessing the programmable resistive element; \n a signal generator configured to\n apply programming signals to the resistive elements to program conductance values representing respective elements of the matrix to be multiplied with the vector; \n a readout circuit configured to\n apply read voltages to the row lines of the memory crossbar array, wherein the read voltages represent respective elements of the vector to be multiplied with the matrix; \n read out current values of column lines of the memory crossbar array, wherein the current values represent respective elements of a product of the matrix-vector multiplication; and \n control circuitry configured to control the signal generator and the readout circuit and to select by means of the access terminals a plurality of resistive elements in parallel according to a predefined selection scheme, wherein the predefined selection scheme is configured to\n apply the programming signals and/or the read voltages in parallel to a plurality of resistive elements which do not share the same row line nor the same column line; and \n apply the programming signals and/or the read voltages to at most one resistive element per row line and at most one resistive element per column line.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 95.0
- Lexical Diversity: 2.21127
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15685788', '15235157', '15500486', '15201040', '15723668']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7949944422070351
- 35 USC 102 Novelty (BERT): 0.5120498888505947
- Combined Prediction Score: 0.766699986871391
- Mean Citation Score: 245.29034
- Max Citation Score: 339.9351200000001
- Similarity Product: 313.17191080217367

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test