PATENT CLAIM ANALYSIS

Application Number: 15948738
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "094000"]

Abstract:
A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.

Claim (Index 1):
A light-emitting device, comprising:\n a substrate; a semiconductor stack on the substrate and comprising a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer comprises a surrounding part exposing a first surface of the first semiconductor layer; a via penetrating through the second semiconductor layer and the active layer to expose a second surface of the first semiconductor layer; a first contact layer covering the via and contacting the second surface of the first semiconductor layer; a first insulating layer or a second insulating layer comprising a first opening exposing the first semiconductor layer and a second opening exposing the second semiconductor layer; and a third insulating layer covering the first insulating layer or the second insulating layer, wherein the substrate comprises a surface exposed around the semiconductor stack and an edge side, wherein the first semiconductor layer comprises a first outside wall, wherein the second semiconductor layer comprises a second outside wall, wherein the third insulating layer covers the first outside wall of the first semiconductor layer and the second outside wall of the second semiconductor layer, and contacting the surface of the substrate exposed around the semiconductor stack, wherein the third insulating layer comprises a portion contacting the surface of the substrate, and wherein the portion of the third insulating layer comprises an edge side, and wherein the edge side of the substrate is spaced apart from the edge side of the third insulating layer.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 91.0
- Lexical Diversity: 2.9
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15858534', '15350893', '15633264', '15874398', '14554488']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9218572719449916
- 35 USC 102 Novelty (BERT): 0.4880833915563531
- Combined Prediction Score: 0.8784798839061277
- Mean Citation Score: 246.077118
- Max Citation Score: 264.40265
- Similarity Product: 236.24454793952705

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test