PATENT CLAIM ANALYSIS

Application Number: 16049849
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-02
Patent Classification: ["null", "null"]

Abstract:
Disclosed are methods of forming a semiconductor structure including a bulk semiconductor substrate and, on the substrate, a fin-type field effect transistor (FINFET) with a uniform channel length and a below-channel buried insulator. In the methods, a semiconductor fin is formed with a sacrificial semiconductor layer between lower and upper semiconductor layers. During processing, the sacrificial semiconductor layer is replaced with dielectric spacer material (i.e., a buried insulator). The buried insulator functions as an etch stop layer when etching source/drain recesses, ensuring that they have vertical sidewalls and, thereby ensuring that the channel region has a uniform length. The buried insulator also provides isolation between channel region and the substrate below and prevents dopant diffusion into the channel region from a punch-through stopper (if present). Optionally, the buried insulator is formed so as to contain an air-gap. Also disclosed are structures resulting from the methods.

Claim (Index 24):
The semiconductor structure of  claim 23 ,\n wherein the semiconductor fin has a first section with the buried insulator in a first device region and a second section without the buried insulator in a second device region, and wherein the semiconductor structure comprises:\n a first transistor with a first channel region and first source/drain regions in the first section, wherein the first channel region is above and immediately adjacent to the segment of the buried insulator, wherein the first source/drain regions are above and immediately adjacent to the punch through stopper, and wherein the first channel region and the segment of the buried insulator are positioned laterally between the source/drain regions; and \n a second transistor with a second channel region and second source/drain regions in the second section, wherein the second channel region is longer than the first channel region and wherein the second channel region and the second source/drain regions are above and immediately adjacent to the punch through stopper.

Metadata:
- Claim Count in Document: 36.0
- Percentile: 95.0
- Lexical Diversity: 1.88636
- Patent Class: nan
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15487636', '16046368', '15658835', '15632922', '15387933']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6113893659387173
- 35 USC 102 Novelty (BERT): 0.5234500574716793
- Combined Prediction Score: 0.6025954350920135
- Mean Citation Score: 335.456856
- Max Citation Score: 345.0775
- Similarity Product: 270.68049342349167

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test