PATENT CLAIM ANALYSIS

Application Number: 15761746
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["714", "764000"]

Abstract:
Memory controllers, devices, modules, systems and associated methods are disclosed. In one embodiment, a memory module includes a pin interface for coupling to a bus. The bus has a first width. The module includes at least one storage class memory (SCM) component and at least one DRAM component. The memory module operates in a first mode that utilizes all of the first width, and in a second mode that utilizes less than all of the first width.

Claim (Index 6):
The memory module of  claim 5 , wherein the steering logic further comprises bypass circuitry to route data between any one of the multiple paths coupled to the primary interface to any other of the multiple paths coupled to the primary interface.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 90.0
- Lexical Diversity: 1.81633
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15260880', '15533630', '15552569', '13977603', '15262741']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3119232688774053
- 35 USC 102 Novelty (BERT): 0.4961542425315142
- Combined Prediction Score: 0.3303463662428161
- Mean Citation Score: 183.88782
- Max Citation Score: 208.31012
- Similarity Product: 130.6395187353325

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test