PATENT CLAIM ANALYSIS

Application Number: 15917864
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-05
Patent Classification: ["361", "767000"]

Abstract:
A circuit board and a layout structure are provided. The layout structure includes a plurality of chip carrying areas, a plurality of inner layer connection pads and a plurality of outer leading wires. The chip carrying areas respectively carry a plurality of chips. The outer leading wires are disposed between the inner layer connection pads and the chip carrying areas. The layout structure is disposed on at least one circuit board and connects to a plurality of wires of the at least one circuit board through the outer leading wires, and the outer leading wires and the wires of the at least one circuit board are formed by sharing at least one metal layer.

Claim (Index 20):
The circuit board as claimed in  claim 14 , wherein the number of times that each of the outer leading wires passes through the at least one edge of the distribution range of the layout structure is not greater than 1.

Metadata:
- Claim Count in Document: 37.0
- Percentile: 90.0
- Lexical Diversity: 2.81395
- Patent Class: 361.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14749803', '12495191', '13919033', '13658006', '12657161']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8393694531390365
- 35 USC 102 Novelty (BERT): 0.4946054082331096
- Combined Prediction Score: 0.8048930486484439
- Mean Citation Score: 168.788718
- Max Citation Score: 171.72841
- Similarity Product: 101.8213633082163

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test