PATENT CLAIM ANALYSIS

Application Number: 15917369
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "295000"]

Abstract:
A ferroelectric memory device may include a semiconductor substrate, a plurality of ferroelectric layers, a source, a drain and a gate. The semiconductor substrate may have a recess. The ferroelectric layers may be formed in the recess. The source may be arranged at a first side of the recess. The drain may be arranged at a second side of the recess opposite to the first side. The gate may be arranged on the ferroelectric layers. The ferroelectric layers may be polarized by different electric fields.

Claim (Index 11):
The method of  claim 10 ,\n wherein the first ferroelectric pattern is polarized at a first level of electric field, wherein the second ferroelectric pattern is polarized at a second level of electric field, and wherein the second level of electric field is different from the first level of electric field.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 2.5
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15183232', '10776394', '15246081', '14812245', '11384689']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9061386035766812
- 35 USC 102 Novelty (BERT): 0.4973618188986446
- Combined Prediction Score: 0.8652609251088775
- Mean Citation Score: 194.85802
- Max Citation Score: 248.39906
- Similarity Product: 207.0175116232597

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test