PATENT CLAIM ANALYSIS

Application Number: 15780840
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["363", "095000"]

Abstract:
Power converter circuitry includes a direct current (DC) input comprising a first DC input node and a second DC input node, an alternating current (AC) output comprising a first AC output node coupled to the first DC input node and a second AC output node, a first boost switch coupled between the second DC input node and a boost intermediate node, a second boost switch coupled between the boost intermediate node and a common node, a boost inductor coupled between the boost intermediate node and the first DC input node, a link capacitor coupled between the second DC input node and the common node, a first half-bridge switch coupled between the second DC input node and a half-bridge intermediate node, a second half-bridge switch coupled between the half-bridge intermediate node and the common node, and a half-bridge inductor coupled between the half-bridge intermediate node and the second AC output node.

Claim (Index 3):
The power converter circuitry of  claim 2  wherein the control circuitry is configured to track a maximum power point of an output of the DC device.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 94.0
- Lexical Diversity: 4.79412
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14214896', '15479885', '14467251', '15364133', '12080274']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8518639882374849
- 35 USC 102 Novelty (BERT): 0.5088070458837419
- Combined Prediction Score: 0.8175582940021107
- Mean Citation Score: 295.70053
- Max Citation Score: 303.2883
- Similarity Product: 228.8708383106947

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test