PATENT CLAIM ANALYSIS

Application Number: 15954621
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["363", "021120"]

Abstract:
A sample-and-hold circuit includes a first voltage generation unit, a second voltage generation unit, a stabilization capacitor. The first voltage generation unit generates a first voltage according to a first predetermined delay time and a voltage corresponding to an auxiliary winding of a power converter. The second voltage generation unit generates a second voltage according to K multiple of a discharge time of a secondary side of the power converter during a previous period of the power converter and the voltage, wherein K<1. When a sum of the K multiple of the discharge time and a second predetermined delay time leads a first valley of the voltage corresponding to a current period of the power converter, the second voltage generation unit outputs the second voltage. When the sum lags the first valley, the first voltage generation unit outputs the first voltage.

Claim (Index 2):
The sample-and-hold circuit of  claim 1 , wherein the first voltage generator comprising:\n a first switch coupled to the auxiliary winding for being turned on at the first predetermined delay time according to a first turning-on signal; a first capacitor coupled between the first switch and ground, wherein when the first switch is turned on according to the first turning-on signal, the first capacitor generates the first voltage according to the voltage corresponding to the auxiliary winding; and a second switch coupled between the first capacitor and the stabilization capacitor, wherein when the sum of the K multiple of the discharge time of the secondary side and the second predetermined delay time lags the first valley, the second switch is turned on according to a second turning-on signal, and the first voltage generator outputs the first voltage; and the second voltage generator comprising:\n a third switch coupled to the auxiliary winding for being turned on at the K multiple of the discharge time of the secondary side according to a third turning-on signal; \n a second capacitor coupled between the third switch and the ground, wherein when the third switch is turned on according to the third turning-on signal, the second capacitor generates the second voltage according to the voltage corresponding to the auxiliary winding, and a capacitance of the first capacitor is equal to a capacitance of the second capacitor; and \n a fourth switch coupled between the second capacitor and the stabilization capacitor, wherein when the sum of the K multiple of the discharge time of the secondary side and the second predetermined delay time leads the first valley, the fourth switch is turned on according to a fourth turning-on signal, and the second voltage generator outputs the second voltage.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 91.0
- Lexical Diversity: 3.1875
- Patent Class: 363.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15252241', '15716537', '13802903', '14505503', '14164238']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8332807284204878
- 35 USC 102 Novelty (BERT): 0.564280766648046
- Combined Prediction Score: 0.8063807322432437
- Mean Citation Score: 335.146504
- Max Citation Score: 457.3737
- Similarity Product: 407.5173371554076

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test