PATENT CLAIM ANALYSIS

Application Number: 16392717
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-10
Patent Classification: ["326", "026000"]

Abstract:
An output buffer circuit includes an output node, a P-type transistor, an N-type transistor, and a first variable resistor circuit provided in a signal path between a drain of one of the P-type transistor and the N-type transistor and the output node.

Claim (Index 3):
The output buffer circuit according to  claim 1 , wherein\n the first switching circuit includes a first transistor, and the second resistor is provided in a signal path between the first transistor and the output node.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 100.0
- Lexical Diversity: 1.76923
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12402856', '14653112', '10342239', '12694565', '11979715']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6841650089871336
- 35 USC 102 Novelty (BERT): 0.4455693309772965
- Combined Prediction Score: 0.66030544118615
- Mean Citation Score: 162.340094
- Max Citation Score: 168.46893
- Similarity Product: 150.08284707028628

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test