PATENT CLAIM ANALYSIS

Application Number: 16202507
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-04
Patent Classification: ["257", "347000"]

Abstract:
A nanowire transistor includes undoped source and drain regions electrically coupled with a channel region. A source stack that is electrically isolated from a gate conductor includes an interfacial layer and a source conductor, and is coaxially wrapped completely around the source region, extending along at least a portion of the source region. A Schottky barrier between the source conductor and the source region is a negative Schottky barrier and a concentration of free charge carriers is induced in the semiconductor source region.

Claim (Index 15):
The finFET of  claim 9 , wherein the first metal contact is displaced from the first end section by a first interface layer, and the second metal contact is displaced from the second end section by a second interface layer, the first and second interface layers each comprising a material that would be an insulator or a semiconductor in its bulk state.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 98.0
- Lexical Diversity: 1.79592
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15816231', '10832576', '12488569', '13899666', '14673485']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8988630533017932
- 35 USC 102 Novelty (BERT): 0.5655655229090897
- Combined Prediction Score: 0.8655333002625228
- Mean Citation Score: 291.48702999999995
- Max Citation Score: 474.45117
- Similarity Product: 317.4548472747445

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test