PATENT CLAIM ANALYSIS

Application Number: 15909936
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["712", "208000"]

Abstract:
Binary translation may be performed by a field programmable gate array (FPGA) integrated with a processor as a single integrated circuit. The FPGA contains multiple blocks of logic for performing different binary translations. The processor may offload the binary translation to the FPGA. The FPGA may use historical logging to skip the binary translation of source instructions that have been previously translated into target instructions.

Claim (Index 1):
A method of processing instructions in an integrated circuit, the method comprising:\n receiving, by a hardware processor of the integrated circuit, a source instruction associated with a source instruction set architecture; sending, by the hardware processor, the source instruction via a communications link to a field programmable gate array (FPGA) integrated in the integrated circuit; determining, by the FPGA, a block of logic within the FPGA that is associated with the source instruction set architecture; translating, by the block of logic, the source instruction to a target instruction according to a binary translation implemented by the block of logic to a native instruction set architecture executed by the processor; and executing, by the processor, the target instruction.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 1.47917
- Patent Class: 712.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10039254', '14954953', '13303841', '13969718', '14698809']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4970462286677324
- 35 USC 102 Novelty (BERT): 0.4700259133100874
- Combined Prediction Score: 0.4943441971319679
- Mean Citation Score: 131.47919600000003
- Max Citation Score: 140.52437
- Similarity Product: 102.47667843786655

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test