PATENT CLAIM ANALYSIS

Application Number: 15974456
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "666000"]

Abstract:
A semiconductor device including one or more semiconductor dice, a lead frame including an array of signal-carrying leads electrically coupled with the semiconductor die, and a power supply connection for the at least one semiconductor die arranged centrally thereof.

Claim (Index 4):
The device of  claim 3  wherein the outer electrically-conductive layer is planar and located a distance from the semiconductor die, the power supply connection including an intermediate electrically-conductive body between the inner electrically-conductive layer and the outer electrically-conductive layer.

Metadata:
- Claim Count in Document: 28.0
- Percentile: 93.0
- Lexical Diversity: 1.27273
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15973049', '12050592', '15471472', '12463184', '10767921']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9158446872924848
- 35 USC 102 Novelty (BERT): 0.4833759615483264
- Combined Prediction Score: 0.8725978147180691
- Mean Citation Score: 156.25399399999995
- Max Citation Score: 174.36218
- Similarity Product: 122.17917282267688

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test