PATENT CLAIM ANALYSIS

Application Number: 16071458
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["365", "230030"]

Abstract:
The present invention is directed to the storage technical field and discloses an on-chip data partitioning read-write method, the method comprises: a data partitioning step for storing on-chip data in different areas, and storing the on-chip data in an on-chip storage medium and an off-chip storage medium respectively, based on a data partitioning strategy; a pre-operation step for performing an operational processing of an on-chip address index of the on-chip storage data in advance when implementing data splicing; and a data splicing step, for splicing the on-chip storage data and the off-chip input data to obtain a representation of the original data based on a data splicing strategy. Also provided are a corresponding on-chip data partitioning read-write system and device. Thus, read and write of repeated data can be efficiently realized, reducing memory access bandwidth requirements while providing good flexibility, thus reducing on-chip storage overhead.

Claim (Index 4):
The on-chip data partitioning read-write method according to  claim 1 , wherein the data partitioning step further comprising:\n partitioning an address space into an off-chip data space and an on-chip data space; performing data replacement between the on-chip storage medium and the off-chip storage medium based on a data replacement strategy, wherein the data replacement strategy comprising an ordinal replacement, a reversed replacement and a random replacement; the data partitioning strategy comprising fixed-point number partitioning and floating-point number partitioning; the data splicing step further comprising: converting an on-chip and off-chip data transmission form from the representation of the original data into all or partial data index to splice results of the all or partial data index on a chip to acquire the representation of the original data; the data splicing step is carried out through an on-chip and off-chip data path, or an on-chip data path, the on-chip and off-chip data path comprising PCI, PCIE and HT interconnection techniques, the on-chip data path comprising FAT-TREE and H-TREE interconnection techniques, and the on-chip and off-chip connection way comprises a multichip interconnection structure; data in the on-chip storage medium or the off-chip storage medium can be read and written once or for many times, and the data can be read into one or more on-chip calculation units; the on-chip storage medium or the off-chip storage medium can be read and written from outside once or for many times, and the medium can be read and written from inside once or for many times.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 95.0
- Lexical Diversity: 2.07895
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16070735', '11966009', '11164407', '10012257', '13876843']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7748083354514019
- 35 USC 102 Novelty (BERT): 0.4778528806484661
- Combined Prediction Score: 0.7451127899711084
- Mean Citation Score: 163.481968
- Max Citation Score: 228.38171
- Similarity Product: 181.33417244693817

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test