PATENT CLAIM ANALYSIS

Application Number: 16035709
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-08
Patent Classification: ["257", "659000"]

Abstract:
A chip package structure including a first circuit structure, a chip, an electronic device, a first encapsulant, a second encapsulant, a plurality of through pillars, and an electromagnetic interference (EMI) shielding layer is provided. The chip has an active surface facing the first circuit structure. The electronic device has a connection surface facing the first circuit structure. The chip and the electronic device are disposed on opposite sides of the first circuit structure respectively. The first encapsulant encapsulates the chip. The second encapsulant encapsulates the electronic device. The through pillars penetrate the first encapsulant and are electrically connected to the first circuit structure. The EMI shielding layer covers the first encapsulant and the second encapsulant. The chip or the electronic device is grounded by the EMI shielding layer.

Claim (Index 20):
The method for manufacturing the chip package structure as claimed in  claim 11 , wherein the chip has a back surface opposite to the active surface, and the first encapsulant exposes the back surface of the chip.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 95.0
- Lexical Diversity: 2.84314
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12769053', '14622255', '12136682', '13350692', '13714023']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9231747144922532
- 35 USC 102 Novelty (BERT): 0.5088924849569363
- Combined Prediction Score: 0.8817464915387215
- Mean Citation Score: 214.739096
- Max Citation Score: 242.94586
- Similarity Product: 151.5472042557955

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test