PATENT CLAIM ANALYSIS

Application Number: 15899142
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["711", "154000"]

Abstract:
A storage device may utilize de-centralized latch management to remove functions from the device controller to the memory die. NAND die located on a common bus may share a pool of latches with one die acting as a proxy or manager for the other die. A bridge or bridges may be used between NAND connections to allow additional die to be controlled by a leader die for the partially de-centralized management of latches. The latch management operations may include a sequence of commands/operations performed by the leader die.

Claim (Index 20):
The memory system of  claim 16 , wherein the group of the dies comprises a first group of dies, the memory dies further comprising:\n a first memory bus connecting the first group of dies; a second group of dies separate from the first group of dies; a second memory bus connecting the second group of dies; a first bridge coupled with the first memory bus; and a second bridge coupled with the second memory bus, wherein the first bridge and the second bridge are connected; wherein the leader die is a leader of both the first group of dies and the second group of dies.

Metadata:
- Claim Count in Document: 33.0
- Percentile: 88.0
- Lexical Diversity: 1.7037
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15787694', '15496490', '14665920', '13831420', '15364831']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5056216570041685
- 35 USC 102 Novelty (BERT): 0.4965984813478384
- Combined Prediction Score: 0.5047193394385355
- Mean Citation Score: 184.763124
- Max Citation Score: 200.37181
- Similarity Product: 123.45522548878073

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test