PATENT CLAIM ANALYSIS

Application Number: 15944307
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["710", "113000"]

Abstract:
A device may include a plurality of data processing engines. Each data processing engine may include a core and a memory module. Each core may be configured to access the memory module in the same data processing engine and a memory module within at least one other data processing engine of the plurality of data processing engines.

Claim (Index 1):
A device, comprising:\n a plurality of data processing engines; wherein each data processing engine includes a core and a memory module; wherein each core is directly connected to a subset of memory modules of the plurality of data processing engines via a memory interface within each respective memory module of the subset of memory modules; wherein the subset of memory modules for each core includes the memory module in the same data processing engine as the core and at least one other memory module adjacent to the core from another data processing engine of the plurality of data processing engines; and wherein each core is configured to access the subset of memory modules for the core.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 91.0
- Lexical Diversity: 2.06897
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15944617', '15944303', '14675935', '12008352', '11404281']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6493106638139936
- 35 USC 102 Novelty (BERT): 0.5253131067455171
- Combined Prediction Score: 0.636910908107146
- Mean Citation Score: 204.49252
- Max Citation Score: 353.83112
- Similarity Product: 284.1966728090906

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test