PATENT CLAIM ANALYSIS

Application Number: 16449820
Application Type: Utility
Filing Date: 2019-06
Publication Date: 2019-10
Patent Classification: ["365", "049170"]

Abstract:
A content addressable memory cell includes a first floating body transistor and a second floating body transistor. The first floating body transistor and the second floating body transistor are electrically connected in series through a common node. The first floating body transistor and the second floating body transistor store complementary data.

Claim (Index 27):
The content addressable memory cell of  claim 25 , wherein said first floating body transistor and said second floating body transistor store the same data.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 100.0
- Lexical Diversity: 2.0
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['16013646', '14154138', '14597444', '15375236', '15846566']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8594334023463733
- 35 USC 102 Novelty (BERT): 0.5910488818984987
- Combined Prediction Score: 0.8325949503015858
- Mean Citation Score: 389.061786
- Max Citation Score: 478.82413
- Similarity Product: 346.8002006758863

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test