PATENT CLAIM ANALYSIS

Application Number: 15989593
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["714", "726000"]

Abstract:
According to one embodiment, a semiconductor integrated circuit comprises: a tested block including a test control circuit; and a control circuit configured to output a first signal. The test control circuit performs a test of at least a first test pattern of the test patterns for the scan chain in accordance with the first signal during a first non-access state period of the tested block, and performs a test of at least a second test pattern following the first test pattern of the test patterns for the scan chain in accordance with the first signal during a second non-access state period of the tested block, and the test of the first test pattern and the test of the second test pattern are performed discontinuously.

Claim (Index 1):
A semiconductor device comprising:\n a tested block including a logic circuit, a pattern compressor, a comparator, and a pattern counter, wherein the logic circuit includes scan chains inputted with test patterns, at least one of a scan chain in the scan chains have a first flip-flop and a data latch for storing data output from the first flip-flop, the pattern compressor inputs a test result output from the scan chains, and compresses the test result, the comparator compares a compression result output from the pattern compressor and an compressed expected value, and the pattern counter counts an executed order of the test patterns; and a register circuit including a compressed value register and a pattern count register, wherein the compressed value register stores the test result compressed by the pattern compressor, and the pattern count register stores a count value of the pattern count register, wherein the first flip-flop is electrically coupled to a first power supply, and the data latch is electrically coupled with a second power supply different from the first power supply.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 93.0
- Lexical Diversity: 2.84783
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15056488', '10194377', '11683759', '10410283', '13284130']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3039229600853767
- 35 USC 102 Novelty (BERT): 0.5013053728765379
- Combined Prediction Score: 0.3236612013644928
- Mean Citation Score: 198.59618
- Max Citation Score: 276.38962000000004
- Similarity Product: 209.77514270132664

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test