PATENT CLAIM ANALYSIS

Application Number: 15881622
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["257", "776000"]

Abstract:
In one embodiment, a system comprises: a plurality of aggressor bus lines; and a plurality of differential pair bus lines that are located in relatively parallel close proximity to the plurality of aggressor bus lines, wherein at least two of the plurality of differential pair bus lines change location with respect to each other at a point that has a cancelling affect on cross talk from the plurality of aggressor bus lines, wherein the change includes cross over routing. The plurality of differential pair bus lines can convey differential clock signals. The routing of the plurality of differential pair bus lines is substantially parallel to one another before and after the change.

Claim (Index 7):
The high speed signal distribution circuit in an integrated circuit of  claim 1 , wherein the plurality of signal bus lines have cross sections and lengths that support preservation of similarity in the respective resistances.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 86.0
- Lexical Diversity: 2.0339
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12164312', '11238339', '13334208', '11580444', '14152537']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9165273263339282
- 35 USC 102 Novelty (BERT): 0.511109316828156
- Combined Prediction Score: 0.875985525383351
- Mean Citation Score: 174.751442
- Max Citation Score: 184.40645
- Similarity Product: 97.14631381127836

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test