PATENT CLAIM ANALYSIS

Application Number: 15991653
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["711", "130000"]

Abstract:
This disclosure is directed to the problem of paralleling random read access within a reasonably sized block of data for a vector SIMD processor. The invention sets up plural parallel look up tables, moves data from main memory to each plural parallel look up table and then employs a look up table read instruction to simultaneously move data from each parallel look up table to a corresponding part a vector destination register. This enables data processing by vector single instruction multiple data (SIMD) operations. This vector destination register load can be repeated if the tables store more used data. New data can be loaded into the original tables if appropriate. A level one memory is preferably partitioned as part data cache and part directly addressable memory. The look up table memory is stored in the directly addressable memory.

Claim (Index 1):
A method of data processing according to a predetermined algorithm having at least one data access pattern, the method comprising:\n determining whether overhead of defining look up tables, moving data from memory to the look up tables and moving data to vector registers of each data access pattern is less than overhead of moving data to vector registers by plural scalar loads; and if an overhead of defining look up tables, moving data from memory to the look up tables and moving data to vector registers for a data access pattern is less than an overhead of moving data to vector registers by plural scalar loads:\n setting up plural parallel look up tables; \n moving data required by the algorithm from main memory to each of the plural parallel look up tables; \n simultaneously moving data from each of the parallel look up tables to corresponding locations of a vector destination register; and \n performing at least one vector single instruction multiple data (SIMD) operation upon data in the vector destination register.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 93.0
- Lexical Diversity: 1.85
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14920298', '15384580', '15204243', '15971875', '14579641']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5003182997155378
- 35 USC 102 Novelty (BERT): 0.5203662532974336
- Combined Prediction Score: 0.5023230950737274
- Mean Citation Score: 268.54571400000003
- Max Citation Score: 284.76724
- Similarity Product: 173.06615248147492

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test