PATENT CLAIM ANALYSIS

Application Number: 15911383
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["365", "185210"]

Abstract:
According to one embodiment, a semiconductor memory device includes a first conductor extending in a first direction, bit lines, sense amplifiers, and a second conductor extending in the first direction. A plurality of first memory cells being connected to the first conductor. The bit lines respectively connected to the first memory cells. The first sense amplifiers are respectively connected to a plurality of first bit lines included in the bit lines, each of the first sense amplifiers including a first sense node, and a first transistor connected between the first sense node and a corresponding one of the first bit lines. The second conductor function as gate electrodes of the first transistors included in the first sense amplifiers.

Claim (Index 16):
A semiconductor memory device comprising:\n a first conductor extending in a first direction, a plurality of memory cells being connected to the first conductor; first to fourth sense amplifiers, the first sense amplifier and the second sense amplifier being arranged in the first direction, the third sense amplifier and the fourth sense amplifier being arranged in the first direction, the first sense amplifier and the third sense amplifier being arranged in a second direction crossing the first direction, the second sense amplifier and the fourth sense amplifier being arranged in the second direction; a second conductor provided in a first layer, the second conductor extending in the first direction; a third conductor provided in the first layer, the third conductor functioning as a gate electrode of a first transistor included in the first sense amplifier; a fourth conductor provided in the first layer, the fourth conductor functioning as a gate electrode of a second transistor included in the second sense amplifier; a fifth conductor provided in the first layer, the fifth conductor functioning as a gate electrode of a third transistor included in the third sense amplifier; a sixth conductor provided in the first layer, the sixth conductor functioning as a gate electrode of a fourth transistor included in the fourth sense amplifier; first and second contacts each having a pillar shape and provided on the second conductor, the first and second contacts being arranged in the first direction; third and fourth contacts each having a pillar shape and provided on the third conductor; a fifth contact having a pillar shape and provided on the fourth conductor; a sixth contact having a pillar shape and provided on the fifth conductor; seventh and eighth contacts each having a pillar shape and provided on the sixth conductor; a seventh conductor provided in a second layer which is different from the first layer, the seventh conductor being in contact with the first contact, the third contact, and the sixth contact; an eighth conductor provided in the second layer, the eight conductor being in contact with the second contact, the fifth contact, and the seventh contact; a ninth conductor provided in a third layer which is different from either of the first layer and the second layer, the ninth conductor and the third conductor being electrically connected via the fourth contact; and a tenth conductor provided in the third layer, the tenth conductor and the sixth conductor being electrically connected via the eighth contact.

Metadata:
- Claim Count in Document: 51.0
- Percentile: 90.0
- Lexical Diversity: 2.93182
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15886464', '15909404', '15881662', '14020246', '15346716']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7637861910543607
- 35 USC 102 Novelty (BERT): 0.51644867973497
- Combined Prediction Score: 0.7390524399224216
- Mean Citation Score: 238.588434
- Max Citation Score: 324.91754
- Similarity Product: 263.6243598319864

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test