PATENT CLAIM ANALYSIS

Application Number: 15871785
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["257", "061000"]

Abstract:
In some examples, a transistor includes a first well doped with a first-type dopant having a first concentration. The transistor also includes a gate oxide layer on a portion of the first well and a gate layer on the gate oxide layer. The transistor further includes a first segment of a second well doped with the first-type dopant having a second concentration, the first segment underlapping a first portion of the gate layer. The transistor also includes a source region doped with a second-type dopant having a third concentration, the source region in the first segment. The transistor further includes a drain region doped with the second-type dopant having a concentration that is substantially the same as the third concentration.

Claim (Index 28):
The method of  claim 21 , further comprising forming first and second dielectric structures on opposing sidewalls of the conductive structure, the first dielectric structure located over the third doped region, and the second dielectric structure located over the fourth doped region.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 86.0
- Lexical Diversity: 3.12195
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13688231', '11267013', '11482531', '15825656', '12731481']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9157791014413752
- 35 USC 102 Novelty (BERT): 0.4967534593062533
- Combined Prediction Score: 0.873876537227863
- Mean Citation Score: 218.633318
- Max Citation Score: 225.11578
- Similarity Product: 152.1026703569841

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test