PATENT CLAIM ANALYSIS

Application Number: 15971639
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["365", "145000"]

Abstract:
Methods, systems, and devices for access line management for an array of memory cells are described. Some memory devices may include a plate that is coupled with memory cells associated with a plurality of digit lines and/or a plurality of word lines. Because the plate is coupled with a plurality of digit lines and/or word lines, unintended cross-coupling between various components of the memory device may be significant. To mitigate the impact of unintended cross-coupling between various components, the memory device may float unselected word lines during one or more portions of an access operation. Accordingly, a voltage of each unselected word line may relate to the voltage of the plate as changes in plate voltage may occur.

Claim (Index 4):
The method of  claim 1 , further comprising:\n driving a second access line coupled with the second memory cell to a third voltage during the duration.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 93.0
- Lexical Diversity: 2.06452
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15845619', '15669785', '15969302', '15857091', '15141491']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7531702248368037
- 35 USC 102 Novelty (BERT): 0.4810767326948861
- Combined Prediction Score: 0.725960875622612
- Mean Citation Score: 184.610444
- Max Citation Score: 191.12276
- Similarity Product: 138.7596370105624

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test