PATENT CLAIM ANALYSIS

Application Number: 16209471
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["438", "050000"]

Abstract:
A device includes a complementary metal-oxide-semiconductor (CMOS) wafer and a conductive shielding layer. The CMOS wafer includes a semiconductor substrate, at least one front-end-of-the-line (FEOL) element, at least one back-end-of-the-line (BEOL) element and at least one dielectric layer. The FEOL element is disposed on the semiconductor substrate, the dielectric layer is disposed on the semiconductor substrate, and the BEOL element is disposed on the dielectric layer. The conductive shielding layer is disposed on the dielectric layer, in which the conductive shielding layer is electrically connected to the semiconductor substrate.

Claim (Index 6):
The semiconductor device of  claim 5 , wherein the MEMS device comprises a MEME element, wherein an orthogonal projection of the MEMS element on the semiconductor substrate is between orthogonal projections of the first conductive shielding layer and the second conductive layer on the semiconductor substrate.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 98.0
- Lexical Diversity: 2.81081
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14607581', '14826449', '16167912', '15716676', '13936380']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8415294598972323
- 35 USC 102 Novelty (BERT): 0.5391234032455067
- Combined Prediction Score: 0.8112888542320598
- Mean Citation Score: 218.07765
- Max Citation Score: 353.87268
- Similarity Product: 246.644036480484

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test