PATENT CLAIM ANALYSIS

Application Number: 15867212
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["363", "021020"]

Abstract:
A power conversion circuit includes a high-side MOSFET and a low-side MOSFET. A conduction terminal of the high-side MOSFET is coupled to a conduction terminal of the low-side MOSFET at a half-bridge (HB) circuit node. The high-side MOSFET is switched off. Voltage potential transitions of the HB circuit node are counted while the high-side MOSFET and low-side MOSFET are off. Assertion of a control signal to the low-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after the high-side MOSFET is switched off. The low-side MOSFET is switched off by de-asserting the control signal to the low-side MOSFET. Switching on the high-side MOSFET is postponed for two voltage potential transitions of the HB circuit node after switching off the low-side MOSFET.

Claim (Index 5):
The power conversion circuit of  claim 3 , wherein the peak/valley detection circuit includes a counter configured to count peaks and valleys of the voltage at the first node.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 86.0
- Lexical Diversity: 2.93478
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15148200', '15042357', '15262326', '15181666', '15143239']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.832929343576686
- 35 USC 102 Novelty (BERT): 0.5684890982379848
- Combined Prediction Score: 0.8064853190428158
- Mean Citation Score: 291.36767999999995
- Max Citation Score: 495.1471
- Similarity Product: 364.0042225615561

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test