PATENT CLAIM ANALYSIS

Application Number: 16066450
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["257", "368000"]

Abstract:
A diode includes a first-conductivity-type barrier region disposed between a drift region and a second impurity region and having an impurity concentration higher than that of the drift region and a second-conductivity-type field extension prevention region disposed between the barrier region and the drift region. The diode also includes a trench gate disposed to extend from a second main surface of a semiconductor substrate through the second impurity region and the barrier region and reach the field extension prevention region. The trench gate has a gate electrode for applying a gate voltage. A gate electrode is applied with a parasitic gate voltage, as the gate voltage. The parasitic gate voltage has an absolute value of a potential difference with a second electrode being equal to or greater than a threshold voltage of a parasitic transistor formed of the second impurity region, the barrier region, and the field extension prevention region.

Claim (Index 1):
A diode, comprising:\n a first electrode disposed on a first main surface of a semiconductor substrate; a first-conductivity-type first impurity region disposed in a surface layer of the semiconductor substrate adjacent to the first main surface and stacked on the first electrode; a first-conductivity-type drift region stacked on the first impurity region and having an impurity concentration lower than the impurity concentration of the first impurity region; a second-conductivity-type second impurity region stacked on the drift region; and a second electrode disposed on the second impurity region and on a second main surface of the semiconductor substrate which is opposite to the first main surface, the diode further comprising: a first-conductivity-type barrier region disposed between the drift region and the second impurity region and having an impurity concentration higher than the impurity concentration of the drift region; a second-conductivity-type field extension prevention region disposed between the barrier region and the drift region; and a trench gate disposed to extend from the second main surface through the second impurity region and the barrier region and to reach the field extension prevention region, the trench gate having a gate electrode for applying a gate voltage, wherein the gate electrode is configured to be applied with a parasitic gate voltage as the gate voltage, the parasitic gate voltage having an absolute value of a potential difference with the second electrode that is equal to or greater than a threshold voltage of a parasitic transistor formed of the second impurity region, the barrier region, and the field extension prevention region.

Metadata:
- Claim Count in Document: 37.0
- Percentile: 94.0
- Lexical Diversity: 2.59016
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15770258', '14513685', '12867591', '12677131', '13129980']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9203984382516658
- 35 USC 102 Novelty (BERT): 0.4966182246575394
- Combined Prediction Score: 0.8780204168922531
- Mean Citation Score: 245.95843400000004
- Max Citation Score: 270.492
- Similarity Product: 221.1554554696083

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test