PATENT CLAIM ANALYSIS

Application Number: 16017430
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["710", "308000"]

Abstract:
A DIMM is described. The DIMM includes circuitry to simultaneously transfer data of different ranks of memory chips on the DIMM over a same data bus during a same burst write sequence.

Claim (Index 4):
The apparatus of  claim 1  wherein the memory controller further comprises logic circuitry to move second requests that are targeted to the second rank ahead of first requests that are targeted to the first rank, the second requests received by the memory controller after the first requests, the first requests received by the memory controller after other requests were received by the memory controller, the memory controller to move the second requests ahead of the first request so that the memory controller is able to simultaneously transfer data between both ranks.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 94.0
- Lexical Diversity: 1.25926
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15196014', '15716485', '15197424', '15907390', '15857519']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.540164367947525
- 35 USC 102 Novelty (BERT): 0.4894622617182606
- Combined Prediction Score: 0.5350941573245985
- Mean Citation Score: 183.717458
- Max Citation Score: 204.82341
- Similarity Product: 152.5767769243723

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test