PATENT CLAIM ANALYSIS

Application Number: 16148424
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-10
Patent Classification: ["257", "048000"]

Abstract:
A test element group includes a test element including a plurality of test transistors connected in series between a first node and a second node, the second node being connected to a ground node; a first transistor connected between the first node and a power supply node; and a second transistor configured to generate an output current, proportional to a voltage at the first node, and connected to the first node and the power supply node.

Claim (Index 15):
The semiconductor wafer according to  claim 14 , wherein the at least two or more of the test element groups sharing at least one of the first pad, the second pad and the third pad are connected to each other in parallel.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 97.0
- Lexical Diversity: 2.27778
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12718800', '13799866', '15206384', '15233851', '14326471']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9179638559075836
- 35 USC 102 Novelty (BERT): 0.483039215398323
- Combined Prediction Score: 0.8744713918566576
- Mean Citation Score: 167.38172000000003
- Max Citation Score: 168.36668
- Similarity Product: 116.3512481801033

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test