PATENT CLAIM ANALYSIS

Application Number: 16011615
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-11
Patent Classification: ["257", "751000"]

Abstract:
A method for fabricating semiconductor device includes the steps of: forming a dielectric layer on a substrate; forming a trench in the dielectric layer; forming a first liner in the trench, wherein the first liner comprises Co—Ru alloy; forming a metal layer on the first liner; and planarizing the metal layer and the first liner to form a metal interconnection.

Claim (Index 1):
A method for fabricating semiconductor device, comprising:\n forming a dielectric layer on a substrate; forming a trench in the dielectric layer; forming a first liner in the trench, wherein the first liner comprises Co\u2014Ru alloy; forming a metal layer on the first liner; and planarizing the metal layer and the first liner to form a metal interconnection.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 94.0
- Lexical Diversity: 1.97059
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['11525232', '10605261', '10910499', '11271032', '10429470']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9094253918740308
- 35 USC 102 Novelty (BERT): 0.4686263742225054
- Combined Prediction Score: 0.8653454901088784
- Mean Citation Score: 159.852476
- Max Citation Score: 167.81075
- Similarity Product: 128.63502109336858

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test