PATENT CLAIM ANALYSIS

Application Number: 16031371
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "347000"]

Abstract:
A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an underlying gate dielectric material. The second line has a width tuned to a breakdown voltage. The method further includes forming sidewall spacers on sidewalls of the first and second line such that the space between first and second line is pinched-off by the dielectric spacers. The method further includes forming source and drain regions adjacent outer edges of the first line and the second line, and removing at least the second line to form an opening between the sidewall spacers of the second line and to expose the underlying gate dielectric material. The method further includes depositing a layer of material on the underlying gate dielectric material within the opening, and forming contacts to a gate structure and the source and drain regions.

Claim (Index 1):
A structure comprising:\n a gate dielectric material on a substrate; first, second and third silicide regions directly on the substrate; sidewall spacers on the gate dielectric material comprising a first sidewall spacer, a second sidewall spacer and a third sidewall spacer, the first silicide region, the second silicide region, the first sidewall spacer and the second sidewall spacer each comprise a side surface; a sidewall structure spaced away from the first sidewall spacer, second sidewall spacer and third sidewall spacer; a source region adjacent to the first silicide region; a drain region adjacent to the second silicide region; the third silicide region being aligned with the first sidewall spacer and the third sidewall spacer, and further spaced apart and positioned between the first silicide region and the second silicide region; and contacts to the first silicide region, the second silicide region, the third silicide region, and the source and drain regions, wherein the side surface of the first silicide region is vertically aligned with the side surface of the first sidewall spacer, and the side surface of the second silicide region is vertically aligned with the side surface of the second sidewall spacer.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 95.0
- Lexical Diversity: 2.50794
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15944018', '14864066', '15811810', '14864020', '14300884']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9266554738460356
- 35 USC 102 Novelty (BERT): 0.4896139911969298
- Combined Prediction Score: 0.8829513255811252
- Mean Citation Score: 260.919046
- Max Citation Score: 272.52228
- Similarity Product: 248.3476217379714

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test