PATENT CLAIM ANALYSIS

Application Number: 15889957
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["438", "107000"]

Abstract:
A method of fabricating a semiconductor package includes mounting a plurality of semiconductor chips on a substrate in a stripped state, forming a mold layer to cover the semiconductor chips, cutting the mold layer and the substrate to form unit packages separated from each other, and forming a shielding layer on the mold layer of each of the unit packages, wherein each of the unit packages includes a corresponding one of the semiconductor chips, wherein the mold layer in each of the unit packages includes side surfaces, a top surface, and corner regions, and wherein each of the corner regions of the mold layer includes a first corner, which is connected to a corresponding one of the side surfaces and has a first curvature radius, and a second corner, which is connected to the top surface and has a second curvature radius smaller than the first curvature radius.

Claim (Index 26):
The semiconductor package of  claim 25 , wherein the deposition primer include at least one of urethane-based and acrylic-based materials.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 88.0
- Lexical Diversity: 3.01887
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15355476', '15418077', '15065850', '14531994', '14736247']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.833338183168201
- 35 USC 102 Novelty (BERT): 0.5364427979390499
- Combined Prediction Score: 0.8036486446452858
- Mean Citation Score: 205.08063
- Max Citation Score: 322.20062
- Similarity Product: 199.29901877272368

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test