PATENT CLAIM ANALYSIS

Application Number: 15959443
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["307", "104000"]

Abstract:
An embodiment of the invention provides a method for reducing data corruption in a wireless power transmission system. Power is transmitted from a primary coil to a secondary coil by induction. The voltage induced on the secondary coil by induction is rectified. The change in current supplied to a load configured to be coupled to the wireless power transmission system is limited.

Claim (Index 16):
The wireless power transmission system of  claim 13  wherein the charge control circuit comprises:\n a current sensor having an input, a first output and a second output; \n a charge pump having an input and an output; \n a first op-amp having a first input, a second input and an output; \n a second op-amp having a first input, a second input and an output; \n an NFET having a gate, drain and source; \n a first diode having a cathode and an anode; \n a second diode having a cathode and an anode; \n a capacitor having a first terminal and a second terminal; \n a first resistor having a first terminal and a second terminal; \n a second resistor having a first terminal and a second terminal; \n a third resistor having a first terminal and a second terminal; \n a fourth resistor having a first terminal and a second terminal; \n wherein the input of the charge control circuit is connected to the input of the current sensor; \n wherein the first output of the current sensor is connected to the input of the charge pump, the drain of the NFET, and the cathode of the second diode; \n the second output of the current sensor is connected to the second input of the first op-amp, the first input of the second op-amp and the first terminal of the first resistor; \n wherein the first terminal of second resistor is connected to the second input of the second op-amp and the first terminal of the third resistor; \n wherein the output of the charge pump is connected to the gate of the NFET and the anode of the first diode; \n wherein the output of the first op-amp is connected to the cathode of the first diode; \n wherein the output of the second op-amp is connected to the second terminal of the third resistor and the first terminal of the fourth resistor; \n wherein the first input of the first op-amp is connected to the second terminal of the fourth resistor and the first terminal of the capacitor; \n wherein the output of the charge control circuit is connected to the anode of the second diode and the source of the NFET; \n wherein the second terminal of the first resistor, the second terminal of the second resistor and the second connection of the capacitor are connected to ground.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 91.0
- Lexical Diversity: 1.60976
- Patent Class: 307.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12838298', '15131732', '13418307', '15306089', '15720520']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8143374389949589
- 35 USC 102 Novelty (BERT): 0.4898278345038608
- Combined Prediction Score: 0.7818864785458491
- Mean Citation Score: 199.606498
- Max Citation Score: 274.0512
- Similarity Product: 241.10677239646915

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test