PATENT CLAIM ANALYSIS

Application Number: 16083057
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-03
Patent Classification: ["257", "072000"]

Abstract:
An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate includes a substrate, and a first insulating layer and a thin film transistor which are arranged on the substrate in this order. The first insulating layer includes a colored region which is configured to absorb light. An orthographic projection of the colored region on the substrate at least covers an orthographic projection of the active layer of the thin film transistor on the substrate. By arranging the colored region of the first insulating layer, the light with a short wavelength from an external light source is absorbed. Thus, a channel of the active layer is protected, stable performance of a device is realized, and a service life of the device is prolonged.

Claim (Index 5):
The array substrate of  claim 4 , wherein the metal ions comprise Cu + , Au 2+ , Mn 2+ , Cd 2+ , Fe 2+ , Co 3+ , Cr 3+ , Fe 3+ , or a mixture thereof.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 97.0
- Lexical Diversity: 2.25397
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14430095', '14420774', '10735770', '15107094', '15038227']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9310354524534152
- 35 USC 102 Novelty (BERT): 0.5023243034549847
- Combined Prediction Score: 0.8881643375535724
- Mean Citation Score: 225.084992
- Max Citation Score: 242.30682
- Similarity Product: 166.67389425667048

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test