PATENT CLAIM ANALYSIS

Application Number: 15996996
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["341", "155000"]

Abstract:
An analog to digital converting circuit includes a correlated double sampling circuit (CDS) that compares a pixel signal with a ramp signal, and outputs a comparison signal, a timing amplifier that increases an active time of the comparison signal “N” times, and outputs an extended signal, wherein the “N” is a positive integer, and a counter that outputs a digital signal corresponding to the pixel signal in response to the extended signal and a first clock signal.

Claim (Index 15):
The analog to digital converting circuit of  claim 11 , wherein the timing amplifier includes:\n a first voltage control unit configured to control a first voltage of a first node in response to the internal comparison signal; a second voltage control unit configured to control a second voltage of a second node in response to the internal comparison signal; and a comparator configured to compare the first voltage of the first node and the second voltage of the second node, and to output the internal extended signal.

Metadata:
- Claim Count in Document: 30.0
- Percentile: 94.0
- Lexical Diversity: 1.85417
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14854245', '13276927', '14692787', '13116551', '12590830']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6289029373822402
- 35 USC 102 Novelty (BERT): 0.4978379390277269
- Combined Prediction Score: 0.6157964375467889
- Mean Citation Score: 239.755198
- Max Citation Score: 245.302
- Similarity Product: 194.77296803915505

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test