PATENT CLAIM ANALYSIS

Application Number: 15895321
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["326", "038000"]

Abstract:
A programmable logic unit (PLU). The PLU includes a plurality of four-input reconfigurable hard logics (RHLs), a three-input look-up-table (LUT), and a plurality of reconfigurable inverters. The plurality of RHLs include a first RHL, a second RHL, and a third RHL. The plurality of reconfigurable inverters are associated with the plurality of RHLs.

Claim (Index 2):
The PLU of  claim 1 , further comprising:\n a plurality of inputs, including a first input, a second input, a third input, and a fourth input; a plurality of outputs, including a first output, a second output, a third output, and a fourth output; a plurality of power gating cells, including a first power gating cell, a second power gating cell, a third power gating cell, and a fourth power gating cell; a plurality of configuration cells, including a first configuration cell, a second configuration cell, a third configuration cell, a fourth configuration cell, a fifth configuration cell, a sixth configuration cell, a seventh configuration cell, and an eighth configuration cell; and a reconfigurable power controller (RPC).

Metadata:
- Claim Count in Document: 18.0
- Percentile: 88.0
- Lexical Diversity: 2.0303
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['09754632', '14458456', '14089238', '14890911', '15224224']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6445385932511849
- 35 USC 102 Novelty (BERT): 0.4936783411270246
- Combined Prediction Score: 0.6294525680387688
- Mean Citation Score: 170.86310399999996
- Max Citation Score: 185.4701
- Similarity Product: 109.47932312403915

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test