PATENT CLAIM ANALYSIS

Application Number: 16292646
Application Type: Utility
Filing Date: 2019-03
Publication Date: 2019-06
Patent Classification: ["717", "129000"]

Abstract:
Efficient breakpoint detections via caches comprises monitoring a memory location by detecting cache misses on a cache. Embodiments include identifying a memory address that is to be monitored, storing the memory address in a breakpoint monitoring list, and ensuring that any cache lines overlapping with the memory address are evicted from a cache. Based at least on an indication of an occurrence of a cache miss, embodiments determine whether a portion of a cache line imported into the cache based on the cache miss overlaps with the memory address stored in the breakpoint monitoring list. When the portion of the imported cache line does overlap with the memory address, embodiments process one or more monitoring operations on the memory address, and, based on the memory address being stored in the breakpoint monitoring list, embodiments evict the imported cache line from the cache.

Claim (Index 12):
The computer system as recited in  claim 9 , wherein when the portion of the imported cache line does not overlap with the memory address, the imported cache line remains in the cache.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 99.0
- Lexical Diversity: 2.28358
- Patent Class: 717.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15405849', '15253027', '15349555', '15872453', '16168404']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4295994403231825
- 35 USC 102 Novelty (BERT): 0.5718448980144921
- Combined Prediction Score: 0.4438239860923135
- Mean Citation Score: 295.858838
- Max Citation Score: 447.47076
- Similarity Product: 351.6682823438358

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test