PATENT CLAIM ANALYSIS

Application Number: 16042527
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "410000"]

Abstract:
Gate stacks for improving integrated circuit device performance and methods for fabricating such gate stacks are disclosed herein. An exemplary method includes forming a gate stack over a substrate and at least partially removing the gate stack, thereby forming an opening. A multi-function layer is deposited in the opening and a work function layer is deposited over the multi-function layer. The multi-function layer includes nitrogen and one of titanium or tantalum. The work function layer includes nitrogen and one of titanium or tantalum. A concentration of the nitrogen of the work function layer is different than a concentration of the nitrogen of the multi-function layer. In some implementations, the concentration of the nitrogen of the work function layer from about 2% to about 5% and the concentration of the nitrogen of the multi-function layer from about 5% to about 15%.

Claim (Index 2):
The method of  claim 1 , wherein the depositing the multi-function layer over the gate dielectric layer includes performing a physical vapor deposition process.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 95.0
- Lexical Diversity: 2.42857
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15149978', '14532228', '14328299', '15382478', '12702012']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9222738297615946
- 35 USC 102 Novelty (BERT): 0.5056504691787381
- Combined Prediction Score: 0.8806114937033089
- Mean Citation Score: 210.71812000000003
- Max Citation Score: 255.64157000000003
- Similarity Product: 176.6708418833244

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test