PATENT CLAIM ANALYSIS

Application Number: 15768948
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-02
Patent Classification: ["377", "064000"]

Abstract:
A shift-buffer circuit, a gate driving circuit, a display panel, a display device, and a driving method. The shift-buffer circuit includes: a shift register and a plurality of buffers connected with the shift register. The shift register includes a shift output terminal; the shift register is configured to output a shift output signal from the shift output terminal, in response to a shift clock signal; each of the buffers includes a buffer input terminal and a buffer output terminal, the buffer input terminal being connected with the shift output terminal; each of the buffers is configured to output a buffer output signal from the buffer output terminal, in response to a buffer clock signal.

Claim (Index 10):
The shift-buffer circuit according to  claim 1 , wherein each of the shift registers is connected with four of the buffers.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 91.0
- Lexical Diversity: 3.28205
- Patent Class: 377.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15539887', '15327852', '15540150', '15759722', '10460856']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7607560960794231
- 35 USC 102 Novelty (BERT): 0.4964932068159504
- Combined Prediction Score: 0.7343298071530758
- Mean Citation Score: 291.98258
- Max Citation Score: 306.48282
- Similarity Product: 183.5819964903903

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test