PATENT CLAIM ANALYSIS

Application Number: 15896319
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["375", "358000"]

Abstract:
A phase lock loop (PLL) includes: a binary phase detector configured to generate a first and second polarity signals that respectively indicating whether an incoming data stream is leading a feedback signal, or whether the feedback signal is leading the incoming data stream, wherein a difference between the first and second polarity signals does not represent an amount of phase difference between the incoming data stream and the feedback signal; a digital filter configured to: generate filtered first polarity signal on a first path and a second path that are different; and generate filtered second polarity signal on a third path and a fourth path that are different; a charge pump coupled to the digital filter and configured to: integrate the filtered first polarity signal and the filtered second polarity signal; and an oscillator configured to generate the synthesized clock signal serving as the feedback signal.

Claim (Index 19):
The method of  claim 15 , further comprising:\n sampling the incoming data stream based on the synthesized clock signal; and deserializing the sampled incoming data stream according to the synthesized clock signal to generate a converted data stream suitable for subsequent processing by a digital processor.

Metadata:
- Claim Count in Document: 46.0
- Percentile: 88.0
- Lexical Diversity: 2.50794
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15094374', '11190323', '11068127', '13275367', '13544001']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.495378378550692
- 35 USC 102 Novelty (BERT): 0.5476589945325323
- Combined Prediction Score: 0.5006064401488761
- Mean Citation Score: 240.25332000000003
- Max Citation Score: 406.5221
- Similarity Product: 337.944737621665

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test