PATENT CLAIM ANALYSIS

Application Number: 15773536
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "616000"]

Abstract:
Embodiments of the present invention are directed to dual threshold voltage (VT) channel devices and their methods of fabrication. In an example, a semiconductor device includes a gate stack disposed on a substrate, the substrate having a first lattice constant. A source region and a drain region are formed on opposite sides of the gate electrode. A channel region is disposed beneath the gate stack and between the source region and the drain region. The source region is disposed in a first recess having a first depth and the drain region disposed in a second recess having a second depth. The first recess is deeper than the second recess. A semiconductor material having a second lattice constant different than the first lattice constant is disposed in the first recess and the second recess.

Claim (Index 17):
The method of  claim 16  further comprising:\n forming a second gate stack on the source side of the first gate stack and forming a third gate stack on the drain side of the first gate stack, wherein the second gate stack is separated from the first gate stack by a first distance and wherein the third gate stack is separated from the first gate stack by a second distance, wherein the first distance is greater than the second distance; and \n wherein forming the first recess and forming the second recess comprise simultaneously etching the semiconductor substrate between the first and second gate stacks and the semiconductor substrate between the first and third gate stacks.

Metadata:
- Claim Count in Document: 48.0
- Percentile: 93.0
- Lexical Diversity: 2.48276
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15134093', '13996503', '13749139', '13629148', '13629178']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9094590137530264
- 35 USC 102 Novelty (BERT): 0.4675719444559997
- Combined Prediction Score: 0.8652703068233237
- Mean Citation Score: 169.87044200000005
- Max Citation Score: 170.85756
- Similarity Product: 133.25893205344678

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test