PATENT CLAIM ANALYSIS

Application Number: 16210624
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["257", "329000"]

Abstract:
A semiconductor device includes an electrical device and has an output capacitance characteristic with at least one output capacitance maximum located at a voltage larger than 5% of a breakdown voltage of the semiconductor device. The output capacitance maximum is larger than 1.2 times an output capacitance at an output capacitance minimum located at a voltage between the voltage at the output capacitance maximum and 5% of a breakdown voltage of the semiconductor device.

Claim (Index 14):
The semiconductor device of  claim 10 , wherein the power semiconductor transistor arrangement comprises a plurality of cell compensation regions extending into a semiconductor substrate within a cell region of the semiconductor substrate, wherein one or more drift regions are located adjacent to the plurality of cell compensation regions separating neighboring cell compensation regions of the plurality of cell compensation regions from each other, wherein the cell compensation regions of the plurality of cell compensation regions comprise the first conductivity type and the one or more drift regions comprise the second conductivity type.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 98.0
- Lexical Diversity: 2.36364
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15041671', '15196838', '15680252', '15718456', '14309977']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9245134573448204
- 35 USC 102 Novelty (BERT): 0.4855923929993645
- Combined Prediction Score: 0.8806213509102747
- Mean Citation Score: 210.03198000000003
- Max Citation Score: 225.63708
- Similarity Product: 179.68046748491764

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test