PATENT CLAIM ANALYSIS

Application Number: 16134573
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["365", "185220"]

Abstract:
A memory device includes a plurality of memory cell transistors, a word line electrically connected to gates of the memory cell transistors, and a control circuit configured to perform programming of the memory cell transistors to a plurality of different threshold voltage ranges in a plurality of loops, each loop including a program operation and a program verification. The different threshold voltage ranges include a first threshold voltage range and a second threshold voltage range that is at a higher voltage than the first threshold voltage range. Further, during the program operation, the control circuit applies a program voltage to the word line, the program voltage increasing for each subsequent loop, an amount of increase of the program voltage when programming to the second threshold voltage range being set in accordance with a number of loops required to complete programming to the first threshold voltage range.

Claim (Index 34):
A memory device, comprising:\n a plurality of memory cell transistors; a word line electrically connected to gates of the memory cell transistors; and a control circuit configured to perform programming of the memory cell transistors to a plurality of different threshold voltage in a plurality of loops, each loop including a program operation and a program verification, wherein the different threshold voltages include a first threshold voltage and a second threshold voltage that is at a higher voltage than the first threshold voltage, and during the program verification, the control circuit applies a first verification voltage to the word line when performing verification of the programming to the first threshold voltage, a second verification voltage and a third verification voltage to the word line when performing verification of the programming to the second threshold voltage, the second verification voltage and the third verification voltage being higher than the first verification voltage, and either the second verification voltage or the third verification voltage is selected in accordance with a number of loops required to complete programming to the first threshold voltage.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 97.0
- Lexical Diversity: 2.47619
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15639411', '15710381', '15919492', '15688846', '15690256']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7891852977642004
- 35 USC 102 Novelty (BERT): 0.5000789218253546
- Combined Prediction Score: 0.7602746601703159
- Mean Citation Score: 225.998802
- Max Citation Score: 317.35077
- Similarity Product: 309.9248538057912

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test