PATENT CLAIM ANALYSIS

Application Number: 16010007
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["257", "741000"]

Abstract:
The present disclosure describes methods which employ a patterning photolithography/etch operations to form self-aligned interconnects with multi-metal gap fill. For example, the method includes a first pattern structure and a second pattern structure formed over a dielectric layer. Each of the first and second pattern structures includes a pair of spacers, and a center portion between the pair of spacers. A first opening, self-aligned to a space between the first and second pattern structures, is formed in the dielectric layer. A first conductive material is deposited in the first opening. The center portion of the second pattern structure is removed to form a void above the dielectric layer and between the pair of spacers of the second pattern structure. A second opening, self-aligned to the void, is formed in the dielectric layer; and a second conductive material is deposited in the second opening.

Claim (Index 16):
The semiconductor device of  claim 15 , wherein the first conductive material comprises cobalt, aluminum, or graphene and the second conductive material comprises copper.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 94.0
- Lexical Diversity: 2.85455
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15586881', '15675498', '15860166', '15871499', '14321890']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9151180466517934
- 35 USC 102 Novelty (BERT): 0.5086585852662366
- Combined Prediction Score: 0.8744721005132378
- Mean Citation Score: 176.153514
- Max Citation Score: 262.9595
- Similarity Product: 180.6205222313404

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test