PATENT CLAIM ANALYSIS

Application Number: 15896319
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["375", "358000"]

Abstract:
A phase lock loop (PLL) includes: a binary phase detector configured to generate a first and second polarity signals that respectively indicating whether an incoming data stream is leading a feedback signal, or whether the feedback signal is leading the incoming data stream, wherein a difference between the first and second polarity signals does not represent an amount of phase difference between the incoming data stream and the feedback signal; a digital filter configured to: generate filtered first polarity signal on a first path and a second path that are different; and generate filtered second polarity signal on a third path and a fourth path that are different; a charge pump coupled to the digital filter and configured to: integrate the filtered first polarity signal and the filtered second polarity signal; and an oscillator configured to generate the synthesized clock signal serving as the feedback signal.

Claim (Index 12):
The PLL of  claim 2 , wherein the filtered first polarity signal on the first path and the filtered first polarity signal on the second path are different, and wherein the filtered second polarity signal on the third path and the filtered second polarity signal on the fourth path are different.

Metadata:
- Claim Count in Document: 46.0
- Percentile: 88.0
- Lexical Diversity: 2.50794
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15094374', '11190323', '11068127', '13275367', '13544001']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5226739704066814
- 35 USC 102 Novelty (BERT): 0.5533898093175136
- Combined Prediction Score: 0.5257455542977646
- Mean Citation Score: 240.25332000000003
- Max Citation Score: 406.5221
- Similarity Product: 390.7407067265272

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test