PATENT CLAIM ANALYSIS

Application Number: 16104282
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-02
Patent Classification: ["438", "296000"]

Abstract:
A method for making a semiconductor device may include forming first and second spaced apart shallow trench isolation (STI) regions in a semiconductor substrate, and forming a superlattice on the semiconductor substrate and extending between the first and second STI regions. The superlattice may include stacked groups of layers, each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming a first semiconductor stringer comprising a non-monocrystalline body at an interface between a first end of the superlattice and the first STI region, and forming a gate above the superlattice.

Claim (Index 2):
The method of  claim 1  wherein the first semiconductor stringer is above the superlattice.

Metadata:
- Claim Count in Document: 30.0
- Percentile: 96.0
- Lexical Diversity: 1.90769
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12102305', '11425209', '15633918', '16007186', '14550272']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9014006992568264
- 35 USC 102 Novelty (BERT): 0.5393112607108653
- Combined Prediction Score: 0.8651917554022304
- Mean Citation Score: 358.944044
- Max Citation Score: 389.2508
- Similarity Product: 294.2432276196957

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test