PATENT CLAIM ANALYSIS

Application Number: 16101351
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["438", "199000"]

Abstract:
A 3D semiconductor device, the device including: a first single crystal layer including a plurality of first transistors and at least one metal layer, where the at least one metal layer interconnecting the first transistors; a plurality of logic gates including the at least one metal layer interconnecting the first transistors; a plurality of second transistors overlaying the at least one metal layer; a plurality of third transistors overlaying the second transistors; a top metal layer overlaying the third transistors; and a memory array including wordlines, where the memory array includes at least four rows by four columns of memory mini arrays, where each of the mini arrays includes at least four rows by four columns of memory cells, and where each of the memory cells includes at least one of the second transistors or at least one of the third transistors.

Claim (Index 11):
The 3D semiconductor device according to  claim 8 ,\n wherein at least one of said third transistors is a junction-less transistor.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 96.0
- Lexical Diversity: 3.5
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15950169', '16004404', '13869963', '13441923', '15904377']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8873412219741248
- 35 USC 102 Novelty (BERT): 0.5151139747501593
- Combined Prediction Score: 0.8501184972517282
- Mean Citation Score: 303.150832
- Max Citation Score: 322.05463
- Similarity Product: 268.83297056687474

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test