PATENT CLAIM ANALYSIS

Application Number: 15747139
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-08
Patent Classification: ["330", "051000"]

Abstract:
An analog multiplexer core circuit ( 120 A) includes a differential pair ( 121 ) that includes two transistors (Q 1,  Q 2 ), a differential pair ( 122 ) that includes two transistors (Q 3,  Q 4 ), a differential pair ( 123 ) that includes two transistors (Q 5,  Q 6 ), and a constant current source ( 124 ) that causes a current (I EE ) to flow. This analog multiplexer core circuit ( 120 A) time-multiplexes two analog signals (Ain 1,  Ain 2 ) and outputs a time-multiplexed analog signal (Aout). Each emitter resistor (R EA 1,  R EA 2,  R EA 3,  R EA 4 ) is connected to a corresponding one of the transistors (Q 1,  Q 2,  Q 3,  Q 4 ). At this time, a relation of “R EA ·I EE ≥the amplitude of an input analog signal” is satisfied. As a result, linearity of response can be ensured by expanding the linear response input range of the differential pairs ( 121, 122 ).

Claim (Index 1):
An analog multiplexer core circuit comprising:\n a first differential pair that includes a first transistor and a second transistor, the first transistor including a collector which is connected to a high-potential power supply via a first collector resistor, a base to which a positive-phase signal of a first analog signal is input, and an emitter, and the second transistor including a collector which is connected to the high-potential power supply via a second collector resistor, a base to which a negative-phase signal of the first analog signal is input, and an emitter; a second differential pair that includes a third transistor and a fourth transistor, the third transistor including a collector which is connected to the high-potential power supply via the first collector resistor, a base to which a positive-phase signal of a second analog signal is input, and an emitter, and the fourth transistor including a collector connected to the high-potential power supply via the second collector resistor, a base to which a negative-phase signal of the second analog signal is input, and an emitter; a first output terminal that is connected to the collector of the second transistor and the collector of the fourth transistor; a second output terminal that is connected to the collector of the first transistor and the collector of the third transistor; a third differential pair that includes a fifth transistor and a sixth transistor, the fifth transistor including a collector, a base to which a positive-phase signal of a clock signal is input, and an emitter, and the sixth transistor including a collector, a base to which a negative-phase signal of the clock signal is input, and an emitter; a first current source configured to cause a current of a current value I EE  to flow and includes one terminal which is connected to the emitter of the fifth transistor and the emitter of the sixth transistor and the other terminal which is connected to a low-potential power supply; a first emitter resistor that is connected between the emitter of the first transistor and the collector of the fifth transistor; a second emitter resistor that is connected between the emitter of the second transistor and the collector of the fifth transistor; a third emitter resistor that is connected between the emitter of the third transistor and the collector of the sixth transistor; and a fourth emitter resistor that is connected between the emitter of the fourth transistor and the collector of the sixth transistor, wherein a resistance value R EA  of each of the first emitter resistor to the fourth emitter resistor satisfies\n R EA \u00b7I EE \u2265an amplitude of each of the first analog signal and the second analog signal\u2003\u2003(1)

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 2.54321
- Patent Class: 330.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['11943074', '14889127', '13527510', '11038415', '13981313']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7491891494820238
- 35 USC 102 Novelty (BERT): 0.4959271731196656
- Combined Prediction Score: 0.723862951845788
- Mean Citation Score: 223.83871800000003
- Max Citation Score: 254.24689
- Similarity Product: 221.1441801651609

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test