PATENT CLAIM ANALYSIS

Application Number: 15981810
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["711", "103000"]

Abstract:
A system comprises a memory device comprising a plurality of memory cells; and a processing device coupled to the memory device, the processing device configured to iteratively: determine a set of read results based on reading a subset of memory cells according to read levels maintained within optimization trim data, wherein the optimization trim data initially comprises at least one read level in addition to a target trim; calibrate the set of read levels based on the set of read results; and remove the calibrated read levels from the optimization trim data when the calibrated read levels satisfy a calibration condition.

Claim (Index 19):
The method of  claim 11 , wherein:\n removing the target trim comprises generating a reduced trim data for replacing the optimization trim data, wherein the reduced trim data includes trims in the optimization trim data without the removed target trim; and further comprising:\n determining a set of subsequent results based on reading the subset of memory cells according to the reduced trim data instead of the optimization trim data after the target trim is calibrated.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 93.0
- Lexical Diversity: 2.03774
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15981796', '15605858', '15605855', '15605853', '15913575']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4326384469583261
- 35 USC 102 Novelty (BERT): 0.4905905604716056
- Combined Prediction Score: 0.4384336583096541
- Mean Citation Score: 133.69571000000002
- Max Citation Score: 169.09113
- Similarity Product: 112.17669750510692

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test