PATENT CLAIM ANALYSIS

Application Number: 16072222
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "734000"]

Abstract:
Semiconductor packages with electromagnetic interference supported stacked die and a method of manufacture therefor is disclosed. The semiconductor packages may house a stack of dies in a system in a package (SiP) implementation, where one or more of the dies may be wire bonded to a semiconductor package substrate. The dies may be stacked in a partially overlapping, and staggered manner, such that portions of some dies may protrude out over an edge of a die that is below it. This dies stacking may define a cavity, and in some cases, wire bonds may be made to the protruding portions of the die. Underfill material may be provided in the cavity and cured to form an underfill support. Wire bonding of the bond pads overlying the cavity formed by the staggered stacking of the dies may be performed after the formation of the underfill support.

Claim (Index 14):
The method of  claim 11 , wherein providing the under fill epoxy in the cavity further comprises dispensing a predetermined volume of the underfill epoxy adjacent to the cavity.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 95.0
- Lexical Diversity: 1.95062
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13313950', '14330774', '12499788', '14694868', '12882728']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9203695549033106
- 35 USC 102 Novelty (BERT): 0.5057194924662899
- Combined Prediction Score: 0.8789045486596085
- Mean Citation Score: 193.132102
- Max Citation Score: 212.3233
- Similarity Product: 127.18822002138496

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test