PATENT CLAIM ANALYSIS

Application Number: 15876973
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["710", "305000"]

Abstract:
A circuit device includes: a first physical layer circuit to which a first bus compliant with a USB standard is connected; a second physical layer circuit to which a second bus compliant with the USB standard is connected; a processing circuit that performs transfer processing in which a packet received from the first bus via the first physical layer circuit is transferred to the second bus via the second physical layer circuit, and a packet received from the second bus via the second physical layer circuit is transferred to the first bus via the first physical layer circuit; a bus monitor circuit that performs a monitor operation with respect to the first and second buses; and a bus switch circuit that switches on or off a connection between the first bus and the second bus based on a monitor result from the bus monitor circuit.

Claim (Index 10):
The circuit device according to  claim 1 , wherein the processing circuit performs packet bit resynchronization processing in the transfer processing.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 86.0
- Lexical Diversity: 3.23404
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11500250', '11604011', '10766038', '09947565', '12926956']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6859527448503383
- 35 USC 102 Novelty (BERT): 0.487233365067778
- Combined Prediction Score: 0.6660808068720824
- Mean Citation Score: 172.887802
- Max Citation Score: 189.6076
- Similarity Product: 126.62115499231815

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test