PATENT CLAIM ANALYSIS

Application Number: 15875917
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["414", "217000"]

Abstract:
A buffer for use in semiconductor processing tools is disclosed. The buffer may be used to temporarily store wafers after processing operations are performed on those wafers. The buffer may include two side walls and a back wall interposed between the side walls. The side walls and the back wall may generally define an area within which the wafers may be stored in a stacked arrangement. Wafer support fins extending from the side walls and the back wall may extend into a wafer support region that overlaps with the edges of the wafers. Purge gas may be introduced in between each pair of wafers via purge gas ports located in one of the walls.

Claim (Index 1):
A buffer for storing multiple wafers in a semiconductor manufacturing tool, the buffer comprising:\n two opposing side walls; a back wall; at least one heater platen, the at least one heater platen configured to heat one or more walls selected from the group consisting of: a first side wall of the opposing side walls, a second side wall of the opposing side walls, and the back wall; a plurality of support fins; and a plurality of purge gas ports, wherein:\n the two opposing side walls and the back wall define part of an interior buffer volume; \n at least one purge gas port is located between each adjacent pair of support fins; \n the purge gas ports are located in one or more walls selected from the group consisting of: the first side wall, the second side wall, and the back wall; \n the interior buffer volume has an opening opposite the back wall; \n the opposing side walls are between the opening and the back wall; and \n each support fin:\n a) extends from the back wall, along both side walls, and to the opening, \n b) is substantially flat and horizontal when the buffer is in use, \n c) has a wafer support region that is smaller in diameter than the wafers with which the buffer is designed to be used, \n d) extends from the side walls and the back wall in a substantially unbroken manner up to at least the wafer support region, and \n e) has a cutout region that extends from the opening past the center of the wafer support region and that is wide enough in a direction transverse to the opening to allow an end effector of a wafer handling robot to place a wafer on the support fin.

Metadata:
- Claim Count in Document: 53.0
- Percentile: 86.0
- Lexical Diversity: 1.73913
- Patent Class: 414.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14523122', '15285843', '14517623', '14569293', '14479842']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8118383558627044
- 35 USC 102 Novelty (BERT): 0.5942961488670595
- Combined Prediction Score: 0.7900841351631399
- Mean Citation Score: 273.81989
- Max Citation Score: 517.1356
- Similarity Product: 470.7809716779709

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test