PATENT CLAIM ANALYSIS

Application Number: 15878806
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-02
Patent Classification: ["365", "185130"]

Abstract:
A memory device includes a substrate, channel structures disposed over the substrate and extending in a first direction perpendicular to a top surface of the substrate, a plurality of gate lines surrounding the channel structures and stacked over the substrate along the first direction, and a wiring line disposed at the same layer as at least one of the gate lines.

Claim (Index 7):
The memory device according to  claim 6 , further comprising:\n a block decoder disposed at one side of the gate lines and the at least one wiring line in the second direction; and a pass transistor disposed at the other side of the gate lines and the at least one wiring line in the second direction, coupled to one of the gate lines and electrically coupled to the block decoder through the at least one wiring line, and transferring an operation voltage to the gate line in response to a block select signal provided from the block decoder.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 86.0
- Lexical Diversity: 1.75676
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15792983', '15856933', '10944910', '15586307', '15792965']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7875032221532408
- 35 USC 102 Novelty (BERT): 0.4812885684964815
- Combined Prediction Score: 0.7568817567875649
- Mean Citation Score: 191.060012
- Max Citation Score: 205.12762
- Similarity Product: 143.73386170772554

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test