PATENT CLAIM ANALYSIS

Application Number: 15743745
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["712", "222000"]

Abstract:
A data processing system ( 2 ) supports vector processing operations performed upon vector operands comprising a plurality of vector operand elements. The data processing system includes a processor ( 4 ) having an instruction decoder ( 14 ) which decodes mixed-element-sized vector arithmetic instructions to generate control signals ( 16 ) which control processing circuitry ( 18 ) to perform arithmetic operations upon a first vector of first source operand elements a i  of a first bit size A, and a second vector of second source operand elements b j  of a second bit size B. The second bit size B is greater than the first bit size A.

Claim (Index 7):
Apparatus as claimed in  claim 6 , wherein said first source operand elements are binary number values, said second source operand elements are binary number values and said destination operand elements are destination operand binary number values.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 86.0
- Lexical Diversity: 2.0
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16081147', '15833372', '13353805', '14582968', '13439161']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6164185872565808
- 35 USC 102 Novelty (BERT): 0.4970037167971433
- Combined Prediction Score: 0.604477100210637
- Mean Citation Score: 240.07712
- Max Citation Score: 258.1912
- Similarity Product: 192.4095552751064

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test