PATENT CLAIM ANALYSIS

Application Number: 16000174
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["257", "632000"]

Abstract:
The present disclosure relates to semiconductor structures and, more particularly, to interconnect structures with reduced capacitance and methods of manufacture. The method includes: forming one or more lower metal lines in a dielectric material; forming an airgap structure in an upper dielectric material above the one or more lower metal lines, by subjecting material to a curing process; and forming an upper metal structure above the airgap structure.

Claim (Index 8):
The method of  claim 1 , wherein the etching of the trench damages the upper dielectric material, and the UV curing process repairs the etch damage to the upper dielectric material caused by forming the trench.

Metadata:
- Claim Count in Document: 28.0
- Percentile: 94.0
- Lexical Diversity: 1.76744
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15901411', '15817629', '15875212', '15377592', '14667085']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9122519214060874
- 35 USC 102 Novelty (BERT): 0.5262290652343801
- Combined Prediction Score: 0.8736496357889166
- Mean Citation Score: 242.426814
- Max Citation Score: 283.54254
- Similarity Product: 168.43494470816373

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test