PATENT CLAIM ANALYSIS

Application Number: 15768536
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["365", "222000"]

Abstract:
A volatile memory device includes a memory array of volatile charge storage cells, a counter to track a time since the volatile memory device has received a read/write command and a control element to automatically change the volatile memory device to a lower power state based on the time tracked by the counter.

Claim (Index 14):
A storage system comprising:\n a memory controller; a volatile memory device; a data bus connecting the memory controller and the memory device; and a command/address bus connecting the memory controller in the memory device, wherein the volatile memory device comprises: a memory array of volatile charge storage cells; a counter to track a time since the volatile memory device has received a read/write command; a control element to automatically change the volatile memory device to a lower power state based on a signal from the counter.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 91.0
- Lexical Diversity: 1.57143
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14858140', '13286713', '13800637', '10871848', '13720998']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7676438042006677
- 35 USC 102 Novelty (BERT): 0.4460632115096759
- Combined Prediction Score: 0.7354857449315686
- Mean Citation Score: 118.892176
- Max Citation Score: 122.77844
- Similarity Product: 94.94717926516056

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test