PATENT CLAIM ANALYSIS

Application Number: 16188217
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-08
Patent Classification: ["341", "143000"]

Abstract:
The present invention provides an ADC for receiving at least an input signal to generate a digital output signal, wherein the ADC includes an input terminal and a plurality of output terminals, the input terminal is arranged to receive the input signal, and each of the output terminals is configured to output one bit of the digital output signal. The ADC is controlled to operate in a normal mode or a low power mode, and when the ADC operates in the normal mode, all of the output terminals are enabled to output the bits to form the digital output signal; and when the ADC operates in the low power mode, only a portion of the output terminals are enabled to output the bits to form the digital output signal.

Claim (Index 7):
The ADC of  claim 4 , wherein the quantizer comprises a plurality of comparators, each comparator is configured to generate one bit of the digital output signal, and at least a portion of the comparators are controlled to be enabled or disabled according to the normal mode or the low power mode of the ADC.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 98.0
- Lexical Diversity: 2.65385
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15847403', '15007368', '14715022', '13068435', '15103256']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6078288208012554
- 35 USC 102 Novelty (BERT): 0.5011448825208679
- Combined Prediction Score: 0.5971604269732167
- Mean Citation Score: 206.036342
- Max Citation Score: 217.56018
- Similarity Product: 150.5305401585746

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test