PATENT CLAIM ANALYSIS

Application Number: 15921480
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["327", "115000"]

Abstract:
Circuitry capable of performing fractional clock multiplication by using an injection-locked oscillator is described. Some embodiments described herein perform fractional clock multiplication by periodically changing the injection location, from a set of injection locations, where the injection signal is injected and/or by periodically changing a phase, from a set of phases, of the injection signal that is injected into the ILO.

Claim (Index 30):
The method of  claim 29 , wherein a delay-locked loop is used for maintaining the constant ratio between the natural oscillation frequency of the ILO and the first clock frequency of the first clock signal.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 90.0
- Lexical Diversity: 1.76316
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15632045', '14960065', '13686175', '14482782', '14651571']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7972568352944116
- 35 USC 102 Novelty (BERT): 0.5274012502813837
- Combined Prediction Score: 0.7702712767931089
- Mean Citation Score: 319.813502
- Max Citation Score: 352.7344
- Similarity Product: 246.82043218832013

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test