PATENT CLAIM ANALYSIS

Application Number: 16058451
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-07
Patent Classification: ["257", "459000"]

Abstract:
A semiconductor package includes a first semiconductor chip. A second semiconductor chip is below the first semiconductor chip. A third semiconductor chip is below the second semiconductor chip. The second semiconductor chip includes a first surface in direct contact with the first semiconductor chip, and a second surface facing the third semiconductor chip. A first redistribution pattern is on the second surface of the second semiconductor chip and is electrically connected to the third semiconductor chip. The third semiconductor chip includes a third surface facing the second semiconductor chip. A conductive pad is on the third surface.

Claim (Index 14):
The package of  claim 13 , wherein the second semiconductor chip further comprises:\n a wiring line in the second insulation layer; a through via penetrating the second semiconductor substrate and electrically connecting the wiring line and the first redistribution pattern; a second surface facing the third semiconductor chip; and a second redistribution pattern on the second surface.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 96.0
- Lexical Diversity: 3.3871
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15786698', '14331069', '15786676', '15867075', '15681839']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9286226721192332
- 35 USC 102 Novelty (BERT): 0.5004907859875545
- Combined Prediction Score: 0.8858094835060654
- Mean Citation Score: 246.002118
- Max Citation Score: 253.76788
- Similarity Product: 186.3504106143808

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test