PATENT CLAIM ANALYSIS

Application Number: 15888517
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["365", "051000"]

Abstract:
Some embodiments relate to an SRAM cell layout including upper and lower cell edges and left and right cell edges. A first power rail extends generally in parallel with and lies along the left cell edge or the right cell edge. The first power rail is coupled to a first power supply. A second power rail extends generally in parallel with the first power rail and is arranged equidistantly between the left and right cell edges. A first bitline extends in parallel with the first power rail and the second power rail and is arranged to a first side of the second power rail. A second bitline, which is complementary to the first bitline, extends in parallel with the first power rail and the second power rail and is arranged to a second side of the second power rail.

Claim (Index 6):
The SRAM of  claim 1 , further comprising:\n two wordlines extending generally in parallel with the upper and lower cell edges over the SRAM cell and extending perpendicular to the first and second power rails, wherein only one of the two wordlines is coupled to gates of respective access transistors within the SRAM cell layout.

Metadata:
- Claim Count in Document: 31.0
- Percentile: 88.0
- Lexical Diversity: 3.26667
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15172555', '15249885', '15214790', '15858194', '11171033']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7851456167865817
- 35 USC 102 Novelty (BERT): 0.4709087605489906
- Combined Prediction Score: 0.7537219311628226
- Mean Citation Score: 191.405418
- Max Citation Score: 201.48242
- Similarity Product: 158.2648472082341

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test