PATENT CLAIM ANALYSIS

Application Number: 15980269
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-12
Patent Classification: ["345", "213000"]

Abstract:
A display apparatus includes a timing controller and a gate-driver on array (GOA) control circuit. The timing controller generates a frame synchronization signal. The GOA control circuit is coupled to the timing controller and includes a scan signal management circuit and a level shifter. The scan signal management circuit generates a scan signal management signal according to the frame synchronization signal, a predetermined panel parameter, and an operation clock signal. The scan signal management circuit includes a storage unit which stores the predetermined panel parameter. The level shifter generates a scan control signal according to the scan signal management signal to control a GOA of a display panel circuit. The GOA generates a gate driving signal to control a vertical scan operation of the display panel circuit.

Claim (Index 15):
The GOA control circuit of  claim 12 , wherein the operation clock signal is not provided from outside the GOA control circuit.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 93.0
- Lexical Diversity: 3.0
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15217060', '15915984', '15575157', '15324700', '15011502']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6738223142923084
- 35 USC 102 Novelty (BERT): 0.510762474497924
- Combined Prediction Score: 0.65751633031287
- Mean Citation Score: 215.11486800000003
- Max Citation Score: 221.93932
- Similarity Product: 124.54060441193104

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test