PATENT CLAIM ANALYSIS

Application Number: 16126835
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["257", "741000"]

Abstract:
Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die and a package layer partially or completely encapsulating the semiconductor die. The chip package also includes a conductive feature penetrating through the package layer. The chip package further includes an interfacial layer the interfacial layer continuously surrounds the conductive feature. The interfacial layer is between the conductive feature and the package layer, and the interfacial layer is made of a metal oxide material.

Claim (Index 9):
The method of  claim 1 , wherein the package layer and the interfacial layer have an undulating interface.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 97.0
- Lexical Diversity: 2.26316
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15458378', '14881840', '14990012', '15640684', '14087466']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9229038361868468
- 35 USC 102 Novelty (BERT): 0.5048215701336433
- Combined Prediction Score: 0.8810956095815263
- Mean Citation Score: 215.572326
- Max Citation Score: 266.2939
- Similarity Product: 195.7136398737788

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test