PATENT CLAIM ANALYSIS

Application Number: 15961568
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "494000"]

Abstract:
In a semiconductor device including a low lifetime region of a depth within a range on both sides sandwiching a p-n junction of a p-type semiconductor region bottom portion, the low lifetime region includes a central region that has a portion coinciding with the semiconductor region as seen from one main surface side and is selectively formed as far as the position of a contact end portion of a region of the coinciding portion with which the semiconductor region and a metal electrode are in contact, a peripheral region wherein the central region extends as far as the position of an outer peripheral end of the semiconductor region, and an expanded end portion region wherein the peripheral region extends as far as an outer peripheral end of the innermost of guard rings. Because of this, it is possible to reduce leakage current while maintaining high reverse recovery current resistance.

Claim (Index 12):
The semiconductor device according to  claim 8 , wherein\n the junction termination structure region includes a second conductivity type guard ring.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 91.0
- Lexical Diversity: 2.12329
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14103289', '09705648', '11080367', '15246595', '12367540']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9305182460646408
- 35 USC 102 Novelty (BERT): 0.5453805313208462
- Combined Prediction Score: 0.8920044745902613
- Mean Citation Score: 292.773642
- Max Citation Score: 404.89288
- Similarity Product: 302.2493072096729

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test