PATENT CLAIM ANALYSIS

Application Number: 16110587
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["710", "105000"]

Abstract:
A method and system for implementing high-speed electrical interfaces between semiconductor dies in optical communication systems are disclosed and may include communicating electrical signals between a first die and a second die via coupling pads which may be located in low impedance points in Tx and Rx paths. The electrical signals may be communicated via one or more current-mode, controlled impedance, and/or capacitively-coupled interfaces. The current-mode interface may include a cascode amplifier stage split between source and drain terminals of transistors on the dies. The controlled-impedance interfaces may include transmission line drivers on a first die and transmission lines on a second die. The capacitively-coupled interfaces may include capacitors formed by contact pads on the dies. The coupling pads may be connected via one or more of: wire bonds, metal pillars, solder balls, or conductive resin. The dies may comprise CMOS and may be coupled in a flip-chip configuration.

Claim (Index 14):
A system for processing signals, the system comprising:\n a communication system comprising a first die and a second die, said first die and said second die comprising circuitry that is operable to communicate electrical signals between said first die and said second die via coupling pads on said first die and said second die, wherein said coupling pads are located at low impedance points between two transistors in one or more transmit paths and/or one or more receive paths in said communication system, wherein a first of said two transistors is integrated in said first die and a second of said two transistors is integrated in said second die.

Metadata:
- Claim Count in Document: 68.0
- Percentile: 96.0
- Lexical Diversity: 1.90588
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15716103', '13033439', '14324544', '13894052', '12500465']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6171691932750883
- 35 USC 102 Novelty (BERT): 0.4770564692545567
- Combined Prediction Score: 0.6031579208730352
- Mean Citation Score: 174.648598
- Max Citation Score: 241.0968
- Similarity Product: 227.00381939492223

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test