PATENT CLAIM ANALYSIS

Application Number: 15907547
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["363", "131000"]

Abstract:
A multi-level converter includes a plurality of capacitors coupled in series between first and second nodes of a DC port and coupled to one another at n-2 first intermediate nodes. The converter also includes a switching circuit including at least one first switch configured to couple the first node of the DC port to an input/output node, at least one second switch configured to couple the second node of the DC port to the input/output node, and at least three third switches configured to couple respective ones of the first intermediate nodes to the input/output node. The converter further includes a control circuit configured to control the first, second and third switches to provide an n-level converter.

Claim (Index 7):
The multi-level converter of  claim 5 , wherein the transistors of the first, second, third, fourth and fifth switch branches comprise transistors having respective diodes coupled in parallel therewith.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 88.0
- Lexical Diversity: 2.5625
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12651433', '13642456', '15182746', '15610120', '15537919']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8450072953715501
- 35 USC 102 Novelty (BERT): 0.4905641561292858
- Combined Prediction Score: 0.8095629814473236
- Mean Citation Score: 226.0367
- Max Citation Score: 228.3491
- Similarity Product: 170.2209628525853

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test