PATENT CLAIM ANALYSIS

Application Number: 15937863
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["711", "103000"]

Abstract:
A data reading method and a storage controller for a rewritable non-volatile memory module are provided. The method includes identifying a plurality of preset bit values corresponding to a plurality of first memory cells of a first physical unit; reading the first memory cells by respectively using a plurality of preset read voltages to obtain a plurality of read bit values corresponding to the first memory cells; adjusting the preset read voltages based on the identified preset bit values and the read bit values corresponding to the first memory cells to obtain a plurality of optimized read voltages; and executing a read command sequence on the first physical unit by using the optimized read voltages.

Claim (Index 3):
The data reading method as claimed in  claim 2 , wherein obtaining the total displacements respectively corresponding to the preset read voltages based on the read bit values and the identified preset bit values corresponding to the first memory cells comprises:\n choosing a preset read voltage of the preset read voltages that is not chosen, wherein the preset read voltage is set to distinguish between threshold voltage distributions of a first storage status and a second storage status that are adjacent in the storage statuses; identifying a first preset bit value corresponding to the first storage status from the preset bit values and a plurality of second memory cells corresponding to the first preset bit value from the first memory cells; identifying a plurality of first read bit values read from the second memory cells in the read bit values; calculating a total number of one or more second read bit values indicating the second storage status in the first read bit values as a first value; identifying a second preset bit value corresponding to the second storage status from the preset bit values and a plurality of third memory cells corresponding to the second preset bit value from the first memory cells; identifying a plurality of third read bit values read from the third memory cells in the read bit values; calculating a total number of one or more fourth read bit values indicating the first storage status in the third read bit values as a second value; and adopting a difference obtained by subtracting the second value from the first value as the total displacement corresponding to the chosen preset read voltage.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 90.0
- Lexical Diversity: 2.6087
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15472293', '14018436', '13108004', '15867719', '13901571']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5560812468404654
- 35 USC 102 Novelty (BERT): 0.4778496906469788
- Combined Prediction Score: 0.5482580912211168
- Mean Citation Score: 217.003258
- Max Citation Score: 226.62685
- Similarity Product: 191.9248864556104

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test