PATENT CLAIM ANALYSIS

Application Number: 16048822
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "401000"]

Abstract:
A semiconductor device includes a semiconductor base. A dielectric isolation structure is formed in the semiconductor base. A source/drain of a FinFET transistor is formed on the semiconductor base. A bottom segment of the source/drain is embedded into the semiconductor base. The bottom segment of the source/drain has a V-shaped cross-sectional profile. The bottom segment of the source/drain is separated from the dielectric isolation structure by portions of the semiconductor base.

Claim (Index 4):
The semiconductor device of  claim 1 , further comprising: a second dielectric structure disposed over the semiconductor material, wherein the second dielectric structure has a greater depth than the first dielectric structure.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 95.0
- Lexical Diversity: 2.40625
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15235899', '15635308', '14460438', '14885272', '14207848']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9150946879311468
- 35 USC 102 Novelty (BERT): 0.482281244203274
- Combined Prediction Score: 0.8718133435583596
- Mean Citation Score: 178.241446
- Max Citation Score: 218.28888
- Similarity Product: 172.67765640728473

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test