PATENT CLAIM ANALYSIS

Application Number: 15978443
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "774000"]

Abstract:
Disclosed herein is a circuit board that includes a first insulating layer having an upper surface; a first wiring layer embedded in the first insulating layer, the first wiring layer having an upper surface exposed from the upper surface of the first insulating layer such that the upper surface of the first wiring layer is substantially coplanar with the upper surface of the first insulating layer; a semiconductor IC mounted on the upper surface of the first wiring layer with a die attach material interposed therebetween; and a second insulating layer stacked on the upper surface of the first wiring layer so as to embed the semiconductor IC, wherein a bottom surface of the die attach material is in contact with both of the upper surface of the first insulating layer and the upper surface of the first wiring layer.

Claim (Index 14):
The circuit board as claimed in  claim 12 , wherein the die attach material comprises a die attach film thicker than the semiconductor IC.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 93.0
- Lexical Diversity: 2.97959
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13031735', '11136110', '12758908', '11907889', '11964355']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9069165405479797
- 35 USC 102 Novelty (BERT): 0.504966563176376
- Combined Prediction Score: 0.8667215428108193
- Mean Citation Score: 191.324026
- Max Citation Score: 201.29709
- Similarity Product: 129.03974400019172

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test