PATENT CLAIM ANALYSIS

Application Number: 16041648
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-03
Patent Classification: ["341", "143000"]

Abstract:
The present invention provides a fractional-N frequency synthesizer comprising a divider controller comprising a multistage noise Shaping (MASH) digital delta-sigma modulator comprising L stages, wherein the Lth stage is configured to receive as an input a high amplitude dither signal.

Claim (Index 6):
The fractional-N frequency synthesizer of  claim 5 , wherein the MASH 1-1-1 architecture with additive first-order dither comprises a first stage, a second stage and a third stage, and wherein the third stage of the MASH architecture is configured to receive as an input the sum of the output of the preceding stage and the high amplitude dither signal.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 95.0
- Lexical Diversity: 1.12821
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14326816', '13715529', '10638529', '14952138', '14326822']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6680026189739264
- 35 USC 102 Novelty (BERT): 0.5348676857952535
- Combined Prediction Score: 0.6546891256560592
- Mean Citation Score: 335.92144800000005
- Max Citation Score: 348.6191
- Similarity Product: 219.8611389081955

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test