PATENT CLAIM ANALYSIS

Application Number: 16032752
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["341", "172000"]

Abstract:
A differential digital-to-analog (DAC) circuit that can include a reservoir capacitor and various switches to couple the bottom plates of the input capacitors, e.g., bit-trial capacitors, to reference voltages, e.g., REF+ or REF−. In this manner, the reservoir capacitor can be used to provide any differential charge to the input capacitors, e.g., bit-trial capacitors, and the reference voltages, e.g., REF+ and REF−, can be used to provide any common mode charge to the input capacitors.

Claim (Index 14):
The method of  claim 11 , wherein each of the input capacitors includes a first plate and a second plate,\n wherein setting the pair of input capacitors in the differential configuration based on the decision of the comparator includes setting the first plates of the input capacitors to one of two states in a first set of states: 01 and 10, and wherein setting the pair of input capacitors in the common-mode configuration based on the decision of the comparator includes setting the first plates of the input capacitors to one of two states in a second set of two states: 11 and 00.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 95.0
- Lexical Diversity: 2.11628
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15213078', '15983658', '14949423', '11633368', '12113307']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6623278484690254
- 35 USC 102 Novelty (BERT): 0.5410816136778028
- Combined Prediction Score: 0.6502032249899031
- Mean Citation Score: 342.28174
- Max Citation Score: 369.75043
- Similarity Product: 262.42386499962925

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test