PATENT CLAIM ANALYSIS

Application Number: 15741753
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["257", "059000"]

Abstract:
The present application discloses A thin film transistor (TFT), including: a substrate; a source-drain layer comprising a source electrode and a drain electrode over the substrate; and an active layer comprising a poly-Si pattern and an amorphous-Si pattern having contact with the poly-Si pattern over the substrate. The amorphous-Si pattern is between the poly-Si pattern and the source-drain layer; the source electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in a direction substantially perpendicular to a surface of the substrate; and the drain electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in the direction substantially perpendicular to the surface of the substrate.

Claim (Index 14):
The method according to  claim 13 , wherein performing a patterning process over the source-drain metal layer, the ohmic contact material layer, and the poly-Si layer to form the source-drain layer, the source contact pattern, the drain contact pattern, and the poly-Si pattern comprises:\n forming a photoresist layer over the source-drain metal layer; applying a halftone mask over the photoresist layer to obtain a photoresist pattern, the photoresist pattern including a first photoresist region, a second photoresist region, and a photoresist-fully-removed region, the first photoresist region corresponding to a to-be-formed source-drain layer, the second photoresist region corresponding to a region between the source electrode and the drain electrode in the to-be-formed source-drain layer, and the photoresist-fully-removed region corresponding to other regions; performing an etching process on a portion of the source-drain metal layer, the ohmic contact material layer and the poly-Si layer each corresponding to the photoresist-fully-removed region, to obtain an initial ohmic contact pattern, an initial source-drain layer and the poly-Si pattern; removing photoresist in the second photoresist region; performing an etching process on a portion of the initial source-drain layer and the initial ohmic contact pattern each corresponding to the second photoresist region, to obtain the source-drain layer, the drain contact pattern, and the source contact pattern; and removing photoresist in the first photoresist region.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 86.0
- Lexical Diversity: 2.56522
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15704588', '12753732', '15309949', '15809673', '15521471']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.932599657419934
- 35 USC 102 Novelty (BERT): 0.5025996252200846
- Combined Prediction Score: 0.889599654199949
- Mean Citation Score: 246.863866
- Max Citation Score: 264.90216000000004
- Similarity Product: 197.5496674252796

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test