PATENT CLAIM ANALYSIS

Application Number: 16000015
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-12
Patent Classification: ["438", "758000"]

Abstract:
A method for fabricating a nonvolatile charge trap memory device is described. The method includes subjecting a substrate to a first oxidation process to form a tunnel oxide layer overlying a polysilicon channel, and forming over the tunnel oxide layer a multi-layer charge storing layer comprising an oxygen-rich, first layer comprising a nitride, and an oxygen-lean, second layer comprising a nitride on the first layer. The substrate is then subjected to a second oxidation process to consume a portion of the second layer and form a high-temperature-oxide (HTO) layer overlying the multi-layer charge storing layer. The stoichiometric composition of the first layer results in it being substantially trap free, and the stoichiometric composition of the second layer results in it being trap dense. The second oxidation process can comprise a plasma oxidation process or a radical oxidation process using In-Situ Steam Generation.

Claim (Index 35):
The memory device of  claim 32 , wherein the high K dielectric material in at least one of the blocking dielectric layer and the second nitride layer is a hafnium based high-K dielectric material.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 94.0
- Lexical Diversity: 2.23188
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14605231', '13539458', '15252059', '12197466', '12124855']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8751315041936367
- 35 USC 102 Novelty (BERT): 0.5468573795600593
- Combined Prediction Score: 0.842304091730279
- Mean Citation Score: 363.469206
- Max Citation Score: 395.89706
- Similarity Product: 265.92549493956693

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test