PATENT CLAIM ANALYSIS

Application Number: 16109621
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["714", "801000"]

Abstract:
In one embodiment, a system includes logic configured to receive data comprising a plurality of data elements, where each data element comprises one or more bits. Further, the logic is configured to output bursts of data comprising the plurality of data elements along with a number of parity bits equal to a number of data elements in the plurality of data elements received from a first parity module to an input of a data path. Further still, the system includes a binary sequence generator configured to create a binary sequence comprising a plurality of bonus bits in a pseudo-random pattern that has less than a predetermined chance of matching any sequence of bits in the data while in the data path. Further still, the first parity module is configured to provide a parity calculation prior to passing the plurality of data elements to the input of the data path.

Claim (Index 4):
The system as recited in  claim 2 , wherein the bursts of data received at the output of the data path have burst sizes that are equal to a burst size of the bursts of data that entered the input of the data path.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 96.0
- Lexical Diversity: 2.50794
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15399646', '14280424', '10874139', '10608320', '12038886']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3149836784125315
- 35 USC 102 Novelty (BERT): 0.5348907997285153
- Combined Prediction Score: 0.3369743905441298
- Mean Citation Score: 245.668756
- Max Citation Score: 373.93228
- Similarity Product: 363.8223529374552

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test