PATENT CLAIM ANALYSIS

Application Number: 16108899
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "401000"]

Abstract:
Transistors might include first and second semiconductor fins, a first source/drain region in the first semiconductor fin and extending downward from an uppermost surface of the first semiconductor fin, a second source/drain region in the second semiconductor fin and extending downward from an uppermost surface of the second semiconductor fin, a dielectric between the first and second semiconductor fins and adjacent to sidewalls of the first and second semiconductor fins, and a control gate over the dielectric and between the first and second semiconductor fins and extending to a level below upper surfaces of the first and second source/drain regions.

Claim (Index 11):
The transistor of  claim 10 , wherein an upper surface of the second dielectric is above the uppermost surfaces of the first and second semiconductor fins, and wherein an upper surface of the control gate is flush with the upper surface of the second dielectric.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 96.0
- Lexical Diversity: 2.91667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14294266', '15391699', '15005424', '15794567', '14754400']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9189881086680104
- 35 USC 102 Novelty (BERT): 0.5124108299661149
- Combined Prediction Score: 0.8783303807978208
- Mean Citation Score: 193.851456
- Max Citation Score: 287.9947200000001
- Similarity Product: 208.1614897273637

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test