PATENT CLAIM ANALYSIS

Application Number: 15897924
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-11
Patent Classification: ["326", "087000"]

Abstract:
Circuits and methods are provided. The circuits and methods are for providing a supply voltage to a dynamic internal power supply node of a group of other circuits. A circuit includes a first transistor and a second transistor, of different channel types, coupled in parallel to a static power supply that supplies a constant power supply voltage. The circuit further includes a magnetic inductor having a first terminal connected to a common node between the first transistor and the second transistor and a second terminal connected to the dynamic internal power supply node, to supply the dynamic internal power supply node with a boosted voltage having a magnitude greater than a magnitude of the constant power supply voltage by resonating with at least one capacitance coupled to the dynamic internal power supply node.

Claim (Index 5):
The circuit of  claim 4 , wherein the second phase of the boost clock is provided at a timing corresponding to an evaluation time for the dynamic logic circuits and the state changes for the static logic circuits to provide the boost voltage during the evaluation time and the state changes.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 88.0
- Lexical Diversity: 2.41379
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15897837', '15597978', '14807064', '14828715', '13615843']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7330896781710604
- 35 USC 102 Novelty (BERT): 0.5510764343505364
- Combined Prediction Score: 0.7148883537890081
- Mean Citation Score: 353.7051600000001
- Max Citation Score: 418.17023
- Similarity Product: 413.0800444447309

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test