PATENT CLAIM ANALYSIS

Application Number: 16039975
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "324000"]

Abstract:
The inventive concepts relate to a semiconductor memory device. The semiconductor memory device includes a substrate including a circuit region and first and second connection regions respectively disposed at both sides of the circuit region opposite to each other, a logic structure including a logic circuit disposed on the circuit region and a lower insulating layer covering the logic circuit, and a memory structure on the logic structure. The logic circuit includes a first page buffer disposed adjacently to the first connection region and a second page buffer disposed adjacently to the second connection region. The memory structure includes bit lines extending onto at least one of the first and second connection regions.

Claim (Index 8):
A semiconductor memory device, comprising:\n a substrate comprising an upper surface that extends in a first direction and in a second direction that is perpendicular to the first direction; a logic circuit comprising a first page buffer on the upper surface of the substrate; a memory cell array on the logic circuit opposite the substrate; a plurality of bit lines on the memory cell array, the bit lines extending in the second direction to at least partly cross the memory cell array, the bit lines comprising first bit lines and second bit lines that are alternately and repeatedly arranged in the first direction; a plurality of first connection conductive pads between the logic circuit and the memory cell array; and a plurality of first connection contacts between respective ones of the first connection conductive pads and respective ones of the first bit lines, wherein the first bit lines are electrically connected to the first page buffer through respective ones of the first connection contacts and respective ones of the first connection conductive pads, wherein a first pitch between the first connection conductive pads is greater than a second pitch between the bit lines, and wherein an average width in the first direction of one of the first connection conductive pads is greater than an average width in the first direction of one of the first bit lines to which the one of the first connection conductive pads is electrically connected.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 95.0
- Lexical Diversity: 2.53191
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14989955', '14523977', '15087127', '16021775', '14735811']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9166878753787864
- 35 USC 102 Novelty (BERT): 0.5184659235073509
- Combined Prediction Score: 0.8768656801916428
- Mean Citation Score: 243.336852
- Max Citation Score: 337.9989
- Similarity Product: 314.09508825686567

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test