PATENT CLAIM ANALYSIS

Application Number: 15876132
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["365", "072000"]

Abstract:
A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM circuit of the system LSI controls a substrate bias to reduce leakage current.

Claim (Index 50):
A semiconductor device according to  claim 46 ,\n wherein a thickness of a gate insulating film of the second P channel MOS transistor is the same as that of a gate insulating film of the P channel MIS transistor in the logic circuit.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 86.0
- Lexical Diversity: 1.45714
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15478237', '10671513', '12325783', '11500339', '14940654']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8370502556858207
- 35 USC 102 Novelty (BERT): 0.561983393724539
- Combined Prediction Score: 0.8095435694896925
- Mean Citation Score: 405.769406
- Max Citation Score: 449.8904
- Similarity Product: 377.76443415308

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test