PATENT CLAIM ANALYSIS

Application Number: 16110674
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-07
Patent Classification: ["257", "638000"]

Abstract:
A semiconductor package includes a semiconductor chip that includes a first region and a second region spaced apart from the first region; a plurality of connection bumps disposed under the first region of the semiconductor chip; and a protection layer that covers a bottom surface of the semiconductor chip in the second region, wherein the protection layer does not cover the bottom surface of the semiconductor chip in the first region and is not disposed between the plurality of connection bumps. The semiconductor chip of the semiconductor package is protected by the protection layer.

Claim (Index 18):
The semiconductor package of  claim 14 , wherein the first semiconductor chip comprises a passivation layer on a bottom surface of the first semiconductor chip, and the protection layer covers a portion of the passivation layer under a bottom surface of the edge portion of the first semiconductor chip.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 96.0
- Lexical Diversity: 2.53846
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15494942', '15421386', '14328668', '13076605', '15236814']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9282514086172196
- 35 USC 102 Novelty (BERT): 0.4933655586774418
- Combined Prediction Score: 0.8847628236232419
- Mean Citation Score: 234.228494
- Max Citation Score: 239.48518
- Similarity Product: 182.6488570138836

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test