PATENT CLAIM ANALYSIS

Application Number: 16020907
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-11
Patent Classification: ["365", "185120"]

Abstract:
A semiconductor memory device includes a first memory cell which is capable of being set to any one of at least eight threshold voltages, a first bit line, a word line, and a sense amplifier which is connected to the first bit line. A verification operation for verifying the threshold voltage of the first memory cell is performed after a programming operation is performed on the first memory cell, and the verification operation includes seven verification operations. The sense amplifier applies a charging voltage to the first bit line during two of the seven verification operations, and does not apply the charging voltage to the first bit line during the remaining five of the seven verification operations.

Claim (Index 1):
A semiconductor memory device comprising:\n a first memory cell which is capable of being set to any one of at least eight threshold voltages; a first bit line connected to the first memory cell; a word line connected to a gate of the first memory cell; and a sense amplifier connected to the first bit line, wherein a verification operation for verifying the threshold voltage of the first memory cell is performed after a programming operation is performed on the first memory cell, wherein the verification operation includes seven verification operations including\n a first verification operation in which a first voltage is applied to the word line, \n a second verification operation in which a second voltage higher than the first voltage is applied to the word line, \n a third verification operation in which a third voltage higher than the second voltage is applied to the word line, \n a fourth verification operation in which a fourth voltage higher than the third voltage is applied to the word line, \n a fifth verification operation in which a fifth voltage higher than the fourth voltage is applied to the word line, \n a sixth verification operation in which a sixth voltage higher than the fifth voltage is applied to the word line, and \n a seventh verification operation in which a seventh voltage higher than the sixth voltage is applied to the word line, and \n wherein the sense amplifier\n applies a charging voltage to the first bit line during two of the seven verification operations, and \n does not apply the charging voltage to the first bit line during the remaining five of the seven verification operations.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 94.0
- Lexical Diversity: 2.35849
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15405098', '15909404', '15447117', '15411225', '15233658']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7852432909670374
- 35 USC 102 Novelty (BERT): 0.5341663265419934
- Combined Prediction Score: 0.760135594524533
- Mean Citation Score: 303.142962
- Max Citation Score: 377.61566
- Similarity Product: 299.9627688856924

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test