PATENT CLAIM ANALYSIS

Application Number: 15769303
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["136", "258000"]

Abstract:
A photovoltaic device is proposed comprising a silicon-based substrate ( 2 ) having a p-type or n-type doping, with an intrinsic buffer layer ( 4 ) situated on said substrate. A first silicon layer ( 6 ) of a first doping type is situated on predetermined regions ( 4 a ) of the intrinsic buffer layer. The first layer has interstices ( 5 ) between said predetermined regions ( 4 a ). The first silicon layer comprises at least partially a microcrystalline layer at its side away from the substrate. A microcrystalline silicon layer ( 8 ) of a second doping type is situated on said first silicon layer ( 6 ). A third silicon layer ( 10 ) of the second doping type is situated on said intrinsic buffer layer at the interstices, the third silicon layer being amorphous at its side facing said silicon-based substrate and comprising an at least partially microcrystalline layer portion to the side away from the intrinsic buffer layer.

Claim (Index 1):
A photovoltaic device comprising:\n a silicon-based substrate having a p-type or n-type doping and having a first face; an intrinsic buffer layer situated on said first face; a first silicon layer situated on said intrinsic buffer layer, said first silicon layer having a doping of a first type being one of p-type doping or n-type doping, said first silicon layer being a patterned layer situated on predetermined regions of said intrinsic buffer layer and having interstices between said predetermined regions, said first silicon layer comprising an at least partially microcrystalline layer at its side away from said silicon-based substrate; a second, microcrystalline, silicon layer situated on said first silicon layer, said second silicon layer having a doping of a second type being the other of the p-type doping or the n-type doping with respect to said doping of said first silicon layer; a third silicon layer situated on said intrinsic buffer layer at said interstices, said third silicon layer being amorphous at its side facing said silicon-based substrate and having a doping of said second type, said third silicon layer comprising an at least partially microcrystalline layer portion to the side away from said intrinsic buffer layer; and electrically conducting pads situated on said second silicon layer and on said third silicon layer, wherein said second silicon layer and the third silicon layer constitute a single layer, defined as a tunnel layer, with the doping and the thickness of said tunnel layer being chosen so that the second silicon layer does not impede the charge collecting operation of the photovoltaic device.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 91.0
- Lexical Diversity: 2.88333
- Patent Class: 136.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14218416', '13522901', '15077169', '15803650', '13966917']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.809455310287474
- 35 USC 102 Novelty (BERT): 0.510003739393958
- Combined Prediction Score: 0.7795101531981224
- Mean Citation Score: 290.089932
- Max Citation Score: 308.28415
- Similarity Product: 248.8811665644944

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test