PATENT CLAIM ANALYSIS

Application Number: 16123915
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["716", "108000"]

Abstract:
A disclosed system of an emulation environment performs a simulation to construct a waveform of a target signal based on signals traced by an emulator for a time frame including multiple clock cycles. In one embodiment, a simulation is performed in a manner that an input of the logic gate, in a first duration of the time frame at which an output of the logic gate depends on the input, is analyzed to obtain the output, and the input of the logic gate, in a second duration of the time frame at which the output of the logic gate is independent, is omitted. In one aspect, the input of the logic gate is simulated for the first duration based on a periodicity in a waveform of the input in the first duration.

Claim (Index 9):
The system of  claim 7 , wherein the simulation module is further configured to:\n select another input signal of the logic gate to be the reference signal, said another input signal coupled to a predetermined port of the logic gate.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 2.49123
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15278659', '14745239', '15007040', '14507696', '15447010']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3283283318825885
- 35 USC 102 Novelty (BERT): 0.5152573478722039
- Combined Prediction Score: 0.34702123348155
- Mean Citation Score: 235.627084
- Max Citation Score: 346.1858
- Similarity Product: 290.00581120284795

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test