PATENT CLAIM ANALYSIS

Application Number: 15949360
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["257", "762000"]

Abstract:
A solder alloy of the disclosure includes Sb of which a content is in a range of 3 wt % to 30 wt %, Te of which a content is in a range of 0.01 wt % to 1.5 wt %, Au of which a content is in a range of 0.005 wt % to 1 wt %, at least one of Ag and Cu, wherein a content rate of at least one of Ag and Cu in the solder alloy is in a range of 0.1 wt % to 20 wt %; and a content rate of a sum of Ag and Cu in the solder alloy is in a range of 0.1 wt % to 20 wt %; and a balance of Sn.

Claim (Index 2):
A bonded structure,\n wherein a semiconductor device and a circuit board are bonded to each other via a solder bonded layer containing Sb, Te, Au, Sn, and at least one of Ag and Cu, and wherein a SnNi alloy or a SnCu alloy is contained in an interface between a solder bonded layer and each of a metallized layer of the semiconductor device and a plated layer of the circuit board.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 91.0
- Lexical Diversity: 3.21951
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12309382', '11567525', '15300929', '11331220', '09971566']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9149074510835202
- 35 USC 102 Novelty (BERT): 0.4634305152837875
- Combined Prediction Score: 0.869759757503547
- Mean Citation Score: 142.78537
- Max Citation Score: 147.11719
- Similarity Product: 113.78542550855394

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test