PATENT CLAIM ANALYSIS

Application Number: 15908449
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["365", "185030"]

Abstract:
According to one embodiment, a semiconductor memory device includes memory cells, a word line, bit lines, and a controller. The word line is connected to the memory cells. Each of the lines is connected to the memory cells. In a program operation, while applying a program voltage to the word line, the controller applies a first voltage to a bit line connected to memory cells to which a first data is to be written, applies a second voltage lower than the first voltage to a bit line connected to memory cells to which a second data is to be written, and applies a third voltage lower than the second voltage to a bit line connected to memory cells to which a third data is to be written.

Claim (Index 2):
The device of  claim 1 , wherein\n the controller is configured to execute the program in a first program loop in the write.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 88.0
- Lexical Diversity: 3.475
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15174114', '15695470', '14474307', '15700864', '15061967']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8163416082915719
- 35 USC 102 Novelty (BERT): 0.4967451689076587
- Combined Prediction Score: 0.7843819643531805
- Mean Citation Score: 226.22265
- Max Citation Score: 239.73666
- Similarity Product: 158.00141504556655

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test