PATENT CLAIM ANALYSIS

Application Number: 16101009
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-11
Patent Classification: ["327", "156000"]

Abstract:
A phase-locked loop circuit includes a first time-to-digital converter (TDC) to receive an input reference signal, a digital-controlled oscillator (DCO), and a first divider coupled to an output of the DCO. The first divider divides down a frequency of an output from the DCO. A second divider divides down a frequency of an output form the first divider to provide a second divider output to an input of the first TDC. The first TDC generates an output digital value encoding a time difference between corresponding edges of the input reference signal and the second divider output. A second TDC receives the input reference signal. An averager circuit generates a digital output that is indicative of an average of an output from the second TDC. A subtractor circuit subtracts the digital output from the average and the output digital value from the first TDC.

Claim (Index 7):
The phase-locked loop circuit of  claim 1 , further comprising a third divider coupled to the output of the first divider, the third divider to divide down the frequency of the output signal from the first divider, each of the first and second TDCs includes a counter, and each of the counters counts edges of the output of the first divider.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 96.0
- Lexical Diversity: 2.83636
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12235623', '15715315', '12838502', '13962325', '13962184']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7817314021777011
- 35 USC 102 Novelty (BERT): 0.4886942116643121
- Combined Prediction Score: 0.7524276831263622
- Mean Citation Score: 238.363584
- Max Citation Score: 246.9822
- Similarity Product: 188.69403241453168

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test