PATENT CLAIM ANALYSIS

Application Number: 16007363
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-07
Patent Classification: ["711", "154000"]

Abstract:
A semiconductor memory device is configured to input a mode set code and set data on-the-fly in response to a mode set command, process data bit number information a write command to generate a first data signal, process data bit number information with a read command to generate a second data signal in response to the data on-the-fly indicating an enabled state, access a selected memory cell based on a word line selection signal generated using a row address and active command and a column selection signal generated using a column address and write command or read command, process a first quantity of data bits and transmit the first quantity of data bits to the selected memory cell in response to the first data signal, and process data received from the selected memory cell and output a second quantity of data bits in response to the second data signal.

Claim (Index 17):
An electronic device comprising:\n a system on chip configured to apply a chip selection signal and a command and address, and input or output data, in response to a clock signal; and a semiconductor memory device configured to process the chip selection signal and the command and address applied, and input or output the data, in response to the clock signal, wherein the system on chip includes\n a first function device configured to input or output the data using a first bandwidth; \n a second function device configured to input or output the data using a second bandwidth which is greater than the first bandwidth; \n a memory controller configured to control data to be input or output between the first function device and the semiconductor memory device, and control data to be input or output between the second function device and the semiconductor memory device; and \n a central processing unit configured to control the first function device, the second function device, and the memory controller, and \n the semiconductor memory device is further configured to\n process an address included in the command and address as a mode set code and generate data on-the-fly in response to the chip selection signal and a command included in the command and address applied in response to the clock signal indicating a mode set command, \n input a first quantity of bits of data from an external source in response to data bit number information included in the address and further in response to the command being a write command, and \n output a second quantity of bits of data to the external source in response to the data bit number information included in the address and further in response to the command being a read command.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 94.0
- Lexical Diversity: 2.67241
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['11274402', '14225686', '15889539', '14926834', '12167719']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.526565758189427
- 35 USC 102 Novelty (BERT): 0.4808358133174503
- Combined Prediction Score: 0.5219927637022294
- Mean Citation Score: 216.821218
- Max Citation Score: 231.35844
- Similarity Product: 188.5163509071207

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test