PATENT CLAIM ANALYSIS

Application Number: 15925456
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["363", "021020"]

Abstract:
A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.

Claim (Index 10):
A synchronous rectifier driver including a supply voltage node configured to receive a supply voltage, a first gate drive node configured to be coupled to a first gate node of a first power transistor and a second gate drive node configured to be coupled to the second gate drive node of a second power transistor, the synchronous rectifier driver further including a first drive circuit configured to drive the first gate drive node and a second drive circuit configured to drive the second gate drive node, each of the first and second drive circuits including:\n a high-side driver transistor coupled between the supply voltage node and the corresponding gate drive node, and including a high side gate node; and wherein the driver circuit is configured to operate in a first mode to provide a first charge current to the high side gate node until a gate drive voltage on the corresponding gate drive node reaches a first gate drive threshold, the driver circuit configured to then operate in a second mode responsive to the gate drive voltage reaching the first gate drive threshold to provide a second charge current to the high side gate node and to limit the gate drive voltage to a first clamped threshold, the driver circuit further configured to operate in the second mode for a delay time after the gate drive voltage reaches the first gate drive threshold and after expiration of the delay time to operate in a third mode to provide the second charge current to the high side gate node and to limit the gate drive voltage to a second clamped threshold.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 90.0
- Lexical Diversity: 2.90196
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15282459', '12134733', '13801723', '14818699', '12148570']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.831933782851652
- 35 USC 102 Novelty (BERT): 0.5740637712445762
- Combined Prediction Score: 0.8061467816909444
- Mean Citation Score: 274.704616
- Max Citation Score: 482.89554
- Similarity Product: 409.7391747627211

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test