PATENT CLAIM ANALYSIS

Application Number: 15952161
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["340", "013260"]

Abstract:
The disclosure relates to an integrated circuit for a radio-frequency identification (RFID) tag. Example embodiments include an integrated circuit ( 101 ) for an RFID tag, the integrated circuit ( 101 ) comprising: a memory ( 104 ) for storing data; a transceiver ( 107 ) for receiving signals from, and transmitting signals to, an antenna ( 102 ); and a controller ( 103 ) configured to process signals received via the transceiver ( 107 ) and to access data stored in the memory ( 104 ); wherein upon receiving, via the transceiver module ( 107 ), a lock command referring to a data block in the memory ( 104 ), the controller ( 103 ) is configured to generate error correction data for the data block and to store the error correction data in the memory.

Claim (Index 4):
The integrated circuit of  claim 3 , wherein the controller is further configured to delete or over-write previous error correction data associated with the data block when the error correction mode for the data block is de-activated.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 91.0
- Lexical Diversity: 2.55932
- Patent Class: 340.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15952107', '14882212', '14645798', '10290339', '12841744']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6887503531904503
- 35 USC 102 Novelty (BERT): 0.5159813322804992
- Combined Prediction Score: 0.6714734510994552
- Mean Citation Score: 184.024852
- Max Citation Score: 257.67688
- Similarity Product: 170.86099402254104

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test