PATENT CLAIM ANALYSIS

Application Number: 16045956
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["365", "185170"]

Abstract:
A controller controls a memory including first and second strings. The first and second strings configure first and second string groups, respectively. In each string group, a set of memory cell transistors each from each string configures a unit. The controller is configured to: sequentially write, in the first string group, data in first units to which serially-coupled memory cell transistors respectively belong; sequentially write, in the second string group, data in first units to which serially-coupled memory cell transistors respectively belong; and sequentially write, in the first string group, data in second units to which serially-coupled memory cell transistors respectively belong.

Claim (Index 6):
The memory system according to  claim 1 , wherein:\n the nonvolatile semiconductor memory device comprises a block as a unit of data erasing, and the block comprises the first and second strings.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 95.0
- Lexical Diversity: 2.85366
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15230857', '14200641', '13779427', '14847086', '14833719']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7854076024141325
- 35 USC 102 Novelty (BERT): 0.510398496210571
- Combined Prediction Score: 0.7579066917937765
- Mean Citation Score: 238.338484
- Max Citation Score: 317.62735
- Similarity Product: 300.79524825495184

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test