PATENT CLAIM ANALYSIS

Application Number: 16186739
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["365", "185020"]

Abstract:
Apparatus including an array of memory cells and a controller configured to program all memory cells of a grouping of memory cells that are to be respectively programmed to different levels other than a lowest level, corresponding to a lowest data state, to an intermediate level from the lowest level, and to respectively program all the memory cells of the grouping of memory cells that are to be respectively programmed to the different levels other than the lowest level to the different levels other than the lowest level from the intermediate level.

Claim (Index 7):
The memory device of  claim 2 , wherein the method further comprises:\n after applying the subsequent programming pulse to the access line, determining whether any memory cells of the plurality of subsets of memory cells have reached the respective desired data states for their respective subsets of memory cells in response to applying the subsequent programming pulse to the access line.

Metadata:
- Claim Count in Document: 51.0
- Percentile: 98.0
- Lexical Diversity: 2.82353
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15437584', '15933498', '14724945', '13305795', '16023042']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8129966058627823
- 35 USC 102 Novelty (BERT): 0.5344395414049765
- Combined Prediction Score: 0.7851408994170017
- Mean Citation Score: 322.618712
- Max Citation Score: 372.9724
- Similarity Product: 293.1366592752457

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test