PATENT CLAIM ANALYSIS

Application Number: 15913373
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["345", "076000"]

Abstract:
Disclosed herein is a display device, including display elements two-dimensionally disposed in a matrix; scanning lines, initialization control lines, and display control lines extending in a first direction; data lines extending in a second direction different from the first direction; and a scanning drive circuit.

Claim (Index 1):
A display device, comprising:\n a plurality of pixel circuits in a display area; a plurality of first scanning lines; a plurality of second scanning lines; and a plurality of third scanning lines; a scanning circuit facing to a first side of the display area and configured to drive the pixel circuits via the first, the second and the third scanning lines; wherein the scanning circuit includes a plurality of stages and is configured such that: (a) a first stage of the stages receives an input pulse; (b) each of the stages receives a first pulse signal, a second pulse signal and a third pulse signal; (c) a first pulse signal and a second pulse signal are rectangular waves having a same frequency and different phases each other, and (d) the scanning circuit supplies a plurality of output signals in response to the received first, second and third pulse signals, wherein each of the plurality of pixel circuits includes a write transistor, a drive transistor, a first switching transistor, a second switching transistor, a capacitor, and a light emitting element, and wherein a duration of a light emitting period of the respective light emitting element in each of the pixel circuits within one frame period is variably controlled by changing a width of the input pulse, a drive current is supplied from a voltage line to the light emitting element via the first switching transistor and the drive transistor, an initializing potential is supplied from an initializing voltage line to the capacitor via the second switching transistor, a data potential is supplied from a video signal line to the capacitor via the write transistor, a gate terminal of the first switching transistor is connected to the scanning circuit via one of the plurality of first scanning lines, a gate terminal of the write transistor is connected to the scanning circuit via one of the plurality of second scanning lines, and a gate terminal of the second switching transistor is connected to the scanning circuit via one of the plurality of third scanning lines.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 90.0
- Lexical Diversity: 1.73333
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15596463', '15149507', '14541497', '13847025', '12453754']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.762514139158147
- 35 USC 102 Novelty (BERT): 0.5704105107893873
- Combined Prediction Score: 0.7433037763212711
- Mean Citation Score: 494.225082
- Max Citation Score: 503.96622
- Similarity Product: 384.8361712180066

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test