PATENT CLAIM ANALYSIS

Application Number: 15745854
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["711", "166000"]

Abstract:
Provided is a storage apparatus including a plurality of storage devices which store data, a controller which executes data input/output processing to the storage devices, and a processor which transmits/receives information with the controller, wherein the controller manages a plurality of different tag numbers by separating the tag numbers into a plurality of groups, and upon receiving a first command from the processor, assigns a tag number belonging to one group among the plurality of groups to the first command, and transfers the first command to a designated storage device, and, upon subsequently receiving an instruction for a chip reset from the processor, executes a chip reset, and, upon subsequently receiving a second command from the processor, assigns a tag number belonging to a group which is different from the group used before the chip reset to the second command, and transfers the second command to a designated storage device.

Claim (Index 9):
The storage apparatus according to  claim 5 ,\n wherein the processor: adds IO group information for identifying one group among the plurality of IO groups to an IO request before issuing the instruction of the chip reset, and adds, to an IO request after issuing the instruction of the chip reset, IO group information for identifying another group which is different from the group belonging to the IO group information added to the IO request before issuing the instruction of the chip reset among the plurality of IO groups; and adds task group information for identifying one group among the plurality of task groups to a task request before issuing the instruction of the chip reset, and adds, to a task request after issuing the instruction of the chip reset, task group information for identifying another group which is different from the group belonging to the task group information added to the task request before issuing the instruction of the chip reset the plurality of task groups, and wherein, upon receiving the IO request or the task request from the processor before or after the chip reset, the controller identifies the group according to the IO group information added to the received IO request or the task group information added to the received task request.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 2.87719
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13002945', '12311520', '14619901', '12691752', '11331115']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4810653490896905
- 35 USC 102 Novelty (BERT): 0.4975240632036176
- Combined Prediction Score: 0.4827112205010833
- Mean Citation Score: 164.991954
- Max Citation Score: 168.17844
- Similarity Product: 105.78103237411736

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test