PATENT CLAIM ANALYSIS

Application Number: 15996996
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["341", "155000"]

Abstract:
An analog to digital converting circuit includes a correlated double sampling circuit (CDS) that compares a pixel signal with a ramp signal, and outputs a comparison signal, a timing amplifier that increases an active time of the comparison signal “N” times, and outputs an extended signal, wherein the “N” is a positive integer, and a counter that outputs a digital signal corresponding to the pixel signal in response to the extended signal and a first clock signal.

Claim (Index 20):
The method of  claim 19 , wherein a value of the \u201cN\u201d or a value of the \u201cM\u201d is adjusted according to an operation mode of the analog to digital converting circuit,\n wherein, if the operation mode of the analog to digital converting circuit is a high-performance mode, the value of the \u201cN\u201d is adjusted to be greater than the value of the \u201cM\u201d, and \n if the operation mode of the analog to digital converting circuit is a low-power mode, the value of the \u201cN\u201d is adjusted to be smaller than or equal to the value of the \u201cM\u201d.

Metadata:
- Claim Count in Document: 30.0
- Percentile: 94.0
- Lexical Diversity: 1.85417
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14854245', '13276927', '14692787', '13116551', '12590830']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6250598462502815
- 35 USC 102 Novelty (BERT): 0.5161184250076591
- Combined Prediction Score: 0.6141657041260193
- Mean Citation Score: 239.755198
- Max Citation Score: 245.302
- Similarity Product: 149.17039713013168

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test