PATENT CLAIM ANALYSIS

Application Number: 15971253
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-04
Patent Classification: ["257", "678000"]

Abstract:
A semiconductor package includes a first semiconductor chip on a first substrate, a first mold layer provided on the first substrate to cover a side surface of the first semiconductor chip, a solder structure provided on the first substrate, and a second substrate provided on the solder structure. A guide receptacle is formed at one of a top surface of the first mold layer and a bottom surface of the second substrate, a first alignment protrusion is formed at the other of the top surface of the first mold layer and the bottom surface of the second substrate, and at least a portion of the first alignment protrusion is provided in the guide receptacle.

Claim (Index 9):
The semiconductor package of  claim 1 , wherein the second substrate is formed of an insulating material, and the first alignment protrusion comprises the same insulating material as the second substrate.

Metadata:
- Claim Count in Document: 30.0
- Percentile: 93.0
- Lexical Diversity: 3.18421
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13922722', '15818346', '14682113', '15207496', '15956414']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9308742770374668
- 35 USC 102 Novelty (BERT): 0.4966642559614296
- Combined Prediction Score: 0.8874532749298631
- Mean Citation Score: 250.488332
- Max Citation Score: 258.18317
- Similarity Product: 208.0497745725823

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test