PATENT CLAIM ANALYSIS

Application Number: 15979467
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["365", "185030"]

Abstract:
A method for accessing a flash memory module is provided. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least one super block of the flash memory chips; and allocating a buffer memory space to store a plurality of temporary parities generated when data is written into the at least one first super block.

Claim (Index 14):
The flash memory controller of  claim 13 , wherein after programming the set of final parity check codes into the at least one super block, the microprocessor is arranged for: reading a portion of the data from the at least one super block; and reading the set of final parity check codes from the at least one super block, and using the set of final parity check codes to perform error correction upon the portion of the data when an error occurs and cannot corrected during reading the portion of the data.

Metadata:
- Claim Count in Document: 30.0
- Percentile: 93.0
- Lexical Diversity: 2.06383
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15497217', '15495993', '15495997', '15874895', '15232814']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8514394496197047
- 35 USC 102 Novelty (BERT): 0.5666382240816374
- Combined Prediction Score: 0.822959327065898
- Mean Citation Score: 392.09259
- Max Citation Score: 473.51575
- Similarity Product: 410.80308380244674

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test