PATENT CLAIM ANALYSIS

Application Number: 15870493
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-10
Patent Classification: ["257", "068000"]

Abstract:
A display substrate includes a base substrate, a gate metal pattern, a semiconductor layer, and a data metal pattern. The base substrate includes a display area and a peripheral area. The gate metal pattern includes a gate electrode of a transistor and includes a gate metal member disposed on the peripheral area. The transistor is disposed on the display area. The semiconductor layer includes a channel portion of the transistor and includes a semiconductor member disposed on the peripheral area. The data metal pattern includes a source electrode of the transistor and includes a data metal member disposed on the peripheral area, electrically connected to the gate metal member, and directly contacting the semiconductor member. A maximum thickness of the data metal member in a direction perpendicular to the base substrate is greater than a maximum thickness of the semiconductor member in the direction.

Claim (Index 1):
A substrate structure comprising:\n a base substrate comprising a display area and a peripheral area adjacent to the display area; a gate metal pattern comprising a gate electrode of a transistor disposed on the display area and comprising a gate metal member disposed on the peripheral area, wherein the gate electrode of the transistor overlaps a face of the base substrate; a gate insulating member disposed on the gate metal pattern; a semiconductor layer disposed on the gate insulating member, comprising a channel portion of the transistor disposed on the display area, and comprising a semiconductor member disposed on the peripheral area; a first insulating layer disposed on the semiconductor layer; and a data metal pattern disposed on the first insulating layer, comprising a source electrode of the transistor disposed on the display area, and comprising a data metal member disposed on the peripheral area, wherein the data metal member directly contacts the semiconductor member and is electrically connected to the gate metal member, and wherein a maximum thickness of the data metal member in a direction perpendicular to the face of the base substrate is greater than a maximum thickness of the semiconductor member in the direction perpendicular to the face of the base substrate.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 86.0
- Lexical Diversity: 3.80488
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15499651', '12425744', '12900846', '15064378', '14253040']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9044865458734188
- 35 USC 102 Novelty (BERT): 0.4896504424555018
- Combined Prediction Score: 0.863002935531627
- Mean Citation Score: 231.542844
- Max Citation Score: 238.27385
- Similarity Product: 200.58090915203096

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test