PATENT CLAIM ANALYSIS

Application Number: 15919079
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["257", "327000"]

Abstract:
Methods comprising providing a semiconductor substrate; a fin disposed on the semiconductor substrate; a dummy gate disposed over the fin, wherein the dummy gate has a top at a first height above the substrate; and an interlayer dielectric (ILD) disposed over the fin and adjacent to the dummy gate, wherein the ILD has a top at a second height above the substrate, wherein the second height is below the first height; and capping the ILD with a dielectric cap, wherein the dielectric cap has a top at the first height. Systems configured to implement the methods. Semiconductor devices produced by the methods.

Claim (Index 14):
The system of  claim 13 , wherein the semiconductor device processing system is adapted to provide the semiconductor structure by forming the ILD to have the top at the first height and recessing the top of the ILD to the second height.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 90.0
- Lexical Diversity: 2.5
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15638087', '15890246', '15180251', '14948214', '15592172']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9147087213057052
- 35 USC 102 Novelty (BERT): 0.5162581697205071
- Combined Prediction Score: 0.8748636661471855
- Mean Citation Score: 248.216638
- Max Citation Score: 267.6014
- Similarity Product: 181.4124484219432

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test