PATENT CLAIM ANALYSIS

Application Number: 15863983
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["375", "371000"]

Abstract:
A clock and data recovery circuit with jitter tolerance enhancement is provided. The CDR circuit includes: a bang-bang phase detector, a digital filter, a digitally controlled oscillator, and an adaptive loop gain control circuit. The CDR circuit detects a loop bandwidth variation and adjusts the loop bandwidth of CDR circuit by adjusting proportional path and integral path gain factors of the digital filter of the CDR circuit. The loop gain controller uses two methods to adjust the loop gain in CDR circuit: bang-bang adjusting method and linear adjusting method.

Claim (Index 16):
The CDR circuit according to  claim 1 , wherein the filter comprises:\n a charge pump circuit, coupled to the phase detector and the loop gain controller, receiving the phase difference information signal from the phase detector and receiving control parameters associated with a current of the charge pump circuit from the loop gain controller; and a loop filter, coupled to the charge pump circuit and the loop gain controller, receiving an output voltage signal from an output end of the charge pump circuit, receiving control parameters associated with the loop filter from the loop gain controller, and generating the filtered signal according to the output voltage signal on the output end of the charge pump circuit.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 86.0
- Lexical Diversity: 1.84906
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13833321', '13235628', '15602239', '14145493', '13081941']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5273049719372984
- 35 USC 102 Novelty (BERT): 0.4963324524405045
- Combined Prediction Score: 0.5242077199876191
- Mean Citation Score: 242.94647
- Max Citation Score: 264.6696
- Similarity Product: 216.55679784107207

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test