PATENT CLAIM ANALYSIS

Application Number: 16043674
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "331000"]

Abstract:
Trench gate power MOSFET with an on-region. Cells in the on-region include a first epitaxial layer and a channel region. First trenches corresponding to polysilicon gates penetrate through the channel region, and each polysilicon gate is etched to form a groove in the top, the grooves filled with an interlayer film. A source region formed on side faces of the grooves in a self-aligned mode through angled ion implantation. Through the source region of a side structure, the surface of a portion, between the first trenches, of the channel region is directly exposed and formed with a well contact region. A front metal layer is formed on the surfaces of the cells in the on-region and leads out a source. The front metal layer of the source directly makes contact with well contact region and source region to form a connection structure without contact holes.

Claim (Index 1):
A trench gate power MOSFET, comprising an on-region composed of a plurality of periodically-arrayed cells, wherein each of the cells includes:\n a first doped epitaxial layer of a first conduction type, wherein a channel region is formed on a surface of the first epitaxial layer by a well of a second conduction type; a drift region formed by the first epitaxial layer and located at a bottom of the channel region; a first trench formed in the first epitaxial layer and penetrating through the channel region, wherein gate dielectric layers are formed on a bottom surface and side faces of the first trench, the first trench is filled with a polysilicon gate made from polysilicon, the polysilicon gate is etched until top surface of the polysilicon gate is lower than top surface of the first trench, a groove is formed in a top of each said polysilicon gate, and the groove is filled with an interlayer film; a heavily-doped source region of the first conduction type composed of angled ion implantation regions, formed on side faces of the groove and located in the first epitaxial region, wherein implantation of the angled ion implantation region is conducted through a hard mask layer after the grooves are formed while not filled with the interlayer film; wherein the hard mask layer defines the first trench; wherein the source region is of a side structure and enables direct exposure of a surface of the channel region between two adjacent first trenches; a well contact region composed of heavily-doped regions of the second conduction type is directly formed on the surface of the channel region between the two adjacent first trenches, and the well contact region has a junction depth smaller than a depth of the source region and makes contact with the channel region and the source region at the same time; and a front metal layer is formed on surface of each of the cells in the on-region at the same time, a source is led out from the front metal layer, and the front metal layer of the source directly contacts with the well contact region and the source region to form a connection structure without any contact hole, so that a pitch of the cell is decreased, and integrity of the device is improved.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 95.0
- Lexical Diversity: 2.24286
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12137527', '14771089', '12458293', '13377029', '14019159']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9057841170802822
- 35 USC 102 Novelty (BERT): 0.5040544447153958
- Combined Prediction Score: 0.8656111498437936
- Mean Citation Score: 249.28664
- Max Citation Score: 260.66483
- Similarity Product: 201.16419138334868

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test