PATENT CLAIM ANALYSIS

Application Number: 16141285
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["712", "215000"]

Abstract:
Fast issuance and execution of a multi-width instruction across multiple slices in a parallel slice processor core is supported in part through the use of an early notification signal passed between issue logic associated with multiple slices handling that multi-width instruction coupled with an issuance of a different instruction by the originating issue logic for the early notification signal.

Claim (Index 6):
The circuit arrangement of  claim 4 , wherein the circuit arrangement further includes:\n a ready register including a plurality of bits corresponding respectively to a plurality of queue positions in which a plurality of instructions are queued in the first issue logic circuit; a ready logic circuit configured to assert each bit in the ready register that corresponds to a queue position storing an instruction that is ready for issue; an allow issue register including a plurality of bits corresponding respectively to the plurality of queue positions; and a write logic circuit configured to, in response to dispatch of a non-multi-width instruction to the first execution slice, assert a bit in the allow issue register corresponding to a queue position in which the non-multi-width instruction is queued in the first issue logic circuit.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 97.0
- Lexical Diversity: 1.5
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15939367', '15093192', '14595549', '16048946', '15093172']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6569050539323551
- 35 USC 102 Novelty (BERT): 0.5629075260751963
- Combined Prediction Score: 0.6475053011466392
- Mean Citation Score: 354.655344
- Max Citation Score: 439.212
- Similarity Product: 432.12898940277097

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test