PATENT CLAIM ANALYSIS

Application Number: 16026307
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-03
Patent Classification: ["438", "104000"]

Abstract:
The disclosure provides a thin film transistor, an array substrate, and a method for fabricating the same. An embodiment of the disclosure provides a method for fabricating a thin film transistor, the method including: forming a gate, a gate insulation layer, and an active layer above an underlying substrate successively; forming a patterned hydrophobic layer above the active layer, wherein the hydrophobic layer includes first pattern components, and orthographic projections of the first pattern components onto the underlying substrate overlap with a orthographic projection of a channel area at the active layer onto the underlying substrate; and forming a source and a drain above the hydrophobic layer, wherein the source and the drain are located respectively on two sides of a channel area, and in contact with the active layer.

Claim (Index 4):
The method according to  claim 1 , wherein the forming the patterned hydrophobic layer above the active layer comprises: forming a patterned hydrophobic layer of an all-fluorin polymer above the active layer.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 95.0
- Lexical Diversity: 2.48276
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16090752', '16097327', '15533013', '14764307', '15707827']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8847099171110214
- 35 USC 102 Novelty (BERT): 0.5257288320924638
- Combined Prediction Score: 0.8488118086091656
- Mean Citation Score: 285.958914
- Max Citation Score: 313.0623
- Similarity Product: 177.2465872092605

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test