PATENT CLAIM ANALYSIS

Application Number: 15768536
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["365", "222000"]

Abstract:
A volatile memory device includes a memory array of volatile charge storage cells, a counter to track a time since the volatile memory device has received a read/write command and a control element to automatically change the volatile memory device to a lower power state based on the time tracked by the counter.

Claim (Index 7):
The volatile memory device of  claim 6  further comprising an external clock interface, wherein the control element is to automatically deactivate the external clock interface when automatically actuating the volatile memory device to the second lower power state in response to the time tracked by the counter satisfying the second threshold.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 91.0
- Lexical Diversity: 1.57143
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14858140', '13286713', '13800637', '10871848', '13720998']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7682435450328328
- 35 USC 102 Novelty (BERT): 0.4430276506437159
- Combined Prediction Score: 0.7357219555939211
- Mean Citation Score: 118.892176
- Max Citation Score: 122.77844
- Similarity Product: 96.89673118352177

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test