PATENT CLAIM ANALYSIS

Application Number: 16261080
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["438", "269000"]

Abstract:
A method for producing a pillar-shaped semiconductor device includes forming, above a NiSi layer serving as a lower wiring conductor layer and connecting to an N +  layer of an SGT formed within a Si pillar, a first conductor W layer that extends through a NiSi layer serving as an upper wiring conductor layer and connecting to a gate TiN layer and that extends through a NiSi layer serving as an intermediate wiring conductor layer and connecting to an N +  layer; forming an insulating SiO 2  layer between the NiSi layer and the W layer; and forming a second conductor W layer so as to surround the W layer and have its bottom at the upper surface layer of the NiSi layer, to achieve connection between the NiSi layer and the NiSi layer.

Claim (Index 7):
The method for producing a pillar-shaped semiconductor device according to  claim 1 , wherein, in plan view, a portion of an outer periphery of the first contact hole region overlaps at least any one of the first wiring conductor layer, the second wiring conductor layer, and the third wiring conductor layer.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 99.0
- Lexical Diversity: 2.45614
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15712637', '15655168', '16203982', '15729040', '14976691']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9202178087835526
- 35 USC 102 Novelty (BERT): 0.5915906742311782
- Combined Prediction Score: 0.8873550953283152
- Mean Citation Score: 484.12255000000016
- Max Citation Score: 522.3979
- Similarity Product: 442.158185926944

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test