PATENT CLAIM ANALYSIS

Application Number: 15992130
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-07
Patent Classification: ["365", "230050"]

Abstract:
A dual port static random access memory (DPSRAM) cell includes a first power line, a first bit line and a second bit line. The first power line is disposed between a first word line and a second word line. The first bit line is disposed between the first word line and the first power line. The second bit line is disposed between the second word line and the first power line.

Claim (Index 9):
The dual port static random access memory cell according to  claim 6 , wherein the second bit line is electrically connected to a drain node of the second pass gate device.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 93.0
- Lexical Diversity: 2.88889
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['12533394', '12651667', '12721476', '12899663', '12823907']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8093410566923085
- 35 USC 102 Novelty (BERT): 0.518754823192733
- Combined Prediction Score: 0.7802824333423509
- Mean Citation Score: 304.78998
- Max Citation Score: 324.00784
- Similarity Product: 248.37661208620068

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test