PATENT CLAIM ANALYSIS

Application Number: 15981258
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-11
Patent Classification: ["717", "124000"]

Abstract:
A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

Claim (Index 2):
The computing device of  claim 1 , wherein the debug controller is implemented using additional hardware module logic on an integrated circuit containing the processing unit.

Metadata:
- Claim Count in Document: 42.0
- Percentile: 93.0
- Lexical Diversity: 1.64368
- Patent Class: 717.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13888370', '13888357', '12120543', '13916877', '11754007']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4239863650119922
- 35 USC 102 Novelty (BERT): 0.5145385809225521
- Combined Prediction Score: 0.4330415866030482
- Mean Citation Score: 232.005838
- Max Citation Score: 254.21907
- Similarity Product: 180.2072553192293

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test