PATENT CLAIM ANALYSIS

Application Number: 15982805
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-10
Patent Classification: ["711", "103000"]

Abstract:
Techniques for management of IS memory in a non-volatile storage device, and methods for use therewith, are described herein. The non-volatile storage device can include non-volatile memory, wherein a portion of the non-volatile memory is designated as intermediate storage (IS) memory and another portion of the non-volatile memory is designated as main storage (MS) memory. The IS memory may have lower read and write latencies than the MS memory. A host device may provide priority addresses to a memory controller with an indication that host data having one of the priority addresses is to receive priority to remain in IS memory over other host data.

Claim (Index 18):
A non-volatile memory system comprising a host system and a non-volatile storage device having non-volatile memory cells, comprising:\n programming means for storing host data into intermediate storage that comprises a first group of the non-volatile memory cells at one bit per non-volatile memory cell and for storing host data into main storage that comprises a second group of the non-volatile memory cells at multiple bits per non-volatile memory cell; priority host data selection means for selecting priority host data to receive priority to remain in the intermediate storage; priority host data providing means further for providing, to the non-volatile storage device, priority logical addresses for the priority host data with an indication that the priority host data for the priority logical addresses is to receive priority to remain in the intermediate storage, the priority logical addresses provided in data to be written to a reserved logical address; priority address storing means for accessing the priority logical addresses in the data to be written to the reserved logical address and storing the priority logical addresses in a priority address table in the non-volatile storage device; and memory controller means for giving priority to priority host data having any of the priority logical addresses in the priority address table to remain in the intermediate storage over host data having a logical address that is not in the priority address table.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 1.93333
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15722666', '15901432', '15901054', '15722685', '13587923']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5191235538454265
- 35 USC 102 Novelty (BERT): 0.4868019433167982
- Combined Prediction Score: 0.5158913927925637
- Mean Citation Score: 199.495334
- Max Citation Score: 208.51665
- Similarity Product: 149.1236026809007

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test