PATENT CLAIM ANALYSIS

Application Number: 16234970
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-12
Patent Classification: ["327", "306000"]

Abstract:
A signal receiver circuit includes: a negative voltage applier suitable for applying a negative voltage to a common source node in response to a first clock is at a first logic level; a first sampling transistor coupled between the common source node and a first sampling node to sink a current from the first sampling node to the common source node in response to a first input signal; a second sampling transistor coupled between the common source node and a second sampling node to sink a current from the second sampling node to the common source node in response to a second input signal; an equalizer suitable for equalizing the first sampling node and the second sampling node in response to the first clock is at a second logic level; a precharger suitable for precharging a first output node and a second output node with a pull-up voltage in response to a second clock is at the first logic level, and electrically coupling the first output node and second output node to the second sampling node and the first sampling node, respectively, in response to the second clock is at the second logic level; and an amplifier suitable for amplifying a voltage difference between the first output node and the second output node in response to the second clock is at the second logic level.

Claim (Index 7):
The signal receiver circuit of  claim 1 , wherein the amplifier includes:\n first CMOS inverter-coupled transistors having an input terminal coupled to the first output node and an output terminal coupled to the second output node; second CMOS inverter-coupled transistors having an input terminal coupled to the second output node and an output terminal coupled to the first output node; and an NMOS transistor having a gate receiving the second clock, a source coupled to a ground terminal, a drain coupled to the first and second CMOS inverter-coupled transistors.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 98.0
- Lexical Diversity: 4.43396
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13234811', '12381360', '14175220', '14569178', '11095187']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7991015028352896
- 35 USC 102 Novelty (BERT): 0.4913946282332041
- Combined Prediction Score: 0.768330815375081
- Mean Citation Score: 239.129026
- Max Citation Score: 258.27484
- Similarity Product: 207.28058647807129

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test