PATENT CLAIM ANALYSIS

Application Number: 16040655
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-10
Patent Classification: ["257", "072000"]

Abstract:
The present disclosure relates to an array substrate. The array substrate includes a component layer and a covering layer disposed on the component layer. The covering layer includes at least one through hole, and at least two lateral sides of the at least one through hole have different declination angles with respect to a horizontal plane. A pixel electrode is formed on the covering layer, and the pixel electrode of the covering layer is connected to a source or a drain of the component layer via the at least one through hole.

Claim (Index 2):
An array substrate, comprising:\n a component layer and a covering layer disposed on the component layer; the covering layer comprising at least one through hole, at least two lateral sides of the at least one through hole having different declination angles with respect to a horizontal plane; wherein a pixel electrode is formed on the covering layer, the pixel electrode of the covering layer is connected to a source or a drain of the component layer via the at least one through hole.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 95.0
- Lexical Diversity: 2.13043
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15739744', '14758564', '15742515', '11046757', '14784114']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.913669898164842
- 35 USC 102 Novelty (BERT): 0.4668101130929776
- Combined Prediction Score: 0.8689839196576558
- Mean Citation Score: 191.055088
- Max Citation Score: 199.51596
- Similarity Product: 170.5064132229924

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test