PATENT CLAIM ANALYSIS

Application Number: 15892850
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-12
Patent Classification: ["257", "316000"]

Abstract:
Provided are nonvolatile memory devices including 2-dimensional (2D) material and apparatuses including the nonvolatile memory devices. A nonvolatile memory device may include a storage stack including a plurality of charge storage layers between a channel element and a gate electrode facing the channel element. The plurality of charge storage layers may include a 2D material. An interlayer barrier layer may be further provided between the plurality of charge storage layers. The nonvolatile memory device may have a multi-bit or multi-level memory characteristic due to the plurality of charge storage layers.

Claim (Index 22):
The synapse device of  claim 21 , further comprising:\n a plurality of first wirings; and a plurality of second wirings crossing the plurality of first wirings, wherein the plurality of nonvolatile memory devices are respectively located at intersections of the plurality of first wirings and the plurality of second wirings.

Metadata:
- Claim Count in Document: 74.0
- Percentile: 88.0
- Lexical Diversity: 2.06383
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14444083', '14075901', '13403065', '12073398', '15015307']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9156628434359544
- 35 USC 102 Novelty (BERT): 0.5091102268442428
- Combined Prediction Score: 0.8750075817767832
- Mean Citation Score: 230.603634
- Max Citation Score: 296.93716
- Similarity Product: 230.35156267888547

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test