PATENT CLAIM ANALYSIS

Application Number: 15940338
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["711", "005000"]

Abstract:
An example of a system includes a host interface, a set of non-volatile memory cells, and one or more control circuits coupled to the host interface and coupled to the set of non-volatile memory cells. The one or more control circuits are configured to access a host memory through the host interface by sending host memory access requests for two or more blocks of host data according to an interleaving scheme.

Claim (Index 9):
The system of  claim 1  wherein the set of non-volatile memory cells are formed in a non-volatile memory that is monolithically formed in one or more physical levels of arrays of memory cells having an active area disposed above a silicon substrate.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 90.0
- Lexical Diversity: 1.92308
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15901054', '14644021', '15385158', '15730511', '15873395']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5281435886706315
- 35 USC 102 Novelty (BERT): 0.4785887159308006
- Combined Prediction Score: 0.5231881013966484
- Mean Citation Score: 166.238044
- Max Citation Score: 171.25522
- Similarity Product: 121.56476482428673

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test