PATENT CLAIM ANALYSIS

Application Number: 16021306
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["365", "185120"]

Abstract:
Memory devices having selectively electrically connected data lines with no intervening memory cells.

Claim (Index 1):
A memory device, comprising:\n a first string of memory cells selectively electrically connected to a first data line; a second string of memory cells selectively electrically connected to a second data line; and a transistor that selectively electrically connects the first data line to the second data line with no intervening memory cells between the first transistor and the first data line and no intervening memory cells between the first transistor and the second data line.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 94.0
- Lexical Diversity: 1.0
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15019175', '16021250', '15191786', '15692565', '11228189']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7908300501222659
- 35 USC 102 Novelty (BERT): 0.5037930697389349
- Combined Prediction Score: 0.7621263520839329
- Mean Citation Score: 234.661602
- Max Citation Score: 305.80945
- Similarity Product: 252.1038264155508

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test