PATENT CLAIM ANALYSIS

Application Number: 16116141
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-08
Patent Classification: ["365", "163000"]

Abstract:
Provided is a method of operating a resistive memory device including a memory cell array. The method includes the resistive memory device performing a first write operation in response to an active command and a write command and performing a second write operation in response to a write active command and the write command. The first write operation includes a read data evaluation operation for latching data read from the memory cell array in response to the active command. The second write operation excludes the read data evaluation operation.

Claim (Index 14):
The resistive memory device of  claim 13 , wherein the control circuit is further configured to control the resistive memory device to perform a comparison operation for comparing the read data to the write data in response to the write command, during the first write operation, and not excluding performing of the comparison operation during the second write operation.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 96.0
- Lexical Diversity: 2.65714
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14619992', '14645701', '15348315', '14665140', '14013275']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8206120319288035
- 35 USC 102 Novelty (BERT): 0.4969883719418966
- Combined Prediction Score: 0.7882496659301128
- Mean Citation Score: 238.967404
- Max Citation Score: 246.7312
- Similarity Product: 165.67284552555083

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test