PATENT CLAIM ANALYSIS

Application Number: 15884167
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["438", "107000"]

Abstract:
The present disclosure relates to the field of fabricating microelectronic packages, wherein cavities are formed in a dielectric layer deposited on a first substrate to maintain separation between soldered interconnections. In one embodiment, the cavities may have sloped sidewalls. In another embodiment, a solder paste may be deposited in the cavities and upon heating solder structures may be formed. In other embodiments, the solder structures may be placed in the cavities or may be formed on a second substrate to which the first substrate may be connected. In still other embodiments, solder structures may be formed on both the first substrate and a second substrate. The solder structures may be used to form solder interconnects by contact and reflow with either contact lands or solder structures on a second substrate.

Claim (Index 8):
A method of fabricating a microelectronic device, comprising:\n forming a first substrate having a plurality of bond pads proximate a contact surface of the first substrate; disposing a first dielectric layer over the first substrate contact surface; forming a plurality of cavities extending through the first dielectric layer to corresponding bond pads; forming first solder structures on the plurality of bond pads of the first substrate; forming a second substrate having a plurality of contact lands proximate a contact surface of the second substrate; disposing a second dielectric layer over the second substrate contact surface; forming a plurality of cavities extending through the second dielectric layer to corresponding contact lands; forming second solder structures on the plurality of contact lands of the second substrate; disposing an underfill material on the second dielectric layer and the second solder structures; and forming a solder interconnection between each bond pad of the plurality of bond pads and each corresponding contact land of the plurality of contact lands from the first solder structures and corresponding second solder structures.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 86.0
- Lexical Diversity: 2.2381
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13740698', '13069601', '14643329', '15668179', '12778335']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8455123564131141
- 35 USC 102 Novelty (BERT): 0.5172559100841868
- Combined Prediction Score: 0.8126867117802213
- Mean Citation Score: 250.522154
- Max Citation Score: 314.0601
- Similarity Product: 271.70251708422296

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test