PATENT CLAIM ANALYSIS

Application Number: 15868718
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["365", "185190"]

Abstract:
According to one embodiment, a semiconductor storage device includes: a NAND string with a first set of memory cells including a first memory cell; and a second set of memory cells including a second memory cell disposed above the first memory cell. The number of memory cells included in the first set is different from that of memory cells included in the second set. During a program verify operation when a data item of a level is written to a memory cell of the first set and a memory cell of the second set, a first verify voltage is applied to the gate of the memory cell of the first set and a second verify voltage different from the first verify voltage is applied to the gate of the memory cell of the second set.

Claim (Index 17):
The device of  claim 16 , wherein the third verify voltage is higher than the second verify voltage.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 86.0
- Lexical Diversity: 2.95833
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15455970', '15459170', '13157603', '15174114', '13360384']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8117545256651094
- 35 USC 102 Novelty (BERT): 0.5275942999687168
- Combined Prediction Score: 0.7833385030954702
- Mean Citation Score: 243.00123
- Max Citation Score: 368.74515
- Similarity Product: 277.38381942134504

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test