PATENT CLAIM ANALYSIS

Application Number: 15983029
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-12
Patent Classification: ["257", "292000"]

Abstract:
In a solid state image sensor having two semiconductor substrates or more laminated longitudinally, electrical connection between the semiconductor substrates is made by a fine plug. An insulating film covering a first rear surface of a semiconductor substrate having a light receiving element, and an interlayer insulating film covering a second main surface of a semiconductor substrate mounting a semiconductor element are joined to each other. In its joint surface, a plug penetrating the insulating film and a lug embedded in a connection hole in an upper surface of the interlayer insulating film are joined, and the light receiving element and the semiconductor element are electrically connected through the plugs.

Claim (Index 13):
A manufacturing method of a solid state image sensor having a plurality of pixels arranged in a pixel region, the manufacturing method comprising:\n (a) preparing a first semiconductor substrate, the first semiconductor substrate having a first main surface and a first rear surface opposite to the first main surface, and having a first light receiving element formed on the first main surface, a first interlayer insulating film covering the first main surface, and a first insulting film covering the first rear surface; (b) preparing a second semiconductor substrate, the second semiconductor substrate having a second main surface and a second rear surface opposite to the second main surface, and having a semiconductor element formed near the second main surface, and a second interlayer insulating film covering the second main surface; (c) forming a first conductive connection part penetrating the first insulating film and electrically connected to the first light receiving element; (d) forming a first connection hole in an upper surface of the second interlayer insulating film and then forming, in the first connection hole, a second conductive connection part electrically connected to the semiconductor element; and (e) joining, after the (c) and (d), a lower surface of the first interlayer insulative film and the upper surface of the second interlayer insulating film to each other and joining a lower surface of the first conductive connection part and an upper surface of the second conductive connection part to each other to laminate the first and second semiconductor substrates, wherein each of the plural pixels has the first light receiving element.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 93.0
- Lexical Diversity: 1.95
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13362758', '12929985', '14620401', '14304947', '12404675']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8998293675521769
- 35 USC 102 Novelty (BERT): 0.4846113303155419
- Combined Prediction Score: 0.8583075638285135
- Mean Citation Score: 202.83476
- Max Citation Score: 209.36174
- Similarity Product: 166.96040008334396

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test