PATENT CLAIM ANALYSIS

Application Number: 16045298
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "401000"]

Abstract:
An integrated circuit structure includes a semiconductor substrate having a plurality of semiconductor strips, a first recess being formed by two adjacent semiconductor strips among the plurality of semiconductor strips, a second recess being formed within the first recess, and an isolation region being provided in the first recess and the second recess. The second recess has a lower depth than the first recess.

Claim (Index 6):
The method of  claim 1 , wherein the recess has a U-shape in a cross-sectional view of the semiconductor substrate, wherein when the first semiconductor strip is etched, the second semiconductor strip is also etched, and when the recess is formed, an additional portion of the semiconductor substrate directly under the etched second semiconductor strip is etched to form an additional recess, and the additional recess has a V-shape.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 95.0
- Lexical Diversity: 1.91667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15399237', '15407094', '15203866', '15691852', '14142435']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9182289263534604
- 35 USC 102 Novelty (BERT): 0.4693133416650134
- Combined Prediction Score: 0.8733373678846158
- Mean Citation Score: 167.44550199999995
- Max Citation Score: 200.86118
- Similarity Product: 172.801005749166

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test