PATENT CLAIM ANALYSIS

Application Number: 15958652
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["717", "161000"]

Abstract:
A highly efficient method for scheduling operations to be performed by a fine grained graph processor is performed by a fine gained graph processor based system. The method first determines a set of execution paths for executing a sequence of operations. Each path logically passes through a set of execution units of the fine grained graph processor. The execution units are interconnected by BSEs and RSEs, each of which includes one or more memory elements. The method also determines availability of each execution path within the set by determining availability of execution units of the path. The checking of availability of execution units checks from one execution unit to another in the same row first, one execution unit to another in different rows on the same plane secondly and then one execution unit to another in different planes. The method is designed to reduce execution cost.

Claim (Index 16):
An efficient method for scheduling an operation to be performed by a fine grained graph processor, the method performed by a scheduler running on a fine grained graph processor based system and comprising:\n determining a set of execution paths, wherein:\n (1) each execution path within said set of execution paths includes a sequence of operations; \n (2) said sequence of operations includes said operation; \n (3) each execution path within said set of execution paths passes through execution units of said fine grained graph processor that perform atomic operations; and \n (4) said fine grained graph processor includes a set of planes of execution units interconnected by port blocks and a global switched memory, execution units of each plane within said set of plane arranged in rows and columns, execution units of said fine grained graph processor interconnected via broad cast switch elements and receive switch elements, said broad cast switch elements and receive switch elements each including a memory element; and \n ii. determining availability of each execution path within said set of execution paths by determining availability of execution units of said execution path for executing said operation, wherein said availability of execution units is determined by:\n (1) firstly checking availability of execution units in a same row; \n (2) secondly checking availability of execution units in a different rows within a same plane; and \n (3) thirdly checking availability of execution units in a different planes.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 2.12329
- Patent Class: 717.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15139529', '14581169', '11227781', '12762281', '10184772']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.291123045066664
- 35 USC 102 Novelty (BERT): 0.5327448679183705
- Combined Prediction Score: 0.3152852273518346
- Mean Citation Score: 180.82241
- Max Citation Score: 291.2916
- Similarity Product: 198.8153558161497

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test