PATENT CLAIM ANALYSIS

Application Number: 15981093
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["710", "022000"]

Abstract:
A system may include a data acquisition hardware device (DAQ) for acquiring sample data and/or generating control signals, and a host system with memory that may store data samples and information associated with the DAQ and host system operations. The DAQ may push hardware status information to host memory, triggered by predetermined events taking place in the DAQ, e.g. timing events or interrupts. The DAQ may update dedicated buffers in host memory with status data for any of these events. The pushed status information may be read in a manner that allows detection of race conditions, and may be used to handle data acquisition, output control signaling, and interrupts as required without the host system having to query the DAQ. The DAQ may also detect data timing errors and report those data timing errors back to the host system, and also provide improved output operations using counters.

Claim (Index 20):
The data acquisition system of  claim 16 , wherein the data acquisition device comprises:\n a first register, a second register, and a third register; and a control circuit configured to:\n generate an output signal, alternating between generating the output signal at least according to contents of the first register and generating the output signal at least according to contents of the second register; \n copy contents of the third register into the first register when generating the output signal at least according to the contents of the second register; \n copy the contents of the third register into the second register when generating the output signal at least according to the contents of the first register; \n update the contents of the third register with available data of the incoming data subsequent to having copied the contents of the third register into either the first register or the second register; \n report the first-type error to the host system in response to the third register having been updated with less than the expected first data between the most recent previous sample clock period and the present sample clock period; and \n report the second-type error to the host system in response to the third register having been updated with more than the expected first data between the most recent previous sample clock period and the present sample clock period.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 2.025
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15087922', '12534600', '14149389', '12534785', '13955523']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7150558759976642
- 35 USC 102 Novelty (BERT): 0.5570289737520056
- Combined Prediction Score: 0.6992531857730983
- Mean Citation Score: 288.153254
- Max Citation Score: 449.14005
- Similarity Product: 354.6557675762236

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test