PATENT CLAIM ANALYSIS

Application Number: 15941473
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-08
Patent Classification: ["365", "185030"]

Abstract:
According to one embodiment, a semiconductor memory device includes a memory cell array, a data storage circuit and a control circuit. The data storage circuit holds first data to be written into the memory cell and holds 1 bit data calculated from the first data. The control circuit writes the data of n bits into the memory cell in a first write operation and then executes a second write operation. The control circuit carries out the following control in the second write operation. It reads data stored in the memory cell in the first write operation. It restores the first data based on the data read from the memory cell and the 1 bit data held in the data storage circuit. It writes the restored first data into the memory cell.

Claim (Index 18):
The semiconductor memory device according to  claim 16 , wherein after the first write operation, a write operation is executed to a second memory cell adjacent to the first memory cell, and then the second write operation is executed to the first memory cell.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 90.0
- Lexical Diversity: 2.7451
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14688442', '15138290', '15677429', '13709291', '12504966']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8055981360115695
- 35 USC 102 Novelty (BERT): 0.5200597790109398
- Combined Prediction Score: 0.7770443003115065
- Mean Citation Score: 289.6094080000001
- Max Citation Score: 327.4894700000001
- Similarity Product: 252.28597652404247

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test