PATENT CLAIM ANALYSIS

Application Number: 16036623
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "509000"]

Abstract:
A method for fabricating a semiconductor device includes providing a substrate, forming a first doped well within the substrate, and forming a second doped well within the substrate. The second doped well is non-contiguous with the first doped well. The method further includes depositing a dielectric layer over the substrate, and forming a first resistor element within the dielectric layer. The first resistor element is aligned with the first doped well. The method further includes forming a second resistor element within the dielectric layer. The second resistor element being aligned with the second doped well.

Claim (Index 2):
The method of  claim 1 , wherein the first doped well and the second doped well are n-wells.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 95.0
- Lexical Diversity: 3.15152
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15646962', '13160030', '14179623', '14543082', '13115488']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9159423924457968
- 35 USC 102 Novelty (BERT): 0.5186266129821142
- Combined Prediction Score: 0.8762108144994284
- Mean Citation Score: 185.271296
- Max Citation Score: 312.0805
- Similarity Product: 233.51773357808585

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test