PATENT CLAIM ANALYSIS

Application Number: 15907711
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["365", "148000"]

Abstract:
A semiconductor integrated circuit according to an embodiment includes: first to third wirings; first current limiters corresponding to the first wirings; second current limiters corresponding to the second wirings; third current limiters corresponding to the third wirings; first drivers corresponding to the first current limiters; second drivers corresponding to the second current limiters; third drivers corresponding to the third current limiters; and a first array and a second array, wherein the first array comprising: fourth wirings corresponding to the first wirings; fifth wirings corresponding to the second wirings; first transistors corresponding to the first wirings; second transistors corresponding to the second wirings; and first resistive change elements arranged in intersecting areas of the fourth wirings and the fifth wirings, respectively, the first resistive change elements including a first terminal connected to corresponding one of the fourth wirings and a second terminal connected to corresponding one of the fifth wirings.

Claim (Index 3):
The semiconductor integrated circuit according to  claim 1  further comprising:\n eighth wirings intersecting with the second wirings and the third wirings, respectively; and \n a third array and a fourth array, \n wherein the third array comprises: \n ninth wirings arranged to correspond to the eighth wirings; \n tenth wirings arranged to correspond to the second wirings, the tenth wirings intersecting with the ninth wirings, respectively; \n fifth transistors arranged to correspond to the eighth wirings, one of a source and drain of at least one of the fifth transistors being connected to corresponding one of the eighth wirings, the other of the source and drain of the at least one of the fifth transistors being connected to corresponding one of the ninth wirings; \n sixth transistors arranged to correspond to the second wirings, one of a source and drain of at least one of the sixth transistors being connected to corresponding one of the second wirings, the other of the source and drain of the at least one of the sixth transistors being connected to corresponding one of the tenth wirings; and \n third resistive change elements arranged in intersecting areas of the ninth wirings and the tenth wirings, respectively, at least one of the third resistive change elements including a fifth terminal connected to corresponding one of the ninth wirings and including a sixth terminal connected to corresponding one of the tenth wirings; and \n the fourth array comprises: \n eleventh wirings arranged to correspond to the eighth wirings; \n twelfth wirings arranged to correspond to the third wirings, the twelfth wirings intersecting with the eleventh wirings, respectively; \n seventh transistors arranged to correspond to the eighth wirings, one of a source and drain of at least one of the seventh transistors being connected to corresponding one of the eighth wirings, the other of the source and drain of the at least one of the seventh transistors being connected to corresponding one of the eleventh wirings; \n eighth transistors arranged to correspond to the third wirings, one of a source and drain of at least one of the eighth transistors being connected to corresponding one of the third wirings, the other of the source and drain of the at least one of the eighth transistors being connected to corresponding one of the twelfth wirings; and \n fourth resistive change elements arranged in intersecting areas of the eleventh wirings and the twelfth wirings, respectively, at least one of the fourth resistive change elements including a seventh terminal connected to corresponding one of the eleventh wirings and an eighth terminal connected to corresponding one of the eleventh wirings.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 88.0
- Lexical Diversity: 3.86047
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15700319', '14884215', '14854361', '12282163', '14988034']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7799795157160951
- 35 USC 102 Novelty (BERT): 0.4879079980936882
- Combined Prediction Score: 0.7507723639538545
- Mean Citation Score: 173.96563600000005
- Max Citation Score: 201.73521
- Similarity Product: 130.25615198734582

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test