PATENT CLAIM ANALYSIS

Application Number: 16026081
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["323", "280000"]

Abstract:
A ripple pre-amplification based fully integrated LDO pertains to the technical field of power management. The positive input terminal of a transconductance amplifier is connected to a reference voltage Vref, and the negative input terminal of the transconductance amplifier is connected to the feedback voltage V fb . The output terminal of the transconductance amplifier is connected to the negative input terminal of a transimpedance amplifier and the negative input terminal of an error amplifier. The positive input terminal of the transimpedance amplifier is connected to the ground GND, and the output terminal of the transimpedance amplifier is connected to the positive input terminal of the error amplifier. The gate terminal of the power transistor M P  is connected to the output terminal of the error amplifier, the source terminal of the power transistor M P  is connected to an input voltage V IN , and the drain terminal of the power transistor M P  is grounded.

Claim (Index 1):
A ripple pre-amplification based fully integrated low dropout regulator, comprising:\n an error amplifier, a power transistor, a miller capacitance, a first voltage dividing resistor, a second voltage dividing resistor, a compensation circuit, a transconductance amplifier, and a transimpedance amplifier, wherein a gate terminal of the power transistor is connected to an output terminal of the error amplifier, a source terminal of the power transistor is connected to an input voltage, and a drain terminal of the power transistor is connected to ground through a series connection structure of the first voltage dividing resistor and the second voltage dividing resistor; a series connection point of the first voltage dividing resistor and the second voltage dividing resistor outputs a feedback voltage; the Miller capacitance is connected between the drain terminal of the power transistor and the ground; the compensation circuit is connected between the drain terminal of the power transistor and the series connection point of the first voltage dividing resistor and the second voltage dividing resistor; wherein a positive input terminal of the transconductance amplifier is connected to a reference voltage, a negative input terminal of the transconductance amplifier is connected to the feedback voltage, an output terminal of the transconductance amplifier is connected to a negative input terminal of the transimpedance amplifier and a negative input terminal of the error amplifier; and a positive input terminal of the transimpedance amplifier is connected to the ground, and an output terminal of the transimpedance amplifier is connected to a positive input terminal of the error amplifier.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 95.0
- Lexical Diversity: 3.41667
- Patent Class: 323.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15690290', '15387678', '15509202', '15776780', '11775105']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7776503907683023
- 35 USC 102 Novelty (BERT): 0.558168584631692
- Combined Prediction Score: 0.7557022101546413
- Mean Citation Score: 378.515386
- Max Citation Score: 461.67987
- Similarity Product: 374.5771874837136

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test