PATENT CLAIM ANALYSIS

Application Number: 15859851
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-12
Patent Classification: ["365", "201000"]

Abstract:
A memory device that supports a built-in self-test (BIST) operation includes: a plurality of memory cells; a page buffer group including page buffer circuits respectively coupled to the plurality of memory cells through bit lines; a built-in self-test (BIST) controller configured to generate pattern data to be stored in the page buffer circuits and reference data to be compared with sensed data obtained from the page buffer circuits, and to compare the reference data with the sensed data; and an input/output control circuit configured to input the pattern data to the page buffer circuits and to transfer the sensed data from the page buffer circuits to the BIST controller.

Claim (Index 3):
The memory device of  claim 2 , wherein the pattern data generator includes:\n a seed data generator configured to generate seed data by using a seed value that is sequentially increased; and a data extension unit configured to generate the pattern data by using the seed data and an inverse seed data obtained by inverting the seed data.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 2.2037
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11479130', '11531895', '13469203', '15624009', '15377518']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8113698887402598
- 35 USC 102 Novelty (BERT): 0.4682317173157644
- Combined Prediction Score: 0.7770560715978103
- Mean Citation Score: 196.282344
- Max Citation Score: 197.28871
- Similarity Product: 157.34324065130176

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test