PATENT CLAIM ANALYSIS

Application Number: 16158321
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["257", "133000"]

Abstract:
A semiconductor device includes a substrate having a cell region and a peripheral region, a thyristor on the cell region, a MOS transistor on the peripheral region, and a first silicide layer on the substrate adjacent to the thyristor on the cell region. Preferably, the thyristor includes: a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a fourth semiconductor layer on the cell region, vertical dielectric patterns in the first semiconductor layer, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer, and first contact plugs on the fourth semiconductor layer.

Claim (Index 7):
The semiconductor device of  claim 6 , further comprising a second spacer on a sidewall of the step.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 97.0
- Lexical Diversity: 3.32353
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16152421', '15493150', '16107984', '14599167', '12271758']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9222504051990932
- 35 USC 102 Novelty (BERT): 0.4989511350861637
- Combined Prediction Score: 0.8799204781878003
- Mean Citation Score: 218.44554
- Max Citation Score: 277.26355
- Similarity Product: 229.6947639812797

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test