PATENT CLAIM ANALYSIS

Application Number: 15918094
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["375", "258000"]

Abstract:
Aspects of the present disclosure are directed to facilitating communications to respective circuit nodes in a manner that may also be useful for mitigating undesirable signal attenuation. As may be implemented in accordance with one or more embodiments, switchable isolation circuits, presented by at least one transformer and switch, are utilized to isolate adjacent data processing nodes on a bus in which each data processing node includes logic circuitry and processes signal therein. For each of the switchable isolation circuits, switching circuitry operates to mitigate communication propagation over the differential bus between adjacent data processing nodes, by switching the switchable isolation circuit for providing isolation. This approach may be utilized, for example, to assign sequential identification to daisy-chained circuit nodes upon start-up or reset, for use in addressing each node directly for further communication therewith.

Claim (Index 17):
The apparatus of  claim 14 ,\n the bus being a two-wire bus connected to the circuit nodes in a daisy-chain arrangement initiating at the master circuit node; the switchable isolation circuit being connected in series between the first one of the circuit nodes and a sequential one of the circuit nodes; further including additional ones of the switchable isolation circuit, with one of the switchable isolation circuits being connected between each of the circuit nodes beginning with the sequential one of the circuit nodes; and wherein the master circuit node is further configured and arranged with the switchable isolation circuits to assign an identification to each sequential one of the circuit nodes by repeating the steps of utilizing and ceasing for sequential ones of the circuit nodes, therein assigning the identification to each of the circuit nodes in succession, beginning with one of the circuit nodes nearest the master circuit node and ending with one of the circuit nodes furthest from the master circuit node.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 90.0
- Lexical Diversity: 1.7093
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['11509146', '13381033', '12897455', '10812314', '10834959']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4859470231787954
- 35 USC 102 Novelty (BERT): 0.4818977212167206
- Combined Prediction Score: 0.485542092982588
- Mean Citation Score: 149.033142
- Max Citation Score: 155.63069
- Similarity Product: 104.99591315400424

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test