PATENT CLAIM ANALYSIS

Application Number: 15745127
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-03
Patent Classification: ["257", "072000"]

Abstract:
The present application provides an array substrate, which comprises a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes, and a plurality of conductive members. In each of the pixel regions, a control terminal of the TFT is electrically connected with the gate line, an input terminal of the TFT is electrically connected with the data line, and an output terminal of the TFT is electrically connected with the pixel electrode. The output terminal comprises a body, and a first contact and a second contact which are connected with the body. The first contact and one of the conductive members extending into the pixel region are overlapping-disposed and insulated from each other. The second contact and another of the conductive members extending into the pixel region are overlapping-disposed and insulated from each other.

Claim (Index 15):
The display panel according to  claim 10 , wherein the body, the first contact, and the second contact are the same material and disposed in the same layer, the body electrically connected with the pixel electrode.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 2.92593
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15329122', '11926429', '12548774', '12643979', '11639861']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9063933576204752
- 35 USC 102 Novelty (BERT): 0.4911655506514365
- Combined Prediction Score: 0.8648705769235713
- Mean Citation Score: 183.105256
- Max Citation Score: 187.52971
- Similarity Product: 134.39636519392607

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test