PATENT CLAIM ANALYSIS

Application Number: 15860046
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "369000"]

Abstract:
An integrated circuit includes a gate electrode level region that includes a plurality of linear-shaped conductive structures. Each of the plurality of linear-shaped conductive structures is defined to extend lengthwise in a first direction. Some of the plurality of linear-shaped conductive structures form one or more gate electrodes of corresponding transistor devices. A local interconnect conductive structure is formed between two of the plurality of linear-shaped conductive structures so as to extend in the first direction along the two of the plurality of linear-shaped conductive structures.

Claim (Index 12):
The integrated circuit as recited in  claim 11 , wherein the contact conductive structure is not positioned between the second gate electrode level conductive structure and the third gate electrode level conductive structure.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 86.0
- Lexical Diversity: 2.0
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14995110', '14995483', '14188321', '13189433', '12814411']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.956713996617206
- 35 USC 102 Novelty (BERT): 0.557969768604446
- Combined Prediction Score: 0.9168395738159302
- Mean Citation Score: 432.22757600000006
- Max Citation Score: 456.65952
- Similarity Product: 358.49491038333883

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test