PATENT CLAIM ANALYSIS

Application Number: 15980107
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-01
Patent Classification: ["323", "313000"]

Abstract:
The present disclosure relates to the field of intelligent wearable technologies, and provides a power supply circuit, a power supply circuit generation method, and a power supply circuit control method. The present disclosure provides a power supply circuit, including: a bandgap voltage reference Bandgap, a real-time detection and control module, and an alternate voltage source module, where the real-time detection and control module adjusts an output point voltage of the alternate voltage source module according to an output voltage of the Bandgap; and when the output point voltage of the alternate voltage source module reaches a target voltage, the real-time detection and control module closes the Bandgap and supplies power by using the alternate voltage source module. In such a power supply circuit, after adjustment of an output point voltage of an alternate voltage source module is completed, a Bandgap does not need to keep a power-supply state, and therefore power consumed by the Bandgap is reduced based on stable voltage supply.

Claim (Index 22):
The method according to  claim 21 , wherein:\n adjusting a bleeder circuit of the alternate voltage source module according to the bleeder circuit of the standard cell so that the output point voltage of the alternate voltage source module reaches the target voltage comprises:\n supplying a low level to a gate of a PMOS transistor of the alternate voltage source module, and supplying a high level to a gate of an NMOS transistor of the standard cell; and \n adjusting a resistance value of a first resistor of the alternate voltage source module, so that the resistance value of the first resistor of the alternate voltage source module is equal to that of the first resistor of the standard cell; and \n the alternate voltage source module comprises:\n the PMOS transistor; \n an NMOS transistor; \n a capacitor; \n the first resistor of the alternate voltage source module; and \n a second resistor of the alternate voltage source module, wherein a resistance value of the second resistor of the alternate voltage source module is equal to that of the second resistor of the standard cell, and \n a source and a drain of the PMOS transistor are respectively connected to an input high level and a first end of the first resistor of the alternate voltage source module; a source and a drain of the NMOS transistor are respectively connected to the ground and a second end of the second resistor of the alternate voltage source module; a second end of the first resistor of the alternate voltage source module is connected to a first end of the second resistor of the alternate voltage source module, wherein the first resistor of the alternate voltage source module is an adjustable resistor; and the capacitor is connected to the ground and an output point of the alternate voltage source module, wherein the output point is located in the second resistor of the alternate voltage source module, and a ratio of a resistance value between the output point and the ground to that of the second resistor of the standard cell is equal to a ratio of the target voltage to the output voltage of the Bandgap.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 2.73846
- Patent Class: 323.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13161217', '12104140', '10621747', '13807310', '11252679']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7671828909976292
- 35 USC 102 Novelty (BERT): 0.4993581712971716
- Combined Prediction Score: 0.7404004190275835
- Mean Citation Score: 255.09116
- Max Citation Score: 264.8786
- Similarity Product: 190.9912261115551

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test