PATENT CLAIM ANALYSIS

Application Number: 16002881
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["331", "008000"]

Abstract:
In examples, a voltage-controlled oscillator (VCO) comprises an inductor; a first pair of transistors having first terminals coupled to a voltage source, second terminals coupled to opposing ends of the inductor, and control terminals coupled to opposing ends of the inductor; and a second pair of transistors having first terminals coupled to ground, second terminals coupled to opposing ends of the inductor, and control terminals coupled to opposing ends of the inductor. The VCO also comprises a first transistor coupled to at least one capacitor, the combination of the first transistor and the at least one capacitor coupled to the inductor in parallel. The VCO further comprises second, third, and fourth transistors coupled to a control terminal of the first transistor, the second transistor coupled to the voltage source, the fourth transistor coupled to ground, and the third transistor configured to receive a ramped voltage.

Claim (Index 8):
A phase locked loop (PLL) system, comprising:\n a phase-frequency detector (PFD); a charge pump coupled to the PFD; first and second comparators, each of the first and second comparators having inputs coupled to an output of the charge pump and configured to receive first and second reference voltages, respectively; a digital controller coupled to outputs of the first and second comparators; and a voltage-controlled oscillator (VCO) coupled to the output of the charge pump, the VCO including:\n an inductor; \n a first pair of transistors coupled to a voltage source and to the inductor; \n a second pair of transistors coupled to ground and to the inductor; \n a first transistor coupled to a capacitor, the combination of the first transistor and the capacitor coupled in parallel with the inductor, the first transistor having a control terminal; \n second, third, and fourth transistors coupled to the control terminal of the first transistor, the second and fourth transistors coupled to the voltage source and to ground, respectively, and the third transistor coupled to an output of the digital controller, the second, third, and fourth transistors also coupled to outputs of the digital controller; and \n a coarse capacitor bank coupled to the inductor in parallel.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 94.0
- Lexical Diversity: 3.39583
- Patent Class: 331.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15706034', '11282342', '10747521', '10761353', '13312177']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7567791728634781
- 35 USC 102 Novelty (BERT): 0.4796202461548184
- Combined Prediction Score: 0.7290632801926121
- Mean Citation Score: 205.872446
- Max Citation Score: 215.02798
- Similarity Product: 170.30436370381474

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test