PATENT CLAIM ANALYSIS

Application Number: 16048570
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-02
Patent Classification: ["718", "102000"]

Abstract:
Work can be migrated between processor cores. For example, a thread causing a heavy load on a first core can be detected. A power control unit can determine to migrate the thread from the first less-efficient core to the second more-efficient core. The power control unit can request that the first core and the second core transition to a low-power state (e.g., a sleep state, a C6 power state, etc.). The first core can transfer its software context to a first core software context storage, halt and quiesce. The second core can halt and quiesce. The software context from the first core software context storage can be transferred to a second core software context storage of the second core. A processing core identifier of the first core can be assigned to the second core. The power control unit can then request the second core to transition to an active state (such as a C0 state).

Claim (Index 1):
A computer-readable storage medium that stores instructions for execution by a processing resource to perform operations of a power control unit within a processor, the operations, when executed by the processing resource, to perform a method, the method comprising:\n report fewer processing cores to an operating system than are present within the processor; assign a first identifier to a first processing core within the processor and a second identifier to a second processing core within the processor; detect a migration trigger that indicates detection of an instruction that would use a broken arithmetic unit on the first core; determine to sequester the first processing core from use by the operating system and migrate a thread from the first processing core to the second processing core; transmit a sleep transition message to the first processing core and the second processing core, the message requesting a transition to a low-power state, the low-power state causing the first processing core to save the first context in the first processor context storage; copy the first context from the first processor context storage to an intermediate storage; copy the first context from the intermediate storage to the second processor context storage; assign the first identifier to the second processing; sequester the first processing core from use by the operating system; and transmit a wake-up transition message to the second processing core, the message requesting a transition to an active state, the transition causing the second processor to resume the first context from the second processor context storage and the second processor to resume the first context from the second processor context storage.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 95.0
- Lexical Diversity: 2.74603
- Patent Class: 718.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14973009', '15191123', '15086456', '15191283', '13995994']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4258951639477308
- 35 USC 102 Novelty (BERT): 0.5193673735404111
- Combined Prediction Score: 0.4352423849069988
- Mean Citation Score: 184.400834
- Max Citation Score: 265.83334
- Similarity Product: 216.3477152204872

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test