PATENT CLAIM ANALYSIS

Application Number: 15926044
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["257", "692000"]

Abstract:
Direct bonding heterogeneous integration packaging structures and processes include a packaging substrate with first and second opposing surfaces. A trench or a pedestal is provided in the first surface. A bridge is disposed in the trench or is adjacent the pedestal sidewall, wherein the bridge includes an upper surface coplanar with the first surface of the package substrate. At least two chips in a side by side proximal arrangement overly the bridge and the packaging substrate, wherein the bridge underlies peripheral edges of the at least two chips in the side by side proximal arrangement. The at least two chips include a plurality of electric connections that are directly coupled to corresponding electrical connections on the bridge and on the packaging substrate.

Claim (Index 6):
The integrated circuit packaging structure of  claim 1 , wherein the bridge comprises a memory chip or a microprocessor chip and the at least two chips in the side by side relationship comprise a microprocessor chip and a power supply chip.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 2.04762
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14958307', '15684269', '13721991', '15825263', '15684337']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9121502468478322
- 35 USC 102 Novelty (BERT): 0.4738549262731172
- Combined Prediction Score: 0.8683207147903608
- Mean Citation Score: 159.468022
- Max Citation Score: 169.72353
- Similarity Product: 127.9308653104305

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test