PATENT CLAIM ANALYSIS

Application Number: 16047883
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-08
Patent Classification: ["326", "003000"]

Abstract:
A Josephson inverter gate circuit provides efficient implementation of polarity or logical inversion while eliminating the need for physically large high-efficiency magnetic transformers in the signal path. The circuit can consist of a half-twisted Josephson transmission line (JTL) or a JTL with an unshunted floating Josephson junction that produces two single flux quantum (SFQ) pulses when triggered by an SFQ input signal, which results in an output SFQ signal of reversed polarity. Implemented as a logical inverter, proper initialization of the circuit is accomplished within the signal inversion stage with flux biasing.

Claim (Index 13):
A method of logically inverting a signal value based on single flux quantum (SFQ) pulse inputs, the method comprising:\n providing a first positive SFQ pulse to an input end of a Josephson transmission line (JTL) to set an input-side Josephson junction in the JTL that is nearer the input end of the JTL than an output end of the JTL to a 2\u03c0 superconducting phase, the JTL having a floating Josephson junction in a central portion of the JTL between the input and output ends of the JTL; before or after providing the first positive SFQ pulse, but before the first positive SFQ pulse can propagate through the central portion of the JTL to the output end of the JTL, injecting one \u03a6 0 /2 of current into the floating Josephson junction as an initializing current, such that the first positive SFQ pulse is annihilated by the initializing current and does not propagate through to the output end of the JTL, without affecting the superconducting phase of the input-side Josephson junction; and providing a negative SFQ pulse to the input end of the JTL to reset the input-side Josephson junction to a 0 superconducting phase, such that the negative SFQ pulse propagates to the output end of the JTL to set to 2\u03c0 the superconducting phase of an output-side Josephson junction in the JTL that is nearer the output end of the JTL than the input end of the JTL.

Metadata:
- Claim Count in Document: 24.0
- Percentile: 95.0
- Lexical Diversity: 1.48529
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15887524', '15810954', '15886626', '15937418', '15810907']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7169536023008467
- 35 USC 102 Novelty (BERT): 0.6575439170594511
- Combined Prediction Score: 0.7110126337767072
- Mean Citation Score: 446.457114
- Max Citation Score: 667.6732
- Similarity Product: 634.7489419583559

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test