PATENT CLAIM ANALYSIS

Application Number: 15914944
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-04
Patent Classification: ["327", "530000"]

Abstract:
An integrated circuit comprises a timebase generator that comprises a linear feedback shift register (LFSR) and a switch mode direct current-to-direct current (DC-to-DC) voltage converter coupled to the timebase generator.

Claim (Index 20):
The integrated circuit of  claim 15 , wherein the Fibonacci LFSR is one of a 7-bit Fibonacci LFSR, a 9-bit Fibonacci LFSR, an 11-bit Fibonacci LFSR, a 15-bit Fibonacci LFSR, or a 17-bit Fibonacci LFSR.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 90.0
- Lexical Diversity: 1.25
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12109354', '13737337', '13810036', '11233419', '13650588']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7720723807026174
- 35 USC 102 Novelty (BERT): 0.4758080557430607
- Combined Prediction Score: 0.7424459482066618
- Mean Citation Score: 168.53414400000003
- Max Citation Score: 174.6885
- Similarity Product: 125.87262135905029

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test