PATENT CLAIM ANALYSIS

Application Number: 16217323
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["365", "189070"]

Abstract:
A device includes memory cells, a first reference switch, a second reference switch, a first reference storage unit, a second reference storage unit, and an average current circuit. The memory cells are each configured to store corresponding bit data. The first reference switch and the second reference switch are turned on when a word line is activated. The first reference storage unit generates a first signal having a first logic state when the first reference switch is turned on. The second reference storage unit generates a second signal having a second logic state when the second reference switch is turned on. The average current circuit averages the first signal and the second signal to generate a reference signal to be compared with a current indicating the bit data of one memory cell, in order to determine a logic state of the bit data of the memory cell.

Claim (Index 20):
The device of  claim 13 , wherein a number of the plurality of reference switches is the same as a number of the plurality of reference storage units.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 98.0
- Lexical Diversity: 3.0
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15667600', '14929076', '13765513', '14501623', '12645704']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.807063854137009
- 35 USC 102 Novelty (BERT): 0.4830250502466475
- Combined Prediction Score: 0.7746599737479728
- Mean Citation Score: 197.41889
- Max Citation Score: 257.27756
- Similarity Product: 223.0457008906436

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test