PATENT CLAIM ANALYSIS

Application Number: 15884827
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["257", "004000"]

Abstract:
A semiconductor structure includes a memory unit structure. The memory unit structure includes a transistor, a first electrode, two second electrode, and two resistive random access memory (RRAM) elements. The first electrode and the two second electrodes are disposed in a horizontal plane. The first electrode is disposed between the two second electrodes. The first electrode and the two second electrodes are disposed in parallel. The first electrode is coupled to a source region of the transistor. One of the two RRAM elements is disposed between the first electrode and one of the two second electrodes. The other one of the two RRAM elements is disposed between the first electrode and the other one of the two second electrodes.

Claim (Index 2):
The method according to  claim 1 , wherein the dielectric layer of the preliminary structure covers the transistors.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 86.0
- Lexical Diversity: 3.21951
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14449425', '14488300', '13520166', '15525200', '14918567']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9174264461317776
- 35 USC 102 Novelty (BERT): 0.4780607608394339
- Combined Prediction Score: 0.8734898776025433
- Mean Citation Score: 172.59269799999996
- Max Citation Score: 182.17612
- Similarity Product: 136.77566165447712

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test