PATENT CLAIM ANALYSIS

Application Number: 15981034
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["345", "213000"]

Abstract:
A display panel includes: a display region, a plurality of data lines, a de-multiplexing circuit, and an operation switching circuit. The de-multiplexing circuit has a plurality of input terminals coupled to a plurality of data driving signal lines, a plurality of output terminals coupled to the plurality of data lines, and at least one de-multiplexing control terminal coupled to at least one driving control signal. The operation switching circuit is configured to switch a conduction status between the at least one de-multiplexing control terminal of the de-multiplexing circuit and a second control signal line according to a voltage of a first control signal line.

Claim (Index 16):
The display panel according to  claim 15 , wherein each of the plurality of transistors of the test switch circuit is an NMOS transistor, and in the display mode, the voltage of the third control signal line is at a direct current low gate voltage level.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 93.0
- Lexical Diversity: 2.51111
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16320070', '15698446', '14849533', '11798228', '15928241']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.671523042101846
- 35 USC 102 Novelty (BERT): 0.4993572783759775
- Combined Prediction Score: 0.6543064657292592
- Mean Citation Score: 207.564214
- Max Citation Score: 221.48466
- Similarity Product: 146.072671909554

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test