PATENT CLAIM ANALYSIS

Application Number: 16069914
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["257", "077000"]

Abstract:
A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate including a foundation layer having a first conductivity type; forming a deep trench in the foundation layer; and forming a deep layer having a second conductivity type by introducing material gas of the compound semiconductor while introducing dopant gas into an epitaxial growth equipment to cause epitaxial growth of the deep layer in the deep trench. A period in which a temperature in the epitaxial growth equipment is increased to a temperature of the epitaxial growth of the deep layer is defined as a temperature increasing period. In the forming the deep layer, the deep layer is further formed in a bottom corner portion of the deep trench by starting the introducing of the dopant gas during the temperature increasing period and starting the introducing of the material gas after the temperature increasing period.

Claim (Index 12):
The method for manufacturing the compound semiconductor device according to  claim 2 , wherein\n the compound semiconductor device includes a switching element having a trench gate structure, the method comprises: providing the semiconductor substrate that includes a rear surface layer at a rear side and a drift layer at a front side, the drift layer providing the foundation layer, having the first conductivity type, and having an impurity concentration lower than the rear surface layer; forming a base region that has the second conductivity type on the drift layer; forming a source region that has the first conductivity type above the base region, the source region having an impurity concentration higher than the drift layer; forming a gate trench that extends from a surface of the source region to a position deeper than the base region; forming the trench gate structure by forming a gate insulation film on an inner wall surface of the gate trench and forming a gate electrode on the gate insulation film; forming a source electrode that is electrically connected to the source region; and forming a drain electrode that is electrically connected to the rear surface layer at the rear side of the semiconductor substrate, and in the forming the deep trench, the deep trench is formed to be deeper than the gate trench in the drift layer.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 95.0
- Lexical Diversity: 2.56667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16069927', '16069622', '16070061', '14387425', '15297261']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9335105589527818
- 35 USC 102 Novelty (BERT): 0.5335419509175702
- Combined Prediction Score: 0.8935136981492606
- Mean Citation Score: 310.667586
- Max Citation Score: 368.48938
- Similarity Product: 321.5043712507939

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test