PATENT CLAIM ANALYSIS

Application Number: 15767564
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["710", "110000"]

Abstract:
A vehicle safety electronic control system ( 11 ) including master and slave microcontrollers ( 12, 13 ). The master microcontroller ( 12 ) is connected to a TDMA network bus, and the slave microcontroller ( 13 ) is connected to the master microcontroller ( 12 ) via a general purpose input/connection ( 14 ). Both microcontrollers ( 12, 13 ) are configured to operate schedule table based execution, and each has a respective synchronization counter. The master microcontroller ( 12 ) is configured to update its synchronization counter in response to a primary synchronization signal ( 19 ) from the network bus ( 10 ), and to issue a corresponding secondary synchronisation signal ( 20 ) to the slave microcontroller ( 13 ) via the general purpose input/output connection ( 14 ). The slave microcontroller ( 13 ) is configured to update its synchronization counter in response to the secondary synchronization signal ( 20 ) from the master microcontroller ( 12 ) such that the schedule tables of both microcontrollers ( 12, 13 ) are synchronized to the network bus ( 10 ).

Claim (Index 1):
A vehicle safety electronic control system, comprising: a master microcontroller and a slave microcontroller; the master microcontroller being connected to a TDMA network bus, and the slave microcontroller being connected to the master microcontroller via a general purpose input/output connection; both of the microcontrollers being configured to operate schedule table based execution, and each of the microcontrollers having a respective synchronization counter, wherein the master microcontroller is configured to update a synchronization counter of the master microcontroller in response to receipt of a primary synchronization signal from the network bus, and to issue a corresponding secondary synchronization signal to the slave microcontroller via the general purpose input/output connection, the slave microcontroller being configured to update a synchronization of the slave microcontroller counter in response to receipt of the secondary synchronization signal from the master microcontroller such that the schedule tables of both of the microcontrollers are synchronized to the network bus.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 91.0
- Lexical Diversity: 2.86765
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15763711', '15385312', '10529527', '13604275', '15662249']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6608421510817817
- 35 USC 102 Novelty (BERT): 0.4863122604056719
- Combined Prediction Score: 0.6433891620141707
- Mean Citation Score: 182.906126
- Max Citation Score: 233.71706
- Similarity Product: 176.7547731160569

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test