PATENT CLAIM ANALYSIS

Application Number: 16063991
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-01
Patent Classification: ["717", "124000"]

Abstract:
The present invention relates to a computer module testability problem detection method defined: on the one hand, by first code instructions in a modeling language representing blocks, divided up into one or more components, and relationships between the blocks and/or the components, and on the other hand, by second code instructions in a textual language representing a list of specifications that are each associated with a capability and define at least one information flow at the capability. The method is characterized in that it includes implementing, by means of a data processing means ( 11 ) of a device ( 1 ), steps for: (a) expressing the first and second code instructions, each code being in the form of a model instantiating a common meta-model that correlates them with each other, (b) synchronizing the related models into a consolidated model, (c) expressing a graph on the basis of said consolidated model, (d) calculating, by means of a graph traversal algorithm, the width and/or depth of the graph, and (e) sending a signal indicating a computer module testability problem if at least one of said calculated width and depth is greater than a predefined threshold.

Claim (Index 11):
A device for detecting testability problems of a computer module defined:\n on the one hand by first code instructions in a modeling language, said first code instructions representing a plurality of blocks of said computer module distributed in one or more components and a plurality of relationships between the blocks and/or the components; on the other hand by second code instructions in a textual language, said second code instructions representing a list of specifications each associated with a capability and defining at least one information flow at the level of the capability; the device being characterized in that it comprises data processing means configured for implementing:\n a module for expressing the first and second code instructions each in the form of a model instantiating a common metamodel matching on the one hand the blocks with the capabilities, and on the other hand said relationships with said information flows; \n a module for synchronizing the models associated respectively with the first and second code instructions in a consolidated model; \n a module for expressing from said consolidated model a graph in which the blocks and the components are nodes, and the relationships are edges; \n a module for calculating by means of a graph traversal algorithm the width and/or the depth of said graph; \n a module for emitting a signal indicating a testability problem of the computer module if at least one of said calculated width and depth is greater than a predefined threshold.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 94.0
- Lexical Diversity: 2.11429
- Patent Class: 717.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14896078', '12858562', '12628590', '15189494', '09790247']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3828916846166806
- 35 USC 102 Novelty (BERT): 0.4674047854546799
- Combined Prediction Score: 0.3913429947004805
- Mean Citation Score: 135.898346
- Max Citation Score: 146.71312
- Similarity Product: 119.6935582043457

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test