PATENT CLAIM ANALYSIS

Application Number: 16253750
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-06
Patent Classification: ["365", "189050"]

Abstract:
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry comprising a primary latch coupled to a sense line of the array. The sensing circuitry can be configured to perform a first operation phase of a logical operation by sensing a memory cell coupled to the sense line, perform a number of intermediate operation phases of the logical operation by sensing a respective number of different memory cells coupled to the sense line, and accumulate a result of the first operation phase and the number of intermediate operation phases in a secondary latch coupled to the primary latch without performing a sense line address access.

Claim (Index 28):
The system of  claim 27 , wherein the sensing circuitry comprises a plurality of sense amplifiers and corresponding compute component latches coupled to respective columns of the array.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 99.0
- Lexical Diversity: 2.30909
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15899187', '15439681', '13962399', '16215026', '16192536']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8422057000929698
- 35 USC 102 Novelty (BERT): 0.5328308966355279
- Combined Prediction Score: 0.8112682197472256
- Mean Citation Score: 280.30811800000004
- Max Citation Score: 289.57416
- Similarity Product: 197.3784348206234

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test