PATENT CLAIM ANALYSIS

Application Number: 16170452
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["363", "087000"]

Abstract:
An apparatus that includes first and second parallel converter branches, each parallel converter branch including an input node, N output nodes, a plurality of switches, a converter output node, and control logic. The control logic generates a first set of switch signals to control the switches of the first parallel converter branch and a second set of switch signals to control the second parallel converter branch, the first set switch signals and the second set of switch signals having respective duty cycles to cause each of the first and second parallel converter branches to output the DC output voltage on each of the N output nodes.

Claim (Index 1):
An apparatus, comprising:\n first and second parallel converter branches, each parallel converter branch comprising:\n an input node that receives a direct current (DC) input voltage; \n N output nodes that each respectively output a DC output voltage, wherein the DC output voltage is less than the DC input voltage, wherein N is an integer with a value of two or more; \n a plurality of switches, wherein each switch comprises a first terminal, a second terminal, and a third terminal, and the third terminal of the first switch receives a control signal that places the first switch in either a closed state in which a conduction path is established between the first and second terminals, or an open state in which the conduction path is eliminated between the first and second terminals; \n N- 1  cascade stages, each having an ordinal position relative to the DC input voltage and beginning with a first cascade stage that is connected to the DC input voltage as a respective input voltage, and each subsequent cascade stage is connected to a previous cascade stage to receive a respective input voltage, wherein each of the N- 1  cascade stages includes a stacking capacitor that is charged to a value based on its ordinal position of the cascade stage relative to the DC input voltage; and \n a final stage that is connected to a last cascade stage to receive a respective input voltage; a converter output node that is connected to each of the N output nodes of the first and second parallel converter branches and provides the DC output voltage; and control logic that generates a first set of switch signals to control the switches of the first parallel converter branch and a second set of switch signals to control the second parallel converter branch, the first set switch signals and the second set of switch signals having respective duty cycles to cause each of the first and second parallel converter branches to output the DC output voltage on each of the N output nodes.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 97.0
- Lexical Diversity: 2.71429
- Patent Class: 363.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15675285', '15643023', '12235597', '13488240', '14559326']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7773108469248097
- 35 USC 102 Novelty (BERT): 0.5195698389061246
- Combined Prediction Score: 0.7515367461229412
- Mean Citation Score: 228.869114
- Max Citation Score: 334.2710600000001
- Similarity Product: 320.49790284282574

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test