PATENT CLAIM ANALYSIS

Application Number: 16034828
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "330000"]

Abstract:
A method of forming a substrate contact in a vertical transistor device includes patterning a sacrificial layer to form an opening in the sacrificial layer, the sacrificial layer disposed on hardmask arranged on a substrate, and the substrate including a bulk semiconductor layer, a buried oxide layer arranged on the bulk semiconductor layer, and a semiconductor layer arranged on the buried oxide layer; forming oxide spacers on sidewalls of the opening in the sacrificial layer; using the oxide spacers as a pattern to etch a trench through the substrate, the trench stopping at a region within the bulk semiconductor layer; and depositing a conductive material in the trench to form the substrate contact.

Claim (Index 3):
The vertical transistor device of  claim 2 , wherein the conductive material comprises a metal.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 95.0
- Lexical Diversity: 2.54167
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15149421', '15483125', '15416281', '15918199', '15149282']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9357524440867204
- 35 USC 102 Novelty (BERT): 0.542794944681218
- Combined Prediction Score: 0.8964566941461702
- Mean Citation Score: 327.770916
- Max Citation Score: 403.62387
- Similarity Product: 274.8797858577132

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test