PATENT CLAIM ANALYSIS

Application Number: 16029649
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["174", "252000"]

Abstract:
A ceramic module for power semiconductor integrated packaging and a preparation method thereof are disclosed. The ceramic module includes a ceramic substrate and an integrated metal dam layer. By providing the integral metal dam layer on the upper surface of the ceramic substrate and forming cavities around die bonding regions, the semiconductor chip can be hermetically sealed. By providing a heat dissipation layer on the lower surface of the ceramic substrate, the heat generated by the semiconductor chip can be quickly conducted to the outside. The product has a simple production process and high product consistency.

Claim (Index 9):
A preparation method of the ceramic module as claimed in  claim 1 , comprising the following steps:\n (1) providing the ceramic substrate and perforating the ceramic substrate; (2) metalizing the upper and lower surfaces of the ceramic substrate; (3) sticking a dry film, exposing, developing and electroplating the ceramic substrate with the metalized upper and lower surfaces to form the positive electrode pad, the negative electrode pad, the connecting layer, the die bonding layer, an integrated metal dam bottom layer, the conductive circuit layer, a heat dissipation bottom layer, and the vertical via holes; (4) sticking a dry film, exposing, developing and electroplating the upper and lower surfaces of the ceramic substrate again, so that the integrated metal dam bottom layer and the heat dissipation bottom layer are each electroplated and thickened to obtain the integrated metal dam layer and the heat dissipation layer; (5) sticking a dry film, exposing, developing and electroplating the upper surface of the ceramic substrate again, so that a part of the integrated metal dam layer is electroplated and thickened to obtain a stepped surface and a stepped layer; (6) removing the films and etching the ceramic substrate; and (7) applying an insulating material to the lower surface of the ceramic substrate to form the insulating layer.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 95.0
- Lexical Diversity: 1.74576
- Patent Class: 174.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15797549', '13796489', '13024083', '15777582', '10852315']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8062963471718886
- 35 USC 102 Novelty (BERT): 0.4938049753876691
- Combined Prediction Score: 0.7750472099934667
- Mean Citation Score: 199.042048
- Max Citation Score: 205.37613
- Similarity Product: 142.51475437137722

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test