PATENT CLAIM ANALYSIS

Application Number: 15982024
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["365", "185110"]

Abstract:
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.

Claim (Index 6):
The memory system of  claim 5 , wherein the time of the first read is different from the time of the second read by one of changing a precharge voltage of a sense node of the memory cell and changing the number of times of sense.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 93.0
- Lexical Diversity: 2.4
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14565522', '15343484', '15673512', '13462022', '15459294']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7862673776634282
- 35 USC 102 Novelty (BERT): 0.4928779103077578
- Combined Prediction Score: 0.7569284309278612
- Mean Citation Score: 222.890298
- Max Citation Score: 248.09294
- Similarity Product: 197.0041677591133

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test