PATENT CLAIM ANALYSIS

Application Number: 16200322
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-10
Patent Classification: ["375", "362000"]

Abstract:
A transmitting circuit may include a clock generation circuit and a serializer. The clock generation circuit may generate a plurality of output clock signals by performing an emphasis operation for a plurality of clock signals based on a plurality of data. The serializer may output the plurality of data as output data in synchronization with the plurality of output clock signals.

Claim (Index 7):
The transmitting circuit according to  claim 1 , wherein the clock generation circuit comprises:\n a data detecting circuit configured to generate emphasis control signals by detecting logic levels of the plurality of data; and a clock emphasis circuit configured to generate the plurality of output clock signals by performing an emphasis operation for the plurality of clock signals based on the plurality of clock signals and the emphasis control signals.

Metadata:
- Claim Count in Document: 34.0
- Percentile: 98.0
- Lexical Diversity: 2.06452
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16038835', '13309881', '13415777', '15895837', '12047753']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4915692533806856
- 35 USC 102 Novelty (BERT): 0.4766390587726783
- Combined Prediction Score: 0.4900762339198849
- Mean Citation Score: 168.067026
- Max Citation Score: 197.41074
- Similarity Product: 156.3533411755872

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test