PATENT CLAIM ANALYSIS

Application Number: 15981020
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-05
Patent Classification: ["345", "214000"]

Abstract:
The present disclosure discloses a pixel circuit, a display apparatus and a dual-gate driving transistor. The pixel circuit comprises a dual-gate driving transistor having a drain electrically connected to a first power supply terminal; a threshold voltage compensation unit electrically connected to a data terminal, a first control terminal, a first gate of the dual-gate driving transistor, and a source of the dual-gate driving transistor respectively; a mobility compensation unit electrically connected to a sensing signal terminal, a second control terminal, and the source of the dual-gate driving transistor respectively; and a light emitting control unit electrically connected to the data terminal, a third control terminal, a second gate of the dual-gate driving transistor, the source of the dual-gate driving transistor, and a light emitting device respectively. The threshold voltage compensation unit and the mobility compensation unit perform threshold voltage compensation for the dual-gate driving transistor under the control of the data terminal, the first control terminal, the sensing signal terminal, and the second control terminal; and the mobility compensation unit and the light emitting control unit perform mobility compensation for the dual-gate driving transistor and control the dual-gate driving transistor to drive the light emitting device to emit light under the control of the sensing signal terminal, the second control terminal, the data terminal, and the third control terminal.

Claim (Index 11):
A dual-gate driving transistor, comprising:\n a light shielding metal layer disposed on a substrate and serving as a second gate of the dual-gate driving transistor; a buffer layer disposed on the light shielding metal layer and the substrate; an organic semiconductor layer disposed on the buffer layer; an insulating layer disposed on the organic semiconductor layer; a gate layer disposed on the insulating layer and serving as a first gate of the dual-gate driving transistor; a perforated layer disposed on the buffer layer, the organic semiconductor layer, the insulating layer, and the gate layer and comprising a first via hole and a second via hole; and a source layer and a drain layer disposed on the perforated layer respectively, wherein the source layer is connected to one terminal of the organic semiconductor layer through the first via hole and the drain layer is connected to the other terminal of the organic semiconductor layer through the second via hole.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 93.0
- Lexical Diversity: 4.86
- Patent Class: 345.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15863967', '15823383', '15756973', '15659529', '15562513']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6754256356713252
- 35 USC 102 Novelty (BERT): 0.502652742270193
- Combined Prediction Score: 0.658148346331212
- Mean Citation Score: 274.645464
- Max Citation Score: 287.2610200000001
- Similarity Product: 229.4456085068704

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test