PATENT CLAIM ANALYSIS

Application Number: 16040292
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "321000"]

Abstract:
According to one embodiment, a source layer includes a semiconductor layer including an impurity. A stacked body includes a plurality of electrode layers stacked with an insulator interposed. A gate layer is provided between the source layer and the stacked body. The gate layer is thicker than a thickness of one layer of the electrode layers. A semiconductor body extends in a stacking direction of the stacked body through the stacked body and the gate layer. The semiconductor body further extends in the semiconductor layer where a side wall portion of the semiconductor body contacts the semiconductor layer. The semiconductor body does not contact the electrode layers and the gate layer.

Claim (Index 17):
The method according to  claim 14 , wherein\n an insulating film is formed on a side surface of the hole prior to the forming of the semiconductor body, and the portion of the semiconductor body is exposed in the air gap by removing a portion of the insulating film exposed in the air gap after the removing of the sacrificial layer.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 95.0
- Lexical Diversity: 2.47917
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14017472', '15838427', '12839784', '14464223', '14833450']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9073441399048428
- 35 USC 102 Novelty (BERT): 0.503595791712474
- Combined Prediction Score: 0.866969305085606
- Mean Citation Score: 199.709422
- Max Citation Score: 204.90198
- Similarity Product: 134.80298030237677

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test