PATENT CLAIM ANALYSIS

Application Number: 15919788
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["714", "752000"]

Abstract:
According to one embodiment, a memory system comprises an encoder that encodes by a graph code and a data holding unit that holds data to be used in encoding. A check matrix of the graph code includes first to sixth submatrices, and the encoder produces a first vector obtained by multiplying an information word and the first submatrix, produces a second vector obtained by multiplying the information word and the third submatrix, produces a third vector obtained by multiplying the first vector and the fifth submatrix inverted in sign, produces a fourth vector obtained by adding the third vector and the second vector, produces a first parity obtained by multiplying the fourth vector and the data, produces a fifth vector obtained by multiplying the first parity and the second submatrix inverted in sign, and produces a second parity obtained by adding the fifth vector and the first vector.

Claim (Index 1):
A memory system which can be connected to a host, comprising:\n a nonvolatile memory; an encoder that encodes at least a part of user data received from the host as an information word by a graph code; an encode data holding unit that holds for-encoding data to be used when the encoder encodes the information word; and a memory interface that writes a code word subjected to the encoding into the nonvolatile memory, wherein a check matrix of the graph code includes first to sixth submatrices, wherein the encoder: produces a first vector obtained by multiplying the information word and the first submatrix, produces a second vector obtained by multiplying the information word and the third submatrix, produces a third vector obtained by multiplying the first vector and the fifth submatrix inverted in sign, produces a fourth vector obtained by adding the third vector and the second vector, produces a first parity obtained by multiplying the fourth vector and the for-encoding data, produces a fifth vector obtained by multiplying the first parity and the second submatrix inverted in sign, and produces a second parity obtained by adding the fifth vector and the first vector, and wherein the memory interface writes the information word, the first parity, and the second parity as the code word into the nonvolatile memory.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 90.0
- Lexical Diversity: 3.16
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14400834', '15654492', '10724280', '13755222', '13697576']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2519088163075256
- 35 USC 102 Novelty (BERT): 0.4827307854723601
- Combined Prediction Score: 0.274991013224009
- Mean Citation Score: 181.61502
- Max Citation Score: 193.85873
- Similarity Product: 142.92704579773962

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test