PATENT CLAIM ANALYSIS

Application Number: 15942754
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["438", "404000"]

Abstract:
Reliability of a semiconductor device is improved. Prepared is a substrate in which an insulating layer, a semiconductor layer, and an insulating film are laminated on a semiconductor substrate, and a device isolation region is embedded in a trench. The insulating film in a bulk region is removed; the semiconductor layer in the bulk region is removed by using a first etching liquid; and thereafter the insulating film in the SOI region and the insulating layer in the bulk region are thinned by using a second etching liquid different from the first etching liquid. An impurity is implanted into the semiconductor substrate in the SOI region, and thereafter the insulating film in the SOI region and the insulating layer in the bulk region are removed. An etching speed of each of the insulating film and the insulating layer due to the first etching liquid is smaller than an etching speed of the semiconductor layer by using the first etching liquid. An etching speed of each of the insulating film and the insulating layer due to a second etching liquid is higher than the etching speed of each of the insulating film and the insulating layer due to the first etching liquid.

Claim (Index 18):
A method of manufacturing a semiconductor device, the method comprising:\n (a) preparing a substrate including:\n a semiconductor substrate, \n an insulating layer comprised of a first material and formed on the semiconductor substrate, \n a semiconductor layer comprised of a second material different from the first material and formed on the insulating layer, \n a first insulating film comprised of the first material and formed on the semiconductor layer, \n a trench reaching to the semiconductor substrate through the semiconductor layer and the insulating layer, and \n a device isolation region comprised of the first material and embedded in the trench; \n (b) after the operation (a), removing the first insulating film in a first region of the substrate by etching, exposing the semiconductor layer in the first region, and leaving the first insulating film in a second region different from the first region of the substrate; (c) after the operation (b), removing the semiconductor layer in the first region by etching, and exposing the insulating layer in the first region; (d) after the operation (c), etching the insulating layer in the first region and the first insulating film in the second region, and thinning a thickness of the insulating layer in the first region and a thickness of the first insulating film in the second region; (e) after the operation (d), implanting an impurity into the semiconductor substrate in the second region, and forming a first semiconductor region; (f) after the operation (e), removing the insulating layer in the first region and the first insulating film in the second region by etching, and exposing the semiconductor substrate in the first region and the semiconductor layer in the second region; and (g) after the operation (f), forming a first transistor on the semiconductor substrate in the first region, and forming a second transistor on the semiconductor layer in the second region.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 91.0
- Lexical Diversity: 4.09615
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15603564', '15679047', '15404463', '15043576', '14459999']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8717045310207678
- 35 USC 102 Novelty (BERT): 0.5403701093140245
- Combined Prediction Score: 0.8385710888500936
- Mean Citation Score: 304.068638
- Max Citation Score: 389.08832
- Similarity Product: 346.48823141727445

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test