PATENT CLAIM ANALYSIS

Application Number: 15914719
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["710", "107000"]

Abstract:
According to one embodiment, a memory device includes one or more semiconductor devices connected in common to a bus. Each of the one or more semiconductor devices includes a memory unit to store data, and an input/output control unit. The input/output control unit is configured to acquire address information from a data processing device via the bus and access the memory unit according to the acquired address information. The data processing device is configured to divide the address information into a plurality of cycles to transmit to the bus. The input/output control unit is configured to switch a number of cycles in which the address information is to be acquired, according to setting information acquired from the data processing device.

Claim (Index 8):
The memory device according to  claim 7 , wherein the setting information is included in a cycle before a cycle in which the chip address is included.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 2.56
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11616112', '14022721', '11543227', '13389260', '13323144']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6853964307409484
- 35 USC 102 Novelty (BERT): 0.4652575033165543
- Combined Prediction Score: 0.663382537998509
- Mean Citation Score: 134.604804
- Max Citation Score: 139.76338
- Similarity Product: 100.69509070343616

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test