PATENT CLAIM ANALYSIS

Application Number: 16059905
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-02
Patent Classification: ["326", "093000"]

Abstract:
An apparatus is provided which comprises: a first inverter to receive a clock; a pass-gate coupled to the first inverter; a second inverter coupled to the pass-gate and to provide an output clock; and a device coupled to the second inverter and the pass-gate, wherein the transistor and the pass-gate are controllable by a logic that depends on logic values of at least two signals (e.g., an enable and the clock).

Claim (Index 7):
The apparatus of  claim 1 , wherein the pass-gate is a first pass-gate, and wherein the logic comprises a NOR gate, a tristate-able inverter, and a second pass-gate.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 96.0
- Lexical Diversity: 1.81818
- Patent Class: 326.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15244839', '15246445', '14089238', '15992052', '10947869']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.679414728510324
- 35 USC 102 Novelty (BERT): 0.462346354911645
- Combined Prediction Score: 0.6577078911504561
- Mean Citation Score: 175.01526400000003
- Max Citation Score: 203.28072
- Similarity Product: 177.5111826495266

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test