PATENT CLAIM ANALYSIS

Application Number: 16158974
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["438", "494000"]

Abstract:
Disclosed is a method that includes forming a plurality of semiconductor arrangements one above the other. In this method, forming each of the plurality of semiconductor arrangements includes: forming a semiconductor layer; forming a plurality of trenches in a first surface of the semiconductor layer; and implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches of the semiconductor layer.

Claim (Index 3):
The method of  claim 1 ,\n wherein the at least one semiconductor arrangement comprises at least one pair of semiconductor arrangements with a bottom semiconductor arrangement and a top semiconductor arrangement adjoining the bottom semiconductor arrangement, wherein forming the semiconductor layer of the top semiconductor arrangement comprises forming the semiconductor layer in the plurality of trenches and on top of mesa regions between the plurality of trenches of the semiconductor layer of the bottom semiconductor arrangement.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 97.0
- Lexical Diversity: 2.43243
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15648987', '16104465', '14035185', '14060698', '11385155']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8580375979451423
- 35 USC 102 Novelty (BERT): 0.5344927420346838
- Combined Prediction Score: 0.8256831123540964
- Mean Citation Score: 260.88835200000005
- Max Citation Score: 347.5799
- Similarity Product: 276.7729622634649

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test