PATENT CLAIM ANALYSIS

Application Number: 15971971
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["710", "022000"]

Abstract:
A flash storage device provides direct memory access based on a first communication protocol. A host selects the first communication protocol and provides a request to the flash storage device for a direct memory access. Additionally, the host provides data blocks to the flash storage device for the direct memory access. In the first communication protocol, the host need not provide an address to the flash storage device for the direct memory access. The flash storage device stores the data blocks at sequential addresses starting at a predetermined address in the flash storage device. Another host may then select a second communication protocol and transfer the data blocks in the flash storage by using the second communication protocol.

Claim (Index 1):
A system, comprising:\n interface means for processing requests between a host and a flash storage, the interface means comprising a first means associated with a first communication protocol and a second means associated with a second communication protocol different than the first communication protocol; transfer means for performing a direct memory access operation to transfer data between the host and the flash storage through the first means using the first communication protocol when a select signal from the host indicates the first communication protocol, and for transferring the data between the host and the flash storage through the second means when the select signal indicates the second communication protocol; means for processing a request signal from the host, the request signal indicating a request for the direct memory access operation; means for providing, in response to the request signal, a notification signal indicating receipt of the request from the host; means for receiving a response signal indicating readiness to transfer data for the request; means for sending a ready signal to the host based on the received response signal; and means for receiving an acknowledgement signal from the host based on the sent ready signal, wherein the system causes the direct memory access operation to be performed subsequent to the receiving the acknowledgment signal.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 93.0
- Lexical Diversity: 2.625
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15156267', '12508531', '12254428', '11466759', '13892433']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6464787865585827
- 35 USC 102 Novelty (BERT): 0.4999532711898867
- Combined Prediction Score: 0.6318262350217131
- Mean Citation Score: 229.34266
- Max Citation Score: 290.37527
- Similarity Product: 266.4860543118143

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test