PATENT CLAIM ANALYSIS

Application Number: 15876989
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["257", "288000"]

Abstract:
A semiconductor device includes a MOS transistor located within a semiconductor substrate of a first conductivity type. The transistor includes a body well located between a drain well and a substrate contact well. A buried voltage blocking region of a second conductivity type is located within the substrate and is connected to the body well. The buried voltage blocking region extends toward the substrate contact well, with an unmodified portion of the substrate remaining between the voltage blocking region and the substrate contact well.

Claim (Index 11):
The method of  claim 9 , wherein said second terminal is coincident with said body well.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 86.0
- Lexical Diversity: 2.28205
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15857980', '14808991', '13973230', '14971896', '10880907']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9234042819080808
- 35 USC 102 Novelty (BERT): 0.5135084334536505
- Combined Prediction Score: 0.8824146970626376
- Mean Citation Score: 217.192266
- Max Citation Score: 236.83762
- Similarity Product: 134.19069086335182

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test