PATENT CLAIM ANALYSIS

Application Number: 15977275
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-12
Patent Classification: ["711", "103000"]

Abstract:
An infrastructure, method and controller card for managing flash memory in a storage infrastructure. A system is provided that includes flash memory; and a controller that includes: an I/O request handler for handling standard read and write (R/W) operations requested from a host; a garbage collection (GC) system that performs a GC process on the flash memory in response to a threshold condition, wherein the GC process includes GC-induced R/W operations; and a scheduler that interleaves standard R/W operations with GC-induced R/W operations, wherein the scheduler calculates minimum and maximum boundaries for GC-induced R/W operations for a GC process based on an estimated GC latency.

Claim (Index 17):
The method of  claim 16 , wherein the estimated GC latency is divided into n time slots and during the GC process, minimum and maximum boundaries are calculated each time a time slot elapses until the GC process finishes.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 93.0
- Lexical Diversity: 1.93443
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14315172', '14031589', '14571861', '15152352', '15349722']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5202687783678934
- 35 USC 102 Novelty (BERT): 0.4717968374247019
- Combined Prediction Score: 0.5154215842735743
- Mean Citation Score: 144.95531599999995
- Max Citation Score: 154.55086
- Similarity Product: 111.97391289767027

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test