PATENT CLAIM ANALYSIS

Application Number: 15912068
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "292000"]

Abstract:
Embodiments of a hybrid imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed. Embodiments of the above may include systems, methods and processes for staggering ADC or column circuit bumps in a column or sub-column hybrid image sensor using vertical interconnects are also disclosed.

Claim (Index 4):
The imaging sensor of  claim 1 , wherein said pixel array covers a substantial majority of a surface of said first substrate.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 90.0
- Lexical Diversity: 1.61972
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14875591', '14616734', '14841340', '15707903', '15156240']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9520735838234106
- 35 USC 102 Novelty (BERT): 0.556559834817791
- Combined Prediction Score: 0.9125222089228486
- Mean Citation Score: 396.995848
- Max Citation Score: 424.42697
- Similarity Product: 410.44532092106215

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test