PATENT CLAIM ANALYSIS

Application Number: 15965178
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["363", "037000"]

Abstract:
A power conversion device includes a high-side transistor including an IGBT, a low-side transistor including an IGBT, and having a collector coupled to an emitter of the high-side transistor, a high-side driver configured to drive the high-side transistor; and a low-side driver configured to drive the low-side transistor, wherein each of the high-side transistor and the low-side transistor includes a first trench gate electrode arranged in an active cell region, and electrically connected to a gate, and a second trench gate electrode and a third trench gate electrode, each of which is arranged at intervals on both sides of the first trench gate electrode, and electrically connected to the emitter in the active cell region. The high-side driver includes a first pull-up transistor configured to apply a first voltage as a positive voltage to the gate, based on the emitter of the high-side transistor and a first pull-down transistor.

Claim (Index 10):
The power conversion device according to  claim 9 ,\n wherein the drive unit further includes, with respect to each phase of the three phases, a transformer including a primary coil, and a first secondary coil and a second secondary coil; an AC voltage generation circuit configured to generate an AC voltage, and apply the AC voltage to the primary coil; a first rectifier circuit configured to rectify an AC voltage generated by the first secondary coil, and generate the first voltage in a first node based on a first reference node; and a second rectifier circuit configured to rectify an AC voltage generated by the second secondary coil, and generate the second voltage in a second node based on a second reference node, wherein the first reference node is coupled to the emitter of the high-side transistor and one end of the first pull-down transistor, the first node is coupled to one end of the first pull-up transistor, the second reference node is coupled to the emitter of the low-side transistor and one end of the second pull-down transistor, and the second node is coupled to one end of the second pull-up transistor.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 91.0
- Lexical Diversity: 2.875
- Patent Class: 363.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15168031', '15702327', '14418610', '15157040', '12813178']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8235594722948528
- 35 USC 102 Novelty (BERT): 0.5589806163839819
- Combined Prediction Score: 0.7971015867037657
- Mean Citation Score: 252.15923
- Max Citation Score: 443.19067
- Similarity Product: 369.031035063796

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test