PATENT CLAIM ANALYSIS

Application Number: 16244352
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-10
Patent Classification: ["365", "185180"]

Abstract:
A method for operating a memory device includes the steps of providing a first voltage to a first transistor of a first memory cell and a third transistor of a second memory cell, providing a second voltage to a gate of a second transistor of the first memory cell and a gate of a fourth transistor of the second memory cell, and providing a third voltage to a gate of the first transistor of the first memory cell and a gate of the third transistor of the second memory cell. Other embodiments are also described.

Claim (Index 2):
The system of  claim 1 , wherein the plurality of voltages further comprises at least one voltage of 1V.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 99.0
- Lexical Diversity: 3.41379
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15271028', '14618815', '14316615', '15782137', '12975055']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8124164028218057
- 35 USC 102 Novelty (BERT): 0.4300530616447147
- Combined Prediction Score: 0.7741800687040967
- Mean Citation Score: 154.51771399999996
- Max Citation Score: 168.6856
- Similarity Product: 168.04877154569627

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test