PATENT CLAIM ANALYSIS

Application Number: 15743530
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-11
Patent Classification: ["257", "072000"]

Abstract:
An embodiment of the present disclosure relates to an array substrate, which comprises data lines and gate lines arranged on the array substrate having a pixel region and a peripheral region surrounding the pixel region, and at least two repair lines arranged on the peripheral region of the array substrate. The at least two repair lines intersect with one of the data lines and the gate lines. Each of the repair lines has at least one repair voltage lead. The array substrate according to the present disclosure can increase the number of data lines or gate lines that can be repaired, improve a utilization ratio of the repair lines, and can be used for repairing a display panel with large area.

Claim (Index 8):
The array substrate according to  claim 7 , wherein at least one of the repair voltage leads is positioned between adjacent integrated circuits.

Metadata:
- Claim Count in Document: 28.0
- Percentile: 86.0
- Lexical Diversity: 2.26316
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11744457', '14424257', '15139651', '13338178', '13381022']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9085414782924752
- 35 USC 102 Novelty (BERT): 0.4894306962255076
- Combined Prediction Score: 0.8666304000857786
- Mean Citation Score: 200.554734
- Max Citation Score: 217.7732
- Similarity Product: 174.66672023456096

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test