PATENT CLAIM ANALYSIS

Application Number: 16041129
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["375", "230000"]

Abstract:
Methods, systems, and apparatuses are described for improving the signal integrity of a differential pair of signals by mitigating a non-balanced channel deficiency. For example, signal integrity may be improved by independently shaping and/or independently controlling the slopes (e.g., the rising edge and/or falling edge) of each signal of a differential pair of signals to counteract the effects caused by non-balanced deficiencies to provide a balanced differential pair of signals (i.e., signals having symmetrical impedances, loads, etc.).

Claim (Index 19):
The driver circuit of  claim 18 , wherein the pulse shaping logic comprises:\n delay logic configured to generate a delayed version of the first signal based on the first predetermined delay; and scaling logic configured to scale the delayed version of the first signal based on the first predetermined weighted gain to generate the first delayed and scaled version of the first signal.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 95.0
- Lexical Diversity: 1.71698
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15284359', '14982681', '15345214', '11509112', '11755339']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5178549610758094
- 35 USC 102 Novelty (BERT): 0.4772036419450765
- Combined Prediction Score: 0.5137898291627362
- Mean Citation Score: 121.662043
- Max Citation Score: 216.97491
- Similarity Product: 185.5829620561105

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test