PATENT CLAIM ANALYSIS

Application Number: 15900571
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["257", "496000"]

Abstract:
A trench semiconductor device includes a layer of semiconductor material, an exterior trench pattern formed in the layer of semiconductor material, and an interior trench pattern formed in the layer of semiconductor material, at least partially surrounded by the exterior trench pattern. The exterior trench pattern includes a plurality of exterior trench portions that are each lined with dielectric material and filled with conductive material, and the interior trench pattern includes a plurality of interior trench portions that are each lined with dielectric material and filled with conductive material.

Claim (Index 8):
The trench semiconductor device of  claim 1 , wherein the plurality of interior trench portions have a first trench width, and the first, second, third and fourth exterior trench portions have a second trench width, wherein the second trench width is greater than the first trench width.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 88.0
- Lexical Diversity: 2.71429
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14886281', '12917378', '14165120', '13418128', '12018166']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9441087178487148
- 35 USC 102 Novelty (BERT): 0.467109595907182
- Combined Prediction Score: 0.8964088056545616
- Mean Citation Score: 170.21686200000005
- Max Citation Score: 175.58801
- Similarity Product: 136.76190552200674

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test