PATENT CLAIM ANALYSIS

Application Number: 15967536
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-09
Patent Classification: ["438", "113000"]

Abstract:
A semiconductor device may comprise a semiconductor die comprising an active surface and contact pads disposed. Conductive interconnects comprising first ends may be coupled to the contact pads and second ends may be disposed opposite the first ends. An encapsulant may comprise a planar surface disposed over the active surface of the semiconductor die. The planar surface may be offset from the second surface of the conductive interconnects by a distance greater than or equal to 1 micrometer. A build-up interconnect layer may be disposed over the planar surface and extend into the openings to electrically connect with the conductive interconnects. A method of making the semiconductor device may further comprise grinding a surface of the encapsulant to form the planar surface and the conductive residue across the planar surface. The conductive residue may be etched to remove the conductive residue and to reduce a height of the conductive interconnects.

Claim (Index 4):
The semiconductor device of  claim 1 , wherein the planar surface is free from a conductive residue formed by grinding the encapsulant and the conductive interconnects.

Metadata:
- Claim Count in Document: 42.0
- Percentile: 91.0
- Lexical Diversity: 2.49206
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15356208', '14642531', '13891006', '15354447', '15825055']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8729264951318476
- 35 USC 102 Novelty (BERT): 0.5314256300445995
- Combined Prediction Score: 0.8387764086231229
- Mean Citation Score: 320.31614
- Max Citation Score: 338.05963
- Similarity Product: 253.8410875845313

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test