PATENT CLAIM ANALYSIS

Application Number: 15876441
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-09
Patent Classification: ["710", "005000"]

Abstract:
Low noise serial interfaces with gated clock are provided herein. In certain configurations herein, a slave device of a serial interface includes a shift register for serially shifting in an interface data signal based on timing of an interface clock signal, a control circuit (for instance, a finite-state machine) for controlling the slave device, and a register bank for storing data programmed to the slave device via the serial interface. The control circuit cuts off or gates the interface clock signal in response to determining that an interface command received over the serial interface is not intended for the slave device.

Claim (Index 15):
The integrated circuit of  claim 13  wherein the control circuit is further configured to prevent the gated clock signal from toggling in response to determining that the slave address does not identify the slave device.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 86.0
- Lexical Diversity: 1.77419
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15177557', '15340880', '14324844', '14160900', '13361770']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.712268349601406
- 35 USC 102 Novelty (BERT): 0.5195685382191739
- Combined Prediction Score: 0.6929983684631827
- Mean Citation Score: 252.27093
- Max Citation Score: 313.0786700000001
- Similarity Product: 189.07461432347785

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test