PATENT CLAIM ANALYSIS

Application Number: 16231238
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["257", "686000"]

Abstract:
A stacked-chip apparatus includes a package substrate and an interposer with a chip stack disposed with a standoff that matches the interposer. A package-on-package stacked-chip apparatus includes a top package disposed on the interposer.

Claim (Index 33):
An apparatus comprising:\n a substrate including a die side and a land side; a chip stack disposed on the die side, the chip stack including a bottom chip disposed on the die side and a top chip disposed above the bottom chip, the bottom chip comprising is a flip-chip, the bottom chip including through-silicon vias extending therethrough, wherein the top chip is electrically coupled to the substrate using the through-silicon vias of the bottom chip, and wherein the chip stack has an offset height; and an interposer disposed on the die side, the interposer including an opening extending therethrough, the chip stack positioned on the substrate within the opening, the interposer surrounding the chip stack, wherein the interposer accommodates the offset height of the chip stack.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 98.0
- Lexical Diversity: 1.63636
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13741382', '13995917', '14813014', '13737923', '13219878']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9080342103795964
- 35 USC 102 Novelty (BERT): 0.4711736037359709
- Combined Prediction Score: 0.8643481497152339
- Mean Citation Score: 174.065088
- Max Citation Score: 233.82549
- Similarity Product: 220.59922395210384

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test