PATENT CLAIM ANALYSIS

Application Number: 15944772
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-07
Patent Classification: ["710", "023000"]

Abstract:
A processor includes a central processing unit (CPU) and a direct memory access (DMA) adapter circuit. The DMA adapter circuit includes a DMA controller circuit and is configured to interface with a legacy internal hardware peripheral and with a DMA-enabled internal hardware peripheral. The DMA-enabled internal hardware peripheral includes a first special function register (SFR). The legacy internal hardware peripheral includes no DMA features. The CPU is configured to execute a legacy application that accesses a setting in memory through the legacy internal hardware peripheral. Execution of the legacy application includes access by the CPU of the setting in memory. The DMA controller circuit is configured to access the setting in memory during execution of a DMA-enabled application through the DMA-enabled internal hardware peripheral.

Claim (Index 14):
The method of  claim 13 , wherein the second SFR and the third SFR share a same identified address.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 91.0
- Lexical Diversity: 2.74
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['10913606', '11928132', '15008650', '13475316', '10628163']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6445187509210207
- 35 USC 102 Novelty (BERT): 0.5213448042941348
- Combined Prediction Score: 0.6322013562583322
- Mean Citation Score: 185.043054
- Max Citation Score: 201.47165
- Similarity Product: 97.43255867428184

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test