PATENT CLAIM ANALYSIS

Application Number: 15754642
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-09
Patent Classification: ["708", "620000"]

Abstract:
Various examples of devices, methods and systems related to pulse based arithmetic units. In one example, a pulse domain device includes an augend area calculator to provide an augend area output for an augend pulse train; an addend area calculator to provide an addend area output for an addend pulse train; a resultant sum area (RSA) decoder to provide a RSA output using the augend and addend area outputs; and a pulse timing calculator to provide RSA output pulse timing. In another example, a pulse domain device includes a multiplicand area calculator to provide an multiplicand area output for a multiplicand pulse train; a multiplier area calculator to provide a multiplier area output for a multiplier pulse train; a resultant product area (RPA) decoder to provide a RPA output using the multiplicand and multiplier area outputs; and a pulse timing calculator to provide RPA output pulse timing.

Claim (Index 24):
The method of  claim 14 , wherein the constraint function preserves a one-to-one mapping with a unique inverse function.

Metadata:
- Claim Count in Document: 36.0
- Percentile: 88.0
- Lexical Diversity: 3.46809
- Patent Class: 708.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14984096', '12392637', '11036001', '13177549', '14718624']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4441071148248751
- 35 USC 102 Novelty (BERT): 0.5141194773139431
- Combined Prediction Score: 0.451108351073782
- Mean Citation Score: 199.53486400000003
- Max Citation Score: 215.84966
- Similarity Product: 124.18173983111024

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test