PATENT CLAIM ANALYSIS

Application Number: 16055895
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-02
Patent Classification: ["438", "460000"]

Abstract:
A method for producing thin MEMS chips on SOI substrate including: providing an SOI substrate having a silicon layer on a front side and having an oxide intermediate layer, producing a layer structure on the front side of the SOI substrate and producing a MEMS structure from this layer structure, capping the MEMS structure and producing a cavity, and etching a back side of the SOI substrate down to the oxide intermediate layer. Also described is a micromechanical component having a substrate, a MEMS layer structure having a MEMS structure in a cavity and a cap element, the MEMS structure and its cavity being enclosed by the substrate underneath and the cap element above, the substrate being made of polycrystalline silicon.

Claim (Index 19):
A micromechanical component, comprising:\n a Silicon-on-Insulator (SOI) substrate; a Micro-Electro-Mechanical System (MEMS) layer structure including a MEMS structure in a cavity and a cap element; wherein the MEMS structure and the cavity are enclosed by the substrate underneath and the cap element above, and wherein the SOI substrate is made of polycrystalline silicon.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 96.0
- Lexical Diversity: 2.5
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15252637', '15543700', '14622619', '15650953', '11842198']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8709842672252093
- 35 USC 102 Novelty (BERT): 0.4959359228274954
- Combined Prediction Score: 0.8334794327854379
- Mean Citation Score: 239.21868
- Max Citation Score: 259.49252
- Similarity Product: 201.4309770855999

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test