PATENT CLAIM ANALYSIS

Application Number: 15936602
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["257", "314000"]

Abstract:
The semiconductor device include a lower insulating layer; a gate stack disposed over the lower insulating layer; a plurality of supports extending from the lower insulating layer toward the gate stack; a source layer disposed between the lower insulating layer and the gate stack; and a channel pattern including a connection part disposed between the source layer and the gate stack.

Claim (Index 13):
The semiconductor device according to  claim 12 ,\n wherein the gate stack comprises gate electrodes and interlayer insulating layers that are alternately stacked, and wherein the gate electrodes and the interlayer insulating layers surround the pillars.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 90.0
- Lexical Diversity: 2.27586
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15927802', '15861861', '15934477', '15850225', '15160137']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9216214902902808
- 35 USC 102 Novelty (BERT): 0.4796947226200627
- Combined Prediction Score: 0.8774288135232591
- Mean Citation Score: 191.232118
- Max Citation Score: 216.75072000000003
- Similarity Product: 178.34549842826848

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test