PATENT CLAIM ANALYSIS

Application Number: 16008877
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["365", "051000"]

Abstract:
A memory device may include a first half memory block, a second half memory block, a row decoder group, and a read/write circuit which may be disposed between the first half memory block and the second half memory block. The read/write circuit may be coupled to the first half memory block and the second half memory block through a first bit line and a second bit line. The row decoder group may be configured to simultaneously select the first half memory block and the second half memory block in response to a single block selection signal.

Claim (Index 18):
The memory device of  claim 14 , wherein each of the first row decoder group and the second row decoder group includes pass transistor groups for individually controlling the respective first half memory blocks, and\n wherein the pass transistor groups are coupled to the respective second half memory blocks.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 94.0
- Lexical Diversity: 2.75676
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14512965', '13717160', '14996249', '13772868', '14966894']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8081587628634543
- 35 USC 102 Novelty (BERT): 0.4709652935978223
- Combined Prediction Score: 0.7744394159368911
- Mean Citation Score: 187.015568
- Max Citation Score: 190.14247
- Similarity Product: 144.77249034360588

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test