PATENT CLAIM ANALYSIS

Application Number: 16014672
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["438", "622000"]

Abstract:
A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Claim (Index 3):
The memory device according to  claim 2 , wherein the first rectifier part is a diode.

Metadata:
- Claim Count in Document: 39.0
- Percentile: 94.0
- Lexical Diversity: 3.06667
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15465194', '14996071', '14252024', '14057878', '12163145']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8863133056856373
- 35 USC 102 Novelty (BERT): 0.5494226253005452
- Combined Prediction Score: 0.852624237647128
- Mean Citation Score: 384.494462
- Max Citation Score: 407.76825
- Similarity Product: 267.4622685177773

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test