PATENT CLAIM ANALYSIS

Application Number: 15871742
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-01
Patent Classification: ["438", "149000"]

Abstract:
A thin film transistor array panel according to an exemplary embodiment includes: a substrate; a metal pattern positioned on the substrate; a buffer layer positioned on the metal pattern; and a semiconductor layer positioned on the buffer layer and including a source region, a channel region, and a drain region, wherein the metal pattern overlaps at least one of the source region and the drain region, and the metal pattern does not overlap the channel region.

Claim (Index 3):
The thin film transistor array panel of  claim 1 , wherein the metal pattern comprises a first metal pattern overlapping the drain region.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 86.0
- Lexical Diversity: 2.07317
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15436066', '14809830', '14166183', '14184361', '14303794']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8650644732936963
- 35 USC 102 Novelty (BERT): 0.5141194773139431
- Combined Prediction Score: 0.829969973695721
- Mean Citation Score: 275.13653400000004
- Max Citation Score: 288.41534
- Similarity Product: 227.7963630072236

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test