PATENT CLAIM ANALYSIS

Application Number: 16229260
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["257", "368000"]

Abstract:
Methods are disclosed herein for fabricating semiconductor devices having shared source/drain contacts. An exemplary semiconductor device includes a high-k/metal gate stack disposed over a substrate. The high-k/metal gate stack is disposed between a first source/drain feature and a second source/drain feature. A first spacer set is disposed along sidewalls of the high-k/metal gate stack. A first interlevel dielectric (ILD) layer is disposed over the substrate. Upper portions of the first spacer set that extend above the first ILD layer have a tapered width. A second spacer set is disposed on the upper portions of the first spacer set and over the first ILD layer. A second ILD layer is disposed over the first ILD layer. A contact feature extends through the second ILD layer to the first source/drain feature and the second source/drain feature. The contact feature spans uninterrupted between the first source/drain feature and the second source/drain feature.

Claim (Index 9):
A semiconductor device comprising:\n a first gate stack, a second gate stack, and a third gate stack disposed over a substrate, wherein a first source/drain feature is disposed over the substrate between the first gate stack and the second gate stack and a second source/drain feature is disposed over the substrate between the second gate stack and the third gate stack; a first spacer and a second spacer disposed along respective sidewalls of the first gate stack, a third spacer and a fourth spacer disposed along respective sidewalls of the second gate stack, and a fifth spacer and a sixth spacer disposed along respective sidewalls of the third gate stack; a first interlevel dielectric (ILD) layer disposed over the substrate, wherein an upper portion of the first spacer, an upper portion of the second spacer, an upper portion of the third spacer, an upper portion of the fourth spacer, an upper portion of the fifth spacer, and an upper portion of the sixth spacer extend above the first ILD layer and have a tapered width; a seventh spacer disposed on the upper portion of the second spacer, an eighth spacer disposed on the upper portion of the third spacer, a ninth spacer disposed on the upper portion of the fourth spacer, and a tenth spacer disposed on the upper portion of the fifth spacer, wherein the seventh, eighth, ninth, and tenth spacers are disposed over the first ILD layer; a second ILD layer disposed over the first ILD layer; a first spacer layer disposed on the upper portion of the first spacer and a second spacer layer disposed on the upper portion of the sixth spacer, wherein the first spacer layer and the second spacer layer are further disposed between the first ILD layer and the second ILD layer; and a contact feature extending through the second ILD layer, such that the contact feature is coupled with the first source/drain feature and the second source/drain feature, wherein the contact feature spans uninterrupted between the first source/drain feature and the second source/drain feature over the second gate stack.

Metadata:
- Claim Count in Document: 34.0
- Percentile: 98.0
- Lexical Diversity: 2.68333
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15790975', '14477311', '14521965', '14830217', '15628267']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8997227226437736
- 35 USC 102 Novelty (BERT): 0.4968110221745455
- Combined Prediction Score: 0.8594315525968509
- Mean Citation Score: 208.86452
- Max Citation Score: 231.544
- Similarity Product: 174.96914570093156

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test