PATENT CLAIM ANALYSIS

Application Number: 15874081
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "043000"]

Abstract:
Techniques are disclosed for methods of post-treating an etch stop or a passivation layer in a thin film transistor to increase the stability behavior of the thin film transistor.

Claim (Index 1):
A method of forming a thin film transistor, comprising:\n depositing a semiconductor layer over a gate dielectric, a gate electrode and a substrate; depositing a conductive layer on the semiconductor layer; forming source and drain electrodes; depositing one or more passivation layers over the source and drain electrodes; and exposing the one or more passivation layers to an inert plasma.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 86.0
- Lexical Diversity: 1.25
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15412519', '13490813', '15412545', '12405897', '13183347']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9064864073902508
- 35 USC 102 Novelty (BERT): 0.5020506287351222
- Combined Prediction Score: 0.8660428295247379
- Mean Citation Score: 233.884052
- Max Citation Score: 255.1084
- Similarity Product: 195.77724829435348

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test