PATENT CLAIM ANALYSIS

Application Number: 16024001
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["315", "20000R"]

Abstract:
The present disclosure provides a line voltage compensation circuit, an LED drive system and a drive method. The line voltage compensation circuit is configured to receive signal reflecting bus voltage and output line voltage compensation signal based on the received signal reflecting bus voltage, a preset baseline voltage and at least one reference voltage, wherein the line voltage compensation signal has a multi-segment linear relationship with the received signal reflecting bus voltage. In the technical solution provided by the present application, the linear relationship between the feedback voltage of the LED load and the built-in baseline voltage is adjusted based on at least one preset threshold to output segment-based line voltage compensation signal. Compared with the line voltage compensation technology with a single slope, better input voltage line regulation and better LED current line regulation can be obtained by adopting the technical solution provided by the present application.

Claim (Index 27):
The line voltage compensation method of  claim 21 , wherein the step of outputting a line voltage compensation signal based on the signal reflecting bus voltage, a preset baseline voltage and at least three reference voltages comprises:\n comparing the signal reflecting bus voltage and a preset first reference voltage, outputting a first control signal based on the compared result; and outputting the line voltage compensation signal based on the signal reflecting bus voltage, the first control signal and the baseline voltage; when detecting that a fed-back line voltage compensation signal is smaller than or equal to a preset second reference voltage, outputting the line voltage compensation signal based on the signal reflecting bus voltage, the first control signal, the second reference voltage and the baseline voltage; and when detecting that a fed-back line voltage compensation signal is smaller than the third reference voltage, outputting the line voltage compensation signal based on the signal reflecting bus voltage, the first control signal, the second reference voltage, the third reference voltage and the baseline voltage; wherein the second reference voltage is smaller than the first reference voltage, and the third reference voltage is smaller than the second reference voltage.

Metadata:
- Claim Count in Document: 34.0
- Percentile: 94.0
- Lexical Diversity: 2.34328
- Patent Class: 315.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14567510', '15756330', '14824100', '14418911', '13433544']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7300171499418157
- 35 USC 102 Novelty (BERT): 0.4905993622348638
- Combined Prediction Score: 0.7060753711711205
- Mean Citation Score: 201.337902
- Max Citation Score: 220.38333
- Similarity Product: 166.5470960837996

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test