PATENT CLAIM ANALYSIS

Application Number: 15984803
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-04
Patent Classification: ["365", "230030"]

Abstract:
Provided herein may be a memory chip, a package device having the memory chip, and a method of operating the package device. The memory chip comprising a plurality of memory blocks each including a plurality of memory cells for storing data; a plurality of input/output pads to which a chip address is inputted; and a plurality of peripheral circuits configured to program the chip address to a selected memory block among the memory blocks.

Claim (Index 13):
The package device according to  claim 7 , wherein the enable output pad included in a memory chip to which the chip address is lastly inputted among the memory chips is not coupled to any one of the enable input pads of the other memory chips.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 93.0
- Lexical Diversity: 1.90476
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10727150', '12270292', '13718222', '11508176', '14174435']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8051896236325267
- 35 USC 102 Novelty (BERT): 0.4764328759034262
- Combined Prediction Score: 0.7723139488596167
- Mean Citation Score: 183.020116
- Max Citation Score: 184.95575
- Similarity Product: 131.85981269946694

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test