PATENT CLAIM ANALYSIS

Application Number: 15868544
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-01
Patent Classification: ["257", "296000"]

Abstract:
A semiconductor may include a substrate including a cell array region and a TSV region, an insulation layer disposed on the substrate and having a recess region on the TSV region, a capacitor on the insulation layer of the cell array region, a dummy support pattern disposed on the insulation layer of the TSV region and overlapping the recess region, when viewed in plan, and a TSV electrode penetrating the dummy support pattern and the substrate.

Claim (Index 3):
The semiconductor device of  claim 1 , wherein an area of the dummy support pattern is greater than an area of the recess region, when viewed in plan.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 86.0
- Lexical Diversity: 2.41176
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14588506', '15373922', '14297302', '15842029', '15661280']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9232125109069048
- 35 USC 102 Novelty (BERT): 0.4894304336744929
- Combined Prediction Score: 0.8798343031836635
- Mean Citation Score: 203.862666
- Max Citation Score: 213.76093
- Similarity Product: 156.58300637287385

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test