PATENT CLAIM ANALYSIS

Application Number: 16028180
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-02
Patent Classification: ["365", "230030"]

Abstract:
To prolong the lifetime of a semiconductor memory device without performing complicated control. A semiconductor memory device according to one embodiment is equipped with a bank A and a bank B operable complementarily to each other, and a bank selection circuit which selects either one of the banks A and B. The bank selection circuit alternately switches the bank to be selected, each time an erase command to instruct erasing of data in either one of the banks A and B is issued.

Claim (Index 2):
The semiconductor memory device according to  claim 1 ,\n wherein the first and second banks are respectively equipped with a plurality of block areas corresponding to erase units of data, wherein the block areas of the first bank and the block areas of the second bank are provided to correspond to each other, and wherein the bank selection circuit is configured to select either one of the block area of the first bank and the block area of the second bank, which correspond to each other, and alternately switches the block area to be selected, each time the erase command is issued.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 95.0
- Lexical Diversity: 1.76
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10375116', '11126302', '13597498', '12685245', '11453830']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8090938378454082
- 35 USC 102 Novelty (BERT): 0.4605212734961673
- Combined Prediction Score: 0.7742365814104841
- Mean Citation Score: 184.03453600000003
- Max Citation Score: 185.5523
- Similarity Product: 152.87297581909894

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test