PATENT CLAIM ANALYSIS

Application Number: 15884503
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "192000"]

Abstract:
A semiconductor device comprises a first layer of a substrate arranged on a second layer of the substrate the second layer of the substrate including a doped 111-V semiconductor material barrier layer, a gate stack arranged on a channel region of the first layer of a substrate, a spacer arranged adjacent to the gate stack on the first layer of the substrate, an undoped epitaxially grown III-V semiconductor material region arranged on the second layer of the substrate, and an epitaxially grown source/drain region arranged on the undoped epitaxially grown III-V semiconductor material region, and a portion of the first layer of the substrate.

Claim (Index 2):
The device of  claim 1 , wherein the first layer of the substrate includes a III-V semiconductor material, portions of which include doped source/drain extension regions.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 86.0
- Lexical Diversity: 3.14286
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14974162', '14968960', '15234428', '15401530', '15017868']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9270251597022936
- 35 USC 102 Novelty (BERT): 0.5089047090431363
- Combined Prediction Score: 0.8852131146363779
- Mean Citation Score: 239.32005200000003
- Max Citation Score: 273.75974
- Similarity Product: 192.67978035500647

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test