PATENT CLAIM ANALYSIS

Application Number: 16168681
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-03
Patent Classification: ["327", "427000"]

Abstract:
An RF switching device having distributed shunt switches distributed along transmission lines to improve RF bandwidth as well as the signal isolation of the device. The shunt switches may be physically positioned on both sides of the transmission lines to keep an integrated circuit (IC) design essentially symmetrical so as to provide predictable and reliable operational characteristics. Some embodiments include stacked FET shunt switches and series switches to tolerate high voltages. In some embodiments, the gate resistor for each FET shunt switch is divided into two or more portions.

Claim (Index 15):
A radio frequency switching device including:\n (a) at least one common port; and (b) at least one transmission line arm, at least one such transmission line arm including:\n (1) at least one field effect transistor (FET) series switch configured to selectively couple the transmission line arm to at least one common port; \n (2) at least one terminal port; \n (3) at least one transmission line having a length and first and second ends, the first end of the at least one transmission line being coupled to a respective one of the at least one FET series switch, and the second end of the at least one transmission line being coupled to a respective one of the at least one terminal port, each transmission line being arrayed on a circuit substrate so as to define a first side and a second side of the transmission line; and \n (4) for at least one arrayed transmission line, a plurality of FET shunt switch units connected between circuit ground and respective connection junctions along the length of the at least one arrayed transmission line in a tuning network configuration, wherein at least a first FET shunt switch unit is positioned on the circuit substrate adjacent the first side of the arrayed transmission line, and at least a second FET shunt switch unit is positioned on the circuit substrate adjacent the second side of the arrayed transmission line, wherein the respective connection junctions of the at least first FET shunt switch unit and the at least second FET shunt switch unit are offset relative to each other along the length of the arrayed transmission line;\n wherein each FET of the plurality of FET shunt switch units includes a primary resistor coupled to a gate of such FET in close proximity to such gate, and further including at least one secondary resistor each series coupled to the primary resistor of two or more of such FETs but located farther away from the gate of each such FET than the primary resistor coupled to each such gate; and \n wherein each FET shunt switch unit has an OFF state capacitance, and the tuning network configuration compensates for the OFF state capacitance.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 97.0
- Lexical Diversity: 1.37143
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15660675', '15597029', '14610588', '14995023', '14527168']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.84093926968423
- 35 USC 102 Novelty (BERT): 0.5948532918695074
- Combined Prediction Score: 0.8163306719027578
- Mean Citation Score: 436.666988
- Max Citation Score: 522.6432
- Similarity Product: 484.20108665885925

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test