PATENT CLAIM ANALYSIS

Application Number: 15968065
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-03
Patent Classification: ["326", "030000"]

Abstract:
A memory system includes: a buffer memory device; and a memory controller configured to communicate data with the buffer memory device, wherein the memory controller includes: an input/output power voltage sensor configured to generate a first signal by sensing a change in input/output power voltage; and an impedance calibration circuit configured to perform an impedance calibration operation in response to the first signal.

Claim (Index 15):
A memory system comprising:\n a buffer memory device including a dynamic random access memory (DRAM); a memory controller configured to perform a data output operation of outputting data to the DRAM; and a calibration resistor coupled to the memory controller, wherein the memory controller includes: a reference voltage generating unit configured to generate a first mode reference voltage and a second mode reference voltage lower than the first mode reference voltage, and generate a reference voltage by selecting any one of the first mode reference voltage and the second mode reference voltage, based on a mode selection signal; an input/output power voltage sensor configured to generate a first signal activated when an input/output power voltage is decreased to a certain level or lower, based on the reference voltage, while the data output operation is being performed; and an impedance calibration circuit configured to perform an impedance calibration operation, based on the calibration resistor and the reference voltage, and start the impedance calibration operation in response to the first signal, wherein the input/output power voltage sensor includes:\n a resistor ladder configured to include a plurality of resistors coupled in series, and generate a plurality of division voltages having voltage levels different from one another, \n an input/output power voltage selector configured to output a first voltage by selecting any one of the plurality of division voltages; and \n a comparator configured to output the first signal by comparing the first voltage to the reference voltage.

Metadata:
- Claim Count in Document: 13.0
- Percentile: 93.0
- Lexical Diversity: 1.81579
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15968026', '13239478', '14723614', '15922332', '15200064']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6373317844435058
- 35 USC 102 Novelty (BERT): 0.5215799675265168
- Combined Prediction Score: 0.6257566027518069
- Mean Citation Score: 259.901554
- Max Citation Score: 337.2395
- Similarity Product: 278.3141035176516

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test