PATENT CLAIM ANALYSIS

Application Number: 16377870
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-08
Patent Classification: ["257", "774000"]

Abstract:
A link device with a large density routing is attached to a package in order to provide a high-density interconnect pathway to interconnect semiconductor devices. In an embodiment the package is an integrated fan out package. The link device may be bonded on either side of the package, and the package may optionally comprise through package vias. The link device may also be an integrated passive device that includes resistors, inductor, and capacitor components.

Claim (Index 1):
A semiconductor device comprising:\n a first redistribution layer; a first semiconductor die over the first redistribution layer; a second semiconductor die over the first redistribution layer, the second semiconductor die being separated from the first semiconductor die by an encapsulant; a second redistribution layer over the first semiconductor die, the second semiconductor die, and the encapsulant; and a first linking device electrically connecting the first semiconductor die to the second semiconductor die through the second redistribution layer.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 100.0
- Lexical Diversity: 1.62
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15886210', '15485616', '14463288', '15200789', '14799756']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9147012383443796
- 35 USC 102 Novelty (BERT): 0.4686741409043995
- Combined Prediction Score: 0.8700985286003815
- Mean Citation Score: 183.342438
- Max Citation Score: 203.45543
- Similarity Product: 184.61897642448423

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test