PATENT CLAIM ANALYSIS

Application Number: 16105385
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["324", "754190"]

Abstract:
A multi-chip semiconductor apparatus includes a plurality of semiconductor chips stacked and packaged therein, wherein each of the semiconductor chips includes: a through-silicon via (TSV) formed through the semiconductor chip; a probe pad exposed to an outside of the semiconductor chip so as to enable a probing test; a bump pad exposed to the outside of the semiconductor chip and electrically connected to the TSV; and a conductive layer electrically connecting the probe pad and the bump pad inside the semiconductor chip.

Claim (Index 6):
The method according to  claim 4 , wherein the signal serving the exposed probe pad passes through the memory cell block receiving the enabled chip select signal and does not pass through the memory cell block receiving a disabled chip select signal.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 96.0
- Lexical Diversity: 1.95652
- Patent Class: 324.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13720497', '14887233', '14093853', '13439447', '14158117']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6269357992678227
- 35 USC 102 Novelty (BERT): 0.5185686551801231
- Combined Prediction Score: 0.6160990848590527
- Mean Citation Score: 280.541018
- Max Citation Score: 333.8709
- Similarity Product: 230.3658854391217

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test