PATENT CLAIM ANALYSIS

Application Number: 16010008
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-10
Patent Classification: ["365", "189050"]

Abstract:
A semiconductor device includes a clock shifting circuit suitable for shifting a write pulse which is synchronized with a clock, in response to write latency signals, and generating shifting pulses and a mask write read signal; and a flag generation circuit suitable for generating a mask write flag by latching a mask write command or outputting the mask write command as the mask write flag, in response to the shifting pulses.

Claim (Index 13):
The semiconductor device according to  claim 12 , wherein, in a period in which a write latency is equal to or greater than a first predetermined value, the first selector transfers the output signal of the first latch to the second latch, the second selector selects and outputs the output signal of the second latch, and the third selector outputs the output signal of the second selector as the mask write flag.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 94.0
- Lexical Diversity: 1.94872
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11647761', '11683532', '11819570', '15641098', '13096669']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8215668167855279
- 35 USC 102 Novelty (BERT): 0.494878977054314
- Combined Prediction Score: 0.7888980328124066
- Mean Citation Score: 244.137204
- Max Citation Score: 262.9751
- Similarity Product: 195.7051893386125

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test