PATENT CLAIM ANALYSIS

Application Number: 15878883
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["257", "774000"]

Abstract:
In a method for manufacturing a semiconductor device, a first interlayer dielectric layer is formed over a substrate. First recesses are formed in the first interlayer dielectric layer. First metal wirings are formed in the first recesses. A first etch-resistance layer is formed in a surface of the first interlayer dielectric layer between the first metal wirings but not on upper surfaces of the first metal wirings. A first insulating layer is formed on the first etch-resistance layer and the upper surfaces of the first metal wirings.

Claim (Index 13):
The method of  claim 11 , wherein:\n in the forming second recesses, the second interlayer dielectric layer is etched, and the etching of the second interlayer dielectric layer substantially stops at the first insulating layer, then, the first insulating layer is etched to expose the upper surfaces of the first metal wirings.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 2.58333
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15276051', '14840830', '15157159', '15816843', '15484344']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9195303725707812
- 35 USC 102 Novelty (BERT): 0.4921916234183187
- Combined Prediction Score: 0.8767964976555349
- Mean Citation Score: 185.757712
- Max Citation Score: 227.56488
- Similarity Product: 170.14767816149708

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test