PATENT CLAIM ANALYSIS

Application Number: 16234895
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-09
Patent Classification: ["710", "005000"]

Abstract:
A memory device includes: a plurality of first control signal interfaces respectively corresponding to a plurality of channels, and suitable for receiving control signals from a host; a plurality of first data interfaces respectively corresponding to the plurality of channels, and suitable for exchanging data and data strobe signals with the host; a second control signal interface suitable for receiving control signals through a selected one of the first control signal interfaces and a selected one of the channels and outputting the received control signals, in a monitoring mode; and a second data interface suitable for receiving a part of the data and data strobe signals exchanged through a selected one of the first data interfaces and the selected channel, and outputting the received part of the data and data strobe signals, in the monitoring mode.

Claim (Index 8):
A memory system comprising:\n a memory device comprising a plurality of channels, a physical (PHY) interface and a direct access (DA) interface; a memory controller comprising a physical (PHY) interface suitable for transmitting control signals to the plurality of channels, and exchanging data through the plurality of channels; and an interposer suitable for transferring control signals and data between the memory controller and the memory device, wherein the PHY interface of the memory device is suitable for receiving the control signals transmitted from the memory controller and exchanging data with the memory controller; and the DA interface is suitable for receiving control signals through a selected one of the channels, among the control signals received through the PHY interface of the memory device, and receiving a part of the data through the selected channel among the data exchanged through the PHY interface of the memory device, and outputting the received control signals and the received part of the data, in a monitoring mode; and wherein the interposer transfers the control signals and data between the PHY interface of the memory controller and the PHY interface of the memory device.

Metadata:
- Claim Count in Document: 38.0
- Percentile: 98.0
- Lexical Diversity: 3.31818
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['16152549', '14525875', '10101564', '10840898', '09840967']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6479265153211621
- 35 USC 102 Novelty (BERT): 0.4899568978863706
- Combined Prediction Score: 0.632129553577683
- Mean Citation Score: 158.369004
- Max Citation Score: 202.86377
- Similarity Product: 133.36373308173657

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test