PATENT CLAIM ANALYSIS

Application Number: 15921771
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["365", "189011"]

Abstract:
Provided are a voltage control circuit including an assist circuit and a memory device including the voltage control circuit. The memory device includes: a volatile memory cell array, which is connected to a plurality of word lines and includes a memory cell including at least one transistor; and an assist circuit, which is connected to at least one of the plurality of word lines and adjusts a driving voltage level of each of the plurality of word lines, wherein the assist circuit includes a diode N-channel metal oxide semiconductor (NMOS) transistor having a gate and a drain connected to each other.

Claim (Index 17):
The memory device according to  claim 16 , wherein the at least one NMOS transistor comprises an NMOS transistor having a diode connection structure, in which one end and a gate of the at least one NMOS transistor are connected to the first node, and the other end thereof is tied to a point of reference potential.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 90.0
- Lexical Diversity: 2.15686
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15263724', '14658353', '12457936', '13836902', '15052188']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7892721720206141
- 35 USC 102 Novelty (BERT): 0.4960374129808661
- Combined Prediction Score: 0.7599486961166393
- Mean Citation Score: 231.25737
- Max Citation Score: 249.27936
- Similarity Product: 190.2899278237152

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test