PATENT CLAIM ANALYSIS

Application Number: 16044994
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["711", "129000"]

Abstract:
In one embodiment, the present invention is directed to a processor having a plurality of cores and a cache memory coupled to the cores and including a plurality of partitions. The processor can further include a logic to dynamically vary a size of the cache memory based on a memory boundedness of a workload executed on at least one of the cores. Other embodiments are described and claimed.

Claim (Index 1):
A processor comprising:\n a first domain including a plurality of cores to independently execute instructions; a second domain including at least one graphics engine; a cache memory coupled to the plurality of cores and including a plurality of partitions; and a power controller coupled to the first domain and the cache memory, wherein the power controller includes a first logic to dynamically vary a size of the cache memory based at least in part on a memory boundedness of a workload to be executed on at least one of the plurality of cores, and to cause at least one of the plurality of partitions to be powered with a retention voltage to maintain a state of the at least one core of the plurality of cores when the processor is in a package low power state in which the first domain and the second domain are in a low power state.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 95.0
- Lexical Diversity: 1.67442
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14840639', '13285465', '15270208', '14451807', '13282896']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5034890638223141
- 35 USC 102 Novelty (BERT): 0.4053070362339409
- Combined Prediction Score: 0.4936708610634768
- Mean Citation Score: 91.7707112
- Max Citation Score: 101.829346
- Similarity Product: 100.17528531603908

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test