PATENT CLAIM ANALYSIS

Application Number: 15902092
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-07
Patent Classification: ["341", "118000"]

Abstract:
An analog-to-digital converter (ADC) includes a comparator, a voltage reference circuit, a first capacitive digital-to-analog converter (CDAC), and a second CDAC. The first CDAC includes a plurality of capacitors. Each of the capacitors of the first CDAC includes a top plate coupled to a first input of the comparator, and a bottom plate switchably coupled to an output of the voltage reference circuit. The second CDAC includes a plurality of capacitors. Each of the capacitors of the second CDAC includes a top plate coupled to a second input of the comparator, and a bottom plate switchably coupled to a ground reference.

Claim (Index 2):
The ADC of  claim 1 , wherein:\n the first CDAC comprises a first plurality of switches, each of the switches configured to switchably couple the bottom plate of one of the capacitors of the first CDAC to the output of the voltage reference circuit; the second CDAC comprises a first plurality of switches, each of the switches configured to switchably couple the bottom plate of one of the capacitors of the second CDAC to the ground reference.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 88.0
- Lexical Diversity: 3.19444
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15836976', '12383696', '12381741', '12799323', '11358289']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.642549376390859
- 35 USC 102 Novelty (BERT): 0.5155805058689862
- Combined Prediction Score: 0.6298524893386718
- Mean Citation Score: 281.697658
- Max Citation Score: 303.87006
- Similarity Product: 252.3569325920928

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test