PATENT CLAIM ANALYSIS

Application Number: 15922793
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["714", "755000"]

Abstract:
The present disclosure, in various embodiments, describes technologies and techniques for use by a data storage controller for decoding codewords during an error correction read recovery process. In illustrative examples, an iterative procedure exploits artificial codewords generated using information obtained from a NAND or other non-volatile memory (NVM) in a previous sense operation. That is, procedures are described that use information obtained in one stage of read recovery to facilitate a subsequent stage to reduce the need to perform addition NAND senses. In one example, information obtained from a sense operation performed for an initial hard bit decode is used in subsequent soft bit decodes. Moreover, iterative decoding procedures are provided that progressively increase correction strength. The procedures may alternate between hard and soft reads while using syndrome weight to determine a failed bit code gradient for identifying the sensing voltage for a next hard sense.

Claim (Index 14):
The method of  claim 1 , wherein the memory device is a non-volatile memory (NVM), and wherein the sense values are read from the NVM.

Metadata:
- Claim Count in Document: 65.0
- Percentile: 90.0
- Lexical Diversity: 1.63265
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14087282', '14927088', '14697904', '13468968', '15460155']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3246160125074739
- 35 USC 102 Novelty (BERT): 0.4908288193731765
- Combined Prediction Score: 0.3412372931940442
- Mean Citation Score: 213.249914
- Max Citation Score: 225.89502
- Similarity Product: 159.22091058770656

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test