PATENT CLAIM ANALYSIS

Application Number: 16243029
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-07
Patent Classification: ["455", "574000"]

Abstract:
Methods and apparatus relating to advanced graphics Power State management are described. In one embodiment, measurement logic detects information about idle transitions and active transitions of a power-well of a processor. In turn, determination logic determines performance loss and/or energy gain based at least in part on the detected information and power-on latency of the power-well of the processor. Other embodiments are also disclosed and claimed.

Claim (Index 9):
The apparatus of  claim 1 , wherein the processor comprises the measurement logic or the determination logic.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 99.0
- Lexical Diversity: 1.38462
- Patent Class: 455.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15720906', '15719541', '14841362', '15856048', '13539414']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6994807413898962
- 35 USC 102 Novelty (BERT): 0.495030821844742
- Combined Prediction Score: 0.6790357494353808
- Mean Citation Score: 183.096052
- Max Citation Score: 261.69254
- Similarity Product: 232.1232079092001

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test