PATENT CLAIM ANALYSIS

Application Number: 16141285
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["712", "215000"]

Abstract:
Fast issuance and execution of a multi-width instruction across multiple slices in a parallel slice processor core is supported in part through the use of an early notification signal passed between issue logic associated with multiple slices handling that multi-width instruction coupled with an issuance of a different instruction by the originating issue logic for the early notification signal.

Claim (Index 14):
The circuit arrangement of  claim 1 , wherein the early notification signal comprises an instruction tag (ITAG) signal broadcast to the second execution slice to resolve any dependencies with other instructions, wherein each of the first and second issue logic circuits is configured to broadcast an ITAG signal for each instruction issued thereby, and wherein the first issue logic circuit is further configured to broadcast the ITAG signal for the multi-width instruction a cycle early to actual issuance of the multi-width instruction by the first issue logic circuit.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 97.0
- Lexical Diversity: 1.5
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15939367', '15093192', '14595549', '16048946', '15093172']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6572506253420816
- 35 USC 102 Novelty (BERT): 0.5621710742452838
- Combined Prediction Score: 0.6477426702324017
- Mean Citation Score: 354.655344
- Max Citation Score: 439.212
- Similarity Product: 425.84438824224463

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test