PATENT CLAIM ANALYSIS

Application Number: 15951021
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["257", "690000"]

Abstract:
A semiconductor package includes a leadframe and a semiconductor die attached to the leadframe by way of solder posts. In a stacked arrangement, the package also includes a passive component disposed between the leadframe and the semiconductor die and electrically connected to the semiconductor die through the leadframe.

Claim (Index 14):
The semiconductor package of  claim 13 , wherein a height of the solder posts is greater than a height of the capacitor.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 1.75862
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['11307384', '11766095', '15141028', '11234528', '11459317']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9045780317448686
- 35 USC 102 Novelty (BERT): 0.4952691707634742
- Combined Prediction Score: 0.8636471456467292
- Mean Citation Score: 175.24960800000005
- Max Citation Score: 177.72406
- Similarity Product: 119.39233592514992

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test