PATENT CLAIM ANALYSIS

Application Number: 15907474
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-05
Patent Classification: ["257", "737000"]

Abstract:
In an embodiment, a device includes: an integrated circuit die; a first dielectric layer over the integrated circuit die; a first metallization pattern extending through the first dielectric layer to electrically connect to the integrated circuit die; a second dielectric layer over the first metallization pattern; an under bump metallurgy extending through the second dielectric layer; a third dielectric layer over the second dielectric layer and portions of the under bump metallurgy; a conductive ring sealing an interface of the third dielectric layer and the under bump metallurgy; and a conductive connector extending through the center of the conductive ring, the conductive connector electrically connected to the under bump metallurgy.

Claim (Index 18):
The method of  claim 15 , further comprising:\n coating exposed portions of the under bump metallurgy with flux, the conductive ring separating the flux from sides of the third dielectric layer defining the opening; and placing a conductive connector on the flux and the conductive ring.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 88.0
- Lexical Diversity: 3.025
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15284266', '14671477', '14605848', '15272491', '14478471']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8950707000645424
- 35 USC 102 Novelty (BERT): 0.4742691070643947
- Combined Prediction Score: 0.8529905407645276
- Mean Citation Score: 174.596508
- Max Citation Score: 186.51059
- Similarity Product: 152.46876009328008

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test