PATENT CLAIM ANALYSIS

Application Number: 15891074
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-05
Patent Classification: ["257", "288000"]

Abstract:
A semiconductor device includes a substrate having a channel region; a gate stack over the channel region; a seal spacer covering a sidewall of the gate stack, the seal spacer including silicon nitride; a gate spacer covering a sidewall of the seal spacer, the gate spacer including silicon oxide, the gate spacer having a first vertical portion and a first horizontal portion; and a first dielectric layer covering a sidewall of the gate spacer, the first dielectric layer including silicon nitride.

Claim (Index 21):
The semiconductor device of  claim 13 , wherein the upper sidewall physically contacts the first doped S/D region and the lower sidewall physically contacts the second doped S/D region.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 88.0
- Lexical Diversity: 2.8125
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15623539', '12433356', '15163049', '14795751', '15061762']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9179054974722988
- 35 USC 102 Novelty (BERT): 0.4839208625210067
- Combined Prediction Score: 0.8745070339771696
- Mean Citation Score: 170.67185
- Max Citation Score: 206.612
- Similarity Product: 157.7515573062897

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test