PATENT CLAIM ANALYSIS

Application Number: 15972920
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["323", "303000"]

Abstract:
A voltage regulator that includes an input voltage; a first JFET transistor, the input voltage being applied to a drain of the first JFET transistor; a second JFET transistor, the input voltage being applied to a drain of the second JFET transistor; and a resistor string, the resistor string including a first resistor, a second resistor and a third resistor, the resistor string and the second JFET transistor forming a voltage reference circuit having a reference voltage.

Claim (Index 1):
A voltage regulator comprising:\n an input voltage; a first JFET transistor, the input voltage being applied to a drain of the first JFET transistor; a second JFET transistor, the input voltage being applied to a drain of the second JFET transistor, and a resistor string, the resistor string including a first resistor, a second resistor and a third resistor, the resistor string and the second JFET transistor forming a voltage reference circuit having a reference voltage.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 93.0
- Lexical Diversity: 2.86667
- Patent Class: 323.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['11901847', '15676223', '12229665', '11504064', '10368074']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7395012548266986
- 35 USC 102 Novelty (BERT): 0.4928440682293454
- Combined Prediction Score: 0.7148355361669633
- Mean Citation Score: 241.50622400000003
- Max Citation Score: 262.39716
- Similarity Product: 200.7990428196429

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test