PATENT CLAIM ANALYSIS

Application Number: 15758021
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-09
Patent Classification: ["365", "185290"]

Abstract:
A semiconductor memory device of the disclosure includes: a block including a plurality of pages; and a controller that controls writing, erasing, and reading of data. Each of the pages includes a plurality of memory cells each being changeable to any of four or more states. In a case of erasing only a partial page of the plurality of pages, the controller overwrites the partial page with predetermined data that causes state change only by one stage.

Claim (Index 5):
The semiconductor memory device according to  claim 2 , wherein\n the plurality of pages include a first page and a second page, the controller overwrites all of the memory cells in the second page with data of \u201c1\u201d as the predetermined data in a case where the second page as the partial page is erased before the first page is erased, and overwrites all of the memory cells in the first page with, as the predetermined data, data of a logical product of the first page and the second page in a case where the first page as the partial page is further erased after the second page is erased.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 90.0
- Lexical Diversity: 1.7
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10499667', '14860086', '11402977', '14956715', '14073155']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8138805306497441
- 35 USC 102 Novelty (BERT): 0.4732995803912759
- Combined Prediction Score: 0.7798224356238972
- Mean Citation Score: 190.15665
- Max Citation Score: 203.5102
- Similarity Product: 157.29921696925163

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test