PATENT CLAIM ANALYSIS

Application Number: 16001869
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["365", "222000"]

Abstract:
A memory device is described. The memory device includes logic circuitry to perform calibrations of resistive network terminations and data drivers of the memory device while the memory device is within a self refresh mode.

Claim (Index 20):
The computing system of  claim 15  wherein the memory device is designed to comply with a JEDEC standard.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 94.0
- Lexical Diversity: 1.37037
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14738119', '14613282', '14937788', '13145542', '15174946']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7882169220040761
- 35 USC 102 Novelty (BERT): 0.4736546342457434
- Combined Prediction Score: 0.7567606932282429
- Mean Citation Score: 134.22747399999997
- Max Citation Score: 139.64342
- Similarity Product: 92.42567425139188

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test