PATENT CLAIM ANALYSIS

Application Number: 16041461
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "421000"]

Abstract:
A method for fabricating a semiconductor memory device is provided. The method includes: etching a first region of the semiconductor memory device to expose a first capping layer; forming a second capping layer on the first capping layer; etching a portion of the first capping layer and a portion of the second capping layer to form a first trench reaching a first metal line; and forming a second metal line in the first trench to contact the first metal line.

Claim (Index 14):
A semiconductor memory device, comprising:\n a memory structure, having an electrode; a first portion of capping layer, disposed above the electrode; and a first metal line, contacted the electrode; wherein the first metal line is arranged to pass through the first portion of capping layer.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 95.0
- Lexical Diversity: 2.38889
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15200481', '15159669', '14948046', '15867427', '14953238']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.921866386319564
- 35 USC 102 Novelty (BERT): 0.5126352411055372
- Combined Prediction Score: 0.8809432717981611
- Mean Citation Score: 250.778642
- Max Citation Score: 283.42615
- Similarity Product: 214.47395087085368

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test