PATENT CLAIM ANALYSIS

Application Number: 14897677
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-06
Patent Classification: ["257", "043000"]

Abstract:
Disclosed are an array substrate and a method for manufacturing the same, which belong to the technical field of display, and are able to solve the technical problem that the existing process for manufacturing array substrates is too complex. The array substrate includes a plurality of sub-pixel units formed on a base substrate. Each of the sub-pixel units comprises a thin film transistor and a second pixel electrode. An active layer of the thin film transistor is made of an oxide semiconductor. The second pixel electrode is made of a plasma treated transparent oxide semiconductor. The array substrate provided by the present disclosure can be used in an IPS or FFS liquid crystal display device.

Claim (Index 9):
The array substrate according to  claim 8 , further comprising a common electrode line, a scan line, and a data line,\n wherein the common electrode line and the scan line are both located at a same layer as the gate; and wherein the data line is located at a same layer as the source.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 86.0
- Lexical Diversity: 1.75714
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14771267', '14436995', '13981165', '13822480', '14148386']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9286065376689574
- 35 USC 102 Novelty (BERT): 0.5185621643096446
- Combined Prediction Score: 0.8876021003330262
- Mean Citation Score: 309.2737840000001
- Max Citation Score: 319.1856
- Similarity Product: 219.87200428562167

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test