PATENT CLAIM ANALYSIS

Application Number: 15919510
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["375", "334000"]

Abstract:
An ultra-low power back-channel receiver is presented that demodulates binary a FSK back-channel signal embedded in 5.8 GHz IEEE 802.11a Wi-Fi OFDM packets. The architecture of the back-channel receiver employs a two-step down-conversion where the first mixing stage downconverts using the third harmonic of the local oscillator for power efficiency. The LP-65 nm CMOS receiver consumes 335 μW with a sensitivity of −72 dBm at a BER of 10 −3  and data-rate of 31.25 kb/s. The radio uses a balun and a 250 kHz reference crystal as external components. The receiver uses a 1V supply voltage for analog blocks, and 0.85V for digital blocks including the local oscillator and the frequency-locked loop circuits.

Claim (Index 14):
The low power RF receiver of  claim 10  further comprises a baseband frequency stage circuit configured to receive the pair of baseband signals from the intermediate frequency stage circuit and demodulate bits encoded on the baseband signals, where the bits are encoded on the baseband signals using frequency-shift keying.

Metadata:
- Claim Count in Document: 36.0
- Percentile: 90.0
- Lexical Diversity: 1.45122
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14254318', '10027372', '12192933', '12233314', '14305308']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5222863117809612
- 35 USC 102 Novelty (BERT): 0.4998628675687875
- Combined Prediction Score: 0.5200439673597438
- Mean Citation Score: 237.18666800000003
- Max Citation Score: 247.56989
- Similarity Product: 177.60639179376483

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test