PATENT CLAIM ANALYSIS

Application Number: 15902764
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["257", "532000"]

Abstract:
In a described example, an integrated circuit includes a capacitor first plate; a dielectric stack over the capacitor first plate comprising silicon nitride and silicon dioxide with a capacitance quadratic voltage coefficient less than 0.5 ppm/V 2 ; and a capacitor second plate over the dielectric stack.

Claim (Index 15):
The method of  claim 10 , wherein the dielectric stack comprises a first silicon dioxide layer with a first thickness, a second silicon nitride layer with a second thickness, and a third silicon dioxide layer with a third thickness, and wherein the first thickness and the third thickness are about equal and wherein the second thickness is about double the first and third thickness, and the PECVD silicon nitride is PECVD deposited with an RF-LF power of about 100 W at 400 kHz, a N 2  flow rate of about 4500 sccm, and an NH 3  flow rate of about 0 sccm.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 88.0
- Lexical Diversity: 1.47059
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15902829', '12554968', '10382826', '15793607', '15793690']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9226700622871712
- 35 USC 102 Novelty (BERT): 0.4803999197248717
- Combined Prediction Score: 0.8784430480309412
- Mean Citation Score: 197.990686
- Max Citation Score: 223.6693
- Similarity Product: 186.60789280097484

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test