PATENT CLAIM ANALYSIS

Application Number: 15986363
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-12
Patent Classification: ["348", "294000"]

Abstract:
An imaging device includes: a semiconductor substrate; pixels arranged two-dimensionally along row and column directions on the substrate; and one or more interconnection layers located on the semiconductor substrate, including a first signal line extending along the column direction and a second signal line to which a multi-level signal is applied. A first pixel includes: a photoelectric converter; a charge storage region; a first interconnection electrically connected to the charge storage region; and a first transistor that includes a first diffusion layer electrically connected to the first signal line and a second diffusion layer electrically connected to the second signal line and that outputs a signal to the first signal line. The first and second signal lines and the first interconnection are arranged in a first interconnection layer. The second signal line is located between the first interconnection and the first signal line, viewed perpendicularly to the substrate.

Claim (Index 1):
An imaging device comprising:\n a semiconductor substrate; pixels arranged two-dimensionally along a row direction and a column direction on the semiconductor substrate, the pixels including a first pixel; and one or more interconnection layers located on the semiconductor substrate, the one or more interconnection layers including a first signal line extending along the column direction and a second signal line to which a multi-level signal is applied, wherein the first pixel includes\n a photoelectric converter that converts incident light into a signal charge, \n a charge storage region that stores the signal charge, \n a first interconnection that is electrically connected to the charge storage region, and \n a first transistor that includes a first diffusion layer and a second diffusion layer, the first diffusion layer being electrically connected to the first signal line, the second diffusion layer being electrically connected to the second signal line, the first transistor outputting a signal corresponding to an amount of the signal charge to the first signal line, \n the one or more interconnection layers include a first interconnection layer, the first signal line, the second signal line, and the first interconnection are arranged in the first interconnection layer, and the second signal line is located between the first interconnection and the first signal line in the first interconnection layer when viewed in a direction perpendicular to the semiconductor substrate.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 93.0
- Lexical Diversity: 2.68333
- Patent Class: 348.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14955086', '12720872', '15902559', '14322135', '15445022']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.629134059428341
- 35 USC 102 Novelty (BERT): 0.470654754379839
- Combined Prediction Score: 0.6132861289234908
- Mean Citation Score: 210.68926800000003
- Max Citation Score: 219.56656
- Similarity Product: 192.159870688572

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test