PATENT CLAIM ANALYSIS

Application Number: 15916472
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["365", "189050"]

Abstract:
According to one embodiment, a memory system includes a semiconductor memory and a controller. The semiconductor memory includes first blocks including a memory cell capable of storing data of one bit, a second block including a memory cell capable of storing data of two or more bits. The semiconductor memory stores first data in a first latch circuit, and second data in a second latch circuit, and writes the first data into one of the first blocks in page units, and the second data into one of the first blocks in page units. The semiconductor memory writes data of at least two pages into the second block, using the first data stored in the first latch circuit and the second data stored in the second latch circuit.

Claim (Index 1):
A memory system comprising:\n a semiconductor memory capable of storing data; and a controller configured to control the semiconductor memory, wherein the semiconductor memory includes:\n a plurality of first blocks each including a memory cell capable of storing data of one bit, \n a second block including a memory cell capable of storing data of two or more bits, and \n a sense amplifier including a first latch circuit and a second latch circuit, \n wherein in a write operation, the controller outputs a set of first data of one page and a first write command, a set of second data of one page and a second write command, and a third write command, the semiconductor memory stores the first data in the first latch circuit, and the second data in the second latch circuit, and writes the first data into a first one of the first blocks in page units, and the second data into a second one of the first blocks in page units, and when receiving the third write command, the semiconductor memory writes data of at least two pages into the second block, using the first data stored in the first latch circuit and the second data stored in the second latch circuit.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 90.0
- Lexical Diversity: 3.18605
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15896365', '15693430', '15459294', '15702476', '15459542']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8035182153762214
- 35 USC 102 Novelty (BERT): 0.4794518947772099
- Combined Prediction Score: 0.7711115833163202
- Mean Citation Score: 235.27253
- Max Citation Score: 249.38452
- Similarity Product: 209.294910048256

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test