PATENT CLAIM ANALYSIS

Application Number: 15955230
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "774000"]

Abstract:
The present disclosure relates to a fan-out semiconductor package in which a plurality of semiconductor chips are stacked and packaged, and are disposed in a special form to be thus electrically connected to a redistribution layer of a connection member through vias rather than wires. The fan-out semiconductor package can further include a connection member having a through-hole, and at least one of the semiconductor chips can be disposed in the through-hole.

Claim (Index 9):
The semiconductor package of  claim 1 , further comprising a third semiconductor chip disposed side by side with the first semiconductor chip on the first connection member and having an active surface having a third connection pad disposed thereon and an inactive surface opposing the active surface,\n wherein the third connection pad is electrically connected to the redistribution layer of the first connection member through a third via penetrating through the insulating layer of the first connection member.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 1.68889
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15666266', '15946109', '15297831', '15689861', '15944321']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9423899718435744
- 35 USC 102 Novelty (BERT): 0.5421307540038688
- Combined Prediction Score: 0.902364050059604
- Mean Citation Score: 388.701522
- Max Citation Score: 399.79132
- Similarity Product: 339.6622118789339

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test