PATENT CLAIM ANALYSIS

Application Number: 15862801
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["710", "106000"]

Abstract:
A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently transmits a reference clock signal to coordinate data communications from the transmitter to the receiver. The clock lane may be assigned by determining signal margins of various lanes of the processor bus. The signal margins are determined by the transmitter sending a test pattern upon the various lanes and analyzing the received test pattern at the receiver. A dynamically assigned clock lane results increased overall signal integrity of communications between the transmitter and receiver. Further, a dynamically assigned clock lane may result in different lanes being assigned as the clock lane at distinct boot up instances, adding to the complexity of the unauthorized user determining the operational logic of the transmitter.

Claim (Index 1):
A data handling system comprising:\n a transmitter that transmits a signal pattern upon each lane of a multiple lane bus; a receiver that receives the signal pattern from each lane of the multiple lane bus, determines a distortion associated with the received signal pattern from each lane, and identifies a particular lane of the multiple lane bus that is associated with a smallest distortion; wherein the transmitter or the receiver assigns the particular lane associated with smallest distortion as a clock lane that transmits a reference clock signal between the transmitter and the receiver in subsequent signal transmissions between the transmitter and the receiver.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 2.14925
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14968166', '10439566', '14939692', '10882544', '14250119']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6260907436920066
- 35 USC 102 Novelty (BERT): 0.5315085311258678
- Combined Prediction Score: 0.6166325224353928
- Mean Citation Score: 213.311876
- Max Citation Score: 359.90497
- Similarity Product: 312.9184225990069

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test