PATENT CLAIM ANALYSIS

Application Number: 15903203
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-08
Patent Classification: ["365", "174000"]

Abstract:
A memory cell includes vertical transistors including first and second pass gate (PG) transistors, first and second pull-up (PU 1  and PU 2 ) transistors, and first and second pull-down (PD 1  and PD 2 ) transistors. A first bottom electrode connects bottom source/drain (SD) regions of PU 1  and PU 2 . A second bottom electrode connects bottom SD regions of PD 1  and PD 2 . A first shared contact connects the top SD region of PU 2  to the gate structure of PU 1 . A second shared contact connects the top SD region of PD 1  to the gate structure of PD 2 . A first top electrode is connected to the top SD regions of PG 1 , PU 1  and the second shared contact to define a first storage node of the memory cell. A second top electrode is connected to the top SD regions of PG 2 , PU 2  and the first shared contact to define a second storage node of the memory cell.

Claim (Index 2):
The memory cell of  claim 1 , further comprising:\n a first routing gate connecting said gate structures of said first and second pass gate transistors; a word line; and a first via connecting said word line to said first routing gate, wherein said first and second top electrodes are positioned parallel to said word line and said word line is positioned between said first and second top electrodes.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 88.0
- Lexical Diversity: 4.25581
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15634227', '15654190', '15790035', '12721476', '15804556']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8097227651024215
- 35 USC 102 Novelty (BERT): 0.5005159048044509
- Combined Prediction Score: 0.7788020790726244
- Mean Citation Score: 274.47711400000003
- Max Citation Score: 287.63766
- Similarity Product: 217.86598061643

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test