PATENT CLAIM ANALYSIS

Application Number: 16144772
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["327", "237000"]

Abstract:
According to one embodiment, an apparatus is described. The apparatus comprises a first phase mixer circuit configured to receive a first signal and a second signal and provide a first intermediate signal having a phase between a phase of the first signal and a phase of the clock signal. The apparatus further comprises a second phase mixer circuit configured to receive a complement of the first signal and a complement of the second signal and provide a second intermediate signal having a phase between a phase of the complement of the first signal and a phase of the complement of the second signal, wherein the second intermediate signal is combined with the first intermediate signal at a node to provide an output signal.

Claim (Index 1):
An apparatus comprising:\n first and second phase mixer circuits including corresponding first inverters, corresponding second inverters, corresponding third inverters, and corresponding fourth inverters, the corresponding first inverters of the first and second phase mixer circuits configured to receive, respectively, a first input signal and a complimentary first input signal, each of the corresponding first inverters of the first and second phase mixer circuits configured to be controlled by a first control signal received, via the corresponding second inverter, at a non-inverting control input of the corresponding first inverter, each of the corresponding first inverters of the first and second phase mixer circuits further configured to be controlled by the first control signal received at an inverting control input of the corresponding first inverter, the corresponding third inverters of the first and second phase mixer circuits configured to receive, respectively, a second input signal and a complimentary second input signal, each of the corresponding third inverters of the first and second phase mixer circuits configured to be controlled by a second control signal received, via the corresponding fourth inverter, at an inverting control input of the corresponding third inverter, each of the corresponding third inverters of the first and second phase mixer circuits further configured to be controlled by the second control signal received at a non-inverting control input of the corresponding third inverter.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 3.45946
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14952382', '14661992', '13857287', '11477884', '11477080']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7493928716564093
- 35 USC 102 Novelty (BERT): 0.512144480776408
- Combined Prediction Score: 0.7256680325684092
- Mean Citation Score: 203.957608
- Max Citation Score: 321.74478
- Similarity Product: 275.70439856397627

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test