PATENT CLAIM ANALYSIS

Application Number: 16458636
Application Type: Utility
Filing Date: 2019-07
Publication Date: 2019-10
Patent Classification: ["438", "671000"]

Abstract:
Methods for patterning in a semiconductor process are described. A dummy layer is formed having a cut therein. A first sacrificial layer is formed over the dummy layer, and at least a portion of the first sacrificial layer is disposed in the cut. A second sacrificial layer is formed over the first sacrificial layer. The second sacrificial layer is patterned to have a first pattern. Using the first pattern of the second sacrificial layer, the first sacrificial layer is patterned to have the first pattern. The second sacrificial layer is removed. Thereafter, a second pattern in the first sacrificial layer is formed comprising altering a dimension of the first pattern of the first sacrificial layer. Using the second pattern of the first sacrificial layer, the dummy layer is patterned. Mask portions are formed along respective sidewalls of the patterned dummy layer. The mask portions are used to form a mask.

Claim (Index 7):
The method of  claim 6 , wherein removing the third mask layer comprises performing a plasma-based process on the third mask layer.

Metadata:
- Claim Count in Document: 37.0
- Percentile: 100.0
- Lexical Diversity: 3.36735
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15833077', '16004086', '15368966', '15861799', '14087334']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.860151266106971
- 35 USC 102 Novelty (BERT): 0.5082274886071048
- Combined Prediction Score: 0.8249588883569844
- Mean Citation Score: 180.719678
- Max Citation Score: 212.6527
- Similarity Product: 133.0538404453814

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test