PATENT CLAIM ANALYSIS

Application Number: 15969042
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-08
Patent Classification: ["365", "185090"]

Abstract:
A method of scrubbing errors from a semiconductor memory device including a memory cell array and an error correction circuit, can be provided by accessing a page of the memory cell array to provide a data that includes sub units that are separately writable to the page of memory and to provide parity data configured to detect and correct a bit error in the data and selectively enabling write-back of a selected sub unit of the data responsive to determining that the selected sub unit of data includes a correctable error upon access as part of an error scrubbing operation.

Claim (Index 10):
The semiconductor memory device of  claim 9 , wherein the memory cell array includes a three-dimensional memory cell array and each of the plurality of bank arrays includes a plurality of dynamic memory cells or a plurality of resistive type memory cells.

Metadata:
- Claim Count in Document: 44.0
- Percentile: 93.0
- Lexical Diversity: 1.82143
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15290339', '15398409', '15348315', '15238216', '15204536']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8519224704091687
- 35 USC 102 Novelty (BERT): 0.5563342672181278
- Combined Prediction Score: 0.8223636500900646
- Mean Citation Score: 357.6728720000001
- Max Citation Score: 429.4095
- Similarity Product: 418.33135359799866

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test