PATENT CLAIM ANALYSIS

Application Number: 15936454
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-10
Patent Classification: ["257", "071000"]

Abstract:
A pixel array substrate including a plurality of pixel units disposed on a substrate is provided. Each of the pixel units includes a scan line, a data line and an active element. The active element includes a semiconductor layer, a gate, a source electrode and a drain electrode. The semiconductor layer has a channel region, a source region, a drain region, a first connection region and a second connection region. The first connection region is connected between the channel region and the source region. The second connection region is connected between the channel region and the drain region. A normal projection of the first connection region on the substrate and a normal projection of the second connection region on the substrate are respectively located at two opposite sides of a normal projection of the data line on the substrate.

Claim (Index 19):
The pixel array substrate according to  claim 11 , wherein the semiconductor layer comprises poly silicon.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 90.0
- Lexical Diversity: 3.10204
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15791376', '14468353', '13995926', '15527792', '15302934']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9235284036097852
- 35 USC 102 Novelty (BERT): 0.4744847327277253
- Combined Prediction Score: 0.8786240365215794
- Mean Citation Score: 202.886144
- Max Citation Score: 205.74403
- Similarity Product: 170.84237212179482

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test