PATENT CLAIM ANALYSIS

Application Number: 15926823
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-12
Patent Classification: ["365", "049110"]

Abstract:
A content addressable memory includes a plurality of TCAM cells which configure one entry, a first word line coupled to the TCAM cells, a second word line coupled to the TCAM cells and a match line coupled to the TCAM cells and further includes a valid cell which stores a valid bit which indicates validity or invalidity of the entry, a bit line coupled to the valid line and a selection circuit which is coupled to the first word line and the second word line and sets the valid cell to a selected state in accordance with a situation where the first word line or the second word line is set to the selected state.

Claim (Index 11):
A content addressable memory comprising:\n a plurality of TCAM cells which configure one entry; and a valid cell which stores a valid bit which indicates validity or invalidity of the entry, wherein the valid cell includes a first storage node, a second storage node, a reset transistor which is coupled to the first storage node, and an output circuit which is coupled to the second storage node, and wherein the output circuit outputs a state of the second storage node as the valid bit.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 2.58696
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15926863', '14138374', '12504523', '14282298', '15227161']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8049049192647972
- 35 USC 102 Novelty (BERT): 0.4983098517723077
- Combined Prediction Score: 0.7742454125155482
- Mean Citation Score: 253.920994
- Max Citation Score: 288.62387
- Similarity Product: 223.892650372684

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test