PATENT CLAIM ANALYSIS

Application Number: 15909589
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["714", "755000"]

Abstract:
A memory system includes a nonvolatile memory and a memory controller configured to perform reading of a concatenation code from the nonvolatile memory in response to an external command, the memory controller including a decoder circuit which decodes a reception word in the concatenation code. The decoder circuit includes a first external code decoder that performs decoding on an external code portion, an internal code in-error bit estimation unit that performs estimation of an in-error bit on a bit sequence from the first external code decoder, based on a rule for an internal code in the concatenation code, and outputs a set of in-error bits that is obtained by the estimation, and a second external code decoder that performs decoding which uses the set of in-error bits that is output from the internal code in-error bit estimation unit, on the bit sequence from the first external code decoder.

Claim (Index 1):
A memory system comprising:\n a nonvolatile memory in which a concatenation code is stored; and a memory controller configured to perform reading of the concatenation code from the nonvolatile memory in response to an external command, the memory controller including a decoder circuit configured to decode a reception word in the concatenation code that is read from the nonvolatile memory and output a decoded word that is obtained by the decoding, wherein the decoder circuit includes\n a first external code decoder that performs bounded distance decoding on an external code portion, and outputs a first result of decoding that is obtained by the bounded distance decoding, wherein the external code portion is a bit sequence of an external code in the concatenation code that is coded, \n an internal code in-error bit estimation unit that performs estimation of an in-error bit on a bit sequence that is the first result of decoding, which is output from the first external code decoder, based on a rule for an internal code in the concatenation code, and outputs a set of in-error bits that is obtained by the estimation, and \n a second external code decoder that performs decoding which uses the set of in-error bits that is output from the internal code in-error bit estimation unit, on the first result of decoding that is output from the first external code decoder.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 90.0
- Lexical Diversity: 2.78571
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['13679970', '12153121', '13547288', '13529390', '12379746']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2951452823243356
- 35 USC 102 Novelty (BERT): 0.4616685673930332
- Combined Prediction Score: 0.3117976108312054
- Mean Citation Score: 179.27520399999997
- Max Citation Score: 181.89594
- Similarity Product: 146.52850410500048

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test