PATENT CLAIM ANALYSIS

Application Number: 15905978
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-07
Patent Classification: ["257", "192000"]

Abstract:
Devices, and methods of forming such devices, having a material that is semimetal when in bulk but is a semiconductor in the devices are described. An example structure includes a substrate, a first source/drain contact region, a channel structure, a gate dielectric, a gate electrode, and a second source/drain contact region. The substrate has an upper surface. The channel structure is connected to and over the first source/drain contact region, and the channel structure is over the upper surface of the substrate. The channel structure has a sidewall that extends above the first source/drain contact region. The channel structure comprises a bismuth-containing semiconductor material. The gate dielectric is along the sidewall of the channel structure. The gate electrode is along the gate dielectric. The second source/drain contact region is connected to and over the channel structure.

Claim (Index 1):
A method comprising:\n forming an isolation region in a substrate, wherein the isolation region is between a first and second region of the substrate, and wherein at least a portion of the isolation region is configured to extend from a top surface of the substrate; forming a first highly doped source/drain contact region in the first region of the substrate and a second highly doped source/drain contact region in the second region of the substrate; forming a first gate electrode over the first highly doped source/drain contact region; forming a second gate electrode over the second highly doped source/drain contact region; forming a first opening through the first gate electrode and to the first highly doped source/drain contact region; forming a second opening through the second gate electrode and to the second highly doped source/drain contact region; depositing a first bismuth-containing semiconductor material in the first opening to form a first bismuth-containing channel structure, the first bismuth-containing channel structure being connected to the first highly doped source/drain contact region; depositing a second bismuth-containing semiconductor material in the second opening to form a second bismuth-containing channel structure, the second bismuth-containing channel structure being connected to the second highly doped source/drain contact region; forming a third source/drain contact region over and connected to the first bismuth-containing channel structure; forming a fourth source/drain contact region over and connected to the second bismuth-containing channel structure; forming a dielectric layer over the third source/drain contact region and the fourth source/drain contact region; and crystallizing the first and second bismuth-containing semiconductor materials, the crystallizing comprising performing an anneal.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 88.0
- Lexical Diversity: 3.0
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15404712', '14656948', '15665968', '12898421', '14739928']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8993054555172136
- 35 USC 102 Novelty (BERT): 0.5159683846367782
- Combined Prediction Score: 0.8609717484291701
- Mean Citation Score: 244.637754
- Max Citation Score: 302.6510600000001
- Similarity Product: 245.64571603246105

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test