PATENT CLAIM ANALYSIS

Application Number: 16123396
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["257", "206000"]

Abstract:
A semiconductor device having an SRAM which includes: a monolithic first active region in which a first transistor and a fifth transistor are disposed; a second active region separated from the first active region, in which a second transistor is disposed; a monolithic third active region in which a third transistor and a sixth transistor are disposed; and a fourth active region separated from the third active region, in which a fourth transistor is disposed. Each driver transistor is divided into a first transistor and a second transistor (or a third transistor and a fourth transistor) and these driver transistors are disposed over different active regions.

Claim (Index 27):
The semiconductor device of  claim 21 ,\n wherein the second active region is a nearest active region to the second conductivity type well region in the first direction of active regions arranged in the first conductivity type first well region, and wherein the third active region is a nearest active region to the second conductivity type well region in the first direction of active regions arranged in the first conductivity type second well region.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 97.0
- Lexical Diversity: 2.69767
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15616633', '13559461', '14921038', '15165651', '14579898']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.958116945499576
- 35 USC 102 Novelty (BERT): 0.598936351125057
- Combined Prediction Score: 0.922198886062124
- Mean Citation Score: 631.436662
- Max Citation Score: 645.56445
- Similarity Product: 418.76403653774855

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test