PATENT CLAIM ANALYSIS

Application Number: 15994284
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["438", "199000"]

Abstract:
There is provided a semiconductor device including a memory region and a logic region. The memory region includes a transistor (memory transistor) that stores information by accumulating charge in a sidewall insulating film. The width of the sidewall insulating film of the memory transistor included in the memory region is made larger than the width of a sidewall insulating film of a transistor (logic transistor) included in the logic region.

Claim (Index 4):
The method according to  claim 1 , further comprising:\n forming a third impurity region on an inner side of the first source region and the first drain region below the first sidewall insulating film, wherein: an impurity concentration of the third impurity region is lower than an impurity concentration of the first source region and the first drain region and is lower than an impurity concentration of the first impurity region.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 93.0
- Lexical Diversity: 2.26471
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15647946', '15066309', '12699938', '11135415', '11889358']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8709584011061097
- 35 USC 102 Novelty (BERT): 0.5518854838622089
- Combined Prediction Score: 0.8390511093817196
- Mean Citation Score: 292.75565
- Max Citation Score: 369.65048
- Similarity Product: 267.24394140983105

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test