PATENT CLAIM ANALYSIS

Application Number: 16049576
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-06
Patent Classification: ["365", "063000"]

Abstract:
Devices and methods include, for a memory device, generating a main input-output line signal on a main input-output line using driving circuitry. The main input-output line is coupled to multiple sensing amplifiers. Each of the sensing amplifiers each locally generate a local data line from the main data line. Each of the sensing amplifiers also includes multiple local sensing amplifiers that are selectively coupled to the generated local data line for overwriting data in the respective local sensing amplifiers.

Claim (Index 12):
The semiconductor device of  claim 11 , wherein the local data line generation circuitry comprises:\n a first gate transistor to block connection of the local data line to the low voltage absent receiving an assertion of a write enable signal at a gate of the first gate transistor; and a second gate transistor to block connection of the local false line to the low voltage absent receiving the assertion of the write enable signal at a gate of the first gate transistor.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 95.0
- Lexical Diversity: 1.93182
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15855485', '15824535', '13784219', '15270761', '15941877']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8114672098317832
- 35 USC 102 Novelty (BERT): 0.526660928428194
- Combined Prediction Score: 0.7829865816914243
- Mean Citation Score: 223.417342
- Max Citation Score: 365.24265
- Similarity Product: 246.13885352388027

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test