PATENT CLAIM ANALYSIS

Application Number: 16050094
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["257", "410000"]

Abstract:
A polysilicon layer is formed over a substrate. The polysilicon layer is etched to form a dummy gate electrode having a top portion with a first lateral dimension and a bottom portion with a second lateral dimension. The first lateral dimension is greater than, or equal to, the second lateral dimension. The dummy gate electrode is replaced with a metal gate electrode.

Claim (Index 11):
The semiconductor device of  claim 1 , wherein:\n the top portion has a first cross-sectional profile that resembles a first rectangle; the bottom portion has a second cross-sectional profile that resembles a second rectangle; and the first rectangle is wider than the second rectangle.

Metadata:
- Claim Count in Document: 10.0
- Percentile: 95.0
- Lexical Diversity: 2.0
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15420580', '15235899', '15642559', '13438451', '13328382']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9195715002545276
- 35 USC 102 Novelty (BERT): 0.4979502657194432
- Combined Prediction Score: 0.8774093768010192
- Mean Citation Score: 189.532452
- Max Citation Score: 252.965
- Similarity Product: 194.82882164597515

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test