PATENT CLAIM ANALYSIS

Application Number: 15958122
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["711", "163000"]

Abstract:
A processor may be coupled to a flash memory by way of an interface. The processor may be caused to read and/or write data, such as computer executable instructions, from/to the flash memory via the interface. An interface filter may be interposed between the processor and the flash memory to enhance the security and validity of data transactions associated with the processor and the flash memory.

Claim (Index 15):
An apparatus, comprising:\n a processor comprising at least one data output and a chip select (CS) output; a first flash memory component and a second flash memory component, each of the first flash memory component and the second flash memory component comprising a CS input, the first and second flash memory components coupled to the at least one data output; and a filter device comprising a CS input and first and second CS outputs, the CS input coupled to the CS output of the processor, the first CS output coupled to the CS input of the first flash memory component and the second CS output coupled to the CS input of the second flash memory component.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 91.0
- Lexical Diversity: 1.73171
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['11945316', '11945292', '15468781', '13453169', '15247632']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.486962252195441
- 35 USC 102 Novelty (BERT): 0.472137368388411
- Combined Prediction Score: 0.485479763814738
- Mean Citation Score: 141.05449600000003
- Max Citation Score: 148.87492
- Similarity Product: 104.23394304705144

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test