PATENT CLAIM ANALYSIS

Application Number: 15862041
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-09
Patent Classification: ["714", "719000"]

Abstract:
An address generation circuit generates a target address to be tested in a memory. A test data generation circuit generates write data for the address and expected value data for read data from the address. A judgment circuit compares matching/non-matching of the read data and the expected value data, for each address, judges that error correction is possible when the number of non-matching bits is within a range of numbers of bits to be error-corrected by an ECC circuit, and judges that error correction is not possible when the number is not within the range.

Claim (Index 6):
The semiconductor device according to  claim 1 ,\n wherein the judgment circuit has\n a bit comparison circuit compares matching/non-matching of the read data with \u201cn\u201d bits and the expected value data with \u201cn\u201d bits, and outputs a comparison result signal with \u201cn\u201d bits in which each bit is at a fist logical level or a second logical level in accordance with the matching/non-matching of each of the bits, \n a latch circuit with \u201cn\u201d bits which latches the comparison result signal respectively with the \u201cn\u201d bits, \n a second counter circuit which counts a number of bits in which the second logical level is latched from the \u201cn\u201d bit latch circuit, at a time the test is ended, and \n a count value comparison circuit which compares a count value of the second counter circuit and a preset threshold value, thereby judging whether a number of non-matching bits is within a range of numbers of bits to be error-corrected by the ECC circuit.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 86.0
- Lexical Diversity: 2.10417
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15658734', '10699223', '10805227', '10739123', '10271533']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.328253622530002
- 35 USC 102 Novelty (BERT): 0.4981125535324113
- Combined Prediction Score: 0.3452395156302429
- Mean Citation Score: 223.031606
- Max Citation Score: 266.2719
- Similarity Product: 199.82957603961827

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test