PATENT CLAIM ANALYSIS

Application Number: 16102066
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2020-02
Patent Classification: ["null", "null"]

Abstract:
Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A first channel region containing a first semiconductor material and a second channel region containing a second semiconductor material are formed over a buried insulating layer of a silicon-on-insulator substrate. A first gate electrode of a first field-effect transistor is formed over the first channel region. A second gate electrode of a second field-effect transistor is formed over the second channel region. The first semiconductor material of the first channel region has a first germanium concentration. The second semiconductor material of the second channel region has a second germanium concentration that is greater than the first germanium concentration in the first semiconductor material of the first channel region.

Claim (Index 9):
The method of  claim 1  wherein the first channel region is arranged in direct contact with the buried insulating layer of the silicon-on-insulator substrate.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 96.0
- Lexical Diversity: 3.30769
- Patent Class: nan
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['16052140', '15060067', '15366425', '13422297', '10394338']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5647364861440981
- 35 USC 102 Novelty (BERT): 0.5012520994379812
- Combined Prediction Score: 0.5583880474734864
- Mean Citation Score: 238.28226
- Max Citation Score: 271.31427
- Similarity Product: 209.05493958675387

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test