PATENT CLAIM ANALYSIS

Application Number: 16207832
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["257", "773000"]

Abstract:
Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes an integrated circuit die, an encapsulant at least laterally encapsulating the integrated circuit die, a redistribution structure on the integrated circuit die and the encapsulant, a connector support metallization coupled to the redistribution structure, a dummy pattern, a second dielectric layer, and an external connector on the connector support metallization. The redistribution structure comprises a first dielectric layer having a first surface disposed distally from the encapsulant and the integrated circuit die. The dummy pattern is on the first surface of the first dielectric layer and around the connector support metallization. The second dielectric layer is on the first surface of the first dielectric layer and on at least a portion of the dummy pattern. The second dielectric layer does not contact the connector support metallization.

Claim (Index 11):
A method comprising:\n surrounding a die with an encapsulant; forming a redistribution structure over the die and over the encapsulant, the redistribution structure having a first dielectric layer and a metallization pattern, the metallization pattern electrically coupled to the die; forming a second dielectric layer over the redistribution structure; forming an opening in the second dielectric layer, the opening exposing the metallization pattern of the redistribution structure; forming a connector support metallization by depositing an electrically conductive material over the second dielectric layer and in the opening, wherein the connector support metallization has a first portion along a first surface of the second dielectric layer distal the encapsulant, a second portion at a bottom of the opening along the metallization pattern, and a third portion between the first portion and the second portion; and forming a third dielectric layer over the second dielectric layer, the third dielectric layer covering the first portion, the third portion, and perimeter regions of the second portion of the connector support metallization, wherein center regions of the second portion of the connector support metallization is exposed by the third dielectric layer.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 98.0
- Lexical Diversity: 2.78947
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14671477', '14605848', '15907474', '16036664', '15272491']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.90673969863983
- 35 USC 102 Novelty (BERT): 0.5147033298968693
- Combined Prediction Score: 0.867536061765534
- Mean Citation Score: 259.744476
- Max Citation Score: 306.19882
- Similarity Product: 261.06802747198816

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test