PATENT CLAIM ANALYSIS

Application Number: 15992604
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-12
Patent Classification: ["327", "206000"]

Abstract:
A clock detector includes a first detector circuit, a second detector circuit, and a toggle detector circuit. The first detector circuit is for activating a first detect signal in response to detecting that a clock signal that toggles between first and second logic states when present is stuck in the first logic state, and keeping the first detect signal inactive otherwise. The second detector circuit is for providing a second detect signal in response to detecting that the clock signal is stuck in the second logic state, and keeping the second detect signal inactive otherwise. The toggle detector circuit is for activating a toggle detect signal in response to both the first detect signal and the second detect signal being inactive, and keeping the toggle detect signal inactive in response to an activation of either the first detect signal or the second detect signal.

Claim (Index 9):
A clock detector comprising:\n a first logic state detector circuit having an input for receiving a clock signal that toggles between first and second logic states when present, and remaining at one of said first and second logic states if absent, and an output provided at a first output node, wherein said first logic state detector circuit charges said first output node at a first rate in response to said clock signal being at said second logic state, and discharges said first output node at a second rate smaller than said first rate in response to said clock signal being in said first logic state; a second logic state detector circuit having an input for receiving said clock signal, and an output provided at a second output node, wherein said second logic state detector circuit charges said second output node at said first rate in response to said clock signal being in said first logic state, and discharges said second output node at said second rate in response to said clock signal being in said second logic state; and a toggle detector circuit for providing a toggle detect signal in said first logic state in response to both said first output node and said second output node having voltages corresponding to said second logic state, and providing said toggle detect signal in said second logic state in response to either said first output node or said second output node having a voltage corresponding to said first logic state.

Metadata:
- Claim Count in Document: 42.0
- Percentile: 93.0
- Lexical Diversity: 3.55814
- Patent Class: 327.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['09405300', '15435519', '13648557', '13482948', '14498161']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7492809661026653
- 35 USC 102 Novelty (BERT): 0.4616709614296543
- Combined Prediction Score: 0.7205199656353641
- Mean Citation Score: 149.914742
- Max Citation Score: 162.25996
- Similarity Product: 125.39028493285896

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test