PATENT CLAIM ANALYSIS

Application Number: 15958866
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-03
Patent Classification: ["365", "189011"]

Abstract:
There are provided a memory system and a method for operating the same. A memory system includes: a controller configured to generate and output a first command corresponding to a normal operation or a second command corresponding to a deep power down (DPD) mode; and a semiconductor memory device configured to perform the normal operation in response to the first command, wherein the normal operation is performed using an internal power voltage generated by down-converting a first external power voltage, and operate in the DPD mode in response to the second command, wherein, in the DPD mode, the semiconductor memory device operates using a second external power voltage as the internal powervoltage.

Claim (Index 7):
The memory system of  claim 4 , wherein, in the DPD mode, the output circuit cuts off the first external power voltage applied to the output node, and outputs the second external power voltage as the internal power voltage by supplying the second external power voltage to the output node.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 91.0
- Lexical Diversity: 2.15789
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11841060', '14865562', '11005523', '14107331', '14955282']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8017635232533054
- 35 USC 102 Novelty (BERT): 0.479829381403027
- Combined Prediction Score: 0.7695701090682776
- Mean Citation Score: 174.997024
- Max Citation Score: 191.04417
- Similarity Product: 134.11654153762578

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test