PATENT CLAIM ANALYSIS

Application Number: 15867646
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-07
Patent Classification: ["711", "103000"]

Abstract:
A memory controller interfaces with one or more memory devices having configurable width data buses and configurable connectivity between data pins of the memory devices and data pins of the memory controller. Upon initialization of the memory devices, the memory controller automatically discovers the connectivity configuration of the one or more memory devices, including both individually selected and jointly selected devices. After discovering connectivity of the connected devices, the memory controller configures the memory devices according to the discovered connectivity and assigns unique addresses to jointly selected devices.

Claim (Index 19):
The method of  claim 13 , wherein selectively associating the one or more of the plurality of data lines of the memory core with the one or more of the plurality of data pins comprises:\n associating, by the multiplexer, the plurality of data lines and the plurality of data pins according to a one-to-one mapping.

Metadata:
- Claim Count in Document: 53.0
- Percentile: 86.0
- Lexical Diversity: 2.2381
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14438865', '13514977', '13970606', '15857519', '14861451']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3642099521534179
- 35 USC 102 Novelty (BERT): 0.5460797542159986
- Combined Prediction Score: 0.382396932359676
- Mean Citation Score: 201.96538000000004
- Max Citation Score: 381.06918
- Similarity Product: 288.2328647404433

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test