PATENT CLAIM ANALYSIS

Application Number: 15911112
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "530000"]

Abstract:
The present invention discloses a three-dimensional vertical multiple-time-programmable memory (3D-MTP V ) comprising no separate diode layer. It comprises a plurality of vertically stacked horizontal address lines, at least a memory hole through the horizontal address lines, a memory layer and a vertical address line disposed in the memory hole. The memory layer comprises a re-programmable layer but no separate diode layer. The memory layer is leaky, i.e. its reverse current is comparable to its forward current. Sense amplifiers and a full-read mode are used to ensure a properly working 3D-MTP V .

Claim (Index 18):
The 3D-MTP V  according to  claim 1 , further comprising an MTP string including all MTP cells coupled to a selected vertical address line.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 90.0
- Lexical Diversity: 1.75862
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15488489', '11031637', '15185004', '14753620', '11309656']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9122206770218352
- 35 USC 102 Novelty (BERT): 0.4916420688028379
- Combined Prediction Score: 0.8701628161999355
- Mean Citation Score: 196.97347600000003
- Max Citation Score: 262.80215
- Similarity Product: 224.28500186966656

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test