PATENT CLAIM ANALYSIS

Application Number: 15860283
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["711", "141000"]

Abstract:
Topology of clusters of processors of a computer configuration, configured to support any of a plurality of cache coherency protocols, is discovered at initialization time to determine which one of the plurality of cache coherency protocols is to be used to handle coherency requests of the configuration

Claim (Index 5):
The modular computer system according to  claim 3 , wherein based on the coherency value being a coherency value of an SC function of the node having at least one second interface connected to another SC function of another node, providing, by respective clusters of a respective node, a local point of coherency for cache lines within the respective node, and providing, by SC functions of each node, a global point of coherency for cache lines of all nodes of the configuration.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 86.0
- Lexical Diversity: 1.68966
- Patent Class: 711.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15860353', '14816636', '15499591', '14549429', '14816824']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6012175198662219
- 35 USC 102 Novelty (BERT): 0.5475560807617899
- Combined Prediction Score: 0.5958513759557786
- Mean Citation Score: 343.4218380000001
- Max Citation Score: 409.68915
- Similarity Product: 361.7316683614701

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test