PATENT CLAIM ANALYSIS

Application Number: 16108610
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["257", "401000"]

Abstract:
Non-planar semiconductor devices having hybrid geometry-based active regions are described. For example, a semiconductor device includes a hybrid channel region including a nanowire portion disposed above an omega-FET portion disposed above a fin-FET portion. A gate stack is disposed on exposed surfaces of the hybrid channel region. The gate stack includes a gate dielectric layer and a gate electrode disposed on the gate dielectric layer. Source and drain regions are disposed on either side of the hybrid channel region.

Claim (Index 2):
A semiconductor device, comprising:\n a hybrid channel region comprising an omega FET portion disposed above a nanowire portion disposed above a fin-FET portion; a gate stack disposed on exposed surfaces of the hybrid channel region, the gate stack comprising a gate dielectric layer and a gate electrode disposed on the gate dielectric layer, the gate stack completely separating the nanowire portion from the fin-FET portion of the hybrid channel region; and source and drain regions disposed on either side of the hybrid channel region.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 96.0
- Lexical Diversity: 1.88889
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15024714', '13629148', '13629141', '13996503', '15405899']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8940160448895762
- 35 USC 102 Novelty (BERT): 0.4837259456561344
- Combined Prediction Score: 0.8529870349662321
- Mean Citation Score: 182.04937200000003
- Max Citation Score: 207.09163
- Similarity Product: 166.07801683740615

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test