PATENT CLAIM ANALYSIS

Application Number: 15755971
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-02
Patent Classification: ["290", "031000"]

Abstract:
The polyphase rotary electric machine wherein the invention is implemented comprises phase short-circuit means ( 15, 18 ) included in a control system ( 10 ). The machine is fitted in a motor vehicle, operates as a generator and is connected to an on-board electric network ( 2 ). The phase short-circuit means short-circuit at least one phase winding when a DC voltage measurement (B+) of the network, regulated by a regulator device, exceeds a predetermined threshold value and a phase current  15  in the phase winding is cancelled out and changes direction. According to the invention, the control system limits an overvoltage on the network due to an event other than load shedding.

Claim (Index 2):
Machine according to  claim 1 , wherein it additionally comprises:\n a synchronous rectifier circuit ( 10 ) with a plurality of branches each comprising at least one switch ( 15 ) connected to said phase winding ( 9 ); an electronic control circuit ( 16 ) which opens or closes said switch ( 15 ) by means of a synchronisation command (O); and wherein said control system ( 10 ) additionally comprises a control block ( 18 ) associated with said switch ( 15 ) forming said phase short-circuiting means ( 15 ,  18 ) and generating a switching signal (SO) which closes said switch ( 15 ), said control block ( 18 ) comprising:\n an excess voltage detection module ( 19 ) generating an excess voltage signal (SA) representative of the presence of said excess voltage on said network ( 2 ) for a first predetermined time; \n a module ( 20 ) for detection of passage through zero (SB) generating a signal of passage through zero (SB) representative of cancellation of said phase current (I\u03a6 1 , I\u03a6 2 , I\u03a6 3 , I\u03a6n); \n an AND logic gate ( 21 ) generating a short-circuiting command (SAND) as output on the basis of the excess voltage signal (SA) and said signal of passage through zero (SB) as input; \n a validation module ( 22 ) generating a validated short-circuiting command (SC) authorising the stoppage of, or inhibition of, said short-circuiting command (SAND), according to a second predetermined time which is shorter than a first period necessary for detection of a phase fault by said regulation device ( 11 ), and according to a third predetermined time which is longer than a second period necessary for re-initialisation of said regulation device ( 11 ); \n an OR logic gate ( 23 ) generating said switching signal (SOR) as output on the basis of said validated short-circuiting command (SC) and said synchronisation command (O).

Metadata:
- Claim Count in Document: 20.0
- Percentile: 88.0
- Lexical Diversity: 1.73611
- Patent Class: 290.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14117202', '11574330', '12663391', '13055417', '11718562']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5758445386179825
- 35 USC 102 Novelty (BERT): 0.5070090636809439
- Combined Prediction Score: 0.5689609911242787
- Mean Citation Score: 178.783552
- Max Citation Score: 282.4292
- Similarity Product: 208.7097308837652

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test