PATENT CLAIM ANALYSIS

Application Number: 15922901
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-05
Patent Classification: ["326", "080000"]

Abstract:
An isolation cell clamps a signal passing from a first, powered-down power domain to a second, power-on power domain. To reduce leakage current, some of the circuits and devices are connected to a voltage supply of the first or “from” power domain, while other circuits and devices are connected to a voltage supply of the second or “to” power domain.

Claim (Index 14):
A method of clamping an input signal going from a first power domain to a second power domain, wherein the first power domain operates at a first supply voltage and the second power domain operates at a second supply voltage different from the first supply voltage, the method comprising\n receiving, at an input terminal, the input signal from the first power domain; receiving, at a control terminal, a control signal; generating a logic signal, using at least one logic gate that receives the input signal and the control signal, in response to the control signal and the input signal; providing the logic signal to an output inverter to generate an output signal, wherein the output inverter is coupled between the first supply voltage and ground; and configuring the at least one logic gate and the output inverter such that one of the at least one logic gate and the output inverter is coupled with the first supply voltage, and the other of the at least one logic gate and the output inverter is coupled with the second supply voltage; and providing a first input inverter that includes the control terminal as an input terminal for receiving the control signal, wherein the first input inverter is coupled to the first supply voltage, and wherein the first input inverter comprises a first PMOS transistor and first and second NMOS transistors, connected in series with each other between the first supply voltage and ground, and wherein the logic gate comprises one of: a NAND gate coupled with the voltage supply of the second module and receiving the input signal and an inverted version of the control signal; a NOR gate coupled with the voltage supply of the first module and receiving the input signal and the control signal; and a latch circuit coupled with the voltage supply of the first module.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 90.0
- Lexical Diversity: 1.94444
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15857214', '15687781', '15826273', '15872230', '14658353']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6726452440671803
- 35 USC 102 Novelty (BERT): 0.473993426619097
- Combined Prediction Score: 0.652780062322372
- Mean Citation Score: 218.193646
- Max Citation Score: 224.65376
- Similarity Product: 184.29335763519288

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test