PATENT CLAIM ANALYSIS

Application Number: 15922809
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["711", "140000"]

Abstract:
Apparatus and method for improved cache utilization and efficiency on a many-core processor. An apparatus comprising: a plurality of execution units to generate cache access requests responsive to executing instructions; a pending request queue to store pending cache access requests generated by the execution units; pending queue management circuitry to compare a current cache access request with entries in the pending request queue to determine whether the current cache access request can be merged with an entry in the pending request queue and, if so, to merge the current cache access request with the entry.

Claim (Index 16):
The method of  claim 15  wherein, in addition to comparing\u2014the current cache access request with entries in the pending request queue, the method further comprising:\n identifying the start and the end of the mergeable sequence in response to a begin instruction and an end instruction, respectively.

Metadata:
- Claim Count in Document: 81.0
- Percentile: 90.0
- Lexical Diversity: 1.88889
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14691517', '15482514', '12650189', '15203907', '15858704']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4744056077058391
- 35 USC 102 Novelty (BERT): 0.4968809712198616
- Combined Prediction Score: 0.4766531440572414
- Mean Citation Score: 209.390818
- Max Citation Score: 218.87053
- Similarity Product: 153.62082977492992

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test