PATENT CLAIM ANALYSIS

Application Number: 15922332
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-02
Patent Classification: ["326", "030000"]

Abstract:
A memory module includes an external resistor and a plurality of memory devices commonly connected to the external resistor. Each of the memory devices includes a first reception pad and a first transmission pad. The first reception pad is associated with receiving an impedance calibration command and the first transmission pad is associated with transmitting the impedance calibration command. Each of the memory devices transfers the impedance calibration command to a first memory device which is selected as a master among the plurality of memory devices through a ring topology. The first memory device performs an impedance calibration operation, determines a resistance and a target output high level voltage of an output driver in response to the impedance calibration command, and transfers the impedance calibration command to a second memory device after performing the impedance calibration operation.

Claim (Index 16):
A method of calibrating multi-die impedance of a memory module including an external resistor and a plurality of memory devices, wherein the external resistor is formed in a module board and the plurality of memory devices are commonly connected to the external resistor, the method comprising:\n selecting a first memory device of the plurality of memory devices as a master; receiving, in a second memory device of the plurality of memory devices, an impedance calibration command; and performing an impedance calibration operation sequentially in each of the plurality of memory devices from the first memory device using a ring topology constituted by a first reception pad and a first transmission pad included in each of the plurality of memory devices, wherein the first reception pad is associated with receiving the impedance calibration command and the first transmission pad is associated with transmitting the impedance calibration command, and wherein performing the impedance calibration operation sequentially in each of the plurality of memory device from the first memory device comprises: determining whether the first memory device matches with the second memory device; and transferring by the second memory device the impedance calibration command to the first memory device using the ring topology, when the first memory device does not match with the second memory device.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 90.0
- Lexical Diversity: 2.52632
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15390851', '14723614', '15426603', '14460764', '15729771']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6821668663723722
- 35 USC 102 Novelty (BERT): 0.521379484669772
- Combined Prediction Score: 0.6660881282021122
- Mean Citation Score: 269.301476
- Max Citation Score: 354.9375
- Similarity Product: 280.8475515022874

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test