PATENT CLAIM ANALYSIS

Application Number: 15911838
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["438", "199000"]

Abstract:
A method for fabricating a semiconductor device having a uniform spacer thickness between field-effect transistors (FETs) associated with regions of the device is provided. A first semiconductor material is epitaxially grown in a first source/drain region within a first region of the device associated with a first FET. A capping layer is selectively formed on the first semiconductor material by forming a layer over the first and second regions that reacts with the first semiconductor material to form the capping layer. A second semiconductor material is epitaxially grown in a second source/drain region within a second region of the device associated with a second FET. The capping layer caps the growth of the first semiconductor material during the epitaxial growth of the second semiconductor material to provide the uniform spacer thickness between the first and second FETs.

Claim (Index 20):
The device of  claim 16 , wherein the second semiconductor material includes silicon phosphide (SiP).

Metadata:
- Claim Count in Document: 35.0
- Percentile: 90.0
- Lexical Diversity: 2.66667
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13104542', '15804303', '15430766', '15789217', '13606365']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8616787454130579
- 35 USC 102 Novelty (BERT): 0.5075315359436751
- Combined Prediction Score: 0.8262640244661196
- Mean Citation Score: 257.877714
- Max Citation Score: 269.98538
- Similarity Product: 215.090802852236

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test