PATENT CLAIM ANALYSIS

Application Number: 16029649
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["174", "252000"]

Abstract:
A ceramic module for power semiconductor integrated packaging and a preparation method thereof are disclosed. The ceramic module includes a ceramic substrate and an integrated metal dam layer. By providing the integral metal dam layer on the upper surface of the ceramic substrate and forming cavities around die bonding regions, the semiconductor chip can be hermetically sealed. By providing a heat dissipation layer on the lower surface of the ceramic substrate, the heat generated by the semiconductor chip can be quickly conducted to the outside. The product has a simple production process and high product consistency.

Claim (Index 1):
A ceramic module for power semiconductor integrated packaging, comprising a ceramic substrate and an integrated metal dam layer; a lower surface of the ceramic substrate being provided with a conductive circuit layer, an insulating layer and a heat dissipation layer, the insulating layer completely covering the conductive circuit layer, the heat dissipation layer being located on an area outside the conductive circuit layer and spaced apart from the conductive circuit layer, the heat dissipation layer having a thickness not less than a total thickness of the conductive circuit layer and the insulation layer; an upper surface of the ceramic substrate being provided with a positive electrode pad, a negative electrode pad and a plurality of die bonding regions, the die bonding regions each having a connecting layer and a die bonding layer, the connecting layer and the die bonding layer being spaced apart from each other; the ceramic substrate being provided with vertical via holes, the vertical via holes being electrically connected between the die bonding regions and the conductive circuit layer and between the conductive circuit layer and the positive electrode pad and the negative electrode pad respectively; the integrated metal dam layer being disposed on the upper surface of the ceramic substrate, the integrated metal dam layer surrounding a periphery of a single one or the plurality of die bonding regions and being spaced apart from the die bonding regions, the integrated metal dam layer having a thickness greater than that of the die bonding regions.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 95.0
- Lexical Diversity: 1.74576
- Patent Class: 174.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15797549', '13796489', '13024083', '15777582', '10852315']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8066922463050334
- 35 USC 102 Novelty (BERT): 0.4912544105842829
- Combined Prediction Score: 0.7751484627329585
- Mean Citation Score: 199.042048
- Max Citation Score: 205.37613
- Similarity Product: 146.56434688526988

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test