PATENT CLAIM ANALYSIS

Application Number: 15914506
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["257", "369000"]

Abstract:
The present disclosure relates to a complimentary-metal oxide semiconductor (CMOS) device with dual contact liners. The device can comprise a first field effect transistor comprising a first liner comprising a first portion and a second portion, wherein the first liner resides in a first trench region that is defined by a first spacer and a first epitaxial region (e.g., NFET epitaxial region). The device can also comprise a second field effect transistor comprising a second liner that resides in a second trench region that is defined by a second spacer and a second epitaxial region, wherein the second portion comprises a first material, and the first portion and the second liner comprise a second material.

Claim (Index 17):
The method of  claim 15 , wherein the first field effect transistor comprises an n-type field effect transistor, and the second field effect transistor comprises a p-type field effect transistor.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 90.0
- Lexical Diversity: 2.68085
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15466358', '15198654', '15297730', '14951726', '14551260']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.917663903075334
- 35 USC 102 Novelty (BERT): 0.510357154222479
- Combined Prediction Score: 0.8769332281900486
- Mean Citation Score: 265.344348
- Max Citation Score: 294.7358
- Similarity Product: 261.29800864887244

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test