PATENT CLAIM ANALYSIS

Application Number: 15741741
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-03
Patent Classification: ["257", "072000"]

Abstract:
The present application discloses a method of fabricating a thin film transistor. The method includes forming an active layer having a channel region, a source electrode contact region, and a drain electrode contact region, on a base substrate; forming a first photoresist layer on a side of the active layer distal to the base substrate, the first photoresist layer is formed in a region outside that corresponding to the channel region; forming an insulating material layer on a side of the first photoresist layer distal to the base substrate; forming a first conductive metal material layer on a side of the insulating material layer distal to the first photoresist layer; and removing the first photoresist layer, the insulating material layer, the first conductive metal material layer, in the region outside that corresponding to the channel region by a lift-off method.

Claim (Index 5):
The method of  claim 4 , further comprising forming a source electrode, a drain electrode, and the second gate insulating layer in a single process, the source electrode and the drain electrode are formed on a side of the active layer distal to the base substrate;\n wherein forming the source electrode, the drain electrode, and the second gate insulating layer comprises: forming a second conductive metal material layer on a side of the active layer distal to the base substrate, the second conductive metal material layer is formed to comprises a first portion in a region corresponding to the source electrode contact region of the active layer, a second portion in a region corresponding to the drain electrode contact region of the active layer, and a third portion in a region corresponding to the channel region of the active layer; forming the first photoresist layer on a side of the second conductive metal material layer distal to the active layer, the first photoresist layer is formed in the region outside that corresponding to the channel region; and oxidizing the third portion of the second conductive metal material layer thereby forming the second gate insulating layer, the first portion remains substantially unoxidized thereby forming the source electrode, the second portion remains substantially unoxidized thereby forming the drain electrode.

Metadata:
- Claim Count in Document: 12.0
- Percentile: 86.0
- Lexical Diversity: 3.12245
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15565377', '15533109', '15543726', '15560724', '15153767']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.920125954577374
- 35 USC 102 Novelty (BERT): 0.5129573966421391
- Combined Prediction Score: 0.8794090987838505
- Mean Citation Score: 255.504488
- Max Citation Score: 292.87448
- Similarity Product: 200.1425045222092

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test