PATENT CLAIM ANALYSIS

Application Number: 15918563
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["257", "334000"]

Abstract:
A trench structure is located directly laterally between a first well and a first source region for a first transistor and the second well region with a second source for a second transistor. The trench structure includes a first gate structure for the first transistor, a second gate structure for the second transistor, a first conductive field plate structure, and a second conductive field plate structure. The first gate structure, the first field plate structure, the second field plate structure, and the second gate structure are located in the trench structure in a lateral line between the first well region and the second well region. The trench structure includes a dielectric separating the first field plate structure and the second field plate structure from each other in the lateral line. A drain region for the first transistor and the second transistor includes a portion located directly below the trench structure.

Claim (Index 11):
A method for making a transistor device comprising:\n forming a trench in a substrate; forming a layer of field plate material in the trench; separating the layer of field plate material in the trench into a first conductive field plate structure and a second conductive field plate structure; forming a dielectric separation between the first conductive field plate structure and the second conductive field plate structure in the trench; forming a first gate structure for a first transistor in the trench; forming a second gate structure for a second transistor in the trench; forming a first source region in a first well region of the substrate adjacent a first sidewall of the trench, the first source region is for the first transistor; forming a second source region in a second well region in the substrate adjacent to a second sidewall of the trench opposing the first sidewall of the trench, the second source region is for the second transistor; wherein a drain region for the first transistor and the second transistor includes a portion that is located directly below the trench; wherein the first gate structure, the first conductive field plate structure, the second conductive field plate structure, and the second gate structure are located in the trench in a lateral line between the first well region and the second well region, wherein a dielectric is located in the trench and separates the first conductive field plate structure from the second conductive field plate structure in the lateral line.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 4.12821
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12072615', '12018166', '13483569', '13717126', '15240831']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9275504865974344
- 35 USC 102 Novelty (BERT): 0.4681599693266569
- Combined Prediction Score: 0.8816114348703566
- Mean Citation Score: 151.272828
- Max Citation Score: 155.94073
- Similarity Product: 116.52928834724187

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test