PATENT CLAIM ANALYSIS

Application Number: 15996617
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["365", "185110"]

Abstract:
A memory device that includes: a memory controller; a control unit; and a memory cell array that includes memory blocks, each memory block comprising: memory cells, word lines respectively coupled to the memory cells, signal lines to transfer signals to perform programming operations to one or more memory cells of the memory cells, a first metal layer coupled to a first group of lines and configured to route the first group of the lines to the control unit, the lines comprising the word lines and the signal lines, and a second metal layer coupled to a second group of the lines and configured to route the second group of the lines to the control unit, wherein the memory controller is configured to: control the control unit to (i) select particular memory cells and (ii) program data to the particular memory cells is disclosed.

Claim (Index 16):
The method of  claim 11 , wherein the second metal layer is discontinuous between a first portion and a second portion, and\n wherein the first portion of the second metal layer is coupled to the second portion of the second metal layer through a detouring portion of the second metal layer.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 94.0
- Lexical Diversity: 2.90909
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15917037', '12752485', '15857940', '12780938', '11075423']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8133834320275833
- 35 USC 102 Novelty (BERT): 0.4767148055889868
- Combined Prediction Score: 0.7797165693837237
- Mean Citation Score: 185.559636
- Max Citation Score: 206.8891
- Similarity Product: 155.75581688538196

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test