PATENT CLAIM ANALYSIS

Application Number: 16009211
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["257", "774000"]

Abstract:
An integrated fan-out (InFO) package includes an encapsulant, a die, a plurality of conductive structures, and a redistribution structure. The die and the conductive structures are encapsulated by the encapsulant. The conductive structures surround the die. The redistribution structure is disposed on the encapsulant. The redistribution structure includes a plurality of routing patterns, a plurality of conductive vias, and a plurality of alignment marks. The conductive vias interconnects the routing patterns. At least one of the alignment mark is in physical contact with the encapsulant.

Claim (Index 19):
The method according to  claim 17 , wherein the step of forming the redistribution structure further comprises:\n forming a second sub-layer over the first-sub layer, comprising:\n forming a second seed material layer over the first-sub layer; \n forming a second photoresist layer over the second seed material layer, wherein the second photoresist layer comprises a plurality of second openings exposing at least a portion of the second seed material layer; filling a second conductive material into the plurality of second openings of the second photoresist layer to form a plurality of second conductive patterns; removing the second photoresist layer; forming a third photoresist layer over the second seed material layer and the plurality of second conductive patterns, wherein the third photoresist layer comprises a plurality of third openings exposing at least a portion of the plurality of second conductive patterns; filling a third conductive material into the plurality of third openings of the third photoresist layer to form a plurality of third conductive patterns; removing the third photoresist layer and portions of the second seed material layer exposed by the plurality of second conductive patterns to form a plurality of routing patterns, a plurality of second conductive vias, and a second alignment mark, wherein the plurality of second conductive vias is disposed on the plurality of routing patterns;\n forming a second dielectric material layer over the first-sub layer to encapsulate the plurality of routing patterns, the plurality of second conductive vias, and the second alignment mark; and \n removing a portion of the second dielectric material layer to form a second dielectric layer exposing a top surface of the plurality of second conductive vias and a top surface of the second alignment mark.

Metadata:
- Claim Count in Document: 21.0
- Percentile: 94.0
- Lexical Diversity: 2.25
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15690196', '15965978', '15832742', '15730760', '15640975']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.913490909065752
- 35 USC 102 Novelty (BERT): 0.4841742939502792
- Combined Prediction Score: 0.8705592475542049
- Mean Citation Score: 186.84974
- Max Citation Score: 203.8169
- Similarity Product: 149.34164580215216

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test