PATENT CLAIM ANALYSIS

Application Number: 15919805
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["710", "316000"]

Abstract:
A slave device for a serial synchronous full duplex bus system, which has a data input stage, a clock input stage, an interface logic, a synchronization delay flip-flop, and a data output stage. The slave device is manufactured using nanometer technologies. Also, a method for operating the slave device.

Claim (Index 11):
The slave device according to  claim 6 , wherein the interface logic is configured, in a third mode of operation, to receive sequentially a plurality of bit sequences within the low voltage data signal, wherein each bit sequence corresponds to a register address of the register, wherein the interface logic is configured to output a first low voltage output data signal corresponding to a first register address and a second low voltage output data signal corresponding in a time-shared way, wherein the interface logic is configured to output a low voltage address signal, wherein the selection module is configured to produce an selection module output signal depending on the first low voltage output data signal, the second low voltage output data signal, the medium voltage data signal, the low voltage address signal and the medium voltage clock signal.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 90.0
- Lexical Diversity: 1.56757
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14848472', '14028806', '11715478', '10764406', '14217510']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6491415197062328
- 35 USC 102 Novelty (BERT): 0.5663344046795022
- Combined Prediction Score: 0.6408608082035598
- Mean Citation Score: 245.13131600000008
- Max Citation Score: 441.9628
- Similarity Product: 381.23406809036726

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test