PATENT CLAIM ANALYSIS

Application Number: 15876132
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["365", "072000"]

Abstract:
A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM circuit of the system LSI controls a substrate bias to reduce leakage current.

Claim (Index 16):
A semiconductor device comprising:\n a first line for a first voltage; a second line for a second voltage lower than the first voltage; a first P channel MOS transistor having a gate coupled to receive a first control signal and having a source-drain path; a second P channel MOS transistor having a gate coupled to receive a second control signal different from the first control signal and having a source-drain path; a first static random access memory circuit which includes:\n first static memory cells, each first static memory cell having a first voltage supply point which is coupled to the first line via the source-drain path of the first P channel MOS transistor, and each first static memory cell being coupled to the second line; \n first word lines coupled to the first static memory cells; \n first word drivers coupled to the first word lines, each first word driver having a second voltage supply point which is coupled to the first line via the source-drain path of the second P channel MOS transistor, and each first word driver being coupled to the second line; and \n first bit lines coupled to the first static memory cells; and \n a second static random access memory circuit which includes:\n second static memory cells, each second static memory cell being directly coupled to the first line and coupled to the second line; \n second word lines coupled to the second static memory cells; \n second word drivers coupled to the second word lines, each second word driver being coupled to the first line and coupled to the second line; and \n second bit lines coupled to the second static memory cells.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 86.0
- Lexical Diversity: 1.45714
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15478237', '10671513', '12325783', '11500339', '14940654']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8181582078967234
- 35 USC 102 Novelty (BERT): 0.5666138395833441
- Combined Prediction Score: 0.7930037710653856
- Mean Citation Score: 405.769406
- Max Citation Score: 449.8904
- Similarity Product: 429.7938022334099

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test