PATENT CLAIM ANALYSIS

Application Number: 15744615
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-03
Patent Classification: ["345", "173000"]

Abstract:
The present disclosure provides a display panel including a display area and a non-display area, a base substrate, a plurality of thin film transistors, a plurality of touch signal lines, a first test signal line area, an array substrate row driving circuit, a second test signal line area, a ground line area and an insulating layer. The thin film transistor includes a gate, a gate insulating layer, a source and a drain. The non-display area includes a first side and a second side; the array substrate row driving circuit respectively forms a first gap and a second gap with the first test signal line area and the second test signal line area, an orthographic projection of the ground line area on the base substrate is in the projection of the second test signal line area in the base substrate. The present disclosure also provides a display device.

Claim (Index 7):
The display device according to  claim 6 , wherein the second test signal line area is formed in a same layer as the gate, and the ground line area is formed in a same layer as the source and the drain.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 86.0
- Lexical Diversity: 3.0
- Patent Class: 345.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15571724', '13918060', '14092102', '15777454', '15325011']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6716577827716138
- 35 USC 102 Novelty (BERT): 0.4725922990749731
- Combined Prediction Score: 0.6517512344019497
- Mean Citation Score: 194.406074
- Max Citation Score: 198.21724
- Similarity Product: 162.11187396902562

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test