PATENT CLAIM ANALYSIS

Application Number: 15928587
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["365", "201000"]

Abstract:
The present disclosure relates to a device including a built-in-self-test (BIST) circuit configured to run a BIST pattern in a loop mode on a memory which is customized for activity factors corresponding to a programmable number of operations, the BIST circuit being further configured to measure dynamic power on a supply while running the BIST pattern in the loop mode on the memory.

Claim (Index 17):
The circuit of  claim 10 , wherein the BIST circuit is further configured to measure dynamic power on the supply by measuring current on the supply while running the BIST pattern in the loop mode on the memory.

Metadata:
- Claim Count in Document: 26.0
- Percentile: 90.0
- Lexical Diversity: 1.55814
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13569276', '13685779', '10876864', '14060872', '10893412']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7934505881123081
- 35 USC 102 Novelty (BERT): 0.4928570525020441
- Combined Prediction Score: 0.7633912345512817
- Mean Citation Score: 156.0627
- Max Citation Score: 168.13541999999995
- Similarity Product: 97.78554766772744

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test