PATENT CLAIM ANALYSIS

Application Number: 15873438
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["257", "389000"]

Abstract:
A parasitic capacitance and a leak current in a nitride semiconductor device are reduced. For example, a 100 nm-thick buffer layer made of AlN, a 2 μm-thick undoped GaN layer, and 20 nm-thick undoped AlGaN having an Al composition ratio of 20% are epitaxially grown in this order on, for example, a substrate made of silicon, and a source electrode and a drain electrode are formed so as to be in ohmic contact with the undoped AlGaN layer. Further, in the undoped GaN layer and the undoped AlGaN layer immediately below a gate wire, a high resistance region, the resistance of which is increased by, for example, ion implantation with Ar or the like, is formed, and a boundary between the high resistance region and an element region is positioned immediately below the gate wire.

Claim (Index 19):
The semiconductor device according to  claim 1 , wherein no gate electrode is disposed between the first portion and the at least one of the first source electrode and the first drain electrode.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 86.0
- Lexical Diversity: 1.97403
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14636149', '14887249', '13231514', '11109858', '13150574']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.91381850154718
- 35 USC 102 Novelty (BERT): 0.5473929859016322
- Combined Prediction Score: 0.8771759499826252
- Mean Citation Score: 271.804574
- Max Citation Score: 383.62396
- Similarity Product: 336.8131559362031

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test