PATENT CLAIM ANALYSIS

Application Number: 16251419
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-06
Patent Classification: ["365", "185110"]

Abstract:
A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks. The first block has a first cell unit which includes a memory cell to be programmed and a second cell unit which does not include a memory cell to be programmed, and programming is executed by applying a program potential or a transfer potential to word lines in the first block after the initial potential of channels of the memory cells in the first and second cell units is set to a plus potential. In the programming, the program potential and the transfer potential are not applied to word lines in the second block.

Claim (Index 4):
The memory according to  claim 3 ,\n wherein the sixth voltage is a positive voltage such that a voltage of a channel of the second memory cell transistor is boosted toward the positive voltage at the first timing.

Metadata:
- Claim Count in Document: 24.0
- Percentile: 99.0
- Lexical Diversity: 2.15517
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15367361', '14191172', '14994203', '15916332', '13738633']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8500425934514805
- 35 USC 102 Novelty (BERT): 0.5530687314191082
- Combined Prediction Score: 0.8203452072482433
- Mean Citation Score: 443.870068
- Max Citation Score: 447.97333
- Similarity Product: 317.8935307865244

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test