PATENT CLAIM ANALYSIS

Application Number: 16118655
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-12
Patent Classification: ["341", "087000"]

Abstract:
An apparatus and a method. The apparatus includes a plurality of polarization processors, including n inputs and n outputs, where n is an integer, wherein the plurality of polarization processors is configured to polarize channels with different bit-channel reliability; and at least one permutation processor, including n inputs and n outputs, wherein each of the at least one permutation processor is connected between two of the plurality of polarization processors, and connects the n outputs of a first of the two of the plurality of polarizations processors to the n inputs of a second of the two of the plurality of polarization processors between which each of the at least one permutation processor is connected in a permutation pattern, wherein at least one permutation processor is configured to not further polarize a bit channel.

Claim (Index 19):
A method of manufacturing an apparatus, comprising:\n forming the apparatus on a wafer or a package with at least one other apparatus, wherein the apparatus comprises a plurality of polarization processors, including n inputs and n outputs, where n is an integer, wherein the plurality of polarization processors is configured to polarize channels with different bit-channel reliability, and at least one permutation processor, including n inputs and n outputs, wherein each of the at least one permutation processor is connected between two of the plurality of polarization processors, and connects the n outputs of a first of the two of the plurality of polarizations processors to the n inputs of a second of the two of the plurality of polarization processors between which each of the at least one permutation processor is connected in a permutation pattern, wherein at least one permutation processor is configured to not further polarize a bit channel; and testing the apparatus, wherein testing the coarse timing and frequency synchronization apparatus comprises testing the apparatus using one or more electrical to optical converters, one or more optical splitters that split an optical signal into two or more optical signals, and one or more optical to electrical converters.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 96.0
- Lexical Diversity: 2.76923
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15459962', '15467369', '14837763', '15849034', '15838559']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5046783032660993
- 35 USC 102 Novelty (BERT): 0.6057125850133945
- Combined Prediction Score: 0.5147817314408288
- Mean Citation Score: 244.75773000000004
- Max Citation Score: 503.74728
- Similarity Product: 471.9087119520092

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test