PATENT CLAIM ANALYSIS

Application Number: 15880493
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-05
Patent Classification: ["710", "308000"]

Abstract:
In at least some examples, a computing node includes a processor and a local memory coupled to the processor. The computing node also includes a reflective memory bridge coupled to the processor. The reflective memory bridge maps to an incoming region of the local memory assigned to at least one external computing node and maps to an outgoing region of the local memory assigned to at least one external computing node.

Claim (Index 16):
A computing node, comprising:\n a reflective memory bridge to map to an incoming region of a local memory assigned to an external computing node and to map to an outgoing region of the local memory assigned to an external computing node; and a memory mapped register to count a number of writes from the outgoing region that are still in a buffer by incrementing the count when a write from the outgoing region is monitored and decrementing the count when the write is released from the buffer; wherein a same counter of the memory mapped register is incremented when the write from the outgoing region is monitored and is decremented when the write is released from the buffer.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 86.0
- Lexical Diversity: 2.41935
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14389910', '14601228', '14671566', '12024397', '10439297']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5947842630056976
- 35 USC 102 Novelty (BERT): 0.485641599547874
- Combined Prediction Score: 0.5838699966599152
- Mean Citation Score: 133.8042168
- Max Citation Score: 257.87292
- Similarity Product: 241.48838638514044

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test