PATENT CLAIM ANALYSIS

Application Number: 15975629
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "773000"]

Abstract:
A method of manufacturing semiconductor devices includes providing one or more semiconductor chips having a surface with electrical contact pads and a package mass encapsulating the semiconductor chip. The package mass includes a recessed portion leaving the semiconductor chip surface with the contact pads exposed, the recessed portion having a peripheral wall extending from the surface of the semiconductor chip to the outer surface of the package mass. Electrically-conductive formations are provided extending over the peripheral wall of the recessed portion with proximal ends electrically coupled with the contact pads of the semiconductor chip and distal ends at the outer surface of the package mass. The recessed portion is filled with a further package mass by leaving the distal ends of the electrically-conductive formations uncovered.

Claim (Index 10):
The method of  claim 1 , further comprising attaching the semiconductor chip onto a thermally conductive support layer prior to molding the package mass and forming the electrically-conductive formations.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 93.0
- Lexical Diversity: 2.36364
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['10382025', '15617561', '09944487', '11411265', '10919604']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.895997101514528
- 35 USC 102 Novelty (BERT): 0.4690766637070296
- Combined Prediction Score: 0.8533050577337783
- Mean Citation Score: 170.80379
- Max Citation Score: 176.23645
- Similarity Product: 145.6399923275441

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test