PATENT CLAIM ANALYSIS

Application Number: 15899302
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-06
Patent Classification: ["711", "103000"]

Abstract:
A processing device selectively backups only certain data based on a priority or binning structure. In one approach, a non-volatile logic controller stores the machine state by storing in non-volatile logic element arrays a portion of data representing the machine state less than all the data of the machine state. Accordingly, the non-volatile logic controller stores the machine state in the plurality of non-volatile logic element arrays by storing a first set of program data of the machine state according to a first category for backup and restoration and storing a second set of program data of the machine state according to a second category for backup and restoration.

Claim (Index 19):
A method comprising:\n operating a processing device using a plurality of volatile storage elements; storing in a plurality of non-volatile logic element arrays a machine state of the processing device stored in the plurality of volatile store elements in response to the processing device entering a backup state by storing a portion of data representing the machine state less than all the data of the machine state; wherein the storing the machine state further comprises categorizing a first set of program data of the machine state according to a first category and categorizing a second set of program data of the machine state according to a second category; wherein the storing the machine state further comprises:\n storing the first set of program data, the first set of program data comprising data from cells of the processing device that are active when the processing device operates in a functional mode, in the plurality of non-volatile logic element arrays in response to the processing device's entering a backup state, \n storing the second set of program data, the second set of program data comprising data from cells of the processing device that are active when the processing device operates in a test mode or a configuration mode, in the plurality of non-volatile logic element arrays in response to the processing device's entering a default state, and \n not storing in the plurality of non-volatile logic element arrays a third set of program data of the machine state comprising data from cells configured to be sequential cells with latches that are transparent when a clock for the processing device is in an inactive state or sequential cells that are part of a data path for read-only instruction buffers or read caches.

Metadata:
- Claim Count in Document: 24.0
- Percentile: 88.0
- Lexical Diversity: 2.23529
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13770004', '13770498', '13770399', '15659111', '13770280']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.609406645702171
- 35 USC 102 Novelty (BERT): 0.5464295714858661
- Combined Prediction Score: 0.6031089382805405
- Mean Citation Score: 374.888184
- Max Citation Score: 417.77625
- Similarity Product: 332.3977739106864

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test