PATENT CLAIM ANALYSIS

Application Number: 16042769
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "093000"]

Abstract:
A semiconductor device, comprises a semiconductor stack comprising a first area and a second area, wherein the second area comprises a first side wall, a first isolation path formed between the first area and the second area, a second isolation path formed in the semiconductor stack, an isolation layer formed in the first isolation path and covering the first side wall, an electrical contact layer formed under the semiconductor stack, and an electrode contact layer directly contacting the electrical contact layer.

Claim (Index 4):
The semiconductor device according to  claim 1 , wherein both of the first area and the second area sequentially comprise a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 95.0
- Lexical Diversity: 2.87097
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13959891', '15006374', '15794842', '14223495', '13401446']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9183352811211902
- 35 USC 102 Novelty (BERT): 0.4495757967406266
- Combined Prediction Score: 0.8714593326831339
- Mean Citation Score: 150.89545
- Max Citation Score: 165.72157
- Similarity Product: 148.81507598792254

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test