PATENT CLAIM ANALYSIS

Application Number: 16013236
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-11
Patent Classification: ["327", "158000"]

Abstract:
A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator. The phase locked loop circuit also includes a digital path including a digital phase detector. The phase locked loop circuit further includes an analog path including a linear phase detector. Additionally, the phase locked loop circuit includes a feedback path connecting an output of the ring oscillator to an input of the digital path and an input of the analog path. The digital path and the analog path are parallel paths. The digital path provides a digital tuning signal the ring oscillator that digitally controls a frequency of the ring oscillator. The analog path provides an analog tuning signal the ring oscillator that continuously controls the frequency of the ring oscillator.

Claim (Index 7):
The phase locked loop circuit of  claim 6 , wherein the ring oscillator includes a ring oscillator array, a digital control logic and current-starved inverters.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 94.0
- Lexical Diversity: 3.16279
- Patent Class: 327.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15820701', '15248792', '15668790', '15248822', '15994107']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8287760089756184
- 35 USC 102 Novelty (BERT): 0.5414427838558802
- Combined Prediction Score: 0.8000426864636446
- Mean Citation Score: 396.730348
- Max Citation Score: 398.85248
- Similarity Product: 333.40488052860263

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test