PATENT CLAIM ANALYSIS

Application Number: 15992733
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["257", "329000"]

Abstract:
A transistor includes a vertical channel fin on a bottom source/drain region. The vertical channel fin includes a base portion and an upper portion. The base portion has a width greater than a width of the upper portion and a top surface height greater than a top surface height of the bottom source/drain region. A gate stack formed on sidewalls of the vertical channel fin. Spacers are formed above the gate stack, one above each sidewall of the vertical channel fin. A top source/drain region is formed between the spacers.

Claim (Index 15):
The transistor of  claim 10 , wherein the top source/drain region has a lower portion in contact with the channel fin that is narrower than an upper portion.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 93.0
- Lexical Diversity: 2.36585
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15496797', '15471416', '15147194', '15668248', '15152144']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9341331312798116
- 35 USC 102 Novelty (BERT): 0.5232270869825533
- Combined Prediction Score: 0.8930425268500858
- Mean Citation Score: 303.156848
- Max Citation Score: 345.94272
- Similarity Product: 322.2050906507492

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test