PATENT CLAIM ANALYSIS

Application Number: 16108454
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-03
Patent Classification: ["257", "072000"]

Abstract:
A thin film transistor includes an active layer over a substrate, a gate electrode over the active layer, a gate line connected with the gate electrode, and a gate insulation film between the active layer and the gate electrode. The active layer includes a channel region overlapping the gate electrode, and a drain region and a source region on respective sides of the channel region. A length of a straight line connecting the drain region and the source region by a shortest distance may be greater than a width of the gate line parallel to the straight line.

Claim (Index 20):
The display device as claimed in  claim 19 , wherein the thin film transistor includes:\n a first insulation film covering the gate electrode, the gate line, the source region, and the drain region; a source electrode on the first insulation film and electrically connected with the source region; and a drain electrode on the first insulation film and electrically connected with the drain region, wherein the source electrode is electrically connected with the conductive layer.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 96.0
- Lexical Diversity: 2.33333
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15660342', '11760864', '15006295', '11017075', '13328094']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9136990546009576
- 35 USC 102 Novelty (BERT): 0.5059816256272349
- Combined Prediction Score: 0.8729273117035855
- Mean Citation Score: 246.313916
- Max Citation Score: 251.44441
- Similarity Product: 186.99624714668872

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test