PATENT CLAIM ANALYSIS

Application Number: 15921715
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "401000"]

Abstract:
Methods form transistor structures that include, among other components, a substrate having an active region bordered by an isolation region, a gate insulator on the substrate, and a gate conductor on the gate insulator. First and second sections of the gate conductor are within the active region of the substrate, while a third section is in the isolation region of the substrate. The second section of the gate conductor tapers from the width of the first section to the width of the wider third section. The first section and the second section of the gate conductor have undercut regions where the corner of the gate conductor contacts the substrate. The third section of the gate conductor lacks the undercut regions. The gate insulator is relatively thicker in the undercut regions and is relatively thinner where the corner of the gate conductor lacks the undercut regions in the isolation region.

Claim (Index 14):
The method according to  claim 13 , the first gate conductor and the second gate conductor are formed in the same process.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 90.0
- Lexical Diversity: 2.96296
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14982459', '13289051', '14493749', '11728111', '11764751']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9070311744695008
- 35 USC 102 Novelty (BERT): 0.5458012393175504
- Combined Prediction Score: 0.8709081809543059
- Mean Citation Score: 232.737716
- Max Citation Score: 381.51627
- Similarity Product: 259.9673470916927

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test