PATENT CLAIM ANALYSIS

Application Number: 16049863
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["365", "185180"]

Abstract:
A nonvolatile memory device includes a memory cell array having a first plane and a second plane and an address decoder connected to the first plane through first string select lines and connected to the second plane through second string select line. The address decoder provides a string select signal and a string unselect signal to the first and second string select lines. The address decoder independently provides the string select signal and the string unselect signal to the first and second string select lines in each plane based on different string select line addresses corresponding to the first and second planes.

Claim (Index 14):
The nonvolatile memory device as set forth in  claim 13 , wherein:\n the address decoder further includes a switch controller configured to store the first to fourth string select line addresses, and the switch controller includes a first stage configured to store the first and second string select line addresses and a second stage configured to store the third and fourth string select line addresses.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 95.0
- Lexical Diversity: 2.76316
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15342027', '14608760', '15272776', '14814846', '13023934']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8272778364304779
- 35 USC 102 Novelty (BERT): 0.5480631662547356
- Combined Prediction Score: 0.7993563694129037
- Mean Citation Score: 311.8766520000001
- Max Citation Score: 428.7253
- Similarity Product: 352.7249125813067

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test