PATENT CLAIM ANALYSIS

Application Number: 16052371
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2018-11
Patent Classification: ["710", "313000"]

Abstract:
Systems, devices, methods, and techniques for bus receivers operable to provide a data output corresponding to a voltage differential provided on a two-conductor data bus. In one example, a bus receiver comprises a four-quadrant input circuit and a gain stage coupled to the four-quadrant input circuit. In various examples, the four-quadrant input circuit is operable to provide common mode current compensation based on a common mode voltage present on the two-conductor data bus.

Claim (Index 35):
A device comprising:\n a bus receiver comprising a four-quadrant input circuit, the four-quadrant input circuit including a first current input and a second current input,\n wherein the four-quadrant input circuit is configured to receive a first current at the first current input, receive a second current at the second input, and output a first differential voltage and a second differential voltage based on a difference in current flows between the first current and the second current, the first differential voltage and the second differential voltage compensated for a common mode current; and \n an active gain input stage coupled to the four-quadrant input circuit, the active gain input stage comprising: a first input coupled to a voltage input differential circuit; a second input coupled to a biasing circuit operable to provide biasing to control biasing of a plurality of output semiconductors controlling a plurality of outputs of the four-quadrant input circuit; a first active gain stage output coupled to the common mode biasing circuit; and a second active gain stage output coupled to the common mode biasing circuit,\n wherein the active gain stage is operable to provide common mode current compensation by driving, using the first active gain output, the common mode biasing circuit to allow current to be provided to the first current input and the second current input when a negative common mode current exists between the first current input and the second current input; and provide common mode current compensation by driving, using the second active gain output, the common mode biasing circuit to allow current to be sunk from the first current input and from the second current input when a positive common mode current exists between the first current input and the second current input.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 96.0
- Lexical Diversity: 1.88372
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15091337', '13250944', '11387357', '15629900', '13954204']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6135776213704299
- 35 USC 102 Novelty (BERT): 0.5238972827973624
- Combined Prediction Score: 0.6046095875131231
- Mean Citation Score: 204.604666
- Max Citation Score: 344.6701
- Similarity Product: 333.3768091851592

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test