PATENT CLAIM ANALYSIS

Application Number: 16162186
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["257", "382000"]

Abstract:
A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations.

Claim (Index 1):
An integrated circuit structure, comprising:\n a substrate comprising silicon; a gate structure above the substrate, the gate structure comprising a gate dielectric and a gate electrode; a first dielectric gate spacer adjacent a first side of the gate structure; a second dielectric gate spacer adjacent a second side of the gate structure; a first source or drain region at the first side of the gate structure; a second source or drain region at the second side of the gate structure; a conductive contact structure on the first source or drain region; a first dielectric layer over a portion of the gate structure, the first dielectric layer having an opening over a portion of the conductive contact structure; a first dielectric contact spacer along a first sidewall of the opening of the first dielectric layer; a second dielectric contact spacer along a second sidewall of the opening of the first dielectric layer; a metal structure between the first dielectric contact spacer and the second dielectric contact spacer, the metal structure in contact with the portion of the conductive contact structure; and a second dielectric layer over on the first dielectric layer.

Metadata:
- Claim Count in Document: 31.0
- Percentile: 97.0
- Lexical Diversity: 2.4717
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14731363', '15299106', '14998092', '12655408', '15827491']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9113689476729356
- 35 USC 102 Novelty (BERT): 0.5233777719364366
- Combined Prediction Score: 0.8725698300992858
- Mean Citation Score: 303.7462
- Max Citation Score: 311.8047200000001
- Similarity Product: 217.4803695846368

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test