PATENT CLAIM ANALYSIS

Application Number: 15949046
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-01
Patent Classification: ["710", "313000"]

Abstract:
A shared memory controller receives, from a computing node, a request associated with a memory transaction involving a particular line in a memory pool. The request includes a node address according to an address map of the computing node. An address translation structure is used to translate the first address into a corresponding second address according to a global address map for the memory pool, and the shared memory controller determines that a particular one of a plurality of shared memory controllers is associated with the second address in the global address map and causes the particular shared memory controller to handle the request.

Claim (Index 5):
The apparatus of  claim 4 , wherein the first shared memory controller further comprises a second interface to forward the request to the second shared memory controller and receive a result for the request from the second shared memory controller, and the result is to be forwarded to the computing node over the first interface.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 91.0
- Lexical Diversity: 2.2449
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14671566', '14670578', '15393744', '14142697', '15447767']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7058807601939872
- 35 USC 102 Novelty (BERT): 0.5385493092506021
- Combined Prediction Score: 0.6891476150996487
- Mean Citation Score: 250.72249800000003
- Max Citation Score: 387.90567
- Similarity Product: 375.2202520219409

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test