PATENT CLAIM ANALYSIS

Application Number: 15743813
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-05
Patent Classification: ["257", "072000"]

Abstract:
Disclosed are an array substrate and a method of manufacturing the array substrate. The method of manufacturing an array substrate includes: forming a first metal layer on a substrate, and etching the first metal layer; forming an insulating layer on the substrate and the first metal layer; forming an active layer and an ohmic contact layer successively on the insulating layer; etching the active layer and the ohmic contact layer; forming a second metal layer on the ohmic contact layer and the insulating layer, and etching the second metal layer; forming a protective layer on the second metal layer and the insulating layer; forming a photoresist layer on the protective layer, and performing exposure and development; and forming a transparent conducting layer directly on the color filter, and etching the transparent conducting layer to form a pixel electrode layer.

Claim (Index 13):
The array substrate according to  claim 12 , further comprising a plurality of scan lines and a plurality of common electrodes arranged on a same layer as the gate electrodes.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 86.0
- Lexical Diversity: 3.55814
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['11378714', '10475703', '11170251', '10273073', '10877590']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.923610977174712
- 35 USC 102 Novelty (BERT): 0.5038717803416563
- Combined Prediction Score: 0.8816370574914064
- Mean Citation Score: 267.635796
- Max Citation Score: 278.6981
- Similarity Product: 209.8780975240052

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test