PATENT CLAIM ANALYSIS

Application Number: 15876047
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["375", "260000"]

Abstract:
Systems and methods for providing Chronos Channel interconnects in an ASIC are provided. Chronos Channels rely on a reduced set of timing assumptions and are robust against delay variations. Chronos Channels transmit data using delay insensitive (DI) codes and quasi-delay-insensitive (QDI) logic. Chronos Channels are insensitive to all wire and gate delay variations, but for those belonging to a few specific forking logic paths called isochronic forks. Chronos Channels use temporal compression in internal paths to reduce the overheads of QDI logic and efficiently transmit data. Chronos Channels are defined by a combination of a DI code, a temporal compression ratio and hardware.

Claim (Index 4):
The point-to-point connection as recited in  claim 1 , wherein the TX is configured to encode data symbols comprising four elements (a,b,c,d) using DI encoding that relies on four symbols A, B, C and D, and the RX is configured to decode the codewords (A,B,C and D) using DI decoding to form duplicates of the data symbols (a, b, c, d).

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 1.71642
- Patent Class: 375.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15344416', '15876059', '15344420', '15344441', '15644696']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.47375803117307
- 35 USC 102 Novelty (BERT): 0.595326179381826
- Combined Prediction Score: 0.4859148459939456
- Mean Citation Score: 280.037956
- Max Citation Score: 503.21964
- Similarity Product: 488.52009879175904

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test