PATENT CLAIM ANALYSIS

Application Number: 15918466
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "676000"]

Abstract:
A manufacturing method of a semiconductor device includes preparing a chip mounting part and a lead frame including leads arranged around the chip mounting part, mounting over the chip mounting part a first semiconductor chip including a first top surface in a quadrangular shape, a first back surface opposite to the first top surface, first pads arranged over the first top surface, and a first inductor that is provided on a side of first top surface and is electrically coupled to the first pads, and mounting over the first semiconductor chip, through a first insulating film, a second semiconductor chip including a second top surface in a quadrangular shape, a second back surface opposite to the second top surface, second pads arranged over the second top surface, and a second inductor that is provided on a side of the second top surface.

Claim (Index 1):
A manufacturing method of a semiconductor device, the manufacturing method comprising:\n preparing a chip mounting part and a lead frame including leads arranged around the chip mounting part; mounting over the chip mounting part a first semiconductor chip including a first top surface in a quadrangular shape, a first back surface opposite to the first top surface, first pads arranged over the first top surface, and a first inductor that is provided on a side of the first top surface and is electrically coupled to the first pads; mounting over the first semiconductor chip, through a first insulating film, a second semiconductor chip including a second top surface in a quadrangular shape, a second back surface opposite to the second top surface, second pads arranged over the second top surface, and a second inductor that is provided on a side of the second top surface and is electrically coupled to the second pads, the second inductor facing the first inductor; and electrically coupling each of first leads of the leads to each of the first pads of the first semiconductor chip through a plurality of first wires and electrically coupling each of second leads of the leads to each of the second pads of the second semiconductor chip through a plurality of second wires, wherein the first pads of the first semiconductor chip are provided along each of a first chip side and a second chip side intersecting with the first chip side among four sides of the first top surface, and wherein the second semiconductor chip is mounted over the first semiconductor chip in the mounting over the first semiconductor chip such that each of the first pads of the first semiconductor chip is not overlapped with the second semiconductor chip, in a first planar view, viewed from the side of first top surface of the first semiconductor chip, and each of the second pads of the second semiconductor chip is not overlapped with the first semiconductor chip, in a second planar view, viewed from the side of the second top surface of the second semiconductor chip.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 90.0
- Lexical Diversity: 3.4
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15162271', '14259842', '15015607', '14928780', '13540565']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9129275225338512
- 35 USC 102 Novelty (BERT): 0.4998833663633685
- Combined Prediction Score: 0.8716231069168029
- Mean Citation Score: 212.355544
- Max Citation Score: 288.2962
- Similarity Product: 253.4124136883736

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test