PATENT CLAIM ANALYSIS

Application Number: 15905827
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-02
Patent Classification: ["365", "072000"]

Abstract:
A semiconductor storage device includes a hookup circuit including first and second circuits connected respectively to first and second bit lines, a first circuit group including a first sense amplifier circuit connected to the first circuit and a first data register connected to the first sense amplifier circuit, a second circuit group including a second sense amplifier circuit connected to the second circuit and a second data register connected to the second sense amplifier circuit, and a memory cell array that is above the hookup circuit and the first and second circuit groups and includes a first memory cell connected to the first bit line and a second memory cell connected to the second bit line. The first circuit group, the hookup circuit, and the second circuit group are arranged in sequence along a first direction that is parallel to a surface of the semiconductor substrate.

Claim (Index 4):
The semiconductor storage device according to  claim 1 , wherein the memory cell array includes a plurality of memory cells, and a source line wiring layer between a bit line wiring layer and the memory cells.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 88.0
- Lexical Diversity: 3.4
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14013833', '15411225', '14846381', '15405098', '14630505']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8282197418352949
- 35 USC 102 Novelty (BERT): 0.4967679974464081
- Combined Prediction Score: 0.7950745673964063
- Mean Citation Score: 264.684034
- Max Citation Score: 271.63287
- Similarity Product: 203.48907955044152

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test