PATENT CLAIM ANALYSIS

Application Number: 16045468
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-04
Patent Classification: ["365", "189020"]

Abstract:
Apparatuses and methods for a multi-level communication architectures are disclosed herein. An example apparatus may include an input/output (I/O) circuit comprising a driver circuit configured to convert a first bitstream directed to a first memory device and a second bitstream directed to a second memory device into a single multilevel signal. The driver circuit is further configured to drive the multilevel signal onto a signal line coupled to the first memory device and to the second memory device using a driver configured to drive more than two voltages.

Claim (Index 23):
The method of  claim 20  further comprising:\n receiving a chip select signal at the first device from the host; and \n determining, at the first device, to decode the most significant bit portion of the multilevel signal based on a value of the chip select signal.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 95.0
- Lexical Diversity: 1.82353
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15729393', '15004777', '15465421', '15783688', '15348578']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7374085687661871
- 35 USC 102 Novelty (BERT): 0.5165651131810275
- Combined Prediction Score: 0.7153242232076712
- Mean Citation Score: 177.66978600000004
- Max Citation Score: 317.33258
- Similarity Product: 243.7586719686985

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test