PATENT CLAIM ANALYSIS

Application Number: 15938155
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-10
Patent Classification: ["257", "751000"]

Abstract:
An integrated circuit (IC) structure includes an active area of the IC structure insulator positioned over a substrate. The active area includes an interconnection structure comprised of a plurality of levels, each of the interconnect structure levels including an interlayer dielectric (ILD) layer, a barrier layer disposed over the ILD and a conductor metal layer over the barrier layer. The IC structure also includes a crack stop area which includes a crack stop structure having an equal plurality of levels as the interconnect structure. Each of the crack stop structure levels includes at least one of the layers of the interconnection structure at a same level. At least one crack stop structure level also includes a high modulus layer unique to the crack stop structure level as compared to the corresponding interconnect structure level. In another aspect of the invention, a method for producing the structure is described.

Claim (Index 17):
The method as recited in  claim 11 , wherein the high modulus layer is a single material layer.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 90.0
- Lexical Diversity: 2.40299
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15938207', '15806027', '14574430', '15387120', '11317042']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9231878244109336
- 35 USC 102 Novelty (BERT): 0.5428664497413603
- Combined Prediction Score: 0.8851556869439762
- Mean Citation Score: 247.919752
- Max Citation Score: 395.51648
- Similarity Product: 284.19533602638245

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test