PATENT CLAIM ANALYSIS

Application Number: 16138934
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["706", "031000"]

Abstract:
Device architectures based on trapping and de-trapping holes or electrons and/or recombination of both types of carriers are obtained by carrier trapping either in near-interface deep ambipolar states or in quantum wells/dots, either serving as ambipolar traps in semiconductor layers or in gate dielectric/barrier layers. In either case, the potential barrier for trapping is small and retention is provided by carrier confinement in the deep trap states and/or quantum wells/dots. The device architectures are usable as three terminal or two terminal devices.

Claim (Index 1):
A method comprising:\n providing a synaptic device including a first structure configured for injecting both electrons and holes into a semiconductor layer and traps for trapping both electrons and holes; receiving an electrical signal at the synaptic device, thereby causing the first structure to inject one of electrons and holes into the semiconductor layer, and effecting net negative charge trapping or net positive charge trapping within the traps upon injection of the one of electrons and holes into the semiconductor layer.

Metadata:
- Claim Count in Document: 16.0
- Percentile: 97.0
- Lexical Diversity: 1.55357
- Patent Class: 706.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14684346', '14684343', '15262145', '14181245', '14846750']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.432858003815404
- 35 USC 102 Novelty (BERT): 0.5597395117707691
- Combined Prediction Score: 0.4455461546109406
- Mean Citation Score: 388.180918
- Max Citation Score: 436.18588
- Similarity Product: 416.6419259136582

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test