PATENT CLAIM ANALYSIS

Application Number: 16031142
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "329000"]

Abstract:
A method of making a vertical transistor device includes forming a front gate and a back gate opposite a major surface of a substrate. The front gate and the back gate are symmetric and arranged on opposing sides of a channel between the front gate and the back gate. The channel extends from a drain to a source. The method includes disposing a mask to cover the front gate and removing the back gate. The method further includes replacing the back gate with a layer of insulator and another back gate stack. The another back gate stack only covers a junction between the channel and the source, and remaining portions of the back gate are the layer of insulator.

Claim (Index 4):
The vertical transistor device of  claim 1 , wherein the source is wider than the channel.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 95.0
- Lexical Diversity: 2.47059
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15477355', '15811830', '15405433', '13108282', '15704088']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.93132818789144
- 35 USC 102 Novelty (BERT): 0.5156764569561227
- Combined Prediction Score: 0.8897630147979083
- Mean Citation Score: 243.652732
- Max Citation Score: 305.35303
- Similarity Product: 241.2648825593793

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test