PATENT CLAIM ANALYSIS

Application Number: 16049411
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-04
Patent Classification: ["365", "096000"]

Abstract:
A memory device includes a memory array of a set of memory cells. Each memory cell of the set of memory cells includes at least one transistor and at least one capacitor. The memory array includes at least one programmed memory cell. The programmed memory cell is selectively programmed by applying hot-carrier injection (HCI) to a transistor of the programmed memory cell. The programmed memory cell may provide an indication of pattern data that may be used to facilitate functionality such as data encryption, data decryption, implementation of a particular memory device operation mode, and/or machine-implemented instructions.

Claim (Index 15):
The OTP injection circuitry of  claim 13 , comprising circuitry configured to:\n perform the HCI application cycle, by:\n raising a plate voltage of the at least one memory cell; \n then introducing a strong HCI to the at least one memory cell; and \n then lowering the plate voltage of the at least one memory cell.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 95.0
- Lexical Diversity: 1.98148
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15789167', '14605433', '15908051', '14683720', '12053236']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7356323081948555
- 35 USC 102 Novelty (BERT): 0.4990702869704144
- Combined Prediction Score: 0.7119761060724114
- Mean Citation Score: 160.898088
- Max Citation Score: 258.3429
- Similarity Product: 194.24459711798428

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test