PATENT CLAIM ANALYSIS

Application Number: 15966989
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-12
Patent Classification: ["257", "316000"]

Abstract:
3-d flash memory cells and methods of manufacture are described. The devices and methods recess a compound floating gate in between the silicon oxide slabs which reduces the quantum probability of electron tunneling between vertically adjacent storage cells. The devices and methods further include a high work function nanocrystalline metal in the compound floating gate. A polysilicon buffer layer forms a portion of the compound floating gate. The polysilicon buffer layer allows the high work function nanocrystalline metal to be selectively deposited. The polysilicon buffer layer further protects the high work function nanocrystalline metal from oxidation with the gate oxide subsequently formed on the other side.

Claim (Index 16):
The 3-d flash memory cell of  claim 10  wherein a thermionic work function of the high work function metal is greater than 5.0 eV.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 91.0
- Lexical Diversity: 1.86667
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15891126', '15882454', '15332910', '14452220', '14222418']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9561139261462408
- 35 USC 102 Novelty (BERT): 0.5252380280907198
- Combined Prediction Score: 0.9130263363406886
- Mean Citation Score: 316.724268
- Max Citation Score: 376.8563
- Similarity Product: 259.42703470631835

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test