PATENT CLAIM ANALYSIS

Application Number: 16239835
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["438", "284000"]

Abstract:
In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region is formed adjacent to a first source-drain region. In a region just below a drive gate electrode, a third halo region is formed adjacent to the third source-drain region and a fourth halo region is formed adjacent to a fourth source-drain region. The second halo region is set to have an impurity concentration higher than the impurity concentration of the first halo region. The third halo region is set to have an impurity concentration higher than the impurity concentration of the fourth halo region. The impurity concentration of the first halo region and the impurity concentration of the fourth halo region are different from each other.

Claim (Index 1):
A semiconductor device having a static random access memory, comprising:\n a storage node including a first storage node and a second storage node storing data; a first pair of bit lines sending/receiving data; a read bit line sending data; a ground interconnection to which a ground potential is applied; a first element formation region and a second element formation region, each of which is defined by an element isolation insulation film in a predetermined region of a main surface of a semiconductor substrate; a first access transistor formed in the first element formation region and including a first source-drain region and a second source-drain region that are spaced away from each other and have first conductivity type, the first access transistor including a first access gate electrode positioned above a region interposed between the first source-drain region and the second source-drain region; a first drive transistor formed in the first element formation region and including a third source-drain region and a fourth source-drain region that are spaced away from each other and have the first conductivity type, the first drive transistor including a first drive gate electrode positioned above a region interposed between the third source-drain region and the fourth source-drain region; a second drive transistor formed in the first element formation region and including a fifth source-drain region and a sixth source-drain region that are spaced away from each other and have the first conductivity type, the second drive transistor including a second drive gate electrode positioned above a region interposed between the fifth source-drain region and the sixth source-drain region; and a second access transistor formed in the first element formation region and including a seventh source-drain region and an eighth source-drain region that are spaced away from each other and have the first conductivity type, the second access transistor including a second access gate electrode positioned above a region interposed between the seventh source-drain region and the eighth source-drain region, wherein the first access transistor includes:\n a first halo region having a first impurity concentration and second conductivity type, the first halo region being formed in a region just below the first access gate electrode so as to be adjacent to the first source-drain region electrically connected to a predetermined bit line of the first pair of bit lines, and \n a second halo region having a second impurity concentration and the second conductivity type, the second halo region being formed in the region just below the first access gate electrode so as to be adjacent to the second source-drain region electrically connected to the storage node, \n wherein the first drive transistor includes:\n a third halo region having a third impurity concentration and the second conductivity type, the third halo region being formed in a region just below the first drive gate electrode so as to be adjacent to the third source-drain region electrically connected to the storage node, and \n a fourth halo region having a fourth impurity concentration and the second conductivity type, the fourth halo region being formed in the region just below the first drive gate electrode so as to be adjacent to the fourth source-drain region electrically connected to the ground interconnection, \n wherein the second drive transistor includes:\n a fifth halo region having a fifth impurity concentration and the second conductivity type, the fifth halo region being formed in a region just below the second drive gate electrode so as to be adjacent to the fifth source-drain region electrically connected to the ground interconnection, and \n a sixth halo region having a sixth impurity concentration and the second conductivity type, the sixth halo region being formed in the region just below the second drive gate electrode so as to be adjacent to the sixth source-drain region electrically connected to the storage node, \n wherein the second access transistor includes:\n a seventh halo region having a seventh impurity concentration and the second conductivity type, the seventh halo region being formed in a region just below the second access gate electrode so as to be adjacent to the seventh source-drain region electrically connected to the storage node, and \n an eighth halo region having an eighth impurity concentration and the second conductivity type, the eighth halo region being formed in the region just below the second access gate electrode so as to be adjacent to the eighth source-drain region electrically connected to the read bit line, \n wherein the second impurity concentration is higher than the first impurity concentration, wherein the third impurity concentration is higher than the fourth impurity concentration, and wherein the first impurity concentration and the fourth impurity concentration are set to be different impurity concentrations.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 99.0
- Lexical Diversity: 3.4878
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14236067', '16014920', '13019600', '12788784', '12359643']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.882608897037142
- 35 USC 102 Novelty (BERT): 0.6534249845240896
- Combined Prediction Score: 0.8596905057858367
- Mean Citation Score: 443.656142
- Max Citation Score: 627.97876
- Similarity Product: 615.050431975317

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test