PATENT CLAIM ANALYSIS

Application Number: 15901437
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["257", "797000"]

Abstract:
According to an embodiment, a first resist pattern that includes a mark including a second pattern provided with first components and a third pattern not provided with the first components is formed. Then, a first recessed area is formed on a processing target layer using the first resist pattern. Thereafter, a second resist pattern that includes a fourth pattern is formed. The fourth pattern is formed such that the third pattern and part of the second pattern, which includes at least one row of the first components arranged along a periphery of the third pattern, are exposed. Then, a second recessed area is formed by using the second resist pattern. Thereafter, a position of the processing target layer is recognized by using a stepped portion formed at the second recessed area, in a light exposure apparatus, and a third resist pattern is formed.

Claim (Index 1):
A semiconductor device manufacturing method comprising:\n forming a first resist pattern that includes a first pattern including first components, and a mark including a second pattern provided with the first components and a third pattern not provided with the first components, the first pattern being arranged to be formed in a device region of a processing target layer, the mark being arranged to correspond to a kerf region of the processing target layer; forming a first recessed area on the processing target layer, through the first resist pattern serving as a mask; embedding a first film into the first recessed area; forming a second resist pattern that includes a fourth pattern arranged to correspond to the kerf region, the fourth pattern being formed such that the third pattern and part of the second pattern, which includes at least one row of the first components arranged along a periphery of the third pattern, are exposed; forming a second recessed area by etching the processing target layer, through the second resist pattern serving as a mask, under conditions in which the first film is hardly etched with respect to the processing target layer in the kerf region; forming a second film on the processing target layer; applying a resist onto the processing target layer; recognizing a position of the processing target layer by using a stepped portion formed at the second recessed area of the mark, in a light exposure apparatus; and forming a third resist pattern by performing a light exposure process to the resist by using a reticle.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 88.0
- Lexical Diversity: 2.77193
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14965159', '14863938', '14747295', '11491302', '14799787']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9082028125863232
- 35 USC 102 Novelty (BERT): 0.4846221334581919
- Combined Prediction Score: 0.86584474467351
- Mean Citation Score: 170.103488
- Max Citation Score: 187.29083
- Similarity Product: 130.95089689912916

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test