PATENT CLAIM ANALYSIS

Application Number: 16201282
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["438", "675000"]

Abstract:
A method includes providing a device structure having an isolation structure, a fin adjacent the isolation structure and taller than the isolation structure, and gate structures over the fin and the isolation structure. The isolation structure, the fin, and the gate structures define a first trench over the fin and a second trench over the isolation structure. The method further includes forming a first contact etch stop layer (CESL) over the gate structures, the fin, and the isolation structure; depositing a first inter-layer dielectric (ILD) layer over the first CESL and filling in the first and second trenches; and recessing the first ILD layer such that the first ILD layer in the first trench is removed and the first ILD layer in the second trench is recessed to a level that is about even with a top surface of the fin.

Claim (Index 16):
The integrated circuit of  claim 15  further comprising a plurality of gate structures disposed on the fin and on the isolation feature such that a first trench defined by the plurality of gate structures extends over the fin and a second trench defined by the plurality of gate structures extends over the isolation feature.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 98.0
- Lexical Diversity: 2.73684
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15690709', '15882905', '14819654', '15875485', '15691974']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8351031652728786
- 35 USC 102 Novelty (BERT): 0.5271427875545075
- Combined Prediction Score: 0.8043071275010416
- Mean Citation Score: 236.333824
- Max Citation Score: 306.21332
- Similarity Product: 191.63399434447768

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test