PATENT CLAIM ANALYSIS

Application Number: 15860871
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-07
Patent Classification: ["714", "746000"]

Abstract:
A technique relates to operating a memory controller. The memory controller drives first memory devices and second memory devices of the memory controller in a dual channel mode. A first error correcting code (ECC) memory device and a second ECC memory device protect the first memory devices and the second memory devices. The memory controller drives the first memory devices and the second memory devices in a single channel mode such that the second ECC memory device is a spare memory device, and the first ECC memory device protects the first memory devices and the second memory devices. The memory controller is configured to switch between the dual channel mode and the single channel mode.

Claim (Index 15):
The memory controller of  claim 14 , wherein the circuit is configured to disable the second ECC memory device during the single channel mode such that the second ECC memory device is the spare memory device.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 86.0
- Lexical Diversity: 3.15385
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15860875', '12018926', '14863446', '11627469', '15429751']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.332671498871786
- 35 USC 102 Novelty (BERT): 0.5012471100116075
- Combined Prediction Score: 0.3495290599857681
- Mean Citation Score: 228.41426600000003
- Max Citation Score: 282.88867
- Similarity Product: 217.29084076460603

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test