PATENT CLAIM ANALYSIS

Application Number: 15944550
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-10
Patent Classification: ["438", "770000"]

Abstract:
A method to fabricate a transistor comprises: forming a first dielectric layer on a semiconductor substrate; depositing a barrier layer on the first dielectric layer; depositing an anti-reflective coating on the barrier layer; depositing and exposing a pattern in a photoresist layer to radiation followed by etching to provide an opening; etching a portion of the anti-reflective coating below the opening; etching a portion of the barrier layer below the opening to expose a portion of the first dielectric layer; providing an ambient oxidizing agent to grow an oxide region followed by removing the barrier layer; implanting dopants into the semiconductor substrate after removing the barrier layer; removing the first dielectric layer after implanting dopants into the semiconductor substrate; and forming a second dielectric layer after removing the first dielectric layer, wherein the oxide region is grown to be thicker than the second dielectric layer.

Claim (Index 1):
A method to fabricate a transistor, the method comprising:\n forming a first dielectric layer of silicon dioxide having a first thickness on a semiconductor substrate; depositing a barrier layer on the first dielectric layer; depositing an anti-reflective coating on the barrier layer; depositing a photoresist layer; exposing a pattern in the photoresist layer to radiation; etching the photoresist layer according to the pattern to provide an opening in the photoresist layer; etching a portion of the anti-reflective coating below the opening in the photoresist layer; etching a portion of the barrier layer below the opening to expose a portion of the first dielectric layer; providing an ambient oxidizing agent after etching the portion of the barrier layer below the opening to grow an oxide region by selectively increasing the first thickness of the exposed portion of the first dielectric layer to a greater second thickness; removing the barrier layer after providing the ambient oxidizing agent; implanting dopants into the semiconductor substrate after removing the barrier layer; removing the first dielectric layer outside a lateral extent of the oxide region after implanting dopants into the semiconductor substrate, the removing forming exposed portions of the semiconductor substrate; forming a second dielectric layer of silicon dioxide having a third thickness on the exposed portions of the semiconductor substrate after removing the first dielectric layer, wherein the second thickness of the oxide region is greater than the second thickness of the second dielectric layer; and forming a gate electrode over the oxide region and the second dielectric layer.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 91.0
- Lexical Diversity: 2.7069
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15788216', '15345782', '11121465', '12912558', '15222624']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.868251813622288
- 35 USC 102 Novelty (BERT): 0.5087891834392514
- Combined Prediction Score: 0.8323055506039843
- Mean Citation Score: 264.73326800000007
- Max Citation Score: 299.63974
- Similarity Product: 237.52065125448232

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test