PATENT CLAIM ANALYSIS

Application Number: 15866587
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-05
Patent Classification: ["386", "263000"]

Abstract:
A signal processing apparatus includes an oscillation circuit, an interpolation circuit, a matching filter, a high-pass filter and a timing recovery circuit. The oscillation circuit generates a clock signal. The interpolation circuit performs interpolation on an input signal according to the clock signal to generate an interpolation sample result. The matching filter demodulates the interpolation sample result to generate an output signal. The high-pass filter performs high-pass filtering on the interpolation sample result to generate a filtered result. The timing recovery circuit receives the filtered result, and performs timing recovery according to the filtered result.

Claim (Index 2):
The signal receiving apparatus according to  claim 1 , wherein the timing recovery circuit comprises:\n a timing error detection circuit, performing timing error detection on the filtered signal to generate a set of timing errors; and a loop filter, generating an error average of the set of timing errors for the oscillation circuit to correct the clock signal.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 86.0
- Lexical Diversity: 3.0
- Patent Class: 386.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14257849', '14737330', '10325202', '14033128', '11936245']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5754905369886086
- 35 USC 102 Novelty (BERT): 0.4653119711867253
- Combined Prediction Score: 0.5644726804084204
- Mean Citation Score: 178.52363799999995
- Max Citation Score: 188.83900000000003
- Similarity Product: 163.5156638247371

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test