PATENT CLAIM ANALYSIS

Application Number: 16045039
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["438", "401000"]

Abstract:
The present disclosure provides a method for forming a semiconductor structure. In accordance with some embodiments, the method includes providing a substrate and a conductive feature formed over the substrate; forming a low-k dielectric layer over the conductive feature; forming a contact trench aligned with the conductive feature; and selectively growing a sealing layer which is a monolayer formed on sidewalls of the contact trench.

Claim (Index 12):
The semiconductor device of  claim 11 , wherein the self-assembled Si containing sealing layer has a composition of Si in a range from about 10% to about 20%, O in a range from about 20% to about 40%, and C in a range from about 40% to about 70%.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 95.0
- Lexical Diversity: 1.69048
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14261367', '15463988', '14222295', '15601305', '14106460']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8367900714986409
- 35 USC 102 Novelty (BERT): 0.4923359821660621
- Combined Prediction Score: 0.8023446625653831
- Mean Citation Score: 167.91953600000005
- Max Citation Score: 192.02026
- Similarity Product: 138.89484274145127

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test