PATENT CLAIM ANALYSIS

Application Number: 16078249
Application Type: Utility
Filing Date: 2018-08
Publication Date: 2019-03
Patent Classification: ["257", "072000"]

Abstract:
A method of producing a semiconductor device according to an embodiment of the present invention includes: step (C) of forming an oxide semiconductor layer of a plurality of thin film transistors on a gate dielectric layer; step (F) of forming an aperture in an interlevel dielectric layer, the aperture being located between an active region and a plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming an upper conductive portion on the interlevel dielectric layer. In step (C), a protection layer made of the same oxide semiconductor film as the oxide semiconductor layer is formed above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions. In step (F), the aperture is formed so as to overlap the protection layer.

Claim (Index 31):
The semiconductor device of  claim 23 , wherein each of the plurality of first thin film transistors has a channel-etch structure.

Metadata:
- Claim Count in Document: 24.0
- Percentile: 96.0
- Lexical Diversity: 2.5873
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16072910', '14358778', '14370996', '15423759', '15124385']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9315048213703
- 35 USC 102 Novelty (BERT): 0.517091391981047
- Combined Prediction Score: 0.8900634784313748
- Mean Citation Score: 276.186028
- Max Citation Score: 302.52667
- Similarity Product: 208.3103992899788

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test