PATENT CLAIM ANALYSIS

Application Number: 16271947
Application Type: Utility
Filing Date: 2019-02
Publication Date: 2019-06
Patent Classification: ["365", "072000"]

Abstract:
A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM circuit of the system LSI controls a substrate bias to reduce leakage current.

Claim (Index 28):
A semiconductor device according to  claim 19 , further comprising:\n a second P channel MOS transistor having a gate coupled to receive a second control signal different from the first control signal and having a source-drain path, and wherein each second word driver has a third voltage supply point which is coupled to the first line via the source-drain path of the second P channel MOS transistor.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 99.0
- Lexical Diversity: 1.45714
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15876132', '15478237', '12325783', '11500339', '10671513']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.821580491547951
- 35 USC 102 Novelty (BERT): 0.5595198256827493
- Combined Prediction Score: 0.7953744249614308
- Mean Citation Score: 410.144228
- Max Citation Score: 447.12027
- Similarity Product: 382.7447612553568

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test