PATENT CLAIM ANALYSIS

Application Number: 15889182
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["257", "296000"]

Abstract:
A semiconductor structure with a capacitor landing pad includes a substrate. A capacitor contact plug is disposed on the substrate. A capacitor landing pad contacts and electrically connects the capacitor contact plug. A bit line is disposed on the substrate. A dielectric layer surrounds the capacitor landing pad. The dielectric layer includes a bottom surface lower than a top surface of the bit line.

Claim (Index 10):
The fabricating method of a capacitor landing pad of  claim 6 , wherein the first pattern process further comprises:\n forming a first photoresist on the first hard mask before forming the second hard masks; patterning the first photoresist to make the first photoresist comprise a plurality of first rectangular patterns; and transferring the first rectangular patterns to the first hard mask before forming the second hard masks.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 88.0
- Lexical Diversity: 2.12121
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11486343', '11624220', '11418720', '11424518', '12244747']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.923018585959018
- 35 USC 102 Novelty (BERT): 0.4955973685501395
- Combined Prediction Score: 0.88027646421813
- Mean Citation Score: 205.219014
- Max Citation Score: 210.86041
- Similarity Product: 142.5542806283021

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test