PATENT CLAIM ANALYSIS

Application Number: 16150224
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["708", "620000"]

Abstract:
A processor and method for performing outer product and outer product accumulation operations on vector operands requiring large numbers of multiplies and accumulations is disclosed.

Claim (Index 3):
A system as in  claim 2  wherein:\n the array of circuit tiles has a same number n of rows and columns; \n the processor includes a register file having a bit width of r bits; and \n each one of a plurality of multiplier operands and each one of the plurality of multiplicand operands has a bit width of b bits, and an aggregate width of r bits where r=n*b.

Metadata:
- Claim Count in Document: 45.0
- Percentile: 97.0
- Lexical Diversity: 1.18182
- Patent Class: 708.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15224176', '11497496', '09854853', '14748956', '10996103']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4912395067586456
- 35 USC 102 Novelty (BERT): 0.5909914257704889
- Combined Prediction Score: 0.5012146986598299
- Mean Citation Score: 314.47214
- Max Citation Score: 499.39554
- Similarity Product: 426.7298255326938

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test