PATENT CLAIM ANALYSIS

Application Number: 15873006
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-11
Patent Classification: ["257", "401000"]

Abstract:
Disclosed is a semiconductor structure, including at least one fin-type field effect transistor and at least one single-diffusion break (SDB) type isolation region, and a method of forming the semiconductor structure. In the method, an isolation bump is formed above an isolation region within a semiconductor fin and sidewall spacers are formed on the bump. During an etch process to reduce the height of the bump and to remove isolation material from the sidewalls of the fin, the sidewall spacers prevent lateral etching of the bump. During an etch process to form source/drain recesses in the fin, the sidewalls spacers protect the semiconductor material adjacent to the isolation region. Consequently, the sides and bottom of each recess include semiconductor surfaces and the angle of the top surfaces of the epitaxial source/drain regions formed therein is minimized, thereby minimizing the risk of unlanded source/drain contacts.

Claim (Index 15):
The semiconductor structure of  claim 10 , wherein the isolation regions comprise silicon dioxide and the isolation bumps comprise silicon oxycarbide.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 86.0
- Lexical Diversity: 2.07895
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15589292', '15487636', '15387933', '15862064', '15658835']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.937907069393028
- 35 USC 102 Novelty (BERT): 0.5652951969604548
- Combined Prediction Score: 0.9006458821497706
- Mean Citation Score: 360.567114
- Max Citation Score: 473.23163
- Similarity Product: 353.8235443478846

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test