PATENT CLAIM ANALYSIS

Application Number: 15919889
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["438", "597000"]

Abstract:
A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

Claim (Index 15):
A method of etching one or more through-features into a silicon wafer comprising a top surface and a bottom surface and coated in a mask layer, wherein the one or more through-features comprise one or more nozzle through-holes, an outlet plenum, and a cooling fluid outlet, the method comprising:\n forming a mask pattern in a mask layer top surface and a mask layer bottom surface of the mask layer; etching a bottom portion of the one or more nozzle through-holes from the bottom surface to a nozzle target depth through the mask layer bottom surface; etching the cooling fluid outlet from the bottom surface to a plenum target depth through the mask layer top surface; coating the bottom surface and the bottom portion of the one or more nozzle through-holes and the cooling fluid outlet with a metallic coating; etching a top portion of the one or more nozzle through-holes from the top surface to the nozzle target depth; and etching the outlet plenum from the top surface to the plenum target depth, wherein: the first of the one or more through-features to etch through the silicon wafer is completed at an initial through-etch time, and the last of the one or more through-features to etch through the silicon wafer is completed at an etch completion time.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 90.0
- Lexical Diversity: 3.43478
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15879183', '15881443', '11508725', '11102735', '13339301']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8356131892472624
- 35 USC 102 Novelty (BERT): 0.5084910126806963
- Combined Prediction Score: 0.8029009715906058
- Mean Citation Score: 218.629766
- Max Citation Score: 254.74638
- Similarity Product: 180.1094454976809

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test