PATENT CLAIM ANALYSIS

Application Number: 15861128
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-11
Patent Classification: ["257", "183000"]

Abstract:
An integrated circuit includes a first and second set of gate structures. A center of each of the first set of gate structures is separated from a center of an adjacent gate of the first set of gate structures in a first direction by a first pitch. A center of each of the second set of gate structures is separated from a center of an adjacent gate of the second set of gate structures in the first direction by the first pitch. The first and second set of gate structures extend in a second direction. A gate of the first set of gate structures is aligned in the second direction with a corresponding gate of the second set of gate structures. The gate of the first set of gate structures is separated from the corresponding gate of second set of gate structures in the second direction by a first distance.

Claim (Index 1):
A method of forming an integrated circuit, the method comprising:\n generating, by a processor, a layout design of the integrated circuit, wherein generating the layout design comprises:\n generating a set of gate layout patterns corresponding to fabricating a set of gate structures of the integrated circuit, each of the layout patterns of the set of gate layout patterns being separated from an adjacent layout pattern of the set of gate layout patterns in a first direction by a first pitch, the set of gate layout patterns extending in a second direction different from the first direction and overlapping a set of gridlines, the set of gridlines extending in the second direction, and each gridline of the set of gridlines being separated from an adjacent gridline of the set of gridlines by the first pitch; and \n generating a cut feature layout pattern extending in the first direction and overlapping the set of gate layout patterns; \n manufacturing the integrated circuit based on the layout design, the integrated circuit having at least a gate structure of the set of gate structures; and removing a first portion of the gate structure of the set of gate structures to form a first gate structure and a second gate structure, and the cut feature layout pattern identifying a location of the first portion of the gate structure of the set of gate structures.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 86.0
- Lexical Diversity: 4.875
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15682885', '14484588', '15465167', '15258932', '14554958']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.908790306122384
- 35 USC 102 Novelty (BERT): 0.4722850222011969
- Combined Prediction Score: 0.8651397777302652
- Mean Citation Score: 174.56595199999995
- Max Citation Score: 199.45
- Similarity Product: 162.91306595802303

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test