PATENT CLAIM ANALYSIS

Application Number: 15990747
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2019-09
Patent Classification: ["257", "668000"]

Abstract:
A semiconductor package includes a chip and a circuit substrate having leads. Each of the leads has an upper wide portion and a lower wide portion in a bonding area so as there are an upper notch and a lower notch in the bonding area. The upper and lower notches face toward the upper and lower wide portions of the adjacent lead, respectively. The upper and lower wide portions are designed to prevent defective bonding caused by shifting between the leads and the chip humps. Additionally, there are adequate etching spaces between the leads because the wide portions and the notches are staggered with each other such that incomplete etching between the leads is preventable during etching process.

Claim (Index 16):
The semiconductor package in accordance with  claim 9 , wherein the first narrow portion has a width and a thickness, and the width is less than the thickness.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 93.0
- Lexical Diversity: 1.98413
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11014165', '13426804', '10521301', '10621581', '13320238']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9159392873933688
- 35 USC 102 Novelty (BERT): 0.4861730583189272
- Combined Prediction Score: 0.8729626644859247
- Mean Citation Score: 156.35427
- Max Citation Score: 167.13243
- Similarity Product: 112.05098432605504

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test