PATENT CLAIM ANALYSIS

Application Number: 16219803
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["710", "110000"]

Abstract:
A system includes a multi-conductor bus, a master device coupled to the multi-conductor bus, and at least one slave device coupled to the multi-conductor bus. The multi-conductor bus has a clock line and a data line. The master device is arranged to transmit an address configuration sequence, and the at least one slave device is arranged to configurably determine its own address based on at least one portion of the address configuration sequence. The at least one slave device has a physical address configuration input coupled to either a fixed voltage potential or a changing voltage potential. The at least one slave device is arranged with a first address during a pre-initialization state and arranged with a second address during a post-initialization state. During the post-initialization state, the first address and the second address are a same address when the address configuration sequence represents the first address and the first address and the second address are different addresses when the address configuration sequence does not represent the first address.

Claim (Index 9):
An address configuration method, comprising:\n receiving, during an initialization stage from a multi-conductor bus, an address configuration sequence at a first device that has a clock line input, a data line input, and a physical address configuration input; capturing data on the physical address configuration input; determining from the captured data and the address configuration sequence whether the physical address configuration input is coupled to a fixed voltage potential, the clock line input, or the data line input; setting a post-initialization address of the first device based on the determining of whether the physical address configuration input is coupled to a fixed voltage potential, the clock line input, or the data line input; and after the initialization stage, responding with the first device to commands passed on the multi-conductor bus that include the post-initialization address.

Metadata:
- Claim Count in Document: 6.0
- Percentile: 98.0
- Lexical Diversity: 2.84127
- Patent Class: 710.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15363932', '13550715', '14616572', '13828511', '11913065']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.704876585164411
- 35 USC 102 Novelty (BERT): 0.538051539406788
- Combined Prediction Score: 0.6881940805886486
- Mean Citation Score: 275.036488
- Max Citation Score: 394.6473
- Similarity Product: 305.3866020951032

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test