PATENT CLAIM ANALYSIS

Application Number: 15944345
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "194000"]

Abstract:
A semiconductor structure includes a semiconductive substrate having a top surface, a III-V compound layer covering the top surface, and a passivation layer having a lower portion and an upper portion, both comprising at least one of oxide and nitride over the III-V compound layer. The semiconductor structure also includes an etch stop layer between the lower portion and the upper portion of the passivation layer, and a gate stack penetrating through the etch stop layer and landing on the lower portion of the passivation layer. The gate stack is surrounded by the etch stop layer.

Claim (Index 18):
A method of manufacturing a semiconductor structure, comprising:\n providing a semiconductive substrate; forming a III-V compound layer over the semiconductive substrate; depositing a first passivation layer comprising at least one of nitride and oxide over the III-V compound layer; depositing an etch stop layer over the first passivation layer; forming a recess to expose the first passivation layer; and forming a gate stack in the recess.

Metadata:
- Claim Count in Document: 83.0
- Percentile: 91.0
- Lexical Diversity: 2.23913
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15072992', '13603801', '15234590', '14879908', '14463953']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8921432547263812
- 35 USC 102 Novelty (BERT): 0.4782319302945335
- Combined Prediction Score: 0.8507521222831965
- Mean Citation Score: 176.55205800000005
- Max Citation Score: 219.54826
- Similarity Product: 194.75659869200703

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test