PATENT CLAIM ANALYSIS

Application Number: 16227406
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-04
Patent Classification: ["257", "773000"]

Abstract:
A method including forming a plurality of first interconnects and a plurality of second interconnects on opposite sides of an integrated circuit device layer including a plurality of circuit devices, wherein the plurality of second interconnects include interconnects of different dimensions; and forming contact points to the second plurality of interconnects, the contact points operable for connection to an external source. An apparatus including a substrate including a plurality of first interconnects and a plurality of second interconnects on opposite sides of an integrated circuit device layer including a plurality of circuit devices, wherein the plurality of second interconnects include interconnects of different dimensions; and contact points coupled to the second plurality of interconnects, the contact points operable for connection to an external source.

Claim (Index 11):
The apparatus of  claim 2 , wherein the plurality of circuit devices of the integrated circuit device layer comprises FinFETs.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 98.0
- Lexical Diversity: 3.3
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15122913', '15122630', '15122382', '11514568', '14931659']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.933164442179867
- 35 USC 102 Novelty (BERT): 0.4825282085449344
- Combined Prediction Score: 0.8881008188163738
- Mean Citation Score: 138.803401
- Max Citation Score: 171.09923
- Similarity Product: 116.47508906213044

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test