PATENT CLAIM ANALYSIS

Application Number: 16430258
Application Type: Utility
Filing Date: 2019-06
Publication Date: 2019-09
Patent Classification: ["326", "052000"]

Abstract:
Apparatuses for performing combination logic operations with a combination logic circuit are disclosed. According to one embodiment, the apparatus comprises a first-in-first-out stage comprising an combination logic circuit, a input ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a push signal to the first-in-first-out stage, and a output ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a pop signal to the first-in-first-out stage, wherein the first-in-first-out stage is configured to perform calculations on input data with the combination logic circuit to generate output data responsive to receiving the push signal and to provide the output data based on the calculations responsive to receiving the pop signal.

Claim (Index 14):
A memory device comprising:\n a memory array; and a command decoder communicatively coupled to the memory array, wherein the command decoder is configured to receive memory commands and generate corresponding control signals to perform operations on the memory array, wherein the command decoder comprises: a data input line to receive data input, a flip flop having a data input terminal coupled to the data input line to receive the data input, the flip flop configured to provide the data input to a combination logic circuit to perform a parity error calculation on the data input responsive to a latch and inverted latch signals, and an output circuit coupled to the flip flop and configured to receive a result of the parity error calculation, the output circuit is maintained at a high impedance state for a defined time corresponding to a parity latency for a parity error.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 100.0
- Lexical Diversity: 2.65217
- Patent Class: 326.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['16105836', '15684734', '15184077', '12820364', '13478805']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6521032490088334
- 35 USC 102 Novelty (BERT): 0.512817292188287
- Combined Prediction Score: 0.6381746533267788
- Mean Citation Score: 271.012018
- Max Citation Score: 323.04706
- Similarity Product: 237.6440636839497

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test