PATENT CLAIM ANALYSIS

Application Number: 16179291
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-03
Patent Classification: ["257", "077000"]

Abstract:
An ESD protection device includes a substrate structure having a substrate, first and second fins, and first and second doped regions having different conductivity types. The first doped region includes a first portion of the substrate and a first region of the first fin, the second doped region includes a second portion of the substrate, a second region of the first fin adjacent to the first region and the second fin. The ESD device also includes a first gate structure on a surface portion of the first region and on an entire surface of the second region of the first fin and including, from bottom to top, an interface layer on the surface portion of the first region and the surface portion of the second region of the first fin, a spacer, a high-k dielectric layer, a first work-function adjusting layer, a second work-function adjusting layer, and a gate.

Claim (Index 1):
An electrostatic discharge (ESD) protection device, comprising:\n a substrate structure comprising: a semiconductor substrate; a first fin and a second fin on the semiconductor substrate; a first doped region and a second doped region having different conductivity types, the first doped region comprising a first portion of the semiconductor substrate and a first region of the first fin, the second doped region comprising a second portion of the semiconductor substrate, a second region of the first fin adjacent to the first region of the first fin, and the second fin; and a first gate structure on a surface portion of the first region of the first fin and on an entire top surface of the second region of the first fin, the first gate structure comprising:\n an interface layer on the surface portion of the first region of the first fin and the surface portion of the second region of the first fin; \n a spacer on the first fin and adjacent the interface layer; \n a high-k dielectric layer on the interface layer and on opposite inner sidewalls of the spacer; \n a first work-function adjusting layer only on a first portion of the high-k dielectric layer that is on the surface portion of the first region of the first fin; \n a second work-function adjusting layer on the first work-function adjusting layer and on a second portion of the high-k dielectric layer that is on the surface portion of the second region of the first fin, wherein the second portion of the high-k dielectric layer does not have the first work-function adjusting layer disposed thereon; and \n a gate on the second work-function adjusting layer.

Metadata:
- Claim Count in Document: 41.0
- Percentile: 98.0
- Lexical Diversity: 3.62222
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15397376', '15334130', '15262930', '14938850', '16136671']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9229886301269814
- 35 USC 102 Novelty (BERT): 0.532776273617882
- Combined Prediction Score: 0.8839673944760715
- Mean Citation Score: 294.4419420000001
- Max Citation Score: 371.5673
- Similarity Product: 365.8406040691912

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test