PATENT CLAIM ANALYSIS

Application Number: 16141019
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-03
Patent Classification: ["438", "018000"]

Abstract:
Implementations of a method of singulating a plurality of die may include: providing a semiconductor wafer including a plurality of die located on a first side of the semiconductor wafer where the plurality of die include a desired thickness. The method may include etching a plurality of trenches into the semiconductor wafer only from the first side of the semiconductor wafer where the plurality of trenches is located adjacent to a perimeter of the plurality of die. A depth of the plurality of trenches may be greater than the desired thickness of the plurality of die. The method may also include mounting the first side of the semiconductor wafer to a backgrinding tape. The method may also include thinning a second side of the semiconductor wafer to a predetermined distance to the depth of the plurality of trenches to singulate the plurality of die.

Claim (Index 13):
The method of  claim 8 , wherein thinning the second side of the semiconductor wafer to the depth of the trenches further comprises using an edge ring grinding process.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 97.0
- Lexical Diversity: 3.19149
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15955581', '15189611', '14341454', '15883625', '14927311']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8935500871639352
- 35 USC 102 Novelty (BERT): 0.6051166687218669
- Combined Prediction Score: 0.8647067453197285
- Mean Citation Score: 397.617568
- Max Citation Score: 577.9077
- Similarity Product: 462.6621185630679

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test