PATENT CLAIM ANALYSIS

Application Number: 15895697
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-09
Patent Classification: ["365", "189011"]

Abstract:
According to one embodiment, a semiconductor storage device includes: a memory cell array including a plurality of bit lines; a sense amplifier; a first circuit including a plurality of transistors respectively connected to the plurality of bit lines and the sense amplifier; and a plurality of interconnects which are provided at a position higher than the bit lines in the first circuit and are not directly connected to the first circuit. The semiconductor storage device does not include, at a position higher than the plurality of interconnects, an interconnect which electrically connects two positions in the semiconductor storage device.

Claim (Index 15):
The semiconductor storage device of  claim 14 , wherein the plurality of interconnects are interconnects which are provided at a highest position among interconnects which electrically connect two positions in the semiconductor storage device.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 88.0
- Lexical Diversity: 2.16
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15583609', '15886464', '13035134', '14840174', '14788629']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7932909182160025
- 35 USC 102 Novelty (BERT): 0.453745112607665
- Combined Prediction Score: 0.7593363376551688
- Mean Citation Score: 133.45343400000002
- Max Citation Score: 137.08123999999998
- Similarity Product: 105.22055300119636

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test