PATENT CLAIM ANALYSIS

Application Number: 15954665
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["714", "718000"]

Abstract:
A logic BIST circuits concurrently execute a first scan test for a scan chain as a target and a second scan test for a scan chain as a target, when they are set to an LBIST mode, and execute the first scan test without executing the second scan test, when they are set to a simultaneous test mode. Memory BIST circuits execute a test for memory circuits concurrently with the first scan test, when they are set to the simultaneous test mode. Logic BIST circuits complete a test with the LBIST mode, at a stage where the second scan test has completed.

Claim (Index 12):
A test method for a semiconductor device which is configured with one semiconductor chip, the semiconductor device comprising:\n a memory circuit unit which includes a memory circuit and an interface for test for the memory circuit; a logic circuit which performs a predetermined logical operation; a memory BIST (Built In Self Test) circuit which tests the memory circuit; and a logic BIST circuit which tests the logic circuit and the memory BIST circuit, wherein at least a part of the logic circuit is incorporated in a first scan chain, wherein the memory BIST circuit is incorporated in a second scan chain, wherein the test method has\n a first step, by the logic BIST circuit, of concurrently executing a first scan test for the first scan chain as a target and a second scan test for the second scan chain as a target, and \n a second step, by the logic BIST circuit, of executing the first scan test without executing the second scan test, and, by the memory BIST circuit, of executing a test for the memory circuit concurrently with the first scan test, \n wherein a time for executing the first scan test is longer than a time for executing the second scan test, and wherein the first step is completed at a stage where the second scan test is completed.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 91.0
- Lexical Diversity: 2.75
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['11603085', '15220427', '11626574', '10086214', '14072295']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2825345932791778
- 35 USC 102 Novelty (BERT): 0.5027561164101642
- Combined Prediction Score: 0.3045567455922764
- Mean Citation Score: 261.310006
- Max Citation Score: 279.22342000000003
- Similarity Product: 222.79473601078155

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test