PATENT CLAIM ANALYSIS

Application Number: 15971191
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["438", "268000"]

Abstract:
A method is presented for forming a semiconductor structure. The method includes forming a fin structure over a substrate, forming a dummy gate over the fin structure, and etching the dummy gate by a first amount to expose a top portion of the fin structure. The method further includes forming a first dielectric layer adjacent the exposed top portion of the fin structure, forming a spacer adjacent the first dielectric layer contacting the fin structure, and etching the dummy gate by a second amount. The method further includes depositing a second dielectric layer to encapsulate the remaining dummy gate, depositing an inter-level dielectric (ILD) over the second dielectric layer, depositing at least one hard mask to access the dummy gate, stripping the dummy gate to form at least one recess, and filling the at least one recess with a high-k metal gate (HKMG).

Claim (Index 19):
The method of  claim 18 , further comprising forming an epitaxial growth layer directly over the top portion of the fin structure.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 93.0
- Lexical Diversity: 2.69492
- Patent Class: 438.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15804535', '15424937', '15413558', '13877763', '15282836']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8695689256274256
- 35 USC 102 Novelty (BERT): 0.5808880910823844
- Combined Prediction Score: 0.8407008421729215
- Mean Citation Score: 398.558046
- Max Citation Score: 497.83203
- Similarity Product: 391.8247272189456

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test