PATENT CLAIM ANALYSIS

Application Number: 15906322
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-09
Patent Classification: ["257", "043000"]

Abstract:
A monolithically integrated circuit comprising a semiconducting wafer, a metal oxide thin film semiconductor device disposed adjacent a first region of the semiconducting wafer, and a dissimilar semiconductor device disposed adjacent a second region of the semiconducting wafer and fabrication methods thereof.

Claim (Index 15):
The method of  claim 14  further comprising depositing one or more insulating layers adjacent the dissimilar semiconductor device gate for passivation of the dissimilar semiconductor device prior to forming at least some layers of the metal oxide thin film semiconductor device.

Metadata:
- Claim Count in Document: 23.0
- Percentile: 88.0
- Lexical Diversity: 1.60714
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10133336', '13288922', '13149797', '14148573', '13750959']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8999559258975215
- 35 USC 102 Novelty (BERT): 0.4935320002739843
- Combined Prediction Score: 0.8593135333351678
- Mean Citation Score: 205.003626
- Max Citation Score: 220.81659
- Similarity Product: 166.27150118575932

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test