PATENT CLAIM ANALYSIS

Application Number: 15925762
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["365", "189050"]

Abstract:
Data hold time is controlled without excessively increasing a circuit area. A semiconductor device includes a data buffer and a flip-flop formed of fin. As a delay line, gate wirings being in the same layer as gate electrodes of the fin are provided in a data signal path from a data output node of the data buffer to a data input node of the flip-flop.

Claim (Index 19):
The semiconductor device according to  claim 13 , further comprising:\n a second data buffer including a second data input node coupled to the first data output node of the first data buffer and a second data output node coupled to the first data input node of the logic circuit such that the plurality of wirings are arranged between the second data input node of the second data buffer and the first data output node of the first data buffer, wherein the second data buffer includes a third transistor comprised of a fin type field-effect transistor, wherein the third transistor has a gate electrode comprised of a second gate wiring for the second data input node and a drain electrode comprised of a second local wiring for the second data output node, wherein the second gate wiring and the second local wiring are formed on a third projection semiconductor layer, and wherein the second gate wiring and the second local wiring extend along the second direction.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 90.0
- Lexical Diversity: 1.53333
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15211298', '15607599', '15841950', '14944262', '11320751']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7832583827805965
- 35 USC 102 Novelty (BERT): 0.5000972236745193
- Combined Prediction Score: 0.7549422668699888
- Mean Citation Score: 213.51475
- Max Citation Score: 289.29242
- Similarity Product: 220.49123286676644

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test