PATENT CLAIM ANALYSIS

Application Number: 15909942
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["712", "022000"]

Abstract:
Disclosed are methods and apparatus for bit packing data having various bit widths in a computer system. The methods and apparatus utilize a fixed bit packing or unpacking network that is configured to pack or unpack data bits of a number of different bit widths from a first number of bit locations to a second number of bit locations in the computer system. The network is specifically configured to pack bits stored in a same bit slot position in respective bit locations of the first number of bit locations by routing the bits into bit slots of a same bit location in the second number of bit locations to form bit bundles in respective ones of the second number of bit locations. Use of a fixed packing network affords optimal matching of bit width to an application that minimizes cost, area, and power, as well as decreasing or minimizing latency.

Claim (Index 11):
The method of  claim 10 , further comprising:\n storing the bit bundles in a memory device, wherein the second plurality of bit locations are contained within a memory device, and wherein the memory device is further configured to store the bit bundles.

Metadata:
- Claim Count in Document: 95.0
- Percentile: 90.0
- Lexical Diversity: 2.27536
- Patent Class: 712.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['12875400', '13747342', '10403152', '13747352', '13731616']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5053810671291912
- 35 USC 102 Novelty (BERT): 0.4772235244032025
- Combined Prediction Score: 0.5025653128565923
- Mean Citation Score: 156.53145
- Max Citation Score: 172.16308999999995
- Similarity Product: 127.67055094977734

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test