PATENT CLAIM ANALYSIS

Application Number: 15899102
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-08
Patent Classification: ["257", "162000"]

Abstract:
SCRs are a must for ESD protection in low voltage—high speed I/O as well as ESD protection of RF pads due to least parasitic loading and smallest foot print offered by SCRs. However, conventionally designed SCRs in FinFET and Nanowire technology suffer from very high turn-on and holding voltage. This issue becomes more severe in sub-14 nm non-planar technologies and cannot be handled by conventional approaches like diode- or transient-turn-on techniques. Proposed invention discloses SCR concept for FinFET and Nanowire technology with diffused junction profiles with sub-3V trigger and holding voltage for efficient and robust ESD protection. Besides low trigger and holding voltage, the proposed device offers a 3 times better ESD robustness per unit area.

Claim (Index 6):
The SCR of  claim 1 , wherein the SCR comprises a P-well and a N-well that are configured on a substrate,\n wherein the cathode region and P-tap region are disposed inside the P-Well and wherein the anode region and N-tap region are disposed inside the N-Well.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 88.0
- Lexical Diversity: 1.40909
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15883306', '15883749', '15883591', '10825780', '12345086']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.934131363483602
- 35 USC 102 Novelty (BERT): 0.5299840126358895
- Combined Prediction Score: 0.8937166283988307
- Mean Citation Score: 299.372408
- Max Citation Score: 351.45636
- Similarity Product: 232.5403262059021

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test