PATENT CLAIM ANALYSIS

Application Number: 15776996
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["257", "192000"]

Abstract:
Embodiments of the present disclosure describe a semiconductor multi-gate transistor having a semi-conductor fin extending from a substrate and including a sub-fin region and an active region. The subfin region may include a dielectric material region under the gate to provide improved isolation. The dielectric material region may be formed during a replacement gate process by replacing a portion of a sub-fin region under the gate with the dielectric material region, followed by fabrication of a replacement gate structure. The sub-fin region may be comprised of group III-V semiconductor materials in various combinations and concentrations. The active region may be comprised of a different group III-V semiconductor material. The dielectric material region may be comprised of amorphous silicon. Other embodiments may be described and/or claimed.

Claim (Index 9):
The semiconductor device of  claim 8 , wherein the high kappa dielectric layer and the gate electrode are a replacement structure formed in a replacement gate process.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 93.0
- Lexical Diversity: 2.07812
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15575111', '12640658', '15700468', '14854772', '14464315']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.918861372683866
- 35 USC 102 Novelty (BERT): 0.48780029180049
- Combined Prediction Score: 0.8757552645955284
- Mean Citation Score: 177.511506
- Max Citation Score: 186.48567
- Similarity Product: 128.7927573772198

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test