PATENT CLAIM ANALYSIS

Application Number: 16190931
Application Type: Utility
Filing Date: 2018-11
Publication Date: 2019-04
Patent Classification: ["710", "052000"]

Abstract:
At the inputs and/or outputs, memories are assigned to a reconfigurable module to achieve decoupling of internal data and in particular decoupling of the reconfiguration cycles from the external data streams (to/from peripherals, memories, etc.)

Claim (Index 17):
The system of  claim 16 , wherein the interconnect system comprises an arbiter, the arbiter controlling processor access to the interconnect system.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 98.0
- Lexical Diversity: 1.28125
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14318211', '14500618', '15225638', '12944068', '14231358']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6688298116320551
- 35 USC 102 Novelty (BERT): 0.5365197020811951
- Combined Prediction Score: 0.6555988006769692
- Mean Citation Score: 360.692094
- Max Citation Score: 374.57068
- Similarity Product: 193.71864311850783

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test