PATENT CLAIM ANALYSIS

Application Number: 15897974
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2018-10
Patent Classification: ["712", "220000"]

Abstract:
A system includes a processor configured to: initiate atomic execution of a plurality of instruction units in a thread, starting with a beginning instruction unit in the plurality of instruction units, wherein the plurality of instruction units in the thread are not programmatically specified to be executed atomically, and wherein the plurality of instruction units includes one or more memory modification instructions; in response to executing an instruction to commit inserted into the plurality of instructions units, incrementally commit a portion of the one or more memory modification instructions that have been atomically executed so far; and subsequent to incrementally committing the portion of the memory modification instructions that have been atomically executed so far, continue atomic execution of the plurality of instruction units. The system further includes a memory coupled to the processor, configured to provide the processor with the plurality of instruction units.

Claim (Index 15):
The method of  claim 10  wherein an additional instruction to commit is inserted into the plurality of instruction units.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 88.0
- Lexical Diversity: 2.6
- Patent Class: 712.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12387477', '12387478', '12633906', '11227422', '11389334']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6369591558038876
- 35 USC 102 Novelty (BERT): 0.5368300207112555
- Combined Prediction Score: 0.6269462422946244
- Mean Citation Score: 263.516742
- Max Citation Score: 388.22925
- Similarity Product: 290.1575607760548

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test