PATENT CLAIM ANALYSIS

Application Number: 16013882
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-11
Patent Classification: ["725", "110000"]

Abstract:
A video display system generally includes a computerized media processing unit configured to receive a plurality of content from a plurality of content sources and configured to combine the plurality of content from the plurality of content sources to generate and output a video signal receivable by at least one display device. The video signal includes an interactive multilayer stream, with a plurality of video layers all displayable on the at least one display device simultaneously with independently variable size and position under the control of a user. The computerized media processing unit may include an FPGA that is programmable while processing.

Claim (Index 8):
A video display apparatus comprising:\n a computerized media processing circuit structured to receive content from a plurality of content sources and structured to combine the content from the plurality of content sources to generate and output a video signal containing an interactive multilayer stream receivable by at least one display device, wherein the interactive multilayer stream includes a plurality of video layers all displayable on the at least one display device simultaneously with independently variable size and position under the control of a user, and wherein the plurality of video layers comprise a first video layer configured to display a portion of content from a first content source and a second video layer configured to display a portion of content from a second content source, wherein each content source comprises one of a video source, a video game platform source, an internet source, a remote control application or a device source, wherein the computerized media processing circuit comprises at least one FPGA, and wherein the at least one FPGA is configured to be programmable while processing the content from the plurality of content sources, and wherein programming of the at least one FPGA includes enabling at least one of selection, blending and overlay logic for a video layer.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 94.0
- Lexical Diversity: 1.82759
- Patent Class: 725.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15056086', '15383948', '14871535', '13454610', '12977643']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4374605468353869
- 35 USC 102 Novelty (BERT): 0.4831129845484446
- Combined Prediction Score: 0.4420257906066926
- Mean Citation Score: 193.963504
- Max Citation Score: 248.60089
- Similarity Product: 218.82372629735588

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test