PATENT CLAIM ANALYSIS

Application Number: 15937656
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-10
Patent Classification: ["710", "119000"]

Abstract:
In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.

Claim (Index 21):
The memory device of  claim 20 , wherein the second storage component is a first distance away from the first storage component along a digit line of the first storage component and the second storage component is a second distance away from the first storage component along an access line of the first storage component, wherein the second distance is based at least in part on the first distance and the slope of the line.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 90.0
- Lexical Diversity: 2.07273
- Patent Class: 710.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15463504', '13919758', '15194154', '12687895', '14132390']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6448808879369923
- 35 USC 102 Novelty (BERT): 0.5114043896204686
- Combined Prediction Score: 0.63153323810534
- Mean Citation Score: 196.555188
- Max Citation Score: 264.209
- Similarity Product: 180.2656042010784

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test