PATENT CLAIM ANALYSIS

Application Number: 15997453
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2018-09
Patent Classification: ["375", "350000"]

Abstract:
A communication system includes a first amplifier configured to output an amplified modulated signal, and a demodulator coupled to the first amplifier. The demodulator is configured to demodulate the amplified modulated signal responsive to a first carrier signal. The demodulator includes a filter and a bandwidth adjusting circuit. The filter is configured to generate a filtered first signal based on a first signal and a set of control signals. The filter has a bandwidth adjusted based on the set of control signals. The bandwidth adjusting circuit is coupled to the filter, and is configured to generate the set of control signals based on a frequency of the filtered first signal and a frequency of the first signal. The bandwidth adjusting circuit includes a frequency detector configured to generate a second signal based on the frequency of the filtered first signal and the frequency of the first signal.

Claim (Index 4):
The communication system of  claim 1 , wherein the frequency detector comprises:\n a first counter having a first terminal, a second terminal, and a third terminal, the first terminal of the first counter being coupled to the filter and configured to receive the filtered first signal, the second terminal of the first counter being configured to receive a clock signal, and the third terminal of the first counter being configured to output the frequency of the filtered first signal; a second counter having a first terminal, a second terminal, and a third terminal, the first terminal of the second counter being configured to receive the first signal, the second terminal of the second counter being configured to receive the clock signal, and the third terminal of the second counter being configured to output the frequency of the first signal; a comparison logic circuit having a first input terminal, a second input terminal, and a first output terminal, the first input terminal of the comparison logic circuit being coupled to the third terminal of the first counter and configured to receive the frequency of the filtered first signal, the second input terminal of the comparison logic circuit being coupled to the third terminal of the second counter and configured to receive the frequency of the first signal, and the first output terminal of the comparison logic circuit being configured to output a third signal; and an output buffer coupled to the first output terminal of the comparison logic circuit, and configured to output the second signal based on the third signal.

Metadata:
- Claim Count in Document: 27.0
- Percentile: 94.0
- Lexical Diversity: 3.71429
- Patent Class: 375.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15417457', '14927783', '14969309', '15704140', '15133447']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4991422499266811
- 35 USC 102 Novelty (BERT): 0.5068748135753148
- Combined Prediction Score: 0.4999155062915445
- Mean Citation Score: 215.811056
- Max Citation Score: 281.5781
- Similarity Product: 227.09002371312977

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test