PATENT CLAIM ANALYSIS

Application Number: 15943423
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-10
Patent Classification: ["716", "106000"]

Abstract:
A verification system comprises: a reconfigurable hardware modeling device programmed to implement a hardware model of a circuit design; a first computing unit configured to execute a first software program; and a second computing unit configured to execute a testbench model of a second software program. The execution of the first software program and the testbench model of the second software program generates first stimuli and second stimuli for an operation of the hardware model of the circuit design, respectively. The first stimuli and the second stimuli are transmitted to the hardware model of the circuit design through a communication interface.

Claim (Index 12):
The system recited in  claim 11 , wherein the second computing unit comprises:\n a virtual machine interface program communicating with the virtual machine, the communicating comprising sending the second stimuli; and a stimuli generation program configured to generate the second stimuli.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 91.0
- Lexical Diversity: 2.45455
- Patent Class: 716.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15792078', '15792139', '15792101', '15873879', '15792124']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.386476417548344
- 35 USC 102 Novelty (BERT): 0.5036567592153194
- Combined Prediction Score: 0.3981944517150416
- Mean Citation Score: 308.905534
- Max Citation Score: 330.77704
- Similarity Product: 225.5856765054941

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test