PATENT CLAIM ANALYSIS

Application Number: 15881631
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-08
Patent Classification: ["257", "664000"]

Abstract:
Systems and methods that facilitate resistance and capacitance balancing are presented. In one embodiment, a system comprises: a plurality of ground lines configured to ground components; and a plurality of signal bus lines interleaved with the plurality of ground lines, wherein the interleaving is configured so that plurality of signal bus lines and plurality of ground lines are substantially evenly spaced and the plurality of signal bus lines convey a respective plurality of signals have similar resistance and capacitance constants that are balanced. The plurality of signals can see a substantially equal amount ground surface and have similar amounts of capacitance. The plurality of signal bus lines can have similar cross sections and lengths with similar resistances. The plurality of signal bus lines interleaved with the plurality of ground lines can be included in a two copper layer interposer design with one redistribution layer (RDL).

Claim (Index 12):
The method of  claim 10 , wherein at least two of the plurality of signal bus lines are configured with a same number of adjacent ground lines.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 86.0
- Lexical Diversity: 2.26087
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15881622', '10270109', '12883163', '15604924', '13281458']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8979649454669841
- 35 USC 102 Novelty (BERT): 0.4944155295070253
- Combined Prediction Score: 0.8576100038709883
- Mean Citation Score: 146.003452
- Max Citation Score: 160.8166
- Similarity Product: 105.29127392559052

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test