PATENT CLAIM ANALYSIS

Application Number: 15946401
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-12
Patent Classification: ["713", "190000"]

Abstract:
A processor implementing techniques for supporting configurable security levels for memory address ranges is disclosed. In one embodiment, the processor includes a processing core a memory controller, operatively coupled to the processing core, to access data in an off-chip memory and a memory encryption engine (MEE) operatively coupled to the memory controller. The MEE is to responsive to detecting a memory access operation with respect to a memory location identified by a memory address within a memory address range associated with the off-chip memory, identify a security level indicator associated with the memory location based on a value stored on a security range register. The MEE is further to access at least a portion of a data item associated with the memory address range of the off-chip memory in view of the security level indicator.

Claim (Index 29):
The method of  claim 28 , wherein the security-level register comprises a memory address to indicate a range to divide a memory device into the encryption-only memory range and the full-protection memory range.

Metadata:
- Claim Count in Document: 14.0
- Percentile: 91.0
- Lexical Diversity: 2.19697
- Patent Class: 713.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14803956', '14670061', '15087144', '14703420', '15792350']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.384746856039291
- 35 USC 102 Novelty (BERT): 0.4944747372010624
- Combined Prediction Score: 0.3957196441554681
- Mean Citation Score: 164.326796
- Max Citation Score: 222.50063
- Similarity Product: 164.45578111945392

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test