PATENT CLAIM ANALYSIS

Application Number: 15875589
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-05
Patent Classification: ["714", "732000"]

Abstract:
Built-in self-test techniques for integrated circuits that address the issue of unknown states. Some implementations use a specialized scan chain selector coupled to a time compactor. The presence of the specialized scan chain selector increases the efficiency in masking X states. Also disclosed are: (1) an architecture of a selector that works with multiple scan chains and time compactors, (2) a method for determining and encoding per cycle scan chain selection masks used subsequently to suppress X states, and (3) a method to handle an over-masking phenomenon.

Claim (Index 20):
The circuit of  claim 18 , further comprising a group of circular mask registers coupled between the memory and the selector.

Metadata:
- Claim Count in Document: 17.0
- Percentile: 86.0
- Lexical Diversity: 1.5625
- Patent Class: 714.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14257918', '13453929', '15188786', '12765530', '11709071']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.2646562327081872
- 35 USC 102 Novelty (BERT): 0.4986079071427413
- Combined Prediction Score: 0.2880514001516426
- Mean Citation Score: 223.235432
- Max Citation Score: 250.22856
- Similarity Product: 184.2935196219635

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test