PATENT CLAIM ANALYSIS

Application Number: 15961569
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-02
Patent Classification: ["257", "777000"]

Abstract:
A semiconductor package includes a package substrate, a first semiconductor chip on the package substrate, an encapsulant layer covering the first semiconductor chip, bar patterns disposed within the package substrate, each bar pattern having a first end and a second end. An encapsulant layer formed to cover at least the bar patterns and the first semiconductor chip, wherein the semiconductor package having the encapsulant layer has a side surface with exposing one or more second ends of the bar patterns, wherein the bar patterns having different lengths are positioned substantially along a predetermined direction with respect to the first semiconductor chip such that the one or more second ends of the bar patterns exposed through the side surface of the semiconductor package indicate a distance between the side surface and the first semiconductor chip.

Claim (Index 3):
The semiconductor package of  claim 2 , wherein the bar patterns are spaced apart from each other in parallel.

Metadata:
- Claim Count in Document: 42.0
- Percentile: 91.0
- Lexical Diversity: 2.40678
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15945989', '13736641', '15941334', '15635600', '12100359']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9219661901521468
- 35 USC 102 Novelty (BERT): 0.4875408068602497
- Combined Prediction Score: 0.8785236518229571
- Mean Citation Score: 199.587714
- Max Citation Score: 222.51941
- Similarity Product: 171.89970114294292

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test