PATENT CLAIM ANALYSIS

Application Number: 15943721
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2019-09
Patent Classification: ["257", "288000"]

Abstract:
According to an embodiment of the present invention, a method for fabricating semiconductor device includes the steps of: forming a semiconductor layer on a substrate; removing part of the semiconductor layer and part of the substrate to form a trench; forming a liner in the trench; removing part of the liner to form a spacer adjacent to two sides of the trench; and forming a bit line structure in the trench.

Claim (Index 14):
The semiconductor device of  claim 11 , wherein the bit line structure comprises:\n a conductive layer in the substrate; a metal layer on the conductive layer; and a mask layer on the metal layer.

Metadata:
- Claim Count in Document: 5.0
- Percentile: 91.0
- Lexical Diversity: 2.05263
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['13117864', '10447065', '15866635', '12491886', '12649622']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9213763160787296
- 35 USC 102 Novelty (BERT): 0.4726978026166851
- Combined Prediction Score: 0.8765084647325251
- Mean Citation Score: 183.144556
- Max Citation Score: 187.72295
- Similarity Product: 149.73444351387326

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test