PATENT CLAIM ANALYSIS

Application Number: 15989491
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["438", "268000"]

Abstract:
Vertical field effect transistors (FETs) with minimum pitch and methods of manufacture are disclosed. The structure includes at least one vertical fin structure and gate material contacting with the at least one vertical fin structure. The structure further includes metal material in electrical contact with the ends of the at least one vertical fin.

Claim (Index 10):
The method of  claim 2 , wherein each of the plurality of vertical fin structures comprises a wide lower portion on an insulator layer and a narrow body portion on the wide lower portion.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 93.0
- Lexical Diversity: 1.68571
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15296577', '14965988', '14560672', '14965985', '15452818']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8680493064124373
- 35 USC 102 Novelty (BERT): 0.5042531046457017
- Combined Prediction Score: 0.8316696862357638
- Mean Citation Score: 253.057292
- Max Citation Score: 257.8275
- Similarity Product: 186.1738465006649

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test