PATENT CLAIM ANALYSIS

Application Number: 15923282
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["365", "185290"]

Abstract:
A non-volatile semiconductor memory device includes a memory cell array and a control circuit. A control circuit performs an erase operation providing a memory cell with a first threshold voltage level for erasing data of a memory cell, and then perform a plurality of first write operations providing a memory cell with a second threshold voltage level, the second threshold voltage level being higher than the first threshold voltage level and being positive level. When the control circuit receives a first execution instruction from outside during the first write operations, the first execution instruction being for performing first function operation except for the erase operation and the first write operations, the circuit performs the first function operation during the first write operations.

Claim (Index 18):
A memory system comprising:\n a controller chip configured to send a plurality of commands; and a memory chip configured to perform a plurality of kinds of operations in response to the plurality of commands received from the controller chip, the memory chip including a ready/busy pin, wherein the memory chip is configured to output a first signal indicative of a first busy state from the ready/busy pin after the memory chip receives an erase command, a first address, and an erase execute command in order, while the memory chip outputs the first signal indicative of the first busy state, the memory chip is configured to receive a suspend command, after the memory chip receives the suspend command, the memory chip is configured to output the first signal indicative of a first ready state from the ready/busy pin, while the memory chip outputs the first signal indicative of the first ready state, the memory chip is configured to receive a resume command, after the memory chip receives the resume command, the memory chip is configured to output the first signal indicative of a second busy state from the ready/busy pin.

Metadata:
- Claim Count in Document: 42.0
- Percentile: 90.0
- Lexical Diversity: 2.63265
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15074190', '15361778', '14748351', '14093108', '13425818']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8139071394010692
- 35 USC 102 Novelty (BERT): 0.4740000094296955
- Combined Prediction Score: 0.7799164264039319
- Mean Citation Score: 230.67682
- Max Citation Score: 258.88852
- Similarity Product: 248.74197054367784

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test