PATENT CLAIM ANALYSIS

Application Number: 15917195
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-09
Patent Classification: ["257", "773000"]

Abstract:
A method for constructing a ramp-stacked chip assembly starts by obtaining a set of semiconductor chips, including a first chip and a set of additional chips. Next, the method stacks the set of additional chips one at a time over the first chip, wherein each additional chip is horizontally offset from a preceding additional chip to form a ramp-stack. While stacking each additional chip, the method: applies an adhesive layer to a surface of a preceding chip in the ramp-stack; and uses a vacuum tool to pick up the additional chip and place the additional chip on the adhesive layer of the preceding chip. During this pick-and-place process, the vacuum tool spans most of a surface of the additional chip and also provides planar support for the additional chip, which causes a holding force of the vacuum tool to flatten the additional chip prior to placement on the preceding chip.

Claim (Index 15):
The apparatus of  claim 10 , wherein after each additional chip is placed on the adhesive layer of a preceding chip, the process of forming the ramp-stack further comprises snap-curing the adhesive layer using ultra-violet light (UV).

Metadata:
- Claim Count in Document: 26.0
- Percentile: 90.0
- Lexical Diversity: 2.25
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12873945', '12507349', '14059302', '13468891', '12868577']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.900997073234016
- 35 USC 102 Novelty (BERT): 0.4814248798953079
- Combined Prediction Score: 0.8590398539001453
- Mean Citation Score: 147.52683399999995
- Max Citation Score: 150.88715
- Similarity Product: 107.94680464534164

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test