PATENT CLAIM ANALYSIS

Application Number: 16126477
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-09
Patent Classification: ["341", "152000"]

Abstract:
A digital-to-time converter has an oscillator; and count circuitry that starts counting a number of oscillations of the oscillator when an activation signal is input, and outputs a first delay activation signal obtained by delaying the activation signal during a period from a timing when the activation signal is input to a timing when a counted number of oscillations reaches a reference number set based on a digital input signal.

Claim (Index 6):
The digital-to-time converter according to  claim 4 ,\n wherein the delay addition circuitry comprises a plurality of delay circuitries with different delay quantities, the delay circuitries being connected in series to each other, wherein the first delay activation signal is input to first stage delay circuitry among the delay circuitries connected in series to each other, and wherein whether to delay the first delay activation signal for each of the plurality of delay circuitries is selected based on the low-order bits.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 97.0
- Lexical Diversity: 1.69767
- Patent Class: 341.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15914304', '15488278', '14070005', '11097456', '15608807']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.537397220962837
- 35 USC 102 Novelty (BERT): 0.5110788532467796
- Combined Prediction Score: 0.5347653841912313
- Mean Citation Score: 167.05883000000003
- Max Citation Score: 185.05956
- Similarity Product: 114.10909924384116

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test