PATENT CLAIM ANALYSIS

Application Number: 15925200
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["714", "729000"]

Abstract:
Electronic scan circuitry includes a decompressor ( 510 ), a plurality of scan chains ( 520. i ) fed by the decompressor ( 510 ), a scan circuit ( 502, 504 ) coupled to the plurality of scan chains ( 520. i ) to scan them in and out, a masking circuit ( 590 ) fed by the scan chains ( 520. i ), and a scannable masking qualification circuit ( 550, 560, 580 ) coupled to the masking circuit ( 590 ), the masking qualification circuit ( 550, 560, 580 ) scannable by scan-in of bits by the decompressor ( 510 ) along with scan-in of the scan chains ( 520. i ), and the scannable masking qualification circuit ( 550, 560, 580 ) operable to hold such scanned-in bits upon scan-out of the scan chains through the masking circuit ( 590 ). Other scan circuitry, processes, circuits, devices and systems are also disclosed.

Claim (Index 3):
The electronic scan circuitry of  claim 1  including scannable masking qualification circuitry having the first qualify line coupled to the second inputs of the first gates and the second qualify line coupled to the second inputs of the second gates.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 90.0
- Lexical Diversity: 3.2037
- Patent Class: 714.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['14944971', '12904303', '14487538', '14743720', '12938939']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3800150444244354
- 35 USC 102 Novelty (BERT): 0.6125280968296151
- Combined Prediction Score: 0.4032663496649533
- Mean Citation Score: 476.75566
- Max Citation Score: 560.9474
- Similarity Product: 502.9628295703411

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test