PATENT CLAIM ANALYSIS

Application Number: 15897092
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-05
Patent Classification: ["717", "149000"]

Abstract:
A compiler parses a multithreaded application into cohesive blocks of instructions. Cohesive blocks include instructions that do not diverge or converge. Each cohesive block is associated with one or more uniform registers. When a set of threads executes the instructions in a given cohesive block, each thread in the set may access the uniform register independently of the other threads in the set. Accordingly, the uniform register may store a single copy of data on behalf of all threads in the set of threads, thereby conserving resources.

Claim (Index 5):
The computer-implemented method of  claim 2 , further comprising:\n parsing the application program to generate a first block, wherein the first block comprises a third set of instructions that diverge; and causing two or more other groups of threads to execute instructions included in two or more corresponding cohesive blocks in response to the third set of instructions being executed.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 88.0
- Lexical Diversity: 1.72727
- Patent Class: 717.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['13674890', '15499843', '15826435', '12054255', '13335868']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3712207231322355
- 35 USC 102 Novelty (BERT): 0.4906960458148008
- Combined Prediction Score: 0.383168255400492
- Mean Citation Score: 167.981296
- Max Citation Score: 171.01477
- Similarity Product: 120.28333150740148

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test