PATENT CLAIM ANALYSIS

Application Number: 16258169
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-05
Patent Classification: ["257", "231000"]

Abstract:
An inventive solid-state imaging apparatus is provided which can improve the efficiency of the electric carrier transfer from a photoelectric conversion portion to an electric-carrier accumulation portion. The solid-state imaging apparatus includes an active region having the photoelectric conversion portion, the electric-carrier accumulation portion, and a floating diffusion, and an element isolation region having an insulator defining the active region. In planer view, the width of the active region in the electric-carrier accumulation portion under a gate of the first transfer transistor is larger than the width of the active region in the photoelectric conversion portion under the gate of the first transfer transistor.

Claim (Index 6):
A photoelectric conversion apparatus comprising:\n a photoelectric conversion portion having a first semiconductor region of a first conductivity type; a first transfer transistor configured to transfer electric carriers from the photoelectric conversion portion; an electric-carrier accumulation portion having a second semiconductor region of a first conductivity type, the electric-carrier accumulating portion receiving the electric carriers transferred from the first transfer transistor; a second transfer transistor configured to transfer electric carriers accumulated in the electric-carrier accumulation portion; a floating diffusion to which the electric carriers are transferred from the second transfer transistor; wherein, at a side where the photoelectric conversion portion is provided, the first semiconductor region is placed between third semiconductor regions of a second conductivity type in a cross section in a channel width direction of the first transfer transistor under the gate of the first transfer transistor, wherein, at a side where the electric-carrier accumulation portion is provided, the second semiconductor region is placed between third semiconductor regions of the second conductivity type in a cross section in the channel width direction of the first transfer transistor under the gate of the first transfer transistor, wherein a width of the second semiconductor region placed between the third semiconductor regions is larger than the width of the first semiconductor region placed between the third semiconductor regions in a cross section in the channel width direction of the first transfer transistor under the gate of the first transfer transistor, and wherein, in the channel width direction of the first transfer transistor in plan view, the first semiconductor region having the photoelectric conversion portion has a width that is larger than the width of the first semiconductor region placed between the third semiconductor regions.

Metadata:
- Claim Count in Document: 2.0
- Percentile: 99.0
- Lexical Diversity: 2.22
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['14960229', '15085780', '11376213', '12417149', '13715696']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9072810420127329
- 35 USC 102 Novelty (BERT): 0.5167903271919754
- Combined Prediction Score: 0.868231970530657
- Mean Citation Score: 259.625304
- Max Citation Score: 322.3068
- Similarity Product: 308.8964585237504

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test