PATENT CLAIM ANALYSIS

Application Number: 15996895
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-02
Patent Classification: ["257", "777000"]

Abstract:
A semiconductor device includes a base including interconnects, a first semiconductor chip including a first semiconductor element portion, and a second semiconductor chip including a second semiconductor element portion. The second semiconductor chip is electrically connected to the first semiconductor chip via at least one of the interconnects. The second semiconductor chip includes a first region, a first portion, and a second portion. The first region includes the second semiconductor element portion. The first portion is continuous with the first region. The second portion is continuous with the first region and is separated from the first portion in a second direction crossing a first direction. The first direction is from the base toward the first region. The second portion, the first portion, and at least a portion of the first semiconductor chip each is positioned between the base and the first region.

Claim (Index 9):
A method for manufacturing a semiconductor device, comprising:\n causing a second surface of a wafer to recede, the wafer having a first surface and the second surface, the first surface including a semiconductor element portion, the second surface being separated from the first surface in a first direction; bonding a bonding resin to the second surface of the wafer; dividing the wafer into a plurality of semiconductor chips by dicing the wafer along a second direction and a third direction, the second direction crossing the first direction, the third direction crossing the first direction and the second direction; and forming a trench or a recess in each of the plurality of semiconductor chips by processing the second surface of the wafer including the bonding resin, the forming of the trench or the recess in each of the plurality of semiconductor chips being performed in one of (a) to (c):\n (a) Before the dividing of the wafer into the plurality of semiconductor chips; \n (b) After the dividing of the wafer into the plurality of semiconductor chips; or \n (c) In the dividing of the wafer into the plurality of semiconductor chips.

Metadata:
- Claim Count in Document: 4.0
- Percentile: 94.0
- Lexical Diversity: 4.0
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12686125', '12347956', '12626069', '15662127', '13050313']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.91257694140582
- 35 USC 102 Novelty (BERT): 0.4658746332549531
- Combined Prediction Score: 0.8679067105907333
- Mean Citation Score: 172.743754
- Max Citation Score: 174.15175
- Similarity Product: 138.76771937058865

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test