PATENT CLAIM ANALYSIS

Application Number: 16150913
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-01
Patent Classification: ["716", "130000"]

Abstract:
A multilayer semiconductor device includes first wirings extending in a first direction and arranged adjacent to each other in a second direction. Dummy wirings are arranged between the first wirings and the second wiring at crossing points between first virtual linear lines extending in a third direction and second virtual linear lines extending in a fourth direction. The third and fourth directions are neither parallel nor orthogonal to the first and second directions. The dummy wirings have a first, a second, and a third dummy wiring. Centers of the second and third dummy wirings are nearest to a center of the first dummy wiring relative to others of the dummy wirings. The respective centers of the first, second, and third dummy wirings are aligned on a third virtual linear line extending in a fifth direction neither parallel to nor perpendicular to the first and second directions.

Claim (Index 8):
The semiconductor device according to  claim 4 , wherein a length of a side of each of the plurality of dummy wirings is in a range of 1 to 10 \u03bcm.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 97.0
- Lexical Diversity: 2.88889
- Patent Class: 716.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15441635', '15441595', '15242885', '14613824', '09809635']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4316622385769153
- 35 USC 102 Novelty (BERT): 0.5471845706340397
- Combined Prediction Score: 0.4432144717826277
- Mean Citation Score: 436.274396
- Max Citation Score: 464.66364
- Similarity Product: 329.2463292799902

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 0

Dataset: test