PATENT CLAIM ANALYSIS

Application Number: 15777249
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-11
Patent Classification: ["708", "409000"]

Abstract:
A calculation circuit for calculating a transform of an input sequence may include a plurality of butterfly computation circuits configured to perform a plurality of butterfly computations and to produce a plurality of outputs during each of a plurality of computation stages, a wired routing network configured to route a first plurality of outputs of the plurality of butterfly computation circuits from a first computation stage of the plurality of computation stages as input to the plurality of butterfly computation circuits during a second computation stage of the plurality of computation stages according to a reconfigurable routing configuration, and routing control circuitry configured to modify the reconfigurable routing configuration for a third computation stage of the plurality of computation stages.

Claim (Index 19):
The method of  claim 17 , further comprising modifying the reconfigurable routing configuration during each of the plurality of computation stages to calculate the transform of the input sequence as a Fast Fourier Transform (FFT) of the input sequence.

Metadata:
- Claim Count in Document: 19.0
- Percentile: 93.0
- Lexical Diversity: 2.67391
- Patent Class: 708.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['11176149', '10781336', '11643165', '15288548', '12476232']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.3785914958646482
- 35 USC 102 Novelty (BERT): 0.4906299210773061
- Combined Prediction Score: 0.389795338385914
- Mean Citation Score: 168.12825200000003
- Max Citation Score: 175.23943
- Similarity Product: 125.10872993204951

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test