PATENT CLAIM ANALYSIS

Application Number: 16176547
Application Type: Utility
Filing Date: 2018-10
Publication Date: 2019-02
Patent Classification: ["257", "737000"]

Abstract:
In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a plurality of interconnect layers within an inter-level dielectric (ILD) structure disposed along a front-side of a substrate. A dielectric layer is arranged along a back-side of the substrate and a conductive bond pad is separated from the substrate by the dielectric layer. A back-side through-substrate-via (BTSV) extends through the substrate and the dielectric layer. A conductive bump is arranged over the conductive bond pad. The conductive bond pad has a substantially planar lower surface extending from over the BTSV to below the conductive bump. A BTSV liner separates sidewalls of the BTSV from the substrate. The sidewalls of the BTSV directly contact sides of both the BTSV liner and the dielectric layer.

Claim (Index 6):
The integrated chip of  claim 5 , further comprising:\n an oxide layer having an uppermost surface contacting the ILD structure and a lowermost surface contacting the second substrate, wherein the through dielectric via has an uppermost surface contacting one of the plurality of interconnect layers disposed along a top of the ILD structure.

Metadata:
- Claim Count in Document: 35.0
- Percentile: 97.0
- Lexical Diversity: 2.2381
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15143950', '16046183', '14750003', '15380186', '16167844']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.923322057027965
- 35 USC 102 Novelty (BERT): 0.5222177664997575
- Combined Prediction Score: 0.8832116279751443
- Mean Citation Score: 252.56769
- Max Citation Score: 323.2159
- Similarity Product: 207.49012671195865

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test