PATENT CLAIM ANALYSIS

Application Number: 16038709
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2020-01
Patent Classification: ["257", "296000"]

Abstract:
The present disclosure provides a DRAM cell structure. The DRAM cell structure includes a substrate, a gate structure disposed in the substrate, a source region and a drain region disposed in the substrate respectively at two sides of the gate structure, a landing pad disposed over the drain region, a plurality of carbon nanotubes disposed on the landing pad, a top electrode disposed over the plurality of carbon nanotubes, and a dielectric layer disposed between the top electrode and the plurality of carbon nanotubes.

Claim (Index 17):
The method of  claim 15 , further comprising forming a bit line structure on the source region before the forming of the dielectric structure.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 95.0
- Lexical Diversity: 2.48649
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['10737052', '13297276', '10911907', '11050988', '12070875']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.914755106127563
- 35 USC 102 Novelty (BERT): 0.4987800713180689
- Combined Prediction Score: 0.8731576026466136
- Mean Citation Score: 203.503366
- Max Citation Score: 208.87921
- Similarity Product: 131.0668606604302

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test