PATENT CLAIM ANALYSIS

Application Number: 16299926
Application Type: Utility
Filing Date: 2019-03
Publication Date: 2019-07
Patent Classification: ["257", "190000"]

Abstract:
An n-doped field effect transistor (nFET) section of an integrated device logic region is provided. The nFET section includes a semiconductor substrate, a layer at least partially formed of silicon germanium (SiGe) disposed on the semiconductor substrate and fin formations. The fin formations are formed on the layer. Each fin formation includes a first fin portion that is at least partially formed of silicon (Si) and a second fin portion that is at least partially formed of hard mask material. The layer is etched to include free surfaces that facilitate elastic relaxation of SiGe therein and a corresponding application of tension in Si of the first fin portion of each of the fin formations.

Claim (Index 8):
The integrated device according to  claim 7 , wherein the plastically relaxed SiGe substrates are between 2-3 microns thick.

Metadata:
- Claim Count in Document: 40.0
- Percentile: 99.0
- Lexical Diversity: 2.0
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15403696', '15897685', '14618442', '14618397', '15823340']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9409823162224866
- 35 USC 102 Novelty (BERT): 0.6195321758578186
- Combined Prediction Score: 0.90883730218602
- Mean Citation Score: 424.6946919999999
- Max Citation Score: 567.47516
- Similarity Product: 528.8546717951441

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test