PATENT CLAIM ANALYSIS

Application Number: 15860796
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2019-04
Patent Classification: ["323", "271000"]

Abstract:
Devices and methods are provided for controlling dead-time of a direct current to direct current (DC-DC) converter. A control circuit includes a first transistor having a source/drain terminal coupled to an output voltage of the DC-DC converter configured to provide current based on the output voltage. The control circuit also includes a digital up/down counter having an output terminal electrically coupled to an input terminal of a delay cell of the DC-DC converter. A current sensing circuit of the control circuit is electrically coupled to an input terminal of the digital up/down counter configured to receive the current and drive the digital up/down counter based on the current.

Claim (Index 10):
The control circuit of  claim 1 , wherein a gate terminal of the first transistor is electrically coupled to ground.

Metadata:
- Claim Count in Document: 18.0
- Percentile: 86.0
- Lexical Diversity: 2.32653
- Patent Class: 323.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14634922', '12016617', '12551688', '15363188', '13161526']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7346536347461252
- 35 USC 102 Novelty (BERT): 0.4743784627758515
- Combined Prediction Score: 0.7086261175490979
- Mean Citation Score: 164.213234
- Max Citation Score: 175.7548
- Similarity Product: 127.5830063300848

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test