PATENT CLAIM ANALYSIS

Application Number: 16145311
Application Type: Utility
Filing Date: 2018-09
Publication Date: 2019-01
Patent Classification: ["708", "702000"]

Abstract:
A circuit is provided for addition of multiple binary numbers. The circuit includes a 4-to-2-compressor configured for calculating a compressed representation from four binary numbers received via operand inputs of the 4-to-2-compressor. The 4-to-2-compressor includes a first sub-circuit and a second sub-circuit. Each of the first sub-circuit and the second sub-circuit is configured for transmitting a bitwise inverted representation, of a compressed representation, from three binary numbers.

Claim (Index 7):
The circuit of  claim 3 , wherein the inverted sum output of the first sub-cell is connected to an operand input of the second sub-cell.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 97.0
- Lexical Diversity: 2.02778
- Patent Class: 708.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15381424', '12360106', '10695489', '10675674', '11057330']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4434159699556241
- 35 USC 102 Novelty (BERT): 0.5433488857450551
- Combined Prediction Score: 0.4534092615345673
- Mean Citation Score: 190.516548
- Max Citation Score: 370.27155
- Similarity Product: 302.43142320207056

Labels:
- Claim Label 101: 0
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 0

Dataset: test