PATENT CLAIM ANALYSIS

Application Number: 15906580
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-05
Patent Classification: ["355", "055000"]

Abstract:
In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.

Claim (Index 20):
A non-transitory computer readable medium storing a program, wherein, when the program is executed by one or more processors of an exposure apparatus, causes the exposure apparatus to perform:\n obtaining an exposure map and a chip area layout within an exposure area corresponding to one scan or one exposure field set by the exposure apparatus; setting a focus control effective region and a focus control exclusion region based on the exposure map and the chip area layout; measuring focus-leveling data over a wafer; and exposing a photo resist layer on the wafer with an exposure light by using the exposure apparatus, wherein: a plurality of chip areas are included in the exposure area, when a chip area of the plurality of chip areas is located within an effective region of a wafer, the chip area is included in the focus control effective region, wherein the effective region of the wafer has a circular shape, and a diameter of the effective region of the wafer is 2-15 mm smaller than a diameter of the wafer, when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region, the focus control effective region is a region where the measured focus-leveling data are used to control the focus-leveling, and in the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 88.0
- Lexical Diversity: 2.78947
- Patent Class: 355.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['12832600', '11947239', '13905529', '13014803', '10278972']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6897946631960089
- 35 USC 102 Novelty (BERT): 0.4642856430038276
- Combined Prediction Score: 0.6672437611767909
- Mean Citation Score: 137.136142
- Max Citation Score: 171.67792
- Similarity Product: 125.88380048900603

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test