PATENT CLAIM ANALYSIS

Application Number: 16018892
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-12
Patent Classification: ["365", "194000"]

Abstract:
A circuit includes a plurality of memory cells, a first tracking word line driver, and a second tracking word line driver. The first tracking word line driver outputs a first signal in response to a first region of the plurality of memory cells being accessed, the first signal having a first pulse width. The second tracking word line driver outputs a second signal in response to a second region of the plurality of memory cells being accessed, the second signal having a second pulse width, the second pulse width being different from the first pulse width.

Claim (Index 13):
The circuit of  claim 12 , wherein\n each region of the array of memory cells comprises a tracking cell set responsive to an associated tracking word line signal output by an associated tracking word line driver, the input-output circuit is configured to generate a reset signal responsive to timings of the tracking cell sets of the regions of the array of memory cells, and the pulse width of the word line signal output by each word line driver is based on the reset signal.

Metadata:
- Claim Count in Document: 47.0
- Percentile: 94.0
- Lexical Diversity: 3.25
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14300750', '15589313', '14924069', '14030497', '14598272']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7958900557877491
- 35 USC 102 Novelty (BERT): 0.4832086823951182
- Combined Prediction Score: 0.764621918448486
- Mean Citation Score: 162.55373400000005
- Max Citation Score: 174.98654
- Similarity Product: 114.2092831217384

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test