PATENT CLAIM ANALYSIS

Application Number: 15910843
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2018-07
Patent Classification: ["257", "308000"]

Abstract:
A vertical structure may be used as a high density capacitance for an integrated circuit. These thin vertical structures can be configured to operate as an insulator in a metal-insulator-metal (MIM) capacitor. The vertical structures may be manufactured using three-dimensional semiconductor manufacturing technology, such as FinFET (fin field effect transistor) technology and manufacturing processes. The capacitors based on thin vertical structures may be integrated with other circuitry that can utilize the thin vertical structures, such as FinFET transistors.

Claim (Index 10):
The three-dimensional integrated circuit of  claim 1 , wherein the electrodes extend approximately an entire length and height of the thin vertical semiconductor structures.

Metadata:
- Claim Count in Document: 32.0
- Percentile: 90.0
- Lexical Diversity: 1.57143
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15144657', '11246318', '14739284', '15334058', '15450193']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9186797375288605
- 35 USC 102 Novelty (BERT): 0.5272772201316538
- Combined Prediction Score: 0.8795394857891397
- Mean Citation Score: 207.419142
- Max Citation Score: 341.31155
- Similarity Product: 253.9788262608171

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test