PATENT CLAIM ANALYSIS

Application Number: 16049248
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-12
Patent Classification: ["438", "275000"]

Abstract:
Systems and methods are provided for fabricating semiconductor device structures on a substrate. A first fin structure is formed on a substrate. A second fin structure is formed on the substrate. A first semiconductor material is formed on both the first fin structure and the second fin structure. A second semiconductor material is formed on the first semiconductor material on both the first fin structure and the second fin structure. The first semiconductor material on the first fin structure is oxidized to form a first oxide. The second semiconductor material on the first fin structure is removed. A first dielectric material and a first electrode are formed on the first fin structure. A second dielectric material and a second electrode are formed on the second fin structure.

Claim (Index 6):
The semiconductor device of  claim 4 , wherein a bottom of the first gate electrode is located below the upper surface of the isolation dielectric layer.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 95.0
- Lexical Diversity: 4.25
- Patent Class: 438.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14151350', '14700202', '14942740', '16036888', '14254035']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8505668111663619
- 35 USC 102 Novelty (BERT): 0.4938649930647139
- Combined Prediction Score: 0.8148966293561971
- Mean Citation Score: 201.526452
- Max Citation Score: 216.56879
- Similarity Product: 165.00678336429894

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test