PATENT CLAIM ANALYSIS

Application Number: 16048843
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["257", "368000"]

Abstract:
A spacer structure and a fabrication method thereof are provided. The method includes the following operations. First and second conductive structures are formed over a substrate. Dielectric layer is formed to cover the first and second conductive structures. Hard mask layer is formed over the dielectric layer. The hard mask layer covers the dielectric layer over the first conductive structure, and the hard mask layer has an opening exposing the dielectric layer over the second conductive structure. The dielectric layer exposed by the hard mask layer is etched to reduce thickness of the dielectric layer. The hard mask layer is removed. The dielectric layer is etched to form first main spacer on sidewall of the first conductive structure and second main spacer on sidewall of the second conductive structure. A first width of the first main spacer is greater than a second width of the second main spacer.

Claim (Index 32):
The semiconductor device of  claim 27 , wherein the first main spacer and the second main spacer are composed of a same dielectric material.

Metadata:
- Claim Count in Document: 29.0
- Percentile: 95.0
- Lexical Diversity: 3.0
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['15061654', '14862258', '15660432', '15092076', '15057755']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9224345744516468
- 35 USC 102 Novelty (BERT): 0.4901933004993465
- Combined Prediction Score: 0.8792104470564167
- Mean Citation Score: 178.55343200000004
- Max Citation Score: 238.37234
- Similarity Product: 190.37802212481145

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test