PATENT CLAIM ANALYSIS

Application Number: 15906423
Application Type: Utility
Filing Date: 2018-02
Publication Date: 2019-03
Patent Classification: ["257", "324000"]

Abstract:
According to one embodiment, a semiconductor memory device includes a first electrode layer having a first area, a second area, and a connection area connecting the first area to the second area, and a plurality of semiconductor pillars extending in a first direction through the first electrode layer in the first area and the second area. The plurality of semiconductor pillars are arranged in an array in a second direction and in a third direction intersecting with the second direction, the second direction and the third direction being parallel to the surface of the first electrode layer, and the connection area has no semiconductor pillars disposed therein.

Claim (Index 2):
The semiconductor memory device according to  claim 1 , further comprising:\n an insulator extending in the first direction through the first electrode layer, the insulator being adjacent to the connection area in the second direction.

Metadata:
- Claim Count in Document: 8.0
- Percentile: 88.0
- Lexical Diversity: 2.67442
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15906890', '12727854', '15855186', '12705231', '15268034']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.913577356640045
- 35 USC 102 Novelty (BERT): 0.4836540432115395
- Combined Prediction Score: 0.8705850252971945
- Mean Citation Score: 201.71755
- Max Citation Score: 234.92607
- Similarity Product: 193.9172887536604

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test