PATENT CLAIM ANALYSIS

Application Number: 16213559
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-06
Patent Classification: ["257", "409000"]

Abstract:
A transistor type of field effect transistor (FET) having a field plate is disclosed. The FET provides an active region and two inactive region sandwiching the active region therebetween, where the electrodes are provided in the active region. The FET further includes fingers and buses of the drain and the source. The fingers overlap with the electrodes of the drain and the source; while the busses are provided in respective inactive regions. The field plate includes a field plate finger and a field plate interconnection. The field plate finger extends parallel to the gate electrode in a side facing the drain electrode. The field plate interconnection connects the field plate finger with the source interconnection in one of the inactive regions opposite to the inactive region where the drain bus exists.

Claim (Index 2):
The transistor according to  claim 1 ,\n wherein the field plate interconnection passes over the gate electrode in the another of the inactive region.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 98.0
- Lexical Diversity: 2.40678
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16169826', '14568507', '15032824', '10810676', '11819734']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9258456706862866
- 35 USC 102 Novelty (BERT): 0.5078645902884642
- Combined Prediction Score: 0.8840475626465044
- Mean Citation Score: 219.188984
- Max Citation Score: 268.48453
- Similarity Product: 187.57583738934457

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test