PATENT CLAIM ANALYSIS

Application Number: 15953537
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-08
Patent Classification: ["257", "368000"]

Abstract:
A method for manufacturing a semiconductor device and a device manufactured using the same are provided. According to a method approach of the embodiment, a substrate having at least a first area with a plurality of polysilicon gates and a second area adjacent to the first area is provided. A contact etch stop layer (CESL) over the polysilicon gates of the first area is formed, and the CESL extends to the second area. Then, a dielectric layer is formed on the CESL, and a nitride layer is formed on the dielectric layer. The nitride layer is patterned to expose the dielectric layer in the first area and to form a pattern of dummy nitrides on the dielectric layer in the second area.

Claim (Index 7):
The semiconductor device according to  claim 1 , wherein the second area is an area with a density of metal gates lower than a density of the plurality of metal gates in the first area.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 91.0
- Lexical Diversity: 2.375
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['14980779', '12152380', '14682265', '15138228', '12487894']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9188267528576024
- 35 USC 102 Novelty (BERT): 0.5270138549938417
- Combined Prediction Score: 0.8796454630712263
- Mean Citation Score: 211.604324
- Max Citation Score: 340.9078
- Similarity Product: 256.9633677677035

Labels:
- Claim Label 101: 1
- Claim Label 102: 0
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 0
- Label 101 Adjusted: 1

Dataset: test