PATENT CLAIM ANALYSIS

Application Number: 16218686
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-05
Patent Classification: ["330", "261000"]

Abstract:
A class AB amplifier with improved DC gain. An amplifier includes an input stage and an output stage. The output stage is configured to amplify an output of the input stage. The output stage includes output transistors, class AB amplifier circuitry, minimum selector circuitry, and gain boost amplifier circuitry. The class AB amplifier circuitry includes a first transistor and a second transistor connected as a differential amplifier. The minimum selector circuitry is configured to control bias current in the output transistors by driving a control input of the first transistor. The gain boost amplifier circuitry is coupled to the class AB amplifier circuitry. The gain boost amplifier circuitry is configured to drive a common mode signal onto the control input of the first transistor and a control input of the second transistor, the common mode signal based on the output of the input stage.

Claim (Index 18):
A two-stage operational amplifier, comprising:\n a differential input stage; and an output stage coupled to the input stage, the output stage comprising:\n output transistors; \n class AB minimum selector amplifier circuitry comprising:\n a differential class AB amplifier comprising:\n a first stacked pair of complementary transistors; and \n a second stacked pair of complementary transistors; \n \n minimum selector circuitry; and \n \n gain boost amplifier circuitry coupled to the class AB minimum selector amplifier circuitry, the gain boost amplifier circuitry comprising:\n a first input transistor and a second input transistor connected as a differential pair to receive the differential output of the input stage; \n third and fourth transistors coupled to the first input transistor and the second input transistor, the third and fourth transistors connected as a differential-to-single-ended converter to convert output of the first and second input transistors to a single-ended signal; and \n fifth and sixth transistors coupled to an output of the differential-to-single-ended converter, each of the fifth and sixth transistors configured to convert a voltage input to a current output; \n wherein:\n an output of the fifth transistor is coupled to the control input of the first transistor of the first stacked pair of complementary transistors; and \n an output of the sixth transistor is coupled to a control input of a first transistor of the second stacked pair of complementary transistors.

Metadata:
- Claim Count in Document: 50.0
- Percentile: 98.0
- Lexical Diversity: 3.12
- Patent Class: 330.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15807640', '11378906', '15229756', '11401492', '11493654']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7633347827593964
- 35 USC 102 Novelty (BERT): 0.6011245701368014
- Combined Prediction Score: 0.7471137614971369
- Mean Citation Score: 334.4625640000001
- Max Citation Score: 509.2607
- Similarity Product: 465.8061474458337

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test