PATENT CLAIM ANALYSIS

Application Number: 15974756
Application Type: Utility
Filing Date: 2018-05
Publication Date: 2018-09
Patent Classification: ["341", "110000"]

Abstract:
An asynchronous successive approximation register analog-to-digital converter (SAR ADC), which utilizes one or more overlapping redundant bits in each digital-to-analog converter (DAC) code word, is operable to generate an indication signal that indicates completion of each comparison step and indicates that an output decision for each comparison step is valid. A timer may be initiated based on the generated indication signal. A timeout signal may be generated that preempts the indication signal and forces a preemptive decision, where the preemptive decision sets one or more remaining bits up to, but not including, the one or more overlapping redundant bits in a corresponding digital-to-analog converter code word for a current comparison step to a particular value. For example, the one or more remaining bits may be set to a value that is derived from a value of a bit that was determined in an immediately preceding decision.

Claim (Index 21):
An analog-to-digital converter (ADC), comprising:\n a comparator comprising an analog input, a reference input, a preemption input, a codeword output, and a validation output, wherein the validation output indicates a valid decision and the codeword output indicates a comparison between the analog input and the reference input when a preemption is not indicated at the preemption input; a digital-to-analog converter (DAC) comprising a codeword input and a reference output, wherein the reference output of the DAC is operably coupled to the reference input of the comparator and the codeword input of the DAC is operably coupled to the codeword output of the comparator; and a timer operable to set a preemption output in time according to a validation input, wherein the validation input of the timer is operably coupled to the validation output of the comparator and the preemption output of the timer is operably coupled to the preemption input of the comparator.

Metadata:
- Claim Count in Document: 59.0
- Percentile: 93.0
- Lexical Diversity: 2.0
- Patent Class: 341.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15711177', '15230735', '14585656', '15130302', '13945579']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.5955806200087728
- 35 USC 102 Novelty (BERT): 0.5372592795569948
- Combined Prediction Score: 0.5897484859635951
- Mean Citation Score: 276.547368
- Max Citation Score: 357.83194
- Similarity Product: 328.4656349622428

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test