PATENT CLAIM ANALYSIS

Application Number: 16039404
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2019-01
Patent Classification: ["365", "226000"]

Abstract:
A memory device includes a first switch for switching a first power voltage and transmitting the first power voltage to a common node of a first power rail. A second switch switches a second power voltage and transmits the second power voltage to the common node. A control logic generates a first control signal for controlling the first switch during initial driving of the memory device. A masking circuit controls the first switch to maintain a turn on state in at least a partial period of the initial driving period of the memory device by providing a first masking control signal obtained by masking the first control signal to the first switch.

Claim (Index 9):
The memory device of  claim 1 , wherein:\n the memory device receives the first power voltage and the second power voltage from an external power management integrated circuit (PMIC), and the second power voltage is provided to the memory device after predetermined delay in comparison with the first power voltage.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 95.0
- Lexical Diversity: 2.52174
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['16039400', '15959344', '12786791', '10786708', '10507117']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8205641848773727
- 35 USC 102 Novelty (BERT): 0.4947611207361956
- Combined Prediction Score: 0.787983878463255
- Mean Citation Score: 200.273266
- Max Citation Score: 270.52173
- Similarity Product: 216.7394711484933

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test