PATENT CLAIM ANALYSIS

Application Number: 16391888
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-08
Patent Classification: ["257", "369000"]

Abstract:
A semiconductor device and method for fabricating the same are provided. The semiconductor device includes a substrate including a cell region, a core region, and a boundary region between the cell region and the core region, a boundary element isolation layer in the boundary region of the substrate to separate the cell region from the core region, a high-k dielectric layer on at least a part of the boundary element isolation layer and the core region of the substrate, a first work function metal pattern comprising a first extension overlapping the boundary element isolation layer on the high-k dielectric layer, and a second work function metal pattern comprising a second extension overlapping the boundary element isolation layer on the first work function metal pattern, wherein a first length of the first extension is different from a second length of the second extension.

Claim (Index 15):
The semiconductor device of  claim 13 , wherein the boundary element isolation layer includes a recess adjacent to the first extension.

Metadata:
- Claim Count in Document: 1.0
- Percentile: 100.0
- Lexical Diversity: 3.02
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15828934', '15618623', '15048797', '14971026', '15046572']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9255827184373082
- 35 USC 102 Novelty (BERT): 0.5322004052801724
- Combined Prediction Score: 0.8862444871215946
- Mean Citation Score: 224.70899
- Max Citation Score: 347.81274
- Similarity Product: 238.38762110456943

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test