PATENT CLAIM ANALYSIS

Application Number: 16372984
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-07
Patent Classification: ["257", "659000"]

Abstract:
Disclosed is an ESD protection device, comprising: a semiconductor substrate; a semiconductor buried layer located in the semiconductor substrate; an epitaxial semiconductor layer located on the semiconductor substrate and comprising a first doped region and a second doped region, wherein the semiconductor substrate and the first doped region are of a first doping type, the semiconductor buried layer, the epitaxial semiconductor layer and the second doped region are of a second doping type, the first doping type and the second doping type are opposite to each other, and the first doped region forms a plurality of interfaces with the epitaxial semiconductor layer. The disclosure improves protection performance and maximum current bearing capacity without increasing parasitic capacitance of the ESD protection device.

Claim (Index 6):
The method according to  claim 1 , further comprising: forming a third doped region in said epitaxial semiconductor layer, which penetrates through said epitaxial semiconductor layer to said semiconductor buried layer, and said third doped region is of said second doping type.

Metadata:
- Claim Count in Document: 3.0
- Percentile: 100.0
- Lexical Diversity: 2.58824
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['15730419', '15606976', '15670497', '15671816', '14674559']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9105705020264628
- 35 USC 102 Novelty (BERT): 0.5353807630313377
- Combined Prediction Score: 0.8730515281269503
- Mean Citation Score: 298.133198
- Max Citation Score: 362.19995
- Similarity Product: 340.3966011545718

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test