PATENT CLAIM ANALYSIS

Application Number: 16037767
Application Type: Utility
Filing Date: 2018-07
Publication Date: 2018-11
Patent Classification: ["708", "835000"]

Abstract:
Embodiments of the present disclosure provide a memory device. The memory device includes an RRAM crossbar array that is configured to perform a logic operation, and resistance values of resistors in the RRAM crossbar array are all set to R on  or R off  to indicate a value 1 or 0. Based on the foregoing setting, an operation is implemented using the RRAM crossbar array, so that reliability of a logic operation of the RRAM crossbar array can be improved.

Claim (Index 8):
The memory device according to  claim 1 , wherein the instruction of the processor further comprises a data access instruction, and each memory unit further comprises:\n a storage circuit, wherein the storage circuit is connected to the control circuit, and the control circuit read data from the computation circuit or write data into the computation circuit according to the data access instruction.

Metadata:
- Claim Count in Document: 9.0
- Percentile: 95.0
- Lexical Diversity: 1.72
- Patent Class: 708.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: False
- Related Applications: ['13965459', '14287701', '14308273', '14731933', '14025299']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.4076548345250747
- 35 USC 102 Novelty (BERT): 0.5128367327188185
- Combined Prediction Score: 0.4181730243444491
- Mean Citation Score: 191.697904
- Max Citation Score: 210.35286
- Similarity Product: 133.278242345016

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 0
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test