PATENT CLAIM ANALYSIS

Application Number: 16311858
Application Type: Utility
Filing Date: 2018-12
Publication Date: 2019-06
Patent Classification: ["338", "320000"]

Abstract:
Provided is a surface-mountable thin film resistor network, which includes a chip, on which a thin film resistor network integrated array is formed, and a molded resin package, which encapsulate the chip. The surface-mountable thin film resistor network is provided with a chip ( 13 ) on which a thin film resistor integrated array has been formed; an island ( 12 ) on which the chip is fixed; a plurality of lead terminals ( 14 ) extending outward around periphery of the island; wires ( 15 ) connecting electrodes of resistors mounted on the chip to the lead terminals; and a molded resin package ( 20 ) that encapsulate a portion, which includes the wires; wherein a hanging lead ( 18 ) extending from the island is cut at an end surface of the molded resin package, and an electrical insulation ( 21 ) is applied to the cut section of the hanging lead.

Claim (Index 2):
The thin film resistor network of  claim 1 , wherein the cut section is covered by an insulative resin.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 98.0
- Lexical Diversity: 2.45588
- Patent Class: 338.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['10136368', '13173248', '15370436', '13537314', '13320528']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6974908935469645
- 35 USC 102 Novelty (BERT): 0.474333281222316
- Combined Prediction Score: 0.6751751323144995
- Mean Citation Score: 160.77982400000005
- Max Citation Score: 163.0913
- Similarity Product: 106.7543876381457

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test