PATENT CLAIM ANALYSIS

Application Number: 15874342
Application Type: Utility
Filing Date: 2018-01
Publication Date: 2018-09
Patent Classification: ["257", "139000"]

Abstract:
To obtain a semiconductor device in which a reduction in channel formation density in a trench extending direction is suppressed, provided is a semiconductor device including a first region and a second region alternately arranged in the trench extending direction. The first region includes a first front surface semiconductor electrode layer of a first conductivity type having a portion along an outer side surface of the trench from the front surface of the semiconductor device to the first height to which a gate electrode is embedded into the trench. The second region includes a base contact region having a depth from the front surface of the semiconductor device to the second height higher than the first height and a second front surface semiconductor electrode layer of the first conductivity type from the first height to the second height.

Claim (Index 3):
The semiconductor device according to  claim 1 , wherein the second front surface semiconductor electrode layer has an upper portion in contact with the first electrode.

Metadata:
- Claim Count in Document: 11.0
- Percentile: 86.0
- Lexical Diversity: 2.67925
- Patent Class: 257.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['15825896', '15816481', '14737314', '14647187', '12379076']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9334710820969636
- 35 USC 102 Novelty (BERT): 0.5033999111542898
- Combined Prediction Score: 0.8904639650026961
- Mean Citation Score: 263.381814
- Max Citation Score: 278.75644
- Similarity Product: 219.26193835478784

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test