PATENT CLAIM ANALYSIS

Application Number: 15923229
Application Type: Utility
Filing Date: 2018-03
Publication Date: 2019-03
Patent Classification: ["365", "185170"]

Abstract:
In a semiconductor memory device of an embodiment, a write circuit includes an inversion circuit configured to invert write data and output the inverted write data, a first switch configured to pass or stop a current for programming a first memory cell in the first memory cell array to a selected bit line of the first memory cell array, a second switch configured to pass or stop a current for programming a second memory cell in the second memory cell array to a selected bit line of the second memory cell array, and a gate circuit configured to program one of the first memory cell and the second memory cell, and unprogram another of the first memory cell and the second memory cell simultaneously, by controlling the first switch based on the write data and controlling the second switch based on the inverted write data.

Claim (Index 9):
The semiconductor memory device according to  claim 1 ,\n wherein the first and second memory cell arrays are NOR-type flash memory cells.

Metadata:
- Claim Count in Document: 20.0
- Percentile: 90.0
- Lexical Diversity: 3.23404
- Patent Class: 365.0
- Transitional Phrase Type: none
- Component Type: 0
- Foreign Priority: True
- Related Applications: ['11090660', '13608185', '13354884', '12696608', '12134705']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.7912622626045662
- 35 USC 102 Novelty (BERT): 0.4372071743446213
- Combined Prediction Score: 0.7558567537785718
- Mean Citation Score: 122.58429420000002
- Max Citation Score: 125.100075
- Similarity Product: 104.57597070658656

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test