PATENT CLAIM ANALYSIS

Application Number: 15962573
Application Type: Utility
Filing Date: 2018-04
Publication Date: 2018-11
Patent Classification: ["365", "189140"]

Abstract:
Disclosed is an SRAM cell capable of performing a differential operation. An SRAM cell according to an embodiment of the present disclosure may include a data node portion including four transistors constituting first and second data nodes; a data controller including first and second pass-gate transistors configured to control read and write of data in the first and second data nodes; and a control transistor connected to the data node portion through the second data node and configured to be controlled based on a driving voltage of a second word line having an opposite polarity to a first word line transmitting a driving voltage to the data controller.

Claim (Index 16):
The SRAM cell according to  claim 6 , further comprising a signal delay processor configured to control write yield delay based on at least one inverter comprised in a write yield delay controller and control read yield delay based on at least one inverter comprised in a read yield delay controller.

Metadata:
- Claim Count in Document: 25.0
- Percentile: 91.0
- Lexical Diversity: 2.03636
- Patent Class: 365.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: True
- Related Applications: ['12259009', '14285410', '12727985', '12209657', '12533394']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.8107485737679115
- 35 USC 102 Novelty (BERT): 0.5018692887990447
- Combined Prediction Score: 0.7798606452710249
- Mean Citation Score: 266.069232
- Max Citation Score: 275.7667
- Similarity Product: 183.70834110881688

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test