PATENT CLAIM ANALYSIS

Application Number: 16243029
Application Type: Utility
Filing Date: 2019-01
Publication Date: 2019-07
Patent Classification: ["455", "574000"]

Abstract:
Methods and apparatus relating to advanced graphics Power State management are described. In one embodiment, measurement logic detects information about idle transitions and active transitions of a power-well of a processor. In turn, determination logic determines performance loss and/or energy gain based at least in part on the detected information and power-on latency of the power-well of the processor. Other embodiments are also disclosed and claimed.

Claim (Index 17):
The one or more non-transitory computer-readable medium of  claim 13 , further comprising one or more instructions that when executed on the at least one processor configure the at least one processor to perform one or more operations to cause decreasing an operating frequency of the processor for an idle period of the processor in response to disallowance of power-gating of a power-well from the plurality of power-wells.

Metadata:
- Claim Count in Document: 7.0
- Percentile: 99.0
- Lexical Diversity: 1.38462
- Patent Class: 455.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['15720906', '15719541', '14841362', '15856048', '13539414']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.6719504544654945
- 35 USC 102 Novelty (BERT): 0.503365706647301
- Combined Prediction Score: 0.6550919796836752
- Mean Citation Score: 183.096052
- Max Citation Score: 261.69254
- Similarity Product: 199.6275803794408

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test