PATENT CLAIM ANALYSIS

Application Number: 16391600
Application Type: Utility
Filing Date: 2019-04
Publication Date: 2019-08
Patent Classification: ["257", "522000"]

Abstract:
A memory device with a dielectric layer or an air gap between contacts and a method of making the same are disclosed. The method comprises a series of steps including forming a plurality of conductive lines having trenches therebetween; forming a contact layer in the trench; and forming a dielectric layer interposed in the contact layer and configured to divide the contact layer into two contacts. The method also comprises removing the dielectric layer to form a space and forming a cap layer over the two contacts to form an air gap therein. The method further comprises forming a second air gap between the conductive line and the two contacts.

Claim (Index 18):
The microelectronic device of  claim 15 , further comprising first active regions and second active regions in the base material, wherein:\n the first active regions are laterally spaced between adjacent recessed gate structures; and the second active regions are laterally spaced between one of the recessed gate structures and one of the shallow trench isolation regions with each of the shallow trench isolation regions being bordered by two of the second active regions.

Metadata:
- Claim Count in Document: 15.0
- Percentile: 100.0
- Lexical Diversity: 2.14815
- Patent Class: 257.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14993099', '13443133', '15173132', '16049849', '10162173']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.9007353732758876
- 35 USC 102 Novelty (BERT): 0.4905388935042264
- Combined Prediction Score: 0.8597157252987215
- Mean Citation Score: 140.853454
- Max Citation Score: 165.7338
- Similarity Product: 108.74657586747408

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 0
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test