PATENT CLAIM ANALYSIS

Application Number: 16004507
Application Type: Utility
Filing Date: 2018-06
Publication Date: 2019-05
Patent Classification: ["711", "103000"]

Abstract:
Systems, apparatuses and methods may provide for communicating, by a common layer, with a local block storage system and communicating, by a subsystem layer that is communicatively coupled to the common layer, with one or more subsystems. Additionally, the common layer may be disassociated with one or more hardware specific components of the subsystem layer. In one example, the common layer may export one or more callback functions to the subsystem layer, wherein the callback functions include a registration and/or deregistration function.

Claim (Index 1):
A memory architecture comprising:\n a power supply to provide power to the memory architecture; one or more subsystems; and a local block storage system including:\n local block storage, \n a common layer communicatively coupled to the local block storage, and \n a subsystem layer communicatively coupled to the common layer, the subsystem layer to communicate with the one or more subsystems, wherein the common layer is disassociated with one or more hardware specific components of the subsystem layer.

Metadata:
- Claim Count in Document: 65.0
- Percentile: 94.0
- Lexical Diversity: 1.9375
- Patent Class: 711.0
- Transitional Phrase Type: open
- Component Type: 1
- Foreign Priority: False
- Related Applications: ['14998061', '14133803', '14815012', '11118466', '11473298']

Analysis Scores:
- 35 USC 101 Eligibility (BERT): 0.425187729903683
- 35 USC 102 Novelty (BERT): 0.444893146693504
- Combined Prediction Score: 0.4271582715826651
- Mean Citation Score: 62.39526899999999
- Max Citation Score: 98.15852
- Similarity Product: 78.4295375194502

Labels:
- Claim Label 101: 1
- Claim Label 102: 1
- Claim Label 103: 1
- Claim Label 112: 1
- Combined Label: 1
- Label 101 Adjusted: 1

Dataset: test