Patent Document ID: 9460255
Application ID: 14678708
Patent Status: 1

Claim One:
1. A method performed by a computer system for estimating a trial PPA metric for an integrated circuit design evaluated at a trial design point, the method comprising: receiving an integrated circuit design, the integrated circuit design comprising a plurality of blocks, the blocks comprising a plurality of circuit components; receiving a reference PPA (power, performance, area) metric for the integrated circuit design evaluated at a reference design point; estimating trial component-level PPA metrics for the circuit components evaluated at the trial design point, wherein the estimating comprises: accessing a PPA database that contains PPA metrics for multiple test components evaluated at multiple design points; determining, by the computer system, scale factors for the circuit components in the integrated circuit design, the scale factors based on: scaling from (a) the reference design point to (b) the trial design point, of equivalent test components to the circuit components; and applying the scale factors to the reference PPA metric to determine the trial component-level PPA metrics for the trial design point; combining the trial component-level PPA metrics to obtain trial block-level PPA metrics for the blocks in the integrated circuit design; and combining the trial block-level PPA metrics to obtain the trial PPA metric for the integrated circuit design evaluated at the trial design point, wherein the integrated circuit design is providable for subsequent design and manufacturing of the integrated circuit.