Patent Document ID: 20030105547
Application ID: 09737398
Patent Status: 0

Claim One:
1. A method for repairing defects in semiconductor wafers utilizing a repair tool having means for applying energy to obliterate defects at locations on said wafer, said method being a graphical approach implementing a graphical user interface (GUI) comprising a pixel screen display and comprising the steps of: a) via said interface, identifying a wafer defect to repair and enclosing said defect within a polygonal repair outline drawn using a default line thickness; b) graphically adjusting the line thickness to modify the enclosed polygonal repair outline area; c) automatically detecting one or more areas within an interior region of the modified polygonal repair outline area; and, d) scanning said modified polygonal repair outline, and for each pixel location inside said one or more detected areas, initiating said means for applying energy to said wafer coordinated to said pixel location for repairing said defect, whereby the identification of said pixel location is accomplished using standard graphical tools with minimal operator intervention.