Patent Document ID: 10089783
Application ID: 15219114
Patent Status: 1

Claim One:
1. A method of operating a graphics processing pipeline that comprises a tessellation stage, the method comprising: the tessellation stage tessellating a patch that represents at least some or all of an object to be rendered, wherein tessellating the patch comprises: generating a tessellation vertex coordinate pair for a vertex of a tessellation primitive for the patch, the tessellation vertex coordinate pair being represented using a first binary representation; encoding the tessellation vertex coordinate pair that is represented using the first binary representation into a second binary representation, wherein encoding the tessellation vertex coordinate pair comprises: mapping the tessellation vertex coordinate pair that is represented using the first binary representation to a mapped coordinate pair that can be represented using the second binary representation, wherein the mapped coordinate pair that can be represented using the second binary representation defines within a parameter space a location that represents a position that is: outside the patch; or within the patch but in-between locations within the parameter space that represents positions that a vertex of a tessellation primitive for the patch can have; and representing the mapped coordinate pair using the second binary representation; and at least one of transferring, storage and accessing the mapped coordinate pair that is represented using the second binary representation for use when generating a render output.