Patent Document ID: 6104415
Application ID: 09048024
Patent Status: 1

Claim One:
1. A method for accelerating minified texture cache access, said method receiving a level of detail (LOD) value and comprising: determining by a graphics system starting addresses of textures in corresponding s and t coordinates and levels of detail of the texture, said texture comprising tiles of texels stored in a memory; reading, for each cache tile, successions of each of the texels of the texture from the memory based on the starting addresses of a first of the succession of texels and the corresponding level of detail (LOD) value, each texel in each succession of texels read having a texture address a distance of 2.sup.LOD texels from a texture address of a previous texel in the succession of texels for each of the levels of detail, wherein each texel is read from the memory based upon a table entry indicating whether each texel is stored in the texture cache.