Patent Document ID: 20040100474
Application ID: 10306460
Patent Status: 0

Claim One:
1. A graphics processing circuit, comprising: an anti-aliasing and stippling circuit operative to provide a primitive texture coordinate set in response to vertex data, the anti-aliasing and stippling circuit performing anti-aliasing operations, in parallel, with at least one appearance attribute determination operation on the vertex data; a rasterizer, coupled to the anti-aliasing and stippling circuit, operative to generate a pixel texture coordinate set in response to the primitive texture coordinate set, and apply an appearance value to a pixel defined by the pixel texture coordinate set; and a texture circuit, coupled to the rasterizer, operative to retrieve the appearance value from a corresponding one of a plurality of textures in a multi-texture map in response to the pixel texture coordinate set, the multi-texture map including data representing point, line and polygon texture data.