Patent Document ID: 7487078
Application ID: 10326679
Patent Status: 1

Claim One:
1. A method of order reduction system for describing an electronic component in circuit simulation or analysis tools, the method comprising: determining a set of points from a representation of a distributed time invariant system of a component used in the design of an Integrated Circuit (IC); computing a basis for a projection operation of the set of points; projecting system matrices to obtain smaller matrices; performing a global interpolation of the smaller matrices; verifying a passivity and accuracy of the interpolants of the smaller matrices and if the interpolants of the smaller matrices are not passive and accurate, increasing an order of the global interpolant; reformatting the interpolant projected system matrices as a state-space system; utilizing the state-space system as a simplified model of the component in a simulation of the component in order to reduce an amount of processing required to perform the simulation; and storing the state-space system in a computer-readable medium.