Patent Document ID: 8788560
Application ID: 13293061
Patent Status: 1

Claim One:
1. A method for executing a decimal elementary function (DEF) computation from a first decimal floating-point operand (DFPO) operand and a second DFPO, comprising: extracting a first mantissa and a first biased exponent from the first DFPO and a second mantissa and a second biased exponent from the second DFPO; generating a first normalized mantissa by shifting the first mantissa based on a number of leading zeros in the first mantissa; generating a second normalized mantissa by shifting the second mantissa based on a number of leading zeros in the second mantissa; calculating, using a decimal logarithm hardware unit (DLHU) implementing a first digit recurrence algorithm, a plurality of approximations for a logarithm of the first normalized mantissa; calculating, using a decimal multiplier hardware unit (DMHU) and the plurality of approximations for the logarithm, a plurality of approximations for a product of the second normalized mantissa and a first sum based on the logarithm of the first normalized mantissa and the first biased exponent; generating a plurality of shifted values by shifting the plurality of approximations for the product based on the second biased exponent; generating a plurality of fraction components from the plurality of shifted values; calculating, using a decimal antilogarithm hardware unit (DAHU) implementing a second digit recurrence algorithm, an antilog based on the plurality of fraction components; and outputting a decimal floating-point result of the DEF computation comprising a resultant mantissa based on the antilog and a resultant biased exponent based on at least one integer component of at least one of the plurality of shifted values.