Patent Document ID: 10018996
Application ID: 12692000
Patent Status: 1

Claim One:
1. A method for enhancing yield in an integrated circuit manufacturing process, comprising the steps of: providing a computer system having a processor and memory and programmed with a simulation model of an integrated circuit manufacturing process, the simulation model when executed by the computer system predicting, in dependence upon a plurality of process input parameters, a value for a performance parameter of an integrated circuit product to be manufactured using the manufacturing process; in a particular run of the manufacturing process, actually fabricating a particular integrated circuit product; measuring an actual value for the product performance parameter from the particular integrated circuit product and providing the actual value to the computer system; the computer system estimating, in dependence upon the simulation model and in dependence upon the actual value for the product performance parameter, past values for a calculated subset of the process input parameters that actually existed for the particular run prior to said estimating, the estimated values for the calculated subset of the process input parameters being usable for yield management, the estimated values including at least one non-measured or non-measurable parameter of the product; and adjusting the integrated circuit manufacturing process in dependence upon the estimated past values for the calculated subset of the process input parameters that actually existed for the particular run prior to said estimating.