Patent Document ID: 9070622
Application ID: 14026753
Patent Status: 1

Claim One:
1. A method for semiconductor fabrication process control, the method comprising: receiving a first semiconductor device wafer, the first semiconductor device wafer having a first patterned material layer thereon and being fabricated under a first set of parameters; receiving a second semiconductor device wafer, the second semiconductor device wafer having a second patterned material layer thereon, the first and second patterned material layers being patterned with a common mask; collecting metrology data from the first and second semiconductor device wafers, the metrology data including a first set of vectors associated with the first semiconductor device wafer and a second set of vectors associated with the second semiconductor device wafer; determining a similarity index based in part on a similarity index value between a first vector from the first set of vectors and a second vector from the second set of vectors; and continuing to process additional wafer under the first set of parameters when the similarity index is above a threshold value.