Patent Document ID: 20070113211
Application ID: 11282003
Patent Status: 0

Claim One:
1. A method for predicting the signal delay in a circuit having circuit paths formed by elements connected by interconnects wherein: (1) at least some of the circuit paths intersect, (2) each element and interconnect have an associated signal delay, (3) at least one set of correlated signal delays is present, wherein at least one of the signal delays X therein is correlated with at least one of the other signal delays Y therein such that cov(X, Y) is nonzero, (4) one or more sets of correlated signal delays may arise from global correlation, wherein the signal delays therein are all dependent on global variations; the method comprising the steps of: a. modeling each signal delay X by: X = μ X + ∑ i = 1 N ⁢ α X , i ⁢ R i + ∑ j = 1 M ⁢ β X , j ⁢ G j wherein: μ X is the mean of a distribution defining X; N is the number of signal delays in the circuit; M is the number of global variations in the circuit; R i and G j are each Gaussian random variables; α X,i is a node sensitivity reflecting the dependence of X on signal delay i in the circuit; β Xj is a global sensitivity reflecting the dependence of X on global variation j in the circuit; and b. subsequently propagating the modeled signal delays throughout at least one of the circuit paths.