Patent Document ID: 7485548
Application ID: 11276719
Patent Status: 1

Claim One:
1. A method for in-line prediction of die loss for a semiconductor wafer including a plurality of dice during a manufacturing process, the method comprising: detecting defects each identified by a defect type i of a plurality of defect types on the wafer; producing in-line defect data including a defective die quantity m representative of a number of defective dice on the wafer and defect quantities each being a number n i of detected defects identified by the defect type i on each of the defective dice, the defective dice each being a die having at least one of the detected defects; receiving a plurality of kill ratios each being a kill ratio λ i produced for the defect type i of the plurality of defect types using off-line historical defect data resulting from inspection of previously fabricated semiconductor wafers; and producing an estimated die loss (EDL) for the wafer as a function of the plurality of kill ratios, an estimated yield of baseline dice Y bl , the defective die quantity m, and the defect quantities, the baseline dice each being a die having none of the detected defects.