Patent Document ID: 9003251
Application ID: 12767948
Patent Status: 1

Claim One:
1. A system-on-a-chip (SOC) comprising: a memory; and a Built-in Self Test (BIST) unit coupled to the memory, the BIST unit configured to compute a signature based on contents from a window of the memory, receive a pre-computed signature associated with the contents from the window of the memory, compare the computed signature with the pre-computed signature, and determine whether a window reduction is required for the window of the memory, and if so, reduce the window of the memory into a plurality of reduced windows to identify at least one fault present in the memory based on the results of the comparison of the pre-computed signature and the computed signature, generate a plurality of reduced computed signatures from contents in the plurality of reduced windows of the memory, and compare a plurality of reduced pre-computed signatures with the plurality of reduced computed signatures.