Patent Document ID: 7673284
Application ID: 11333614
Patent Status: 1

Claim One:
1. A computer implemented method for generating versioned codes usable in a single instruction multiple data processor unit that uses a memory system having an alignment constraint, comprising: inserting reorganization operations into a code in a computer memory, the code representing a loop with misaligned accesses to satisfy alignment constraints, the reorganization operations operating to enforce a stream offset; identifying in the loop stream shift operations with runtime relative alignments wherein a stream shift operation is an operation that shifts all values of a register stream with a first offset across consecutive registers of the register stream to a second offset; versioning the loop based on the runtime relative alignment creating loop versions, wherein the loop is versioned using a guard condition that runtime relative alignment between pairs of misaligned references is a compile-time value, and wherein the loop is versioned by removing shift stream operations from a faster version where runtime relative alignment between pairs of misaligned references corresponding to the shift stream operations is zero; and generating code for the loop versions, the code for loop versions upon executing in the single instruction multiple data processor unit that uses the memory system having the alignment constraint, manipulating data in the memory system.