Patent Document ID: 9799350
Application ID: 15186286
Patent Status: 1

Claim One:
1. An apparatus for verifying an utterance in a speech recognition system, the apparatus comprising: a noise processor configured to process noise of an input speech signal; a feature extractor configured to extract features of speech data obtained through the noise processing; an event detector configured to detect events of the plurality of speech features occurring in the speech data using the noise-processed data and data of the extracted features; a decoder configured to perform speech recognition using a plurality of preset speech recognition models for the extracted feature data; and an utterance verifier configured to calculate confidence measurement values in units of words and sentences using information on the plurality of events detected by the event detector and a preset utterance verification model, and perform utterance verification according to the calculated confidence measurement values, wherein the utterance verification model includes a smoothing anti-model, a specific anti-model, a filler model, and a support vector machine (SVM) model.