Patent Document ID: 9255787
Application ID: 14160217
Patent Status: 1

Claim One:
1. A method for measuring a semiconductor wafer critical dimension, the method comprising: obtaining an image of the semiconductor wafer; identifying a plurality of metrology targets from the image of the semiconductor wafer, a respective metrology target of the plurality of metrology targets including an unresolved grid, a first resolved feature and a second resolved feature, wherein at least one of the first resolved feature and the second resolved feature is tilted at an angle with respect to the unresolved grid; defining a first region of interest (ROI) for the first resolved feature of the respective metrology target of the plurality of metrology targets and a second ROI for the second resolve feature of the respective metrology target of the plurality of metrology targets; determining a series of center points between the first ROI and the second ROI as the first ROI and the second ROI are being shifted; calculating a summation of the center points between the first ROI and the second ROI defined for the plurality of metrology targets; and measuring the critical dimension based on a symmetry analysis of the summation of the center points between the first ROI and the second ROI defined for the plurality of metrology targets.