Patent Document ID: 8627266
Application ID: 13564827
Patent Status: 1

Claim One:
1. A test map classification method comprising: at least one processor which executes: modifying test data by converting the test data to a test map including a wafer identifier, a coordinate, and data on whether a predetermined failure item occurs; calculating similarities of wafer pairs in the test map; performing similarity filtering to reset all the similarities, except for at least one similarity, on the basis of a predetermined wafer; determining whether there are similar wafers by comparing the filtered similarities with a reference value; and classifying spatial patterns using a similar relationship between the wafer pairs when there are similar wafers, wherein the calculating similarities of wafer pairs comprises: calculating the similarities using similarity indexes corresponding to predetermined coordinates of the wafer pairs, the similarity indexes being values that depend on whether chips corresponding to the predetermined coordinates are failed or good, and wherein the test map comprises a first wafer test map and a second wafer test map, classified by the wafer identifier, and wherein the similarity indexes comprises a first similarity index that indicates when both chips corresponding to any one coordinate in the first and second wafer test maps are good, a second similarity index that indicates when one chip corresponding to any one coordinate in the first and second wafer test maps is good and the other chip is failed, and a third similarity index that indicates when both chips corresponding to any one coordinate in the first and second wafer test maps are failed.