Patent Document ID: 20030077526
Application ID: 10305002
Patent Status: 0

Claim One:
1. A method of fabricating an integrated circuit, comprising the steps of: applying a photosensitive material at a surface of a semiconductor wafer; exposing the photosensitive material to electromagnetic energy through a binary photomask, the binary photomask having a plurality of opaque regions at a surface thereof to block selected locations of the photosensitive material from exposure to the electromagnetic energy, the plurality of opaque regions including first and second opaque regions disposed near one another and defining a first aperture therebetween through which the photosensitive material is exposed to the electromagnetic energy; and exposing the photosensitive material to electromagnetic energy at a selected wavelength through a phase shift photomask, the phase shift photomask having an opaque film at a surface thereof in which a plurality of apertures are formed to define locations at which the photosensitive material is exposed to the electromagnetic energy, the plurality of apertures including first and second phase shift apertures separated from one another on the photomask by a first opaque region of the opaque film, the first phase shift aperture constructed to transmit electromagnetic energy at substantially an opposite phase from the electromagnetic energy transmitted by the second phase shift aperture, and the plurality of apertures also including a third aperture in the opaque film separated from the first and second phase shift apertures; wherein the binary photomask and the phase shift photomasks are aligned in their respective exposing steps so that the first opaque region of the phase shift photomask corresponds to a first integrated circuit location that also corresponds to the first opaque region of the binary photomask; and wherein the binary photomask and the phase shift photomasks are aligned in their respective exposing steps so that the third aperture of the phase shift mask corresponds to a second integrated circuit location that also corresponds to the first aperture of the binary photomask.