Patent Document ID: 8532964
Application ID: 13405860
Patent Status: 1

Claim One:
1. A method for simulating a processing step used in semiconductor manufacturing lithography according to a Wiener model thereof, comprising: receiving a plurality of input signals representing spatial distributions of predetermined physical or chemical quantities; convolving each of said input signals with each of a plurality of predetermined Wiener kernels to generate a plurality of convolution results; cross-multiplying at least two of said convolution results corresponding to two of the predetermined Wiener kernels represented by two orthogonal functions to produce at least one cross-product; computing a first weighted summation of said plurality of convolution results and said at least one cross-product using a respective first plurality of predetermined Wiener coefficients to generate a first Wiener output; and generating a processing step simulation result based at least in part on said first Wiener output.