Patent Document ID: 8359555
Application ID: 12868694
Patent Status: 1

Claim One:
1. A non-transitory computer readable medium comprising multiple instructions upon executing these instructions stored in a computer readable device, upon executing these instructions, a computer performing the following steps: (a) providing a first semiconductor layout and a second semiconductor layout predetermined to be fabricated on different material layers of a semiconductor device, the second semiconductor layout comprising a circuit pattern; (b) setting a forbidden area with respect to the circuit pattern of the second semiconductor layout on the first semiconductor layout according to a restriction condition; (c) defining at least a virtual pattern arrangement area on a portion of the first semiconductor layout which does not correspond to the forbidden area; and (d) selecting a positioning point at a boundary of the virtual pattern arrangement area and providing a virtual pattern array in the virtual pattern arrangement area by taking the positioning point as an origin of a coordinate system of the virtual pattern array.