Patent Document ID: 9639774
Application ID: 13708864
Patent Status: 1

Claim One:
1. A method, comprising: processing a first semiconductor product along a reference processing path to form a first processing pattern on the first product; processing a second semiconductor product along an alternative processing path to form a second processing pattern on the second product; determining a similarity index quantifying a similarity between the first processing pattern and the second processing pattern, wherein the similarity index=Σ(a i −μ a )*(b i −μ b )/(n−1)*σ a *σ b , wherein a i and b i are values of processing parameters at a corresponding location i in the specific processing pattern and reference processing pattern, respectively, μ a and μ b are the average value of the processing parameters of the specific processing pattern and the reference processing pattern, respectively, and σ a and σ b are the standard deviation of the processing parameters of the specific processing pattern and the reference processing pattern, respectively, wherein the alternative processing path and the reference processing path have a common end and first and second respective free ends, wherein the first free end comprises a first tool and the second free end comprises a second tool, wherein the common end comprises a third tool, wherein the first tool and the second tool are either an etcher or a deposition tool, and wherein the third tool is a stepper or an etcher; and confirming applicability of the alternative processing path if the similarity index is no less than a threshold, wherein the threshold ranges between 0.65 and 1.