Patent Document ID: 7987436
Application ID: 12372429
Patent Status: 1

Claim One:
1. A mask for use in the manufacture of an integrated circuit device, the mask comprising: a transparent substrate having a plurality of mask features and sub-resolution assist features disposed thereon, the plurality of mask features comprising: first and second nearest neighbor mask features spaced from each other along a first direction by a first distance, and a third nearest neighbor mask feature spaced from the first and second nearest neighbor mask features along the first direction by a second distance different from the first distance; and the sub-resolution assist features comprising: sub-resolution assist features spaced at various distances away from the plurality of mask features, wherein the sub-resolution assist features are spaced away from the plurality of mask features depending on a predetermined relationship between a target critical dimension aspect ratio (CD x /CD y ) or critical dimension difference (CD y-x ) to be imaged and the spacing between the nearest neighbor mask features and wherein a resulting printed critical dimension aspect ratio (CD x /CD y ) or difference in printed critical dimensions (CD y-x ) of a feature of the integrated circuit imaged by exposure of a corresponding mask feature is controlled by the spacing of the sub-resolution assist features away from the corresponding mask feature.