Patent Document ID: 20110209107
Application ID: 13028525
Patent Status: 0

Claim One:
1. A mask-layout creating method for generating, using a coherence map method, a mask layout in which an auxiliary pattern is formed with respect to a design layout, the mask-layout creating method comprising: setting a design layout highly likely to be a dangerous point in a lithography process; setting, with respect to the set design layout, a coherence map kernel to generate the mask layout; creating, based on the set coherence map kernel and the set design layout, the coherence map; extracting the auxiliary pattern from the created coherence map, shaping the auxiliary pattern, and generating the mask layout; defining a cost function for evaluating an optimization degree of the mask layout and evaluating the generated mask layout using the cost function; and changing, to improve the evaluated optimization degree of the mask layout, at least one of parameters in setting the coherence map kernel and parameters in extracting and shaping the auxiliary pattern.