Patent Document ID: 20040221206
Application ID: 10479028
Patent Status: 0

Claim One:
1. A device for validating a data flow processing circuit ( 1 ), said circuit having inputs/outputs ( 6 ) and including firstly at least one microprocessor ( 3 ) intended to cooperate with a memory external to the circuit and secondly at least one specialized unit ( 2 ) for performing a partial processing of the data, the microprocessor ( 3 ) or the unit ( 2 ) comprising registers (R i -R n ), which device is characterized in that it includes a read memory ( 4, 5 ) containing, in addition to an operating system necessary for the functioning of the microprocessor and the specialized unit: a set of data suitable to supply a known data flow representing a data flow which could be received by the circuit in normal operation, a set of theoretical values which is to appear during processing at at least one given instant in at least one of the registers of the microprocessor or the specialized unit, instructions for effecting a validation, including instructions for loading the data to be processed by organizing the data in a flow and sequentially comparing values present in registers with said theoretical values, and instructions for supplying a signature representing results of said comparisons.