Patent Document ID: 8812905
Application ID: 13735588
Patent Status: 1

Claim One:
1. A semiconductor device, comprising: a plurality of processors configured to perform a plurality of respective processing functions; a spare processor configured to perform the plurality of respective processing functions; a plurality of first switches located at respective inputs of the plurality of processors, each of the plurality of first switches configured to selectively provide an input signal to a respective one of the plurality of processors and the spare processor; and a first multiplexer located at an input of the spare processor, the first multiplexer configured to i) receive the input signals from each of the plurality of first switches, and ii) route, to the spare processor, a selected one of the input signals corresponding to a failed one of the plurality of processors, wherein the spare processor is further configured to perform a processing function associated with the failed one of the plurality of processors in response to receiving the selected one of the input signals.