Patent Document ID: 20150169816
Application ID: 14631539
Patent Status: 0

Claim One:
1. A method comprising: determining a first mapping associated with a first instance of a first module of a register level circuit design and a second mapping associated with a second instance of the first module, wherein the first mapping is for mapping a first input sequence of signal transition representations received by the first instance to a common sequence of signal transition representations, and the second mapping is for mapping a second input sequence of signal transition representations received by the second instance to the common sequence; determining whether the first instance and the second instance share a common usage, wherein the common usage is associated with a result sequence of signal transition representations that was generated by a previous propagation of the common sequence through the common usage, and each signal transition representation represents a non-deterministic transition from a previous signal state to a set of one or more possible signal states; and in response to determining that the first instance and the second instance share the common usage, mapping the result sequence of signal transition representations to an output sequence of signal transition representations for the second instance using the second mapping.