Patent Document ID: 10062160
Application ID: 15709856
Patent Status: 1

Claim One:
1. A system, comprising: one or more processors configured to: receive a reference design comprising a physical layout file of a semiconductor device; identify features of interest in the received reference design, wherein a feature of interest comprises a representation of a portion of the semiconductor device to be monitored; for each identified feature of interest, extract, from the received reference design, a pattern within a particular radius of the identified feature of interest; determine a set of distinct reference patterns at least in part by evaluating the patterns extracted from the received reference design; include the set of distinct reference patterns, determined from the received reference design, in a pattern tracking database; and track a reference pattern in the pattern tracking database at least in part by updating the reference pattern with empirical information associated with a printed pattern determined to match to the reference pattern; and a memory coupled to the one or more processors and configured to provide the one or more processors with instructions.