Patent Document ID: 8761491
Application ID: 13118526
Patent Status: 1

Claim One:
1. A processor to perform stereo matching of a first image and a second image, comprising: a first pipeline stage including a first process element of the processor configured to generate data costs associated with a first tile selected from the first image, wherein the data costs are generated based on pixels in the first tile and corresponding pixels in the second image; a second pipeline stage including a second process element of the processor configured to generate disparity values associated with the first tile and an outbound message from the first tile to one of neighboring tiles in the first image, wherein the disparity values and the outbound message are generated based on the data costs and inbound messages from the neighboring tiles to the first tile; and a third pipeline stage including a third process element of the processor configured to store the disparity values and the outbound message in a memory, wherein the outbound message is used by the second pipeline stage as one of the inbound messages during processing of a second tile selected from the first image, wherein a first parallelism-degree of the first pipeline stage and a second parallelism-degree of the second pipeline stage are determined based on a number of inner iterations in processing the pixels of the first tile.