Patent Document ID: 8554522
Application ID: 12639017
Patent Status: 1

Claim One:
1. A computerized apparatus having a processor, the computerized apparatus comprising: an input module configured to receive a model comprising at least one variable, the at least one variable is associated with a domain; an augmented-domain simulator configured to utilize the processor to simulate an execution of the model using an augmented-domain, the augmented-domain comprising the domain and an unknown value, said augmented-domain simulator comprising: a state repository for retaining states of the model determined by said augmented-domain simulator; and a fix-point determinator configured to identify convergence to a fix-point by said augmented-domain simulator based on said state repository; and design redundancy detector configured to determine a design redundancy in accordance with the states retained in said state repository, wherein the design redundancy detector comprises an unobservable variables detector, wherein said design redundancy detector comprises a mergeable variables detector configured to identify a first variable having a first value that is represented by a mapping from a second value of a second variable.