Patent Document ID: 8510689
Application ID: 13210179
Patent Status: 1

Claim One:
1. A computer implemented method implementing an integrated circuit design, comprising: using at least one processor to perform a process, the process comprising: identifying a circuit feature to be designed in the integrated circuit design; identifying information or data for the circuit feature from at least one of a set comprising a prior design that includes the circuit feature, a random density of circuit features around the circuit feature in the integrated circuit design, or one or more design rules or constraints; and generating at least one context or environment, which includes at least one circuit feature with a random dimension or a random size, based at least in part upon the information or data that are identified to predict potential interactions between the circuit feature and the at least one context or environment during manufacturing by positioning the circuit feature at a plurality of locations within the at least one context or environment, wherein the potential interactions comprise a variation in the circuit feature caused by the at least one circuit feature with the random dimension or the random size in the at least one context or environment.