Patent Document ID: 20090110262
Application ID: 12257551
Patent Status: 0

Claim One:
1. An evaluation object pattern determining apparatus for use in a pattern evaluating system having a CAD data managing section storing patterns of a LSI chip as CAD data, a simulator for picking out coordinates of local patterns whose process margin is small out of the pattern of the LSI chip from the CAD data by way of simulation and an observation instrument for assisting observation of the local patterns of the LSI chip produced in a fabrication line; the evaluation object pattern determining apparatus determining coordinates of the local patterns to be observed by the observation instrument out of the coordinates of the local patterns picked out by the simulator and comprising: a risk level map creating section for creating a risk level map in which risk areas are disposed on the pattern of the LSI chip; the risk areas being assigned with risk levels obtained by digitizing that the risk area is an area whose process margin is smaller than that of other areas by the CAD data and at least one of fabrication data acquired in the fabrication line; and a superimposition processing section for superimposing the coordinates of the local patterns with the risk level map to pick out the coordinates of the local patterns located within the risk area.