Patent Document ID: 9880892
Application ID: 14187783
Patent Status: 1

Claim One:
1. A method of managing semiconductor manufacturing defects, the method comprising: determining a cumulative aging parameter for each of a plurality of first IC products produced with a manufacturing line and included within a shared system, wherein each of the plurality of first IC products are communicatively connected to a reliability model for the manufacturing line, and wherein the cumulative aging parameter is dependent on a product operating condition; calculating an observed defect rate for the plurality of first IC products based on the cumulative aging parameter for each of the plurality of first IC products; adjusting the reliability model for the manufacturing line in response to the observed defect rate being different from an initial predicted defect rate for the plurality of first IC products, wherein the adjusting of the reliability model includes: adjusting a variable related to a root failure cause of a selected first IC product from the plurality of first IC products to yield a new predicted defect rate, wherein the variable includes an aging parameter defined as electromigration degradation of circuitry in the selected first IC product; calculating a manufacturing defect density based on the observed defect rate; and assigning a relative probability to each of a plurality of potential semiconductor manufacturing defects based on the manufacturing defect density; and redistributing an operating load on the plurality of first IC products within the shared system based on the adjusted reliability model.