Patent Document ID: 8310595
Application ID: 12106995
Patent Status: 1

Claim One:
1. An apparatus comprising: a receiver configured to accept analog video from a source of analog video and to output digital video, the source of analog video including one or more digital to analog converters and configured to output the analog video and a horizontal synchronization indication, the receiver configured to sample the analog video using one or more analog to digital converters at a sample clock rate and sample clock phase; a clock signal generator coupled to the video rate analyzer configured to accept an indication of the number of samples in a video line and a phase signal and generate a sample clock signal at the sample clock rate and sample clock phase for the one or more analog to digital converters; and a phase adjuster configured to receive the digital video output from the receiver and to determine the phase signal for the clock signal generator, wherein the phase adjuster is configured to compare statistics of pixel to pixel differences that have magnitude exceeding a pre-determined threshold for a plurality of different sample clock phases to determine the phase for phase signal for the clock signal generator.