Patent Document ID: 20070011519
Application ID: 11409273
Patent Status: 0

Claim One:
1. A semiconductor failure analysis apparatus for analyzing a failure of a semiconductor device, using an observed image thereof, comprising: inspection information acquiring means for acquiring inspection information containing at least a pattern image being a normal observed image of the semiconductor device, as the observed image; layout information acquiring means for acquiring layout information containing a layout image of the semiconductor device; failure analyzing means for analyzing a failure of the semiconductor device with reference to the observed image; and information display controlling means for letting display means display information about an analysis of the failure of the semiconductor device, wherein the information display controlling means has superimposed image generating means for generating a superimposed image in which the pattern image and the layout image are superimposed, as an image of the semiconductor device to be displayed by the display means, and transmittance setting means for setting a transmittance of the layout image relative to the pattern image in the superimposed image.