Patent Document ID: 20020014896
Application ID: 09912716
Patent Status: 0

Claim One:
1. A method for testing electronic components, wherein a terminal ( 4 ) of a component ( 2 ) is subjected to an electrical potential (V e ) at an initial date, a response (V s ) set up at a terminal of this component is measured on a measurement date (Dm), this response is compared with acceptance limits (Linf, Lsup), for the acceptance or rejection of the component as a function of this comparison, the measurement date is defined by means of a criterion applied to compare an intermediate statistical image (IS i-TEST ) representing at least responses obtained at a tested intermediate measurement date (Dm i-TEST ) with a nominal statistical image (IS 0 ) representing responses obtained at a nominal measurement date (Dm 0 ), the responses being obtained from a population (P 1 ) of good quality components, the measurement date chosen is the earliest possible intermediate measurement date tested, wherein: the criterion applied to compare the statistical images with one another comprises an assessment of an amplitude (R 0, R i-TEST ) of the responses obtained for each of the statistical images.