Patent Document ID: 20050090996
Application ID: 10695554
Patent Status: 0

Claim One:
1. A method for analyzing power plane quiescent current measurements performed on a group of integrated circuits, comprising: reading a plurality of data sets, each of said data sets containing a plurality of quiescent current values corresponding to a plurality of stimulus vectors of said measurements, where in each of said data sets contains data gathered on a corresponding one of said group of integrated circuits; selecting one of said stimulus vectors as a reference vector; computing an estimator of quiescent current for each remaining one of said stimulus vectors as a function of reference vector quiescent current level; and normalizing said quiescent current values in at least one of said data sets by calculating an expected quiescent current value for each of said remaining stimulus vectors and subtracting said expected quiescent current value for each of said remaining stimulus vectors from a corresponding one of said quiescent current values, whereby variations in said quiescent current measurements that are not due to activated defects are reduced and said quiescent current measurements are categorized in ranges of quiescent current levels.