Patent Document ID: 8954639
Application ID: 13226360
Patent Status: 1

Claim One:
1. A computer program product for integrating high speed interconnect calibration and dynamic topology discovery in a multi-processor system, the computer program product comprising: a computer readable storage medium having computer usable program code embodied therewith, the computer usable program code comprising a computer usable program code configured to: establish a first of a plurality of processors in a multi-processor system as a director of integrated interconnect calibration and dynamic topology discovery, wherein a plurality of high speed interconnects connects the plurality of processors with each other; calibrate each of the plurality of high speed interconnects as directed by the director via a shared hardware resource, wherein the shared hardware resource is shared among the plurality of processors; and incrementally discover topology of the multi-processor system as each of the plurality of high speed interconnects is calibrated and based, at least in part, on results of the plurality of high speed interconnects being calibrated.