Patent Document ID: 5491640
Application ID: 08272205
Patent Status: 1

Claim One:
1. A method for fabricating an integrated circuit comprising: developing a set of circuit specifications for an integrated circuit; encoding said set of circuit specifications in a hardware description language and inputting said hardware description language into a digital computer; providing a datapath library including both sequential components and combinational components, wherein said sequential components exhibit sequential logic having an output dependent on inputs and also dependent on a state of a memory unit included within said sequential component, and wherein said combinational components exhibit combinational logic having an output only dependent on inputs to said combinational logic; synthesizing from said hardware description language and on said computer a netlist including a sequential component selected from said datapath library, said synthesizing step including generating IC expression trees from said hardware description language and synthesizing said netlist utilizing said IC expression trees and said datapath library; and fabricating the integrated circuit as specified by said netlist.