Patent Document ID: 20130246983
Application ID: 13887672
Patent Status: 0

Claim One:
1. A computer readable medium comprising program code that configures a processor to perform a method of designing a lithography mask set, the computer readable medium comprising: program code stored on physical computer media for forming a gate mask, said gate mask including neighboring dummy feature pitch restrictions, comprising: a first active gate feature having a line width W 1 over an active area and at least one neighboring dummy feature having a line width=0.8 W 1 to 1.3 W 1 , said neighboring dummy feature having a first side adjacent to said first active gate feature, and a nearest gate level feature on a second side opposite to said first side; wherein said neighboring dummy feature defines a gate pitch based on a distance to said first active gate feature or said neighboring dummy feature is positioned to maintain a gate pitch in a gate array including said first active gate feature, and wherein a spacing between said neighboring dummy feature and said nearest gate level feature provide one of (i) maintaining said gate pitch and (ii) being at a sub-resolution assist feature (SRAF) enabling distance that is ≧2 times said gate pitch and said gate mask includes a SRAF over said SRAF enabling distance.