Patent Document ID: 8392858
Application ID: 12399119
Patent Status: 1

Claim One:
1. A computer-implemented method of generating a representation of a logic circuit, the method comprising: providing an initial representation of a plurality of interconnected logic gates of the logic circuit to a computer having a memory with processor executable program code stored in the memory, and a processor configured to execute the program code; the computer inspecting one or more interconnected logic gates to identify a hazardous transition by selecting a logic gate and a stimulus to apply to the logic gate and identifying inputs that undergo a transition from the stimulus; the computer determining which inputs receive a hazardous transition due to the stimulus by selecting an input, determining a transition space for the input and whether the transition space is a subset of a control set, determining output-transition polarity for the input, and comparing the output-transition polarity with a final output; the computer modifying the initial representation of the logic circuit based on transition polarity of the hazardous transition to generate a modified representation reflecting a modified logic circuit to prevent the hazardous transition from producing a glitch at an output terminal of a logic gate that received the hazardous transition; the computer storing the modified representation of the modified logic circuit in the memory of the computer; and the computer outputting the modified representation of the logic circuit from the computer.