Patent Document ID: 20080226992
Application ID: 11687230
Patent Status: 0

Claim One:
1. A method of designing a mask used by a lithographic system to project an image of a circuit design, the design including at least one large feature and at least one small feature spaced from the large feature, the method comprising: identifying a large feature in the design nearby at least one small feature; providing on the layout of a mask a shape corresponding to the identified large feature and, in a field of the large feature shape, at least one dummy clear shape of size and configuration insufficient to resolve the clear shape with a light source used in the lithographic projection system; and creating a mask including an opaque shape corresponding to the layout of the identified large feature shape and the at least one dummy clear shape in the field of the large feature shape, whereby light from the lithographic projection system light source may be projected through the opaque shape and at least one dummy clear shape to resolve an image of the identified large circuit feature on a resist layer of a wafer without resolving the clear shape on the resist layer, while simultaneously increasing optical flare on the resolved identified large circuit feature image.