Patent Document ID: 20090204380
Application ID: 12314334
Patent Status: 0

Claim One:
1. A performance evaluation simulation apparatus that evaluates performance by performing a simulation on a software model and a hardware model in which a process to be performed is provisionally determined by using software and hardware from specifications of a system, the performance evaluation simulation apparatus comprising: a basic-process-unit dividing unit that makes a division into basic process units, which are execution units of process to be performed in the software model based on an execution log that represents execution history obtained by executing the software model on an actual machine or simulation software; a throughput calculating unit that calculates a throughput of each of the basic process units obtained through division by the basic-process-unit dividing unit, from the number of instruction address strings or the number of address strings for data access kept in the execution log; an arrangement-structure changing unit that compares each throughput calculated by the throughput calculating unit and a predetermined threshold and changes an arrangement structure so that a basic process unit with a throughput exceeding the predetermined threshold is changed from the software model to the hardware model; and a statistical-information generating unit that generates statistical information on which performance evaluation is based by performing a performance evaluation simulation on the basic process unit whose arrangement structure has been changed by the arrangement-structure changing unit to the hardware model and basic process units arranged in the software model, the performance evaluation simulation executing a bus access via an instruction cache and a data cache, to measure data required for operation analysis of the system.