Patent Document ID: 20120106826
Application ID: 13381629
Patent Status: 0

Claim One:
1. A pattern evaluation method of evaluating a circuit pattern using a data storage device which stores data, an arithmetic unit which processes data, an input device permitting a user to perform input processing, and a display device which displays image data, said pattern shape evaluation method comprising: reading out a design pattern used for double patterning and including at least two design patterns from said data storage device; reading out an image of a joint portion of circuit patterns fabricated using said design pattern for double patterning from said data storage device; setting target boundary lines specified as target positions in which a joint portion of two circuit patterns should be disposed and an evaluation region specified for image processing to be performed in an next image processing step performing image processing along directions of said target boundary lines in the evaluation region set on the image of the circuit patterns; performing binarization processing in said evaluation region after performing said image processing; and making a decision as to whether or not the patterns have defects based on an image obtained after performing said binarization processing.