Patent Document ID: 9753895
Application ID: 14818349
Patent Status: 1

Claim One:
1. A method for process variation analysis of an integrated circuit, the method comprising: generating a netlist describing electronic devices of an integrated circuit in terms of device parameters and process parameters, wherein the process parameters include local process parameters individual to the electronic devices and global process parameters common to the electronic devices; identifying critical electronic devices having device parameters with greatest contributions to one or more performance parameters of a design specification, wherein the design specification corresponds to the integrated circuit; determining sensitivity values for the global process parameters and local process parameters of the critical electronic devices, wherein the sensitivity values represent how much the one or more performance parameters change in response to variations in the global process parameters and the local process parameters of the critical electronic devices; sorting Monte Carlo (MC) samples, wherein the MC samples are vectors of values for the process parameters, and wherein the sorting is based on the sensitivity values and the values of the MC samples; performing a MC simulation on the sorted MC samples; and manufacturing the integrated circuit selectively depending on results of the MC simulation.