Patent Document ID: 8615679
Application ID: 13618246
Patent Status: 1

Claim One:
1. A memory module comprising: a plurality of memory chips comprising a first memory chip and a second memory chip; a plurality of intelligent buffer chips comprising: a first intelligent buffer chip coupled to the first memory chip, wherein the first intelligent buffer chip includes a first temperature monitoring device configured to perform temperature measurements of the first memory chip; and a distinct second intelligent buffer chip coupled to the second memory chip, wherein the second intelligent buffer chip includes a second temperature monitoring device configured to perform temperature measurements of the second memory chip; an intelligent register chip coupled to a memory controller; and a sideband bus coupling the intelligent register chip and the plurality of intelligent buffer chips, wherein the intelligent register chip is configured to receive (i) from the first intelligent buffer chip via the sideband bus, first data representing the temperature measurements of the first memory chip and (ii) from the second intelligent buffer chip via the sideband bus, second data representing the temperature measurements of the second memory chip.