Patent Document ID: 8230374
Application ID: 11957287
Patent Status: 1

Claim One:
1. A computer program product for partitioning an algorithm between hardware and software comprising: a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code comprising: computer readable program code to accept a user defined algorithm specified in a source code; computer readable program code to identify worker methods and feature extraction methods within the user defined algorithm, wherein the feature extraction methods comprise methods selected from the group consisting of: generating histograms of image pixel values, listing image coordinate/value pairs, counting pixels having a specific value, listing features, listing feature locations, listing maximum and minimum values, listing minimum and maximum value locations; computer readable program code to replace worker methods in the source code with hardware logic; computer readable program code to replace feature extraction methods with a combination of hardware logic and software libraries that interface with the hardware logic; computer readable program code to output an FPGA programming specification of the hardware logic and interface libraries; and computer readable program code to program an FPGA in response to the FPGA programming specification.