Patent Document ID: 9362132
Application ID: 14262279
Patent Status: 1

Claim One:
1. A method for transferring a desired layout into a target layer on a semiconductor substrate, the method comprising: forming a spacer around a first desired layout feature pattern and a second desired layout feature pattern of the desired layout over the semiconductor substrate, the first desired layout feature pattern formed over the target layer using a first sub-layout and the second desired layout feature pattern formed over the target layer using a second sub-layout, wherein the first and second desired layout feature patterns are separated by a first width and the spacer has a second width; forming the second desired layout feature pattern by etching an intermediate layer using the second sub-layout to create a trench within the intermediate layer, thereby exposing a portion of the target layer and the spacer; forming a plug within at least a portion of the trench; forming a third desired layout feature pattern over the target layer according to a third sub-layout, the third desired layout feature pattern shaped in part by the spacer; etching the spacer from around the first and second desired layout feature pattern; and after etching the spacer, etching the target layer using the first, second, and third layout feature patterns as masking features to form corresponding first, second, and third layout features in the target layer.