Patent Document ID: 8055833
Application ID: 11611374
Patent Status: 1

Claim One:
1. An interlace circuit configured to couple to one or more flash memory devices, comprising: a read-only memory (ROM) storing fixed configuration information associated with the one or more flash memory devices; discovery topic circuitry configured to: detect a physical configuration for the one or more flash memory devices, and determine a virtual configuration for the one or more flash memory devices based on, at least in part, the physical configuration and based on, at least in part, the fixed configuration information stored in the ROM; configuration logic circuitry configured to store the virtual configuration for one or more virtual flash memory devices; and a translation unit configured to: receive a request from a host system to access at least one of the one or more flash memory devices, wherein information associated with the request is based on the virtual configuration for the one or more virtual flash memory devices, and translate the request received from the host system to a translated request that includes information associated with the physical configuration for the one or more flash memory devices.