Patent Document ID: 8145466
Application ID: 12469897
Patent Status: 1

Claim One:
1. A method for preparing simulation models of an electronic circuit design, comprising: in response to designer input, partitioning the design into at least first and second clusters, wherein the design includes a source module in the first cluster connected to a destination module in the second cluster; compiling by a processor, the first cluster into a first model for a software-based co-simulation platform that includes a processor for executing software that simulates behavior of the source module using the first model; compiling by the processor, the first cluster and the second cluster of the design into a second model for a hardware-based co-simulation platform that includes a programmable logic circuit configurable for emulating behavior of the design using the second model; and generating and storing by the processor, an interconnection block in the second model that is switchable between coupling of the destination module in the second model to the source module of the first model or to a source module of the second model.