Patent Document ID: 20020191828
Application ID: 10167092
Patent Status: 0

Claim One:
1. An apparatus including a multiple mode X-ray imaging system for supporting multiple X-ray image display modes by providing X-ray image signals having selectable spatial resolutions in a still image mode or an image motion mode with correction for defective pixels individually or in groups, comprising: a detector array configured to receive a plurality of detector control signals and in accordance therewith receive and convert a plurality of X-ray photons corresponding to a two-dimensional image into a first plurality of image signals representing a first two-dimensional array which includes a first plurality of rows and a first plurality of columns of pixels which together correspond to said two-dimensional image and which individually correspond to respective portions of said two-dimensional image, and provide a second plurality of image signals representing a second two-dimensional array which includes a second plurality of rows and said first plurality of columns of super pixels which selectively represent respective individual ones or multiple adjacent ones of said first plurality of rows of pixels and respective individual ones of said first plurality of columns of pixels, respectively; a plurality of detector array receiver circuits, coupled to said detector array, configured to receive a plurality of receiver control signals and in accordance therewith receive and combine said second plurality of image signals and in accordance therewith provide a third plurality of image signals representing a third two-dimensional array which includes said second plurality of rows and a second plurality of columns of super pixels which selectively represent respective individual ones of said second plurality of rows of super pixels and respective individual ones or multiple adjacent ones of said first plurality of columns of super pixels, respectively; a first data processing circuit, coupled to said plurality of detector array receiver circuits, configured to receive and process together said third plurality of image signals with a corresponding plurality of successive sets of correction data and in accordance therewith provide a plurality of successive sets of corrected image data, wherein said plurality of successive sets of correction data represents a plurality of correction factors, each one of said plurality of correction factors corresponds to a respective one of said plurality of super pixels and each one of said plurality of successive sets of correction data includes a first data subset which indicates whether said respective one of said plurality of super pixels is defective; a first data selection circuit, coupled to said first data processing circuit, configured to receive and select between individual ones of said plurality of successive sets of corrected image data and individual ones of said corresponding plurality of successive sets of correction data and in accordance therewith provide a first plurality of successive sets of selected data, wherein an individual one of said first plurality of successive sets of selected data includes a corresponding individual one of said plurality of successive sets of correction data when said first data subset indicates that said corresponding respective one of said plurality of pixels is defective, and wherein said individual one of said first plurality of successive sets of selected data includes a corresponding one of said plurality of successive sets of corrected image data when said first data subset does not indicate that said corresponding respective one of said plurality of pixels is defective; a data scaling and summing circuit, coupled to said first data selection circuit, configured to receive and scale said first plurality of successive sets of selected data, receive and scale a stored data sum signal and sum said scaled first plurality of successive sets of selected data and said scaled stored data sum signal and in accordance therewith provide a data sum signal, wherein said first plurality of successive sets of selected data is scaled in accordance with a first scaling factor and said stored data sum signal is scaled in accordance with a second scaling factor, and wherein said first plurality of successive sets of selected data includes a plurality of successive sets of image data, and further wherein each one of said plurality of successive sets of image data includes a plurality of super pixel data with active and inactive data states and which corresponds to said third two-dimensional array; and a data memory circuit, coupled to said data scaling and summing circuit, configured to receive and selectively store said data sum signal and in accordance therewith provide said stored data sum signal; wherein said data scaling and summing circuit and said data memory circuit cooperatively operate in one of a plurality of operational modes during said reception of said first plurality of successive sets of selected data; wherein, in a first one of said plurality of operational modes, said first scaling factor has a value which is between zero and unity, and said second scaling factor has a value which equals a difference between unity and said first scaling factor value; and wherein, in a second one of said plurality of operational modes, said first scaling factor has a value which is initially unity when a first one of said plurality of successive sets of image data is in said inactive data state, remains unity when a subsequent second one of said plurality of successive sets of image data is in said active data state and becomes zero when a further subsequent third one of said plurality of successive sets of image data is in said inactive data state, and said second scaling factor has a value which is initially zero, becomes unity when said subsequent second one of said plurality of successive sets of image data is in said active data state and remains unity thereafter.