Patent Document ID: 20140033161
Application ID: 13954922
Patent Status: 0

Claim One:
1. A method for optimizing a circuit design, the method comprising: constructing a set of lower bound expressions for a parameter that is used in an approximation of a log-sum-exp approximation of a maximum function that is part of an objective function, wherein the set of lower bound expressions are constructed based on the objective function, partial derivatives of the objective function, the maximum value that can be represented by an underlying computing architecture and/or can be handled by a numerical solver, and the minimum value that can be represented in the underlying computing architecture and/or handled by the numerical solver; evaluating the set of lower bound expressions to obtain a set of lower bound values; determining a maximum lower bound value from the set of lower bound values; and while solving a gate sizing problem using the numerical solver, evaluating the objective function and the partial derivatives of the objective function by using the maximum lower bound value.