Patent Document ID: 20060188824
Application ID: 11320513
Patent Status: 0

Claim One:
1. An automated method for repairing spacing of vertical conductive features in the fabrication of semiconductor integrated circuits, the method comprising: determining a minimum spacing; using a database, identifying vertical conductive feature patterns having a spacing less than the minimum spacing; for each identified vertical conductive feature pattern having a spacing less than the minimum spacing, determining a first direction to expand and a second direction to shrink to define a revised vertical conductive feature pattern; checking the revised vertical conductive feature pattern against design rules to see if the design rules are violated; and for each identified vertical conductive feature pattern having a spacing less than the minimum spacing, replacing the identified vertical conductive feature pattern with the revised vertical conductive feature pattern when the design rules are not violated, wherein the revised vertical conductive feature pattern is expanded in the first direction and shrunk in the second direction.