Patent Document ID: 8910108
Application ID: 14247078
Patent Status: 1

Claim One:
1. One or more computer-readable storage media storing computer-executable instructions which when executed by a computer cause the computer to perform a method, the method comprising: receiving layout information indicative of at least signal-wire segments in a circuit design; identifying at least one signal-wire segment having a length that exceeds a transverse distance to a nearest neighboring return path by more than a threshold amount; performing a first impedance extraction technique for the identified at least one signal-wire segment, the first impedance extraction technique generating a first representation of impedance effects in the circuit design; and performing a second impedance extraction technique for other signal-wire segments in the circuit design, the second impedance extraction technique generating a second representation of the impedance effects in the circuit design, wherein the first impedance extraction technique and the second impedance extraction technique both account for electrical effects caused by a multi-layer substrate, and wherein the first impedance extraction technique is computationally more efficient but less accurate than the second impedance extraction technique.