Patent Document ID: 20120002861
Application ID: 13231394
Patent Status: 0

Claim One:
1. An apparatus for inspecting a defect of a circuit pattern formed on a semiconductor wafer comprising: a SEM image obtaining means for obtaining a SEM image of an inspection region on the semiconductor wafer formed with the circuit pattern; a defect classifying means for comparing the SEM image of the inspection region obtained by the SEM image obtaining means with a reference image and classifying the SEM image of the inspection region on the semiconductor wafer; and an outputting means for outputting results classified by the defect classifying means; wherein the defect classifying means further comprises: a comparison shape forming section for forming a plurality of comparison shapes corresponding to the SEM image of the inspection region by deforming the shape of the circuit pattern in accordance with a plurality of shape deformation rules using design data corresponding to the circuit pattern within the inspection region and a shape similar to the SEM image of the inspection region out of the plurality of comparison shapes formed is selected as the comparison shape; and a shape comparing and classifying section for classifying the SEM image using information of the comparison shape selected in the comparison shape forming section and the inspection shape of the circuit pattern of the SEM image of the inspection region.