Patent Document ID: 4742551
Application ID: 06785352
Patent Status: 1

Claim One:
1. A statistical gatherer for use in an image processing system of the type that processes a digital image comprising a frame of pixels, with the positions of the lines in the frame indicated by a y coordinate and the position of a pixel in a given line indicated by an x coordinate, and with each pixel a digital value, the statistical gatherer comprising: an electronic RAM having an address input port for receiving an address signal identifying a selected storage location in said RAM, a data output port for transmitting a read signal encoding the value of a digital word stored in said selected storage location, and a data input port for receiving a write signal encoding the value of a digital word to be stored in the selected storage location; address signal selection means, having an address select output port coupled to said address input port of said RAM and having a set of address select input ports for receiving signals, said address signal selection means for controllably coupling one of said address select input ports to said address select output port; means for adding a selected increment to the digital word stored at the selected storage location in said RAM, said increment means having an increment signal input port and a read signal input port coupled to the data output of said RAM; increment signal selection means, having an increment select signal output port coupled to the increment signal input port of said incrementing means and having a set of increment select input ports, said increment signal select means for controllably coupling one of said increment select signal input ports to said select increment signal output port; a first pixel input coupled to a first one of said address select input ports and to a first one of said increment select input ports, said first pixel input for receiving a first digital pixel with the location of the first digital pixel in the image frame indicated by coordinates x and y; means for generating a function output signal at a function output port, with the function output signal encoding a digital function value having a value f(x,y), and with said function output port coupled to a second one of said address select ports and a second one of said increment select ports.