Patent Document ID: 4779273
Application ID: 06054109
Patent Status: 1

Claim One:
1. Apparatus for self-testing a digital logic network (302), the network having one or more inputs for accepting input signals and one or more outputs for providing output signals, the network when operating correctly producing determinate output signals for a determinate set of input signals, the network being a part of a digital system and being for receiving input signals from a first portion of the digital system, producing predetermined output signals in response to those input signals, and forwarding the output signals to a second portion of the digital system, the apparatus being integral to the digital system and comprising: (a) not more than one register (305) for containing an input data pattern and for capturing an output data pattern; (b) first routing means (301) connected between the outputs of said register and the inputs of the digital logic network for selectably routing the data pattern from said register or from the first portion of the digital system to the digital logic network's inputs; and (c) second routing means (303) connected between the outputs of the digital logic network and the inputs of said register for selectably routing the digital logic network's output signals into said register or to the second portion of the digital system; whereby said register both provides determinate input signals to, and collects output signals from, the digital logic network, correct operation of the digital logic network being indicated by agreement between the collected output signals and expected output signals for that determinate input.