Patent Document ID: 8024807
Application ID: 12130318
Patent Status: 1

Claim One:
1. A computer comprising: a processor; a memory comprising instructions to receive a portion of software code for analysis, to determine a number of security vulnerabilities for the portion of software code, to determine a security level for the portion of software code based on a number of vulnerabilities with a critical rating found in the portion of software code, a number of vulnerabilities with a serious rating found in the portion of software code, a number of vulnerabilities with a low or inconsequential rating found in the portion of software code, and a number of total lines of code in the portion of software code, wherein the security level is probabilistically linked to the number of vulnerabilities, and wherein the memory comprises instructions to determine the security level for the portion of software code by calculating a security level score using the following equation: 
 score=100−(100*((( h*hw )+( m*mw )+ l )/ loc ))[floor=0] where h is the number of vulnerabilities with a critical rating found in the portion of software code, hw is the weight for critical vulnerabilities, m is the number of vulnerabilities with a serious rating found in the portion of software code, mw is a weight for serious vulnerabilities, l is the number of vulnerabilities with a low or inconsequential rating found in the portion of software code, and loc is the number of total lines of code in the portion of software code; and a display device to display the security level; wherein the instructions to determine the number of security vulnerabilities of the portion of software code comprise instructions to receive one or more output logs from one or more source code analysis tools, to parse the one or more output logs for a tag, and to identify each instance of the tag in the one or more output logs as a security vulnerability.