Patent Document ID: 7487473
Application ID: 11531023
Patent Status: 1

Claim One:
1. A method of enabling a netlist of an integrated circuit (IC) design for modeling of technology dependent back-end-of-line (BEOL) process variation, the method comprising: obtaining a netlist of electrical elements, the netlist including estimated electrical values for the electrical elements and geometric data for at least one of the electrical elements; determining variations of the electrical value for a selected electrical element based on the geometric data by scaling, wherein the scaling includes defining an interval between the maximum and minimum value for the selected electrical element generating selected variations of the electrical value within the interval using an algorithm, wherein the variations of the electrical value include a value less than the electrical value, the electrical value and a value greater than the electrical value, wherein the electrical value represents the electrical characteristic of the electrical element, and wherein the value less than is a multiple of a standard deviation of the electrical value, and the value greater than is a multiple of the standard deviation of the electrical value; placing a model call in the netlist, wherein each model call implements one or more of the selected variations of the electrical value for the selected electrical element; and modeling technology dependent BEOL process variation using the netlist.