Patent Document

This application claims the benefit of provisional patent application No. 61/870,338 filed Aug. 27, 2013, which is hereby incorporated by reference herein in its entirety. 
    
    
     BACKGROUND 
     The present invention relates to integrated circuits and, more particularly, to forming implanted regions in CMOS (complementary metal oxide semiconductor) image sensors. 
     Digital cameras are often provided with digital image sensors such as CMOS image sensors. Digital cameras may be stand-alone devices or may be included in electronic devices such as cellular telephones or computers. A typical CMOS image sensor has an image sensor pixel array containing contain thousands or millions of pixels. Each pixel includes a photosensitive element such as a photodiode formed in a substrate. Isolation regions may be formed in the substrate between photodiodes to reduce crosstalk between photodiodes. Isolation regions may be formed using ion implantation. 
     To improve image quality, it is often desirable to increase the number and density of pixels on an image sensor. The density of pixels can be represented by a quantity called “pixel pitch,” in which higher pixel pitches represent lower pixel densities and bigger pixel sizes. As pixel pitches are decreased, photodiodes may need to be formed deeper in a substrate to avoid loss of sensitivity. Deeper photodiodes may require deeper isolation regions. 
     Some methods for implanting isolation regions include multiple repetitive steps. Each step includes depositing and patterning a layer of photoresist using photolithography, implanting ions through the patterned photoresist, and then stripping the layer of photoresist before implanting additional ions into the substrate. This process is repeated multiple times until the resulting implants have the desired depth. 
     Repetitively depositing and patterning photoresist using photolithography is costly and consumes a significant portion of fabrication line capacity. Alignment errors may also result since the photoresist pattern has to be re-created at each step. 
     It would therefore be desirable to be able to provide improved methods for forming implanted regions in image sensors. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a diagram of an illustrative electronic device having an image sensor in accordance with an embodiment of the present invention. 
         FIG. 2  is a top view of an illustrative image sensor pixel array in accordance with an embodiment of the present invention. 
         FIG. 3  is a top view of a portion of an illustrative image sensor pixel array having isolation structures in accordance with an embodiment of the present invention. 
         FIG. 4  is a top view of illustrative color filter elements that may be used in an image sensor pixel array in accordance with an embodiment of the present invention. 
         FIG. 5  is a cross-sectional side view of a portion of an image sensor after a screen oxide layer has been deposited on a surface of an image sensor substrate in accordance with an embodiment of the present invention. 
         FIG. 6  is a cross-sectional side view of the image sensor of  FIG. 5  after an etch stop layer has been deposited on the screen oxide layer in accordance with an embodiment of the present invention. 
         FIG. 7  is a cross-sectional side view of the image sensor of  FIG. 6  after a stack of alternating layers of material have been deposited on the etch stop layer in accordance with an embodiment of the present invention. 
         FIG. 8  is a cross-sectional side view of the image sensor of  FIG. 7  after a photoresist layer has been deposited on the stack of alternating layers of material in accordance with an embodiment of the present invention. 
         FIG. 9  is a cross-sectional side view of the image sensor of  FIG. 8  after the photoresist layer has been patterned to form openings in the photoresist layer in accordance with an embodiment of the present invention. 
         FIG. 10  is a cross-sectional side view of the image sensor of  FIG. 9  after the stack of alternating layers of material has been etched and the photoresist layer has been removed in accordance with an embodiment of the present invention. 
         FIG. 11  is a cross-sectional side view of the image sensor of  FIG. 10  after a first implant has been formed in the image sensor substrate by passing ions through the stack of alternating layers of material in accordance with an embodiment of the present invention. 
         FIG. 12  is a cross-sectional side view of the image sensor of  FIG. 11  after a top layer in the stack of alternating layers of material has been removed and a second implant has been formed in the image sensor substrate by passing ions through the remaining layers in the stack of alternating layers of material in accordance with an embodiment of the present invention. 
         FIG. 13  is a cross-sectional side view of the image sensor of  FIG. 12  after a top layer in the stack of alternating layers of material has been removed and a third implant has been formed in the image sensor substrate by passing ions through the remaining layers in the stack of alternating layers of material in accordance with an embodiment of the present invention. 
         FIG. 14  is a cross-sectional side view of the image sensor of  FIG. 13  after a top layer in the stack of alternating layers of material has been removed and a fourth implant has been formed in the image sensor substrate by passing ions through the remaining layer in the stack of alternating layers of material in accordance with an embodiment of the present invention. 
         FIG. 15  is a cross-sectional side view of the image sensor of  FIG. 14  after the last layer in the stack of alternating layers of material and the etch stop layer have been removed in accordance with an embodiment of the present invention. 
         FIG. 16  is a cross-sectional side view of the image sensor of  FIG. 15  after a photodiode has been formed between the range modulated implants in accordance with an embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     Digital image sensors are widely used in digital cameras and in electronic devices such as cellular telephones, computers, and computer accessories. An illustrative electronic device  10  with an image sensor  12  and storage and processing circuitry  14  is shown in  FIG. 1 . Electronic device  10  may be a digital camera, a computer, a computer accessory, a cellular telephone, or other electronic device. Image sensor  12  may be part of a camera module that includes a lens or may be provided in an electronic device that has a separate lens. During operation, the lens focuses light onto image sensor  12 . Image sensor  12  may have an array of image sensor pixels containing photosensitive elements such as photodiodes that convert light into digital data. Image sensors may have any number of pixels (e.g., hundreds, thousands, millions, or more). A typical image sensor may, for example, have millions of pixels (e.g., megapixels). 
     Image data from image sensor  12  may be provided to storage and processing circuitry  14 . Storage and processing circuitry  14  may process the digital image data that has been captured with sensor  12 . The processed image data may be maintained in storage in circuitry  14 . The processed image data may also be provided to external equipment. Storage and processing circuitry  14  may include storage components such as memory integrated circuits, memory that is part of other integrated circuits such as microprocessors, digital signal processors, or application specific integrated circuits, hard disk storage, solid state disk drive storage, removable media, or other storage circuitry. Processing circuitry in storage and processing circuitry  14  may be based on one or more integrated circuits such as microprocessors, microcontrollers, digital signal processors, application-specific integrated circuits, image processors that are incorporated into camera modules, other hardware-based image processing circuits, combinations of these circuits, etc. If desired, image sensor  12  and processing circuitry  14  may be implemented using a single integrated circuit or may be implemented using separate integrated circuits. 
     An illustrative image sensor pixel array  12  is shown in  FIG. 2 . Image sensor  12  of  FIG. 2  has an array of image pixels  16 . Pixels  16  are typically organized in rows and columns. Each pixel contains a photosensitive element such as a photodiode and corresponding electrical components (e.g., transistors, charge storage elements, and interconnect lines for routing electrical signals). 
       FIG. 3  is a diagram showing a portion of an array of image sensor pixels  16 . In the example of  FIG. 3 , each pixel  16  has a photodiode  18 . Photodiodes  18  may be formed in substrate  31 . Photons may strike photodiodes  18  and generate charge. Charge can be transferred to floating diffusion region  22  by turning transfer gates  20  momentarily on. Photodiodes  18  within pixel  16  may be separated by isolation regions  24 . Isolation region  26  may separate photodiodes  18  from array transistors and from adjacent pixels. 
     If desired, each pixel  16  may include a separate floating diffusion node. The example of  FIG. 3  in which four pixels  16  share floating diffusion node  22  is merely illustrative. 
     Substrate  31  may be a silicon substrate. Substrate  31  may, for example, be a doped substrate such as a p-type substrate or a p+substrate. Substrate  31  may have an epitaxial layer such as a p-type or n-type epitaxial layer. If desired, substrate  31  may be a silicon-on-insulator (SOI) substrate and may have a buried oxide layer (BOX). Isolation regions  24  may be p-well regions or n-well regions. Isolation regions  24  may be formed using ion implantation. For example, ions such as boron, beryllium, indium, magnesium, arsenic, phosphorus or other suitable dopant ions may be implanted in substrate  31  to from regions  24 . 
     Incoming light may pass through a color filter before striking one of photodiodes  18  of  FIG. 3 .  FIG. 4  is a top view of illustrative color filter elements that may filter light for pixels  16  of  FIG. 3 . The color filter pattern of  FIG. 4  has red (R), green (G), and blue (B) color filter elements  52  and is sometimes referred to as a Bayer pattern. The pattern of  FIG. 4  is merely illustrative, however. If desired, other patterns and/or other filter elements (e.g., filter elements having different spectral responses) may be used. 
     The quality of the images captured using image sensor  12  may be influenced by a variety of factors. For example, the size of the pixel array in image sensor  12  may have an impact on image quality. Large image sensors with large numbers of image pixels will generally be able to produce images with higher quality or resolution than smaller image sensors having fewer image pixels. 
     In order to increase the number of pixels, it may be desirable to decrease the size of the pixels. It may be desirable to decrease the pixel pitch of an image sensor, which is a measure of the distance between equivalent pixels. For example, pixel pitches for image sensors may be 10 microns or less, 5 microns or less, one micron or less, etc. As pixel pitch is reduced, it may be desirable to decrease the widths of isolation regions such as isolation regions  24  between photodiodes  18  so that the active portion of the pixels is maximized. For example, it may be desirable to form isolation regions with widths of 2 microns or less, 1 micron or less, 0.5 microns or less, 0.3 microns or less, etc. It may be desirable to have isolation regions that extend from the surface of a substrate to a depth of, e.g. 3-5 microns, 3 microns or more, 4 microns or more, etc. Desired width vs. height aspect ratios for an isolation region may be, for example, approximately 1:8, 1:7 or greater, 1:8 or greater, 1:9 or greater, etc. 
     The implantation of narrow isolation regions that are suitably deep may present challenges. Typically, photoresist is used as an implant mask. The photoresist is deposited on a substrate and patterned with openings where implants are desired. However, it may be difficult to pattern photoresist where narrow and deep implants are desired. If deep implants are desired, photoresist is needed that is thick enough to stop high beam energies. However, if thick photoresist is patterned with very narrow openings, the walls of the openings may be unstable or sloped instead of vertical, and photoresist residue may remain at the bottom of the opening due to incomplete removal of the resist. 
     Isolation regions such as isolation regions  24  of  FIG. 3  may be formed using a multi-step approach that selectively forms implant regions at different depths in a substrate. Such implants may sometimes be referred to as range modulated implants. The implants may be connected to form isolation regions that are suitably narrow and deep.  FIGS. 5-16  show cross-sectional side views of an illustrative image sensor at sequential stages of the implantation process.  FIG. 16  may, for example, correspond to a cross-section taken along line  80  of  FIG. 3 . 
     At step  100  of  FIG. 5 , a screen oxide layer such as screen oxide layer  32  may be deposited on an upper surface of silicon substrate  31 . Substrate  31  may be a p+ or p-type silicon substrate or a buried oxide (BOX) layer. If desired, layer  31  may be an n-type substrate. Substrate  31  may include an epitaxial layer such as an n-type or p-type epitaxial layer. The epitaxial layer may, for example, be a p-type epitaxial layer that is doped with boron or other suitable dopants. The epitaxial layer may be doped at densities of 10 14 -10 15  cm −3  or other suitable densities. Photodiodes may be formed in the epitaxial layer of substrate  31 . 
     Screen oxide layer  32  (e.g., a thin layer of silicon dioxide) may be used as a sacrificial layer that collects any debris during high energy ion implantation and which can be removed at the end of the ion implantation process. The thickness T 1  of screen oxide layer  32  may be 90-100 angstroms, 95-110 angstroms, 80-120 angstroms, or other suitable thickness. 
     As shown in  FIG. 5 , isolation structures  90  may be formed in the uppermost portion of substrate  31 . Isolation structures  90  may be shallow trench isolation (STI) structures or may be implants formed using conventional methods. For example, isolation structures  90  may be formed by depositing a layer of photoresist and patterning the layer of photoresist to form openings in isolation regions  24 . Dopant may be implanted through the openings in the layer of photoresist to form isolation structures  90 . Boron or any other suitable ion may be used to form implants  90 . 
     Isolation structures  90  are shown in  FIG. 5  with dashed lines because the presence of isolation structures  90  at this stage in the implantation process is optional. For example, isolation structures  90  may be formed prior to forming range modulated implants or may be formed much later in the fabrication process (e.g., after forming range modulated implants in substrate  31 ). Arrangements where isolation structures  90  are present before forming range modulated implants are described herein as an illustrative example. 
     At step  102  of  FIG. 6 , a thin layer of etch stop material such as etch stop material  34  may be deposited over screen oxide layer  32 . Etch stop material may, for example, be formed from titanium nitride or other suitable material and may serve as an etch stop for subsequent etching steps. The thickness T 2  of layer  34  may be 100-200 angstroms, 50-150 angstroms, 100-300 angstroms, or other suitable thickness. 
     At step  104  of  FIG. 7 , a stack  60  of alternating layers of material such as layers  36 ,  38 ,  40 , and  42  may be deposited over etch stop layer  34 . Illustrative materials that may be used for layers  36 ,  38 ,  40 , and  42  include oxide, silicon nitride, nitride, silicon dioxide, other suitable materials, a combination of any two or more of these materials, etc. In one illustrative arrangement, which is described herein as an example, layer  36  may be an oxide layer, layer  38  may be a silicon nitride layer, layer  40  may be an oxide layer, and layer  42  may be a nitride layer. Layer  36  may have a thickness T 3  of about 0.45 microns, layer  38  may have a thickness T 4  of about 0.25 microns, layer  40  may have a thickness T 5  of about 0.45 microns, and layer  42  may have a thickness T 6  of about 0.25 microns (as examples). If desired other thicknesses may be used. Layers  36 ,  38 ,  40 , and  42  may be deposited using chemical vapor deposition, physical vapor deposition, sputtering, or any other suitable deposition process. 
     The example of  FIG. 7  in which four alternating layers of material are used in stack  60  is merely illustrative. In general, any suitable number of alternating layers may be used in stack  60  (e.g., four, five, six, more than six, less than six, etc.). The number of alternating layers formed over etch stop  34  may depend on the number of ion implants that are desired in each isolation region  24 . 
     At step  106  of  FIG. 8 , a layer of photoresist such as photoresist  44  may be spin-coated or otherwise deposited over top layer  42  of stack  60 . Photoresist  44  may have a thickness T 7  of about 0.45 microns, more than 0.50 microns, less than 0.50 microns, etc. 
     At step  108  of  FIG. 9 , photoresist  44  may be patterned using photolithography to form openings  46  in photoresist  44 . Openings  46  may be located in regions where range modulated implants are not desired. Photoresist  44  may remain in isolation regions  24  where range modulated implants are desired. 
     At step  110  of  FIG. 10 , stack  60  may be etched (e.g., dry etched) to remove portions of stack  60  that are not covered by photoresist  44  of  FIG. 9  (e.g., portions in regions  46 ). This may include removing a portion of all of the layers in stack  60  up to etch stop layer  34 . As shown in  FIG. 10 , pillars (sometimes referred to as islands) of stack  60  that were covered by photoresist  44  of  FIG. 9  remain on substrate  31 . Following removal of portions of stack  60  in regions  46 , photoresist  44  may be removed (e.g., stripped). If desired, photoresist  44  may remain on pillars of stack  60  and may form the uppermost layer in stack  60 . Arrangements in which photoresist  44  is removed before performing the ion implantation step  112  of  FIG. 11  are described herein as an example. 
     At step  112  of  FIG. 11 , ion implantation may be performed, as denoted by arrows  49 . The ion implantation of step  112  may, for example, be a boron implantation having an implantation energy of 3000 keV. This is, however, merely illustrative. If desired, other ions may be implanted at step  112  or other implantation energies may be used. The implanted ions may be the same ions that are used to form implants  90  or different ions may be used. In regions  24 , ions pass through layers  42 ,  40 ,  38 , and  36  of stack  60  to form implants  48 A. Implants  48 A may be below and connected to implants  90 . 
     In regions  46  where there are openings in stack  60 , implants such as implant  50  may be formed. Implant  50  may be formed deep within substrate  31 . Implants  50  may be deeper than photodiodes  18  (see, e.g.,  FIG. 16 ). Implants such as implant  50  may be formed in a different portion of substrate  31  than implant  48 A, if desired. For example, implant  48 A may be formed in a p-type epitaxial layer, while implant  50  may be formed in a p-type substrate, a p+ substrate, a buried oxide layer or other substrate layer (e.g., a layer that is distinct from the p-type epitaxial layer). Implantation energies and the thickness of layers  36 ,  38 ,  40 , and  42  in stack  60  can be chosen such that implants  48 A are formed at the desired depth (e.g., immediately below implants  90 ). 
     At step  114  of  FIG. 12 , the top layer of stack  60  such as layer  42  may be removed to form stack  60 ′. For example, nitride layer  42  may be etched (e.g., anisotropically dry etched) such that oxide layer  40  is the top layer of stack  60 ′. 
     After removing layer  42 , ion implantation may be performed, as denoted by arrows  49 . The ion implantation of step  114  may, for example, be a boron implantation having an implantation energy of 3000 keV. This is, however, merely illustrative. If desired, other ions may be implanted at step  114  or other implantation energies may be used. The implanted ions may be the same ions that are used to form implants  90  and/or implants  48 A or different ions may be used. In regions  24 , ions pass through layers  40 ,  38 , and  36  of stack  60 ′ to form implants  48 B. Implants  48 B may be below and connected to implants  48 A. 
     At step  116  of  FIG. 13 , the top layer of stack  60 ′ such as layer  40  may be removed to form stack  60 ″. For example, oxide layer  40  may be etched (e.g., anisotropically dry etched) such that silicon nitride layer  38  is the top layer of stack  60 ″. 
     After removing layer  40 , ion implantation may be performed, as denoted by arrows  49 . The ion implantation of step  116  may, for example, be a boron implantation having an implantation energy of 3000 keV. This is, however, merely illustrative. If desired, other ions may be implanted at step  116  or other implantation energies may be used. The implanted ions may be the same ions that are used to form implants  90 , implants  48 A, and/or implants  48 B or different ions may be used. In regions  24 , ions pass through layers  38  and  36  of stack  60 ″ to form implants  48 C. Implants  48 C may be below and connected to implants  48 B. 
     At step  118  of  FIG. 14 , the top layer of stack  60 ″ such as layer  38  may be removed to form stack  60 ′″. For example, silicon nitride layer  38  may be etched (e.g., anisotropically dry etched) such that oxide layer  36  is the top layer of stack  60 ′″. In this example, layer  36  is also the last layer of stack  60 ′″ remaining on substrate  31 . 
     After removing layer  38 , ion implantation may be performed, as denoted by arrows  49 . The ion implantation of step  118  may, for example, be a boron implantation having an implantation energy of 3000 keV. This is, however, merely illustrative. If desired, other ions may be implanted at step  118  or other implantation energies may be used. The implanted ions may be the same ions that are used to form implants  90 , implants  48 A, implants  48 B, and/or implants  48 C or different ions may be used. In regions  24 , ions pass through layer  36  of stack  60 ′″ to form implants  48 D. Implants  48 D may be below and connected to implants  48 C. If desired, implants  48 D may be connected to implant  50 . 
     At step  120  of  FIG. 15 , the last layer of stack  60 ′″ of  FIG. 14  such as layer  36  may be removed. For example, oxide layer  36  may be stripped or etched (e.g., anisotropically dry etched) to expose etch stop layer  34 . Following removal of oxide layer  36 , etch stop layer  34  may also be removed. 
     At step  122  of  FIG. 16 , photodiode  18  may be formed between p-well isolation regions  24  (e.g., using masks, ion implantation, etc.). Photodiode  18  may be formed in substrate  31  before or after p-well isolation regions  24  have been formed. 
     In the example of  FIGS. 5-16 , isolation regions  24  are formed with four range modulated implants (e.g., implants  48 A,  48 B,  48 C, and  48 D). In general, isolation regions  24  may be formed having any suitable number of range modulated implants. If desired, shallow trench isolation (STI) structures may be formed above range modulated implants. 
     The number of layers in stack  60  and the thickness of each layer in stack  60  may be selected to achieve implants with any suitable depth. Implants that lie under thicker stack regions may be formed closer to the surface of substrate  31  while implants that lie under thinner stack regions may be formed deeper within substrate  31 . For example, for the same ion implantation in energy, a thicker stack  60  may result in a relatively shallower implant region, while a thinner stack  60  may result in a relatively deeper implant. 
     The ion implantation energies used in the examples of  FIGS. 11-14  are merely illustrative. Any suitable ion implantation energy may be used. For example, when implants such as implants  90  are formed through openings in photoresist, ion implantation energies may be approximately 950 keV, 950 keV or less, 900-1000 keV, 800-1200 keV, etc. When implants are formed through islands of material such as islands of stack  60 , ion implantation energies may be approximately 3000 keV, 3200 keV, 3500 keV or less, more that 3200 keV, 3000-4000 keV, 2000 keV or more, 2500 keV or more, etc. 
     Various embodiments have been described for range modulated ion implantation for image sensors. 
     Photodiodes may be separated by isolation regions. The isolation regions may be p-well or n-well regions formed by ion implantation. The isolation regions may be formed in a multi-step process that reduces the number of photolithographic patterning steps (e.g., reduces the number of photolithographic patterning steps to one or two). 
     In an initial step, a thin screen oxide layer and a thin etch stop layer may be deposited on a substrate. 
     In a subsequent step, alternating layers of material may be deposited over the etch stop layer to form a stack. The stack may include, for example, alternating layers of oxide and nitride and/or alternating layers of oxide and silicon nitride. If desired, other materials may be used. The stack may include four, five, six, more than six, or less than six alternating layers of material. 
     In a subsequent step, a layer of photoresist may be deposited over the stack of alternating layers of material. The layer of photoresist may be patterned using photolithography to form openings in the layer of photoresist where range modulated implants are not desired. Portions of photoresist that remain may correspond to isolation regions where range modulated implants are desired. 
     In a subsequent step, the stack of alternating layers of material may be etched to remove portions of the stack that are not covered by photoresist. The stack may be etched up to the etch stop layer. Following removal of these portions, the photoresist may be removed. 
     In a subsequent step, ion implantation may be performed to form implants at a first depth by implanting ions through the layers of the stack that remain on the substrate. 
     In a subsequent step, the top layer of the stack may be removed and ion implantation may be performed to form implants at a second depth. The process of removing the top layer of the stack and performing ion implantation to form implants at the desired depth may be repeated until the desired number of range modulated implants are formed. 
     The foregoing is merely illustrative of the principles of this invention and various modifications can be made by those skilled in the art without departing from the scope and spirit of the invention.

Technology Category: 5