Patent Document

BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The present invention pertains to a method of plasma etching recessed structures such as a deep trench in a substrate. The plasma source gas used to generate plasma etchant species is modulated during the etching process. The method is particularly useful in combination with particular plasma source gases for etching trenches in a silicon substrate.  
           [0003]    2. Brief Description of the Background Art  
           [0004]    Deep recessed structure etching is one of the principal technologies currently being used to fabricate microstructure devices, and is an enabling technology for many microelectromechanical systems (MEMS) applications. Strict control of the etch profile is required for these new, complex devices to perform satisfactorily. In a number of instances, it is desired to etch a vertical side wall, where vertical typically means that a taper angle formed by the side wall with a horizontal line drawn at the base of the side wall ranges from 85° up to 92°. Obtaining a controlled sidewall taper angle of 85° to 92° in combination with a smooth sidewall surface has proved a difficult task in many instances. In addition, microloading has been observed during the etching of substrates where some recess features are densely positioned while other recess features are isolated.  
           [0005]    Trenches with a sidewall positive taper angle of 85° up to 92° are useful in a variety of MEMS devices such as optical switches, tuneable capacitors, accelerometers, and gyroscopes, by way of example and not by way of limitation.  
           [0006]    Plasma etching of deeply recessed structures, where the depth of the recess is at least 10 μm, typically require a combination of reactive chemical etching with physical etching, which typically employs ion bombardment. The physical etching enables anisotropic, directional etching necessary to produce vertical sidewalls on an etched trench, for example. However, to obtain a vertical sidewall, it is necessary to control the incoming ions so that they strike the bottom of the feature being etched, but not the already etched surfaces extending above the bottom of the feature.  
           [0007]    Numerous processing techniques have been proposed to solve the challenges related to providing control over the shape (sidewall taper, for example) of the etched profile, while simultaneously providing a smooth surface on the etched sidewall. One technique for forming trenches having nearly vertical sidewalls employs a protective coating in the area of the opening to the trench. The material used to form the coating is resistant to the etchant being used to etch the trench. The coating may be applied continuously or may be applied at specific points in the trench formation process. For a more detailed description of this method, one skilled in the art should read U.S. Pat. No. 4,533,430 to Robert W. Bower, issued Aug. 6, 1985. In a related method, a silicon substrate is covered with a patterned mask which exposes select areas of a silicon substrate to plasma etching. Anisotropic etching is accomplished using alternating plasma etching and polymer formation steps. Additional information about this method may be found in Japanese Patent No. JP 63-13334, issued in 1988.  
           [0008]    Some etching methods recommend the use of the same gas mixture during plasma etching of a feature and during formation of a protective film to protect etched surfaces. In one method, by changing the substrate bias, the process is said to be switched between a first state in which the primary reaction is substrate etching and a second state in which the primary reaction is deposition of a film on the substrate surface. For a detailed description of this technique, please refer to U.S. Pat. No. 4,795,529 to Kawasaki et al., issued Jan. 3, 1989.  
           [0009]    Another description of the use of alternating plasma etching and polymer formation steps is found in U.S. Pat. No. 5,501,893 to Laermer et al., issued Mar. 26, 1996. The etch and polymerization steps are carried out in an alternating, repetitive manner until etching is complete. Subsequently, in U.S. Pat. No. 6,284,148 B1, issued Sep. 4, 2001, Laermer et al. describe a method in which the quantity of polymer deposited decreases in the course of the polymer deposition steps.  
           [0010]    In a related patent, a method is described for etching a trench in a semiconductor substrate using alternatively reactive ion etching and deposition of a passivation layer by chemical vapor deposition. The method includes varying one or more of a number of process variables with time during the etch process. The variation in process parameters is generally illustrated as being periodic, where the periodic variation corresponds to at least one sinusoidal, square, or sawtooth waveform. In one preferred embodiment, the process parameter varied over time is subjected to a ramped variation. Pumping out of the process chamber between either the steps within a given cycle or between cycles is also described. For more details of the process parameter variations described above, one skilled in the art may read U.S. Pat. No. 6,051,503 to Bhardwaj et al., issued Apr. 18, 2000.  
           [0011]    The teachings of Bhardwaj et al. add another layer of complexity to the already complex processes described by Laermer et al. for the etching of deep trenches in silicon substrates. However, this increase in process complexity is said to address or reduce various problems in the etch process described in the Laermer et al. patents.  
           [0012]    After reading the patents referred to above and a number of additional patents pertaining to the etching of deep trenches in silicon, it becomes readily apparent there is a need for a simplified, streamlined etch process which provides vertical recess feature sidewalls which are smooth (having a surface roughness of about 1 μm or less.) Further, there is a need for a process which reduces the amount of microloading which occurs when dense and isolated features are etched on the same substrate during the same etch process.  
         SUMMARY OF THE INVENTION  
         [0013]    We have developed an uncomplicated method of plasma etching deeply recessed features such as deep trenches, of at least 5 μm in depth, in a silicon-containing substrate, in a manner which generates smooth sidewalls, having a roughness of about 500 nm or less, typically a roughness ranging from about 100 nm down to 20 nm, where the sidewall taper angle, relative to a horizontal plane parallel to the face of the substrate, typically ranges from about 85° to about 92°. In one embodiment of the method, an etchant species which stabilizes the overall etch process is used constantly during the plasma etch process, while other etchant species and polymer depositing species are applied intermittently, typically periodically, relative to each other. In another embodiment, the stabilizing etchant species is used constantly and a mixture of the other etchant species and polymer depositing species is used intermittently.  
           [0014]    The stabilizing etchant species are generated from a stabilizing plasma source gas selected from the group consisting of HBr, HCl, Cl 2 , and combinations thereof. Typically the stabilizing plasma source gas makes up from about 1 volumetric % to about 25 volumetric % of the total plasma source gas to the processing chamber. The intermittent plasma etchant species are generated from a gas selected from the group consisting of SF 6 , NF 3 , CF 4 , ClF 3 , BrF 3 , IF 3 , and combinations thereof, which are added to the stabilizing etchant species which are always present during the etching process. The intermittent plasma etchant species added to the stabilizing plasma species may also be HCl or Cl 2 , in which case the HCl or Cl 2  or a combination thereof may be added to a different stabilizing etchant species, or may be increased in amount when some of the HCl or Cl 2  is already present as part of the stabilizing etchant species. The intermittent plasma etchant species may also be generated from a source gas selected from C 2 F 6  or C 3 F 8 , when O 2  is added, where the concentration of O 2  relative to the C 2 F 6  or C 3 F 8  is typically about 20% or less by volume. Typically the intermittent plasma etchant species make up from about 25 volumetric % to about 50 volumetric % of the total plasma source gas feed. The polymer depositing plasma species are generated from a gas selected from the group consisting of fluorocarbons such as C 2 F 6 , C 3 F 6 , C 4 F 6 , C 4 F 8 , C 4 F 10 , or hydrofluorocarbons such as C 2 H 2 F 4 , CHF 3 , CH 2 F 2 , CH 3 F, C 3 HF 3 , C 3 H 2 F 6 , C 4 H 5 F, or hydrocarbons such as CH 4 , C 2 H 6 , or C 3 H 8 , where CH 4  is typically used. Combinations of any of these polymer depositing species may also be used. Typically the polymer depositing plasma species make up from about 25 volumetric % to about 50 volumetric % of the total plasma source gas feed.  
           [0015]    Process variables such as, but not limited to, plasma source gas feed rate; length of time intermittent etchant species are in contact with the substrate; length of time polymer-depositing species are in contact with the substrate; process chamber pressure; substrate temperature; process chamberwall temperature; plasma power applied for plasma generation and maintenance; and, power applied to bias a substrate, may be increased (ramped up), decreased (ramped down), or remain constant as etching of a recession into a substrate continues. Depending on the particular application, it is helpful to maintain as many process variables as possible at a constant setting, as this provides the most uncomplicated embodiment of the invention.  
           [0016]    When intermittent contact between the substrate and an etchant species or polymer deposition species is used, and the contact is periodic, the period itself may be frequency modulated.  
           [0017]    Use of a stabilizing etchant continuously during the etch process enables a simplified, streamlined etch process; enables the formation of vertical sidewalls on recess etched features, while providing improved sidewall smoothness over previously known process methods; and, reduces the amount of microloading which occurs when dense and isolated features are etched on the same substrate during the same etch process.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]    [0018]FIG. 1A illustrates a CENTURA® Integrated Processing System  100  of the kind which was used during the experimentation leading to the present invention.  
         [0019]    [0019]FIG. 1B shows a schematic of an individual CENTURA® DPS™ inductively coupled etch chamber  102  of the kind which was used during the experimentation leading to the present invention.  
         [0020]    [0020]FIG. 2A shows the roughness of a sidewall surface on a deep trench produced using a prior art comparative method which includes alternating etch and polymer deposition steps.  
         [0021]    [0021]FIG. 2B shows the roughness of a sidewall surface on a trench produced using the method of the invention, where a stabilizing etchant species is maintained continuously throughout the etch process, in combination with an intermittent etchant species and an intermittent polymer-depositing plasma species which were applied alternately in a series of etch/polymer deposition cycles throughout the etch process.  
         [0022]    [0022]FIG. 3A shows the microloading effect for a series of trenches produced using a prior art comparative method which includes alternating etch and polymer deposition steps.  
         [0023]    [0023]FIG. 3B shows the microloading effect for a series of trenches produced using the method of the invention, where a stabilizing etchant species which is maintained continuously throughout the etch process, in combination with an intermittent etchant species and an intermittent polymer-depositing plasma species which were applied alternately in a series of etch/polymer-deposition cycles throughout the etch process.  
     
    
     DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS  
       [0024]    As a preface to the detailed description, it should be noted that, as used in this specification and the appended claims, the singular forms “a”, “an”, and “the” include plural referents, unless the context clearly dictates otherwise.  
         [0025]    I. An Apparatus for Practicing the Invention  
         [0026]    The embodiment example etch processes described herein were carried out in a CENTURA® Integrated Processing System available from Applied Materials, Inc., of Santa Clara, Calif. This apparatus is described in detail below; however, it is contemplated that other apparatus known in the industry may be used to carry out the invention.  
         [0027]    [0027]FIG. 1A shows an elevation schematic of the CENTURA® Integrated Processing System  100 . The CENTURA® Integrated Processing System  100  is a fully automated semiconductor fabrication system, employing a single-wafer, multi-chamber, modular design which accommodates a variety of wafer sizes. For example, as shown in FIG. 1A, the CENTURA® etch system may include decoupled plasma source (DPS) etch chambers  102 ; deposition chamber  103 ; advanced strip-and-passivation (ASP) chamber  104 ; wafer orienter chamber  106 ; cooldown chamber  108 ; and independently operated loadlock chambers  109 .  
         [0028]    [0028]FIG. 1B is a schematic of an individual CENTURA® DPS™ etch chamber  102  of the type which may be used in the CENTURA® Integrated Processing System, commercially available from Applied Materials, Inc., Santa Clara, Calif. The equipment shown in schematic in FIG. 1B includes a Decoupled Plasma Source (DPS) of the kind described by Yan Ye et al. at the Proceedings of the Eleventh International Symposium of Plasma Processing, May 7, 1996, and as published in the Electrochemical Society Proceedings, Volume 96-12, pp. 222-233 (1996). The CENTURA® DPS™ etch chamber  102  is configured to be mounted on a standard CENTURA® mainframe.  
         [0029]    The CENTURA® DPS™ etch chamber  102  consists of an upper chamber  112  having a ceramic dome  113 , and a lower chamber  116 . The lower chamber  116  includes an electrostatic chuck (ESC) cathode  110 . Gas is introduced into the chamber via gas injection nozzles  114  for uniform gas distribution. Chamber pressure is controlled by a closed-loop pressure control system (not shown) with a throttle valve  118 . During processing, a substrate  120  is introduced into the lower chamber  116  through inlet  122 . The substrate  120  is held in place by means of a static charge generated on the surface of electrostatic chuck (ESC) cathode  110  by applying a DC voltage to a conductive layer located under a dielectric film on the chuck surface (not shown). The cathode  110  and substrate  120  are then raised by means of a wafer lift  124  and a seal is created against the upper chamber  112  in position for processing. Etch gases are introduced into the upper chamber  112  via the ceramic gas injection nozzles  114 . The etch chamber  102  uses an inductively coupled plasma source power  126  operating at 2 MHZ, which is connected to inductive coil  134  for generating and sustaining a high density plasma. The wafer is biased with an RF source  130  and matching network  132  operating within the range of 100 kHz to 13.56 MHZ; more typically, within the range of 100 kHz to 2 MHZ. Power to the plasma source  126  and substrate biasing means  130  are controlled by separate controllers (not shown).  
         [0030]    The temperature on the surface of the etch chamber walls is controlled using liquid-containing conduits (not shown) which are located in the walls of the etch chamber  102 . The temperature of the semiconductor substrate is controlled using the temperature of the electrostatic chuck cathode  110  upon which the substrate  120  rests. Typically, a helium gas flow is used to facilitate heat transfer between the substrate and the pedestal.  
         [0031]    As previously mentioned, although the etch process chamber used to process the substrates described in the Examples presented herein was an inductively coupled etch chamber of the kind shown in schematic in FIG. 1B, any of the etch processors available in the industry should be able to take advantage of the etch chemistry described herein, with some adjustment to other process parameters.  
         [0032]    II. Exemplary Method of the Invention: Etching a Deep Trench Having a Sooth Sidewall in a Silison Substrate  
       EXAMPLE ONE  
     Comparative Example  
       [0033]    For purposes of comparison, a first etch process was carried out in a manner previously demonstrated in the art, where a trench is anisotropically etched in a silicon substrate. A g-line or i-line photoresist was applied over the substrate and then patterned to produce a mask over the silicon surface. The masked silicon surface was then exposed to a reactive etching plasma generated from an SF 6  plasma source gas, as step one of the etching process. Subsequently, in a second step, the etched silicon surface was contacted with a plasma generated from a polymer-forming gas (C 4 F 8 ), to cover the etched silicon surfaces with a polymer layer. Steps one and two were repeated a number of times to provide deep etching into the silicon substrate. The data for this comparative example is presented in Table One as Run # 1. The appearance of the etched sidewalls of the trench is shown in FIG. 2A, and the degree of microloading which occurred is shown in FIG. 3A.  
         [0034]    With respect to FIG. 2A, the trench structure includes an i-line photoresist masking layer  202  and an underlying silicon substrate  204 . The sidewalls  205  of trench structure  200  exhibited significant “scalloping”, where the cycling between etch and polymer deposition steps one and two, respectively, causes a rough sidewall  205 . In particular, the depth “d” of scallops  206  was in the range of about 35 nm to 40 nm, while the height “h” of scallops  206  was in the range of about 180 nm to 190 nm.  
         [0035]    With respect to FIG. 3A, the trench structure  300  includes a series of trenches of different sizes, etched into silicon substrate  306  through i-line patterned photoresist mask  308 . Trenches  302  are approximately 4,400 nm in width “W 1 ”, and 17,300 nm in height “h 1A ”. Trench  303  is approximately 10,600 nm in width “W 2 ”, and 20,200 nm in height “h 2A ”. Trenches  304  are approximately 3,200 nm in width “W 3 ”, and 16,600 nm in height “h 3A ”. The difference in etch depth observed between the 4,400 nm wide trenches  302  and the 10,600 nm wide trench  303  was about 2,900 nm, while the difference in etch depth observed between the 3,200 nm wide trenches  304  and 10,600 nm wide trench  303  was about 3,600 nm. This difference in etch depth, which is a function of the size (width) being etched, is an illustration of a microloading effect.  
       EXAMPLE TWO  
       [0036]    Data for one embodiment of the present invention, which makes use of a stabilizing etchant which is constantly present during the etch process, is presented in Table One as Run # 4, the appearance of the etched sidewalls of the trench is shown in FIG. 2B, and the degree of microloading which occurred is shown in FIG. 3B. A patterned i-line photoresist mask was formed over a silicon substrate. In a first etch step, the exposed portion of the silicon substrate was contacted with a plasma generated from a stabilizing etchant gas in combination with a reactive etching gas. Subsequently, in a second step, the etched silicon surface was contacted with a plasma generated from the same stabilizing etchant gas, in combination with a polymer-forming gas. Steps one and two were repeated a number of times to provide deep etching into the silicon substrate.  
         [0037]    With respect to FIG. 2B, the trench structure  220  includes a patterned i-line photoresist masking layer  222  and an underlying silicon substrate  224 . The sidewalls  225  of trench structure  220  exhibited insignificant “scalloping”, providing a particularly smooth trench sidewall  225 . In particular, the depth of disturbances on the surface  226  of sidewall  225  was less than 13 nm. The spacing between disturbances was in the range of about 180 nm to 190 nm, indicating that these small disturbances were due to cycling during the etch process. However, the roughness of the sidewall surface of the trench had been reduced by about 65% due to the presence of the plasma species generated from the stabilizing etchant gas which was present during the entire etch process.  
         [0038]    With respect to FIG. 3B, the trench structure  320  included a series of trenches of different sizes, etched into silicon substrate  326  through patterned mask  328 . Trenches  322  are approximately 4,400 nm in width “W 1 ”, and 18,800 nm in height “h 1B ”. Trench  323  is approximately 10,600 nm in width “W 2 ”, and 20,200 nm in height “h 2B ”. Trenches  324  are approximately 3,200 nm in width “W 3 ”, and 18,800 nm in height “h 3B ”. The difference in etch depth observed between the 4,400 nm wide trenches  322  and the 10,600 nm wide trench  323  was about 1,400 nm. This compares with the difference in etch depth observed between the 4,400 nm wide trenches  302  and the 10,600 nm wide trench  303  shown in FIG. 3A representing the comparative example. This shows a reduction in etch depth difference of about 40% was obtained using the present method rather than the prior art comparative method of Example One. This percentage difference is illustrated by (D 1A −D 1B )/D 1A ×100, with reference to FIGS. 3A and 3B. In the present Example Two, the difference in etch depth observed between 3,200 nm wide trenches  324  and the 10,600 nm wide trench  323  was about 2,150 nm. A comparison with the prior art Example One data shows that a reduction (improvement) in etch depth difference of about 36% was obtained when the present invention etch method was used. This percentage etch depth difference is illustrated by (D 2A −D 2B )/D 2A ×100. This decrease in the difference of etch depth as a function of the size of the trench is an indication of an improvement in microloading effect and is attributed to the use of a stabilizing etchant continuously throughout the etch process.  
         [0039]    Table One presents a series trial etching processes, represented as Runs # 1 through # 4, where Run # 1 is the comparative example.  
                                                                                   TABLE ONE                           Process Conditions for Various Trench Etching Experiments                Plasma       Substrate Bias       Plasma Source       No. of           Source Gas       Power &amp;   Substrate   Power &amp;       Times           Flow Rate   Time   Frequency   Voltage   Frequency   Pressure   Step was           (sccm)   (sec)   (W) &amp; (kHz)   (−V)   (W) &amp; (kHz)   (mTorr)   repeated                        Run 1                                   Step #1   SF 6  - 200   5   0 W   5-10   1,000 &amp; 1256   70   100                       (self bias)       Step #2   C 4 F 8  - 200   6   7 &amp; 400   40   1,000 &amp; 1256   70   100       Run 2       Step #1   HBr - 6   5   0 W   5-10   1,000 &amp; 1256   70   100           C 4 F 8  - 200           (self bias)       Step #2   HBr - 6   6   7 &amp; 400   40   1,000 &amp; 1256   70   100           SF 6  - 200       Run 3       Step #1   HBr - 12   5   0 W   5-10   1,000 &amp; 1256   70   100           C 4 F 8  - 200           (self bias)       Step #2   HBr - 12   6   7 &amp; 400   40   1,000 &amp; 1256   70   100           SF 6  - 200       Run 4       Step #1   HBr - 20   5   0 W   5-10   1,000 &amp; 1256   70   100           C 4 F 8  - 200           (self bias)       Step #2   HBr - 20   6   7 &amp; 400   40   1,000 &amp; 1256   70   100           SF 6  - 200                          
 
         [0040]    [0040]                                             TABLE TWO                           Structure After Etch Processing As Described in Table One                Etch Depth   Etch Depth   Patterned       Etch               @ 4.4 μm   @10.6 μm   Resist       Selectivity           Space   Space   Thickness       Si Substrate:           Between   Between   Remaining   Scallop   standard           Trenches   Trenches   After Etch   Size   i-line   Micro-       Run #   (nm)   (nm)   (μm)   (Å)   photoresist   loading               1   1,725   2,000   0.53   333   137   15%       2   NA   2,100   0.56   333   146   NA       3   NA   2,000   0.62   333   147   NA       4   1,880   2,100   0.63   150   154   10%                            
         [0041]    [0041]                                                   TABLE THREE                           Process Conditions for Silicon Etching Step                        Optimum           Range   Typical   Known           of Process   Process   Process       Process Parameter   Conditions   Conditions   Conditions                    Stabilizing Etchant 1      1-200    2-100   20       Flow Rate (sccm) 2         SF 6  Flow Rate (sccm) 2      20-500    50-350   200       Inert gas 3  Flow Rate (sccm) 2      0-100   20-70   unknown       Plasma Source Power (W)    700-2000    900-1300   1000       Plasma Source Power     100-13,560    160-2000   200-400       RF Frequency (kHz)       Substrate Bias Power (W)    0-40    5-15    5-10       Substrate Bias Power RF   100-500   200-500   400       Frequency (kHz)       Substrate Bias Voltage (−V)    2-100    10-100   10-50       Process Chamber Pressure    4-200    25-180    30-150       (mTorr)       Substrate Temperature (° C.)    10-120   20-50   20-30       Etch Time Period (seconds)    3-30    3-20    4-18                                            
         [0042]    When a different intermittent fluorine-containing etchant gas such as NH 3  or CF 4  is substituted for SF 6 , it is necessary to adjust the flow rate of the etchant gas to maintain approximately the same concentration of fluorine etchant species. One skilled in the art can make this adjustment with minor experimentation in view of published kinetics data for the fluorine-containing gases mentioned.  
                                                   TABLE FOUR                           Process Conditions for Polymer Deposition Step                        Optimum           Range   Typical   Known           of Process   Process   Process       Process Parameter   Conditions   Conditions   Conditions                    Stabilizing Etchant 1      1-200    2-100   20       (sccm) 2         Fluorocarbon 3  (sccm) 2      50-200    25-220   100-220       or Hydrofluorocarbon 4      50-200    25-220   180-220       (sccm) 2         or Hydrocarbon 5  (sccm) 2      50-100   20-50   unknown       Inert Gas 7  Flow Rate (sccm) 2      0-100    0-100    0-100       Plasma Source Power (W)    700-3000    900-2000   1000       Plasma Source Power RF     100-13,560    100-2000   200-400       Frequency (kHz)       Substrate Bias Power (W)   0   0   0       Substrate Bias Power RF   160-560   200-500   400       Frequency (kHz)       Substrate Bias Voltage (−V)   5 (self bias)   (self   5 (self               bias)   bias)       Process Chamber Pressure    5-200    25-180    30-150       (mTorr)       Substrate Temperature (° C.)    15-120   20-50   20-30       Polymer Deposition Time    3-20    3-20   4-7       Period (seconds)                                                                  
 
         [0043]    As previously mentioned, the stabilizing etchant species which is used constantly during the plasma etching process may be used in combination with an intermittent etch step etchant species during the etch step, followed by intermittent application of a polymer deposition step plasma species, or may be used in combination with an intermittent plasma comprised of admixed etchant species and polymer deposition species. The number of applications of intermittent etch step etchant species and intermittent polymer deposition species will vary depending on the depth of the recessed feature to be etched. Typically, for example, for a trench which is about 20 μm deep, intermittent etching will be carried out from about 50 to about 100 times. When the polymer deposition is carried out separately from the intermittent etching, the polymer deposition step for the 20 μm deep trench will be carried out from about 50 to about 100 times.  
         [0044]    After completion of the etching of the recessed feature, it may be desirable to use a clean up step to remove residual masking materials and/or residual polymeric material from the etching process. One example of a clean up method is an oxygen plasma clean-up step which is particularly useful when a hard mask layer (such as silicon oxide, silicon nitride, or silicon oxynitride) is used in lieu of, or in combination with, a photoresist, due to the tendency of oxygen to rapidly etch conventional organic photoresists.  
                                                   TABLE FIVE                           Process Conditions for Clean-up Step                        Optimum           Range   Typical   Known           of Process   Process   Process       Process Parameter   Conditions   Conditions   Conditions                    O 2  Flow Rate (sccm)    50-500   100-300   200       Plasma Source Power (W)    500-3000    700-2000   1000       Plasma Source Power RF       Frequency (kHz)     100-13,560    100-2000   200-400       Substrate Bias Power (W)    0-100    0-50    5-10       Substrate Bias Power RF   100-500   200-500   400       Frequency (kHz)       Substrate Bias Voltage (−V)    0-200    20-150    40-100       Process Chamber Pressure    20-200    25-100   30       (mTorr)       Substrate Temperature (° C.)*    40-120    50-100   60       Clean-Up Step Time Period    10-600   100-400   180       (seconds)                          
 
         [0045]    The above described exemplary embodiments are not intended to limit the scope of the present invention, as one skilled in the art can, in view of the present disclosure expand such embodiments to correspond with the subject matter of the invention claimed below.

Technology Category: 5