Patent Document

RELATED APPLICATION  
       [0001]     This is Application is related to a co-pending Patent Application entitled “Method of Aligning Deposited Nanotubes onto an Etched Feature Using a Spacer”, filed on Dec. 14, 2005, having Attorney Docket No. 05-1149/LSI1P268 and having USPTO Ser. No. ______, which is incorporated herein by reference and from which priority is hereby claimed.  
       TECHNICAL FIELD  
       [0002]     The invention described herein relates generally to carbon nanotube layer fabrication and alignment processes. In particular, the invention relates to methods, processes, and structures enabling a carbon nanotube layer to be aligned with specific features formed on a semiconductor substrate.  
         [0003]     Particular low-K materials include, but are not limited to: organic thermoplastic and thermosetting polymers such as polyimides, polyarylethers, benzocyclobutenes, polyphenylquinoxalines, polyquinolines; inorganic and spin-on glass materials such as silsesquioxanes, silicates, and siloxanes; and, mixtures, or blends, of organic polymers and spin-on glasses. Further, examples of CVD low-K materials include SiCOH or polymers of parylene and napthalene, copolymers of parylene with polysiloxanes or teflon, and polymers of polysiloxane. Other ILD 203 materials include, but are not limited to, silicon dioxide or combinations of silicon dioxide and other doped dielectrics (e.g., BPSG, PSG)  
       BACKGROUND  
       [0004]     Nano-materials and nanotechnologies are fast becoming a force in semiconductor technology. Nano-materials are generally described as materials whose fabrication scale is so small that the molecular properties of the materials begin to predominate over the bulk properties of the material.  
         [0005]     In particular, carbon nanotube technologies are becoming a significant factor in electronic device construction. In one implementation, nano-materials comprise nanotubes. Single-wall carbon nanotubes (SWCNT) are quasi-one dimensional nanowires, which exhibit either metallic or semiconductor properties depending upon their chirality and radius. In some implementations, such carbon nanotubes are in the range of about 3-50 nanometers (nm) in diameter and several micrometers (μm) long. Single-wall nanotubes have been demonstrated as both semiconductor layers in thin film transistors as well as metallic interconnects between metal layers. Applications of carbon nanotube (CNT) electronic devices are compounding almost daily. Most notably are new CMOS transistors, non-volatile memory and backend interconnects.  
         [0006]     Nanotubes can be deposited in layers or ribbons of materials to, for example, construct electrical connections or nanowires. One new area of implementation is that of non-volatile memory devices. One such application is described in U.S. Pat. No. 6,919,592 which is directed to hybrid circuits using nanotube electromechanical memory. This reference is hereby incorporated by reference for all purposes. This reference also describes in detail the methods of forming nanotube layers as known to those having ordinary skill in the art. A fuller description of the operation of these devices can be obtained in these and other related references.  
         [0007]     The inventors point out that this is just but one of a myriad of potential applications for this extremely versatile technology. In many applications, the nanotubes form conductive layers that are is deposited onto substrates. During such fabrication of electrical structures, alignment issues for the deposition of nanotube layers become important.  
         [0008]     FIGS.  1 ( a ) and  1 ( b ) depict a perfectly aligned carbon nanotube (CNT) layer  101  aligned against the side  102  of a metallization line  103 . The problem with forming this structure using existing technologies is that it is dependent on extreme adherence to very narrow tolerances. Using alignment marks the CNT patterns are aligned to the metallization pattern to effect the alignment of the two structures.  
         [0009]     In practice such alignment fails a significant portion of the time due to alignment errors. What is needed is a robust manufacturable process for aligning nanotubes with an associated metallization layer.  
       SUMMARY OF THE INVENTION  
       [0010]     In accordance with the principles of the present invention, an improved fabrication process for aligning layers of nano-material with an etched feature is disclosed.  
         [0011]     In general, this disclosure teaches methods to form nanomaterial layers that are aligned with adjacent etched features.  
         [0012]     One embodiment of the invention comprises a method of forming a carbon nanotube electrical connection aligned with an etched feature. The method involving forming an etched feature having a top and a side and depositing a patterned nanotube layer on the substrate such that the nanotube layer contacts portions of the side and overlaps a portion of the top of the etched feature. The nanotube layer is then covered with an insulating layer. Then a top portion of the insulating layer is removed to expose a top portion of the etched feature and a portion of the nanotube layer is removed from on top of the etched feature leaving a portion of the nanotube layer exposed.  
         [0013]     In another embodiment, a method involves forming an etched feature with a notched portion at its top. A patterned nanotube layer is deposited on the substrate such that the nanotube layer overlaps the notched portion of the top of the etched feature. The nanotube layer is then covered with an insulating layer. Then a top portion of the insulating layer is removed to expose a top portion of the etched feature. Optionally, a portion of the nanotube layer is removed from on top of the etched feature leaving a portion of the nanotube layer exposed.  
         [0014]     In another embodiment, a carbon nanotube electrical connection to a metal layer is disclosed. The connection including a raised metal layer formed on a substrate, the metal layer having a notched feature formed thereon. A nanotube layer is formed in contact with the metal layer so that the nanotube layer overlaps the notched portion of the top of the metal layer. An insulating layer is on the substrate, the insulating layer covers the nanotube layer and leaves a portion of the top of the metal layer exposed.  
         [0015]     These and other aspects and advantages of the invention will become apparent from the following detailed description and accompanying drawings which illustrate, by way of example, the principles of the invention. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0016]     The following detailed description will be more readily understood in conjunction with the accompanying drawings, in which:  
         [0017]     FIGS.  1 ( a ) &amp;  1 ( b ) are simplified schematic depictions of a substrate having a nanotube layer aligned with a metal-containing layer.  
         [0018]      FIG. 2  is simplified plan view of a substrate illustrating some of the misalignment issues addressed by embodiments of the invention.  
         [0019]     FIGS.  3 ( a )- 3 ( e ) depict a series of a simplified schematic section views of a process embodiment used to fabricate nanotube layers aligned with an etched feature in accordance with the teachings of the invention.  
         [0020]     FIGS.  4 ( a )- 4 ( g ) depict another series of a simplified schematic section views of another process embodiment used to fabricate nanotube layers aligned with an etched feature in accordance with the teachings of the invention.  
         [0021]     FIGS.  5 ( a )- 5 ( g ) depict another series of a simplified schematic section views of another process embodiment used to fabricate nanotube layers aligned with an etched feature in accordance with the teachings of the invention. 
     
    
       [0022]     It is to be understood that in the drawings like reference numerals designate like structural elements. Also, it is understood that the depictions in the Figures are not necessarily to scale.  
       DETAILED DESCRIPTION OF THE INVENTION  
       [0023]     The present invention has been particularly shown and described with respect to certain embodiments and specific features thereof. The embodiments set forth hereinbelow are to be taken as illustrative rather than limiting. It should be readily apparent to those of ordinary skill in the art that various changes and modifications in form and detail may be made without departing from the spirit and scope of the invention.  
         [0024]     In general, the present invention encompasses semiconductor manufacturing techniques that are used to align nanomaterial layers and ribbons with etched features. In one notable embodiment, the etched features comprise metallization lines. Additionally, such nano-materials are specifically contemplated to include carbon nanotubes (CNT). In one approach, the etched feature is formed having a notch in its top surface. Nanomaterials are then deposited onto the surface covering the notched feature. The nano-materials also can extend beyond the final desired endpoint for the pattern of nanomaterials. The nanomaterials are then covered with insulating materials. Then the top of the insulating material is removed. The removal of the insulating material generally exposes a top portion of the etched feature. However, such construction resolves alignment issues.  
         [0025]      FIG. 2  illustrates some alignment problems facing a manufacturer today. A CNT ribbon  101  that is perfectly aligned and has good contact with metallization line  103  is shown at the interface between  101  and  103 . Misaligned CNT ribbon  101 ′ is has drifted to the right (as indicated by the arrow) opening a space between the CNT ribbon  101 ′ and the metallization line  103 . This will lead to circuit failure. Misaligned CNT ribbon  101 ″ is has drifted to far to the left (as indicated by the arrow) causing an excessive amount overlap onto the metallization line  103 . This can lead further process and alignment difficulties.  
         [0026]     The inventors have discovered alternative fabrication processes which circumvent many of the difficulties in present processes.  
         [0027]      FIG. 3 ( a ) is a simplified schematic section view of a substrate  301  having a metallization layer  302  formed thereon. The substrate can be of any configuration or material. Common substrate surfaces include but are not limited to silicon, gallium arsenide, silicon dioxide, dielectric materials and so on. Additionally, the substrate can include vias, trenches, and a myriad of other substrate conformations and configurations as well as a range of circuit elements and operational electronic structures. The metallization layer can be constructed of any of a number of metal containing materials. Such materials can include but are not limited to aluminum, tungsten, tantalum, titanium, gold, silver, platinum, alloyed materials, metal nitrides, or multi-layered structures containing many layers that can comprise more than one material. In one implementation, an aluminum metal layer  302  of about 1000 Å (angstrom) thick can be formed. Additionally, the applicants point out that a wide range of alternative aluminum thicknesses can be employed. For example, ranging from about 400 Å to about 2 μm (micrometer).  
         [0028]     Referring to  FIG. 3 ( b ) the metallization layer  302  is masked  303  (e.g., using a photoresist arranged in a mask pattern). The metal  302  is then anisotropically etched to form vertical sidewalls  304 . Methods of anisotropic etching to obtain nearly vertical sidewalls are known to those having ordinary skill in the art. By way of example, reactive ion etching (RIE) or other directional etch techniques can be employed. The exact techniques will vary depending on the metal materials and substrate materials involved as well the final desired profile of the sidewalls.  
         [0029]     Subsequently, a layer of nanomaterials is deposited on the substrate and then patterned and etched into the desired pattern. Significantly, the nanomaterials overlap onto the top of the metal layer an amount greater than the final desired amount of overlap. Commonly, the nano-material is comprised of carbon nanotubes. However, many other nano-materials known in the art can also be employed in accordance with the principles of the invention. Methods of forming such layers of carbon nanotubes are well known in the art and need not be discussed in detail here.  
         [0030]     Referring to  FIG. 3 ( c ), the substrate  301  is shown with the etched metal layer  302  in place. A layer  310  of carbon nano-tubes has been deposited onto the substrate and then patterned and etched to form a ribbon  310  of CNT material in place on the surface including the sidewall  311  of the metal layer  302  and the top  312  of the metal layer  302 . The CNT ribbon  310  extends beyond the desired amount of overlap. In this example, the desired amount of overlap is no overlap (i.e., the ribbon is to extend to the sidewall and no further). Once the layer  310  of carbon nano-tubes has been etched into the appropriate pattern the photo mask is removed. Because the layer of carbon nano-tubes is delicate solvent are used to remove the photomask layer.  
         [0031]     Referring to  FIG. 3 ( d ), the substrate  301  is then covered in an electrically insulative material. This insulating material  313  covered the CNT  310  and the metal layer  302  as well as portions of the substrate  301 . One particularly useful embodiment uses silicon dioxide (SiO 2 ) as the insulating material  313 . Of course, the inventors contemplate that any type of electrically insulating material can be employed to as the insulating material  313 . Other commonly used insulative materials include but are not limited to low-K materials including (without limitation): organic thermoplastic and thermosetting polymers such as polyimides, polyarylethers, benzocyclobutenes, polyphenylquinoxalines, polyquinolines; inorganic and spin-on glass materials such as silsesquioxanes, silicates, and siloxanes; and, mixtures, or blends, of organic polymers and spin-on glasses. Further, CVD low-K materials could be used, such as SiCOH or polymers of parylene and napthalene, copolymers of parylene with polysiloxanes or teflon, and polymers of polysiloxane. Other insulative materials can include, but are not limited to, porous SiO 2  or combinations of silicon dioxide and other doped dielectrics (e.g., BPSG, PSG) and a range of other insulative and low-K dielectric materials known to those having ordinary skill in the art.  
         [0032]     Once the CNT ribbon is insulated, the excess insulative material is removed to form an insulative layer and expose a portion of the metal layer if desired. Referring to  FIG. 3 ( e ), the excess insulating material is removed to form insulating layer  315 . The CNT  310  remains in good electrical contact with the sidewalls  311  of the metal layer  302 . Additionally, the insulating layer  315  provides good insulation for the buried CNT layer  310 . The excess insulating material can be removed using techniques such as etching which is conducted until the metal layer is exposed. Alternatively CMP (chemical mechanical polishing techniques can be employed).  
         [0033]     FIGS.  4 ( a )- 4 ( g ) depict yet another embodiment of constructing a nanotube apparatus.  FIG. 4 ( a ) is a simplified schematic section view of a substrate  401  having a metallization layer  402  formed thereon. The depicted substrate and metal is much the same as shown in  FIG. 3 ( a ).  
         [0034]     Referring to  FIG. 4 ( b ) the metallization layer  402  is masked  403  (e.g., using a photoresist arranged in a mask pattern). The metal  402  is then subjected to an isotropic etch techniques. Such isotropic etch techniques are well known to those having ordinary skill in the art. For example, if the metal layer comprises aluminum, one approach to isotropic etching can employ a standard phosphoric acid etch combination such as 16:1:1:2 (ratio of phosphoric acid:water:acetic acid:nitric acid). Such an etch process results in a suitable isotropic etch profile. This first isotropic etch operation etches the metal layer  402  such that some of the etch undercuts the mask pattern  403  and extends under edges of the mask pattern to remove a portion of the top surface of the metal layer forming a notched feature  404  on the metal layer. The precise amount of overetch or the size of the notched feature is selected by the user. Generally, it is preferable that the notch height be greater than about half the height (thickness) of the metal layer. This attribute is better illustrated in  FIG. 4 ( c ).  
         [0035]      FIG. 4 ( c ) shows a second etch step that comprises an anisotropic etch step. The remaining metal is anisotropically etched to form vertical sidewalls  405  below the etched feature  404 . Methods of anisotropic etching to obtain nearly vertical sidewalls are known to those having ordinary skill in the art. By way of example, reactive ion etching (RIE) or other directional etch techniques can be employed. The exact techniques will vary depending on the metal materials and substrate materials involved as well the final desired profile of the sidewalls. As explained previously, the height f of the notched feature  404  is preferably less than about half the height d of the metal layer  402 . At this point, the photomask layer  403  is removed.  
         [0036]     Subsequently, a layer of nanomaterials is deposited on the substrate and then patterned and etched into the desired pattern. Significantly, the nanomaterials overlap into the notched region and onto the top of the metal layer an amount greater than the final desired amount of overlap. Commonly, the nano-material is comprised of carbon nanotubes. However, many other nano-materials known in the art can also be employed in accordance with the principles of the invention. Methods of forming such layers of carbon nanotubes are well known in the art and need not be discussed in detail here.  
         [0037]     Referring to  FIG. 4 ( d ), the substrate  401  is shown with the etched metal layer  402  in place. A layer  410  of carbon nano-tubes has been deposited onto the substrate and then patterned and etched to form a ribbon  410  of CNT material in place on the surface including the sidewall  405  of the metal layer  402  and the top  412  of the metal layer  402 .  
         [0038]     Referring to  FIG. 4 ( e ), the layer  410  of carbon nano-tubes is patterned and etched to form a ribbon  410  of CNT material in place on the surface including the sidewall of the metal layer  402  and the top  412  of the metal layer  402 . The CNT ribbon  410  extends beyond the desired amount of overlap. In this example, the ribbon overlap is over the top of the metal layer and over a notched portion. Once the layer  410  of carbon nano-tubes has been etched into the appropriate pattern the photo mask is removed. Because the layer of carbon nano-tubes is delicate solvents are generally used to remove the photomask layer.  
         [0039]     Referring to  FIG. 4 ( f ), the substrate  401  is then covered in an electrically insulative material. This insulating material  413  covered the CNT  410  and the metal layer  402  as well as portions of the substrate  401 . One particularly useful embodiment uses silicon dioxide (SiO 2 ) as the insulating material  413 . Of course, the inventors contemplate that any type of electrically insulating material can be employed to as the insulating material  413 . Other commonly used insulative materials include but are not limited to porous SiO 2 , FSG (fluorosilicate glasses), low-K dielectric materials, and the like.  
         [0040]     Once the CNT ribbon is insulated, the excess insulative material is removed to form an insulative layer and expose a portion of the metal layer if desired. Referring to  FIG. 4 ( g ), the excess insulating material is removed to form insulating layer  415 . The CNT  410  remains in good electrical contact with the sidewalls of the metal layer  402  and also in good contact with the notched portions  404  at the top of the metal layer  402 . Additionally, the insulating layer  415  provides good insulation for the buried CNT layer  410 . The excess insulating material can be removed using techniques such as etching which is conducted until the metal layer is exposed. Alternatively CMP (chemical mechanical polishing techniques can be employed). The amount of overlap is then determined by the size of the notched portion and also the amount planarization of the top surface. For example, the planarization can continue until the entire notched portion  404  is removed. As a result, the final structure will have no overlap.  
         [0041]     FIGS.  5 ( a )- 5 ( g ) depict yet another embodiment of constructing a nanotube apparatus.  FIG. 5 ( a ) is a simplified schematic section view of a substrate  501  having a metallization layer  502  formed thereon. The depicted substrate and metal is much the same as shown in FIGS.  3 ( a ) and  4 ( a ). The metallization layer  502  is masked  503  (e.g., using a photoresist arranged in a mask pattern).  
         [0042]     Referring to  FIG. 5 ( b ), the metal  502  is then subjected to a partial first anisotropic etch. Such anisotropic etch techniques are well known to those having ordinary skill in the art. This first isotropic etch operation etches the metal layer  502  a partial distance  515 . The depth of this first etch should be one half the thickness of the metal layer or less.  
         [0043]     Referring to  FIG. 5 ( c ), the photo mask  503  is then etched (or otherwise narrowed) to reduce the line width of the photo mask. This new narrowed photo mask pattern  503 ′ serves as the mask for further etching.  
         [0044]      FIG. 5 ( d ) shows a second etch step that comprises an anisotropic etch step. The remaining metal is anisotropically etched to form vertical sidewalls  505  and fully render a notched feature  504 . Methods of anisotropic etching to obtain nearly vertical sidewalls are known to those having ordinary skill in the art. By way of example, reactive ion etching (RIE) or other directional etch techniques can be employed. The exact techniques will vary depending on the metal materials and substrate materials involved as well the final desired profile of the sidewalls. As explained previously, the two etch steps are conducted so that height f of the notched feature  504  is preferably less than about half the height d of the metal layer  502 . At this point, the remaining photomask layer  503 ′ is removed.  
         [0045]      FIG. 5 ( e ) depicts a layer of nanomaterials  510  that has been deposited on the substrate and then patterned and etched into the desired pattern. Significantly, the nanomaterials overlap into the notched region and onto the top of the metal layer an amount greater than the final desired amount of overlap. Commonly, the nano-material is comprised of carbon nanotubes. However, many other nano-materials known in the art can also be employed in accordance with the principles of the invention. Methods of forming such layers of carbon nanotubes are well known in the art and need not be discussed in detail here.  
         [0046]     As before, the layer  510  of carbon nano-tubes can be deposited onto the substrate and patterned to form a ribbon  510  of CNT material in place on the surface including the sidewall of the metal layer  502  and the top of the metal layer  502 . As in the previous embodiments, the CNT ribbon  510  extends beyond the desired amount of overlap. In this example, the ribbon overlap is over the top of the metal layer and over a notched portion. Once the layer  510  of carbon nano-tubes has been etched into the appropriate pattern the photo mask is removed. Because the layer of carbon nano-tubes is delicate solvents are generally used to remove the photomask layer.  
         [0047]     Referring to  FIG. 5 ( f ), the substrate  501  is then covered in an electrically insulative material. This insulating material  513  covered the CNT  510  and the metal layer  502  as well as portions of the substrate  501 . One particularly useful embodiment uses silicon dioxide (SiO 2 ) as the insulating material  513 . Of course, the inventors contemplate that any type of electrically insulating material can be employed to as the insulating material  513 . Other commonly used insulative materials include but are not limited to porous SiO 2 , FSG (fluorosilicate glasses), low-K dielectric materials, and the like.  
         [0048]     Once the CNT ribbon is insulated, the excess insulative material is removed to form an insulative layer and expose a portion of the metal layer if desired. Referring to  FIG. 5 ( g ), the excess insulating material is removed to form insulating layer  515 . The CNT  510  remains in good electrical contact with the sidewalls of the metal layer  502  and also in good contact with the notched portions  504  at the top of the metal layer  502 . Additionally, the insulating layer  515  provides good insulation for the buried CNT layer  510 . The excess insulating material can be removed using techniques such as etching which is conducted until the metal layer is exposed. Alternatively CMP (chemical mechanical polishing techniques can be employed). The amount of overlap is then determined by the size of the notched portion and also the amount planarization of the top surface. For example, the planarization can continue until the entire notched portion  504  is removed. As a result, the final structure will have no overlap.  
         [0049]     Some of the advantages realized by some embodiments of the invention include, but are not limited to, a wider tolerance for misalignment between the metal and nanotube layers. Especially, the methodologies described herein are capable of dealing with line width variation in the metal lines caused by imperfections in lithography processes. Also, the described processes are more resilient to alignment failures in the various fabrication processes.  
         [0050]     The present invention has been particularly shown and described with respect to certain preferred embodiments and specific features thereof. However, it should be noted that the above-described embodiments are intended to describe the principles of the invention, not limit its scope. Therefore, as is readily apparent to those of ordinary skill in the art, various changes and modifications in form and detail may be made without departing from the spirit and scope of the invention as set forth in the appended claims. Other embodiments and variations to the depicted embodiments will be apparent to those skilled in the art and may be made without departing from the spirit and scope of the invention as defined in the following claims. Although only a few variations and configurations are expressly disclosed herein, it should be appreciated by anyone having ordinary skill in the art that, using the teachings disclosed herein, many different implementations can be employed and still fall within the scope of the claims. Further, reference in the claims to an element in the singular is not intended to mean “one and only one” unless explicitly stated, but rather, “one or more”. Furthermore, the embodiments illustratively disclosed herein can be practiced without any element which is not specifically disclosed herein.

Technology Category: 7