Patent Document

BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a variable capacitance element and a high-frequency device that include a control voltage application circuit preferably for use in an RFID (Radio Frequency Identification) system or a near field communication (NFC: Near Field Communication) system, in which communication with a target device is performed by an electromagnetic field signal. 
     2. Description of the Related Art 
     The NFC is one of near field communication standards using a frequency band of 13 MHz, and expected to be applied to various terminals including mobile communication terminals. A mobile communication terminal using NFC typically has an RFIC for NFC built in a main body of the terminal, and the RFIC for NFC is connected to an antenna coil for NFC that is also built within the terminal main body. Further, the antenna coil is connected to a capacitance element so as to resonate at a communication frequency, and the capacitance element and the antenna coil constitute an antenna circuit. In addition, the antenna circuit and the RFIC for NFC or the like constitute a wireless communication module (hereinafter referred to as “NFC module”). 
     While a communication frequency for the NFC module is previously determined, a resonant frequency to which the antenna circuit is to be tuned varies in some degree depending on its use conditions and a production tolerance. For example, a circuit architecture of the antenna circuit as a resonance circuit is different between a reader/writer mode and a card mode. Accordingly, it is necessary to adjust the resonance circuit according to the mode so that a predetermined resonant frequency is maintained in the both modes. Further, the use conditions change according to an environment in which the NFC module is installed. For example, the resonant frequency of the antenna circuit changes depending on whether or not there is metal near the NFC module. 
     If a frequency band of the antenna in the NFC module is sufficiently broad, fine adjustment due to the difference in the use conditions is not necessary. However, it has become difficult to ensure an adequate antenna size as the terminals of late are increasingly downsized, and the antenna&#39;s bandwidth may not be broadened if the size of the antenna is small. Therefore, it is necessary to adjust the resonant frequency to achieve an optimal value. 
     As one method of adjusting the resonant frequency, there is known an antenna circuit including a capacitor configured by a variable capacitance element capable of changing a capacitance value by an applied voltage (See, for example, Japanese Patent Unexamined Publication No. 2009-290644). Alternatively, Japanese Patent Unexamined Publication No. 2010-147743 discloses a circuit that switches between entire capacitance values by selectively connecting a plurality of capacitors. 
       FIG. 9  is an example of a communication circuit disclosed in Japanese Patent Unexamined Publication No. 2010-147743. In the drawing, a non-contact IC unit  47  is configured by a non-contact IC chip, an antenna parallel capacitor unit having a capacitor Cin, parallel capacitors C 1  to C 3 , and the switches SW 1  to SW 3 , and an antenna L 1 . Values of electric capacitances of the capacitor Cin and the parallel capacitors C 1  to C 3  are static. The switches SW 1  to SW 3  are circuits for switching between ON and OFF of the parallel capacitors C 1  to C 3 , respectively. After the non-contact IC unit  47  is incorporated in a mobile telephone  1 , a control IC  62  having a non-volatile memory built in is connected to the non-contact IC unit  47 . The control IC  62  controls the switches SW 1  to SW 3  of the non-contact IC unit  47  to switch between ON and OFF of the switches SW 1  to SW 3 . 
     However, when a variable-capacitance diode and a switching circuit are provided, it is necessary to provide a space for mounting these active elements, and there is often a case in which the resonant frequency changes because distortion may easily occur since these elements are active elements. Further, a large number of capacitors and switches are necessary in order to adjust the capacitance value in fine steps by switching between the plurality of capacitors. This may adversely complicate the circuit architecture, and increase the size of an IC. 
     Alternatively, it is possible to use a trimmer capacitor to mechanically set the capacitance value. However, this may easily make an RFID device complicated and larger since mechanical control is required in order to change its capacitance value, and it is often not possible to ensure reliability on impact due to falling or the like. 
     SUMMARY OF THE INVENTION 
     Preferred embodiments of the present invention provide a variable capacitance element and a high-frequency device that include a control voltage application circuit that eliminates problems such as distortion due to active elements and growing IC size along with complication of circuit architecture, and ensures reliability on impact due to falling or the like. 
     A high-frequency device according to a preferred embodiment of the present invention includes an antenna coil, a variable capacitance element configured to change a resonant frequency of an antenna circuit including the antenna coil, and an RFIC connected to the variable capacitance element, wherein the variable capacitance element includes ferroelectric capacitors each configured such that a ferroelectric film is sandwiched between capacitor electrodes and such that a capacitance value changes according to a value of a control voltage applied between the capacitor electrodes, and a control voltage application circuit including a resistance voltage divider circuit including a plurality of resistance elements having different resistance values and configured to apply a control voltage to the variable capacitance element. 
     With this configuration, a problem of distortion is eliminated since a switch that is an active element is not used, and the size of an IC is significantly downsized along with simplifying circuit architecture. Further, it is easily possible to ensure reliability on impact due to falling or the like. 
     Preferably, each of the plurality of resistance elements includes a first terminal connected to the control voltage application circuit, and a second terminal connected to each of IO terminals of the RFIC. 
     With this configuration, the control voltage to be applied to the variable capacitance element is generated using a simple circuit, and complication of circuit architecture is effectively eliminated. 
     Preferably, the plurality of resistance elements are resistance patterns provided on a substrate, and each of the resistance patterns are provided such that resistance values of the plurality of resistance elements are in a ratio based on powers of 2 with respect to a lowest value among the resistance values. 
     With this configuration, it is possible to achieve a linear relationship between values of the control data and the control voltage for the variable capacitance element with a relatively smaller number of IO terminals, and to facilitate setting in multiple steps at constant resolution. 
     Preferably, the variable capacitance element and the control voltage application circuit are provided on the substrate using a thin film process, and the plurality of resistance elements are provided on the substrate in one layer using one process. 
     With this configuration, the number of the components is reduced, wiring of the data transmission lines is simplified to a large extent, and thus the size and the weight of the communication circuit are reduced. In addition, a ratio between the resistance elements is stabilized even if there is an overall variation in the resistance values of the resistance elements vary, that is, even if there is a variation in absolute values. Therefore, the voltage dividing ratio of the resistance voltage divider circuit is constant, and it is possible to always apply a predetermined stable control voltage to the variable capacitance element. 
     Preferably, the variable capacitance element includes a plurality of RF resistance elements connected in parallel to both ends of the respective ferroelectric capacitors, and the RF resistance elements are provided in a layer different from the layer in which the plurality of resistance elements are provided. 
     With this configuration, it is possible to determine most appropriate resistance values for the RF resistance element and the voltage-dividing resistance element independently. 
     A variable capacitance element according to another preferred embodiment of the present invention includes ferroelectric capacitors each configured such that a ferroelectric film is sandwiched between capacitor electrodes, and a control voltage application circuit connected to the ferroelectric capacitors, provided with a plurality of resistance elements with different resistance values, and configured to apply a control voltage whose value of a voltage applied to the ferroelectric capacitor changes in a plurality of ways. 
     With this configuration, a problem of distortion is eliminated since a switch that is an active element is not used, and the size of an IC is significantly downsized along with simplifying circuit architecture. Further, it is easily possible to ensure reliability on impact due to falling or the like. 
     According to various preferred embodiments of the present invention, ferroelectric capacitors each including a ferroelectric film sandwiched between capacitor electrodes are preferably used as a variable capacitance element configured to control a resonant frequency of an antenna coil, and a plurality of resistance elements having different resistance values are preferably used as a control voltage application circuit to apply a control voltage to the ferroelectric capacitors. Therefore, it is possible to achieve a variable capacitance element and a high-frequency device that have a control voltage application circuit with which although small, distortion does not easily occur and frequency characteristics are stable and reliable. Further, it is not necessary to use a variable capacitance element that requires mechanical control such as a trimmer capacitor. Therefore, it is possible to achieve a variable capacitance element and a high-frequency device that have a control voltage application circuit with which although small, high reliability on impact due to falling or the like is achieved. 
     The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a circuit diagram of a communication circuit  101  including a variable capacitance element and a high-frequency device according to a preferred embodiment of the present invention. 
         FIG. 2  is a detailed diagram of circuits provided between an RFIC  11  and an antenna coil  13 . 
         FIG. 3  is an entire circuit diagram within a variable capacitance element  14 . 
         FIG. 4  is a chart showing a relationship between 5-bit values from ports P 21 -P 25  shown in  FIG. 3  and a resistance voltage dividing ratio. 
         FIG. 5  is a sectional view of a main portion of the variable capacitance element  14 . 
         FIG. 6A  illustrates a resistive film pattern of a resistance element  14 B of a variable capacitance element unit. 
         FIG. 6B  illustrates a resistive film pattern of a control voltage application circuit  14 R of the variable capacitance element unit. 
         FIG. 7  is a three-view drawing of a variable-capacitance-element built-in RFIC  110 . 
         FIG. 8  is a sectional view of a state in which the variable-capacitance-element built-in RFIC  110  is mounted on a rewiring board  20 . 
         FIG. 9  is a circuit diagram of a communication circuit disclosed in Japanese Patent Unexamined Publication No. 2010-147743. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       FIG. 1  is a circuit diagram of a communication circuit  101  including a variable capacitance element and a high-frequency device that include a control voltage application circuit. The communication circuit  101  is one example of NFC modules. The communication circuit  101  preferably includes an RFIC  11 , a control IC  12 , an antenna coil  13 , and a variable capacitance element  14 . The variable capacitance element  14  and the RFIC  11  constitute a variable-capacitance-element built-in RFIC  110 . In the present preferred embodiment, the variable capacitance element  14  preferably is the variable capacitance element including a control voltage application circuit. A circuit configured by the variable-capacitance-element built-in RFIC  110  and the antenna coil  13  corresponds to a “high-frequency device” according to various preferred embodiments of the present invention. 
     The RFIC  11  includes IO terminals  11 P for GPIO (General Purpose Input/Output). Similarly, the control IC  12  includes IO terminals  12 P for GPIO. 
     The RFIC  11  performs conversion between a baseband signal and a high-frequency signal. The control IC controls the RFIC  11 , and receives and transmits data including communication data. 
     The variable capacitance element  14  includes control terminals  14 P. The variable capacitance element  14  includes a capacitance element whose capacitance value is determined according to a control voltage, and a resistance voltage divider circuit that generates the control voltage by dividing a voltage inputted to the control terminals. 
     To two RX terminals (received signal terminals) of the RFIC  11 , the variable capacitance element  14  and the antenna coil  13  of a parallel circuit are connected. 
     The IO terminals  11 P of the RFIC  11  and the IO terminals  12 P of the control IC  12  are connected by signal lines  15 A, and the control terminals  14 P of the variable capacitance element  14  are connected to the signal lines  15 A and  15 B. 
     The RFIC  11  and the control IC  12  receive and transmit communication signals via the data transmission lines  16 , and the control IC  12  controls various setting or the like for the RFIC  11  via the signal lines  15 A. In addition, the RFIC  11  or the control IC  12  supplies control data to the variable capacitance element  14  via the signal lines  15 A and  15 B. 
     The variable capacitance element  14  and the antenna coil  13  constitute an antenna circuit which is an LC parallel resonance circuit, and determine a resonant frequency of the antenna circuit. The antenna coil  13  is coupled with an antenna of a communication destination by electromagnetic field coupling, and performs transmission and reception for close range communication. 
       FIG. 2  is a detailed diagram of circuits provided between the RFIC  11  and the antenna coil  13 .  FIG. 2  also shows a circuit connected to two TX terminals (transmitted signal terminal) of the RFIC  11 . In  FIG. 2 , the antenna coil  13  defines and serves as a radiating element, and exchanges wireless signals with a coil antenna of a destination of communication based on magnetic field coupling with the coil antenna of the destination of communication. The antenna coil  13  preferably is a looped electrode pattern including a plurality of turns or winds. 
     Capacitors C 21  and C 22  are elements that adjust a degree of coupling between the RFIC  11  and the antenna coil  13 . Further, the inductors L 11  and L 12  and the capacitors C 11 , C 12 , and C 20  constitute a transmission filter. For example, since the RFIC  11  operates passively when the communication circuit operates in the card mode, the RFIC  11  generates a source voltage from an input signal inputted to the RX terminal and reads a reception signal, and performs load modulation of a circuit (load) connected to the TX terminal in transmission. Further, for example, since the RFIC  11  operates actively when the communication circuit operates in the reader/writer mode, the RFIC  11  opens the RX terminal to transmit a transmission signal from the TX terminal in transmission, and opens the TX terminal to receive a reception signal from the RX terminal. In this manner, in the communication circuit, impedance from the RFIC  11  toward the antenna coil  13  changes depending on the operation mode. As will be later described, the variable capacitance element  14  is controlled so that the resonant frequency of the antenna circuit is optimized depending on the operation mode (so that the impedance from the RFIC  11  toward the antenna coil matches). 
     Here, the ESD protection elements  17 A and  17 B are connected between the ground and both end terminals of the antenna coil  13 , respectively. 
       FIG. 3  is an entire circuit diagram within the variable capacitance element  14 . The variable capacitance element  14  includes a control voltage application circuit  14 R and a variable capacitance unit  14 C. A capacitance value between ports P 11 -P 12  of the variable capacitance unit  14 C is determined according to a voltage applied between ports P 13 -P 14 . Ports P 21 -P 25  of the control voltage application circuit  14 R are connected to GPIO ports (GPIO0-GPIO4) of the RFIC  11  shown in  FIG. 1 . The ports P 21 -P 25  are connected to one terminals of resistance elements R 21 -R 25 , and the other terminals of the resistance elements R 21 -R 25  are connected in common to the port P 13 . 
     The RFIC  11  shown in  FIG. 1  selectively sets the IO terminals  11 P as the GPIO ports to high level (source voltage) or low level (ground voltage). Therefore, each of the resistance elements R 21 -R 25  works as a resistance voltage divider circuit according to the level of the corresponding IO terminal of the RFIC  11 , and a control voltage according to its voltage dividing ratio and the source voltage is applied to the port P 13  of the variable capacitance unit  14 C. Since the port P 14  of the variable capacitance unit  14 C is grounded, the control voltage is applied between the ports P 13 -P 14  of the variable capacitance unit  14 C. The effect of the voltage dividing will be described later in detail. 
     In the variable capacitance unit  14 C, the control voltage is applied to both end terminals of each of the capacitance elements C 1 -C 6  via RF resistance elements R 11 -R 17 . The RF resistance elements R 11 -R 17  preferably have the same resistance value. The RF resistance elements R 11 -R 17  apply the control voltage to the capacitance elements C 1 -C 6 , and prevent an RF signal applied between the ports P 11 -P 12  from leaking to the ports P 13  and P 14 . Each of the capacitance elements C 1 -C 6  preferably is a ferroelectric capacitor configured such that a ferroelectric film is sandwiched between opposing electrodes, for example. Since the ferroelectric film changes its amount of polarization depending on an intensity of an electric field to be applied to change an apparent dielectric constant, it is possible to determine the capacitance value by the control voltage. 
       FIG. 4  is a chart showing a relationship between 5-bit values from the ports P 21 -P 25  shown in  FIG. 3  and the resistance voltage dividing ratio. The resistance values of the resistance elements R 21 -R 25  shown in  FIG. 3  are determined to be in a ratio based on powers of 2 with respect to a lowest value among the resistance values. For example, the ratio between the resistance values of the resistance elements R 21 , R 22 , R 23 , R 24 , and R 25  is determined to be approximately 1:2:4:8:16. For example, when R 21  is about 10 kΩ, R 22  is about 20 kΩ and R 25  is about 160 kΩ. 
     For example, when the port P 21  is high level and all of the ports P 22 -P 25  are low level, the resistance element R 21  constitutes an upper arm of the resistance voltage divider circuit, and a parallel circuit of the resistance elements R 22 -R 25  constitutes a lower arm. Alternatively, for example, when the ports P 21  and P 22  are high level and the ports P 23 , P 24 , and P 25  are low level, a parallel circuit of the resistance elements R 21  and R 22  constitutes the upper arm of the resistance voltage divider circuit, and a parallel circuit of the resistance elements R 23 -R 25  constitutes the lower arm. In addition, since the resistance values of the resistance elements R 21 -R 25  are determined to be in the ratio based on powers of 2 with respect to a lowest value among these resistance values, the resistance voltage dividing ratio may take values in the fifth power of 2 (=32) ways depending on the combination of the ports P 21 -P 25  in high level or low level. 
     The horizontal axis in  FIG. 4  may also be referred to as 5-bit values from the ports P 21 -P 25 . Similarly, the vertical axis may also be referred to as a voltage ratio to the source voltage. 
       FIG. 5  is a sectional view of a main portion of the variable capacitance element  14 . In  FIG. 5 , a substrate SI is an Si substrate over which an SiO 2  film is provided. Ferroelectric films and Pt films are provided alternately over the substrate SI in an order of a ferroelectric film FS 1 , capacitor electrodes PT 1 , a ferroelectric film FS 2 , capacitor electrodes PT 2 , and a ferroelectric film FS 3  to define a capacitor unit. 
     A film stack of the ferroelectric films FS 1 , FS 2 , and FS 3  and the capacitor electrodes PT 1  and PT 2  is covered by a moisture-resistant protective film PC 1 . An organic protective film PC 2  is further provided over the moisture-resistant protective film PC 1 . 
     A wiring film TI 1  is provided over the organic protective film PC 2 . Further, the wiring film TI 1  is connected to predetermined portions of the capacitor electrodes PT 1  and PT 2  through contact holes. Moreover, the wiring film TI 1  is provided so as to surround the moisture-resistant protective film PC 1  and the organic protective film PC 2 . 
     An interlayer insulation film SR 1  is provided over a surface of the wiring film TI 1 . Over a surface of the interlayer insulation film SR 1 , a resistive film pattern RE 1  is provided. A surface of the resistive film pattern RE 1  is covered by an interlayer insulation film SR 2 , and a resistive film pattern RE 2  is provided over a surface of the interlayer insulation film SR 2 . A surface of the resistive film pattern RE 2  is covered by an interlayer insulation film SR 3 . 
     Resistive films of the resistive film pattern RE 1  and RE 2  are preferably formed by the thin film process (process utilizing photolithography and the etching technique) or the thick film process (process utilizing the printing technique such as screen printing), for example. The resistance values of the resistance elements are determined based on width, length, and thickness of the resistive film patterns. 
     A wiring film  112  is provided on a surface of the interlayer insulation film SR 3 . Further, the wiring film  112  is connected to the wiring film TI 1  via contact holes provided through the interlayer insulation films SR 1 , SR 2 , and SR 3 . 
     A surface of the interlayer insulation film SR 3  is covered by a solder resist film SR 4 . Then, externally-connected electrodes EE is provided in an opening in the solder resist film SR 4  and over a surface of the wiring film TI 2 . 
     The ferroelectric film FS 1  is an insulation film for close contact to and non-proliferation against the substrate SI and the moisture-resistant protective film PC 1 . Further, the ferroelectric film FS 3  is an insulation film for close contact to the moisture-resistant protective film PC 1 . Examples of a conductive material used for the capacitor electrodes PT 1  and PT 2  include high-melting precious metal materials having favorable conductivity and excellent oxidation resistance, such as Pt and Au. 
     Further, examples of a thin-film material used for the ferroelectric films FS 1 , FS 2 , and FS 3  include a dielectric material having a high dielectric constant. Specifically, materials such as a perovskite compound such as (Ba,Sr)TiO 3 (BST), SrTiO 3 , BaTiO 3 , and Pb(Zr,Ti)O 3 , and a bismuth-layered compound such as SrBi 4 Ti 4 O 25  may be used. 
     Moreover, each of the wiring films TI 1  and  112  preferably includes three layers of Ti, Cu, and Ti, in which a Ti layer is about 100 nm and a Cu layer is about 1000 nm in thickness, for example. 
     Furthermore, the externally-connected electrodes EE preferably include two layers of Au and Ni, in which an Ni layer as a first layer is about 2000 nm and an Au layer as a second layer is about 200 nm in thickness, for example. 
     The moisture-resistant protective film PC 1  prevents moisture from the organic protective film PC 2  from intruding into the capacitor unit. Examples of the moisture-resistant protective film PC 1  that may be used include SiNx, SiO 2 , Al 2 O 3 , TiO 2 , and the like. Further, the organic protective film PC 2  absorbs an external mechanical stress. Examples of the organic protective film PC 2  that may be used include a PBO (polybenzoxazole) resin, a polyimide resin, an epoxy resin, and the like. 
     A resistive material of the resistive film patterns RE 1  and RE 2  is Nichrome, for example. 
     A non-limiting example of a method of manufacturing the variable capacitance element  14  shown in  FIG. 5  is as follows. 
     First, the Si substrate is subject to a thermal oxidation treatment to form an oxide layer of 700 nm thick SiO 2 . The thickness of the oxide layer is not particularly limited as long as a desired insulation property is ensured, but preferably set to a range from about 500 nm to about 1000 nm, for example. 
     Then, the 50 nm thick ferroelectric film FS 1  for close contact and non-proliferation is formed over the oxide layer using a chemical solution deposition (Chemical Solution Deposition, hereinafter referred to as “CSD”) method. The thickness of the ferroelectric film FS 1  is not particularly limited as long as a desired degree of contact and a desired degree of non-proliferation are ensured, but preferably set to a range from about 10 nm to about 100 nm, for example. 
     The examples of the material that may be used as the ferroelectric film FS 1  are as listed above, but it is desirable to use the same material as that of the ferroelectric film FS 2  for the capacitor. For example, when forming a BST film, a film formation material solution in which Ba, Sr, and Ti are blended in a molar ratio such as Ba:Sr:Ti=7:3:10 is prepared. Then, the film formation material solution is applied over an oxide layer  1 , dried on a hot plate at 400 degrees Celsius, and is heat-treated for 30 minutes at 600 degrees Celsius to be crystallized, and thus a BST film is formed. 
     The temperature of the hot plate is not particularly limited as long as a desired degree of drying property is achieved, but preferably set to a range from about 300 degrees Celsius to about 400 degrees Celsius, for example. Further, the temperature of the heat treatment is not particularly limited as long as a desired degree of crystallization is achieved, but preferably set to a range from about 600 degrees Celsius to about 700 degrees Celsius, for example. In addition, duration of the heat treatment is not particularly limited as long as a desired degree of crystallization is achieved, but preferably set to a range from about 10 minutes to about 60 minutes, for example. 
     Next, the capacitor electrodes PT 1 , the ferroelectric film FS 2 , the capacitor electrodes PT 2 , and the ferroelectric film FS 3  are sequentially formed. Specifically, the 250 nm thick capacitor electrodes PT 1  made of Pt or Au is formed using an RF magnetron sputtering method, the 100 nm thick ferroelectric film FS 2  made of BST or the like is formed using the CSD method, and then the 250 nm thick capacitor electrodes PT 2  made of Pt or Au is formed using the RF magnetron sputtering method. Further, the 100 nm thick ferroelectric film FS 3  made of BST or the like is formed using the CSD method. 
     The thickness of the capacitor electrodes PT 1  and PT 2  is not particularly limited as long as a desired low resistivity is ensured, but preferably set to a range from about 100 nm to about 500 nm, for example. Further, the thickness of the ferroelectric film FS 2  is not particularly limited as long as a desired electrostatic capacitance is ensured, but preferably set to a range from about 80 nm to about 150 nm, for example. In addition, the thickness of the ferroelectric film FS 3  is not particularly limited as long as a desired degree of contact is ensured, but preferably set to a range from about 80 nm to about 150 nm, for example. 
     Thereafter, each layer of the capacitor unit is patterned using a photolithography technique and a dry etching method (reactive ion etching (RIE) method). Specifically, a photoresist is applied and pre-baked, the photoresist is irradiated with ultraviolet light through a photo mask, and exposure, development, post-baking are performed to transfer a photo mask pattern to a resist pattern. Then, the exposed part is dry-etched using Ar gas or CHF 3  gas. 
     Subsequently, the capacitor unit is heat-treated for 30 minutes at 800 degrees Celsius. The temperature of the heat treatment is not particularly limited as long as a desired degree of heat treatment property is achieved, but preferably set to a range from about 800 degrees Celsius to about 900 degrees Celsius, for example. In addition, duration of the heat treatment is not particularly limited as long as a desired degree of heat treatment property is achieved, but preferably set to a range from about 10 minutes to about 60 minutes, for example. 
     Next, the 600 nm thick moisture-resistant protective film PC 1  made of an inorganic material is formed so as to cover an upper surface and side surfaces of the capacitor unit as well as the ferroelectric film FS 1  using a spattering method. Then, a PBO (polybenzoxazole) film made of a photopolymer material is applied so as to cover the moisture-resistant protective film PC 1  using a spin coating method. Thereafter, heating for 5 minutes at 125 degrees Celsius, an exposure process, a development process, and heating for about an hour at 350 degrees Celsius are performed, and thus the 6000 nm thick organic protective film PC 2  of a predetermined pattern is formed. 
     The thickness of the moisture-resistant protective film PC 1  is not particularly limited as long as a desired moisture resistance is ensured, but preferably set to a range from about 200 nm to about 1000 nm, for example. Further, the thickness of the organic protective film PC 2  is not particularly limited as long as a desired property of mechanical stress absorption is ensured, but preferably set to a range from about 2000 nm to about 10000 nm, for example. 
     Then, using the organic protective film PC 2  as a mask and using a CHF 3  gas, the organic protective film PC 2 , the moisture-resistant protective film PC 1 , and the ferroelectric film FS 2  are dry-etched and patterned to define contact holes (not depicted) reaching the capacitor electrodes PT 1 , and the organic protective film PC 2 , the moisture-resistant protective film PC 1 , and the ferroelectric film FS 3  are dry-etched and patterned to define the contact holes reaching the capacitor electrodes PT 2 . 
     Next, three metallic layers to constitute the wiring film TI 1  are formed using the RF magnetron sputtering method, and the wiring film TI 1  is patterned by wet etching. 
     Then, the interlayer insulation film SR 1  is spin-coated, a resistive film to be a resistance element  14 B of the variable capacitance element unit is formed using the thin film process such as sputtering or electron beam evaporation, or using the thick film process by an application of a paste, and this resistive film is patterned using a liftoff method to form the resistive film pattern RE 1 . 
     Next, the interlayer insulation film SR 2  is spin-coated, a resistive film to be the control voltage application circuit  14 R is formed using the thin film process such as sputtering or electron beam evaporation, or using the thick film process by an application of a paste, and this resistive film is patterned using the liftoff method to form the resistive film pattern RE 2 . 
     Thereafter, the interlayer insulation film SR 3  is spin-coated, and the contact holes reaching the wiring film TI 1  are defined. 
     Next, three metallic layers to constitute the wiring film TI 2  are formed using the RF magnetron sputtering method, and the wiring film TI 2  is formed as an power supply film and then patterned by wet etching. 
     Subsequently, openings are defined at predetermined positions by spin coating the solder resist film SR 4 , and the externally-connected electrodes EE are formed by electrolytic plating. 
     In this manner, since ferroelectric capacitors are used as the variable capacitance elements, and since a plurality of resistance patterns having different resistance values are used for a bias voltage application circuit, it is possible to configure a small passive device having excellent frequency characteristics (=a variable capacitance element having a control voltage application circuit). 
     It should be appreciated that the present invention is not limited to the above-described preferred embodiment. The thickness of the layers, the formation methods, and the formation conditions are mere examples, and may be altered optionally as long as desired functions of a thin-film capacitor are achieved. 
     Further, while the description of the above preferred embodiments refers to the capacitor unit including a single layer structure with one capacitance generating unit, it should be appreciated that the present invention may similarly be applied to a multi-layer structure including two or more capacitance generating units. 
       FIG. 6A  illustrates a resistive film pattern of the resistance element  14 B of the variable capacitance element unit, and  FIG. 6B  illustrates a resistive film pattern of the control voltage application circuit  14 R of the variable capacitance element unit. Ports P 11 -P 14  and resistive film patterns R 11 -R 17  shown in  FIG. 6A  correspond to the ports P 11 -P 14  and the RF resistance elements R 11 -R 17  shown in  FIG. 3 . Further, ports P 21 -P 25  and resistive film patterns R 21 -R 25  shown in  FIG. 6B  correspond to the ports P 21 -P 25  and the resistance elements R 21 -R 25  shown in  FIG. 3 . 
     As illustrated in  FIG. 5  and  FIGS. 6A to 6B , the variable capacitance elements and the control voltage application circuit are preferably formed by the thin film process on a semiconductor substrate. Specifically, the variable capacitance element unit and the control voltage application circuit unit are preferably formed monolithically on the same substrate. In particular, the plurality of resistance elements that constitute the control voltage application circuit are preferably provided in the same layer by the process. Therefore, it is possible to significantly reduce or prevent variation in the ratio between the resistance values itself even if the resistance values of the resistance elements are different from a desired resistance value, and thus it is possible to reproducibly control output voltages. On the other hand, while the variable capacitance elements preferably include a plurality of RF resistance elements parallely connected to both ends of the respective ferroelectric capacitors, these RF resistance elements are provided in a layer different from the plurality of resistance patterns that constitute the control voltage application circuit, and the RF resistance elements are also provided in the same layer by the same process. 
       FIG. 7  is a three-view drawing of the variable-capacitance-element built-in RFIC  110 . As illustrated in  FIG. 5 , the variable-capacitance-element built-in RFIC  110  preferably is a bare chip separated from a wafer. The externally-connected electrodes (pads) EE of the IC is provided with solder balls SB. 
     A high-frequency device is configured by mounting the variable-capacitance-element built-in RFIC  110  on a substrate on which the antenna coil  13  (see  FIG. 1 ) is disposed. 
       FIG. 8  is a sectional view of a state in which the variable-capacitance-element built-in RFIC  110  is mounted on a rewiring board  20  used for mounting. On a lower surface of the rewiring board  20 , terminals used for mounting  22  are provided, and on an upper surface, electrodes used to mount the variable-capacitance-element built-in RFIC  110  are provided. Further, rewiring electrodes  21  are provided within the rewiring board  20 . In this manner, a module in which the variable-capacitance-element built-in RFIC  110  is mounted on the rewiring board  20  may be applied to a printed wiring board. 
     Other Preferred Embodiments 
     While specific preferred embodiments of the present invention have been described, the present invention is not limited to such examples. 
     For example, the variable capacitance element may be independently connected to the antenna coil in parallel, or a capacitor may be inserted in series to the variable capacitance element. Alternatively, the variable capacitance element may be independently connected to the antenna coil in series. 
     Further, a high-frequency device according to various preferred embodiments of the present invention is not limited to a reader/writer of RFIDs, and may be constituted as an RFID tag, for example. 
     While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.

Technology Category: 3