Patent Document

FIELD OF THE INVENTION  
         [0001]    The present invention relates to data transfers between a host device and a storage medium.  
         BACKGROUND OF THE INVENTION  
         [0002]    Memory controllers are used for transferring data between a host device and a non-volatile semiconductor memory device. A single data transfer cycle between the host device and the memory device is referred to as a data phase. The completion of a host device&#39;s request to transfer data may involve multiple data phases. The completion of a data phase requires a memory controller to perform actions that are in accordance with a host interface protocol. Some host interface protocols allow the exchange of data using data phases comprising relatively large data units (e.g., blocks) that are multiples of the basic fundamental data unit (e.g., sector) used by the memory device for storing data. The implementation of a data phase comprising these relatively larger data units has traditionally required intervention of the controller microprocessor after the transfer of each fundamental unit contained in a larger data unit. Since each read or write operation may comprise a large number of fundamental units, such read or write operation may require a large number of microprocessor interventions. A large number of microprocessor interventions is time consuming and can therefore increase the time needed to complete a read or write operation in connection with the memory device. This problem may be alleviated by employing a faster microprocessor. Such solution, however, may not be very cost effective. Therefore there exists a need for systems and methods for solving these and other problems associated with transferring data between a host and device and a memory device.  
         SUMMARY  
         [0003]    The present invention relates to systems and methods for transferring data between a host device and a storage medium. In this regard, an embodiment of one such method includes receiving from the host device a command to transfer data between the host device and a storage medium, storing in a first register a value that is correlated to a number of second data units contained in a first data unit, and storing in a second register a value for tracking a number of second data units that are transferred between the host device and a buffer.  
           [0004]    An embodiment of a system for transferring data between a host device and a storage medium includes a host interface that receives from the host device a command to transfer data between the host device and a storage medium, a buffer that temporarily stores data that is transferred between the host device and the storage medium, a first register that stores a value that is correlated to a number of second data units contained in a first data unit, and a second register that stores a value for tracking a number of second data units that are transferred between the host device and the buffer. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0005]    The present invention, as defined in the claims, can be better understood with reference to the following drawings. The drawings are not necessarily to scale, emphasis instead being placed on clearly illustrating the principles of the present invention.  
         [0006]    [0006]FIG. 1 is a block diagram of a computer network  100  in accordance with one embodiment of the present invention.  
         [0007]    [0007]FIG. 2 is a block diagram depicting an embodiment of the data transfer system depicted in FIG. 1.  
         [0008]    [0008]FIG. 3 is a flow chart depicting a method that may be implemented by the data transfer system depicted in FIG. 2.  
         [0009]    [0009]FIG. 4 is a block diagram depicting an embodiment of the host interface of the data transfer system depicted in FIG. 2.  
         [0010]    [0010]FIG. 5 is a block diagram depicting an embodiment of the data mover of the data transfer system depicted in FIG. 2.  
         [0011]    [0011]FIG. 6 is a block diagram depicting an embodiment of the storage medium interface of the data transfer system depicted in FIG. 2.  
         [0012]    [0012]FIGS. 7A, 7B, and  7 C are flow charts depicting a non-limiting example of a method for writing data to the storage medium depicted in FIG. 1 in accordance with an embodiment of the present invention.  
         [0013]    [0013]FIGS. 8A, 8B, and  8 C are flow charts depicting a non-limiting example of a method for reading data from the storage medium depicted in FIG. 1 in accordance with an embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION  
       [0014]    [0014]FIG. 1 is a block diagram of a computer network  100  in accordance with one embodiment of the present invention. The computer network  100  comprises a host  102  and a storage medium (SM)  104  that are coupled to a data transfer system (DTS)  200 . In an alternative embodiment, the Storage Medium  104  and/or the Data Transfer System  200  may be part of the host  102 . The Data Transfer System  200  facilitates read and write data transfers between the host  102  and the Storage Medium  104 . For example, in a write operation, data is transferred from the host  102  to the Storage Medium  104  via the Data Transfer System  200 . Similarly, in a read operation, data is transferred from the Storage Medium  104  to the host  102  via the Data Transfer System  200 . The host  102  is a data processing system such as, for example, a desktop computer, a notebook computer, a personal digital assistant (PDA), or a mainframe computer, among others. The Storage Medium  104  is preferably a non-volatile semiconductor memory device such as, for example, flash memory, non-volatile random access memory (non-volatile RAM), or electrically erasable programmable read only memory (EEPROM), among others.  
         [0015]    [0015]FIG. 2 is a block diagram depicting one embodiment of the Data Transfer System  200  (FIG. 1). The Data Transfer System  200  includes a data mover (DM) module  500 , a host interface (HI) module  400 , a storage medium interface (SMI) module  600 , a buffer  205  (preferably a circular buffer), a microprocessor  201 , memory  202 , and a bus  204 . As indicated in FIG. 2, the components of the Data Transfer System  200  may be coupled as follows: the Data Mover  500  is coupled to the Host Interface  400  and to the Storage Medium Interface  600 ; the Host Interface  400  is coupled to a host  102  (FIG. 1); the Storage Medium Interface  600  is coupled to a Storage Medium  104  (FIG. 1); the microprocessor  201  is coupled to the memory  202 ; and the Host Interface  400 , the Data Mover  500 , and the Storage Medium Interface  600  are coupled to the microprocessor  201  via the bus  204 . The Data Mover  500  organizes and controls the flow of data between the host  102  and the Storage Medium  104 . The buffer  205  is used to buffer data being transferred between the host  102  and the Storage Medium  104 . The memory  202  is used for storing a data transfer program  203  that is executed by a microprocessor  201  to control the operation of the Host Interface  400 , the Data Mover  500 , and the Storage Medium Interface  600 . In a preferred embodiment, the memory  202  comprises random access memory (RAM) and read only memory (ROM), and the data transfer program  203  comprises firmware. The buffer  205 , the Host Interface  400 , the Data Mover  500 , the Storage Medium Interface  600 , the microprocessor  201 , the memory  202 , and the bus  204  are preferably, but not necessarily, part of a single application specific integrated circuit (ASIC).  
         [0016]    [0016]FIG. 3 depicts a flow chart that illustrates a method  300  that may be implemented by the Data Transfer System  200  (FIG. 2) in accordance with one embodiment of the invention. In step  301 , the Data Transfer System  200  receives a read or write command from the host  102  (FIG. 1) requesting a read or write operation, respectively. In response to receiving the command, the microprocessor  201  (FIG. 2) loads registers in the Host Interface  400 , the Data Mover  500 , and the Storage Medium Interface  600  (FIG. 2) for executing the read or write operation requested by the command. In a read operation, data is transferred from the Storage Medium  104  (FIG. 1) to the host  102 . During a write operation, data is transferred from the host  102  to the Storage Medium  104 . After the registers are loaded in step  302 , a data unit (e.g., a block or a sector of data) is transferred between the Data Transfer System  200  and the host  102  or the Storage Medium  104 , as indicated in step  303 . The data transfer is coordinated and managed by the Host Interface  400 , the Data Mover  500 , and/or the Storage Medium Interface  600 . Data that is transferred between the host  102  and the Storage Medium  104  is buffered in the buffer  205  of the Data Transfer System  200 . In one implementation of the method  300 , a data unit that is transferred between the buffer  205  and the host  102  is a block of data that may comprise multiple sectors, whereas a data unit that is transferred between the buffer  205  and the storage medium  104  is a sector (e.g. 512 bytes). Data is preferably transferred between the Data Transfer System  200  and the host  102  in units of bytes (8 bits) or words (16 bits), and between the Data Transfer System  200  and the storage medium  104  in units of bytes. After each unit of data is transferred between the Data Transfer System  200  and the host  102  or the Storage Medium  104 , registers in the Host Interface  400 , the Data Mover  500 , and/or the Storage Medium Interface  600  are updated in step  304  to reflect the occurrence of the data transfer. After the registers are updated, a determination is made by the data mover  500  in step  305  as to whether the entire read or write operation requested by the read or write command, respectively, is complete. If the entire read or write operation is complete, then the microprocessor  201  is interrupted in step  306 , and the method  300  terminates in step  307 . If, however, the read or write operation is not complete, then the method  300  repeats steps  303 - 305  until the read or write operation is complete.  
         [0017]    [0017]FIG. 4 is a block diagram illustrating selected components of the Host Interface  400  of the Data Transfer System  200  (FIG. 2) in accordance with one embodiment of the present invention. The Host Interface  400  interfaces with the host  102  (FIG. 1) and facilitates data transfers between the host  102  and the buffer  205  (FIG. 2). The Host Interface  400  and the Data Mover  500  (FIG. 5) transmit signals to each other in order to indicate their respective status and their readiness to perform a certain step. For instance, an H_XferBlk signal  403  from the Data Mover  500  to the Host Interface  400  indicates that the buffer  205  is ready to provide or receive data to/from the host  102 . On the other hand, an H_BlkXferred signal  404  from the Host Interface  400  to the Data Mover  500  indicates that a block of data has been transferred between the buffer  205  and the host  102 .  
         [0018]    The Host Interface  400  includes a WordsPerBlk register  401  that is loaded at the beginning of a read or write operation with the number of words per block of data. A WordCtr register  402  is used for counting down the number of words transferred during each block transfer. Prior to each block transfer, the WordCtr register  402  is loaded by receiving a value contained in the WordsPerBlk register  401 . In an alternative embodiment, the WordsPerBlk register  401  is loaded with the number of longwords per block of data, and the WordCtr register  402  is used for counting down the number of longwords transferred during each block transfer.  
         [0019]    [0019]FIG. 5 is a block diagram depicting selected components of the Data Mover  500  in accordance with one embodiment of the present invention. The Data Mover  500  includes registers containing information as described in the following table:  
                         TABLE 1                           Registers that may be included in the Data Mover 500            REGISTER NAME   CONTENT/DESCRIPTION       Host_LW_Ptr 511   Data buffer 205 long word address for           transfers to/from host 102       Host_LW_Ctr 513   Long word counter for transfers to/from           host 102       Host_LW_PerBlk 506   The number of long words per block of data       HostXferSectCtr   Counts number of sectors to be transferred       (HXSC) 502   to/from host 102       SectsPerBlk (SPB) 504   Number of sectors per block of data       SOB_LW_Ptr 515   Start address of buffer 205       EOB_LW_Ptr 516   End address of buffer 205       SMI_LW_Ptr 512   Data buffer 205 long word address for transfers           to/from Storage Medium 104       SMI_LW_Ctr 514   Long word counter for transfers to/from           Storage Medium 104       SMI_LW_PerSect 507   The number of long words per sector.       BuffSects 505   Number of sectors in the buffer 205       MaxBuffSects 510   Size of the buffer 205       DeviceXferSectCtr   Counts number of sectors to be transferred       (DXSC) 503   to/from Storage Medium 104                  
 
         [0020]    The registers identified in Table 1 are used by the Data Mover  500  to manage the transfer of data between the host  102  and the Storage Medium  104 . A data transfer between the host  102  and the Storage Medium  104  is initiated in response to the Host Interface  400  receiving a read or write command from the host  102 . After the Host Interface  400  receives a read or write command from the host  102 , the Host Interface  400  interrupts the microprocessor  201  which loads certain registers of the modules Host Interface  400 , Data Mover  500 , and Storage Medium Interface  600  and then activates them (the modules  400 ,  500 , and  600 ). After being activated, the Data Mover  500  sends a request for a block of data to the Host Interface  400  (for a write operation) or a request for a sector of data to the Storage Medium Interface  600  (for a read operation). A request for a block from the Host Interface  400  is achieved by sending an H_XferBlk  403  signal to the Host Interface  400 , whereas a request for a sector from the Storage Medium Interface  600  is achieved by sending an SMI_XferSect  508  signal to the Storage Medium Interface  600 .  
         [0021]    For a read operation, if there is room in the data transfer buffer  205  and if the value of DXSC  503  is greater than 0, then the Data Mover  500  requests that a sector of data be transmitted from the Storage Medium  104  to the buffer  205 . The Data Mover  500  performs this request by sending an SMI_XferSect  508  signal to the Storage Medium Interface  600 . The Data Mover  500  also tracks the progress of the sector transfer by managing the DXSC  503 , which the Data Mover  500  decrements by 1 after each successful sector transfer from the Storage Medium  104  to the buffer  205 . Eventually the DXSC  503  will go to 0, and the Data Mover  500  will stop transmitting data transfer requests to the Storage Medium Interface  600 . Similarly, for a write operation, as long as there is room in the data transfer buffer  205  and the value of HXSC is greater than the value of SPB  504 , the Data Mover  500  hardware will continue to request that a block of data be transmitted from the host  102  to the buffer  205  by sending an H_XferBlk signal to the Host Interface  400 . The Data Mover  500  will also track the progress of the transfer by managing the HXSC  502 , which is decremented by the value of SPB after each successful block transfer from the host  102  to the buffer  205 . Eventually the HXSC  502  will go to 0, and the Data Mover  500  will stop transmitting data transfer requests to the Host Interface  400 .  
         [0022]    Data transfers between the data transfer buffer  205  and the Host Interface  400  or Storage Medium Interface  600  are preferably in units of longwords (e.g., 4 bytes). As each longword is transferred, Data Mover  500  hardware decrements either the Host_LW_Ctr  513  or the SMI_LW_Ctr  514  depending on whether the transfer is to/from the host  102  or the Storage Medium  104 . In addition, word counters internal to the Host Interface  400  and Storage Medium Interface  600  are decremented. At the end of a sector transfer to/from the Storage Medium  104 , the Storage Medium Interface  600 &#39;s internal word counter goes to 0, prompting it to send the sector acknowledgment SMI_SectXferred  509  to the Data Mover  500 , which is expecting this signal because its own SMI_LW_Ctr  514  has gone to 0. If there are more sectors to be transferred (i.e., if the value of DXSC  503  is greater than 0), then upon receipt of the SMI_SectXferred  509  signal, the Data Mover  500  hardware reloads the SMI_LW_Ctr  514  from the register SMI_LW_PerSect  507  and issues another SMI_XferSect  508  signal to the Storage Medium Interface  600 . Similarly, at the end of a block transfer to/from the host  102 , the internal word counter WordCtr  402  of the Host Interface  400  goes to 0, prompting the Host Interface  400  to send the block acknowledgment Host_BlkXferred  404  to the Data Mover  500  which is expecting this signal because its Host_LW_Ctr  513  has also gone to 0. If there are more blocks to be transferred, then upon receipt of the Host_BlkXferred  404  signal, the Data Mover  500  hardware reloads the Host_LW_Ctr  513  from the register Host_LW_PerBlk  506  and issues another Host_XferBlk  403  signal to the Host Interface  400 .  
         [0023]    [0023]FIG. 6 is a block diagram illustrating selected components of the Storage Medium Interface  600  of the Data Transfer System  200  (FIG. 2) in accordance with one embodiment of the present invention. The Storage Medium Interface  600  interfaces with Storage Medium  104  (FIG. 1) and transfers data between the buffer  205  (FIG. 2) and the Storage Medium  104  in response to receiving an SMI_XferSect signal  508  from the Data Mover  500 . After the Storage Medium Interface  600  transfers a sector of data between the buffer  205  and the Storage Medium  104 , it transmits an SMI_SectXferred signal  509  to the Data Mover  500  confirming the data transfer. Registers contained in the Storage Medium Interface  600  include an SMI_XferLen register  601  that indicates the number of data sectors to be transferred and an SMI_XferCtr register  602  that counts down the number of sectors transferred. The SMI_XferCtr register  602  is loaded with the value contained in the SMI_XferLen register  601  prior to each read or write operation.  
         [0024]    With additional reference to FIG. 5 throughout the remaining figure descriptions, FIGS. 7A, 7B, and  7 C are flow charts depicting a non-limiting example of a write method that is performed by the Data Transfer System  200  (FIG. 2) in accordance with one embodiment of the present invention. In step  701 , the Host Interface  400  (FIG. 2) receives a write command from a host  102  (FIG. 1). In response to receiving the write command, the Host Interface  400  interrupts the Microprocessor  201  (FIG. 2) which, in step  702 , loads the number of sectors per block into SectsPerBlk (SPB  504 ), the transfer length in sectors into HostXferSectCtr (HXSC  502 ) and DeviceXferSectCtr (DXSC  503 ), the number of longwords in a sector into SMI_LW_PerSect  507 , and the number of longwords in a block into Host_LW_PerBlk  506 . In addition, the Microprocessor  201  sets BuffSects  505  to MaxBuffSects  510 , sets Host_LW_Ptr  511  and SMI_LW_Ptr  512  to SOB_LW_Ptr  515 , and then activates the modules Host Interface  400 , Data Mover  500 , and Storage Medium Interface  600  (FIG. 2).  
         [0025]    Subsequently, in step  703 , the Data Mover  500  determines if the amount of data remaining to be transferred is less than a block&#39;s worth of data; this determination is based on whether the value of HXSC  502  is less than the value of SPB  504 . If the value of HXSC  502  is less than the value of SPB  504 , then the method  700  proceeds to step  715  (FIG. 7C). If, however, the value of HXSC  502  is not less than the value of SPB  504 , then the Data Mover  500  determines in step  704  if there is at least 1 block&#39;s worth of available storage in the buffer  205 ; this determination is based on whether the value of BuffSects  505  is greater than or equal to the value of SPB  504 . If the value of BuffSects  505  is not greater than or equal to the value of SPB  504 , then the method  700  proceeds to step  708  (FIG. 7B).  
         [0026]    If the value of BuffSects  505  is greater than or equal to the value of SPB  504 , then the Data Mover  500  sends an H_XferBlk  403  signal to the Host Interface  400  requesting that the Host Interface  400  transfer a block of data from the host  102  to the buffer  205 , as indicated in step  705 . After the H_XferBlk  403  signal is sent to the Host Interface  400 , a block of data is transferred from the host  102  to the buffer  205  in step  706  and the Data Mover  500  receives an H_BlkXferred  404  signal from the Host Interface  400  confirming the data transfer. After the H_BlkXferred  404  signal is received by the Data Mover  500  from the Host Interface  400 , the values of HXSC  502  and BuffSects  505  are decreased by the value of SPB  504 , as indicated in step  707 . In addition, if the value of Host_LW_Ptr  511  is equal to EOB_LW_Ptr  516 , then the value of Host_LW_Ptr  511  is set equal to SOB_LW_Ptr  515 .  
         [0027]    The Data Mover  500  then determines in step  708  (FIG. 7B) if data sectors remain to be transferred to the Storage Medium  104  (FIG. 1); this determination is based on whether the value of DXSC  503  is greater than 0. If the value of DXSC  503  is not greater than 0, then the Storage Medium Interface  600  interrupts the microprocessor  201  in step  709  and the method  700  terminates in step  710 . If, however, the value of DXSC  503  is greater than 0, then the Data Mover  500  determines in step  711  if there is at least one sector of data in the buffer  205 ; this determination is based on whether the value of BuffSects  505  is less than the value of MaxBuffSects  510 .  
         [0028]    If the value of BuffSects  505  is less than the value of MaxBuffSects  510 , then the Data Mover  500  sends an SMI_XferSect  508  signal to the Storage Medium Interface  600  requesting that the Storage Medium Interface  600  transfer a sector of data from the buffer  205  to the Storage Medium  104 , as indicated in step  712 . However, if the value of BuffSects  505  is not less than the value of MaxBuffSects  510 , then the method  700  returns to step  703  (FIG. 7A). After the Storage Medium Interface  600  receives an SMI_XferSect  508  signal, the Storage Medium Interface  600  transfers a sector of data from the buffer  205  to the Storage Medium  104 , as indicated in step  713 , and then sends an SMI_SectXferred  509  signal to the Data Mover  500  confirming the transfer. After the SMI_SectXferred  509  signal is received by the Data Mover  500 , the value of DXSC  503  is decreased by 1 and the value of BuffSects  505  is increased by 1, as indicated in step  714 . In addition, if the value of SMI_LW_Ptr  512  is equal to EOB_LW_Ptr  516 , then the value of SMI_LW_Ptr  512  is set equal to SOB_LW_Ptr  515 .  
         [0029]    At step  715  (FIG. 7C), the Data Mover  500  determines if there is a runt block remaining to be transferred. A runt block is an amount of data that is less than the unit of data (e.g. block) that the host  102  uses in sending or receiving data to the Data Transfer System  200 . The determination of whether a runt block remains to be transferred is based on whether the value of HXSC  502  is greater than 0. If the value of HXSC  502  is not greater than 0, then the method  700  proceeds to step  708  (FIG. 7B). If, however, the value of HXSC  502  is greater than 0, then the Data Mover  500  interrupts the microprocessor  201  in step  716 . After being interrupted, the microprocessor  201  reloads SPB  504  with HXSC  502  and Host_LW_PerBlk  506  with a value equal to the value of HXSC  502  multiplied by the value of SMI_LW_PerSect  507  (i.e. Host_LW_PerBlk  506  is loaded with a value equal to the number of longwords remaining to be transferred). After SPB  504  and Host_LW_PerBlk  506  are reloaded, the method  700  returns to step  703  so that the runt block may be transferred. After the runt block is transferred, the microprocessor  201  reloads SPB  504  and Host_LW_PerBlk  506  with the values that they had prior to when the microprocessor  201  was interrupted in step  716 . In one possible implementation, the microprocessor is not interrupted in step  716 ; instead, SPB  504  and Host_LW_PerBlk  506  are reloaded prior to the runt block transfer using a specialized circuit without microprocessor  201  intervention.  
         [0030]    [0030]FIGS. 8A, 8B, and  8 C are flow charts depicting a non-limiting example of a read method that is performed by the Data Transfer System  200  (FIG. 2) in accordance with one embodiment of the present invention. In step  801 , the Host Interface  400  (FIG. 2) receives a read command from a host  102  (FIG. 1). In response to receiving the read command, the Host Interface  400  interrupts the microprocessor  201  (FIG. 2) which, in step  802 , loads the number of sectors per block into SPB  504 , the transfer length in sectors into HXSC  502  and DXSC  503 , the number of longwords in a sector into SMI_LW_PerSect  507 , and the number of longwords in a block into Host_LW_PerBlk  506 . In addition, the Microprocessor  201  sets BuffSects  505  to 0, sets Host_LW_Ptr  511  and SMI_LW_Ptr  512  to SOB_LW_Ptr  515 , and then activates the modules Host Interface  400 , Data Mover  500 , and Storage Medium Interface  600  (FIG. 2).  
         [0031]    The Data Mover  500  then determines in step  803  if data sectors are to be received from the Storage Medium  104  (FIG. 1); this determination is based on whether the value of DXSC  503  is greater than 0. If the value of DXSC  503  is not greater than 0, then the method  800  proceeds to step  808  (FIG. 8B). If the value of DXSC  503  is greater than 0, then the Data Mover  500  determines in step  804  if there is space in the buffer  205  for receiving a sector of data from the Storage Medium  104 ; this determination is based on whether the value of BuffSects  505  is less than the value of MaxBuffSects  510 .  
         [0032]    If the value of BuffSects  505  is not less than the value of MaxBuffSects  510 , then the method  800  proceeds to step  808 . However, if the value of BuffSects  505  is less than the value of MaxBuffSects  510 , then the Data Mover  500  sends an SMI_XferSect  508  signal to the Storage Medium Interface  600  requesting that the Storage Medium Interface  600  transfer a sector of data from the Storage Medium  104  to the buffer  205 , as indicated in step  805 . After the Storage Medium Interface  600  receives the SMI_XferSect  508  signal, the Storage Medium Interface  600  transfers a sector of data from the Storage Medium  104  to the buffer  205 , as indicated in step  806 , and then sends an SMI_SectXferred  509  signal to the Data Mover  500  confirming the transfer. After the SMI_SectXferred  509  signal is received by the Data Mover  500  from the Storage Medium Interface  600 , the value of DXSC  503  is decreased by 1 and the value of BuffSects  505  is increased by 1, as indicated in step  807 . In addition, if the value of SMI_LW_Ptr  512  is equal to EOB_LW_Ptr  516 , then the value of SMI_LW_Ptr  512  is set equal to SOB_LW_Ptr  516 .  
         [0033]    Subsequently, in step  808  (FIG. 8B), the Data Mover  500  determines if the amount of data remaining to be transferred is less than a block&#39;s worth of data. This determination is based on whether the value of HXSC  502  is less than the value of SPB  504 . If the value of HXSC  502  is less than the value of SPB  504 , then the method  800  proceeds to step  815  (FIG. 8C). If, however, the value of HXSC  502  is not less than the value of SPB  504 , then the Data Mover  500  determines in step  809  if there is at least 1 block&#39;s worth of data in the buffer  205 ; this determination is based on whether the value of BuffSects  505  is greater than or equal to the value of SPB  504 . If the value of BuffSects  505  is not greater than or equal to the value of SPB  504 , then the method  800  proceeds to step  803  (FIG. 8A). However, if the value of BuffSects  505  is greater than or equal to the value of SPB  504 , then the Data Mover  500  sends an H_XferBlk  403  signal to the Host Interface  400  requesting that the Host Interface  400  transfer a block of data from the buffer  205  to the host  102 , as indicated in step  810 . After the H_XferBlk  403  signal is sent to the Host Interface  400 , a block of data is transferred from the buffer  205  to the host  102  in step  811  and the Data Mover  500  receives an H_BlkXferred  404  signal from the Host Interface  400  confirming the data transfer. After the H_BlkXferred  404  signal is received by the Data Mover  500  from the Host Interface  400 , the values of HXSC  502  and BuffSects  505  are decreased by the value of SPB  504 , as indicated in step  812 . In addition, if the value of Host_LW_Ptr  511  is equal to EOB_LW_Ptr  516 , then the value of Host_LW_Ptr  511  is set to SOB_LW_Ptr  515 . After the register values are adjusted in step  812 , the method  800  returns to step  803  (FIG. 8A).  
         [0034]    At step  815  (FIG. 8C), the Data Mover  500  determines if there is a runt block remaining to be transferred. The determination of whether a runt block remains to be transferred is based on whether the value of HXSC  502  is greater than 0. If the Data Mover  500  determines in step  815  that the value of HXSC  502  is not greater than 0, then the Data Mover  500  interrupts the microprocessor  201  in step  818  and the method  800  terminates in step  819 . If, however, the value of HXSC  502  is greater than 0, then the Data Mover  500  interrupts the microprocessor  201  in step  816 . After being interrupted, the microprocessor  201  reloads SPB  504  with HXSC  502  and reloads Host_LW_PerBlk  506  with a value equal to the value of HXSC  502  multiplied by the value of SMI_LW_PerSect  507  (i.e., Host_LW_PerBlk  506  is loaded with a value equal to the number of longwords remaining to be transferred). After SPB  504  and Host_LW_PerBlk  506  are reloaded, the method  800  returns to step  808  so that the runt block may be transferred. After the runt block is transferred, the microprocessor  201  reloads SPB  504  and Host_LW_PerBlk  506  with the values that they had prior to when the microprocessor  201  was interrupted in step  816 . In one possible implementation, the microprocessor is not interrupted in step  816 . Instead, SPB  504  and Host_LW_PerBlk  506  are reloaded prior to the runt block transfer using a specialized circuit without microprocessor  201  intervention.  
         [0035]    In an alternative embodiment of the Data Transfer System  200 , functions or steps shown in the flow charts depicted in FIGS. 7A, 7B,  7 C,  8 A,  8 B, and  8 C may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order as would be understood by those reasonably skilled in the art.  
         [0036]    It should be emphasized that the above-described embodiments of the present invention are merely possible examples, among others, of the implementations, setting forth a clear understanding of the principles of the invention. Many variations and modifications may be made to the above-described embodiments of the invention without departing substantially from the principles of the invention. All such modifications and variations are intended to be included herein within the scope of the disclosure and present invention and protected by the following claims.

Technology Category: 3