Patent Document

BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The invention relates to electronic circuits, and in particular to a power-efficient current mirror with high output impedance and a wide output voltage range.  
         [0003]     2. Related Art  
         [0004]     A current mirror is used to duplicate a reference current in an integrated circuit (IC) for use in a different portion(s) of the IC. By providing this duplicate current, the current mirror can minimize the effects of the circuit operation on the reference current source.  
         [0005]      FIG. 1  shows a conventional current mirror  100  that includes a reference current source CS 11 , an output terminal  101 , a reference transistor M 11 , and an output transistor M 12 . Current source CS 11  and transistor M 11  are connected in series between a supply voltage VDD and ground, while transistor M 12  is connected between output terminal  101  and ground. The gates of transistors M 11  and M 12  are connected, and the gate of transistor M 11  is connected to its drain (i.e., transistor M 11  is diode-connected).  
         [0006]     To provide proper current mirroring, transistors M 11  and M 12  must be operating in saturation to ensure that voltage changes at output terminal  101  do not affect the value of output current I_OUT. As is known in the art, a transistor operates in its saturated region when its drain-source voltage Vds is at least as great as its gate (gate-source) voltage Vgs minus its threshold voltage Vt (i.e., the voltage at which the inversion layer is formed). The minimum value of the source-drain voltage Vds that satisfies this relationship is termed the saturation (or overdrive) voltage of the transistor, and can be expressed as follows: 
 
 Vdsat=Vgs−Vt   (1) 
 
 where Vdsat is the saturation voltage of the transistor. 
 
         [0007]     Since transistor M 11  is diode-connected, its drain-source voltage is guaranteed to be larger than its gate voltage, and so transistor M 11  is in saturation. Therefore, when current source CS 11  supplies a reference current I_REF to transistor M 11 , the voltage drop (Vds) across transistor M 11  required to sink current I_REF is a saturation voltage Vdsat( 11 ).  
         [0008]     Then, using Equation 1, the gate voltage of transistor M 11  can be determined as follows: 
 
 Vgs ( 11 )= Vdsat ( 11 )+ Vt ( 11 )  (2) 
 
 where Vgs( 11 ) is the gate-source voltage of transistor M 11 , and Vt( 11 ) is the threshold voltage of transistor M 11 . 
 
         [0009]     Because the gates of transistors M 11  and M 12  are connected, this gate-source voltage is also applied to transistor M 12  (i.e., Vgs( 12 )=Vgs( 11 )). If transistors M 11  and M 12  are matched (i.e., the transistors have the same electrical characteristics, such as threshold voltage and saturation voltage), this gate-source voltage causes transistor M 12  to sink a current I_OUT that is equal to reference current I_REF. In this manner, reference current I_REF can be mirrored to any circuit coupled to output terminal  101  of current mirror  100 .  
         [0010]     The minimum output voltage of current mirror  100  at output terminal  101  is equal to the minimum voltage drop across output transistor M 12  before it falls out of saturation—i.e., saturation voltage Vdsat( 12 ). Once transistor M 12  is not operating in its saturated region, voltage changes at output terminal  101  can affect the current flow through transistor M 12 , thereby defeating the purpose of current mirror  100 . Current mirror  100  beneficially provides a relatively large output voltage range (swing), since it allows proper current mirror operation to occur down to saturation voltage Vdsat( 12 ).  
         [0011]     However, because the output of current mirror  100  is at the drain of transistor M 12 , the output impedance of current mirror  100  is rather low. As is known in the art, the output impedance Rout( 100 ) of current mirror  100  is given by the following: 
 
 Rout ( 100 )=(λ( 12 )* I   —   OUT ) −1   (3) 
 
 where λ( 12 ) is the channel length modulation parameter for transistor M 12 . Note that this output impedance is simply the output impedance Ro( 12 ) of transistor M 12 . 
 
         [0012]     To provide a current mirror that has an improved output impedance, negative feedback is sometimes used. For example,  FIG. 2  shows a conventional Wilson current mirror  200  that includes a reference current source CS 21 , an output terminal  201 , a reference transistor M 21 , a control transistor M 22 , and an output transistor M 23 . Current source CS 21  and transistor M 21  are connected in series between a supply voltage VDD and ground, while transistors M 22  and M 23  are connected in series between output terminal  201  and ground.  
         [0013]     Note that, in Wilson current mirror  200 , output transistor M 23  is diode-connected, rather than reference transistor M 21 . This creates a negative feedback loop, between the source of control transistor M 22  and the gate of reference transistor M 21 , that holds the output current I_OUT equal to reference current I_REF even if the output voltage (i.e., the voltage at output terminal  201 ) varies.  
         [0014]     For example, an increase in the voltage at output terminal  201  increases the drain voltage of transistor M 22 , and will therefore attempt to increase the current flow through transistor M 22 , which in turn would try to force the gate voltage of transistor M 23  to increase. This increased gate voltage would also be provided to transistor M 21 . However, since reference current I_REF is constant, the drain voltage of transistor M 21  must then decrease. As a result, the gate voltage of transistor M 22  is decreases, thereby maintaining output current I_OUT at a level equal to reference current I_REF.  
         [0015]     As is known in the art, the output impedance Rout( 22 ) of Wilson current mirror  200  is given by the following: 
 
 Rout ( 200 )≈ Ro ( 22 )(2+ —   gm ( 21 ) Ro   21 ))  (4) 
 
 where Ro( 22 ) is the output impedance of transistor  22 , gm( 21 ) is the transconductance of transistor M 21 , and Ro( 21 ) is the output impedance of transistor M 21 . Thus, the negative feedback loop of Wilson current mirror  200  results in an output impedance that is much greater than the output impedance of transistor M 22  by itself. 
 
         [0016]     However, this increased output impedance comes at the cost of reduced output voltage swing (range). As mentioned above, the output voltage of current mirror  100  shown in  FIG. 1  can go all the way down to the minimum voltage drop across output transistor M 12 —i.e., saturation voltage Vdsat( 12 ). By contrast, the minimum output voltage of Wilson current mirror  200  is much higher, resulting in a lesser net output voltage range.  
         [0017]     In particular, using Equation (2) above, the gate voltage of transistor M 23  is given by: 
 
 Vgs ( 23 )= Vdsat ( 23 )+ Vt ( 23 )  (5) 
 
 where Vgs( 23 ), Vdsat( 23 ), and Vt( 23 ) are the gate, saturation, and threshold voltages, respectively, of transistor M 23 . Since transistor M 23  is diode-connected, this is also the drain voltage of transistor M 23 , and the source voltage of transistor M 22 . 
 
         [0018]     Thus, the minimum output voltage Vo(min) of Wilson current mirror  200  is equal to this gate voltage plus the voltage drop across transistor M 23 , as shown by the following: 
 
 Vo (min)= Vdsat ( 23 )+ Vt ( 23 )+ Vdsat ( 22 )  (6) 
 
 where Vdsat( 22 ) is the saturation voltage of transistor M 22 . Transistors M 21 , M 22 , and M 23  will typically be matched, so that the minimum output voltage Vo(min) for Wilson current mirror  200  given in Equation 6 resolves to: 
 
 Vo (min)= Vt +2 Vdsat   (7) 
 
 where Vdsat and Vt are the saturation voltage and threshold voltage, respectively, of both transistors M 22  and M 23  (and transistor M 21 ). Thus, the improved output impedance of Wilson current mirror  200  comes at the expense of reduced output voltage swing, in comparison to current mirror  100 . 
 
         [0019]     To provide improved output voltage range while maintaining high output impedance, some current mirror circuits combine a cascoded output with multiple control branches. For instance,  FIG. 3  shows a conventional wide-swing cascode current mirror  300  that includes current sources CS 31  and CS 32  (both providing a reference current Io 1 ), an output terminal  301 , and transistors M 31 , M 32 , M 33 , M 34 , M 35 , and M 36 . Current source CS 31 , transistor M 31 , and transistor M 32  are connected in series between supply voltage VDD and ground to form a first control branch. Current source CS 32 , transistor M 33 , and transistor M 34  are connected in series between supply voltage VDD and ground to form a second control branch. Transistors M 35  and M 36  are connected in series between output terminal  301  and ground to form a cascode output branch.  
         [0020]     The current mirroring operation of cascode current mirror  300  begins with transistor M 33 , which is coupled to receive reference current Io 1  from current source CS 32 . Because it is diode-connected, transistor M 33  is in saturation and sinks reference current Io 1 . Transistor M 34 , which is gate-coupled to the gate of transistor M 33 , is sized to also sink reference current Io 1 , but operate in the linear region, as described in greater detail below.  
         [0021]     Meanwhile, the gate of transistor M 33  is also connected to the gates of transistors M 31  and M 35 . Transistors M 31  and M 35  are matched to transistor M 33 , and therefore sink the same current Io 1  (from current source CS 31  and as output current I_OUT, respectively) in response to the gate voltage from transistor M 33 .  
         [0022]     Finally, transistor M 32  is gate-coupled to the drain of transistor M 31  and the gate of transistor M 36 . Since transistor M 31  is operating in saturation, transistor M 32  is essentially diode-connected, and also operates in saturation to sink current Iol from transistor M 31 . Transistor M 36  receives the same gate voltage from transistor M 36 , and so also operates in saturation to sink the output current I_OUT (equal to reference current Io 1 ) from transistor M 35 . In this manner, cascode current mirror  300  provides proper current mirroring functionality.  
         [0023]     The minimum output voltage of cascode current mirror  300  is determined by the gate voltages provided to cascoded transistors M 35  and M 36 . As noted above, the voltage provided to the gate of transistor M 35  is equal to the voltage at the gate of transistor M 33 . The voltage at the gate of transistor M 33  is given by the following: 
 
 Vg ( 33 )= Vgs ( 33 )+ Vds ( 34 )  (8) 
 
 where Vgs( 33 ) is the gate-source voltage of transistor M 33  and Vds( 34 ) is the drain-source voltage of transistor M 34 . 
 
         [0024]     Transistor M 34  is configured such that the when Vgs( 33 ) is equal to Vdsat( 33 )+Vt( 33 ), the voltage drop across transistor M 34  is equal to Vdsat( 33 ). As is known in the art, this is accomplished by sizing the W/L (width to length) aspect ratio of transistor M 34  to be one-third of the W/L aspect ratio of transistor M 33 . Then, if transistors M 31 -M 33  and M 35 -M 36  are matched (i.e., have equal saturation voltages Vdsat and threshold voltages Vt), Equation 8 resolves to the following: 
 
 Vg ( 33 )= Vt +2 Vdsat   (9) 
 
         [0025]     This voltage is provided to the gate of transistor M 31 , which is also operating in saturation. Therefore, the gate-source voltage Vgs( 31 ) of transistor M 31  is equal to its threshold voltage (Vt) plus its saturation voltage (Vdsat). The source voltage Vs( 32 ) of transistor M 32 , which is equal to the actual voltage at the gate of transistor M 31  minus the gate-source voltage of transistor M 31 , is therefore simply equal to saturation voltage Vdsat.  
         [0026]     Because transistor M 36  is gate-coupled to the gate of transistor M 32 , the source voltage of transistor M 36  is also equal to Vdsat. Meanwhile, the drain-source voltage of transistor M 35  can swing down to its saturation voltage Vdsat before it falls out of saturation. Therefore, the minimum output voltage of cascode current mirror  300  is twice saturation voltage Vdsat (i.e., 2Vdsat).  
         [0027]     Thus, cascode current mirror  300  provides an improved output voltage swing over Wilson current mirror  200  (shown in  FIG. 2 ) while maintaining a high output impedance. However, the added complexity of current mirror  300  (i.e., the additional control branch formed by current source CS 32  and transistors M 33  and M 34 ) can have undesirable cost, die area, and power consumption consequences.  
         [0028]     Accordingly, it is desirable to provide a simple current mirror circuit that provides a wide output voltage range with a high output impedance.  
       SUMMARY OF THE INVENTION  
       [0029]     The invention includes a current mirror that provides high output impedance and high output voltage swing in a compact, simple design. The current mirror can be implemented using a single current source, thereby minimizing the power consumption of the current mirror.  
         [0030]     According to an exemplary embodiment of the invention, a current mirror includes a current source, a saturated transistor of a first conductivity type, and a diode-connected transistor of a second conductivity type, all serially connected between first and second supply voltages.  
         [0031]     The current mirror also includes an output transistor of the second conductivity type and a mirroring transistor of the second conductivity type that are serially connected between an output terminal and the second supply voltage. This cascoded pair of transistors ensures that the current mirror has a high output impedance.  
         [0032]     The diode-connected transistor sinks (or sources) a reference current from the current source, and in the process generates a gate voltage that is supplied to the mirroring transistor. This gate voltage causes the mirroring transistor to sink (or source) an output current equal to the reference current.  
         [0033]     Meanwhile, the gate of the output transistor is connected to the source of the saturated transistor, and therefore receives a gate voltage that is one saturation voltage higher than the gate voltage provided to the mirroring transistor. The output transistor is therefore able to sink (or source) the output current (reference current) generated by the mirroring transistor.  
         [0034]     In addition, this gate voltage provided to the gate of the output transistor allows the current mirror to have a relatively wide output voltage range. Specifically, the drain of the output transistor can swing from the first supply voltage all the way to twice its saturation voltage from the second supply voltage (assuming that all transistors are matched) before the output transistor falls out of saturation.  
         [0035]     The invention also includes methods of generating a current mirror output current. An exemplary method includes: providing a reference current to a diode-connected transistor via a saturated transistor, wherein the diode-connected transistor and the fully-on transistor have different conductivity types; providing the resulting gate voltage of the diode-connected transistor to a mirroring transistor to generate the output current; providing the output current to an output terminal via an output transistor; and providing the source voltage of the saturated transistor to the gate of the output transistor.  
         [0036]     Another exemplary method includes: cascoding first and second transistors between an output terminal and a first supply voltage; supplying a reference current to a diode-connected third transistor via a fourth transistor (the third and fourth transistors having different conductivity types); providing the first supply voltage to the gate of the fourth transistor; providing the gate voltage of the third transistor to the gate of the second transistor; and providing the source voltage of the fourth transistor to the gate of the first transistor.  
         [0037]     These and other aspects of the invention will be more fully understood in view of the following description of the exemplary embodiments and the drawings thereof. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0038]      FIG. 1  is a circuit diagram of a conventional current mirror.  
         [0039]      FIG. 2  is a circuit diagram of a conventional Wilson current mirror.  
         [0040]      FIG. 3  is a circuit diagram of conventional cascode current mirror.  
         [0041]      FIG. 4  is a circuit diagram of a high-swing current mirror with high output impedance, according to an embodiment of the invention.  
         [0042]      FIG. 5  is a circuit diagram of a high-swing current mirror with high output impedance, according to another embodiment of the invention. 
     
    
     DETAILED DESCRIPTION  
       [0043]      FIG. 4  shows a current mirror  400  in accordance with an embodiment of the invention. Current mirror  400  includes a current source CS 41 , an output terminal  401 , a PMOS (p-type metal-oxide-semiconductor) transistor P 41 , and NMOS (n-type metal-oxide-semiconductor) transistors N 42 , N 43 , and N 44 .  
         [0044]     Note that, for exemplary purposes, transistors P 41 , N 42 , N 43 , and N 44  are all described as being matched transistors, and therefore share the same saturation voltages Vdsat and threshold voltages Vt. This matching of transistors allows current mirror  400  to provide a gain of unity (i.e., output current I_OUT is equal to reference current I_REF). However, according to various other embodiments of the invention, the transistors can be sized differently (i.e., can have different gate widths and/or lengths) to produce differing electrical characteristics so that any desired gain can be provided by current mirror  400 .  
         [0045]     Current source CS 41 , transistor P 41 , and transistor N 42  are connected in series between an upper supply voltage VDD and a lower supply voltage VSS (e.g., ground), while transistors N 43  and N 44  are connected in series between output terminal  401  and lower supply voltage VSS. Current source CS 41  supplies (sources) a reference current I_REF that must flow to lower supply voltage VSS through transistors P 41  and N 42 .  
         [0046]     Because the gate of transistor N 44  is connected to the gate of transistor N 42 , transistor N 44  receives the same gate voltage generated by diode-connected transistor N 42 . Therefore, as long as the drain-source voltage across transistor N 44  is large enough to keep transistor N 44  in saturation (described in greater detail below), transistor N 44  will mirror reference current I_REF as output current I_OUT (since transistors N 42  and N 44  are matched).  
         [0047]     Meanwhile, because current mirror  400  includes cascoded output transistors N 43  and N 44 , and because transistor N 43  is gate-coupled to the source of transistor P 41 , the output impedance Rout( 400 ) of current mirror  400  is substantially similar to that of Wilson current mirror  200  shown in  FIG. 2 . Output impedance Rout( 400 ) can therefore be given by: 
 
 Rout ( 400 )≈ Ro ( 43 )(2 +gm ( 41 ) Ro ( 41 ))  (10) 
 
 where Ro( 43 ) is the output impedance of transistor N 43 , gm( 41 ) is the transconductance of transistor P 41 , and Ro( 41 ) is the output impedance of transistor P 41 . In this manner, current mirror  400  provides a high output impedance. 
 
         [0048]     Furthermore, by properly sizing transistor P 41 , the output voltage swing of current mirror  400  can be maximized. According to an embodiment of the invention, transistor P 41  is sized such that it is in saturation at a gate-source voltage Vgs( 41 ) equal to the sum of saturation voltage Vdsat and threshold voltage Vt, as indicated below: 
 
 Vgs ( 41 )= Vdsat+Vt   (11) 
 
 Consequently, while transistor P 41  is in saturation, the voltage drop across transistor P 41  (i.e., its drain-source voltage Vds( 41 )) is equal to saturation voltage Vdsat. 
 
         [0049]     Therefore, the voltage Vs( 41 ) at the source of transistor P 41  is equal to saturation Vdsat plus the drain-source voltage Vds( 42 ) of transistor N 42 . Based on Equation 1, the gate-source voltage of diode-connected transistor N 42  is equal to the sum saturation voltage Vdsat and threshold voltage Vt, as indicated below: 
 
 Vgs ( 42 )= Vdsat+Vt   (12) 
 
 Thus, since the gate-source and drain-source voltages of transistor N 42  are the same, the voltage Vs( 41 ) at the source of transistor P 41  is given by: 
 
 Vs ( 41 )=2 Vdsat+Vt   (13) 
 
         [0050]     This voltage is then provided to the gate of transistor N 43 . Meanwhile, the voltage at the gate of transistor N 42  (i.e., gate-source voltage Vgs( 42 )) is provided to the gate of transistor N 44 . The minimum output voltage of current mirror  400  is therefore equal to the sum of the minimum drain-source voltages of transistors N 43  and N 44  that keep those two transistors in saturation.  
         [0051]     For transistors N 43  and N 44  to remain in saturation, their drain-source voltages must be at least equal to their gate-source voltages minus threshold voltage Vt (as indicated by Equation 1). For example, since transistor N 44  receives a gate-source voltage equal to the sum of saturation voltage Vdsat and threshold voltage Vt, the minimum drain-source voltage required for transistor N 44  to remain in saturation is simply equal to saturation voltage Vdsat.  
         [0052]     Similarly, for transistor N 43  to remain in saturation, its drain-source voltage Vds( 43 ) must be at least equal to its gate voltage minus threshold voltage Vt. The voltage provided at the gate of transistor N 43  is equal to twice saturation voltage Vdsat plus threshold voltage Vt (as indicated by Equation 13), while the voltage at the source of transistor N 43  is equal to saturation voltage Vdsat (since the minimum drain-source voltage of transistor N 44  is equal to saturation voltage Vdsat). Therefore, the gate-source voltage Vgs( 43 ) of transistor N 43  is given by: 
 
 Vgs ( 43 )=(2 Vdsat+Vt )− Vdsat   (14) 
 
 which resolves to: 
 
 Vgs ( 43 )= Vdsat+Vt   (15) 
 
         [0053]     Therefore, the minimum drain-source voltage Vds( 43 ) of transistor N 43  is simply equal to saturation voltage Vdsat (once again using Equation 1). As a result, the minimum output voltage Vout(min) of current mirror  400  is equal to twice saturation voltage Vdsat, as indicated by the following: 
 
 Vout (min)=2 Vdsat   (16) 
 
         [0054]     In this manner, current mirror  400  combines a wide output voltage swing with a high output impedance in a simple (four-transistor) design. The output voltage of current mirror  400  can swing from upper supply voltage VDD all the way down to twice saturation voltage Vdsat. Current mirror  400  therefore provides a much higher output voltage range than Wilson current mirror  200  shown in  FIG. 2 , while providing the same high output impedance. Likewise, current mirror  400  provides as wide an output voltage range and as high an output impedance as cascode current mirror  300  shown in  FIG. 3 , but in a much more compact and power-efficient circuit.  
         [0055]      FIG. 5  shows a current mirror  500  in accordance with another embodiment of the invention. Current mirror  500  includes a current source CS 51 , an output terminal  501 , an NMOS (n-type metal-oxide-semiconductor) transistor N 52 , and PMOS (p-type metal-oxide-semiconductor) transistors P 51 , P 53 , and P 54 .  
         [0056]     Note that, for exemplary purposes, transistors P 51 , N 52 , P 53 , and P 54  are once again all described as being matched transistors having the same saturation voltages Vdsat and threshold voltages Vt. As noted above, this transistor matching allows current mirror  500  to provide a unity gain. However, according to various other embodiments of the invention, the transistors can be sized differently to produce differing electrical characteristics so that any desired gain can be provided by current mirror  500 .  
         [0057]     Transistor P 51 , transistor N 52 , and current source CS 51  are connected in series between an upper supply voltage VDD and a lower supply voltage VSS (e.g., ground), while transistors P 43  and P 44  are connected in series between upper supply voltage VDD and output terminal  501 . Current source CS 51  supplies (sinks) a reference current I_REF that must be sourced by transistors P 51  and N 52 .  
         [0058]     Because the gate of transistor P 53  is connected to the gate of transistor P 51 , transistor P 53  receives the same gate voltage generated by diode-connected transistor P 51 . Therefore, as long as the drain-source voltage across transistor P 53  is large enough to keep transistor P 53  in saturation, transistor P 53  will mirror reference current I_REF as output current I_OUT (since transistors P 51  and P 53  are matched).  
         [0059]     Meanwhile, because current mirror  500  includes cascoded output transistors P 53  and P 54 , and since transistor P 54  is gate-coupled to the source of transistor N 52  the output impedance Rout( 500 ) of current mirror  500  is substantially similar to that of current mirror  200  shown in  FIG. 2 . Output impedance Rout( 500 ) can therefore be given by: 
 
 Rout ( 500 )≈ Ro ( 54 )(2+ —   gm ( 52 ) Ro ( 52 ))  (17) 
 
 where Ro( 54 ) is the output impedance of transistor P 54 , gm( 52 ) is the transconductance of transistor N 52 , and Ro( 52 ) is the output impedance of transistor N 52 . In this manner, current mirror  500  provides a high output impedance. 
 
         [0060]     Furthermore, by properly sizing transistor N 52 , the output voltage swing of current mirror  500  can be maximized. According to an embodiment of the invention, transistor P 52  is sized such that it is in saturation at a gate-source voltage Vgs( 52 ) equal to the sum of saturation voltage Vdsat and threshold voltage Vt, as indicated below: 
 
 Vgs ( 52 )= Vdsat+Vt   (18) 
 
 Consequently, while transistor P 52  is in saturation, the drain-source voltage Vds( 52 ) across transistor P 52  is equal to saturation voltage Vdsat. 
 
         [0061]     Therefore, the voltage Vs( 52 ) at the source of transistor N 52  is equal to upper supply voltage VDD minus saturation voltage Vdsat minus the drain-source voltage Vds( 51 ) of transistor P 51 . Based on Equation 1, the gate-source voltage Vgs( 51 ) of diode-connected transistor P 51  is equal to the sum of saturation voltage Vdsat and threshold voltage Vt, as indicated below: 
 
 Vgs ( 51 )= Vdsat+Vt   (19) 
 
 Thus, since the gate-source and drain-source voltages of diode-connected transistor P 51  are the same, the voltage at the source of transistor P 52  is given by: 
 
 Vs ( 52 )= VDD− 2 Vdsat−Vt   (20) 
 
         [0062]     This voltage is also provided to the gate of transistor P 54 . Meanwhile, the voltage at the gate of transistor P 51  is provided to the gate of transistor P 53 . Note that because both transistors P 51  and P 53  are source-coupled to upper supply voltage VDD, the gate-source voltages of the two transistors are the same (i.e., Vgs( 51 )=Vgs( 53 )). The maximum output voltage of current mirror  500  is equal to upper supply voltage VDD minus the sum of the minimum drain-source voltages of transistors P 53  and P 54  that keep those two transistors in saturation.  
         [0063]     For transistors P 53  and P 54  to remain in saturation, their drain-source voltages must be at least equal to their gate-source voltages minus threshold voltage Vt (as indicated by. Equation 1). For example, since transistor P 53  receives a gate-source voltage equal to the sum of saturation voltage Vdsat and threshold voltage Vt, the minimum drain-source voltage required for transistor N 53  to remain in saturation is simply equal to saturation voltage Vdsat.  
         [0064]     Similarly, for transistor P 54  to remain in saturation, its drain-source voltage Vds( 54 ) must be at least equal to its gate voltage minus threshold voltage Vt. The voltage provided at the gate of transistor P 54  is equal to upper supply voltage VDD minus twice saturation voltage Vdsat minus threshold voltage Vt (as indicated by Equation 20), while the voltage at the source of transistor P 54  is equal to supply voltage VDD minus saturation voltage Vdsat (since the minimum drain-source voltage of transistor N 53  is equal to saturation voltage Vdsat). Therefore, the gate-source voltage Vgs( 54 ) of transistor P 54  is given by: 
 
 Vgs ( 54 )=( VDD−Vdsat )( VDD− 2 Vdsat−Vt )  (21) 
 
 which resolves to: 
 
 Vgs ( 54 )= Vdsat+Vt   (22) 
 
         [0065]     Therefore, the minimum drain-source voltage Vds( 54 ) of transistor P 54  is simply equal to saturation voltage Vdsat (once again using Equation 1). As a result, the maximum output voltage Vout(min) of current mirror  500  is equal to upper supply voltage VDD minus twice saturation voltage Vdsat, as indicated by the following: 
 
 Vout (max)= VDD− 2 Vdsat   (23) 
 
         [0066]     In this manner, current mirror  500  combines a wide output voltage swing with a high output impedance in a simple (four-transistor) design. The output voltage for current mirror  500  can swing from lower supply voltage VSS all the way to two times saturation voltage Vdsat of upper supply voltage VDD−i.e., from lower supply voltage VSS to upper supply voltage VDD minus 2Vdsat. Therefore, like current mirror  400  shown in  FIG. 4 , current mirror  500  provides the same high output impedance and a much higher output voltage range than Wilson current mirror  200  shown in  FIG. 2 , and also provides the same high output impedance and wide output voltage range of cascode current mirror  300  shown in  FIG. 3  in a much more compact and power-efficient circuit.  
         [0067]     The various embodiments of the structures and methods of this invention that are described above are illustrative only of the principles of this invention and are not intended to limit the scope of the invention to the particular embodiments described. Thus, the invention is limited only by the following claims and their equivalents.

Technology Category: 3