Patent Document

BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an IC test device, particularly to an assembling type printed circuit board structure of a probe card. 
     2. Description of the Prior Art 
     In semiconductor fabrication, wafer sort is referred to a technology testing the integrated circuit (IC) on a wafer to guarantee that IC can operate normally and learn the yield of products. Normally, an automatic test equipment (ATE) is temporarily electrically connected with IC on a wafer to verify the performance of IC. A probe card is used to transmit signals between ATE and IC. 
     Refer to  FIG. 1A . In a conventional wafer sort, probes  1100 A of a probe card  1000  are interposed between and connected with a printed circuit board  2000  and a tested wafer  3000 , which are separated from each other by a predefined/fixed probe depth H PD . The probe  1100 A has a specified diameter-to-length ratio so as to maintain the stiffness of the probe  1100 A and favor the connection of the probe  1100 A to the printed circuit board  2000  and the wafer  3000 . With continuous advancement of semiconductor technology, chips are persistently miniaturized to smaller and smaller size. Therefore, it is necessary to reduce the related dimensions of a probe card for wafer sort. Refer to  FIG. 1B . The size and spacing of electrodes in the testing area  2100 B in the wafer side of the printed circuit board  2000  in  FIG. 1B  are smaller than the size and spacing of electrodes in the testing area  2100 A in the wafer side of the printed circuit board  2000  in  FIG. 1A . Thus, the diameter of the probe  1100 A in  FIG. 1A  must be reduced to the diameter of the probe  1100 B in  FIG. 1B  so as to meet the new situation. In the case that the probe depth H PD  and the dimensions of the probe card are unchanged, the diameter-to-length ratio of the probes  1100 B must be reduced, which will further reduce the stiffness of the probes  1100 B and affect the connection of the probes  1100 B to the printed circuit board  2000  and the wafer  3000 . Thus, the quality and result of wafer sort is also affected. 
     SUMMARY OF THE INVENTION 
     One objective of the present invention is to provide a printed circuit board (PCB) structure, which has a two-stage printed circuit board and various sizes of sleeves for adjusting the distance between the wafer and the specified area of the printed circuit board, whereby to shorten the length of the probes appearing between the wafer and the specified area of the printed circuit board, and whereby to maintain the diameter-to-length ratio of the probes within a specified range, wherefore the problem of insufficient probe stiffness is overcome, and wherefore the printed circuit board structure of the present invention can meet the tendency of dimensional reduction in wafer sort and undertake wafer sort in high efficiency, high adaptability and high precision. 
     In one embodiment, the printed circuit board structure of the present invention comprises a sleeve, a first body and a second body. The sleeve includes a wall, a first protrusion and a second protrusion. The wall extends along an axial direction, has an outer wall surface and an inner wall surface in a radial direction, and has a first wall end and a second wall end opposite the first wall end in the axial direction. The first protrusion extends outward radially from the first wall end and defines a first outer side and a first inner side opposite the first outer side in the axial direction. The second protrusion extends inward radially from the second wall end and defines a second outer side and a second inner side opposite the second outer side in the axial direction. The first body is detachably connected with the first inner side. The second body is detachably connected with the second inner side. The first inner side and the second inner side define a sleeve inner side height, which is greater than a first body thickness of the first body. 
     Preferably, the printed circuit board structure of the present invention comprises a wafer. The first body and the wafer define a predefined probe depth. The second body and the wafer define an adjustment depth. The predefined probe depth is greater than the adjustment depth. 
     In another embodiment, the printed circuit board structure is arranged over a wafer for wafer sort and comprises a sleeve, a first body and a second body. The sleeve includes a wall. The wall extends along an axial direction and has an outer wall surface and an inner wall surface in a radial direction. The first body is disposed in the outer wall surface of the sleeve. The second body is disposed in the inner wall surface of the sleeve. The first body and the wafer define a predefined probe depth. The second body and the wafer define an adjustment depth. The predefined probe depth is greater than the adjustment depth. 
     Below, embodiments are described in detail in cooperation with the attached drawings to make easily understood the objectives, technical contents, characteristics and accomplishments of the present invention. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1A  is a sectional view schematically showing that the probes of a probe card are connected with a printed circuit board and a wafer in a conventional wafer sort; 
         FIG. 1B  is a sectional view schematically showing that the probes have a smaller diameter than the probes in  FIG. 1A ; 
         FIG. 2  is a sectional view schematically showing a printed circuit board structure according to one embodiment of the present invention; 
         FIG. 3  is a local bottom view schematically showing a printed circuit board structure according to one embodiment of the present invention; 
         FIG. 4  is a sectional view where numerals are assigned to the components of the sleeve shown in  FIG. 2  and characteristic dimensions are defined; 
         FIG. 5  is a sectional view schematically showing the configuration of a printed circuit board structure and a tested wafer/semiconductor device according to one embodiment of the present invention. 
     
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Refer to  FIG. 2  a sectional view schematically showing a PCB structure according to one embodiment of the present invention. The PCB structure  1  of the present invention comprises a first body  10 , a second body  12  and a sleeve/adapter  14 . In substance, the sleeve  14  is a hollow column or hollow disc where a through hole penetrates. The sleeve  14  is disposed between the first body  10  and the second body  12  and separates the first body  10  from the second body  12 . In detail, the first body  10  is detachably connected with the outer surface of the sleeve  14  (disposed outside the through hole); the second body  12  is detachably connected with the inner surface of the sleeve  14  (disposed inside the through hole). Preferably, the first body  10  has a plurality of first electrodes  20 , and the second body  12  has a plurality of second electrodes  30  respectively corresponding to the first electrodes  20 . Preferably, a wire  40  is disposed between each of the first electrodes  20  and the corresponding one of the second electrodes  30 , electrically connecting the first electrode  20  with the corresponding second electrode  30 . Preferably, each of the second electrodes  30  has a corresponding third electrode  32  disposed on the second body  12 . Preferably, a plated through hole  34  is formed between each second electrode  30  and the corresponding third electrode  32 , penetrating through the second body  12  and electrically connecting the second electrode  30  and the corresponding third electrode  32 . Refer to  FIG. 2  again and refer to  FIG. 3 . Preferably, each of the third electrodes  32  has a signal trace  36 ; the signal trace  36  gradually shrinks in width and extends to a specified/test area  38  where the signal traces  36  contact probes of a probe card (not shown in the drawing). It should be noted:  FIG. 3  is not to limit but only to exemplify the quantities and layout of the third electrodes  32  and the signal traces  36 . 
     In one embodiment, the second body  12  has at least one electric barrier (not shown in the drawing) disposed between each two adjacent signal traces  36 , especially among the rear ends of at least two signal traces  36 . The electric barrier has a higher insulation coefficient, such as an insulation coefficient equal to or higher than the insulation coefficient of air, so as to reduce the probability of current leakage between two adjacent signal traces  36 . Preferably, the electric barrier is in form of at least one of slots, holes and structures made of an insulating material; the slots are through slots or blind slots; the holes are through holes or blind holes; the insulating material has an insulation coefficient higher than the insulation coefficient of air. 
     Refer to  FIG. 4  for the detailed structure of the sleeve  14 . The sleeve  14  includes a wall  50 , a first protrusion  60  and a second protrusion  70 . The wall  50  extends axially, having an outer wall surface  50 A and an inner wall surface  50 B in the radial direction and having a first wall end  52  and a second wall end  54  opposite the first wall end  52  in the axial direction. The first protrusion  60  extends outward radially from the first wall end  52  and defines a first outer side  62  and a first inner side  64  opposite the first outer side  62  in the axial direction. The second protrusion  70  extends inward radially from the second wall end  54  and defines a second outer side  72  and a second inner side  74  opposite the second outer side  72  in the axial direction. The first body  10  is disposed in the outer wall surface  50 A of the sleeve  14 . Preferably, the first body  10  is detachably connected with the first protrusion  60  of the sleeve  14 . In one embodiment, the first body  10  is detachably connected with the first inner side  64  of the first protrusion  60  of the sleeve  14 . The second body  12  is disposed in the inner wall surface  50 B of the sleeve  14 . Preferably, the second body  12  is detachably connected with the second protrusion  70  of the sleeve  14 . In one embodiment, the second body  12  is detachably connected with the second inner side  74  of the second protrusion  70  of the sleeve  14 . The abovementioned structure defines a sleeve inner side height H A1  between the first inner side  64  and the second inner side  74 , which is greater than the first body thickness H B1  of the first body  10 . Thus, a differential height H diff  exists between the second inner side  74  and one side of the first body  10 , which is near the second inner side  74 . In other words, the differential height H diff  exists between one side of the second body  12 , which contacts the second inner side  74 , and one side of the first body  10 , which is near the second inner side  74 . The configuration of the second electrodes  30  and the third electrodes  32  in the second body  12  is further described in detail below. The second electrodes  30  are disposed on one side  12 A of the second body  12 , which is far away from the second protrusion  70 . The third electrodes  32  are disposed on another side  12 B of the second body  12 , which is near the second protrusion  70 , and correspond to the second electrodes  30 . 
     Refer to  FIG. 5  a diagram schematically showing the configuration of a PCB structure and a tested wafer/semiconductor device according to one embodiment of the present invention. The PCB structure  1  is disposed over a wafer  80  for wafer sort. The differential height H diff  of the sleeve inner side height H A1  and the first body thickness H B1  makes the adjustment height H ad , which is defined by the second body  12  and the wafer  80 , smaller than a predefined probe depth H PD , which is defined by the first body  10  and the wafer  80 . While chip miniaturization demands that the diameter of the probes should be reduced, the distance between the second body  12  and the wafer  80  that are connected by the probes of the probe card (not shown in the drawing), especially the probe length at which the probes connect the second body  12  and the wafer  80 , can be reduced without varying the predefined grip length/predefined probe depth H PD  between the PCB structure  1  (especially the first body  10 ) and the wafer  80  because of the abovementioned configuration. Thereby, the diameter-to-length ratio of the probes exposed from the probe card can be maintained within a specified range.

Technology Category: 3