Source: http://www.horsttech.com/
Timestamp: 2019-04-23 17:09:14+00:00

Document:
Robert W. Horst, Ph. D.
R. Horst, "FlexCVA: A Continuously Variable Actuator for Active Orthotics," Proc. 28th Annual International Conf. of the IEEE Engineering in Medicine and Biology Society, Aug., 2006.
R. Horst, “A Bio-Robotic Leg Orthosis for Rehabilitation and Mobility Enhancement,” Proc. 31st Annual International Conf. of the IEEE Engineering in Medicine and Biology Society, Sept, 2009.
J. Vose,; A. McCarthy, E. Tacdol, R. Horst., “Optimization of Lower Extremity Kinetics During Transfers Using a Wearable, Portable Robotic Lower Extremity Orthosis: a Case Study,” Int’l Conf. NeuroRehabilitation, Toledo, Spain, Nov. 14-16, 2012.
J. Vose,; A. McCarthy, E. Tacdol, R. Horst., “Modification of Lower Extremity Kinetic Symmetry During Sit-to-Stand Transfers Using a Robotic Leg Orthosis with Individuals Post-Stroke,” Int’l Conf. NeuroRehabilitation, Toledo, Spain, Nov. 14-16, 2012.
R. Horst, "Reliable Design of High-speed Cache and Control Store Memories," Proc. 19th Int. Symp. Fault-Tolerant Computing, June 1989.
J. Bartlett, W. Bartlett, R. Carr, D. Garcia, J. Gray, R. Horst, R. Jardine, et al., "Fault Tolerance in Tandem Computer Systems," in Reliable Computer Systems, D. P. Siewiorek and R. S. Swarz, Eds., Bedford, MA: Digital Press, 1992.
R. Horst, D. Jewett, D. Lenoski, "The Risk of Data Corruption in Microprocessor-based Systems," Proc. 23rd International Symposium on Fault-tolerant Computing, June 1993.
R. Horst, "Massively Parallel Systems You Can Trust," COMPCON Digest of Papers, San Francisco, CA, Feb. 28-March 4, 1994.
W. E. Baker, et al., "A Flexible ServerNet-based Fault-Tolerant Architecture," in Proc. 25th Int. Symp. Fault-Tolerant Computing, Pasadena, CA, June 27-30 1995.
R. Horst, "A Linear-Array WSI Architecture for Improved Yield and Performance," in Proc. Int. Conf. WSI, San Francisco, CA, pp. 85-91, Jan. 1990.
R. Horst, "Task Flow Computer Architecture," in Proc. Int. Conf. Parallel Processing, Vol. I, pp. 533-540, Aug. 1990.
R. Horst, "Task Flow: A Novel Approach to Fine-grain Wafer-scale Parallel Computing," Coordinated Science Lab. Report CRHC-91-15, University of Illinois, April 1991.
R. Horst, R. Harris, and R. Jardine, "Multiple Instruction Issue in the NonStop Cyclone Processor," in Proc. 17th Int. Symp. Computer Architecture, May 1990.
R. W. Horst, "Task-Flow Architecture for WSI Parallel Processing," Computer, vol. 25, no. 4, pp. 10-18, April 1992.
J. Gray, B. Horst, and M. Walker, "Parity striping of disk arrays: Low cost reliable storage with acceptable throughput," in Proc. 16th Int. Conf. on Very Large Databases, Brisbane, Australia, pp. 148-161, Aug. 1990.
R. Horst, J. McDonald, B. Alessi, “Beyond RAID: An Architecture for Improving PC Fault Tolerance and Performance, Digest of Fast Abstracts, 29th Int. Symp. Fault-Tolerant Computing, June 1999.
R. Horst, “TwinStor Technology: A Compelling Case for Multiple Drives in PCs, Servers and Workstations,” 3ware Technical Report TR-1999-2, 3ware, Inc., August 1999.
L. Chung, J. Gray, B. Worthington, R. Horst, “Study of Random and Sequential IO on Windows 2000™”, http://research.microsoft.com/BARC/Sequential_IO/.
R. Horst, “Storage Networking: The Killer Application for Gigabit Ethernet,” dmDirect Business Intelligence Newsletter, http://www.dmreview.com. April 20, 2001.
R. Horst, “IP Storage and the CPU Consumption Myth,” proc. IEEE International Symposium on Network Computing and Applications (NCA2001), October 2001.
R. Horst, "TNet: A Reliable System Area Network," IEEE Micro, vol. 15, no. 1, pp. 37-45, February 1994.
R. Horst, "ServerNet Deadlock Avoidance and Fractahedral Topologies," in Proc. 10th Int'l Parallel Processing Symposium, Honolulu, Hawaii, pp. 274-280, 1995.
R. Horst and D. Garcia, "ServerNet SAN I/O Architecture," Proc. Hot Interconnects V, August 1997.
R. Horst, "A Fault Model for System Area Networks," FTCS-28 Fast Abstract, June 1998.
D.R Avresky, V. Shurbanov, R. Horst, “The effect of router arbitration policy on scalability of ServerNet Topologies,” Microprocessors and Microsystems 21, pp 545-561, 1998.
D.R Avresky, V. Shurbanov, R. Horst, W. Watson, L. Young, D. Jewett. “Performance Modeling of ServerNet SAN Topologies,” Journal of Supercomputing, V. 14, pp. 19-37, 1999.
D.R Avresky, V. Shurbanov, R. Horst, “Optimizing router arbitration in point-to-point networks,” Computer Communications, 22, pp 608-620, 1999.
D.R Avresky, V. Shurbanov, R. Wilkinson, R. Horst, W. Watson, L. Young, “ Maximum delivery time and hot spots in ServerNet topologies, Computer Networks 31, pp. 1891-1910, 1999.
A. Hossain, S. Kang, R. Horst, “ServerNet and ATM Interconnects: Comparison for Compressed Video Transmission,” Journal of Communications and Networks, V. 1 No. 2, June 1999.
IEEE Fellow. Elected “for contributions to the architecture and design of fault tolerant systems and networks,” 2001.
Selected as one of the 50 innovators from the 50-year history of the University of Illinois Computer Science department, 2014.
IEEE/IFR Invention & Entrepreneurship Award. Cited for "A breakthrough product for rehabilitation of stroke patients," 2013.
Program Committees: Int. Symposium on Fault Tolerant Computing (FTCS) 1991, 1997, 1999. Dependable Systems and Networks (DSN), 2002. Int. Symposium on Network Computing and Applications (NCA) 2001, 2003. IEEE Workshop on Fault-Tolerant Parallel, Distributed and Network-Centric Systems, 2004. Workshop on System Area Networks, 2004.
Compaq Key Patent Award for patent 5,751,932 - Fail-fast, fail-functional, fault-tolerant multiprocessor system, 2002.
Distinguished Alumni Award for “Pioneering Contributions to Fault-tolerant Computer Architecture,” University of Illinois department of Electrical and Computer Engineering, 1998.

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