Source: https://www.mccormick.northwestern.edu/research-faculty/directory/profiles/hardavellas-nikos.html
Timestamp: 2019-04-20 06:23:50+00:00

Document:
I work on Computer Architecture, primarily on techniques to enable extreme-scale multi-core processors. Such designs are elusive due to technological limitations on yield, power, and memory bandwidth. My research aims to pave the way to energy-efficient computing by investigating ideas to combat "dark silicon" (i.e., our inability to power up a chip in its entirety) and to speed up the execution of programs by several factors through parallelism extraction, memoization at the software and hardware levels, and the use of emerging technologies. Our work extends across multiple stacks: circuit design, processor architecture, memory systems, interconnects, compilers, runtime environments, and system software.
We develop technologies that allow the underlying hardware components to be unreliable, while maintaining program output quality, and in the process save energy. We develop technologies that eliminate the overheads of conventional computing, and turn the problem of dark silicon into an opportunity. We harness the unused chip area to build multiple heterogeneous pipelines within a core that deliver up to one order of magnitude higher power efficiency, and design novel energy-proportional nanophotonic interconnects to minimize the energy cost of data transfers at all levels, within a processor chip, across multiple chips, as well as across entire data centers. We believe that the confluence of parallel computer architeture techniques and nanophotonics will allow us to design "virtual macrochips" that can deliver supercomputing power at a fraction of the energy cost and area.
G. Tziantzioulis, N. Hardavellas and S. Campanoni. Temporal Approximate Function Memoization. IEEE Micro, Special Issue on Approximate Computing, Vol. 38(4), pp. 60–70, July/August 2018.
E. A. Deiana, V. St-Amour, P. Dinda, N. Hardavellas and S. Campanoni. Unconventional Parallelization of Nondeterministic Applications. In Proceedings of the 23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, March 2018.
E. A. Deiana, V. St-Amour, P. Dinda, N. Hardavellas and S. Campanoni. The Liberation Day of Nondeterministic Programs. In Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques (PACT), Portland, OR, September 2017.
Y. Demir, N. Terzenidis, H. Han, D. Syrivelis, G. T. Kanellos, N. Hardavellas, N. Pleros, S. Kandula, and F. Bustamante. Harnessing Path Divergence for Laser Control in Data Center Networks. In Proceedings of the 2017 IEEE Photonics Society Summer Topical Meeting Series (IEEE SUM), San Juan, Puerto Rico, July 2017.
A. M. Gok and N. Hardavellas. VaLHALLA: Variable Latency History Aware Local-carry Lazy Adder. In Proceedings of the 27th ACM Great Lakes Symposium on VLSI (GLSVLSI), Banff, Alberta, Canada, May 2017.
Y. Demir and N. Hardavellas. Energy Proportional Photonic Interconnects. In ACM Transactions on Architecture and Code Optimization (TACO), Vol. 13(5), December 2016.
Y. Demir and N. Hardavellas. Energy Proportional Photonic Flattened-Butterfly Networks. In Proceedings of the 22nd IEEE International Symposium on High Performance Computer Architecture (HPCA), Barcelona, Spain, March 2016.
G. Tziantzioulis, A. M. Gok, S M Faisal, N. Hardavellas, S. Ogrenci-Memik, and S. Parthasarathy. Lazy Pipelines: Enhancing Quality in Approximate Computing. In Proceedings of the Design, Automation, and Test in Europe (DATE), Dresden, Germany, March 2016.
S M Faisal, G. Tziantzioulis, A. M. Gok, S. Parthasarathy, N. Hardavellas, and S. Ogrenci-Memik. Edge Importance Identification for Energy Efficient Graph Processing. In Proceedings of the 2015 IEEE International Conference on Big Data (IEEE BigData), Santa Clara, CA, October 2015.
B. Patel, G. Memik and N. Hardavellas SCP: Synergistic Cache Compression and Prefetching. In Proceedings of the 33rd IEEE International Conference on Computer Design (ICCD), New York City, NY, October 2015.
Y. Demir and N. Hardavellas. Parka: Thermally Insulated Nanophotonic Interconnects. In Proceedings of the 9th International Symposium on Networks-on-Chip (NOCS), Vancouver, Canada, September 2015.
G. Tziantzioulis, A. M. Gok, S. M. Faisal, N. Hardavellas, S. Memik, and S. Parthasarathy. b-HiVE: A Bit-Level History-Based Error Model with Value Correlation for Voltage-Scaled Integer and Floating Point Units. In Proceedings of the Design Automation Conference (DAC), San Francisco, CA, June 2015.
Y. Demir and N. Hardavellas. Towards Energy-Efficient Photonic Interconnects. In Proceedings of SPIE, Optical Interconnects XV, San Francisco, CA, February 2015.
Y. Demir and N. Hardavellas. LaC: Integrating Laser Control in a Photonic Interconnect. In Proceedings of the IEEE Photonics Conference (IPC), pp. 28-29, La Jolla, CA, October 2014.
Y. Demir and N. Hardavellas. EcoLaser: An Adaptive Laser Control for Energy-Efficient On-Chip Photonic Interconnects. In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), La Jolla, CA, August 2014.
Y. Demir, Y. Pan, S. Song, N. Hardavellas, G. Memik and J. Kim. Galaxy: A High-Performance Energy-Efficient Multi-Chip Architecture Using Photonic Interconnects. In Proceedings of the ACM International Conference on Supercomputing (ICS), pp. 303--312, Munich, Germany, June 2014.
M. Schuchhardt, A. Das, N. Hardavellas, G. Memik, and A. Choudhary. The Impact of Dynamic Directories on Multicore Interconnects. IEEE Computer, Special Issue on Multicore Memory Coherence, Vol. 46(10), October 2013.
N. Hardavellas. The Rise and Fall of Dark Silicon. USENIX ;login:, Vol. 37, No. 2, pp. 7-17, April 2012. Invited Paper.
A. Das, M. Schuchhardt, N. Hardavellas, G. Memik, and A. Choudhary. Dynamic Directories: Reducing On-Chip Interconnect Power in Multicores. In Proceedings of Design, Automation, and Test in Europe (DATE), Dresden, Germany, March 2012.
B. Pattabiraman, R. Morton, A. Grabenhofer, N. Hardavellas, J. Tumblin, and V. Gopal. Towards a Schlieren Camera. 8th Annual Mid-West Graphics Workshop (MIDGRAPH), Chicago, IL, December 2012.
A. Yaagoub, G. Trajcevski, P. Scheuermann, and N. Hardavellas. Load Balancing for Processing Spatio-Temporal Queries in Multi-Core Settings. 11th International ACM Workshop on Data Engineering for Wireless and Mobile Access (MobiDE), co-located with ACM SIGMOD International Conference on Management of Data and ACM SIGMOD-SIGACT-SIGART Symposium on Principles of Database Systems (ACM SIGMOD/PODS), Scottsdale, AZ, May 2012.
N. Hardavellas, M. Ferdman, B. Falsafi, and A. Ailamaki. Toward Dark Silicon in Servers. In IEEE Micro, Special Issue on Big Chips, Vol. 31(4), pp. 6-15, July/August 2011. IEEE Micro Spotlight Paper,February 2012.
S. Liu, B. Leung, A. Neckar, S. Ogrenci-Memik, G. Memik, and N. Hardavellas. Hardware/Software Techniques for DRAM Thermal Management. In Proceedings of the 17th IEEE International Symposium on High Performance Computer Architecture (HPCA), San Antonio, TX, February 2011.
N. Hardavellas. Exploiting Dark Silicon for Energy Efficiency. NSF Workshop on Sustainable Energy-Efficient Data Management (NSF SEEDM), National Science Foundation, Arlington, VA, USA, May 2011.
N. Hardavellas, M. Ferdman, B. Falsafi and A. Ailamaki. Near-Optimal Cache Block Placement with Reactive Nonuniform Cache Architectures. IEEE Micro, Vol. 30(1), pp. 20-28, January/February 2010. IEEE Micro Top Picks from Computer Architecture Conferences.
I. Pandis, R. Johnson, N. Hardavellas and A. Ailamaki. Data-Oriented Transaction Execution. In Proceedings of the VLDB Endowment (PVLDB), Vol. 3(1), pp. 928-939, August 2010.
Y. Pan, Y. Demir, N. Hardavellas, J. Kim, and G. Memik. Exploring Benefits and Designs of Optically-Connected Disintegrated Processor Architecture. Workshop on the Interaction between Nanophotonic Devices and Systems (WINDS) co-located with the 43rd International Symposium on Microarchitecture (MICRO), Atlanta, GA, December 2010.
I. Pandis, R. Johnson, N. Hardavellas, and A. Ailamaki. Data-Oriented Transaction Execution. In Proceedings of the 9th Hellenic Data Management Symposium (HDMS), Ayia Napa, Cyprus, July 2010.
N. Hardavellas, M. Ferdman, A. Ailamaki, and B. Falsafi. The Path Forward: Specialized Computing in the Datacenter. 2nd Workshop on Architectural Considerations for Large Datacenters (ACLD), co-located with the 37th ACM/IEEE Annual International Symposium on Computer Architecture (ISCA), Saint-Malo, France, June 2010.
N. Hardavellas, M. Ferdman, B. Falsafi and A. Ailamaki. Reactive NUCA: Near-Optimal Block Placement and Replication in Distributed Caches. In Proceedings of the 36th ACM/IEEE Annual International Symposium on Computer Architecture (ISCA), pp. 184–195, Austin, TX, June 2009.
R. Johnson, I. Pandis, N. Hardavellas, A. Ailamaki, and B. Falsafi. Shore-MT: A Scalable Storage Manager for the Multicore Era. In Proceedings of the 12th International Conference on Extending Database Technology (EDBT), pp. 24–35, Saint-Petersburg, Russia, March 2009.
R. Johnson, N. Hardavellas, I. Pandis, N. Mancheril, S. Harizopoulos, K. Sabirli, A. Ailamaki, and B. Falsafi. To Share Or Not To Share? 7th Hellenic Data Management Symposium (HDMS), Heraklion, Crete, Greece, July 2008.
J. Kim, N. Hardavellas, K. Mai, B. Falsafi, and J. C. Hoe. Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding. In Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), pp. 197–209, Chicago, IL, December 2007.
R. Johnson, N. Hardavellas, I. Pandis, N. Mancheril, S. Harizopoulos, K. Sabirli, A. Ailamaki, and B. Falsafi. To Share Or Not To Share? In Proceedings of the 33rd International Conference on Very Large Data Bases (VLDB), pp. 351–362, Vienna, Austria, September 2007.
N. Hardavellas, I. Pandis, R. Johnson, N. Mancheril, S. Harizopoulos, A. Ailamaki, and B. Falsafi. An Analysis of Database System Performance on Chip Multiprocessors. In Proceedings of the 6th Hellenic Data Management Symposium (HDMS), Athens, Greece, July 2007.
S. Chen, P. B. Gibbons, M. Kozuch, V. Liaskovitis, A. Ailamaki, G. E. Blelloch, B. Falsafi, L. Fix, N. Hardavellas, T. C. Mowry, and C. Wilkerson. Scheduling Threads for Constructive Cache Sharing on CMPs. In Proceedings of the 19th Annual ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), pp. 105–115, San Diego, CA, June 2007.
N. Hardavellas, I. Pandis, R. Johnson, N. Mancheril, A. Ailamaki, and B. Falsafi. Database Servers on Chip Multiprocessors: Limitations and Opportunities. In Proceedigs offf the 3rd Biennial Conference on Innovative Data Systems Research (CIDR), pp. 79–87, Asilomar, CA, January 2007.
D. Dash, K. Gao, N. Hardavellas, S. Harizopoulos, R. Johnson, N. Mancheril, I. Pandis, V. Shkapenyuk, and A. Ailamaki. Simultaneous Pipelining in QPipe: Exploiting Work Sharing Opportunities Across Queries. In Proceedingsof the 22nd International Conference on Data Engineering (ICDE), Atlanta, GA, April 2006. Best Demonstration Award.
V. Liaskovitis, S. Chen, P. B. Gibbons, A. Ailamaki, G. E. Blelloch, B. Falsafi, L. Fix, N. Hardavellas, M. Kozuch, T. C. Mowry, and C. Wilkerson. Parallel Depth First vs. Work Stealing Schedulers on CMP Architectures. In Proceedings of the 18th Annual ACM International Symposium on Parallelism in Algorithms and Architectures (SPAA), pp. 330, Cambridge, MA, August 2006.
T. F. Wenisch, S. Somogyi, N. Hardavellas, J. Kim, C. Gniady, A. Ailamaki, and B. Falsafi. Store-Ordered Streaming of Shared Memory. In Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT), pp. 75–86, Saint Louis, MO, September 2005.
T. F. Wenisch, S. Somogyi, N. Hardavellas, J. Kim, A. Ailamaki, and B. Falsafi. Temporal Streaming of Shared Memory. In Proceedings of the 32nd ACM/IEEE Annual International Symposium on Computer Architecture (ISCA), pp. 222–233, Madison, WI, June 2005.
N. Hardavellas, S. Somogyi, T. F. Wenisch, R. E. Wunderlich, S. Chen, J. Kim, B. Falsafi, J. C. Hoe, and A. Nowatzyk. SimFlex: a Fast, Accurate, Flexible Full-System Simulation Framework for Performance Evaluation of Server Architecture. ACM SIGMETRICS Performance Evaluation Review (PER) Special Issue on Tools for Computer Architecture Research, Vol. 31(4), pp. 31–35, March 2004.
S. Somogyi, T. F. Wenisch, N. Hardavellas, J. Kim, A. Ailamaki, and B. Falsafi. Memory Coherence Activity Prediction in Commercial Workloads. In Proceedings of the 3rd Workshop on Memory Performance Issues (WMPI), pp. 37–45, Munich, Germany, June 2004.
S. Dwarkadas, N. Hardavellas, L. Kontothanassis, R. Nikhil, and R. Stets. Cashmere-VLM: Remote Memory Paging for Software Distributed Shared Memory. In Proceedings of the 13th IEEE/ACM International Parallel Processing Symposium (IPPS), pp. 153–159, San Juan, Puerto Rico, April 1999.
N. Hardavellas, L. Kontothanassis, R. Nikhil, and R. J. Stets. Software Cache Coherence with Memory Scaling. In Proceedings of the 7th Workshop on Scalable Shared Memory Multiprocessors (SSMM), Barcelona, Spain, June 1998.
W. Meira Jr., T. J. LeBlanc, N. Hardavellas, and C. Amorim. Understanding the Performance of DSM Applications. In Proceedings of Communication and Architectural Support for Network-Based Parallel Computing (CANPC), D. Panda and C. Stunkel Eds., Lecture Notes in Computer Science, Vol. 1199/1997, pp. 198–211, Springer Berlin/Heidelberg, February 1997.
R. J. Stets, S. Dwarkadas, N. Hardavellas, G. C. Hunt, L. Kontothanassis, S. Parthasarathy, and M. L. Scott. Cashmere-2L: Software Coherent Shared Memory on a Clustered Remote-Write Network. In Proceedings of the 16th ACM Symposium on Operating Systems Principles (SOSP), pp. 170–183, Saint Malo, France, October 1997.
L. Kontothanassis, G. C. Hunt, R. J. Stets, N. Hardavellas, M. Cierniak, S. Parthasarathy, W. Meira Jr., S. Dwarkadas, and M. L. Scott. VM-Based Shared Memory on Low-Latency, Remote-Memory-Access Networks. In Proceedings of the 24th ACM/IEEE Annual International Symposium on Computer Architecture (ISCA), pp. 157–169, Denver, CO, June 1997.
N. Hardavellas, G. C. Hunt, S. Ioannidis, R. J. Stets, S. Dwarkadas, L. Kontothanassis, and M. L. Scott. Efficient Use of Memory Mapped Interfaces for Shared Memory Computing. In IEEE CS Technical Committee on Computer Architecture (TCCA) Special Issue on Distributed Shared Memory, pp. 28–33, March 1997.
M. L. Scott, W. Li, L. Kontothanassis, G. C. Hunt, M. Michael, R. J. Stets, N. Hardavellas, W. Meira Jr., A. Poulos, M. Cierniak, S. Parthasarathy, and M. Zaki. The Implementation of Cashmere. In Proceedings of the 6th Workshop on Scalable Shared Memory Multiprocessors (SSMM), Boston, MA, October 1996.
C. Busch, N. Hardavellas, and M. Mavronicolas. Contention in Counting Networks. In Proceedings of the 13th ACM Annual Symposium on Principles of Distributed Computing (PODC), Los Angeles, CA, August 1994.
N. Hardavellas, D. Karakos, and M. Mavronicolas. Notes on Sorting and Counting Networks. Distributed Algorithms (WDAG), A. Schiper Ed., Lecture Notes in Computer Science, Vol. 725/1993, pp. 234–248, Springer Berlin/Heidelberg, September 1993.

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