Patent Abstract:
In a semiconductor apparatus, a plurality of semiconductor chips including through-silicon vias are stacked in a vertical direction, wherein the through-silicon via formed in each semiconductor chip protrudes beyond heights of each semiconductor chip.

Full Description:
CROSS-REFERENCES TO RELATED APPLICATION 
     The present application claims priority under 35 U.S.C. §119(a) to Korean application number 10-2011-0146442, filed on Dec. 29, 2011, in the Korean Intellectual Property Office, which is incorporated herein by reference in its entirety as set forth in full. 
     BACKGROUND 
     1. Technical Field 
     The present invention relates to a semiconductor apparatus, and more particularly, to a semiconductor apparatus including a plurality of stacked semiconductor chips and a method of fabricating the same. 
     2. Related Art 
     In general, with the high integration of a semiconductor product, there has been proposed a semiconductor apparatus having a structure in which a plurality of semiconductor chips are three-dimensionally stacked. 
     According to the semiconductor apparatus having the stack structure, since the semiconductor chips are stacked through a simple process, it is possible to improve the performance of the semiconductor apparatus, reduce fabrication cost, and facilitate mass production. However, as the number of semiconductor chips stacked is increased and the size is increased, interconnection space for electrical connections in the semiconductor apparatus is not sufficient. 
     In this regard, as an example of a stack package, a structure using a through-silicon via has been proposed. 
     In a semiconductor apparatus using the through-silicon via, through-silicon vias are formed in a plurality of semiconductor chips, and the semiconductor chips are physically and electrically stack-connected using the through-silicon vias. 
     In the general semiconductor apparatus using the through-silicon via, the semiconductor chips may be connected to one another as follows. 
       FIG. 1  is a diagram illustrating a part of a general semiconductor apparatus using a through-silicon via. 
     Referring to  FIG. 1 , the general semiconductor apparatus using a through-silicon via includes a first semiconductor chip  110  in which a through-silicon via  111  and a first bump  113  have been formed, a second semiconductor chip  130  in which a through-silicon via  131  and a second bump  133  have been formed, and a connection unit  120  formed of a conductive material, such as a solder ball  121 , for electrically connecting the first semiconductor chip  110  to the second semiconductor chip  130 . 
     In the general semiconductor apparatus using the through-silicon via, the through-silicon via  111  of the first semiconductor chip  110 , the first bump  113 , the solder ball  121 , and the second bump  133  are connected to one another. Reference numerals  112 ,  123  (not mentioned), and  132  denote insulation layers. 
     However, in the general semiconductor apparatus using the through-silicon via, a bonding defect may occur in a bonding surface between a bump  122  of the connection unit  120  and the through-silicon via  131  of the second semiconductor chip  130  due to stresses (for example, temperature or pressure) generated in a semiconductor chip stack process. 
     SUMMARY 
     A semiconductor apparatus and a method of fabricating the same, capable of improving a yield by modifying a bonding surface of a semiconductor chip in a stack structure of a plurality of semiconductor chips to reduce a defect of a semiconductor apparatus, are described herein. 
     In one embodiment of the present invention, a semiconductor apparatus includes a plurality of semiconductor chips including through-silicon vias stacked in a vertical direction, wherein a the through-silicon via formed in each semiconductor chip protrudes beyond heights of each semiconductor chip. 
     In one embodiment of the present invention, a semiconductor apparatus includes: a first semiconductor chip including a first through-silicon via; a second semiconductor chip including a second through-silicon via; and a conductive connection member interposed between the first semiconductor chip and the second semiconductor chip in order to stack the first semiconductor chip and the second semiconductor chip, wherein the first semiconductor chip and the second semiconductor chip are formed with concave-convex sections, respectively. 
     In one embodiment of the present invention, a semiconductor apparatus includes: a first semiconductor chip including a first through-silicon via; a second semiconductor chip including a second through-silicon via; and a conductive connection member interposed between the first semiconductor chip and the second semiconductor chip in order to stack the first semiconductor chip and the second semiconductor chip, wherein the first through-silicon via and the second through-silicon via protrude on a basis of heights of the first semiconductor chip and the second semiconductor chip, respectively. 
     In one embodiment of the present invention, a method of fabricating a semiconductor apparatus includes the steps of: forming a first semiconductor chip including a first through-silicon via; forming a second semiconductor chip including a second through-silicon via; and forming a conductive connection member between the first semiconductor chip and the second semiconductor chip such that the first semiconductor chip and the second semiconductor chip are stacked in a vertical direction, wherein the first through-silicon via and the second through-silicon via protrude beyond heights of the first semiconductor chip and the second semiconductor chip, respectively. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Features, aspects, and embodiments are described in conjunction with the attached drawings, in which: 
         FIG. 1  is a diagram illustrating a part of a general semiconductor apparatus using a through-silicon via; 
         FIG. 2  is a diagram illustrating a part of a semiconductor apparatus using a through-silicon via according to an embodiment; 
         FIGS. 3 to 10  are diagrams illustrating a fabricating method of a semiconductor apparatus according to an embodiment; and 
         FIG. 11  is a diagram illustrating a part of a semiconductor apparatus according to another embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Hereinafter, a semiconductor apparatus and a method of fabricating the same according to the present invention will be described in detail with reference to the accompanying drawings through various embodiments. 
       FIG. 2  is a diagram illustrating a part of a semiconductor apparatus according to an embodiment. 
     Referring to  FIG. 2 , a semiconductor apparatus according to the embodiment includes a first semiconductor chip  200 , a second semiconductor chip  300 , and a conductive connection member  400  for connecting the first semiconductor chip  200  to the second semiconductor chip  300 . 
     The first semiconductor chip  200  includes a first through-silicon via  230  for an electrical connection to another semiconductor chip (not illustrated) stacked on a first semiconductor substrate  210 , an insulation layer  220  formed at both sides of the first through-silicon via  230  to insulate the first through-silicon via  230 , and a first bump  250  for an electrical connection to the first through-silicon via  230 . The first semiconductor chip  200  is formed such that the first through-silicon via  230  protrudes beyond the insulation layer  220 . That is, the first semiconductor chip  200  has a convex section because the height of the first through-silicon via  230  is higher than the height of the first semiconductor chip  200 . However, the first through-silicon via  230  may be formed to have a concave shape as illustrated in  FIG. 11 . Here, the first through-silicon via  230  may be formed of a copper (Cu) layer, and a reference numeral  240  denotes an insulation layer, wherein the insulation layer  240  may be formed is of oxide. 
     The second semiconductor chip  300  includes a second through-silicon via  330  for an electrical connection to the first semiconductor chip  200 , an insulation layer  320  formed at both sides of the second through-silicon via  330  to insulate the second through-silicon via  330 , and a second bump  350  for electrically connecting to the second through-silicon via  330  to a semiconductor chip (not illustrated) subsequently stacked. The insulation layer  320  may be formed of oxide. Similarly to the first semiconductor chip  200 , the second through-silicon via  330  formed in second semiconductor chip  300  protrudes beyond the insulation layer  320 . That is, similarly to the first semiconductor chip  200 , the second semiconductor chip  300  has a convex section because the height of the second through-silicon via  330  is higher than the height of the second semiconductor chip  300 . However, the second through-silicon via  330  may be formed to have a concave shape as illustrated in  FIG. 11 . Here, a reference numeral  340  denotes an insulation layer, wherein the insulation layer  340  may be formed of oxide. 
     The conductive connection member  400  is for connecting the first semiconductor chip  200  to the second semiconductor chip  300  in a flip-chip manner, and denotes a kind of solder ball. The conductive connection member  400  is formed to surround a part of the second through-silicon via  330  protruding from the second semiconductor chip  300 . 
     In the semiconductor apparatus according to the embodiment as described above, a metal line provided in each semiconductor chip is not illustrated. However, it should be noted that the metal line is provided between the through-silicon via and the bump of each semiconductor chip. 
     Unlike the conventional art, in the semiconductor apparatus according to the embodiment as described above, the first semiconductor chip  200  is connected to the second semiconductor chip  300  using only the conductive connection member  400 , so that a defect is substantially prevented from occurring in a bonding surface between semiconductor chips, that is, a bonding surface between a bump and a through-silicon via in the conventional art, resulting in an increase in the yield of the semiconductor apparatus. 
     Furthermore, since the first semiconductor chip  200  is connected to the second semiconductor chip  300  using only the conductive connection member  400 , a connection defect between the semiconductor chip and the conductive connection member is substantially prevented by allowing the through-silicon via to protrude beyond the semiconductor chip. 
     A fabricating method of the semiconductor apparatus according to the embodiment will be described below. 
       FIGS. 3 to 10  are diagrams illustrating a fabricating method of the semiconductor apparatus according to the embodiment. 
     As illustrated in  FIG. 3 , a hole  321  for forming a through-silicon via is formed in a silicon substrate  310  formed of silicon Si. 
     As illustrated in  FIG. 4 , a first insulation layer  320  is formed in the hole  321  and on the surface of the silicon substrate  310 . 
     As illustrated in  FIG. 5 , the first insulation layer  320  is etched such that the first insulation layer  320  is filled only at both sidewalls and the bottom of the hole  321 , and a conductive metal is filled in the hole  321  to form a through-silicon via  330 . The through-silicon via  330  may be formed by depositing a copper (Cu) layer, wherein the deposition of the copper (Cu) layer may be performed using an electroplating method. 
     As illustrated in  FIG. 6 , a second insulation layer  340  is formed on the silicon substrate  310  including the through-silicon via  330 . 
     As illustrated in  FIG. 7 , in order to form a bump for signal exchange with another semiconductor chip to be stacked, the second insulation layer  340  is etched to form a bump hole  341 . The bump hole  341  is etched such that the through-silicon via  330  is exposed. In the embodiment, the bump hole  341  is etched in a T shape or a 180°-rotated T shape. However, the present invention is not limited thereto. For example, the bump hole  341  may be formed to have a width narrower than that of the through-silicon via  330 . 
     As illustrated in  FIG. 8 , a conductive metal is filled in the bump hole  341  such that a signal is transferred, so that a bump  350  is formed. 
     As illustrated in  FIG. 9 , the back surface of the silicon substrate  310  is back-grinded until the through-silicon via  330  is exposed. When the through-silicon via  330  is exposed, the silicon substrate  310  is further etched such that the through-silicon via  330  protrudes beyond the silicon substrate  310 . This is for substantially preventing a connection defect which may occur between a conductive connection member for a connection to a subsequent semiconductor chip and the through-silicon via  330 . 
     As illustrated in  FIG. 10 , in order to stack the first semiconductor chip  200  and the second semiconductor chip  300  completed as above, the conductive connection member  400  such as a solder ball is formed to surround the protruding through-silicon via  330 , so that the semiconductor apparatus according to the embodiment is completed. 
     In the semiconductor apparatus and the fabricating method thereof according to the embodiment, from the conventional structure of the first bump-the conductive connection member  400  such as a solder ball-the second bump  350 -the through-silicon via  330 , the first bump is removed, and the conductive connection member  400  and the through-silicon via  230  or the second bump  350  are directly connected to each other, so that a connection defect between the bump and the through-silicon via  230  is solved, resulting in the improvement of the yield of the semiconductor apparatus. 
     Furthermore, in the semiconductor apparatus and the fabricating method thereof according to the embodiment, the through-silicon via  330  protrudes beyond the semiconductor chip  300 , so that a connection defect, which may occur between the through-silicon via  330  and the conductive connection member  400 , is substantially prevented, resulting in the improvement of the reliability of the semiconductor apparatus. 
     Furthermore, in the semiconductor apparatus and the fabricating method thereof according to the embodiment, from the conventional structure of the first bump-the conductive connection member  400  such as a solder ball-the second bump  350 -the through-silicon via  330 , the first bump is removed, so that a semiconductor fabrication process is simplified, resulting in a reduction of a fabrication cost of the semiconductor apparatus. 
     While certain embodiments have been described above, it will be understood to those skilled in the art that the embodiments described are by way of example only. Accordingly, the semiconductor apparatus and the method of fabricating the same described herein should not be limited based on the described embodiments. Rather, the semiconductor apparatus and the method of fabricating the same described herein should only be limited in light of the claims that follow when taken in conjunction with the above description and accompanying drawings.

Technology Classification (CPC): 7