Patent Abstract:
A method tests peripheral component interconnect express (PCI-E) switches. A second PCI-E switch to be tested electronically connects to a first PCI-E switch of a computing device. A first data packet is created by the computing device and sent from the first PCI-E switch to the second PCI-E switch. A second data packet sent back by the second PCI-E switch is received by the computing device. The second PCI-E switch works normally if the first data packet is identical to the second data packet. The second PCI-E switch does not work normally if the first data packet is not identical to the second data packet.

Full Description:
BACKGROUND 
       [0001]    1. Technical Field 
         [0002]    Embodiments of the present disclosure relate generally to switch testing, and more particularly, to a system and method for testing a peripheral component interconnect express (PCI-E) switch of a computing device. 
         [0003]    2. Description of Related Art 
         [0004]    PCI-E switches are used in computing devices, and the operating ability of the PCI-E switches must be tested. Usually, a PCI-E switch is tested using a circuit tester (ICT) or a flying probe. Because the ICT and the flying probe test are both open circuit tests, it is difficult and inconvenient to test the data transmission function of the PCI-E switch, so what is needed is a test method that overcomes the limitations described. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0005]      FIG. 1  is a block diagram of one embodiment of a computing device including a test system for testing a PCI-E switch. 
           [0006]      FIG. 2  is a block diagram of one embodiment of the functional modules of the test system included in the computing device of  FIG. 1 . 
           [0007]      FIG. 3  is a flowchart of one embodiment of a method for testing a PCI-E switch using the test system of  FIG. 1 . 
       
    
    
     DETAILED DESCRIPTION 
       [0008]    The disclosure, including the accompanying drawings, is illustrated by way of example and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one. 
         [0009]      FIG. 1  is a block diagram of one embodiment of a computing device  1  including a test system  100 . In the embodiment, the computing device  1  further includes a storage system  10 , a first motherboard  11 , at least one processor  12  and a monitor  13 . The first motherboard  11  includes a first PCI-E switch  110  that electronically connects to a second PCI-E switch  20  to be tested on a second motherboard  2 . The test system  100  can test the data transmission function of the second PCI-E switch  20 . The monitor  13  displays a test result of the second PCI-E switch  20 . In one embodiment, the computing device  1  may be a desktop computer, a notebook computer, a server, a workstation or other. It should be apparent that  FIG. 1  is just one example of the computing device  1  that can be included with more or fewer components than shown in other embodiments, or a different configuration of the various components. 
         [0010]    The storage system  10  stores one or more programs, such as an operating system, and other applications of the computing device  1 . In one embodiment, the storage system  10  may be random access memory (RAM) for temporary storage of information, and/or a read only memory (ROM) for permanent storage of information. In other embodiments, the storage system  10  may also be an external storage device, such as a hard disk, a storage card, or a data storage medium. The at least one processor  12  executes computerized operations of the computing device  1  and other applications, to provide functions of the computing device  1 . 
         [0011]      FIG. 2  is a block diagram of one embodiment of the functional modules of the test system  100  included in the computing device  1  of  FIG. 1 . The test system  100  may include a plurality of functional modules each comprising one or more programs or independent code and which can be accessed and executed by the at least one processor  12 . In one embodiment, the test system  10  includes a creation module  101 , a sending module  102 , a receiving module  103 , a comparison module  104 , and a display module  105 . In general, the word “module”, as used herein, refers to logic embodied in hardware or firmware, or to a collection of software instructions, written in a programming language, such as, Java, C, or assembly. One or more software instructions in the modules may be embedded in firmware, such as EPROM. The modules described herein may be implemented as either software and/or hardware modules and may be stored in any type of non-transitory computer-readable medium or other storage device. Some non-limiting examples of non-transitory computer-readable media include CDs, DVDs, BLU-RAY, flash memory, and hard disk drives. 
         [0012]    Prior to testing, the second PCI-E switch  20  should be put into a loopback mode, which in this embodiment may be defined as a mode for the exchange of data between the first PCI-E switch  110  and the second PCI-E switch  20 . In the loopback mode, the second PCI-E switch  20  returns the data packets to the first PCI-E switch  110  when the second PCI-E switch  20  receives data packets from the first PCI-E switch  110 . Putting the second PCI-E switch  20  into the loopback mode can be done writing a loopback instruction to a register of the second PCI-E switch  20 . 
         [0013]    The creation module  101  is operable to create a first data packet using a plurality of formatted data. The first data packet consists of the formatted data that can be transmitted between the first PCI-E switch  110  and the second PCI-E switch  20 . 
         [0014]    The sending module  102  is operable to send the first data packet from the first PCI-E switch  110  to the second PCI-E switch  20 . After the second PCI-E switch  20  receives the first data packet, the second PCI-E switch  20  generates a second data packet based on the first data packet, and sends back the second data packet to the first PCI-E switch  110 . 
         [0015]    The receiving module  103  is operable to receive the second data packet sent back by the second PCI-E switch  20 . 
         [0016]    The comparison module  104  is operable to compare the first data packet with the second data packet to generate a test result of the second PCI-E switch  20 . 
         [0017]    The display module  105  is operable to display the test result of the second PCI-E switch  20  on the monitor  13 . If the first data packet is identical to the second data packet, the display module  105  activates the monitor  13  to display information indicating that the second PCI-E switch  20  works normally. If the first data packet is not identical to the second data packet, the display module  105  activates the monitor  13  to display an error code indicating that the second PCI-E switch  20  does not work normally. 
         [0018]      FIG. 3  is a flowchart of one embodiment of a method for testing a PCI-E switch using the test system  100  of  FIG. 1 . Depending on the embodiment, additional blocks may be added, others removed, and the ordering of the blocks may be changed. 
         [0019]    In the embodiment, the second PCI-E switch  20  of the second motherboard  2  is to be tested, and is electronically connected to the first PCI-E switch  110  of the first motherboard  11 . Before testing, the second PCI-E switch  20  is put into the loopback mode, and as described above, the loopback mode is defined as a mode for the exchange of data between the first PCI-E switch  110  and the second PCI-E switch  20 . 
         [0020]    In block S 100 , the creation module  101  creates a first data packet (which can be exchanged between the first PCI-E switch  110  and the second PCI-E switch  20 ) using a plurality of formatted data. 
         [0021]    In block S 102 , the sending module  102  sends the first data packet from the first PCI-E switch  110  to the second PCI-E switch  20 . After the second PCI-E switch  20  receives the first data packet, the second PCI-E switch  20  generates a second data packet based on the first data packet, and sends back the second data packet to the first PCI-E switch  110 . 
         [0022]    In block S 104 , the receiving module  103  receives the second data packet sent back by the second PCI-E switch  20 . 
         [0023]    In block S 106 , the comparison module  104  compares the first data packet with the second data packet. If the first data packet is not identical to the second data packet, block S 108  is implemented. If the first data packet is identical to the second data packet, block S 110  is implemented. 
         [0024]    In block S 108 , the display module  105  activates the monitor  13  to display an error code indicating that the second PCI-E switch  20  does not work normally. In block S 110 , the display module  105  activates the monitor  13  to display information indicating that the second PCI-E switch  20  works normally. 
         [0025]    Although certain embodiments of the present disclosure have been specifically described, the present disclosure is not to be construed as being limited thereto. Various changes or modifications may be made to the present disclosure without departing from the scope and spirit of the present disclosure.

Technology Classification (CPC): 6