Patent Abstract:
An optical sensing circuit is provided with a light detector, a voltage to current conversion circuit connected to the light detector, and a comparator. The voltage to current conversion circuit includes an electric resistor and a current mirror circuit connected in parallel to the resistor. The voltage to current conversion circuit increases an electric current flowing through the circuit as a voltage of the output of the light detector decreases. The comparator compares the voltage of the output of the light detector with a reference voltage.

Full Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
   This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. P2002-051979, filed on Feb. 27, 2002; the entire contents of which are incorporated herein by reference. 
   FIELD OF THE INVENTION 
   The present invention relates to an optical sensing circuit, and more particularly, to a circuit suitable for producing a signal used for detecting a moving amount and a moving direction in a pointing device referred to as a so-called mouse in a computer. 
   BACKGROUND OF THE INVENTION 
     FIG. 1  shows a constitution of a conventional optical sensing circuit used for a pointing device. A circuit XCT  100  is provided for producing an X signal indicating a moving amount in an X direction and a moving direction, and a circuit YCT  100  is provided for producing a Y signal indicating a moving amount in a Y direction and a moving direction. 
   Between a power supply voltage VCC terminal and a ground voltage VSS terminal, a resistor RLED, a light emitting diode (LED) XLED for producing the X signal contained in the circuit XCT  100 , and a LED YLED for producing the Y signal contained in the circuit YCT  100  are connected in series in order to reduce the amount of current. 
   In the circuit XCT  100 , two signal producing paths are set up in parallel as a circuit of a photo receiving side. As a first path, a phototransistor X 1 PT and a resistor X 1 R are connected in series between the power supply voltage VCC terminal and the ground voltage VSS terminal, and a node X 1  between the phototransistor X 1 PT and the resistor X 1 R is connected to one input terminal of a comparator X 1 COMP. 
   As a second path, a phototransistor X 2 PT and a resistor X 2 R are connected in series between the power supply voltage VCC terminal and the ground voltage VSS terminal, and a node X 2  between the phototransistor X 2 PT and the resistor X 2 R is connected to one input terminal of a comparator X 2 COMP. Reference voltage Vref is applied to the other input terminal of each of the comparators X 1 COMP, X 2 COMP. 
   A rotary slit XSLT is arranged between the LED XLED and the phototransistors X 1 PT, X 2 PT. This rotary slit XSLT is rotated in accordance with movement of the pointing device in an X direction, and transmits light emitted from the LED XLED to the phototransistors X 1 PT, X 2 PT, or interrupts it. Here, in the phototransistors X 1 PT, X 2 PT, current flow is varied in accordance with the amount of received light, and voltage at the nodes X 1 , X 2  is accordingly varied. The phototransistor X 1 PT is oriented at predetermined angle relative to the phototransistor X 2 PT, and voltage waveforms at the nodes X 1 , X 2  have an about 90 degrees phase difference from each other. 
   Because of the foregoing constitution, the circuit XCT  100  operates as follows. When the pointing device moves in the X direction, the rotary slit XSLT is rotated in accordance with a moving amount and a moving direction thereof, and the amounts of light received at the phototransistors X 1 PT, X 2 PT are varied, and currents flowing in X 1 PT, X 2 PT are also varied. These variations of currents are converted into voltages by the resistors X 1 R, X 2 R, extracted as voltage signals from the nodes X 1 , X 2 , and applied to the comparators X 1 COM, X 2 COM, respectively. 
   In the comparator X 1 COMP, the voltage V (X 1 ) at the node X 1  is compared with the reference voltage Vref. A low level voltage is outputted when the voltage V (X 1 ) is below the reference voltage Vref, and a high level voltage is outputted when it is not less than the reference voltage Vref. Similarly, in the comparator X 2 COMP, the voltage V (X 2 ) at the node X 2  is compared with the reference voltage Vref. A low level voltage is outputted when the voltage V (X 2 ) is below the reference voltage Vref, and a high level voltage is outputted when it is not less than the reference voltage Vref. Thus, the rotation of the rotary slit XSLT, that is, how far the pointing device moves in the X direction, is detected with the pulse output from the comparator X 1 COMP. Additionally, because of the phase difference between the signals X 1 , X 2  as described above, a moving direction can also be detected. 
   The circuit YCT  100  also has a constitution for receiving light from the LED YLED similar to that of the circuit XCT  100 . Specifically, the circuit YCT  100  comprises the rotary slit YSLT, phototransistors Y 1 PT, Y 2 PT, resistors Y 1 R, Y 2 R, and comparators Y 1 COMP, Y 2 COMP, and operates similar to the circuit XCT  100 . Thus, explanation thereof will be omitted. 
   However, the following problems have been inherent in such a conventional optical sensing circuit. 
     FIG. 2A  shows respective voltages V (X 1 ), V (X 2 ) at the nodes X 1 , X 2 . Further,  FIG. 2B  shows output waveforms of the comparators X 1 COMP, X 2 COMP when a threshold (=reference voltage Vref) of the comparators X 1 COMP, X 2 COMP is Vth 1  shown in  FIG. 2A .  FIG. 2C  shows output waveforms of the comparators X 1 COMP, X 2 COMP when a threshold of the comparators X 1 COMP, X 2 COMP is Vth 2  shown in  FIG. 2A . 
   To identify a rotational direction of the rotary slit XSLT, the threshold voltage Vth must be in a range between upper and lower points C 1 , C 2  at which the waveforms of the voltages V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  intersect each other. 
   As the threshold Vth 1  ranges between the points C 1 , C 2 , for the outputs of the comparators X 1 COMP, X 2 COMP, there are an overlapping period  10   a  of high levels and an overlapping period  10   b  of low levels as shown in  FIG. 2B . In such a case, it is possible to identify the rotational direction of the rotary slit XSLT. For example, in the period  10   b  where both outputs are low, the output of the comparator X 1 COMP first rises to a high level, whereby the rotational direction can be detected. 
   However, if the threshold voltage Vth is at the intersection point C 1  as in the case of a threshold Vth 2 , or above the point C 1 , as shown in  FIG. 2C , there is an overlapping period  12   b  of low levels while there is no overlapping period  12   a  of high levels. In such a case, it is impossible to identify the rotational direction of the rotary slit XSLT. 
   If output characteristics or light intensity of the LED is higher than those shown in  FIG. 2A , or sensitivity of the phototransistor is higher, the voltages V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  respectively become similar to those shown in  FIG. 3A .  FIG. 3B  shows respective output waveforms of the comparators X 1 COMP, X 2 COMP when threshold of the comparators X 1 COMP, X 2 COMP is Vth 3  shown in  FIG. 3A  in this case.  FIG. 3C  shows respective output waveforms of the comparators X 1 COMP, X 2 COMP when threshold of the comparators X 1 COMP, X 2 COMP is Vth 4  shown in  FIG. 3A . 
   As the threshold Vth 3  ranges between points C 3 , C 4  at which the waveforms of the voltages V (X 1 ), V (X 2 ) intersect each other, for outputs of the comparators X 1 COM, X 2 COMP, as shown in  FIG. 2B , there are an overlapping period  20   a  of high levels and an overlapping period  20   b  of low levels. Thus, it is possible to identify the rotational direction of the rotary slit XSLT. 
   However, if the threshold voltage Vth is at the point C 4  of waveform intersection as in the case of a threshold Vth 4 , or below the point C 4 , as shown in  FIG. 3C , there is an overlapping period  22   a  of high levels, while there is no overlapping period  22   b  of low levels. Also in such a case, it is impossible to identify the rotational direction of the rotary slit XSLT. 
   Normally, the LED or the phototransistor used for the pointing device greatly varies in light intensity or receiving sensitivity even under the same conditions. Accordingly, the respective elements are classified into several ranks and, in accordance with the rank, a value of the resistor RLED or values of the resistors X 1 R, X 2 R are adjusted for a normal operation. 
   However, there is still some variation even among the elements classified into the same rank. Therefore, the distance between the LED and the rotary slit or between the phototransistor and the rotary slit must be adjusted at the end. 
   Accordingly, if the light intensity emitted from the LED or the receiving sensitivity of the phototransistor is low as shown in  FIG. 2A , or if the light intensity emitted from the LED or the receiving sensitivity of the phototransistor is high as shown in  FIG. 3A , it may be difficult to set the threshold of the comparators within the range between the upper and lower points at which the waveforms of the output voltages V (X 1 ), V (X 2 ) of the phototransistors intersect each other. 
   Additionally, if the light intensity emitted from the LED or the receiving sensitivity of the phototransistor is high, as shown in  FIG. 3A , the minimum voltage level of the waveforms of the voltages V (X 1 ), V (X 2 ) are considerably higher than the ground voltage VSS. For this reason, the case in which the light emitted from the LED is not interrupted by the rotary slit completely and thus received by the phototransistor, or light reflected on a portion other than the rotary slit is received by the phototransistor, or the like may often occur. If measures taken to counter such a phenomenon depend on mechanical structures or arrangements of the LED, the rotary slit and the phototransistors, the cost of the pointing device itself may be increased. 
   BRIEF SUMMARY OF THE INVENTION 
   An optical sensing circuit according to an embodiment of the present invention comprising: 
   a voltage to current conversion circuit to be connected between a output terminal of a light detector, which terminal output a voltage in accordance with the amount of detected light from a light source, and a second power supply terminal, configured to lower the voltage at the output terminal at by increasing a value of current flowing from the output terminal to the second power supply terminal as the voltage at the output terminal is lowered, and 
   a comparator circuit configured to compare the voltage at the output terminal with a reference voltage, and to output a signal in accordance with a result of the comparison. 
   A pointing device according to an embodiment of the present invention comprising: 
   a first optical sensing circuit configured to produce a signal indicating a moving amount and a moving distance in a first direction, and 
   a second optical sensing circuit configured to produce a signal indicating a moving amount and a moving distance in a second direction different from the first direction, 
   each of the first and second optical sensing circuits, comprises 
   a light source; 
   a first light detector connected between a first power supply terminal and a second power supply terminal, configured to output a first voltage to a first output terminal in accordance with the amount of detected light from the light source; 
   a second light detector configured to output a second voltage to a second output terminal in accordance with the amount of detected light from the light source, the second voltage having a relative 90 degrees phase difference from the first voltage; 
   a rotary slit arranged between the light source and the first and second light detector, configured to rotate in accordance with a movement of the pointing device in the first direction or the second direction and to pass or interrupt the light from the light source to the first and second light detectors; 
   a first voltage to current conversion circuit configured to lower the voltage at the first output terminal by increasing a value of current flowing from the first output terminal as the voltage at the first output terminal is lowered; 
   a second voltage to current conversion circuit configured to lower the voltage at the second output terminal by increasing a value of current flowing from the second output terminal as the voltage at the second output terminal is lowered; 
   a first comparator circuit configured to compare the voltage at the first output terminal with a reference voltage, and to output a first signal in accordance with a result of the comparison; and 
   a second comparator circuit configured to compare the voltage at the second output terminal with the reference voltage, and to output a second signal in accordance with a result of the comparison. 
   An optical sensing circuit according to an embodiment of the present invention comprising: 
   a voltage to current conversion circuit to be connected to an output of a light detector and configured to increase a value of current flowing through the circuit as a voltage of the output decreases; and 
   a comparator configured to compare the voltage of the output with a reference voltage. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     A more complete appreciation of embodiments of the present invention and many of its attendant advantages will be readily obtained by reference to the following detailed description considered in connection with the accompanying drawings, in which: 
       FIG. 1  is a circuit diagram showing a constitution of a conventional optical sensing circuit. 
       FIG. 2A  is a graph showing voltage waveforms at output nodes X 1 , X 2  of phototransistors and thresholds of comparators in the optical sensing circuit shown in  FIG. 1 . 
       FIG. 2B  is a graph showing output waveforms of the comparators X 1 COMP, X 2 COMP when the threshold voltage is Vth 1  shown in  FIG. 2A . 
       FIG. 2C  is a graph showing output waveforms of the comparators X 1 COMP, X 2 COMP when the threshold voltage is Vth 2  shown in  FIG. 2A . 
       FIG. 3A  is a graph showing voltage waveforms at the output nodes X 1 , X 2  of the phototransistors and thresholds of the comparators X 1 COMP, X 2 COMP when light intensity of an LED or reception sensitivity of the phototransistor is high in the optical sensing circuit shown in  FIG. 1 . 
       FIG. 3B  is a graph showing output waveforms of the comparators X 1 COMP, X 2 COMP when the threshold voltage is Vth 3  shown in  FIG. 3A . 
       FIG. 3C  is a graph showing output waveforms of the comparators X 1 COMP, X 2 COMP when the threshold voltage is Vth 4  shown in  FIG. 3A . 
       FIG. 4  is a circuit diagram showing a constitution of an optical sensing circuit according to a first embodiment of the present invention. 
       FIG. 5  is a graph showing voltage-current characteristics in an output terminal of a photodetector in the first embodiment. 
       FIG. 6  is a circuit diagram showing a constitution of an optical sensing circuit according to a second embodiment of the present invention. 
       FIG. 7  is a circuit diagram showing an example of circuitry of a variable current source in the second embodiment. 
       FIG. 8A  is a graph showing voltage waveforms at output nodes X 1 , X 2  of phototransistors and thresholds of comparators in the second embodiment. 
       FIG. 8B  is a graph showing output waveforms of the comparators X 1 COMP, X 2 COMP when the threshold voltage is Vth 1  shown in  FIG. 8A . 
       FIG. 8C  is a graph showing output waveforms of the comparators X 1 COMP, X 2 COMP when the threshold voltage is Vth 2  shown in  FIG. 8A . 
       FIG. 9A  is a graph showing voltage waveforms at the output nodes of X 1 , X 2  of the phototransistors and a threshold of the comparators when light intensity of an LED or receiving sensitivity of the phototransistor is high in the second embodiment. 
       FIG. 9B  is a graph showing output waveforms of the comparators X 1 COMP, X 2 COMP when the threshold voltage is Vth 1  shown in  FIG. 9A . 
       FIG. 9C  is a graph showing output waveforms of the comparators X 1 COMP, X 2 COMP when the threshold voltage is Vth 2  shown in  FIG. 9A . 
       FIG. 10  is a circuit diagram showing another example of circuitry of a variable current source in the second embodiment. 
       FIG. 11  is a circuit diagram showing a constitution of an optical sensing circuit according to a third embodiment of the present invention. 
       FIG. 12  is a circuit diagram showing a constitution of an optical sensing circuit according to a fourth embodiment of the present invention. 
       FIG. 13  is a graph showing voltage-current characteristics in an output terminal of a photodetector in the fourth embodiment. 
   

   DETAILED DESCRIPTION OF THE EMBODIMENTS 
   (1) First Embodiment 
     FIG. 4  shows a constitution of an optical sensing circuit according to a first embodiment of the present invention. This circuit comprises a circuit XCT 1  for detecting a moving amount in the X direction of a pointing device and its direction, and a circuit YCT 1  for detecting a moving amount in the Y direction and its direction. The circuit XCT 1  has an X light emitting portion  100   a , X photodetectors  101   a ,  101   b , variable current sources  102   a ,  102   b , and comparators  103   a ,  103   b . The circuit YCT 1  has a Y light emitting portion  100   b , Y photodetectors  104   a ,  104   b , variable current sources  105   a ,  105   b , and comparators  106   a ,  106   b.    
   The X light emitting portion  100   a  and the Y light emitting portion  100   b  are connected in series between a power supply voltage VCC terminal and a ground voltage VSS terminal to emit light. 
   In the circuit XCT 1 , the light emitted from the X light emitting portion  100   a  is received by the X photodetectors  101   a  and  101   b  through a rotary slit XSLT rotated in accordance with a moving amount in the X direction and a moving direction of the pointing device. 
   In the circuit YCT 1 , the light emitted from the Y light emitting portion  100   b  is received by the Y photodetectors  104   a  and  104   b  through a rotary slit YSLT rotated in accordance with a moving amount in the Y direction and a moving direction of the pointing device. In the circuit YCT 1 , optical sensing circuitry and its operation are basically similar to those of the circuit XCT 1 . Hereinafter, therefore, only the circuit XCT 1  will be described, while description of the circuit YCT 1  will be omitted. 
   In the circuit XCT 1 , in accordance with the amount of light received by the X photodetectors  101   a ,  101   b , voltages V (X 1 ), V (X 2 ) at nodes X 1 , X 2  connected to respective output terminals thereof are varied. The comparator  103   a  compares a predetermined threshold with the voltage V (X 1 ) at the node X 1 , and outputs a low level voltage when the voltage V (X 1 ) at the node X 1  is below the threshold, and a high level voltage when it is not less than the threshold. Similarly, the comparator  103   b  compares the voltage V (X 2 ) at the node X 2  with a predetermined threshold, and outputs a low level voltage when the voltage V (X 2 ) at the node X 2  is below the threshold, and a high level when it is not less than the threshold. 
   In this case, the variable current sources  102   a ,  102   b  are respectively connected between the nodes X 1 , X 2  and the ground voltage VSS terminal. The variable current source  102   a  increases current flowing from the node X 1  to the ground voltage VSS terminal as the voltage V (X 1 ) at the node X 1  is lowered, and accordingly operates to accelerate the pace of lowering the voltage V (X 1 ) at the node X 1 . Similarly, the variable current source  102   b  increases current flowing from the node X 2  to the ground voltage VSS terminal as the voltage V (X 2 ) at the node X 2  is lowered, and accordingly operates to accelerate the pace of lowering the voltage V (X 2 ) at the node X 2 . 
   Since the variable current sources  102   a ,  102   b  having such negative resistance characteristics are added to the nodes X 1 , X 2 , as shown in  FIG. 5 , as the voltages V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  are lowered, the currents I (X 1 ), I (X 2 ) flowing from the node X 1  to the ground voltage VSS terminal and from the node X 2  to the ground voltage VSS terminal, respectively, are increased. Therefore, the voltages at the nodes X 1 , X 2  are lowered at accelerating paces. 
   As a result, since voltage waveforms at the nodes X 1 , X 2  are lowered to the level of the ground voltage VSS, even if there is variance in light emitting characteristics at the X light emitting portion  100   a , or in receiving characteristics of the X photodetectors  101   a ,  101   b , a voltage range within which threshold voltage Vth should be set so as to identify a rotational direction is widened, and the threshold voltage Vth is always raised within the voltage range. Thus, stable outputs can be output from the comparators  103   a ,  103   b , whereby a moving amount in the X direction and a moving direction can be surely detected. 
   In the aforementioned first embodiment, preferably, light intensity of the LEDs XLED, YLED is set high, and/or receiving sensitivity of the phototransistors X 1 PT, X 2 PT, Y 1 PT, Y 2 PT is set high. 
   (2) Second Embodiment 
   A second embodiment of the present invention corresponds to the first embodiment but realized by a more specific circuit. 
     FIG. 6  shows a constitution of an optical sensing circuit of the second embodiment. Correspondence to the first embodiment is as follows. That is, the circuit XCT 1  for detecting the X-direction movement corresponds to a circuit XCT 2 , the rotary slit XSLT to a rotary slit XSLT, the X light emitting portion  100   a  to an LED XLED, the X photodetector  101   a  to a phototransistor X 1 PT and a resistor X 1 R, the X photodetector  101   b  to a phototransistor X 2 PT and a resistor X 2 R, the comparator  103   a  to a comparator X 1 COMP, the comparator  103   b  to a comparator X 2 COMP, the variable current source  102   a  to a voltage detection circuit VDC 1  and a voltage to current conversion circuit V/C·CONV 1 , the variable current source  102   b  to a voltage detection circuit VDC 2  and a voltage to current conversion circuit V/C·CONV 2 . 
   Additionally, the circuit YCT 1  for detecting the Y-direction movement corresponds to a circuit YCT 2 , the rotary slit YSLT to a rotary slit YSLT, the Y light emitting portion  100   b  to an LED YLED, the Y photodetector  104   a  to a phototransistor Y 1 PT and a resistor Y 1 R, the Y photodetector  104   b  to a phototransistor Y 2 PT and a resistor Y 2 R, the comparator  106   a  to a comparator Y 1 COMP, the comparator  106   b  to a comparator Y 2 COMP, the variable current source  105   a  to a voltage detection circuit VDC 3  and a voltage to current conversion circuit V/C·CONV 3 , and the variable current source  105   b  to a voltage detection circuit VDC 4  and a voltage to current conversion circuit V/C·CONV 4 . 
   This second embodiment corresponds to the circuit shown in  FIG. 1 , where the voltage detection circuit VDC 1  and the voltage to current conversion circuit V/C·CONV 1  are connected to the node X 1 , the voltage detection circuit VDC 2  and the voltage to current conversion circuit V/C·CONV 2  to the node X 2 , the voltage detection circuit VDC 3  and the voltage to current conversion circuit V/C·CONV 3  to the node Y 1 , and the voltage detection circuit VDC 4  and the voltage to current conversion circuit V/C·CONV 4  to the node Y 2 . Components identical to those shown in  FIG. 1  are denoted by similar reference numerals, and explanation thereof will be omitted. 
   As described above, light emitted from the LED XLED is received through the rotary slit XSLT by the phototransistors X 1 PT, X 2 PT, and voltages V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  are varied in accordance with the amount of received light thereof. 
   The voltage detection circuit VDC 1  detects the voltage V (X 1 ) at the node X 1 , and outputs a detected voltage signal to the voltage to current conversion circuit V/C·CONV 1 . The voltage to current conversion circuit V/C·CONV 1  converts the voltage signal into a current signal, and draws current in accordance with the voltage V (X 1 ) at the node X 1  from the node X 1  to a ground voltage VSS terminal. A current value at this time is set to be larger as the voltage V (X 1 ) at the node X 1  is lower. Similarly, the voltage detection circuit VDC 2  detects the voltage V (X 2 ) at the node X 2 , and outputs a detected voltage signal to the voltage to current conversion circuit V/C·CONV 2 . The voltage to current conversion circuit V/C·CONV 2  converts the voltage signal into a current signal, and draws current in accordance with the voltage V (X 2 ) at the node X 2  from the node X 2  to a ground voltage VSS terminal. A current value at this time is set to be larger as the voltage V (X 2 ) at the node X 2  is lower. 
   Thus, as described above with reference to the first embodiment, since values of currents flowing from the node X 1  to the ground voltage VSS terminal and from the node X 2  to the ground voltage VSS terminal are increased as the voltages V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  are lowered, the voltages V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  are lowered at accelerating paces. 
   Additionally, though explanation is omitted, for voltages V (Y 1 ), V (Y 2 ) at the nodes Y 1 , Y 2 , similarly, values of currents flowing from the node Y 1  to a ground voltage VSS terminal and from the node Y 2  to the ground voltage VSS terminal are increased as the voltages V (Y 1 ), V (Y 2 ) at the nodes Y 1 , Y 2  are lowered. Thus, the voltages V (Y 1 ), V (Y 2 ) at the nodes Y 1 , Y 2  are lowered at accelerating paces. 
   As in the case of the first embodiment, in the second embodiment, preferably, light intensity of the LEDs XLED, YLED is set high, and/or receiving sensitivity of the phototransistors X 1 PT, X 2 PT, Y 1 PT, Y 2 PT is set high. 
     FIG. 7  shows a constitution of the voltage detection circuit VDC 1  and the voltage to current conversion circuit V/C·CONV 1 , and similarly specific circuitry of the voltage detection circuit VDC 2  and the voltage to current conversion circuit V/C·CONV 2  in the circuit XCT 2 . Constitution of the voltage detection circuit VDC 3  and the voltage to current conversion circuit V/C·CONV 3 , similarly specified circuitry of the voltage detection circuit VDC 4  and the voltage to current conversion circuit V/C·CONV 4  in the circuit YCT 2 , and the specific circuit operations thereof are similar to those of the circuit XCT 2 , and this explanation will be omitted. 
   In order to supply power supply voltage VCC to a source of a P channel MOS transistor M 2 , a source and a drain of a P channel MOS transistor M 1  turned ON by grounding its gate are connected in series between the source of the transistor M 2  and a power supply voltage VCC terminal. A gate of the transistor M 2  is connected to the node X 1  or X 2 , and the voltage V (X 1 ) at the node X 1  or the voltage V (X 2 ) at the node X 2  is detected. 
   An input terminal of current mirror circuit constituted of N channel MOS transistors M 3  and M 4  is connected to a drain of the transistor M 2 , and its output terminal is connected to the node X 1  or X 2 . More specifically, a gate and a drain of the transistor M 3  are connected to the drain of the transistor M 2 , and its source is grounded. A drain of the transistor M 4  is connected to the node X 1  or X 2 , its gate is connected to a gate and a drain of the transistor M 3 , and its source is grounded. 
   Accordingly, the transistor M 2  detects the voltage at the node X 1  or X 2 . Current I 1  in accordance with this voltage flows through the transistors M 1 , M 2  and M 3  to the ground voltage VSS terminal, and current I 2  in accordance with this current I 1  further flows from the node X 1  or X 2  through the transistor M 4  to the ground voltage VSS terminal. In this case, a ratio of current I 1  to I 2  is determined based on a size ratio of the transistors M 3  to M 4 , which is a ratio of the current mirror circuit. 
   If the voltage V (X 1 ) or V (X 2 ) at the node X 1  or X 2  is high, the transistor M 2  approaches to an OFF state, and the current I 1  flowing from the power supply VCC terminal through the transistors M 1 , M 2 , and M 3  to the ground voltage VSS terminal becomes extremely small. In this case, since the current I 2  flowing from the node X 1  or X 2  through the transistor M 4  to the ground voltage VSS terminal also becomes small, the function for lowering the voltage V (X 1 ) or V (X 2 ) at the node X 1  or X 2  is hardly performed. 
   As the voltage V (X 1 ) or V (X 2 ) at the node X 1  or X 2  is lowered, the transistor M 2  gradually approaches to the ON state, and the current I 1  flowing from the power supply voltage VCC terminal through the transistors M 1 , M 2 , and M 3  to the ground voltage VSS terminal is increased. Accordingly, since the current I 2  flowing from the node X 1  or X 2  through the transistor M 4  to the ground voltage VSS terminal is similarly increased, a negative resistor function is performed to lower the voltage V (X 1 ) or V (X 2 ) at the node X 1  or X 2  at an accelerating pace. 
   As described above, by setting the light intensity of the LED XLED high and/or setting the receiving sensitivity of the phototransistors X 1 PT, X 2 PT high, while almost no light is received because of the interruption of the light by the rotary slit XSLT, the voltage V (X 1 ) or V (X 2 ) at the node X 1  or X 2  floats at a level greater than the ground voltage VSS in the circuit shown in  FIG. 1 . However, according to the embodiment, due to the current flowing from the node X 1  or X 2  to the ground voltage VSS terminal, the voltage V (X 1 ) or V (X 2 ) at the node X 1  or X 2  is lowered almost close to the ground voltage VSS. 
   Therefore, in voltage waveforms at the nodes X 1 , X 2 , the voltage range between the upper and lower points of intersection of both voltage waveforms can be wider than that in the case of the circuit shown in  FIG. 1 . 
     FIG. 8A  shows voltage waveforms V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  of the second embodiment. Further,  FIG. 8B  shows output waveforms of the respective comparators X 1 COMP, X 2 COMP when a threshold (=reference voltage Vref) of the comparators X 1 COMP, X 2 COMP is Vth 1  shown in  FIG. 8A , and  FIG. 8C  shows output waveforms of the respective comparators X 1 COMP, X 2 COMP when a threshold of the comparators X 1 COMP, X 2 COMP is Vth 2  shown in  FIG. 8A . 
   As described above, in order to identify a rotational direction of the rotary slit XSLT, threshold voltage Vth must be ranged between the upper and lower points C 11 , C 12  at which the voltage waveforms V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  intersect each other. 
   Since the threshold Vth 1  ranges between the points C 11 , C 12 , for outputs of the comparators X 1 COMP, X 2 COMP, there are an overlapping period ha of high levels and an overlapping period  11   b  of low levels as shown in  FIG. 8B . Thus, it is possible to identify the rotational direction of the rotary slit XSLT. 
   Further, also in the case of the threshold Vth 2 , since Vth 2  ranges between the points C 11  and C 12  at which the voltage waveforms intersect each other, for outputs of the comparators X 1 COMP, X 2 COMP, there are an overlapping period  13   a  of high levels and an overlapping period  13   b  of low levels as shown in  FIG. 8C , whereby the rotational direction of the rotary slit XSLT can be identified. 
   If the light intensity of the LED is much higher than that shown in  FIG. 8A , and/or if the sensitivity of the phototransistor is high, the voltage waveforms V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  are similar to those shown in  FIG. 9A .  FIG. 9B  shows output waveforms of the comparators X 1 COMP, X 2 COMP when a threshold of the comparators X 1 COMP, X 2 COMP is Vth 3  shown in  FIG. 9A , and  FIG. 9C  shows output waveforms of the comparators X 1 COMP, X 2 COMP when a threshold of the comparators X 1 COMP, X 2 COMP is Vth 4  shown in  FIG. 9A . 
   Since the threshold Vth 3  ranges between points C 13  and C 14  at which the voltage waveforms intersect each other, for outputs of the comparators X 1 COMP, X 2 COMP, there are an overlapping period  21   a  of high levels and an overlapping period  21   b  of low levels as shown in  FIG. 9B . Accordingly, it is possible to identify a rotational direction of the rotary slit XSLT. 
   Similarly, since the threshold Vth 4  ranges between the points C 13  and C 14  at which the voltage waveforms intersect each other, for outputs of the comparators X 1 COMP, X 2 COMP, there are an overlapping period  23   a  of high levels and an overlapping period  23   b  of low levels as shown in  FIG. 9C , whereby the rotational direction of the rotary slit XSLT can be identified. 
   Therefore, even if there is a large variance in characteristics between the LED and the phototransistor, a voltage range within which the threshold voltage Vth should be set so as to identify the rotational direction is widened, and the threshold voltage Vth ranges within this voltage range. Thus, it is possible to obtain stable photodetection without increasing accuracy of mechanical arrangement or the like such as a distance between the LED and the rotary slit or between the phototransistor and the rotary slit, contributing to a cost reduction. 
   In this case, by setting a size of the transistor M 1  relatively smaller regarding a size ratio of the transistor M 1  to the transistor M 2 , the transistor M 1  operates as a resistive element. Thus, as shown in  FIG. 10 , in place of the transistor M 1 , a resistor R 1  may be connected in series between the power supply voltage VCC terminal and the source of the transistor M 2 . Also in this case, this operation is similar to that of the circuit shown in  FIG. 7 . 
   (3) Third Embodiment 
   In the aforementioned second embodiment, as shown in  FIG. 7 , the gate of the P channel MOS transistor M 1  is grounded, and transistor M 1  is always maintained ON. On the other hand, according to the third embodiment, as shown in  FIG. 11 , a control signal CTL is input to a gate of a transistor M 1 . This control signal CTL is applied by, for example, a central processing unit of a not-shown computer. For example, a control signal which becomes a low level when a pointing device is in an operating state and a high level when it is in a suspended state is input to the gate of the transistor M 1 , and accordingly the transistor M 1  is turned OFF in the suspended state. Thus, the entire circuit is not operated, and wasteful current consumption can be prevented. Since the low-level control signal CTL is applied to turn ON the transistor M 1  when the pointing device is in the operating state, an operation is similar to that of the second embodiment. 
   (4) Fourth Embodiment 
   In the aforementioned second and third embodiments, current values flowing from the nodes X 1 , X 2  to the ground voltage VSS terminal are fixed in accordance with the voltages V (X 1 ), V (X 2 ) at the nodes X 1 , X 2  detected by the voltage detection circuits VDC 1 , VDC 2 . More specifically, a current mirror ratio is fixed, which is determined based on a size ratio of the transistors M 3  to M 4  in the current mirror circuit shown in  FIG. 7 ,  10  or  11 . 
   On the other hand, according to the fourth embodiment, a current mirror ratio can be selected in stages among a plurality of values.  FIG. 12  shows a constitution of the fourth embodiment. 
   A source of a P channel MOS transistor M 11  is connected to a power supply voltage VCC terminal, a gate is grounded, and the transistor M 11  is maintained ON. A source of a P channel MOS transistor M 12  is connected to a drain of the transistor M 11 , and its gate is connected to a node X 1  or X 2 . Further, corresponding to later-described three current mirror circuits, sources of three P channel MOS transistors M 13  to M 15  are connected to a drain of the transistor M 12 , and gates thereof are connected to the node X 1  or X 2 . 
   The current mirror circuits are respectively constituted to include N channel MOS transistors M 21  and M 22  corresponding to the transistor M 13 , N channel MOS transistors M 23 , M 24  corresponding to a transistor M 14 , and N channel MOS transistors M 25 , M 26  corresponding to a transistor M 15 . 
   A gate and a drain of the transistor M 21  are connected to a drain of the transistor M 13 , and its source is grounded. A drain of the transistor M 22  is connected to the node X 1  or X 2 , its gate is connected to the drain and the gate of the transistor M 21 , and its source is grounded integrally with the source of the transistor M 21 . 
   A gate and a drain of the transistor M 23  are connected to a drain of the transistor M 14 , and its source is grounded. A drain of the transistor M 24  is connected to the node X 1  or X 2 , its gate is connected to the drain and the gate of the transistor M 23 , and its source is grounded integrally with the source of the transistor M 23 . 
   A gate and a drain of the transistor M 25  are connected to a drain of the transistor M 15 , and its source is grounded. A drain of the transistor M 26  is connected to the node X 1  or X 2 , its gate is connected to the drain and the gate of the transistor M 25 , and its source is grounded integrally with the source of the transistor M 25 . 
   Further, a switch SW 1  is connected between the gate and the drain of the transistor M 21 , the gate of the transistor M 22  and the ground voltage VSS terminal. Similarly, a switch SW 2  is connected between the gate and the drain of the transistor M 23 , the gate of the transistor M 24  and the ground voltage VSS terminal. Additionally, a switch SW 3  is connected between the gate and the drain of the transistor M 25 , the gate of the transistor M 26  and the ground voltage VSS terminal. 
   Thus, according to the fourth embodiment, there are a first current mirror circuit constituted of the transistors M 21 , M 22  for driving current in accordance with voltage at the node X 1  or X 2  detected by the transistors M 12 , M 13 , a second current mirror circuit constituted of the transistors M 23  and M 24  for driving current in accordance with voltage at the node X 1  or X 2  detected by the transistors M 12 , M 14 , and a third current mirror circuit constituted of the transistors M 25  and M 26  for driving current in accordance with voltage at the node X 1  or X 2  detected by the transistors M 12 , M 15 . Then, the circuit in which the corresponding switches SW 1  to SW 3  are OFF is operated, and the circuit in which the corresponding switches are ON is not operated. For example, only the first current mirror circuit is operated when the switches SW 2  and SW 3  are ON, and only the second current mirror circuit is operated when the switches SW 1  and SW 3  are ON. A size ratio of the transistors M 21  to M 22  in the first current mirror circuit, a size ratio of the transistors M 23  to M 24  in the second current mirror circuit, and a size ratio of the transistors M 25  to M 26  in the third current mirror circuit are set different from one another, e.g., 1:2:4. Accordingly, a desired current mirror ratio, and a desired one of the voltage-current characteristics in the output terminal of the phototransistor shown in  FIG. 13  can be selected in accordance with characteristics of the LED or the phototransistor, characteristics changed depending on the shape of the rotary slit or arrangement of the respective components, or the like, and a stable photodetection output can be obtained. Incidentally, though explanation is omitted, the circuit of  FIG. 12  can be applied not only to the circuit for detecting an X-direction movement but also to the circuit for detecting a Y-direction movement. 
   The foregoing embodiments are all examples, and not limited to the present invention. For example, the circuitry shown in each of  FIGS. 6 ,  7 ,  10  to  12  is an example, and various modifications and variations can be made such as reversal of transistor polarity. 
   While there has been illustrated and described embodiments of the present invention, it will be understood by those skilled in the art that various change and modifications may be made, and equivalents may be substituted for devices thereof without departing from the true scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teaching of the present invention without departing from the central scope thereof. Therefore, it is intended that this invention not be limited to the particular embodiment disclosed, but that invention include all embodiments falling the scope of the appended claims.

Technology Classification (CPC): 6