Patent Abstract:
A comparator sense input is disconnected from a current sense resistor for the duration of a switching transition in an adjacent channel(s). Instead, the sense input receives a signal of the magnitude and the slew rate sampled prior to the transition.

Full Description:
CROSS REFERENCE TO RELATED APPLICATION 
       [0001]    This patent application claims priority to U.S. Provisional Application No. 62/015,944, filed on June 23, 2014, and titled “Circuit and Method for Active Crosstalk Reduction in Multiple-Channel Power Supply Controllers,” which is incorporated herein by reference in its entirety. 
     
    
     TECHNICAL FIELD 
       [0002]    A circuit and method are provided for reducing crosstalk in a multiple channel switching power supply controller. 
       BACKGROUND OF THE INVENTION 
       [0003]    Power supply control integrated circuits, especially those using current sense comparators, and even more so the ones for controlling power supplies in continuous conduction mode (CCM), are prone to false-triggering due to noise from adjacent switching circuits. Including two or more such controllers within one integrated circuit (IC) is problematic due to noise coupling and ground disturbances caused by an adjacent channel. A sub-optimal PCB layout can cause significant crosstalk in such multi-channel IC. 
         [0004]      FIG. 1  depicts a prior art multi-channel peak current-mode control (CMC) IC  299  for driving a plurality of switching power converters  100 . Each power converter  100  comprises a power inductor  101  operating in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), a control switch  102  having a control gate input, a current sense resistor  104  for sensing current in the control switch  102 , a freewheel diode  103  providing a path for the inductor  101  current when the switch  102  is off. The IC  299  comprises multiple peak CMC controllers  200 , having an input for receiving current sense signal from the resistor  104 , a driver output for controlling the gate input of the switch  102 . Each controller  200  includes a comparator  201  having: an input for receiving current sense signal from the resistor  104 ; a reference input for receiving a reference voltage REF; and an output changing its level when the current sense signal  104  exceeds the reference REF. Each controller  200  also includes: a flip-flop circuit having an output Q for controlling the gate of the switch  102 , a set input S for receiving a clock signal CLK, and a reset input R for receiving the output of the comparator  201 . 
         [0005]      FIG. 2  shows typical CCM waveforms  501  and  502  received at current sense inputs of the prior art IC  299  depicted in  FIG. 1  from two resistors  104 . With reference to waveform  501 , in normal operation, the driver output turns the switch  102  off when the voltage at the corresponding resistor  104  exceeds REF. The switch  102  is turned on again when the clock signal CLK is received. However, with reference to waveform  502 , switching transitions of the switch  102  generate disturbance  599  of current sense voltage  104  received by the adjacent controllers  200 . This disturbance can cause false detection of the level REF, and the conduction cycle of the switch  104  can be terminated prematurely. 
         [0006]    A method and a circuit are needed to eliminate these cross-coupling effects in a multi-channel power supply peak current-mode control IC, or any other type of power supply control ICs employing a current sense comparator  201 . 
       SUMMARY OF THE INVENTION 
       [0007]    A comparator sense input is disconnected from a current sense resistor for the duration of a switching transition in an adjacent channel(s). Instead, the sense input receives a signal of the magnitude and the slew rate sampled prior to the transition. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0008]      FIG. 1  depicts a prior art multi-channel peak current-mode control integrated circuit for driving a plurality of switching power converters. 
           [0009]      FIG. 2  depicts typical continuous conduction mode waveforms received at current sense inputs of the prior art integrated circuit depicted in  FIG. 1 . 
           [0010]      FIG. 3  depicts an embodiment of a multi-channel integrated circuit for driving a plurality of switching power converters. 
           [0011]      FIG. 4  depicts an embodiment of a track-and-hold circuit for use in the circuit of  FIG. 3 . 
           [0012]      FIG. 5  shows typical waveforms observed with the circuit of  FIG. 3   
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0013]      FIG. 3  depicts a multi-channel integrated circuit  399  of the present invention for driving a plurality of switching power converters  100 . The IC  399  comprises multiple peak CMC controllers  300 , having an input for receiving current sense signal from the resistor  104 , a driver output for controlling the gate input of the switch  102 . In addition to the controller  200  elements of  FIG. 1 , the controller  300  also comprises: a track-and-hold circuit  303  having an input for receiving the current sense voltage from the resistor  104 , having an output coupled to the current sense input of the comparator  201 , and having a control input ‘hold’; a blanking pulse generator  305  having an input coupled to the flip-flop  202  output for detecting its rising and falling edges, and having an output for generating a blanking pulse synchronized with these edges; a gate  304  having multiple inputs for receiving the blanking pulses  305  from the adjacent controllers  300 , and having an output for controlling the track-and-hold circuit  303 . The controller  300  may also comprise a delay  306  for delaying the gate driver output with respect to the blanking pulse  305 . An inherent driver delay between the output Q and the gate of the switch  102  may be utilized as the delay  306 . 
         [0014]    In operation, the track-and-hold circuit  303  tracks the level and the slew rate of the current sense voltage at  104  while propagating this voltage to the input of the current sense comparator  201 . The track-and hold circuit  303  disconnects its input from the resistor  104  and replicates the voltage level and slew rate sampled at the resistor  104  extrapolating this voltage for the duration of a blanking pulse  305  received at any of the inputs of the gate  304 . 
         [0015]      FIG. 4  depicts one embodiment of the track-and hold circuit  303  shown in  FIG. 3 , comprising: a blanking switch  331  coupled between the resistor  104  and the current sense input of the comparator  201 , having its control gate coupled to the ‘hold’ input; a sense capacitor  332  coupled to the switch  331  for sensing the voltage level and voltage slew rate at the resistor  104  while the switch  331  is in conduction, and for extrapolating the sampled voltage and slew rate at its plate while the switch  331  is off; a track-and-hold current mirror circuit  333  having a control input wired to the ‘hold’ input for sampling displacement current in the capacitor  332  and replicating this current at the plate of the capacitor  332  when the switch  331  is off. 
         [0016]      FIG. 5  shows typical waveforms observed with the a multi-channel integrated circuit  399  depicted in  FIG. 3 . Waveforms  401  and  402  represent current sense voltage at the resistor  104  of any two power converters  100 . Waveform  405  shows the blanking pulses produced by the pulse generator  305 . Waveform  404  represents current sense input voltage of the comparator  301  showing the disturbance  499  replaced by an undisturbed slope generated by the track-and-hold circuit  303  within the blanking pulses  405 . 
         [0017]    In the embodiments described above, the present invention provides a method for reducing crosstalk between channels in a multiple-channel power supply control IC incorporating current sense comparators, the method comprising: sampling and holding a current sense voltage and its first derivative monitored at a current sense element; and replacing the instantaneous current sense voltage by its linear extrapolation derived from the sampled current sense voltage and the sampled first derivative.

Technology Classification (CPC): 7