Patent Abstract:
The present invention is generally directed towards a flip chip assembly. In particular a new bonding process for bonding an electronic component to the substrate is disclosed. The method comprises the steps of forming at least one solder pad on the electronic component and forming at least one bond pad on the substrate wherein the at least one bond pad has a top layer formed of a metal. Placing an underfill film on top of the at least one bond pad and heating the electronic component and the substrate. Moving the electronic component towards the substrate such that the at least one solder pad is aligned on top of the at least one bond pad and finally forming a bond between the at least one solder pad and the top layer of the at least one bond pad.

Full Description:
TECHNICAL FIELD  
         [0001]    This invention generally relates to flip chip assembly. More specifically to a flip chip assembly and a method of forming the flip chip assembly.  
         BACKGROUND  
         [0002]    Flip chip mounting is an increasingly popular technique for directly electrically connecting an integrated circuit chip to a substrate such as a circuit board. In this configuration, the active face of the chip is mounted face down, or “flipped” on the substrate. The electrical bond pads on the flip chip are aligned with corresponding electrical bond pads on the substrate, with the chip and substrate bond pads electrically connected by way of an electrically conductive material. The flip chip mounting technique eliminates the use of bond wires between a chip or chip package and the substrate, substantially increases the reliability of the chip-to-substrate bond.  
           [0003]    As a means for mounting integrated circuit chips to a substrate, there has been known a number of methods which form solder portions, such as solder bumps and solder precoats, on the integrated circuit chip and joins the integrated circuit chip to a substrate by means of the solder portions. Typically, the soldering process involves applying a flux to substrate and mounting the integrated circuit chip to a substrate, and heating and melting the solder to join the solder portions. After the solder joints have been formed, the assembly is subjected to cleaning to remove flux residues to enhance the reliability after the mounting.  
           [0004]    Additionally the resulting assembly typically undergoes further thermal cycling during additional assembly operations. The final assembly also is exposed to wide temperature changes in the service environment. The integrated circuit chip is typically silicon and the substrate may be epoxy, or ceramic. Both the material of the integrated circuit chip and the substrate frequently have thermal expansion coefficients that are different from one another, and are also different from the thermal expansion coefficient of solder. The differential expansion that the assembly invariably undergoes results in stresses on the solder bonds which can cause stress cracking and ultimately failure of the electrical path through the solder bond. To avoid solder bond failures due to mechanical stress, the gap between the surfaces joined by the bond is typically filled with an underfill material.  
           [0005]    Conventionally, the underfill material is dispensed between the chip and the substrate. The underfill material is typically provided as a liquid adhesive resin that can be dried or polymerized. The underfill material provides enhanced mechanical adhesion and mechanical and thermal stability between the flip chip and the substrate, and inhibits environmental attack of chip and substrate surfaces. The underfill material also fills the gaps between the bumped electronic parts and the board to reinforce the joints. The underfill resin is then hardened by heat treatment, thus completing the mounting process.  
           [0006]    The mounting process described above, however, poses the following problems as the use of such solvents as fluorocarbon are not considered environmentally safe. Further, the cleaning process after soldering has become complicated and risen in cost, which, combined with on-going reductions in the size of integrated circuit chip, has contributed to making the cleaning process technically difficult. As to the underfill resin, since the gaps between the integrated circuit chip and the substrate is minimized to a need for smaller components filling of the underfill after the mounting of electronic components difficult, resulting in unstable quality of the assembly. In addition to this quality problem, the above conventional mounting method has another problem that it requires two heating processes for the mounting of each component, one for soldering and one for hardening the resin, thus complicating the process. Additionally, in some cases entrapped air, or incomplete wetting of the surfaces of the space being filled, inhibits flow or prevents wicking, causing voids in the underfill. The above method also has another problem that it requires two heating processes. One for mounting the integrated circuit chip to the substrate and the other for hardening the resin, thereby complicating the process and the time for manufacturing the assembly.  
           [0007]    Therefore, there is a need in the flip-chip bonding industry to have a process that substantially reduces cure time for the underfill and at the same time having a more reliable bond.  
         SUMMARY  
         [0008]    In accordance with one aspect of the present invention a semiconductor assembly comprises an electronic component such as an integrated circuit chip attached to a substrate such as a circuit board. The electronic component is provided with a solder pad that forms a metallurgical bond with the top surface of a bond pad provided in the substrate.  
           [0009]    In yet another aspect, a first method of bonding the electronic component to a substrate is disclosed. The method comprises the step of forming a solder pads on a surface of the electronic component. The solder pads are preferably Au/Sn eutectic solder pads. Forming a bond pad on a surface of the substrate. The bond pad comprises a top layer formed of gold. Placing an underfill material on top of the surface of the substrate. The method also comprises the step of heating the electronic component and the substrate. Moving the electronic component towards the substrate such that the solder pads are aligned above the bond pads and forming a diffusion bond between the solder pads and the top layer of the bond pads.  
           [0010]    In yet another aspect of the present invention, a second method of bonding the electronic component to a substrate is disclosed. The method comprises the step of forming a solder pads on a surface of the electronic component. The solder pads are preferably Au/Sn eutectic solder pads. Forming a bond pad on a surface of the substrate. The bond pad comprises a top layer formed of gold. Placing an underfill material on top of the surface of the substrate. The method also comprises the step of heating the electronic component and the substrate. Moving the electronic component towards the substrate such that the solder pads are aligned above the bond pads and heating the assembly such that the solder material reflows and forms a metallurgical bond with the top layer of the bond pads on the substrate.  
           [0011]    Further aspects, features and advantages of the invention will become apparent from consideration of the following description and the appended claims when taken in connection with the accompanying drawings.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0012]    [0012]FIG. 1 is a cross sectional view of the electronic component mounted on top of a substrate to form the electronic assembly in accordance with the teachings of the present invention;  
         [0013]    [0013]FIGS. 2A to  2 H is a cross sectional representation of forming a solder pad on the electronic component in accordance with the teachings of the present invention;  
         [0014]    [0014]FIG. 3A is a cross sectional representation of the electronic component being mounted to a substrate by a first method in accordance with the teachings of the present invention;  
         [0015]    [0015]FIG. 3B is a cross sectional representation of forming a bond between the electronic component and the substrate by the first method, in which the solder pad of the electronic component pierce an underfill film on the substrate to form the bond with the top layer, in accordance with the teachings of the present invention;  
         [0016]    [0016]FIG. 4A is a cross sectional representation of the electronic component being mounted to a substrate by a second method in accordance with the teachings of the present invention;  
         [0017]    [0017]FIG. 4B is a cross sectional representation of forming an intermediate bond between the electronic component and the substrate by the second method, in which the solder pad of the electronic component pierce an underfill film on the substrate to form the bond with the top layer, in accordance with the teachings of the present invention; and  
         [0018]    [0018]FIG. 4C is a cross sectional representation of forming a bond between the electronic component and the substrate by the second method, in which bond is formed by the reflow of the solder pad on top of the top layer, in accordance with the teachings of the present invention. 
     
    
     DETAILED DESCRIPTION  
       [0019]    The following description of the preferred embodiment is merely exemplary in nature and is in no way intended to limit the invention or its application or uses.  
         [0020]    Referring in particular to FIG. 1 an electronic assembly, such as a semiconductor assembly is generally shown and represented by reference numeral  10 . The assembly  10  comprises an electronic component  12  positioned above a substrate  14 . Electronic component  12  is an integrated circuit or a flip chip adapted for mounting on a substrate  14  by a flip-chip process.  
         [0021]    The electronic component  12  is comprises a base  16 . Preferably the base  16  is formed of silicon and has an active surface  18 . A plurality of electrically conductive electrodes  20  are mounted on the active surface  18  of the electronic component  12 . The electrodes  20  include an integrally attached eutectic solder pad  22 . As will be explained in details later the electronic component  12  is directly attached to the substrate  14  through the solder pad  22  formed on the active surface  18  of the electronic component  12 .  
         [0022]    Referring in particular to FIGS. 2A to  2 H, a method of forming the eutectic solder pad  22  on the active surface  18  of the electronic component  12  is shown. The method comprises the step of first forming the electrodes  20 . A first layer  24  of an electrode base is deposited on the active surface  18  (shown in FIG. 2A). Preferably, the first layer  24  is formed of aluminum. A second layer  26  preferably of Ti/W alloy and Au is deposited on top of the first layer  24  by the sputtering deposition process (shown in FIG. 2B). Alternatively, the first layer  24  may be pretreated with zincate and subject to electroless nickel deposition. A photoresist material  28  is then etched on the active surface  18  and partially over the second layer  24  (shown in FIG. 2C). A third layer  30  preferably of gold is then electroplated on top of the second layer  26  (shown in FIG. 2D). This step is then followed by electroplating a fourth layer  32  preferably tin on top of the third layer  30  (shown in FIG. 2E). The photoresist material  28  is then removed and the second layer  26  is etched away from the active surface  18  of the substrate  16  (shown in FIGS. 2F and 2G).  
         [0023]    Referring in particular to FIG. 2H, in order to form the eutectic solder pad  22 , the third layer  30  and the fourth layer  32  are reflowed to form eutectic solder pad  22 . Preferably, the eutectic solder pad  22  is formed of gold/tin alloy. Alternatively, other metals such as tin/lead alloys may be used to form the eutectic solder pad  22 . As shown in FIG. 2H, the eutectic solder pad  22  is dome shaped having a bottom periphery  23 . As will be explained later, the dome shape of the eutectic solder pad  22  will facilitate the bonding of the electronic component  12  to the substrate  14 . Although the dome shaped is preferred, it must be understood that the solder pad  22  may have other shapes.  
         [0024]    Referring in particular to FIG. 1, the substrate  14  also defines a base  15 . The substrate  12  is preferably a printed circuit board and the base  15  is formed a composite material or a ceramic material. The base  15  has a surface  34  on which plurality of substrate bond pads  36  are mounted. The substrate bond pads  36  facilitate the bonding of the electronic component  12  to the substrate  14 . The substrate bond pads  36  are preferably composed of a first layer  40  preferably a solder wettable copper. The first layer  40  is coated with a second layer  42  of a second metal. Preferably, the second metal forming the second layer  42  is nickel. Finally, a top layer  44  of a third metal is coated or deposited on top of the second layer  42 . In the preferred embodiment, the third metal forming the top layer  44  is gold. Alternatively, the substrate bond pads  36  have a composition of Ti/Ni/Au or other metals may be used that adheres well to the materials used to form the solder pad  22 .  
         [0025]    In order to substantially increase the reliability of the bonding between the electronic component  12  and the substrate  14 , an underfill material  46  is disposed on the surface  34  of the substrate  14 . The underfill material  46  is disposed such that the underfill material  46  forms a thin layer over the top layer  44  of the substrate bond pads  36 . Preferably, the underfill material  46  is in form of a film and contains 30% to 40% of a solid filler material. The underfill material  46  reduces the thermal expansion stresses caused due to the difference in the coefficient of thermal expansion of the electronic component  12  and the substrate  14 . The solid filler material in the underfill material  46  is preferably an inorganic material such as silica. Alternatively, the filler may comprise an organic materials such as resin.  
         [0026]    The first method of bonding the electronic component  12  to the substrate  14  is now described by referring to FIGS. 3A to  3 D. As shown in FIG. 3A, the active surface  18  of the electronic component  12  having the solder pad  22  is placed above the surface  34  of the substrate  14 . The electronic component  12  is held above the substrate  14  by a holding means (not shown). The electronic component  12  is flipped such that solder pad  22  directly face the surface  34  of the substrate  14 . The electronic component  12  is then heated to a temperature in the range of 220° C. to 260° C. through a heating element (not shown). The substrate  14  is also simultaneously heated to a temperature of about 75° C. to 100° C. The heating of the substrate  14  will result in softening of the underfill material  46 . The electronic component  12  is then moved towards the substrate  14  as shown by arrows  45  such that the solder pad  22  is aligned on top of the substrate bond pads  36 . The method further comprises the step of applying pressure on the electronic component  12  such that the solder pad  22  penetrate the underfill material  46  to directly contact the top layer  44  of the substrate bond pads  36  (shown in FIG. 3B). In this method the electronic component  12  and the substrate  14  are heated below the melting point of the solder pad  22  such that diffusion or a thermo-compression bond is formed between the solder pad  22  and the top layer  44  of the substrate bond pad  36 . As seen in FIG. 3B, the dome shape of the solder pad  22  is retained and only the bottom periphery  23  of the solder pad  22  forms a bond with the top layer  44  of the substrate bond pad  36 . Preferably, the bond is formed at around 250° C.  
         [0027]    [0027]FIGS. 4A to  4 C represent the alternative process of attaching the electronic component  12  to the substrate  14 . Referring in particular to FIG. 4A, like the first method, the electronic component  12  is placed on top of the substrate  14  such that the active surface  18  of the electronic component  12  is facing the surface  34  of the substrate  14 . The electronic component  12  is then heated to about 230° C. to about 260° C. The substrate  14  is also heated to about 75° C. to about 100° C. As the electronic component  12  is moved towards the substrate  14  as shown by arrows  50 , pressure is applied on the electronic component  12 . The amount of pressure applied in approximately 150 grams/bump such that the solder pad  22  penetrate the underfill material  46  (shown in FIG. 2A). As seen in FIG. 4B, the solder pad  22  is placed directly in contact with the top layer  44  of the substrate bond pads  36 . When the electronic component  10  is placed on top of the substrate  14 , a bond similar to the bond formed in the first method is first formed represented in FIG. 4B.  
         [0028]    Referring in particular to FIG. 4C, the assembly  10  comprising the electronic component  12  on top of the substrate  14  is then heated to a temperature of about 300° C. Heating the assembly  10  at this temperature will cause the solder pad  22  to melt and reflow thereby forming a metallurgical bond between the solder pad  22  and the top layer  44  of the substrate bond pad  36 . In this method as shown in FIG. 1 and FIG. 4C, the top layer  44  is encapsulated by the reflowed solder pad  22 . Therefore, in this method the metallurgical bond is formed by vertical compression and horizontal expansion of the solder pad  22 . This result in more surface area contact thereby forming a strong bond between the electronic component  12  and the substrate  14 .  
         [0029]    It should be noted that the method of attaching the electronic component  12  to a substrate  14  is not limited to the embodiments discussed above. With this invention because an underfill material  46  having a filler material is applied to the surface of the substrate before the attachment of the electronic component it accomplishes bonding of the electronic component  12  to the substrate  14  and the curing of the underfill material  46  occurs simultaneously. The bonding process therefore eliminates the need for an additional underfill step, thereby eliminating the additional cost of equipment and increasing the production output. Since the above discussed methods involve vertically compressing and laterally expanding solder pads  22  as they attach to the top layer  44  of the substrate bond pads  36 , it substantially eliminates the production of voids between the solder pad  22  and the substrate  14 . As a result the bonding method of the present invention results in a more reliable bond between the electronic component  12  and the substrate  14  to result in a more robust assembly  10 .  
         [0030]    As any person skilled in the art will recognize from the previous description and from the figures and claims, modifications and changes can be made to the preferred embodiment of the invention without departing from the scope of the invention as defined in the following claims.

Technology Classification (CPC): 7