Patent Abstract:
A method of dealing with anomalies in an output signal is provided. The method includes monitoring transitions in the output signal. When transitions do not occur at expected times, detecting an anomalous signal. Determining the type of anomalous signal based at least in part on the time period of the anomalous signal and conditioning the output signal based on the type of anomalous signal detected.

Full Description:
GOVERNMENT CONTRACT RIGHTS 
       [0001]    The U.S. Government may have certain rights in the present invention as provided for by the terms of Government Contract # DASG60-00-C-0072 under program THAAD. 
     
    
     BACKGROUND 
       [0002]    Devices that include integrated circuits that generate output signals are prone to have issues when exposed to shock or vibration environments. In particular, during a shock occurrence anomalous outputs can occur which can result in system level errors that are unacceptable. An example of a device that is subject to shock or vibration environments is an accelerometer placed in a missile. The reliance on anomalous accelerometer data by an inertial system of the missile can result in a catastrophic failure. 
         [0003]    For the reasons stated above and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for an effective method of dealing with anomalous outputs of integrated circuits. 
       SUMMARY OF INVENTION 
       [0004]    The above-mentioned problems of current systems are addressed by embodiments of the present invention and will be understood by reading and studying the following specification. The following summary is made by way of example and not by way of limitation. It is merely provided to aid the reader in understanding some of the aspects of the invention. In one embodiment, a method of dealing with anomalies in an output signal is provided. The method includes monitoring transitions in the output signal. When transitions do not occur at expected times, the method detects an anomalous signal. Determining the type of anomalous signal based at least in part on the time period of the anomalous signal and conditioning the output signal based on the type of anomalous signal detected. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0005]    The present invention can be more easily understood and further advantages and uses thereof more readily apparent, when considered in view of the detailed description and the following figures in which: 
           [0006]      FIG. 1  is a block diagram of a signal correcting system of one embodiment of the present invention is provided; 
           [0007]      FIG. 2  is a flow diagram of a method of correcting an anomalous signal of one embodiment of the present invention; 
           [0008]      FIG. 3  is a signal diagram illustration an anomalous signal and a corrected signal of one embodiment of the present invention. 
       
    
    
       [0009]    In accordance with common practice, the various described features are not drawn to scale but are drawn to emphasize specific features relevant to the present invention. Reference characters denote like elements throughout Figures and text. 
       DETAILED DESCRIPTION 
       [0010]    In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the inventions may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, mechanical and electrical changes may be made without departing from the spirit and scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined only by the claims and equivalents thereof. 
         [0011]    Embodiments of the present invention provide a method that detects and corrects (or conditions) anomalous signals that is transparent to a system using the signals. Referring to  FIG. 1 , a system  100  including a signal correcting device  104  of one embodiment of the present invention is illustrated. The system  100  includes a signal generator  102 , a signal using device  106  and the signal correcting device  104 . Although, any type of signal generator  102  and signal using device could be used with this invention an example of a signal generator  102  is an accelerometer and an example of the signal using device  106  is a navigation system. 
         [0012]    The signal correcting device  104  includes a signal processor  108  and a register  110 . As illustrated the signal processor  108  is coupled to receive an output of the signal generator  102  via input port  118 . The signal processor  108  monitors the output signal for anomalous signals. When a anomalous signal is detected it is either skipped or replaced. The signal processor  108  then sends the corrected (or conditioned) signal to the register  110 . Once the signal using device  106  is ready to process the signal from the signal generator  102 , the signal in the register  110  is passed on to the signal using device  106  via output port  120 . The signal processor  108  is able to correct anomalous signals without the signal using device  106  knowing of the correction because the signal processor  108  operates at faster speed than the signal using device  106 . This allows the signal correcting device  104  to have time to correct an anomalous signals. 
         [0013]    In embodiments of the present invention, anomalous signals are sorted into different types. The types of anomalous signals include signals designated as either a glitch or a bursting anomaly. A glitch is a type of anomalous signal that only occurs for relatively short period of time. In embodiments of the present invention the relatively short period of time is user defined. This select time period is dependant on the application. In particular in some embodiments, a glitch duration variable is loaded into the signal correcting device  104 , via input port  116 , to be used by the signal processor  108 . The glitch duration variable sets the select period of time. An example of a detected glitch is where a transition is encountered at a time that would be outside the range of frequency but the next transition occurs at an expected time within the frequency range. A bursting signal is a type of anomalous signal that occurs over a relatively long period of time. That is, bursting signals are glitches that occur continuously for a select period of time based on the type of signal generator. The bursting duration is a variable that is loaded into the signal correcting device  104 . The signal processor  108  tracks glitches and bursting with a counter circuit  114 . The counter circuit  114  includes one or more counters. In one embodiment, a counter in the counter circuit  114  is set when a transition does or does not occur when expected. As discussed, the processor then uses the counter to determine the period of time of the anomalous signal. If the anomalous signal returns back to its expected frequency before the end of the select period of time, a glitch has been detected. If a series of Glitch transitions occur beyond the select period of time, a burst has been detected. Once the signal has returned to it expected frequency the counter is reset. 
         [0014]    In some embodiments, the signal correcting device  104  tracks glitch and bursting events. This information can then be sent to an exterior processor for processing. In one embodiment, a discrete register  112  is used as illustrated in  FIG. 1 . The signal processor  108  in the signal correcting device reports all occurrence of glitch rejections and all occurrence of level transition timeout used during bursting to discrete register  112 . As illustrated, in this embodiment, an output of register  112  is used by the signal using device  106  for further conditioning. 
         [0015]    A signal processing flow diagram  200  of one method of implementing an embodiment of the present invention is illustrated in  FIG. 2 . As illustrated, the method starts by monitoring the output signal of a signal generator ( 202 ). The output signal is monitored for an anomalous signal ( 204 ). In one embodiment, this is done by monitoring the frequency of the output signal from the signal generator  102 . Depending on the application, a normal frequency range is selected. In this embodiment, it is determined if the frequency of the output signal is within the normal frequency range. The frequency is determined in one embodiment by counting the number of transitions between states in the signal within a given time period. If the frequency of the output signal of the signal generator  102  is outside the frequency range an anomalous signal has been detected. If an anomalous signal is detected ( 204 ), the type of anomalous signal is determined ( 206 ). 
         [0016]    If the anomalous signal is determined to be a glitch ( 206 ), the anomalous portion is simply thrown out by the signal processor ( 210 ). As discussed above, since, the signal generator  102  has a higher frequency than the signal using device  106 , the removal of the glitch will not be noticed by the signal using device  106 . Once the anomalous glitch signal is thrown out ( 210 ), the output signal is again monitored at ( 202 ). If the anomalous signal is determined to be bursting ( 206 ), the bursting portion of the signal is replaced or reconstructed ( 216 ). There are many different ways in which the signal can be reconstructed. For example in one embodiment a programmed replacement signal is simply used. That is, in the embodiment, a signal of a select frequency is pre-programmed in and used to replace the bursting signal. In another embodiment, the signal processor  108  uses a signal having a frequency that that was occurring right before bursting was detected. In still another embodiment where a signal output generator  102  outputs more than one output signal and the output signals have a proportional relation, a second non-anomalous signal is used to create a replacement signal. Other methods of generating a signal to replace an anomalous signal are contemplated and the above are given by way of example not by way of limitation. The reconstructed signal is then placed in the register ( 218 ). Moreover, during a bursting signal, the signal correcting device  104  reconstructs the signal generators output by enabling a transition from the existing level state of the signal after a timeout duration from a previous transition. 
         [0017]    Embodiments of the present invention then determine when the bursting has ended ( 220 ). If it has not ended ( 218 ), the signal processor continues to reconstruct the signal at ( 216 ). When it is determined the bursting has ended  220 , the process continues at ( 202 ) where the output signal is continued to be monitored ( 202 ) and placed in the register ( 212 ) if no other anomalous signals have been detected ( 204 ). In particular, the signal is monitored to determine when the bursting has ended ( 220 ). Once the bursting has ended, the reconstructed signal is stopped and the output signal is transitioned back into the signal stream such that the replacement is transparent to the signal using device  106 . In particular, a transition is coincident with the actual signal level change following a timeout. 
         [0018]    Referring to  FIG. 3 , an example of an anomalous signal  304  and a replacement signal  302  is illustrated. In particular, signal  304  represents a signal from a signal generator, such as an accelerometer that is communicated to the signal correcting device  104 . Signal  302  represents a reconfigured signal that would be output from the signal correcting device  104  and used by the signal using device  106 . In regards to the anomalous signal  304 , glitches  306  and  308  as well as bursting  310  are shown. As illustrated, the glitches  304 ,  306  and  308  are replaced in signal  302  with the signal correcting device  104  of the present invention.  FIG. 3  also illustrates, that the transition edges are not aligned with respect to anomalous signal  304  and the replaced or corrected signal  302 . The shift in transition edges reflects the time used to analysis and correct the signal. 
         [0019]    The methods and techniques described here may be implemented in digital electronic circuitry, or with a programmable processor (for example, a special-purpose processor or a general-purpose processor such as a computer) firmware, software, or in combinations of them. Apparatus embodying these techniques may include appropriate input and output devices, a programmable processor, and a storage medium tangibly embodying program instructions for execution by the programmable processor. A process embodying these techniques may be performed by a programmable processor executing a program of instructions to perform desired functions by operating on input data and generating appropriate output. The techniques may advantageously be implemented in one or more programs that are executable on a programmable system including at least one programmable processor coupled to receive data and instructions from, and to transmit data and instructions to, a data storage system, at least one input device, and at least one output device. Generally, a processor will receive instructions and data from a read-only memory and/or a random access memory. Storage devices suitable for tangibly embodying computer program instructions and data include all forms of non-volatile memory, including by way of example semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices; magnetic disks such as internal hard disks and removable disks; magneto-optical disks; and DVD disks. Any of the foregoing may be supplemented by, or incorporated in, specially-designed application-specific integrated circuits (ASICs) or a field programmable gate array (FPGA). 
         [0020]    Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that any arrangement, which is calculated to achieve the same purpose, may be substituted for the specific embodiment shown. This application is intended to cover any adaptations or variations of the present invention. Therefore, it is manifestly intended that this invention be limited only by the claims and the equivalents thereof.

Technology Classification (CPC): 7