Patent Abstract:
A method of etching a ferroelectric layer comprises etching a ferroelectric layer using boron trichloride gas and at least one auxiliary gas selected from the group consisting of a carbon-containing gas and a nitrogen-containing gas. The carbon-containing gas may include CHF 3  or C 2 H 4 . The nitrogen-containing gas may include N 2  or NF 3 . The method reduces side etching of ferroelectric layers, and in particular, PZT-based ferroelectric layers and thereby improves electrical performance and reliability of devices made therefrom.

Full Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
         [0001]    This application claims priority to co-pending Japanese patent application number 2001-232528, filed in Japan on Jul. 31, 2001.  
         BACKGROUND OF THE INVENTION  
         [0002]    1. Field of the Invention  
           [0003]    The present invention generally relates to etching ferroelectric materials and, more particularly, to the use of carbon-containing gases and nitrogen-containing gases to etch ferroelectric layers.  
           [0004]    2. Description of the Related Art  
           [0005]    Lead zirconate titanate (PZT), a ferroelectric oxide material, is often used for memory cell applications. Various methods for processing PZT have been discussed in the art. In order to etch PZT, process gases including boron trichloride (BCl 3 ) gas and argon (Ar) gas have been used. However, using boron trichloride (BCl 3 ) gas and argon (Ar) gas to etch PZT layers has been found to result in etching the side of the PZT layer. This side-etching may result in various problems in subsequent processing steps. For example, when forming an insulating layer on the PZT layer, side-etching may result in unsatisfactory step coverage of the insulating layer. Furthermore, variations in side-etching of the PZT layer may result in memory cells formed therefrom having different capacitance, thereby causing unreliable electrical performance. Therefore, a need exists to reduce side-etching in PZT layers.  
         SUMMARY OF THE INVENTION  
         [0006]    Embodiments of the present invention generally relate to a method of etching a PZT-based ferroelectric layer with limited side etching. In one embodiment of the invention, an etching process comprises etching a PZT-based ferroelectric layer with a process gas, wherein the process gas includes boron trichloride gas and at least one auxiliary gas selected from the group consisting of a carbon-containing gas e.g., hydroflurocarbon and a nitrogen-containing gas. The at least one auxiliary gas may comprise, for example, CHF 3 , C 2 H 4 , N 2 , NF 3 , or combinations thereof. The process gas may further comprise argon. The use of an auxiliary gas limits side etching.  
           [0007]    In another embodiment of the invention, a method of forming a capacitor having dielectric portions disposed between first electrodes and second electrodes is provided. The process comprises etching the first conductive layer to form first electrodes. The PZT-based ferroelectric layer is then etched with a process gas comprising boron trichloride and at least one auxiliary gas selected from the group consisting of a carbon-containing gas and a nitrogen-containing gas to form dielectric portions. The second conductive layer is then etched to form second electrodes. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0008]    So that the manner in which the above recited features, advantages and objects of the present invention are attained and can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings.  
         [0009]    It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.  
         [0010]    [0010]FIG. 1 a -FIG. 1 j  are cross-sectional views of a substrate during various stages of processing according to one embodiment of the present invention;  
         [0011]    [0011]FIG. 2( a ) depicts a schematic cross-sectional diagram of a dielectric portion formed using embodiments of the invention described herein. FIG. 2( b ) depicts a schematic diagram showing the cross section of the PZT layer etched using a process gas composed of only BCl 3  gas and Ar gas;  
         [0012]    [0012]FIG. 3 is a schematic diagram showing an exemplary plasma etching apparatus that may be used to practice embodiments of the invention described herein;  
         [0013]    [0013]FIG. 4 is a circuit diagram showing a capacitor comprising a memory cell formed by the etching process according to embodiments of the invention described herein; and  
         [0014]    [0014]FIG. 5 is a graph depicting a hysteresis phenomenon of a ferroelectric material that may be etched using embodiments of the invention described herein. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0015]    Embodiments described herein relate to a method of etching a PZT-based ferroelectric layer. FIG. 1 a -FIG. 1 j  are cross-sectional views of a substrate during various stages of processing according to one embodiment of the present invention. As shown in FIG. 1 a,  a conductive layer such as platinum (Pt) layer  3  is formed on a substrate  2 . The substrate  2  may be, for example, a semiconductor substrate such as a silicon (Si) wafer, a Si wafer having an insulating layer such as a silicon oxide (SiO 2 ) layer formed thereon, or a Si wafer upon which a partially completed semiconductor integrated circuit has been fabricated. The method employed for forming Pt layer  3 , may be, for example, a chemical vapor deposition (CVD) method or a physical vapor deposition (PVD) method. As shown in FIG. 1 b,  a ferroelectric layer such as a PZT layer  4  is formed on the first Pt layer  3 . The PZT layer  4  may be formed by a physical vapor deposition (PVD) process or a sol-gel process. Next, as shown in FIG. 1 c,  a conductive layer such as an iridium (lr) layer  5  is formed on the PZT layer  4 , using a deposition method such as, for example, chemical vapor deposition (CVD) or PVD. As a result, a multi-layer film composed of the platinum (Pt) layer  3 , the PZT layer  4  and the lr layer  5  is formed.  
         [0016]    Subsequently, in order to form hard masks on the multi-layer film, an SiO 2  layer  6  is formed on the lr layer  5 , as shown in FIG. 1 d.  The SiO 2  layer  6  may be formed by, for example, a plasma CVD method using tetraethyl orthosilicate (TEOS) and oxygen (O 2 ) gas as raw materials. Thereafter, a resist layer (not shown) is applied on the SiO 2  layer  6 , and the resist layer is then exposed via a photomask having a predetermined pattern. As shown in FIG. 1 e,  resist masks  7  are thereby formed. The resist masks  7  are then used to etch the SiO 2  layer  6 , as shown in FIG. 1 f.  This etching may be performed using, for example, a plasma etching apparatus appropriate for SiO 2  layer etching. A process gas including, for example, Cl 2  and CF 4 , may be used to perform the SiO 2  layer etching. After etching the SiO 2  layer, the resist mask  7  is removed by ashing. As a result, hard masks  8  are formed as shown in FIG. 1 g.    
         [0017]    After the formation of the hard masks  8 , the substrate  2  is placed in an etching chamber of a predetermined plasma etching apparatus. After the substrate  2  is placed in the etching chamber, a substrate support temperature is maintained within a range not lower than 250 degrees and not higher than 400 degrees. The temperature may be, for example, 310 degrees. After the temperature of the substrate  2  becomes stable at 310 degrees, process gas is introduced into the etching chamber. The portions of the lr layer  5  that are not covered by the hard masks  8  are etched, and the portions of the lr layer  5  that are covered by hard masks  8  are unetched, thus forming upper lr electrodes  9 , as shown in FIG. 1 h.  The process gas used to etch the IR layer  5  may include chlorine (Cl 2 ) gas and oxygen (O 2 ) gas.  
         [0018]    After the lr electrodes  9  are formed, the PZT layer  4  is etched in the same etching chamber as used to etch the lr layer  5 . The etching of the PZT layer  4  may be performed at a substrate temperature substantially the same as that during the etching of the Pt layer  3 . A process gas comprising BCl 3  gas, Ar gas and a carbon-containing gas such as a fluorohydrocarbon, e.g., CHF 3  may be used to etch the PZT layer  4 . Process conditions useful for etching the PZT layer  4  are, for example, a flow rate of BCl 3  of 40 standard cubic centimeters per minute (sccm), a flow rate of Ar of 90 sccm, a flow rate of CHF 3  of 5 sccm, a chamber pressure of about 2.0 Pa (15 mTorr), a power output of for plasma generation of 1500W, a substrate bias output of 150W, and a substrate temperature of 310 degrees. As a result of the etching of PZT layer  4 , portions of the PZT layer  4  that are not covered by hard masks  8  and lr electrodes  9  are removed, thereby forming dielectric portions  10  as indicated in FIG. 1 f.    
         [0019]    Subsequently, the supply of BCl 3  gas and Ar gas is terminated, and Cl 2  gas and O 2  are supplied to etch the Pt layer  3 . Upon etching the Pt layer  3 , upper Pt electrodes  11  are formed, and the formation of a ferroelectric capacitor  1  is completed, as shown in FIG. 1 j.  The hard masks  8  may remain in the semiconductor device without being removed. Alternatively, the hard masks  8  are removed by etching the hard masks  8  with a hydrofluoric acid solution.  
         [0020]    [0020]FIG. 2 a  depicts a schematic cross-sectional diagram of the dielectric portion  10  formed using the method described above. This cross-sectional diagram was prepared on the basis of a SEM photograph. The sidewall of dielectric portion  10  composed of PZT is substantially uniform, thereby indicating that side-etching has been sufficiently prevented using the above-described method.  
         [0021]    For the purpose of comparison, FIG. 2 b  depicts a schematic cross-sectional diagram of the dielectric portion  10  formed from a PZT layer formed on an Ru layer  30 . The dielectric portion  10  was etched without supplying CHF 3 . As shown in FIG. 2 b,  an overhang is formed on a sidewall  40  of the PZT layer  4 . The presence of the overhang reveals that significant side-etching occurred during the etching of the PZT layer  4 .  
         [0022]    Without wishing to be bound by any particular theory or mechanism, the inventors believe that the side-etching of the PZT layer  4  is prevented by the carbon, specifically, organic substances such as carbon-containing fragments generated from the decomposition of CHF 3  that adhere to the sidewall  40  of the PZT layer  4 .  
         [0023]    The flow rate of the carbon-containing gas, such as CHF 3 , supplied to the chamber is, in an illustrative embodiment, not less than 1 sccm. When the flow rate of the carbon-containing gas is less than 1 sccm, prevention of the side-etching effect may be insufficient because the carbon or the organic substances generated from the decomposition of, for example, CHF 3 , cannot cover the sidewall sufficiently. Furthermore, if the flow rate of carbon-containing gas is greater than  10  sccm, the material adhering to the sidewall  40  may be too thick and peel off, thus failing to prevent side-etching.  
         [0024]    Furthermore, the carbon-containing gas may be supplied at a flow rate that is not less than 1% by mole with respect to a total flow rate of the process gas supplied during the etching. It is believed that if the ratio of the carbon-containing gas to BCl 3  gas is too small, the side-etching cannot be prevented due to an insufficient amount of material adhering to the sidewall. It is also believed that if the carbon-containing gas is supplied in a concentration greater than 10% by mole, the carbon-containing gas would inhibit the etching of the PZT layer  4 .  
         [0025]    In an alternative embodiment of the invention, the process gas used to etch the PZT layer  4  comprises a nitrogen-containing gas such as N 2 . The flow rate of the N-containing gas may be between  1  standard cubic centimeter per second (sccm) and 10 sccm. Furthermore, the ratio of the N-containing gas to the total process gas flow rate may be between 1% by mole and 10% by mole. Without wishing to be bound by any particular theory or mechanism, the inventors believe that active nitrogen species such as nitrogen radicals and nitrogen ions generated within the plasma combine with the reaction products of other gases forming products that adhere to the sidewall of the PZT layer to prevent the sidewall from etching. The use of nitrogen-containing gas may result in preventing side wall etching due to the generation of nitrogen radicals and nitrogen ions in the plasma.  
         [0026]    In one embodiment of the invention, when etching the PZT layer  4 , the process gas comprises BCl 3 , a carbon-containing gas and a nitrogen-containing gas. The flow rate of the N-containing gas may be substantially the same as the flow rate of the CHF 3  gas.  
         [0027]    [0027]FIG. 3 shows a plasma etching apparatus employed to etch the lr layer  5 , the Pt layer  3 , and the PZT-based ferroelectric layer  4 . The substrate  2 , after having a multi-layer film formed thereon, is placed in an etching chamber  31  of an etching apparatus  30 . The plasma etching apparatus  30  comprises the etching chamber  31 , a gas supply source  32 , a high-frequency power source  33 , a temperature regulator  34  and a gas exhausting system (not shown). An electrode  35  for supplying high-frequency power, and a substrate support  36  for carrying substrate  2  are disposed in the etching chamber  31 . The substrate support  36  has, for example, a heater  36   a  disposed therein. The heater  36   a  is controlled by the temperature regulator  34 , and the temperature of the substrate support  36  is thereby set to a predetermined temperature. The temperature of the substrate  2  placed on the substrate support  36  is defined by the temperature of the substrate support  36 . In the plasma etching apparatus  30 , the temperature of the substrate support  36  can be raised to, for example, about 400 degrees, as a temperature within the range suitable for the etching of the PZT-based ferroelectric layer  4 . After being placed on the substrate support  36 , the substrate  2  is maintained at a temperature exceeding 100 degrees.  
         [0028]    [0028]FIG. 4 is a circuit diagram showing an example of a memory cell semiconductor  20  device comprising a ferroelectric capacitor  1  and a field effect transistor (FET). The capacitor is formed using an etching process according to embodiments described herein. The capacitor  1  comprises dielectric portions such as the dielectric portions  10  shown in FIG. 1 i.  The dielectric portions  10  are ferroelectric and may thereby exhibit hysteresis characteristics, as depicted in FIG. 6, thereby providing the device  20  with a memory effect. In FIG. 6, the abscissa represents an applied electric field and the ordinate represents polarization.  
         [0029]    Using the etching process of the present invention, the side-etching of the PZT layer is prevented. Semiconductor devices manufactured using the method of the present invention are advantageous in that the reliability of the devices formed is improved.  
         [0030]    The scope of the present invention is not limited to the embodiments discussed above. For example, while the conductive layers are described above as iridium (Ir) and platinum (Pt) layers, other materials, including other precious metals such as ruthenium (Ru), and the like, as well as conductive oxides such as iridium oxide (IrO 2 ) and ruthenium oxide (RuO 2 ) may be used. Furthermore, while the ferroelectric layer is described above as a PZT layer, the ferroelectric layer may include other elements such as lanthanum (La), niobium (Nb) and bismuth (Bi). Furthermore, the above description details the use of the etching method for use in the fabrication of a capacitor, the etching method of the present invention may be used to form other devices. Furthermore, while the hard masks are described above as a SiO 2  layer, hard masks comprising a silicon-based inorganic insulating layer or hard masks composed of titanium nitride (TiN) may also be used.  
         [0031]    Similarly, the carbon-containing gas is not limited to CHF 3 . In general, it may be a compound represented by a chemical formula C x H y  or C x H y F z , such as, for example, C 2 H 4 . Furthermore, the nitrogen-containing gas is not limited to N 2  and may include, for example, NF 3 .  
         [0032]    While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Technology Classification (CPC): 7