Patent Abstract:
A semiconductor device includes a transmitter, a termination resistance adjusting section, a transmitter control section and a control signal generating section. The transmitter has two output terminals and operates based on a control current. The termination resistance adjusting section is connected with the output terminals of the transmitter and applies a termination resistance adjusted in response to a control signal to each of the output terminals of the transmitter. The transmitter control section supplies the control current to the transmitter in response the control signal. The control signal generating section compares a first voltage corresponding to an external resistance and a second voltage corresponding to an internal resistance whose precision is lower than that of the external resistance, and outputs the control signal to the termination resistance adjusting section and the transmitter control section based on the comparing result.

Full Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a semiconductor device, and more particularly relates to a semiconductor device with a termination resistance adjusting circuit for adjusting a termination resistor. 
     2. Description of the Related Art 
     A technique is conventionally known in which a termination resistor is built in a semiconductor device in order to attain cost-down of a transmission system and reduction of a substrate mounting area. When the termination resistor built in the semiconductor device is not adjusted, there may be a high possibility that the resistance of the termination resistor has a wide distribution due to manufacturing variation of the termination resistor. If the resistance of the termination resistor is out of a desired range, signal reflection is caused to deteriorate transmission quality, which results in the decrease in a production yield. Also, the resistance of the termination resistor is a factor to determine an output signal voltage of a transmitting circuit in the transmission system. Therefore, stabilization of both the resistance of the termination resistor and the output signal voltage is required. 
     Conventional techniques are known in Japanese Laid Open Patent Application (JP-P2003-298395A and JP-P2004-32721A: first and second conventional examples), in which a resistance adjusting circuit is built in a semiconductor device to operate a circuit adequately even if the resistance of a termination resistor is out of a desired range. 
       FIG. 1  is a block diagram showing the configuration of a termination resistance adjusting circuit  100  in the first conventional example. In the first conventional example, a stable reference current Iref is generated based on reference voltages VrefH and VrefL and an external resistance  119  and is applied to a replica resistor  130 . Voltages Va and Vb generated at that time, and the reference voltages VrefH and VrefL are compared by a control voltage generator  120 . Thus, the control voltage generator  120  recognizes the difference between the replica resistor  130  and the external resistance  119  from the comparison result and carries out an adjustment so that the resistance of the replica resistor  130  and that of the external resistance  119  are coincident with each other. 
     Also,  FIG. 2  is a block diagram showing the configuration of an impedance variable circuit  200  in the second conventional example. In the impedance variable circuit shown in  FIG. 2 , a synthetic resistance of resistors ( 201  to  209 ) is varied by controlling switches (SW 1  to SW 9 ) and is used as a termination resistor. 
       FIG. 3  is a circuit diagram showing a specific circuit configuration of a termination resistance adjusting circuit  300 , which is constituted from the above-mentioned termination resistance adjusting circuit  100  and the impedance variable circuit  200 . As shown in  FIG. 3 , the termination resistance adjusting circuit  300  is composed of a termination resistor generator  101 , a transmitting circuit  102 , a first reference current generator  104 , a second reference current generator  105  and a termination resistance controller  106 . In the termination resistance adjusting circuit  300 , the first reference current generator  104  generates a stable reference current Iref 1  based on a reference voltage Vref and an external resistance  109 , and applies the reference current Iref 1  to a replica resistor  130  of the termination resistance controller  106 . Also, the second reference current generator  105  generates a stable reference current Iref 4  based on a reference voltage Vref and an internal resistance  108 , and applies the reference current Iref 4  to a replica resistor  131  of the termination resistance controller  106 . The termination resistance controller  106  compares a voltage V 1  generated based on the current Iref 1  and the resistor  130  and a voltage V 2  generated based on the current Iref 4  and the resistor  131 , and recognizes the difference between the internal resistance  108  and the external resistance  109  from the comparing result. Then, the termination resistance controller  106  outputs a control signal Vcont to the termination resistor generator  101  based on the comparing result. The termination resistor generator  101  generates a resistance through separation and synthesis of resistors in response to the control signal Vcont, such that a precision of the internal resistance is coincident with that of the external resistance. 
     When the termination resistor is assumed to be a resistor value R 150  and the reference current is assumed to be a reference current Iref 2 , a transmitting circuit output voltage Vo is represented by:
 
 Vo=R 150* I ref2   (1)
 
     In the conventional termination resistance adjusting circuit  300  shown in  FIG. 3 , the voltages V 1  and V 2  are compared. The voltage V 2  is generated when the current Iref 4  is applied to the resistor  131 . The current Iref 4  is generated based on a reference voltage Vref and the internal resistance  108 . The reference voltage Vref is supplied from a band gap power supply circuit or the like, in which an output voltage variation caused due to external factors such as a temperature variation, a power source voltage variation and the like is small. 
     The voltage V 1  is generated when the current Iref 1  is applied to the resistor  130 . The current Iref 1  is generated based on the reference voltage Vref and the external resistance  109  which is more stable than the internal resistance in an absolute precision. The reference voltage Vref is supplied from the above-mentioned band gap power supply circuit or the like. 
     Here, when the internal resistances  108  and  131  are assumed to be R 108  and R 131 , respectively, and the external resistance  109  and the internal resistance  130  are similarly assumed to be R 109  and R 130 , respectively, the voltages V 1  and V 2  are represented by the following equations.
 
 V 2=( V ref/ R 108)* R 131   (2)
 
 V 1=( V ref/ R 109)* R 130   (3)
 
In this case, since the internal resistances  131  and  108  have the same structure, the relative precision is insured. Therefore, the item of “R 131 /R 108 ” in the above equation (2) has a constant value. Thus, the voltage V 2  is the stable voltage similar to the reference voltage Vref.
 
     Also, since the external resistance  109  has an extremely high precision as compared with the internal resistance, the item of “Vref/R 109 ” in the above equation (3) can be regarded as a constant value. Thus, the voltage V 1  is a value proportional to the internal resistance  130 .  FIG. 4  shows the above relation. When the voltages V 1  and V 2  are compared, if the voltage V 1  is determined to be excessively higher than the voltage V 2  (namely, the internal resistance is excessively high), the control signal Vcont is outputted to adjust the resistance R 150  to a low value. Consequently, the precision of the termination resistor  150  after the adjustment is similar to that of the external resistance  109 . 
     However, the actual adjustment is carried out in a step manner of a definite range. Thus, even in the ideally adjusted state, the resistances before and after the adjustment are discontinuous, which brings about an error depending on the adjustment resolution of the termination resistor  150 . In particular, it could be understood that the maximum error (ERR) is generated in the vicinity of the adjustment. 
     Under the assumption that the termination resistor has been adjusted, a fixed current Iref 2  is generated based on the stable power voltage Vref and the external resistance  109  and applied to the transmitting circuit  102 . Thus, the transmitting circuit output voltage Vo is a function of the termination resistor  150 , as represented by the following equation (4).
 
 Vo=I ref2* R 150   (4)
 
       FIG. 5  is a diagram showing the waveform of an output signal outputted from the termination resistance adjusting circuit  300 . With reference to the waveform shown in  FIG. 5 , the voltage error +ERR, −ERR remains in the output signal waveform due to the adjustment error of the termination resistor  150 . The voltage error +ERR, −ERR sometimes causes poor measurement reproducibility or a large deviation of the output voltage of the transmitting circuit  102 . 
     In order to avoid these problems, a method is known in which the adjustment resolution is made higher. However, if such a method is employed, the higher precision of the termination resistance controller  106  is required, which leads to a larger circuit scale. Also, since the number of switching circuits in the termination resistor generator  101  is increased, a capacitive load becomes greater, which restricts a frequency band. 
     The termination resistance adjusting circuit is desired in which the adjustment error to the termination resistor has no influence on the output voltage, without the increase in the circuit scale and the limitation on the frequency band. 
     SUMMARY OF THE INVENTION 
     In an aspect of the present invention, a semiconductor device includes a transmitter, a termination resistance adjusting section, a transmitter control section and a control signal generating section. The transmitter has two output terminals and operates based on a control current. The termination resistance adjusting section is connected with the output terminals of the transmitter and applies a termination resistance adjusted in response to a control signal to each of the output terminals of the transmitter. The transmitter control section supplies the control current to the transmitter in response the control signal. The control signal generating section compares a first voltage corresponding to an external resistance and a second voltage corresponding to an internal resistance whose precision is lower than that of the external resistance, and outputs the control signal to the termination resistance adjusting section and the transmitter control section based on the comparing result. 
     Here, the control signal generating section may include a first reference current generating section which generates a first reference current corresponding to the external resistance, a second reference current generating section which generates a second reference current corresponding to the internal resistance, and a termination resistor control section. The termination resistor control section generates the first voltage and the second voltage based on the first reference current and the second reference current, respectively, and supplies the control signal to the termination resistance adjusting section and the transmitter control section by comparing the first and second voltages. 
     Also, the transmitter control section may include a reference resistance adjusting section configured to apply a reference resistance corresponding to the termination resistor in response to the control signal, and a control current generating section configured to generate and supply the control current corresponding to the reference resistance to the transmitter. 
     In this case, the reference resistance adjusting section may include a reference basic resistor, a reference adjustment resistor, and a reference switch circuit configured to connect the reference adjustment resistor with the reference basic resistor in parallel in response to the control signal. Also, the control current generating section may include an amplifier having a positive input connected with a first reference voltage, a first transistor having a gate connected with an output of the amplifier, and a source connected with the reference resistance adjusting section and a negative input of the amplifier, and a current mirror circuit connected with a drain of the first transistor, and to supply the control current as an output current to the transmitter. 
     Also, the termination resistance adjusting section may include a basic resistor provided for each of the output terminals of the transmitter, a adjustment resistor provided for each of the output terminals of the transmitter, and a switch circuit configured to connect the adjustment resistor with the basic resistor in parallel in response to the control signal. 
     Also, it is preferable that a ratio of a resistance of the reference basic resistor and a resistance of the reference adjustment resistor is equal to a ratio of a resistance of the basic resistor and a resistance of the adjustment resistor. 
     Also, the transmitter may include a differential transistor pair configured to drive the output terminals of the transmitter, and a constant current source connected with the differential transistor pair, and configured to supply the differential transistor pair with a constant current determined based on the control current. Instead, the transmitter may include a differential transistor pair configured to drive the output terminals of the transmitter. The control current is supplied as a constant current for the differential transistor pair. 
     In another aspect of the present invention, a method of adjusting a transmitter in a semiconductor device is achieved by generating a control signal based on an external resistance and an internal resistance built in the semiconductor device, wherein a precision of the external resistance higher than that of the internal resistance; by adjusting load resistances of differential transistor pair as termination resistors in response to the control signal; and by adjusting a constant current for the differential transistor pair in response to the control signal. 
     The generating a control signal may be achieved by generating a first reference current corresponding to the external resistance; by generating a second reference current corresponding to the internal resistance; by generating a first voltage and a second voltage based on the first reference current and the second reference current, respectively; and by comparing the first and second voltages to generate the control signal. 
     Also, the adjusting load resistances of differential transistor pair may be achieved by connecting an adjustment resistor with a basic resistor in parallel in response to the control signal. 
     Also, the adjusting a constant current may be achieved by adjusting a reference resistance corresponding to the termination resistors in response to the control signal; and by supplying the control current corresponding to the reference resistance to the differential transistor pair. 
     In this case, the adjusting a reference resistance may be achieved by connecting a reference adjustment resistor with a reference basic resistor in parallel in response to the control signal to generate the reference resistance. 
     Also, the supplying the control current may be achieved by controlling a current flowing through the reference resistance based on a reference voltage; and by supplying as the control current a current corresponding to the current flowing through the reference resistance to the differential transistor pair by a mirror circuit. 
     Also, a ratio of a resistance of the reference basic resistor and a resistance of the reference adjustment resistor is equal to a ratio of a resistance of the basic resistor and a resistance of the adjustment resistor. 
     In another aspect of the present invention, a semiconductor device includes a transmitter having a differential transistor pair, a control section configured to generate a control signal based on an external resistance and an internal resistance built in the semiconductor device, wherein a precision of the external resistance higher than that of the internal resistance; a termination resistance adjusting section configured to adjust load resistances of the differential transistor pair as termination resistors in response to the control signal; and a transmitter control section configured to control a constant current for the differential transistor pair in response to the control signal. 
     Here, the transmitter control section may include a reference resistance adjusting section configured to adjust a reference resistance corresponding to the termination resistors in response to the control signal; and a supplying section configured to supply the control current corresponding to the reference resistance to the differential transistor pair. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block diagram showing a configuration of a termination resistance adjusting circuit in a first conventional example; 
         FIG. 2  is a circuit diagram showing a configuration of an impedance variable circuit in a second conventional example; 
         FIG. 3  is a circuit diagram showing a configuration of the termination resistance adjusting circuit when the second conventional example is applied to the first conventional example; 
         FIG. 4  is a waveform diagram showing an operation of the conventional termination resistance adjusting circuit shown in  FIG. 3 ; 
         FIG. 5  is a diagram showing the waveform of an output signal from a transmitting circuit in the conventional termination resistance adjusting circuit shown in  FIG. 3 ; 
         FIG. 6  is a circuit diagram showing a configuration of a termination resistance adjusting circuit in an embodiment of the present invention; 
         FIG. 7  is a circuit diagram showing a configuration of a transmitting circuit in the embodiment of the present invention; 
         FIG. 8  is a diagram showing signal waveforms in an operation of the termination resistance adjusting circuit according to the embodiment of the present invention; and 
         FIG. 9  is a diagram showing the waveform of an output signal from the transmitting circuit in the termination resistance adjusting circuit according to the embodiment of the present invention. 
     
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Hereinafter, a semiconductor device with a termination resistance adjusting circuit of the present invention will be described in detail with reference to the attached drawings. 
       FIG. 6  is a circuit diagram showing the configuration of the termination resistance adjusting circuit  10  in the embodiment of the present invention. As shown in  FIG. 6 , the termination resistance adjusting circuit  10  is provided with a termination resistor generator  1 , a reference current corrector  3 , a first reference current generator  4 , a second reference current generator  5  and a termination resistance controller  6 . The reference current corrector  3  includes a reference resistance generator  7  and a reference current generator  8 . 
     The first reference current generator  4  generates a reference current Iref 1  based on a reference voltage Vref and an external reference resistor  19 . The first reference current generator  4  supplies the generated reference current Iref 1  to the termination resistance controller  6 . Similarly, the second reference current generator  5  generates a current Iref 4  based on the reference voltage Vref and an internal reference resistor  18 . The second reference current generator  5  supplies the generated reference current Iref 4  to the termination resistance controller  6 , as well as to the first reference current generator  4 . The termination resistance controller  6  applies the reference current Iref 1  to an internal resistance  20 . Consequently, a voltage of a node N 1  becomes a voltage V 1 , and the voltage V 1  is applied to a control signal generating circuit  61 . Similarly, the termination resistance controller  6  applies the reference current Iref 4  to an internal resistance  21 . Consequently, a voltage of a node N 2  becomes a voltage V 2 , and the voltage V 2  is applied to the control signal generating circuit  61 . The control signal generating circuit  61  compares the voltages V 1  and V 2 . The termination resistance controller  6  outputs the comparison result as a control signal Vcont to the termination resistor generator  1  and the reference current corrector  3 . The termination resistor generator  1  receives the control signal Vcont and adjusts a termination resistor  11  and a termination resistor  14 . In the following explanation, since the configuration and operation of the termination resistor  14  are similar to those of the termination resistor  11 , the termination resistor  11  is mainly explained. 
     The reference resistance generator  7  receives the control signal Vcont from the termination resistance controller  6 , adjusts the resistance of a reference resistor  71  to a resistance R 51 . The reference current generator  8  generates a reference current Iref 3 , which is obtained by applying a reference voltage Vref 2  to the adjusted resistor value R 51 , and supplies the reference current Iref 3  to the transmitting circuit  2 . The reference resistance generator  7  includes a reference resistor  71 , and the reference resistor  71  is composed of a basic resistor  73  and an adjustment resistor  72  to be connected in parallel to the basic resistor  73 . As shown in  FIG. 6 , the adjustment resistor  72  is connected to a switch circuit S 1 . The switch circuit S 1  is operated in response to the control signal Vcont outputted from the termination resistance controller  6 . Preferably, the switch circuit S 1 , basic resistor  73  and adjustment resistor  72 , which constitute the reference resistance generator  7 , have the same structures as those constituting the termination resistor generator  1 , so as to be matched with the termination resistor generator  1 . 
     The reference current generator  8  includes an operational amplifier OP 1 , a transistor MP 1 , a transistor MN 1  and a transistor MN 2 . As shown in  FIG. 6 , a gate of the transistor MP 1  is connected to an output end of the operational amplifier OP 1 . A source of the transistor MP 1  is connected to the reference resistance generator  7 . Also, the source of the transistor MP 1  is connected to a negative feedback input terminal of the operational amplifier OP 1 . The transistor MN 1  and the transistor MN 2  constitute a current mirror circuit. A drain of the transistor MP 1  is connected to the gate and drain of the transistor MN 1 . In the reference current generator  8 , the output of this current mirror acts as an output terminal. 
       FIG. 7  is a circuit diagram showing the configuration of the transmitting circuit  2  in the embodiment of the present invention. As shown in  FIG. 7 , the transmitting circuit  2  is composed of a differential transistor pair. The adjusted termination resistors  14  and  11  function as load resistances of the differential transistor pair. In this embodiment, a constant current for the differential transistor pair is supplied as the reference current Iref 3  from the current mirror circuit of the reference current generator  8 . Although not showing, a constant current source may be separately provided and may supply a constant current to the differential transistor pair based on the reference current Iref 3 . When the resistance of the termination resistor  11  is assumed to be a resistance R 50  and the reference current Iref 3  is used, a transmission output level Vo of the transmitting circuit  2  is represented by:
   Vo=R 50* I ref3 
from  FIG. 9 .
 
     The first reference current generator  4  has a stabilized band gap power supply or the like, and generates the reference current Iref 1  by applying a voltage Vref from the stabilized power supply to the external internal resistance R 19 . Also, the second reference current generator  5  has a stabilized band gap power supply similar to that of the first reference current generator  4 , and generates the reference current Iref 4  by applying the voltage Vref from the stabilized band gap power supply to the internal resistance  18  which is expected to have the same value as the external resistance R 19 . Thus, the reference current Iref 1  and the reference current Iref 4  can be represented by the following equations:
 
 I ref1= V ref/ R 19
 
 I ref4= V ref/ R 18
 
     The generated reference current Iref 1  is applied to the internal resistance  20 , and the reference current Iref 4  is applied to the internal resistance  21 . The termination resistance controller  6  compares the voltage V 1  generated by the internal resistance  20  and the voltage V 2  generated by the internal resistance  21 . The voltages V 1  and V 2  can be represented by the following equations:
 
 V 1= I ref1* R 20= V ref/ R 19* R 20  (5)
 
 V 2= I ref4* R 21= V ref/ R 18* R 21  (6)
 
     The termination resistor generator  1  receives the control signal Vcont outputted from the termination resistance controller  6  and drives the switch circuit. Since the switch circuit is turned on, the basic resistor  13  and an adjustment resistor  12  are connected in parallel. When the resistance of the adjustment resistor  12  is assumed to be a resistance R 12  and when the resistance of the basic resistor  13  is assumed to be a resistance R 13 , its synthesized resistance R 50  is changed as follows:
 
 R 50= R 13* R 12/( R 13+ R 12)  (7)
 
     Here, the reference resistance generator  7  similarly receives the control signal Vcont outputted from the termination resistance controller  6  and drives the switch circuit. Since the switch circuit is turned on, the basic resistor  73  and the adjustment resistor  72  are connected in parallel. When the resistance of the basic resistor  73  is assumed to be a resistor value R 73  and when the resistance of the adjustment resistor  72  is assumed to be a resistor value R 72 , its synthesized resistor value R 51  is changed as follows:
 
 R 51= R 73* R 72/( R 73+ R 72)  (8)
 
     The reference current generator  8  applies the reference voltage Vref 2  to the reference resistor value R 51  provided by the reference resistance generator  7  and generates the reference current Iref 3 . The reference current generator  8  supplies the current Iref 3  to the transmitting circuit. If the reference resistor value R 51  is adjusted, the reference current Iref 3  is also corrected at the same time.  FIG. 8  is a diagram showing an operational of the termination resistance adjusting circuit  10  in this embodiment. As shown in  FIG. 8 , the operation waveform of the reference current Iref 3  has a relation between the reference resistor R 51  and the termination resistor R 50 , and it can be represented by the following equation:
 
 I ref3= V ref2/ R 51
 
For this reason, the output signal voltage Vo of the transmitting circuit  2  is represented by a product of the reference current Iref 3  and the resistance R 50  of the termination resistor  11 , and it is represented by the following equation:
 
 Vo=I ref3* R 50= V ref2* R 50/ R 51  (9)
 
     At this time, the termination resistor generator  1  and the reference resistance generator  7  are adjusted at the same time. As a result, the ratio between the resistance R 12  of the adjustment resistor  12  and the resistance R 13  of the basic resistor  13 , and the resistance R 73  of the basic resistor  73  and the resistance R 72  of the adjustment resistor  72  is set as follows:
 
 R 13: R 12= R 73: R 72
 
Since the respective resistances are set as mentioned above, the following relation is always established between the synthesized resistance R 50  expressed by the equation (7) and the synthesized resistance R 51  expressed by the equation (8):
 
 R 50∝ R 51
 
At this time, the item of “R 50 /R 51 ” in the equation (9) becomes a constant value in the meaning. Thus, the output voltage can be represented as a function that does not contain a term depending on a resistance, as follows:
 
 Vo∝V ref2
 
       FIG. 9  is a diagram showing the output waveform of the transmitting circuit when the termination resistance adjusting circuit in the embodiment of the present invention is employed. With reference to  FIG. 9 , the output signal voltage Vo is outputted as a constant value. This implies that the constant output signal voltage Vo is obtained irrespectively of the controlled state of the internal resistance R 51 . 
     As described above, according to the present invention, it is possible to design the termination resistance adjusting circuit in which the adjustment error due to the resistance of the termination resistor has no influence on the output voltage.

Technology Classification (CPC): 7