Patent Abstract:
A protection circuit for metal-oxide-semiconductor field-effect transistors (MOSFETs) that are used as active bypass diodes in photovoltaic solar power systems is disclosed. The protection circuit comprises, a detection circuit for detecting the start of a surge event, a switch disposed to connect the MOSFET&#39;s drain to it&#39;s gate in response to the start of the surge, a diode in series with the switch, a bistable circuit for keeping the switch closed during the surge, and a means of resetting the bistable circuit after the surge.

Full Description:
[0001]    This application claims priority from U.S. Provisional Patent Application No. 61/617,335, filed on 29 Mar. 2012. 
     
    
     BACKGROUND 
       [0002]    The invention relates generally to the field of photovoltaic (PV) solar power systems, and more specifically to circuits for protecting PV active bypass circuits from damage caused by electrical surges. 
         [0003]      FIG. 1  is a high level block diagram of a conventional PV solar power system  10  including a plurality of PV subsections  11  connected in series. Each PV subsection  11  comprises a plurality of PV cells that are serially connected between a positive terminal  12  and a negative terminal  13 . For example, a typical PV subsection includes twenty four PV cells, and produces about 12V between  12  and  13  in full sunlight. An inverter  15  converts the dc voltage to ac and has an output  16  for coupling to the electrical power grid. There is also usually a disconnect switch  17  for shutting down the system  10 . 
         [0004]    Since the PV subsections  11  are connected in series, the current is the same in each subsection. Therefore, when one subsection is shaded (e.g., by a tree branch, or chimney) it acts like a bottleneck, restricting current flow in the entire string. The unshaded PV subsections try to force current flow through the shaded subsection, resulting in the shaded subsection becoming reverse-biased. But a reverse-biased PV cell dissipates energy instead of producing energy, so the shaded subsection gets hot, and can even be permanently damaged. The well known remedy is to include bypass diodes  14  that allow current to flow around the shaded PV subsections, rather than through them. Thus, the bypass diodes  14  protect the PV subsections from damage due to reverse bias, and also avoid a serious reduction in system  10  efficiency when the string is partially shaded. 
         [0005]    A common problem in PV systems, such as  10 , is overheating in one or more of the bypass diodes  14 . One solution is to replace the conventional bypass diodes  14  with active bypass circuits. There are many examples of such active bypass circuits in the prior art such as: U.S. Patent Application Publication number 2010/0002349 (La Scala, et al), U.S. Pat. No. 7,898,114 (Schmidt, et al), U.S. Patent Application Publication number 2009/0014050 (Haaf), and U.S. Patent Application Publication number 2011/0006232 (Fahrenbruch, et al). 
         [0006]      FIG. 2  is a high level block diagram that is typical of such prior art, showing an active bypass circuit  20  comprising: a metal-oxide-semiconductor field-effect transistor (MOSFET)  22  with an integral body diode  21 , and a power-supply/control circuit  24 . When the PV subsection  11  is partially shaded, the string current initially flows through the MOSFET&#39;s body diode  21 , creating a voltage (V DS ) of approximately −500 mV from drain  12  to source  13 . The power-supply/control circuit  24  amplifies V DS , producing approximately 5V between the MOSFET&#39;s gate  23  and it&#39;s source  13 , thereby turning on the MOSFET  22  and reducing heat dissipation. When the PV subsection  11  is unshaded, the polarity of the drain-to-source voltage reverses, causing the power-supply/control circuit  24  to shut down and discharge the gate-to-source capacitance of the MOSFET  22 , thereby turning off the MOSFET  22  again. 
         [0007]    Another problem with conventional bypass diodes  14  is low reliability. For example, a 2012 report (Kato, et at) from Japan&#39;s Research Center for Photovoltaic Technologies (RCPVT) found that 47% of the 1272 solar power modules they examined, at a large PV installation called Mega-Solartown, had at least one failed bypass diode, after just eight years of service. And in 2010 an official report from the Solar American Board of Codes and Standards (www.solarabcs.org) stated “ . . . undetected bypass diode failures may be an endemic industry-wide sleeper problem . . . ”. 
         [0008]    And yet, the PV industry still knows little about the true extent or causes of these bypass diode failures. One of the main suspected causes is electrical surges, which may destroy the diodes outright, or just weaken them, making them more susceptible to thermal runaway. There are at least two types of surges that can happen in PV systems: an inrush surge when the cutoff switch  17  is closed; and lightning-induced surges. 
         [0009]    For example,  FIG. 1  shows how a nearby lightning strike can induce current surges that damage or destroy bypass diodes  14 . There are many places in the world where lightning strikes are frequent, and a lightning rod  6  is often placed in close proximity to a solar power array to prevent the lightning  5  from striking the array directly. The lightning discharge current I DIS —which can easily exceed 40 kA—flows down the lightning rod  6  and into earth  8  via a ground wire  7 . An intense magnetic field is formed around the wire  7 . If the ground wire  7  comes close to a PV subsection  11 , as shown at the bottom of  FIG. 1 , then some of the magnetic flux lines  9  can link the circuit loop consisting of the PV subsection  11  and the bypass diode  14 , causing an induced current I SURGE  to flow through the bypass diode  14 . 
         [0010]    I SURGE  can exceed 200 A at it&#39;s peak, and can flow in either direction. If I SURGE  flows through the bypass diode  14  in the forward direction, there is only a small voltage drop across the diode, typically 2V or less. However, if I SURGE  flows through the bypass diode  14  in the reverse direction, the diode  14  goes into avalanche breakdown, and the voltage across the diode  14  is typically about 50V. So, reverse current flow is the worst case by far, because the diode  14  absorbs much more energy. 
         [0011]    For example, assume the peak surge current is 200 A, and the avalanche voltage is 50V. Then the peak power in the diode  14  during the surge is (200 A)(50V)=10 kW. But the surge typically has an effective width of only about 20 μs, so the energy absorbed by the diode is roughly (20 μs)(10 kW)=200 mJ. The diode must absorb all the energy because the surge happens too quickly for heat to diffuse out through the diode&#39;s package, so heat-sinks are of no use in reducing the sudden spike in junction temperature. Consequently, the diode&#39;s junction temperature suddenly shoots up, as much as 70° C., possibly with catastrophic results. In fact, some Schottky diodes used for bypass in PV systems fail at only about 50 mJ avalanche energy. 
         [0012]    Active bypass circuits such as  20  can usually absorb more energy than traditional Schottky bypass diodes, but not much. For example, low-cost MOSFETs used in active bypass circuits for PV systems typically have avalanche energy ratings of about 75 mJ to 100 mJ. 
         [0013]    Therefore, there is a need in the solar power industry for a low-cost means of protecting MOSFETs in active bypass circuits against damage caused by electrical surges. 
       SUMMARY 
       [0014]    The protection circuit disclosed herein turns on the MOSFET in a PV active bypass circuit at the beginning of a surge, and keeps it turned on until after the surge is ended. This greatly reduces the drain-to-source voltage during the surge, thereby greatly reducing the energy absorbed by the MOSFET. 
         [0015]    Other features and advantages of the present invention disclosed herein will become apparent from the following more detailed description, when taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the invention. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0016]    The accompanying drawings illustrate the invention. In such drawings: 
           [0017]      FIG. 1  is a high level block diagram of a conventional photovoltaic solar power system; 
           [0018]      FIG. 2  is a high level block diagram of a conventional active bypass circuit; 
           [0019]      FIG. 3  is a high level block diagram of an active bypass circuit with the protection circuit disclosed herein; 
           [0020]      FIG. 4  shows example waveforms to illustrate the operation of the protection circuit. 
           [0021]      FIG. 5  is a simplified schematic diagram of a first exemplary embodiment of the protection circuit; and 
           [0022]      FIG. 6  is a simplified schematic diagram of a second exemplary embodiment of the protection circuit. 
       
    
    
     DETAILED DESCRIPTION 
       [0023]      FIG. 3  is a high level block diagram showing a subsection  11  of a PV array, with an active bypass circuit  20  that utilizes a power MOSFET  22 , and a protection circuit  30  as disclosed herein. The protection circuit  30  comprises: a switch  31  that couples the MOSFET&#39;s  22  drain to it&#39;s gate when closed; a diode  32  in series with the switch  31 ; a bistable circuit  33  for controlling the switch  31 ; and a detection circuit  34  for setting the bistable circuit  33 . 
         [0024]      FIG. 4  shows example waveforms to illustrate the operation of the protection circuit  30  and it&#39;s major advantages. The upper waveform is the surge current I SURGE , consistent with the 8 μs/20 μs waveform shape defined in the IEC 61000-4-5 standard, which is commonly used to simulate a lighting strike. The lower waveforms show the drain-to-source voltage (V DS ) across the MOSFET  22  and protection circuit  30  resulting from I SURGE . 
         [0025]    V 1  is the initial value of V DS  before the surge begins. When the lightning strike occurs at night V 1  is nearly zero since there is only star light or street lamps shining on the PV subsection  11 . However, it is possible to have a lightning strike in the daytime, or some other kind of surge, such as an inrush surge when the cutoff switch  17  is closed. So V 1  could be as high as 12V. 
         [0026]    The dashed voltage waveform is typical of an active bypass circuit  20  without the protection circuit  30 . At the beginning of the surge, the MOSFET  22 , begins to avalanche. V DS  goes above the MOSFET&#39;s reverse breakdown voltage (V BR ) and stays there for the entire duration of the surge. 
         [0027]    The solid voltage waveform is typical of the an active bypass circuit  20  with the protection circuit  30  disclosed herein. Once again, V DS  shoots up at the beginning of the surge. But when V DS  exceeds a first predetermined threshold (V TRIG ) the detection circuit  34  sets the bistable circuit  33  and closes the switch  31 , thereby connecting the MOSFET&#39;s drain  12  to it&#39;s gate  23  via the diode  32 . Thus, most of V DS  is applied between the gate and source, thereby turning on the MOSFET  22 . So the MOSFET  22  quickly pulls V DS  down to V 2 , which is typically 4V to 6V depending on the characteristics of the MOSFET and the magnitude of the surge current. V 2  is below V TRIG  so the detection circuit  34  no longer asserts the switch&#39;s control signal  35 , but the bistable circuit  33  keeps  35  asserted so the switch  31  stays closed. 
         [0028]    The bistable circuit  33  keeps the switch  31  closed until it is reset in response to V DS  falling below a second predefined threshold (V RST ). For example, after the peak, the current through the MOSFET  22  drops off rapidly, but the diode  31  acts like a peak detector, blocking the discharge of the MOSFET&#39;s  22  gate-to-source capacitance. If there is sunlight, the PV subsection  11  will try to keep V DS  above about 10V, but a typical PV subsection  11  has a short-circuit current of less than 10 A, while the gate-to-source voltage of  22  is still large enough to sink I PEAK . So the MOSFET  22  is able to pull V DS  down to less than 100 mV typically, which is well below V RST . 
         [0029]    Thus, the power MOSFET  22 , it&#39;s gate-to-source capacitance, and the diode  32  constitute a means for resetting the bistable circuit  33  in response to the drain-to-source voltage being relatively lesser than the second predefined voltage threshold, V RST . 
         [0030]    The affect the protection circuit  30  has, of reducing V DS  during the surge, reduces the energy absorbed by the MOSFET  22 , typically by up to 80% compared to the unprotected MOSFET represented by the dashed curve in  FIG. 4 . 
         [0031]    Two exemplary embodiments of the protection circuit  30  will now be shown in more detail. 
         [0032]      FIG. 5  shows a simplified schematic of a first exemplary embodiment of the protection circuit  30  wherein: items  54 - 56  constitute the detection circuit  34 ; items  26 ,  50 ,  51 , and  57  constitute the bistable circuit  33 ; and items  50 - 53  also constitute the switch  31 . In this first exemplary embodiment, V TRIG  is the trigger transistor&#39;s  54  threshold voltage V T , scaled-up by the resistive divider  55  and  56 . For example, assume resistors  55  and  56  are 500 kΩ and 6.5MΩ respectively, and the V T  of  54  is 1.3V; then V TRIG =1.3(1+6.5/0.5)=18.2V. 
         [0033]    V TRIG  is normally chosen to be in the 17V to 25V range for two reasons. First, to avoid false triggers V TRIG  must be well above the maximum dc output voltage that the PV subsection  11  can produce in full sunlight, which is typically about 12V. And second, V TRIG  must be well below the avalanche voltage of the MOSFET  22 , which is typically 30V; otherwise, the MOSFET  22  could prevent the protection circuit  30  from triggering. MOSFETs with higher avalanche voltage are undesirable because they generally have higher on-resistance compared to 30V MOSFETs in the same price range. 
         [0034]    The two bipolar transistors  50  and  51  form a Silicon Controlled Rectifier (SCR) which is a common type of thyristor, often used in integrated circuits for ESD protection. When the trigger transistor  54  is turned on, current flows into the base of the NPN transistor  50 ; this causes current to be pulled from the base of the PNP transistor  51 , which then dumps more current into the base of the NPN  50 , making a positive feedback loop that quickly saturates both  50  and  51 . Emitter resistors  52  and  53  are often included in SCRs to avoid premature triggering due to leakage currents. 
         [0035]    Once triggered by the detection circuit  54 - 56 , the SCR stays in this saturated state after the trigger transistor  54  is turned off, until the current through the SCR drops below a critical threshold, and then it turns off. The load resistor  57  provides enough current flow through the diode  26 , typically at least a few microamps, to keep the SCR from turning off until V IN  falls below V RST  at the end of the surge event. V RST  is approximately the sum of the MOSFET&#39;s  22  gate-to-source voltage after the peak of the surge current, the diode  26  forward drop, and the collector-to-emitter saturation voltages of the bipolar transistors  50  and  51 . 
         [0036]      FIG. 6  shows a simplified schematic of a second exemplary embodiment of the protection circuit  30  wherein: items  60 - 62  constitute the detection circuit  34 ; items  63 - 66  constitute the bistable circuit  33 ; and the P-channel MOSFET  71  constitutes the switch  31 . Additionally, items  67 - 70  form a reset circuit for resetting the bistable circuit  33  at power-up. 
         [0037]    The bistable circuit  63 - 66  is a set/reset flip-flop comprising two cross-coupled N-channel FETs  65 - 66  and two pull-up resistors  63 - 64 . One of ordinary skill in the art will understand that there are many other well known flip-flop circuit topologies that could be used alternatively, such as: cross-coupled P-channel FETs, cross-coupled bipolar transistors, cross-coupled NAND gates, or cross-coupled NOR gates. 
         [0038]    Additionally, one of ordinary skill in the art will know that the switch  71  could also be implemented using a bipolar transistor, or even a junction field-effect transistor (JFET). 
         [0039]    In the reset circuit,  69  has a threshold voltage that is relatively less than the threshold of  70 . At start-up, as V DS  increases from zero,  69  turns on first, thereby initializing the state of the bistable circuit  63 - 66 . As V DS  increases further  70  turns on, which turns  69  off, thereby enabling the bistable circuit  63 - 66  to be set by the detection circuit  60 - 62  in the event of a surge. Also, V RST  is approximately equal to the threshold voltage of 70. 
         [0040]    The detection circuit  60 - 62  in this second exemplary embodiment operates similarly to the detection circuit  54 - 56  from the first exemplary embodiment, only the trigger transistor  62  is N-channel instead of P-channel. 
         [0041]    Although several embodiments have been described in detail for purposes of illustration, various modifications may be made to each without departing from the scope and spirit of the invention. Accordingly, the invention is not to be limited, except as by the appended claims.

Technology Classification (CPC): 8