Patent Abstract:
Disclosed is a light emitting device package. The light emitting device package includes a substrate comprising a recess, a light emitting chip on the substrate and a first conductive layer electrically connected to the light emitting chip. And the first conductive layer includes at least one metal layer electrically connected to the light emitting chip on an outer circumference of the substrate.

Full Description:
[0001]    This application is a continuation of U.S. application Ser. No. 13/165,741 filed on Jun. 21, 2011, which is a continuation of U.S. application Ser. No. 12/470,787 filed on May 22, 2009, now U.S. Pat. No. 7,982,237 and which claims the benefit under 35 U.S.C. §119 of Korean Patent Application No. 10-2008-0048241, filed May 23, 2008, which are hereby incorporated by reference for all purpose as if fully set forth herein. 
     
    
     BACKGROUND 
       [0002]    The embodiment relates to a light emitting device package. 
         [0003]    A light emitting device (LED) is a semiconductor device to convert a current into a light. Since a red LED has been commercialized, the red LED, together with a green LED, is used as a light source of electronic devices including information communication equipment. 
         [0004]    The light emitting device package includes a light emitting part and a phosphor. In this case, the light emitting part emits light having a first wavelength and the phosphor emits light having a second wavelength, so that the light emitting device package emitting white light can be realized. However, since the light emitted from the phosphor is absorbed into the light emitting part, light efficiency may be reduced. In addition, color deviation may occur due to the difference of optical paths of the light emitted from the light emitting part and transmitted to the phosphor. 
       BRIEF SUMMARY 
       [0005]    The embodiment provides a light emitting device package capable of improving light efficiency and reducing color deviation. 
         [0006]    According to the embodiments, a light emitting device package includes a semiconductor substrate comprising a first surface at a first depth from an upper surface of the semiconductor substrate and a second surface at a second depth from the first surface; and a light emitting part on the second surface of the semiconductor substrate. 
         [0007]    According to the embodiments, a light emitting device package includes a semiconductor substrate comprising a groove having a multi-layer structure; a light emitting part in the groove of the semiconductor substrate; a first conductive layer electrically connected to a first electrode of the light emitting part; and a second conductive layer electrically connected to a second electrode of the light emitting part. 
         [0008]    According to the embodiments, a light emitting device package includes a substrate comprising a recess; a light emitting chip on the substrate; and a first conductive layer electrically connected to the light emitting chip, wherein the first conductive layer comprises at least one metal layer electrically connected to the light emitting chip on an outer circumference of the substrate. 
         [0009]    The light emitting device package according to the embodiment can improve light efficiency and can reduce color deviation. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]      FIGS. 1 to 11  are sectional views showing the manufacturing process of a light emitting device package according to a first embodiment; 
           [0011]      FIG. 12  is a sectional view showing a light emitting device package according to a second embodiment; 
           [0012]      FIG. 13  is a sectional view showing a light emitting device package according to a third embodiment; 
           [0013]      FIG. 14  is a sectional view showing a light emitting device package according to a fourth embodiment; 
           [0014]      FIG. 15  is a sectional view showing a light emitting device package according to a fifth embodiment; 
           [0015]      FIG. 16  is a sectional view showing a light emitting device package according to a sixth embodiment; 
           [0016]      FIG. 17  is a sectional view showing a light emitting device package according to a seventh embodiment; and 
           [0017]      FIG. 18  is a sectional view showing a light emitting device package according to an eighth embodiment. 
       
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
       [0018]    Hereinafter, the embodiments will be described in detail with reference to accompanying drawings. 
         [0019]    In the description of the embodiments, it will be understood that, when a layer (or film), a region, a pattern, or a structure is referred to as being “on/over” or “below/under” another substrate, another layer (or film), another region, another pad, or another pattern, it can be “directly” or “indirectly” “on/over” or “below/under” the other substrate, layer (or film), region, pad, or pattern, or one or more intervening layers may also be present. Such a position of the layer has been described with reference to the drawings. 
         [0020]    The thickness and size of each layer shown in the drawings can be exaggerated, omitted or schematically drawn for the purpose of convenience or clarity. In addition, the size of elements does not utterly reflect an actual size. 
       First Embodiment 
       [0021]      FIGS. 1 to 11  are sectional views showing the manufacturing process of a light emitting device package according to a first embodiment. 
         [0022]    First, as shown in  FIG. 1 , first and second masks  13  and  15  are formed on upper and lower surfaces of a semiconductor substrate  11 . 
         [0023]    Next, as shown in  FIG. 2 , in order to etch the semiconductor substrate  11 , a first pattern mask  13   a  and a second pattern mask  15   a  are formed. The first and second pattern masks  13   a  and  15   a  can be formed through a photolithography process. 
         [0024]    The semiconductor substrate  11  can include single crystalline silicon, but the embodiment is not limited thereto. The semiconductor substrate  11  can be etched through a dry etching process or a wet etching process. When the semiconductor substrate  11  includes a silicon substrate, the first and second masks  13  and  15  can include a silicon nitride layer, but the embodiment is not limited. In addition, the semiconductor substrate  11  can be subject to a KOH wet etching process, but the embodiment is not limited thereto. 
         [0025]    Thereafter, as shown in  FIG. 3 , the etching process is performed to form a first semiconductor substrate  11   a  having a first surface (or first groove) formed at a first depth from an upper surface thereof. In other words, the etch shape of the first semiconductor substrate  11   a  can be adjusted according to the alignment of the first and second pattern masks  13   a  and  15   a . Accordingly, the first semiconductor substrate  11   a  can have the shape of a bathtub with the first surface formed at the first depth from the upper surface of the first semiconductor substrate  11   a , but the embodiment is not limited thereto. 
         [0026]    Subsequently, as shown in  FIG. 4 , the first and second pattern masks  13   a  and  15   a  can be removed from the first semiconductor substrate  11   a . For example, the first and second pattern masks  13   a  and  15   a  can be removed through the wet etching process, but the embodiment is not limited thereto. 
         [0027]    Thereafter, as shown in  FIG. 5 , a third mask  17  is formed on the first semiconductor substrate  11   a . The third mask  17  can include a silicon nitride layer or a silicon oxide layer, but the embodiment is not limited thereto. 
         [0028]    Then, as shown in  FIG. 6 , in order to etch the first semiconductor substrate  11   a , third and fourth pattern masks  17   a  and  17   b  are formed on upper and lower surfaces of the first semiconductor substrate  11   a . The third and fourth pattern masks  17   a  and  17   b  can be formed in a desired shape through a photolithography process, but the embodiment is not limited thereto. 
         [0029]    Next, as shown in  FIG. 7 , an etching process is performed to form a second semiconductor substrate  11   b  having a second surface (or a second groove) formed in the first surface at a second depth. The etch shape of the second semiconductor substrate  11   b  can be adjusted according to the alignment of the third and fourth pattern masks  17   a  and  17   b . The etching process for the second semiconductor substrate  11   b  can be performed along to a crystal plane (e.g., (100) or (111)) of a single crystalline substrate. 
         [0030]    Thereafter, as shown in  FIG. 8 , the third and fourth pattern masks  17   a  and  17   b  can be removed. 
         [0031]    According to the first embodiment, as shown in  FIG. 8 , the second semiconductor substrate  11   b  can have a bathtub shape, in which a first surface A having a first depth h 1  on the basis of the upper surface of the semiconductor substrate  11   b  is formed in a first region and a second surface B having a second depth h 2  is formed in a second region of the first surface A. 
         [0032]    Thereafter, as shown in  FIG. 9 , an insulating layer  19  can be formed on the second semiconductor substrate  11   b . The insulating layer  19  is formed for the electric insulation from a conductive layer formed in the subsequent process. The insulating layer  19  can include a silicon oxide layer, a silicon nitride layer, an aluminum nitride (AlN) layer, or a silicon carbide (SiC) layer, but the embodiment is not limited thereto. 
         [0033]    Next, as shown in  FIG. 10 , the conductive layer can be formed on the insulating layer  19 . The conductive layer can be electrically connected to a light emitting part that is formed in the subsequent process. First and second metal layers  21   a  and  21   b  can be formed on the insulating layer  19 , and third and fourth metal layers  23   a  and  23   b  can be formed below the insulating layer  19 . 
         [0034]    Thereafter, as shown in  FIG. 11 , a light emitting part  25  can be formed on the second semiconductor substrate  11   b . The light emitting part  25  can be realized in the form of a light emitting diode, but the embodiment is not limited thereto. The first metal layer  21   a  and/or the third metal layer  23   a  serving as a first conductive layer can be connected to a first electrode (not shown) of the light emitting part  25 , and the second metal layer  21   b  and/or the fourth metal layer  23   b  serving as a second conductive layer can be connected to a second electrode (not shown) of the light emitting part  25 . 
         [0035]    The first metal layer  21   a  and the second metal layer  21   b  formed on the upper surface of the second semiconductor substrate  11   b  can include a metal thin film having high reflectance, so that the light efficiency of the light emitting device package can be improved. In addition, the third metal layer  23   a  and the fourth metal layer  23   b  formed on the lower surface of the second semiconductor substrate  11   b  can include metal having superior adhesive strength with an adhesive such as a cream solder or the like. This can improve electric/mechanical connection with metal interconnections formed on a printed circuit board in the subsequent surface-mount technology (SMT) process. 
         [0036]    The first and second metal layers  21   a  and  21   b  can include a plurality of metal layers, and the upper most layer thereof can include aluminum (Al), silver (Ag), or APC (Ag, Pd, Cu) metal. In addition, the third and fourth metal layers  23   a  and  23   b  can include a plurality of metal layers, and the lower most layer thereof can include gold (Au), or copper (Cu). 
         [0037]    A phosphor  27  can be formed on the light emitting part  25 , and a molding part  29  can be formed on the phosphor  27 . The phosphor  27  can receive light having a first wavelength band from the light emitting part  25  and can supply light having a second wavelength band. The second wavelength band can be longer than the first wavelength band. White light can be emitted based on the light having the second wavelength band from the phosphor  27  and the light having the first wavelength band from the light emitting part  25 . The molding part  29  can protect the phosphor  27  and the light emitting part  25 . The molding part  29  can include silicon, but the embodiment is not limited thereto. 
         [0038]    According to the embodiment, as shown in  FIG. 11 , the light emitting device package can include the second semiconductor substrate  11   b , the light emitting part  25 , the first metal layer  21   a , the second metal layer  21   b , the third metal layer  23   a , the fourth metal layer  23   b , the phosphor  27 , the insulating layer  19 , and the molding part  29 . 
         [0039]    The second semiconductor substrate  11   b  can be formed in the shape of a two-stage bathtub having the first surface formed at the first depth h 1  from the upper surface of the second semiconductor substrate  11   b  and the second surface formed at the second depth h 2  from the first surface. The light emitting part  25  can be formed on the second surface of the second semiconductor substrate  11   b.    
         [0040]    The first conductive layer including the first metal layer  21   a  and the third metal layer  23   a  can be connected to the first electrode of the light emitting part  25 , and the second conductive layer including the second metal layer  21   b  and the fourth metal layer  23   b  can be connected to the second electrode of the light emitting part  25 . 
         [0041]    The first conductive layer can include the first metal layer  21   a  provided on the second semiconductor substrate  11   b  and the third metal layer  23   a  provided below the semiconductor substrate  11   b . The first metal layer  21   a  and the third metal layer  23   a  can be electrically connected to each other at an outer peripheral surface of the second semiconductor substrate  11   b.    
         [0042]    The second conductive layer can include the second metal layer  21   b  provided on the second semiconductor substrate  11   b  and the fourth metal layer  23   b  provided below the semiconductor substrate  11   b . The second metal layer  21   b  and the fourth metal layer  23   b  can be electrically connected to each other at the outer peripheral surface of the second semiconductor substrate  11   b.    
         [0043]    The phosphor  27  can be formed on the light emitting part  25 , and the molding part  29  can be formed on the phosphor  27 . The insulating layer  19  can be interposed between the semiconductor substrate  11   b  and the first conductive layer. In addition, the insulating layer  19  can be interposed between the second semiconductor substrate  11   b  and the second conductive layer. 
         [0044]    According to the embodiment, a zener diode (not shown) can be formed on the second semiconductor substrate  11   b . The zener diode can be integrated onto the semiconductor substrate  11   b  by forming a diode pattern and performing a diffusion process or an ion implantation process for the resultant structure after the insulating layer  19  has been formed, but the embodiment is not limited thereto. As the zener diode is formed, the withstanding voltage of the light emitting device package according to the embodiment can be improved. In addition, according to the embodiment, electronic elements such as a resistor or a capacitor can be integrated into the light emitting device package. 
         [0045]    In the light emitting device package according to the embodiment, a mounting region for the light emitting part  25  is formed in the shape of the two-stage bathtub, so that the light emitting part  25  is mounted on the second surface, which is formed at the bottom of the two-stage bathtub, and the first and second metal layers  21   a  and  21   b  having high reflectance can be formed on the first surface. Accordingly, light, which is emitted from the light emitting part  25  but cannot be transmitted through a light exit surface (an outer portion of the light emitting device package), is reflected toward the first surface, and light reflected from the first surface is emitted out of the light emitting device package without being incident onto the light emitting part  25 , thereby improving light efficiency. 
         [0046]    In addition, the distance between a reflective surface, such as a (111) surface formed between the first surface and the second surface, and the light emitting part  25 , and the height of the phosphor  27  provided at the upper portion of the light emitting part  25  can be reduced. Accordingly, the light emitted from the light emitting part  25  can be transmitted through the phosphor  27  without causing difference in optical path in all directions around the light emitting part  25 , so that color deviation caused by orientation angles of the light can be reduced, thereby supplying high-quality light. 
       Second Embodiment 
       [0047]      FIG. 12  is a sectional view showing a light emitting device package according to a second embodiment. 
         [0048]    The light emitting device package according to the second embodiment includes the second semiconductor substrate  11   b , the light emitting part  25 , the first metal layer  21   a , the second metal layer  21   b , the third metal layer  23   a , the fourth metal layer  23   b , a first molding part  31 , a second molding part  32 , and the insulating layer  19 . 
         [0049]    The second embodiment can employ the technical features of the first embodiment, so the second embodiment will be described while focusing on the features distinguished from the first embodiment. 
         [0050]    Different from the first embodiment, according to the second embodiment, a phosphor is provided in the second molding part  32 . For example, the first molding part  31  can be formed on the light emitting part  25 , and the second molding part  32  can be formed on the first molding part  31 . The second molding part  32  can include a second phosphor. The first molding part  31  can be filled with transparent silicon gel. In addition, the first molding part  31  can include a first phosphor. 
         [0051]    According to the second embodiment, since the second molding part  32  can include a phosphor, thereby realizing a remove phosphor structure in which the light emitting part  25  is spaced apart from the second molding part  32  including a phosphor to improve light efficiency. 
       Third Embodiment 
       [0052]      FIG. 13  is a sectional view showing a light emitting device package according to a third embodiment. 
         [0053]    The third embodiment can employ the technical features of the first embodiment, so that the third embodiment will be described while focusing on the features distinguished from the first embodiment. 
         [0054]    When compared to the first embodiment, the third embodiment employs a third semiconductor substrate  11   c  having a first surface in a concave-convex shape. For example, when a second surface of the third semiconductor substrate  11   c  is formed, the second surface having the second depth is formed in a second region of the first surface, and a third surface having a concave-convex shape is formed in a third region of the first surface, thereby forming the third semiconductor substrate  11   c  having a concave-convex shape as shown in  FIG. 13 . The concave-convex shape can include a V-shape groove, but the embodiment is not limited thereto. 
         [0055]    According to the third embodiment, the V-shape groove is formed on the first surface, so that light, which does not escape from the light emitting device package but is reflected toward the first surface, is reflected from a concave-convex surface with a changed reflection angle to increase the probability in which the light is emitted from the light emitting device package. Therefore, light efficiency can be more improved. 
       Fourth Embodiment 
       [0056]      FIG. 14  is a sectional view showing a light emitting device package according to a fourth embodiment. 
         [0057]    The fourth embodiment can employ the technical features of the second embodiment, so that the fourth embodiment will be described while focusing on the features distinguished from the second embodiment. 
         [0058]    Different from the second embodiment, the first surface of the semiconductor substrate  11   c  can have a concave-convex pattern according to the fourth embodiment. 
         [0059]    For example, when the second surface of the semiconductor substrate  11   c  is formed, the second surface having the second depth is formed in the second region of the first surface, and a third surface having a concave-convex shape is formed in the third region of the first surface, thereby forming the semiconductor substrate  11   c  having a concave-convex pattern as shown in  FIG. 14 . 
         [0060]    According to the fourth embodiment, the V-shape groove is formed on the first surface, so that light, which does not escape from the light emitting device package but is reflected toward the first surface, is reflected from a concave-convex surface with a changed reflection angle to increase the probability in which the light is emitted from the light emitting device package. Therefore, light efficiency can be more improved. 
         [0061]    According to the fourth embodiment, the second molding part  32  includes a phosphor, thereby realizing a remove phosphor structure in which the light emitting part  25  is spaced apart from the second molding part  32  including the phosphor, so that light efficiency can be improved. 
       Fifth Embodiment 
       [0062]      FIG. 15  is a sectional view showing a light emitting device package according to a fifth embodiment. 
         [0063]    The fifth embodiment can employ the technical features of the first embodiment, so that the fifth embodiment will be described while focusing on the features distinguished from the first embodiment. 
         [0064]    According to the fifth embodiment, the light emitting device package includes a semiconductor substrate  40 , a light emitting part  45 , a first metal layer  41   a , a second metal layer  41   b , a third metal layer  43   a , a fourth metal layer  43   b , a phosphor  47 , an insulating layer  39 , and a molding part  49 . 
         [0065]    When comparing with the first embodiment, the fifth embodiment has difference in that first and second via holes  53   a  and  53   b  are formed in the semiconductor substrate  40 . 
         [0066]    For example, the first metal layer  41   a  can be electrically connected to the third metal layer  43   a  through the first via hole  53   a  formed in the second surface of the semiconductor substrate  40 . In addition, the second metal layer  41   b  is electrically connected to the fourth metal layer  43   b  through the second vial hole  53   b  formed in the second surface of the semiconductor substrate  40 . 
         [0067]    According to the fifth embodiment, when the second surface of the semiconductor substrate  40  is formed, the second surface having the second depth is formed in the second region of the first surface, and the first and second vial holes  53   a  and  53   b  can be formed in the second surface through the semiconductor substrate  40 . 
         [0068]    A desirable etching mask pattern is formed on the upper and lower surfaces of the semiconductor substrate  40 , and the etching process for the upper and lower surfaces of the semiconductor substrate  40  is performed, thereby realizing the semiconductor substrate  40  including the first and second via holes  53   a  and  53   b.    
         [0069]    According to the embodiment, the first conductive layer is electrically connected to the second conductive layer through the first via hole  53   a  or the second via hole  53   b , so that a small-scale light emitting device package can be formed. 
       Sixth Embodiment 
       [0070]      FIG. 16  is a sectional view showing a light emitting device package according to a sixth embodiment. 
         [0071]    The sixth embodiment can employ the technical features of the fifth embodiment, so that the sixth embodiment will be described while focusing on the features distinguished from the fifth embodiment. 
         [0072]    The light emitting device package according to the sixth embodiment can include the semiconductor substrate  40 , the light emitting part  45 , the first metal layer  41   a , the second metal layer  41   b , the third metal layer  43   a , the fourth metal layer  43   b , a first molding part  51 , a second molding part  52 , and the insulating layer  39 . 
         [0073]    When compared to the fifth embodiment, the sixth embodiment can employ the second molding part  52  having a phosphor. For example, the first molding part  51  can be formed on the light emitting part  45 , and the second molding part  52  can be formed on the first molding part  51 . The second molding part  52  can include the second phosphor. The first molding part  51  can be filled with transparent silicon gel, but the embodiment is not limited thereto. In addition, the first molding part  31  can include the first phosphor. 
         [0074]    According to the sixth embodiment, the second molding part  32  includes a phosphor, thereby realizing a remove phosphor structure in which the light emitting part  45  is spaced apart from the second molding part  32  including the phosphor, so that light efficiency can be improved. 
         [0075]    According to the sixth embodiment, the first conductive layer can be electrically connected to the second conductive layer through the first via hole  53   a  or the second via hole  53   b , so that a small-scale light emitting device package can be formed. 
       Seventh Embodiment 
       [0076]      FIG. 17  is a sectional view showing a light emitting device package according to a seventh embodiment. 
         [0077]    The seventh embodiment can employ the technical features of the fifth embodiment, so that the seventh embodiment will be described while focusing on the features distinguished from the fifth embodiment. 
         [0078]    When compared to the fifth embodiment, the seventh embodiment can employ the semiconductor substrate  40  having the first surface in a concave-convex shape. 
         [0079]    When the second surface of the semiconductor substrate  40  is formed, the second surface having the second depth can be formed in the second region of the first surface, and the third surface having a concave-convex shape can be formed in the third region of the first surface, so that the semiconductor substrate  40  having a concave-convex shape can be formed. 
         [0080]    According to the seventh embodiment, the V-shape groove can be formed in the first surface, so that light, which does not escape from the light emitting device package but is reflected toward the first surface, can be reflected from the concave-convex surface with a changed reflection angle to increase the probability in which the light is emitted from the light emitting device package. Therefore, light efficiency can be more improved. 
       Eighth Embodiment 
       [0081]      FIG. 18  is a sectional view showing a light emitting device package according to an eighth embodiment. 
         [0082]    The eighth embodiment can employ the technical features of the sixth embodiment, so that the eighth embodiment will be described while focusing on the features distinguished from the sixth embodiment will be mainly described. 
         [0083]    When compared to the sixth embodiment, the eighth embodiment can employ the semiconductor substrate  40  having the first surface in the concave-convex shape. 
         [0084]    When the second surface of the semiconductor substrate  40  is formed, the second surface having the second depth can be formed in the second region of the first surface, and the third surface having a concave-convex shape can be formed in the third region of the first surface, so that the semiconductor substrate  40  having a concave-convex shape can be formed. 
         [0085]    According to the eighth embodiment, the V-shape groove can be formed in the first surface, so that light, which does not escape from the light emitting device package but is reflected toward the first surface, can be reflected from the concave-convex surface with a changed reflection angle to increase the probability in which the light is emitted from the light emitting device package. Therefore, light efficiency can be more improved. 
         [0086]    According to the eighth embodiment, the second molding part  52  can include a phosphor, thereby realizing a remove phosphor structure in which the light emitting part  45  is spaced apart from the second molding part  52  including the phosphor, so that light efficiency can be improved. 
         [0087]    As described above, in the light emitting device package according to the embodiments, the light efficiency can be improved, and the color deviation can be reduced. 
         [0088]    Any reference in this specification to “one embodiment,” “an embodiment,” “example embodiment,” etc., means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with any embodiment, it is submitted that it is within the purview of one skilled in the art to effect such feature, structure, or characteristic in connection with other ones of the embodiments. 
         [0089]    Although embodiments have been described with reference to a number of illustrative embodiments thereof, it should be understood that numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this disclosure. More particularly, various variations and modifications are possible in the component parts and/or arrangements of the subject combination arrangement within the scope of the disclosure, the drawings and the appended claims. In addition to variations and modifications in the component parts and/or arrangements, alternative uses will also be apparent to those skilled in the art.

Technology Classification (CPC): 7