Patent Abstract:
A power-combining circuit at least equipped with: a plurality of amps, named first and second through n-th amps (PA 1 , PA 2 -PAn), for amplifying inputted high-frequency power; a plurality of 3 dB-hybrid circuits, named first and second through n-th hybrid circuits (HYB 1 , HYB 2 -HYBn), for distributing the outputs from each of the amps to two signals for which the phase difference is 90° in relation to one another; two couplers, named first and second couplers (C 1 , C 2 ), for coupling the signals, among the two signals outputted from each 3 dB-hybrid circuit, which are in phase with one another; two filters, named first and second filters (FILTER  1 , FILTER  2 ), for removing a spurious component included in each of the two signals coupled by the couplers; and a back-end-positioned hybrid circuit, named the 0th hybrid circuit (HYB 0 ), for power-combining the signals from the filters and outputting the same. As a result, the provided power-combining circuit is capable of suppressing and absorbing a spurious component produced during power amplification.

Full Description:
TECHNICAL FIELD 
       [0001]    The present invention relates to a power combining circuit and a power combining method, and more particularly to a power combining circuit and a power combining method for use in a high frequency band such as a VHF band or a UHF band, for instance, a power combining circuit and a power combining method for use in operating high frequency power units such as a power amplifier, a power distributor, a power combiner, and a filter circuit in a TV transmitter, an FM transmitter, or the like in parallel. 
       BACKGROUND ART 
       [0002]    As a conventional art relating to a power combining circuit configured to combine high frequency powers obtained by operating high frequency power units in a TV transmitter, an FM transmitter, or the like in parallel and to output the combined powers, there is known a technique described in Patent Literature 1 i.e. Japanese Patent Publication No. 2,639,032 entitled “Energy-Coupling Device”. The power combining circuit described in Patent Literature 1 is provided with a plurality of amplifiers; a 3 dB-hybrid circuit which distributes the signals from each of the amplifiers to two signals having a phase difference of 90 degrees from each other; two couplers which couple the signals, among the distributed signals in phase with each other; and a back-end positioned 3 dB-hybrid circuit which distributes the coupled two signals to two signals so that one of the two signals is output to an antenna, and the other of the two signals is terminated at a terminator. The power combining circuit has a simplified configuration, without a filter for removing a spurious component generated in the amplifiers. 
       CITATION LIST 
     Patent Literature 
     [PTL 1] 
       [0003]    Japanese Patent Publication No. 2,639,032 (pages 2-4) 
       SUMMARY OF INVENTION 
     Technical Problem 
       [0004]    Therefore, in the conventional art described in Patent Literature 1, when power of a high frequency signal is amplified, the signal waveform may be distorted by non-linearity of the amplifiers, and a harmonics may be generated at a frequency of an integral multiple (2-times, 3-times, 4-times, . . . ) of a fundamental frequency. 
         [0005]    Further, in the out-of-band region near an intended wave, a spurious component known as intermodulation distortion (IM) may be generated by non-linearity of the amplifiers. Generally, a filter such as a low-pass filter or a band-pass filter is used in order to output signals, in which a spurious component in the out-of-band region is removed. However, when a spurious component generated in the amplifiers is reflected on the filter and the reflected component returns to the amplifiers, troubles such as a failure of the amplifiers may occur. 
       Object of the Present Invention 
       [0006]    The present invention has been made in view of the above, and an object of the present invention is to provide a power combining circuit and a power combining method that is capable of suppressing and absorbing a spurious component generated by power amplification. 
       Solution to Problem 
       [0007]    In order to solve the above problem, a power combining circuit and a power combining method according to the present invention mainly include the following distinguishing configuration. 
         [0008]    (1) A power combining circuit according to the present invention is a power combining circuit for combining high frequency powers having arbitrary frequencies. The power combining circuit is provided with at least an amplifier which amplifies an input high frequency power; a 3 dB-hybrid circuit which distributes an output from the amplifier to two signals having a phase difference of 90 degrees from each other; two filters which remove a spurious component included in each of the two signals from the 3 dB-hybrid circuit; and a back-end positioned hybrid circuit which power-combines the signals from the two filters for output. 
         [0009]    (2) A power combining method according to the present invention is a power combining method for use in a power combining circuit for combining high frequency powers having arbitrary frequencies. The power combining method is provided with at least, after distributing an output from an amplifier to two signals having a phase difference of 90 degrees from each other by a 3 dB-hybrid circuit, filtering the two signals for removing a spurious component included in each of the two signals in order to remove the spurious component generated when an input high frequency power is amplified by the amplifier. 
       Advantageous Effect of Invention 
       [0010]    According to the power combining circuit and the power combining method of the present invention, the following advantageous effects are obtained. 
         [0011]    As a first advantageous effect, newly providing the filters makes it possible to securely impart the filter effect for removing a spurious component in power combining, and to securely prevent an unwanted spurious component from being output to an antenna. 
         [0012]    As a second advantageous effect, it is possible to suppress and absorb a spurious component generated in the amplifier by a terminator, without reflection on the filters and without returning to the amplifier. Thus, the above configuration is advantageous in securely preventing failure of the amplifier. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0013]      FIG. 1  is a block configuration diagram illustrating an example of an internal configuration of a power combining circuit according to the present invention; 
           [0014]      FIG. 2  is a schematic diagram for describing an example of an operation to be performed by a power combining circuit illustrated in  FIG. 1  as an exemplary embodiment of the invention; and 
           [0015]      FIG. 3  is an explanatory diagram illustrating a concept of a filter having an impedance transformation function, in which first and second impedance transformation lines, and first and second filters in the power combining circuit illustrated in  FIG. 1  are respectively integrated. 
       
    
    
     DESCRIPTION OF EMBODIMENTS 
       [0016]    Hereinafter, a preferred exemplary embodiment of a power combining circuit and a power combining method according to the present invention is described referring to the accompanying drawings. 
       Features of the Present Invention 
       [0017]    Prior to description of an exemplary embodiment of the present invention, an outline of the features of the present invention is described. The present invention is an invention particularly relating to a power combining circuit and a power combining method for use in a high frequency band such as a VHF band or a UHF band, for instance, a power combining circuit and a power combining method for use in operating high frequency power units such as a power amplifier, a power distributor, a power combiner, and a filter circuit in a TV transmitter, an FM transmitter, or the like in parallel. The main features of the invention are such that it is possible to impart the characteristics of a filter to the power combining circuit, and it is possible to absorb a spurious signal component signal reflected on the filter by a terminator, without returning to an amplifier (an amplifier constituted of e.g. an FET (Field Effect Transistor) circuit). 
         [0018]    More specifically, the invention includes the following configuration. Each of the signals to be output from 1st to n-th amplifiers PA 1  to PAn (where n is a positive integer of 2 or more) constituting a power combining circuit is distributed to two signals by 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn, each of which has a coupling degree of 3 dB. In distributing the signals, each of the signals is distributed to two signals with the same amplitude. However, in comparison with the phase of a signal to be output to one of the terminals (e.g. a terminal  3 ), the phase of a signal to be output to the other one of the terminals (e.g. a terminal  4 ) has a −90 degree phase delay. 
         [0019]    Subsequently, two signals obtained by combining powers in phase with each other in a signal group having a 0-degree phase component, and in a signal group having a −90 degree phase delay component are respectively input to filters newly provided for removing a spurious component. After removal of a spurious component, the two signals that have passed through the respective filters are power-combined by a 0th hybrid circuit HYB 0  having a coupling degree of 3 dB for outputting to an antenna. 
         [0020]    The filters for removing a spurious component are disposed at positions where impedance transformation is necessary when signals of the branching number n (where n is a positive integer of 2 or more), which are in phase with each other, are power-combined. Further, it is possible to configure a filter having an impedance transformation function, in which the impedance of an input port of the filter is set to (ZΩ/n), and the impedance of an output port of the filter is adjusted to ZΩ (where Z is a constant that is arbitrarily set in advance as a matching impedance value). 
       Configuration Example of Exemplary Embodiment 
       [0021]    Next, an example of an internal configuration of the power combining circuit capable of suppressing and absorbing a spurious component, as an exemplary embodiment of the present invention, is described using the block configuration illustrated in  FIG. 1 .  FIG. 1  is a block configuration diagram illustrating an example of an internal configuration of a power combining circuit according to the present invention, particularly, a power combining circuit for use in a high frequency band such as a VHF band or a UHF band, for instance, a power combining circuit for use in operating high frequency power units such as a power amplifier, a power distributor, a power combiner, and a filter circuit in a TV transmitter, an FM transmitter, or the like in parallel. 
         [0022]    The power combining circuit illustrated in  FIG. 1  includes at least 1st, 2nd, . . . , and n-th amplifiers (power amplifiers) PA 1 , PA 2 , . . . , and PAn (where n is a positive integer of 2 or more); 1st, 2nd, . . . , and n-th hybrid circuits (3 dB-hybrid circuits) HYB 1 , HYB 2 , . . . , and HYBn; 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn; first and second couplers C 1  and C 2 ; first and second impedance transformation lines TR 1  and TR 2 ; first and second filters FILTER 1  and FILTER 2 ; a 0th hybrid circuit (a back-end positioned hybrid circuit) HYB 0 ; a 0th terminator (a back-end positioned terminator) DL 0 ; and an antenna ANT. 
         [0023]    In the power combining circuit illustrated in  FIG. 1 , outputs from the 1st, 2nd, . . . , and n-th amplifiers (power amplifiers) PA 1 , PA 2 , . . . , and PAn are respectively input to 11-th, 21-th, . . . , and n1-th input terminals  11 ,  21 , . . . , and n 1  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn (3 dB-hybrid circuits), each of which has a coupling degree of 3 dB. The 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn are respectively connected to 12-th, 22-th, . . . , and n2-th isolation terminals  12 ,  22 , . . . , and n 2  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn. 
         [0024]    Further, 13-th, 23-th, . . . , and n3-th output terminals  13 ,  23 , . . . , and n 3  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn for use in outputting a 0-degree phase signal are mutually connected to each other at the first coupler C 1 . A characteristic impedance of the line at the position of the first coupler C 1  is set to (Z/n)Ω (where Z is a constant that is arbitrarily set in advance as a matching impedance value, e.g., “50”). However, the characteristic impedance is transformed to the matching impedance ZΩ at a final stage via the first impedance transformation line TR 1 . Thus, the first coupler C 1  is connected to the first filter FILTER 1 . Likewise, 14-th, 24-th, . . . , and n4-th output terminals  14 ,  24 , . . . , and n 4  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn for use in outputting a −90 degree phase delay signal are mutually connected to each other at the second coupler C 2 . The characteristic impedance of the line at the position of the second coupler C 2  is transformed to the matching impedance ZΩ at a first stage via the second impedance transformation line TR 2 , as well as the case of the first impedance transformation line TR 1 . Thus, the second coupler C 2  is connected to the second filter FILTER 2 . 
         [0025]    After the impedance transformation into the matching impedance ZΩ, e.g. 50Ω, via the respective first and second impedance transformation lines TR 1  and TR 2 , the respective signals are input to the first and second filters FILTER 1  and FILTER 2  having the same electrical characteristics. The output terminals of the first and second filters FILTER 1  and FILTER 2  are respectively connected to 01-th and 02-th input terminals  01  and  02  of the back-end positioned hybrid circuit i.e. the 0th hybrid circuit HYB 0  having a coupling degree of 3 dB. 
         [0026]    A 03-th isolation terminal  03  of the 0th hybrid circuit HYB 0  is connected to the back-end positioned terminator i.e. the 0th terminator DL 0  for terminating an unwanted signal component to be output from the first and second filters FILTER 1  and FILTER 2 . A 04-th output terminal  04 , which combines the signal components to be output from the first and second filters FILTER 1  and FILTER 2  for output, is connected to the antenna ANT. 
         [0027]    According to the internal configuration as described above, the power combining circuit illustrated in  FIG. 1  is capable of suppressing and absorbing a spurious component generated in the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn by the 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn, without reflection on the first and second filters FILTER 1  and FILTER 2 , and without returning to the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn. Thus, it is possible to securely prevent failure of the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn (amplifiers each constituted of e.g. an FET circuit), which may occur resulting from reflection. 
       Description on Operation of Exemplary Embodiment 
       [0028]    Next, an operation to be performed by the power combining circuit illustrated in  FIG. 1  is described in detail referring to the schematic diagram of  FIG. 2 .  FIG. 2  is a schematic diagram for describing an example of an operation to be performed by the power combining circuit described as an exemplary embodiment of the present invention in  FIG. 1 .  FIG. 2  illustrates an example of an operation of securely preventing reflection of a spurious component generated in the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn on the first and second filters FILTER 1  and FILTER  2 , and returning of the spurious component to the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn. 
         [0029]    As illustrated in the schematic diagram of  FIG. 2 , high frequency signals is power-amplified in the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn having the same frequencies as each other, and in phase with each other, are respectively input to the 11-th, 21-th, . . . , and n1-th input terminals  11 ,  21 , . . . , and n 1  (where n is a positive integer of 2 or larger) of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn, each of which has a coupling degree of 3 dB (sequence Seq1). 
         [0030]    Each of the high frequency signals input from the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn is distributed to two signals, and the respective two signals are output, as output signals of the same amplitude, to the 13-th, 23-th, . . . , and n3-th output terminals  13 ,  23 , . . . , and n 3  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn, and to the 14-th, 24-th, . . . , and n4-th output terminals  14 ,  24 , . . . , and n 4  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn. When the signals are output, the phases of the signals to be output to the 14-th, 24-th, . . . and n4-th output terminals  14 ,  24 , . . . , and n 4  respectively have a −90 degree phase delay with respect to the phases of the signals to be output to the 13-th, 23-th, . . . , and n3-th output terminals  13 ,  23 , . . . , and n 3  (sequence Seq2). 
         [0031]    The signals distributed to the 13-th, 23-th, . . . , and n3-th output terminals  13 ,  23 , . . . , and n 3  are guided to the first coupler C 1 . The characteristic impedance of the line at the position of the first coupler C 1  is set to (Z/n)Ω. However, impedance transformation is performed until the matching impedance ZΩ is obtained by the line of the first impedance transformation line TR 1  before the signal reaches the input terminal of the first filter FILTER 1  from the first coupler C 1  (sequence Seq3). Thereafter, the signal that has passed through the first filter FILTER 1  for removing a spurious component is guided to a 01-th input terminal  01  of the back-end positioned hybrid circuit i.e. the 0th hybrid circuit HYB 0  (sequence Seq4). 
         [0032]    Further, the signals having a −90 degree phase delay distributed to the 14-th, 24-th, . . . , and n4-th output terminals  14 ,  24 , . . . , and n 4  are guided to the second coupler C 2 . The characteristic impedance of the line at the position of the second coupler C 2  is set to (Z/n)Ω. However, as well as the case of the first coupler C 1 , impedance transformation is performed until the matching impedance ZΩ is obtained by the line of the second impedance transformation line TR 2  before the signal reaches the input terminal of the second filter FILTER 2  from the second coupler C 2  (sequence Seq5). Thereafter, the signal that has passed through the second filter FILTER 2  for removing a spurious component is guided to a 02-th input terminal  02  of the back-end positioned hybrid circuit i.e. the 0th hybrid circuit HYB 0  (sequence Seq6). 
         [0033]    A phase difference between the signal guided to the 01-th input terminal  01  of the back-end positioned hybrid circuit i.e. the 0th hybrid circuit HYB 0 , and the signal guided to the 02-th input terminal  02  of the 0th hybrid circuit HYB 0  is 90 degrees (in other words, the signal on the 02-th input terminal  02  is a signal having a −90 degree phase delay with respect to the signal on the 01-th input terminal  01 ). Therefore, power combining is performed on the side of the 04-th output terminal  04  of the 0th hybrid circuit HYB 0 , which is connected to the antenna ANT, and a signal is output to the antenna ANT (sequence Seq7). On the other hand, the phase of combined power is reversed on the side of the 03-th isolation terminal  03 , which is connected to the back-end positioned terminator i.e. the 0th terminator DL 0  so that power is not output from the 0th terminator DL 0  (sequence Seq8). 
         [0034]    A spurious component that is unable to pass through the first and second filters FILTER 1  and FILTER 2  is respectively reflected on the first and second filters FILTER 1  and FILTER 2 , and respectively returns to the first and second couplers C 1  and C 2  via the first and second impedance transformation lines TR 1  and TR 2  (sequence Seq9). Thereafter, the reflected spurious component respectively returns from the first coupler C 1  and the second coupler C 2  to the 13-th, 23th, . . . , and n3-th output terminals  13 ,  23 , . . . , and n 3  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn, and to the 14-th, 24-th, . . . , and n4-th output terminals  14 ,  24 , . . . , and n 4  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn (sequence Seq10). 
         [0035]    A phase difference between a reflected signal with respect to the 13-th, 23-th, . . . , and n3-th output terminals  13 ,  23 , . . . , and n 3  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn, and a reflected signal with respect to the 14-th, 24-th, . . . , and n4-th output terminals  14 ,  24 , . . . , and n 4  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn is 90 degrees. The phase of reflected power is reversed on the side of the 11-th, 21-th, . . . , and n1-th input terminals  11 ,  21 , . . . , and n 1  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn to which the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn are respectively connected so that power of the reflected spurious component is not output (sequence Seq11). 
         [0036]    On the other hand, on the side of the 12-th, 22-th, . . . , and n2-th isolation terminals  12 ,  22 , . . . , and n 2  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn to which the 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn are respectively connected, a reflected spurious component is output to the 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn; and power is absorbed by the 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn (sequence Seq12). 
         [0037]    According to the aforementioned operation, the power combining circuit illustrated in  FIG. 1  is capable of suppressing and absorbing a spurious component generated in the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn by the 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn, without reflection on the first and second filters FILTER 1  and FILTER 2 , and without returning to the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn. 
         [0038]    It is needless to say that, also in the exemplary embodiment, the isolation function between a plurality of amplifiers (amplifiers each constituted of e.g. an FET (Field Effect Transistor) circuit) provided in a conventional power combining circuit (in other words, a function to absorb power from an amplifier by a terminator and to prevent returning of reflected power to the other amplifiers, even if a failure occurs in the amplifier) is implemented substantially in the same manner by the 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn respectively connected to the 12-th, 22-th, . . . , and n2-th isolation terminals  12 ,  22 , . . . , and n 2  of the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn. 
         [0039]    Further, it is also needless to say that the first and second filters FILTER 1  and FILTER 2  for removing a spurious component are not limited to a band-pass filter configured to pass only a signal component in an intended frequency band. The same configuration as described above is also applicable to a low-pass filter configured to pass a low frequency signal component in a frequency band equal to or lower than an intended frequency band, and to a high-pass filter configured to pass a high frequency signal component in a frequency band equal to or higher than an intended frequency band. 
         [0040]    Further, it is possible to provide a circuit configuration as illustrated in  FIG. 3 , in which first and second impedance transformation lines TR 1  and TR 2  which perform impedance transformation from the characteristic impedance (Z/n)Ω of the line to the matching impedance ZΩ, and first and second filters FILTER 1  and FILTER 2  for removing a spurious component are respectively integrated.  FIG. 3  is an explanatory diagram illustrating a concept of a filter having an impedance transformation function, in which the first and second impedance transformation lines TR 1  and TR 2 , and the first and second filters FILTER 1  and FILTER 2  in the power combining circuit illustrated in  FIG. 1  are respectively integrated. Specifically, the filter having an impedance transformation function illustrated in  FIG. 3  is provided with an impedance transformation function of performing impedance transformation inside the circuit so that the impedance of the output port is equal to the matching impedance ZΩ, regardless that the impedance of the input port is set to (Z/n)Ω, in addition to the filtering function for removing a spurious component. The above configuration makes it possible to miniaturize the power combining circuit. 
         [0041]    Further, the power combining circuit illustrated in  FIG. 1  is a power combining circuit for combining high frequency powers having arbitrary frequencies, wherein an amplifier which amplifies an input high frequency power, and a 3 dB-hybrid circuit which distributes the output from the amplifier to two signals having a phase difference of 90 degrees from each other are respectively constituted of a plurality of circuits i.e. the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn, and the 1st, 2nd, . . . , and n-th hybrid circuits HYB 1 , HYB 2 , . . . , and HYBn. The present invention is not limited to the above configuration. Each of the amplifier and the 3 dB-hybrid circuit may be constituted of one circuit in some cases. 
       Description on Advantageous Effects of Exemplary Embodiment 
       [0042]    The exemplary embodiment has overcome the drawbacks of the conventional power combining circuit, and provides the following advantageous effects. 
         [0043]    As a first advantageous effect, providing the first and second filters FILTER 1  and FILTER 2  is advantageous in securely imparting the filter effect for removing a spurious component in power combining, and in securely preventing an unwanted spurious component from being output to the antenna ANT. 
         [0044]    As a second advantageous effect, it is possible to suppress and absorb a spurious component generated in the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn by the 1st, 2nd, . . . , and n-th terminators DL 1 , DL 2 , . . . , and DLn, without reflection on the first and second filters FILTER 1  and FILTER 2 , and without returning to the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn. Thus, it is possible to securely prevent failure of the 1st, 2nd, . . . , and n-th amplifiers PA 1 , PA 2 , . . . , and PAn. 
         [0045]    The configuration of a preferred embodiment of the present invention has been described as above. Note that the exemplary embodiment is merely an example of the present invention, and does not limit the invention. It is to be easily understood that various changes and modifications will be apparent to those skilled in the art depending on a purpose of use, as far as such changes and modifications do not depart from the gist of the invention. 
         [0046]    This application claims the priority based on Japanese Patent Application No. 2012-204214 filed on Sep. 18, 2012, and all of the disclosure of which is hereby incorporated. 
       REFERENCE SIGNS LIST 
       [0000]    
       
           01  01-th input terminal 
           02  02-th input terminal 
           03  03-th isolation terminal 
           04  04-th output terminal 
           11  11-th input terminal 
           12  12-th isolation terminal 
           13  13-th output terminal 
           14  14-th output terminal 
           21  21-th input terminal 
           22  22-th isolation terminal 
           23  23-th output terminal 
           24  24-th output terminal 
         n 1  n1-th input terminal 
         n 2  n2-th isolation terminal 
         n 3  n3-th output terminal 
         n 4  n4-th output terminal 
         ANT antenna 
         C 1  first coupler 
         C 2  second coupler 
         DL 0  0th terminator (back-end positioned terminator) 
         DL 1  1st terminator 
         DL 2  2nd terminator 
         DLn n-th terminator 
         FILTER 1  first filter 
         FILTER 2  second filter 
         HYB 0  0th hybrid circuit (back-end positioned hybrid circuit) 
         HYB 1  1st hybrid circuit 
         HYB 2  2nd hybrid circuit 
         HYBn n-th hybrid circuit 
         PA 1  1st amplifier (first power amplifier) 
         PA 2  2nd amplifier (second power amplifier) 
         PAn n-th amplifier (n-th power amplifier) 
         TR 1  first impedance transformation line 
         TR 2  second impedance transformation line

Technology Classification (CPC): 7