Patent Abstract:
An image sensor with a plurality of photodiodes arranged in an array. A barrier region is disposed between adjacent photodiodes and inhibits depletion region merger between adjacent photodiodes, thereby inhibiting a capacitive coupling between the adjacent photodiodes.

Full Description:
REFERENCE TO CROSS RELATED APPLICATION 
       [0001]    This application is a continuation-in-part of an application filed on Jan. 31, 2007, Ser. No. unknown at this time. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The subject matter disclosed generally relates to the field of semiconductor image sensors. 
         [0004]    2. Background Information 
         [0005]    Photographic equipment such as digital cameras and digital camcorders may contain electronic image sensors that capture light for processing into still or video images, respectively. Electronic image sensors typically contain millions of light capturing elements such as photodiodes. The photodiodes are arranged in a two-dimensional pixel array. 
         [0006]      FIG. 1  shows an enlarged cross-section of pixels in a pixel array of the prior art. The pixels include first regions  1  constructed from a first type of material, typically p-type, and second regions  2  constructed from a and  2  form p-n junctions of photodiodes. The p-n junctions are reversed biased to form depletion regions between dashed lines  3  and  4 . The photons of incoming light  5  are absorbed to create electron-hole pairs  6 . The electrons move to create an electrical current. The current is ultimately sensed and processed to reproduce the image detected by the image sensor. 
         [0007]    Light at relatively long wavelengths penetrate deep into the photodiodes. Consequently, electrons are formed at the outer edges of the depletion regions. The depletion regions can grow and actually merge in region  7 . The merger of depletion regions electronically couples the adjacent photodiodes in a capacitance manner. A change in voltage of a photodiode receiving light may vary the voltage in an adjacent photodiode not receiving light. This will result in an inaccurate sensing of light in the adjacent photodiode. It would be desirable to provide a pixel structure that would minimize the effects of lateral depletion region growth from impinging on adjacent depletion regions. 
       BRIEF SUMMARY OF THE INVENTION 
       [0008]    An image sensor with an array of photodiodes that each have a first region constructed from a first type of material and a second region constructed from a second type of material. An insulating region is located between the first and second regions. The second region is offset from the insulating region in a corner region of the photodiode array. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0009]      FIG. 1  is an illustration of an image sensor of the prior art; 
           [0010]      FIG. 2  is a schematic of an image sensor; 
           [0011]      FIG. 3  is an illustration of a plurality of photodiodes of the image sensor; 
           [0012]      FIG. 4  is an illustration of photodiodes at a corner region of a pixel array of the image sensor; 
           [0013]      FIG. 5  is an illustration of photodiodes at the corner region, with offset barrier regions; 
           [0014]      FIG. 6  is an illustration of photodiodes at the corner region, with offset n-regions. 
       
    
    
     DETAILED DESCRIPTION 
       [0015]    Disclosed is an image sensor with a plurality of photodiodes that each have a first region constructed from a first type of material and a second region constructed from a second type of material. The photodiodes also have an insulating region between the first and second regions. The photodiodes are arranged in an array. In corner regions of the array, the second regions are offset relative to the insulating regions to capture more photons of incoming light. 
         [0016]    Referring to the drawings more particularly by reference numbers,  FIG. 2  shows an image sensor  10 . The image sensor  10  includes a photodiode array  12  that contains a plurality of individual photodiodes  14 . The photodiodes  14  are typically arranged in a two-dimensional array of rows and columns. The array  12  has a center area  16  and corner areas  18 . 
         [0017]    The photodiode array  12  is typically connected to a light reader circuit  20  by a plurality of conductive traces  22 . The array  12  is connected to a row decoder  24  by conductive traces  26 . The row decoder  24  can select an individual row of the array  12 . The light reader  20  can then read specific discrete columns within the selected row. Together, the row decoder  24  and light reader  20  allow for the reading of an individual photodiode  14  in the array  12 . The data read from the photodiodes  14  may be processed by other circuits such as a processor (not shown) to generate a visual display. 
         [0018]    The image sensor  10  and other circuitry may be configured, structured and operated in the same, or similar to, the corresponding image sensors and image sensor systems disclosed in U.S. Pat. No. 6,795,117 issued to Tay, which is hereby incorporated by reference. 
         [0019]      FIG. 3  shows a plurality of photodiode  50 . Each photodiode  50  includes a first region  52  constructed from a first type of material and a second region  54  constructed from a second type of material. By way of example, the first material may be an intermediately doped p-type material and the second regions  52  may be a lightly doped n-type material. The regions  50  and  52  are formed on a substrate  56 . The substrate  56  may be constructed from a lightly doped p-type material. 
         [0020]    Each photodiode  50  may further have a gate  58  and either a source or drain pad  60  formed adjacent to the first region  52 . The gate  58  may be constructed from a heavily doped n-type polysilicon material. The source/drain pad  60  may be constructed from a heavily doped n-type material. The n-type source/drain pads  60  may be separated from the n-type second regions  54  by insulating regions  62 . 
         [0021]    Adjacent to each first region  52  is a barrier region  64 . The barrier region  64  may be constructed from a medium doped p-type material. The photodiodes  50  are reversed biased to create depletion regions generally within lines  66  and  68 . Absorption of light and the formation of electron-hole pairs  70  at relatively long wavelengths of light will occur in the bottom portion of the depletion regions. By way of example, light with wavelengths longer than 650 nanometers tend to become absorbed at the bottom of the depletion regions. 
         [0022]    The barrier regions  64  inhibit lateral growth of the depletion regions in the horizontal directions as represented by dashed lines  72 . This prevents the depletion regions from merging and causing errant voltage variations in adjacent photodiodes. By way of example, the barrier regions may have a depth between 2-4 μm. 
         [0023]    As shown in  FIG. 4 , the light rays penetrate the photodiodes at an angle for pixels located at the corner areas  18  of the pixel array. The angle can be as much as 30 degrees. The incident light may be absorbed by material and form electron-hole pairs  70  outside of the second region and in close proximity to an adjacent photodiode. The free electrons may migrate to the adjacent photodiode causing inaccurate photo-detection. 
         [0024]      FIG. 5  is an embodiment where the barrier regions  64  are offset relative to the first regions  52 . The offset barrier regions  64  create a longer path to an adjacent photodiode from the point when incident light is absorbed by the material. The offset may vary from the center of the pixel array, where the light penetrates the photodiodes in a perpendicular direction, to the outer pixels of the array where the light penetrates at a significant angle. The offset may become progressively larger from the center of the pixel array to the outer regions of the array. The offset allows the depletion region to grow laterally in the direction of the incoming light. By way of example, the barrier regions may be offset up to 0.5 μm at the outermost pixels. 
         [0025]      FIG. 6  is an embodiment where both the barrier regions  64  and the second regions  54  are offset relative to the insulating regions  62 . The offset second regions  54  are in-line with the direction of incoming light and capture more photons. The second region offsets may vary from the center of the pixel array, where the light penetrates the photodiodes in a perpendicular direction, to the outer pixels of the array where the light penetrates at a significant angle. The offsets may become progressively larger from the center of the pixel array to the outer regions of the array. By way of example, the barrier and second regions  64  and  54 , may be offset up to 0.5 μm at the outermost pixels. 
         [0026]    The photodiodes may be constructed with known CMOS fabrication techniques. The barrier region  64  may be formed on the substrate  56 . The first regions  52  may be formed on the barrier regions  64  and the gates  58  and pads  60  formed on the regions  52 . The second regions  54  may also be formed on the substrate  56 . The order of formation may vary depending on the processes used to create the image sensor. 
         [0027]    While certain exemplary embodiments have been described and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative of and not restrictive on the broad invention, and that this invention not be limited to the specific constructions and arrangements shown and described, since various other modifications may occur to those ordinarily skilled in the art.

Technology Classification (CPC): 7