Patent Abstract:
A multi-layer board includes a ceramic layer and plural resin layers which are stacked together. The ceramic layer is provided with an impedance element formed thereon, and the uppermost resin layer is provided with an electronic component mounted thereon. The multi-layer board is stable against a temperature change.

Full Description:
FIELD OF THE INVENTION 
   The present invention relates to a multi-layer board used in small electronic equipment such as a portable telephone. 
   BACKGROUND OF THE INVENTION 
   As shown in  FIG. 4 , a conventional multi-layer board is formed with resin layers. For example, on a first surface  1 , a patterned is formed, and an electronic component  2  is mounted. The electronic component  2  is conducted to a second surface  4 , third surface  5  or fourth surface  6  with a through hole  3  in order to be connected to a component such as an inductor formed on the surface  4 ,  5  or  6 . Intervals between any of the first surface  1  through the fourth surface  6  are filled with a resin  7 . 
   The conventional multi-layer board consisting of the resin layers, upon having the inductor formed thereon, shrinks with heat due to a temperature change, thus causing a characteristic such as an inductance to vary. 
   SUMMARY OF THE INVENTION 
   A multi-layer board has mechanical and electric characteristics stabilized against a temperature change. The multi-layer board includes a ceramic layer, a resin layer disposed over the ceramic layer, and a impedance element formed on the ceramic layer. The resin layer may be have an electronic component mounted thereon. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  is a sectional view of a multi-layer board in accordance with a first exemplary embodiment of the present invention. 
       FIG. 2  is a perspective view of an essential part of the multi-layer board in accordance with the first embodiment. 
       FIG. 3  is a sectional view of a multi-layer board in accordance with a second exemplary embodiment of the present invention. 
       FIG. 4  is a sectional view of a conventional multi-layer board. 
   

   DESCRIPTION OF THE PREFERRED EMBODIMENTS 
   (Exemplary Embodiment 1) 
   In  FIG. 1 , a ceramic layer  11  having a relative dielectric constant of about 10 (at 1 MHz), has a top surface (a third surface)  11   a  provided with a resistor  12 , inductor  13  and capacitor  14  formed thereon. The layer  11  has a bottom surface (a fourth surface)  25   a  provided with a resistor  15 , inductor  16 , and capacitor  17  formed thereon. These impedance elements, since being formed on both surfaces of the ceramic layer  11 , are stable against an external temperature change. 
   A Resin layer  18  having a relative dielectric constant of about 4 (at 1 MHz) has a top surface (a second surface)  18   a  provided with a pattern  19  formed thereon. The pattern  19  is conducted to the third surface  11   a  with an interstitial via-hole (hereinafter referred to as a hole)  20  and to a first surface  22   a  with a hole  21  to be connected to circuits. Since the relative dielectric constants of resin layers  18 ,  22  are lower than that of ceramic layer  11 , a strip line formed on the second surface  18   a  can be wide, thereby having a reduced loss. This is preferable particularly in high frequency performance for improving a noise factor (NF). 
   The resin layer  22  having a relative dielectric constant of about 4 (at 1 MHz) has a top surface (a first surface)  22   a  provided with a surface-mounted device (SMD)  23  and a bare chip device  24  mounted thereon. 
   The resin layers  25 ,  26  each having a relative dielectric constant of about 4 (at 1 MHz) has a fifth surface  26   a  provided with a pattern  27  formed thereon. The pattern  27  is conducted to a fourth surface  25   a  with a hole  28  and to a sixth surface  26   b  with a hole  29  to be connected to circuits. The hole  29  is a through-hole extending from the first surface  22   a  to the sixth surface  26   b  (from the top external surface to the bottom external surface of the multi-layer board). 
   Thus, the multi-layer board of the first embodiment has a six-surface structure, that is, includes the ceramic layer  11  as a core board, the resin layers  18 ,  22 ,  25 , and  26  over both surfaces of the layer  11 . The resistors  12 ,  15  and inductors  13 ,  16 , since being formed on the ceramic layer  11 , have respective characteristics stabilized against the temperature change, thus having accurately-maintained values. 
   The first surface  22   a , since being provided with the SMD  23  and bare chip device  24  mounted thereon, contributes to an improved packaging-density, thus enabling the board to be small. 
   The resin layers  18 ,  22 ,  25 , and  26  since being stacked over both surfaces of the ceramic layer  11 ,  25 , allow the multi-layer board not to warp and to be mounted on a base board of an apparatus without a gap. 
   In the case that the base board is a resin board, the multi-layer board can be mounted in close contact with the base board if the resin layer, of the multi-layer board, contacting the base board is made of resin having a thermal expansion coefficient close to that of the base board. 
     FIG. 2  is a perspective view of the impedance elements, the resistor  12 , inductor  13 , and capacitor  14  on the third surface  11   a  of the ceramic layer  11 . The resistor  12  and inductor  13  are laser-trimmed, thus having a resistance and inductance adjusted accurately, and thereby having stable performance. In addition, the inductor  13  is formed on the ceramic layer  11  having a large relative dielectric constant, thereby having a large inductance despite its reduced size. Furthermore, as clearly illustrated in  FIG. 2 , the inductor  13  is patterned so as to have a spiral shape. 
   If a portion, of the second surface  18   a , corresponding to inductor  13  is not provided with a ground pattern formed on the surface, the inductor  13  has an increased Q-factor. 
   The capacitors  14 ,  17  include electrode layers  14   a ,  14   c ,  17   a , and  17   c  and dielectric layers  14   b ,  17   b  which are formed by printing and sintering. The dielectric layers  14   b ,  17   b , upon being made of high dielectric material, provide the capacitors  14 ,  17  with large capacitances despite their reduced sizes. 
   (Exemplary Embodiment 2) 
   As illustrated with a sectional view of  FIG. 3 , a multi-layer board in accordance with a second exemplary embodiment includes eight surfaces. Instead of the fifth surface  26   a  of the board of the first embodiment, a fifth surface  30   a  defined by a polyimide film  30  and a sixth surface  31   a  defined by a resin layer  31  are inserted. 
   In  FIG. 3 , the sixth surface  31   a  of the polyimide film  30  is provided with a capacitor  32  formed by vapor deposition, so that the capacitor  32  has an accurate capacitance and a low profile. 
   Each multi-layer board of the first and second embodiments including the ceramic layer resists bending. Further, the multi-layer board is inexpensive since including the stacked resin layers, which are inexpensive.

Technology Classification (CPC): 7