Patent Abstract:
A power factor correction device comprises a power stage circuit converting input alternating current voltage into input current according to a pulse width modulation signal and outputs the input current to a load generating output voltage on the load, and sampling the input current outputting a correcting current; a current compensating circuit receiving and comparing the correcting current with a reference current signal generating a compensating current signal; a voltage compensating circuit receiving and comparing the output voltage with a reference voltage generating a compensating voltage signal; a multiplication amplifier receiving the compensating current signal and the compensating voltage signal generating an updated reference current signal by multiplying the compensating current signal with the compensating voltage signal; and a pulse width modulation converter receiving the compensating current signal and the compensating voltage signal generating the pulse width modulation signal to synchronize phase of alternating current voltage and input current.

Full Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is a continuation application of a pending US patent application entitled “POWER FACTOR CORRECTION DEVICE AND CORRECTING METHOD THEREOF” application Ser. No. 13/408,077, filing date: Feb. 29, 2012, inventor Chung-Ping Ku (attorney docket# APOM070). The above contents are incorporated herein by reference for any and all purposes. 
     
    
     FIELD OF THE INVENTION 
       [0002]    The invention relates to power factor correction (PFC) devices, in particular to a power factor correction device for PFC Boost converters. 
       BACKGROUND OF THE INVENTION 
       [0003]    Nowadays, high-quality power supplies with increasing energy efficiency are in high demand. Power factor correction technique plays an important role in improving the electric power supply efficiency of electric appliances, which are usually inductive loads that cause the current and voltage out of phase leading to low energy efficiency. A power factor corrector synchronizes the phases of the input voltage and the input current of an electric appliance, namely, the load of the electric appliance is adapted similar to a resistance-type load, thus harmonic distortion of the input current is effectively reduced resulting in high power factor of power supply. 
         [0004]    A common power factor correction device requires a pulse width modulation (PWM) signal generator to provide a pulse width modulation (PWM) signal and a sample of an input voltage as a reference signal for correcting the current. In the conventional technologies, for example, the pulse width modulation signal generator disclosed by U.S. Pat. No. 5,886,586 does not require the input voltage sample but uses an integrator to perform one-cycle (i.e., feed-forward) control method to decide charge-discharge time and electric potential of an integrated capacitor. Other US patents, such as U.S. Pat. Nos. 7,068,016 and 5,804,950, also disclose similar technologies. However, the above patents using the integrator or the integrated capacitor in or out of a circuit, as such the response speed of the internal circuit is greatly reduced during the operation. In addition, the circuit is internally provided with a switch for discharging the integrated capacitor; therefore, power consumption is increased and the circuit space is enlarged. 
         [0005]    Hence, the invention provides a power factor correction device and a correcting method thereof to solve the above problems. 
       SUMMARY OF THE INVENTION 
       [0006]    The present invention provides a power factor correction device and a correcting method. The current compensating circuit and the voltage compensating circuit are connected to a multiplier to multiply the compensating voltage signal by the compensating current signal to generate an updated reference current signal. The updated reference current signal is provided to the current compensating circuit to perform power factor correction. The device and method of the present invention can avoid the use of the integrated capacitor, therefore the response speed of the internal circuit is greatly increased during operation, thus power factor correcting efficiency is improved. 
         [0007]    To achieve the above purpose, the present invention provides a power factor correction device, which comprises a power stage circuit. The power stage circuit, which is connected to a load, receives an input alternating current (AC) voltage and a pulse width modulation signal. The input alternating current voltage is converted into an input current in accordance with the pulse width modulation signal via the inductor, the power diode and the power transistor, which are driven by the pulse width modulation signal. The input current is output to the load, which produces an output voltage on the load. The power stage circuit samples the input current through the sample resistor as a correcting current. The power stage circuit is connected to the current compensating circuit that receives error between the correcting current and the reference current signal, thus a compensating current signal is generated through the current error amplifier and the current compensator. The power stage circuit is also connected to the voltage compensating circuit and the error between the output voltage and a reference voltage is received by the voltage divider, thus, a compensating voltage signal is generated by the voltage error amplifier and the voltage compensator. The outputs of the current compensating circuit and the voltage compensating circuit are connected with a multiplication amplifier that receives the compensating current signal and the compensating voltage signal, thus an updated reference current signal is generated after multiplying the compensating current signal by the compensating voltage signal. The current compensating circuit and the voltage compensating circuit are connected to a pulse width modulation converter that receives the compensating current signal and the compensating voltage signal to generate the updated pulse width modulation signal and to obtain the same phases of the alternating current voltage and the input current. 
         [0008]    The present invention also provides a power factor correcting method. First the correcting current and output voltage is compared to a reference current signal and a reference voltage respectively generating a compensating current signal and a compensating voltage signal through the current compensating circuit and the voltage compensating circuit, as such an updated pulse width modulation signal is generated and same phases of the alternating voltage and the input current are obtained. An updated reference current signal is obtained by multiplying the compensating current signal with the compensating voltage signal through the multiplication amplifier. Finally, the updated pulse width modulation signal is generated from the compensating current signal and the compensating voltage signal and the same phases of the alternating current voltage and the input current are achieved. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0009]    As shown in attached drawing, the embodiment of the invention is more sufficiently described. However, the attached drawing is only used for explanation and illustration rather than limitation to the scope of the invention. 
           [0010]      FIG. 1  is a circuit schematic diagram of the power correction device of the present invention. 
           [0011]      FIG. 2  is a block diagram for the transfer function of the power correction device of the present invention. 
           [0012]      FIG. 3  is a flow diagram of the correcting method of the present invention. 
           [0013]      FIG. 4  is a waveform diagram of all received and generated signals in power correction device of the present invention. 
           [0014]      FIG. 5  is an amplified waveform diagram of the reference current signal, the compensating current signal and the compensating voltage signal of  FIG. 4 . 
           [0015]      FIG. 6  is a waveform diagram of the ramp signal, the compensating current signal and the pulse width modulation signal. 
           [0016]      FIG. 7  is a waveform diagram of the 220V alternating current voltage and its input current achieved by the power correction device of the present invention. 
           [0017]      FIG. 8  is a waveform diagram of the 110V alternating current voltage and its input current achieved by power correction device of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
       [0018]    As shown in  FIG. 1 , the power factor correction device of the invention includes a power stage circuit  12  connected to a load  10 . The power stage circuit  12  receives an alternating-current (AC) voltage V AC  and a pulse width modulation signal V PWM , then, the alternating-current (AC) voltage V AC  is converted into an input current I AC  in accordance with the pulse width modulation signal V PWM . The input current I AC  is fed to the load  10  to generate an output voltage V o  on the load  10 . The input current I AC  is also sampled as a correcting current I sen . The power stage circuit  12  is connected to a current compensating circuit  14  and a voltage compensating circuit  16 . The current compensating circuit  14  receives and compares the correcting current I sen  with a reference current signal I ref  to generate a compensating current signal I EA . The voltage compensating circuit  16  receives and compares the output voltage V o  with a reference voltage V ref  to generate a compensating voltage signal V EA . Both of the current compensating circuit  14  and the voltage compensating circuit  16  are connected to a multiplication amplified  8  and a pulse width modulation converter  20 . The multiplication amplifier  18  receives and multiplies the compensating current signal I EA  with the compensating voltage signal V EA  to generate an updated reference current signal I ref . The pulse width modulation converter  20  receives the compensating current signal I EA  and the compensating voltage signal V EA  to generate an updated pulse width modulation signal V PWM , thus same phases of the alternating current voltage V AC  and the input current I AC  is obtained. 
         [0019]    The power stage circuit  12  includes a sample resistor  22  and an alternating-current/direct-current (AC/DC) converter  24 . The AC/DC converter  24  includes an inductor  241 , a power transistor  243 , and a power diode  245 . The sample resistor  22  is connected to the current compensating circuit  14 . The AC/DC converter  24  is connected to the load  10 , the sample resistor  22 , the current compensating circuit  14  and the voltage compensating circuit  16 . The AC/DC converter  24  receives AC voltage V AC  and pulse width modulation signal V PWM , then the AC voltage V AC  is converted into input current I AC  in accordance with the pulse width modulation signal V PWM  by inductor  241 , power transistor  243 , and power diode  245 , thus the input current I AC  is fed to the load to generate the output voltage Vo. Furthermore, the input current I AC  is sampled by the sample resistor  22  to generate the correcting current I sen . 
         [0020]    The current compensating circuit  14  includes a current error amplifier  26  and a current compensator  28 . The current error amplifier  26  connected to the sample resistor  22  of the power stage circuit  12  receives and compares the correcting current I sen  and a reference current signal I ref , thus generating a comparing current. The current compensator  28  connected to the current error amplifier  26  receives and compensates the comparing current to generate the compensating current signal I EA . The voltage compensating circuit  16  comprises a voltage divider  30  that is connected to the AC/DC converter  24  of the power stage circuit  12 , receives and divides the output voltage V o  to generate a feedback voltage V FB . The voltage divider  30  is connected to a voltage error amplifier  32  that receives and compares the feedback voltage V FB  with a reference voltage V ref  to generate a comparing voltage. The voltage error amplifier  32  is connected to a voltage compensator  34  that receives and compensates the comparing voltage thus generates a compensating voltage signal V EA . 
         [0021]    The multiplication amplifier  18  includes a multiplier  36  and a current gain regulator  38 . The multiplier  36  is connected to the current compensator  28  of the current compensating circuit  14  and the voltage compensator  34  of the voltage compensating circuit  16  and receives the compensating current signal I EA  and the compensating voltage signal V EA  to generate a compensating feedback current by multiplying the compensating current signal I EA  by the compensating voltage signal V EA . The multiplier  36  is also connected to the current gain regulator  38  that receives the compensating feedback current and generates an updated reference current signal I ref  by multiplying the compensating feedback current by a current gain K m . 
         [0022]    The pulse width modulation converter  20  includes a ramp generator  40  that is connected to the voltage error amplifier  32  of voltage compensating circuit  16  and receives the compensating voltage signal V EA  to generate a ramp signal V RAMP . Ramp generator  40  and current error amplifier  26  of the current compensating circuit  14  are connected to a conversion comparator  42  that receives and compares ramp signal V RAMP  with compensating current signal I EA  to generate an updated pulse width modulation signal V PWM  that is fed into the AC/DC converter  24  of the power stage circuit  12 . When the voltage value of the ramp signal V RAMP  is higher than the corresponding voltage value of the compensating current signal I EA , the updated pulse width modulation signal V RAMP  is a high level voltage. Otherwise, when the voltage value of the ramp signal V RAMP  is lower than the corresponding voltage value of the compensating current signal I EA  the updated pulse width modulation signal V PWM  is a low level voltage. 
         [0023]    In order to obtain same phases of the input alternating current voltage and the input current, the sample resistance, the pulse width modulation signal V PWM , the input current I AC , the alternating current voltage V AC , the output voltage V o  and the ramp signal V RAMP  have to be satisfied the following conditions: 
         [0000]        R   S   ·i   in (θ)= d   OFF (θ)· T   S.W.   ·S   V   (1)
 
         [0000]        d   OFF (θ)= V   in     —     pk ·sin(θ)/ V   o =1 −d (θ)  (2)
 
         [0000]        i   in (θ)= V   in     —     pk ·sin(θ)/ R   in(ac)   (3)
 
         [0024]    where:
       i in (θ) is the input current I AC ,   V in      —     pk ·sin(θ) is the alternating current voltage V AC ,   S V  is slope of the ramp signal V RAMP ,   R in(ac)  is equivalent input alternating current resistance,   T S.W.  and d(θ) are cycle and duty cycle of the pulse width modulation signal V PWM  respectively.
 
Formulas (4) and (5) can be obtained from formulas (1), (2) and (3) as follows:
       
 
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         [0000]    From formula (5), R in(ac)  is a constant, therefore, the phases of the alternating current voltage and the input current are the same. 
         [0030]    The input power P in , the compensating current signal I EA , the compensating voltage signal V EA , the slope S V  of the ramp signal V RAMP , and a peak voltage V pmax  of the ramp signal V RAMP  are introduced as follows: 
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       Where: 
       [0031]    K multi  is multiplication gain of the multiplier  36 , 
         [0032]    g mv  is the gain of the voltage error amplifier  32 , 
         [0033]    C s  is a capacitance value of the interior capacitor of the ramp generator  40 , 
         [0034]    I EAmax  is the largest current value of the compensating current signal I EA , and 
         [0035]    V ACmin  is the smallest value of the alternating current voltage. 
         [0036]    An updated reference current signal I ref  is obtained by multiplying the compensating current signal I EA  by the compensating voltage signal V EA , as follows: 
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       Where: 
       [0037]    K V  is a voltage division proportion of the voltage divider  30 , and 
         [0038]    Z comp  is impedance of the current compensator  28 . 
         [0039]    In this invention, a sample of the input voltage is not required and the compensating current signal I EA  and the compensating voltage signal V EA  are used to acquire an updated reference current signal I ref  to achieve the correction of the power factor. The method of the invention can avoid the use of an integrated capacitor, as such the response speed of the internal circuit is greatly increased during operation to improve the power correction efficiency. 
         [0040]      FIG. 2  and  FIG. 3  describe a correcting method of the invention. As shown in  FIG. 2 , G v(s)  is a transfer function of the voltage compensator  34 , G i(s)  is the transfer function of the current compensator  28 , G id(s)  is the transfer function of the AC/DC converter  24 , and K PWM  is the transfer function of the pulse width modulation converter  20 . As shown in step S 10 , the AC/DC converter  24  of the power level circuit  12  receives the input alternating current voltage V AC  and the pulse width modulation signal V PWM , then converts the alternating current voltage V AC  into the input current I AC  in accordance with the pulse width modulation signal V PWM . As shown in step S 12 , the input current I AC  is converted into the output voltage V o  by the AC/DC converter  24  of the power stage circuit  12 , and the input current I AC  is also sampled via the sample resistor  22  as a correcting current I sen . As shown in step S 14 , the current compensating circuit  14  receives the correcting current I sen  that is compared to a reference current signal I ref  via the current compensating circuit  14  to generate the compensating current signal I EA . Specifically, the current error amplifier  26  receives and compares the correcting current I sen  with the reference current signal I ref  thus generates a comparing current. Then, the current compensator  28  receives and compensates the comparing current thus generates the compensating current signal I EA . 
         [0041]    The voltage compensating circuit  16  receives the output voltage V o  that is compared with a reference voltage V ref  via the voltage compensating circuit  16  to generate the compensating voltage signal V EA . Specifically, the voltage divider  30  receives the output voltage V o  to generate one feedback voltage. Then, the voltage error amplifier  32  receives and compares the feedback voltage with a reference voltage V ref  to generate the comparing voltage. Finally, the voltage compensator  34  receives and compensates the comparing voltage thus generates the compensating voltage signal V EA . 
         [0042]    An updated reference current signal I ref  is obtained by multiplying the compensating current signal I EA  by the compensating voltage signal V EA  by the multiplication amplifier  18 . Specifically, the multiplier  36  receives the compensating current signal I EA  and the compensating voltage signal V EA  to generate the compensating feedback current by multiplying the compensating current signal I EA  by the compensating voltage signal V EA , then the current gain regulator  38  receives the compensating feedback current that is multiplied by the current gain K m  to generate the reference current signal I ref . 
         [0043]    Finally, as shown in step S 16 , the pulse width modulation converter  20  receives the compensating current signal I EA  and the compensating voltage signal V EA  to generate the updated pulse width modulation signal V PWM  that is transmitted into the power stage circuit  12 . Specifically, the ramp generator  40  receives the compensating voltage signal V EA  to generate ramp signal V RAMP , then, conversion comparator  42  receives and compares the ramp signal V RAMP  and compensating current signal I EA  thus generates the updated pulse width modulation signal V PWM  that is fed to the power stage circuit  12 , thus returning back to step S 10 . The whole process of steps S 10  to S 16  is repeated to achieve the phase synchronization for the alternating current voltage and the input current. 
         [0044]      FIG. 4  shows the waveforms of the reference current signal I ref , compensating voltage signal V EA , feedback voltage V FB , alternating current voltage V AC , compensating current signal I EA  and ramp signal V RAMP .  FIG. 5  shows corresponding reference current signal I ref , compensating current signal I EA  and compensating voltage signal V EA  of  FIG. 4  after amplifying. 
         [0045]    In conversion process of the conversion comparator  42 , when the voltage value of the ramp signal V RAMP  is higher than the corresponding voltage value of the compensating current signal I EA , the updated pulse width modulation signal V PWM  is a high level voltage. Otherwise, when the voltage value of the ramp signal V RAMP  is lower than the corresponding voltage value of the compensating current signal I EA , the updated pulse width modulation signal V PWM  is a low level voltage, as shown in  FIG. 6 . 
         [0046]      FIG. 7  shows the waveforms of 220V alternating current voltage V AC  and its input current I AC  and  FIG. 8  shows the waveforms of 110V alternating current voltage V AC  and its input current I AC , which are achieved by the correction device of the present invention. As shown in these figures, the phases of the alternating current voltage V AC  and its input current are the same, as such the purpose of power factor correction is achieved. 
         [0047]    The present invention uses only one multiplication amplifier to receive compensating current signal and compensating voltage signal to generate the updated reference current signal that is provided to the current compensating circuit for correcting the power factor of the input signal. 
         [0048]    The above is only one better embodiment of the invention, which is not used for limiting the scope of implementation of the invention. Therefore, equivalent changes and decorations caused by the shapes, configurations, characteristics and spirits in the scope of application for patent in the invention are all contained in the scope of the application for patent in the invention.

Technology Classification (CPC): 7