Patent Abstract:
In one embodiment, an electrical circuit formed on a substrate includes a first multi-layer stack and a second multi-layer stack that share a top layer that comprises a continuous piece of conductive material.

Full Description:
CROSS-REFERENCE TO RELATED APPLICATION(S) 
     This application claims priority to U.S. Provisional Application Ser. No. 61/715,430, filed Oct. 18, 2012, which is hereby incorporated by reference herein in its entirety. 
    
    
     BACKGROUND 
     One of the most important aspects of chip fabrication, such as complementary metal-oxide-semiconductor (CMOS) fabrication, entails the contact definitions. In a highly complex chip design, there are many contacts to interconnect a multitude of devices within the chip. Devices such as transistors and diodes specific to a particular circuit have contacts dedicated to that circuit. Parallel and series circuits are generally made by fabricating devices specific to that circuit, and a circuit requiring the connections of the devices in a particular way is separately fabricated. If a different circuit comprising the same device types but requiring a different circuit connection is needed, a new set of devices with the required connections would have to be fabricated separately. Such a process reduces real estate in a chip and gives rise to other complications, such as reliability issues during fabrication, reliability issues during operation, and increased heat buildup in the chip. 
     It can therefore be appreciated that it would be desirable to have an alternative system and method for forming contact definitions. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The present disclosure may be better understood with reference to the following figures. Matching reference numerals designate corresponding parts throughout the figures, which are not necessarily drawn to scale. 
         FIG. 1  is a schematic diagram of an embodiment of a circuit comprising multiple metal-insulator-metal devices. 
         FIGS. 2A-2D  are cross-sectional views that illustrate steps in an embodiment of fabricating the circuit of  FIG. 1 . 
         FIGS. 3A-3C  are schematic diagrams of alternative circuit embodiments comprising multiple metal-insulator-metal devices. 
         FIG. 4  is a partial side view of a mask set that can be used to fabricate a circuit. 
         FIG. 5  is a top view of two of the masks of the mask set of  FIG. 4 , illustrating alignment marks provided on the masks. 
         FIGS. 6A-6C  are illustrations of different alignments between the masks of  FIG. 5  and show the results of the alignments. 
         FIG. 7  is a first example circuit that can be formed using the masks of  FIG. 5 . 
         FIG. 8  is a second example circuit that can be formed using the masks of  FIG. 5 . 
     
    
    
     DETAILED DESCRIPTION 
     As described above, current methods for forming contact definitions for devices on a chip can be disadvantageous because circuits for connecting the devices must be specifically fabricated for the desired circuit. Therefore, if a different circuit comprising the same device types is desired, a new set of devices with a new set of connections would need to be separately fabricated. As described herein, such disadvantages can be avoided. In some embodiments, a circuit comprising multiple metal-insulator-metal (MIM) devices can be formed by depositing layers of metal that both form the top electrodes of the MIM devices and provide interconnection of the MIM devices. In some embodiments, the extent to which the layers of metal overlap, and therefore the size of the active area, can be controlled to change one or both of the current density and the frequency range of the devices. 
     In the following disclosure, various embodiments are described. It is to be understood that those embodiments are example implementations of the disclosed inventions and that alternative embodiments are possible. All such embodiments are intended to fall within the scope of this disclosure. 
     The methods disclosed herein enable multiple MIM tunnel devices to be connected either serially or in parallel to form an electrical circuit. Moreover, the contact areas between devices can be altered by simply moving a photomask used to form the top electrodes of the devices by incremental distances. This enables the current densities of the devices to be altered without having to redesign the devices. In some embodiments, a plurality of MIM devices can be fabricated with the point of contact being defined in such a way that the devices can be used in series or in parallel with multiple variations, as desired for the test setup or circuit. Moreover, by varying the dielectric properties and/or thicknesses of the insulators, the devices can be altered to be used as a resistors, capacitors, or diodes. 
     Thin-film devices are now increasingly used in the fabrication of passive elements such as resistors and capacitors, and active devices such as diodes including transistors. MIM devices are widely-used thin-film devices. MIM devices typically are formed as quadrilateral structures that include a bottom electrode, an insulator, and a top electrode. The fabrication methods described below enable multiple MIM devices to be connected either serially or in parallel to complete an electrical circuit. Moreover, the contact areas between devices can be altered by simply moving the photomask used to form the top electrode. This enables the current densities of the devices to be altered without having to redesign the devices. Assuming a quadrilateral configuration, one, two, three, or four devices can be connected at any single circuit connection. Therefore a base of one, two, three, or four connection combinations can be achieved. By connecting the devices in such a manner, bottom electrodes and insulator stacks can be independently fabricated and the circuit can later be completed by forming top electrodes that connect two or more electrode/insulator stacks. Also, by including a switching element, single or multiple devices can be called into operation as needed without having to constantly pass power through the same devices. 
       FIG. 1  illustrates an example circuit  10  that can be formed using the techniques described above and  FIG. 2  illustrates steps of an example fabrication method. In the example of  FIG. 1 , six MIM devices  12  are formed. As is shown in  FIG. 2A , the circuit  10  can be formed on a substrate  14 , such as a silicon substrate. With reference to  FIG. 2B , bottom electrodes  16  of the devices  12  can be formed on the substrate  14  in a spaced configuration. In some embodiments, the electrodes  16  are made of a metal material, such as nickel, aluminum, gold, or platinum, and are deposited using a conventional microfabrication process, such as photolithography and material deposition (e.g., sputtering). In some embodiments, the electrodes  16  can be approximately 0.5 to 3 μm thick. 
     With reference next to  FIG. 2C , each of the bottom electrodes  16  is encapsulated in a layer or film  18  of insulating material. In some embodiments the insulating material can comprise one or more of a metal oxide (e.g., nickel oxide or aluminum oxide) or a polymer (organic or inorganic) and can also be formed using a conventional microfabrication process. In some embodiments, the insulating films  18  can be approximately 0.001 to 1 μm thick. The insulating films  18  act as insulators in the MIM devices  12 . 
     Once the bottom electrodes  16  and insulating films  18  have been formed, a photomask can be used to define windows for the top electrodes of the MIM devices  12 . As with the bottom electrodes, the top electrodes can be made of a metal material, such as nickel, aluminum, gold, or platinum, and can also be formed by using a conventional microfabrication process. As shown in  FIG. 2D , layers of metal  20  can be deposited on top of the insulating films  18  to form the MIM devices  12  shown in  FIG. 1 . In some embodiments, the metal layers  20  can be approximately 0.5 to 3 μm thick. 
     As indicated  FIG. 2D , each metal layer  20  covers portions of the insulating films  18 , and therefore overlaps bottom electrodes  16 , of multiple devices  12  (two devices in this example) so that the top electrodes of multiple MIM devices are formed by the same metal layer. In other words, the deposited metal layers  20  extend across multiple MIM devices so as to both form the top electrodes of and electrically connect the MIM devices over which they extend. As is shown in  FIG. 2D , the metal layers  20  also cover portions of the sides of the insulating films  18  as well as the surface of the substrate  14 . In the illustrated embodiment, four metal/insulator stacks are covered by three metal layers  20  to form six MIM devices  12  that are electrically connected to each other. Therefore, multiple MIM devices can be simultaneously fabricated and interconnected in a single lithography step. 
     The method described above can be used to form devices that are serially connected or connected in parallel.  FIGS. 3A-3C  illustrate example circuit layouts  30 ,  34 , and  38  (left) and their equivalent circuit diagrams  32 ,  36 , and  40  (right). In the circuits, each of the devices can be MIM devices, which can be configured as resistors, capacitors, or diodes, depending upon the nature of the insulation films (e.g., dielectric properties, thickness) that is used in their construction. As can be appreciated from the layouts and circuit diagrams, a plurality of MIM devices can be connected either serially ( FIGS. 3A and 3B ) or in parallel ( FIG. 3C ) and the connections between the devices can be altered depending on the desired result. 
     As expressed above, the circuits can be formed using conventional microfabrication processes, such as photolithography. In such a process, photomasks are used to define the patterns of the features (e.g., electrodes) that are to be formed on a substrate. In the typical case, a mask set comprising one photomask for each layer of the devices to be formed is provided.  FIG. 4  shows an example mask set  50  that comprises three photomasks,  52 ,  54 , and  56 , which can, for example, be used to form the bottom electrodes, insulating layer, and top electrodes, respectively of multiple MIM devices. Each photomask  52 - 56  can comprise a thin transparent (e.g., glass) plate that includes a layer of opaque material (e.g., chrome) that forms a pattern that enables ultraviolet light to pass through the plate in some areas (e.g., where an electrode is to be formed) but prevents the light from passing through the plate in other areas. 
     The photomasks of a mask set are typically aligned with each other using alignment marks that are provided on the photomasks. Such alignment ensures that the various features that are formed on the substrate are laterally aligned with each other in the desired manner. Such alignment marks can be used to control the amount of overlap between two layers of material. Therefore, alignment marks can be used to control the amount of overlap between bottom and top electrodes of an MIM device and, therefore, control the size of the MIM device&#39;s active area. 
       FIG. 5  shows examples of alignment marks provided on two photomasks  52 ,  54  of the mask set  50  of  FIG. 4 . As shown in  FIG. 5 , the first photomask  52  comprises an alignment mark  58  in the form of a series of corner markers  60 - 66 . Each corner marker  60 - 66  comprises a first line (x-direction line) that extends from a point and a second line (y-direction line) that extends from the same point in a direction 90° out of phase of the first line so as to define a 90° corner. In the illustrated example, there are four such corner markers  60 - 66 , each equally spaced from its neighbor(s) along a 45° diagonal direction. 
     The second photomask  54  also comprises an alignment mark  68  that comprises a corner marker  70 . Like the corner markers  60 - 66 , the corner marker  70  comprises a first line that extends from a point and a second line that extends from the same point in a direction 90° out of phase of the first line so as to define a 90° corner. If the corner markers  60 - 66  are said to have lines that extend in the x direction and the y direction, the corner marker  70  can be said to have lines that extend in the −x direction and the −y direction so as to be rotated 180° relative to the corner markers  60 - 66 . 
     The alignment marks  58  and  68  can be used to control the overlap between different layers of a device.  FIGS. 6A-6C  show an example of this. As indicated in  FIG. 6A , the first and second masks have been aligned so that the corner marker  70  of the alignment mark  68  aligns with the second corner marker  62  of the alignment mark  58 . With this configuration, a relatively small amount of overlap between two layers  72  and  74  will be formed. 
     Referring to next  FIG. 6B , the masks have been aligned so that the corner marker  70  of the alignment mark  68  aligns with the third corner marker  64  of the alignment mark  58 . With this configuration, a larger amount of overlap between two layers  72  and  74  results. 
     Finally, with reference to  FIG. 6C , the masks have been aligned so that the corner marker  70  of the alignment mark  68  aligns with the fourth corner marker  66  of the alignment mark  58 . With this configuration, a still larger amount of overlap between two layers  72  and  74  results. 
     In some embodiments, the alignment between two or more photomasks can be changed for different wafers to form devices having different current densities from wafer to wafer. In other embodiments, the alignment can be changed for different dies on the same wafer to form devices having different current densities on the same wafer. 
       FIGS. 7 and 8  show example arrays of devices (e.g., MIM devices) that can be formed using the above-described alignment method. In  FIG. 7 , an array of first layers  76  is formed on a substrate using a first photomask and an array of second layers  78  is formed over the first array using a second photomask. As indicated in the figure, the second layers  78  overlap the first layers  76  to a relatively small degree. In  FIG. 8 , an array of first layers  80  is formed on a substrate using a first photomask and an array of second layers  82  are formed over the first layers using a second photomask. In this example, however, the second layers overlap the first layers to a much larger degree. In some embodiments, such arrays can be used as sensors. For example, the devices can be immersed in a fluid (gas or liquid) and the electrical properties of the device, such as resistance or capacitance, can be observed to determine the effect of the fluid on the properties as a means of detecting the presence or concentration of a substance. In such an application, different current densities resulting from different degrees of overlap can be used to adjust the sensing frequency. 
     Although the above discussion has focused on MIM devices, the disclosed methods can be used in conjunction with other devices, such as metal-insulator-semiconductor devices.

Technology Classification (CPC): 7