Patent Abstract:
A thermo-optic switch comprises two planar waveguide and a heating element couple to at least one of the planar waveguides. The heating element is coupled to a package substrate using solder bumps.

Full Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The described invention relates to the field of opto-electronic circuits. In particular, the invention relates to an opto-electronic circuit that is coupled to a package substrate via solder bump technology.  
           [0003]    2. Description of Related Art  
           [0004]    Optical circuits include, but are not limited to, light sources, detectors and/or waveguides that provide such functions as multiplexing, demultiplexing and/or switching. Planar lightwave circuits (PLCS) are optical circuits that are manufactured and operate in the plane of the circuit. PLC technology is advantageous because it can be used to form small-scale components, such as array waveguide grating (AWG) filters, optical add/drop (de)multiplexers, optical switches, monolithic, as well as hybrid opto-electronic integration devices. Such devices formed with optical fibers would typically be much larger. Further, PLC structures may be batch fabricated on a silicon wafer.  
           [0005]    An opto-electronic device circuit combines both electrical and optical functions. One type of opto-electronic circuit is a thermo-optic switch (TOS) made of a Mach-Zehnder interferometer. In a TOS, an optical signal is switched by providing an electrical input, i.e., an electrical current, to heat a heating element adjacent to an optical waveguide made of material, such as silica-on-silicon, that is sensitive to temperature. Heating the temperature-sensitive optical waveguide changes the refractive index and controls the path length of the optical waveguide, which results in the optical signal switching its optical path in the TOS, as is well-known. Various types of thermo-optic switches have been commercialized, such as 1×1, 1×2, 2×2, 4×4, 8×5 and 8-arrayed 2×2 varieties.  
           [0006]    An opto-electronic device, such as a thermo-optic switch is typically coupled to an external electrical power supply by wire bonding from the power supply to the heating element of the thermo-optic switch.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0007]    [0007]FIG. 1 is a schematic diagram showing one embodiment of an opto-electronic circuit.  
         [0008]    [0008]FIG. 2 is a schematic diagram showing an example of a cross-section of an opto-electronic device attached to a circuit board.  
     
    
     DETAILED DESCRIPTION  
       [0009]    An opto-electronic circuit is coupled to a package substrate through solder bumps. The solder bumps provide electrical connections to the opto-electronic circuit. In one embodiment, solder bumps are coupled to heating elements of a thermo-optic switch (TOS).  
         [0010]    [0010]FIG. 1 is a schematic diagram showing one embodiment of an opto-electronic circuit. In this embodiment, a TOS  105  is fabricated on a first substrate  100 . A first heating element  110  is coupled to one portion of the TOS  105 , and a second heating element  112  is coupled to a second portion of the TOS  105 . In one embodiment the heating elements  110 ,  112  are applied in a process step that leaves the heating elements  110 ,  112  at least partially exposed on a top surface of the first substrate  100 . The substrate  100  is subsequently turned upside down for coupling to the package substrate  150 .  
         [0011]    The package substrate  150  comprises multiple conductive strips, such as conductive strips  151 ,  152 , and  153 . The conductive strips  151 ,  152 , and  153  are designed to make electrical contact with the exposed conductive surfaces of the TOS  105 , such as the heating elements  110 ,  112 . In one embodiment the TOS  105  is coupled to the package substrate  150  at the conductive strips  151 ,  152 , and  153  via solder bump technology.  
         [0012]    Solder bump technology, also called flip-chip or control collapse chip connection (“C 4 ”) technology, uses solder bumps to both attach and establish electrical connections to a package substrate  150 . With this technology, solder bumps are reflowed to make connection to terminal pads on the package substrate  150 .  
         [0013]    In the example of FIG. 1, one end of the heating elements  110 ,  112  makes contact with conductive strips  151  and  152 , respectively, and the other end of the heating elements  110 ,  112  makes contact with conductive strip  153  as a “common”, which in one embodiment may be coupled to a common ground.  
         [0014]    In one embodiment, the conductive strips  151 ,  152 ,  153  are coupled to conductive pads  161 ,  162 ,  163 , respectively, on an opposite side of the package substrate through vias  171 ,  172 ,  173 , respectively. The conductive pads  161 ,  162 ,  163  are coupled to leads or solder bumps for attaching the package substrate to a circuit board. Additionally the conductive pads  161 ,  162 ,  163  may assist with heat dissipation from the TOS  105 .  
         [0015]    [0015]FIG. 2 is a schematic diagram showing an example of a cross-section of an opto-electronic device  200  attached to a circuit board  220 . An opto-electronic substrate  205  is coupled to a package substrate  210  via solder bump technology comprising conductive pads  230  on the opto-electronic substrate, solder bumps  232 , and conductive strips  234  on the package substrate  210 .  
         [0016]    In one embodiment, the conductive strips  234  of the package substrate  210  are coupled to conductive pads  240  on the opposite surface of the package substrate  210 , and the conductive pads  240  are attached to the circuit board  220  via solder bumps  242 . Alternatively, the conductive strips  234  of the package substrate may be coupled to leads for attaching the package substrate  210  to a circuit board  220 . In one example, the leads may be surface mountable, pin grid array, or any of various other types.  
         [0017]    A package substrate  210  having multiple layers allows interconnects  250  within the package substrate  210 . This provides more flexibility with designing the layouts of the conductive pads  230  of the opto-electronic substrate  205  and the conductive strips  234  of the package substrate  210 . Multiple layers also assists with heat dissipation.  
         [0018]    An electrical controller  260  may be coupled to the opto-electronic device  200  to provide control of the electrical inputs to the opto-electronic device  200 . In one embodiment the electrical controller  260  and the opto-electronic device  200  are both surface mounted to a circuit board  220 , and the electrical coupling between the electrical controller  260  and the opto-electronic device  200  are made through interconnects  262  within the circuit board  220 .  
         [0019]    Returning to FIG. 1, in an alternate embodiment, an electrical controller  300  may be integrated onto the package substrate  150 . The electrical controller die may be coupled to the electrical strips either via traces on the package substrate  150  or through a multilayer interconnects within the package substrate  150 .  
         [0020]    Thus, an opto-electronic device coupled to a package substrate via solder bumps is disclosed. However, the specific embodiments and methods described herein are merely illustrative. For example, although a TOS with two heating elements was described, any number of heating elements could be used with the disclosed architecture. Numerous modifications in form and detail may be made without departing from the scope of the invention as claimed below. The invention is limited only by the scope of the appended claims.

Technology Classification (CPC): 6