Patent Abstract:
A semiconductor die package design incorporating at least a pair of functional semiconductor dies. The input/output pads locations on one of the dies (the daughter die) are located at the near mirror image of the original die (mother die). The package architecture includes two dies back-to-back or stacked dies back-to-back, therefore a plurality of input/output interconnections can be formed. The package increases density and performance by twofold or more compared to a regular package containing only one die with the same footprint. At least one additional pin can be dedicated as the chip select pin for the daughter die or multiple dies. The other pins can be shared with the mother die.

Full Description:
FIELD OF THE INVENTION 
     This invention relates to stacked paired die packages, and more particularly to a stacked paired die package with dies stacked back to back. 
     BACKGROUND OF THE INVENTION 
     Semiconductor wafer manufacturing is a lengthy process. Once the functional design has been configured into a product, it requires a redesigned of the product if additional functionality needs to be added. For example, going from a 256 MB chip to a 512 MB chip may require changes to both the semiconductor fabrication processes and the chip design. Similarly, going from a 32-bit to a 64-bit processor may require similar changes involving both fabrication processes and chip design. The conventional method of improving functionality and performance is utilizing the substrate for connectivity, attaching multiple components to the same substrate. A variety of multi-component and/or stacked die designs are known to those skilled in the art. 
     SUMMARY OF THE INVENTION 
     A semiconductor die package design incorporating at least a pair of functional semiconductor dies. The input/output pads locations on one of the dies (the daughter die) are located so as to be the near mirror image of the original die (mother die). The package architecture includes two dies back-to-back or stacked dies back-to-back, therefore a plurality of input/output interconnections can be formed. The package increases density and performance by twofold or more compared to a regular package containing only one die with the same footprint. At least one additional pin can be dedicated as the chip select pin for the daughter die or multiple dies. The other pins can be shared with the mother die. 
    
    
     These and other embodiments of the present invention will become apparent from the following brief description of the drawings, detailed description of the preferred embodiments, and appended claims and drawings. 
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is an illustration of a semiconductor device, such as a memory device (mother die), with a particular pad distribution. 
     FIG. 2 is an illustration of the same semiconductor device or memory device as shown in FIG. 1 with the exception that the pads are redistributed to different locations to produce a daughter die having pads positioned in the near mirror image of the mother die. 
     FIG. 3 is an illustration of a wafer containing a plurality of mother dies. 
     FIG. 4 is an illustration of a wafer containing a plurality of daughter dies. 
     FIG. 5 is an illustration of a package containing two dies, mother and daughter dies, attached to a lead frame with wire bond interconnections. 
     FIG. 6 is an illustration of is a top view of the package of FIG. 5 wherein the mother die has a designated chip select pin with all other pins being shared by the mother and daughter die. 
     FIG. 7 is an illustration of the bottom view of a package containing two dies with the daughter die having a separate chip select pin with all other pins being shared. 
     FIG. 8 is an illustration of a finished package containing two dies after encapsulation, trim and form. 
     FIG. 9 is an illustration of a package containing four dies, two mother dies and two daughter dies, attached to a lead frame with wire bond interconnections. 
     FIG. 10 is an illustration of a top view of the package shown in FIG. 9 containing the four dies wherein two mother dies share all pins except chip select pins. 
     FIG. 11 is an illustration of the bottom view of the package containing four dies, wherein the daughter dies have their own designated select pins with all other pins being shared. 
     FIG. 12 is an illustration of a finished package containing four dies after the encapsulation, trim and form. 
     FIG. 13 is an illustration of a sectional view with portions broken away illustrating the bond pad connection in a mother die to a metallization layer of the underlying circuitry. 
     FIG. 14 is an illustration of a sectional view with portions broken away illustrating a daughter die with the bond pad connected to a redistribution trace that is connected to a metallization layer of the underlying circuitry that is identical to the mother die. 
     FIG. 15 is an illustration of an enlarged view with portions broken away of to stacked dies showing wire bond connections to the same electrically conductive lead of a lead frame. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 1 illustrates a first semiconductor device such as a mother die  100  according to the present invention. The mother die  100  includes a top face  102  which may include a passivation layer  104  and a plurality of exposed bond pads  106  which are numbered  1 - 56  in illustration of FIG.  1 . The mother die  100  includes an a first side edge  108  and an opposite second side edge  110 . A third side edge  112  extends between the first side edge  108  and the second side edge  110 . A fourth side edge  114  is positioned opposite the third side edge  112  and extends between the first side edge  108  and a second side edge  110 . A first series  116  of the bond pads  106 , numbered  1 - 28 , are positioned near the first side edge  108  of the mother die  100 . A second series  118  of the bond pads  106 , numbered  29 - 56 , are positioned near the second side edge  110  of the mother die  100 . The mother die  100  includes a complex circuitry including at least a first circuit (not shown). At least one of the first series  116  bond pads, and preferably all of the bond pads, are connected to the first circuit. 
     FIG. 2 illustrates a daughter die  120  including a top surface  122  which may have a passivation layer  124  with a plurality of exposed bond pads  126 . The daughter die  120  includes a first side edge  128  and an opposite second side edge  130 . A third side edge  132  extends between the first side edge  128  and the second side edge  130 . A fourth side edge  134  is opposite the third side edge  132  and extends between the first side edge  128  and the second side edge  130 . A first series  136 , numbered  1 - 28 , of bond pads  120  is positioned near the second side edge  130  of the daughter die  120 . A second series  128 , numbered  29 - 56 , of the bond pads  126  are positioned near the first side edge  128  of the daughter die  120 . As such, and the first series  136  and the second series  138  of bond pads of the daughter die are positioned at locations that are the near mirror image of the first series  116  and the second series  118  of the mother die  100 . The term near mirror image as used herein means that the bond pads  126  of the daughter die  120  are the exact mirror image of the bond pads  106  of the mother die  100  or that substantially all of the bond pads  126  of the daughter die  120  are positioned in substantially the mirror image of the bond pads  106  of the mother die  100 . For example, the bond pads of the daughter die  120  in FIG. 2 have the same bond pads  126 , in the first series  136  located all on the opposite (second) side edge  130  of the die  120  compared to the bond pads  106  of the first series  116  that are located near the first side edge  108  of the mother die  100 . Further more, the term near mirror image includes the relocation of a few bond pads  126  for example pads numbered  1  and  28 , as well the spacing between bond pads may be slightly different or varied. The daughter die  120  includes a complex circuitry including at least a first circuit that is identical to the first circuit of the mother die  100 . In a preferred embodiment the complete circuitry of the mother die  100  and the daughter die  120  are identical with the exception that the bond pads  126  of the daughter die  120  are redistributed to locations that are the near mirror image of the bond pads  106  of the mother die  100 . 
     FIGS. 13-14 illustrate the redistribution of the bond pads  126  of the daughter die  120  in comparison to the mother die  100 . FIG. 13 is a sectional view with portions broken away of the mother die  100  including a top metallization layer  160  which is connected to a bond pad  106  near the first side edge  108  of the mother die  100 . In comparison, FIG. 14 is a sectional view with portions broken away of the daughter die  120  with a top metallization layer  160  positioned near the first side edge  128  of the daughter die and which is electrically connected to a redistribution layer  162  near one end thereof and electrically connected to a bond pad  126  (near a second end of the redistribution layer  126 ) positioned near the second side edge  130  of the daughter die  120 . Thus, the bond pad  126  is laterally spaced a distance from the top metallization layer  160 . Additional layers may be interposed between the redistribution layer  162  and the top metallization layer  160  and between the redistribution layer  162  and the bond pad  126 . 
     FIG. 3 illustrates a semiconductor wafer having a plurality of mother dies  100  formed thereon with a complex circuitry including at least a first circuit. FIG. 4 illustrates a daughter die having a plurality of daughter dies having a complex circuitry including at least a first circuit that is identical to the first circuit of the mother die. In a preferred embodiment all of the circuitry of the daughter dies is identical to the circuitry of the mother die with the exception that the bond pads  126  are redistributed to a positions that are the near mirror image of the bond pads on the mother die as will be appreciated from comparing FIGS. 1 and 2. The circuitry of the mother die  100  and the daughter die  120  are identically manufactured. However, the bond pad  106  is connected to a top circuitry  160  in the mother die  100 , and as previously stated the daughter die  120  manufacturing includes an additional step of providing a redistribution layer  162  having one end connected to a top metallization layer  160  and the other end to a bond pad  126  positioned a distance laterally spaced from the top metallization layer  160 . 
     FIG. 5 illustrates a package according to the present invention including a mother die  100  having a top surface  102  with bond pads  106  (not shown) and a wire  146  connection to a electrically conductive lead  150  of a lead frame  144 . The lead frame  144  may include a flexible or rigid substrate, and may be made from any suitable material including for example but not limited to, a polyimide, plastic, resin, fiberglass board, ceramic and/or composite. The lead frame  144  may include a first series of leads  164  located near a first side edge  166  of the lead frame  144 , and a second series of leads  168  located near a second side edge  170  positioned opposite from the first side edge  166  of the lead frame  144 . The lead frame also contains a die pad  144 ′ in the center thereof. Alternatively, leads  150  may be provided along only one side of the lead frame  144 , or along multiple sides thereof. The bottom face  119  of the mother die  100  may be connected (secured) to a top face  143 ′ of the die pad  144 ′ by any variety of means including an adhesive. Similarly, a daughter die  120  having a top face  122  with bond pads  126  (not shown) thereon is mounted (secured) to the die pad  144 ′. The bottom face  139  of the daughter die  120  may be connected to or attached to the bottom face  145 ′ of the die pad  144 ′ by any of a variety of means including an adhesive. The mother die  100  and the daughter die  120  are positioned so that the first side edge  108  of the mother die  100  is adjacent the second side edge  130  of the daughter die  120 . Consequently, the first series  116  of bond pads  106  of the mother die  100  are adjacent the first series  136  of bond pads  126  of the daughter die  120 . The bond pad on the mother die  100  that is connected to the first circuitry is electrically connected to a first lead  150  of the lead frame  144  and the bond pad of the daughter die  120  that is connected to the first circuitry of the daughter die is electrically connected to the same first lead  150  of the lead frame  144 . Although bond wires are provided to electrically connect a bond pad on the mother die  100  or daughter die  120  to a lead  150  of the lead frame  144 , the invention includes any means of electrically connecting a bond pad  106  or  126  to the lead  150 . For example, but not limited to, the invention may include a die  100  or  120  in a flip chip form including a bond pad  106  or  126  connected to a solder bump which in turn is connected to an electrically conductive trace that is connected to the electrical lead  150  of the lead frame  144 . 
     As will be appreciated from FIG. 6, one of the bond pads  106  of the mother die  100  may be connected to a first select pin lead  150 ′ that is exposed by the top surface  143  of the lead frame  144 . No other bond pad is connected to the first select pin lead  150 ′. The remaining bond pads  106  on the mother die  100  are each individually connected to a respective shared lead  150  that will also be shared by one of bond pads on the daughter die  120 . 
     As will be appreciated from FIG. 7, one of the bond pads  126  of the daughter die  120  may be connected to a second select pin lead  150 ″ that is exposed by the bottom surface  145  of the lead frame  144 . The second select pin lead  150 ″ will not be connected to or shared by any other bond pad. Each one of remaining bond pads  126  will each individually be connected to one of the other shared leads  150  and will be shared by a bond pad  106  on the mother die  100 . 
     FIG. 8 is a side view of a package according to the present invention showing the mother die  100  having a bottom face  119  connected to a die pad  144 ′ and a daughter die  120  having a bottom face  139  connected to the die pad  144 ′ so that the mother die  100  and the daughter die  120  are positioned back-to-back. At least one bond pad  106  (not shown) of the mother die  100  has a wire  146  bonded to a first shared lead  150  of the lead frame  144 , and one bond pad  126  (not shown) of the daughter die  120  has a wire  148  connected to the same first shared lead  150 . Preferably each one of the shared leads  150  has a wire bonded thereto and to a bond pad  106  on the mother die  100 , and a wire bond to the same lead  150  and to a bond pad  126  of the daughter die  120 , with only a single wire bond from a bond pad  106  connected to the first select pin  150 ′ and a single wire bond from a bond pad  126  to the second select pin  150 ″. The packaging of the daughter die  120  together with the original mother die  100  improves the memory density and processor functionality by a factor of twofold (or more) without changing the design and package hierarchy. The leads  164  and  168  are a series of leads after trim and form. 
     FIG. 9 illustrates another embodiment of the invention in which a first mother die  100  and a second mother die  100 ′ are stacked on top of each other and secured to a top face  143 ′ of the die pad  144 ′, and a first daughter die  120  and a second daughter die  120 ′ are stacked on top of each other and connected to a bottom face  145 ′ of the die pad  144 ′. A first spacer  154  may be provided between the first mother die  100  and the second mother die  100 ′ wherein the top surface  102  of the first mother die  100  is connected to spacer  154  and the bottom face  119  is connected to the lead frame  144 , and the bottom face  119 ′ of the second mother die  100 ′ is connected to the spacer  154 . Likewise, a second the spacer  156  may be interposed between the first daughter die  120  and the second daughter die  120 ′. The bottom face  139  of the first daughter die  120  may be connected to the lead frame  144  and the top face  122  connected to the second spacer  156 . The bottom face  139 ′ of the second daughter die  120 ′ may be connected to the second spacer  156 . In this embodiment four wires  146 ′,  146 ,  158 ′ and  158 , one wire each from the second mother die  100 ′, first mother die  100 , second daughter die  120 ′, and first daughter die  120  respectively are all connected to the same shared lead  150  of the lead frame  144 . 
     FIG. 10 is a top view of the same package illustrated in FIG. 9 from which it will be appreciated that the lead frame  144  includes a first select pin  150 ′ to which a single wire  146 ′ from a bond pad  106  (best seen in FIG. 15) of the first mother die  100  is connected, and a second select pin  150 ″ to which a single wire  146 ′ is connected to a bond pad  106 ′ of the second mother die  100 ′. Except for the select pin leads  150 ′,  150 ″, 150 ″′,  150 ″″, the remaining shared leads  150  each have a wire  146  from a bond pad on the first mother die  100  and a wire  146 ′ from a bond pad on the second mother die  100 ′ connected thereto. 
     FIG. 11 is a bottom view of the same package illustrated in FIG. 9 from which it will be appreciated that the lead frame  144  includes a third select pin  150 ″′ to which a wire  158  is bonded at one end and bonded to a bond pad  126  (that shown) of the first daughter die  120  at the other end, and a fourth select pin  150 ″″ to which a wire is bonded thereto at one end and bonded to a bond pad  126 ′ of the second daughter die  120 ′ at the other end. Except for the select pin leads  150 ′,  150 ″,  150 ″′,  150 ″″ the remaining shared leads  150  each have a wire  158  from a bond pad on the first daughter die  120  and a wire  158 ′ from a bond pad on the second daughter die  120 ′. FIG. 12 is a side view of the four die package according to the present invention with an encapsulation layer  152  there over.

Technology Classification (CPC): 7