Abstract:
A method for fabricating a light emitting device includes forming a trench in a first surface on first side of a substrate. The trench comprises a first sloped surface not parallel to the first surface, wherein the substrate has a second surface opposite to the first surface of the substrate. The method also includes forming alight emission layer over the first trench surface, but not over the remainder of the first substrate surface, and removing at least a portion of the substrate from the second side of the substrate to expose the light emission layer and allow it to emit light out of the protrusion or protrusions on the second side of the substrate. These protrusions may be elongated pyramids.

Description:
CROSS-REFERENCE 
     This application is a continuation-in-part of U.S. patent application Ser. No. 12/782,080, filed May 18, 2010, which is a continuation-in-part of U.S. patent application Ser. No. 12/691,269, filed Jan. 21, 2010—the entire contents of which are incorporated herein by reference. 
    
    
     BACKGROUND 
     The present patent application is related to solid state light emission devices. 
     Solid-state light sources, such as light emitting diodes (LEDs) and laser diodes, can offer significant advantages over incandescent or fluorescent lighting. The solid-state light sources are generally more efficient and produce less heat than traditional incandescent or fluorescent lights. When LEDs or laser diodes are placed in arrays of red, green and blue elements, they can act as a source for white light or as a multi-colored display. Although solid-state lighting offers certain advantages, conventional semiconductor structures and devices used for solid-state lighting are relatively expensive. The high cost of solid-state light emission devices is partially related to the relatively complex and time-consuming manufacturing process for solid-state light emission devices. 
     Referring to  FIG. 1 , a conventional LED structure  100  includes a substrate  105 , which may be formed of sapphire, silicon carbide, or spinel, for example. A buffer layer  110  is formed on the substrate  105 . The buffer layer  110  serves primarily as a wetting layer, to promote smooth, uniform coverage of the sapphire substrate. The buffer layer  310  is typically deposited as a thin amorphous layer using Metal Organic Chemical Vapor Deposition (MOCVD). An n-doped Group III-V compound layer  120  is formed on the buffer layer  110 . The n-doped Group III-V compound layer  120  is typically made of GaN. An InGaN quantum-well layer  130  is formed on the n-doped Group III-V compound layer  120 . An active Group III-V compound layer  140  is then formed on the InGaN quantum-well layer  130 . A p-doped Group III-V compound layer  150  is formed on the layer  140 . A p-electrode  160  (anode) is formed on the p-doped Group III-V compound layer  150 . An n-electrode  170  (cathode) is formed on the n-doped Group III-V compound layer  120 . 
     A drawback in the conventional LED devices is that different thermal expansions between the group III-V layers and the substrate can cause cracking in the group III-V layers or delamination between the group III-V layers from the substrate. 
     A factor contributing to complexity in some conventional manufacturing processes is that it requires a series of selective etch stages. For example, the cathode  170  in the conventional LED structure  100  shown in  FIG. 1  is formed on the n-doped Group III-V compound layer  120  by selectively etching. These selective etch stages are complicated and time-consuming and, therefore, make the overall manufacturing process more expensive. 
     It is also desirable to increase active light emission intensities. The conventional LED device in  FIG. 1 , for example, includes non-light emission areas on the substrate  105  that are not covered by the InGaN quantum-well layer  130  to make room for the n-electrode  170 . The p-electrode  160  can also block some of the emitted light from leaving the device. These design characteristics reduce the emission efficiency of the conventional LED devices. 
     Another requirement for LED devices is to properly direct inward-propagating light emission to the intended light illumination directions. A reflective layer is often constructed under the light emission layers to reflect light emission. One challenge associated with a metallic reflective layer is that the metals such as Aluminum have lower melting temperatures than the processing temperatures for depositing Group III-V compound layers on the metallic reflective layer. The metallic reflective layer often melts and loses reflectivity during the high temperature deposition of the Group III-V compound layers. 
     SUMMARY 
     The disclosed light emitting device and associated manufacturing processes are intended to overcome above described drawbacks in conventional solid state lighting devices. Embodiments may include one or more of the following advantages. An advantage associated with the disclosed solid-state lighting structures and fabrication processes is that active light emitting areas and light emission efficiency can be significantly improved. 
     Another significant advantage associated with the disclosed solid-state lighting structures and fabrication processes is that a reflective layer can be properly formed under the light emission layers to effectively reflect the emitted light to intended light illumination directions. 
     Yet another significant advantage associated with the disclosed solid-state lighting structures and fabrication processes is that effective cooling can be provided by an entire conductive substrate during the lighting operation. 
     Moreover, the electrodes are arranged on the opposite sides of the disclosed light emission devices. Effective packaging techniques are provided without using wire bonding, which makes the packaged light emission modules more reliable and less likely to be damaged. Additionally, more than one light emission structure can be conveniently packaged in a single light emission module, which reduces packaging complexity and costs. 
     Furthermore, the disclosed LED structures and fabrication processes can overcome lattice mismatch between the group III-V layer and the substrate, and can prevent associated layer cracking and delamination that are found in some conventional LED structures. 
     In one general aspect, the present invention relates to a method for fabricating a light emitting device. The method includes forming a trench or a truncated trench in a first surface on a first side of a substrate, wherein the trench or a truncated trench comprises a first sloped surface not parallel to the first surface, wherein the substrate has a second side opposite to the first side of the substrate; forming light emission layers over the first trench surface and the first surface, wherein the light emission layer can emit tight; and removing at least a portion of the substrate from the second side of the substrate to expose at least one of the light emission layers. 
     Implementations of the system may include one or more of the following. The method can further include forming abuse electrode layer over the light emission layers before the step of removing at least a portion of the substrate from the second side of the substrate, wherein the base electrode layer at least partially fills the trench or a truncated trench on the first side of the substrate. The base electrode layer can be formed by electroplating or deposition over the light emission layers on the first side of the substrate. The base electrode layer can include a metallic material or a conducting polymer. The method can further include a reflective layer on the light emission layers, wherein the base electrode layer is formed on the reflective layer. The method can further include forming a transparent conductive layer over the light emission layers on the second side of the substrate after the step of removing at least a portion of the substrate from the second side of the substrate. The light emission layers can emit light in response to an electric current flowing across the base electrode layer and the transparent conductive layer. The substrate can include silicon, SiC, ZnO, Sapphire, or GaN. The first surface can be substantially parallel to a (100) crystal plane of the substrate, and wherein the first sloped surface is substantially parallel to a (111) crystal plane of the substrate. The substrate can have a (100) crystal plane and a (111) crystal plane, wherein the first surface is substantially parallel to the (100) crystal plane, and wherein the first sloped surface is substantially parallel to the (111) crystal plane. The light emission layers can include at least one quantum well formed by Group III-V compounds. The quantum well can include: a first III-V layer; a quantum-well layer, such as InGaN, on the first III-V layer; and a second III-V layer on the quantum-well layer. The III-V layers are preferably III-nitride layers. The method can further include forming a buffer layer on the first sloped surface before the step of forming light emission layers, wherein the light emission layers are formed on the buffer layer. The buffer layer can include a material selected from the group consisting of GaN, ZnO, AlN, Hfn, AlAs, SiCN, TaN, and SiC. The step of removing can form a protrusion on the second side of the substrate. The protrusion can have the shape of a pyramid, a truncated pyramid or an elongated pyramid, wherein the first sloped surface is a substantially flat face in part defining the pyramid, the truncated pyramid or the elongated pyramid. 
     In another general aspect, the present invention relates to a method for fabricating a light emitting device. The method includes forming light emission layers having monolithic crystal structures on a silicon substrate, wherein the light emission layers can emit light when an electric current flows across the light emission layers, wherein the silicon substrate is on a first side of the light emission layers; forming abuse electrode layer over a second side of the light emission layers, the second side being opposite to the first side, wherein the base electrode layer comprises a non-crystalline conductive material; and removing at least a portion of silicon on the first side of the light emission layers to expose at least one of the light emission layers. The light emission layers can include a monolithic quantum well formed by Group III-V compounds. The non-crystalline conductive material can include a metallic material or a conducting polymer. 
     The method can further include a reflective layer on the first side of the light emission layers, wherein the base electrode layer is formed on the reflective layer; and forming a transparent conductive layer over the second side of the light emission layers after the step of removing at least a portion of the silicon substrate. 
     In another general aspect, the present invention relates to a method for making a light emission module. The method can include constructing one or more light emitting structures on a conductive substrate, wherein each of the one or more light emitting structures comprises light emission layers and a transparent conductive layer on the light emission layers; attaching the one or more light emitting structures to a mounting substrate by an electric interconnect, the mounting substrate having a first electrode and a second electrode; allowing the first electrode to be in electrical connection with the conductive substrate; and allowing the second electrode to be in electric connection with the transparent conductive layer, wherein the light emission layers in each of one or more light emitting structures can emit light when an electric current flows across the first electrode and the second electrode. 
     In another general aspect, the present invention relates to a light emitting device that includes a conductive substrate having a first substrate surface, wherein the conductive substrate includes a conductive material; a protrusion formed on the conductive substrate, wherein the protrusion can be defined in part by a first protrusion surface that is not parallel to the first substrate surface; and light emission layers disposed over the first protrusion surface, wherein the light emission layers can emit light when an electric field is applied across the light emission layers. 
     Implementations of the system may include one or more of the following. The conductive material can include a metallic material or a conducting polymer. The protrusion can have the shape of a pyramid, a truncated pyramid or an elongated pyramid, wherein the first substrate surface is a substantially flat face in part defining the pyramid, the truncated pyramid or the elongated pyramid. The first protrusion surface can have an angle between 20 degrees and 80 degrees relative to the first substrate surface. The light emission layers can include at least one quantum well formed by Group III-V compounds. The quantum well can be formed by a first III-V layer; a quantum-well layer on the first layer; and a second III-V layer on the quantum well layer. The light emitting device can further include a reflective layer formed between the conductive substrate and the light emission layers. The reflective layer can include aluminum, silver, gold, mercury, chromium, or nickel. The light emitting device can further include a transparent conductive layer, such as ITO (tin-doped indium oxide) layer or an ICP (intrinsically conducting polymer) layer, formed over the light emission layers, wherein the electric field across the light emission layers is produced by a voltage applied between the transparent conductive layer and the conductive substrate. The tight emitting device can further include an electrode layer around the protrusion, wherein the electrode layer is in electric connection with the transparent conductive layer. 
     In another general aspect, the present invention relates to a tight emitting device that includes a non-crystalline conductive substrate; and light emission layers having monolithic crystal structures disposed over the conductive substrate, wherein the light emission layers can emit light when an electric field is applied across the light emission layers. 
     Implementations of the system may include one or more of the following. The light emission layers can include at least one monolithic quantum well formed by Group III-V compounds. The monolithic quantum well can be formed by a first III-V layer; a quantum-well layer on the first III-V layer; and a second III-V layer on the quantum well layer. The tight emitting device can further include a reflective layer formed between the conductive substrate and the light emission layers. The light emitting device can further include a transparent conductive layer formed over the light emission layers, wherein the electric field across the light emission layers is produced by a voltage applied between the transparent conductive layer and the conductive substrate. The light emitting device can further include a protrusion formed on the conductive substrate, wherein the conductive substrate comprises a first substrate surface outside of the protrusion, wherein the protrusion is defined in part by first protrusion surface that is not parallel to the first substrate surface. The protrusion can have the shape of a pyramid, a truncated pyramid or an elongated pyramid. The non-crystalline conductive substrate can include a metallic material or a conducting polymer. 
     In another general aspect, the present invention relates to a light emission module that includes a mounting substrate having a first electrode and a second electrode; one or more light emitting structures constructed on a conductive substrate, wherein each of the one or more light emitting structures comprises light emission layers and a transparent conductive layer on the light emission layers, wherein the light emission layers in each of one or more light emitting structures can emit light when a voltage is applied between the transparent conductive layer and the conductive substrate; and an electric interconnect that can attach or clamp the one or more light emitting structures to the mounting substrate to allow the first electrode to be in electrical connection with the conductive substrate and the second electrode to be in electric connection with the transparent conductive layer. 
     Implementations of the system may include one or more of the following. The one or more light emitting structures can include one or more protrusions on the conductive substrate, wherein the light emission layers are formed on the one or more protrusions. The one or more light emitting structures can further include an electrode layer around the protrusion, the electrode layer in electric connection with the transparent conductive layer, wherein the electric interconnect can electrically connect the electrode layer to the second electrode. The electric interconnect can include a window over the light emission layers in the one or more light emitting structures to allow light emitted from the light emission layers to pass through when the electric interconnect clamps the one or more light emitting structures to the mounting substrate. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The following drawings, which are incorporated in and from a part of the specification, illustrate embodiments of the present invention and, together with the description, serve to explain the principles of the invention. 
         FIG. 1  is a cross-sectional view of a conventional LED structure. 
         FIG. 2  is a flowchart for fabricating the light emission devices in accordance with an aspect of the present invention. 
         FIGS. 3A-3S  are cross-sectional and perspective views illustrating the light emitting structures at different steps in the flowchart in  FIG. 2  for fabricating the light emission device. 
         FIG. 4A  is a detailed cross-sectional view illustrating a light emission structure with small lateral dimensions. 
         FIG. 4B  is a detailed cross-sectional view illustrating a light emission structure with a flat conductive surface. 
         FIG. 5A  shows the packaging of the light emission devices into light emitting modules. 
         FIG. 5B  shows the packaged light emission devices from  FIG. 5A . 
         FIG. 6  is a flowchart for fabricating the light emission devices in accordance with another aspect of the present invention. 
         FIGS. 7A-7J  are cross-sectional views illustrating the light emitting structures at different steps in the flowchart in  FIG. 6  for fabricating the light emission device. 
         FIG. 7K  is a perspective view of the device shown in cross-section in  FIG. 7J , showing multiple elongated pyramids. 
         FIG. 8A  shows the packaging of the light emission devices into light emitting modules. 
         FIG. 8B  shows the packaged light emission devices from  FIG. 8A . 
         FIG. 9  is a schematic diagram illustrating angular distribution of light emission from the light emitting device in accordance with the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     Referring to FIGS.  2  and  3 A- 3 D ( FIGS. 3A and 3B  are cross-sectional views along the A-A direction in  FIG. 3C ), a silicon substrate  300  has a first side  310  and a second side  320  opposing to the first side  310 . The silicon substrate  300  can for example be about 750 μm in thickness. The silicon substrate  300  includes a surface  301  on the first side  310 . The substrate  300  can be a (100) silicon wafer, that is the surface  301  is along a (100) crystalline plane. A mask layer  302  is formed and patterned on the surface  301 . The mask layer  302  can be formed by a silicon nitride layer, a silicon oxide layer, or a combination of silicon nitride and silicon oxide layers. The mask layer  302  can also be formed by a photoresist layer. The mask layer  302  has an opening  305  that exposes the silicon substrate  300  on the first side  310 . The silicon substrate  300  is then etched through the opening  305  to form a trench  308  (step  210 ). The trench  308  has a plurality of substantially flat surfaces  331  that are not parallel or be sloped relative to the surface  301 . The surfaces  331  can form a reverse pyramid, a truncated trench, a truncated reverse pyramid, an elongated pyramid or a reverse elongated pyramid having a surface  332  that is substantially parallel to the surface  301 . If the substrate  300  is a (100) silicon wafer, the surfaces  331  are (111) silicon surfaces and the surface  332  is a (100) silicon surface. The surfaces  331  are at a 54.7° angle relative to the surface  301  and the surface  332 . The mask layer  302  is then removed, leaving a trench having sloped surfaces  331  in the substrate  300  on the first side  310  of the substrate  300  (step  215 ,  FIG. 3D ). 
     Referring to  FIGS. 2 ,  3 E and  3 F, one or more buffer layers  335  are next formed on the surface  301  and surfaces  331  (step  220 ). Buffer layers, such as AlN or GaN, are selectively grown only on the surfaces  331  of the (111) crystal plane of the silicon substrate  300 , but not on the (100) surfaces  301  or on mask layer  302 . The buffer layer(s)  335  can for example comprise AlN in a thickness range between about 1 nm and about 1000 nm, such as 10 to 100 Angstroms. The buffer layer(s) can include a thinner AlN layer (e.g., about 30 nm) formed on the substrate  300  at a lower substrate temperature (e.g., 700° C.) followed by a deposition of a thicker AlN layer (e.g., about 70 nm) formed on the first thinner AlN layer at a higher substrate temperature (e.g., 1,200° C.). The buffer layer(s)  335  can also be formed of GaN, as well as ZnO, HfN, AlAs, TaN, or SiC. 
     A plurality of light emitting layers  340  are next formed on the buffer layer  335  (step  225 ). The light emitting layers  340  include semiconductor quantum well layers that can produce and confine electrons and holes under an electric field. The recombination of the electrons and the holes can produce light emission. The emission wavelengths are determined mostly by the bandgap of the material in the quantum-well layers. Exemplified light emitting layers  340  can include, from the buffer layer  335  and up, an AlGaN layer (about 4,000 A in thickness), a GaN:Si (GaN doped with silicon) layer (about 1.5 μm in thickness), an InGaN layer (about 50 A in thickness), a GaN:Si layer (about 100 A in thickness), an AlGaN:Mg layer (about 100 A in thickness), and GaN:Mg (GaN doped with magnesium) about 3,000 A in thickness). The GaN:Si layer (about 100 A in thickness) and the InGaN layer can be repeated several times (e.g., 3 to 7 times) on top of each other to form a periodic quantum well structure. 
     The buffer layer  335  and the light emitting layers  340  can be formed using atomic layer deposition (ALD), Chemical Vapor Deposition (CVD), Metal Organic Chemical Vapor Deposition (MOCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), Chemical Vapor Deposition (CVD), Physical vapor deposition (PVD) or e-beam epitaxial growth. The formation of the buffer layer(s)  335  between the substrate  300  and the light emitting layers  340  can reduce mechanical strain between the (111) silicon surfaces of the substrate  300  and the light emitting layers  340 , and prevent cracking and delamination in the light emitting layers  340 . As a result, the quantum-well layers can have monolithic crystal structures with matched crystal lattices. Light emitting efficiency of the LED device can be improved. Details of forming trenches, the buffer layer, and the light emitting layers are disclosed in U.S. patent application Ser. No. 12/177,114, titled “Light Emitting Device” filed on Jul. 21, 2008 (now abandoned), and U.S. patent application Ser. No. 11/761,446, titled “Silicon Based Solid State Lighting” filed on Jun. 12, 2007 (now U.S. Pat. No. 7,956,370), both by the present inventor, the disclosures of which are incorporated herein by reference. 
     A reflective layer  345  is next, referring to  FIGS. 2 and 3G , formed on the light emitting layers  340  (step  230 ). The reflective layer  345  can be formed by a layer of Aluminum approximately 500 nm in thickness. The reflective layer  345  can also include materials such as Ag, Au, Hg, Cr, or Ni. The reflective layer can also be formed by a combination of AlN layers with proper refractive index to form a total internal reflection. 
     A base electrode layer  350  is next formed on the reflective layer ( FIG. 3H , step  235 ). The base electrode layer  350  can include a metallic material such as copper, aluminum, nickel, and iron, and can be formed by electroplating. The base electrode layer  350  can also include a conductive polymer material, which can be formed by coating. The base electrode layer  350  can have a layer thickness about 200 μm. As described below, the base electrode layer  350  can be formed by copper electroplating and used as one of the electrodes for applying electric field across the light emitting layers  340  and for cooling the light emitting device during operation. The base electrode layer  350  can fill at least a portion of the trench  308 , which can leave a dimple  355 , as shown in  FIGS. 3H-3J . A plurality of trenches  308  and related light emission layers  340  can be simultaneously formed on a single substrate ( 300 ) such as a silicon wafer, as shown in  FIG. 3J . 
     Next, the silicon material in the substrate  300  is removed by wet-etch or by mechanical grinding/polishing and selective dry-etch, or any combination process, using KOH at a proper etching temperature known in the art, from the second side  320  below the buffer layer  335  and the light emitting layers  340  to expose the buffer layer  335  ( FIG. 3K , step  240 ). As shown in a bottom perspective view of  FIG. 3L , the buffer layer  335  and the light emitting layers  340  are thus disposed on the pyramids  360  on the second side  320  of the substrate  300  (not shown in  FIG. 3L  because the silicon material in the substrate  300  has been removed). As a result, a light emitting structure  370  is partially formed. The light emitting structure  370  is also shown in a top perspective view in  FIG. 3M  and in a cross-sectional view in  FIG. 3N  with the first side  310  and the second side  320  are reversed in position (the reflective layer  345  is not shown in  FIGS. 3L and 3M  due to drawing scale). 
     Next, the buffer layer(s)  335  are removed using selective dry-etch, selective reactive ion etch or plasma-enhanced reactive ion etch from the second side  320  of the light emitting structure  370  ( FIG. 3O , step  245 ). The light emitting layers  340  are exposed to the second side  320 . A transparent conductive layer  375  comprising for example indium tin oxide (ITO) is next formed on the light emitting layers on the second side of the substrate ( FIG. 3P , step  250 ). The removal of the buffer layer(s)  335  allows the transparent conductive layer  375  to be in contact with the light emitting layers  340  to allow a voltage to be applied across the light emitting layers  340 . 
     A conductive ring layer (ring electrode)  380  is next formed on the transparent conductive layer  375  around the pyramids or the elongated pyramids as shown in  FIGS. 3Q-3S  (step  255 ), or as shown in  FIG. 4K , to be discussed later. (The light emitting layer  340  and the reflective layer  345  in  FIG. 3R  are not shown due to drawing scale). The ring electrode  380  can be formed by the same material (e.g., copper) as the base electrode layer  350  or Al. A notable feature of the light emitting structure  370  is that the quantum-well layers having monolithic crystal structures are formed over a non-crystalline conductive substrate that are made of metals or conductive polymers. The monolithic crystal structure of the quantum well layers allows the light emission layers  340  that comprise the monolithic quantum layers to have high light emission efficiency. The non-crystalline conductive substrate functions as one of the two electrodes for applying the electric field, and can provide cooling to the light emission device during operation. 
     It should be understood that the shape and the size the dimple  355  may vary with the dimension of the light emission structure  370 . A light emission structure having a lateral dimension of 2 mm or larger may have a large and deep dimple  355  in the base electrode layer  350  as shown in  FIG. 3H . A light emission structure  370  having a lateral dimension smaller than 2 mm may have a large and deep dimple  355  in the base electrode layer  350  as shown in  FIG. 4A . Furthermore, as shown in  FIG. 4B , the base electrode layer  350  can be flattened on the first side  310  by for example chemical mechanical polishing a flat conductive surface. The base electrode layer  350  can thus have a substantially flat surface  390  on the first side  310  opposing to the light emission side (the second side  320 ) of the base electrode layer  350 . 
       FIG. 5A  shows an exploded view light emission modules  500  and  550 , and the packaging of light emission structures  370  into light emitting modules  500  and  550  (step  260  in  FIG. 2 ). An insulating substrate  400  includes on its upper surface electrode layers  410 ,  420 ,  430 . The insulating substrate  400  can be made of an insulating ceramic material, which can act as a heat sink. The light emission structure  370  includes a pyramid  360  on the base electrode layer  350 . A plurality of light emission layers (not shown) are formed on the pyramid  360 . The transparent conductive layer  375  is formed on the light emission layers. The ring electrode  380  is formed around the pyramid  360  and in contact with the transparent conductive layer  375 . The light emission structure  370  can be mounted directly on the electrode layer  420  on the insulating substrate  400  such that the electrode layer  420  is in electric contact with the base electrode layer  350 . An electric interconnect  450  includes a window frame  451  having an opening therein and connected with two arms  460  and  470 . The electric interconnect  450  is made of an electrically conductive material such as copper. The electric interconnect  450  can be clamped down such that the window frame  451  is in electric contact with the ring electrode  380 . The two arms  460  and  470  become respectively in contact with the electrode layers  410  and  430 . 
     When the electric interconnect  450  and the light emission structure  370  are tightly clamped to the substrate  400 , the electrode layers  410  and  430  are connected with the transparent conductive layer  375 . The electrode layer  420  is connected with the base electrode layer  350 . An electric voltage applied across the electrode layer  420  and the electrode layers  410  and  430  can thus produce an electric field across the light emission layers  340  (in  FIGS. 3Q and 4 , not shown in  FIG. 5A ), which can cause light emission in the light emission module  500  (shown in  FIG. 5B ). 
     In some embodiments, referring to FIGS.  6  and  7 A- 7 J, a silicon substrate  700  has a first side  710  having a surface  701  and a second side  720  opposing to the first side  710 . The substrate  700  can be a (100) silicon wafer with the surface  701  is along a (100) crystalline plane. The substrate  700  can also be formed by SiC, Sapphire, or GaN. SiN layers  702  are deposited on both the first side and the second side of the silicon substrate  700  (step  605 ,  FIG. 7A ). Referring to  FIG. 7B , a mask layer  702 M is formed by patterning and selecting etching the SiN layer  702  on the upper surface  701  of substrate  700  (step  610 ,  FIG. 7B ). The mask layer  702 M has an opening  705  that exposes the silicon substrate  700  on the first side  710 . 
     The silicon substrate  700  is then etched through the opening  705  to form a trench  708  (step  615 ,  FIG. 7C ). The trench  708  has a plurality of substantially flat surfaces  731  that are not parallel to each other and are sloped relative to the upper surface  701 . The surfaces  731  can form a reverse pyramid, a reverse truncated pyramid or a reverse elongated pyramid. If the substrate  700  is a (100) silicon wafer, the surfaces  731  are (111) silicon surfaces. The surfaces  731  are at a 54.7° angle relative to the surface  701 . Optionally, the mask layer  702 M can then be removed, leaving a trench having sloped surfaces  731  in the substrate  700  on the first side  710  of the substrate  700 . As shown in  FIG. 7C , the mask layer  702 M has not been removed. 
     One or more buffer layers (not shown for clarity) are next formed. The buffer layer(s) can comprise AlN in a thickness range between about 1 nm and about 1000 nm, such as 10 to 100 Angstroms. The buffer layer and the light emitting layers  740  can be formed using atomic layer deposition (ALD), Chemical Vapor Deposition (CVD), Metal Organic Chemical Vapor Deposition (MOCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), or e-beam or molecular-beam epitaxial deposition (MBE). The buffer layer preferentially deposits, using these deposition techniques, on the (111) silicon surfaces  731  of substrate  700 , but not on the surface of mask  702 M, which lies on the (100) silicon surface  701 . 
     A plurality of light emitting layers  740  are next formed on the buffer layer (step  625 ,  FIG. 7D ). These light emitting layers deposit preferentially on the surface of the buffer layer (not shown) which lies atop the (111) silicon surfaces  731 , but they do not deposit on mask layer  702 M, as shown in  FIG. 7D . 
     The light emitting layers  740  include semiconductor quantum well layers that can produce and confine electrons and holes under an electric field. The recombination of the electrons and the holes can produce light emission. The emission wavelengths are determined mostly by the bandgap of the material in the quantum-well layers. Exemplified light emitting layers  740  can include, from the buffer layer, an AlGaN layer (about 4,000 A in thickness), a GaN:Si layer (silicon-doped GaN layer of about 1.5 μm in thickness), an InGaN layer (about 50 A in thickness), a GaN:Si layer (silicon-doped GaN of about 100 A in thickness), an AlGaN:Mg layer (magnesium doped AlGaN of about 100 A in thickness), and GaN:Mg (magnesium-doped GaN of about 3,000 A in thickness). The GaN:Si layer (silicon-doped GaN of about 100 A in thickness) and the InGaN layer can be repeated several times (e.g., 3 to 7 times) on top of each other to form a periodic quantum well structure. The light emitting layers  740  can for example be formed by MOCVD. Silicon doping renders the layer n-type and magnesium doping renders the layer p-type, as is well known in the art. Required dopant amounts also are well known in the art. 
     The formation of the buffer layer(s) between the substrate  700  and the light emitting layers  740  can reduce mechanical strain between the (111) silicon surfaces of the substrate  700  and the light emitting layers  740 , and prevent cracking and delamination in the light emitting layers  740 . As a result, the quantum-well layers can have monolithic crystal structures with matched crystal lattices. Light emitting efficiency of the LED device can be improved. Details of forming trenches, the buffer layer, and the light emitting layers are disclosed in U.S. patent application Ser. No. 12/177,114, titled “Light Emitting Device” filed on Jul. 21, 2008 (now abandoned), and U.S. patent application Ser. No. 11/761,446, titled “Silicon Based Solid State Lighting” filed on Jun. 12, 2007 (now U.S. Pat. No. 7,956,370), both by the present inventor, the disclosures of which are incorporated herein by reference. 
     After MOCVD layers, a surface treatment on top of GaN:Mg (about 3,000 A in thickness) can be applied to further enhance light emitting efficiency. This treatment can be dry or wet etch with or without patterning. 
     A reflective layer  745  is next formed on the light emitting layers  740  (step  630 ,  FIG. 7E ). The reflective layer  745  can be formed by a layer of Aluminum approximately 500 nm in thickness. The reflective layer  745  can also include materials such as Ag, Au, Cr, or Ni. The reflective layer  745  can be formed by MOCVD, Electroplating, or PVD. As shown in  FIG. 7E , unlike the buffer layer or light emitting layers, the reflective layer does not deposit preferentially, and is deposited atop not only the light emitting layers  740  in the trench (over silicon surfaces  731 ), but also atop mask layer  702 M. 
     A base electrode layer  750  is next formed on the reflective layer  745  ( FIG. 7F , step  635 ). The base electrode layer  750  can include a metallic material such as copper, nickel, aluminum, chromium, and steel, and can be formed by electroplating. The base electrode layer  750  can also be formed by a deposition method such as PVD, MBE, CVD, and PECVD. The base electrode layer  750  can also include a conductive polymer material, which can be formed by coating. The base electrode layer  750  can have a layer thickness from 50 to 500 μm. The base electrode layer  750  can be used as one of the electrodes for applying electric field across the light emitting layers  740  and for cooling the light emitting device during operation. The base electrode layer  750  can fill at least a portion of the trench  708 , which can leave a dimple  755 . 
     Next, the silicon material in the substrate  700  and the SiN layer  702  are removed from the second side  720  below the buffer layer and the light emitting layers  740  ( FIG. 7G , step  640 ) (the device structure is flipped upside down from  FIG. 7F  to  FIG. 7G ). The light emitting layers  740  are thus disposed on the pyramids  760  on the second side  720  of the substrate  700 . As a result, a light emitting structure  770  is partially formed. The buffer layer (not shown for clarity) is also removed from the second side  720  of the light emitting structure  770  (step  645 ) to expose the light emitting layers  740  the second side  720  ( FIG. 7G ). The silicon nitride mask  702 M remains as shown in  FIG. 7G . 
     A transparent conductive layer  775  comprising for example ITO is next formed on the light emitting layers on the second side of the substrate and on the mask layer  702 M as well ( FIG. 7H , step  650 ). The transparent conductive layer  775  is in contact with the light emitting layers  740  to allow a voltage to be applied across the light emitting layers  740 . 
     A conductive ring layer (ring electrode)  780  is next formed on the transparent conductive layer  775 , which is atop mask layer  702 M around the pyramids  760  ( FIG. 7I , step  655 ). The ring electrode  780  can be formed by the same material (e.g., copper) as the base electrode layer  750  or Al. The light emitting structure  770  is then diced to its final form. ( FIG. 7J , step  660 ) 
     A notable feature of the light emitting structure  770  is that multiple pyramids  760  can be formed on a single device in a series of common processing steps. The light emitting layers formed on the multiple pyramids, the truncated pyramids or the elongated pyramids can significantly increase lighting intensity. The number of pyramids, truncated pyramids or elongated pyramids in a single light emitting structure can be varied to customize the dimensions of the lighting device. 
       FIG. 7K  is a perspective view of an embodiment of the invention shown in cross-section in  FIG. 7J . Referring to  FIGS. 7J and 7K , the light-emitting device includes elongated pyramids  760 , each surrounded by an electrode layer  780  formed over a transparent conductive layer  775 . Although only two elongated pyramids are illustrated in  FIG. 7K , it is clear to one or ordinary skill that 4, 6, 9 or many pyramids may be used depending only on size and power limitations for the resulting structure. 
     Another notable feature of the light emitting structure  770  is that the quantum-well layers having monolithic crystal structures are formed over a non-crystalline conductive substrate that are made of metals or conductive polymers. The monolithic crystal structure of the quantum well layers allows the light emission layers that comprise the monolithic quantum layers to have high light emission efficiency. The non-crystalline conductive substrate functions as one of the two electrodes for applying the electric field, and can provide cooling to the light emission device during operation. 
     Referring to  FIGS. 8A and 8B , a light emission structure  475  includes a plurality of pyramids  360  formed on a common base electrode layer  350 , as described above. A plurality of light emission layers (not shown due to drawing scale) are formed on the pyramids  360 . The transparent conductive layer  375  is formed on the light emission layers. A common ring electrode  380  is formed around the pyramids  360  and in contact with the transparent conductive layer  375 . 
     When the electric interconnect  450  and the light emission structure  475  are tightly clamped to the substrate  400 , the electrode layers  410  and  430  are connected with the transparent conductive layer  375  through electric interconnect  450 . The electrode layer  420  on substrate  400  is connected with the base electrode layer  350 . An electric voltage applied across the electrode layer  420  and the electrode layers  410  and  430  can thus produce an electric field across the light emission layers  340  (in  FIGS. 3Q and 4 , not shown in  FIG. 8A ), which can cause light emission in the light emission module  550  ( FIG. 8B ). 
     An advantage of the light emission modules  500  ( FIG. 5A) and 550  ( FIGS. 5B and 8A ) is that there is no need for wire bonding to electrically connect the light emission structures  475  to external electrodes ( 410 - 430 ). As it is known that wire bonding is easily damaged in the handling, the disclosed light emission modules are thus more reliable than some conventional solid-state light emitting devices. 
     The packaging of light emitting modules (step  260  in  FIG. 2 ) can also include dicing of light emitting structures on a substrate into dies each containing smaller number of light emitting structures. For example, the light emitting structures  370  on the conductive substrate  350  in  FIG. 4B  can be diced into dies each containing one or a few light emitting structures which can subsequently form a light emitting module as shown in  FIGS. 5A and 5B . 
       FIG. 9  is a schematic diagram illustrating angular distribution of light emission from the light emitting device in accordance with the present invention. A light emitting device  370  includes a pyramid  360  formed on a base electrode layer  350 . Light emitting layers having light emission surfaces  910 ,  920  are formed on the sloped surfaces of the pyramid  360 . If the light emission structure  370  is formed with a (100) silicon wafer, the upper surface  930  is along the (100) crystalline plane and the light emission surfaces  910 ,  920  parallel to the (111) crystalline planes. The light emission surfaces  910 ,  920  are at a 54.7° angle relative to the upper surface  930 . For the same foot print on the upper surface, the sum of the areas of the emission surfaces on the light emission surfaces  910 ,  920  is approximately 1.73 times the area of the upper surface  930  under the pyramid  360 . The light emission from the light emission surfaces  910 ,  920  can assume a broad distribution  1280  as shown in  FIG. 9 . 
     An advantage associated with the disclosed light emission device and fabrication processes is that light emitting layers are constructed on surfaces sloped relative to the substrate, which can significantly increase light emission areas and efficiency. Another advantage of the disclosed light emission device and fabrication processes is that silicon wafers can be used to produce solid state LEDs. Manufacturing throughput can be much improved since silicon wafer can be provided in much larger dimensions (e.g., 8 inch, 12 inch, or larger) compared to the substrates used in the conventional LED structures. Furthermore, the silicon-based substrate can also allow driving and control circuit to be fabricated in the substrate. The light emission device can thus be made more integrated and compact than conventional LED devices. Another advantage associated with the disclosed devices and fabrication processes is that the disclosed light emitting structures can be fabricated using existing commercial semiconductor processing equipment such as ALD and MOCVD systems. The disclosed fabrication processes can thus be more efficient in cost and time that some conventional LED structures that need customized fabrication equipments. The disclosed fabrication processes are also more suitable for high-volume semiconductor lighting device manufacture. Yet another advantage of the disclosed light emitting structures and fabrication processes is that multiple buffer layers can be formed to smoothly match the crystal lattices of the silicon substrate and the lower group III-V layer. Yet another advantage of the disclosed light emitting structures and fabrication processes is that a surface treatment is applied to p-doped GaN to enhance light emitting efficiency. Yet another advantage of the disclosed LED structures and fabrication processes is that a transparent conductive layer formed on the light emitting layers and a reflective layer formed under the light emitting layers can maximize light emission intensity from the upper surfaces of the LED structures. Yet another advantage of the disclosed light emitting structures and fabrication processes is that light emitting layers are directly in contact with conductive metal substrate, which insures the best thermal conductivity during LED operation. This can increase both LED life time and efficiency, especially for high brightness and high power LEDs. Yet another advantage of the disclosed light emitting structures and fabrication processes is that there is a wafer level common electrode to use wireless wafer lever packaging. 
     The foregoing descriptions and drawings should be considered as illustrative only of the principles of the invention. The invention may be configured in a variety of shapes and sizes and is not limited by the dimensions of the preferred embodiment. Numerous applications of the present invention will readily occur to those skilled in the art. Therefore, it is not desired to limit the invention to the specific examples disclosed or the exact construction and operation shown and described. Rather, all suitable modifications and equivalents may be resorted to, falling within the scope of the invention. For example, the n-doped and the p-doped group III-V layers can be switched in position, that is, the p-doped group III-V layer can be positioned underneath the quantum-well layer and n-doped group III-V layer can be positioned on the quantum-well layer. The disclosed LED structure may be suitable for emitting green, blue, and emissions of other colored lights. In another example, a (111) silicon wafer can be used as a substrate to allow trenches having (100) sloped surfaces to form in the substrate. 
     Moreover, the sloped protrusion surface can be at an angle between 20 degrees and 80 degrees, or as a more specific example, between 50 degrees and 60 degrees, relative to the upper surface of the substrate. The emission surfaces on a protrusion in the disclosed light emitting device can be more than 1.2, or 1.4, or 1.6 times of the base area of the protrusion. The large emission surface areas in the described light emitting devices allow the disclosed light emitting device can thus generate much higher light emission intensity than conventional LED devices. 
     The disclosed systems and methods are compatible with a wide range of applications such as laser diodes, blue/UV LEDs, Hall-effect sensors, switches, UV detectors, micro electrical mechanical systems (MEMS), and RF power transistors. The disclosed devices may include additional components for various applications. A laser diode based on the disclosed device can include reflective surfaces or mirror surfaces for producing lasing light. For lighting applications, the disclosed system may include additional reflectors and diffusers.