Abstract:
A reception circuit is provided which can detect the beginning of data regardless of a preamble or a unique word contained or not in a received signal and regardless of coding systems for received signals. The reception circuit includes a correlation operation portion that performs a correlation operation to generate a correlation signal while sliding one symbol of reference signal in relation to a received signal. The reference signal goes to a high level during a first half symbol period and goes to a low level during a second half symbol period. The reception circuit further includes: a delay portion that outputs a delay signal by delaying the reference signal for a half symbol period in relation to the received signal; and a data beginning timing detection portion that detects a beginning peak timing for the correlation signal as a beginning timing of data contained in the delay signal.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The disclosure of Japanese Patent Application No. 2010-258614 filed on Nov. 19, 2010 including the specification, drawings and abstract is incorporated herein by reference in its entirety. 
       BACKGROUND 
       [0002]    The present invention relates to a reception circuit. 
         [0003]    A reception circuit according to related art detects the beginning of data as a preliminary to a stage that performs bit discrimination on a received signal and demodulates the data. The circuit performs correlation operation on a received signal using a specific pattern including a unique word as a reference signal and detects a peak value as the beginning of data. For example, refer to patent document 1 (Japanese Unexamined Patent Application No. 10 (1998)-155004) and patent document 2 (Japanese Patent No. 3185716). 
         [0004]    As shown in  FIG. 10 , the data beginning detection system premises that a received signal contains a unique word or a preamble prefixed to data. The system performs a correlation operation on the received signal using unique words in a delay unique word table as a reference signal and detects a peak value output from a correlator as the beginning of data.
   Patent Document 1: Japanese Unexamined Patent Application No. 10 (1998)-155004   Patent Document 2: Japanese Patent No. 3185716   
 
       SUMMARY 
       [0007]    However, for example, the data beginning detection system used for reception circuits according to related art as disclosed in patent documents 1 and 2 does not contain the preamble and the unique word used for card mode signals compliant with ISO/IEC14443 TypeA or TypeB and is incompatible with a received signal that uses a modulation signal as data itself. 
         [0008]    The data beginning detection system used for reception circuits according to related art as disclosed in patent documents 1 and 2 uses specific unique words. Therefore, the system can detect the beginning of data for received signals according to a specific code system but cannot detect the beginning of data for received signals according to other code systems. 
         [0009]    It is therefore an object of the invention to provide a reception circuit capable of detecting the beginning of data regardless of a preamble or a unique word contained or not in a received signal and regardless of coding systems for received signals. 
         [0010]    A reception circuit according to an embodiment of the invention includes a correlation operation portion that performs a correlation operation to generate a correlation signal while sliding one symbol of reference signal in relation to a received signal. The reference signal goes to a high level during a first half symbol period and goes to a low level during a second half symbol period. The reception circuit further includes: a delay portion that outputs a delay signal by delaying the reference signal for a half symbol period in relation to the received signal; and a detection portion that detects a beginning peak timing for the correlation signal as a beginning timing of data contained in the delay signal. 
         [0011]    A reception circuit according to an embodiment of the invention can detect the beginning of data regardless of a preamble or a unique word contained or not in a received signal and regardless of coding systems for received signals. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0012]      FIG. 1  shows a configuration of a reception circuit according to a first embodiment; 
           [0013]      FIG. 2  illustrates a method of calculating sampling value b n  for a correlation signal S 1 ; 
           [0014]      FIG. 3  illustrates a method of calculating sampling value b n-1  for the correlation signal S 1 ; 
           [0015]      FIG. 4  is a flowchart showing operations of the reception circuit shown in  FIG. 1 ; 
           [0016]      FIG. 5  is a timing chart when a received signal A is input to the reception circuit shown in  FIG. 1 ; 
           [0017]      FIG. 6  is a timing chart when a received signal B is input to the reception circuit shown in  FIG. 1 ; 
           [0018]      FIG. 7  shows a configuration of a reception circuit according to a second embodiment; 
           [0019]      FIG. 8  is a flowchart showing operations of the reception circuit shown in  FIG. 7 ; 
           [0020]      FIG. 9  is a timing chart when the received signal A is input to the reception circuit shown in  FIG. 7 ; and 
           [0021]      FIG. 10  illustrates a configuration of data containing a preamble or a unique word. 
       
    
    
     DETAILED DESCRIPTION 
       [0022]    Embodiments of the present invention will be described with reference to the accompanying drawings. 
       First Embodiment 
       [0023]    (Configuration) 
         [0024]      FIG. 1  shows a configuration of a reception circuit according to the first embodiment. 
         [0025]    The reception circuit includes a correlation operation portion, a reference signal memory, a peak detection portion, a determination portion, a threshold memory, a data beginning timing detection portion, a delay portion, a data beginning detection portion, a bit synchronization portion, and a bit discrimination portion. 
         [0026]    The reference signal memory stores one symbol of reference signal RE. The reference signal RE goes to the “H” level during the first half symbol and goes to the “L” level during the second half symbol. The half symbol period allows the “H” level and the “L” level to continue and is shorter than the length of an “H” level and an “L” level for a received signal at the highest transmission rate available in the communication system, that is, shorter than the shortest “H” or “L” level in the communication system. 
         [0027]    The threshold memory stores a threshold value TH. 
         [0028]    (Correlation Operation) 
         [0029]    The correlation operation portion  11  performs a correlation operation to generate a correlation signal S 1  while sliding one symbol of the reference signal RE with reference to a received signal A. 
         [0030]    When a sampling sequence for the received signal A contains values a 0 , a 1 , a 2 , and so on, a sampling sequence for the reference signal RE contains values f 0 , f 1 , f 2 , . . . , and f N , and a sampling sequence for the correlation signal S 1  contains values b 0 , b 1 , b 2 , and so on, equations (A1) and (A2) express sampling values b n-1  and b n  of the correlation signal S 1  at the (n−1)th time point and the nth time point as follows, for example. 
         [0000]    
       
         
           
             
               
                 
                   [ 
                   
                     Equation 
                      
                     
                         
                     
                      
                     1 
                   
                   ] 
                 
               
               
                 
                     
                 
               
             
             
               
                 
                   
                     b 
                     n 
                   
                   = 
                   
                     
                       ∑ 
                       
                         i 
                         = 
                         0 
                       
                       
                         N 
                         - 
                         1 
                       
                     
                      
                     
                       
                         a 
                         
                           n 
                           - 
                           N 
                           + 
                           1 
                           + 
                           i 
                         
                       
                       × 
                       
                         f 
                         
                           i 
                            
                           
                               
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   A1 
                   ) 
                 
               
             
             
               
                 
                   
                     b 
                     
                       n 
                       - 
                       1 
                     
                   
                   = 
                   
                     
                       ∑ 
                       
                         i 
                         = 
                         0 
                       
                       
                         N 
                         - 
                         1 
                       
                     
                      
                     
                       
                         a 
                         
                           n 
                           - 
                           N 
                           + 
                           i 
                         
                       
                       × 
                       
                         f 
                         i 
                       
                     
                   
                 
               
               
                 
                   ( 
                   A2 
                   ) 
                 
               
             
           
         
       
     
       Correlation Operation Example 
       [0031]      FIG. 2  illustrates a method of calculating sampling value b n  for the correlation signal S 1 . 
         [0032]    When the sampling sequence for the reference signal RE contains f 0  through f 7 , the following equation calculates sampling value b n  of the correlation signal S 1 . 
         [0000]        b   n   =f   0   ×a   n-7   +f   1   ×a   n-6   +f   2   +a   n-5   +f   3   ×a   n-4   +f   4   ×a   n-3   +f   5   ×a   n-2   +f   6   ×a   n-1   +f   7   ×a   n   (A3)
 
         [0033]      FIG. 3  illustrates a method of calculating sampling value b n-1  for the correlation signal S 1 . 
         [0034]    When the sampling sequence for the reference signal RE contains f 0  through f 7 , the following equation calculates sampling value b n-1 , of the correlation signal S 1 . 
         [0000]        b   n-1   =f   0   ×a   n-8   +f   1   ×a   n-7   +f   2   ×a   n-6   +f   3   ×a   n-5   +f   4   ×a   n-4   +f   5   ×a   n-3   +f   6   ×a   n-2   +f   7   ×a   n-1   (A4)
 
         [0035]    As can be seen from comparison between  FIG. 2  and  FIG. 3 , the correlation operation is performed while sliding the reference signal RE. The value of the correlation signal S 1  increases when the reference signal RE matches the pattern of the received signal R 1 . 
         [0036]    Now returning back to  FIG. 1 , the peak detection portion  13  generates a peak signal P 1  representing the peak of the correlation signal S 1 . 
         [0037]    A comparison portion  14  outputs the peak signal P 1  to the data beginning timing detection portion if a peak value of the peak signal P 1  exceeds the threshold value TH. 
         [0038]    The delay portion  17  delays the received signal R 1  by a half symbol period of the reference signal to output a delay signal D 1 . 
         [0039]    The data beginning timing detection portion  16  detects the timing of a beginning peak  45  contained in the peak signal P 1  as timing T 1  at the beginning of data contained in the delay signal D 1 . 
         [0040]    The bit synchronization portion  30  outputs bit timing clock BCLK based on the detected beginning timing. 
         [0041]    The bit discrimination portion  31  synchronizes with the bit timing clock BCLK, performs bit discrimination on data contained in the delay signal D 1  as an output signal from the data beginning detection portion  20 , and demodulates the signal to data. 
         [0042]    (Operations) 
         [0043]    The following describes operations of the reception circuit shown in  FIG. 1 . 
         [0044]      FIG. 4  is a flowchart showing operations of the reception circuit shown in  FIG. 1 . 
         [0045]      FIG. 5  provides a timing chart when the received signal A is input to the reception circuit shown in  FIG. 1 . In terms of mode, the received signal A is coded with the Manchester code compliant with the FeliCa specification. As shown in  FIG. 10 , the received signal A contains a preamble or a unique word prefixed to data. 
         [0046]      FIG. 6  is a timing chart when a received signal B is input to the reception circuit shown in  FIG. 1 . The received signal B is coded with the NRZ (Non-Return-to-Zero) code compliant with ISO/IEC 14443-2 TypeB. The received signal B contains neither preamble nor unique word. 
         [0047]    With reference to  FIGS. 4 ,  5 , and  6 , the correlation operation portion  11  in the data beginning detection portion  20  performs a correlation operation to generate the correlation signal S 1  while sliding one symbol of the reference signal RE in relation to the received signal R 1  (step S 101 ). 
         [0048]    The delay portion  17  in the data beginning detection portion  20  delays the received signal R 1  by a half symbol period for the reference signal to output the delay signal D 1  (step S 102 ). 
         [0049]    The peak detection portion  13  in the data beginning detection portion  20  generates the peak signal P 1  representing the correlation signal S 1  (step S 103 ). 
         [0050]    The comparison portion  14  in the data beginning detection portion  20  determines whether a peak value of the peak signal P 1  exceeds the threshold value TH. If the peak value of the peak signal P 1  exceeds the threshold value TH (YES at step S 104 ), the comparison portion  14  outputs the peak signal P 1  to the data beginning timing detection portion (step S 105 ). 
         [0051]    The data beginning timing detection portion  16  in the data beginning detection portion  20  detects timing of the beginning peak  45  contained in the peak signal P 1  as the beginning timing T 1  for data contained in the delay signal D 1  (step S 106 ). 
         [0052]    The bit synchronization portion  30  outputs the bit timing clock BCLK based on the detected beginning timing (step S 107 ). 
         [0053]    The bit discrimination portion  31  synchronizes with the bit timing clock BCLK, performs bit discrimination on data contained in the delay signal D 1  as an output signal from the data beginning detection portion  20 , and demodulates the signal to data (step S 108 ). 
         [0054]    (Effect) 
         [0055]    As described above, the embodiment can fast detect the beginning of data in a received signal that contains only data itself without a preamble. In addition, the embodiment can fast detect the beginning of data in received signals associated with various types of modes. 
       Second Embodiment 
       [0056]      FIG. 7  shows a configuration of a reception circuit according to the second embodiment. 
         [0057]    A difference from the reception circuit  100  in  FIG. 1  is that a reception circuit  200  in  FIG. 7  includes a maximum value detection portion  28  and a threshold value setting portion  19 . The other configurations are equal to those in  FIG. 1  and a description is omitted for simplicity. 
         [0058]    The maximum value detection portion  28  detects the maximum peak value for the peak signal P 1  during a period predetermined in the system, e.g., a specified period PT immediately after transition from transmission mode to reception mode. 
         [0059]    The threshold value setting portion  19  multiplies the maximum peak value detected in the maximum value detection portion by coefficient K (a value set to 1 or more) to settle the threshold value TH 1  and saves it in the threshold memory. 
         [0060]    (Operations) 
         [0061]    The following describes operations of the reception circuit shown in  FIG. 7 . 
         [0062]      FIG. 8  is a flowchart showing operations of the reception circuit shown in  FIG. 7 . 
         [0063]      FIG. 9  is a timing chart when the received signal A is input to the reception circuit shown in  FIG. 7 . In terms of mode, the received signal A is coded with the Manchester code compliant with the FeliCa specification. As shown in  FIG. 10 , the received signal A contains a preamble or a unique word prefixed to data. 
         [0064]    Transmission mode is changed to reception mode (step S 200 ). 
         [0065]    The correlation operation portion  11  in the data beginning detection portion  20  performs a correlation operation to generate the correlation signal S 1  while sliding one symbol of the reference signal RE in relation to received signal R 1  (step S 201 ). 
         [0066]    The delay portion  17  in the data beginning detection portion  20  delays the received signal R 1  by a half symbol period for the reference signal to output the delay signal D 1  (step S 202 ). 
         [0067]    The peak detection portion  13  in the data beginning detection portion  20  generates the peak signal P 1  representing the correlation signal S 1  (step S 203 ). 
         [0068]    The maximum value detection portion  28  in the data beginning detection portion  20  detects a maximum value  68  of peak values  67  for the peak signal P 1  during a period predetermined in the system, e.g., the specified period PT immediately after transition from transmission mode to reception mode (step S 204 ). 
         [0069]    The threshold value setting portion  19  in the data beginning detection portion  20  multiplies the maximum value  68  by coefficient K (a value set to 1 or more) to settle the threshold value TH 1  (step S 205 ). 
         [0070]    The comparison portion  14  in the data beginning detection portion  20  determines whether the peak value for the peak signal P 1  exceeds the threshold value TH 1  after a lapse of the specified period PT immediately after transition from transmission mode to reception mode. If the peak value for the peak signal P 1  exceeds the threshold value TH 1  (YES at step S 206 ), the comparison portion  14  outputs the peak signal P 1  to the data beginning timing detection portion (step S 207 ). 
         [0071]    The data beginning timing detection portion  16  in the data beginning detection portion  20  detects timing of a beginning peak  65  contained in the peak signal P 1  as the beginning timing T 1  for data contained in the delay signal D 1  (step S 208 ). 
         [0072]    The bit synchronization portion  30  outputs the bit timing clock BCLK based on the detected beginning timing (step S 209 ). 
         [0073]    The bit discrimination portion  31  synchronizes with the bit timing clock BCLK, performs bit discrimination on data contained in the delay signal D 1  as an output signal from the data beginning detection portion  20 , and demodulates the signal to data (step S 210 ). 
         [0074]    (Effect) 
         [0075]    Similarly to the first embodiment, the second embodiment can detect, in a short time, the beginning of data in a received signal that contains only data itself without a preamble. In addition, the second embodiment can detect, in a short time, the beginning of data in received signals associated with various types of modes. Further, the second embodiment can appropriately configure a threshold value to be compared with the correlation signal peak because the beginning timing of data is detected in accordance with a received signal. 
         [0076]    (Modification) 
         [0077]    The present invention is not limited to the above-mentioned embodiments and includes the following modification. 
         [0078]    (1) Reference Signal 
         [0079]    When the reference signal has an N-bit length, the reference signal may go to the “H” level during the first N/2-bit period and may go to the “L” level during the second N/2-bit period. 
         [0080]    All the disclosed embodiments just provide examples and must be considered to be nonrestrictive. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.