Abstract:
Displaying by a display device is controlled by outputting a clock signal and an image signal to the display device. A clock signal and an image signal are prepared and stability of the clock signal is monitored by comparing a predetermined parameter relating to the clock signal with a threshold value. The clock signal is supplied to the display device only when it is determined that the clock signal is stable.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to a method and a device used for controlling displaying by a display device.  
         [0003]     2. Description of the Related Art  
         [0004]     In recent years, there is a great demand for smaller, thinner, light-weight, and compact electronic devices or electronic home appliances. For example, the liquid crystal displays (LCDs) are now rapidly replacing the cathode ray tubes (CRTs). A control device is used to control displaying by a display device.  
         [0005]      FIG. 3  is a block diagram of a conventional control device of this type. The control device includes a graphic controller  10  and an LCD  20 . The LCD can be other display device. The graphic controller  10  supplies an image signal S g  and clock signal S c  to the LCD  20  to control the driving of the LCD  20 . The clock signal S c  is a signal that generates reference timing of displaying images on the LCD  20  corresponding to the image signal S g . The frequency of this clock signal S c  is rated as 20 megahertz to 68 megahertz.  
         [0006]     Upon receiving a clock signal S c  and image signal S g , the LCD  20  displays an image corresponding to the image signal S g  at the reference timing corresponding to the clock signal S c .  
         [0007]     However, the clock signal S c  is not stable at the time of startup. As shown in  FIG. 4 , generally an unstable clock signal S c  is output between power-on time t 0  and time t 1  (200 microseconds) before the frequency reaches the rated threshold frequency f th  (=20 megahertz).  
         [0008]     When the clock signal S c  is not stable, an image can not be properly displayed on the LCD  20 .  
         [0009]     Japanese Patent Application Laid-open No. 2002-297108 discloses a related art.  
       SUMMARY OF THE INVENTION  
       [0010]     It is an object of the present invention to at least solve the problems in the conventional technology.  
         [0011]     According to an aspect of the present invention, a control device for controlling displaying by a display device by outputting a clock signal and an image signal to the display device includes a signal preparing unit that prepares a clock signal and an image signal; a monitoring unit that monitors stability of prepared clock signal by comparing a predetermined parameter relating to the clock signal with a threshold value; and a signal supplying unit that supplies the image signal to the display device and supplies the clock signal to the display device only when the monitoring unit determines that the clock signal is stable.  
         [0012]     According to another aspect of the present invention, a method of controlling displaying by a display device by outputting a clock signal and an image signal to the display device includes preparing a clock signal and an image signal; monitoring stability of prepared clock signal by comparing a predetermined parameter relating to the clock signal with a threshold value; and supplying the image signal to the display device and supplying the clock signal to the display device only when it is determined at the monitoring that the clock signal is stable.  
         [0013]     The above and other objects, features, advantages and technical and industrial significance of this invention will be better understood by reading the following detailed description of presently preferred embodiments of the invention, when considered in connection with the accompanying drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0014]      FIG. 1  is a block diagram of a control device according to an embodiment of the present invention;  
         [0015]      FIG. 2  is a graph for explaining the characteristics of a converting unit shown in  FIG. 1 ;  
         [0016]      FIG. 3  is a block diagram of a conventional control device; and  
         [0017]      FIG. 4  is a graph for explaining an unstable clock signal. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0018]     Exemplary embodiments of the present invention will be explained in detail by referring to the accompanying drawings.  FIG. 1  is a block diagram of a control device according to an embodiment of the present invention. The same reference numerals are assigned to the units corresponding to the units in  FIG. 3 .  
         [0019]     The control device includes the graphic controller  10 , the LCD  20  a switching unit  30 , a converting unit  40 , and a comparator  50  are newly added to the structure.  
         [0020]     The switching unit  30  is provided between the graphic controller  10  and the LCD  20 , and switch-controlled by a switch control signal SS supplied from the comparator  50 . More specifically, when the switch control signal SS corresponds to value 1, the switching unit  30  is turned on to supply the clock signal S c  of the graphic controller  10  to the LCD  20 .  
         [0021]     On the other hand, when the switch control signal SS corresponds to value 0, the switching unit  30  is turned off and does not supply the clock signal S c  of the graphic controller  10  to the LCD  20 .  
         [0022]     The converting unit  40  converts the frequency of the clock signal S c  supplied by the graphic controller  10  to a voltage V 0  in accordance with conversion property shown in  FIG. 2 . The comparator  50  compares the voltage V 0  supplied by the converting unit  40 , with the predetermined threshold voltage V th , and outputs a switch control signal S s  (0 or 1) to the switching unit  30 , corresponding to the comparison result.  
         [0023]     More specifically, when the voltage V 0  does not reach the predetermined threshold voltage V th , the comparator  50  outputs the switch control signal S s  (=0) to the switching unit  30 . On the other hand, when the voltage V 0  is equal to or greater than the predetermined threshold voltage V th , the comparator  50  outputs the switch control signal SS (=1) to the switching unit  30 .  
         [0024]     The predetermined threshold voltage V th  corresponds to the threshold frequency f th  shown in  FIG. 2  and the threshold frequency f th  shown in  FIG. 4 . In other words, the comparator in  FIG. 1  determines whether the frequency of the clock signal S c  (voltage V 0 ) is lower than the threshold frequency f th  (threshold voltage V th ).  
         [0025]     The graphic controller  10 , the switching unit  30 , the converting unit  40 , and the comparator  50  can be provided in the computer device. On the other hand, the graphic controller  10 , the switching unit  30 , the converting unit  40 , and the comparator  50  can be provided in a display device configured to be connected to the computer device.  
         [0026]     When the power is turned on at the time to shown in  FIG. 4 , the graphic controller  10  supplies an image signal S g  to the LCD  20 , and a clock signal S c  to both the switching unit  30  and the converting unit  40 . At this stage, the frequency of the clock signal S c  is below 20 megahertz and the signal is still unstable.  
         [0027]     The converting unit  40  converts the frequency of the clock signal S c  (which is below 20 megahertz) to the voltage V 0  in accordance with the conversion property shown in  FIG. 2  and outputs the voltage to the comparator  50 . Because the voltage V 0  has not reached the threshold voltage V th , the comparator  50  outputs the switch control signal S s  (=0) to the switching unit  30 .  
         [0028]     The switching unit  30  does not supply the clock signal S c  to the LCD  20  because the switch control signal S c  is 0. The LCD  20 , which does not receive the clock signal S c , does not perform any image display. Thus, no disturbance occurs on the screen, unlike in the conventional technology.  
         [0029]     The frequency of the clock signal S c  described hereinafter is lower than the threshold frequency f th  for a period of time between the time to and immediately before the time t 1  shown in  FIG. 4 , during which the switching unit  30  does not supply a clock signal S c  to the LCD  20 .  
         [0030]     At the time t 1  when the frequency of the clock signal S c  reaches or exceeds the threshold voltage f th , the voltage V 0  supplied from the converting unit  40  to the comparator  50  reaches or exceeds the threshold voltage V th .  
         [0031]     Because the voltage V 0  is equal to or greater than the threshold voltage V th , the comparator  50  changes the switch control signal Ss that is being output to the switching unit  30 , from 0 to 1. Then, the switching unit  30  supplies the clock signal S c  that is equal to or greater than the threshold frequency f th  (as rated) to the LCD  20 . The LCD  20  described hereinafter displays an image that corresponds to the image signal S g  based on the rated clock signal S c .  
         [0032]     As explained above, according to the embodiment, the voltage V 0  that corresponds to the frequency of the clock signal S c  (predetermined parameter) is compared with the threshold voltage V th  that corresponds to the threshold frequency f th . The stability of the frequency of the clock signal S c  supplied to the LCD  20  is thereby monitored (lower than the threshold frequency f th : unstable, equal to or higher than the threshold frequency f th : stable). If the clock signal S c  is in an unstable state, the clock signal S c  is not supplied to the LCD  20 , while if the clock signal S c  is in a stable state, the clock signal S c  is supplied to the LCD  20 . Therefore, screen disturbance associated with the instability of the clock signal S c  is prevented from occurring.  
         [0033]     An embodiment of the present invention has been described with reference to the drawings. Examples of specific structures, however, are not limited to this embodiment, and the present invention can be embodied in various modes where modifications are added to the design as long as they do not depart from the gist of the invention.  
         [0034]     For instance, the invention is not limited to controlling display of an LCD. The invention can be used to control different types of displays, such as plasma displays and CRTs.  
         [0035]     As explained above, according to the embodiments, screen disturbance resulting from an instable clock signal can be prevented from occurring.  
         [0036]     Although the invention has been described with respect to a specific embodiment for a complete and clear disclosure, the appended claims are not to be thus limited but are to be construed as embodying all modifications and alternative constructions that may occur to one skilled in the art that fairly fall within the basic teaching herein set forth.