Abstract:
In encoding digital data, scrambling is executed after error correction encoding is completed. In decoding digital data, error correction processing is executed after descrambling is completed. In the error correction processing, after syndrome calculation is performed, syndrome s 0  is used to determine the location and value of an error; the error value is subtracted from each syndrome value; and the result is divided by a fixed value. This process realizes a digital data encoding and decoding system providing substantially the same correcting ability as a conventional process except that error propagation occurs through descrambling.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    The present invention relates to information reproducing techniques for information recording media. In particular, the present invention relates to an information reproducing technique for an optical disk.  
           [0002]    DVDs with a capacity of 4.7 gigabytes and above are becoming common as high density and high capacity optical disks to replace CDs. In addition, the next generation of optical disks using blue lasers is currently being standardized. Recording and reproduction technologies in this field are advancing toward still higher density, and there is a demand for superior signal processing techniques.  
           [0003]    Among the signal processing techniques employed for such familiar optical disks as CDs and DVDs, is one referred to as “scramble.” This signal processing is characterized in that the length of data composed of pits, spaces, marks and the like on an optical disk is changed randomly at long intervals. These changes are intended to reduce crosstalk and adverse effects on the servo error signal due to adjacent identical data, to obtain a good data reproduction waveform and a steady tracking servo.  
           [0004]    Moreover, in the case of phase-change disks such as CD-RW, DVD-RAM and DVD-RW, writing to the same place a number of times deteriorates the disk material and may result in a situation where data cannot be recorded or reproduced properly. One solution to this problem is a method disclosed in Japanese Patent Laid-open No. 2002-216358. This method superimposes different data on recorded data each time the data is written to change the written data each time.  
           [0005]    This invention provides an improved solution in which when recording a disk, scrambling is performed after error correction encoding in the process of data processing.  
         BRIEF SUMMARY OF THE INVENTION  
         [0006]    Scrambling or data randomization is conventionally done to achieve a steady tracking servo, and it is desirable to scramble as much record data as possible. In the method described in Japanese Patent Laid-open No. 2002-216358, however, not all record data are scrambled after error correction encoding is performed.  
           [0007]    Thus, this method may not provide satisfactory results, not only in servo performance but also in suppression of the phase-change disk material&#39;s degeneration. Such degradation may even prevent proper data recording and reproduction when writing to the same location a number of times. In conventional data converting processing methods, which scramble data before error correction encoding, however, when the same data is to be written to the same place on the disk, it is necessary to re-perform scrambling and error correction encoding for the data. This makes data conversion inefficient in both speed and power consumption.  
           [0008]    This invention provides a new error correcting method to realize scrambling of all record data after error correction encoding is done. The problem mentioned above is solved in the digital data decoding process by descrambling data which were scrambled and then performing error correction processing on the descrambled data.  
           [0009]    The error correcting ability of this error correction processing is almost the same as conventional processing, although error propagation occurs through descrambling. In this error correction processing, syndrome S 0  obtained by syndrome calculation is used to determine the locations and values of errors included in specific data and then calculated syndrome Sn (n is an integer) is divided by a fixed value.  
           [0010]    According to an aspect of the present invention, a data reproduction method is provided for reproducing recorded data from a recording medium wherein the recorded data is generated by generating an error correction block by adding error correcting parity to data comprising main data and identification data and error correcting parity for the main data and the identification data; and converting the data in the error correction block by superimposing data, generated from data conversion information on the data in the error correction block. The data reproduction method comprises the steps of reading out the data conversion information from the recording medium; generating the superimposed data from the data conversion information; deconverting the converted data by using the data conversion information read out and the superimposed data generated; calculating syndromes of the de-converted data and, if one of the multiple calculated syndromes, Sn (n is an integer), is not zero, making a decision that the last data of the de-converted data includes an error; correcting the last data and returning the corrected last data into the error correction block; and reproducing the data in the error correction block by removing the error correcting parity from the error correction block.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0011]    [0011]FIG. 1 illustrates an example of an optical disk reproduction system according to the present invention;  
         [0012]    [0012]FIG. 2 is a flowchart illustrating a first example of syndrome calculation processing according to the present invention;  
         [0013]    [0013]FIG. 3 illustrates a procedure of processing to configure a physical sector;  
         [0014]    [0014]FIG. 4 illustrates a data sector of the physical sector in FIG. 3;  
         [0015]    [0015]FIG. 5 illustrates identification data (ID) of the data sector in FIG. 4;  
         [0016]    [0016]FIG. 6 illustrates CPR_MAI in the data area of FIG. 4;  
         [0017]    [0017]FIG. 7 lists the initial values of a shift register;  
         [0018]    [0018]FIG. 8 illustrates the configuration of a feedback type shift register to generate scrambled data;  
         [0019]    [0019]FIG. 9 illustrates an ECC block;  
         [0020]    [0020]FIG. 10 illustrates a row-interleaved ECC block;  
         [0021]    [0021]FIG. 11 illustrates a physical sector;  
         [0022]    [0022]FIG. 12 is a flowchart illustrating the flows of DVD encoding;  
         [0023]    [0023]FIG. 13 is a block diagram illustrating a DVD recording and reproduction system;  
         [0024]    [0024]FIG. 14 illustrates random seed scrambling;  
         [0025]    [0025]FIG. 15 is a diagram of a scramble circuit used in a random seed-scrambling method using scramble polynomial S(x)=x 8 ;  
         [0026]    [0026]FIG. 16 is a diagram of a descramble circuit used in a random seed-scrambling method using scramble polynomial S(x)=x 8 ;  
         [0027]    [0027]FIG. 17 is a block diagram illustrating an example of an error correction system;  
         [0028]    [0028]FIG. 18 is a syndrome s j  calculation circuit diagram;  
         [0029]    [0029]FIG. 19 is a flowchart illustrating a second example of syndrome calculation processing according to the present invention;  
         [0030]    [0030]FIG. 20 is a block diagram illustrating a DVD recording and reproduction system according to the present invention.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0031]    With reference to the drawings, the following describes the DVD format as an example of a recording format. Then an embodiment implemented by applying the present invention to this recording format is described. The present invention is not limited to the DVD format, and can be adapted to many recording media including other optical disks and other formats.  
         [0032]    The DVD recording data format is described next. FIG. 3 shows a processing procedure to configure a DVD physical sector. Each sector is named differently depending on the stage of signal processing. A sector is called a data sector (scrambled data sector  1 )  305 , a record sector (data sector  2 )  307  and a physical sector (data sector  3 )  308 . A sector is processed according to the processing procedure (encoding flow) of FIG. 3 to configure physical sectors.  
         [0033]    [0033]FIG. 4 shows the configuration of a data sector  305 . Data sector  305  is 2064 bytes of data which contains 2048 bytes of main data, 12 bytes of data identification address information including ID (Identification Data)  401  and 4 bytes of error detection parity (EDC: Error Detection Code)  404 . Data sector  305  is composed of 12 rows of 172 bytes each. After the EDC is calculated, scrambled data is added to 2052 bytes of main data in the data sector. EDC  404  shown in FIG. 4 is a check code given to the 2060 bytes of the pre-scramble data sector. EDC  404  is checked after error correction to determine whether any error was included in the data sector due to the impossibility of correction or a wrong correction.  
         [0034]    [0034]FIG. 5 shows the configuration of the ID  401 . The ID has 3 bytes of sector information (data field information) and 1 byte of a sector number (data field number). Sector information  405  includes the disk&#39;s format type (sector format type) information  407 , tracking method information  408  and reflectivity information  409 . In addition, sector information  405  includes: area type information  411  indicating the area is a data area, lead-in area or lead-out area; data type information  412  indicating the data is read-only, write-once or rewritable; and layer number information  413  specifying a layer of the disk. Sector number  406  is one of 030000 h and subsequent numbers which are given serially to the data area.  
         [0035]    [0035]FIG. 6 shows the configuration of CPR_MAI (Copyright Management Information)  403  which RSV  403  in the data area of FIG. 4 contains when the disk is used as a DVD-ROM. Of the 48 bits, the DVD-ROM format uses 4 bits at present. In b 47 , CMP (Copyright Material) indicates whether this sector contains copyrighted material. In b 46 , CP_SEC indicates whether this sector contains a data structure unique to the copyright protection system. In b 45  and b 44 , CGMS (Copy Generation Management System) or copy restricting information is recorded.  
         [0036]    [0036]FIG. 7 shows the initial values of the shift register. FIG. 8 shows a scrambling random data generation circuit used for scrambling. In this figure, reference numeral  128  denotes a 1-bit register and  129  denotes an adder (exclusive OR). Scrambling random data is generated repeatedly by shifting the shift register by 8 bits. The initial value set to the shift register in FIG. 8 is associated with the corresponding initial preset number as shown in FIG. 7. In DVDs, since the initial preset number corresponds to the 4 bits b 7  through b 4  of ID, the same scrambling random data are generated by this generation circuit unless the ID is not changed.  
         [0037]    Then, an ECC (Error Correction Code) block is encoded with sixteen data sectors  305 . Record sectors  307  are sectors resulting from this error correction encoding. In this encoding, PO (Parity of Outer-Code) and PI (Parity of Inner-Code) are added and interleaved row by row. Physical sectors  308  are obtained by adding a synchronization signal (SYNC code) to the top of every 91 bytes.  
         [0038]    [0038]FIG. 9 shows the configuration of an ECC block. This ECC block has sixteen scrambled data sectors as an information field. For this information field, 172 bytes×192 rows or 172 bytes by 12 rows by 16 data sectors, 16 bytes of PO  502  are generated by the following generator polynomial: 
           G   PO ( x )=( x−α   0 )( x−α   1 ) . . . ( x−α   15 ) 
         [0039]    thereby, forming a Reed-Solomon (208, 192, 17) outer code for each of the 172 columns. Then, 10 bytes of PI  501  are generated by the following generator polynomial: 
           G   PI ( x )=( x−α   0 )( x−α   1 ) . . . ( x−α   9 ) 
         [0040]    thereby, forming a Reed-Solomon (182, 172, 11) inner code for each of all 208 rows including PO  502 . The ECC block in FIG. 9 goes through row by row interleaving and modulating before the block is recorded on the disk. This interleaving is done in such a manner that one of the 16 PO rows is inserted for every twelve data area rows as shown in FIG. 10. As mentioned earlier, each sector of 13 rows by 182 bytes in the post-interleave ECC block is called a record sector  307 . This means each post-interleave ECC block has sixteen record sectors  307 .  
         [0041]    [0041]FIG. 10 shows the configuration of the ECC block after interleaving. A physical sector  308  can be configured by modulating an interleaved 2366 byte (13 rows by 182 bytes) record sector sequentially row by row while inserting a SYNC code  308  before the 0th and 91st columns of each row. Note that a SYNC code  701  and the subsequent modulated 91 bytes are called a SYNC frame. (See FIG. 11.)  
         [0042]    As shown in FIG. 11, one physical sector has 13 by 2 SYNC frames. Thus, since 8 bit input data is converted to 16 channel bits by 8/16 modulation, one physical sector has 38688 channel bits ((2 bytes+91 bytes)×2×13 rows×16 bits/byte). SYNC codes  701  are combined as shown in FIG. 11. The start of the sector is identified by SY 0  (SYNC code “0”) while each of the remaining rows can be identified by two codes selected cyclically from SY 1  through SY 4  and from SYN 5  through SYN 7 , respectively. Error correction is done on an each ECC block basis. Although each ECC block has sixteen sectors, the top address of each sector, divisible by 16, is determined from the ID information which follows SY 0 . Thus, SY 0  or the top of each block is highly important in the decoding of data. In addition, at the same time, the cyclicity of the other SYNC codes  701  is utilized to ensure the recognition of SY 0 .  
         [0043]    [0043]FIG. 12 is a flowchart illustrating the flow of processing in generating record data shown in FIG. 3.  
         [0044]    [0044]FIG. 13 shows the configuration of a DVD-RAM drive, an example of an optical disk recording and reproduction apparatus. Reference numeral  1301  denotes an optical disk,  1302  denotes a pickup to read data from optical disk  1301 ,  1303  denotes a spindle motor to rotate the disk and  1314  denotes a laser driver. Reference numeral  1304  denotes a servo control process unit to control optical pickup  1302 , etc. Reference numeral  1305  denotes a read channel which equalizes the waveform of the analog signal retrieved from disk  1301 , puts it in binary format and generates a synchronization clock. Reference numeral  1306  denotes a decoder which performs such operations as demodulation of read data, error correction and descrambling for picked up data. Reference numeral  1309  denotes a RAM for temporally storing data. Reference numeral  1311  denotes an encoder which performs such operations as modulation of write data, error correction coding, scrambling and the like. Reference numeral  1315  denotes an interface which controls data input and output from and to the upper apparatus and  1316  denotes a microcomputer which takes control of the system. Since this configuration is depicted as an example of a DVD drive connected to a personal computer, interface  1315  is assumed to be connected to such devices as an MPEG board and HDD (Hard Disc Drive) in a personal computer. What can be connected to interface  1315  is not limited to such devices. The interface may also be connected to such devices as a STB (Set Top Box) receiver and other video/audio recording and reproducing devices.  
         [0045]    The encoding processing to generate record data, shown in FIG. 3, is performed in encoder  1311 . The particular signal processing to which the present invention relates is the decoding processing done in decoder  1306 . The following describes the procedure of the decoding processing and the decoding circuit.  
         [0046]    [0046]FIG. 1 illustrates a method of decoding data read from a recording medium, according to an embodiment of the present invention. It is assumed that the recorded data was scrambled after undergoing error correction encoding.  
         [0047]    In this figure, reference numeral  102  denotes retrieved data;  103  denotes error-included in main data scrambled by two different methods (2nd scrambled data);  104  denotes error-included scrambled main data with scrambling data (scrambled data);  105  denotes scrambled data; and  106  denotes main data.  
         [0048]    As mentioned earlier, the conventional scrambling method in a DVD apparatus presets the shift register to an initial value determined by the initial preset number which corresponds to four bits b 7  through b 4  of the ID. Thus the same scrambling data is generated unless the ID does not change. Since the ID is associated with an address on the disk, the same scrambling data is always generated for the same place on the disk. Further if the main data does not change, the same data is repeatedly recorded in the same place on the disk. To prevent this, it is necessary to change the scrambling data each time a write is done at the same place.  
         [0049]    Accordingly, at recording, for example, random seed scramble is used as the second scrambling method performed after error correction encoding. FIG. 14 shows the process of random seed scramble. First, arbitrary data is appended to the top of a data column to be scrambled. Then, the all of the data including the seed is scrambled by a scrambling method defined by a specific scramble polynomial. When the same data is again to be recorded in the same place on the disk, a seed value different from the previously used one can be used to generate different 2nd scrambled data.  
         [0050]    [0050]FIG. 15 illustrates one example of a circuit to implement the random seed scrambling method shown in FIG. 14. Here, the following scramble polynomial is used: 
           G   RSS ( X )= X   8   
         [0051]    In this figure, reference numeral  1501  denotes one of the registers constituting an 8-bit shift register and holds one bit of data. Reference numeral  1502  denotes an adder. If 8-bit random data is given to the shift register as the initial value, 2nd scrambled data is generated from input data. In this method, since errors do not propagate more than eight bits, even if reproducing the initial value fails, the subsequent scrambled data can be decoded.  
         [0052]    [0052]FIG. 16 shows an example of a decoding circuit configured to descramble data which was scrambled by the random seed scrambling method shown in FIG. 15. In this figure, reference numeral  1501  is one of the registers constituting an 8-bit shift register and holds one bit of data. Reference numeral  1502  denotes an adder. If the shift register is given a 8-bit initial value, scrambled data is generated from input 2nd scrambled data.  
         [0053]    In this random seed scrambling method, scrambling is done by adding each bit to a bit which was scrambled eight bits ago, that is, by adding each byte to the last scrambled byte, since in a DVD apparatus pre-demodulation data is treated in 8 bits or in bytes.  
         [0054]    That is, from n bytes of scrambled data: 
         {D n−1 , D n−2 , D n−3 , . . . , D 2 , D 1 , D 0 } 
         [0055]    this random seed scrambling method generates 2nd scrambled data: 
         {D′ n−1 , D′ n−2 , D′ n−3 , . . . , D′ 2 , D′ 1 , D′ 0 } 
         [0056]    by performing: 
           D′   i   =D   i   +D′   i+1 , (where D′ n =0) 
         [0057]    Then, the following describes how the error correction processing in the decoding process of FIG. 1 differs from the conventional error correction processing employed for DVDs.  
         [0058]    [0058]FIG. 17 shows a conventional example of error correction processing. First, in the error correction processing, a syndrome calculation is performed on an error correction code-added data column which may include one or more errors.  
         [0059]    A (l+m, l, m+1) Reed-Solomon code is encoded by adding length m error correction parity P(x) to length l data column I(x) wherein: 
           I ( x )· x   m   +P ( x )(= W ( x )) 
         [0060]    is divisible by generator polynomial 
           G ( x )=( x−α   0 )( x−α   1 ) . . . ( x−α   m−1 ) 
         [0061]    This Reed-Solomon code can correct up to (m/2) errors when m is even and up to ((m−1)/2) errors when m is odd. Since every (x−α i ) is an irreducible polynomial, the Reed-Solomon code W(x) is divisible by (x−α i ) (where, i=0, . . . , m−1). This means 
           W ( x )mod( x−α   i )= W (α i )). 
         [0062]    Then, Y(x) is obtained by adding error polynomial 
           E ( x )= e   l+m−1   x   l+m−1   +e   l+m−2   x   l+m−2   + . . . +e   1   x+e   0   
         [0063]    (where, i=l+m−1, l+m 31  2, . . . , 0 and e i  means no error if e i =0 to W(x)=w l+m−1 x l+m−1 +w l+m−2 x l+m−2 + . . . +w 1 x+w 0 . Due to the definition of E(x), Y(x)(=E(x)+W(x)) means that Y(x) has no error when Y(x)=W(x) and includes one or more errors when Y(x)≠W(x). Therefore, the following holds: 
         ( Y ( x )mod( x−α   i )=( W ( x )+ E ( x ))mod( x−α   i )= W (α i )+ E (α i )= E (α i ) (where, i=0, . . . , m−1) 
         [0064]    That is, 
           Y ( x )mod( x−α   i ) 
         [0065]    is determined by the values and locations of errors constituting E(X) not depending on the data column included in the error correction code W(x). This equation is termed syndrome s i . The following describes what value syndrome s i  takes for an actual error. The location and value of an error are denoted here as L i and e L i , respectively.  
         [0066]    If no error exists.  
               s   0     =   0                 s   1     =   0                 s   2     =   0             ⋮               s     m   -   1       =   0                               
 
         [0067]    If one error exists.  
               s   0     =     e   L1                   s   1     =       e   L1     ·     α   L1                     s   2     =       e   L1     ·       (     α   L1     )     2                 ⋮               s     m   -   1       =       e   L1     ·       (     α   L1     )       m   -   1                                     
 
         [0068]    If two errors exist.  
               s   0     =       e   L1     +     e   L2                     s   1     =         e   L1     ·     α   L1       +       e   L2     ·     α   L2                       s   2     =         e   L1     ·       (     α   L1     )     2       +       e   L2     ·       (     α   L2     )     2                   ⋮               s     m   -   1       =         e   L1     ·       (     α   L1     )       m   -   1         +       e   L2     ·       (     α   L2     )       m   -   1                                       
 
         [0069]    If n errors exist.  
               s   0     =       ∑     i   =   1     n          e     L                 i                       s   1     =       ∑     i   =   1     n            e     L                 i       ·     α     L                 i                         s   2     =       ∑     i   =   1     n            e     L                 i       ·       (     α     L                 i       )     2                   ⋮               s     m   -   1       =       ∑     i   =   1     n            e     L                 i       ·       (     α     L                 i       )       m   -   1                                       
 
         [0070]    Then, the following describes the configuration of the syndrome s i  calculation circuit.  
         [0071]    In FIG. 18, 1801 is a syndrome calculation circuit  1801  containing an 8-bit shift register  1802 , α i  (on G F (2 8 )) multiplier circuit  1803 , 8-bit adder circuit (exclusive OR). From data column Y(x) entered at a rate of 1 byte per clock cycle, this syndrome calculation circuit  1801  calculates the output syndrome e i  as follows: 
         After 1 clock cycle:  s   i   =y   l+m−1   =w   l+m−1   +e   l+m−1   
         After 2 clock cycles:  s   i ( y   l+m−1 )·α i   +y   l+m−2   
         After  3  clock cycles:  s   i =(( y   l+m−1)·α   i   +y   l+m−2 )·α i   +y   l+m−3   
         [0072]    The output syndrome s i  obtained (l+m) clock cycles later is:  
                            s   i     =       (                  …                     (         (     y     l   +   m   -   1       )     ·     α   i       +     y     l   +   m   -   2         )     ·     α   i         +     y     l   +   m   -   3         )     +                                                       y       l   +   m   -     4                 …                      )     ·     α   i       +     y   1       )     ·     α   i       +     y   0                                           =         y     l   +   m   -   1            α     i   ·     (     l   +   m   -   1     )           +       y     l   +   m   -   2            α     i   ·     (     l   +   m   -   2     )           +                                               y     l   +   m   -   3            α     i   ·     (     l   +   m   -   3     )           +   …   +       y   1          α   i       +     y   0                                           =         (       w     l   +   m   -   1       +     e     l   +   m   -   1         )          α     i   ·     (     l   +   m   -   1     )           +     (       w     l   +   m   -   2       +     e     l   +   m   -   2         )                                    α     i   ·     (     l   +   m   -   2     )         +   …   +     (       w   1     +     e   1       )     +     α   i     +     (       w   0     +     e   0       )                                =       W        (     α   i     )       +     E        (     α   i     )                                    =       Y        (   x   )            mod        (     x   -     α   i       )                                       
 
         [0073]    Thus, what should be obtained as s i  is obtained.  
         [0074]    As understood from the above description, if all syndromes are 0, it is determined that the error correction code-encoded data column has no error. Likewise, if at least one syndrome is not 0, the data column has one or more errors. If a data column is found to have an error, error locator and evaluator polynomials are generated by a method such as Euclid&#39;s algorithm from the calculated syndromes  1702 . Then, the error&#39;s location is calculated by chain search or the like from the error locator polynomial  1703  and the error&#39;s value is determined from the error&#39;s location and error evaluator polynomial  1704 . Finally, error correction processing is completed by removing the error from the error-included data column according to the obtained error location and value  1705 .  
         [0075]    The following describes how to correct an error which propagates through the random seed scramble shown in FIG. 1, that is, clarifies how the error correction processing in FIG. 1 is different from the conventional error correction processing.  
         [0076]    As already described, error propagation through the random seed scramble in FIG. 1 occurs due to the scramble polynomial S(x)=x 8  as follows:  
         [0077]    Assume a data column 
         {D′ l+m , . . . , D′ i , D′ i−1 , . . . , D′ 1 , D′ 0 } 
         [0078]    which is generated by random seed scrambling after error correction encoding. If an error e L+i  is added to a location D′ i , the data column becomes 
         {D′ l+m , . . . , D′ i +e L i , D′ i−1 , . . . , D′ 1 , D′ 0 } 
         [0079]    and, after random seed descrambling, becomes 
         {D n , D n−1 , . . . , D i +e L i , D i−1 +e L i , D i−2 , . . . , D 1 , D 0 } 
         [0080]    That is, the same error e L i  propagates to the next byte.  
         [0081]    Accordingly, by the error correction processing performed on the error-included in scrambled data  104  which has gone through the random seed descramble of FIG.  1 , syndrome S i  is calculated as shown below: Note that the location and value of an error in the 2nd scrambled data  103  are denoted as L i and e L i , respectively.  
         [0082]    If there exists no error,  
               s   0     =   0                 s   1     =   0                 s   2     =   0             ⋮               s     m   -   1       =   0                               
 
         [0083]    If one error existed at location L 1  (L  1 ≠0, that is, the error location is not the last byte location of the error correction code which ends the data column) in the 2nd scrambled data  103  and, after descrambling, increased to two errors,  
               s   0     =         e   L1     +     e   L1       =   0                   s   1     =         e   L1     ·     α   L1       +       e   L1     ·     α     L1   -   1                         s   2     =         e   L1     ·       (     α   L1     )     2       +       e   L1     ·       (     α     L1   -   1       )     2                   ⋮               s     m   -   1       =         e   L1     ·       (     α   L1     )       m   -   1         +       e   L1     ·       (     α     L1   -   1       )       m   -   1                                       
 
         [0084]    If one error existed at location L 1  (L 1 =0, that is, the error location is the last byte location of the error correction code which ends the data column) in the 2nd scrambled data  103  and, after descrambling, the number of errors remained 1,  
               s   0     =     e   L1                   s   1     =         e   L1     ·     α   0       =     e   L1                     s   2     =         e   L1     ·       (     α   0     )     2       =     e   L1                 ⋮               s     m   -   1       =         e   L1     ·       (     α   0     )       m   -   1         =     e   L1                                   
 
         [0085]    If two respective errors existed at locations L 1  and L 2  (L  1 ≠0 and L  2 ≠0) in the 2nd scrambled data  103  and, after descrambling, the number of errors increased to 3 or 4,  
               s   0     =         e   L1     +     e   L1     +     e   L2     +     e   L2       =   0                   s   1     =         e   L1     ·     α   L1       +       e   L1     ·     α     L1   -   1         +       e   L2     ·     α   L2       +       e   L2     ·     α     L2   -   1                         s   2     =         e   L1     ·       (     α   L1     )     2       +       e   L1     ·       (     α     L1   -   1       )     2       +       e   L2     ·       (     α   L2     )     2       +       e   L2     ·       (     α     L2   -   1       )     2                   ⋮               s     m   -   1       =         e   L1     ·       (     α   L1     )       m   -   1         +       e   L1     ·       (     α     L1   -   1       )       m   -   1         +       e   L2     ·       (     α   L2     )       m   -   1         +       e   L2     ·       (     α     L2   -   1       )       m   -   1                                       
 
         [0086]    If two respective errors existed at locations L 1  and L 2  (L  2 =0) in the 2nd scrambled data  103  and, after descrambling, the number of errors remained 2 or increased to 3,  
                            s   0     =         e   L1     +     e   L1     +     e   L2       =     e   L2                                    s   1     =         e   L1     ·     α   L1       +       e   L1     ·     α     L1   -   1         +       e   L2     ·     α   0       +       e   L1     ·     α   L1       +       e   L1     ·     α     L1   -   1         +     e   L2                                    s   2     =         e   L1     ·       (     α   L1     )     2       +       e   L1     ·       (     α     L1   -   1       )     2       +       e   L2     ·       (     α   0     )     2                                    =         e   L1     ·       (     α   L1     )     2       +       e   L1     ·       (     α     L1   -   1       )     2       +     e   L2                                ⋮                 s     m   -   1       =         e   L1     ·       (     α   L1     )       m   -   1         +       e   L1     ·       (     α     L1   -   1       )       m   -   1         +       e   L2     ·       (     α   0     )       m   -   1                                    =         e   L1     ·       (     α   L1     )       m   -   1         +       e   L1     ·       (     α     L1   -   1       )       m   -   1         +     e   L2                                     
 
         [0087]    If n respective errors existed at locations L  1 , L  2 , . . . , L n (for any i (i=0, . . . , n), L i≠0) in the 2nd scrambled data  103  and, after descrambling, the errors increased to (n+1) or more errors,  
               s   0     =         ∑     i   =   1     n          (       e   Li     +     e   Li       )       =   0                   s   1     =         ∑     i   =   1     n          (         e   Li     ·     α   Li       +       e   Li     ·     α     Li   -   1           )       =       (     1   +     α     -   1         )            ∑     i   =   1     n            e   Li     ·     α   Li                           s   2     =         ∑     i   =   1     n          (         e   Li     ·       (     α   Li     )     2       +       e   Li     ·       (     α     Li   -   1       )     2         )       =       (     1   +     α     -   1         )            ∑     i   =   1     n            e   Li     ·       (     α   Li     )     2                       ⋮                     s     m   -   1       =       ∑     i   =   1     n          (         e   Li     ·       (     α   Li     )       m   -   1         +       e   Li     ·       (     α     Li   -   1       )       m   -   1           )                   =       (     1   +     α     -   1         )            ∑     i   =   1     n            e   Li     ·       (     α   Li     )       m   -   1                                               
 
         [0088]    If n respective errors existed at locations L  1  , L  2 , . . . , L n (L n=0) in the 2nd scrambled data  103  and, after descrambling, the number of errors remained n or increased to more than n,  
               s   0     =           ∑     i   =   1       n   -   1            (       e   Li     +     e   Li       )       +     e     L                 n         =     e     L                 n                       s   1     =           ∑     i   =   1       n   -   1            (         e   Li     ·     α   Li       +       e   Li     ·     α     Li   -   1           )       +     e     L                 n         =         (     1   +     α     -   1         )            ∑     i   =   1       n   -   1              e   Li     ·     α   Li           +     e     L                 n                               s   2     =         ∑     i   =   1       n   -   1            (         e   Li     ·       (     α   Li     )     2       +       e   Li     ·       (     α     Li   -   1       )     2         )       +     e     L                 n                     =         (     1   +     α     -   1         )            ∑     i   =   1       n   -   1              e   Li     ·       (     α   Li     )     2           +     e     L                 n                         ⋮                     s     m   -   1       =         ∑     i   =   1       n   -   1            (         e   Li     ·       (     α   Li     )       m   -   1         +       e   Li     ·       (     α     Li   -   1       )       m   -   1           )       +     e     L                 n                     =         (     1   +     α     -   1         )            ∑     i   =   1       n   -   1              e   Li     ·       (     α   Li     )       m   -   1             +     e     L                 n                                           
 
         [0089]    According to this, the following describes the flows of error correction processing in FIG. 1 with reference to FIG. 17. First in the error correction processing, syndrome calculation  1701  is performed on an error correction code-encoded data column which may contain one or more errors. In the same manner as the conventional method, syndrome s i  is calculated by using the circuit of FIG. 18 or calculating Y(x) m o d (x−α i ) by software. In the conventional method, however, if at least one syndrome s i  is not 0, error locator and evaluator polynomials are immediately generated as shown at  1702  in FIG. 17 by such a method as Euclid&#39;s algorithm from the calculated syndrome. In syndrome calculation  1701  in the process of error correction shown in FIG. 1, calculation according to the algorithm shown in FIG. 2 is added to change the value of syndrome s i  before the subsequent steps: generating error locator and evaluator polynomials  1702 ; calculating error location  1703 , calculating error value  1704 ; and finally using the calculated error location and value to remove an error from the data column which was found to have an error  1705 .  
         [0090]    [0090]FIG. 2 is a flowchart showing the flows of syndrome calculation within the error correction processing shown in FIG. 1. Like in the conventional method, first, it is determined for every i whether calculated syndrome s i  is 0. If all syndromes are 0, the error correction code-encoded data column  104  which may contain processing is found to have no error and the processing is terminated. However, if at least one syndrome s i  is not 0, it is determined that this data column  104  contains an error and then it is established whether s o  is 0. If s o  is not 0, it is determined that an error whose value is s o  is contained in the last byte of the data column as described earlier. In this case, s o  is subtracted from every syndrome s i , that is, s i =s i −s o  is performed. Then, if s i  is zero for every i, it is decided that there are no other errors. If at least one syndrome s i  is not 0, it is decided that at least one another error exists. Then, processing goes to a step of performing s i =s i \(1−α −1 ) for every i that is other than 0. Note that processing also branches to this step from a step where it is judged whether s o  is 0. (This division by a fixed value does not pose a large calculation load since it can be performed as multiplication by a fixed value.) Then, using syndrome s i  generated in this manner for i=1, . . . , m−1 excluding 0, error locator and evaluator polynomials are generated as shown at  1702  in FIG. 17.  
         [0091]    Thus, after the location and value of an error is calculated as shown at  1703  and  1704 , respectively, in FIG. 17 by using syndrome s i  obtained in this manner, correction (removal) processing  1705  is done on the assumption that the same value error is included in a data byte which immediately follows the calculated error location. Therefore, it is also possible to remove (correct) errors which have occurred as a result of propagation during random seed data scrambling. Needless to say, in the error removal (correction)  1705 , an error can be removed (corrected) which is revealed to exist in the last data byte of a data column if the corresponding syndrome s o  is not 0 during syndrome calculation.  
         [0092]    The same result can also be attained by using a syndrome calculation algorithm shown in FIG. 19 instead of the method shown in FIG. 2.  
         [0093]    A DVD drive including this error correction is configured as shown in FIG. 20. Although such specific techniques as a random seed scrambling method assuming a 2-byte error propagation and using a scramble polynomial S(x)=x8, are cited to describe the present invention, the scope of the present invention is not limited to these techniques. The present invention can be used widely to correct multiple instances of the same error that occurs across adjacent symbols. Error correction processing according to the present invention therefore allows all record data to be scrambled after error correction encoding is done.  
         [0094]    Because the present invention enables random seed scrambling, which is conventionally aimed at preventing the recording layer of a phase-changed optical disk from deteriorating, to be performed after error correction encoding is done, all record data including ID can be scrambled. As a result, it is possible to attain steady servo characteristics without the needing to re-perform error correction encoding when the scrambling seed value is changed.  
         [0095]    Although the preferred embodiment of the invention has been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.