Abstract:
To provide a printed wiring board where the impedance between pads through which differential signals pass has been set to a predetermined standard value. The printed wiring board includes a first conductor layer extending over an area excluding a hole formed for each pad group and filled with a dielectric, and a second conductor layer extending over an area containing areas facing the hole. The hole encompasses a plurality of areas facing predetermined respective pads which are adjacent to each other and which form the pad group from among the plurality of pads.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The present invention relates to a printed wiring board having plural pads arranged thereon and with plural wires extending from the pads.  
           [0003]    2. Description of the Related Art  
           [0004]    Signal transmission among devices interconnected via a network such as a LAN (Local Area Network) has been speeded up recently and signals in GHz bands are sent and received by high-speed serial transmission.  
           [0005]    [0005]FIG. 1 is a diagram conceptually showing a network which sends and receives signals by high-speed serial transmission.  
           [0006]    [0006]FIG. 1 shows HCAs (Host Channel Adapters)  100  which serve, for example, as signal interfaces for personal computers, TCAs (Target Channel Adapters)  300  which serve, for example, as signal interfaces for peripheral devices, and switches  400  which switch connections between the HCAs  100  and TCAs  300 .  
           [0007]    [0007]FIG. 2 is a diagram showing a PCI (Peripheral Component Interconnect) card, which is an example of the HCAs  100  shown in FIG. 1.  
           [0008]    The PCI card  110  shown in FIG. 2 serves, for example, as a signal interface for a personal computer, as described above. For example, parallel signals generated in the personal computer are input in a SerDes (Serializer Deserializer) element  112 , which is a serial/parallel signal conversion element mounted on the PCI card  110 , through a path not shown. The parallel signals are converted into high-speed serial signals by the SerDes element  112  and output to the network via signal lines  113  and a connector  111 .  
           [0009]    In recent years, high-speed serial signals passing through signal lines are in GHz bands as described above. When designing a printed wiring board equipped with signal lines along which such high-speed signals travel, the impedance of the signal lines should be set to a standard value specified by a predetermined communications standard in order to ensure an impedance match among various points from the start point to the end point of the signal transmission path.  
           [0010]    Most of the signal lines formed on the top surface of a printed wiring board are composed of pads and wires extending from the pads, where the pads are connected to terminals of a circuit element and the wires are thinner than the pads. In these signal lines, the pads and wires have their impedance set to the same standard value.  
           [0011]    Recently, transmission of high-speed serial signals has been migrating from single-ended mode which uses a single signal line to differential mode which uses two signal lines.  
           [0012]    Thus, a method of setting impedance in conventional single-ended mode will be described below first.  
           [0013]    In the design of a printed wiring board, a conventionally used technique involves first setting the impedance of wiring composing a signal line to a predetermined standard value (e.g., 50 Ω) mainly by setting the dimension in the thickness direction of the printed wiring board appropriately, and then setting the impedance of the pads connected to the wiring to the same standard value, taking care not to change the dimension in the thickness direction.  
           [0014]    Thus, a method of setting wiring impedance will be described first, and then a method of setting pad impedance will be described.  
           [0015]    [0015]FIG. 3 is a schematic sectional view of a printed wiring board  120  which has single-ended mode wiring formed on its top surface.  
           [0016]    [0016]FIG. 3 shows wires  121  formed on the top surface, a first conductor layer  122  formed on the top surface by keeping clear of the wires  121 , a second conductor layer  124  formed on the bottom surface, and a uniformly thick dielectric  123  sandwiched between the wires  121 /first conductor layer  122  and second conductor layer  124 .  
           [0017]    In the printed wiring board  120 , the impedance between the second conductor layer  12 . 4  and the wires  121  has been set to a predetermined standard value.  
           [0018]    The impedance between the second conductor layer  124  and wires  121  decreases with increases in the width W of each wire  121 , and increases with increases in the thickness T of the dielectric  123  sandwiched between the second conductor layer  124  and the wires  121 .  
           [0019]    Generally, when a signal travels along wiring, if the wiring is narrow, the signal is attenuated in a short distance. Thus, in order for a signal to travel along wiring of a certain length without significant attenuation, the width of the wiring must be set to an appropriate value commensurate with its length.  
           [0020]    In the design of the printed wiring board  120  shown in FIG. 3, first the width W of each wire  121  is determined based on the length of each wire  121 . Then, the thickness T of the dielectric  123  is set to an appropriate value, whereby the impedance between the second conductor layer  124  and the wires  121  is set to a predetermined standard value.  
           [0021]    Next, description will be given of a method of setting impedance of single-ended mode wiring formed in a printed wiring board.  
           [0022]    [0022]FIG. 4 is a diagram showing part of a printed wiring board  130  in which wiring has been formed.  
           [0023]    [0023]FIG. 4 shows a first conductor layer  131 , a second conductor layer  132 , a dielectric  133  sandwiched between the two conductor layers  131  and  132 , and two wires  134   a  and  134   b  installed in the dielectric  133  and extending parallel to the two conductor layers  131  and  132 .  
           [0024]    In the printed wiring board  130  shown in FIG. 4, as is the case with the printed wiring board  120  shown in FIG. 3, the width W of the two wires  134   a  and  134   b  is determined based on the length of the wire  134   a . Then, the thickness Ta of the dielectric sandwiched between the wire  134   a  and conductor layer  131 , the thickness Tb of the dielectric sandwiched between the wire  134   b  and conductor layer  131 , and the overall thickness Tt of the dielectric  133  sandwiched between the two conductor layers  131  and  132  are set to appropriate values, whereby the impedance of the two wires  134   a  and  134   b  is set to a predetermined standard value.  
           [0025]    Next, description will be given of a method of setting pad impedance in single-ended mode.  
           [0026]    The pads formed on the top surface of the printed wiring board are connected to terminals of a circuit element mounted on the printed wiring board. Thus, the width of the pads depends on the terminal width and spacing of the circuit element.  
           [0027]    [0027]FIG. 5 is a diagram showing an example of a circuit element.  
           [0028]    The terminal width Wdev and spacing Pi of the circuit element  500  shown in FIG. 5 determine the width of the pads connected with the terminals.  
           [0029]    [0029]FIG. 6is a partial-sectional view showing part of the printed wiring board on which the circuit element  500  shown in FIG. 5 is mounted.  
           [0030]    [0030]FIG. 6 shows pads  141  connected with the terminals of the circuit element  500  (see FIG. 5) mounted on a printed wiring board  140 , a conductor layer  144  extending parallel to the pads  141 , and a uniformly thick dielectric  143  sandwiched between the pads  141  and conductor layer  144 . The width Wp of the pads  141  has been set to a value commensurate with the terminal width and spacing of the circuit element  500 .  
           [0031]    Generally, the width of pads determined in this way is larger than the width of the wires extending from the pads.  
           [0032]    Also, as described above, in the design of a printed wiring board, generally the dimension in the thickness direction of the printed wiring board is determined to set the impedance of wiring to a predetermined standard value. Furthermore, the width of pads is determined according to the terminal width and spacing of the circuit element.  
           [0033]    Thus, methods have been proposed which set the impedance of pads to the same predetermined standard value as the impedance of wiring without changing the dimension in the thickness direction or the pad width. For example, a printed wiring board has been proposed in which the impedance of pads is set to a predetermined standard value by providing holes in that area of a conductor layer which faces the pads with the conductor layer extending parallel to the pads (e.g., see Patent Document: Japanese Patent Laid-Open No. 5-29772 (Paragraphs.  0010  to  0019  and FIG. 1).  
           [0034]    [0034]FIG. 7 shows part of a printed wiring board disclosed in the above Patent Document, where Part (a) is a partial plan view and Part (b) is a partial sectional view.  
           [0035]    Part (a) of FIG. 7 shows a pad  151  through which high-speed signals pass; a wire  152  which extends from the pad  151  and through which high-speed signals travel; ordinary pads such as  153   a ,  153   b , and  153   c  other than the pad  151 , which are connected with power terminals of a circuit element; and three wires  154   a ,  154   b , and  154   c  extending from the ordinary pads.  
           [0036]    Part (b) of FIG. 7 shows two conductor layers  155  and  156  which are spaced from each other and embedded in a dielectric  157 ; the pads  151 ,  153   a ,  153   b , and  153   c  and the wire  152  formed on the top surface  150   a  ; and an internal wire  158  formed between the two conductor layers  155  and  156  and facing them. High-speed signals travel through the internal wire  158  as is the case with the wire  152 .  
           [0037]    To indicate clearly that the wire  152  shown in Part (b) of FIG. 7 extends from the pad  151  through which high-speed signals pass, Part (a) of FIG. 7 schematically shows the wiring route of the wire  152 , in particular, from the pad  151 . Regarding the other wires  154   a ,  154   b , and  154   c , which are irrelevant here, wiring routes are omitted in the figure.  
           [0038]    In a printed wiring board  150  shown in FIG. 7, the interval T 1  from the top surface  150   a  to the first conductor layer  155  is set in such a way as to make the impedance of the wire  152  equal to a predetermined standard value and the interval T 2  between the two conductor layers  155  and  156  is set in such a way as to make the impedance of the internal wire  158  equal to the same standard value. Furthermore, the width Wp of the pads has been set to a value commensurate with the terminal width and spacing of the circuit element connected to the pads.  
           [0039]    The printed wiring board  150  has a hole  155   a  filled with a dielectric in that area of the first conductor layer  155  which faces the pad  151 . Consequently, the impedance of the pad  151  equals the impedance between the pad  151  and second conductor layer  156 .  
           [0040]    In the printed wiring board  150  shown in FIG. 7, the provision of the hole  155   a  increases the thickness of the dielectric between the pad  151  and conductor layer. Consequently, the impedance of the pad  151  is set to the same standard value as the wire  152 .  
           [0041]    Methods of setting impedance in single-ended mode have been described so far. Next, methods of setting impedance in differential mode will be described.  
           [0042]    First, description will be given of a method of setting wiring impedance in differential mode.  
           [0043]    [0043]FIG. 8 is an explanatory diagram illustrating a method of setting impedance of differential mode wiring formed on the top surface of a printed wiring board.  
           [0044]    In wiring along which signals are transmitted in differential mode (hereinafter such signals are referred to as differential signals), the impedance between the two wires along which the differential signals travel is set to a predetermined standard value (e.g., 100 Ω).  
           [0045]    A printed wiring board  160  shown in FIG. 8 has the same configuration as the printed wiring board  120  shown in FIG. 3. However, the signals traveling along two wires  161   a  and  161   b  are differential signals such as those described above.  
           [0046]    In the printed wiring board  160 , the impedance Z between the two wires  161   a  and  161   b  is the sum (Z 1 +Z 2 ) of mainly the impedance Z 1  between the wire  161   a  and a conductor layer  162  plus the impedance Z 2  between the other wire  161   b  and the conductor layer  162 . Both impedances Z 1  and Z 2  decrease as wire width W increases and increase as the thickness T of a dielectric  163  sandwiched between the conductor layer  162  and the wires increases. The width W of the two wires  161   a  and  161   b  depends on the travel distance of the signals traveling through them, i.e., on the length of the wires. Thus, in the printed wiring board  160 , by setting the thickness T of the dielectric  163  sandwiched between the conductor layer  162  and the wires to an appropriate value, it is possible to set the impedance Z between the two wires  161   a  and  161   b  to a predetermined standard value.  
           [0047]    [0047]FIG. 9 is an explanatory diagram illustrating a method of setting impedance of differential mode wiring formed in a printed wiring board.  
           [0048]    The configuration of a printed wiring board  170  shown in FIG. 9 is similar in most respects to that of the printed wiring board  130  shown in FIG. 4, and thus description thereof will be omitted. However, two wires  171   a  and  171   b  formed in the printed wiring board exist in the same plane within a dielectric  174  and the signals traveling along the two wires  171   a  and  171   b  are differential signals.  
           [0049]    In the printed wiring board  170  shown in FIG. 9, as is the case with printed wiring board  160  shown in FIG. 8, the width W of the two wires  171   a  and  171   b  depends again on their length. Thus, by setting the interval T 1  between the wire  171   a / 171   b  and first conductor layer  172  as well as the interval T 2  between the wire  171   a / 171   b  and second conductor layer  173  to appropriate values, it is possible to set the impedance between the two wires  171   a  and  171   b  to a predetermined standard value.  
           [0050]    Next, description will be given of a method of setting pad impedance in differential mode.  
           [0051]    Regarding two pads through which differential signals pass, as described with reference to FIG. 7, it is conceivable to set the impedance between the pads to a predetermined standard value by providing a hole, such as the one shown in Japanese Patent Laid-Open No. 5-29772 mentioned above, in the conductor layer nearest to the pads in the printed wiring board.  
           [0052]    [0052]FIG. 10 shows part of a printed wiring board on whose top surface multiple pads are formed with multiple wires extending from them, where Part (a) is a partial plan view and Part (b) is a partial sectional view.  
           [0053]    Part (a) of FIG. 10 shows two pads  181   a  and  181   b  through which differential signals pass; two wires  182   a  and  182   b  extending from the two pads.  181   a  and  181   b ; ordinary pads other than the pads  181   a  and  181   b  through which differential signals pass, such as pads  183   a  and  183   b  connected with power terminals of a circuit element; and two wires  184   a  and  184   b  extending from the two pads  183   a  and  183   b.    
           [0054]    Part (b) of FIG. 10 shows two conductor layers  185  and  186  which are spaced from each other and embedded in a dielectric  187 ; the pads  181   a ,  181   b ,  183   a , and  183   b  formed on the top surface  180   a  of the printed wiring board  180 ; the two wires  182   a  and  182   b  extending from the two pads  181   a  and  181   b  through which differential signals pass; and two internal wires  188   a  and  188   b  formed between the two conductor layers  185  and  186  and facing them. Differential signals travel along the two internal wires  188   a  and  188   b  as is the case with the two wires  182   a  and  182   b.    
           [0055]    To indicate clearly that the two wires  182   a  and  182   b  shown in Part (b) of FIG. 10 extend from the two pads  181   a  and  181   b  through which differential signals pass, Part (a) of FIG. 10 schematically shows the wiring route of the wires  182   a  and  182   b , in particular, from the two pads  181   a  and  181   b . Regarding the other two wires  184   a  and  184   b , which are irrelevant here, wiring routes are omitted in the figure.  
           [0056]    Here, the interval TD 1  from the top surface  180   a  to the first conductor layer  185  is set in such a way as to make the impedance between the two wires  182   a  and  182   b  equal to a predetermined standard value (e.g., 100 Ω). Similarly, the interval TD 2  between the two conductor layers  185  and  186  is set in such a way as to make the impedance between the two internal wires  188   a  and  188   b  equal to the same standard value. Furthermore, the width Wp of the pads has been set to a value commensurate with the terminal width and spacing of the circuit element connected to the pads.  
           [0057]    The first conductor layer  185  has two holes  185   a  and  185   b  in those areas which face the two pads  181   a  and  181   b , respectively, through which differential signals pass.  
           [0058]    In the printed wiring board  180  shown in FIG. 10, as in the case of the printed wiring board described with reference to FIG. 7, the holes are provided to make the impedance between the pad  181   a  and second conductor layer  186  equal to the impedance between the wire  182   a  and first conductor layer  185 . This is also true of the pad  181   b.    
           [0059]    However, with the printed wiring board  180  shown in FIG. 10, the impedance between the two pads  181   a  and  181   b  is lower than the impedance between the two wires  182   a  and  182   b . Thus, the problem is that it is difficult to set the impedance between the two pads  181   a  and  181   b  to the same standard value as the impedance between the two wires  182   a  and  182   b.    
           [0060]    This problem arises not only when differential signals are transmitted through a pad group consisting of two pads, but also when signals are transmitted through a pad group consisting of three or more pads.  
         SUMMARY OF THE INVENTION  
         [0061]    In view of the above circumstances, the present invention has an object to provide a printed wiring board where the impedance between pads which compose a pad group and through which signals pass has been set to a predetermined standard value.  
           [0062]    To achieve the above object, the present invention provides a first printed wiring board in which at least two conductor layers spaced from each other in the thickness direction and parallel to the top surface are embedded in a dielectric and a plurality of pads are formed on the top surface with a plurality of wires extending from the pads, wherein:  
           [0063]    a first conductor layer closest to the top surface out of the at least two conductor layers extends over an area excluding a hole formed for each pad group and filled with a dielectric, the hole encompasses a plurality of areas facing predetermined respective pads which are adjacent to each other and which form the pad group from among the plurality of pads; and  
           [0064]    a second conductor layer more distant from the surface out of the conductor layers extends over an area containing areas facing the hole.  
           [0065]    In the first printed wiring board according to the present invention, the first conductor layer has one hole each for each pad group.  
           [0066]    The reasons for the prior art problem described above, namely, the problem that the impedance between the two pads  181   a  and  181   b  through which differential signals pass does not take the same standard value as the impedance between the two wires  182   a  and  182   b  extending from the pads in the printed wiring board  180  shown in FIG. 10 include the following. Specifically, in the printed wiring board  180  shown in FIG. 10, the first conductor layer  185  has a remaining section  185   c  between the two holes  185   a  and  185   b . In the printed wiring board  180 , since the impedance between the two pads  181   a  and  181   b  is affected by the remaining section  185   c , the impedance between the pads does not take the same standard value as the impedance between the two wires  182   a  and  182   b.    
           [0067]    The first printed wiring board of the present invention has only one hole for each pad group unlike the printed wiring board  180  shown in FIG. 10. Consequently, the part which corresponds to the remaining section  185   c  in the printed wiring board  180  shown in FIG. 10 is included in this single hole. Thus, in the first printed wiring board of the present invention, the impedance between the pads composing a pad group can be set to the same standard value as the impedance between the wires extending from the pads.  
           [0068]    The first printed wiring board according to the present invention may comprise an internal wire which is laid in an area excluding the area facing the hole and extends parallel to the top surface between the first conductor layer and the second conductor layer.  
           [0069]    When the first printed wiring board of the present invention has the internal wire, since the internal wire extends over an area excluding the area facing the hole, it is possible to make effective use of the interior of the printed wiring board while preventing the internal wire from affecting the impedance between the pads composing each pad group.  
           [0070]    To achieve the above object, the present invention also provides a second printed wiring board in which a conductor layer parallel to the top surface is embedded in a dielectric and on which a plurality of pads are arranged with a plurality of wires extending from the pads, wherein the conductor layer includes only one area provided for each pad group and displaced in the thickness direction, the one area encompasses a plurality of areas facing predetermined respective pads which are adjacent to each other and which form the pad group from among the plurality of pads.  
           [0071]    The second printed wiring board according to the present invention, even if it has only one conductor layer in the dielectric, allows the impedance between the pads to be set to a predetermined standard value by setting the size of the area which encompasses the areas facing the respective pads composing each pad group in the conductor layer as well as by setting the displacement of this area in the thickness direction with respect to other areas to appropriate values.  
           [0072]    As described above, according to the first and second printed wiring boards of the present invention, the impedance of multiple pads composing a pad group through which signals pass is set to a predetermined standard value. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0073]    [0073]FIG. 1 is a diagram conceptually showing a network which sends and receives signals by high-speed serial transmission;  
         [0074]    [0074]FIG. 2 is a diagram showing a PCI (Peripheral Component Interconnect) card, which is an example of HCAs;  
         [0075]    [0075]FIG. 3 is a diagram illustrating a method of setting impedance of single-ended mode wiring formed on the top surface of a printed wiring board;  
         [0076]    [0076]FIG. 4 is a diagram illustrating a method of setting impedance of single-ended mode wiring formed in a printed wiring board;  
         [0077]    [0077]FIG. 5 is a diagram showing an example of a circuit element;  
         [0078]    [0078]FIG. 6 is a partial sectional view showing part of a printed wiring board on which the circuit element is mounted;  
         [0079]    [0079]FIG. 7 shows part of a printed wiring board disclosed in Japanese Patent Laid-Open No. 5-29772, where Part (a) is a partial plan view and Part (b) is a partial sectional view;  
         [0080]    [0080]FIG. 8 is an explanatory diagram illustrating a method of setting impedance of differential mode wiring formed on the top surface of a printed wiring board;  
         [0081]    [0081]FIG. 9 is an explanatory diagram illustrating a method of setting impedance of differential mode wiring formed in a printed wiring board;  
         [0082]    [0082]FIG. 10 shows part of a printed wiring board on whose top surface multiple pads are formed with multiple wires extending from them, where Part (a) is a partial plan view and Part (b) is a partial sectional view;  
         [0083]    [0083]FIG. 11 shows an embodiment of a first printed wiring board according to the present invention, where Part (a) is a partial plan view and Part (b) is a partial sectional view;  
         [0084]    [0084]FIG. 12 is a diagram showing the impedance between two pads through which differential signals pass vs. the width of a hole in a first conductor layer in the printed wiring board shown in FIG. 11;  
         [0085]    [0085]FIG. 13 is a partial sectional view showing an internal wiring area in the first printed wiring board of the present invention; and  
         [0086]    [0086]FIG. 14 shows an embodiment of a second printed wiring board according to the present invention, where Part (a) is a partial plan view and Part (b) is a partial sectional view. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0087]    Embodiments of the present invention will be described below.  
         [0088]    [0088]FIG. 11 shows an embodiment of a first printed wiring board according to the present invention, where Part (a) is a partial plan view and Part (b) is a partial sectional view.  
         [0089]    The printed wiring board  190  shown in FIG. 11 has the same configuration as the printed wiring board  180  shown in FIG. 10 except for a first conductor layer  195  shown in Part (b) of FIG. 11, and thus only the difference, i.e., the first conductor layer  195  shown in Part (b) of FIG. 11, will be described, omitting redundant description.  
         [0090]    The first conductor layer  195  of the printed wiring board  190  shown in FIG. 11 extends over an area excluding a hole  195   a  formed for each pad group and filled with a dielectric  197 . The hole  195   a  contains two areas facing two respective pads  191   a  and  191   b  composing a pad group.  
         [0091]    The impedance between the two pads  191   a  and  191   b  is the sum Z 1  of mainly the impedance between the pad  191   a  and a second conductor layer  196  plus the impedance between the pad  191   b  and second conductor layer  196 . In the printed wiring board  190 , since the dielectric  197  has a part sandwiched between the two pads ( 191   a  and  191   b ) and first conductor layer  195  thicker than a part sandwiched between two wires ( 192   a  and  192   b ) whose inter-wire impedance has been set to a predetermined standard value and the first conductor layer  195 , the impedance Z 1  has been set to the predetermined standard value.  
         [0092]    Furthermore, the printed wiring board  190  allows the impedance between the two pads  191   a  and  191   b  to be set accurately to the standard value by adjusting the width Wh of the hole  195   a  in the first conductor layer  195  during design.  
         [0093]    [0093]FIG. 12 shows the impedance between the two pads through which differential signals pass vs. the width of the hole in the first conductor layer in the printed wiring board according to the present embodiment.  
         [0094]    Part (a) of FIG. 12 shows a case in which the width Wh of the hole  195   a  in the first conductor layer  195  is set equal to the interval between an end  191   al  of the pad  191   a  and an end  191   br  of the pad  191   b  while Part (b) of FIG. 12 shows a case in which the width Wh of the hole  195   a  in the first conductor layer  195  is set slightly narrower than the interval between the end  191   al  of the pad  191   a  and the end  191   br  of the pad  191   b.    
         [0095]    In both Part (a) and Part (b) of FIG. 12, the impedance between the two pads  191   a  and  191   b  is the sum Z 1  of mainly the impedance between the pad  191   a  and second conductor layer  196  plus the impedance between the pad  191   b  and second conductor layer  196 . However, in Part (b) of FIG. 12, the two pads  191   a  and  191   b  partially overlap with the first conductor layer  195 . The impedance between the two pads  191   a  and  191   b  decreases with increases in the overlapping range Ov and increases with decreases in the overlapping range Ov.  
         [0096]    Also, the first printed wiring board of the present invention has internal wiring in an area excluding the area facing the hole in the first conductor layer.  
         [0097]    [0097]FIG. 13 is a partial sectional view showing internal wiring in the printed wiring board according to the present embodiment.  
         [0098]    [0098]FIG. 13 schematically shows the printed wiring board  190  in which internal wires  191  are formed between the first conductor layer  195  and second conductor layer  196  in an area  196   b  excluding the area  199 a facing the hole  195   a.    
         [0099]    [0099]FIG. 14 shows an embodiment of a second printed wiring board according to the present invention, where Part (a) is a partial plan view and Part (b) is a partial sectional view.  
         [0100]    The printed wiring board  400  shown in FIG. 14 has the same configuration as the printed wiring board  190  shown in FIG. 11 except for the configuration of a conductor layer  205  shown in Part (b) of FIG. 14 and except that a second conductor layer is formed on the bottom surface of a dielectric substrate in the printed wiring board  400 . Thus, only the differences will be described, omitting redundant description of the same components as the printed wiring board  190  shown in FIG. 11.  
         [0101]    In the first conductor layer  205  shown in Part (b) of FIG. 14, an area  205   a  which extends over two areas facing the two respective pads  201   a  and  201   b  through which differential signals pass is displaced in the thickness direction with respect to the other area.  
         [0102]    In the printed wiring board  400 , the second conductor layer  206  is formed on the bottom surface of the dielectric substrate, playing the role of shielding internal wiring and adjusting its impedance. Provision of a hole in the first conductor layer, as is the case with Part (b) of FIG. 11, makes the thickness of the dielectric between the pads and the second conductor layer too large. Thus, the impedance of the pads is adjusted by displacing the area  205   a  that corresponds to the hole in the first conductor layer in Part (b) of FIG. 11 in the thickness direction. Specifically, the printed wiring board  200  shown in FIG. 14 allows the impedance between the two pads  201   a  and  201   b  to be set to a predetermined standard value by adjusting the interval L between the two pads ( 201   a  and  201   b ) and the first conductor layer  205  as well as the width We of the area  205   a  during design.  
         [0103]    Incidentally, in the embodiments described above, one pad group is composed of two pads, but one pad group may be composed of three or more pads.