Abstract:
Apparatus and methods for providing integrated RF notch filter subsystems having enhanced Q values are described. An integrated notch filter includes an LC filter element and a Q-enhancement circuit coupled to the LC filter element, with the Q-enhancement circuit configured to offset resistive losses in the LC filter element to adjust the Q value of the filter system. A transceiver having multiple LNAs for various bands may be provided to a single notch filter system including a Q-enhancement circuit.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application claims priority under 35 U.S.C. §119(e) to U.S. Provisional Patent Application Ser. No. 61/077,437, entitled INTEGRATED RF NOTCH FILTERS, filed on Jul. 1, 2008. This application is also related to U.S. Utility patent application Ser. No. 11/111,680, now U.S. Pat. No. 7,522,017, entitled HIGH-Q INTEGRATED FILTERS. The content of each of these applications is hereby incorporated by reference herein in its entirety for all purposes. 
    
    
     FIELD OF THE INVENTION 
     The present invention relates generally to high-Q integrated filters for operation at RF frequencies and their associated tuning. More specifically but not exclusively, the present invention relates to shunt-type notch filters having coupled negative conductance elements. 
     BACKGROUND 
     Filters find widespread use in radio transceivers, as shown in  FIG. 1 . Filters such as those shown in  FIG. 1  are used to limit noise while attenuating potentially interfering signals as well as spurious signals. Most communication systems require RF filters with sharp frequency responses (i.e., notches) that make monolithic integration difficult. As a result, RF filters typically use bulky technologies, such as surface acoustic wave (SAW) or ceramic resonators. It would therefore be desirable to find methods and apparatus to provide more flexible and more readily integratable RF filters, as well as provide other advantages. 
     SUMMARY 
     The present invention is directed generally to filter enhancements. In various embodiments, a pair of LC filters and a Q-enhancement circuit are described, which can be integrated to overcome problems associated with conventional filters as well as provide other advantages. The LC filters provide a sharp frequency notch, while the Q-enhancement circuit creates a negative conductance/resistance to improve the quality factor (Q) of the illustrated LC resonator, as well as other LC or other tuned resonators. 
     Because the filters and Q-enhancement circuit can be integrated in various embodiments, they are suitable for use in a variety of radio transceiver applications where conventional circuits may be too bulky or expensive. 
     More particularly, in one aspect, the present invention is directed to a filter system comprising a resonate shunt-type LC notch filter and a Q-enhancement circuit coupled to the resonate shunt-type LC notch filter, with the Q-enhancement circuit configured to generate a negative resistance so as to at least partially offset a resistance in the notch filter. 
     In another aspect, the present invention is directed to a filter system for use with a multi-band transceiver, the filter system comprising a plurality of switchable LNA inputs disposed to receive input signals from two or more LNA stages such that one LNA stage of the plurality of LNA stages is active at a particular time, an inductive load element, a capacitive element coupled to the inductive load element, a resonate shunt-type LC notch filter coupled to the capacitive element and load element and a Q-enhancement circuit coupled to the resonate shunt-type LC notch filter, wherein the resonate shunt-type LC notch filter is further coupled to ones of the plurality of LNAs responsive to selection of one of the switchable LNA inputs. 
     In yet another aspect, the present invention is directed to a method of filtering a received signal in a transceiver, comprising providing a received signal to a notch filter system in the transceiver and filtering the received signal in the notch filter system, wherein the notch filter system includes an LC shunt circuit and a Q-enhancement circuit coupled to the LC shunt circuit, and wherein the Q-enhancement circuit generates a negative resistance to at least partially offset a resistance in the LC shunt circuit so as to enhance the Q of the notch filter system. 
     Additional aspects of the present invention are described below in conjunction with the appended drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The foregoing aspects and the attendant advantages of the described embodiments will become more readily apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings wherein: 
         FIG. 1  is a diagram of a full duplex radio transceiver and the transmit leakage signal; 
         FIG. 2   a  is a diagram of an LNA and shunt-type LC notch filter without compensation; 
         FIG. 2   b  is a diagram of an embodiment of a shunt-type LC filter with Q-enhancement, in accordance with aspects of the present invention; 
         FIG. 3  shows the frequency response of a shunt-type LC notch filter; 
         FIG. 4  illustrates the effect of negative conductance (provided by the Q-enhancement circuit) on the shunt-type LC notch filter, in accordance with aspects of the present invention; 
         FIG. 5  shows an embodiment of a differential LNA and shunt-type LC notch filter; 
         FIG. 6  shows an embodiment of a Q-enhancement circuit used to improve the performance of the shunt-type LC notch filter, in accordance with aspects of the present invention; 
         FIG. 7  shows an embodiment of an alternative Q-enhancement circuit used to improve the performance of the shunt-type LC notch filter, in accordance with aspects of the present invention; 
         FIG. 8   a  is a plot of negative conductance sensitivity as a function of input signal level; 
         FIG. 8   b  is a plot of negative conductance sensitivity as a function of temperature; 
         FIG. 9  is an embodiment of a circuit to realize a tunable resistor, in accordance with aspects of the present invention; 
         FIG. 10  is an embodiment of an alternate circuit to realize a tunable resistor, in accordance with aspects of the present invention; 
         FIG. 11  is a diagram of an embodiment of a multi-band front-end circuit with multiple LNAs feeding a single shunt-type LC notch filter, in accordance with aspects of the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     In many communication systems an RF downcoverter, such as may be used in a transceiver, must be configured to accept a broad range of signals. In full duplex systems, the strongest of these is potentially the transmit leakage signal. This signal can easily overdrive the downconverting mixer and produce debilitating distortion. To prevent this, the RF downconverter generally includes a SAW filter after the LNA and before the mixer, as shown in circuit  100  of  FIG. 1 . 
     It is possible to attenuate the transmit leakage signal using a simple notch filter.  FIG. 2   a  shows an embodiment of a shunt-type notch filter  200   a  that connects to the LNA output load. Ideally, the notch filter presents an impedance transfer function with a zero at the transmit frequency f Tx  and a pole at the receive frequency f Rx . 
     The shunt-type notch filter consists of a parallel LC circuit and an impedance-transforming coupling capacitor C 3 . An imaginary resistor R 2  models the losses associated with the network. In practice, these losses degrade the filter&#39;s quality factor (Q) and the notch attenuation. The resulting parallel RLC combination presents an admittance Y 2  given by
 
 Y   2 =1 sL   2   +sC   2 +1 /R   2   (1)
 
     Adding a negative conductance −G m  to compensate the loss modeled by resistor R 2 , as shown in the embodiment  200   b  of  FIG. 2   b , can be used to enhance the filter system&#39;s Q value and correspondingly improve the notch&#39;s attenuation. The notch filter in turn presents an impedance Z f  in shunt with the LNA load described by
 
 Z   f =1/( Y   2   −G   m )+1 /sC   3   (2)
 
     Substituting (1) into (2) yields 
                     Z   f     =       1       1   /     sL   2       +     sC   2     +     1   /     R   2       -     G   m         +     1     sC   3                 (   3   )               
which simplifies to
 
                     Z   f     =     β   ⁢         s   2     +     sG   /     (       C   2     +     C   3       )       +     1   /       L   2     ⁡     (       C   2     +     C   3       )             s   ⁡     (       s   2     +     sG   /     C   2       +       1   /     L   2       ⁢     C   2         )                   (   4   )               
where G=1/R 2 −G m  and β=(C 2 +C 3 )/C 2 C 3 .
 
     Mapping the denominator and numerator to the general second order expression s 2 +2ζω n s+ω n   2  reveals the pole/zero locations as
 
ω z =√{square root over (1 /L   2 ( C   2   +C   3 ))}ω p =√{square root over (1 /L   2   C   2 )}  (5)
 
Note that ω z &lt;ω 4  and this matches the relative positive of f Tx  and f Rx . In practice, capacitor C 3  should be kept small to position ω z  close to ω p .
 
     By design, the shunt network typically affects the load impedance of the LNA. At the zero frequency ω z , the notch filter shorts out the load and attenuates the transmit leakage signal. In contrast, the notch filter has little or no effect on the LNA load and the receive signal at the pole frequency ω 4 . As a result, the shunt structure minimizes insertion loss and added noise. 
       FIG. 3  shows the frequency response of the LNA load and notch filter system. The value of capacitor C 2  is adjusted first to position the zero and notch the transmit signal. Then, the value of capacitor C 1  is trimmed to resonate the combined load at the receive frequency. In practice, it is fairly straightforward to adjust these capacitors and tune the notch frequency over a wide bandwidth. 
     As designed, the filter system&#39;s zero creates a notch in the response that attenuates the signal energy at the transmit frequency. The filter also adds a small capacitance to the LNA&#39;s output and shifts the load&#39;s resonance downward. Lastly, the shunt structure of the filter advantageously introduces less than 1 dB insertion loss. 
     The depth of the notch and the Q of the filter depend on the negative conductance (reciprocal resistance) −G m  added to the parallel LC combination (and lossy element R 2 ) in the filter system. In practice, the response of the notch filter peaks when the negative conductance value −G m  exactly cancels the loss modeled by imaginary resistor R 2  with
 
−1 /G   m   =R   2   (6)
 
       FIG. 4  illustrates this relationship. Note that even with the −G m  value set 25% low, the attenuation approaches 15 dB. 
     The single-ended shunt-type notch filter embodiment  200   b  as shown in  FIG. 2   b  can be modified to operate in differential designs as well.  FIG. 5  illustrates an embodiment  500  of a differential structure using only two inductors and a negative conductance element (−G m ) to enhance Q (Inductor L 1  is a center-tapped differential structure). 
     The Q-enhancement circuit that connects across the parallel LC network senses the applied voltage and develops a current opposite to this voltage. The negative conductance −G m  equals 
                     G   m     =       rms   ⁢     {       i   out     ⁡     (   t   )       }         rms   ⁢     {       v   in     ⁡     (   t   )       }                 (   7   )               
where rms { } represents the root-mean-squared or effective value of the argument. By definition, the root-mean-squared value equals
 
     
       
         
           
             
               
                 
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     In practice, the amplified transmit leakage signal drives the Q-enhancement circuit towards large-signal operation. 
     One embodiment of a Q-enhancement circuit is the differential pair circuit  600  shown in  FIG. 6 . Capacitors C 4  couple the signal to the input transistors and allow independent biasing of the devices. These capacitors also form a capacitor divider with the gate-source capacitance of the MOS transistors that attenuates the input signal according to 
                   α   =         v   in       v   diff       ≈       C   4         C   4     +     C   gs                   (   9   )               
assuming an ac ground at the source-coupled node V s . As such, the drain current for each device comprising the differential pair adheres to the square-law relationship where
 
 i   D5   =K   1 (α v   in   +V   bias − s   −V   s   −V   T )
 
 i   D6   =K   2 (−α v   in   +V   bias   −V   s   −V   T ) 2   (10)
 
with the intrinsic gain K representing ½ μC ox (W/L). It follows then that the output current becomes simply
 
Δ i   out   =i   D6   −i   D5   (11)
 
where the cross-coupling of the output realizes the negative conductance. It&#39;s important to note that the transconductance of the differential pair varies with the bias current I bias  and allows a straightforward means to adjust the −G m  value (and the notch attenuation).
 
     Unfortunately, the square-law behavior of the MOS devices makes the −G m  value potentially sensitive to the amplitude of the input signal v in  and consequently the transmit signal leakage level. In practice, the −G m  value of the simple differential pair increases as the input signal level decreases. Furthermore, the −G m  value falls at high temperatures due to the lower intrinsic gain of MOS transistors. This makes the −G m  value sensitive to both the transmit power level and temperature. 
     Adding a resistor R 3  to the differential pair as shown in circuit  700  of  FIG. 7  reduces the variation in the circuit&#39;s transconductance. It accomplishes this by introducing local feedback that linearizes the MOSFET square-law response. In this implementation, the −G m  value stays relatively constant as the amplitude of the input signal v in  changes or the operating temperature changes as shown in  FIG. 8 . Tuning becomes a little more challenging as the value of resistor R 3  must now be adjusted. 
     To adjust the resistor value, a simple switched approach or a variable MOSFET resistor may be used.  FIG. 9  shows an embodiment  900  of the switched-resistor approach. The maximum value possible equals the value of resistor R 30  and occurs with all the switches S 1 −S n  open. When switch S 1  closes, the effective resistance drops to 
                     R   3     =         R   30     ⁢     R   31           R   30     +     R   31                 (   12   )               
where R 31 &gt;&gt;R 30  to realize a small step. The large value of shunt resistor R 31  conveniently reduces the effect of the switch resistance. Moreover, the low signal current flowing through this branch should also minimize any distortion due to the switch. Adding other switched-resistors extends the tuning range.
 
       FIG. 10  illustrates an embodiment  1000  of a variable MOSFET resistor. It uses a replica device (transistor N 10 ) and feedback circuit to adjust the resistance of the MOSFET device N 9 . By design, the operational amplifier drives the voltage drop across transistor N 10  to equal
 
 I   b1   R   10   =V   DS10   =I   b2   r   ds10   (13)
 
where r ds10  represents the channel resistance of transistor N 10 . It follows that
 
                     r     ds   ⁢           ⁢   10       =         I     b   ⁢           ⁢   1         I     b   ⁢           ⁢   2         ⁢     R   10               (   14   )               
which allows the variable resistor N 10  to be controlled by adjusting currents I b1  and I b2 . The operational amplifier also drives transistor N 9  and ensures its resistance tracks that of transistor N 10 . The reference voltage V ref  matches the nominal voltage seen at the source terminals of the differential pair N 9 -N 10  with
 
 V   ref   =V   s   =V   bias   −V   T −√{square root over ( I   bias 2 K )}  (15)
 
The resistance seen by the Q-enhancement differential pair then equals the parallel combination of the variable MOSFET resistance due to transistor N 9  and resistor R 30 .
 
     Other Q-enhancement circuits are possible and envisioned within the scope of the present invention. These two examples represent only a few possible structures that are provided for purposes of illustration, not limitation. In addition, other tuned or resonator circuits, in addition to those LC circuits illustrated herein, may alternately be combined with a Q-enhancement circuit in various embodiments of the present invention so as to increase the Q value and enhance the filter notch characteristics. 
     The notch filter protects the receiver from strong transmit signals that leak around the duplex filter used to simultaneously connect the transmitter and receiver to the antenna. As such, in typically embodiments, it may only be needed at high transmit power levels. Therefore, in some embodiments, a filter system including the LC resonator and Q-enhancement circuit may further include switching elements configured to receive a transmit power level signal or other switching signal and selectively switch, in response to the transmit power level, the Q-enhancement circuit into or out of the filter system. 
     For example, to bypass the notch filter at low to medium transmit power levels, the zero frequency ω z  may be shifted away and the Q-enhancement circuit may be disabled. The low insertion loss of the shunt filter ensures the LNA gain changes only slightly. This approach may be used to simplify the AGC system, save current, and/or extend battery life. 
     Most receivers typically use a SAW filter to attenuate the transmit leakage signal. Unfortunately, SAW filters complicate the radio receiver. These SAW devices are off-chip devices and as such add design complexity, require matching networks, occupy valuable PCB area, and operate only in specific bands. As such, they multiply as the number of radio bands increase. 
     In general, multi-band receivers rely on multiple low-noise amplifiers to interface to the front-end and antenna. Each LNA includes an inductive load and this consumes die area. Moreover, integrating a notch filter for each band compounds this problem. 
     An alternative approach in accordance with aspects of the present invention provides multi-band coverage using only two inductors as shown in embodiment  1100  of  FIG. 11 . Multiple LNA stages—with differential current outputs—feed a single network that includes the inductive load and notch filter (the figure shows three LNA stages for illustration purposes, however, it is noted that other numbers and configurations of stages are within the spirit and scope of the present invention). The unused LNA stages are switched off using the input bias voltage source (V b  in  FIG. 5 ) and the cascode devices. This adds some capacitance to the network which can be resonated out by the load inductor. Coarse-tuning capacitor structures allow a wide tuning range for the LNA load and notch filter. In addition, the Q-enhancement circuit compensates any filter losses. 
     The shunt-type filter structure illustrated in the embodiments described previously may be used to provide a very high-Q notch response with minimal insertion loss. It uses an active −G m  circuit to compensate for LC losses that otherwise degrade filter Q and lessen notch attenuation. The filter may be tuned easily by sliding capacitors C 1  and C 2 . Moreover, the shunt structure minimizes effects on interstage matching. Lastly, the notch filter easily extends to multi-band applications. 
     The shunt-type notch filter provides an alternate approach to attenuate the transmit leakage signal and thus eliminate the need for a SAW filter in many communications applications. In some embodiments, the present invention may be implemented as a notch filter subsystem of a communications device such as a transceiver. In addition, the functionality described herein may be integrated, in whole or in part, into an integrated monolithic device such as a communications chip (integrated circuit) along with other transceiver components and/or subsystems. 
     The foregoing description, for purposes of explanation, used specific nomenclature to provide a thorough understanding of the invention. However, it will be apparent to one skilled in the art that specific details are not required in order to practice the invention. Thus, the foregoing descriptions of specific embodiments of the invention are presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed; obviously, many modifications and variations are possible in view of the above teachings. The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications. They thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. It is intended that the following claims and their equivalents define the scope of the invention.