Abstract:
A method for measuring output current of a charge pump, the method including providing a charge pump including a plurality of n charge pump stages, wherein an output of stage n−1 (Vo n-1 ) is output to stage n, an output voltage of stage n being referred to as charge pump voltage output Vout, connecting an additional output pass device to the output of stage n−1, an output voltage of the additional output pass device being referred to as Voutm, forcing Voutm to be at least approximately equal to Vout, drawing at least one of output voltage (Voutm) and output current (Ioutm) from the additional output pass device, measuring Ioutm (e.g., comparing Ioutm with a reference current), and correlating Iout with Ioutm.

Description:
FIELD OF THE INVENTION  
       [0001]     The present invention relates generally to charge pumps for boosting voltages in microelectronic circuitry, and particularly to a method for measuring the output current of the charge pump.  
       BACKGROUND OF THE INVENTION  
       [0002]     Non-volatile memory arrays, such as erasable, programmable read only memory (EPROM) or flash memory arrays, or electrically erasable, programmable read only memory (EEPROM) arrays, require high positive or negative voltages to program and erase memory cells of the array. Typically, these voltages are higher than the voltage supplied (Vdd). Charge pumps are generally used to boost on-chip voltages above the supply voltage Vdd to reach the voltages required for programming or erasing.  
         [0003]     A charge pump typically comprises cascaded stages that progressively boost the voltage to higher levels. The charge pump functions by progressively storing more charge on a capacitor which is part of a capacitor-diode combination, with several such stages being placed together in a network to obtain the desired increase in voltage. The diode functions to prevent discharge of the capacitor prior to placing the additional charge thereon.  
         [0004]     Many applications require measuring the output current of the charge pump, for example, for measuring the program or erase current for flash cell applications. In the prior art, measuring the output current of the charge pump is typically accomplished by sensing or measuring internal signals of the charge pump. For example, for an on/off charge pump, the internal signal “oscillator_on” include reference information about the charge pump load—the ratio of the actual output current to the maximum output current (Iout/Iout_max). For a supply charge pump, the internal signal “supply clamp” may provide that reference information.  
         [0005]     However, using these internal signals has disadvantages. The charge pump maximal output current Iout_max is a function of several parameters, such as but not limited to, Vdd, temperature and corner technology process. Since the ratio of the actual output current to the maximum output current is dependent upon these parameters, it is not possible to measure the absolute value of the output current (Iout).  
         [0006]     Other methods have been used in the art to measure the output current, but they have disadvantages, such as requiring significant circuit board area and/or having relatively high power dissipation.  
       SUMMARY OF THE INVENTION  
       [0007]     The present invention provides a novel method for measuring the output current of a charge pump or charge pump stage, as is described more in detail hereinbelow. In the present invention, an additional output stage may be connected to the existing charge pump output stage. The additional output stage may use the same phase signals as the existing charge pump output stage. The additional output stage can be scaled down to minimize size. The included stage output current may be measured by comparing with a reference current. If the output voltages of the additional and existing output stages are equal, then the ratio of their currents is equal to their size ratio.  
         [0008]     In accordance with a non-limiting embodiment of the invention, instead of adding an entire additional output stage, an additional output pass device (transistor or diode) of stage #n can be added, which connects the previous stage output (Vo n-1 ) to the charge pump output (Vout). The transistor/diode may be scaled down to a minimal size to reduce power dissipation and/or board size.  
         [0009]     The simple circuitry implementation of the present invention may significantly reduce the chip/board area needed for the circuitry, as well as significantly reducing power dissipation. The invention is fast, accurate and insensitive to charge pump architecture and regulation.  
         [0010]     There is thus provided in accordance with an embodiment of the present invention a method for measuring output current of a charge pump, the method including providing a charge pump including a plurality of n charge pump stages, wherein an output of stage n−1 (Vo n-1 ) is output to stage n, an output voltage of stage n being referred to as charge pump voltage output Vout, connecting an additional output pass device to the output of stage n−1, an output voltage of the additional output pass device being referred to as Voutm, forcing Voutm to be at least approximately equal to Vout, drawing at least one of output voltage (Voutm) and output current (Ioutm) from the additional output pass device, measuring Ioutm (e.g., comparing Ioutm with a reference current), and correlating Iout with Ioutm.  
         [0011]     In accordance with an embodiment of the present invention if output voltages of the additional output pass device and the charge pump stage n are equal, then a current ratio (Ioutm/Iout) is equal to a ratio of sizes of the additional output pass device and the charge pump stage n.  
         [0012]     Further in accordance with an embodiment of the present invention the additional output pass device may include an additional output stage. The additional output stage may use identical phase signals as stage n. The additional output pass device may be scaled down to minimize its size.  
         [0013]     In accordance with an embodiment of the present invention the additional output pass device may include a p-n diode; a n-p diode; an NMOS transistor, whose source is connected to the output of stage n−1 and whose drain is connected to an input of stage n, and whose gate and source are connected to one another; a PMOS transistor, whose drain is connected to the output of stage n−1 and whose source is connected to an input of stage n, and whose gate and drain are connected to one another; an NMOS transistor, whose source is connected to the output of stage n−1 and whose drain is connected to an input of stage n, and whose gate is connected to a control voltage; or alternatively, a PMOS transistor, whose drain is connected to the output of stage n−1 and whose source is connected to an input of stage n, and whose gate is connected to a control voltage.  
         [0014]     Further in accordance with an embodiment of the present invention comparing Ioutm with the reference current may include inputting the charge pump output Vout and the additional output device output Voutm into a current mirror, and measuring and comparing currents flowing through sides of the current mirror.  
         [0015]     There is also provided in accordance with an embodiment of the present invention circuit architecture for measuring output current of a charge pump, including a charge pump including a plurality of n charge pump stages, wherein an output of stage n−1 (Vo n-1 ) is output to stage n, an output voltage of stage n being referred to as charge pump voltage output Vout, an additional output pass device connected to the output of stage n−1, an output voltage of the additional output pass device being referred to as Voutm, a first circuit portion for forcing Voutm to be at least approximately equal to Vout and for drawing at least one of output voltage (Voutm) and output current (Ioutm) from the additional output pass device, and a second circuit portion for measuring current Ioutm and correlating Iout with Ioutm.  
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0016]     The present invention will be understood and appreciated more fully from the following detailed description taken in conjunction with the drawings in which:  
         [0017]      FIG. 1  is a simplified circuit diagram of a charge pump architecture, constructed and operative in accordance with an embodiment of the present invention, with an additional output stage connected to the existing charge pump output stage;  
         [0018]      FIGS. 2A-2F  are simplified circuit diagrams of different types of output pass devices (e.g., transistors or diodes) that can be used to connect the previous stage output to the charge pump output, in accordance with different embodiments of the present invention; and  
         [0019]      FIGS. 3 and 4  are simplified circuit diagrams of circuitry, wherein output current of the additional output stage is measured by comparing with a reference current, in accordance with different embodiments of the present invention.  
     
    
     DETAILED DESCRIPTION OF EMBODIMENTS  
       [0020]     Reference is now made to  FIG. 1 , which illustrates a charge pump architecture, constricted and operative in accordance with an embodiment of the present invention.  
         [0021]     The charge pump architecture includes a plurality of n charge pump stages (stage  1 , stage  2 , . . . stage n−1, stage n). As is well known in the art, the charge pump stages may include charge transfer transistors that may use, but are not limited to, CMOS (complementary metal oxide semiconductor) technology, being either n-channel or p-channel (NMOS or PMOS) field effect transistors (FETs). NMOS is generally used to pump positive voltages, whereas PMOS is generally used to pump negative voltages.  
         [0022]     Each stage outputs a voltage to the next successive stage. Accordingly, the output of stage  1  (Vo 1 ) is output to stage  2 , the output of stage  2  (Vo 2 ) is output to stage  3 , and so forth, wherein the output of stage n−1 (Vo n-1 ) is output to stage n. The voltage output of stage n is the charge pump output Vout.  
         [0023]     In accordance with an embodiment of the present invention an additional output stage may be connected to the existing charge pump output stage. Specifically an additional output stage n may be connected to the output of stage n−1. The additional output stage may use the same phase signals as the existing charge pump output stage. The additional output stage can be scaled down to minimize size. The additional output stage output current is referred to as Ioutm.  
         [0024]     In simplified terms, which will be described more in detail hereinbelow with reference to  FIGS. 3 and 4 , a first circuit portion is provided that forces the output voltage of the additional output stage (Voutm) to be equal or approximately equal to the charge pump output voltage (Vout). The first circuit portion also draws output current or voltage from the additional output stage and sends it to a second circuit portion. The second current portion measures the output current or voltage from the additional output stage (wherein Voutm may be converted to Ioutm by suitable application of Ohm&#39;s law, for example). The current Ioutm may be measured in a number of ways. For example, it may be measured by comparing with a reference current Iref (as is described more in detail hereinbelow). This comparison may be used to produce a binary result. For example, if Iref&gt;Ioutm then the binary result is 0. If Iref≦Ioutm then the binary result is 1.  
         [0025]     Reference is now made to  FIGS. 2A-2C . In accordance with a non-limiting embodiment of the invention, instead of adding an entire additional output stage, an additional output pass device (e.g., transistor or diode) of stage n can be added, which connects the previous stage output (Vo n-1 ) to the charge pump output Vout. In all embodiments, the additional output pass device may be scaled down to a minimal size to reduce power dissipation and/or board size.  
         [0026]     For example, in the charge pump stages of  FIG. 2A , the previous stage output (Vo n-1 ) is connected to the charge pump output Vout with a p-n diode  10 . Accordingly, in the present invention, an identical output pass device  12  (i.e., p-n diode  12 ) may be connected to the previous stage output (Vo n-1 ). The current output Ioutm of this additional p-n diode  12  may be measured (by comparing with a reference current) to obtain the charge pump output current.  
         [0027]     In the charge pump stages of  FIG. 2B , the previous stage output (Vo n-1 ) is connected to the charge pump output Vout with an NMOS transistor  14  in diode connection. By “diode connection” it is meant that the source of NMOS transistor  14  is connected to the output of the previous stage output (Vo n-1 ) and its drain is connected to the input of stage n (Vout). The gate of NMOS transistor  14  is connected to its source. Accordingly, in the present invention, an identical output pass device  16  (i.e., NMOS transistor  16 ) may be connected to the previous stage output (Vo n-1 ) in diode connection. The current output Ioutm of this additional NMOS transistor  16  may be measured (by comparing with a reference current) to obtain the charge pump output current.  
         [0028]     In the charge pump stages of  FIG. 2C , the previous stage output (Vo n-1 ) is connected to the charge pump output Vout with an NMOS transistor  18  with gate control signal. In this connection, the source of NMOS transistor  18  is connected to the output of the previous stage output (Vo n-1 ) and its drain is connected to the input of stage n (Vout). The gate of NMOS transistor  18  is connected to a control voltage Vgate-control (or briefly, Vgc). Accordingly, in the present invention, an identical output pass device  20  (i.e., NMOS transistor  20 ) may be connected to the previous stage output (Vo n-1 ). The same gate control voltage Vgc may be connected to the gate of NMOS transistor  20 . The current output. Ioutm of this additional NMOS transistor  20  may be measured (by comparing with a reference current) to obtain the charge pump output current.  
         [0029]     The circuitries shown in  FIGS. 2A-2C  are non-limiting examples of circuitry which may be used in positive charge pumps. Reference is now made to  FIGS. 2D-2F , which are non-limiting examples of circuitry which may be used in negative charge pumps.  
         [0030]     In the charge pump stages of  FIG. 2D , the previous stage output (Vo n-1 ) is connected to the charge pump output Vout with an n-p diode  22 . Accordingly, in the present invention, an identical output pass device  24  (i.e., n-p diode  24 ) may be connected to the previous stage output (Vo n-1 ). The current output Ioutm of this additional n-p diode  24  may be measured (by comparing with a reference current) to obtain the charge pump output current.  
         [0031]     In the charge pump stages of  FIG. 2E , the previous stage output (Vo n-1 ) is connected to the charge pump output Vout with a PMOS transistor  26  in diode connection. The drain of PMOS transistor  26  is connected to the output of the previous stage output (Vo n-1 ) and its source is connected to the input of stage n (Vout). The gate of PMOS transistor  26  is connected to its drain. Accordingly, in the present invention, an identical output pass device  28  (i.e., PMOS transistor  28 ) may be connected to the previous stage output (Vo n-1 ) in diode connection. The current output Ioutm of this additional PMOS transistor  28  may be measured (by comparing with a reference current) to obtain the charge pump output current.  
         [0032]     In the charge pump stages of  FIG. 2F , the previous stage output (Vo n-1 ) is connected to the charge pump output Vout with a PMOS transistor  30  with gate control signal. In this connection, the drain of PMOS transistor  30  is connected to the output of the previous stage output (Vo n-1 ) and its source is connected to the input of stage n (Vout). The gate of PMOS transistor  30  is connected to a control voltage Vgc. Accordingly, in the present invention, an identical output pass device  32  (i.e., PMOS transistor  32 ) may be connected to the previous stage output (Vo n-1 ). The same gate control voltage Vgc may be connected to the gate of PMOS transistor  32 . The current output Ioutm of this additional PMOS transistor  32  may be measured (by comparing with a reference current) to obtain the charge pump output current.  
         [0033]     Reference is now made to  FIG. 3 , which illustrates current comparison circuitry for measuring the output current of the additional output stage/output pass device, in accordance with an embodiment of the present invention. The output current Ioutm is measured by comparing with a reference current.  
         [0034]     In the non-limiting embodiment of  FIG. 3 , the charge pump output Vout and the additional output device output Voutm are input into a current mirror. Specifically, in this non-limiting example, the current mirror includes a pair of PMOS transistors  34  and  36 , whose gates are connected to one another. Vout is input to the source of PMOS transistor  34 . The gate of PMOS transistor  34  is connected to its bulk and drain Voutm is input to the source of PMOS transistor  36 . The source of PMOS transistor  34  is connected to a resistor R 1 . The drain of PMOS transistor  36  is connected to a node n which outputs Vout and which is connected to a resistor R 2 . The current flowing through resistor R 1  is I 1  and current flowing through resistor R 2  is I 2 . Current I 1  is the current from stage n and current I 2  is the current from the additional stage.  
         [0035]     The voltage exiting PMOS transistor  34  and entering the gate of PMOS transistor  36  (V g36 ) is equal to Vout−V gs34  (i.e., the gate-source voltage of PMOS transistor  34 ). In addition, Voutm=V g36 +V gs36  (i.e., the sum of the gate voltage and gate-source voltage of PMOS transistor  36 ). Since V g36 =Vout−V gs34 , Voutm=Vout−V gs34 +V gs36 .  
         [0036]     The current mirror of PMOS transistors  34  and  36  is preferably designed such that V gs34 ≈V gs36 . This results in Voutm≈Vout. Accordingly, the current mirror of PMOS transistors  34  and  36  and the resistor R 1  form the first circuit portion, which forces Voutm to be equal or approximately equal to the charge pump output voltage (Vout). The first circuit portion also draws output current or voltage from the additional output stage (e.g., I 2 ) and sends it to a second circuit portion, which comprises node n and resistor R 2 . In the second circuit portion, I 2  can easily be measured. For example, since the charge pump output voltage Vout and the additional output device output voltage Voutm are equal or approximately equal, the ratio of the currents I 1  and I 2  is equal or approximately equal to their size ratio. For example, in the non-limiting case of R 1 =R 2 , I 1 =I 2 .  
         [0037]     Reference is now made to  FIG. 4 , which illustrates current comparison circuitry for measuring the output current of the additional output stage/output pass device, in accordance with another embodiment of the present invention.  
         [0038]     In the non-limiting embodiment of  FIG. 4 , the charge pump output Vout and the additional output device output Voutm are input into a current mirror comprising PMOS transistors  34  and  36 , as similarly described for the embodiment of  FIG. 3 . In the embodiment of  FIG. 4 , instead of resistors R 1  and R 2 , the PMOS current mirror is connected to an NMOS current mirror. Specifically, the drain of PMOS transistor  34  is connected to the drain of an NMOS transistor  38  and the drain of PMOS transistor  36  is connected to the drain of an NMOS transistor  40 . The gates of NMOS transistors  38  and  40  are connected to each other. The sources of NMOS transistors  38  and  40  are connected to ground. The gate of NMOS transistor  38  is connected to the gate of another NMOS transistor  42 , whose source is grounded. The drain of NMOS transistor  42  is connected to a current source Iref. The gate of NMOS transistor  42  is connected to its drain.  
         [0039]     The current from stage n flows through the left side of the current mirrors, and the current from the additional stage flows through the right side of the current mirrors.  
         [0040]     As similarly described above for  FIG. 3 , the current mirror of PMOS transistors  34  and  36  is preferably designed such that V gs34 ≈V gs36 , which means Voutm≈Vout. Accordingly, the current mirror of PMOS transistors  34  and  36  and the NMOS transistor  38  form the first circuit portion, which forces Voutm to be equal or approximately equal to the charge pump output voltage (Vout). The first circuit portion also draws output current or voltage from the additional output stage (e.g., I 2 ) and sends it to a second circuit portion, which comprises node n and NMOS transistor  40 . In the second circuit portion, I 2  can easily be measured. For example, since the charge pump output voltage Vout and the additional output device output voltage Voutm are equal or approximately equal, the ratio of the currents I 1  and I 2  is equal or approximately equal to their size ratio. By comparing with Iref, the current from stage n (the charge pump current) may be obtained.  
         [0041]     It will be appreciated by person skilled in the art, that the present invention is not limited by what has been particularly shown and described herein above. Rather the scope of the present invention is defined only by the claims which follow: