Abstract:
The purpose of this invention is to propose a new encryption method which offers a high level of security combined with a high execution speed. This aim is achieved by a method to encrypt or decrypt blocks of data X to Y, based on a main key R, this method using several serially connected modules, each module using a sub-key RA derived from the main key R.

Description:
PRIORITY STATEMENT 
     This application claims priority under 35 U.S.C. § 119 of European Patent Application No. 03011696.6, filed on May 23, 2003, in the European Patent Office, the entire contents of which are incorporated herein by reference. 
     BACKGROUND 
     1. Field of the Invention 
     The present invention refers to a device and a method for encrypting and decrypting a block of data known as a block cipher, the size of the input block and output block being the same. 
     This operation is controlled using a key which could either have the same size as the block or could have a different size, generally a larger size. 
     This invention refers to a symmetrical encryption/decryption method as opposed to the asymmetrical method. The symmetrical method is characterized by using the same key to encrypt and decrypt the data while the asymmetrical method uses a first key to encrypt and a second key to decrypt the data. 
     2. Description of the Related Art 
     Well known methods include DES (56 bit key), CAST (128-bit key), Blowfish (448-bit key), Twofish (256-bit key), and Rijndael (also known as AES, 256-bit key). Depending on the applications concerned, they have their own advantages and disadvantages. 
     Several patents have been published describing these methods. U.S. Pat. No. 5,214,703 describes the method known as IDEA™ which is based on a 8.5 rounds operations encryption process for 64 bits block length, each round using 6 sub-keys derived from the main key. The core is constituted by a Lai-Massey scheme using addition modulo 2 16 , multiplication modulo 2 16 +1 and bitwise excusive-OR. 
     The two major requirements for an encryption method is the robustness against any form of cryptanalysis and the computational speed. One key factor for the robustness is achieved by the diffusion effect, i.e. when one bit is changed in the input data, all the output bits are influenced in an unpredicted manner. 
     The computational speed is mainly determined by the type of mathematical and logical operations needed. More complex operations (division, multiplication) may prolong the time to execute the encryption process. 
     SUMMARY OF THE INVENTION 
     The purpose of this invention is to propose a new encryption method which offers a high level of security combined with a high execution speed. 
     This aim is achieved by a method to encrypt or decrypt blocks of data X to Y, based on a main key R, this method using several serially connected modules, each module using a sub-key RA derived from the main key R and comprising the steps of:
         inputting at least two initial values X 0 L and X 0 R,   mixing the at least two values X 0 L and X 0 R to form a mixed value X 1 ,   obtaining a value X 2  by mixing a first part RAH of the sub-key RA with the value X 1 ,   obtaining a value X 3  by applying the value X 2  to a substitution layer, the substitution layer comprising at least one substitution box (sbox), each substitution box containing at least one table of constants for which the input serves as the pointer and the pointed constant serves as the output,   obtaining a value X 4  by using a diffusion box of multi-permutation type based on the value X 3 ,   obtaining a value X 5  by mixing a second part RAL of the sub-key RA with the value X 4 ,   obtaining the value X 6  by applying to the value X 5  a substitution layer,   obtaining a value X 7  by mixing a first part RAH of the sub-key RA with the value X 6 ,   mixing the value X 7  with the initial at least two values X 0 L and X 0 R to obtain the at least two values X 8 L and X 8 R, X 8 L and X 8 R representing the output value X 8  of the module,
 
this method using at least two modules, where for each module a new sub-key RA is generated from the main key R, the initial values X 0  of the first module being a division of the input data X, the output values X 8 L and X 8 H of the last module forming the output data Y, and this method further comprising the step of applying to at least one of the value X 8 L or X 8 R an orthomorphism function before applying these values to the input X 0 R and X 0 L of the next module.
       

     The two main parts of the method are the substitution layer and the multi-permutation matrix. 
     The purpose of the substitution layer is to transform the input value to an output value without a simple algebraic relationship. One very efficient way to implement such a substitution layer consists in using a table containing constants, which can achieve the expected confusion result, as well as a table-lookup strategy. 
     Since in this embodiment the input data has a length of 32 bits, the number of constants will be 2 32  values each of a 32 bit length. 
     According to a preferred embodiment, the input data is split in groups of 8-bit lengths thus reducing the number of constants to 256 bytes. 
     Then the input data of 32 bits or 64 bits is divided in bytes of 8 bits and applied to the substitution box to obtain an output of 8 bits. The input data is used as an address pointer and the constant pointed to is the output. 
     Depending on the implementation method, the constant tables are the same for all groups of the input data (32 bit or 64 bit). In another embodiment, the constant tables are different for each group of the input data. 
     The constants stored in this table are a fixed permutation of numbers which are all different, encoded by a number of bits equal to the table width. 
     The second main part of the method is the multi-permutation matrix. The multi-permutation matrix is a square matrix with the property that every possible square sub-matrix has a determinant different than zero; and the elements of the matrix are elements of a finite field. The mixing operation consists in multiplying a vector of input elements by the matrix, resulting in a vector which is defined to be the output. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  shows the block diagram of the main module in the 64 bit version. 
         FIG. 2  shows the main process including an example with two modules. 
         FIG. 3  shows the internal part of the main module, in the 64 bit version. 
         FIG. 4  shows the block diagram of the main module in the 128 bit version. 
         FIG. 5  shows the block diagram of the orthomorphism function. 
         FIG. 6  shows the sub-system for the generation of the substitution box. 
         FIG. 7  shows the internal part of the main module, in the 128 bit version. 
         FIG. 8  shows the main process including an example with two modules in the 128 bit version. 
         FIG. 9  shows an alternative version of the substitution box. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       FIG. 1  shows the skeleton of the encryption (or decryption) process which represents the module MOD. The entry data X 0  of 64 bits, which is represented in two parts X 0 L and X 0 R of 32 bits each, are first mixed within the mixing element MX to obtain the X1 value. This mixing element aims to provide a 32 bit image of two times 32 bits of data. This could be achieved in different ways such as using X 0 R function, addition with modulo, or by using any group law. 
     The next step is illustrated with the block f 32  which has a 32 bit input X 1  and a 32 bit output X 7  as well as using a sub-key RA. The detailed description of this block is given with reference to  FIG. 3  (see below). 
     The output X 7  of the block f 32  is applied to the two mixing blocks MX which are connected with the two entries X 0 L and X 0 H. 
     The resulting data X 8 L and X 8 R represent the two 64 bits output X 8  of the module MOD. 
       FIG. 2  shows the whole process using at least two modules MOD. The input data X is first applied to a splitting module SP which converts the 64 bit entry X into two output values X 0 L 1  and X 0 R 1 , each of 32-bit length. 
     The function of this splitting module SP could be achieved in different ways such as selecting the lowest bits for X 0 L 1  and the highest bits for X 0 R 1 , or every odd bit for X 0 L 1  and even bit for X 0 R 1 . Other methods of dividing the input data X could be used as long as all the bits of X are comprised in X 0 L 1  and X 0 R 1 . 
     The outputs X 0 L 1  and X 0 R 1  are then used as entries in the first module MOD 1 . This first module processes the data while using a first sub-key RA 1 . The processing for X 0 L 1  and X 0 R 1  is the same as described according to  FIG. 1 . The outputs of this first module MOD 1  are two outputs X 8 L 1  and X 8 R 1 . An orthomorphism function is applied to one of these outputs, for example X 8 L 1  as illustrated on  FIG. 2 . The output resulting from this orthomorphism function is referenced as X 0 L 2 . The other value X 8 R 1  resulting from the processing by the first module MOD 1  is used as input, as well as the output X 0 L 2  resulting from the orthomorphism function, in a second processing module MOD 2 . This second module MOD 2  will process their input data based on a second sub-key RA 2 . The outputs of this second module are referenced as X 8 L 2  and X 8 R 2  on  FIG. 2 . These outputs are assembled to form the encrypted data Y within the assembler module AS. This module AS has the same function as the splitting module SP but works inversely. It is to be noted that the manner to rebuild the output Y could be different than the splitting module SP but the aim remains the same. All bits of X 8 L 2  and X 8 R 2  should be present in the output Y. 
       FIG. 3  shows in detail, the functions of the block f 32  of  FIG. 1 . In this block, a 32-bit length data X 1  is the input. This data is separated into blocks of 8-bit length (X 1   a , X 1   b , X 1   c , X 1   d ) through a splitting block SPMU, also mentioned X 1 ′ in  FIG. 3 . This block has the same function as the one described in respect of the block SP of  FIG. 2 . Each of these 8-bit blocks are mixed with a first part RAH of the sub-key RA to obtain a value X 2   a , X 2   b , X 2   c , X 2   d  (forming the value X 2 ). This mixing operation is the same as the one described in respect with the block MX of  FIG. 1 . 
     The generation of the two sub-keys RAH and RAL is made through the splitting module SP. This module has the same function as the one described in  FIG. 1 . 
     Each of these values X 2   a  to X 2   d  are applied to a substitution layer, comprising at least one substitution box (sbox), each substitution box containing a table of constants for which the input serves as the pointer and the constant pointed to serves as the output. The output data is referenced as X 3   a , X 3   b , X 3   c , X 3   d  (forming the value X 3 ) on  FIG. 3 . 
     One method to generate this constant table is to use a pseudorandom generator. One should remove all duplicate values so that each constant in this table is unique. 
     This data is introduced in a diffusion box Mu 4  of (4,4) multi-permutation type. The output data of this diffusion box is referenced as X 4   a , X 4   b , X 4   c , X 4   d  respectively (forming the value X 4 ). The diffusion box consists in multiplying the input vector (X 3   a , X 3   b , X 3   c , X 3   d ) by a square matrix 4×4 Mu 4 , whose elements belong to the finite field with 256 elements; these elements are denoted Mu(i, j), where i refers to the row index and j to the column index. The result of the multiplication of the vector (X 3   a , X 3   b , X 3   c , X 3   d ) by the matrix Mu 4  is a vector (X 4   a , X 4   b , X 4   c , X 4   d ) where these values are obtained as follows:
 
 X 4 a=Mu 4(1,1)* X 3 a+Mu 4(1,2)* X 3 b+Mu 4(1,3)* X 3 c+Mu 4(1,4)* X 3 d  
 
 X 4 b=Mu 4(2,1)* X 3 a+Mu 4(2,2)* X 3 b+Mu 4(2,3)* X 3 c+Mu 4(2,4)* X 3 d  
 
 X 4 c=Mu 4(3,1)* X 3 a+Mu 4(3,2)* X 3 b+Mu 4(3,3)* X 3 c+Mu 4(3,4)* X 3 d  
 
 X 4 d=Mu 4(4,1)* X 3 a+Mu 4(4,2)* X 3 b+Mu 4(4,3)* X 3 c+Mu 4(4,4)* X 3 d  
 
Here “+” denotes the addition in the finite field and “*” its multiplication. The elements of Mu 4  are chosen such that the amount of computations needed to evaluate the four above expressions is minimal. The number of multiplications by the constant “1” (thereafter denoted “identities”) has therefore been chosen to be as large as possible.
 
     The data is then mixed with a second part RAL of the sub-key RA to obtain a value X 5   a , X 5   b , X 5   c , X 5   d  (forming the value X 5 ). 
     Each of these values X 5   a  to X 5   d  is then applied to a substitution box (sbox) to obtain a value X 6   a , X 6   b , X 6   c , X 6   d  (forming the value X 6 ). These values are mixed with a first part RAH of the sub-key RA to obtain new values X 7   a , X 7   b , X 7   c , X 7   d  (forming the value X 7 ). 
     Then these values X 7   a , X 7   b , X 7   c , X 7   d  are assembled to form the output data X 7  within the assembler module AS as described in respect with  FIG. 2 . This data corresponds to the output data X 7  of block f 32  in  FIG. 1   
     During the encryption process, the main key R is divided into several sub-keys, one per module MOD. In the example of  FIG. 3 , the first sub-key RA 1  is used in combination with the module MOD 1  and the second sub-key RA 2  is used in combination with the module MOD 2 . 
     To obtain the data X based on the data Y and the key R, the same process as described in the reference to  FIG. 3  is applied with the only difference that the sub-keys are generated in the reverse order. The sub-key RA 2  is then applied to the first module MOD 1  and the sub-key RA 1  is applied to the second module MOD 2 . 
     According to the general principle of this invention, the number of serially connected modules MOD is not limited to two modules. In order to achieve a good robustness, experience has shown that 9 rounds are optimal to obtain a result which could be qualified as an encryption process. This number could be extended to 12 or more in order to obtain more robustness. 
       FIG. 4  describes an embodiment of the module MOD 64  designed for processing 128-bit length data. The inputs X 0 LL and X 0 LR are mixed together within the mixing element MX to form the output value X 1 L and in the same manner, the values X 0 RL and X 0 RR are mixed together to form the value X 1 R. 
     The next step is illustrated with the layer f 64  which has two 32 bits input X 1 L and X 1 R and two 32 bits output X 7 L and X 7 R as well as using a sub-key RA. The detailed description of this block is given with the reference to  FIG. 7  (see below). 
     Each of these outputs is mixed with two input data of the module MOD 64  within the same mixing element MX. In our example, the output value X 7 L is mixed with the input X 0 LL and X 0 LR respectively and the output value X 7 R is mixed with the input X 0 RI and X 0 RR respectively. Other mixing combinations are also possible, such as mixing the output value X 7 L with X 0 LL and X 0 RR in a cross configuration. 
       FIG. 5  is an illustration of an embodiment of the orthomorphism function. The input data is noted ZI and the output data is noted ZO. The data length is not an issue for this function. The input data ZI is first divided into two values ZL and ZR of the same size with the splitting module SP. Then the two values are mixed with the so called MX mixing element and the output of the element is applied to the assembler unit AS. The other split value ZR is directly applied to the assembler module AS without modification. This module comprises two inputs and combines these data to form the output value ZO. This module works inversely than the splitting module SP. The particularity of this embodiment is that the inputs of the assembler module are crossed relative to the outputs of the splitting module SP. The right output ZR of the splitting module SP is applied to the left input of the assembler module AS and the left output ZL of the splitting module SP, after being mixed with the other output of the splitting module SP, is applied to the right input of the assembler module AS. 
     As far as the substitution box is concerned, there exist different possibilities to realize this function. We have previously described a method uniquely based on a constant table. The first step to reduce the table size is to split the input and to apply this part to a much smaller table. 
     The example of  FIG. 3  shows a substitution box working with 8-bit data length thus embedding a table of 256 constants. 
     In some cases, in particular where the memory size is an issue, other alternatives are sought. Such alternative is described in reference to  FIGS. 6 and 9 . 
       FIG. 6  shows a subsystem Cbox of this substitution box, this subsystem comprising one input C divided into two inputs CL and CR and two outputs CL′ and CR′. 
     The heart of this subsystem is the module TA which comprises a constant table of 2 (n/2)  elements, each of n/2 bits, in which n is the length of the input value C. 
     For an input having a length of 8 bits, the constant table comprises 16 (2 4 ) elements, each of 4-bit length. These elements are randomly generated, taking into account that each element has a unique value. 
       FIG. 9  describes how to use the module Cbox to build a substitution box. The input value C 1  is first split into two parts CL 1  and CR 1  and applied to the first module Cbox 1  as described with reference to  FIG. 6 . The output of said module Cbox 1  is forwarded to the next module Cbox 2 . One of the outputs of the first module, in this case CL 1 ′, prior to applying to the second module Cbox 2 , is given to an orthomorphism function OR. 
     The execution of the substitution box uses generally at least two subsystems Cbox, each having a different constant table TA. In the illustrated example, the substitution box is made using three subsystems Cbox and the outputs of the last subsystem has no orthomorphism function OR according to the embodiment. 
       FIG. 7  is an alternative of the embodiment described in  FIG. 6 , designed for data of 64-bit length. The structure designed for 32 bits is largely duplicated to proceed 64-bit of data. The input data X 1  is divided into a vector with elements of 8-bit length (X 1   a  to X 1   h ) and processed in the same manner as described in  FIG. 6 . The main difference is in the diffusion box Mu 8  which is a square matrix of 8×8 elements of the finite field with 256 elements. The elements of the matrix are denoted Mu 8 (i, j), where i refers to row index and j to the column index. For an input vector (X 3   a , . . . , X 3   h ), the multiplication by the matrix Mu 8  gives the output vector (X 4   a , . . . , X 4   h ) in the following way (“+” is the addition and “*” is the multiplication in the finite field):
   X 4 a=Mu 8(1,1)* X 3 a+Mu 8(1,2)* X 3 b+Mu 8(1,3)* X 3 c+Mu 8(1,4)* X 3 d+Mu 8(1,5)* X 3 e+Mu 8(1,6)* X 3 f+Mu 8(1,7)* X 3 g+Mu 8(1,8)* X 3 h;      X 4 b=Mu 8(2,1)* X 3 a+Mu 8(2,2)* X 3 b+Mu 8(2,3)* X 3 c+Mu 8(2,4)* X 3 d+Mu 8(2,5)* X 3 e+Mu 8(2,6)* X 3 f+Mu 8(2,7)* X 3 g+Mu 8(2,8)* X 3 h;      X 4 c=Mu 8(3,1)* X 3 a+Mu 8(3,2)* X 3 b+Mu 8(3,3)* X 3 c+Mu 8(3,4)* X 3 d+Mu 8(3,5)* X 3 e+Mu 8(3,6)* X 3 f+Mu 8(3,7)* X 3 g+Mu 8(3,8)* X 3 h;      X 4 d=Mu 8(4,1)* X 3 a+Mu 8(4,2)* X 3 b+Mu 8(4,3)* X 3 c+Mu 8(4,4)* X 3 d+Mu 8(4,5)* X 3 e+Mu 8(4,6)* X 3 f+Mu 8(4,7)* X 3 g+Mu 8(4,8)* X 3 h;      X 4 e=Mu 8(5,1)* X 3 a+Mu 8(5,2)* X 3 b+Mu 8(5,3)* X 3 c+Mu 8(5,4)* X 3 d+Mu 8(5,5)* X 3 e+Mu 8(5,6)* X 3 f+Mu 8(5,7)* X 3 g+Mu 8(5,8)* X 3 h;      X 4 f=Mu 8(6,1)* X 3 a+Mu 8(6,2)* X 3 b+Mu 8(6,3)* X 3 c+Mu 8(6,4)* X 3 d+Mu 8(6,5)* X 3 e+Mu 8(6,6)* X 3 f+Mu 8(6,7)* X 3 g+Mu 8(6,8)* X 3 h;      X 4 g=Mu 8(7,1)* X 3 a+Mu 8(7,2)* X 3 b+Mu 8(7,3)* X 3 c+Mu 8(7,4)* X 3 d+Mu 8(7,5)* X 3 e+Mu 8(7,6)* X 3 f+Mu 8(7,7)* X 3 g+Mu 8(7,8)* X 3 h;      X 4 h=Mu 8(8,1)* X 3 a+Mu 8(8,2)* X 3 b+Mu 8(8,3)* X 3 c+Mu 8(8,4)* X 3 d+Mu 8(8,5)* X 3 e+Mu 8(8,6)* X 3 f+Mu 8(8,7)* X 3 g+Mu 8(8,8)* X 3 h;    
       FIG. 8  describes the complete process using two rounds of execution of the module MOD 64 . The splitting module SP divides the 128-bit length input data X in four parts, namely X 0 LL 1 , X 0 LR 1 , X 0 RL 1  and X 0 RR 1  (forming the value X 0 ). Two parts of the result of the module MOD 64 - 1  are then applied to an orthomorphism function OR, before being used as input of the next module MOD 64 - 2 . 
     The position of the orthomorphism function OR with regard to the outputs of the module MOD 64  is not decisive. One can select the two left outputs of the two right outputs depending of the implementation of this method. 
     The output Y is directly obtained from the last module MOD 64 , without having an orthomorphism function OR in one of these outputs. 
     In the case that more than two modules MOD 64  are used, the orthomorphism function OR is placed between each module MOD 64 . Even if in the preferred embodiment the position of the orthomorphism function OR is the same regardless of the module number, in another embodiment, the position of these orthomorphism function OR can be changed to be connected to a different output of the module MOD 64 .