Abstract:
A conductive metal structure applied to a module IC includes a wafer, a first insulating unit, and a first conductive unit. The wafer has a main body and a through hole passing through the main body. The first insulating unit has a first inner insulating layer formed on an inner surface of the through hole and a first outer insulating layer that is extended from the first inner insulating layer and is formed on a first bottom surface of the main body. The first conductive unit has a first inner conductive layer formed on the first inner insulating layer and at least one first conductive pad formed on the first outer insulating layer. The present invention integrates semiconductor technologies of etching and deposition and combines them with the development of the module IC in order to provide a conductive metal structure that has lower cost and is manufactured easily.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a conductive metal structure and a method of manufacturing the same, and particularly relates to a conductive metal structure applied to a module IC (Integrated Circuit) and a method of manufacturing the same. 
         [0003]    2. Description of the Related Art 
         [0004]    As integrated circuit technology has been rapidly developing, a variety of devices using the technology are developed continuously. Because the functions of the devices are rapidly added, most devices are implemented in a modular way. However, while the functions of the devices can be increased by integrating a lot of functional modules, the design of a multiple function device with small dimensions is still difficult. 
         [0005]    In the semiconductor manufacturing process, a high level technology is used to manufacture a small chip or component. Therefore, the module manufacturer can design a functional module with small dimensions, and the device can be efficiently and fully developed. 
         [0006]    Currently, most modules use the printed circuit board (PCB), Flame Retardant 4 (FR-4), or Bismaleimide Triazine (BT) substrate as a carrier. All chips and components are mounted onto the surface of the carrier by using a surface mounting technology (SMT). Therefore, the substrate is merely used as a carrier and is used for connecting the circuit. The structure of the substrate is a multiple-layered structure and is only used for the circuit layout. 
         [0007]    In radio frequency (RF) system modules for example, in order to have multiple functions, a wireless local area (WLAN) module is usually integrated with a Bluetooth module or a global positioning system (GPS) module. However, the required peripheral circuits increases. When all components for each of the circuits are mounted onto the substrate, the dimension of the whole module increases. At the same time, it is difficult for the designer to insulate the circuit within the substrate from interferences from outside signals, and the characteristic of the circuit may be affected. 
         [0008]    In the prior art, the technologies of IPD (Integrated Passive Device) and IPC (Integrated Peripheral Circuit) are two methods for decreasing the size of the module by mounting integrated circuits on two sides of the wafer. To connect the two sides of the wafer the following method is usually used: forming a through hole passing through a wafer, and filling the through hole with metal to form a pad. However, this method incurs high costs, and it is difficult to completely fill the through hole with the metal. 
       SUMMARY OF THE INVENTION 
       [0009]    One particular aspect of the present invention is to provide a conductive metal structure applied to a module IC and a method of manufacturing the same. A module IC using a silicon wafer as a carrier board is manufactured by a conductive metal structure that is used to conduct an upper circuit and a lower circuit of the module IC. The present invention integrates semiconductor technologies of etching and deposition and combines them with the development of the module IC in order to provide a conductive metal structure that has lower cost and is manufactured easily. 
         [0010]    In order to achieve the above-mentioned aspects, the present invention provides a conductive metal structure applied to a module IC, including: a wafer, a first insulating unit, and a first conductive unit. The wafer has a main body and at least one through hole passing through the main body. The first insulating unit has a first inner insulating layer formed on an inner surface of the at least one through hole and a first outer insulating layer that is extended from the first inner insulating layer and is formed on a first bottom surface of the main body. The first conductive unit has a first inner conductive layer formed on the first inner insulating layer and at least one first conductive pad formed on the first outer insulating layer. 
         [0011]    In order to achieve the above-mentioned aspects, the present invention provides a conductive metal structure applied to a module IC, including: a wafer, a first insulating unit, and a first conductive unit. The wafer has a main body and at least one through hole passing through the main body. The first insulating unit has a first inner insulating layer formed on an inner surface of the at least one through hole and a first outer insulating layer that is extended from the first inner insulating layer and is formed on a first bottom surface of the main body. The first conductive unit has a first inner conductive layer formed on the first inner insulating layer and a first outer conductive layer formed on the first outer insulating layer. The at least one first conductive body is disposed on the first outer conductive layer to form a conductive pad. 
         [0012]    In order to achieve the above-mentioned aspects, the present invention provides a method of manufacturing a conductive metal structure applied to a module IC, including: firstly, providing a wafer that has a main body and at least one through hole passing through the main body; forming a first inner insulating layer on an inner surface of the at least one through hole and forming a first outer insulating layer that is extended from the first inner insulating layer and is formed on a first bottom surface of the main body at the same time; forming a first inner conductive layer on the first inner insulating layer and forming a first outer conductive layer on the first outer insulating layer at the same time; finally, removing one part of the first outer conductive layer to form at least one first conductive pad on the first outer insulating layer or disposing at least one first conductive body on the first outer conductive layer to form a conductive pad, wherein the at least one first conductive body is a solder ball. 
         [0013]    Therefore, the conductive metal structure applied to a module IC of the present invention has some advantages, as follows: 
         [0014]    1. The present invention takes a wafer such a silicon wafer as a carrier board and etches the wafer to form at least one through hole for connecting an upper circuit and a lower circuit of a module IC. The module IC has one or more passive components or active components disposed on or in the main body of the wafer. 
         [0015]    2. An oxide layer such as SiO2 is formed in the inner surface of the through hole to be an insulating layer such as the first insulating unit in order to insulate the wafer from a metal layer such as the first conductive unit. 
         [0016]    3. The metal layer is formed on the oxide layer, so the metal layer does not need to fill the through hole completely and the thickness of the metal layer is thin. The function of the metal layer is to conduct the upper circuit and the lower circuit of the module IC. 
         [0017]    4. A bottom side of the metal layer such as the first outer conductive layer is etched to form a conductive metal pad such as the first conductive pad. 
         [0018]    5. A solder ball is disposed on the bottom side of the metal layer to do a conductive metal pad such as the first conductive body. 
         [0019]    It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed. Other advantages and features of the invention will be apparent from the following description, drawings and claims. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0020]    The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawings, in which: 
           [0021]      FIG. 1  is a flowchart of a method of manufacturing a conductive metal structure applied to a module IC according to the first embodiment of the present invention; 
           [0022]      FIGS. 1A to 1F  are cross-sectional, schematic views of a conductive metal structure applied to a module IC according to the first embodiment of the present invention, at different stages of the manufacturing process, respectively; 
           [0023]      FIG. 2  is a flowchart of a method of manufacturing a conductive metal structure applied to a module IC according to the second embodiment of the present invention; 
           [0024]      FIGS. 2A to 2F  are cross-sectional, schematic views of a conductive metal structure applied to a module IC according to the second embodiment of the present invention, at different stages of the manufacturing process, respectively; and 
           [0025]      FIG. 3  is an assembly, schematic view of two conductive metal structures of the first and the second embodiments of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0026]    Referring to  FIGS. 1 and 1A  to  1 F,  FIG. 1  shows a flowchart of a method of manufacturing a conductive metal structure applied to a module IC according to the first embodiment of the present invention, and  FIGS. 1A to 1F  show cross-sectional, schematic views of a conductive metal structure applied to a module IC according to the first embodiment of the present invention, at different stages of the manufacturing process, respectively. 
         [0027]    The first embodiment of the present invention provides a method of manufacturing a conductive metal structure applied to a module IC, including: 
         [0028]    Step S 100  (referring to  FIGS. 1 and 1A ) is providing a wafer  1   a  that has a main body  10   a  and at least one through hole  11   a  passing through the main body  10   a . In addition, the wafer  1   a  can be a silicon wafer, and the at least one through hole  11   a  is penetrated via wet or dry etching. 
         [0029]    Step S 102  (referring to  FIGS. 1 and 1B ) is forming a first inner insulating layer  20   a  on an inner surface of the at least one through hole  11   a  and forming a first outer insulating layer  21   a  that is extended from the first inner insulating layer  20   a  and is formed on a first bottom surface S 1  of the main body  10   a  at the same time. In addition, both the first inner insulating layer  20   a  and the first outer insulating layer  21   a  are oxide layers, and both the first inner insulating layer  20   a  and the first outer insulating layer  21   a  are formed via oxidation or deposition processes. The first inner insulating layer  20   a  and the first outer insulating layer  21   a  are combined together to form a first insulating unit  2   a.    
         [0030]    Step S 104  (referring to  FIGS. 1 and 1C ) is forming a first inner conductive layer  30   a  on the first inner insulating layer  20   a  and forming a first outer conductive layer  31   a  on the first outer insulating layer  21   a  at the same time. In addition, both the first inner conductive layer  30   a  and the first outer conductive layer  31   a  can be metal layers, and both the first inner conductive layer  30   a  and the first outer conductive layer  31   a  are formed via electroplating, deposition, or sputtering processes. The first inner conductive layer  30   a  and the first outer conductive layer  31   a  are combined together to form a first conductive unit  3   a.    
         [0031]    After the step of S 104 , the first embodiment of the present invention provides two methods for forming conductive pad according to designer&#39;s needs, as follows: 
         [0032]    First forming method (referring to  FIGS. 1 ,  1 D and  1 E, and  FIG. 1E  being a bottom view of  FIG. 1D ) is removing one part of the first outer conductive layer  31   a  to form two first conductive pads  310   a  on the first outer insulating layer  21   a  (step S 106 ). In addition, one part of the first outer conductive layer  31   a  is removed via etching. Moreover, the number of first conductive pads  310   a  does not use to limit the present invention. In other words, one or more first conductive pads  310   a  are protected in the present invention. 
         [0033]    Second forming method (referring to  FIGS. 1 and 1F ) is disposing two first conductive bodies  4   a  on the first outer conductive layer  31   a  to form two conductive pads (step S 108 ). In addition, the first conductive body  4   a  can be a solder ball. Moreover, the number of first conductive bodies  4   a  does not use to limit the present invention. In other words, one or more first conductive body  4   a  are protected in the present invention. 
         [0034]    Referring to  FIGS. 2 and 2A  to  2 F,  FIG. 2  shows a flowchart of a method of manufacturing a conductive metal structure applied to a module IC according to the second embodiment of the present invention, and  FIGS. 2A to 2F  show cross-sectional, schematic views of a conductive metal structure applied to a module IC according to the second embodiment of the present invention, at different stages of the manufacturing process, respectively. 
         [0035]    The second embodiment of the present invention provides a method of manufacturing a conductive metal structure applied to a module IC, including: 
         [0036]    Step S 200  (referring to  FIGS. 2 and 2A ) is providing a wafer  1   b  that has a main body  10   b  and at least one concave groove  11   b  formed on the main body  10   b . In addition, the wafer  1   b  can be a silicon wafer, and the at least one concave groove  11   b  is penetrated via wet or dry etching. 
         [0037]    Step S 202  (referring to  FIGS. 2 and 2B ) is forming a second inner insulating layer  20   b  on an inner surface of the at least one concave groove  11   b  and forming a second outer insulating layer  21   b  that is extended from the second inner insulating layer  20   b  and is formed on a second bottom surface S 2  of the main body  10   b  at the same time. In addition, both the second inner insulating layer  20   b  and the second outer insulating layer  21   b  are oxide layers, and both the second inner insulating layer  20   b  and the second outer insulating layer  21   b  are formed via oxidation or deposition processes. The second inner insulating layer  20   b  and the second outer insulating layer  21   b  are combined together to form a second insulating unit  2   b.    
         [0038]    Step S 204  (referring to  FIGS. 2 and 2C ) is forming a second inner conductive layer  30   b  on the second inner insulating layer  20   b  and forming a second outer conductive layer  31   b  on the second outer insulating layer  21   b  at the same time. In addition, both the second inner conductive layer  30   b  and the second outer conductive layer  31   b  can be metal layers, and both the second inner conductive layer  30   b  and the second outer conductive layer  31   b  are formed via electroplating, deposition, or sputtering processes. The second inner conductive layer  30   b  and the second outer conductive layer  31   b  are combined together to form a second conductive unit  3   b.    
         [0039]    After the step of S 204 , the second embodiment of the present invention provides two methods for forming conductive pad according to designer&#39;s needs, as follows: 
         [0040]    First forming method (referring to  FIGS. 2 ,  2 D and  2 E, and  FIG. 2E  being a bottom view of  FIG. 2D ) is removing one part of the second outer conductive layer  31   b  to form two second conductive pads  310   b  on the second outer insulating layer  21   b  (step S 206 ). In addition, one part of the second outer conductive layer  31   b  is removed via etching. Moreover, the number of second conductive pads  310   b  does not use to limit the present invention. In other words, one or more second conductive pads  310   b  are protected in the present invention. 
         [0041]    Second forming method (referring to  FIGS. 2 and 2F ) is disposing two second conductive bodies  4   b  on the second outer conductive layer  31   b  to form two conductive pads (step S 208 ). In addition, the second conductive body  4   b  can be a solder ball. Moreover, the number of second conductive bodies  4   b  does not use to limit the present invention. In other words, one or more second conductive body  4   b  are protected in the present invention. 
         [0042]      FIG. 3  shows an assembly, schematic view of two conductive metal structures of the first and the second embodiments of the present invention. The conductive metal structure of the first embodiment and the conductive metal structure of the second embodiment can be used separately or can be manufactured on the same silicon wafer. In other words, such as using the second conductive bodies ( 4   a ,  4   b ), the conductive metal structures of the first embodiment and the second embodiment can be formed in a main body  10  of a wafer  1 , and the main body  10  also has a first bottom surface S 1 ′ and a second bottom surface S 2 ′. 
         [0043]    In conclusion, the conductive metal structure applied to a module IC of the present invention has some advantages, as follows: 
         [0044]    1. The present invention takes a wafer  1   a  or  1   b  such a silicon wafer as a carrier board and etches the wafer  1   a  or  1   b  to form at least one through hole  11   a  or concave groove  11   b  for connecting an upper circuit and a lower circuit of a module IC. The module IC has one or more passive components or active components disposed on or in the main body  10   a  of the wafer  1 . 
         [0045]    2. An oxide layer such as SiO2 is formed in the inner surface of the through hole  11   a  or the concave groove  11   b  to be an insulating layer such as the first insulating unit  2   a  or the second insulating unit  2   b  in order to insulate the wafer  1   a  or  1   b  from a metal layer such as the first conductive unit  3   a  or the second conductive unit  3   b.    
         [0046]    3. The metal layer is formed on the oxide layer, so the metal layer does not need to fill the through hole  11   a  or the concave groove  11   b  completely and the thickness of the metal layer is thin. The function of the metal layer is to conduct the upper circuit and the lower circuit of the module IC. 
         [0047]    4. A bottom side of the metal layer such as the first outer conductive layer  31   a  and the second outer conductive layer  31   b  is etched to form a conductive metal pad such as the first conductive pad  310   a  and the second conductive pad  310   b.    
         [0048]    5. A solder ball is disposed on the bottom side of the metal layer to do a conductive metal pad such as the first conductive body  4   a  and the second conductive body  4   b.    
         [0049]    Although the present invention has been described with reference to the preferred best molds thereof, it will be understood that the invention is not limited to the details thereof. Various substitutions and modifications have been suggested in the foregoing description, and others will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.