Abstract:
A process for removing resist ( 114 ) from a CDO dielectric material ( 110 ) that uses a non-damaging plasma in a reducing atmosphere under high power and using a structure ( 150 ) or other means to limit ions from the plasma from reaching the surface of the CDO material ( 110 ).

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
   The following co-pending application is related and hereby incorporated by reference: Ser. No. 09/975,639; Filing date Oct. 11, 2001; Inventors Smith et al. 
   FIELD OF THE INVENTION 
   The invention is generally related to the field of forming interconnect levels in semiconductor devices and more specifically to a resist removal process for use with low-k and ultra-k dielectric materials. 
   BACKGROUND OF THE INVENTION 
   Integrated circuit technology continues to advance at a rapid pace, with many circuit technologies being implemented using semiconductor fabrication processes. With the advancement of semiconductor circuit fabrication, consideration is given to various aspects, including maximizing efficiency, lowering manufacturing cost, and increasing performance. With these goals in mind, low dielectric constant (low k) and ultra-low dielectric constant materials are now being considered as favorable for various insulting layers, sometimes referred to as interlevel and intermetal dielectrics, used in a semiconductor circuit. In the past, such insulating layers were implemented using silicon dioxide (i.e., SiO.sub.2). Silicon dioxide has a dielectric constant, sometimes referred to in the art by the value k, on the order of 4.0. However, silicon dioxide is now being replaced with progressively lower dielectric constant materials. Carbon-doped oxide (CDO), produced using methylsilsesquioxane (MSQ) precursors with spin-on processes, as well as chemical vapor deposition (CVD) processes using various carbon-containing precursors, is a class of materials having a significantly lower dielectric constant (e.g. commonly 2.2–2.9). In CDO dielectric materials, the regular SiO 2  matrix has bonding such as Si—CH 3  in the place of some of the Si—O bonds, which lowers the dielectric constant of the material. CDO materials can be made by spin-on or chemical vapor deposition techniques and are sold under various trade names, such as CORAL®, a CVD organo-silicon glass (OSG) commercially available from Novellus Systems, Inc., and Black Diamond™, another CVD material commercially available from Applied Materials, Inc. JSR Corporation also has a CDO which is an MSQ-based spin-on dielectric film known as LKD-5109, with a dielectric constant of 2.2. By reducing the dielectric constant, such as is achieved by these CDO materials, semiconductor devices may be constructed using thinner films for insulating layers. This approach decreases device size and cost. Performance is also increased, such as by way of example where metal lines (e.g., copper) are formed closer together due to the thinness of the low-k or ultra-low-dielectric constant material which separates the metal from other layers/regions/devices. 
   While CDO materials have advance various goals in the formation of semiconductor circuits, the present inventors have observed a considerable drawback in the use of such low and ultra-low dielectric constant (known as low-k or ultra-low-k) materials. Specifically, during the formation of semiconductor circuits, and as also detailed later, it is known in the art to use photoresist materials as a mask for etching through an insulating layer, such as a silicon dioxide layer, to provide for example, vias, trenches, or other areas through which electrical contact may be made to various points covered by the insulating layer. Once the photoresist has served its masking purpose, it along with any related residue, is removed. This process is sometimes referred to as a clean-up or a strip, and such removal has been achieved in the art by various different processes. However, the present inventors have observed that these traditional photoresist-removal processes, while effective for ordinary silicon dioxide, negatively affect a lower dielectric constant material such as a CDO type of dielectric material. For example, one prior art photoresist-removal process uses an oxygen-based plasma at high temperature, that is, on the order of 250.degree. C. However, when used with a CDO type of dielectric material, the prior art use of an oxygen-based plasma causes the oxygen in the plasma to react with the CDO dielectric material; in other words, rather than being inert with the CDO as is desired, the oxygen may cause the CDO to convert in part to SiO 2  and/or to diminish in width and/or in depth. Further complicating this issue is that manufacturers provide CDO-type materials that contain different percentages of, for example, carbon. As a result, the present inventors have observed a corresponding difference in the rate of carbon loss and width and/or depth loss of the CDO type of film when the film is exposed to oxygen-containing plasma. For example, in the past, rates of degradation or loss and width and/or materials were observed on the order of 25 Angstroms per minute exposure to oxygen-containing plasmas while more recently rates of degradation on the order of 100 Angstroms per minute have been observed. Thus, there is a need to reduce this degradation, and indeed such a need will continue should low k materials continue to show degradation on reaction with standard (e.g., O.sub.2,250.degree.C.) photoresist removal processes. 
   In view of the above, there arises a need to address the drawbacks of the prior art and to provide a method for effectively removing photoresist from low-k and ultra-low dielectric constant materials, as is achieved by the preferred embodiments described below. 
   SUMMARY OF THE INVENTION 
   The invention is a process for removing resist from a CDO type of dielectric material that uses a non-damaging plasma in a reducing atmosphere under high power with a grid structure or other suitable means to limit ions from the plasma from reaching the surface of the CDO-type of material. The plasma process may alternatively be applied to other materials containing a significant organic content. 
   An advantage of the invention is providing a damage-free resist removal process. 
   This and other advantages will be apparent to those of ordinary skill in the art having reference to the specification in conjunction with the drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     In the drawings: 
       FIGS. 1A–1F  are cross-sectional diagrams, not to scale, of a duel damascene process incorporating a resist strip according to the invention at various stages of fabrication. 
       FIG. 2  is a graph of damage to a CVD Novellus CORAL® film in terms of film thickness change (Etch Delta (A)) measured following various plasma resist strip and wet clean process parameters. 
       FIG. 3  is a graph showing minimal change in the Si—O and Si—CH3 bonding in Fourier Transform Infrared spectroscopy (FTIR) data obtained following exposure of spin-on films of LKD-5109 (JSR Corporation) to plasma processes performed in an ion-free plasma using H/Ar of H/He gas mixtures over a range of process conditions. 
       FIG. 4  is a collection of X-ray photoelectron spectra (XPS) showing carbon  1   s  spectra obtained from Applied Materials&#39; Black-Diamond 2 (BD2) films. The data shows little surface C loss from isotropic H/Ar plasma exposures in an Aspen III (A3) inductively coupled plasma (ICP) tool and greater loss from H/Ar plasmas from an Aspen II (A2) ICP Mattson tool in which the ion-collecting grids were removed, therefore exposing the film to some ion content. 
       FIG. 5  is a collection of secondary ion mass spectroscopy (SIMS) carbon depth profile data obtained from BD2 films following exposure to 60% H/40% Ar plasmas in an Aspen III (A3) ICP tool in which ion collecting grids were present and Aspen II (A2) ICP tool in which the grids were removed. No subsurface carbon loss is observed from the films exposed to the A3 plasma, and C loss up to 400 A depth in the BD2 films was observed for up to 6′ plasma exposure using the same process in the A2 tool. 
   

   DETAILED DESCRIPTION OF THE EMBODIMENTS 
   The invention will now be described in conjunction with a dual damascence process for forming copper interconnects utilizing a low-k or an ultra-low k CDO-type of dielectric. It will be apparent to those of ordinary skill in the art that the benefits of the invention may be applied to other applications in which materials containing significant (e.g., greater than 5 atomic %, and typically 15–25 atomic %, at the surface) organic content, such as materials with Si—R bonding where R is H, CH 3 , C 2 H 5 , C 6 H 6  or other organic groups, would be adversely affected by a plasma process capable of physically or chemically removing or altering these materials. removal or alteration in the presence of damaging plasma processes. 
   One process for stripping photoresist from an FSG (fluorine doped silicate glass) involved the use of an H 2 /N 2  gas mixture in a plasma at 250° C. The hydrogen-based chemistry effectively removed the resist without negatively interacting with the FSG material. However, when the dielectric material was switched to OSG or CORAL®, a lower k, CDO-type dielectric, the H 2 /N 2  photoresist removal process at 250° C. resulted in nitrogen poisoning and substantial CH 3  loss in the CORAL® dielectric material. The Si—CH3 bonds in the CORAL® material give rise to the low-k property of this material, and its loss leaves an SiO 2  matrix and thus increases the dielectric constant. Replacing H 2 /N 2  plasma gas chemistry with H 2 /Ar in the plasma eliminated the nitrogen poisoning. However, some CH 3  loss remained although at a decreased level. Applying the H 2 /Ar chemistry to the ultra-low-k dielectric material known as JSR LKD-1509, another CDO dielectric material, which is MSQ-based, resulted in a more severe CH 3  loss than was observed for CORAL® dielectric material. Accordingly, the H 2 /Ar resist strip approach was abandoned in search for a more compatible chemistry. Some success was found with an RIE-like process using O 2  plasma. 
   While attempting to develop a wet clean process that was compatible with the O 2  resist strip, a key difference was found between the tools that had been used for CORAL® (OSG) plasma clean and JSR LKD-5109 plasma cleans. The new tool, used for the LKD-5109 plasma cleans, had a 300 mm platform, higher power density capability and a grid. The grid is a cage of metal with slits in it that surrounds the quartz reactor tube. The grid functions to capture the energetic species such as ions produced in the plasma and thus minimize ion exposure of and damage to the materials being processed. The grid had been removed from the prior generation 200 mm platform tool used to plasma clean the CORAL® films post trench and post via dielectric etch in order to achieve higher photoresist etch rates and process a greater number of wafers per hour. 
   The discovery of a difference in how the 200 mm and 300 mm tools effected CH3 loss from ultra-low-k CDO dielectric films led the inventors to try the previously abandoned H 2 /Ar resist strip process that had been used in the 200 mm tool in the new generation 300 mm tool. The new generation tool is capable of providing a higher power density at the wafer. There is roughly a 2X difference in power delivered to the wafer. However, without the discovery of the difference in how wafers processed in each tool with respect to retaining or losing Si—CH3 bonding following exposure of CDO films to a standard wet clean process which followed the plasma process, the increased power density alone would not be expected to produce the result of reduced damage to CDO material observed in the 300 mm tool relative to the 200 mm tool. Since the previously tried process resulted in significant damage to the CDO dielectric, if anything, a higher power density would be expected to cause even more damage through carbon loss in the dielectric film. Spurred on by the discovery of the difference in results for plasma plus wet clean sequences carried out in the two plasma tools (200 mm and 300 mm tools), the inventors were able to develop a resist strip process compatible with CDO dielectrics by using an H 2 /Ar chemistry with significantly higher power density delivered to the wafer without increased plasma (ion) damage to the film. The inventors believe this to be possible due to the presence of the grid in the 300 mm version of the process tool, which allowed an ion-free, or truly isotropic plasma condition. 
   An embodiment of the invention will now be discussed with reference to  FIGS. 1A–1F . A semiconductor body  102  is processed through the formation of a first interconnect layer. Semiconductor body  102  typically comprises a silicon substrate having transistors and other elements formed therein. Copper interconnect level  104  may be the first or any subsequent metal interconnect level of the semiconductor device  100 . 
   An etchstop layer  106  is deposited over the first interconnect layer  104 . An interlevel dielectric (ILD)  108  is formed over etchstop layer  106 . Intermetal dielectric (IMD)  110  is formed over ILD  108 . A trench etchstop layer (not shown) may optionally be placed between ILD  108  and IMD  110 . ILD  108  and IMD  110  comprise one or more of the CDO-class of dielectrics, such as the MSQ-based spin-on film LKD-5109 available from JSR. In the preferred embodiment, ILD  108  and IMD  110  comprise the same material. However, ILD  108  and IMD  110  may alternatively comprise different materials. A capping layer  112  may be formed over IMD  110  if desired. In the preferred embodiment, the capping layer  112  comprises silicon carbide. Alternatively, a silicon oxide, silicon nitride, silicon oxynitride (SiON), Si-rich nitride (SRN), or no capping layer may be used. 
   Referring to  FIG. 1B , a via resist pattern  114  is formed over capping layer  112 . The via  116  is then etched through IMD  110  and ILD  108 . 
   After the via etch, a resist strip according to the invention is performed, as shown in  FIG. 1C . A hydrogen-based plasma is used at high plasma density in the strip tool  160  with a structure  150  to capture the charged (ionic) species. In the preferred embodiment, structure  150  comprises a grid arranged to capture the charged species. The term high plasma density is used to refer to the plasma density at the wafer as a result of an RF power in the range of 500–2000 W in an isotropic plasma tool. No bias is applied. The chemistry preferably comprises H 2  and a diluent gas such as Ar, He, Ne, or Xe. Nitrogen should not be used as nitrogen tends to cause resist poisoning and is not inert in plasmas interacting with low k dielectric materials such as CDO materials (including spin-on and CVD). A wide range (e.g., 4%–100%) of H 2  concentrations may be used. 
   For the resist strip process, typical pressures may range from 0.3 Torr to 2 Torr. The total gas flow may, for example, range from 1 Ipm to 8 Ipm. The substrate temperature may, for example, range from 100° C. to 350° C. Substrate temperature affects the removal rate of photoresist. The optimal temperature has been found to be about 250° C. The duration of the process is based on photoresist removal rate (and thus temperature) and the amount of photoresist to be removed. A typical process time is in the range of 2 to 3 minutes. Plasma generation using microwave or radio frequency, or other suitable frequency, may be used. 
   In the preferred embodiment, an Aspen III platform available from Mattson Technology, Inc. is used as it includes a grid and is capable of providing the high density plasma and handling up to 100% H2 gas flow in the plasma. Using this tool, the preferred settings include a temperature of 250° C., a duration or 180 seconds, a pressure of 700 mT, a ICP power of 1250 W, and gas flows of 3960 sccm H 2 , and 2640 sccm Ar (60% H 2  by volume). The above process is a damage-free resist strip even in the case where no capping layer is present. While an RF power tool is used here, isotropic plasma tools could be used as well. 
   The resist strip is preferably followed by a wet clean. In the preferred embodiment, Air Products formerly Ashland-ACT Corporation chemical solvent clean known as NE-14™ is used for the wet clean. Other suitable solvents, such as ST-250 available from ATMI, Inc., are known in the art.  FIG. 2  is a graph showing the change in film thickness (etch delta) measured for various resist strip conditions from a CORAL° film experiencing plasma only and a combination plasma exposure plus an NE-14™ wet clean. EA51M in the figure refers to an Aspen III 300 mm platform ICP plasma tool. As shown in  FIG. 2  there is significantly less damage with a 3 minute ash (resist strip) in the Aspen III platform as compared to a 30 second strip in the Aspen II. Approximately 40 A film thickness change was observed for samples of CORAL® films exposed to a 3 minute 250° C. H/Ar ash and a 3′ ash followed by a 1 minute 27° C., NE-14™ clean, compared with 60 A film loss for 30 sec of 250° C. H/Ar ash in the 200 mm tool. No additional damage was observed for samples of CORAL® films that had been exposed to a 3 minute 250° C. H/Ar ash in the 300 mm tool followed by a 1 minute 27° C., NE-14™ clean. 
   Continuing with the process flow, in order to protect the bottom of via  116  during the subsequent trench etch, via  116  may be partially or completely filled. For example, an organic BARC (bottom anti-reflection coating)  117  may be deposited over the structure and etched back such that BARC material remains only in the via  116 . 
   Next, a trench pattern  132  may be formed over IMD  110 , as shown in  FIG. 1D . After trench pattern, a trench  118  is etched in IMD  110 , as shown in  FIG. 1E . Trench pattern  132 , and BARC  117  are then removed. The resist strip process according to the invention as described above for removing the via pattern may be used to remove the trench pattern  132  and BARC  117 . The resist strip process may also be used for any resist pattern reworks. The capping layer  112  and etchstop layer  106  are removed next during an etchstop etch. Copper interconnect structures will subsequently be formed in trench  118  and via  116 . 
   Barrier layer  120  is deposited over IMD  110  including in trench  118  and via  116 . Barrier layer  120  functions to prevent copper diffusion into the ILD and IMD layers. Suitable barrier materials such as Ta/TaN, Ti/TiN, TiW, and combinations and other such barrier materials are known in the art. 
   A seed copper layer is then deposited over barrier layer  120 . Electrochemical deposition (ECD) may then be used to deposit copper layer  124 . Various copper ECD processes are known in the art. 
   After copper ECD, the copper  124  and barrier  120  are chemically and mechanically polished (CMP) to remove the material from above IMD  110 . The resulting structure is shown in  FIG. 1F . Next level ILD and IMD may be deposited and processing may then continue to form additional metal interconnect levels and package the device. 
   Experimental Results 
     FIG. 3  illustrates FTIR spectroscopic data taken from processes run with variations in process time, ICP (RF) power, and the use of Ar and He as diluent gases used with 60% by volume H2 in the plasma. Similar FTIR spectra have also been obtained showing no discernable change to LKD-5109, BD2 or CORAL® films over a range of RF power, pressure, and gas composition. All have similar results showing no change in the FTIR spectra compared with control films that had not been exposed to plasma processing. 
   
     
       
             
           
             
             
             
             
             
             
             
           
             
             
             
             
             
             
             
           
         
             
                 
             
             
               Process Parameters for the Recipes Referred to in FTIR Data of FIG. 3 
             
           
        
         
             
                 
                 
               ICP Power 
               Time 
               H 2  Flow 
               Ar Flow 
               He Flow 
             
             
               Recipe 
               Pressure 
               (W) 
               (sec.) 
               (sccm) 
               (sccm) 
               (sccm) 
             
             
                 
             
           
        
         
             
               23 
               700 mT 
               1250 
               180 
               3960 
               2640 
               0 
             
             
               134 
               700 mT 
               1500 
               180 
               3960 
               0 
               2640 
             
             
               132 
               700 mT 
               1250 
               180 
               3960 
               0 
               2640 
             
             
               131 
               700 mT 
               1500 
               300 
               3960 
               2640 
               0 
             
             
                 
             
           
        
       
     
   
     FIG. 4  is a collection of X-ray photoelectron spectra (XPS) showing carbon  1   s  spectra obtained from BD2 films. The data shows little surface C loss from isotropic H/Ar plasma exposures in an Aspen III (A3) tool and greater loss from H/Ar plasmas from an Aspen II (A2) Mattson tool in which the ion-collecting grids were removed, therefore exposing the film to some ion content. 
     FIG. 5  is a collection of secondary ion mass spectroscopy (SIMS) carbon depth profile data obtained from BD2 films following exposure to 60% H/40% Ar plasmas in an Aspen III (A3) tool in which ion collecting grids were present and Aspen II (A2) tool in which the grids were removed. No subsurface carbon loss is observed from the films exposed to the A3 plasma, and C loss up to 400 A depth in the BD2 films was observed for up to 6′ plasma exposure using the same process in the A2 tool. 
   While this invention has been describe with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.