Abstract:
Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier are described. One example method of detecting head position in a hard-disk drive includes obtaining a read signal from a head reading information from a disk; determining a signal envelope of the read signal; comparing the signal envelope to a first threshold to produce a first comparison; filtering the signal envelope; comparing the filtered signal envelope to a second threshold to produce a second comparison; combining the first comparison and the second comparison; and determining if the combination of the first comparison and the second comparison indicates head position oscillation.

Description:
RELATED APPLICATIONS 
       [0001]    This application claims the benefit of U.S. Provisional Application No. 60/824,238, filed Aug. 31, 2006, and hereby incorporates the same by reference. 
     
    
     TECHNICAL FIELD 
       [0002]    The present disclosure pertains to computer systems and, more particularly, to methods and apparatus to perform hard-disk drive (HDD) head proximity detection in a preamplifier. 
       BACKGROUND 
       [0003]    Hard-disk drives use one or more disks or platters that rotate about a spindle with respect to one or more heads, such as read and/or write heads. The read or write heads read information from or impart information to the disk platters, but do not, in desired operation, physically contact the platters. To the contrary, HDD heads are suspended above the spinning platters by mechanical suspensions. Periodical amplitude modulation on read signals may be caused from the drive head due to a variation in head-disk proximity that may result from mechanical oscillations of the suspension. 
         [0004]    Recently, HDD heads have been designed to operate close to platters to communicate therewith. For example, a HDD read head may be positioned very close to a platter to read information from the platter via a reproduction signal. However, close HDD head proximity to the spinning platter increases the risk that the head may come in contact with the platter surface. Contact between a HDD head and a platter may cause performance degradation or destruction of the platter and/or head. An understanding of when a head is likely to contact a platter provides the ability to change operational aspects of the HDD to reduce or eliminate the risk of the head contacting the platter. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0005]      FIG. 1  is a diagram of a system including a HDD head proximity detector. 
           [0006]      FIG. 2  is schematic diagram showing additional detail of the drive reader and controller and the proximity detector of  FIG. 1 . 
           [0007]      FIG. 3  is plot of various electrical signals against time in a functioning circuit constructed in accordance with the schematic of  FIG. 2 . 
           [0008]      FIG. 4  is schematic diagram showing additional detail of an alternative implementation the drive reader and controller and the proximity detector of  FIG. 1 . 
           [0009]      FIG. 5  is plot of various electrical signals against time in a functioning circuit constructed in accordance with the schematic of  FIG. 4 . 
           [0010]      FIG. 6  is a plot of various logic signals shown in relation to timing parameters used within the digital band-pass filter of  FIG. 5 . 
           [0011]      FIG. 7  is a flow diagram of an example HDD head proximity detection process. 
       
    
    
     DETAILED DESCRIPTION 
       [0012]    As shown in  FIG. 1 , a HDD system  100  of a computer may include one or more platters  102 ,  104  that spin about a spindle  106 . One or more read or write heads  108 ,  110 , which pivot about an axis  112 , are provided above the platters  102 ,  104  for reading information from or writing information to the platters  102 ,  104 . 
         [0013]    In the read context, the heads  108 ,  110  are coupled to a drive reader and controller  114 , which, as described below in detail, processes signals from the heads  108 ,  110  to produce a read signal  115 . The read signal  115  may be passed to any number of different circuits that are provided in conjunction with processing signals from a HDD. Signals from the drive reader and controller  114  are also coupled to a HDD head proximity detector (hereinafter “proximity detector”)  116 , which, as described below, produces a proximity indication. 
         [0014]    As described below in detail, the proximity detector  116  monitors the positions of a head or heads (e.g., the heads  108  and/or  110 ) with respect to the platters (e.g., the platters  102  and/or  104 ) to determine when the heads are likely to contact the platters. In particular, the proximity detector  116  processes signals from the drive reader and controller  114  to determine when the heads are oscillating vertically with respect to the platters (i.e., when the distance between the platters and the heads is varying). Such oscillation may be due to mechanical structures supporting the heads  108 ,  110  and is represented in  FIG. 1  by the arrows  118  and  120 . The oscillation of the heads  108 ,  110  precedes the heads  108 ,  110  contacting the platters  102 ,  104 . Thus, if oscillations in the head proximity can be detected, corrective action may be taken to control the platters and the heads before the heads contact the platters. For example, when a head begins oscillating with respect to the platter, the platter spin speed may be changed to prevent such oscillations from increasing to a point at which the heads contact the platters. 
         [0015]    As shown in further detail in  FIG. 2 , the drive reader and controller  114  may include a number of discrete or integrated components. In one example, the drive reader and controller  114  may include a first differential amplifier  202  that receives differential signals from a read head (e.g., one of the heads  108  and  110 ). In one simplified example, each differential output from the amplifier  202  is coupled to a buffer  204 ,  206 . The read signal  115  is taken from the outputs of the buffers  204 ,  206 . Of course, as will be readily appreciated by those having ordinary skill in the art, the drive reader and controller  114  may include other discrete or integrated components that are not shown in  FIG. 1  for the sake of clarity. 
         [0016]    As shown in  FIG. 2 , in one example implementation the proximity detector  116  is also coupled to the output of the amplifier  202 . The example proximity detector  116  of  FIG. 2  includes an amplifier  210 , a peak hold circuit  212 , and a filter  214 , which may be implemented as a high pass or band-pass filter. The example proximity detector  116  also includes a pair of comparators  216 ,  218 . The comparator  216  compares an output from the peak hold circuit  212  to a threshold (Vth 1 ) and the comparator  218  compares the output from the filter  214  to a second threshold (Vth 2 ). The outputs of the comparators  216 ,  218  are provided to an AND gate  220 , the output of which is coupled to a digital band-pass filter  222  having an output coupled to a counter  224 . 
         [0017]    As described below, the peak hold circuit  212  produces an output signal that is the positive envelope of the signal from the amplifier  210 . The peak hold circuit  212  may be implemented using an integrated circuit and/or a transistor having an emitter that is connected to ground through a resistor/capacitor parallel combination. Thus, in a sense the peak hold circuit may operate as a low pass filter that tracks the peaks of the signal from the amplifier  210 . 
         [0018]    As noted above, the filter  214  may be a high pass filter or may be a band-pass filter. In one example implementation, the filter  214  may exclude high and direct current (DC) frequencies. In another example implementation, the filter  214  may be a high pass filter that excludes only high frequency signals. 
         [0019]    The operation of the proximity detector  116  of  FIG. 2  is now described in conjunction with the waveforms shown in  FIG. 3 . In particular, a number of nodes shown in  FIG. 2  include reference numerals and the signals shown in  FIG. 3  are labeled with numbers that correspond to the nodes in  FIG. 2 . The output of the amplifier  210 , as shown at  230  in  FIG. 3 , includes a first data area  302 , a gap-ID area  304 , which may be referred to as a non-data area, and a second data area  306 . As shown in  FIG. 3 , the second data area  306  includes an amplitude varying as a function of time, which represents modulation or oscillations that is present on the information signal within the second data area  306  due to head proximity variation that may be caused by, for example, mechanical structures supporting the heads  108 ,  110 , and/or the head and platter interaction. 
         [0020]    The output signals from the amplifier  210 , which is shown at reference numeral  230  is passed to the peak hold circuit  212 , which produces an output signal at a node identified by reference numeral  232 . The signal present at node  232  is shown at reference numeral  232  in  FIG. 3 . As shown in  FIG. 3 , the signal  232  is a signal that tracks the voltage peaks of the signal  230 . Therefore, the first data area  302  results in a first high signal portion  310 , the gap-ID area  304  results in a second high signal portion  312 , and the second data area  306  results in a second high signal portion  314 . 
         [0021]    Subsequently, the comparator  216  compares the signal  232  to the first threshold Vth 1  to result in an output signal shown at reference numeral  234 . As shown in  FIG. 3 , the signal  234  essentially a squared-up version of the signal  232 . That is, the signal  234  includes first, second, and third high portions  320 ,  322 ,  324  corresponding to the first, second, and third high portions  310 ,  312 , and  314  of the signal  232 . Because the modulation or oscillation in the second data area  306  results in peaks that are above the first threshold Vth 1 , the third high portion  324  is at a constant high level. Further, as shown in  FIG. 3 , the signal  234  includes gaps on either side of the second high portion  322 . These gaps correspond with the gaps in the gap-ID area  304  of the signal  230 . 
         [0022]    The signal  232  output from the peak hold circuit  212  is also coupled to the filter  214 . The filter  214  produces an output signal  236  as shown in  FIG. 3 . In particular, the signal  236  includes high and low peaks corresponding to relatively fast or sharp changes in the signal  232 . The portions of the signal  232  that track the envelope of the modulation or oscillation in the amplitude of the signal  230  also appear in the signal  236  because they are not removed by the filter  214 . 
         [0023]    The signal  236  from the filter  214  is compared to the second threshold Vth 2  by the comparator  218  to produce a comparator output signal  238 . As shown in  FIG. 3 , any portion of the signal  238  that exceeds the second threshold Vth 2  results in a logical one, or a high voltage level. Thus, the positive-going envelope transitions in the signal  230  eventually result in digital pulses in the signal  238 . This includes the positive-going transitions produced by the amplitude modulation on the envelope of the second data area  306 . 
         [0024]    The AND gate  220  logically ANDs the signals  234  and  238  to result in a signal that will be further processed to determine if there are oscillations in head proximity. In general, the comparison performed by the first comparator  216  clarifies the data area by ensuring that the signal in the gaps of the gap-ID area  304  remains a logical zero, or has a low value. By ANDing the output of the first comparator  216  with the signal from the second comparator  218 , the system ensures that the gap plays no role in the determination of the periodicity of pulses. In one example, the further processing may look for certain attributes of the signal  238  to determine if oscillations in head proximity are present. 
         [0025]    An alternate configuration of a proximity detector  114  is shown in  FIG. 4 . The proximity detector of  FIG. 4  is substantially similar to the proximity detector of  FIG. 2 , except that the proximity detector of  FIG. 4  includes a delay  402  coupled to the output of the comparator  216  and providing an input signal to the AND gate  220 . 
         [0026]    In operation, the delay  402  may have a value such as, for example, 5 microseconds (μs) and is responsive only to rising edges. That is, after the receipt of a rising edge, the delay blocks all signals from the comparator  216  to the AND gate  220  until the delay has expired. In general, the purpose of the delay  402  is prevent the AND gate  220  from receiving portions of the signal  234  thereby preventing the AND gate  220  from seeing the second high portion  322  (because the high portion  322  is shorter than the delay), as well as the beginning portions of the high portions  320  and  324 . 
         [0027]    As shown in  FIG. 5 , the signal  404  is a time delayed version of the signal  234 , wherein the time delay causes the signal  404  to omit portions of the signal  234 . For example, the high portions  320  and  324  are shortened and the high portion  322  is omitted all together. When ANDed with the signal  234 , the signal  404  causes the output of the AND gate  220  only to be high when the portions of the signal  234  corresponding to the oscillations or amplitude modulations are present. Thus, the results of the ANDing operation, which are shown at  406  of  FIG. 5 , represent only the oscillations or modulations that are present in the signal  230 . 
         [0028]    As described above, the output from the AND gate  220  is coupled to the digital band-pass filter  222  and the counter  224  for further processing. The digital band-pass filter  222  and the counter  224  look for particular periodicities in the pulses from the AND gate  220 . When pulses from the AND gate  220  occur a given timings, it is presumed that there oscillations in head proximity. The processing of the signals from the AND gate  220  is described below in conjunction with  FIG. 6 . 
         [0029]    Turning now to  FIG. 6 , example waveforms are shown at reference numerals  602 ,  604 , and  606 . The waveforms  602 ,  604 , and  606  represent output signals from the AND gate  220  of  FIG. 4 . A first rising edge in the waveforms  602 ,  604 ,  606  causes the digital band-pass filter  222 , which may be implemented using two one-shot timers (and/or other forms of timing logic) to start a first timing period, referred to as Tmod 1 . The rising edges of the waveforms  602 ,  604 , and  606 , are respectively referred to using reference numerals  602   a ,  604   a , and  606   a . At the expiration of Tmod 1 , a second timing period, referred to as Tmod 2 , is started. According to one example, the timings of Tmod 1  and Tmod 2  both may be 4 μs for a data modulation frequency of 125 kilohertz (Khz) to 250 Khz, wherein a typical modulation frequency is 200 Khz. Of course, the timing periods, or time constants, for the one-shot circuits generating Tmod 1  and Tmod 2  may be programmable so that Tmod 1  and Tmod 2  could be altered to operate with different modulation frequencies, temperatures, or operating conditions. The programmability of the timing periods renders the pass-band programmable. The counter  224  keeps track of consecutive rising edges, one of which occurs within Tmod 1  and one of which occurs during Tmod 2 . 
         [0030]    As shown in conjunction with the signal  602 , after the first rising edge  602   a  is received, if a second rising edge  602   b  is received by the digital band-pass filter  222  during Tmod 1 , the counter  224  keeping track of successive rising edges having the proper spacing (i.e., one and only one rising edge occurring during Tmod 1  and one and only one rising edge occurring during Tmod 2 ) is reset. After the expiration of Tmod 2 , the next rising edge  602   c  will restart the timing period Tmod 1 . 
         [0031]    As shown in the waveform  604 , the first rising edge  604   a  starts Tmod 1  and a second rising edge  604   b  occurs during the timing period Tmod 2 . The receipt of the second rising edge  604   b  during Tmod 2  causes the counter  224  to be incremented and also causes a subsequent timing period Tmod 1  to be started. This process of receiving rising edges during Tmod 1  and Tmod 2  will continue as long as the head proximity is oscillating with periodicity and thereby causing the properly spaced pulsed owning to the oscillations in the read signal and, thus, the counter  224  will increment during oscillations of the drive heads. 
         [0032]    As shown in the waveform  606 , the first rising edge  606   a  starts Tmod 1 . At the end of Tmod 1 , Tmod 2  begins, but no rising edge is received during Tmod 2 . However, when a subsequent rising edge  606   b  is received after the expiration of Tmod 2 , the counter  224  is reset to a count of zero, which indicates that the periodicity of the signals received is not indicative of an operation having oscillations. 
         [0033]    Thus, the combination of Tmod 1  and Tmod 2  operates as a digital filter looking for two pulses, having spacing such that one of which occurs during Tmod 1  and one of which occurs during Tmod 2 . 
         [0034]    Of course, various actions may be taken in response to counter values. For example, drive speed may be reduced in response to the counter  224  reaching a particular value because such a value indicates that the head is oscillating in its proximity to the disk surface. To this end, one or more other entities, such as disk controllers, etc. may read the counter status. 
         [0035]    As shown in  FIG. 7 , a HDD proximity process  700  obtains read signals (block  702 ) and performs peak detection on the read signals (block  704 ), which may result in a waveform similar to the waveform  232  of  FIGS. 3 and 5 . In a first comparison, the process  700  compares the peak detection to a first threshold (block  706 ). The results of the comparison may be similar to the waveform shown at reference numeral  234  of  FIGS. 3 and 5 . 
         [0036]    Subsequently, the peak detection is filtered by, for example, a high pass filter or a band-pass filter (block  708 ). The filtered peak detection is then compared to a second threshold (block  710 ), which may result in a signal such as the signal shown at reference numeral  238  of  FIGS. 3 and 5 . 
         [0037]    The comparison results from blocks  706  and  710  are then combined by, for example, a logical AND function (block  712 ). Of course, as described above in conjunction with  FIGS. 4 and 5 , the combination may include delaying, shortening, or omitting one or more of the signals to be compared. The process  700  then determines if the pulses of the combined comparison results are properly spaced to indicate head oscillation (i.e., if the pulses have the proper frequency) (block  714 ). As described above in conjunction with  FIG. 6 , this determination may be made using a digital band-pass filter  222  that may be implemented using one-shot timers that may be programmable. If the pulses are properly spaced, the process  700  continues and may, optionally, increment a counter indicating the number of properly spaced pulses that have been received and may indicate a fault or other condition upon which action may be taken (block  716 ). Corrective action may include changing drive speed or modifying other operational aspects of the drive system. In the alternative, if the pulses are not properly spaced, the process  700  continues to operate. 
         [0038]    The foregoing process may be implemented using hardware, software, firmware, or any suitable combination thereof. For example, the forgoing process may be implemented using the circuit diagrams described herein or may be implemented using a processor, such as a digital signal processor or the like, programmed with software or other instructions. 
         [0039]    Although certain apparatus constructed in accordance with the teachings of the invention have been described herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers every apparatus, method and article of manufacture fairly falling within the scope of the appended claims either literally or under the doctrine of equivalents.