Abstract:
A device for activating an electronic slave flash unit for photographic use includes a circuit wherein there is a delay circuit responsive to a light sensing signal after a predetermined time delay to activate a flash unit. The time delay of the delay circuit is adjustable as required, and the delayed operation of the flash of the slave flash unit eliminates incorrect impulse signals being transmitted to light sensors of other slave flash units which would otherwise prematurely extinguish their flash and give a resultant incorrect lighting effect. The power for the circuit is obtained from a capacitor which is energized by a flash unit. The energy in the capacitor is used to power the delay circuit, and a Zener diode and unijunction transistor and variable resistance permit accurate variable time delays.

Description:
DESCRIPTION 
     This invention relates to photographic apparatus. In particular, the invention is directed to slave flash units, and devices for triggering slave flash units. 
     A slave flash unit is a device which is used in conjunction with a master flash unit to provide fill-in or background lighting in photography. The slave flash units are located at different points and provide light as required for the photograph. The slave flash is related to the main flash so that requisite lighting ratios are achieved for optimum lighting effect such as key, fill, highlight and background lighting. A master flash unit is a unit which is directly operated by a camera, and on shutter activation, the master unit fires its flash and conventionally slave units operate simultaneously. The slave units are, conventionally, either connected to the master unit by wires or have electronic light sensor means which respond to light from the master flash such that their operation is triggered. 
     In the operation of an electronic flash unit, the activation of the camera shutter triggers the flash, causing light to be generated. If the flash is of the automatic type, extinction of the flash can occur after a predetermined amount of light is reflected from the scene being photographed and detected by a sensor associated with the flash. 
     However, when an automatic flash is used in a master-slave arrangement, difficulties are encountered. More particularly, when the master flash unit and slave flash units flash, light from some or all of the slave flash units may be received at the sensor of the master flash unit. This means that excessive light is received at the master unit causing the master flash unit to extinguish too quickly and resulting in an improperly exposed subject. If the slave flash units are also of the automatic type, similar difficulties may be encountered which cause the slaves to extinguish prematurely, thereby upsetting the desired lighting ratios between the master and slave units. Thus it has been conventional to require that flash units be operated in a manual mode if used in a master-slave arrangement. 
     Although various arrangements for master-slave flash units are known in the art, none have solved the difficulties discussed above. More particularly, there exists U.S. Pat. No. 3,590,314 which is directed to electronic flash lamp apparatus, using a plurality of electronic flash tubes fired in quick succession and having a photo responsive circuit which stops the firing sequence when light produced by the tubes reaches a cumulative total sufficient for the intended purpose, thereby saving stored energy for subsequent firing operations. U.S. Pat. No. 2,776,364 discloses a means of concentrating the light for a slave unit such as to make the slave unit responsive to operation at greater distances. In U.S. Pat. No. 3,487,221 there is disclosed a light activated triggering device which has an extremely fast response time for a slow flash unit. U.S. Pat. No. 3,288,044 discloses a trigger circuit for generating a high voltage trigger pulse for slave flash tubes which fire simultaneously. In U.S. Pat. No. 3,196,275 the disclosure is of a circuit which operates at great speed with no time-consuming elements such that the slave unit can operate effectively on triggering by light from an incandescent flash bulb of the camera. U.S. Pat. No. 2,486,010 discloses an arrangement for reducing the time delay between a master control and the ignition of a flash bulb to the order of microseconds so that synchronization problems are minimized, such problems being caused by voltage drops which increase the heating time of a fuse or element within the flash bulb, such fuse being melted by the heat of a firing current passing through. Other prior art of general interest relating to slave flash units are U.S. Pat. Nos. 3,312,086 and 3,917,944, which relate respectively to a slave flash unit carrying a plurality of bulbs which are brought one at a time into readiness for firing, and an accessory for a slave device having a light sensor and a rotatable hot shoe allowing the electronic flash to be aimed as desired. 
     The present invention includes means for permitting a plurality of automatic flashes to be used in a master-slave arrangement by delaying the triggering of each successive slave unit until after each preceding flash has been extinguished. 
     More particularly, according to the present invention there is a device for activating an electronic slave flash unit which includes a circuit wherein there is a delay circuit responsive to a light sensing signal after a predetermined time delay to activate a flash unit. 
     In a preferred form of the invention, the flash unit includes light sensing means which are responsive to a light impulse to generate a signal. A switch which is responsive to such signal transmits in turn a trigger signal to a delay circuit which is operative after a prerequisite time delay to transmit a switching signal to activate the flash unit. 
     Preferably, the time delay is determined by the delay circuit itself which includes a unijunction transistor and a bank of different resistors or a variable resistance, the particular resistance being chosen by the user to determine the appropriate time delay. 
     A capacitor with a stored charge preferably provides the energy for powering the circuit, and the trigger signal is the outflow of power stored in the capacitor circuit. This power is placed across a capacitor for the delay circuit and a Zener diode regulates the power such that the voltage to the delay circuit is maintained constant. 
    
    
     FIG. 1 is a schematic block diagram of a circuit in accordance with the invention. 
     FIG. 2 is a graphic representation of the time sequences of a master flash unit and two slave triggering units. 
     FIG. 3 is a schematic of a circuit of a slave flash unit with a delay circuit. 
     FIG. 4 is a perspective representation of one embodiment of a slave flash unit in accordance with the invention. 
     FIG. 5 is a front elevation view of the slave flash unit, with part of the front broken away. 
     FIG. 6 is a rear elevation view of the unit. 
     FIG. 7 is a side elevation view of the unit. 
     FIG. 8 is a schematic of a different circuit embodiment of a slave flash unit with a delay circuit. 
    
    
     Referring to FIG. 1 of the drawings, a light sensor indicated by numeral 10 detects light impulses from a master flash which may or may not be a flash directly associated with the camera. The light sensing means 10 generates a signal which is fed by leads 11 and 11b to a switch unit 12 which in turn operates via leads 13 and 14 a time delay circuit means 15. The circuit 15 is illustrated as having a switch 16 which can be set to one of three settings indicated by numerals 0, 1 and 2, each having a graphic representation showing different time delays. The delay circuit 15, after the prerequisite delay, fires a switch 19 through leads 17 and 18. The closure of the switch 20 closes the circuit through terminals 22 and 23 and thereby places the trigger voltage across the flash unit 24, which fires. 
     In reference to FIG. 2, the first graphic representation being line (a) depicts the light pulse from the master flash unit which may, for example, have an overall effective duration on the order of one millisecond. The pulse is effectively shown as occupying the space of about 0.25 milliseconds. Graphic representation line (b) depicts the time delay of one millisecond and read with graphic representation of line (c) indicates when the first slave unit would be synchronized to operate, namely, after about one millisecond delay. The flash duration of the slave unit #1 would be, also as depicted, about 0.35 milliseconds. Graphic representation line (d) represents a two millisecond delay effective for a second slave triggering unit and read with line (e) depicts the operation of the second slave flash unit as commencing operation after a two millisecond delay from initiation of the flash by the master flash unit. The flash duration of slave unit #2 is shown in the order of 0.1 millisecond. 
     Between commencement of the flash of the master flash unit and finalization of the flash of the second slave unit, a time not far greater than two milliseconds has endured which is well within the operating times of a camera shutter speed. A 1/30th second shutter speed is representative of 33 milliseconds, a 1/60th second shutter speed 16 milliseconds, and a 1/125th second shutter speed would represent 8 milliseconds. In this fashion, therefore, the various flashes will each take place sequentially while the shutter is open. At the same time, no interference of the flashes from the various flash units occurs, one to the other, so that the flashes of the different flash units will not be sensed by the light sensors of other flash units. In this fashion, the proper amount of light reaches the subject from each flash without premature extinction of any flash due to interference from one or another of the units. 
     The detailed schematic operation of FIG. 3 will now be described. The exemplary circuit for an electronic slave flash unit employs as a light sensing means a photodiode stack 25, the light rays being indicated by arrows 26. Connected across the photodiode stack is a resistor 27 which improves the speed response characteristics of the photodiode 25. The output from the photodiode 25 is connected to a capacitor 28 which acts to filter out any steady-state signal that results when ambient light 26 impinges on the diode 25, thereby permitting only impulse light from the flash to pass to an amplifier stage 29a of the circuit, described immediately hereinafter. 
     The amplifier stage 29a includes a transistor 29 together with appropriate biasing circuitry in the form of a biasing resistor 30, a loading resistor 31, and another pair of biasing resistors 58 and 59. The resistors 58 and 59 form a voltage divider, with the collector of the transistor 29 being connected at the junction thereof. The remaining terminal of the resistor 59 is connected to the positive terminal 53 of the trigger line of an associated flash (not shown) via a conventional connector 55, while the remaining terminal of the resistor 58 is connected to the reference side 54 of the connector 55. A capacitor 73 provides suitable decoupling. 
     The biasing resistor 30, which may for example have a value of one megohm, provides bias to the base of the transistor 29 and also ensures a relatively low current through the amplifier stage 29a. The load resistor 31, nominally one kilohm, biases the gate of a thyristor 32 and sets the level of light incident on the detector 25 which is necessary to trigger the thyristor 32, thereby ensuring that the thyristor 32 does not fire prematurely. 
     The thyristor 32 responds to a gating signal provided from the amplifier stage 29a by connecting a charged capacitor 33 to a delay circuit indicated generally at 33a through a resistor 34, thereby energizing the delay circuit 33a. Energy is supplied to the capacitor 33 from the flash unit via the terminal 53 and a resistor 57, which sets the charging rate of the capacitor 33. A suitable time constant for such charging may be on the order of two seconds. 
     Once the thyristor 32 has been triggered, the discharge current supplied by the capacitor 33 charges another capacitor 35 until a voltage set by a zener diode 36 is reached. For the exemplary circuit shown in FIG. 3, the zener diode 36 may avalanche at twenty-five volts. The resistor 34 mentioned above limits the current supplied to the zener 36, thereby preventing overloading, and also regulates the discharge rate of the capacitor 33. 
     The delay circuit 33a which is energized from the capacitor 33 includes a unijunction transistor 37 and associated biasing resistors 38 and 40, together with a capacitor 43, a plurality of selectable resistors 45-49, and a selection switch 50. More particularly, the gate of the unijunction transistor 37 is connected to the junction of the resistors 38 and 40, with the remaining terminal of the resistor 38 being connected to the output of the thyristor 32 and the remaining terminal of the resistor 40 being connected to the reference side 54 of the connector 55. The capacitor 43 is connected to a selected one of the resistors 45-49 through the switch 50, while the gate of the unijunction transistor 37 is connected to the junction of the capacitor 43 and switch 50. The switch 50 may be of the rotary type as will be better appreciated in connected with FIG. 5. 
     The values of the resistors 45-49 are preferably varied over a substantial range to provide, in connection with the remainder of the delay circuit 33a and particularly the capacitor 43, a plurality of delay characteristics for the delay circuit 33a. Exemplary resistive values are on the order of 1.5, 15, 30, 40 and 62 kilohms, with the capacitor 43 having a nominal value on the order of 0.0047 microfarads. Those skilled in the art will recognize that a wide variety of resistor and capacitor values may be utilized to provide the desired results. 
     The cathode of the unijunction transistor 37 is connected to the gate of another thyristor 52, the remaining terminals of which are connected across the terminals 53 and 54 of the connector 55. The thyristor 52, once activated, can thus be seen to trigger the flash unit connected at the connector 55. A resistor 56 is connected between the gate of the thyristor 52 and the reference terminal 55, and loads the transistor 37 while at the same time biasing the thyristor 52 to ensure against premature triggering and shutdown. 
     In operation of the circuit, ambient and impulse light rays 26 impinge upon the photodiode 25 and by means of the capacitor 28, only impulse light rays 26 pass through to be amplified by the amplifier stage 29a. The thyristor switch 32 is operated by a signal from the amplifier 29, and causes prestored energy in capacitor 33 to pass as a trigger signal, thereby charging the capacitor 35 and placing a voltage on line 39 as regulated by the zener diode 36. The energy stored in capacitor 35 discharges through the delay circuit 33a constituted by unijunction transistor 37, resistors 38, 40, capacitor 43 and one of the resistors 45-49 as chosen to provide a predetermined time delay. After this time delay, a signal passes through the cathode terminal 51 to the main switching thyristor 52. This signal acts to gate the switching thyristor 52 which causes the flash unit to be fired by shorting the contacts 53 and 54 therethrough, and also permits the capacitor 33 to discharge. 
     Typically, the delay circuit with the bank of resistors 45-49 can be designed for a delay between zero and about 10 milliseconds, depending on the value of the particular resistor coupled into circuit. Conventional camera shutter speeds, for flash synchronization, operate between eight milliseconds (shutter speed 125) and thirty-three milliseconds (shutter speed 30). Thus, by arranging delay circuits to operate at any one of the chosen delay intervals, a suitable sequence of flashes can be set up within the shutter open time and wherein interference of one flash to another and premature extinction of flashes are avoided. 
     In FIGS. 4, 5, 6 and 7 an embodiment wherein the electronic slave flash circuitry can be housed is illustrated, and this is shown as a casing 60 on which is mounted a shoe 61 for a flash unit (not shown). The electrical contact for the flash unit is indicated by the numeral 62. A rotary switch 63 is indicated at the rear end of the casing and alignment of the indicators 64, 65, 66, 67 or 68 on the casing body 60 with markings 69 on the rotary switch 63. This will correspond to setting the delay circuit with one of the chosen resistors 45-49 in the circuit by means of the switch 50. On the forward end of the casing there is a shade 70 within which is housed the photodiode 25. The device itself can be suitably mounted through a foot 72 on a support tripod or the like. The powering arrangement of the delay circuit through the zener diode 36 and storage capacitor 33 creates an accuracy which is sufficient to ensure timely operation of the delay circuit and this is important in view of the precise timing sequences which are necessary in order to achieve effectively the object of the invention. In place of the electrical contact through terminal 62, a flash may be connected by cable to the contact pin 71 in the side wall of the casing 60. 
     In the embodiment of the invention illustrated in FIG. 8, the photodiodes 25 receive the flash impulse and ambient light is filtered out by choke 73 such that the impulse from the flash will pass to SCR 74. Resistor 75 acts as a filter to ensure against false triggering of the gate of SCR 74. Power is supplied from the flash unit (not shown) through contacts 55 and in turn is stored on capacitor 33. The central terminal will be about 200 volts positive. Resistor 85 permits the energy from terminal 55 to charge the capacitor 33 up to the requisite level for the circuit. Triggering the SCR 74 permits discharge of energy from capacitor 33 and through resistor 76 thereby causing capacitor 35 to become charged. 
     Zener diode 36 causes the level of the voltage across capacitor 35 to be clamped in this example to 25 volts. This voltage is divided by resistors 77 and 78 which are across the gate terminal 79 of a programmable unijunction transistor (PUT) 80. Resistor 78 is variable thereby permitting variation of the threshold level of PUT 80 by changing the voltage point on gate 79. Resistor 81 charges capacitor 82 which has connected between them the anode terminal 83 of the PUT 80, and when the voltage on anode 83 exceeds the voltage on gate terminal 79, the PUT 80 fires. This causes voltage drop across resistor 84 which triggers SCR 52 and in turn causes the flash to operate in the manner described above with regard to the circuit of FIG. 3. 
     Variation of resistance 78 between a value of 47 kohms and 15 mohms varies the time delay between 0.75 msec and 50 msec. Changing the capacitor 82 can also cause variation of the time delay of the circuit. 
     This circuit can also be accommodated in a housing in similar form to the manner described above with reference to the circuit illustrated in FIG. 3. 
     Although the invention has been described with reference to an automatic flash operation it is possible to have the flash units operate in a manual fashion. This would be, for instance, in strobe photography where individual units are set for different time delay sequences, whereby each flash provides a different exposure during the single shutter opening. 
     While embodiments and applications have been shown and described, it will be apparent to those skilled in the art that many more modifications are possible without departing from the inventive concepts herein described, and as fall within the scope of the appended claims.