Abstract:
An exemplary Mobile High-Definition Link (MHL) data converter includes: a data decoding circuit, arranged for decoding an input data according to an MHL specification, and outputting a decoded data; and a data parsing circuit, coupled to the data decoding circuit, arranged for parsing out a plurality of output data from the decoded data. An MHL data converting method includes: decoding an input data according to an MHL specification, and outputting a decoded data; and parsing out a plurality of output data from the decoded data.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The disclosed embodiments of the present invention relate to data conversion, and more particularly, to a Mobile High-Definition Link (MHL) data converter and related data converting method. 
         [0003]    2. Description of the Prior Art 
         [0004]    The MHL specification is an innovative technique for mobile audio/video (AV) links, which allows mobile devices to output high definition 1080P films with 60 Hz frame rate to large-size monitors. One end of the MHL can perform data and AV link via the conventional micro USB 2.0 port, and the other end of the MHL can connect to a television (TV) or a monitor via a High Definition Multimedia Interface (HDMI). 
         [0005]    When a conventional HDMI cable is used to receive MHL data, a dedicated MHL media access control (MAC) circuit is needed in addition to the HDMI MAC circuit. However, two sets of MAC circuits inevitably increase chip area and production cost. Thus, an innovative design can allow the existing receiver to receive the MHL data efficiently and economically. 
       SUMMARY OF THE INVENTION 
       [0006]    Therefore, one of the objectives of the present invention is to provide a Mobile High-Definition Link (MHL) data converter and related data converting method. 
         [0007]    According to a first aspect of the present invention, a Mobile High-Definition Link (MHL) data converter is disclosed. The MHL data converter includes a data decoding circuit and a data parsing circuit. The data decoding circuit is arranged to decode an input data according to an MHL specification, and outputting a decoded data. The data parsing circuit is coupled to the data decoding circuit, arranged to parse out a plurality of output data from the decoded data. 
         [0008]    According to a second aspect of the present invention, a Mobile High-Definition Link (MHL) data converting method is disclosed. The MHL data converting method includes: decoding an input data according to an MHL specification, and outputting a decoded data; and parsing out a plurality of output data from the decoded data. 
         [0009]    These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]      FIG. 1  is a diagram illustrating an embodiment of an MHL data converter according to the present invention. 
           [0011]      FIG. 2  is a diagram illustrating the data decoding circuit in  FIG. 1  that uses a control period to identify the data boundary. 
           [0012]      FIG. 3  is a diagram illustrating the data decoding circuit in  FIG. 1  that uses a guard band to identify the data boundary according to an embodiment of the present invention. 
           [0013]      FIG. 4  is diagram illustrating the data decoding circuit in  FIG. 1  that uses a guard band to identify the data boundary according to another embodiment of the present invention. 
           [0014]      FIG. 5  is a diagram illustrating the data decoding circuit in  FIG. 1  that uses a guard band to identify the data boundary according to yet another embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0015]    Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is electrically connected to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections. 
         [0016]    Please refer to  FIG. 1 , which is a diagram illustrating an embodiment of an MHL data converter according to the present invention. In this embodiment, the MHL data converter  100  includes a data decoding circuit  102  and a data parsing circuit  104 . The data decoding circuit  102  is arranged to decode an input data d_in generated from a physical (PHY) layer  106  according to an MHL specification, and accordingly output a decoded data d_out. The data parsing circuit  104  is coupled to the data decoding circuit  102 , and arranged to parse out a decoded data d_out of one channel outputted from the decoding circuit  102  according to an HDMI specification to thereby obtain the output data of a plurality of channels. For instance, output data d_out 1 , d_out 2 , and d_out 3  of three channels correspond to three primary colors R, G, and B respectively. However, this is not meant to be a limitation of the present invention. In addition, the data parsing circuit  104  further transmits output data d_out 1 , d_out 2 , and d_out 3  to a Media Access Control (MAC) circuit  108 , which complies with an HDMI specification. The MHL data converter  100  converts the MHL data (i.e., video, audio and control signals) into the HDMI data, and thus allows the HDMI data to be directly processed by the MAC circuit  108 . 
         [0017]    Regarding the data decoding circuit  102 , it compares at least one known data pattern defined by the MHL specification with the input data d_in to find out data boundaries, and decodes the input data d_in according to the identified data boundaries to output the decoded data d_out. Please refer to  FIG. 2 , which is a diagram illustrating the data decoding circuit  102  of the MHL data converter of the present invention that uses a control period. In the 24 bit per pixel (BPP) mode, if the data decoding circuit  102  receives a data pattern of three consecutive control periods, then the following received data is data of one of the three channels by turns periodically, that is, d_out_ch 0 , d_out_ch 1 , d_out_ch 2 , d_out_ch 0 , d_out_ch 1 , d_out_ch 2 , and so on. On the other hand, in the packed-pixel mode, if the data decoding circuit  102  receives a data pattern of two consecutive control periods, then the following received data is d_out_ch 0 , d_out_ch 1 , d_out_ch 0 , d_out_ch 1 , and so on. 
         [0018]      FIG. 3 ,  FIG. 4  and  FIG. 5  are diagrams illustrating the data decoding circuit  102  of the MHL data converter of the present invention that uses a guard band. As shown in  FIG. 3 , in the 24 BPP mode, if the data decoding circuit  102  receives a data pattern composed of a Ch 1  data island leading and a Ch 2  data island leading, then the following received data is d_out_ch 0 , d_out_ch 1 , d_out_ch 2 , d_out_ch 0 , d_out_ch 1 , d_out_ch 2 , and soon. On the other hand, in the packed-pixel mode, if the data decoding circuit  102  receives a data pattern of a single Ch 1  data island heading, the following received data is d_out_ch 0 , d_out_ch 1 , d_out_ch 0 , d_out_ch 1 , and so on. As shown in  FIG. 4 , in the 24 BPP mode, if the data decoding circuit  102  receives a data pattern composed of a Ch 1  data island trailing and a Ch 2  data island trailing, it means the end of the received data. On the other hand, in the packed-pixel mode, if the data decoding circuit  102  receives a data pattern of a single Ch 1  data island trailing, it means the end of the received data. As shown in  FIG. 5 , in the  24  BPP mode, if the data decoding circuit  102  receives a data pattern composed of a Ch 1  video leading and a Ch 2  video leading, then the following received data is d_out_ch 0 , d_out_ch 1 , d_out_ch 2 , d_out_ch 0 , d_out_ch 1 , d_out_ch 2 , and soon. On the other hand, in the packed-pixel mode, if the data decoding circuit  102  receives a data pattern composed of a Ch 1  data island heading and a Ch 1  video heading, then the following received data is d_out_ch 0 , d_out_ch 1 , d_out_ch 0 , d_out_ch 1 , and so on. 
         [0019]    After the data decoding circuit  102  successfully finds out the data boundaries based on control period (s) and/or guard band (s), the decoded data d_out is outputted to the data parsing circuit  104 , and then the data parsing circuit  104  converts the serially transmitted decoded data d_out into the parallel output data d_out 1 , d_out 2 , and d_out 3 , and transmit the parallel output data d_out 1 , d_out 2 , and d_out 3  to the MAC circuit  108  (the BPP mode). Alternatively, the data parsing circuit  104  converts the serially transmitted decoded data d_out into the parallel output data d_out 1  and d_out 2 , and transmit the parallel output data d_out 1  and d_out 2  to the MAC circuit  108  (the packed-pixel mode). 
         [0020]    By using the MHL data converter and the MHL data converting method proposed by the present invention, the HDMI receiver is allowed to comply with the MHL specification without adding too much hardware cost, thus achieving the objective of reducing cost. 
         [0021]    Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.