Abstract:
A pulse-width-modulation (PWM) control system with nonlinear ramp is disclosed. A nonlinear ramp generator generates a nonlinear ramp varied with the duty (V out /V in ) in a waveform signal, which could be a logarithm ramp, an exponent ramp, a multi-piecewise-linear ramp, a power ramp or a combination of above. The slope of the ramp is not a constant due to the non-linear characteristic. The voltage V ramp  will vary with the input voltage V in , output voltage V out , and duty (V out /V in ), therefore it will reduce the influence of the input voltage V in  or output voltage Vout on the modulation gain and loop gain, even to keep the modulation gain and loop gain in constant value. As mentioned-above, the present invention improves the transient response of system, the sensitivity for variation of V in  and V out , thus it is capable of correcting the output voltage quickly, for supplying a more steady power output.

Description:
FIELD OF THE INVENTION 
   The present invention relates generally to a pulse-width-modulation control system with a ramp, and more specifically, to a pulse-width-modulation control system with a nonlinear ramp, which is a function of duty. 
   DESCRIPTION OF THE PRIOR ART 
     FIG. 1  illustrates a traditional PWM (Pulse Width Modulation) control system. A ramp voltage provided by a ramp generator  103 , usually a triangular or sawtooth waveform signal, is used to compare with an error output amplified by an error amplifier  100 . The comparison is done via a PWM controller  106 , and thus a duty signal is generated to control a gate driver  109 . 
   The gate driver  109  switch to control two transistors M 1  and M 2  being either on or off, thus a input voltage V in  could storage or release energy via an induction L and a capacitor C out  and transfer to an output voltage V out  according to the equation: V out =duty*V in . The output voltage V out  is electrically connected to two resistors R 1  and R 2  then connecting to the negative terminal of the error amplifier  100  as a feedback voltage. In additional, a reference voltage V ref  is connected to the positive terminal of the error amplifier  100 . The output voltage V out  is adjusted each cycle to achieve constant value by comparing the reference voltage V ref  to the feedback voltage via the error amplifier  100  to generate an error output, and comparing the error output to the ramp voltage via the PWM controller  106  to obtain a reset signal for the gate driver  109 . The loop gain of the single cycle PWM control system is the feedback factor multiplied by the gain of the error amplifier  100  and multiplied by the modulation gain of the PWM controller  106 , where the feedback factor depend on the resisters R 1 , R 2 , R 3 , R 4  and capacitors C 1 , C 2 , C 3 , C 4 , and where the modulation gain of the PWM controller  109  equals V in /V ramp . The V ramp  has a constant slope, thus a variation of the input voltage V in  will cause varying the modulation gain of the PWM controller  109  and hence cause varying the loop gain of the single cycle PWM control system. 
     FIG. 2  is a time vs. performance curve based on the structure shown in  FIG. 1 . The x-axis represents the time, and the reference voltage V ref , the ramp voltage generated by the ramp generator  103  and the duty signal generated by the PWM controller show their responses if the feedback voltage is suddenly dropping due to a variation of the input voltage V in  or a great quantity loading of the output voltage V out  being encountered. At time t 1 , the dropping of the input voltage or the output voltage causes the dropping of the feedback voltage since they are electrically connected through the resistors R 1 , R 2  (see  FIG. 1 ), and the error output is rising in the meanwhile due to the deviation departing from the target i.e. the reference voltage V ref  being getting large. The PWM controller  106  control works by switching the duty signal supplied to the gate driver  109  on and off very rapidly. The DC voltage is converted to a square-wave signal, alternating fully on while the error output is higher than the ramp voltage, and alternating fully zero while the error output is lower than the ramp voltage. At time t 2 , the error output is large enough to switch the duty signal fully on, to switch the transistor M 1  (see  FIG. 1 ) on and to switch the transistor M 2  off via the gate driver  109 , hence the output voltage is corrected via the inductor L and capacitor C out . After that, the deviation between the reference voltage V ref  and the output voltage V out  is beginning to close. At time t 3 , the output voltage V out  is high enough closing to the reference voltage, thus the feedback voltage is beginning to rise to the steady value. 
   The correction of the PWM control system for the dropping of the feedback voltage is a transient response. In general, it is too slow to adjust the output voltage in time, thus its voltage value may be too low to supply a voltage sufficiently to the circuits that it is connected, consequently causing the erroneous activity. In addition, the modulation gain of the PWM controller varies with the input voltage V in  easily. It is necessary to reset and estimate the loop stability while a power supply is replaced. And if the input voltage is too high or the duty signal is too low, the gain of the PWM controller is too high to back the feedback voltage to the steady state. 
   Therefore, it would be an advantageous to have a novel PWM control system that allow for correcting the deviation quickly, keeping the loop more stable and estimating the stability conveniently. 
   SUMMARY OF THE INVENTION 
   It is therefore a general object of the present invention to provide a novel PWM control system with a better transient response. 
   A further object of the present invention is to keep the loop more stable and to estimate the loop stability conveniently. 
   According to the objects, the present invention provides a novel PWM control system that includes a nonlinear ramp generator to generate a nonlinear ramp, which is a waveform signal and varied with the duty, and it could be a log ramp, a exponential ramp, a multi-piecewise-linear ramp, a power ramp etc . . . . The slope of the ramp is not a constant due to the non-linear characteristic. The voltage Vramp will vary with the input voltage Vin, output voltage Vout, and duty (Vout/Vin), therefore it will reduce the influence of the input voltage Vin or output voltage Vout on the modulation gain and loop gain, even to keep the modulation gain and loop gain in constant value. As mentioned-above, the present invention improves the transient response of system, the sensitivity for variation of Vin and Vout, thus it is capable of correcting the output voltage quickly, for supplying a more steady power output. 
   Further scope of the applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  is a circuit diagram of conventional PWM control system. 
       FIG. 2  is a time vs. performance diagram based on the conventional PWM control system. 
       FIG. 3  is a circuit diagram of one embodiment according to present invention. 
       FIG. 4  is a block diagram of the nonlinear ramp generator of one embodiment according to present invention. 
       FIG. 5  is a block diagram of nonlinear ramp generator as well as a circuit diagram of ramp generator of one embodiment according to present invention. 
       FIG. 6  is a time vs. performance diagram based on the PWM control system of one embodiment according to present invention. 
       FIG. 7  illustrates a log ramp with a slope that is inverted proportional to duty and compare to the linear ramp. 
   

   The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus are not limitative of the present invention, and wherein: 
   DESCRIPTION OF THE PREFERRED EMBODIMENT 
     FIG. 3  shows a PWM control system according to present invention. The difference between  FIG. 1  and  FIG. 3  is a nonlinear ramp generator  303  (see  FIG. 3 ) replaces the ramp generator  103  shown in  FIG. 1 . In  FIG. 1 , the ramp generator  103  generates a triangular waveform signal or a sawtooth waveform signal with a constant slope. In  FIG. 3 , the nonlinear ramp generator  303  generates a nonlinear ramp signal with variable slopes such as log ramp, exponential ramp, multi-piecewise-linear ramp, power ramp etc. 
     FIG. 4  shows a block diagram of the nonlinear ramp controller  303  of the PWM control system shown in  FIG. 3 . The nonlinear ramp generator includes an oscillator  400 , a ramp generator  403 , a nonlinear ramp converter  406  and a nonlinear ramp  409 . The oscillator  400  converts DC voltage into pulsed DC signal of various frequencies to control the ramp generator  403 . The ramp generator generates a linear ramp supplying to the nonlinear ramp converter  406  to convert to a nonlinear ramp  409 , according to various circuits design within it. Please note that it is also practicable in another embodiment if the nonlinear ramp is generated directly by a single oscillator. Similar to  FIG. 4 ,  FIG. 5  is also a block diagram of nonlinear ramp generator but further shows circuits of the ramp generator  503 . An oscillator  500  generates a pulsed DC voltage to control a switch S 1  to open or close; it is grounded while it is opened and it is electrically conducted to a capacitor C 4  and several current sources (I osc , I osc1 , I osc2  . . . I oscn ) while it is closed. Where the capacitor C 4  is also grounded, the I osc  connecting to power supply VDD, the current source I osc1  connecting to a switch SC 1 , the current source I osc2  connecting to a switch SC 2  . . . and the current source I oscn  is connected to a switch SCN. The output terminal of an error amplifier  5031  is connected to the gate of a transistor M 3 , whose source is connected to its negative terminal, and is also connected to a grounded resistor R 5 . The drain of the transistor M 3  is connected to the drain and gate of a transistor M 4 , and is also connected to the gate of a transistor M 5 , where the gate of the transistor M 4  and the gate of the transistor M 5  is electrically conducted, and both two sources of the transistor M 4  and the transistor M 5  are connected to power supply VDD. Thus, the ramp generator  503  generates a ramp voltage, transferring to a nonlinear ramp converter  506  via the drain of the transistor M 5 . Each of currents I osc1 -I oscn  has individual switch SC 1 -SCN to control the current open or close according to the voltage value of a node node 1 , consequently a different voltage value will feed the error amplifier  5031 , and the charging of the capacitor C 4  implemented via the currents I osc  and I osc1 -I oscn  is affected. The error amplifier  5031  compares the voltage fed in positive terminal and the feedback voltage fed in negative terminal from the source of the transistor M 3 , according to the result a signal is generated to even the voltage of two nodes node 1  and node 2 , and the voltage of the node node 2  is converted to current via the resistor R 5 , then transferring to the nonlinear ramp converter  506  via a current mirror consists of the transistor M 4  and the transistor M 5 . 
   The form of the nonlinear ramp depends on the circuits design within the nonlinear ramp converter  506 . For example, with a log amplifier and neglecting the current sources I oscl -I oscn  and their switch SC 1 -SCN, a linear ramp will be converted to a log ramp. For another instance, a resistor R 6  is added between the node node 1  and the power supply VDD, with neglecting the current sources I osc , I osc1 -I oscn  and their switch SCI-SCN, transistors M 3 , M 4 , M 5  and resistor R 5 , a linear ramp from node node 1  will be converted to exponential ramp, where the resistor R 6  is a equivalent nonlinear ramp converter. In addition, it is known that a linear ramp could converted into multi-piecewise-linear ramp by neglecting the error amplifier  5031 , the transistors M 3 , M 4 , M 5 , the resistor R 5  and the nonlinear ramp converter  506 , as well as by controlling the switches SC 1 -SCN to fully open or fully close, or to control some of them are open and the rest are close. Moreover, neglecting the current sources I osc1 -I oscn  and their switches and adding a plurality of integrators could generate a power ramp. 
     FIG. 6  is a time vs. performance curve showing the comparison between the conventional PWM control system and the PWM control system according to present invention. Where the prefix “first” denote the signals of the conventional PWM control system, and the prefix “second” denote the signals the PWM control system according to present invention. At time t 4 , the dropping of the input voltage V in  or the output voltage V out  causes the dropping of the first/second feedback voltage, and the first/second error output is rising in the meanwhile since the deviation departing from the target i.e. the reference voltage V ref  is getting large. At time t 5 , the error output is larger than the second nonlinear ramp voltage to switch the second duty signal fully on, thus to switch the transistor M 1  (see  FIG. 3 ) on and to switch the transistor M 2  off via the gate driver  309 , hence the output voltage is corrected via the inductor L and capacitor C out  (see  FIG. 3 ). After that, the deviation between the reference voltage V ref  and the output voltage V out  is beginning to close. At time t 7 , the output voltage V out  is high enough closing to the reference voltage, thus the second feedback voltage is beginning to rise to the steady value. However, the conventional PWM control system start to correct the output voltage V out  at time t 6 , and begin to back to the steady state at time t 8 . Compared with the conventional system, the PWM control system according to present invention has better transient response with a time difference t 8 -t 7 . 
   In additional, the nonlinear ramp voltage according to present invention is a function even a proportion of input voltage V in , thus both the loop gain of the system and the modulation gain of PWM controller will keep constant regardless of the variance of the input voltage V in  or the duty signal, therefore a better stability could be achieved. 
   With regarding to  FIG. 5  and  FIG. 7 , we will prove both the loop gain and modulation gain is a constant as follows: 
   The time is a function of switching period:
 
 t=D*T    (1)
 
   where t: time; T: switching period; D=Duty=V out /V in ; 
   the voltage of node 1  can be shown that is a function of D:
 
 V   node1 =( I   osc   /C   4 )* t= ( I   osc   /C   4 )* D*T=V  (Duty)   (2)
 
   where t is substituted by equation (1); 
   M 3  evens the voltage of node 1  and node 2 , converting to current via the resistor R 5  and transferring to the nonlinear ramp converter  506  via a current mirror consists of the M 4  and M 5 :
 
 Id ( M 4)= Id ( M 5)= V (Duty)/ R   5 =( I   osc   /R   5   C   4 )* t= ( I   osc   /R   5   C   4 )( V   out   /V   in ) T    (3)
 
The nonlinear ramp converter  506  is designed to let the slope of the ramp=dV ramp /dt is proportional to (R 5 C 4 /I osc )/t:
 
 dV   ramp   =K*[ ( R   5   C   4   /I   osc )/ t]dt    (4)
 
   where K is a constant, thus the slope of the V ramp  is (K/t)*(R 5 C 4 /I osc ) varying with 1/t; 
   at specific D, the corresponding value of V ramp  is the slope of V ramp  multiplied by T: 
   
     
       
         
           
             
               
                 
                   
                     
                       
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   where D is substituted by V out /V in ; 
   The modulation gain is V in /V ramp  and replaces V ramp  by equation (5):
 
modulation gain= V   in   /V   ramp   =V   out   /K* ( I   osc   /R   5   C   4 )   (6)
 
   And the loop gain is proportional to:
 
loop gain ∝( V   in   /V   ramp )*( V   ref   /V   out )= V   ref   /K* ( I   osc   /R   5   C   4 )   (7)
 
   where V ramp  is substituted by equation (5); 
   In addition, integration of both sides of equal sign of equation (4) gets:
 
 V ramp= K* ( R   5   C   4   /I   osc )* ln ( t )+ C    (8)
 
   where C is a constant, and this is the equation of the log ramp. 
   According to equation (6), if V out  is a constant, modulation gain will be a constant; according to equation (7), loop gain is a constant independent of input and output voltage. 
   Alternatively, the same result can be analyzed by: As shown in  FIG. 7 , the lower the error output (E o1 , E o2 , E o3 ) of the error amplifier, the lower the Duty D generates but the higher the modulation gain gets. Therefore, in order to get a constant modulation gain, it is necessary to convert the linear ramp into nonlinear ramp, and the method is letting the slope of the nonlinear ramp being inverse proportion to Duty D,
 
 dV   ramp   /dt=K/D=K*T/t    (9)
 
   where K is a constant, and D is substituted by t/T; 
   In addition, integration of both sides of equal sign of equation (9) gets:
 
 V   ramp   =KT*ln ( t )+ C    (10)
 
   At specific D, the corresponding value of V ramp  is the slope of V ramp  multiplied by T:
 
 V   ramp =( K*T/t )* T=[K*T/ ( D*T )]* T=K*T*V   in   /V   out    (11)
 
and modulation gain is:
 
modulation gain= V   in   /V   ramp   =V   out /( K*T )   (12)
 
where V ramp  is substituted by equation (11); and loop gain is proportion to:
 
loop gain ∝( V   in   /V   ramp )*( V   ref   /V   out )= V   ref /( K*T )   (13)
 
where V ramp  is substituted by equation (11);
 
   According to equation (11), if the output voltage is a constant, the modulation gain will be a constant; according to equation (13), the loop gain is also a constant; therefore the proof is completed. 
   While the invention has been described in conjunction with a specific mode, a number of variations may be made according to present invention. Therefore, it will be appreciated by those skilled in the art that various modifications, alternatives and variations may be made without departing from the scope of the present invention, which intended to be limited solely by the appended claims.