Abstract:
An overcurrent detection circuit for a DC-to-DC power converter is disclosed. The overcurrent detection circuit includes a dynamic reference unit for outputting a dynamic reference signal, a load current measurement unit for measuring a load current of the DC-to-DC power converter to output a measurement signal, and a first comparator including a positive input terminal coupled to the load current measurement unit, a negative input terminal coupled to the dynamic reference unit and an output terminal coupled to an overcurrent protection device for outputting an overcurrent protection signal to activate the overcurrent protection device when the measurement signal is greater than the dynamic reference signal.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to an overcurrent detection circuit and overcurrent detection method, and more particularly, to an overcurrent detection circuit and overcurrent detection method adjusting current limit level when the temperature and a system voltage vary. 
         [0003]    2. Description of the Prior Art 
         [0004]    A traditional overcurrent detection circuit measures a load current outputted by a power converter, and transfers the load current to an overcurrent signal to determine whether the load current is greater than a reference signal to activate an overcurrent protection circuit, so as to protect a power system from excess current damaging the power converter or the load. In general, the reference signal is commonly to be a stable reference signal, which has a zero temperature coefficient or has an isolated power source, in other words, the reference signal has a constant value no matter the temperature or a system voltage in the power system varies. 
         [0005]    However, the stable reference signal may not accurately respond to an occurrence of overcurrent in the power system. For example, please refer to  FIG. 1A  and  FIG. 1B  that are schematic diagrams of current limit levels (herein after CLL) of a traditional power integrated circuit (IC) when the temperature and a system voltage PVDD vary, respectively. As shown in  FIG. 1A , when the temperature varies from a high temperature to a low temperature, the CLL increases from a low current to a high current. The CLL increases when the system voltage PVDD varies from a low voltage to a high voltage. Similarly, as shown in  FIG. 1B , the lower the temperature and the higher the system voltage is, the higher the CLL becomes. In contrast, the higher the temperature and the lower the system voltage is, the lower the CLL becomes. If during a period of low temperature and high voltage, the overcurrent detection circuit may activate the overcurrent protection circuit to drain the overcurrent earlier than the load current reaching the CLL, which may lower a power efficiency of the power IC. If in the high temperature and the low voltage situation, the overcurrent detection circuit may activate the overcurrent protection circuit after the load current has reached the CLL, which may lead to the overcurrent protection circuit not draining the overcurrent in time, and risking damage to the power system or the load. 
         [0006]    As can be seen, the CLL is deeply influenced by the temperature and the system voltage, which may lead to the stable reference signal not accurately responding to an occurrence of overcurrent in the power system. Thus, there is a need to improve the prior art to avoid a judgment failure of the overcurrent. 
       SUMMARY OF THE INVENTION 
       [0007]    It is therefore an object of the present invention to provide an overcurrent detection circuit and overcurrent detection method. 
         [0008]    The present invention discloses an overcurrent detection circuit for a DC-to-DC power converter. The overcurrent detection circuit includes a dynamic reference unit for outputting a dynamic reference signal, a load current measurement unit for measuring a load current of the DC-to-DC power converter to output a measurement signal, and a first comparator including a positive input terminal coupled to the load current measurement unit, a negative input terminal coupled to the dynamic reference unit and an output terminal coupled to an overcurrent protection device for outputting an overcurrent protection signal to activate the overcurrent protection device when the measurement signal is greater than the dynamic reference signal. 
         [0009]    The present invention further discloses an overcurrent detection method for a DC-to-DC power converter. The overcurrent detection method includes generating a measurement signal and a dynamic reference signal, and outputting an overcurrent protection signal to activate an overcurrent protection device according to the measurement signal and the dynamic reference signal. 
         [0010]    These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0011]      FIG. 1A  is a schematic diagram illustrating current limit levels of a traditional power IC when the temperature and a system voltage vary. 
           [0012]      FIG. 1B  is schematic diagrams illustrating current limit levels of a traditional power IC when the temperature and a system voltage vary. 
           [0013]      FIG. 2  is a schematic diagram of a power system according to an embodiment of the present invention. 
           [0014]      FIG. 3  is a schematic diagram of a power system according to another embodiment of the present invention. 
           [0015]      FIG. 4  is a schematic diagram illustrating normalized current limit levels of a power IC varying with the temperature and the system voltage. 
           [0016]      FIG. 5  is a schematic diagram of an overcurrent detection process according to an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0017]    Please refer to  FIG. 2 , which is a schematic diagram of a power system  20  according to an embodiment of the present invention. The power system  20  includes an overcurrent detection circuit  200 , a power converter  220  and an overcurrent protection unit  240 . The overcurrent detection circuit  200  includes a measurement unit  202 , a reference unit  204  and a comparator  206 . The measurement unit  202  is used for detecting a load current I CL  of the power converter  220  to generate a measurement signal V OCRAMP . The reference unit  204  is used for generating a reference signal V OCTH . A positive input terminal and a negative input terminal of the comparator  206  are respectively coupled to the measurement unit  202  and the reference unit  204  to output an overcurrent protection signal OCP to the overcurrent protection unit  240  when the measurement signal V OCRAMP  is greater than the reference signal V OCTH , so as to drain the load current I CL  of the power converter  220 , which prevents the overcurrent from damaging the power converter  220  or an output load of the power converter  220 . 
         [0018]    In operation, the measurement unit  202  comprises transistors M 1  and M 0 , an operational amplifier OP 2  and a resistor R OCRAMP . The measurement unit  202  may utilize the transistor M 1  to copy the load current I CL  of the power converter  220 , i.e. the current flowing on a high-side switch MOS_L, such that a current flowing on the transistor M 0  cascaded to the transistor M 1  may be the same as the load current I CL . Since the transistor M 0  is a P-type transistor whose source and gate are respectively coupled to a system voltage PVDD and a ground, a source-gate voltage difference of the transistor M 0  is always greater than its turn-on voltage, and thus the transistor M 0  is always turned on. In such a situation, the current flowing on the transistor M 0  is determined by the transistor M 1 . 
         [0019]    The operational amplifier OP 2  has a conductance G M2 , and its positive and negative input terminals are respectively coupled to a drain and a source of the transistor M 0 , an output terminal of the operational amplifier OP 2  is coupled to a resistor R OCRAMP . A source of the high-side switch MOS_L and a source of the transistor M 0  are both coupled to the system voltage PVDD, the transistor M 1  pulls a voltage at the drain of the transistor M 0  to be a voltage at a drain of the high-side switch MOS_L, such that the source-drain voltage difference of the transistor M 0  equals to a source-drain voltage difference of the high-side switch MOS_L. Besides, by properly selecting the transistor M 0 , the transistor M 0  and the high-side switch MOS_L may have similar operating characteristics. As a result, the operational amplifier OP 2  may output the measurement signal V OCRAMP  according to the source-drain voltage difference of the high-side switch MOS_L, a resistance of the resistor R OCRAMP  and the conductance G M2 , wherein the source-drain voltage difference V DS  of the high-side switch MOS_L (or the transistor M 0 ) is V SD =I CL ×R MOS     —     L  and the R MOS     —     L  is an inner resistance of the transistor MOS_L. Therefore, the measurement signal V OCRAMP  may be written as the following formula: 
         [0000]        V   OCRAMP =( I   CL   ×R   MOS     —     L )× G   m2   ×R   OCRAMP   (1)
 
         [0020]    Noticeably, the operating characteristics of transistors such as the high-side switch MOS_L or the transistors M 0  and M 1  cause inner resistances or output characteristics of the transistors to be associated with the temperature and an applied voltage, i.e. the system voltage PVDD, such that the measurement signal V OCRAMP  varies with the temperature and the applied voltage. For example, when the temperature increases, the inner resistances of the transistors M 0  and M 1  increase, and the source-drain voltage difference (V SD =I CL ×R MOS     —L   ) of the high-side switch MOS_L increases as well. The source-drain voltage difference V SD  is amplified by the operational amplifier OP 2  to obtain the increased measurement signal V OCRAMP  due to the increased inner resistance R MOS     —     L . In such a situation, if the reference signal V OCTH  is a stable voltage and the measurement signal V OCRAMP  increases as the temperature increases, the comparator  206  may determine an overcurrent has occurred and activate the overcurrent protection unit  240  in advance. Or, if the inner resistance R MOS     —     L  of the high-side switch MOS_L decreases as the system voltage PVDD increases, the source-drain voltage difference V SD  decreasing accordingly such that the measurement signal V OCRAMP  decreases. Likewise, if the reference signal V OCTH  is a stable voltage and the measurement signal V OCRAMP  decreases as the system voltage PVDD increases, the comparator  206  may determine an overcurrent has not occurred and the comparator  206  does not activate the overcurrent protection unit  240  in time. As a result, the overcurrent detection circuit  200  may fail to accurately determine whether an overcurrent has occurred. 
         [0021]    Moreover, electric elements such as the resistor R OCRAMP  and the operational amplifier OP 2  may be influenced by the temperature to change its resistance or output characteristics. Thus, the measurement signal V OCRAMP  in formula (1) may be rewritten to include parameters of the temperature and the system voltage PVDD: 
         [0000]        V   OCRAMP ( T, PVDD )= I   CL ( T, PVDD )× R   MOS     —     L ( T, PVDD )× G   m2 ( T )× R   OCRAMP ( T )  (2)
 
         [0022]    Therefore, if the reference unit  204  is capable of providing the reference signal V OCTH  associated with the temperature and the system voltage PVDD, an accuracy of activating the overcurrent protection unit  240  may be improved. The reference unit  204  includes a current source CS, a transistor MOS_S, an operational amplifier OP 1  and a resistor R OCTH . A difference between the reference unit  204  and the measurement unit  202  is that the current source CS is cascaded to the transistor MOS_S to provide a reference current I 1  to the transistor MOS_S. A positive input terminal and a negative input terminal of the operational amplifier OP 1  are respectively coupled to a drain and a source of the transistor MOS_S, an output terminal of the operational amplifier OP 1  is coupled to the resistor R OCTH . In such a structure, the operational amplifier OP 1  may output the reference signal V OCTH  according to a source-drain voltage difference of the transistor MOS_S, i.e. V DS =I 1 ×R MOS     —     S , wherein R MOS     —     S  is an inner resistance of the transistor MOS_S, a resistance of the resistor R OCTH  and a conductance G m1  of the operational amplifier OP 1 . Then the reference signal V OCTH  may be written as the following formula: 
         [0000]        V   OCTH =( I   1   ×R   MOS     —     S )× G   m1   ×R   OCTH   (3)
 
         [0023]    Similarly, the inner resistance R MOS     —     S  or an output characteristic of the transistor MOS_S are associated with the temperature and the system voltage PVDD, such that the inner resistance R MOS     —     S  of the transistor MOS_S varies as the temperature and system voltage PVDD vary. Besides, electronic elements such as the resistor R OCTH , the operational amplifier OP 1  and the current source CS are influenced by the temperature to change its resistances or output characteristics. Thus, the reference signal V OCTH  may be written to include the parameters of the temperature and the system voltage PVDD, as shown in the formula: 
         [0000]        V   OCTH ( T, PVDD )= I   1 ( T )× R   MOS     —     S ( T, PVDD )× G   m1 ( T )× R   OCTH ( T )  (4)
 
         [0024]    Divide formula (4) by formula (2): 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
                         V 
                         OCTH 
                       
                        
                       
                         ( 
                         
                           T 
                           , 
                           PVDD 
                         
                         ) 
                       
                     
                     
                       
                         V 
                         OCRAMP 
                       
                        
                       
                         ( 
                         
                           T 
                           , 
                           PVDD 
                         
                         ) 
                       
                     
                   
                   = 
                   
                     
                       
                         
                           R 
                           MOS_S 
                         
                          
                         
                           ( 
                           
                             T 
                             , 
                             PVDD 
                           
                           ) 
                         
                       
                       
                         
                           R 
                           MOS_L 
                         
                          
                         
                           ( 
                           
                             T 
                             , 
                             PVDD 
                           
                           ) 
                         
                       
                     
                     × 
                     
                       
                         
                           G 
                           
                             m 
                              
                             
                                 
                             
                              
                             1 
                           
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                       
                         
                           G 
                           
                             m 
                              
                             
                                 
                             
                              
                             2 
                           
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                     
                     × 
                     
                       
                         
                           R 
                           OCTH 
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                       
                         
                           R 
                           OCRAMP 
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                     
                     × 
                     
                       
                         
                           I 
                           1 
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                       
                         
                           I 
                           CL 
                         
                          
                         
                           ( 
                           
                             T 
                             , 
                             PVDD 
                           
                           ) 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   5 
                   ) 
                 
               
             
           
         
       
     
         [0025]    As can be seen from formula (5), the measurement signal V OCRAMP  and the reference signal V OCTH  may be written as functions of the temperature and the system voltage PVDD. In order to accurately determine whether an overcurrent has occurred or not, the reference signal V OCTH  may be proportional to the measurement signal V OCRAMP  by properly selecting the transistors MOS_L and MOS_S having a same type and a same size (channel ratio W/L), conductance G M1  and G M2  of the operational amplifiers OP 1  and OP 2  and resistances of the resistors R OCTH  and R OCRAMP . The comparator  206  compares the measurement signal V OCRAMP  with the reference signal V OCTH  to cancel the parameters of the temperature and the system voltage PVDD of the measurement signal V OCRAMP  and the reference signal V OCTH  to obtain the overcurrent protection signal OCP independent of the temperature and the system voltage PVDD. 
         [0026]    As a result, since the reference signal V OCTH  is proportional to the measurement signal V OCRAMP , the overcurrent detection circuit  200  may accurately detect whether an overcurrent of the power system  20  has occurred, which prevents the comparator  206  from activating the overcurrent protection unit  240  in advance in the high temperature and also prevents the comparator  206  from activating the overcurrent protection unit  240  late when the system voltage PVDD becomes high. 
         [0027]    Furthermore, when the overcurrent has occurred, it may be assumed that the measurement signal V OCRAMP  is equal to the reference signal V OCTH , and rearrange formula (5) to obtain formula (6): 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       I 
                       CL 
                     
                      
                     
                       ( 
                       
                         T 
                         , 
                         PVDD 
                       
                       ) 
                     
                   
                   = 
                   
                     
                       
                         
                           R 
                           MOS_S 
                         
                          
                         
                           ( 
                           
                             T 
                             , 
                             PVDD 
                           
                           ) 
                         
                       
                       
                         
                           R 
                           MOS_L 
                         
                          
                         
                           ( 
                           
                             T 
                             , 
                             PVDD 
                           
                           ) 
                         
                       
                     
                     × 
                     
                       
                         
                           G 
                           
                             M 
                              
                             
                                 
                             
                              
                             1 
                           
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                       
                         
                           G 
                           
                             M 
                              
                             
                                 
                             
                              
                             2 
                           
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                     
                     × 
                     
                       
                         
                           R 
                           OCTH 
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                       
                         
                           R 
                           OCRAMP 
                         
                          
                         
                           ( 
                           T 
                           ) 
                         
                       
                     
                     × 
                     
                       
                         I 
                         1 
                       
                        
                       
                         ( 
                         T 
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   6 
                   ) 
                 
               
             
           
         
       
     
         [0028]    As can be seen from formula (6), the load current I CL  may be regarded as a multiple of the reference current I 1  once the transistors MOS_L and MOS_S, the conductance G M1  of the operational amplifier OP 1 , the conductance G M2  of the operational amplifier OP 2 , and resistances of the resistors R OCTH  and R OCRAMP  are chosen. For ensuring the reference signal V OCTH  is substantially equal to the measurement signal V OCRAMP , the overcurrent detection circuit  200  may further include a signal adjustment unit for adjusting the reference current I 1  to adjust the reference signal V OCTH . 
         [0029]    Please refer to  FIG. 3 , which is a schematic diagram of a power system  30  according to an embodiment of the present invention. The power system  30  further includes a signal adjustment unit  208  between the comparator  206  and the reference unit  204 . The signal adjustment unit  208  includes a comparator OP 3 , a transistor M 2 , resistors R 1  and R 2 , and a current mirror comprising transistors M 3  and M 4 . As shown in  FIG. 3 , a positive input terminal of the comparator OP 3  is coupled to the output terminal of the reference unit  204  for receiving the reference signal V OCTH , an output terminal and a negative input terminal of the comparator OP 3  are respectively coupled to a gate and a source of the transistor M 2 . In such an arrangement, the signal adjustment unit  208  may utilize a negative feed back path formed between the comparator OP 3  and the transistor M 2  to pull a voltage at the negative input terminal of the comparator OP 3  to be equal to a voltage at the positive input terminal of the comparator OP 3 , so as to turn on the transistor M 2  to generate a current I 2  flowing on the transistors M 2  and M 3 . The transistor M 4  accordingly copies the current I 2 , and the current I 2  flows through the resistor R 1  to the ground, wherein the current I 2  may be written as 
         [0000]    
       
         
           
             
               
                 V 
                 OCTH 
               
               
                 R 
                 2 
               
             
             . 
           
         
       
     
         [0000]    As a result, a reference signal V OCTH′  adjusted by the signal adjustment unit  208  may be written as: 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     OCTH 
                     ′ 
                   
                   = 
                   
                     
                       
                         I 
                         2 
                       
                       × 
                       
                         R 
                         1 
                       
                     
                     = 
                     
                       
                         
                           
                             V 
                             OCTH 
                           
                           
                             R 
                             2 
                           
                         
                         × 
                         
                           R 
                           1 
                         
                       
                       = 
                       
                         
                           ( 
                           
                             
                               I 
                               1 
                             
                             × 
                             
                               R 
                               MOS_S 
                             
                           
                           ) 
                         
                         × 
                         
                           G 
                           
                             M 
                              
                             
                                 
                             
                              
                             1 
                           
                         
                         × 
                         
                           R 
                           OCTH 
                         
                         × 
                         
                           
                             R 
                             1 
                           
                           
                             R 
                             2 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
           
         
       
     
         [0030]    As can be seen from formula (7), the reference signal V OCTH′  may be adjusted by changing a ratio of the resistors R 1  and R 2 . 
         [0031]    Please refer to  FIG. 4 , which is a schematic diagram illustrating normalized CLLs of a power IC varying with the temperature and the system voltage PVDD, wherein the normalized CLL is derived from dividing the load current I CL  by the CLL. As shown in  FIG. 4 , before the reference signal V OCTH  is adjusted, the normalized CLL of the power IC has a negative temperature coefficient, that is, the normalized CLL of the power IC decreases as the temperature increases. As the temperature increases from −50 Celsius degrees to 150 Celsius degrees, the normalized CLL decreases from 1.3 to 0.6. In comparison, after the reference signal V OCTH  is adjusted, the normalized CLL of the power IC keeps substantially at 1, which means the load current I CL  is substantially equal to the CLL. As the temperature increases from −50 Celsius degrees to 150 Celsius degrees, the normalized CLL slightly decreases to 0.9. Thus, influences of the temperature and the system voltage PVDD to the CLL are both improved. 
         [0032]    Operations of the power systems  20  and  30  may be summarized into an overcurrent detection process  50 , as shown in  FIG. 5 , the overcurrent detection process  50  includes the following steps: 
         [0033]    Step  500 : Start. 
         [0034]    Step  502 : Generate the measurement signal V OCRAMP  and the reference signal V OCTH . 
         [0035]    Step  504 : Adjust the reference signal V OCTH . 
         [0036]    Step  506 : Output the overcurrent protection signal OCP according to the measurement signal V OCRAMP  and the reference signal V OCTH  to activate the overcurrent protection unit  240 . 
         [0037]    Step  508 : End. 
         [0038]    Detailed operations of the current detection process  50  may be obtained by referring to above description, which is omitted for simplicity. 
         [0039]    To sum up, the traditional overcurrent detection circuit only provides a stable or constant reference signal independent of the temperature and the system voltage. However, in practice, the overcurrent detection circuit of the power system or the power converter is deeply influenced by the temperature and the system voltage, which leads to the overcurrent detection circuit may not be able to accurately determine whether the overcurrent has occurred or not. In comparison, the present invention provides the overcurrent detection circuit capable of generating the reference signal proportional to the measurement signal, and utilizes the comparator comparing the measurement signal with the reference signal to cancel the parameters of the temperature and the system voltage to improve the CLL, such that the overcurrent detection circuit determines the overcurrent accurately. 
         [0040]    Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.