Abstract:
An improved type of vector impedance measuring instrument is disclosed. The vector impedance is a vector current relative to (or normalized to) a pertinent voltage. A transducer for converting the impedance to corresponding current and voltage includes a digital signal processing unit. The vector value of the current is derived from parameter values set in the digital signal processing unit. This configuration eliminates a conventional vector ratio detector, which conventionally followed the transducer, saves cost, reduces size, and achieves high performance. Also, algorithms implemented in the digital signal processing unit are easily modified for a variety of transfer functins phase compensation, and corrections.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates to a wideband, high-sensitivity vector ammeter. Vector ammeters according to the invention can be used as wideband, high-sensitivity voltmeters and impedance meters The vector ammeter referred to herein is a measuring instrument which produces electric current in a certain ratio to other current or voltage of the same frequency. 
     Wideband, high-sensitivity vector ammeters find wide application. When a resistor is connected to the input terminal of such an ammeter to convert voltage into electric current, it is possible to know the resistance value of the resistor and to measure the input voltage. 
     Also, wideband, high-sensitivity vector ammeters are used as main portions of wideband half bridge circuits of electronic element measuring instruments, such as the HP 4274A multifrequency LCR meter manufactured by Yokogawa Hewlett-Packard Co., Ltd. FIG. 5 shows a vector ammeter employed as an impedance measuring instrument which uses such a wideband half bridge circuit. 
     Referring to FIG. 5, an AC signal source 1 produces an AC signal which is passed through a source resistor 2 and divided into three components. One of these components is fed to a vector voltage ratio meter 17 through a first path 4. Another component is furnished to the inverting input terminal of an amplifier 7 through a device 3 being measured. The remaining component is sent to a signal distributing circuit 9 through a path 5. 
     The amplifier 7 and a feedback resistor 8 form a current-to-voltage converter circuit to which an electric current is applied via the measured device 3 and a reference resistor 6. The converter circuit converts the input current into a voltage that is fed to one terminal of each one of phase-sensitive detectors 10 and I1. The other input terminals of the detectors 10 and 11 are excited with driving signals which are delivered from the signal distributor 9. These driving signals have the same frequency as the aforementioned AC signal and are 90 out of phase with each other. 
     The outputs from the phase-sensitive detectors 10 and 11 are smoothed and amplified by integrators 12 and 13, respectively, and applied to one terminal of modulators 14 and 15, respectively. The modulators 14 and 15 modulate the 90° out-of-phase signals which are applied to the phase-sensitive detectors 10 and 11. The modulated signals are applied to an adder 16. The output from the adder 16 is fed to the inverting input terminal of the amplifier 7 via the reference resistor 6. 
     The network is designed so that all the electric current flowing through the measured device 3 passes through the reference resistor 6. The inverting input terminal of the amplifier 7 forms a virtual ground point. 
     The vector voltage ratio meter 17 receives the output from the adder 16 and the AC voltage which is passed through the path 4 to energize the measured device 3. The meter 17 calculates the vector ratio of the output from the adder 16 to the AC voltage passed through the path 4. The calculation of the vector voltage ratio is carried out by the above-described HP 4274A meter or other instrument and is well-known. Therefore, description of the calculation is omitted herein. Of course, a vector ratio is expressed in terms of the ratio of one of two inputs to the other and their phase difference. 
     Let V 3  be the AC voltage for energizing the measured device 3 and V 16  be the AC voltage delivered from the adder 16. The impedance Z of the measured device 3 is given by ##EQU1## provided the resistance R 6  of the reference resistor 6 is a parameter. In the above equation, the inside of [ ]expresses the vector voltage ratio. Similarly, by taking the vector ratio of current I 3  flowing through the measured device 3 to V 3 , we have ##EQU2## Generally, the vector voltage ratios of V 3  and V 16  to the third input V 9  supplied from the signal distributor 9 are calculated. Then, the vector voltage ratio of V 16  to V 3  is calculated. In case of Eq. (2), the vector current is admittance. 
     The prior art techniques described thus far have the following disadvantages. Since a vector voltage ratio meter is needed, the cost and the space requirements are great. Furthermore, the vector voltage ratio cannot be calculated until the bridge portion shown in FIG. 5 excluding the vector voltage ratio meter stabilizes. Therefore, a long time is taken for the measurement. Also, it is difficult to stabilize the bridge portion at radio frequencies. 
     Accordingly, it is an object of the invention to provide a small-sized, high-speed, inexpensive vector ammeter which uses a digital signal processing unit and thus dispenses with a vector voltage ratio meter, thereby eliminating the foregoing disadvantages. 
     SUMMARY OF THE INVENTION 
     According to one embodiment of the invention, a digital signal processing unit, which is generally fabricated in the form of an integrated circuit, is disposed in the forward amplification path of a bridge portion. The digital signal processing unit is controlled by a microprocessor and supplied with a calibration coefficient for the bridge portion, as well as some parameters needed for stabilization of operation. 
     The digital signal processing unit gives to the microprocessor the internal state variables which are taken when the bridge is at balance. Thus, desired values of Z and 1/Z can be calculated. If the digital signal processing unit incorporates a microprocessor, these calculations can be performed inside the digital signal processing unit. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIGS. 1 and 2 are block diagrams of vector ammeters constituting first and second embodiments, respectively, of the invention; 
     FIG. 3 is a diagram illustrating a system model of the first and second embodiments shown in FIGS. 1 and 2; 
     FIG. 4 is a diagram illustrating a system model of a more general, third embodiment of the invention; and 
     FIG. 5 is a block diagram of a prior art vector ammeter. 
     It is to be noted that portions having like functions and like performance are denoted by like reference numerals throughout FIGS. 1-5. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Referring to FIG. 1, the output from an amplifier 7 is converted into digital form by an analog-to-digital (A/D) converter 21 and supplied to a digital signal processing unit 23. This processing unit 23 includes digital phase-sensitive detectors P 1  and P 2 , accumulators S 1  and S 2 , and gain adjusters K 1  and K 2  that set the gains. The accumulators S 1  and S 2  act as digital integrators which simulate analog integrators. The outputs from the gain adjusters K 1  and K 2  of the digital signal processing unit 23 are applied to quadrant multiplication type digital-to-analog (D/A) converters 24 and 25, respectively. Each of the converters 24 and 25 receives the AC voltage for energizing the measured device 3 and a signal voltage shifted in phase by 90° with respect to the AC voltage. The outputs from the converters 24 and 25 are added up by an adder 16. A 90° phase shifter 26 shifts the phase of its input signal by 90°. The output from the shifter 26 is fed to the D/A converter 24. 
     A digital cosine wave is applied to the digital phase-sensitive detector P 1 . A digital sine wave, which is either produced inside the digital signal processing unit 23 or received from the outside, is supplied to the digital phase-sensitive detector P 2 . Each of the detectors P 1  and P 2  calculates the product of the respective cosine and sine input and the output from the A/D converter 21. 
     A timing signal needed for the vector ammeter is produced by a timing generator 22 in synchronism with a driving voltage V 3 . The timing signal is distributed to digital devices and devices including both analog and digital elements, the devices needing the signal. 
     Preferably, the conversion rate of the A/D converter 21 is sufficiently larger than the Nyquist rate of the input signal, i.e., a sufficiently high oversampling frequency is used. 
     In the first embodiment shown in FIG. 1, the vector current ratio is found irrespective of variations in the level of the output from the signal source 1, because the signals applied to the D/A converters 24 and 25 vary in proportion to V 3 , and because it is not necessary for the converters 24 and 25 serving to adjust the amplitudes of signals to respond to every instantaneous value of signals having the same frequency as the driving AC voltage. However, the two multiplication type D/A converters 24 and 25 are needed. 
     Referring to FIG. 2, a digital signal processing unit 33 operates in synchronism with a timing generator 32 which is similar to the timing generator 22. The digital signal processing unit 33 incorporates demodulating digital modulators M 1  and M 2  and a digital adder A. The output from the adder A is converted into alternating current proportional to a reference DC voltage VR by a D/A converter 35. The internal configuration of the digital signal processing unit 33 equivalently represents the algorithm effected by the digital signal processing unit 33. Of course, the invention is not limited to the illustrated configuration. Where forward amplification is made, if phase adjustment is made, paths (not shown) extending from the outputs of S 1  and S 2  to the outputs of K 1  and K 2  are added. Signals flowing through the added paths are multiplied by factors similarly to the case of K 1  and K 2 . 
     In the second embodiment shown in FIG. 2, variations in the level of the output from the signal source 1 directly induce error, and so frequent calibration is needed. Also, the D/A converter 35 is required to respond to every instantaneous value of the alternating current, and hence it must operate rapidly. However, only one D/A converter 35 is needed. 
     FIG. 3 shows a system model of the first and second embodiments. Equations described below can be derived by using the well-known Z transformation. The reference numerals in the parentheses shown in FIG. 3 illustrate the correspondence between the reference numerals used in FIG. 1 and arithmetic operators. 
     The input current U (i), the outputs x (i) and x (i+1) from the accumulators are vectors of two rows and one column whose elements are orthogonal components. They can be state variables of the system. Each operator is represented in the form of a matrix of two rows and two columns. 
     Two succeeding discrete instants of time are indicated by i and (i+1). Z -1  expresses a delay. Using U (i) and x (i) obtained at instant i, the output x (i+1) from each accumulator at instant (i+1) is given by 
     
         x (i+1)=A (i) x (i)+B (i) U (i)                            (3) 
    
     
         where A (i)=H(i)D Y.sub.γ FMK+I, B (i)=H(i)D, and H(i)= ##EQU3## In the above equations, I is a unit matrix, W is equal to 2π/n, n is the number of samples, i.e., the number of discrete instants of time, taken within one period of the frequency of the driving voltage, and θ.sub.c and θ.sub.s are phase parameters. 
    
     Using U (i), a sampled value I 3  (i) of the measured current is given by 
     
         I.sub.3 (i)=U.sub.c (i)cos ω.sub.0 i+U.sub.s (i)sin ω.sub.0 i 
    
     where ##EQU4## and ω 0  is the angular frequency of the alternating current. 
     We are now discussing electric currents varying within a narrow band, and, therefore, it is assumed that U (i) changes sufficiently slowly. 
     When step-function signal U (i), that is assumed to be constant, is applied at i=0, a formula representing gradual change during one period of alternating current is given by ##EQU5## Therefore, the state equation for one period is given by 
     
         x (n)=A x (0)+B U (0)                                      (4) 
    
     where ##EQU6## By marking time every period of the driving AC voltage, we get 
     
         x (k+1)=A (k)+B U (k)                                      (5) 
    
     where k is the period number. 
     Finite settling time response is possible if the intrinsic value of A can be made zero. How to select A is a matter of design, and the theory is well-known. By correctly selecting A and using Eqs. (4) and (5), the final value x (∞)=x(k+1)=x(k) of step response is given by 
     
         x(∞)=-(Y.sub.γ FMK).sup.-1 U (∞) 
    
     Thus, 
     
         U (∞)=-(Y.sub.γ FMK)x(∞)                 (6) 
    
     If an offset ε O  that is represented by a vector of two columns and one row exists because of signal leakage from the phase-sensitive detectors or for other reasons, then we find 
     
         U (∞)=-(Y.sub.γ FMK)x (∞)+ε.sub.0(7) 
    
     It can be seen from Eq. (7) that if Y.sub.γ FMK and ε 0  are calibrated, U (∞) can be calculated from x (∞). The calibration is made, using the relationships U (∞) 0  =0, U (∞)=[U c , 0]T, and U (∞) 2  =[0, U s  ]T, where T is the transpose of the matrix. U (∞) 0  is obtained by disconnecting the measured device 3 (FIGS. 1 and 2) from the circuit. U (∞) 1  and U (∞) 2  are given by a reference resistance and a reference capacitance, respectively. 
     Disconnection of the measured device 3 (FIGS. 1 and 2) may not suffice. It may be necessary to shield the input terminals of the amplifier 7 (FIGS. 1 and 2). 
     In the above-described embodiments, the digital signal processing units act to perform accumulation and add gains after phase-sensitive detection. An algorithm can be easily implemented which makes a dynamic compensation for loss caused by insertion of an antialiasing filter into the input of the A/D converter or makes a compensation for RF phase shift. Further, modifications similar to modifications in the case of analog systems are possible. For example, a heterodyne circuit can be positioned before the A/D converter to lower the frequency of the input to the A/D converter. 
     FIG. 4 shows a model in which the digital signal processing unit 33 shown in FIG. 2 is realized by a second-order cyclic filter algorithm. Differing from the model shown in FIG. 3, state variables x (i), U (i), and W (i) are samples of instantaneous values of sinusoidal signal waves of the same frequency as the AC voltage driving the measured device. In FIG. 4, W (i) expresses a delay introduced when the output from the A/D converter is sampled by the digital signal processing unit 33 (FIG. 2). We will find a transfer function by making use of Z transformation. 
     Assuming G 1  =G 2  =1, the state equations are given by ##EQU7## Therefore, ##EQU8## 
     When the measured angular frequency is ω 0  and the sampling period is T, internal model conditions which reduce the steady-state error down to zero are set so that α=-2 cos (ω O  T) and β=1. K 1  and K 2  are calculated in the manner described below. 
     First, desired conjugate complex poles λ 1  and λ 2  are selected so that ##EQU9## Then we have ##EQU10## Consequently, a real pole λ 3  is given by 
     
         λ.sub.3 =2(1-γ) cos ω.sub.0 T           (13) 
    
     In order to stabilize the vector ammeter, the 
     relation |λ 3  |&lt;1 must hold. If ω O  T is sufficiently small, i.e., samples are taken at short intervals, then cos ω O  T=1. Therefore, γ should be selected so as to satisfy the relation 
     
         0.5&lt;γ&lt;1                                              (14) 
    
     In steady state, U (i)=Y (i). If G 1  and G 2  are not equal to unity, we get 
     
         U (i)=G.sub.2hu -1 G.sub.1 Y (i)                           (15) 
    
     In either case, U (i) can be calculated from Y (i). 
     U (i) and Y (i) are instantaneous values. During certain integral periods, every instantaneous value of Y (i) is stored in a memory. This set of data is subjected to digital phase detection and digital integration to calculate the amplitude and the phase of Y (i). Therefore, the amplitude and the phase of the input current U (i) can be found from Eq. (15). 
     Calibration is performed in the same way as in the case of the model shown in FIG. 3. In this case, however, digital phase detection is accurate, and so current 0 and cos ω 0  t or sin ω 0  t are input for calibration. 
     As can be understood from the embodiments described above, the practice of the invention dispenses with a vector voltage ratio meter, thus reducing the number of circuit components. This decreases the cost and allows rapid measurement. 
     Furthermore, the digital signal processing unit can be readily fabricated in the form of an integrated circuit. This enables further miniaturization and enhances reliability. Since the algorithm performed by the digital signal processing unit can be easily modified, a compensation can be easily made to improve the stability of the vector ammeter. 
     The configuration of the digital signal processing units 23 and 33 in the above embodiments should not be construed as limiting the present invention. Algorithms differing from the algorithm used in the illustrated embodiments can be performed to have advantages other than the advantages yielded by the illustrated examples with some compromises. Y.sub.γ and K generally include two-port devices in which the second-order transfer matrix has nonzero non-diagonal elements. Especially, when the phase of the forward amplification path is adjusted, the four matrix elements of K are adjusted. 
     The foregoing description is offered primarily for purposes of illustration. While a variety of embodiments has been disclosed, it will be readily apparent to those skilled in the art that numerous other modifications and variations not mentioned above can still be made without departing from the spirit and scope of the invention as claimed below.