Abstract:
In one aspect of the present disclosure, a semiconductor device includes a channel layer, an Al x In 1-x N layer on the channel layer with a thickness of t1, and a reverse polarization layer on the Al x In 1-x N layer with a thickness of t2. The thickness is 0.5×t1≦t2≦3×t1. In another aspect of the present disclosure, a method of manufacturing a semiconductor device is provided. The method including: forming a channel layer on a substrate; forming an Al x In 1-x N layer on the channel layer with a thickness of t1; and forming a reverse polarization layer on the Al x In 1-x N layer with a thickness of t2. The thickness is 0.5×t1≦t2≦3×t1.

Description:
RELATED APPLICATIONS 
       [0001]    This application claims the priority benefit of U.S. Provisional Application Ser. No. 62/160,142, filed May 12, 2015, which is herein incorporated by reference. 
     
    
     BACKGROUND 
       [0002]    1. Technical Field 
         [0003]    The present disclosure relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device having a nitride-based high electron mobility transistors (HEMTs) and its manufacturing method. 
         [0004]    2. Description of Related Art 
         [0005]    HEMT is a device used in high power and/or high frequency operation. These devices use the spontaneous polarization and the piezo polarization to induce two dimensional electron gas (2DEG) in the heterojunction of two semiconductor material which have different bandgap energies. 
         [0006]    AlGaN and GaN are usually applied in typical HEMT devices. The 2DEG increases with the increase in Al composition of the AlGaN. However, since AlGaN material shows a large lattice mismatching against GaN, the increase of Al composition may cause crack to occur at the interface. Another type HEMT device use AlInN instead of AlGaN, since AlInN has many advantages compared to AlGaN. For example, AlInN is in the lattice constant thereof matches with GaN, and thus crack or the like that will degrade the performance of the HEMT device will not occur; AlInN has higher spontaneous polarization and higher conduction band energy discontinuity, thus 2DEG will increase at the interface. 
         [0007]    However the electron mobility and breakdown voltage of AlInN-based HEMT devices are still inferior to the AlGaN-based HEMT devices. Owing to the large difference in dissociation temperature between AlN and InN, it is difficult in preparing a high-quality AlInN layer. The resultant alloy scattering and interface roughness scattering will deteriorate electron mobility. Besides, the strong polarization field in the AlInN layer could enhance tunneling current and lead to high gate leakage current and low breakdown voltage. Therefore, a solution is urgently needed to improve the AlInN-based HEMT device. 
       SUMMARY 
       [0008]    In one aspect of the present disclosure, a semiconductor device includes a channel layer, an Al x In 1-x N layer on the channel layer with a thickness of t1, and a reverse polarization layer on the Al x In 1-x N layer with a thickness of t2. The thickness is 0.5×t1≦t2≦3×t1. 
         [0009]    In another aspect of the present disclosure, a method of manufacturing a semiconductor device is provided. The method including: forming a channel layer on a substrate; forming an Al x In 1-x N layer on the channel layer with a thickness of t1; and forming a reverse polarization layer on the Al x In 1-x N layer with a thickness of t2. The thickness is 0.5×t1≦t2≦3×t1. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]    The disclosure can be more fully understood by reading the following detailed description of the embodiment, with reference made to the accompanying drawings as follows: 
           [0011]      FIGS. 1-4  illustrate cross-sectional views of semiconductor devices in accordance with some embodiments of the present disclosure; 
           [0012]      FIG. 5  illustrates a flowchart of the method of fabricating a semiconductor device in accordance with some embodiments. 
       
    
    
     DETAILED DESCRIPTION 
       [0013]    The present disclosure now will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the disclosure are shown. This disclosure may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Accordingly, the present disclosure is not limited to the relative size, spacing and alignment illustrated in the accompanying figures, As will also be appreciated by those of skill in the art, references herein to a layer formed “on” a substrate or other layer may refer to the layer formed directly on the substrate or other layer or on an intervening layer of layers formed on the substrate or other layer. 
         [0014]      FIG. 1  shows a semiconductor device in accordance with an embodiment of the present disclosure. The semiconductor device  100  includes a substrate  101 , a buffer layer  102 , a channel layer  103 , a spacer layer  104 , an Al x In 1-x N layer  105  and a reverse polarization layer  106 . In some embodiments, the substrate  101  can be made of a variety of materials such as Ge, SiGe, SiC, Si, sapphire, or a combination thereof. 
         [0015]    A buffer layer  102  is disposed on the substrate  101 . In some embodiments, the buffer layer  102  can be made of GaN, AlN, AlGaN, or a combination thereof. 
         [0016]    A channel layer  103  is disposed on the buffer layer  102 . In some embodiments, the channel layer  103  can be made of GaN, InGaN, AlInGaN, AlGaN, or a combination thereof. 
         [0017]    In some embodiments, a spacer layer  104  of AlN is optionally disposed on the channel layer  103 . The spacer layer  104  can reduce alloy scattering effect and increase 2DEG. In some embodiments, the thickness of spacer layer  104  is in the range from about 0.5 nm to 2.5 nm. 
         [0018]    An Al x In 1-x N layer  105 , where 0&lt;x&lt;1, is disposed on the spacer layer  104 . 
         [0019]    A reverse polarization layer  106  is disposed on the layer  105 . Without the reverse polarization layer  106 , the positive charges are formed at the interface between the channel layer  103  and the Al x In 1-x N layer  105 , which will not be balanced by other fixed charges in off-state, and thus can only be balanced by free electrons on the gate, causing high electric field in the gate oxide. As a result, the semiconductor device breakdown at low voltage. By adding the reverse polarization layer  106 , it induces the negative charge, which balances the positive charge in off-state and therefore the electric field can be greatly reduced and breakdown voltage is increased [Zhongda Li and T. Paul Chow 2013  Jpn. J. Appl. Phys.  52 08JN11]. 
         [0020]    In some embodiments, the reverse polarization layer  106  can be made of GaN, InGaN, Al y In 1-y N, AlInGaN, or a combination thereof and wherein x&gt;y. In other words, when the reverse polarization layer  106  is made of Al y In 1-y N, the Al composition in the reverse polarization layer  106  is lower than the Al composition in the Al x In 1-x N layer  105 . The polarization field of the reverse polarization layer  106  is smaller than that of the Al x In 1-x N layer  105  and the thickness ratio of the reverse polarization layer  106  and the Al x In 1-x N layer  105  is between 0.5 and 3. In some embodiments, the thickness ratio of the reverse polarization layer  106  and the Al x In 1-x N layer  105  is between 1 and 2. In some embodiments, the thickness ratio of the reverse polarization layer  106  and the Al x In 1-x N layer  105  is between 1.1 and 1.5. 
         [0021]    The semiconductor device  100  further includes a source  107 , a drain  108  and a gate  109 . A source contact  110  is formed on the source and a drain contact  111  is formed on the drain. In some embodiments, the source  107  and the drain  108  can be formed by doping N-type impurities or P-type impurities in a semiconductor layer, such as Si, Ge or SiGe. In some embodiments, the gate  109 , the source contact  110 , and the drain contact  111  can be independently made of Ni, Al, Ti, Au, W, TiN, or a combination thereof. It should be noted, 2DEG is formed at the junction between the Al x In 1-x N layer  105  and the channel layer  103 . 
         [0022]      FIG. 2  shows a semiconductor device  200  of an embodiment of the present disclosure. The difference between the semiconductor device  200  and the semiconductor device  100  is that the semiconductor device  200  further includes a recess  213  in the reverse polarization layer  206 , in which a gate  209  inserts. In some embodiments, the substrate  201  can be made of a variety of materials such as Ge, SiGe, SiC, Si, sapphire or a combination thereof. A buffer layer  202  is disposed on the substrate  201 . In some embodiments, the buffer layer  202  can be made of GaN, AlN, AlGaN, or a combination thereof. A channel layer  203  is disposed on the buffer layer  202 . In some embodiments, the channel layer  203  can be made of GaN, InGaN, AlInGaN, AlGaN, or a combination thereof. In some embodiments, a spacer layer  204  of AlN is optionally disposed on the channel layer  203 . The spacer layer  204  can reduce alloy scattering effect and increase 2DEG. In some embodiments, the thickness of spacer layer  204  is in the range from about 0.5 nm to 2.5 nm. An Al x In 1-x N layer  205 , where 0&lt;x&lt;1 is disposed on the spacer layer  204 . A reverse polarization layer  206  is disposed on the Al x In 1-x N layer  205 . In some embodiments, the reverse polarization layer  206  can be made of GaN, InGaN, Al y In 1-y N, AlInGaN, or a combination thereof and wherein x&gt;y. In other words, when the reverse polarization layer  206  is made of Al y In 1-y N, the Al composition in the reverse polarization layer  206  is lower than the Al composition in the Al x In 1-x N layer  205 . The polarization field of the reverse polarization layer  206  is smaller than that of the Al x In 1-x N layer  205  and the thickness ratio of the reverse polarization layer  206  and the Al x In 1-x N layer  205  is between 0.5 and 3. In some embodiments, the thickness ratio of the reverse polarization layer  206  and the Al x In 1-x N layer  205  is between 1 and 2. In some embodiments, the thickness ratio of the reverse polarization layer  206  and the Al x In 1-x N layer  205  is between 1.1 and 1.5. 
         [0023]    A recess  213  is included in the reverse polarization layer  206 . A gate  209  is formed on the Al x In 1-x N layer  205 . A source  207  and a drain  208  are formed at opposite sides of the gate  209  and on the Al x In 1-x N layer  205 . A source contact  210  is formed on the source  207  and a drain contact  211  is form on the drain  208 . In some embodiments, the source  207  and the drain  208  can be formed by doping N-type impurities or P-type impurities in a semiconductor layer, such as Si, Ge or SiGe. In some embodiments, the gate  209 , the source contact  210  and the drain contact  211  can be independently made of Ni, Al, Ti, Au, W, TiN, or a combination thereof. A gate field plate  212  is formed and connected to a sidewall of the gate  209 . 
         [0024]      FIG. 3  shows a semiconductor device  300  according to an embodiment of the present disclosure. The difference between the semiconductor  300  and semiconductor device  100  resides in that the semiconductor device  300  further includes a source field plate  312 , a gate field plate  313  and an insulating layer  314  encompassing the gate  309  and the gate field plate  313 . In some embodiments, the substrate  301  can be made of different materials such as Ge, SiGe, SiC, Si, sapphire, or a combination thereof. A buffer layer  302  is disposed on the substrate  301 . In some embodiments, the buffer layer  302  can be made of GaN, AlN, AlGaN, or a combination thereof. A channel layer  303  is disposed on the buffer layer  302 . In some embodiments, the channel layer  303  can be made of GaN, InGaN, AlInGaN AlGaN, or a combination thereof. In some embodiments, a spacer layer  304  of AlN is optionally disposed on the channel layer  303 . The spacer layer  304  can reduce alloy scattering effect and increase 2DEG. The thickness of spacer layer  304  is in the range from about 0.5 nm to 2.5 nm. An Al x In 1-x N layer  305 , where 0&lt;x&lt;1, disposed on the spacer layer. A reverse polarization layer  306  disposed on the Al x In 1-x N layer  305 . In some embodiments, the reverse polarization layer  306  can be made of GaN, InGaN, Al y In 1-y N, AlInGaN, or a combination thereof and wherein x&gt;y. In other words, when the reverse polarization layer  306  is made of Al y In 1-y N, the Al composition in the reverse polarization layer  306  is lower than the Al composition in the Al x In 1-x N layer  305 . The polarization field of the reverse polarization layer  306  is smaller than that of the Al x In 1-x N layer  305  and the thickness ratio of the reverse polarization layer  306  and the Al x In 1-x N layer  305  is between 0.5 and 3. In some embodiments, the thickness ratio of the reverse polarization layer  306  and the Al x In 1-x N layer  305  is between 1 and 2. In some embodiments, the thickness ratio of the reverse polarization layer  306  and the Al x In 1-x N layer  305  is between 1.1 and 1.5. 
         [0025]    The semiconductor device  300  further includes a source  307 , a drain  308 , a gate  309 , a source contact  310 , a drain contact  311 , a source field plate  312 , a gate field plate  313  and an insulating layer  314 . The insulating layer  314  includes an insulating layer  314   a  and an insulating layer  314   b . The insulating layer  314   a  is disposed on the reverse polarization layer  306  and includes a recess  315 , in which the gate  309  inserts. The gate field plate  313  is formed and connected to a sidewall of the gate  309 . The insulating layer  314   b  is further covering on the gate  309  and the gate field plate  313 . 
         [0026]    The source  307  and the drain  308  are formed at opposite sides of the gate  309  and on the Al x In 1-x N layer  305 . A source contact  310  is formed on the source  307  and a drain contact  311  is formed on the drain  308 . A source field plate  312  is formed on the gate  309  and physically connected to the source contact  310 . In some embodiments, the source  307  and the drain  308  can be formed by doping N-type impurities or P-type impurities in a semiconductor layer, such as Si, Ge or SiGe. In some embodiments, the gate  309 , the source contact  310 , and the drain contact  311  can be independently made of Ni, Al, Ti, Au, W, TiN, or a combination thereof. The insulating layer  314  can be made of SiO 2 , SiNx, Al 2 O 3 , HfO 2 , TiO 2 , or a combination thereof. 
         [0027]    In an embodiment of the present disclosure,  FIG. 4  shows a semiconductor device  400 . The difference between the semiconductor device  400  and the semiconductor device  300  is that semiconductor device  400  further includes a recess  415  in the reverse polarization layer  406 , in which the gate  409  inserts and a portion of the insulating layer  414   a  fills in a sidewall and a bottom of the recess  415 . The semiconductor device  400  includes a substrate  401  that can be made of a variety of materials such as Ge, SiGe, SiC, Si, sapphire, or a combination thereof. A buffer layer  402  disposed on the substrate. In some embodiments, the buffer layer  402  can be made of GaN, AlN, AlGaN, or a combination thereof. A channel layer  403  disposed on the buffer layer  402 . The channel layer  403  can be made of GaN, InGaN, AlInGaN, AlGaN, or a combination thereof. In some embodiments, a spacer layer  404  of AlN is optionally disposed on the channel layer  403 . The spacer layer  404  can reduce alloy scattering effect and increase 2DEG. In some embodiments, the thickness of spacer layer  404  is in the range from about 0.5 nm to 2.5 nm. An Al x In 1-x N layer  405 , where 0&lt;x&lt;1, is disposed on the spacer layer  404 . A reverse polarization layer  406  is disposed on the Al x In 1-x N layer  405 . In some embodiments, the reverse polarization layer  406  can be made of GaN, InGaN, Al y In 1-y N, AlInGaN or a combination thereof, and x&gt;y. In other words, when the reverse polarization layer  406  is made of Al y In 1-y N, the Al composition in the reverse polarization layer  406  is lower than the Al composition in the Al x In 1-x N layer  405 . The polarization field of the reverse polarization layer  406  is smaller than that of the Al x In 1-x N layer  405 , and a thickness ratio of the reverse polarization layer  406  and the Al x In 1-x N layer  405  is between 0.5 and 3. In some embodiments, the thickness ratio of the reverse polarization layer  406  and the Al x In 1-x N layer  405  is between 1 and 2. In some embodiments, the thickness ratio of the reverse polarization layer  406  and the Al x In 1-x N layer  405  is between 1.1 and 1.5. 
         [0028]    The semiconductor device  400  further includes a source  407 , a drain  408 , a gate  409 , a source contact  410 , a drain contact  411 , a source field plate  412 , a gate field plate  413  and an insulating layer  414 . The insulating layer  414  includes an insulating layer  414   a  and an insulating layer  414   b . The reverse polarization layer  406  includes a recess  415 , in which the gate  409  inserts and a portion of the insulating layer  414   a  fills in a sidewall and a bottom of the recess  415 . The gate field plate  413  is formed and connected to a sidewall of the gate  409 . The insulating layer  414   b  is further covering on the gate  409  and the gate field plate  413 . The source  407  and the drain  408  are formed at opposite sides of the gate  409  and on the Al x In 1-x N layer  405 . A source contact  410  is formed on the source  407 , and a drain contact  411  is formed on the drain  408 . Besides, a source field plate  412  is formed on the gate and physically connected to the source contact  410 . In some embodiments, the source  407  and the drain  408  can be formed by doping N-type impurities or P-type impurities in a semiconductor layer, such as Si, Ge or SiGe. In some embodiments, the gate  409 , the source contact  410 , and the drain contact  411  can be made of Ni, Al, Ti, Au, W, TiN, or a combination thereof. The insulating layer  414  can be independently made of SiO 2 , SiNx, Al 2 O 3 , HfO 2 , TiO 2 , or a combination thereof. 
         [0029]    In one specific embodiment, the result is measured from the semiconductor device  100  in which it includes a substrate  101 ; a buffer layer  102  made of AlN/AlGaN composite having a thickness of about 1.25 μm; a channel layer  103  made of GaN having a thickness of about 2.5 μm; a spacer layer  104  made of AlN having a thickness of about 1 nm; an Al x In 1-x N layer  105  made of Al 0.89 In 0.11 N having a thickness of about 10 nm and a reverse polarization layer  106  made of GaN having a thickness of 0, 5, 13, 26 nm. Note that the thickness of reverse polarization layer  106  in this work is much larger than the typical ones, i.e. 2-3 nm, in AlInN-based HEMTs. 
         [0030]    By increasing the thickness of the reverse polarization layer  106 , the semiconductor devices reduce surface electric field, raise the conduction band of the layer and effectively prevent electrons from being trapped in the Al x In 1-x N layer  105 . These characteristics not only increase electron mobility and breakdown voltage but also decrease leakage current and dynamic R on  ratio of the semiconductor device. 
         [0031]    The semiconductor device without reverse polarization layer  106  shows the maximum band energy of the Al x In 1-x N layer of 2 eV, while the band energy increases by the increase of the thickness of the reverse polarization layer  106 . The maximum band energy of the Al x In 1-x N layer  105  with 5, 13, 26 nm thickness of reverse polarization  106  is raised to above 4 eV. 
         [0032]    Transport properties of the semiconductor devices were accessed by van der Pauw Hall measurements. Due to the reverse polarization field of reverse polarization layer  106  on Al x In 1-x N layer  105 , the increase in the thickness of reverse polarization layer  106  raises the conduction band and decreases the 2DEG concentration (Table 1). The 2DEG concentration of the semiconductor devices with 0, 5, 13, 26 nm thickness of reverse polarization layer  106  are 2.76×10 13 , 2.32×10 13 , 1.74×10 13 , and 1.59×10 13  cm −2 , respectively. The electron mobility of the semiconductor devices with 0, 5, 13, 26 nm thickness of reverse polarization layer  106  at room temperature are 780, 974, 1330, and 1320 cm 2 /Vs, respectively, which increases with increasing reverse polarization layer  106  thickness and saturates as the thickness reaches 13 nm (Table 1). The sheet resistances (R sh ) of the semiconductor devices with 0, 5, 13, 26 nm thickness of reverse polarization layer  106  are 290, 276, 271, and 299 Ω/sq, respectively, which are consistently lower than that of its AlGaN counterparts (Table 1). 
         [0000]    
       
         
               
               
             
               
               
               
               
               
             
               
               
               
               
               
             
           
               
                   
                 TABLE 1 
               
             
             
               
                   
                   
               
               
                   
                 Reverse polarization layer thickness (nm) 
               
             
          
           
               
                   
                 0 
                 5 
                 13 
                 26 
               
               
                   
                   
               
             
          
           
               
                 2DEG 
                 2.76 × 10 13   
                 2.32 × 10 13   
                 1.74 × 10 13   
                 1.59 × 10 13   
               
               
                 concentration 
               
               
                 (cm −2 ) 
               
               
                 Electron 
                 780 
                 974 
                 1330 
                 1320 
               
               
                 mobility 
               
               
                 (cm 2 /Vs) 
               
               
                 R sh  (Ω/sq) 
                 290 
                 276 
                 271 
                 299 
               
               
                 Breakdown 
                 72 
                 89 
                 116 
                 172 
               
               
                 voltage (V) 
               
               
                 Dynamic 
                 20 
                 2.3 
                 2.1 
                 1.7 
               
               
                 R on  ratio 
               
               
                   
               
             
          
         
       
     
         [0033]    The breakdown voltage of the semiconductor devices with 0, 5, 13, 26 thickness of reverse polarization are 72, 89, 116 and 172 V, respectively (Table 1). The off-state leakage current, which is dominated by the gate leakage current, also consistently decreases with increasing thickness of the reverse polarization layer  106 . 
         [0034]    The dynamic on-state resistance (R on ) ratio of the HEMT devices reduces with the increasing of the reverse polarization thickness. The devices were stressed under the off-state condition with a constant V d  for 10 ms, before being the biased to the on-state linear region for 4 ms to observe the variation in R on . Dynamic R on  ratio defined as the ratio of R on  at 100 μs after the stress to the static R on . As an important performance index for switching, dynamic R on  reflects the charge trapping behaviors in the material and has been attributed to the trap states at the surface, Al x In 1-x N layer, reverse polarization layer, interface and the buffer layer. Higher stress voltage leads to larger dynamic R on  ratio and thicker reverse polarization layer causes lower electric field near the gate and smaller dynamic R on  ratio. The dynamic R on  ratio of the semiconductor device without reverse polarization layer  106  is 20 after a 40V stress, while the semiconductor devices with 5, 13, 26 nm thickness of reverse polarization layer  106  are significantly reduced to 2.3, 2.1 and 1.7, respectively (Table 1). 
         [0035]      FIG. 5  shows a flowchart illustrating a method for manufacturing the semiconductor device  100 . For manufacturing the semiconductor device  100 , the method begins at step  501  and ends at step  507 . In step  501 , a buffer layer  102  is formed on a substrate  101 . In step  502 , a channel layer  103  is formed on the buffer layer  102 . In step  503 , a spacer layer  104  is optionally formed on the channel layer  103 . In step  504 , an Al x In 1-x N layer  105  is formed on the optional spacer layer  104 . In step  505 , a reverse polarization layer  106  is formed on the Al x In 1-x N layer  105 . The growth of the aforementioned semiconductor layer (i.e. the buffer layer  102 , the channel layer  103 , the spacer layer  104 , the Al x In 1-x N layer  105  and the reverse polarization layer  106 ) is carried out by the well-know technique of the metal-organized-chemical-vapor-deposition (MOCVD). In step  506 , form a source  107  and a drain  108  on the Al x In 1-x N layer  105  and then form a source contact  110  and a drain contact  111  on the source  107  and the drain  108 , respectively. The source  107  and the drain  108  can be formed by epitaxy and ion implantation. Finally, in step  507 , a gate  109  is formed on the reverse polarization layer  106  and let the source  107  and the drain  108  at opposite sides of the gate  109 . The gate  109  can be formed by any deposition process. 
         [0036]    The materials of these features or structures are mentioned above, which is not described again for simplicity. 
         [0037]    The manufacturing of the semiconductor device  200  is similar with the manufacturing of the semiconductor device  100  with a difference after step  506 . After step  506 , a recess  213  is formed in the reverse polarization layer  206  and let the source  207  and the drain  208  at opposite sides of the recess  213 . Then, a gate  209  is formed in the recess  213  and a gate field plate  212  is formed and connected to a sidewall of the gate  209 . The recess can be formed by photolithography. 
         [0038]    The manufacturing of the semiconductor device  300  is similar with semiconductor device  100  with a difference after step  506 . After step  506 , an insulating layer  314   a  is deposited on the reverse polarization layer  306  and includes a recess  315 . Let the source  307  and the drain  308  at opposite sides of the recess  315 , in which a gate  309  inserts. A gate field plate  313  is formed on the reverse polarization layer  306  and connected to a sidewall of the gate  309 . The insulating layer  314   b  is further encompassing on the gate  309  and the gate field plate  313 . Finally, a source field plate  312  is formed on the gate  309  and physically connected to the source contact  310 . 
         [0039]    The manufacturing of the semiconductor device  400  is similar with semiconductor device  300  with a difference after step  506 . After step  506 , the reverse polarization layer  406  includes a recess  415 , in which the gate  409  inserts and a portion of the insulating layer  414   a  fills in a sidewall and a bottom of the recess  415 . The recess  415  can be formed by photolithography. A gate field plate  413  is formed on the reverse polarization layer  406  and connected to a sidewall of the gate  409 . An insulating layer  414   b  is further encompassing on the gate  409  and the gate field plate  413 . Finally, a source field plate  412  is formed on the gate and physically connected to the source contact  410 . 
         [0040]    The present disclosure has advantages over the existed semiconductor devices. By having this thickness ratio of the reverse polarization layer and the Al x In 1-x N layer, the semiconductor devices reduce surface electric field, raise the conduction band of the Al x In 1-x N layer and effectively prevent electrons from being trapped in the Al x In 1-x N layer. These characteristics not only increase electron mobility and breakdown voltage but also decrease leakage current and dynamic R on  ratio of the semiconductor device. 
         [0041]    Although the present disclosure has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein. 
         [0042]    It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present disclosure without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the present disclosure cover modifications and variations of this disclosure provided they fall within the scope of the following claims.