Abstract:
Memory cells useful in phase change memory include a phase change material between first and second electrode and having a surface facing a surface of the second electrode. The second electrode comprises a plurality of portions of material, each portion having a respective distance from the surface of the phase change material and each portion having a respective resistivity. A portion of the plurality of portions of material farthest from the surface of the phase change material has a lowest resistivity and a portion of the plurality of portions of material closest to the surface of the phase change material has a highest resistivity. The resistivity of each individual portion is lower than the resistivity of each portion located closer to the surface of the phase change material, and higher than the resistivity of each portion located farther from the surface of the phase change material.

Description:
RELATED APPLICATIONS 
       [0001]    This Application is a Continuation of U.S. application Ser. No. 14/191,586, filed Feb. 27, 2014 (allowed), which is a Divisional of U.S. application Ser. No. 13/212,456, filed Aug. 18, 2011, now U.S. Pat. No. 8,679,934, issued on Mar. 25, 2014, which is a Divisional of U.S. application Ser. No. 11/512,858, filed Aug. 30, 2006, now U.S. Pat. No. 8,003,972, issued on Aug. 23, 2011 which are commonly assigned and incorporated herein by reference. 
     
    
     FIELD 
       [0002]    The present disclosure relates generally to phase change memories and in particular the present disclosure relates to phase change memory electrodes. 
       BACKGROUND 
       [0003]    Phase change random access memory (PCRAM) is a non-volatile form of memory that uses the reversible process of changing the state of an alloy containing one or more elements from Group V or VI of the periodic table between amorphous and crystalline states upon application of an electric current, and wherein the two states have substantially different electrical resistance. Typical current phase change memories use a chalcogenide alloy, such as a Germanium-Antimony-Tellurium (GeSbTe, or GST, most commonly Ge 2 Sb 2 Te 5 ) alloy. The amorphous (a-GST) and crystalline (c-GST) states of the material have largely different resistivity, on the order of three orders of magnitude, so that a determination of the state is easily done. The crystalline state has typical resistance on the order of kiloOhms (kΩ), whereas the amorphous state has typical resistance on the order of megaOhms (MΩ). The states are stable under normal conditions, so the PCRAM cell is a non-volatile cell with a long data retention. When the GST is in its amorphous state, it is said to be RESET. When the GST is in its crystalline state, it is said to be SET. A PCRAM cell is read by measuring its resistance. 
         [0004]    The structure of a typical vertical PCRAM cell in a SET state  100  as shown in  FIG. 1  includes a bottom metal contact  102 , a bottom electrode  104  surrounded by dielectric material  106 , a chalcogenide (GST)  108  having a crystalline portion (c-GST)  112 , a top electrode  114 , a metal top contact  116 , and a cell select line  118 . The GST  108  being all c-GST means that the GST has a high conductivity, and low resistance, typically on the order of kΩ. The bottom electrode  104  is sometimes referred to as a heater. 
         [0005]    A RESET structure of the PCRAM cell  100  is shown in  FIG. 2 . The bottom electrode  104  is typically a high conductivity, low resistivity metal or alloy (less than 1 milliOhms.cm (mΩ.cm)). To change the cell  100  from a SET state to a RESET state, a current is passed through the bottom metal contact  102  and bottom electrode  104 . This current heats a programmable volume region of the GST  108  near the top of the bottom electrode  104  to a temperature sufficient to melt the GST in that region. Typical melting points for many GST materials are in the range of 600 degrees C., although the melting point differs for other chalcogenides. When the current is removed, a section of the programmable volume of GST  108  that has been heated to its melting point rapidly cools due to heat dissipation into the surrounding materials. This rapid cooling does not allow the melted programmable volume region to cool in a crystalline state. Instead, a region of amorphous GST (a-GST  110 ) remains at or near the top of the heater  104 . 
         [0006]    The desired a-GST region is a hemispherical region covering the top of the bottom electrode  104  and extending slightly into the field of c-GST. This allows for a high resistance of the GST  108 , as the resistances of the c-GST  112  and a-GST  110  portions behave electrically as series a connected resistance. This is shown in  FIG. 3 . 
         [0007]    The majority of the heat generated by the current passing through the bottom electrode  104  does not contribute to heating of the GST  108 , since the heat is dissipated by the surrounding dielectric material  106 . Therefore, most of the heating of the programmable volume region of GST  108  is due to resistive heating near the top of the heater  106 . 
         [0008]    In typical PCRAM cells, the cell (the GST layer) and the top electrode are patterned together with the current flowing from the top electrode contact to the bottom electrode. In this arrangement, current density is mostly symmetric. In an ideal RESET state, a hemispheric region of GST covering the entire area of the bottom electrode contact is converted to the amorphous state (a-GST  110 ), to prevent a parallel leakage path. 
         [0009]    The hottest region in the GST programmable volume is typically about 20 nanometers above the interface between the bottom electrode  104  and the GST  108  due to heat loss through bottom electrode  104 . The inefficient heating of low resistance bottom electrodes  104  combined with the hottest region being above the interface between the bottom electrode  104  and the GST  108  can create an amorphous GST region that is separated from the bottom electrode as shown in  FIG. 4 . This leads to a parallel resistance connection for the a-GST and c-GST regions, and the current flows though the low resistance path of the parallel circuit, the result being that the cell is stuck at a low resistance state and the GST cannot be converted back to a high resistance state. 
         [0010]    Still further, a RESET current pulse that is too large will form an ideal hemispherical amorphous region covering the bottom electrode  104 , but will create a region of the GST that is too hot, often in excess of 900 degrees C. This hot spot can cause bubbling, sublimation, or composition change. 
         [0011]    To switch the cell  100  from a RESET state to a SET state, a SET current is passed through the metal contact  102  and bottom electrode  104  to heat the a-GST section  110  near the top of the bottom electrode  104  to a temperature below the melting point, but sufficiently high (on the order of 350 degrees C. for typical GST materials, but different for other chalcogenides) at which the mobility of atoms in the region near the top of the bottom electrode  104  allows them to rearrange from an amorphous state to a crystalline state. The resulting configuration has a GST  108  that is all crystalline, as is shown in  FIG. 1 . 
         [0012]    The currents used to SET and RESET the cell are typically as follows. A SET state is achieved by applying a voltage or current pulse sufficient to raise the GST temperature in the programmable volume to below the melting point but above its crystallization temperature, and is held for a sufficient time to allow the rearranging of the atoms to a crystalline state. A RESET state is achieved by applying a voltage or current pulse sufficient to raise the GST temperature in the programmable volume to the melting point, and is held typically for a shorter time than the SET pulse. The SET pulse is typically longer in duration but of lower amplitude than the RESET pulse. The RESET pulse is typically shorter in duration but of higher amplitude than the SET pulse. The actual amplitudes and durations of the pulses depend upon the size of the cells and the particular phase change materials used in the cell. RESET currents for many GST cells are currently in the 400 to 600 microAmpere (μA) range, and have durations in the 10-50 nanosecond range, whereas SET currents are currently in the 100 to 200 μA range and have durations in the 50-100 nanosecond range. Read currents are lower than either SET or RESET currents. As cell size continues to decrease, the currents involved and the durations thereof also continue to decrease. 
         [0013]    For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for improved PCRAM structures and methods for phase change memory switching. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0014]      FIG. 1  is a cross-sectional view of a typical phase change memory cell in a SET state; 
           [0015]      FIG. 2  is a cross-sectional view of a typical phase change memory cell in a RESET state; 
           [0016]      FIG. 3  is a partial cross-sectional view of a desired RESET structure in a phase change memory cell; 
           [0017]      FIG. 4  is a partial cross-sectional view of a failure state RESET structure in a phase change memory cell; 
           [0018]      FIG. 5  is a cross-sectional view of a vertical phase change memory cell according to one embodiment; 
           [0019]      FIG. 6  is a cross-sectional view of a vertical phase change memory cell according to another embodiment; 
           [0020]      FIGS. 7A to 7H  are in-process cross-sectional views of formation of a phase change memory cell according to another embodiment; 
           [0021]      FIG. 8  is a cross-sectional view of a cell-in-the-via phase change memory cell according to one embodiment; 
           [0022]      FIG. 9  is a cross-sectional view of a cell-in-the-via phase change memory cell according to another embodiment; 
           [0023]      FIG. 10  is a simplified circuit diagram of a portion of a memory array according to another embodiment; 
           [0024]      FIG. 11  is a simplified circuit diagram of a portion of a memory array according to another embodiment; and 
           [0025]      FIG. 12  is a simplified circuit diagram of a portion of a memory array according to another embodiment. 
       
    
    
     DETAILED DESCRIPTION 
       [0026]    In the following detailed description of the embodiments, reference is made to the accompanying drawings that form a part hereof. In the drawings, like numerals describe substantially similar components throughout the several views. These embodiments are described in sufficient detail to enable those skilled in the art to practice the embodiments. Other embodiments may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the application. 
         [0027]    The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present disclosure is defined only by the appended claims, along with the full scope of equivalents to which such claims are entitled. 
         [0028]    Plug bottom electrodes of PCRAM cells are often of a shape that slopes from the bottom of the bottom electrode toward the top, with the electrode having a larger cross-sectional area at the top of the bottom electrode near the interface between the bottom electrode and the phase change material than at the bottom of the bottom electrode. This further contributes to inefficiency because for the same current through the plug, a larger cross-sectional area provides even less resistive heating than a smaller cross-sectional area. The current being equal, the resistance of the material at the lower part of the bottom electrode is higher, which generates more heat than the upper portion. This heat is quickly dissipated into the surrounding dielectric and does not contribute to heating of the programmable volume of the phase change material. 
         [0029]    Embodiments disclosed herein use a gradated or layered resistivity bottom electrode of a PCRAM cell to increase the contribution of the bottom electrode to heating of a programmable region of a phase change material of the cell. Still further, the bottom electrode is patterned as a conical-like shape with smaller cross sectional area at the interface between the bottom electrode and the GST of the PCRAM cell. While GST is used in the description herein, it should be understood that other phase change materials including other chalcogenides, are amenable to use with the various embodiments. For example only, phase change materials include but are not limited to GeTe, In—Se, Sb 2 Te 3 , GaSb, InSb, As—Te, Al-—Te, Ge—Sb—Te, Te—Ge—As, In—Sb—Te, Te—Sn—Se, Ge—Se—Ga, Bi—Se—Sb, Ga—Se—Te, Sn—Sb—Te, In—Sb—Ge, Te—Ge—Sb—S, Te—Ge—Sn—O, Te—Ge—Sn—Au, Pd—Te—Ge—Sn, In—Se—Ti—Co, Ge—Sb—Te—Pd, Ge—Sb—Te—Co, Sb—Te—Bi—Se, Ag—In—Sb—Te, Ge—Sb—Se—Te, Ge—Sn—Sb—Te, Ge—Te—Sn—Ni, Ge—Te—Sn—Pd, Ge—Te—Sn—Pt, and the like. For purposes of this application, resistivity refers to electrical resistivity. 
         [0030]      FIG. 5  shows a vertical PCRAM cell  500  in cross section. Cell  500  includes a mostly typical set of components similar to those shown in  FIGS. 1 and 2 , and operates under the same general principles. A lower metal contact  502  has thereon a bottom electrode  504  surrounded by dielectric material  506 . A phase change material  508 , such as a chalcogenide or GST material, is above the bottom electrode  504 , and is topped with a top electrode  514 , a top metal contact  516 , and a cell select line  517 . The phase change material  508  is shown in  FIG. 5  having an amorphous region  510  and a crystalline region  512 . The bottom electrode  504  has a tapered cross section, and a resistivity gradient from its bottom  518  toward its top  520 . The resistivity of the bottom electrode  504  increases from a lower resistivity at bottom  518  to a high resistivity at top  520 . 
         [0031]    The bottom electrode  504  is shown as tapered in  FIG. 5 , but it should be understood that an increasing resistivity bottom electrode without the conical-like shape also provides an increased amount of heat at the interface between the bottom electrode  504  and the phase change material  508 . This is because the smallest cross-sectional area and the highest resistivity of the bottom electrode is closest to the programmable volume of the phase change cell material. The lower resistivity of the lower portion of the bottom electrode reduces heat loss to the surrounding dielectric  506 , and reduces the likelihood of parasitic series resistance from the bottom electrode  504 . 
         [0032]      FIG. 6  shows another vertical PCRAM cell  600  in cross section. Cell  600  includes a mostly typical set of components similar to those shown in  FIGS. 1 and 2 , and operates under the same general principles. A lower metal contact  602  has thereon a bottom electrode  604  surrounded by dielectric material  606 . A phase change material  608 , such as a chalcogenide or GST material, is above the bottom electrode  604 , and is topped with a top electrode  614 , a top metal contact  616 , and a cell select line  617 . The phase change material  608  is shown in  FIG. 6  having an amorphous region  610  and a crystalline region  612 . The bottom electrode  604  has a tapered cross section, and a plurality of layers of material having increasing resistivity, with the lowest resistivity layer  622  at the bottom  618  of the bottom electrode  604  and the highest resistivity layer  624  at the top  620  of bottom electrode  604 . 
         [0033]    The bottom electrode  604  is shown as tapered in  FIG. 6 , but it should be understood that increasing resistivity layers of the bottom electrode without the conical-like shape also provides an increased amount of heat at the interface between the bottom electrode  604  and the phase change material  608 . This is because the smallest cross-sectional area and the highest resistivity layer of the bottom electrode is closest to the programmable volume of the phase change cell material. The lower resistivity of the lower layers of the bottom electrode reduces heat loss to the surrounding dielectric  606 , and reduces the likelihood of parasitic series resistance from the bottom electrode  604 . 
         [0034]    One problem with simply making the entire heater a high resistivity material is that partial heating of the cell GST will occur, but a majority of the heat generated by the current passing through the high resistivity heater will be dissipated into the surrounding dielectric without contributing to the heating of the GST material. Further, power consumption will increase due to the high amounts of voltage required to get current to the GST region through the high resistivity heater element. 
         [0035]    The bottom electrode  504  is in various embodiments formed of a substance that can easily be given a resistively gradient during formation, for example, TiN, ZrN, HfN, VN, NbN, TaN, TiAlN, TaSiN, TiCN, and the like. Resistivity of materials such as TiN, ZrN, HfN, VN, NbN, TaN, TiAlN, TaSiN, TiCN, and the like can be increased by a few orders of magnitude during deposition by increasing the concentration of Nitrogen. This increase in Nitrogen concentration can be accomplished, for example, by adjusting Nitrogen-containing gas ratio during chemical vapor deposition or physical vapor deposition of the bottom electrode material or low energy Nitrogen plasma source implantation. Examples of resistivity differences between the bottom of the bottom electrode and the top of the bottom electrode are for example, less than 1 milliOhm.cm at the bottom to upwards of 6 or more milliOhm.cm at higher Nitrogen concentrations. The bottom electrode  604  is in various embodiments formed in layers of increasing resistivity. 
         [0036]    The high resistivity material close to the GST programmable volume creates a partial heating of the GST programmable volume by the resistive heating at the electrode tops  520  and  620 . This heating serves to move the hottest region of the GST closer to the interface between the bottom electrodes  504  and  604  and the GST  508  and  608 , and to prevent the formation of an amorphous region of GST separated from the tops of the bottom electrodes  504  and  604 . It also helps to reduce the programming current requirement of phase change memory cells. 
         [0037]    The embodiments herein concentrate heating due to the bottom electrodes  504  and  604  at their tops where the high resistivity material is, that is, near the interface between the bottom electrodes  504  or  604  and the GST  508  or  608 . The heat produced by the high resistivity material at the tops of bottom electrodes  504  and  604  is close to the cell interface, and provides efficient heating of the programmable volume, and prevents the formation of a crystalline GST region between the bottom electrodes  504 ,  604  and the amorphous GST region formed at the tops of the bottom electrodes  504 ,  604 . Further, since high electrical resistivity material has a lower thermal conductivity than low electrical resistivity material, the traditional heat sink effect of a low electrical resistivity heater element is reduced at or near the interface between the heater element and the GST. In combination, the programming current requirements can also be reduced. 
         [0038]    A bottom electrode according to one embodiment includes an electrode that tapers from its largest cross-sectional area to its smallest cross-sectional area between a bottom metal contact and the phase change cell material. As the cross-sectional area decreases, reaching its smallest area at the interface between the bottom electrode and the phase change cell material, with an equal current, the opposite effect of traditional bottom electrodes occurs. For the same current, the resistance of the bottom electrode is at its highest at the interface between the bottom electrode and the phase change cell material. Therefore, the top of the bottom electrode, closest to the phase change material, generates more heat than the lower portion of the electrode. 
         [0039]    In another embodiment, a gradated resistivity material is used for forming the bottom electrode. The resistivity of the bottom electrode is increased the closer the portion of the electrode is to the interface between the bottom electrode and the phase change cell material. That is, the resistivity increases from the bottom of the bottom electrode toward the top of the bottom electrode. The increased resistivity provides a higher heat concentration at the top of the electrode, where it is most able to provide heat to the programmable volume of the phase change cell material. Gradation of material is accomplished through known deposition techniques for increasing concentration of dopants in a material during deposition, for example. 
         [0040]    In another embodiment, instead of a bottom electrode with a resistivity gradient, a series of layers of increasing resistivity are deposited, the lowest resistivity material being in the lowest layer of the bottom electrode, with increasing resistivity layers toward the top of the bottom electrode. The highest resistivity layer is at the top of the bottom electrode, where it contributes the most toward heating the programmable volume of the phase change material at the interface between the bottom electrode and the phase change cell material. 
         [0041]    In other embodiments, a gradated resistivity bottom electrode or a layered resistivity electrode such as those described above are combined with a tapered bottom electrode, also as described above. This provides a tapered bottom electrode having a smaller cross-sectional area at the top of the bottom electrode versus the bottom of the bottom electrode, as well as gradated or layered resistivity, which further increases the heating close to the phase change cell material, and reduces heat loss to surrounding dielectrics in the lower portions of the bottom electrode. 
         [0042]    The bottom electrodes  504  and  604  described above can be formed in a number of ways.  FIGS. 7A to 7H  show the formation of an electrode such as electrode  504  in a series of in-process cross-sectional views. During formation of the PCRAM cell  500 , a layer of bottom electrode material  702  is deposited over metal contacts and substrate  704  and  706 , followed by, for example, a photoresist layer  708  or a sacrificial dielectric layer. Spacers  710  are deposited using, for example, a chemical vapor deposition process, and are shown in  FIG. 7B . The spacers  710  are aligned in the Y direction, and following appropriate etching to remove layer  708 , the spacers  710  remain, and are centered over the metal contacts  704  in the Y direction as shown in  FIG. 7C . The spacers can be made to sizes smaller than current lithography techniques will allow, with dimensions of 20 nanometers or smaller. Using an etch, such as a reactive ion etching process, as shown in the Y directions in  FIG. 7D , bottom electrode material  712  remains, in a structure tapered along the Y direction , as shown in  FIG. 7E . The spacers  710  are removed. Next, spacers  714  are deposited in similar fashion as spacers  710  described above, but in the X direction as is shown in  FIG. 7F . Using another etch, as shown in the X direction in  FIG. 7G , bottom electrodes  716  (like bottom electrodes  504  and  604 ) remain, and the sacrificial spacers are subsequently removed. The bottom electrodes  716  are shown in top view in  FIG. 7H  with a tapered shape smaller at their tops and larger at their bottoms. Etching to allow tapered structures is accomplished in a variety of ways, including angling the ion source to create tapered structures, and the like, and will not be described further herein. Following the formation of the cone-like bottom electrodes  716 , dielectric is deposited between the electrodes and the structure is planarized, followed by deposition of the GST phase change layer and top metal contacts. 
         [0043]    Formation of the PCRAM cell using a layered resistivity bottom electrode such as cell  604  is performed in much the same method as the formation of cell  500 , except using a plurality of layers if increasing resistivity bottom electrode material as opposed to a gradated resistivity bottom electrode material. 
         [0044]    The various embodiments have been shown with vertical PCRAM cells. The layered or gradated resistivity electrodes are also provided with cell-in-the-via PCRAM cells, such as those shown in  FIGS. 8 and 9 . Cell-in-the-via structures have a bottom electrode larger than the GST cell size. A resistivity gradient or layered resistivity layers with increasing resistivity near the top of the bottom electrode provides increased heating at the interface between the bottom electrode and the phase change cell material. 
         [0045]    PCRAM memory arrays can take several different forms, each of which are amenable to use with the bottom electrode cap configuration PCRAM cells described above. Examples of PCRAM memory arrays include an array of PCRAM cells each comprising an access transistor (metal oxide semiconductor field effect transistor (MOSFET) or bipolar transistor) and one PCRAM cell, in other words a 1T1C configuration. The resistance of the PCRAM cell can be switched between high and low states by resetting the GST of the cell to an amorphous state (high resistance) or setting the cell to a crystalline state (low resistance). Both set and reset currents are provided through the access transistor. An example of a portion of a PCRAM array of this type is shown in  FIG. 10 . A cell is selected by selecting its corresponding word line and cell select line. Bitlines may be tied to a common voltage source or individually selected. To RESET a cell, a large short pulse is applied to the corresponding cell select line while its word line is turned on. The RESET current flows through the selected memory element and resets the cell. To SET a cell, a smaller but longer pulse is applied to the cell select line to heat the memory element above its crystallization temperature but below its melting point. To read a cell, a voltage smaller than the threshold switching voltage of amorphous phase change material is applied to the cell select line. 
         [0046]    Another PCRAM memory array uses a large block of phase change material and a top electrode, and is shown in general in  FIG. 11 . A common voltage is applied to the top electrode to bias all memory bits. A memory element is selected by selecting its word line and bitline. 
         [0047]    Yet another PCRAM memory array is shown in  FIG. 12 . Diode-accessed cross-point PCRAM arrays select a memory element by biasing its word line high and non-selected word lines low, while biasing its selected bitline low and non-selected bitlines high. Only the diode connected to the selected cell is forward biased. All other diodes are reverse biased or do not have sufficient bias to overcome their threshold voltage, and no current flows except in the selected cell. 
         [0048]    PCRAM arrays can be used in various memory devices, and may be coupled to a processor or memory controller, and may form part of an electronic system, including but not limited to memory modules for computers, cameras, portable storage devices, digital recording and playback devices, PDAs, and the like. 
       Conclusion 
       [0049]    PCRAM cells and methods of forming them have been described that include tapered and untapered gradated resistivity bottom electrodes; and tapered or untapered layered resistivity bottom electrodes, to provide localized heating of a GST layer of the cell, preventing separation of an amorphous GST region from the top of the bottom electrode. Tapered and untapered electrodes are provided in vertical PCRAM cells. Untapered electrodes are provided in cell-in-the-via PCRAM cells. Further, programming current requirements are reduced. 
         [0050]    Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that any arrangement, which is calculated to achieve the same purpose, may be substituted for the specific embodiments shown. This application is intended to cover any adaptations or variations of the embodiments. Therefore, it is manifestly intended that this application be limited only by the claims and the equivalents thereof.