Abstract:
An active solid heatsink device and fabricating method thereof is related to a high-effective solid cooling device, where heat generated by a heat source with a small area and a high heat-generating density diffuses to a whole substrate using a heat conduction characteristic of hot electrons of a thermionic (TI) structure, and the thermionic (TI) structure and a thermo-electric (TE) structure share the substrate where the heat diffuses to. Further, the shared substrate serves as a cold end of the TE structure, and the heat diffusing to the shared substrate is pumped to another substrate of the TE structure serving as a hot end of the TE structure.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This non-provisional application claims priority under 35 U.S.C. §119(a) on Patent Application No(s). 097111577 filed in Taiwan, R.O.C. on Mar. 28, 2008 the entire contents of which are hereby incorporated by reference. 
       BACKGROUND 
       [0002]    1. Field of Invention 
         [0003]    The present invention relates to a heatsink device, and more particularly to an active solid heatsink device and fabricating method thereof. 
         [0004]    2. Related Art 
         [0005]    When an electron industry process is improved from 90 nm to 65 nm or even 45 nm, the heat generation of a developed “multi-core” integrated circuit (IC) has been reduced from 130 W (watt) to 80 W. In this manner, although the high heat generation problem has been solved, the problem of hot spots occurs on an IC chip. A so-called hot spot is a local heat-generating portion with an area of approximately 50 μm (micrometer)*50 μm. On the hot spots, a local heat flux can be up to 150 W/cm 2  to 1000 W/cm 2 . At the same time, the generation of the hot spots will lower the performance of the IC chip (e.g. a processor). Although a conventional heatsink device (e.g. air cooled type or air cooled type used in conjunction with the heat pipes) can settle down the problem of the total heat generation of the processor, the hot spots cannot be effectively eliminated. Therefore, there is a need for a new cooling technique capable of eliminating the problem of the hot spots. 
         [0006]    On the other hand, on the application of the light emit diodes (LEDs), the improvement of the light-emitting brightness of the LEDs will increase the heat generation amount per unit unit area of the LEDs, and thus a heat-generating density is continuously increased. At the same time, since the package structure of the LEDs is different from that of common ICs, the heat dissipation manner of the LEDs is also different of that of the common ICs. Therefore, the heat dissipation problem of the LEDs is also a technical bottleneck to be solved by the photoelectric semiconductor industry. Currently, mostly solder ball bumps or bonding pads are used as the heatsink bodies for transferring the heat to the heatsink device fin or the substrate in a heat conduction manner, so as to dissipate the heat. Although the similar passive heat dissipation methods are integrated in the package structure of the LEDs, for providing the heat dissipating capability, the heatsink bodies transfer the heat from a hotter heat source to a colder heatsink device component based on a basic law of thermodynamics, and then the heatsink components exchanges the extra heat through the heat conduction and heat convection. Thus, the heat dissipation effect is poor. Then, a solid active heatsink device is developed to provide more direct and efficient cooling capability. 
         [0007]    A conventional active solid heatsink device is a thermo-electric (TE) element. The TE element is also called a refrigerator, which is an active cooling technique and has the effect of reducing the temperature to below the room temperature. The TE element uses a carrier of the semiconductor as a heat conduction medium, and the energy required by the electron to flow is provided by an externally applied direct current (DC). Thus, the carrier flows from a cold end to a hot end, thereby transferring the heat from one end to the other end and achieving the heat dissipation effect. In other words, when the TE element is powered, the electrons start from a negative electrode, pass through a P-type semiconductor channel and absorb the heat energy therein, then reach an N-type semiconductor channel and release the heat energy. Here, once passing through one P-N module, the heat energy is transferred from one end to the other end. In this manner, the heat energy is actively pumped to cause the temperature difference, thereby forming the cold and hot ends. The TE element can be used to control the temperature, and the structure thereof is simple. Therefore, the refrigerant is not required, and mechanical parts are omitted, thus eliminating noises. 
         [0008]    Another active solid heatsink device is a thermionic (TI) element. An operating principle of the TI element is similar to that of the TE element. The TI element includes two spaced metal electrodes. By applying a potential difference between the two metal electrodes, the electron flow is driven to flow from one electrode to the other electrode. At the same time, as the energy is transferred, i.e. the electrode where the net electrode flow origins becomes cool, and the electrode where the net electrode flow terminates becomes hot. Due to the physical limitations, the conventional TI element cannot achieve the cooling requirements under the normal temperature. Therefore, the semiconductor material is used as the medium between the electrodes, so as to improve the net electron flow (conductivity) of the TI element. By using the heterogeneous structure semiconductor (e.g. super lattice semiconductor material) as the medium, the conductivity of the TI element can be improved, and meanwhile the heat conduction coefficient of the semiconductor can be reduced, so as to prevent the heat energy of the hot end flowing back to the cold end due to the temperature difference, thereby improving the efficiency of the TI element. 
         [0009]    However, in the conventional active solid heatsink device, a single pin area is larger than or equal to the area of the hot spot, and the high heat-generating density of the hot spot exceeds a heat load of a single pin. Therefore, the effect of merely using the active solid heatsink device for eliminating the hot spots is quite limited. 
       SUMMARY OF THE INVENTION 
       [0010]    The present invention provides an active solid heatsink device, which includes a heavy doped first substrate, a metal layer, a semiconductor film block, and a second electrode. 
         [0011]    The metal layer and the semiconductor film block are located on the same surface of the first substrate and are spaced from each other. The second electrode is connected to the semiconductor film block, and is spaced from the metal layer and the first substrate. The metal layer has a first electrode. The semiconductor film block cancan be a super lattice barrier. 
         [0012]    The present invention provides a method of fabricating an active solid heatsink device, which includes the following steps. A heavy doped first substrate is provided. A semiconductor film block and a metal layer are formed on the same surface of the first substrate. A second electrode connected to the semiconductor film block and spaced from the metal layer and the first substrate is formed. The semiconductor film block and the metal layer are spaced apart, and the metal layer has a first electrode. 
         [0013]    When the device operates, a voltage is applied between the first electrode and the second electrode, so as to generate an electron flow flowing from the second electrode to the first electrode via the semiconductor film block and the first substrate, thereby carrying away the heat energy generated by a heat source in contact with the other surface of the first substrate opposite to the semiconductor film block. 
         [0014]    An insulating layer can be covered on the other side of the metal layer opposite to the first substrate, so as to serve as a substrate which is shared by the TE structure during subsequent processing. Then, at least one TE element can be formed on the insulating layer, and a second substrate is connected to the other end of the TE element opposite to the insulating layer. In this manner, the heat energy spreading to the insulating layer can be pumped to the second substrate by the TE, so as to further improve the heat dissipation efficiency. 
         [0015]    According to the active solid heatsink device and the fabricating method thereof of the present invention, the high-effective solid cooling device provided by the present invention has a wide application field, and can be used for cooling not only the common ICs and LEDs, but also a laser source, a switcher, a router, a detector, and other elements in a large scale integrated circuit (LSI), a processor, or an optical communication system, and even a refrigerator and other household appliance. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0016]    The present invention will become more fully understood from the detailed description given herein below for illustration only, and thus are not limitative of the present invention, and wherein: 
           [0017]      FIGS. 1A to 1C  are fabrication flow charts of an active solid heatsink device according to a first embodiment of the present invention; 
           [0018]      FIG. 2  is a fabrication flow chart of an embodiment of a structure as shown in  FIG. 1A ; 
           [0019]      FIG. 3  is a top view of a structure as shown in  FIG. 1B , in which  FIG. 1B  is a schematic cross-sectional view taken along a section line I-I; 
           [0020]      FIG. 4  is a top view of a structure as shown in  FIG. 1C , in which  FIG. 1C  is a schematic cross-sectional view taken along the section line I-I; 
           [0021]      FIGS. 5A to 5D  are fabrication flow charts of an embodiment of the structure as shown in  FIG. 1B ; 
           [0022]      FIG. 6  is a top view of a structure as shown in  FIG. 5C , in which  FIG. 5C  is a schematic cross-sectional view taken along the section line I-I; 
           [0023]      FIGS. 7 to 8  are fabrication flow charts of another embodiment of the structure as shown in  FIG. 1B ; 
           [0024]      FIGS. 9A to 9C  are fabrication flow charts of an embodiment of the structure as shown in  FIG. 1C ; 
           [0025]      FIG. 10  is a top view of a structure as shown in  FIG. 9A , in which  FIG. 9A  is a schematic cross-sectional view taken along the section line I-I; 
           [0026]      FIG. 11  is a top view of a structure as shown in  FIG. 9B , in which  FIG. 9B  is a schematic cross-sectional view taken along the section line I-I; 
           [0027]      FIG. 12  is a top view of a structure as shown in  FIG. 9C , in which  FIG. 9C  is a schematic cross-sectional view taken along the section line I-I; 
           [0028]      FIGS. 13A to 13B  are fabrication flow charts of an embodiment of the structure as shown in  FIG. 9A ; 
           [0029]      FIG. 14  is a top view of the structure as shown in  FIG. 13A , in which  FIG. 13A  is a schematic cross-sectional view taken along the section line I-I; 
           [0030]      FIG. 15  is a top view of a variation of the structure as shown in  FIG. 1C ; 
           [0031]      FIG. 16  is a schematic cross-sectional view of an active solid heatsink device according to a second embodiment of the present invention, in which dashed lines indicate an operation state of the device when operating; 
           [0032]      FIGS. 17A to 17B  are fabrication flow charts of an embodiment of the structure as shown in  FIG. 16 ; 
           [0033]      FIG. 18  is a schematic cross-sectional view of an active solid heatsink device according to a third embodiment of the present invention; 
           [0034]      FIG. 19  is a schematic cross-sectional view of an active solid heatsink device according to a fourth embodiment of the present invention; 
           [0035]      FIGS. 20A to 20B  are fabrication flow charts of an embodiment of the structure as shown in  FIG. 18 ; 
           [0036]      FIG. 21A  is a schematic cross-sectional view of a first embodiment of a TE structure in the active solid heatsink device of the present invention; 
           [0037]      FIG. 21B  is a schematic cross-sectional view of a second embodiment of a TE structure in the active solid heatsink device of the present invention; 
           [0038]      FIG. 22A  is a top view of an arrangement of a first embodiment of a pair of fourth electrodes in the active solid heatsink device of the present invention; 
           [0039]      FIG. 22B  is a top view of an arrangement of a second embodiment of a pair of fourth electrodes in the active solid heatsink device of the present invention; 
           [0040]      FIG. 23A  is a top view of a first variation of a structure as shown in  FIG. 21A ; and 
           [0041]      FIG. 23B  is a top view of a second variation of a structure as shown in  FIG. 21A . 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0042]      FIGS. 1A to 1C  show a method of fabricating an active solid heatsink device according to an embodiment of the present invention. 
         [0043]    A heavy doped first substrate  110  is provided, a shown in  FIG. 1A . The heavy doped first substrate  110  can be obtained through the following steps. Referring to  FIG. 2 , first, the base material for fabricating the first substrate  110  is provided (step  210 ). Then, the base material is heavily doped with a plurality of dopants (step  220 ), so as to obtain the first substrate  110  as shown in  FIG. 1A . For example, the first substrate  110  can be, but not limited to, heavy doped P or N silicon substrate. 
         [0044]    A semiconductor film block (e.g. a super lattice barrier  130  for convenience of illustration) and a metal layer  150  are formed on the same surface of the first substrate  110 , as shown in  FIGS. 1B and 3 . The super lattice barrier  130  and the metal layer  150  are spaced apart. In addition to a column as shown in the figure, the super lattice barrier  130  can be in other three-dimensional geometrical shapes freely, for example, but not limited here, a cube, a hexagonal prism, or a triangular prism, etc. In other words, the super lattice barrier  130  can be replaced by other semiconductor film blocks having the TE characteristics. 
         [0045]    Then, a second electrode  170  connected to the super lattice barrier  130  is formed, and the second electrode  170  is spaced from the metal layer  150  and the first substrate  110 . That is to say, the second electrode  170  is not directly connected to, that is, does not contact with, the metal layer  150  and the first substrate  110 , as shown in  FIGS. 1C and 4 . In this manner, a TI structure can be formed. During operation, the other surface of the first substrate  110  opposite to the super lattice barrier  130  contacts the heat source, and a voltage is applied between the metal layer  150  and the second electrode  170 . That is to say, the heat energy generated by the heat source is carried away by the electron flow flowing from the second electrode  170  to the metal layer  150  via the supper lattice barrier  130  and the first substrate  110 . 
         [0046]    In an embodiment, a super lattice thin layer  132  can be first grown on the surface of the first substrate  110 , as shown in  FIG. 5A . Then, the undesired portion is removed by etching, laser lift-off, or other semiconductor techniques, so as to form the super lattice barrier  130 , as shown in  FIG. 5B . A protective layer  140  is formed on the super lattice barrier  130  and the first substrate  110   a  in the predetermined region around the super lattice barrier  130  (i.e. the region in which the metal layer is not formed) by the semiconductor processing technique, for example, a coating process, as shown in  FIGS. 5C and 6 . In addition, the protective layer  140  can be formed on a corresponding position on the first substrate  110  corresponding to the position on which the second electrode  170  is to be formed (for example, the protective layer  140  as shown in  FIG. 6 , extending from the corresponding position on which the super lattice barrier  130  is to be formed to far away). Then, the metal layer  150  is formed on the first substrate  110  and the protective layer  140  by metal sputtering, evaporation, electroplating, or other semiconductor process techniques, as shown in  FIG. 5D . Finally, the protective layer  140  is removed together with the metal layer  150  on the protective layer  140 , so as to obtain the metal layer  150  spaced from the super lattice barrier  130  through a notch, i.e. the structure as shown in  FIGS. 1B and 3 . 
         [0047]    In another embodiment, a whole metal layer  150  can be first grown on the surface of the first substrate  110 , as shown in  FIG. 7 . Then, a notch  152  exposing the first substrate  110  is etched on the metal layer  150  through an etching process, as shown in  FIG. 8 . Then, the super lattice barrier  130  is disposed on the surface of the first substrate  110  in the notch  152 , so as to obtain the structure as shown in  FIGS. 1B and 3 . Here, the notch  152  can be formed corresponding to the position on which the super lattice barrier  130  is to be formed, such that when the super lattice barrier  130  is disposed in the notch  152 , the super lattice barrier  130  and the metal layer  150  can be spaced apart. In addition, the notch  152  can be formed corresponding to the position on which the second electrode  170  is to be formed. Therefore, when the second electrode  170  is formed, the second electrode  170  can not be directly connected to the metal layer  150 . In other words, the second electrode can be formed corresponding to the position of the notch. 
         [0048]    In the structure as shown  FIGS. 1B and 3 , in an embodiment, an insulating layer  160 , for example, but not limited to SiO 2  layer or SiN 2  layer, can be first formed on the first substrate  110  in the notch  152 , as shown in  FIGS. 9A and 10 . Then, a protective layer  142  is formed on the insulating layer  160  along the edge of the metal layer  150 , as shown in  FIGS. 9B and 11 . Here, the protective layer  142  can substantially completely cover the insulating layer  160  between the metal layer  150  and the super lattice barrier  130 . Then, a metal layer  151  is covered thereon by the metal sputtering process and other semiconductor process techniques, as shown in  FIGS. 9C and 12 . That is to say, the metal layer  151  is formed on the metal layer  150  and the protective layer  142 , or the metal layer  151  is formed on the super lattice barrier  130 , the metal layer  150 , and the protective layer  142 . Finally, the protective layer  142  is removed together with the metal layer  151  on the protective layer  142 , so as to partition the metal layer  151  into two blocks. The block of the metal layer  151  connected to the super lattice barrier  130  is a second electrode  170 . At the same time, the second electrode  170  can be spaced from the metal layer  151  of the rest block through the notch, thereby being spaced from the metal layer  150 , i.e. forming the structure as shown in  FIGS. 1C and 4 . Here, the metal layer  150  and the metal layer  151  can be made of the same metal material, and can also be made of different metal materials. In other words, regarding the structure of  FIGS. 1C and 4 , the metal layer  150  can include one or more metal materials. 
         [0049]    In addition, according to the structure as shown in  FIGS. 1B and 3 , a protective layer  144  can be coated on the metal layer  150 , as shown in  FIGS. 13A and 14 . Here, if it intends to cover the second electrode  170  on the super lattice barrier  130 , the protective layer  144  is also formed on the super lattice barrier  130 . Then, the insulating layer  160  is formed on the surface of the protective layer  144  and the first substrate  110  by an overall deposition of SiO 2 , as shown in  FIG. 13B . Then, the protective layer  144  is removed together with the insulating layer  160  on the protective layer  144 , so as to obtain the structure as shown in  FIGS. 9A and 10 . 
         [0050]    Further, a groove  154  penetrating through the metal layer  150  is formed on the metal layer  150 . That is to say, the groove  154  can expose the first substrate  110 , so as to partition the metal layer  150  into two blocks, as shown in  FIG. 15 . The block of the metal layer  150  located on the other side of the groove  154  opposite to the super lattice barrier  130  is a first electrode  156 . When the device operates, the voltage required for driving the electron flow is fed from the first electrode  156 . The block of the metal layer  150  on a side of the groove  154  near the super lattice barrier  130  is a heat-spreading block  158 , which is used to uniformly spread the heat energy generated by the heat source on the first substrate. In other words, the heat-spreading block  158  is located between the first electrode  156  and the super lattice barrier  130 , and is spaced from the first electrode  156  and the super lattice barrier  130 . In addition, the groove  154  and the notch  152  can be formed in the same etching process. 
         [0051]    According to the structure as shown in FIGS. IC and  4 , an insulating layer  162  can be further formed on the other surface of the metal layer  150  opposite to the first substrate  110 , as shown in  FIG. 16 . The insulating layer  162  can be used as the substrate shared by the subsequently fabricated TE structure. Here, the insulating layer  162  can be formed by an overall coating of SiO 2 . 
         [0052]    Further, a protective layer block  146  can be formed on the first electrode (i.e. the metal layer  150 , and preferably the metal layer  150  away from the super lattice barrier  130 ) and the second electrode  170  before the insulating layer  162  is formed, as shown in  FIG. 17A . Then, the insulating layer  162  is formed by an overall or partial coating of insulating material, as shown in  FIG. 17B . Then, the protective layer block  146  and the insulating layer  162  thereon are removed, such that the insulating layer  162  exposes the first electrode (i.e. the metal layer  150 ) and the second electrode  170 , as shown in  FIG. 16 . The part of the insulating layer  162  exposing the first electrode and the second electrode  170  can be used as voltage feeding portions  157  and  177 . During operation, the other surface of the first substrate  110  opposite to the super lattice barrier  130  contacts the heat source  300 , and a voltage is applied between the voltage feeding portion  157  of the first electrode and the voltage feeding portion  177  of the second electrode  170 , so as to form an electron flow flowing from the second electrode  170  to the metal layer  150  through the super lattice barrier  130  and the first substrate  110 , thereby carrying away the heat energy generated by the heat source  300 . The heat source  300  can be a device or an element having a hot spot  310 . 
         [0053]    In addition, at least one TE structure  400  is further formed, so as to connect the insulating layer  162  and a second substrate  500 , as shown in  FIG. 18 . In this manner, the heat spreading to the insulating layer  162  can be pumped to the second substrate  500  by the TE structure  400 , so as to further improve the heat dissipation efficiency of the active solid heatsink device of the present invention. The second substrate  500  can be fabricated by, for example, silicon, ceramic, metal, or other materials. If the second substrate  500  is fabricated by the metal material, a dielectric layer is formed on the surface of the second substrate  500  and is used to isolate the electrode from the metal material of the second substrate  500 . Other heatsink device modules, e.g. silicon substrate micro flow path, silicon substrate micro heat pipe, metal fin, or heat pipe, can be further integrated on the other side of the second substrate  500  opposite to the TE structure, so as to improve the heat dissipating effect. 
         [0054]    Here, a third electrode  410  required for the subsequent assembly of the TE structure  400  can be first formed on the other surface of the insulating layer  162  opposite to the metal layer, as shown in  FIG. 19 . 
         [0055]    In an embodiment, according to the structure as shown in  FIG. 19 , a P channel  430   a  and an N channel  430   b  corresponding to each other are formed on the other surface of each third electrode  410  opposite to the insulating layer  162 , as shown in  FIG. 20A . A pair of fourth electrodes  450  is formed on the P channel  430   a  and the N channel  430   b  corresponding to each other, as shown in  FIG. 20B . That is to say, a fourth electrode  450   a  of the pair of fourth electrodes  450  is formed on the other end of the P channel  430   a  opposite to the third electrode  410 . The other fourth electrode  450   b  of the pair of fourth electrodes  450  is formed on the other end of the N channel  430   b  opposite to the third electrode  410 . In this manner, the TE structure  400  can be formed by the third electrode  410 , the P channel  430   a  and the N channel  430   b  corresponding to each other, and the pair of fourth electrodes  450 . In other words, the P channel  430   a  and the N channel  430   b  correspond to each other, and both of the P channel  430   a  and the N channel  430   b  corresponding to each other also correspond to a third electrode  410  and a pair of fourth electrodes  450 . The P channel  430   a  is connected between the corresponding third electrode  410  and the fourth electrode  450   a  of the corresponding pair of fourth electrodes  450 . The N channel  430   b  and the corresponding P channel  430   a  are connected between the same third electrode  410  and the other fourth electrode  450   b  of the same pair of fourth electrodes  450 . 
         [0056]    Finally, the second substrate  500  is formed on the other surface of the pair of fourth electrodes  450  opposite to the P channel  430   a  and the N channel  430   b,  so as to serve as a hot end substrate of the TE structure  400 . 
         [0057]    In other words, one or more TE structures  400  can be located between the other surface of the insulating layer  162  opposite to the metal layer  150  and the second substrate  500 , so as to be connected to the insulating layer  162  and the second substrate  500 , and thus the structure as shown in  FIG. 18  is obtained. 
         [0058]    When the device is operated, the voltage is applied to the pair of fourth electrodes  450 , such that the heat energy spreading to the insulating layer  162  is pumped to the other end of the semiconductor channel opposite to the insulating layer  162 , through the carrier flowing on the semiconductor channel (i.e. the P channel  430   a  and the N channel  430   b ). 
         [0059]    One or more TE structures  400  can be first formed on the second substrate  500 , as shown in  FIGS. 21A and 21B . Then, the other end of the TE structure  400  opposite to the second substrate  500  is combined with the insulating layer  162  or the third electrode  410  preformed on the insulating layer  162 , and thus the structure as shown in  FIG. 18  is obtained. 
         [0060]    Here, the adjacent TE structures  400  are serially connected, that is, the fourth electrodes  450   a  and  450   b  are connected together, and the fourth electrodes  450   a  and  450   b  connected to each other belong to the different pairs of fourth electrodes  450 , as shown in  FIG. 22A . For example, the same conductive block can be used as, but not limited to, the fourth electrodes  450   a  and  450   b,  which are adjacent and connected to each other. Or, the adjacent fourth electrodes  450   a  and  450   b  are electrically connected together by any electrical connecting components (such as, wire), and the above methods can be used at the same time. If at least two TE structures  400  are serially connected together, the fourth electrodes  450   a  and  450   b  of the adjacent different pairs of fourth electrodes  450  can be selectively connected. If all the TE structures  400  are serially connected, the fourth electrodes  450   a  and  450   b  of the adjacent different pairs of fourth electrode pair  450  can be connected together. 
         [0061]    In addition, the TE structures  400  can be connected in parallel, that is, the fourth electrodes  450   a  are connected together and the fourth electrodes  450   b  are connected together, as shown in  FIG. 22B . For example, but not limited to, regarding the TE structures  400  connected in parallel, the same conductive block can be used as the fourth electrode  450   a  of each pair of fourth electrodes  450  (i.e. the fourth electrode  450   a  connected to the P channel  430   a ), and another conductive block is used as the fourth electrode  450   b  of each pair of fourth electrodes  450  (i.e. the fourth electrode  450   b  connected to the N channel  430   b ). Or, the fourth electrodes  450   a  connected to the P channel  430   a  are electrically channel  430   a  are electrically connected together by any electrical connecting components, and the fourth electrodes  450   b  connected to the N channel  430   b  are electrically connected together by another electrical connecting part. And, the above methods can be used at the same time. If at least two TE structures  400  are connected in parallel, the fourth electrodes  450   a  of the different pairs of fourth electrodes  450  are selectively connected together, and at the same time, the fourth electrodes  450   b  of the pairs of fourth electrodes  450  are connected together. If all the TE structures  400  are connected in parallel, the fourth electrodes  450   a  of all pairs of fourth electrodes  450  are connected in pairs, and the fourth electrodes  450   b  of all pairs of fourth electrodes  450  are connected in pairs. 
         [0062]    In an embodiment, firstly the second substrate  500  can be first provided. Then, one or more pairs of fourth electrodes  450  are formed on the surface of the second substrate  500 , as shown in  FIGS. 22A and 22B . Then, the P channel  430   a  and the N channel  430   b  corresponding to each other are formed on the other surface of each pair of fourth electrodes  450  opposite to the second substrate  500 , as shown in  FIGS. 23A and 23B . Finally, the other ends of the P channel  430   a  and the N channel  430   b  opposite to the pair of fourth electrodes  450  are electrically combined with the third electrode  410  (as shown in  FIG. 19 ) preformed on the TI structure, and thus the structure as shown in  FIG. 18  is obtained. Or, the third electrode  410  (as shown in  FIG. 21B ) is formed on the other ends of the P channel  430   a  and the N channel  430   b  corresponding to each other opposite to the pair of fourth electrodes  450 , and then the third electrode  410  is electrically combined with the other surface of the insulating layer  162  (as shown in  FIG. 16 ) of the TI structure opposite to the metal layer  150 , so as to obtain the structure as shown in  FIG. 18 . In other words, the cold end of the TE structure  400  contacts the insulating layer  162 , and the hot end of the TE structure  400  contacts the second substrate  500 . 
         [0063]    For example, the super lattice thin layer can be grown on the surface of a heavy doped silicon wafer (i.e. the first substrate) by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other semiconductor process techniques, and then is etched by dry etching or wet etching process to form the required super lattice barrier. Then, the first electrode (e.g. the metal layer) is fabricated on the surface of the silicon wafer (i.e. the surface of the substrate having the super lattice barrier). The metal electrode (i.e. the first electrode) includes a seed layer, which is contributive to attach the metal electrode to the surface of the silicon wafer. Then, an insulating layer is grown on the surface of the silicon wafer. Finally, the second electrode required by the super lattice barrier is fabricated on the insulating layer, and then an insulating layer is grown, so as to form the TI structure. Here, the insulating layer can be used as the substrate shared by the TI structure and the TE structure. Here, the electrode required by the TE structure can be first fabricated on the insulating layer, for the subsequent assembly of the TE structure. The TI structure is formed on a surface of the first substrate in an approximately transverse arrangement manner (along the surface of the substrate), and then the other surface of the first substrate contacts the heat source. When the TI structure operates, the electron flow moving along the surface of the first substrate can be generated, so as to transversely carrying away the heat generated by the heat source. 
         [0064]    To sum up, the active solid heatsink device and the fabricating method thereof of the present invention are directed to provide a high-effective solid cooling device. Here, the heat conduction characteristics of the hot electrons of the TI structure is used for spreading the heat generated by the heat source with the small area and the high heat-generating density (for example, but it is not limited here, spot heat source on the IC, laser diode, LED, or other heat sources) to the whole substrate. The TI structure and the TE structure share the substrate where the heat spreads to. Moreover, the shared substrate is used as the cold end of the TE structure, and then the TE structure is used to pump the heat spreading to the shared substrate to another substrate of the TE structure as the hot end of the TE structure. In other words, on the structure, the TI structure and the cold end of the TE structure can be integrated by the semiconductor process, the micro-electro-mechanical process, the semiconductor packaging process, and other processes. The TI structure and the TE structure can be disposed on the same side of the heat source, so as to be widely applied to dissipate heat of various heat source devices. On the operation of the device, the active heat-spreading is first performed on the heat source with the small area and the high heat-generating density by the TI structure, such that the heat of the heat source is uniformly distributed on the cold end substrate of the TE structure, so as to reduce the local high temperature resulting from the heat concentration at the heat source. Then, the TE structure is used to force the transmission of the heat energy spreading on the shared substrate (cold end) to the substrate (hot end) of the other end of the TE structure in the electron and hole heat conduction manner, so as to cool the heat source. In this manner, the active solid heatsink device and the fabricating method according to the present invention can overcome the problem of low performance resulting from the over high pin load of the conventional TE element caused by the pin area larger than the heat source area with a high heat-generating density. At the same time, the active solid heatsink device and the fabricating method thereof of the present invention can greatly improve the heat dissipation efficiency, and meanwhile reduce the heat energy generated by a non-hot spot area of the application device/element (such as IC), thereby achieving a double enhanced cooling effect. 
         [0065]    According to the active solid heatsink device and the fabricating method thereof of the present invention, the high-effective solid cooling device provided by the present invention has a wide application field, and can be used for cooling not only the common ICs and LEDs, but also a laser source, a switcher, a router, a detector, and other elements in a large scale integrated circuit (LSI), a processor, or an optical communication system, and even a refrigerator and other household appliance.