Abstract:
A telephone call waiting signal system as used in a processor controlled exchange, wherein reuse is made of an existing ringing supply bus and the signal relay in each subscriber&#39;s line equipment for applying a call waiting signal to the subscriber&#39;s line. This is made possible by the multiplexing of the two signals and selectively operating the signal relay at the line equipment.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates in general to telephone systems, and more particularly to a message-waiting signalling arrangement for use in a PBX telephone system. 
     2. Description of the Prior Art 
     The concepts of message waiting have been applied principally to private branch exchange telephone systems. In such systems a central switchboard operator controls the message-waiting indicators using additional switching and access circuitry consisting of manually operated keys and signalling lamps. 
     When it was required to signal a station that a call is waiting, the attendance was required to dial the station line number and then operate a &#34;call waiting&#34; key at the attendance position. A lamp at the called station would then flash on and off, indicating that a call is waiting for this particular station. 
     The additional circuitry included an access relay for each subscriber station arranged for this feature as well as a signal distribution bus and control arrangements therefor. 
     SUMMARY OF THE INVENTION 
     It is, therefore, an object of the present invention to provide a telephone system including a call waiting feature which is relatively inexpensive and simple in its implementation. 
     The invention provides the call message waiting feature in a switching system of the type generally described in U.S. Pat. No. 4,007,338. This is a PCM switching system wherein the terminal equipment is interconnected via a time channel assigned to the terminal equipment as required. The terminal equipment for a station line includes the usual battery feed arrangements and a ringing current connect relay for applying the ringing signal from a common bus to a station under a central control arrangement. The ringing signal is applied to the station line conductors in bursts, controlled by a ringing interrupter associated with the ringing signal generator. 
     This ringing equipment is reused to apply the call message waiting signal. To accomplish this the system is placed in a software controlled phase ringing arrangement. This means that in a given 4 second interval, a defined time period exists for ringing as well as for applying the Call Message Waiting potential. 
     The potential is applied by a central processor controlled relay either in series with the ringing voltage bus or as an &#34;OR&#34; function thru the normally closed contacts of the zero phase detector relay. The ringing cycle arrangement provides a one second &#34;on&#34; period and a one second &#34;off&#34; period. The call message waiting cycle is interlaced with the ringing cycle and has a one second &#34;off&#34; period followed by a one second &#34;on&#34; second. This is illustrated in FIG. 2. 
     The potential required to fire the neon lamp indicator is borrowed from the ringing generator of the system. The ringing voltage is rectified and applied to the ring relays of all line cards. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is an abstracted schematic view of an embodiment of the present invention. 
     FIG. 2 is a timing diagram showing the interlace of the ringing signal with the call waiting signal. 
     FIG. 3 is a schematic of the preferred embodiment of the present invention. 
     FIG. 4 is a timing diagram showing the timing of the control signals from the central processor. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     As illustrated in FIG. 1, the essential elements of an exchange for signalling a subscriber&#39;s line consist of a ringing signal generator 10 connected via the break contact 11 and armature contact 12 of a phase control relay, not shown, to a ringing signal bus 14. Which bus is then connected to the make contacts such as 15 of every circuit, at the time it is desired to ring a station associated with a particular line circuit. 
     As is the general practice the ringing signal is not a continuous signal but consists of bursts of about 1 second duration followed by a 1 second silent interval. This is shown in FIG. 2. This silent interval is provided by periodically operating the phase control relay to interrupt the ringing current. During the silent interval, the ringing signal multiple or bus 14 to the line circuits, is idle. By adding a make contact 13 to which is connected a call waiting potential, the bus 14 may be reused during what would otherwise be an idle period. The call waiting signal is a direct current potential of about 120 volts that is applied to the line conductor to fire a neon signal lamp at the station apparatus site. The call waiting signal can be a battery source or could very readily be obtained by rectifying the ringing signal as shown by rectifiers 15 and 16. Thus the phase control relay, the ringing signal bus and the signal applying relays of the line circuits are utilized for the application of both the ringing signal and the call waiting signal at alternate time intervals. 
     Referring to FIG. 3 there is shown a schematic of the circuitry used in an embodiment of this invention. 
     Ringing voltage from the ringing generator, not shown, is connected at terminals 31 and 32 to the input of a transformer 33. The second winding of the transformer has one terminal connected to a negative 50 volt source to bias the ringing current by a -50 volts D.C. This is a common practice in the telephone industry. The other terminal of the second winding of transformer 33 is connected to the inputs of optical couplers OC1 and OC2 and diodes CR4 and CR6. Optical couplers &#34;OC1&#34;, &#34;OC2&#34; and diodes CR3-CR6 comprise the φ phase detector circuitry for synchronizing the timing interval with ringing current so that switching can be performed at the instant of no ringing current flow. The outputs of both optical couplers &#34;OC1&#34; and &#34;OC2&#34; are gated by a &#34;SCHMITT TRIGGER&#34; device ST, the output of which is amplified at G1 and used to strobe two edge trigger flip-flops ETDFF-3 and ETDFF-4. The input to these two flip-flops is controlled via the timing input terminals &#34;Enable&#34; and &#34;Write&#34; and data bits at terminals φ and 6. These timing inputs as shown in FIG. 4 are taken from the central processor and are the same as those used to control the peripheral addressing and memory write operations. The &#34;enable&#34; signal is a decoded hardware identity of this circuit, which is a 6 bit address. The &#34;-WR&#34; signal is the processor write instruction and it occurs during the middle of the data highway bit transmission period. It is in essence a strobe to extract the value on the data bus. The signal Data φ-7 are from the 8 bit data highway and are enabled during the middle of the enable signal. The other uses of these signals are not pertinent to this disclosure but may be learned from the referenced U.S. Pat. No. 4,007,338. The processor timing and control arrangement functions to set the temporary buffers ETDFF-1 and ETDFF-2 as required. The φ data bit is the instruction to operate or release relay HG, and the data bit 6 is the instruction to operate or release relay HG1. 
     During the &#34;ON&#34; portion of the ringing cycle relay &#34;HG&#34; is not operated and provides the ringing signal voltage from the generator thru the φ phase detector logic, thru the relay HG normally closed contacts HG-11 and HG-12, thru relay HG1 normally closed contacts HG1-11 and HG1-12 and to the ringing voltage output bus 14. 
     When the 1 second &#34;ON&#34; cycle is over the processor sends the instruction via data bit φ to operate relay HG. This instruction is stored in flip-flop ETDFF-1 and during the next φ phase cycle of the ringing voltage the data is strobed into flip-flop ETDFF-3 by the &#34;SCHMITT TRIGGER&#34; device &#34;ST&#34;. This forward bias turns on optical coupler OIT-1 and relay HG operates, thus removing the ringing voltage from the ringing voltage buss. During the next 100 milliseconds all the ring relays that were operated are now released. At the end of this 100 millisecond period the processor instructs our logic to operate relay HG1 via data bit 6 and release relay HG via data bit φ. 
     This now begins the &#34;OFF&#34; ringing cycle, during this cycle the ringing voltage is forced thru diodes CR1 and CR2 and out thru the now closed though normally opened contacts HG1-13 and HG1-11 of relay HG1 to the ringing voltage bus 14. 
     The ringing voltage is half wave rectified by the two diodes and provides a pulsing D.C. voltage between -50 volts D.C. and -200 volts D.C. 
     During that 100 millisecond time period between the &#34;ON&#34; and &#34;OFF&#34; ringing cycles when the ringing relays that provided ringing were released we now operate all the ring relays to the lines that have been marked for Call Message Waiting. The pulsing D.C. voltage is applied thru these operated ring relays and fires the neon indicators across the TIP and RING conductors. This is continued for a 1 second period and again switches to an &#34;ON&#34; ringing cycle.