Abstract:
A system and method for measuring jitter. One class of embodiments is particularly useful for testing the aperture jitter of a high speed Analog to Digital (A/D) converter. Aperture jitter in a Sample and Hold circuit (S/H) or in an A/D converter introduces noise into the sampled signal, which is more extreme in areas of the input waveform that have a steep positive or negative slope. The preferred embodiment allows an easy and inexpensive way to measure aperture jitter in S/H and A/D circuits. The technique can also be adapted for measuring edge jitter in digital clock signals or in analog sine wave signals.

Description:
This application claims priority under 35 USC § 119(e)(1) of provisional application Ser. No. 60/054,562 filed Jul. 30, 1997. 
    
    
     BACKGROUND AND SUMMARY OF THE INVENTION 
     The present application relates to automated testing of integrated circuits, and more particularly to a method and system to test clock and aperture jitter in such devices as analog-to-digital converters and sample and hold circuits. 
     1. Background: Jitter 
     Jitter refers to the presence of abrupt, spurious variations in the amplitude or frequency of a periodic signal. This noise, when introduced in a system, can cause inaccurate results or other problems. Some noise will be present in any system, but if some or all of the noise can be measured, then it can be reduced or compensated for. The present application relates to means to measure noise caused by clock and aperture jitter. 
     2. Background: Jitter Measurement 
     Clock jitter has previously been measured using one of several techniques. 
     A first technique is to observe the spectral spreading or smearing around the spectral components of the clock. This technique is mainly used for circuits which must avoid generating energy in unwanted frequency bands. An example would be a cellular phone frequency synthesizer, which must produce a very pure sine wave which does not fail FCC compliance tests. This technique is unable to relate spectral spreading to time jitter, in RMS seconds. 
     A second commonly used technique is to slowly sweep the strobe signal of a strobed comparator across the rising or falling edge of the clock, capturing thousands of I/O outputs from the comparator. On a rising edge, the I/O sequence would start out with all 0&#39;s and then transition to all 1&#39;s. The percentage of 1&#39;s and 0&#39;s at each sweep position are recorded into a mathematical array. Then the derivative of the array provides the jitter histogram, from which the standard deviation of the jitter can be measured. This technique is very accurate, but requires a long test time because of the thousands of 1&#39;s and 0&#39;s that must be collected. 
     A third commonly used approach is to directly digitize the time intervals of the clock using a time digitizer. This type of circuit generally uses a time stretcher, which charges a capacitor with a fixed DC current for the time period to be measured and then discharges the capacitor with a small fraction of the DC current. The time required to discharge the capacitor is much easier to measure than the original time interval. Achieving one-shot measurements in the 20 ps range using this technique is very difficult, however. It is also very expensive. 
     A fourth technique involves digitization of multiple samples of the same point on a steeply rising edge with a constant slope (i.e., a very fast ramp). In this case, the voltage noise is related to the jitter by a very simple dv/dt relationship. This technique suffers from two problems. First the slope of the rising edge must be calibrated accurately, which is difficult to do. Second, there is no way to extract the voltage noise inherent to the digitization process from the jitter noise, since they both appear as voltage noise. 
     Innovative System and Methods for Measuring Jitter 
     The present application discloses an innovative system and method for measuring jitter. One class of embodiments is particularly useful for testing the aperture jitter of a high speed Analog to Digital (A/D) converter. Aperture jitter in a Sample and Hold circuit (S/H) or in an A/D converter introduces noise into the sampled signal. The noise is more extreme in areas of the input waveform that have a steep positive or negative slope. The preferred embodiment allows an easy and inexpensive way to measure aperture jitter in S/H and A/D circuits. The technique can also be adapted for measuring edge jitter in digital clock signals or in analog sine wave signals. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The disclosed inventions will be described with reference to the accompanying drawings, which show important sample embodiments of the invention and which are incorporated in the specification hereof by reference, wherein: 
     FIG. 1 shows a block diagram of the preferred embodiment. 
     FIG. 2 shows an analog-to-digital converter connected to a system according to the preferred embodiment. 
     FIG. 3 shows an exemplary waveform with jitter indicated. 
     FIG. 4 shows two sine waves having different RMS amplitudes. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The numerous innovative teachings of the present application will be described with particular reference to the presently preferred embodiment. However, it should be understood that this class of embodiments provides only a few examples of the many advantageous uses of the innovative teachings herein. In general, statements made in the specification of the present application do not necessarily delimit any of the various claimed inventions. Moreover, some statements may apply to some inventive features but not to others. 
     The preferred embodiment, as shown in FIG. 1, is a jitter measurement circuit comprising a low jitter clock source  10 , a low jitter sine wave generator  30 , a sampling circuit  50 , and a digital signal processor (DSP)  70 . The measured jitter will comprise the summation of the jitter from the clock source  10 , the sine wave generator  30 , and the sampling circuit  50 . The sampling circuit  50  can be either a Sample and Hold (S/H) circuit (followed by an analog signal digitizer), an analog to digital converter, or any other clocked sampling element that is subject to jitter. 
     This embodiment can be used to measure the jitter of the clock source  10 , the jitter of the sine wave generator  30 , or the sampling circuit  50 . The jitter of any one of these elements can be accurately measured as long as the jitter introduced by the other two elements is substantially lower than that of the element under test. 
     An example of jitter in an analog signal is shown in FIG.  3 . Note that the jitter at the peak of the signal, indicated at A, is less than the apparent jitter at point B, where the slope of the signal is greater. 
     The sine wave generator  30  is first set to a frequency whose period is larger than the peak-to-peak jitter to be measured. A ratio of about 50 to 1 is desirable. If the period is larger than 50 times the jitter, then the noise induced by jitter is very small and thus difficult to measure. If the period is much smaller, then the mathematics of the present invention is subject to increasing error. The frequency of the low jitter clock source  10  is set to a frequency that causes N substantially evenly spaced samples of the sine wave  40  to be collected by the sampling circuit  50 . The samples of the sine wave then appear at the input to the digital signal processor  70 . The DSP  70  computes the signal to noise ratio, excluding distortion. Then, the jitter can be computed from the formula:        tj   =     1     2   ·   π   ·   Ft   ·   SNR                              
     in which: 
     tj=time jitter, in seconds, 
     SNR=RMS sine wave amplitude to RMS noise ratio (excluding distortion), and 
     Ft=sine wave frequency at 40, in Hz. 
     (Time jitter, in seconds, therefore equals the inverse of two times pi times the sine wave frequency at 40, in Hz, times the RMS sine wave signal-to-noise ratio, excluding distortion.) 
     This will give acceptable results for many cases. However, if a significant amount of voltage noise is produced by the sampling circuit  50  and/or the sine wave generator  30 , then the value of tj will be higher than the true amount of jitter in the measurement system of FIG.  1 . 
     The total noise is then the RMS summation of the two noise sources: 
     
       
           NT= {square root over (( A· 2·π· Ft +L ) 2   +Vn   2 +L )} 
       
     
     where: 
     NT=total RMS noise, 
     A=sine wave amplitude, RMS volts, 
     vn=noise voltage, RMS volts, and 
     Ft=sine wave frequency at 40, in Hz. 
     The total RMS noise therefore equals the square root of ((the square of the peak to zero sine wave amplitude in volts times two times pi times the sine wave frequency at 40, in Hz) plus the square of the noise voltage in RMS volts). 
     The solution to this problem is to measure two SNR values, SNR 1  and SNR 2  at two different sine wave RMS levels A and B, respectively, as shown in FIG.  4 . The noise induced by jitter will increase linearly by a factor of B/A. Since the intrinsic voltage noise will remain substantially constant, the intrinsic voltage noise and jitter noise can be separated by using two equations with two unknowns. 
     Using the two measurements: 
     
       
           Nt 1={square root over (( A· 2·π· Ft +L ) 2   +Vn   2 +L )} 
       
     
     
       
           Nt 2={square root over (( B· 2·π· Ft +L ) 2   +Vn   2 +L )} 
       
     
     where: 
     Nt 1 =total noise measured with signal amplitude A, and 
     Nt 2 =total noise measured with signal amplitude B. 
     Therefore, Nt 1  equals the square root of ((the square of (A times two times pi times Ft) plus the square of Vn). Nt 2  equals the square root of ((the square of (B times two times pi times Ft) plus the square of Vn). 
     Solving two equations in two unknown yields the value of time jitter with noise jitter removed:        tj   =       1     2   ·   π   ·   Ft                (       Nt1   2     -     Nt2   2       )         A   2     -     B   2                                    
     Time jitter equals the inverse of two times pi times Ft, times the square root of (Nt 1  squared minus Nt 2  squared) divided by (A squared minus B squared). 
     If the voltage noise comes mostly from the sine wave generator  30 , then doubling the amplitude may double the voltage noise as well, and the previous equation will not work perfectly. In this case, there is an alternate solution. Since jitter is linearly related to frequency as well as amplitude, it is also possible to charge the frequency of the sine wave at  40  instead of the signal amplitude. Since a change in frequency may result in a change in amplitude, both Ft and A most be considered variables. In this case the equation would be:        tj   =       1     2   ·   π       ·         (       Nt1   2     -     Nt2   2       )           A   2          Ft1   2       -       B   2          Ft2   2                                      
     (Time jitter equals the inverse of (two times pi times A), times the square root of ((Nt 1  squared minus Nt 2  squared) divided by (A squared times Ft 1  squared minus B squared times Ft 2  squared))). 
     FIG. 2 shows a testing system in which an analog-to-digital converter converts an incoming signal to a digital output. This output is then passed to a jitter measurement system, as in the preferred embodiment, to measure the jitter in the digital output. 
     It should be noted that the sine wave(s) may have a frequency greater than the Nyquist frequency of the sampling circuit( 50 ). The Nyquist frequency is defined as one half of the sampling rate. In such a case, the sine wave frequency will appear as an aliased sine wave with a frequency somewhere between 0 Hz and the Nyquist frequency. This technique is widely known as undersampling. Since under-sampling may provide a way to inject a much higher frequency sine wave into the sampling circuit, and since a higher frequency produces more noise from a given amount of jitter, undersampling provides a way to make the measurement system more sensitive to very low levels of jitter. 
     According to a disclosed class of innovative embodiments, there is provided a system for measuring jitter in an AC signal comprising: a clocking source connected to provide a clock signal; a test circuit connected to receive a sine wave at a sampling input and said clock signal at a clock input, and to produce N evenly spaced samples of said sine wave; a mathematical processor connected to receive said samples of said sine wave and to produce an output corresponding to the jitter of said input signal, said jitter being inversely proportional to the root-mean-square of a ratio between the amplitude and noise of each of said samples of said input signal. The mathematical processor preferably excludes noise related to harmonic distortion and is preferably compensated to reflect noise energy lost in the the exclusion of harmonic distortion. The calculation of jitter is compensated for noise energy lost in the exclusion of distortion components due to harmonic distortion using the mathematical processor therefor. 
     According to another disclosed class of innovative embodiments, there is provided a method for measuring jitter in an AC signal, comprising the steps of: providing a sine wave to the sampling input of a sampling circuit; providing a clocking source to said sampling circuit, said clock source producing N evenly spaced samples of said sine wave at output of said sampling circuit, said sampling rate and said sine wave frequency chosen to sample an integer number of cycles of said sine wave; providing said samples of said sine wave to a mathematical processor; computing the signal amplitude A and noise Nt of said AC signal, using said processor; computing a total system jitter, using said processor, substantially according to the equation:        tj   =     1     2   ·   π   ·   Ft   ·   SNR                              
     According to another disclosed class of innovative embodiments, there is provided a method for measuring jitter in an AC signal, comprising the steps of: sampling a periodic input signal using a testing circuit; dividing said input signal into N evenly spaced samples of said input signal; calculating the jitter of said input signal, said jitter being inversely proportional to the signal-to-noise ratio of each of said samples of said input signal. 
     According to another disclosed class of innovative embodiments, there is provided a method for measuring jitter in an AC signal, comprising the steps of: providing a first sine wave to a sampling input of a sampling circuit at a first amplitude V 1 ; providing a clocking source to said circuit under test, said clock source resulting in N evenly spaced samples of said first sine wave at output of said sampling circuit, said sampling circuit and said sine wave frequency chosen to sample an integer number of cycles of said sine wave; providing said samples of said first sine wave to a mathematical processor, said processor computing the signal amplitude A and noise Nt 1 ; providing a second sine wave to said sampling input of said sampling circuit at a second amplitude V 2 ; providing a clocking source to said sampling circuit, said clock source resulting in N evenly spaced samples of said second sine wave at output of said sampling circuit; providing said samples of said sine wave to said mathematical processor; and computing the signal amplitude B, noise Nt 2 , and total system jitter of said AC signal, using said processor, substantially according to the equation:        tj   =       1     2   ·   π   ·   Ft                (       Nt1   2     -     Nt2   2       )         A   2     -     B   2                                    
     According to another disclosed class of innovative embodiments, there is provided a system for measuring jitter induced by a clock source, sine wave generator, and sampling circuit comprising: a clocking source connected to produce a clock signal; a circuit under test connected to receive said clock signal, a first sine wave having a first amplitude V 1  and a frequency Ft 1 , and a second sine wave having a second amplitude V 2  and a frequency Ft 2 , and connected to produce N evenly spaced samples of each of said first sine wave and said second sine wave at output of said circuit under test; a processor connected to receive said samples and to compute the signal amplitude A and noise Nt 1  of said samples of said first sine wave, and to compute the signal amplitude B and noise Nt 2  of said samples of said second sine wave; wherein said processor is further connected to produce an output corresponding to a total system jitter substantially given by the equation:        tj   =       1     2   ·   π       ·         (       Nt1   2     -     Nt2   2       )           A   2          Ft1   2       -       B   2          Ft2   2                                      
     Modifications and Variations 
     As will be recognized by those skilled in the art, the innovative concepts described in the present application can be modified and varied over a tremendous range of applications, and accordingly the scope of patented subject matter is not limited by any of the specific exemplary teachings given, but is only defined by the issued claims.