Abstract:
The present invention provides a semiconductor workpiece support and contact assembly for providing localized electrical connections with the device side of the workpiece. The additional contact points help overcome the terminal effect caused by very high sheet resistance of thin barrier layers and enable plating a conformal seed layer or feature filling directly on thin barrier layers. By utilizing the streets that separate individual dice on a workpiece to make electrical connections with the workpiece and provide localized distribution of plating chemistry, the present invention provides a more uniform and conformal metallization layer.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
       [0001]     This application is a nonprovisional of U.S. Provisional Patent Application No. 60/669,312, filed Apr. 7, 2005, now pending. Priority to this application is claimed under 35 U.S.C. §§ 119, and the disclosure of this application is incorporated herein by reference in its entirety. 
     
    
     FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT  
       [0002]     None.  
       TECHNICAL FIELD  
       [0003]     The invention relates to a workpiece support used in semiconductor plating systems having electrodes which engage the workpieces for electroplating metals, such as copper and others, onto seed, barrier and other layers formed on semiconductor wafers and other semiconductor workpieces.  
       BACKGROUND OF THE INVENTION  
       [0004]     In the production of semiconductor wafers and other semiconductor articles it is necessary to plate metals onto the semiconductor surface to provide conductive areas which transfer electrical current. There are two primary types of plating layers formed on the wafer or other workpiece. One is a blanket layer used to provide a metallic layer which covers large areas of the wafer. The other is a patterned layer which is discontinuous and provides various localized areas that form electrically conductive paths within the layer and to adjacent layers of the wafer or other device being formed. Plating can occur on a flat metal layer, through a non-conducting mask to an underlying metal layer or onto a patterned non-flat substrate.  
         [0005]     There are a wide range of manufacturing processes that may be used to deposit the metallization on the workpiece in the desired manner. Such processes included chemical vapor deposition (“CVD”), physical vapor deposition (“PVD”), electroplating, and a damascene process where holes, more commonly called vias, trenches and other recesses are formed in the layer of semiconductor material in which a pattern of copper is desired. In the damascene process the wafer is first provided with a metallic seed layer which is used to conduct electrical current during a subsequent metal electroplating step. The seed layer is a very thin layer of metal which can be laid down using several processes. The seed layer of metal can be laid down using PVD or CVD processes to produce a layer on the order of 1000 angstroms thick. The seed layer can advantageously be formed of copper, gold, nickel, palladium, and most or all other metals. The seed layer is formed over a surface which is convoluted by the presence of vias, trenches, or other device features which are recessed. This convoluted nature of the exposed surface provides increased difficulties in forming the seed layer in a uniform manner. Non-uniformities in the seed layer can result in variations in the electrical current passing from the exposed surface of the wafer during the subsequent electroplating process. This in turn can lead to non-uniformities in the blanket layer electroplated onto the seed layer. Such non-uniformities can cause deformities and failures in the resulting semiconductor device being formed.  
         [0006]     In the damascene processes, after the seed layer is laid down, then it is typical to plate additional metal (e.g., copper) onto the seed layer in the form of a blanket layer formed thereon. The blanket layer is typically electroplated and is used to fill the vias and trenches. The blanket layer is also typically plated to an extent which forms an overlying layer. Such a blanket layer will typically be formed in thicknesses on the order of 3,000-15,000 angstroms (0.3-1.5 microns). Chemical mechanical polishing (“CMP”) is used to remove any excess copper and other metal above the features.  
         [0007]     As damascene-interconnect feature sizes shrink, the barrier layer and seed layers used for manufacturing device metal interconnects (i.e. the dual-damascene process) become thinner and more resistive. Furthermore, it becomes more difficult to provide a uniform seed-layer thickness on the sidewalls of features as the features shrink. The seed layers are typically deposited using relatively expensive PVD vacuum processes and it may be necessary to improve the sidewall coverage by using a process such as the “seed layer repair” and “seed layer enhancement” processes developed by Semitool and disclosed in U.S. Pat. No. 6,197,181. It would be of great benefit to plate the seed layer directly on the barrier in a conformal manner, thereby, insuring good sidewall coverage and omitting the expense of the PVD process altogether.  
         [0008]     To plate directly on a thin barrier layer, the very strong terminal effect created by the high sheet resistance must be overcome. This is very challenging when contacting the wafer around its circumference because a high voltage is required to pass current from the contact to the center of the wafer in order to plate at the center. The current will preferentially plate near the contact to avoid the sheet resistance. An electrolytic bath with a low conductivity reduces the terminal effect, but untested ultra low conductivity bath formulations (less than 1 mS/cm 2  and down to 0.001 mS/cm 2 ) would be required to enable relative uniform plating on the barrier layers expected below 45 nm feature sizes.  
         [0009]     Moreover, the difficulty of plating on a barrier layer (or seed layer) is aggravated when the layer covers features on the surface of the wafer. In general, these features increase the effective length of the conductive film and, thus, increase the film sheet resistance compared to a blanket film. Typically these features are via and trench geometries (e.g. dual-damascene features) to be filled with copper to form metal interconnects. But not only do the features add to the overall sheet resistance, they can also create regions of anisotropic sheet-resistance making some areas of the wafer extremely difficult to plate. For example, the barrier layer covering trenches aligned with the current flow (e.g. along radial lines) will be less resistive than trenches perpendicular to the current flow. In addition, there may be underlying layers or pads that are more conductive than the barrier layer or seed layer connecting various features that are to be plated. For example, one via array may be connected to another via array by such an underlying structure. This conductive structure can shunt current and influence local plating voltages, thereby, disrupting the plating on the barrier layer. Accordingly, there is a need for electroplating equipment and methods that overcome the challenges inherent in plating highly resistive barrier and seed layers.  
         [0010]     The present invention is provided to solve the problems discussed above and other problems, and to provide advantages and aspects not provided by prior electroplating equipment and methods of this type. A full discussion of the features and advantages of the present invention is deferred to the following detailed description, which proceeds with reference to the accompanying drawings.  
       SUMMARY OF THE INVENTION  
       [0011]     The present invention proposes mechanical schemes to increase the contact points across a semiconductor workpiece in an electroplating vessel, rather than (or in addition to) contacting the wafer around its circumference as is the case in typical electroplating equipment and processes. By utilizing the gaps called “streets” or “scribes” that separate the individual dice on a wafer, it is possible to contact or touch the wafer in these streets without harming the devices on the wafer. The additional contact locations help to overcome the terminal effect caused by the very high sheet resistance of thin barrier layers and enable plating a conformal seed layer or feature filling directly on thin barrier layers.  
         [0012]     In some embodiments of the present invention, the contact to the wafer approaches the die or device level in order to provide localized plating in an electrochemical plating vessel. For example, in one embodiment the present invention provides a wafer support for use in electroplating a semiconductor workpiece. The wafer support comprises a plurality of discrete contacts that make point contacts at selected points with the streets of the wafer. The discrete point contacts may contact the wafer at each corner of a die (or less frequently). In another embodiment of the present invention, continuous contacts may run along the entire length of the streets formed between the devices formed in the semiconductor wafer. The contacts may run along only the vertical streets or the horizontal streets, or may run along both directions forming a grid-like support structure. In any of these embodiments, the circumference/periphery of the semiconductor workpiece may (or may not) also be electrically contacted.  
         [0013]     Since a plurality of discrete contact points or a grid-like contact structure may disrupt the electrolyte flow and mass transfer to the wafer when it is added to a conventional fountain plater, another aspect of the present invention combines the street contacts with a sparger flow system. Such a system allows for device-scale delivery and removal of process fluid, and local control of the current to each die from the anode.  
         [0014]     To eliminate the die-specific nature of the contact geometry associated with a certain aspects of the present invention, an alternative embodiment of the present invention provides for relatively high conductivity current paths (e.g., bus paths) to be formed or imbedded in the streets. Thus, even when a conventional circumferential contact is used, the highly conductive streets provide a low resistance path around each die, effectively achieving the same result as contacting the wafer locally around each device.  
         [0015]     Even more uniform barrier and seed layer plating may be achieved by coupling the localized die-level contact schemes discussed above with localized plating. For example, local die level anode shapes (or smaller) may be moved and/or controlled to enable better die scale plating. By locally plating one die at a time, the terminal effect is reduced because the overall current passing though the barrier at a given time is reduced and the voltage variations throughout the film are correspondingly reduced. Similarly, localized/dynamic control of the individual contacts across the streets or the circumference can create more controlled localized plating. For example, only a portion of the circumferential or street contacts may be active at a certain time. This dynamic control could be cycled around the wafer creating varying current flow directions and potential drops across the wafer to overcome the effects of anisotropic sheet-resistance and shorting by underlying conductive pads.  
         [0016]     Other features and advantages of the invention will be apparent from the following specification taken in conjunction with the following drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0017]     To understand the present invention, it will now be described by way of example, with reference to the accompanying drawings in which:  
         [0018]      FIG. 1  is a sectional view of a semiconductor processing station having a processing head, a workpiece support assembly and a plating bowl assembly.  
         [0019]      FIG. 2  is a sectional view of the semiconductor processing station shown in  FIG. 1  just after the processing head has placed the workpiece onto the workpiece support assembly.  
         [0020]      FIG. 3A  is a sectional view of the workpiece support assembly and plating bowl assembly with a semiconductor workpiece resting on the workpiece support assembly.  
         [0021]      FIG. 3B  is an expanded partial view of the area identified by reference letter A in  FIG. 3A .  
         [0022]      FIG. 4A  is a sectional view of the workpiece support assembly and plating bowl assembly with arrows showing the processing fluid flow paths through the workpiece support assembly and the bowl assembly.  
         [0023]      FIG. 4B  is a expanded partial view of the area identified by reference letter B in  FIG. 4A  with arrows showing the processing fluid flow paths through the workpiece support assembly.  
         [0024]      FIG. 5  is a plan view of the workpiece support assembly and plating bowl assembly shown in  FIG. 3A   
         [0025]      FIG. 6A  is a cross-sectional view taken along line C-C of the workpiece support assembly and plating bowl in  FIG. 5 .  
         [0026]      FIG. 6B  is an expanded partial view of the area identified by reference letter D in  FIG. 6A .  
         [0027]      FIG. 7  is the cross-sectional view of  FIG. 6A  with a partial semiconductor workpiece resting on the workpiece support assembly.  
         [0028]      FIG. 8  is an exploded view of the workpiece, wafer support contact plate and sparger plate according to the present invention.  
         [0029]      FIG. 9A  is a perspective view of a wafer support contact plate according to one embodiment of the present invention.  
         [0030]      FIG. 9B  is a plan view of the wafer support contact plate shown in  FIG. 9A .  
         [0031]      FIG. 9C  is a cross-sectional view taken along line A-A of the wafer support contact plate shown in  FIG. 9B .  
         [0032]      FIG. 9D  is an expanded view of the detailed section labeled B in  FIG. 9C .  
         [0033]      FIG. 10A  is a perspective view of a wafer support contact plate according to another embodiment of the present invention.  
         [0034]      FIG. 10B  is a plan view of the wafer support contact plate shown in  FIG. 10A .  
         [0035]      FIG. 10C  is a cross-sectional view taken along line A-A of the wafer support contact plate shown in  FIG. 10B .  
         [0036]      FIG. 10D  is a expanded view of the detailed section labeled B in  FIG. 10C .  
         [0037]      FIG. 11  is a plan view of a wafer support contact plate according to another embodiment of the present invention.  
         [0038]      FIG. 12  is a plan view of a wafer support contact plate according to another embodiment of the present invention.  
         [0039]      FIG. 13  is a perspective view of a device side of a semiconductor workpiece with high conductivity current paths formed in the streets formed between the devices on the workpiece.  
         [0040]      FIG. 14A  is a is a perspective view of a sparger plate to be used in a plating apparatus according to another aspect of the present invention.  
         [0041]      FIG. 14B  is a plan view of the sparger plate shown in  FIG. 14A .  
         [0042]      FIG. 14C  is a cross-sectional view taken along line A-A of the sparger plate shown in  FIG. 14B .  
         [0043]      FIG. 14D  is a expanded view of the detailed section labeled B in  FIG. 14C . 
     
    
     DETAILED DESCRIPTION  
       [0044]     While this invention is susceptible of embodiments in many different forms, there is shown in the drawings and will herein be described in detail preferred embodiments of the invention with the understanding that the present disclosure is to be considered as an exemplification of the principles of the invention and is not intended to limit the broad aspect of the invention to the embodiments illustrated.  
         [0045]     Turning to  FIGS. 1 and 2 , there is shown a semiconductor processing station  10  incorporating features of the present invention. The processing station  10  is comprised of four main components; a process head  15 , a bowl assembly  20 , a semiconductor workpiece contact assembly  25  and a process head operator  30 . The bowl assembly  20  is generally comprised of a bowl  22  positioned within an outer receptacle  21 . The bowl  22  shown in  FIG. 1  is divided by a membrane  23  into an upper section  24  and a lower section  26 . An anode  27  is positioned at the bottom of the lower section  26  of the bowl  22  and is in fluid communication with a process fluid, e.g., an electrolyte or anolyte. The lower section  26  has a process fluid inlet  28  and a process fluid outlet  29 . The upper section  24  of the bowl  22  has a process fluid inlet  31 .  
         [0046]     The workpiece contact assembly  25  sits atop the bowl  22  and is generally comprised of a contact plate  32  which supports the workpiece and a sparger plate  33  for distributing process fluid to the device side of the workpiece. Appropriate electrical connections are made with the contact assembly  25  to provide controlled electrical power to the contact assembly  25 . Various embodiments of the workpiece contact assembly  25  will be discussed in greater detail below.  
         [0047]     The process head assembly  15  accepts the workpiece W for processing and introduces the workpiece to the bowl assembly  20  by placing the workpiece onto the contact plate  32  for processing, and removes the workpiece W from the bowl assembly  20  after processing for transition to, for example, another processing station. The process head assembly  15  is comprised of a process head  34  and a rotor  35 . The process head  34  holds a rotor drive assembly (not shown) which includes, among other components, a motor for spinning the process head assembly about the axis R. The process head  34  also includes an actuator that cooperates with components in the rotor  35  which cause fingers  36 , which extend outwardly from the face of rotor  35 , to engage and disengage from the periphery of the workpiece W.  
         [0048]     The process head assembly  15  is preferably supported by process head operator  30 . The operator  30  includes a linear drive  37  which is used to adjust the height of the process head assembly  15  with respect to the bowl assembly  20 . The process head assembly  15  also includes a head rotor drive  38  which operates to rotate the process head assembly  15  about a horizontal axis H. The rotational movement of the process head assembly  15  allows it to be placed in a first position (approximately 180 degrees from the position of the process head assembly shown in  FIG. 1 ) for loading and unloading the workpiece W and a second position (shown in  FIG. 1 ) wherein the device side of the workpiece W is exposed and available for making contact with the contact assembly  25 , which is positioned atop of the bowl  22 . A variety of drives which provide linear and/or rotational drive movement are suitable for use in a plating system according to the present invention.  
         [0049]      FIG. 1  illustrates the processing station  10  after the process head assembly  15  has accepted the workpiece W and the process head operator  30  has started to lower the workpiece into the bowl assembly  20 . In  FIG. 2 , the process head assembly  15  has been completely lowered into the bowl assembly  20  such that the workpiece W rests on the contact assembly  25  with the device side of the workpiece W contacting the contact plate  32 . As shown in  FIG. 2  and discussed in detail below, the contact plate  32  has at least one and preferably a plurality of recesses  42  which allow clearance for the fingers  36  of the rotor  35 . In this position, the device side of the workpiece W is exposed such that the contact plate  32  makes electrical contact with the workpiece W along the “streets” or “scribes” that separate the individual dice on a wafer. After all processing steps, the devices on the wafer are separated by cutting along these streets. Therefore, it is possible to contact or touch the wafer in these streets without harming the devices on the workpiece W. This position also allows the sparger plate  33  to locally deliver a plating chemistry to the device side of the workpiece W to effectuate a uniform deposition of metal. The present invention proposes utilizing the gaps called “streets” or “scribes” In operation, the anode  27  is connected to a positive potential terminal of a power supply (not shown). In the embodiment shown in  FIGS. 1 and 2 , and with reference to  FIGS. 4A and 4   b,  an anolyte is introduced into the lower compartment  26  through inlet  28 . The anolyte flows over the anode and exits the lower compartment  26  through exit  29 . In a preferred embodiment, the anolyte is recirculated outside the processing station and re-introduced through the inlet  28 . The contact plate  32  is connected to a positive potential terminal of the power supply. A catholyte is introduced into the upper compartment  24  through inlet  31 . The catholyte is forced up through the sparger plate  33  to distribute the catholyte to the device side of the workpiece W, and more specifically to the individual devices formed on the device side of the workpiece W. The excess catholyte flows outside the bowl  22  and is caught in the outer receptacle  21  and eventually drained through a drain  40  located in the bottom of the inner receptacle  21 .  FIGS. 4A and 4B  illustrate the anolyte flow (indicated by the arrows labeled A) and the catholyte flow (indicated by the arrows labeled C). In operation, the power supply provides an electrical potential difference between the anode and the workpiece W (due to the electrical connection with the contact plate  32 ) which results in a chemical plating reaction at the device side of the workpiece W in which the desired metal is deposited.  
         [0050]     It should be understood by those having skill in the art that the contact assembly  25  of the present invention can be used in a plating reactor wherein the plating bath is comprised of a single electrolyte which is introduced into a bowl  22  having only a single compartment, rather than the multi-compartment bowl  22  and the use of a catholyte and an anolyte as disclosed in  FIGS. 1, 2 ,  3 A,  3 B,  4 A,  6 A and  7 . In either embodiment, the chemistries may be recirculated to the external supply and filtered or supplemented as needed to maintain chemistry constituent proportions.  
         [0051]     With reference specifically to  FIGS. 3A and 3B , there is shown a cross-sectional view of the bowl assembly  20  and contact assembly  25  with the semiconductor workpiece W being supported on the contact assembly  25 .  FIG. 3B  is an expanded partial view of the area identified by reference letter A in  FIG. 3A . The contact plate  32  has a plurality of conductive members  32   a,  which contact the streets formed in the device side of the workpiece W. The sparger plate  33  has a plurality of grooves  33   a.  The conductive members  32   a  of the contact plate  32  sit within the grooves  33   a  of the sparger plate  32 . Although the conductive members  32   a  sit slightly above the sparger plate  32 , the contact plate  32  and the sparger plate  33  are generally co-planar as they sit atop the bowl  22 .  
         [0052]     The sparger plate  33  and the contact plate  32  will now be described in greater detail with reference to a preferred embodiment shown in  FIGS. 5-10D .  FIG. 5  is a plan view of a preferred embodiment of the workpiece support and contact assembly  25  and plating bowl assembly  20  shown in  FIG. 3A . The contact plate  32  has a continuous shoulder or frame  41 . At least one, and preferably a plurality of, recesses  42  are formed in the shoulder  41 . As mentioned above, the recesses  42  allow for clearance of the fingers  36  of the rotor  35  when the process head assembly  15  is loading the workpiece onto the contact assembly  25 . A plurality of conductive members  32   a  extend inwardly from the shoulder  41 . The conductive members  32   a  lie within a common horizontal plane. In the embodiment shown in  FIGS. 5-10D , the conductive members  32   a  are continuous, rail-like, intersecting members that form a grid-like structure. The intersecting, grid-like structure forms a plurality of open areas  32   b  (best shown in  FIG. 8 ). In the preferred embodiment shown in  FIG. 8 , the open areas  32   b  are substantially square or rectangular shaped. However, the open areas  32   b  can take other configurations as well.  
         [0053]     The sparger plate  33  is comprised of a base plate  43  having a plurality of spaced-apart, hollow cells  44  projecting outwardly therefrom. Each cell  44  has at least one aperture  44   a,  and preferably a plurality of apertures  44   a  for distributing the plating chemistry to the device side of the workpiece W. Because the cells  44  are spaced apart from one another, a groove  33   a  is formed between the cells  44 . When the contact plate  32  and the sparger plate  33  are combined, the conductive members  32   a  of the contact plate  32  fit within the grooves  33   a  of the sparger plate  33  so that the sparger apertures  44   a  are positioned adjacent the workpiece W and in close proximity to the electrical contacts made with the workpiece W. As best shown in  FIG. 6B , the conductive members  32   a  do not completely fill the grooves  33   a.  Accordingly, the grooves  33   a  also act as drain pathways for the plating chemistry as shown in  FIG. 4B . Likewise, the cells  44  of the sparger plate  33  fit within the open areas  32   b  of the contact plate  32 . In this regard, the sparger plate  33  provides inlet and drain sections that open upward toward the workpiece W to direct electrolyte fluid against the workpiece W and drain the fluid from contact with the workpiece W in a continuous flow manner.  
         [0054]     Referring to  FIG. 6B , when the sparger plate  33  and the contact plate  32  are properly combined in the plating vessel, there is a generally co-planar relation between the two plates even though the conductive members  32   a  extend above the adjacent cell  44  and apertures  44   a  of the sparger plate  33 . In a preferred embodiment, the distal ends  32   c  of the conductive members  32   a  which make electrical contact with the streets of workpiece W are tapered to enhance the electrical contact with the workpiece W (see  FIG. 9C ). Preferably the conductive members  32   a  have a thickness slightly less than the thickness of the streets of the workpiece W, which may be approximately 100 to 250 microns wide. Accordingly, thickness ranges of the conductive members  32   a  may be 0.5 mm to 5 mm, and more preferably between 1 and 2 mm so that they fit within the streets formed in the workpiece W. In an even more preferred embodiment, with the exception of the tapered distal end or tip  32   c,  the conductive members  32   a  are coated or sealed in a suitable material resistant to plating (e.g., TEFLON or elastomeric material such as VITON) to withstand the wet and harsh conditions of the plating bath environment, and prevent plating or thieving on the contact end or tip  32   c.  Because plating will take place at an accelerated rate at the contact point, by sealing the conductive members  32   a  and minimizing the contact area by utilizing a tapered end or tip  32   c  to make contact with the workpiece W, a more uniform metallization will occur.  
         [0055]      FIG. 7  shows a partial semiconductor workpiece W resting device side down on the contact assembly  25 .  FIG. 8  shows an exploded view of the workpiece W, contact plate  32  and sparger plate  33 . A typical device side of a semiconductor workpiece W before plating is shown in  FIG. 13 . With reference to  FIGS. 7, 8  and  13 , the conductive members  32   a  of the contact plate  32  make electrical contact with the workpiece W at the streets  50 . The microelectronic devices  55 , which lie between the streets  50 , rest adjacent the open areas  32   b  of the contact plate  32 . The cells  44  of the sparger plate  33  fit within the open areas  32   b  and are adjacent the microelectronic devices  55 . When combined, the sparger plate  33  and contact plate  32  allows for device-scale delivery and removal of plating fluid, and local control of the current to each device  55  from the anode  27 . A preferred contact plate  32  is illustrated in  FIGS. 9A-9D  and a preferred sparger plate  33  is illustrated in  FIGS. 14A-14D .  
         [0056]     The conductive members  32   a  of the contact plate  32  may take many different forms in the present invention. Turning to  FIGS. 10A-10D  there is shown a preferred embodiment of contact plate  32  wherein the conductive members  32   a  include a plurality of conductive fingers  32   d  to make discrete point contacts with the workpiece W. The fingers  32   d  are preferably made from a flexible, conductive material and can flex to adapt to non-uniform surfaces, ensuring a reliable electrical connection. In this preferred embodiment, the fingers  32   d  preferably contact the workpiece W at the four corners of each die, however, more or less fingers  32   d  may be used. For example, only the conductive members  32   a  that define four quadrants of the contact plate  32  (see  FIG. 12 ) may include a plurality of fingers  32   d  (and may include more than necessary to contact the corners of the dice that run along the quadrant boundaries).  
         [0057]      FIGS. 11 and 12  show alternative embodiments of the contact plate  32  of the present invention. In  FIG. 11 , the contact plate  32  includes a plurality of continuous conductive members  32   a  that run only along the vertical streets (or horizontal streets not shown) of the workpiece W. The contact plate  32  may have one continuous conductive member  32   a  connected at opposite ends to the shoulder  41  (effectively dividing the device side of the workpiece W into two zones). Or the contact plate may have a plurality of conductive members  32   a  (up to the number corresponding to the number of streets on the workpiece W.  FIG. 12  shows two intersecting conductive members  32   a  splitting the contact plate  32  into quadrants. The localized contacts proposed by the present invention may (or may not) be utilized in conjunction with contacting the circumference or periphery of the wafer as is typical in conventional plating apparatuses. However, by creating device level contact schemes as discussed above, the challenges inherent in plating highly resistive films can be overcome.  
         [0058]     To eliminate the die-specific nature of the contact geometry associated with a certain aspects of the present invention, an alternative embodiment of the present invention provides for relatively high conductivity current paths (e.g., bus paths) to be formed or imbedded in the streets. This can be accomplished by creating conductive streets or electrical bus paths on the workpiece W. For example, a PVD copper bus line is deposited on the workpiece W. The bus line may be only within a first layer and contact to the bus lines is maintained on subsequent layers by having vias connecting to the bus path. Thus, even when a conventional circumferential contact is used, the highly conductive streets provide a low resistance path around each die, effectively achieving the same result as contacting the wafer locally around each device.  
         [0059]     In another aspect of the present invention, even more uniform barrier and seed layer plating may be achieved by coupling the localized die-level contact schemes discussed above with localized plating. For example, local die level anode shapes (or smaller) may be moved and/or controlled to enable better die scale plating. By locally plating one die at a time, the terminal effect is reduced because the overall current passing though the barrier at a given time is reduced and the voltage variations throughout the film are correspondingly reduced. Similarly, localized/dynamic control of the individual contacts across the streets or the circumference can create more controlled localized plating. For example, only a portion of the circumferential or street contacts may be active at a certain time. This dynamic control could be cycled around the wafer creating varying current flow directions and potential drops across the wafer to overcome the effects of anisotropic sheet-resistance and shorting by underlying conductive pads.  
         [0060]     While the specific embodiments have been illustrated and described, numerous modifications come to mind without significantly departing from the spirit of the invention, and the scope of protection is only limited by the scope of the accompanying Claims.