Abstract:
A capacitive image sensor includes a sensor array having capacitive image pixels. Each pixel has a two-transistor configuration including a pixel selection transistor and a source follower transistor. The pixel selection transistor activates the source follower transistor. The source follower is coupled to a variable capacitance that affects an input impedance of the source follower. An AC current is source is used to interrogate the activated source follower to determine an output impedance of the source follower. The output impedance is a function of the input impedance and the output impedance is representative of the nearness of an object.

Description:
TECHNICAL FIELD 
       [0001]    The present disclosure relates to electronic imaging technology and, more particularly, to a capacitive image sensor utilizing capacitive image pixels that have a two-transistor configuration. 
       BACKGROUND 
       [0002]    There are many imaging modalities routinely used today for various types of filmless x-rays and fingerprint sensing. Examples include optical imaging, which is the predominant imaging technique for fingerprints, ultrasonic imaging, and capacitive imaging. For each of the specific imaging techniques there are pros and cons. Optical imaging produces a pattern of light and dark that makes up a visual impression of a fingerprint with components that are easily obtained and inexpensive. However, that visual image produced under optical imaging can be tainted by stray light or surface contamination of the imaging plate. Ultrasonic imaging enables the user to see beneath the skin providing more information as a biometric measure. However, ultrasonic imaging is slow, expensive, bulky, and data intensive. Capacitive imaging is widely used for small size finger print sensors, e.g., line scanners or single finger areas, because of its simple structure. However, for large area finger print scanners, i.e., those having a so-called 4-4-1 format, utilizing capacitive imaging techniques has proven difficult due to unreasonable component costs and difficulties in meeting an optimal signal-to-noise ratio. 
       SUMMARY 
       [0003]    A capacitive image sensor of an example embodiment includes a sensor array having capacitive image pixels. Each pixel has a two-transistor configuration including a pixel selection transistor and a source follower transistor. The pixel selection transistor activates the source follower transistor. The source follower is coupled to a variable capacitance that affects an input impedance of the source follower. An AC current source is used to interrogate the activated source follower to determine an output impedance of the source follower. The output impedance is a function of the input impedance and is representative of the nearness of an object. The combination of all output impedances from all pixels is used to create an image of the object. 
         [0004]    The variable capacitance varies in accordance with the nearness of the object which is affective in altering capacitance. The sensor and/or pixel may further include a DC current source that is used to set a working bias point for the pixel circuit. The AC current source provides a known amplitude and frequency, and may provide a sinusoidal signal or a square-wave signal. The sensor and/or pixel may be implemented with thin film technology. The sensor may provide a resolution of up to about 1000 ppi (pixels per inch). 
         [0005]    A method to obtain an impedance readout from the capacitive image pixel includes activating the source follower transistor with the pixel selection transistor, interrogating the source follower transistor by applying an AC current source to the source follower transistor, and determining an output impedance of the source follower transistor based on the interrogation. Notably, the output impedance is a function of the input impedance and, as such, is representative of the nearness of an object that is capable of affecting the variable capacitance. The method may additionally include measuring the voltage output of the source follower transistor wherein the voltage output correlates to the output impedance. 
         [0006]    The above summary is not intended to describe each embodiment or every implementation. A more complete understanding will become apparent and appreciated by referring to the following detailed description and claims in conjunction with the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]      FIG. 1  is a cross-sectional view of a capacitive touch pattern sensor according to an example embodiment. 
           [0008]      FIG. 2  is a block diagram illustrating details of a sensor array according to an example embodiment. 
           [0009]      FIG. 3  is a schematic diagram illustrating an active pixel circuit disclosed in an earlier-filed disclosure (PRIOR ART). 
           [0010]      FIG. 4  is a schematic diagram illustrating an active pixel circuit according to an example embodiment. 
           [0011]      FIG. 5  is a schematic of a source follower circuit, a standard equivalent of the source follower circuit and the derived output impedance of the source follower circuit. 
           [0012]      FIG. 6  is a graph illustrating results of a SPICE simulation of a pixel configured as shown in  FIG. 4 . 
           [0013]      FIG. 7  is a flowchart illustrating a procedure according to an example embodiment. 
       
    
    
       [0014]    The figures are not necessarily to scale. Like numbers used in the figures refer to like components. However, it will be understood that the use of a number to refer to a component in a given figure is not intended to limit the component in another figure labeled with the same number. 
       DETAILED DESCRIPTION 
       [0015]    The present disclosure relates to touch/proximity pattern sensors such as fingerprint sensors. Generally, fingerprints (and similar patterns, e.g., on hands and feet) are readily accessible biometric indicators that are unique to each person. As a result, computer scanned hand/fingerprint images can be used for purposes such as authentication. For example, a scanning sensor may include a flat surface against which to place the finger (or any scanned object). In response to the contact, the sensor generates an image of the texture/contours of the scanned object. Pattern recognition software can compare metrics of the scanned image to stored metrics, and confirm identity based on a match of the metrics. 
         [0016]    There are a number of ways a fingerprint image can be obtained, such as using optical sensors. Embodiments described below use capacitive sensing. Generally, an object that touches a sensing surface will affect the local electrical capacitance of the surface wherever there is contact. While capacitive touch input sensing is widely used to determine coarse indications of contact location (e.g., touchscreens, touchpads), the sensors described herein may be capable of much higher resolution (e.g., on the order of 1000 dpi) than a conventional touch input sensor. It will be understood that, while the embodiments herein may be described in the context of biometric touch sensing, the embodiments and variations thereof may be applicable to other applications and devices. For example, devices such as non-destructive testing imagers may obtain an image based on portions of an object that touch and/or are in relatively close proximity to a contact sensing element. 
         [0017]    In reference now to  FIG. 1 , a cross-sectional view illustrates a capacitive touch pattern sensor according to an example embodiment. A sensor array  102  is built on top of a substrate  104  (e.g., glass). The sensor array  102  includes a plurality of active pixels  100 , an example of which will be described further below. Generally, each pixel  100  is electrically coupled to sensing pads  106 . The pads  106  are electrically conductive and covered by an insulator layer  108 . The insulator layer  108  may be made from a protecting coating polymer such as Parylene. A conductive object  109  contacting the insulating layer  108  changes a local capacitance at the pads  106 . For example, a fingerprint ridge  112  that is different than another pad  106  directly below fingerprint valley  110 . The capacitance may vary not only based on contact versus non-contact, but may also vary depending on the relative proximity of non-contacting portions. For example, different fingerprint valleys may cause different capacitance due to different distances from a surface of the insulating layer  108 . 
         [0018]    In reference now to  FIG. 2 , a block diagram illustrates details of a sensor array  102  according to an example embodiment. The sensor array  102  includes a number of individual active pixel elements  100 . Each of these elements  100  are associated with one of a row line  204  and a column line  206 . Generally, to detect an image, each of the row lines  204  may be activated in sequence. Activating a row line  204  causes all elements  100  in the rows to become active (e.g., switching on an enabling transistor). Then each of the column lines (e.g., data lines)  206  is scanned to read the individual elements  100  in the currently activated row. Alternate methods of scanning the elements  100  are known in the art, and the embodiments need not be limited to what is shown in  FIG. 2 . 
         [0019]    As will be described in greater detail below, the reading of each column line  206  may involve applying to each column line  206  a first voltage level for a first period of time, then switching to a second, lower voltage level for a second period of time. The first voltage level charges the currently read element  100  and the second voltage level causes a current flow via the column line that indicates a sensed capacitance of the element  100 . 
         [0020]    In reference now to  FIG. 3 , a schematic diagram illustrates an active pixel  100  according to a previously disclosed, prior art embodiment which may be found in U.S. Pat. No. 8,618,865. The active pixel  100  is generally configured as a three-transistor sensor, sometimes abbreviated as a  3 T sensor pixel. The three transistors M 1 , M 2 , M 3  in this diagram are n-type, low-temperature, polycrystalline silicon (Poly-si) thin film transistors (TFTs) although it may be possible to use other types of transistor devices such as metal oxide semiconductor, field-effect transistors (MOSFETs). Transistor M 2  is configured as a reset transistor in response to reset signal G n+1 . When G n+1  is activated, M 2  shorts out high frequency rectifying/detection diode D 1 , allowing sensing junction J 1  to be tied to the biasing voltage of D 1 . By tying the reset transistor M 2  to the enable line of the following row (G n+1 ), the active pixels  100  can be reset without using a separate set of reset lines. In other configurations, M 2  may be reset by another line, such as the preceding row enable (G n+1 ), a separate reset line, a data line Dn of an adjacent column, etc. 
         [0021]    As seen in  FIG. 3 , two capacitors, C p  and C f  are coupled to the detection diode D 1  at sensing junction J 1 . The C p  component is a parasitic capacitor, having one end coupled to the sensing junction J 1  and the other end at ground. The C f  component models the sensed capacitance of the pads and insulating layer (see sensing pads  106  and insulating layer  108  in  FIG. 1 ). The effective value of C f  may vary from zero (or near zero) to some maximum value (in this example on the order of 10 fF) depending on whether or not an object (e.g., fingerprint ridge) is contacting the insulating layer. As will be described in later detail below, the sensed capacitance can be found based on a ratio of gate capacitance of M 1  (C M1 ) and the sum of C f , C p , and C M1 . 
         [0022]    The M 1  transistor is configured as a source follower having its gate tied to the sensing junction J 1 . The output of M 1  is tied to data line Dn when enabling transistor M 3  is switched on in response to enable signal Gn. The transistor M 1  also acts as a charge pump to charge up capacitors C f  and C p . This charging occurs during the operation cycle of the pixel  100 , when M 3  is enabled. In one prior art embodiment, the operation cycle is between 50-50 μs. During part of the cycle (charging interval), the potential of data line Dn is brought down to a first voltage level, which causes excess charge built up on gain capacitance C M1  by current flowing through diode D 1  to maintain a stable charge voltage V charge =V diode     —   bias. 
         [0023]    When the data line voltage is returned to its original voltage in a later part of the operating cycle (sensing interval), the charge accumulated on the gate of M 1  during charging interval will be redistributed among C p , C f , and C M1 . The final voltage (V sense ) at the sensing junction J 1  at the end of the sensing interval becomes the input of the source follower M 1 , and the output of M 1  at this interval can be read out on Dn. The difference ΔV between the V charge  and V sense  potentials can be expressed as ΔV is approximately proportional to C M1 /(C f +C p +C M1 ). Generally, the capacitance C f  may be determined by measuring current flow through Dn during the sensing interval. 
         [0024]    While the above-described prior art embodiment of the active pixel  100  provides a good signal-to-noise ratio, three transistors and a diode are required to form the active pixel  100 . The result is a scanner that could provide a pixel density of approximately 500 ppi. However, technology requirements are ever-expanding and there is a desire to produce an active pixel with up to double the pixel density, i.e. 1000 ppi. A 1000 ppi pixel density is difficult to achieve using the above-described prior art design without using design rules that would exceed most TFT manufacturer&#39;s capabilities. As such, disclosed herein below, is a pixel design for an active pixel wherein only two transistors are required yet a desired 1000 ppi pixel density is substantially achieved and manufacturability is eased. 
         [0025]    Referring now to  FIG. 4 , an active pixel  300  of an example embodiment is disclosed. The design of active pixel  300  has been streamlined from that of  FIG. 3  to eliminate the diode D 1  and the reset transistor M 2 . The remaining transistors comprise a source follower transistor M 1  and a pixel selection transistor M 3 . As seen in  FIG. 4 , a series capacitance comprising C 3  and C f  is connected to junction J 1  as is capacitor C p . As before, C p  represents the parasitic capacitance of the pixel  300  while C f  models the sensed capacitance of the pads and insulating layer (see sensing pads  106  and insulating layer  108  in  FIG. 1 ). The series capacitance of C f  and C 3 , which itself has a value of C x , has a combined capacitive value that may vary from zero (or near zero) to some maximum value, e.g., on the order of about 13.3 fF, depending on whether or not an object (e.g., fingerprint ridge) is contacting or near the insulating layer  108 . The value of C x  is essentially the object to imager platen, i.e., substrate  104 , capacitance. 
         [0026]    The M 1  transistor of  FIG. 4  is configured as a source follower having its gate tied to the sensing junction J 1 . However, because the topology has removed the reset transistor M 2  of the embodiment of  FIG. 3 , a DC path is needed for the gate of M 1 . Resistor R 1  provides this path. Resistor R 1  may comprise a semi-insulative layer covering all of the pixels  300  and is tied to supply voltage V cc . In a simulation of the pixel  300  a value of 1e13 Ohms was used for R 1 , however, R 1  may be any value as long as the value is much greater than the impedance of C p  at a probing frequency, described further below, of the readout process. 
         [0027]    With M 1  operating as the source follower transistor and M 3  operating as the pixel selection transistor, the circuit of  FIG. 4  is additionally provided with two current sources I 1  and I 2 . I 1  and I 2  are DC and AC current sources, respectively, that either are implemented at the peripheral of substrate  104  using TFT technology or provided by a readout chip. I 1  is the DC source operating to ensure that a correct working bias point is set. I 2  is the “probing” AC source operating to provide a known amplitude and frequency current to the pixel  300 . Specifically, the output impedance of the source follower M 1  is interrogated by injecting the AC current I 2  and measuring the voltage response which thereby enables a determination of the output impedance of M 1  as a function of its input impedance. The input impedance varies in accordance with the distance of an object from the insulating layer  108 . A standard source follower circuit, equivalent circuit, and the derived output impedance as a function of input impedance are shown in  FIG. 5 . 
         [0028]    The pixel  300  of  FIG. 4  was simulated in a SPICE circuit simulator with typical parameters (I 1 =10 uA, I 2 =5 uA (AC) and 100 KHz), and C x  ranging from 1e-16 to 1e-13 F). The results are shown in  FIG. 6 , where V o  is the AC component at the output node, junction J 1 . Note there is essentially no change of the response V o  when the probe current frequency of I 2  is changed from 1 KHz to 100 KHz. 
         [0029]    While this simulation was assumed to be a small signal, sinusoidal AC source for simplicity in analysis and simulation, it should be noted that in a non-simulation situation, one may choose to use a digital switching (e.g., large, square wave) implementation to provide a digitally compatible circuit. It should additionally be noted that while the output impedance of the source follower M 1  was interrogated by injecting an AC current and measuring the voltage response, the design of the pixel  300  could be modified to measure resulting AC current with an applied AC voltage. And, although specific component types and respective values are shown in  FIG. 4 , one of ordinary skill in the art will appreciate that component types and variables can change from what is shown while still falling within the scope of the claimed invention. For example, the n-channel transistors depicted may be replaced with p-channel transistors with the remainder of the circuit modified as appropriate to accommodate the p-channel transistors. 
         [0030]    According to an example embodiment, a plurality of pixels  300  are substituted for pixels  100  and incorporated into an array  102  of pixels such as that shown in  FIG. 2 . By scanning each pixel  300  in an active array  102 , measurements of the output impedance of M 1  can be assembled into an image. 
         [0031]    In reference now to  FIG. 7 , a flowchart illustrates a method according to an example embodiment. Specifically, the flowchart depicts a procedure  400  for obtaining an impedance readout of an active pixel sensor within an array of pixels in accordance with the pixel  300  described above. Initially, a pixel is activated with a pixel selection transistor, per block  402 . The source follower transistor, which is coupled to a variable capacitance, is then interrogated by applying an AC current source to the source follower transistor, per block  404 . The voltage output of the source follower transistor is measured, per block  406 . The output impedance of the active pixel is determined based on the measured voltage output, per block  408 . If there are any additional unread pixels, the above-described process is repeated, per decision block  410 , until all pixels have provided a readout from which an image can be formed. If all pixels have provided a readout, the process is terminated. 
         [0032]    Systems, devices or methods disclosed herein may include one or more of the features structures, methods, or combination thereof described herein. For example, a device or method may be implemented to include one or more of the features and/or processes above. It is intended that such device or method need not include all of the features and/or processes described herein, but may be implemented to include selected features and/or processes that provide useful structures and/or functionality. 
         [0033]    Various modifications and additions can be made to the disclosed embodiments discussed above. Accordingly, the scope of the present disclosure should not be limited by the particular embodiments described above, but should be defined only by the claims set forth below and equivalents thereof.