Abstract:
An electroacoustic component includes a carrier substrate and a piezosubstrate having piezoelectric properties. The electroacoustic component also includes a layer system between the carrier substrate and the piezosubstrate.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     Pursuant to 35 USC §120, this application claims the benefit PCT/DE2006/002005 filed Nov. 15, 2006 which claims the benefit of German Patent Application No. 102005055870.4 filed Nov. 23, 2005. Each of these applications is incorporated by reference in its entirety. 
     TECHNICAL FIELD 
     An electroacoustic component, in particular a component operating with guided bulk acoustic waves, will be specified. 
     BACKGROUND 
     Components operating with guided bulk acoustic waves are known, for example, from the publications DE 10325281 A1, US 2005/0099091 A1, U.S. Pat. No. 6,046,656, WO 01/29964 A1, WO 03/088475 A1 and WO 03/088482 A1. 
     SUMMARY 
     One problem to be solved is to specify a robust electroacoustic component with good properties with regard to its coefficient of linear thermal expansion. 
     An electroacoustic component is specified with a layer system suitable for conducting guided bulk acoustic waves (GBAW), a carrier substrate and a piezosubstrate that is relatively thin in comparison to the carrier substrate. The layer system is arranged between the two substrates. 
     The thickness of the piezosubstrate in a first embodiment is at most half the thickness of the carrier substrate. 
     According to a second preferred embodiment, the piezosubstrate has a monocrystalline structure and is at most 50λ thick, at most 30λ thick in one preferred variant, where λ is the wavelength of the GBAW at, for instance, an operating frequency or the center frequency of the specified component. 
     According to a third preferred embodiment, the piezosubstrate is thinned down in a mechanical process. Thinning down is understood to mean the removal of part of the substrate material after the production of the layer structure of the carrier substrate, the layer system and the piezosubstrate. The piezosubstrate can be thinned down to a thickness of 5λ in one variant. 
     Silicon, for example, is suitable as a material for the carrier substrate for reasons of cost. This material is also advantageous with respect to increasing the integration density of the specified component. A crystal orientation of 111 or 100 is preferred for the silicon crystal. However, Al 2 O 3 , glass or an (organic) synthetic material, e.g., FR4, is also suitable. The carrier substrate can also have piezoelectric properties. Materials with a relatively low coefficient of thermal expansion (compared to the piezosubstrate) are preferred for the carrier substrate. The coefficient of expansion of the carrier substrate can be at least 50% smaller than that of the piezosubstrate, for example. 
     A piezosubstrate is understood to be a substrate made of a material with piezoelectric properties. The piezosubstrate is preferably cut from a single crystal. Particularly LiTaO 3 , LiNbO 3 , ZnO, KNbO 3 , NaKNbO 3  quartz or other piezoelectric materials can be considered as single crystals for this purpose. The piezosubstrate can be formed, for instance, from LiTaO 3  with a cut angle φ rot YX, where 7°&lt;φ&lt;24°. In a preferred variant, 12°&lt;φ&lt;21°. It is possible to achieve a high electric bandwidth with electroacoustic components made of LiTaO 3  as a substrate and with such a cut angle. 
     The specified component, its mode of operation and preferred embodiments will be explained below. 
     An electric signal applied to the component structures (i.e., electrodes of a transducer) stimulates deflections of atoms in the piezoelectric substrate, exciting a bulk acoustic wave which can be guided in a horizontal plane, more particularly, in the dielectric layer and in the vicinity of this layer. 
     The acoustic energy of a GBAW in a component operating with GBAW is primarily centered in the area in which the wave is excited, and decays in both directions perpendicular to the layer structure of the component. This decay is achieved by a waveguide structure, i.e., a velocity profile in the vertical direction. The lowest propagation velocity exists in a preferably thin layer (dielectric layer) in the vicinity of the excitation plane of the acoustic waves. This layer is arranged between substrates with higher acoustic propagation velocities. 
     The GBAW is excited in the layer system, or at its boundary surface with the piezosubstrate, and is guided mainly in this layer system. In one advantageous variant, the layer system comprises a metal layer in which the component structures that excite the GBAW are formed, and a relatively thin dielectric layer with a low propagation velocity of acoustic waves. 
     The dielectric layer is preferably made of silicon oxide. SiO 2  is advantageous as the material for the dielectric layer because an SiO 2  surface is suitable for direct wafer bonding. TeO 2 , for instance, is suitable as an alternative to SiO 2 . In principle, any desired materials with a relatively low acoustic impedance (relative to the acoustic impedance of the metal layer) can be considered as a material for the dielectric layer. 
     The quality of the dielectric layer can be judged on the basis of its optical index of refraction. A dielectric layer of SiO 2  with an index of refraction between 1.44 and 1.48 is preferred. The SiO 2  of the dielectric layer is preferably stoichiometric. 
     The metal layer with the component structures formed in it is preferably arranged directly on the piezosubstrate. The component structures are embedded between the piezosubstrate and the dielectric layer. 
     The metal layer can consist of a single layer having a high conductivity and a relatively high acoustic impedance. In a preferred variant, the metal layer comprises several sublayers, including a first sublayer with a high conductivity and a second sublayer with a high acoustic impedance. The metal layer can be a sublayer of Al and another sublayer of W or Pt for example. Sublayers of the metal layer can in principle consist of metals, metal alloys or other conductive materials. 
     A typical footprint of the component is 500-700 mm 2 . The overall thickness of the component in one variant is approximately 200 μm and is preferably not greater than 100 wavelengths. The overall thickness of the component can also be less than 200 μm, however. 
     Due to the differing coefficients of linear expansion of the two substrates, mechanical strains, which can be particularly large at the boundary surface of the piezosubstrate and the layer system, arise in the layer structure of the component in case of a temperature change. 
     The thickness of the piezosubstrate is preferably selected such that the mechanical strains due to the differing coefficients of linear expansion of the two substrates are directed into the overall volume of the piezosubstrate, so that the piezosubstrate can follow the expansion of the carrier substrate. Thus the coefficient of linear thermal expansion of the overall structure—including the piezosubstrate—can be adapted to that of the carrier substrate. 
     The thickness of the piezosubstrate is preferably between 3 and 30 wavelengths, at most 70 μm in a preferred variant. The piezosubstrate can have a greater thickness during the application of the layers of the layer sequence, and only be thinned to the above-described thickness value in a subsequent process step. 
     In order to form the dielectric layer, one can use a material with a temperature coefficient (TCF) of its elastic constants that is opposite to the temperature coefficient of the elastic constants of the piezosubstrate, the temperature coefficient of the dielectric layer being negative in case of a positive temperature coefficient of the respective substrate, and vice versa. With opposite TCFs of the two adjacent layers it is possible to keep the temperature coefficient of the overall component low. 
     The thickness of the layer system arranged between the piezosubstrate and the carrier substrate is preferably equal to the thickness of the dielectric layer, since the component structures of the metal layer are embedded in the dielectric layer and preferably do not project above it. The layer thickness in one variant is between 0.1λ and λ, preferably between 0.15λ and 0.5λ, or between 0.3 and 1 μm. The overall thickness of the carrier substrate and the layer system together is preferably not greater than 100 wavelengths or 200 μm. 
     With the above-specified thicknesses for the substrates and the layer system, it is possible to achieve a low temperature coefficient of the component, in one variant |TCF|&lt;40 ppm/K. Thus, stable electrical properties of the component can be guaranteed over a wide temperature range. 
     The exposed (outward-facing) rear side of the piezosubstrate is preferably metallized over a large surface area. This metallization is preferably connected to ground and serves as an electromagnetic shield for component structures. Metal surfaces provided as terminals of the component and/or labeling of the component can be formed in this metallization. 
     Through-hole contacts, which conductively connect terminals arranged on a surface of the carrier substrate to the contact areas, are preferably formed in the carrier substrate. The through-hole contacts can be constructed as tubes (optionally with a tapering cross-section) or as openings with metallized inner walls. The openings provided for through-hole contacts in the carrier substrate can also be filled with metal, however. 
     The specified component can be produced in the following process, for example. A first wafer (e.g., LiTaO 3  wafer) is prepared, which is suitable for simultaneous production of several components or component regions. A second wafer (e.g., an Si wafer) is prepared, which is suitable for producing carrier substrates. Areas of the respective substrate provided for component regions preferably form a regular matrix. 
     Component structures—more particularly, electroacoustic transducers—and contact areas conductively connected to them are formed, preferably photolithographically, on the first wafer for each component region. A dielectric layer is applied to the surface of the piezosubstrate bearing the component structures over a large area, e.g., in a CVD process (CVD=chemical vapor deposition) or by means of sputtering. 
     In a preferred variant of the method, the dielectric layer is planarized, for example, by means of a CMP process. CMP stands for chemical mechanical polishing. 
     It can be advantageous to thin the dielectric layer in order, for instance, to change the frequency position of the component structures. This can take place in the planarization step. The frequency position of component structures, or the thickness of the dielectric layer, is adjusted such that the frequency position provided for the component results after bonding to the second wafer. 
     The first wafer is now bonded to the second wafer, by direct wafer bonding, for example. Wafer bonding is preferably performed at relatively low temperatures, such as room temperature. A composite wafer with component regions to be separated is formed. 
     The composite wafer can be thinned on the side of the first wafer. The composite wafer is saw-scored, preferably in a V-shape, at least down to the carrier substrate on the side of the piezosubstrate, along dividing lines, i.e., between the component regions. It is also advantageous to cut into the carrier substrate down to a certain depth. In particular, oblique abutting edges of the piezosubstrate and the layer system are produced in this way that, together with the (flat) rear side of the metallized piezosubstrate, can be hermetically sealed and therefore encapsulated. The component structures are thereby protected against corrosion, as well as being shielded against external electromagnetic fields. 
     On the side of the carrier substrate, openings—contact holes—through-hole contacts for contacting contact areas are produced by etching and subsequent metallization, for example. External terminals for components are preferably produced in the same process step on the outward-facing surface of the second wafer. 
     A thin silicon wafer with prefabricated contact holes for bonding to the piezosubstrate could be used as a carrier substrate. Prefabricated semiconductor structures such as diodes and transistors can be formed on the carrier substrate, or on its surface. 
     In an advantageous embodiment, the piezosubstrate can be arranged between the layer system and a cover substrate, which preferably has physical properties, e.g., the temperature coefficient of the elastic constants, similar to those of the carrier substrate. It is advantageous to arrange the piezosubstrate between two substrates—a carrier substrate and a cover substrate—which both have a behavior and/or a smaller expansion coefficient opposite to the temperature coefficient of the elastic constants of the piezosubstrate. 
     The thickness of the piezosubstrate is preferably less than that of the cover substrate. It is beneficial to choose the thickness of the piezosubstrate to be less than the total thickness of the cover substrate and carrier substrate. The thickness of the piezosubstrate can, for example, be chosen to be less than half the sum of the thicknesses of the cover substrate and the carrier substrate. 
     Glass, silicon or silicon dioxide, for instance, is suitable as the material for a cover substrate. It is advantageous to use, for the cover substrate and the carrier substrate, materials, preferably identical, that are suitable for direct wafer bonding. 
     The exposed surface of the cover substrate can be metallized to form electrical shielding and/or electrical connections, for example. It is also possible, however, for the cover substrate to have the same construction characteristics, such as contact holes and integrated semiconductor structures, that were described in connection with the carrier substrate. The contact holes in this case are preferably run through the cover substrate and the piezosubstrate all the way to metal layers contained in the layer system. 
     In principle, a metal layer can be provided between the piezosubstrate and the cover substrate in which, for example, contact areas and electroacoustic structures suitable for wave generation and guidance can be formed. Other intermediate layers are also possible. 
     In one variant, it is possible to bond the first wafer, a composite of the carrier substrate, the layer system and the possibly thinned-down piezosubstrate, to the cover substrate in the form of a second wafer. 
     In another variant, it is possible to join or bond the piezosubstrate first to the cover substrate and to form the already described piezosubstrate layer system on the side of the piezosubstrate facing away from the cover substrate. The wafer thus produced can be joined to the wafer provided as a carrier substrate by bonding, for example. The piezosubstrate is preferably thinned down, and its surface is polished so that it is suitable for the application of component structures (transducers, contact areas, electrical connections). 
     The component and the method for manufacturing it will be described below using schematic figures not drawn to scale. Therein 
    
    
     
       DESCRIPTION OF THE DRAWINGS 
         FIGS. 1A-1G  show process steps in the manufacturing method; and 
         FIG. 2  shows the fundamental structure of a GBAW component with a carrier substrate and a cover substrate. 
     
    
    
     DETAILED DESCRIPTION 
     A component operating with GBAW is shown in  FIG. 1G . A layer system  3  is arranged between a piezosubstrate  1  and a markedly thicker carrier substrate  2 . In view of the small thickness of the piezosubstrate, the thickness of the carrier substrate is preferably selected to be sufficiently large that it is sufficient for the mechanical stability of the component. 
     Carrier substrate  2  preferably has a lower thermal expansion than piezosubstrate  1 . 
     The thickness of the piezosubstrate and the carrier substrate is, respectively, 50 μm and 150 μm in one variant. The thickness of the layer system in one variant is 0.6 μm. 
     Layer system  3  comprises a metal layer  31  arranged on piezosubstrate  1 . Metal layer  31  is structured and comprises electroacoustically active regions  42 , such as transducers, and contact areas  41  conductively connected thereto. Structures  41 ,  42  of the metal layer  31  are encapsulated between piezosubstrate  1  and a dielectric layer  32  of SiO 2 , for example. 
     Piezosubstrate  1  is preferably piezoelectric, of LiTaO 3 , in one variant LiTaO 3  αrotYX where 15°&lt;α&lt;20°. The carrier substrate is preferably made of a high-ohmic silicon. The acoustic velocity in substrates  1 ,  2  is markedly higher—at least 20% for example—than in the dielectric layer. 
     Contact holes  20  with exposed contact areas  41  therein are provided in the composite formed from carrier substrate  2  and dielectric layer  32 . A metallization  60  that covers the inside walls of the contact holes and the exposed regions of the contact areas is provided in the area of the contact holes. The metallization  60  is additionally arranged in part on the underside of carrier substrate  2  and forms external contacts  61 . 
     A first wafer is shown in  FIG. 1A . In the manufacturing of the first wafer, a structured metal layer  31  is first applied to a first substrate  1 . A dielectric layer  32  is then applied to piezosubstrate  1  over metal layer  31 . 
     Dielectric layer  32  is preferably planarized. In the next step ( FIG. 1B ), regions  320  of dielectric layer  32  are etched away in order, in particular, to expose contact areas  41  at least in part. It is thus possible to measure electric parameters of component regions. In case the actual values of these parameters deviate from the nominal values, the layer system can be trimmed both mechanically and electrically in this process stage. For the electrical trimming, for instance, trimming structures not shown here are modified and thus the electrical impedance of component structures is modified. For mechanical trimming, the dielectric layer can be thinned. 
     Next, wafer  1 ,  3  is joined to a second wafer or carrier substrate  2 , preferably by means of direct wafer bonding ( FIG. 1C ). It is indicated with a dashed line in  FIG. 1C  that the piezosubstrate has been thinned. 
     By thinning down the piezosubstrate, which as a rule has a higher thermal expansion than the carrier substrate, the thermal expansion of the entire component is improved, as is the temperature coefficient in the case of a combination of substrates made of Si and LiTaO 3 . 
     The representation according to  FIGS. 1A-1C  is rotated by 180° with respect to the representation according to  FIGS. 1D-1G , so that carrier substrate  2  is turned toward the bottom and piezosubstrate  1  is turned toward the top in  FIGS. 1D-1G . 
     Piezosubstrate  1  has already been thinned in  FIG. 1D . It is indicated with dashed lines in  FIG. 1D  that abutting edges of the piezosubstrate, layer system  3 , and abutting edges of the carrier substrate in part as well, have been beveled by, for instance, a V-shaped sawed incision between two component regions. 
     The rear side of the piezosubstrate and, in particular, the interface still open in  FIG. 1D  between layer system  3  and substrates  1 ,  2  as well, are metallized (metal layer  5  in  FIG. 1E ), and thus sealed off against harmful environmental influences. 
     Contact holes  20 , preferably with slanted walls, are produced in carrier substrate  2  ( FIG. 1F ). The contact holes  20  issue into openings  320  of the dielectric layer. 
     Thus contact areas are again exposed. A metallization  60 ,  61  is applied to parts of the surface of the carrier substrate, to the inner walls of contact holes  20  and to the exposed regions of contact areas  41 . 
     Another GBAW component is shown in  FIG. 2 , which unlike the variant presented in  FIG. 1G  additionally has a cover substrate  7  that is thicker than piezosubstrate  1 . 
     The coefficient of expansion of substrates  2 ,  7  is lower than that of piezosubstrate  1 . Substrates  2 ,  7  are preferably made from the same material, the expansion coefficients of which substantially determine the temperature coefficient of the component as a whole because of the higher overall thickness of these substrates in comparison to the thickness of piezosubstrate  1 . It is thus possible to keep the thermal expansion of the overall component small.