Abstract:
A method of driving a display, wherein the display comprises a layer of electroluminescent material (EL) and a layer of physically-stabilised liquid crystal (LC) wherein the layers of EL and LC are powered by a common set of electrodes. The method comprises driving the common electrodes with a voltage waveform which is substantially a truncated triangular waveform.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    This invention relates to a method of driving a display, together with drive circuitry for implementing the method. In particular, the invention relates to a method of driving a display comprising a layer of electroluminescent material (EL) and a layer of physically-stabilised Liquid Crystal (LC) together with a drive circuit for such a display. 
         [0003]    2. Description of the Related Art 
         [0004]      FIG. 1  of the accompanying drawings shows a display which is suitable for being driven by preferred embodiments of the invention. The display comprises, from front to back: a relatively thick protective electrically-insulating transparent front layer ( 11 ; the substrate); over the rear face of the substrate  11 , a relatively thin transparent electrically-conductive film ( 12 ) forming the front electrode of the display; covering the rear face of the front electrode  12 , a relatively thin layer ( 13 ) of LC material ( 14 ) physically-stabilised by being dispersed within a supporting matrix ( 15 ); formed directly on, and covering the rear face of, the liquid crystal layer  13 , a relatively thin layer ( 16 ) of electroluminescent/phosphor material ( 17 ) dispersed within a supporting matrix ( 18 ); over the rear face of the phosphor layer  16 , a relatively thin optically-reflective electrically-insulating layer ( 19 ) of a relatively high dielectric constant material (in the Figure this layer is shown as a seamless extension of the phosphor layer  16 ); and disposed over the rear face of the reflective electrically-insulating layer  19 , an electrically-conductive film ( 20 ) forming the rear electrode(s) of the display. 
         [0005]    The front and rear electrodes together define which areas of both the liquid crystal layer and the electroluminescent layer can be selected to be switched “on” or “off”. 
         [0006]    In addition, the back electrode layer may be covered with a protective film (not shown here). 
         [0007]    In an alternative preferred embodiment of the display shown in  FIG. 2  of the accompanying drawings, the EL and LC materials are not directly formed on one another, but are instead separated by an insulating interlayer  10 . In all other aspects, the preferred embodiments are the same and common reference numerals have been used. 
         [0008]    In either case with or without the interlayer  10 , the EL and LC materials can share the common pair of electrodes  12 , for common activation of the EL and LC materials. This can be used to generate a display of selectively illuminatable indicia as show schematically in  FIG. 3  of the accompanying drawings. This shows how a common front electrode  12  and substrate can support multiple indicia  21   a ,  21   b . Each indicium  21   a ,  21   b  comprises the remaining layers of the structure shown in  FIG. 1  or  FIG. 2  or the accompanying drawings, namely the LC layer  13 , optionally the interlayer  10 , the EL layer  17 , the reflective insulating layer  18  and the rear electrode  20 . These layers are shaped to provide selectively illuminatable elements that can be illuminated to provide indications to a user; in the present example these are the numbers “5” and “6” but could be extended to any indicia. 
         [0009]    Thus, a display as described in relation to  FIGS. 1  to  3  comprises both a layer of electroluminescent material (EL) and a layer of physically-stabilised Liquid Crystal (LC). 
         [0010]    In the field of EL displays, it is known that the drive waveform is a compromise between many factors which try to maximise display brightness while minimising noise. In such a display, the brightness is a function of the peak value of the voltage of the applied waveform, and the noise is a function of the harmonic components of the applied waveform. To minimise the noise of the display whist maintaining brightness, it is practised in the art to apply an approximation to a sine wave. A true sine wave would be ideal but this is difficult to implement in practice. 
         [0011]    However, the display shown in  FIGS. 1 and 2  is a combination of EL and LC displays and as such the optimal waveform for driving an EL display is not necessarily the optimal waveform for driving a display having both EL and LC layers. 
       SUMMARY OF THE INVENTION 
       [0012]    According to a first aspect of the invention there is provided a method of driving a display, wherein the display comprises a layer of electroluminescent material (EL) and a layer of physically-stabilised Liquid Crystal (LC) wherein the layers of EL and the LC are powered by a common set of electrodes, and wherein the method comprises driving the common electrodes with a voltage waveform which is substantially a truncated triangular waveform. 
         [0013]    Such a method has been found to be efficient at driving a display which comprises both the EL and LC layers. It is believed that the whilst the EL layer responds in terms of light output being a function of the peak waveform applied, the performance of the LC layer is a function of the RMS field applied thereto. 
         [0014]    Conveniently, the truncated triangular waveform comprises a region in which the voltage rises relatively rapidly. It is advantageous if, in this region, the waveform can rise as fast as possible, but not so fast that it contains high frequencies which would cause excessive noise in the display. 
         [0015]    In some preferred embodiments, the rise time is in the range of roughly 100 μs to 500 μs. In other preferred embodiments, the rise time is in the range of roughly 175 μs to roughly 425 μs. In another preferred embodiment, the rise time is roughly 250 μs. These rise times are examples for a waveform having a fundamental frequency of in the range of roughly 50 Hz to IkHz. The skilled person will appreciate that the as the fundamental frequency increases then the rise time of the waveform will decrease. 
         [0016]    Further, the truncated triangular waveform generally comprises a region of substantially constant voltage. Such a region is advantageous as it increases the RMS voltage of the applied waveform. 
         [0017]    Further, the truncated triangular waveform generally comprises a region in which the voltage is reduced to substantially zero. 
         [0018]    As such, the truncated triangular waveform may be thought of as a waveform having three separate portions: a first portion in which the voltage is increased from substantially zero to a predetermined voltage; a second portion in which the voltage of the waveform is held substantially at the predetermined voltage; and a third portion in which the voltage of the waveform is reduced from the predetermined voltage to substantially zero volts. 
         [0019]    Generally, the waveform is an AC waveform. Generally, the negative going portion of the waveform is substantially a mirror image of the positive going portion of the waveform. 
         [0020]    The method may include using a Boost converter to generate the waveform, the Boost converter including an inductor and a switch. 
         [0021]    In the first portion of the waveform, the method may comprise switching the switch at a first rate in order to increase the voltage. 
         [0022]    In a typical preferred embodiment, the switch, in the first portion, is switched at a frequency in the range of 50 kHz to 200 kHz. In other preferred embodiments, the switch is switched in the range of roughly 75 kHz to 175 kHz. In another preferred embodiment, the switch is switched at roughly 100 kHz. The skilled person will appreciate that the frequency at which the switch is switched is will dependent upon the input voltage and the size of the inductor together with the voltage to which it is desired to increase the voltage. 
         [0023]    In the second portion of the waveform the method may comprise monitoring the voltage of the waveform and switching the switch, in order to increase the voltage, if voltage falls below the predetermined threshold. 
         [0024]    According to a second aspect of the invention there is provided a display driver, arranged to drive a display comprising a layer of electroluminescent material (EL) adjacent a layer of physically stabilised Liquid Crystal (LC) wherein the EL layer and the LC layer are powered by a common set of electrodes, wherein the display driver comprises a voltage generator arranged to apply a varying voltage across the common set of electrodes, wherein the voltage generator is arranged to generate a substantially truncated triangular waveform. 
         [0025]    Conveniently, the voltage generator comprises a Boost converter including an inductor and a switch. 
         [0026]    The display driver may also comprise control circuitry arranged to control the Boost converter. 
         [0027]    The truncated triangular waveform may be thought of as a waveform having three separate portions: a first portion in which the voltage is increased from substantially zero to a predetermined voltage; a second portion in which the voltage of the waveform is held substantially at the predetermined voltage; and a third portion in which the voltage of the waveform is reduced from the predetermined voltage to substantially zero volts. 
         [0028]    The control circuitry may be arranged to switch the switch at a first rate during the first portion of the waveform. 
         [0029]    The control circuitry may be arranged, in a second portion of the waveform, to monitor the voltage of the waveform and switch the switch, in order to increase the voltage, if voltage falls below the predetermined voltage. 
         [0030]    In a third portion of the waveform, the control circuitry may be arranged to open a discharge path in order to discharge charge accumulated on a display connected to the driver with said discharge conveniently being at a controlled rate. Such a path is convenient as it can help to rapidly allow the display to be recharged in the subsequent cycle of the waveform. 
         [0031]    According to a third aspect of the invention there is provided a display comprising a layer of electroluminescent material (EL) adjacent a layer of physically stabilised Liquid Crystal (LC) wherein the EL layer and the LC layer are powered by a common set of electrodes, and a voltage generator arranged to apply a varying voltage across the common set of electrodes, wherein the voltage generator is arranged to generate a substantially truncated triangular waveform. 
         [0032]    The display may include any of the features described in relation to the display driver of the second aspect of the invention. 
         [0033]    According to a fourth aspect of the invention there is provided a machine readable medium containing instructions which when read onto a display driver cause that display driver to function as the display driver of the second aspect of the invention. 
         [0034]    The machine readable medium referred to herein may be any of the following: a floppy disk, a CD-ROM/RAM, a DVD ROM/RAM (including −R/+R or −RW/+RW), a Blu Ray disc, an HD DVD ROM, a tape, a hard drive, a memory (including a USM memory stick, a memory card, etc.), a signal (including an Internet download, an FTP transfer, etc), a wire, or any other suitable medium. 
         [0035]    The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0036]      FIG. 1  (Prior Art) schematically shows a cross section through a first preferred embodiment of a display suitable for being driven by a preferred embodiment of the invention; 
           [0037]      FIG. 2  (Prior Art) schematically shows a cross section through a second preferred embodiment of a display suitable for being driven by a preferred embodiment of the invention; 
           [0038]      FIG. 3  (Prior Art) schematically shows a plan view of a display as shown in either of  FIG. 1  or  2 ; 
           [0039]      FIG. 4  schematically shows a waveform according to a preferred embodiment of the invention; 
           [0040]      FIG. 5  schematically shows a waveform used to generate the waveform of  FIG. 4 ; 
           [0041]      FIG. 6  shows an oscilloscope trace of a waveform substantially according to the waveform shown in  FIG. 4 ; and 
           [0042]      FIG. 7  shows an example of a circuit suitable for producing the waveform shown in  FIG. 4 . 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0043]      FIGS. 1 to 3  have been described above and will not be described again here. 
         [0044]      FIG. 4  shows a waveform  400  which is suitable for driving the displays shown in Figure. The waveform is substantially a truncated triangular waveform which comprises a first portion (A), a second portion (B) and a third portion (C). 
         [0045]    In the first portion (A) the voltage of the waveform increases substantially from substantially zero volts to a predetermined voltage V PEAK . In the second portion (B) the voltage of the waveform is held at substantially the predetermined voltage V PEAK . In the third portion (C) the voltage decreases from the predetermined voltage to substantially zero volts. It will then be seen that the waveform repeats but as a negative voltage. 
         [0046]      FIG. 6  shows a waveform  600  generated by the circuit of  FIG. 7 . It can be seen that the waveform  600  comprises the three portions A, B and C which are discussed in relation to  FIG. 4 . 
         [0047]    Referring now to  FIG. 7 , it can be seen that the circuitry comprises a Boost converter provided by the inductor L 1 , the switch Q 1  and the diode D 1 . These three components provide what may be thought of as a voltage generator. 
         [0048]    Switching of the switch Q 1  is controlled by control circuitry, which in this preferred embodiment is provided by the PDC0753 integrated circuit. An output pin of the PDC0753, labelled PWM (Pulse Width Modulated), is connected to the gate of transistor which provides the switch Q 1 . Thus, a high pulse on the PWM output allows current to pass through the inductor L 1  since the transistor Q 1  is can then pass current therethrough. 
         [0049]    The cathode of the diode D 1  is connected to a capacitor C 2  which, as is described hereinafter, accumulates charge as the switch Q 1  is switched. The cathode of the diode D 1  (and therefore also the capacitor C 2 ) is connected to the V PP  input of the integrated circuit PSD0511. This second integrated circuit uses the voltage applied to the V pp  pin to drive a display connected to the HV 00T  pins. 
         [0050]    In use, a high pulse is applied to the gate of the transistor Q 1  and current flows through the inductor L 1  to ground. This current ramps up linearly at a rate proportional to the input voltage divided by the inductance. The energy stored in the inductor is equal to one-half the inductance times the square of the peak current. An input capacitor C 1  filters the V 1N  supply voltage to improve circuit efficiency and avoid current peaks on the V IN  supply. 
         [0051]    When the PWM output goes low, the transistor Q 1  turns off, but the inductor current does not change instantly so the voltage at a switching node (between L 1 , Q 1  and D 11 ) rises to whatever is required to maintain current flow. The diode D 1  then becomes forward biased and the energy that was stored in the inductor L 1  becomes transferred to charge stored in the capacitor C 2 . 
         [0052]    After the energy has been transferred to capacitor C 2 , the diode is reversed biased and prevents the capacitor C 2  from discharging again through the transistor Q 1  to ground or through the inductor L 1  to the Y 1N  supply. 
         [0053]    This process is repeated, with the PWM output pulsing on and off to make the voltage on the capacitor C 2  rise in steps to generate the required, predetermined, voltage V PP  which is used to drive a display connected to the second integrated circuit. 
         [0054]    The V PP  voltage is measured by feedback resistors R 2  and R 3  which divide the V PP  voltage by a factor of 100. The skilled person will appreciate that V PP  will be on the order of several hundred volts and as such needs reducing before it can be measured by the SENSE input of the Integrated Circuit PDC0753. A capacitor C 6  is used to filter out spikes on Vpp to enable accurate measurement. 
         [0055]    This process of applying a high/low pulse to the gate of transistor Q 1  occurs during the first period A of the waveform as can be seen in 
         [0056]      FIG. 5  in which the vertical axis shows the voltage of the gate of transistor Q 1 . Thus, during period A a regular pulse is applied to the gate of transistor Q 1 . In the preferred embodiment being described this is at a frequency of roughly 100 kHz. 
         [0057]    During the hold phase, i.e. during portion B of the waveform, the voltage of V pp  is measured using the sense input of the PDC0753 integrated circuit. As V PP  falls below the predetermined voltage then the PWM output is caused to apply a high pulse to the gate of transistor Q 1 . The voltage of V PP  is expected to fall due to the load of the feedback resistors R 2  and R 3 . 
         [0058]    This causes more charge to be added to the capacitor C 2 , in the manner described above, which increases the voltage of V PP . Thus, looking at  FIG. 5  it will be seen that, during portion B of the waveform, irregular pulses are applied to the gate of transistor Q 1 . It should be noted that the horizontal scale of  FIGS. 4 and 5  are different. 
         [0059]    Also, looking at the trace shown in  FIG. 6 , ripples in the voltage can be observed, as the transistor Q 1  is turned on and off. 
         [0060]    Once a predetermined portion B of the waveform has elapsed which in this preferred embodiment is roughly 750 us. the Hvout1 output from the PSD0511 is set high, i.e. connected to VPP to create a discharge path for charge accumulated on a display driven by the circuit. This causes diode D 2  to become forward-biased, and current flows through resistor R 5  into capacitor C 3 . This discharges the VPP voltage from the display segments (which are connected to the HVout 2-15 pins) and from the capacitor C 2 . The voltage on capacitor C 3  is limited to 6.2V by the zener diode ZD 1  and therefore, after C 3  has been charged up to 6.2V, the discharge current will be diverted through the zener diode ZD 1 . 
         [0061]    In other preferred embodiments, the period B may be in the range of roughly 500 μs to 1 ms. In other preferred embodiments, the period B may be in the range of roughly 625 μs to roughly 875 μs. 
         [0062]    Thus, it will be seen from the above description and by looking at  FIG. 5  that the third portion of the waveform comprises a discharge curve and is therefore exponential in nature. The rate at which the discharge occurs is governed by the magnitude of the resistor R 5 . 
         [0063]    In the preferred embodiment being described the period C is roughly 200 μS. However, in other preferred embodiments, the period C may be in the range of roughly 50 μs to 350 μs. In other preferred embodiments, the period C may be in the range of roughly 125 μs to 325 μs. 
         [0064]    While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.