Abstract:
A method of delaying the onset of a backward wave mode in a frequency selective surface having a two dimensional array of conductive patches or elements and an RF ground plane, the two dimensional array of patches or elements being interconnected by variable capacitors, the method comprising separating grounds associated with the variable capacitors from the RF ground plane and providing a separate conductive mesh structure or arrangement as a bias voltage ground for the variable capacitors. A tunable impedance surface comprises a RF ground plane; a plurality of patches or elements disposed in an array a distance from the ground plane; a capacitor arrangement for controllably varying capacitance between at least selected ones of adjacent patches or elements in the array; and a grounding mesh associated with the capacitor arrangement for providing a control voltage ground to capacitors in the capacitor arrangement, the grounding mesh being spaced from the RF ground plane by dielectric material.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application is related to the disclosure of U.S. patent application Ser. No. 10/537,923 filed Mar. 29, 2000 (now U.S. Pat. No. 6,538,621, issued Mar. 25, 2003) and of U.S. patent application Ser. No. 10/792,411 filed Mar. 2, 2004 (now U.S. Pat. No. 7,068,234, issued Jun. 27, 2006), the disclosures of which are hereby incorporated herein by reference. 
     TECHNICAL FIELD 
     This invention relates to an electrically tunable surface impedance structure with a suppressed backward wave. Surface impedance structures are a tunable electrically tunable surface impedance structure is taught by U.S. Pat. Nos. 6,538,621 and 7,068,234. This disclosure relates to a technique for reducing the propensity of the structures taught by U.S. Pat. Nos. 6,538,621 and 7,068,234 to generate a backward wave. 
     BACKGROUND 
       FIG. 1   a  depicts a conceptual view of a frequency selective surface  20  without varactor diodes (which varactor diodes or other variable capacitance devices can be used to realize an electrically steerable surface wave antenna—see  FIG. 2   a ). The surface  20  of  FIG. 1   a  comprises a plane of periodic metal patches  22  separated from a ground plane  26  by a dielectric layer  21  (not shown in  FIG. 1   b , but see, for example,  FIGS. 2   a  and  2   b ). An antenna (not shown) is typically mounted directly on the frequency selective surface  20 . See, e.g., U.S. Pat. No. 7,068,234 issued Jun. 27, 2006. The thickness of the dielectric layer  26  can be less than 0.1 of a wavelength of operational frequency of the non-shown antenna. This surface  20  supports a fundamental TM surface wave as shown in its dispersion diagram (frequency vs. propagation constant) of  FIG. 1   b . The surface impedance of any TM surface wave structure can be calculated by using:
 
 Z   TM   =jZ   o {(β/ k   o ) 2 −1}
 
     where Z o  is characteristic impedance of free space, k o  is the free space wavenumber and β is the propagation constant of the mode. 
       FIG. 1   a  depicts the basic structure that supports a fundamental TM surface wave mode. A dielectric substrate  21  (see  FIGS. 2   a  and  2   b , not shown in  FIG. 1   a  for ease of illustration) between the plane of metallic patches  22  and the ground plane  26  provides structural support and is also a parameter that determines the dispersion of the structure. This structure can be made using printed circuit board technology, with a 2-D array of metallic patches  26  formed on one major surface of the printed circuit board and a metallic ground plane  26  formed on an opposing major surface of the printed circuits board, with the dielectric of the printed circuit board providing structural support. The equivalent circuit model of the structure is superimposed over the physical elements of  FIG. 1   a : a series inductance (L R ) is due to current flow on the patch  22 , a shunt capacitance (C R ) is due to voltage potential from patch  22  to ground plane  26 , and a series capacitance (C L ) is due to fringing fields between the gaps between the patches  22 . The dispersion diagram of  FIG. 1   b  shows that a fundamental TM forward wave mode (since the slope is positive) is supported. 
     In order to control the dispersion and thus the surface impedance at a fixed frequency of the surface shown in  FIG. 1   a , the gap capacitance (between neighboring metal patches  22 ) can be electrically controlled by the use of varactor diodes  30 . The varactor diodes  30  are disposed in the gap between each patch  22  and are connected to neighboring patches  22  as shown in  FIG. 2   a . However, since a DC bias is required in order to control the capacitance of the varactor diodes  30 , the structure of  FIG. 1   a  has been modified to include not only varactor diodes  30  but also a biasing network supplying biasing voltages V 1 , V 2 , . . . V n .  FIG. 2   b  shows a cross-sectional view of the structure of  FIG. 2   a  with varactor diodes and the aforementioned biasing network; every other patch is connected directly to the ground plane  26  by conductive grounding vias  24  and the remaining patches are connected to the biasing voltage network by conductive bias vias  28 . See, for example, U.S. Pat. Nos. 6,538,621 and 7,068,234 for additional information. 
     However, the addition of the bias vias  28  penetrating the ground plane  26  at penetrations  32  introduces a shunt inductance to the equivalent circuit model superimposed in  FIG. 1   a .  FIG. 3   a  depicts a model similar to that of  FIG. 1   a , but showing the effect of introducing the bias network of  FIGS. 2   a  and  2   b  by a shunt inductance L L . As shown by  FIG. 3   b , TM backward wave is supported when a series capacitance and a shunt inductance are present, the latter of which is contributed by the bias via  28 . The backward wave decreases the frequency/impedance range of the surface wave structure since one can couple to only a forward wave or to a backward wave at a given frequency. 
     It would be desirable to allow for control of the dispersion and thus the surface impedance of the frequency selective surface of  FIG. 1   a  by using variable capacitors (such as, for example, varactor diodes) as taught by Sievenpiper (see, for example, U.S. Pat. No. 7,068,234) and in  FIGS. 2   a  and  2   b  hereof, but without the introduction of a backward wave. 
     BRIEF DESCRIPTION OF THE INVENTION 
     In one aspect the present invention provides a method of delaying the onset of a backward wave mode in a frequency selective surface having a two dimensional array of conductive patches and an RF ground plane, the two dimensional array of patches being interconnected by variable capacitors, the method including separating grounds associated with the variable capacitors from the RF ground plane and providing a separate conductive mesh structure as a control voltage ground for the variable capacitors. 
     In another aspect the present invention provides a tunable impedance surface having: (a) a RF ground plane; (b) a plurality of elements disposed in an array a distance from the ground plane; (c) a capacitor arrangement for controllably varying capacitance between at least selected ones of adjacent elements in said array; and (d) a grounding mesh associated with said capacitor arrangement for providing a control voltage ground to capacitors in said capacitor arrangement, the grounding mesh being spaced from the RF ground plane by a dielectric. 
     In yet another aspect the present invention provides a method of tuning a high impedance surface for reflecting a radio frequency signal comprising: arranging a plurality of generally spaced-apart conductive surfaces in an array disposed essentially parallel to and spaced from a conductive RF ground plane and varying the capacitance between at least selected ones of adjacent conductive surfaces in to thereby tune the impedance of said high impedance surface using control voltages, the control voltages being referenced to a control voltage ground supplied via a grounding mesh which is isolated from said RF ground plane by a layer of dielectric material. 
     In still yet another aspect the present invention provides a tunable impedance surface for reflecting a radio frequency beam, the tunable surface comprising: (a) a ground plane; (b) a plurality of elements disposed in an array a distance from the ground plane, the distance being less than a wavelength of the radio frequency beam; (c) a capacitor arrangement for controllably varying the impedance along said array; and (d) means for suppressing a formation of a backward wave by said tunable impedance surface. 
     In another aspect the present invention provides a tunable impedance surface comprising: (a) a ground plane; (b) a plurality of discreet elements disposed in a two-dimensional array a distance from the ground plane; and (c) a plurality of capacitors coupling neighboring ones of the elements in said two dimensional array for controllably varying capacitive coupling between the neighboring ones of said elements in said two-dimensional array while at the same time suppressing a formation of a backward wave by the tunable impedance surface. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1   a  depicts a perspective view of a prior art frequency selective surface consisting of a plane of periodic metal patches or elements separated from a ground plane by a dielectric layer; 
         FIG. 1   b  is a graph of frequency vs. propagation constant for the surface of  FIG. 1   a;    
         FIG. 2   a  is a top view of a prior art selective frequency surface with variable capacitors in the form of varactors, added to tunably control the impedance of the surface; 
         FIG. 2   b  is a side elevational view of the surface if  FIG. 2   a;    
         FIG. 3   a  depicts in a model similar to that of  FIG. 1   a , but showing the effect of introducing the bias network for controlling the varactors of  FIGS. 2   a  and  2   b;    
         FIG. 3   b  is a graph of frequency vs. propagation constant for the surface of  FIG. 3   a;    
         FIGS. 4   a  and  4   b  are plan and side elevational views of an embodiment of a frequency selective surface with variable capacitors to control surface impedance of the surface and a RF ground plane which is separated from a ground mesh used with the variable capacitors; 
         FIG. 5  is a graph of the numerical dispersion diagram of tunable surface wave impedance structure based on conventional biasing network as shown in  FIGS. 2   a  and  2   b.    
         FIG. 6  is a graph of the numerical dispersion diagram of tunable surface wave impedance structure based on biasing network as shown in  FIGS. 4   a  and  4   b . Surface wave impedance goes beyond j250 Ohm and is extended out to j310 Ohm and higher. Patch size and the dielectric layer between patch/RF ground are the same as used to generate  FIG. 5 . 
     
    
    
     DETAILED DESCRIPTION 
     This invention prevents a backward wave mode from occurring in a frequency selective surface while allowing for biasing of the varactor diodes used to control the dispersion and thus the surface impedance of the frequency selective surface at a fixed frequency. This improved frequency selective surface is realized by separating a RF ground plane from the bias network ground. 
       FIGS. 4   a  and  4   b  show that the RF ground plane  26  has been separated from an open mesh-like arrangement  25  of conductors connecting the bias grounding vias  24  to a common potential. Note that the ground plane  26  is located above the mesh-like arrangement  25  of conductors in  FIG. 4   b  so that from a radio frequency perspective, the ground plane  26  serves as a RF ground for the conductive patches or elements  22  without undue interference from their associated conductive control vias  24 ,  28  which penetrate the ground plane  26  at penetrations  32 . The conductive control vias  24  are connected to the common potential (bias voltage ground  27 ) associated with the biasing voltages V 1 , V 2 , . . . V n , via the conductive mesh  25  while conductive vias  28  are connected to the biasing voltages V 1 , V 2 , . . . V n  themselves. So the bias voltage ground  27  is separated from the RF ground  26 . 
     The substrate  21  is preferably formed as a multi-layer substrate with, for example, three layers  21 - 1 ,  21 - 2 , and  21 - 3  of dielectric material (as such, for example, a multi-layer printed circuit board). The conductive patches or elements  22  are preferably formed by metal patches or elements disposed on layer  21 - 1  of a multi-layer printed circuit board. 
     The bias ground network or mesh  25  preferably takes the form of a meshed structure, in which the connection lines  25  are disposed diagonally, in plan view, with respect to the conductive patches or elements  22  as shown in  FIG. 4   a . Relatively thin wires  25  are preferably used in the meshed bias network to provide a high impedance at RF frequencies of interest and are preferably printed between layers  21 - 2  and  21 - 3  of the multi-layer printed circuit board. Penetration  32  is designed to be small enough to provide a suitable RF ground at the RF frequencies of interest but large enough to avoid contacting conductive vias  24  and  28 —in other words, the penetrations  32  should appear as essentially a short circuit at the RF frequencies of interest and as essentially an open circuit at the switching frequencies of the bias voltages V 1 , V 2 , . . . V n . The RF return current follows the path of least impedance which, in the present invention, is provided by the RF ground plane  26  which is preferably formed as a layer of a conductor, such a copper, with openings  32  formed therein. When a surface wave is excited on the plane of the conductive patches or elements  22 , some of the energy is guided between the bias voltage ground mesh  25  and the RF ground plane  26 . Since the grounding vias  24  are not connected to the RF ground plane  26  (as done in the prior art), but rather to the bias ground network or mesh  25 , no shunt inductance is observed by the propagating wave. As a result, a backward wave mode cannot exist since a shunt inductance is no longer present. 
     The bias ground network  25  need not necessarily assume the meshed structure shown in  FIG. 4   a  as other arrangements of the wires making up the meshed structure will likely prove to be satisfactory in presenting a suitably high impedance at the RF frequencies of interest so that the RF frequencies of interest will not treat the bias ground network  25  as an RF ground. As the bias ground network  25  begins to appear more like an RF ground, the less effective the present invention is in suppressing the backward wave. So ideally the bias ground network  25  should have as high an impedance as possible at the RF frequencies of interest consistent with the need to provide a bias ground  27  for the bias voltages V 1 , V 2 , . . . V n  (which are at or near DC compared to the RF references of interest). The bias ground network  25  is depicted as being located below the RF ground plane  26  so that it is further from the array of conductive patches or elements  22  than is the RF ground plane  26 . This location is believed to be preferable compared to switching the positions RF ground plane  26  and the bias ground network  25 ; but if the bias ground network  25  has a suitably high impedance at the RF frequencies of interest, it may function suitably even if it is located closer to the array of conductive patches or elements  22  than is the RF ground plane  26 . Testing and/or simulation should be able to verify whether or not this is correct. 
     The term “wires” which make up the meshed structure of the bias ground network  25  is used without implication as to shape or material. While the wires are preferably provided by electrically conductive strips disposed on a printed circuit board, they might alternatively individual wires, they might be round or flat, coiled or straight and they might be formed by conductive regions on or in a semiconductor substrate. 
     The patch plane comprises a 2-D array of conductive patches or elements  22  of a type A cell (Cell A) and a type B cell (Cell B) forms; a type A cell is connected to the bias ground network  25  while a type B cell is connected to a separate bias voltage network of voltages V 1 , V 2 , . . . V n . Only two cells are marked with dashed lines designating the cell types for ease of illustration in  FIG. 4   b , but they preferably repeat in a checkerboard fashion. A cell includes its patch/element  22 , its associated portion of the RF ground plane  26 , and its associated control electrode or via (via  24  for a type A cell or via  28  for a type B cell). As can be seen from  FIGS. 4   a  and  4   b , generally speaking the immediate neighbors of a type A cell are four type B cells and the immediate neighbors of a type B cell are four type A cells. 
     While the 2-D array of conductive patches or elements  22  are depicted as patches or elements of a square configuration, it should be appreciated that the individual patches or elements need not be square or as other geometric configurations can be employed if desired. See, for example, U.S. Pat. No. 6,538,621, issued Mar. 25, 2003, which is incorporated by reference herein, for other geometric configurations. 
     Dielectric layer  21 - 1  separates the conductive patches or elements  22  from the RF ground plane  26  and preferably provides structural support for surface  20 . In addition, size and dielectric nature of the dielectric layer  21 - 1  is a parameter that dictates the RF properties of the structure  20 . RF ground plane  26  provides a return path for the RF current; holes  32  are introduced in the RF ground plane  26  to allow the via  24  of Cell A type cells to connect to the meshed DC ground plane  25  and to allow the via  28  Cell B type cells to connect to the bias voltage network. 
     Dielectric layer  21 - 2  preferably acts a support structure for the bias ground network or mesh  25  and the bias voltage network. An optional dielectric layer  21 - 3  can be added beneath dielectric layer  21 - 1  and mesh  25  to provide additional power and/or signal connections for vias  28 . Dielectric layers  21 - 1 ,  21 - 2  and  21 - 3  can each consist of multiple dielectric substrates sandwiched together, if desired. 
     The mesh DC ground plane  25  preferably comprises diagonal cross connections which are made up of thin metal traces for presenting high impedance from a RF standpoint. The via  24  of Cell A connects directly to the mesh DC ground plane  25 . The ground plane  25  can likely take other forms than a mesh like structure, but the mesh structure shown in  FIG. 4   a  is believed to yield a structure which is easy to manufacture and which will present a high impedance to the surface at RF frequencies of interest. The bias voltage network  25  connects to the conductive vias  28  of Cells B. 
     Numerical simulations were performed on a surface wave structure with a prior art biasing scheme as illustrated in  FIGS. 2   a  and  2   b  and with the biasing scheme described herein and depicted in  FIGS. 4   a  and  4   b . Dispersion diagrams were obtained and are shown in  FIG. 5  for the case of  FIGS. 2 and 2   b  and in  FIG. 6  for the case of  FIGS. 4   a  and  4   b . The conductive patch/element  22  and dielectric layer  21 - 1  details were the same for both cases. 
       FIG. 5  is a graph of the numerical dispersion diagram of tunable surface wave impedance structure based on conventional biasing network as shown in  FIGS. 2   a  and  2   b .  FIG. 5  shows that by changing the varactor diode&#39;s capacitance (a range of 0.1 pF to 0.2 pF is shown), the surface impedance can be varied at fixed frequencies. However, the surface impedance range is limited to j250 Ohms after which a backward wave mode appears, which the source propagating wave cannot couple to. So after j250 Ohms, the mode appears to be cut-off due to the onset of backward wave propagation. 
       FIG. 6  is a graph of the numerical dispersion diagram of tunable surface wave impedance structure based on biasing network as shown in  FIGS. 4   a  and  4   b . Surface wave impedance goes beyond j250Ω and is extended out to j310Ω and higher. Patch size and the dielectric layer between patches  22  and the RF ground  26  are the same as used to generate  FIG. 5 . In the case of the present invention, surface impedance tuning is also possible by changing the varactor diode&#39;s capacitance (a range of 0.1 pF to 0.3 pF is shown in  FIG. 6 ) and the surface impedance range is increased; the surface impedance range is extended to j310Ω and above. 
     MEMS capacitors and optically controlled varactors may be used in lieu of the voltage controlled capacitors (varactors) discussed above. If such optically controlled varactors need to be supplied with a bias voltage, then the conductive vias  24  and  28  discussed above are still needed, but a common bias voltage may be substituted for the bias voltages V 1 , V 2 , . . . Vn discussed above as the optically controlled varactors would be controlled, in terms of varying their capacitance, by optical fibers preferably routed through penetrations in substrate  21  located, for example, directly under the varactors  30  shown in  FIG. 4   a.    
     It should be understood that the above-described embodiments are merely some possible examples of implementations of the presently disclosed technology, set forth for a clearer understanding of the principles of this disclosure. Many variations and modifications may be made to the above-described embodiments of the invention without departing substantially from the principles of the invention. All such modifications and variations are intended to be included herein within the scope of this disclosure and the present invention and protected by the following claims.