Abstract:
The present invention relates to a method for controlling an image display device and an image display device implementing this method. The invention relates more specifically to a display device having a matrix of cells, a column driver circuit and a column amplifier with resonant circuitry to recover energy. The invention proposes to optimize the method for controlling the column amplifier to reduce to zero the energy losses during the switching actions of the switches of the column driver circuit. To this end, the invention proposes to position the start of the period of oscillation of the resonant circuit in a manner dependent on the capacitance of the columns of cells connected to the resonant circuit via the column driver circuit such that the switching actions of the switches of the column driver circuit always take place when the voltage delivered by the column amplifier is zero.

Description:
FIELD OF THE INVENTION  
       [0001]     The present invention relates to a method for controlling an image display device and an image display device implementing this method.  
         [0002]     More specifically, the invention can be applied to display devices having a matrix of cells arranged in rows and columns, the cells of which may or may not be activated by a write voltage, a row driver circuit to sequentially select the rows of cells, a column driver circuit having a plurality of switches to apply via said switches a write signal to the columns of cells to be activated for the selected row and a resonant circuit to generate said write signal, said write signal having a first oscillation phase in which it swings from a write voltage to zero voltage, said resonant circuit having an inductance resonating with the capacitance of the columns of cells to be activated for the selected row during said first oscillation phase and at least one switch for triggering said oscillation.  
       BACKGROUND OF THE INVENTION  
       [0003]     The invention can in particular be applied to plasma display devices and will be described in the case of such devices.  
         [0004]     During the phase for addressing cells of the matrix of cells of a plasma panel, the switches of the column driver circuit are controlled to apply either a write voltage or a zero voltage to the cells depending on the video data to be displayed. In practice, the write voltage, from now on denoted V w , is in the order of 60 volts and the total capacitance C of the columns of cells to be controlled may reach 100 nF when all the columns of cells are selected.  
         [0005]     Without a capacitive energy recovery device, the consumption losses during the switching actions of the switches of the column driver circuit can reach several tens of watts. In practice, these losses are equal to: 
 
C col ·V col   2 ·F 
 
 where: C col  is the capacitance of the columns of cells selected by the column driver circuit; 
        V col  is the voltage present on the columns selected at the moment when the switches of the column driver circuit are about to change state; and     F is the switching frequency.        
 
         [0008]     As well as this undesirable consumption, the switches of the column driver circuit must be overdimensioned to dissipate this energy.  
         [0009]     Energy recovery devices commonly known as column amplifiers have therefore been developed to minimize these losses. The principle behind these devices is to cause the capacitance of the columns of cells to oscillate with an inductance to change the voltage applied to the columns from the write voltage V w  to 0 volts and vice versa. A typical column amplifier, referenced  10 , is represented in  FIG. 1 . It is connected, via a column driver circuit D, to the columns of cells selected by the latter and which are represented in the figure by their capacitances. It includes two switches S 1  and S 2 , an inductive element L, two voltage sources G 1  and G 2  and three diodes D 1 , D 2  and D 3 . Inductive element L is intended to form a resonant circuit with the capacitances of the columns of cells selected by the column driver circuit when switch S 1  is closed. Signal V col  delivered by the column amplifier has a shape as represented in  FIG. 2 . The write voltage V w  is equal to the sum of voltages V 1  and V 2  delivered by sources G 1  and G 2 . The swing V w →0 is triggered by opening switch S 2 . The operation of this amplifier will be described in more detail later.  
         [0010]     Currently, the switching action instants of the column driver circuit switches and the opening instant of switch S 2  are synchronized on a predetermined clock signal H. Switch S 2  is for example opened at each pulse start of signal H and the switches of the column driver circuit are actioned with a fixed delay T c  with respect to these pulses. This case is illustrated in  FIG. 3  representing signal V col  delivered by the column amplifier for two different column capacitance values. From now on in the description, the term “column capacitance” refers to the capacitance of the columns selected by the column driver circuit and is denoted C col . With reference to  FIG. 3 , a first curve, in solid line, represents signal V col  delivered by the column amplifier between two consecutive switching action instants t 0  and t 1  of the column driver circuit for a first column capacitance value C 1 . A second curve, in dotted line, represents the same signal for a lower column capacitance value C 2 . Switch S 2  is opened at an instant t′ 0  placed between switching action instants t 0  and t 1 . This instant corresponds to a rising edge of clock signal H. The swing V w →0 therefore starts at instant t 0 ′ and is synchronous with the pulse start of clock signal H. Switching action instant t 1  is chosen to be equal to t′ 0 +T c . Thus, the switches of column driver circuit D are always actioned with a delay T c  with respect to the start of the swing V w →0. Since delay T c  is fixed, it is independent of the capacitance of the switched columns. The switching action of the switches of column driver circuit D therefore mostly occurs when voltage V col  is not zero, in which case the switching losses are equal to  
         1   2     ⁢       C   col     ·     V   col   2     ·     F   .           
 
 This is the situation in  FIG. 3  when the column capacitance is equal to C 2  (dotted line curve). In fact, the losses are zero only for one particular column capacitance value which is, in the example of  FIG. 3 , the value C 1  (solid line curve in  FIG. 3 ). This particular value corresponds in general to the capacitance C tot  representing the capacitance of all the columns of the panel. In this case, the length of delay T c  is therefore taken to be equal to the half-period of oscillation of the resonant circuit, i.e. T c =π√{square root over (L·C tot )}(=π√{square root over (L·C 1 )} in  FIG. 3 ) where L denotes the inductance of inductive element L. 
 
       SUMMARY OF THE INVENTION  
       [0011]     According to the invention, the aim is to reduce to zero the switching action losses in the circuit regardless of the capacitance of the switched columns.  
         [0012]     To this end, provision is made to control the start of the period of oscillation (V w →0) according to the capacitance of the columns of cells being activated such that the switches of the column driver circuit are actioned at the end of said first oscillation phase.  
         [0013]     Furthermore, the invention relates to a control method in an image display device including: 
        a matrix of cells arranged in rows and columns, which cells may or may not be activated by a write voltage,     a row driver circuit to sequentially select the rows of cells,     a column driver circuit, having a plurality of switches, to apply via said switches a write signal to the columns of cells to be activated for the selected row,     a resonant circuit to generate said write signal, said write signal having a first oscillation phase in which it swings from a write voltage to zero voltage, said resonant circuit having an inductive element resonating during said first oscillation phase with the capacitance of the columns of cells being activated for the selected row,     in which the start of the first oscillation phase is determined as a function of the capacitance of the columns of cells being activated and in which the switches of the column driver circuit are controlled to change state at the end of said first oscillation phase,     wherein the start of the first oscillation phase is determined from the duration of a prior oscillation phase, called the second oscillation phase, during which the write signal swings from zero voltage to the write voltage for the same number of cells being activated in the selected row.        
 
         [0020]     The switches of the column driver circuit are thus actioned when the voltage supplied by the column amplifier is zero. The switching action losses (C col ·V col   2 ·F) are therefore zero.  
         [0021]     According to a particular embodiment, the change of state of the switches of the column driver circuit is offset by a fixed delay with respect to the pulses of a clock signal and the change of state of the switch of the resonant circuit is offset by a variable delay with respect to the pulses of the clock signal. This variable delay is a function of the capacitance of the columns having cells being activated in the selected row.  
         [0022]     This variable delay may be calculated by: 
        measuring the duration of the second oscillation phase, and     deriving the length of the variable delay which is equal to the time difference between the duration of the second oscillation phase and the length of the fixed delay.        
 
         [0025]     The invention also relates to an image display device including: 
        a matrix of cells arranged in rows and columns, which cells may or may not be activated by a write voltage,     a row driver circuit to sequentially select the rows of cells,     a column driver circuit, having a plurality of switches, to apply via said switches a write signal to the columns of cells to be activated for the selected row,     a resonant circuit to generate said write signal, said write signal having a first part in which it swings from a write voltage to zero voltage, said resonant circuit having an inductive element resonating with the capacitance of the columns of cells being activated for the selected row during said first oscillation part and at least one switch to trigger said oscillation,     a control circuit for controlling said switches of said column driver circuit and said at least one switch of said resonant circuit, which control circuit drives said at least one switch of the resonant circuit according to the capacitance of the columns having cells being activated in the selected row and the switches of the column driver circuit such that they change state at the end of said first oscillation part,     wherein the control circuit determines the start of the first oscillation phase from the duration of a prior oscillation phase, called the second oscillation phase, during which the write signal swings from zero voltage to the write voltage for the same number of cells being activated in the selected row.        
 
         [0032]     The control circuit includes for example: 
        first means for triggering the switching actions of the switches of the column driver circuit with a fixed delay with respect to the pulses of a clock signal, and     second means for triggering the change of state of said at least one switch of the resonant circuit with a variable delay with respect to the pulses of said clock signal H, which variable delay is a function of the capacitance of the columns having cells being activated in the selected row.        
 
         [0035]     The second means include: 
        means for measuring the duration of the second oscillation phase, said second oscillation phase having the same duration as said first oscillation phase, and     means for determining the length of the variable delay which corresponds to the difference between the duration of the second oscillation phase and the length of the fixed delay.        
 
         [0038]     According to a particular embodiment, the control circuit includes: 
        a capacitive element,     a current generator intended to supply current to said capacitive element,     a first detection circuit to detect the direction of the current flowing in the inductive element of the resonant circuit, trigger the switching actions of the switches of the column driver circuit when said current changes direction, changing from a “positive” direction to a “negative” direction, and trigger operation of the current generator when the direction of the current flowing in the inductive element is positive, said capacitive element attaining a first charge value at the end of this first operating period,     a circuit to trigger operation of the current generator during a second operating period such that the voltage across the terminals of said capacitive element attains a threshold value, the duration of said second operating period being equal to the variable delay, and     a second detection circuit to detect the voltage across the terminals of said capacitive element and control the change of state of said at least one switch of the resonant circuit when the voltage across the terminals of said capacitive element reaches said threshold value.       
 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0044]     The invention will be better understood on reading the description that follows, given by way of non-limiting example and with reference to the accompanying drawings in which:  
         [0045]      FIG. 1  represents a two-switch column amplifier connected to the columns of cells in a display panel via a column driver circuit;  
         [0046]      FIG. 2  shows the voltage signal produced by the column amplifier of  FIG. 1 ;  
         [0047]      FIG. 3  shows the shape of the voltage signal produced by the column amplifier when the capacitance of the columns of switched cells varies;  
         [0048]      FIG. 4  shows the various operating phases of the column amplifier to produce the signal of  FIG. 2  and the current flowing in the inductive element of the column amplifier during said phases;  
         [0049]      FIG. 5 , to be compared with  FIG. 4 , illustrates the principle of the invention;  
         [0050]      FIG. 6  represents a device to implement the control method of the invention;  
         [0051]      FIG. 7  shows timing diagrams illustrating the states of the various components of the device of  FIG. 6  during operation of the device; and  
         [0052]      FIG. 8  shows timing diagrams illustrating operation of the device of  FIG. 6  for two consecutive column capacitance values. 
     
    
     DESCRIPTION OF PREFERRED EMBODIMENTS  
       [0053]     The invention can be applied to any type of display device having a cell-based display matrix, a row driver circuit to sequentially select the rows of cells of the matrix, a column driver circuit to apply a write signal to the columns of cells to be activated for the selected row, and a column amplifier forming a resonant circuit with the columns of cells to be activated for the selected row.  
         [0054]     The invention will be described with reference to a column amplifier with two switches as illustrated in  FIGS. 1 and 2 . Of course, the invention can be applied to other types of column amplifier, in particular that of Weber disclosed in US patent U.S. Pat. No. 4,866,349.  
         [0055]     The invention involves controlling the start of oscillations in the column amplifier such that the switching actions of the switches in the column driver circuit always take place when voltage V col  is zero.  
         [0056]     Before describing the control method of the invention in detail, it is appropriate to describe in detail the operation of the column amplifier of  FIG. 1 . This amplifier, referenced  10 , is connected, via a column driver circuit D, to the columns of cells to be activated on the display panel.  
         [0057]     Amplifier  10  has an inductive element L to store magnetic energy and to discharge it in the capacitances of the columns of cells to be activated on the panel. Inductive element L is connected, via a first terminal B 1 , to column driver circuit D. The second terminal B 2  of inductive element L is connected, via a switch S 1 , to the positive terminal of a voltage source G 2  capable of delivering a DC voltage V 2 . The negative terminal of source G 2  is connected to ground. In addition, a diode D 2  is inserted between terminal B 1  of the inductive element and ground, with the cathode connected to terminal B 1  of the inductive element. A voltage source G 1 , capable of delivering a DC voltage V 1 , is also connected to the terminals of the inductive element via a switch S 2 . The negative terminal of source G 1  is connected to terminal B 2  of the inductive element and its positive terminal is connected to switch S 2 . A diode D 1  may be placed in parallel with switch S 2 , with the cathode connected to the positive terminal of voltage source G 1 . In general, this diode corresponds to the diode of the MOS transistor used as switch S 2 .  
         [0058]     Likewise, a diode D 3  may be placed in parallel with switch S 1 , with the cathode connected to the positive terminal of voltage source G 2 ; this diode corresponds to the diode of the MOS transistor used as switch S 1 .  
         [0059]     The voltages V 1  and V 2  are defined such that V 1 +V 2 =V w .  
         [0060]     The voltage signal V col  at point B 1  of the amplifier and represented in  FIG. 2  is arrived at through a sequence of operating phases. These various phases are shown in  FIG. 4 .  
         [0061]     During a first phase, P 1 , switches S 1  and S 2  are in the closed state. A current I L  flows through the circuit formed by voltage source G 1 , inductive element L and switches S 1  and S 2 . Current I L  is positive during this phase. Voltage V 1 +V 2 =V w  is applied across terminals of the display panel columns selected by driver circuit D.  
         [0062]     During the next phase, P 2 , switch S 1  is held in the closed state and switch S 2  is opened. Some of the energy stored in inductive element L is discharged in the columns selected by the column driver circuit until the voltage across the terminals of the columns is zero. Going into more detail, at the start of this phase, inductive element L continues to receive energy, this time no longer from voltage source G 1 , but from the column capacitances of the panel. The current therefore continues to increase a little and then decreases. The swing from V w  and 0 volts takes place during this phase.  
         [0063]     During the next phase, P 3 , a zero voltage is held across the terminals of the columns of the panel until the current I L  through the inductive element becomes zero. During this phase, the states of switches S 1  and S 2  remain unchanged. The remainder of the current stored in inductive element L is absorbed by voltage source G 2  via diode D 2 . The duration of this phase is reduced to the minimum possible in order to improve the efficiency of the amplifier. In  FIGS. 5, 7  and  8  that follow, this phase will be considered as having an effectively zero-length duration.  
         [0064]     During the next phase, P 4 , the capacitive energy stored in the columns of the cells to be activated on the panel is returned to inductive element L. Current I L  then changes direction. The voltage across the terminals of the columns of the panel rises again until the amplitude V w =V 1 +V 2  is reached. During this phase, the states of switches S 1  and S 2  remain unchanged from the previous phase. Phases P 2  and P 4  are of approximately equal duration.  
         [0065]     When the voltage across the terminals of the columns of cells to be activated reaches the amplitude V 1 +V 2 , a write current is produced in said cells to activate them. This is the start of phase P 5 . Switches S 1  and S 2  may equally be open or closed during this phase. If switch S 1  is open, the write current of the cells flows through the circuit formed by the cell, driver circuit D, inductive element L, diode D 3  and voltage source G 2 . Otherwise, the current flows through switch S 1  instead of diode D 3 .  
         [0066]     At the end of phase P 5 , switch S 2  is closed and switch S 1  is opened in view of the next phase.  
         [0067]     The next phase, P 6 , is an inactive phase. No current flows. The voltage across the terminals of the panel&#39;s columns comprising activated cells is held at V 1 +V 2 . The aim of this final phase is to improve the efficiency of the device since the conduction losses at this time are zero.  
         [0068]     The method of the invention will be described with reference to  FIG. 5  in comparison with  FIG. 4  which represents the prior art. As in  FIG. 4 , the solid line curve represents signal V col  delivered by the column amplifier for a column capacitance value C 1  between consecutive switching action instants t 0  and t 1 . The dotted line curve represents the same signal for a lower column capacitance value C 2 .  
         [0069]     The switching actions of the switches of the column driver circuit are synchronized on clock signal H as in  FIG. 4 . They are switched with a delay T c  with respect to the pulses of clock signal H. However, the resonance in the resonant circuit is triggered with a variable delay T v  with respect to the same pulses of signal H. This variable delay is defined such that voltage V col  is zero at the moment when the switches of the column driver circuit are actioned. In  FIG. 5 , this variable delay is denoted T v1  for the solid line curve and T v2  for the dotted line curve.  
         [0070]     The value of the variable delay to be applied is a function of the capacitive charge of the switched columns. In fact, this variable delay is obtained by subtracting from T c  the time T d  that the resonant circuit takes to change from V w  to 0. Now, this time T d  can be determined beforehand since it is equal to the time T m  that the resonant circuit takes to change from 0 to V w  for the same capacitive charge. The time T m  can be measured just after the previous switching action. In the case of the solid line curve (column capacitance equal to C 1 ), the time T d1  to change from V w  to 0 can be determined by measuring the time T m1 . Likewise, for the dotted line curve (column capacitance equal to C 2 ), the time T d2  can be determined by measuring the time T m2 .  
         [0071]     A device  20  implementing the method is proposed with reference to  FIG. 6 . This device is placed between the output of column amplifier  10  and column driver circuit D.  
         [0072]     This device includes a circuit 21 for detecting the direction of current I L  flowing in inductive element L of amplifier  10 . This circuit delivers an output signal S IL  that is non-zero (equal to 1) when current I L  flowing from inductive element L to the columns of cells (positive current I L  in  FIG. 4 ) is positive and an output signal that is zero when current I L  flows in the other direction. This output signal is used by column driver circuit D for triggering the switching actions of its switches. Signal S IL  is also used to control a current generator intended to supply a capacitive element C r .  
         [0073]     The current generator is made up of three resistive elements R 1 , R 2 , R 3 , a transistor T and two switches S 3  and S 4 . The resistive elements are placed in series between a power supply terminal V cc  receiving a power supply voltage and, via switches S 3  and S 4 , ground. More specifically, switches S 3  and S 4  are placed in parallel between the terminal of resistor R 2  not connected to resistor R 1  and ground. Switch S 3  is controlled by signal S IL  and switch S 4  is controlled by a signal H′. Moreover, the mid-point between resistive elements R 1  and R 2  is connected to the base of bipolar transistor T. Resistive element R 3  is connected between power supply terminal V cc  and the emitter of transistor T. Lastly, the collector of transistor T is connected to a terminal of capacitive element C r . The other terminal of the latter is connected to ground. When either of switches S 3  and S 4  is closed, this generator supplies current to capacitive element C r . The intensity of current I cr  supplied by the current generator is fixed by the resistance of resistive elements R 1 , R 2 , R 3  and the value of the power supply voltage.  
         [0074]     A device made up of a thyristor Th, a zener diode D z  and a resistive element R 4  is responsible for delivering a short voltage pulse each time the voltage across the terminals of capacitive element C r  reaches voltage V trig . Voltage V trig  is the threshold voltage of diode D 2 . The voltage signal, denoted V d , delivered by this circuit is used to control the opening of switch S 2  of the column amplifier. The anode of thyristor Th and the cathode of zener diode D z  are connected to the collector of transistor T and the cathode of the thyristor is connected to ground via resistive element R 4 . Lastly, the cathode of diode D z  is connected to the gate of the thyristor and signal V d  corresponds to the signal delivered by the cathode of the thyristor.  
         [0075]     Finally, a clock circuit  22  is responsible for delivering clock signal H. This signal is supplied to an SR (Set Reset) flip-flop  23  which also receives signal V d . The flip-flop switches to 1 on the front edge of clock signal H, and falls back to 0 on the pulses of signal V d . The output of flip-flop  23  is control signal H′ for switch S 4 .  
         [0076]     Referring to the timing diagrams of  FIG. 7 , the control circuit  20  operates as follows. At instant 0, clock signals H and H′ are at 1. Switch S 4  is therefore closed and capacitive element C r  charges up by the current supplied by transistor T. When voltage V cr , across the terminals of capacitive element C r , reaches the value V trig , thyristor Th is triggered. A short voltage pulse appears in control signal V d , which pulse triggers the opening of switch S 2  of the column amplifier. Inductive element L of the column amplifier then begins to resonate with the capacitance of the columns selected by driver circuit D. A negative current I L  (flowing from the columns of cells to inductive element L) then flows through inductive element L. The pulse on signal V d  also triggers a falling edge in signal H′, which in turn causes switch S 4  to open. Capacitive element C r  discharges, through thyristor Th, to ground. When capacitive element C r  is completely discharged, thyristor Th is deactivated.  
         [0077]     When current I L  becomes zero, circuit  21  detects a change of direction of current I L , and signal S IL  changes to 1 which in turn triggers the closure of switch S 3  and the switching actions of the switches of column driver circuit D. Capacitive element C r  starts charging up with the current supplied by transistor T. An oscillation causing voltage V col  to change from 0 to V w  also starts. When voltage V col  reaches voltage V w , current I L  becomes zero and circuit  21  then detects a change of direction of the current; signal S IL  becomes zero. Switch S 3  opens and the charging of capacitive element C r  is interrupted. The charge of capacitive element C r  is hence representative of the time T m  for voltage V col  to change from 0 to V w  with the present column capacitance. The charge of capacitive element C r  is held at this value until the next rising edge of clock signal H. The element C r  then resumes its charging to reach V trig . When the charge voltage of element C r  reaches V trig , switch S 4  opens and the cycle repeats as described above.  
         [0078]     With this device, variable time T v  is defined as the additional time required such that the voltage across the terminals of capacitive element C r  reaches V trig  after having previously been charged during the swing 0→V w  of signal V col . The value V trig  is defined as follows: 
 
 V   Cr   =K.t→V   trig   =K .( T   v   +T   d )= K .( T   v   +T   m ) 
 
Given that  T   c   =T   v   +T   d  
 
→V trig =K.T c  
 
         [0079]     In order that device  20  operates correctly, it must be ensured that  
         T   c     &gt;       1   2     ⁢   π   ⁢       L   ·     C   tot               
 
 where C tot  represents the capacitance of all the columns of cells that can be selected by driver circuit D. 
 
         [0080]     Delay T c  is independent of the capacitance of the columns selected by driver circuit D, and depends on V trig , the capacitance of element C r  and current I cr , the latter two parameters fixing K. Although these parameters are constant, they may exhibit some drift according to their tolerances. It may therefore be beneficial to provide an additional device to control the oscillation phase of the resonant circuit on the clock signal. This control (not represented in the diagram of  FIG. 6 ) is implemented by comparing the phase of the column voltage with the phase of the clock signal. The phase difference modifies charge current I cr . Furthermore, since  
         Tc   =         C   r     ·     V   trig         I   cr         ,       
 
 the phase of the column voltage is controlled by the clock signal. 
 
         [0081]      FIG. 8  summarizes the operation of the device of  FIG. 6  for two different column capacitance values. The capacitance of the columns selected by driver circuit D is taken to be equal to C 1  between switching action instants t 0  and t 1 and equal to C 2  between switching action instants t 1  and t 2 , where C 1  is a higher capacitance than C 2 .  FIG. 8  shows the waveforms of signals V col , V cr  and H between switching action instants to and t 2 . Times T m1  and T d1  are longer than T m2  and T d2  because C 1  is a higher capacitance than C 2 . Conversely, time T v2  is longer than time T v1  since T c =T d1 +T v1 =T d2 +T v2 . During the rise time of voltage V col  the current generator charges capacitive element C r  by supplying current. The charging continues after the rising edge of signal H until voltage V cr  reaches voltage V trig . Switch S 2  is then opened and voltage V col  then changes from V w  to 0.  
         [0082]     This dynamic control of switch S 2  of the column amplifier results in a significant improvement in the efficiency of the display panel. Of course, the control method of the invention can be applied to other column amplifier structures. It can very easily be implemented in plasma display panels having a column amplifier.