Abstract:
The present invention provides a highly efficient power supply with redundant multiple input voltage sources. The power supply uses switching transistors, specifically MOSFET&#39;s, to create paths for current from one of the voltage sources to the load. The switching transistors are switched either “on” or “off” by comparators which compare the output from the voltage sources. These comparators allow the highest voltage source to provide power to the load, and keep the other switching transistors “off” that connect the common load to other voltage sources. Because the switching transistors have lower conduction losses than diodes in conventional power supplies, the power supply in accordance with the present invention is more efficient.

Description:
FIELD OF THE INVENTION 
     The present invention relates to power supplies, and more particularly to power supplies with multiple input voltage sources. 
     BACKGROUND OF THE INVENTION 
     The use of power supplies with multiple input voltage sources, in industries such as the telecommunications industry, is well known in the art. Power supplies with multiple input voltage sources provide redundancy in the system to ensure that power continues to be provided to the system, even when one of the voltage sources fail. 
     FIG. 1 illustrates a conventional multiple input voltage sources power supply circuit. The circuit  100  comprises a first voltage source  102  coupled in series to a first diode  106 , a second voltage source  104  coupled in series to a second diode  108 . The cathodes of the diodes  106  and  108  are coupled directly to the voltage sources  102  and  104 , respectively, and the anodes of the diodes  106  and  108  are connected to the load  110 , which is generally a DC-DC regulator. 
     When the first voltage source  102  is “on”, i.e., supplying a voltage, such as −48V, and the second voltage source  104  is “off”, i.e., either supplying less than −48V or not connected, then −48V is supplied to the load  110  by the first voltage source  102  because the second diode  108  is back biased. The second diode  108  prevents current from back flowing to the second voltage source  104 , and thus prevents the second voltage source  104  from becoming a sink and overheating the power supply. 
     When the first voltage source  102  is “off”, i.e., either supplying a voltage less than −48V or not connected, and the second voltage source  104  is “on”, i.e., supplying −48V, then −48V is supplied to the load  110  by the second voltage source  104 . The first diode  106  prevents current from back flowing to the first voltage source  102  because the first diode  106  is back biased, and thus preventing the first voltage source  102  from becoming a sink. Other voltage sources may be coupled to the load  110  and function in the same manner. 
     However, the loss of power in each diode  106  and  108  is significant for high powered loads. For example, for voltage sources which supply −48V, the loss per diode  106  or  108  could be as high as 10W for a 1 kW load. The conventional multiple input voltage sources power supply is thus inefficient. 
     Accordingly, there exists a need for a high efficiency multiple input voltage sources power supply. The power supply should provide higher efficiency than a conventional power supply and at the same time, provide a means for preventing current flow among different voltage sources connected to a common load. The present invention addresses such a need. 
     SUMMARY OF THE INVENTION 
     The present invention provides a highly efficient power supply with redundant multiple input voltage sources. The power supply uses switching transistors, specifically MOSFET&#39;s, to create paths for current from one of the voltage sources to the load. The switching transistors are switched either “on” or “off” by comparators which compare the output from the voltage sources. These comparators allow the highest voltage source to provide power to the load, and keep the other switching transistors “off” that connect the common load to other voltage sources. Because the switching transistors have lower conduction losses than diodes in conventional power supplies, the power supply in accordance with the present invention is more efficient. 
    
    
     BRIEF DESCRIPTION OF THE FIGURES 
     FIG. 1 illustrates a conventional multiple input voltage sources power supply circuit. 
     FIG. 2 illustrates a preferred embodiment of a multiple input voltage sources power supply in accordance with the present invention. 
    
    
     DETAILED DESCRIPTION 
     The present invention provides a high efficiency multiple input voltage sources power supply. The following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements. Various modifications to the preferred embodiment will be readily apparent to those skilled in the art and the generic principles herein may be applied to other embodiments. Thus, the present invention is not intended to be limited to the embodiment shown but is to be accorded the widest scope consistent with the principles and features described herein. 
     The power supply in accordance with the present invention comprises redundant multiple input voltage sources which are highly efficient in supplying power to a load. The power supply uses switching transistors to create paths for current from one of the voltage sources to the load. The transistors are switched either “on” or “off” by comparators which compare the output from the voltage sources. 
     To more particularly describe the features of the present invention, please refer to FIG. 2 in conjunction with the discussion below. 
     FIG. 2 illustrates a preferred embodiment of a multiple input voltage sources power supply in accordance with the present invention. The power supply  200  comprises a first circuit  202  for providing voltage from a first voltage source  254  to a load  260 , and a second circuit  204  for providing voltage from a second voltage source  256  to the load  260 . The returns of the first  254  and second  256  voltage sources are coupled. 
     The first circuit  202  comprises a resistor  206  (R 9 ) coupled to a resistor  208  (Rio). R 9   206  is coupled to the input of the first voltage source  254  and to R 10   208 . R 10   208  is coupled to R 9   206  and to a return of the first voltage source  254 . Coupled to the common node of R 9   206  and R 10   208  is a non-inverting pin  212  of a first comparator  210  and an inverting pin  236  of a second comparator  234  of the second circuit  204 . The first comparator  210  is powered by voltage source of −Vcc. A resister  217  (R 3 ) is coupled to the −Vcc source and the output pin of the first comparator  210 . The output pin  216  of the first comparator  210  is coupled to a gate of a first transistor  218  (Q 3 ). A resistor  220  (R 6 ) is coupled to the gate of Q 3   218  and the return of the first voltage source  254 . The source of Q 3   218  is coupled to the return of the first voltage source  254 . The drain of Q 3   218  is coupled to a resister  222  (R 4 ). R 4   222  is coupled to another resister  224  (R) and to a gate of a second transistor  226  (Q 1 ). In the preferred embodiment, Q 1   226  and Q 3   218  are switching transistors composed of Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). The diode  228  (D 1 ) represents an internal diode for Q 1   226 . The anode side of D 1   228  is coupled to the source of Q 1   226  and the cathode side of D 1   228  is coupled to the drain of Q 1   226 . The drain of Q 1   226  is also coupled to the input of the first voltage source  254 . RI  224  is also coupled to the source of Q 1   226 , an anode side of a diode  228  (D 1 ), and the output  258  to the load  260 . 
     The second circuit  204  comprises a resister  230  (R 11 ) coupled to a resistor  232  (R 12 ). R 11   230  is coupled to the input of the second voltage source  256  and to R 12   232 . R 12   232  is coupled to R 11   230  and to a return of the second voltage source  256 . Coupled to the common node of R 11   230  and R 12   232  is a non-inverting pin  238  of the second comparator  234 . The non-inverting pin  238  of the second comparator  234  is also coupled to an inverting pin  214  of the first comparator  210  of the first circuit  202 . The inverting pin  236  of the second comparator  234  is coupled to the non-inverting pin  212  of the first comparator  210 . The second comparator  234  is powered by a voltage source of −Vcc. A resister  241  (R 8 ) is coupled to the −Vcc source and the output pin  240  of the second comparator  234 . The output pin  240  of the second comparator  234  is coupled to a gate of a third transistor  242  (Q 4 ). A resister  244  (R 7 ) is coupled to the gate of Q 43   242  and a return of the second voltage source  256 . The source of Q 4   242  is coupled to the return of the second voltage source  256 . The drain of Q 4   242  is coupled to a resister  246  (R 5 ). R 5   246  is coupled to another resister  248  (R 2 ) and to a gate of a fourth transistor  250  (Q 2 ). In the preferred embodiment, Q 2   250  and Q 4   242  are switching transistors comp 0 sed of MOSFETs. The diode  252  (D 2 ) represents an internal diode for Q 2   250 . The anode side of D 2   252  is coupled to the source of Q 2   250  and the cathode side of D 2   252  is coupled to the drain of Q 2   250 . The drain of Q 2   250  is also coupled to the input of the second voltage source  256 . R 2   248  is also coupled to the source of Q 2   250 , an anode side of a diode  252  (D 2 ), and the output  258  to the load  260 . 
     R 9   206  and R 10   208  of the first circuit  202  sense the voltage from the first voltage source  254 . R 11   230  and R 12   232  of the second circuit  204  sense the voltage from the second voltage source  256 . The sensed voltage of the first voltage source  254  is provided to the non-inverting pin  212  of the first comparator  210  and the inverting pin  236  of the second comparator  234 . The sensed voltage of the second voltage source  256  is provided to the inverting pin  214  of the first comparator  210  and the non-inverting pin  238  of the second comparator  234 . 
     Assume that a first voltage from the first voltage source  254  is approximately −48V and a second voltage from the second voltage source  256  is approximately 0V, i.e., the first voltage source  254  is “on”, and the second voltage source  256  is “off”. At the first comparator  210 , the voltage at the non-inverting pin  212  is greater than the voltage at the inverting pin  214 . The voltage at the output pin  216  is thus approximately −Vcc. A voltage of −Vcc is applied to the gate of Q 3   218 . This turns Q 3   218  “on”. Turning Q 3   218  “on” also turns Q 1   226  “on”. A path is thus created for a current in the first circuit  202 , such that approximately −48V is provided at the output  258  by the first voltage source  254 . 
     At the second comparator  234 , the voltage at the inverting pin  236  is greater than the voltage at the non-inverting pin  238 . The voltage at the output pin  240  is thus approximately 0V. Insufficient voltage is applied to the gate of Q 4   242  for Q 4   242  to conduct, thus Q 4   242  is “off”. Turning Q 4   242  “off” also turns Q 2   250  “off”. No path is created for a current in the second circuit  204 . Thus, no voltage is supplied to the output  258  by the second voltage source  256 . The voltage at node X of the second circuit  204  is approximately −48V. The voltage at node Y of the second circuit  204  is approximately 0V. Because the voltage at the cathode of D 2   252  is higher than the voltage at the anode, and because Q 4   242  is “off”, current is prevented from back flowing to the second voltage source  256 . Thus, Q 2   250  being “off” prevents cross-conduction of current between the first voltage source  254  and the second voltage source  256 .This prevents the first voltage source  254  from overloading. 
     Assume that the first voltage from the first voltage source  254  is approximately 0V and the second voltage from the second voltage source  256  is approximately −48V, i.e., the first voltage source  254  is “off”, and the second voltage source  256  is “on”. At the second comparator  234 , the voltage at the non-inverting pin  238  is greater than the voltage at the inverting pin  236 . The voltage at the output pin  240  is thus approximately −Vcc. A voltage of −Vcc is applied to the gate of Q 4   242 . This turns Q 4   242  “on”. Turning Q 4   242  “on” also turns Q 2   250  “on”. A path is thus created for a current in the second circuit  204 , such that approximately −48V is provided at the output  258  by the second voltage source  256 . 
     At the first comparator  210 , the voltage at the inverting pin  214  is greater than the voltage at the non-inverting pin  212 . The voltage at the output pin  216  is thus approximately 0V. Insufficient voltage is supplied to the gate of Q 3   218  for Q 3   218  to conduct. Thus, Q 3   218  is “off”. Turning Q 3   218  “off” also turns Q 1   226  “off”. No path is created for a current in the first circuit  202 . Thus, no voltage is supplied to the output  258  by the first voltage source  254 . The voltage at node A of the first circuit  202  is approximately −48V. The voltage at node B of the first circuit  202  is approximately 0V. Because the voltage at the cathode of D 1   228  is higher than the voltage at the anode, because D 1   228  is back biased, and also because Q 3   218  is “off”, current is prevented from back flowing to the first voltage source  254 . Thus, Q 3   218  being “off” prevents cross-conduction of current between the first voltage source  254  and the second voltage source  256 . This prevents the second voltage source  256  from overloading. 
     Assume that the first voltage from the first voltage source  254  is approximately −48V and the second voltage from the second voltage source  256  is either some voltage less than −48V, such as −40V, not connected. The voltage at the output  258  is still supplied by the first voltage supply  254 , as in the case where the first voltage is −48V and the second voltage is 0V, described above. In this situation, the voltage at node X of the second circuit  204  is approximately −48V and the voltage at node Y of the second circuit  204  is approximately −40V. Since the voltage at the cathode of D 2   252  is still higher than at the anode of D 2   254 , and Q 2   250  is “off”, cross conduction of current is prevented between the first  254  and second  256  voltage sources. Similarly, Q 1   226  prevents cross-conduction of currents when the second voltage is approximately −48V and the first voltage is either some voltage less than −48V or not connected. 
     Because switching transistors Q 1   226  and Q 2   250  experience lower power loss than the diodes  106  and  108  of the conventional power supply (FIG.  1 ), the power supply in accordance with the present invention is significantly more efficient. 
     Although the present invention is described above with two voltage sources, one of ordinary skill in the art will understand that more than two voltage sources may be used without departing from the spirit and scope of the present invention. 
     A highly efficient power supply with redundant multiple input voltage sources has been described. The power supply uses switching transistors to create paths for current from one of the voltage sources to the load. The switching transistors are switched either “on” or “off” by comparators which compare the output from the voltage sources. Because the switching transistors have lower conduction losses than diodes in conventional power supplies, the power supply in accordance with the present invention is more efficient. 
     Although the present invention has been described in accordance with the embodiments shown, one of ordinary skill in the art will readily recognize that there could be variations to the embodiments and those variations would be within the spirit and scope of the present invention. Accordingly, many modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the appended claims.