Abstract:
Semiconductor die assemblies, die packages, methods for fabricating the semiconductor die assemblies and packages, and systems incorporating the die packages are provided. The die assembly construction allows for a ball grid array to extend beyond the width of a semiconductor die and increase the capacity for external contacts while maintaining the size of the assembly and package to correspond to the lengthwise dimension of the die.

Description:
FIELD OF THE INVENTION 
     This invention relates generally to construction and packaging of semiconductor dies, and more particularly to a die assembly and methods of fabricating the assembly and packages incorporating the assembly, using an interposer to increase capacity of external contacts such as solder balls. 
     BACKGROUND OF THE INVENTION 
     The packaging of electrical circuits is a key element in the technological development of any device containing electrical components. Integrated circuit (IC) chips are enclosed in plastic packages that enable electrical connection of the chip to other circuits. Packaging IC chips has involved the placement of a chip on a flexible board where following adhesion of the chip to the board and wire bonding to connect the leads from the chip to the terminals on the board, an encapsulant is flowed over the chip and board to form a sealed package. 
     Developments in semiconductor fabrication processes provides for integration of large numbers of transistors, diodes, and other circuit elements onto a single IC chip. Such IC chips generally require a large number of electrical connections to receive inputs and to supply outputs. Because these integrated circuits are generally very small, the required input/output electrical connections on the integrated circuit are both numerous and densely spaced. 
     Several technologies have been developed to provide a means of mounting these electrical connections on a surface of a substrate, such as a printed circuit board (PCB). One method of packaging integrated circuits for electrical connection to a PCB is the so-called ball grid array (BGA) package. 
     A BGA semiconductor package generally includes a semiconductor chip (an integrated circuit) mounted on the top surface of a substrate. Electrical connections are made from the die to the substrate with bond wires that are attached to bond pads provided on the die and the substrate. The bond pads on the substrate are electrically connected to an array of solder balls or bumps, and these solder balls are used to bond and as input/output terminals for electrically connecting the substrate to a PCB or other external device. 
     A drawback of conventional BGA packaging is the limited space available for attachment of solder balls for connection to an external device. Another drawback is that the package is longer than the chip in both the X and Y directions (i.e., width and length). 
     SUMMARY OF THE INVENTION 
     The present invention relates to a semiconductor die packaging construction, which allows for the ball grid array to be wider than the width of the semiconductor die, methods for fabricating the semiconductor die device, and systems incorporating the device. 
     In one aspect, the invention provides semiconductor die assembly. In one embodiment, the die assembly comprises a semiconductor die mounted on a support substrate having a slot such that the support substrate extends beyond the die in a widthwise but not in a lengthwise direction. An exemplary support substrate comprises a plastic laminate material. In one embodiment, the support substrate comprises a pair of interposer substrates mounted on the semiconductor die to provide the slot thereinbetween. In another embodiment, the support substrate comprises a unitary substrate with the slot disposed therein. Bonding elements such as wire bonds can electrically connect elements (e.g., bond pads) on the active surface of the die through the slot to contacts (e.g. terminal pads) on the second surface of the support substrate. A plurality of external contacts (e.g., solder balls) can be mounted on the second surface of the support substrate. 
     In another embodiment, the semiconductor die assembly comprises a semiconductor die or integrated circuit chip having bond pads disposed on the active surface, mounted on a pair of interposers having terminal pads disposed on a first surface, the length of each of the interposers being about equal to or less than the length of the semiconductor die. The active surface of the semiconductor die is mounted onto the second surface of each of the pair of interposers such that a gap having a width is defined between the interposers, and the bond pads of the semiconductor die are disposed within the gap. The combined widths of the interposers and the width of the gap is greater than the width of the semiconductor die such that each interposer extends beyond the sides of the die in a widthwise orientation. The interposers are also mounted so as not to extend beyond the sides of the die in a lengthwise orientation. 
     In another embodiment, the semiconductor assembly comprises a semiconductor die having an active surface, a length and a width, and bond pads disposed on the active surface; and means for supporting the semiconductor die, the supporting means having a slot with a width disposed therein, and terminal pads disposed on a first surface; means for mounting the semiconductor die on the supporting means; and means for electrically connecting the bond pads to the terminal pads on the supporting means. The semiconductor die is mounted on the supporting means with the mounting means disposed therebetween, the bond pads of the semiconductor die disposed within the slot of the supporting means, and the supporting means disposed within the length of the semiconductor die and the extending beyond the width of the semiconductor die. 
     In another aspect, the invention provides a semiconductor die package. In various embodiments, the package comprises a die assembly according to the invention, at least partially encapsulated. The package can further include external contacts disposed on the second surface of the substrate for attaching the package as a component to an external electrical apparatus or device. 
     In another aspect, the invention provides methods of fabricating the foregoing die assemblies and semiconductor die packages. In one embodiment, the method comprises the steps of providing a semiconductor die that has an active surface (circuit side) with bond pads disposed thereon; providing a support substrate having a slot therethrough and terminal pads disposed on a first surface; and mounting the second surface of the support substrate onto the active surface of the semiconductor die such that the bond pads are disposed through the slot and the die extends beyond the support substrate lengthwise and the substrate extends beyond the die widthwise. 
     In one embodiment of the method, a support comprising a pair of interposers is mounted on the active surface of the semiconductor die to provide a gap (slot) thereinbetween with the bond pads disposed therethrough. The interposers are mounted on the die such that a) the combined widths of the interposers with the width of the slot is greater that the width of the semiconductor die, and the interposers extend outward from the die in a widthwise direction, and b) the interposers do not extend beyond the die in a lengthwise direction. In another embodiment of the method, a support comprising a unitary substrate with a slot therethrough is mounted onto the active surface of the die such that the bond pads are disposed through the slot, and the support substrate extends beyond the sides of the die in a widthwise direction but not in a lengthwise direction. 
     The method can further comprise electrically connecting the bond pads to the terminal pads, and mounting electrical contacts (e.g., solder balls) onto the first surface of the support substrate. In forming the assembly as a die package, at least a portion of the die can be encapsulated. 
     In still further aspect, the invention provides a system comprising a microprocessor in communication with a memory device that comprises a semiconductor die package according to the invention. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Preferred embodiments of the invention are described below with reference to the following accompanying drawings, which are for illustrative purposes only. Throughout the following views, the reference numerals will be used in the drawings, and the same reference numerals will be used throughout the several views and in the description to indicate same or like parts. 
         FIG. 1  is a bottom plan view of an embodiment of semiconductor die assembly according to the present invention, with a semiconductor die mounted on a pair of interposers; 
         FIG. 2  is cross-sectional, side elevational view of the die assembly of  FIG. 1  taken along line  2 - 2 ; 
         FIG. 3  is a top plan view of the die assembly of  FIG. 1 ; 
         FIG. 4  is a perspective view of the underside of the die assembly of  FIG. 1 , with the molding compound not shown; 
         FIG. 5  is an exploded perspective view of a die and a pair of interposers with an adhesive element applied thereto for fabricating the die assembly of  FIG. 1 ; 
         FIG. 6  is an exploded perspective view of a die and a unitary interposer substrate having a slot and an adhesive element applied thereto for fabricating another embodiment of a die assembly according to the invention; 
         FIG. 7  is a top plan view of a panel with multiple die packages disposed thereon; and 
         FIG. 8  is a block diagram of an embodiment of a system in which a die package of the invention can be used. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration of specific preferred embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments maybe utilized and that logical, mechanical and electrical changes maybe made without departing from the spirit and scope of the inventions. The following detail description is, therefore, not to be taken in a limiting sense, and scope of the present invention is defined only by the pending claims. 
     The invention provides a semiconductor die package, which allows for a ball grid array disposed on an interposer substrate having a width that is greater than the attached semiconductor die while the length of the package corresponds to the die length. 
     An embodiment of a semiconductor die package  10  according to the invention is described with reference to  FIGS. 1-5 . The package  10  comprises a semiconductor die (integrated circuit chip)  12  disposed on a pair of support substrates or interposers  14   a ,  14   b . The semiconductor die  12  includes a length L 1 , a width W 1 , first and second surfaces  16 ,  18 , opposing sides  17   a ,  17   b  and opposing sides  19   a ,  19   b . A plurality of bond pads  20  is disposed on the first surface  16  of the die  12 . 
     Each interposer  14   a ,  14   b  includes a length L 2 , a width W 2 , first and second surfaces  22 ,  24 , opposing sides  23   a ,  23   b  and opposing sides  25   a ,  25   b . The length L2 of the interposers  14   a ,  14   b  is less than the length L 1  of the die. The interposers  14   a ,  14   b  can comprise an electrically insulating polymer material such as a resin reinforced with glass fibers, for example, bismaleimide triazine (BT) resin, epoxy resins such as FR-4 or FR-5 laminates, ceramics, and polyimide resins, a flexible polyimide film (e.g., KAPTON from DuPont, Wilmington, Del., or UPILEX from Ube Industries, Ltd., Japan), a multilayered substrate that can be produced by a build-up process as known in the art, among other substrates. In another embodiment, the interposers  14   a ,  14   b  can comprise copper, for example, as the core material using a build-up processing technology (single-layer or multi-layer design, etc.) as known and used in the art, to form circuitry onto the copper substrate. A preferred material is a plastic laminate material, for example, BT resin with conductive copper traces formed on the top and bottom surfaces. A representative thickness of the interposers is about 50 μm to about 500 μm, and typically about 0.3 mm (300 μm). 
     As depicted in exploded view in  FIG. 5 , the die  12  can be attached to the interposer substrates  14   a ,  14   b  by use of an adhesive element  27 . The adhesive element  27  can be applied onto the first (active) surface  16  of the die  12  and/or to the second surface  24  of the interposer substrates  14   a ,  14   b . The adhesive element  27  can comprise any suitable adhesive material known in the art, including contact adhesives, thermoplastic adhesives and thermosetting adhesives, for example, a die-attach epoxy or equivalent, or a double-sided, multi-layered adhesive tape such as polyimide film coated on both sides with adhesive. The die  12  and/or the interposer substrates  14   a ,  14   b  can be provided in a pre-taped form with an adhesive tape attached thereto, or an adhesive element  27  can be applied to either or both of the die  12  and the interposer substrates  14   a ,  14   b  during fabrication of a die assembly and package. Many suitable adhesive application methods for liquid or gel adhesive application are known in the art, such as screen printing, roller applicator, spray, and transfer. Similarly, an adhesive tape may be applied from a dispenser and severed from a roll of tape, or applied from a transfer (carrier) film. In the illustrated example in  FIG. 5 , an adhesive material  27  has been applied to the second surface  24  of the interposer substrates  14   a ,  14   b.    
     As depicted in  FIGS. 1 and 4 , the second surface  24  of each interposer  14   a ,  14   b  is mounted onto the first surface (circuit side)  16  of the die  12  so as to define an opening or slot  26  therebetween having a width Ws, such that the bond pads  20  of the die are exposed therethrough. The interposers  14   a ,  14   b  disposed on the die  12  define a width W 3 , which is the combined width W 2   a +W 2   b  of the interposers  14   a ,  14   b  plus the width Ws of the slot. The interposers  14   a ,  14   b  are positioned on the die such that the opposing sides  25   a ,  25   b  of the interposers  14   a ,  14   b  extend beyond the opposing sides  19   a ,  19   b  of the chip, and the width W 3  of the interposers disposed on the chip is greater than the width W 1  of the chip  12 . The interposers  14   a ,  14   b  are also positioned on the die  12  such that the opposing sides  17   a ,  17   b  of the die extend beyond the opposing sides  23   a ,  23   b  of the interposers in a lengthwise direction, the length L 2  of the interposers being up to about the length L 1  of the die, and preferably less than the length L 1 . Thus, the interposers extend beyond the die in a widthwise direction but do not extend beyond the die in a lengthwise direction. Preferably, the die extends beyond the interposers in a lengthwise direction. 
     As shown in an exploded view in  FIG. 6 , in another embodiment of a die assembly  10 ′ according to the invention, the support (interposer) substrate  14 ′ can be provided as a unitary sheet with a slot  26 ′. The support substrate  14 ′ has a width W 3 ′, which includes the width Ws&#39; of the slot  26 ′, and a length L 2 ′. The semiconductor die  12 ′ is mounted on the support substrate  14 ′ such that the bond pads  20 ′ are disposed within the slot  26 ′, and the substrate  14 ′ extends beyond the die  12 ′ in a widthwise direction but does not extend beyond the die  12 ′ in a lengthwise direction. 
     Referring back to  FIG. 1 , after mounting the die  12  onto the interposer substrates  14   a ,  14   b , the bond pads  20  of the die can be electrically connected to terminal pads  28  disposed on the first surface  22  of each interposer, by wire bonds  30  as shown, or other bonding element such as tape automated bonding (“TAB” tape) in which case a support structure would be included on the section of material that extends beyond the die edge, as is known in the industry. A bonding element can be attached, for example, by thermosonic bonding, ultrasonic bonding, tape automated bonding, or other technique known and used in the art. The terminal pads  28  are typically located along the periphery of the interposers adjacent to the opening  26 . 
     An array of external contacts  32  can be conventionally mounted on a plurality of ball pads  31  formed on the first surface  22  of each interposer substrate. The ball pads  31  are electrically connected to the terminal pads  28  through circuit traces  34 , as shown in  FIGS. 1-2 . The external contacts  32  are typically in the form of conductive solder balls (or other suitable conductive material such as conductive epoxies or conductor-filled epoxies), bumps, columns, pins, and the like. The external contacts  32  provide external electrical connections to the die, and permit the die assembly package to be surface mounted to a printed circuit board (PCB) or other electronic component such as a motherboard of a computer, program logic controller (PLC), a testing apparatus, among others. 
     Advantageously, the extension of the interposers  14   a ,  14   b  widthwise on either side of the semiconductor die provides a greater surface area for supporting an increased number of external contacts (e.g., solder balls) while providing a die assembly and package having the same length as the length L 1  of the die itself. The increased capacity for external contacts provides additional contacts for higher density chips, and provides for wider configurations. It also eliminates the need for retooling during fabrication of a die assembly in the test department. A standardized grid even on the die shrinks will allow test to share existing tooling for several die shrinks. 
     The die assembly can be partially or fully encapsulated with a dielectric molding compound using known techniques in the art, for example, screen printing, glob-top, pot molding, and transfer molding, resulting in an encapsulated die package  10 . As shown, an encapsulant or molding compound  36  is disposed along the sides  19   a ,  19   b  and on the active surface  16  of the die  12 , and within the slot  26  between the interposers  14   a ,  14   b  to encapsulate the bond pads  20 , terminal pads  28  and wire bonds  30 , and protect these features from environmental elements and physical harm during subsequent processing, storage, shipment and ultimately during end use. An exemplary molding compound is a thermoset epoxy resin, for example, a novolac epoxy resin-based compound, that produces a rigid plastic body surrounding the die. The molding compound can be dried, set or cured to a solid phase. 
     As shown in  FIG. 7 , the die assembly can be fabricated on a strip or panel support substrate  40  having indexing holes  42 , on which multiple die packages  10  are formed. During packaging, the panel support substrate  40  is moved by lead frame handling equipment (not shown) through package fabrication machinery such as die attach equipment and wire bonders, by contacting the indexing holes  42  on the panel substrate  40 . Die attach equipment attaches a plurality of dies  12  to the panel substrate  40 , and the wire bonding equipment connects wire bonds to bonding pads (not shown) on the panel substrate  40  that are associated with respective dies. Conductive contacts such as solder balls (not shown) can be attached to the underside of the panel substrate  40  or can be pre-attached to the panel prior to being indexed by the lead frame handling equipment through the packaging equipment. Before or after encapsulation, the die packages  10  on the panel substrate  40  are singulated, for example, by cutting or shearing along an expansion slot or saw path  44 , into individual die packages. 
       FIG. 8  illustrates an embodiment of a system  46  in which the present invention can be incorporated. The system includes a memory device  48  (e.g., static random access memory (SRAM), dynamic random access memory (DRAM), etc.) comprising a die assembly package according to the invention. The memory device  48  is coupled to a microprocessor  50 , which may be programmed to carry out particular functions as is known in the art. 
     In compliance with the statute, the invention has been described in language more or less specific as to structural and methodical features. It is to be understood, however, that the invention is not limited to the specific features shown and described, since the means herein disclosed comprise preferred forms of putting the invention into effect. The invention is, therefore, claimed in any of its forms or modifications within the proper scope of the appended claims appropriately interpreted in accordance with the doctrine of equivalents.