Abstract:
A fan speed testing system for testing a testing fan includes a testing fan, a collecting module, a processing module, a converting module; and a displaying module. A label is attached to the testing fan and capable of rotating with the testing fan. The collecting module is configured to collect light reflected off of the label as the fan rotates in order to produce a pulse signal. The processing module is configured to adjust the pulse signal to be a standard square wave. The converting module is configured to obtain a fan speed data of the testing fan according to conversion times between high levels and low levels of the standard square wave. The displaying module is configured to display the fan speed data.

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure relates to testing systems and methods, especially to a testing system and method for testing fan speed. 
     2. Description of Related Art 
     After computers are produced, quality tests are required. One of the tests is testing the fans of the computers. A conventional method to test the speed of the fans is using a tachometer. However, the conventional method requires opening the computer and manually positioning the tachometer close to the fan, which wastes time and manpower, and the tachometer is expensive. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block view of a fan speed testing system in accordance with an embodiment. 
         FIG. 2  is a circuit diagram of a voltage stabling circuit of the fan speed testing system in accordance with an embodiment. 
         FIG. 3  is a circuit diagram of a frequency collecting and wave processing circuit of a fan speed testing system in accordance with an embodiment. 
         FIG. 4  is a circuit diagram of a converting and displaying circuit of a fan speed testing system in accordance with an embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one. 
     Referring to  FIG. 1 , a fan speed testing system  100  includes a power source  10 , a collecting module  30 , a processing module  50  connected to the collecting module  30 , a converting module  70  connected to the processing module  50 , and a displaying module  90  connected to the converting module  70 . 
     Referring to  FIG. 2 , a voltage stabling circuit  200  is used in the power source  10 . The voltage stabling circuit  200  includes a power input terminal  201  and a voltage stabling chip  203 . In one embodiment, the voltage stabling chip  203  is a LM7805 chip. An input pin IN of the voltage stabling chip  203  is connected to the power input terminal  201  by a diode D 1  and a power controlling switch S 1 , and connected to ground by a capacitor C 1 . A positive terminal of the diode D 1  is connected to a +9V voltage source. A negative terminal of the diode D 1  is connected to ground by a resistor R 1  and a light-emitting diode (LED) D 2 . An output pin OUT of the voltage stabling chip  203  is connected to the input pin IN by a diode D 3 , and connected to ground by a capacitor C 2 . The input pin IN is connected to ground by a capacitor C 3 . The output pin OUT is connected to ground by a capacitor C 4 , and also connected to ground by a resistor R 2  and a LED D 4 . A ground pin GND of the voltage stabling chip  203  is connected to ground. The voltage stabling chip  203  is used for converting +9V voltage at the input pin IN to +5V voltage at the output pin. The voltage stabling circuit  200  provides a +9V voltage source and a +5V voltage source. Wherein the +9V voltage source provides power to the collecting module  30  and the processing module  50 , and the +5V voltage source provides power to the converting module  70  and the displaying module  90 . 
     Referring to  FIG. 3 , a frequency collecting and wave processing circuit  300  is used in the collecting module  30  and the processing module  50 . The frequency collecting and wave processing circuit  300  includes a reflecting infrared sensor  301 , a first comparator  303  connected to the reflecting infrared sensor  301 , and a second comparator  305  connected to the first comparator  303 . 
     In one embodiment, the reflecting infrared sensor  301  is a ST178 chip. The reflecting infrared sensor  301  includes a LED D 5  and a phototransistor Q 1 . A positive terminal of the LED D 5  is connected to the +9V voltage source of the voltage stabling circuit  200  by a resistor R 3 , and a negative terminal of the LED D 5  is connected to ground. A collector of the phototransistor Q 1  is connected to the +9V voltage source by a resistor R 4 , and an emitter of the phototransistor Q 1  is connected to ground. A positive input terminal of the first comparator  303  is connected to the collector of the phototransistor Q 1  by a resistor R 5 . A negative input terminal of the first comparator  303  is connected to a wiper of a potentiometer R 6 . A terminal of the potentiometer R 6  is connected to the +9V voltage source, and another terminal of the potentiometer R 6  is connected to ground. A power terminal of the first comparator  303  is connected to the +9V voltage source, and respectively connected to ground by capacitor C 5  and capacitor C 6 . A ground terminal of the first comparator  303  is connected to ground. An output terminal of the first comparator  303  is connected to a terminal of a potentiometer R 7 . A wiper of the potentiometer R 7  is connected to a positive input terminal of the second comparator  305 . Another terminal of potentiometer R 7  is connected to ground. A negative input terminal of the second comparator  305  is connected to an output terminal I/O of the second comparator  305 . A power terminal of the second comparator  305  is connected to the +9V voltage source, and a ground terminal of the first comparator  303  is connected to ground. 
     Referring to  FIG. 4 , a converting and displaying circuit  700  is applied in the converting module  70  and the displaying module  90 . The converting and displaying circuit  700  is used for receiving a pulse signal sent from the frequency collecting and wave processing circuit  300 , converting the pulse signal to a fan speed data, and displaying the fan speed data. The converting and displaying circuit  700  includes a converting chip  701  and a displaying circuit  703 . In one embodiment, the converting chip  701  is MCS-51 MCU. A power pin VCC of the converting chip  701  is connected to the +5V voltage source of the voltage stabling circuit  200 , and connected to ground. A capacitor C 7  and a capacitor C 8  are connected in parallel. A ground pin VSS is connected to ground. Two clock pins XTAL 1 , XTAL 2  are connected to a clock circuit  705 . The clock circuit  705  includes a crystal oscillator Y 1  and two capacitors C 9  and C 10 . The crystal oscillator Y 1  is connected between the clock pins XTAL 1 , and XTAL 2 . The clock pin XTAL 1  is connected to ground by the capacitor C 9 , and the clock pin XTAL 2  is connected to ground by the capacitor C 10 . A resetting pin RST of the converting chip  701  is connected to a control circuit  707 . The control circuit  707  includes a switch K 1 . The resetting pin RST is connected to ground by resistor R 8  and resistor R 9 . One terminal of the resistor R 8  is connected to the +5V voltage source by the switch K 1 , and another terminal of the resistor R 8  is connected to the +5V voltage source by a capacitor C 11 . The displaying circuit  703  includes four seven-segment displays. Pins P 2 . 0 -P 2 . 7  are respectively connected to pins a, b, c, d, e, f, g, and DP of the four seven-segment displays. Pins  1 .- 1 . 7  are used for controlling the four seven-segment displays to be turned on or off. A Pin P 3 . 2  is connected to the output terminal I/O of the frequency collecting and wave processing circuit  300 . 
     Referring to  FIGS. 1 to 4 , the working principle of the fan speed testing system  100  is described below. 
     A label with an identifiable color is attached on a vane or blade of a testing fan. In one embodiment, the label is a white strip and the testing fan is black. When the fan speed testing system  100  is operational, light reflected off the label enables the phototransistor Q 1  to be turned on if light from the LED D 5  reflects off of the label. At this time, the phototransistor Q 1  is in a first state. The phototransistor Q 1  is turned off if light from the LED D 5  reflects off of the other part of the testing fan. At this time, the phototransistor Q 1  is in a second state. The label rotates when the vane or blade of the testing fan rotates, thereby the phototransistor Q 1  is turned on intermittently, which makes the reflecting infrared sensor  301  produce a pulse signal. The pulse signal is amplified and adjusted by the first comparator  303  and the second comparator  305  to be a standard square wave. The square wave is delivered to the pin P 3 . 2  of the converting chip  701 . The converting chip  701  collects conversion times when the level falls from high to low in the square wave, which means the testing fan rotate one time. The converting chip  701  can calculate the fan speed data of the testing fan during a given period of time. The converting chip  701  delivers the fan speed data to displaying circuit  703  and the display circuit  703  displays the fan speed data. 
     It is to be understood, however, that even though numerous characteristics and advantages of the present disclosure have been set forth in the foregoing description, together with details of the structure and function of the disclosure, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.