Abstract:
An interconnect structure for use in an integrated circuit is provided. The interconnect structure includes a first low-K dielectric material. The first low-K material may be modified with a first group of carbon nanotubes (CNTs) and disposed on a metal line. The first low-K material is modified by dispersing the first group of CNTs in a solution, spinning the solution onto a silicon wafer and curing the solution to form the first low-K material modified with the first CNTs. The metal line includes a top layer and a bottom layer connected by a metal via. The interconnect structure also includes a second low-K dielectric material modified with a second group of CNTs and disposed on the bottom layer. Accordingly, embodiments the present disclosure could help to increase the mechanical strength of the low-K material or the entire interconnect structure.

Description:
CROSS-REFERENCE TO RELATED APPLICATION AND CLAIM OF PRIORITY 
     The present application is related to U.S. Provisional Patent No. 60/780,092, filed Mar. 8, 2006, entitled “INTERCONNECT STRUCTURE, INTEGRATED CIRCUIT, AND METHOD HAVING CARBON NANOTUBE-MODIFIED LOW-K MATERIALS”. U.S. Provisional Patent No. 60/780,092 is assigned to the assignee of the present application and is hereby incorporated by reference into the present disclosure as if fully set forth herein. The present application hereby claims priority under 35 U.S.C. §119(e) to U.S. Provisional Patent No. 60/780,092. 
    
    
     TECHNICAL FIELD 
     This disclosure is generally directed to integrated circuits and more specifically carbon nanotube-modified low-K materials. 
     BACKGROUND 
     Conventional interconnect structures for integrated circuits are often formed using aluminum as a metallization layer and silicon dioxide as a dielectric. However, while integrated circuits are being continuously scaled down (such as device scaling from the 90 nm node to the 65 nm node and further to the 45 nm node), conventional interconnect structures often suffer from an interconnection delay due to high electrical resistance and parasitic wiring capacitance. These problems are major factors that limit the speed of high performance integrated circuits. 
     Integrated circuit manufacturers have begun using copper in place of aluminum and a low-K material in place of silicon dioxide in the interconnect structures to address these issues. The copper helps to lower the resistance of the interconnect metallization and increase the reliability of the interconnect structures, while the low-K material helps to reduce the parasitic capacitance between the interconnect structures by providing a lower dielectric constant. However, the ability to reduce the dielectric constant of the low-K material is typically limited, and low-K materials are often mechanically weak. 
     SUMMARY 
     This disclosure provides carbon nanotube-modified low-K materials. 
     In one embodiment, the present disclosure provides an interconnect structure. The interconnect structure includes a low-K dielectric material modified with a first group of carbon nanotubes (CNTs). The low-K material is disposed on a metal line. The metal line includes a top layer and a bottom layer connected by a metal via. 
     In another embodiment, the present disclosure provides a method of forming an interconnect structure. The method includes providing a first low-K material modified with a first group of carbon nanotubes (CNTs). The method also includes providing a metal line having a top layer and a bottom layer disposed on the first low-K material. The method further includes providing a second low-K material modified with a second group of CNTs where the second low-K material is disposed on the first low-K material. 
     In still another embodiment, the present disclosure provides an interconnect structure for use in an integrated circuit. The interconnect structure includes a first low-K dielectric material. The first low-K material is modified with a first group of carbon nanotubes (CNTs) and disposed on a metal line. The metal line includes a top layer and a bottom layer connected by a metal via. The interconnect structure also includes a second low-K dielectric material modified with a second group of CNTs and disposed on the bottom layer. The interconnect structure further includes a silicon nitride layer disposed on the top layer and the first low-K dielectric material. 
     Other technical features may be readily apparent to one skilled in the art from the following figures, descriptions, and claims. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       For a more complete understanding of this disclosure, reference is now made to the following description, taken in conjunction with the accompanying drawing, in which: 
         FIG. 1  illustrates a conventional interconnect structure; 
         FIG. 2  illustrates an example interconnect structure according to one embodiment of this disclosure; 
         FIG. 3  illustrates carbon nanotubes having different alignments according to one embodiment of this disclosure; 
         FIG. 4  illustrates an example Four-Point Bend test structure according to one embodiment of this disclosure; 
         FIG. 5  illustrates example theoretical results associated with the Four-Point Bend test structure according to one embodiment of this disclosure; and 
         FIG. 6  illustrates an example modeling of a flip chip ball grid array (FCBGA) to quantify a cohesive crack phenomenon according to one embodiment of this disclosure. 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 1  illustrates an interconnect structure  100 . In this example, the interconnect structure  100  includes a metal line  102 , which in this embodiment includes a top layer and a bottom layer of copper connected by a copper via. One or more low-K materials  104 - 106  are disposed around the metal line  102 . The one or more low-K materials  104 - 106  could include any suitable number or type of dielectric or other material, including one or more silicon oxycarbides, organic polymers, fluorosilicate glass, or black diamond. A silicon nitride layer  108  is disposed over the metal line  102  and the low-K material  106 . 
     The interconnect structure  100  described above typically suffers from some amount of electrical resistance and parasitic wiring capacitance. The use of copper helps to reduce the electrical resistance. The lowering of the dielectric constant of the low-K materials  104 - 106  helps to reduce the parasitic wiring capacitance between interconnect structures  100 . However, the ability to reduce the dielectric constant of the low-K materials  104 - 106  is typically limited, and low-K materials  104 - 106  are often mechanically weak. 
       FIG. 2  illustrates an example interconnect structure  200  according to one embodiment of this disclosure. The embodiment of the interconnect structure  200  shown in  FIG. 2  is for illustration only. Other embodiments of the interconnect structure  200  could be used without departing from the scope of this disclosure. 
     In this example, the interconnect structure  200  includes a metal line  202 , such as a copper line having top and bottom copper layers connected by a copper via. The interconnect structure  200  also includes one or more low-K materials  204 - 206 , such as silicon oxycarbides, organic polymers, fluorosilicate glass, or black diamond. A silicon nitride layer  208  is disposed over the metal line  202  and the low-K material  206 . Although shown as including a single copper metal line  202  with two metal layers, the interconnect structure  200  could include any number of lines  202 , and each line  202  could be formed from any conductive material(s) and have any suitable number of layers. 
     One or more of the low-K materials  204 - 206  are modified in at least one way using carbon nanotubes. Carbon nanotubes may represent cylindrical carbon molecules with novel properties that make them potentially useful in a wide variety of applications (such as nano-electronics, optics, and materials applications). Carbon nanotubes often exhibit extraordinary strength and unique electrical properties and are often efficient conductors of heat. For example, carbon nanotubes may have a high Young&#39;s modulus (1 TPa) and high tensile strength (100 GPa).  FIG. 3  illustrates scanning electron microscope images of example carbon nanotubes. In particular, image  302  in  FIG. 3  illustrates aligned carbon nanotubes, while image  304  in  FIG. 3  illustrates non-aligned carbon nanotubes. 
     In some embodiments, carbon nanotubes are actually dispersed in and form a part of one or more of the low-K materials  204 - 206 . The carbon nanotubes may help to decrease the dielectric constant of the one or more low-K materials  204 - 206 . Moreover, the mechanical strength and the thermal conductivity of the one or more low-K materials  204 - 206  may increase. In particular embodiments, the carbon nanotubes may be used in one or both of the low-K materials  204 - 206 . 
     The carbon nanotubes may have any suitable alignment in one or more of the low-K materials  204 - 206 . For example, the carbon nanotubes may be aligned vertically, horizontally, or in any other suitable manner. The carbon nanotubes could also be unaligned. In addition, the carbon nanotubes may have any suitable arrangement or pattern in one or more of the low-K materials  204 - 206 . As an example, the carbon nanotubes may be arranged in a honeycomb pattern or any other pattern, or no pattern could be used. 
     Various techniques could be used to fabricate these embodiments of the interconnect structure  200 . For example, carbon nanotubes could be created and then cut as short as possible. The carbon nanotubes may then be uniformly dispersed into a solution, and the solution of carbon nanotubes may be mixed with a polymer or sol-gel. The polymer or sol-gel may then be spun onto a silicon wafer and cured to form one or both of the low-K materials  204 - 206 . Any other suitable technique could be used to form these embodiments of the interconnect structure  200 . 
     In other embodiments, carbon nanotubes are used to form pores in one or more low-K materials  204 - 206  to form one or more nanoporous low-K materials  204 - 206 . A nanoporous low-K material may have a lower dielectric constant than the low-K material itself. Again, the carbon nanotubes used to form the nanopores may have any suitable alignment, arrangement, or pattern in one or more of the low-K materials  204 - 206 . 
     Various techniques could be used to fabricate these embodiments of the interconnect structure  200 . For example, carbon nanotubes could be created and then cut as short as possible. The carbon nanotubes may then be uniformly dispersed into a solution, and the solution of carbon nanotubes may then be mixed with a polymer or sol-gel. The polymer or sol-gel may then be spun onto a silicon wafer, and the carbon nanotubes may be burned away in an oxygen atmosphere, leaving nanopores in the polymer or sol-gel that forms one or more of the low-K materials  204 - 206 . Any other suitable technique could be used to form these embodiments of the interconnect structure  200 . 
     In particular embodiments, the properties of the one or more low-K materials  204 - 206  may be controlled or tuned using the amount of carbon nanotubes or nanopores in the low-K materials. For example, the dielectric constant, Young&#39;s modulus, or thermal conductivity of a low-K material could be tuned based on the amount of carbon nanotubes or nanopores in the low-K material. Moreover, the various embodiments of the interconnect structure  200  described above may be fabricated using relatively simple processing. 
     Although  FIG. 2  illustrates one example of an interconnect structure  200 , various changes may be made to  FIG. 2 . For example, materials other than copper and silicon nitride could be used in the interconnect structure  200 . Also, the particular sizes and shapes of the various components in the interconnect structure  200  are for illustration only. The components in the interconnect structure  200  could have any other suitable size or shape. In addition, the low-K materials  204 - 206  have been described as being formed using carbon nanotubes. However, any other nano-wire fillings or other nano-structures (whether metallic or non-metallic) could be used instead of or in addition to the carbon nanotubes. 
     Interfacial adhesion energy of the copper and low-K material interfaces may be studied using a Four-Point Bend test structure  400  (shown in  FIG. 4 ) or using nano-scratch/nano-indentation tests. The theoretical results  500  using the Four-Point Bend test structure are shown in  FIG. 5 . The theoretical results  500  plot the displacement in microns versus the load in Newtons. In addition, a finite element method may be used to model the interconnect structure  200 .  FIG. 6  illustrates the modeling  600  of a flip chip ball grid array (FCBGA) to quantify a cohesive crack phenomenon, allowing the effective strain contours to be compared. Sites #2 and #3 (the two sites located underneath the bump corners) may be the most critical ones. Moreover, with the considered patterning, these results highlight that the most strained layers may be located at the extreme inter-metal dielectric (IMD) layers (IMD 1  and IMD 4 ). As a result, the most likely areas for a cohesive crack initiation may be found to be the top and bottom low-K dielectric layers just below the two bump corners. The use of the interconnect structure  200  may help to avoid these types of cohesive cracks. 
     Accordingly, embodiments the present disclosure could help to increase the mechanical strength of the low-K material or the entire interconnect structure. 
     It may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation. The term “or” is inclusive, meaning and/or. The phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like. 
     While this disclosure has described certain embodiments and generally associated methods, alterations and permutations of these embodiments and methods have been set forth by implication and will be apparent to those skilled in the art. For example, some embodiments of this disclosure could have metal lines corresponding to the aforementioned metal lines  102  and  202 , where the metal lines are formed of gold, silver, all-metal alloy, part-metal alloy, non-metallic conductive material, or any other suitable material or combination of materials. 
     As another example, some embodiments of this disclosure could have one or multiple low-K materials, and each low-K material could include carbon nanotubes and/or nanopores. As yet another example, some embodiments of this disclosure could have aligned or unaligned carbon nanotubes, and aligned carbon nanotubes could be aligned in any suitable orientation or pattern (such as honeycomb, hexagonal, checkerboard, triangular, labyrinth, Archimedean spiral, logarithmic spiral, kagome lattice, or a combination of one or more patterns). Accordingly, the above description of example embodiments does not define or constrain this disclosure. Other changes, substitutions, and alterations are also possible without departing from the spirit and scope of this disclosure, as defined by the following claims.