Abstract:
A binary phase shift keyed (BPSK) modulator (200) used for digital phase modulation is shown. Phase shift is achieved by electrically switching an RF input signal (201) through either a direct signal path (203) or through a half wave transmission signal path (205) to shift its phase by 180 degrees. Both the data signal (211) and its complement (213) are used to turn on one of PIN diodes (207, 209) while simultaneously turning off the other diode with reverse bias. This technique allows for obtaining maximum diode isolation. The BPSK modulator (200) has the advantages of very low insertion loss, dc coupling for low frequency modulation components and high performance with minimum parts.

Description:
TECHNICAL FIELD 
     This invention relates in general to modulators and more particularly to biphase modulators. 
     BACKGROUND 
     Modulators are systems which enable information, contained in a baseband signal, to be transferred to an RF carrier signal so the information may be transmitted over some medium to a receiver. The information may be transferred to the RF carrier by causing the amplitude, frequency, or phase of the carrier to vary in accordance with the information contained in the baseband signal. This results in amplitude modulation (AM), frequency modulation (FM), or phase modulation (PM) respectively. 
     Typically, the baseband signal, also known as the modulating signal, may contain continuously variable signal levels resulting in analog modulation of the carrier or it may contain discrete levels resulting in digital modulation of the carrier. Digital phase modulation of an RF carrier by a binary (2 state) baseband signal is referred to as Binary Phase or &#34;BiPhase&#34; Shift Keying (BPSK). 
     As is known in the prior art, such a modulator can be implemented either with passive or active circuits. An active circuit implementation typically uses the Gilbert cell circuit while the passive implementation typically uses a double balanced mixer (DBM) comprised of a Schottky diode ring and two RF transformers. 
     The Gilbert cell circuit and the DBM allow an information bearing binary signal to switch the phase of the RF signal appearing at the output of the modulator between two phase states--the difference of which is 180 degrees. Hence, with these devices either of two phases of an RF carrier correlated to a binary signal can be transmitted over a medium to a receiver which converts the two phases back into the original baseband signal. DBM&#39;s are constructed using a four diode Schottky ring in conjunction with two RF transformers. These products are typically built with discrete parts although at least one known configuration uses an integrated design whereby both the Schottky diode ring and the transformers are constructed on a Microwave Monolithic Integrated Circuit (MMIC). 
     There are several drawbacks to both the discrete and integrated implementations of the double balance mixer for use as a biphase modulator. Most discrete DBM&#39;s require a bipolar binary signal to switch the diodes for the two phase states. However, typical logic circuits used to produce binary signals have a unipolar output (e.g. 0-5 volts rather than -5 to +5 volts). This problem can be alleviated by capacitively coupling the unipolar binary signal to the DBM but this imposes another problem on the modulator i.e. poor response to low frequency components of the modulating signal. The MMIC version of the DBM suffers not only from the above described limitation but also it has an approximately 10 db insertion loss to the RF signal and has a very poor impedance match to 50 ohms at its input and output. 
     Therefore it is evident there is a deficiency among the prior art implementations of the biphase modulator. Namely, they require that a bipolar data signal, which is usually not available in communications equipment, be used to control the phase state switching devices. In lieu of the bipolar signal, a unipolar data signal, which is commonly found in communications equipment, may be capacitively coupled to the modulator to effect the same switching characteristics as achieved with a bipolar signal. This latter approach, however, imposes a performance restriction on the low frequency content of the modulating data signal. 
     Prior art implementation that attempts to miniaturize the prior art discrete versions of the biphase modulator through MMIC techniques suffer not only from the same bipolar/unipolar conflicts, but also have high insertion loss and poor impedance match to the RF signal. 
     Therefore, it is evident a device offering improved characteristics would be highly useful in communications systems utilizing digital biphase modulation. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram showing the operation of the preferred embodiment of the present invention. 
     FIG. 2 is a schematic diagram of the BPSK modulator shown in FIG. 1. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     FIG. 1, shown at 100, is a block diagram depicting the operation of a preferred embodiment of the invention. An RF continuous wave (CW) signal, typically at 2.1 GHz, is applied to a diode switch 103 via input 101. The diode switch 103 is controlled by the binary data signals at input 113 and input 115 in conjunction with the DC bias circuit 104. The diode switch 103 directs the CW signal to either of two signal paths 105 or 107. Signal path 107 includes a halfwave transmission line 109 which provides a 180 degree phase shift of the CW signal. Signal paths 105, 107 and transmission line 109 are joined at a summing junction 111. Thus, either the input CW signal or the input CW signal shifted by 180 degrees appears at this junction depending on the state of switch 103. The data signal, controlling diode switch 103, is applied to the summing junction 111 through RF isolation transmission lines 113 and 115. The RF isolation and DC bias circuit 104 are used in conjunction with the data signal at input 113 and input 115 to control switch 103. 
     A binary data signal is DC coupled to diode switch 103 and switches the input CW signal through either a direct signal path 105 or a 180 degree phase shifted signal path 107 to the output at 117. As a result, the input signal is phase shifted between two phase states, the difference of which is 180 degrees, in accordance with the binary data signal to produce a BPSK output signal at output 117. 
     FIG. 2 is a schematic representation of the binary phase shift keyed (BPSK) modulator 200. The modulator 200 generally operates at a minimal carrier frequency of 2.1 GHz. It should be recognized by those skilled in the art that although 2.1 GHz is used here by way of example, any frequency at generally 2.1 GHz or above may be used. Phase shift is achieved by electrically switching the RF signal (i.e. the CW signal at the input port 201) between either a direct signal path 203 or a signal path 205 containing a halfwave transmission line 205&#39; which shifts the phase of the signal by 180 degrees. The halfwave transmission line 205&#39; may be a commonly used microstrip transmission line or the like consisting of a conductive runner of predetermined dimensions on substrate material such as alumina. Switching is achieved using information bearing binary digital signals 211, 213 to control two PIN diodes 207 and 209 which may be HPND-4018 manufactured by Hewlett-Packard or the like. 
     Data signal 211 and data complement signal 213 bear the information to be placed on the CW carrier signal at the input port 201 of the modulator 200. The levels of data signal 211 and data complement signal 213 are typically 0 volts for a logic 0 and nominally 5 volts for a logic 1 although other values may be selected. During modulation, while the data signal 211 or complement signal 213 is at +5 volts, the other is at 0 volts. For these levels, the voltage across resistor 215 is nominally 3.75 volts independent of whether data signal 211 or data complement signal 213 is at a high or low level. When forward biased at approximately 10 ma, diode 207 and diode 209 exhibit a very low resistance resulting in a theoretical insertion loss of 0.3 dB as measured in a 50 ohm system. When reverse biased with 3.75 volts, diodes 207 and 209 exhibit a high capacitive impedance equivalent to approximately 0.03 pf. 
     During operation, when data signal 211 is at +5 volts, diode 209 is forward biased and the current through it is limited by resistor 215 and resistor 217 to 8-10 ma. Under these conditions data complement signal 213 is at 0 volts and diode 207 is turned off with a reverse bias voltage of 3.75 volts, the voltage appearing across resistor 215. The RF signal at the input port 201 of the modulator 200 is thus connected to the output port 251 through diode 209 via signal path 203. Conversely, when data complement signal 213 is at +5 volts, diode 207 is forward biased and its current is limited to 8-10 ma by resistor 215 and resistor 219. The data signal 211 is at 0 volts; diode 209 is off and reverse biased by 3.75 volts, which is the voltage appearing across resistor 215. The RF signal input at input port 201 is now directed to the output port 251 through diode 207 and the halfwave transmission line 205&#39; via signal path 205. 
     Quarter wave transmission lines 221, 223 and 225 serve as RF chokes which isolate the RF signal at input port 201 from the modulating signal. To the data or information bearing data signal, quarter wave transmission lines 221, 223, and 225 appear simply as conductors. Capacitors 227, 229 and 231 act as RF short circuits producing RF open circuits at the opposite ends of their respective quarter wave transmission lines. As a result, these quarter wave transmission lines appear as open circuits to the RF signal input at input port 201 thereby providing isolation. Additional capacitance, used in conjunction with resistors 217 and 219, may be added in parallel with capacitor 229 and capacitor 231 to provide low pass filtering of the data signals at input 211 and input 213. 
     It will be recognized by those skilled in the art that there is parasitic capacitance to ground due to the metalization on which the DC blocking capacitors 233, 235 and 237 are mounted. The parasitic capacitance adds a reactive component to the input/output impedance of modulator 200. This can be easily tuned out by shortening the quarter wave transmission lines 221, 223, 225 as follows. At its open end, a shorted quarter wave transmission line may be modeled as a parallel LC circuit resonating at the nominal frequency of the RF input signal. The parasitic capacitance is in parallel with this LC circuit and lowers its resonant frequency. Shortening the transmission line effectively lowers the inductance of the LC circuit so that the resonant frequency can be raised back up to the nominal operating frequency. As a result, the parasitic capacitance is eliminated or tuned out. As built in this modulator, the quarter wave transmission lines 221, 223 and 225 are slightly shorter than an actual quarter wave length to optimize the input/output impedance of the modulator 200. 
     Halfwave transmission line 205&#39; is used to produce a 180 degree phase shift in the RF input signal applied at input port 201 as it traverses through the signal path 205 to the output port 251. Halfwave transmission line 205&#39; is exactly one half wavelength at the desired operating frequency. When diode 209 is turned on by the modulating signal 211 the RF input CW signal at input port 201 is connected to the RF output port 251 and is shifted in phase an amount φ, determined by the physical layout of signal path 203. The signal path 205 containing diode 207 is identical in layout with the exception of the addition of the halfwave element 205&#39; which provides a 180 degree phase shift. Consequently, when diode 207 is turned on, the RF input signal applied at input port 201 is connected to the RF output port 251 and shifted in phase by φ plus 180 degrees. Hence, the phase difference between the two possible output signals is 180 degrees resulting in a 180 degree biphase modulation impressed on the RF input signal applied at input port 201. If the layouts of the common parts of the direct signal path 203 and the phase shifted signal path 205 are slightly different, the difference in φ between the two signal paths can be compensated for by adjusting the length of halfwave transmission line 205&#39; so that the phase difference between the two signal paths is exactly 180 degrees. 
     The preferred method of practicing the invention involves modulating an input signal with a data signal utilizing a biphase modulator. The method includes receiving an RF CW input signal at a predetermined frequency generally 2.0 GHz or above. The input signal is then switched using a diode switch between a plurality of signal paths based on the state of a first and second binary data signal which is supplied to the modulator. Since one of the signal paths includes a means for phase shifting, this has the result of changing the phase of the input signal based on the switching of the diode switch. The phase of the signal may be changed 180 degrees using a halfwave transmission line or the like. Finally the input signal is combined with either of said first or second data signals to produce a biphase modulated output signal. 
     While the preferred embodiments of the invention have been illustrated and described, it will be clear that the invention is not so limited. Nnmerous modifications, changes, variations, substitutions and equivalents will occur to those skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims.