Abstract:
A rearview assembly for a vehicle is provided that includes: a housing configured for mounting to the vehicle; a rearview element disposed in the housing that displays images of a scene exterior of the vehicle; a light sensor assembly disposed in the housing; and a controller for receiving the electrical signal of the light sensor and for adjusting a brightness of the images displayed by the rearview element. The light sensor includes a light sensor for outputting an electrical signal representing intensity of light impinging upon a light-receiving surface of the light sensor, and a secondary optical element configured to receive light, wherein the light passes through the secondary optical element to the light sensor, the secondary optical element including a tint material that is substantially color neutral for attenuating light passing therethrough.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation-in-part of U.S. patent application Ser. No. 13/764,971, filed on Feb. 12, 2013, entitled “LIGHT SENSOR,” the entire disclosure of which is incorporated by reference. This application claims the priority benefit of U.S. Provisional Patent Application No. 61/858,820 entitled “LIGHT SENSOR HAVING PARTIALLY OPAQUE OPTIC,” filed on Jul. 26, 2013, by Barry K. Nelson et al., the entire disclosure of which is incorporated herein by reference. 
    
    
     FIELD OF THE INVENTION 
     The present invention generally relates to light sensors, and more particularly relates to light sensors used in rearview assemblies of vehicles. 
     SUMMARY OF THE INVENTION 
     According to one embodiment, a display assembly for a vehicle is provided that comprises: a housing configured for mounting to the vehicle; a display element disposed in the housing that displays images of a scene exterior of the vehicle; a light sensor assembly disposed in the housing; and a controller for receiving the electrical signal of the light sensor and for adjusting a brightness of the images displayed by the display element. The light sensor comprises: a light sensor for outputting an electrical signal representing intensity of light impinging upon a light-receiving surface of the light sensor; and a secondary optical element configured to receive light, wherein the light passes through the secondary optical element to the light sensor, the secondary optical element including a tint material that is substantially color neutral for attenuating light passing therethrough. 
     According to another embodiment, a rearview assembly for a vehicle is provided that comprises: a housing configured for mounting to the vehicle; a rearview element disposed in the housing that presents images of a scene rearward of the vehicle; a light sensor assembly disposed in the housing, the light sensor comprising: a light sensor for outputting an electrical signal representing intensity of light impinging upon a light-receiving surface of the light sensor; a secondary optical element configured to receive light, wherein the light passes through the secondary optical element to the light sensor, the secondary optical element including a tint material that is substantially color neutral for attenuating light passing therethrough; and a controller for receiving the electrical signal of the light sensor and for adjusting a brightness of the images presented by the rearview element. 
     According to another embodiment, a light sensor is provided that comprises: an exposed light transducer operative to accumulate charge in proportion to light incident on the exposed light transducer over an integration period; a shielded light transducer shielded from light, the shielded light transducer having substantially the same construction as the exposed light transducer, the shielded light transducer operative to accumulate charge in proportion to noise over the integration period; and a light-to-pulse circuit in communication with the exposed light transducer and the shielded light transducer, the light-to-pulse circuit operative to output a pulse having a pulse width based on the difference between the charges accumulated by the exposed and shielded light transducers, wherein the light-to-pulse circuit includes a one shot logic circuit that contributes to generation of the pulse. 
     According to another embodiment, a light sensor package is provided that comprises: an enclosure having a window for receiving light, the enclosure admitting at least a power connection pad, a ground connection pad, and an input/output pad; a capacitor provided at the input/output pad and connected between the input/output pad and ground for blocking static electricity; an exposed light transducer disposed within the enclosure, the exposed light transducer operative to accumulate charge in proportion to light received through the window incident on the exposed light transducer over an integration period; and a light-to-pulse circuit in communication with the exposed light transducer, the light-to-pulse circuit operative to output a pulse on the output pin, the pulse width based on the charge accumulated by the exposed light transducer. 
     According to another embodiment, a light sensor package is provided that comprises: an enclosure having a window for receiving light, the enclosure admitting at least a power connection pad, a ground connection pad, and an input/output pad; an input low pass filter provided at the input/output pad for blocking electromagnetic interference; an exposed light transducer disposed within the enclosure, the exposed light transducer operative to accumulate charge in proportion to light received through the window incident on the exposed light transducer over an integration period; and a light-to-pulse circuit in communication with the exposed light transducer, the light-to-pulse circuit operative to output a pulse on the output pin, the pulse width based on the charge accumulated by the exposed light transducer. 
     According to another embodiment, a light sensor is provided that comprises: an exposed light transducer operative to accumulate charge in proportion to light incident on the exposed light transducer over an integration period; a light-to-pulse circuit in communication with the exposed light transducer, the light-to-pulse circuit operative to output a pulse having a pulse width based on the charge accumulated by the exposed light transducer; and a bandgap voltage reference circuit for receiving power from a power source and for generating a set of stable reference voltages to the light-to-pulse circuit, wherein the bandgap voltage reference circuit generates a constant current from the supply voltage supplied by the power supply and wherein the bandgap voltage reference circuit comprises a resistive ladder through which the constant current is passed to generate the set of stable reference voltages. 
     According to another embodiment, a light sensor is provided that comprises: an exposed light transducer operative to accumulate charge in proportion to light incident on the exposed light transducer over an integration period; a light-to-pulse circuit in communication with the exposed light transducer, the light-to-pulse circuit operative to output a pulse having a pulse width based on the charge accumulated by the exposed light transducer; and a bandgap voltage reference circuit for receiving power from a power source having a supply voltage level in a range of about 3.3V to about 5.0V, and for generating a set of stable reference voltages throughout the supply voltage level range to the light-to-pulse circuit. 
     According to another embodiment, a light sensor package is provided that comprises: an enclosure having a window for receiving light, the enclosure admitting at least a power connection pad, a ground connection pad, and an input/output pad; an exposed light transducer disposed within the enclosure, the exposed light transducer operative to accumulate charge in proportion to light received through the window incident on the exposed light transducer over an integration period; a light-to-pulse circuit in communication with the exposed light transducer, the light-to-pulse circuit operative to output a pulse on the output pin, the pulse width based on the charge accumulated by the exposed light transducer over the integration period; and a nonvolatile memory within the enclosure for storing data from which calibration data may be obtained for the light sensor. 
     These and other features, advantages, and objects of the present invention will be further understood and appreciated by those skilled in the art by reference to the following specification, claims, and appended drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       In the drawings: 
         FIG. 1  is an electrical circuit diagram in block and schematic form of a light sensor in which embodiments of the inventive light-to-pulse circuit may be implemented; 
         FIG. 2  is a timing diagram illustrating operation of the circuitry of  FIG. 1 ; 
         FIG. 3  is an electrical circuit diagram in block and schematic form illustrating a light-to-pulse circuit with noise compensation according to a prior conventional construction; 
         FIG. 4  is a timing diagram illustrating operation of the light sensor of  FIG. 3 ; 
         FIG. 5  is a schematic diagram of an implementation of the light sensor of  FIG. 3  using photodiodes as light transducers; 
         FIG. 6  is an electrical circuit diagram in block and schematic form of a light-to-pulse circuit according to one embodiment of the present invention; 
         FIG. 7  is an electrical circuit diagram in block and schematic form of a one shot logic circuit that may be used in the light-to-pulse circuit shown in  FIG. 6 ; 
         FIG. 8  is an electrical circuit diagram in block and schematic form of a bandgap voltage reference block that may be used in the light-to-pulse circuit shown in  FIG. 6 ; 
         FIG. 9  is a drawing illustrating vehicle rearview mirrors that may incorporate the light sensors of the present invention; 
         FIG. 10  is a block diagram of an embodiment using the light sensors of the present invention; 
         FIG. 11  is an electrical circuit diagram in block and schematic form of an alternative light sensor package in which embodiments of the inventive light-to-pulse circuit may be implemented; 
         FIG. 12  is a rear perspective view of a rearview assembly incorporating at least one of the light sensors described herein; and 
         FIG. 13  is a plot of opto-electric sensitivity versus wavelength of four light sensors. 
     
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
     Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or like parts. In the drawings, the depicted structural elements are not to scale and certain components are enlarged relative to the other components for purposes of emphasis and understanding. 
     The embodiments described herein are improvements to the light sensor as disclosed in commonly-assigned U.S. Pat. No. 6,359,274, the entire disclosure of which is incorporated herein by reference. The photodiode light sensor circuitry as disclosed in U.S. Pat. No. 6,359,274 is shown in  FIG. 1  and includes a light sensor  48  and control logic circuitry  56  responsive to the sensor, which is interconnected by a single line carrying both integration control and sensor outputs. Light sensor  48  includes an enclosure  100  with a window  102  admitting light  104  incident on an exposed light transducer  106 . Enclosure  100  admits a power pin  108 , a ground pin  110 , and a signal pin  112 . 
     Light sensor  48  is connected to control logic  56  through an interconnection signal  114  between signal pin  112  in light sensor  48  and signal pin  116  in control logic  56 . Signal pins  112 , 116  are tri-state ports permitting interconnect signal  114  to provide both an input to light sensor  48  and an output from light sensor  48 . Control logic  56  may include an FET Q 1  connected between signal pin  116  and ground. FET Q 1  is controlled by a control line  118  connected to the base of Q 1 . A buffer  120  is also connected to signal pin  116 . 
     Within light sensor  48 , an FET Q 2  is connected between signal pin  112  and ground. FET Q 2  is controlled by an output pulse  122  connected to the gate of Q 2 . A constant current source  124  is connected to signal pin  112  so that if neither Q 1  nor Q 2  is on, interconnect signal  114  is pulled high. Constant current source  124  nominally sources about 0.5 mA to pull up interconnect signal  114 . The input of a Schmidt trigger inverter  126  is connected to signal pin  112 . Schmidt trigger inverter  126  is followed by inverters  128  and  130  in series. The output of inverter  130  clocks a D flip-flop  132 . The output of a multiplexer  134  is connected to the D input of flip-flop  132 . The select input of multiplexer  134  is driven by output pulse  122  such that when output pulse  122  is asserted, the D input of flip-flop  134  is unasserted and when output pulse  122  is not asserted, the D input of flip-flop  134  is asserted. The output of a NAND gate  136  is connected to a low asserting reset  138  of flip-flop  132 . The output of flip-flop  132  is an integration pulse  140 . Integration pulse  140  and the output of inverter  128  are inputs to NAND gate  136 . A light-to-pulse circuit  142  accepts integration pulse  140  and the output of exposed light transducer  106  and produces output pulse  122 . Two of the several disclosed embodiments for light-to-pulse circuit  142  are described below with regard to  FIGS. 3-5 . 
     Light sensor  48  may include a shielded light transducer  144  which does not receive light  104 . Light-to-pulse circuit  142  uses the output of shielded light transducer  144  to reduce the effects of noise in exposed light transducer  106 . 
     Referring now to  FIG. 2 , a timing diagram illustrating operation of the circuitry of  FIG. 1  is shown. Initially, low asserting interconnect signal  114  is high. The state of flip-flop  132  must be zero for, if the state is one, both inputs to NAND gate  136  would be high, asserting reset  138  and forcing the state of flip-flop  132  to zero. 
     At time  150 , control logic  56  asserts control line  118  turning transistor Q 1  on. Interconnect signal  114  is then pulled low at time  152 . The output of inverter  130  transitions from low to high setting the state of flip-flop  132  to one which causes integration pulse  140  to become asserted at time  154 . Light-to-pulse circuit  142  begins integrating light  104  incident on exposed light transducer  106 . At time  156 , control line  118  is brought low turning transistor Q 1  off. The difference between time  156  and time  150  is the integration period  158  requested by control logic  56 . Since both Q 1  and Q 2  are off, interconnect signal  114  is pulled high by current source  124  at time  160 . Since the output of inverter  128  and integration pulse  140  are both high, reset  138  is asserted causing the state of flip-flop  132  to change to zero and integration pulse  140  to become unasserted at time  162 . This signals light-to-pulse circuit  142  to stop integrating light  104  incident on exposed light transducer  106 . 
     At time  164 , light-to-pulse circuit  142  asserts output pulse  122  to begin outputting light intensity information. Asserting output pulse  122  turns transistor Q 2  on, pulling interconnect signal  114  low at time  166 . This causes inverter  130  to output a low-to-high transition clocking a zero as the state of flip-flop  132 . Light-to-pulse circuit  142  deasserts output pulse  122  at time  168 . The difference between time  168  and time  164  is a light intensity period  170  indicating the amount of light  104  incident on exposed light transducer  106  over integration period  158 . Transistor Q 2  is turned off when output pulse  122  goes low at time  168 . Since both transistors Q 1  and Q 2  are off, interconnect signal  114  is pulled high at time  172 . Buffer  120  in dimming logic  56  detects the transitions in interconnect signal  114  at times  166  and  172 . The difference in time between times  172  and  166  is used by dimming logic  56  to determine the intensity of light  104  received by light sensor  48 . 
     If shielded light transducer  144  is included in light sensor  48 , the difference in time between the deassertion of integration pulse  140  at time  162  and the assertion of output pulse  122  at time  164  is due, in part, to the thermal noise in light sensor  48 . This difference is expressed as thermal noise period  174 . Thermal noise period  174  may be used by dimming logic  56  to determine the temperature of light sensor  48  or may be more simply used to determine if the noise level in sensor  48  is too high for a reliable reading. The ability of light sensor  48  to use the output from shielded light transducer  144  to generate output pulse  122  indicative of the amount of thermal noise in light sensor  48  is described with regard to  FIG. 3  below. 
     Referring now to  FIG. 3 , a schematic diagram illustrating operation of a light sensor having a pulse output according to an embodiment of the present invention is shown. Light-to-pulse circuit  142  includes an exposed light transducer  106  for converting light  104  incident on exposed light transducer  106  into charge accumulated in light storage capacitor  304 , indicated by C SL , and a shielded light transducer  144  and associated electronics. Exposed light transducer  106  may be any device capable of converting light  104  into charge, such as the photogate sensor described in U.S. Pat. No. 5,471,515 entitled “Active Pixel Sensor With Intra-Pixel Charge Transfer” to E. Fossum et al., which is incorporated herein by reference. Preferably, light transducer  106  is a photodiode such as is described with regards to  FIG. 5  below. Except as noted, the following discussion does not depend on a particular type or construction for exposed light transducer  106 . 
     Light-to-pulse circuit  142  operates under the control of sensor logic  306 . Sensor logic  306  generates a reset signal  308  controlling a switch  310  connected between exposed light transducer output  312  and V DD . Sensor logic  306  also produces a sample signal  314  controlling a switch  316  between exposed light transducer output  312  and a light storage capacitor  304 . The voltage across light storage capacitor  304 , light storage capacitor voltage  318 , is fed into one input of a comparator  320 . The other input of comparator  320  is a ramp voltage  322  across a ramp capacitor  324 . Ramp capacitor  324  is in parallel with a current source  326  generating current I R . Sensor logic  306  further produces a ramp control signal  328  controlling a switch  330  connected between ramp voltage  322  and V DD . Comparator  320  produces a comparator output  332  based on the relative levels of light storage capacitor voltage  318  and ramp voltage  322 . Sensor logic  306  may generate reset signal  308 , sample signal  314 , and ramp control signal  330  based on internally generated timing or on externally generated integration pulse  140  as described with regard to  FIG. 4  below. 
     Shielded light transducer  144  may have the same construction as exposed light transducer  106 . However, shielded light transducer  144  does not receive light  104 . Charge generated by shielded light transducer  144 , therefore, is only a function of noise. This noise is predominately thermal in nature. If shielded light transducer  144  has the same construction as exposed light transducer  106 , the noise signal produced by shielded light transducer  144  will closely approximate the same noise within the signal produced by exposed light transducer  106 . By subtracting the signal produced by shielded light transducer  144  from the signal produced by exposed light transducer  106 , the effect of noise in light transducer  106  can be greatly reduced. 
     Reset signal  308  controls a switch  382  connected between a shielded transducer output  384  and V DD . Sample signal  314  controls a switch  386  connected between shielded transducer output  384  and a noise storage capacitor  388 , indicated by C SN . The voltage across noise storage capacitor  388 , noise storage capacitor voltage  390 , is one input to a comparator  392 . The second input to comparator  392  is ramp voltage  322 . The output of comparator  392 , noise comparator output  394 , and comparator output  332  serve as inputs to exclusive-OR gate  396 . Exclusive-OR gate  396  generates an exclusive-OR output  398  corresponding to output pulse  122  indicating the intensity of light  104 . 
     Referring now to  FIG. 4 , a timing diagram illustrating operation of the light-to-pulse circuit  142  of  FIG. 3  is shown. A measurement cycle is started at time  340  when sample signal  314  is asserted while reset signal  308  is asserted. Switches  310  and  316  are both closed charging light storage capacitor  304  to V DD  as indicated by voltage level  342  in light storage capacitor voltage  318 . Similarly, switches  382  and  386  are both closed charging noise storage capacitor  388  to V DD  as indicated by voltage level  410  in noise storage capacitor voltage  390 . At time  344 , reset signal  308  is deasserted opening switch  310  and beginning integration period  346 . During integration period  346 , light  104  incident on exposed light transducer  106  generates negative charge causing declining voltage  348  in light storage capacitor voltage  318 . The deassertion of reset signal  308  also opens switch  382  and causes declining voltage  412  in noise storage capacitor voltage  390  from charge produced by shielded light transducer  144  due to noise. At time  350 , ramp control signal  328  is asserted closing switch  330  and charging ramp capacitor  324  so that ramp voltage  322  is V DD  as indicated by voltage level  352 . At time  354 , sample signal  314  is deasserted causing switches  316  and  386  to open, thereby ending integration period  346 . At some time  356  following time  354  and prior to the next measurement cycle, reset signal  308  is asserted closing switches  310  and  382 . At time  358 , ramp control signal  328  is deasserted opening switch  330 . This causes ramp capacitor  324  to discharge at a constant rate through current source  326  as indicated by declining voltage  360  in ramp voltage  322 . Initially, as indicated by voltage level  362 , light comparator output  332  is unasserted because ramp voltage  322  is greater than light storage capacitor voltage  318 . Also initially, as indicated by voltage level  414 , noise comparator output  394  is unasserted because ramp voltage  322  is greater than noise storage capacitor voltage  390 . Since light comparator output  332  is also unasserted, output  398  from exclusive-OR gate  396  is unasserted as indicated by voltage level  416 . At time  418 , ramp voltage  322  drops below the level of noise storage capacitor voltage  390 , causing noise comparator output  394  to become asserted. Since noise comparator output  394  and light comparator output  332  are different, output  398  from exclusive-OR gate  396  is asserted. At time  364 , ramp voltage  322  drops beneath the level of light storage capacitor voltage  318 , causing light comparator output  332  to become asserted. Since both noise comparator output  394  and light comparator output  332  are now asserted, output  398  from exclusive-OR gate  396  now becomes unasserted. The difference between time  364  and time  418 , output pulse duration  420 , has a time period proportional to the intensity of light  104  incident on exposed light transducer  106  less noise produced by shielded light transducer  144  over integration period  346 . The duration between time  418  and time  358 , noise duration  422 , is directly proportional to the amount of noise developed by shielded light transducer  144  over integration period  346 . Since the majority of this noise is thermal noise, noise duration  422  is indicative of shielded light transducer  144  temperature. Comparator outputs  332  and  394  remain asserted until time  366  when ramp control signal  328  is asserted closing switch  330  and pulling ramp voltage  322  to V DD . 
     Referring now to  FIG. 5 , a schematic diagram is shown of a second implementation of the light-to-pulse circuit  142  and light sensor  48  of  FIG. 1  where photodiodes are used as light transducers. Light-to-pulse circuit  142  is implemented using an exposed photodiode  430  for exposed light transducer  106  and a shielded photodiode  432  for shielded light transducer  144 . The anode of exposed photodiode  430  is connected to ground and the cathode is connected through a transistor Q 20  to V DD . The base of transistor Q 20  is controlled by reset signal  308 . Hence, transistor Q 20  functions as switch  310 . Transistors Q 21  and Q 22  are connected in series between V DD  and ground to form a buffer, shown generally by  434 . The base of transistor Q 21  is connected to the cathode of exposed photodiode  430 . The base of load transistor Q 22  is connected to a fixed voltage V B . The output of buffer  434  is connected through a transistor Q 23  to light storage capacitor  304 . The base of transistor Q 23  is driven by sample signal  314 , permitting transistor Q 23  to function as switch  316 . The anode of shielded photodiode  432  is connected to ground and the cathode is connected to V DD  through a transistor Q 24 . The base of transistor Q 24  is driven by reset signal  308  permitting transistor Q 24  to function as switch  382 . Transistors Q 25  and Q 26  form a buffer, shown generally by  436 , isolating the output from shielded photodiode  432  in the same manner that buffer  434  isolates exposed photodiode  430 . Transistor Q 27  connects the output of buffer  436  to noise storage capacitor  388 . The base of transistor Q 27  is driven by sample signal  314  permitting transistor Q 27  to function as switch  386 . Typically, light storage capacitor  304  and noise storage capacitor  388  are 2 pF. Ramp capacitor  324 , typically 10 pF, is charged to V DD  through a transistor Q 28 . The base of transistor Q 28  is driven by ramp control signal  328  permitting transistor Q 28  to function as switch  330 . Ramp capacitor  324  is discharged through current source  326  at an approximately constant current I R  of 0.1 μA when transistor Q 28  is off. 
     Sensor power-up response is improved and the effective dynamic range extended by including circuitry to inhibit output if ramp voltage  322  drops beneath a preset voltage. Light-to-pulse circuit  142  includes a comparator  438  comparing ramp voltage  322  with an initialization voltage (V INIT )  440 . Comparator output  442  is ANDed with exclusive-OR output  398  by an AND gate  444  to produce AND gate output  446  corresponding to output pulse  122 . During operation, if ramp voltage  322  is less than initialization voltage  440 , output  446  is deasserted. The use of comparator  438  and AND gate  444  guarantees that output  446  is not asserted regardless of the state of light-to-pulse circuit  142  following power-up. In a preferred embodiment, the initialization voltage is 0.45 V. 
     Sensor logic  306  generates control signals  308 ,  314 ,  328  based on integration pulse  140  which may be generated internally or provided from an external source. A buffer  447  receives integration pulse  140  and produces sample control  314 . An odd number of sequentially connected inverters, shown generally as inverter train  448 , accepts sample control  314  and produces reset control  308 . A second set of odd numbered sequentially connected inverters, shown generally as inverter train  449 , accepts reset signal  308  and produces ramp control signal  328 . 
     The above described light sensors thus include light transducers which convert incident light into charge. This charge is collected over an integration period to produce a potential which is converted by the sensor into a discrete output. By varying the integration period, the sensitivity range of the sensor may be dynamically varied. 
     As described in detail below, the first embodiment improves upon the above described light sensor in several respects. First, the improved light sensor provides better noise performance and electromagnetic interference (EMI) immunity by utilizing a low pass filter at the input/output (I/O) pin of the sensor. Second, the improved light sensor ensures there is always an output pulse of some length such that the sensor does not appear as a bad sensor to any external circuitry by utilizing a one shot logic circuit at its output in place of exclusive-OR gate  396  in the prior light sensor shown in  FIGS. 3 and 5 . Third, the improved sensor provides dual voltage operating capability so as to run at either 3.3V or 5V V DDA . Fourth, the improved sensor provides improved static capability. Fifth, by using a different form of voltage regulator, the improved sensor provides greater stability in its output in the presence of power supply fluctuations. 
       FIG. 6  shows an improved light-to-pulse circuit  1142 , which includes an exposed light transducer shown in the form of an exposed photodiode  1430  and a shielded light transducer in the form of a shielded photodiode  1432 . Photodiodes  1430  and  1432  may have integral anti-bloom gates  1006  and  1008 , respectively, which receive an anti-bloom voltage V AB  that is supplied by a voltage reference block  1004 , as described further below. Likewise, photodiodes  1430  and  1432  may have integral transmission gates  1010  and  1012 , respectively, which receive a transmission voltage V TX  that is also supplied by voltage reference block  1004 . The functionality of anti-bloom gates  1006  and  1008  and transmission gates  1010  and  1012  are described further in the above-referenced U.S. Pat. No. 6,359,274 with reference to  FIGS. 25 and 26  thereof. 
     Light-to-pulse circuit  1142  further includes a sensor control block  1306  that is connected to an input/output (I/O) pad  1002 , which in turn is connected to I/O input pin  1112  on which I/O signal  1114  propagates as both input and output. Sensor control block  1306  receives an integration pulse  1140  from I/O pad  1002  and responds by generating a reset signal  1308 , a sample signal  1314 , and a ramp control signal  1328  in a manner similar to that discussed above with respect to sensor logic  306  in  FIGS. 3-5 . 
     The cathode of exposed photodiode  1430  is connected to voltage V DDA  via transmission gate  1010  and a switch  1310  that receives reset signal  1308  from sensor control block  1306 . A capacitor  1014  having a capacitance of 200 fF, for example, is coupled in parallel with exposed photodiode  1430 . A source follower  1434  has an input coupled to the cathode of exposed photodiode  1430  and acts as a buffer similar to buffer  434  in  FIG. 5 . The output of source follower  1434  is coupled to switch  1316 , which receives and is responsive to sample signal  1314 . Switch  1316  selectively couples the buffered output of exposed photodiode  1430  to a light storage capacitor  1304  having a capacitance of, for example, 6.5 pF. The voltage (Vsignal) across light storage capacitor  1304  is supplied to a comparator  1320 , which is described further below. 
     The cathode of shielded photodiode  1432  is connected to voltage V DDA  via transmission gate  1012  and a switch  1382  that receives reset signal  1308  from sensor control block  1306 . A capacitor  1016  having a capacitance of 200 fF, for example, is coupled in parallel with shielded photodiode  1432 . A source follower  1436  has an input coupled to the cathode of shielded photodiode  1432  and acts as a buffer similar to buffer  436  in  FIG. 5 . The output of source follower  1436  is coupled to switch  1386 , which receives and is responsive to sample signal  1314 . Switch  1386  selectively couples the buffered output of shielded photodiode  1432  to a noise storage capacitor  1388  having a capacitance of, for example, 6.5 pF. The voltage (Vdark) across noise storage capacitor  1388  is supplied to a comparator  1392 , which is described further below. 
     Light-to-pulse circuit  1142  further includes a ramp storage capacitor  1324  that is selectively charged to a voltage VRAMP or allowed to discharge via a switch  1330  that is controlled by a ramp control signal  1328 , which is supplied by sensor control block  1306 . The voltage (Vramp) across ramp storage capacitor  1324  is biased by biasing transistor  1030  that receives the signal VBIAS at its gate. VBIAS is supplied by bandgap voltage reference block  1004 . Vramp is supplied to a comparator  1438  and to comparators  1320  and  1392 . Comparator  1438  compares Vramp to VLIMIT, which is supplied by bandgap voltage reference block  1004  and supplies an output to an AND gate  1444  in a manner similar to how comparator  438  compares RAMP to V INT  and supplies an output to AND gate  444  in  FIG. 5 . Comparator  1320  compares Vsignal to Vramp and comparator  1392  compares Vdark to Vramp in much the same manner as comparators  320  and  392  in  FIGS. 3 and 5 . In fact, the general operation of the components of light-to-pulse circuit  1142  operate in a similar manner to that of light-to-pulse circuits  142  as described in  FIGS. 3-5 , and therefore the operation of the already described portion of light-to-pulse circuit  1142  will not be described further. 
     Light-to-pulse circuit  1142  differs from light-to-pulse circuits  142  in several respects. First, light-to-pulse circuit  1142  includes a capacitor  1022  provided at I/O pad  1002  and connected between the input line and ground. Capacitor  1022  may serve several purposes. A first purpose is for blocking static electricity. Capacitor  1022  may therefore be selected to have a capacitance such that the light sensor package is rated for at least 2 kV static protection. Such a capacitance may, for example, be 150 pF. This is a substantial improvement over the prior light sensors, which were rated for 500 V static protection and were therefore much more susceptible to static electricity. 
     The second purpose served by capacitor  1022  is to form an input filter  1024  with a resistance  1026  already existing within the I/O pad  1002 . Such resistance is approximately 100 ohm. Thus, adding a capacitor  1022  with the above-noted small capacitance creates a low pass input filter  1024 . This low pass input filter  1024  blocks electromagnetic interference (EMI) that otherwise disrupts operation of the sensor circuitry. The prior light sensors were susceptible to EMI at 900 MHz, which is the frequency at which cellular telephones operate. Thus, the prior light sensors sometimes stopped working properly when using a cell phone near the light sensor. Input filter  1024  blocks this EMI and passes the most stringent EMI testing requirements of automobile manufacturers. 
     Light-to-pulse circuit  1142  further differs from light-to-pulse circuits  142  in that it includes a one shot logic circuit  1020  in place of exclusive-OR gate  396 . One shot logic circuit  1020  provides an improvement because the exclusive-OR gate  396  sometimes does not output a pulse due to leakage currents, which may lead to improper determination of a sensor fault because it was previously thought that if there is not a return pulse, the sensor had failed. Also, with the exclusive-OR gate  396 , when the light level was initially very low and then increased, the output pulse would get smaller, go away, and then come back. This is because at such a low initial light level, it was possible that (with reference to  FIG. 4 ) the light storage capacitor voltage  318  exceeds the ramp voltage  322  before the noise storage capacitor voltage  390  exceeds the ramp voltage  322  thereby resulting in a negative reading that still produces a pulse that cannot be distinguished from a positive reading. Subsequently, as the light level increases, the points at which the light and noise storage capacitor voltages  318  and  390  exceed the ramp voltage  322  are so close together that no output pulse is produced. One shot logic circuit  1020  minimizes chances of this happening by contributing to generation of the output pulse  1122 . This is because one shot logic circuit  1020  in combination with AND gate  1444  always provides an output pulse of known length any time either or both Vdark or Vsignal exceeds Vramp. Thus, if both Vdark and Vsignal exceed Vramp in unison, one shot logic circuit  1020  and AND gate  1444  cooperate to output an output pulse  1122 , which pulls the signal  1114  low on pin  1112 . 
     An example of circuitry that may be used to implement one shot logic circuit  1020  is shown in  FIG. 7 . One shot logic circuit  1020  may include an AND gate  1040  that receives the output of comparator  1392  ( FIG. 6 ) in one input and receives an inverted output of comparator  1320  in the other input. One shot logic circuit  1020  may further include a first OR gate  1042  that receives the output of comparator  1392  in one input and receives the output of comparator  1320  in the other input. The output of AND gate  1040  is provided to an input of a second OR gate  1044  whose output is supplied to AND gate  1444  of  FIG. 6 . The output of first OR gate  1042  is provided to a clock (CLK) input terminal of a D flip-flop (DFF)  1046 . The output (Q) of DFF  1046  is provided to the other input of second OR gate  1044 . 
     As shown in  FIG. 7 , the DFF  1046  includes a reset (RST) terminal that is provided with an output of the circuitry provided below. A capacitor  1050  is provided that is selectively charged to a reference voltage V_OS_HI that is supplied by bandgap voltage reference circuit  1004  in  FIG. 6  when a switch  1052  is closed in response to the output of DFF  1046 . A biasing transistor  1054  is coupled in parallel with capacitor  1050  and the resultant voltage of capacitor  1050  is fed into a comparator  1048  where it is compared with a reference voltage V_OS_LO that is also supplied by bandgap voltage reference circuit  1004 . The output of comparator  1048  is inverted twice by inverters  1056  and  1058  before being supplied to the RST terminal of DFF  1046 . 
     The light sensor design of  FIGS. 1-5  is very susceptible to fluctuations in V DD  caused by static fluctuations and/or active noise on the power input line. In fact, static fluctuations in V DD  of +/−10% caused variations of output by as much as 80%. In addition, when powered by a switched power supply that is inadequately filtered, there is a rippling in V DD  that causes an inaccurate averaged output. Much of the inaccuracies and fluctuations occurred because V DD , which fluctuated itself, was used to derive various reference voltages used by the light sensor circuitry. Moreover, if the light sensor was calibrated at exactly 5 V and later V DD  is relatively stable but 4.5V, then the sensor was no longer calibrated. 
     To address these problems, light-to-voltage circuit  1142  includes a bandgap voltage reference block  1004 , which provides stable reference voltages (VTX, VAB, V_OS_HI, V_OS_LO, VBIAS) regardless of the stability of the voltage supply. When using bandgap voltage reference block  1004 , static fluctuations in V DD  of +/−10% only cause variations of output by about 2%. Thus, the light sensor is much more stable over static fluctuations. Because the bandgap voltage reference block  1004  is much more immune to such supply voltage variations, it allows use with less expensive switched power supplies that may have such variations. 
     Also, bandgap voltage reference block  1004  may be configured to operate at a 3.3V supply voltage VDDA while being tolerant of voltages as high as 5V while still providing stable reference voltages. Thus, bandgap voltage reference block  1004  receives power from a power source having a supply voltage level in a range of about 3.3V to about 5.0V, and for generating a set of stable reference voltages throughout the supply voltage level range to the light-to-pulse circuit. In this way, the light sensor is capable of operating at dual operating voltages 3.3V and 5V. 
       FIG. 8  shows an example of portions of a circuit that may be used as bandgap voltage reference block  1004 . In general, the circuit uses bandgap-derived bias voltages to generate constant currents. The constant currents are fed through resistive ladders to generate voltages. Supply-independent voltages, such as VTX, VAB, V_OS_HI, V_OS_LO, and VBIAS, are referenced to ground through a PMOS ladder. Supply-dependent voltages such as VLIMIT may be referenced to VDDA through a resistive ladder. The reference VRAMP may be generated by passing VDDA through a source follower similar to the source followers  1434  and  1436  used to read the outputs of photodiodes  1430  and  1432 . 
     Looking more specifically at  FIG. 8 , bandgap voltage reference circuit  1004  may include a bandgap circuit  1500  providing bandgap-derived bias voltages VBG, VSP, VBP, VBN_CONST, VBP_CONST, and VCP_CONST to various branches of the bandgap voltage reference circuit  1004 . In the portion of bandgap voltage reference circuit  1004  that is illustrated, four branches are shown in which a first branch is used to derive VRAMP, a second branch is used to derive VLIMIT, a third branch is used to derive VTX, VAB, V_OS_HI, and V_OS_LO, and a fourth branch is used to generate VBIAS. 
     The first branch includes a source follower  1502  having a first transistor  1504  whose source is connected to VDDA and also to its gate. The source follower  1502  further includes a second transistor  1506  having a source connected to the drain of first transistor  1504 , a gate connected to receive VBN_CONST from bandgap circuit  1500 , and a drain coupled to ground. The source follower  1502  generates a constant current I_CONST3 and a tap between transistors  1504  and  1506  supplies the reference voltage VRAMP, which is provided from bandgap voltage reference circuit  1004  to switch  1330  in  FIG. 6 . 
     The second branch includes a resistor ladder having a plurality of resistors  1510   1 - 1510   n  connected in series between VDDA and a source of a transistor  1512 , which has a drain coupled to ground and a gate coupled to bandgap circuit  1500  to receive voltage VBN_CONST. This second branch produces a constant current I_CONST1 such that a tap between the resistors supplies the reference voltage VLIMIT, which is provided from bandgap voltage reference circuit  1004  to an input of comparator  1438  in  FIG. 6 . As noted above, VLIMIT is a supply-dependent voltage. VLIMIT is selected to correspond to the voltage of the highest integrated charge one would ever expect to see from the photodiode  1430  shown in  FIG. 6 . 
     The third branch provides supply-independent voltages and includes a first PMOS transistor  1520  having a source connected to VDDA and a gate connected to bandgap circuit  1500  to receive voltage VBP_CONST, and a second PMOS transistor  1522  having a source coupled to a drain of first PMOS transistor  1522 , a gate connected to bandgap circuit  1500  to receive voltage VCP_CONST, and a drain connected to a resistor ladder including a plurality of resistors  1525   1 - 1525   n  connected in series between the drain of second PMOS transistor  1522  and ground. The third branch produces a constant current I_CONST1 that passes through the resistor ladder. A plurality of taps is provided at different points between the resistors to supply: the reference voltage VTX, which is provided from bandgap voltage reference circuit  1004  to switches  1010  and  1012  in  FIG. 6 ; the reference voltage VAB, which is provided from bandgap voltage reference circuit  1004  to switches  1006  and  1008 ; and the reference voltages V_OS_HI and V_OS_LO, which are provided from bandgap voltage reference circuit  1004  to one shot logic circuit in  FIGS. 6 and 7 . 
     The fourth branch includes a first transistor  1532 , a second transistor  1534 , a third transistor  1536 , a fourth transistor  1538 , a fifth transistor  1540 , a sixth transistor  1546 , a seventh transistor  1548 , an eighth transistor  1550 , and a resistor  1542 . First transistor  1532  and third transistor  1536  both have their sources coupled to VDDA, their gates coupled together, and their drains coupled to the sources of second transistor  1534  and fourth transistor  1538 , respectively. The gates of second transistor  1534  and fourth transistor  1538  are coupled together. The drain of second transistor  1534  is coupled to the gates of first transistor  1532  and third transistor  1536 , and is also coupled to the source of fifth transistor  1540 . The gate of fifth transistor  1540  is coupled to bandgap circuit  1500  so as to receive voltage VBG. The drain of fifth transistor  1540  is coupled to ground via resistor  1542 . Sixth transistor  1546  has a source coupled to VDDA, a gate coupled to bandgap circuit  1500  so as to receive voltage VBP, and a drain coupled to the source of seventh transistor  1548 . Seventh transistor  1548  has a gate coupled to bandgap circuit  1500  so as to receive voltage VCP, and a drain coupled to both the source and the gate of eighth transistor  1550 . Also coupled to the source and the gate of eighth transistor  1550  is the drain of fourth transistor  1538 . The drain of eighth transistor  1550  is coupled to ground. The fourth branch includes a tap between the drain of seventh transistor  1548  and the source of eighth transistor  1550  that supplies the reference voltage VBIAS, which is provided from bandgap voltage reference circuit  1004  to a gate of transistor  1030  in  FIG. 6 . The current flowing through the sixth through eighth transistors is temperature independent. 
     The actual packaging of the light sensors described above may take any of the forms described in U.S. Pat. No. 7,543,946, the entire disclosure of which is incorporated herein by reference. 
     Referring now to  FIG. 9 , a drawing illustrating vehicle rearview mirrors that may incorporate the light sensor of the present invention is shown. A vehicle  20  is driven by an operator  22 . Operator  22  uses an interior rearview mirror  24  and one or more exterior rearview mirrors  26  to view a rearward scene, shown generally by  28 . Most of the time, operator  22  is looking forward through a windshield  30 . The eyes of operator  22  therefore adjust to ambient light  32  coming from a generally forward direction. A relatively bright light source in rearward scene  28  may produce light which can reflect from mirrors  24 ,  26  to temporarily visually impair, distract, or dazzle operator  22 . This relatively strong light is known as glare  34 . 
     To reduce the impact of glare  34  on operator  22 , the reflectance of mirrors  24 ,  26  may be reduced. Prior to automatically dimming mirrors, interior rearview mirror  24  would contain a prismatic reflective element that could be manually switched by operator  22 . Automatically dimming mirrors include a light sensor for glare  34  and, typically, for ambient light  32 , and dim one or more mirrors  24 ,  26  in response to the level of glare  34 . 
     Referring now to  FIG. 10 , a block diagram of an embodiment of the present invention is shown. A dimming element, shown generally by  40 , includes a variable transmittance element  42  and a reflective surface  44 . Dimming element  40  is positioned such that reflective surface  44  is viewed through variable transmittance element  42 . Dimming element  40  exhibits variable reflectance of light in response to a dimming element control signal  46 . An ambient light sensor  48  is positioned to receive ambient light  32  from generally in front of vehicle  20 . Ambient light sensor  48  produces a discrete ambient light signal  50  indicating the amount of ambient light  32  incident on ambient light sensor  48  over an ambient light integration period. A glare sensor  52  is positioned to detect glare  34  from generally behind vehicle  20  and may optionally be placed to view glare  34  through variable transmittance element  42 . Glare sensor  52  produces a discrete glare signal  54  indicating the amount of glare  34  incident on glare sensor  52  over a glare integration period. Dimming/brightness control logic  56  receives ambient light signal  50  and determines an ambient light level. Dimming/brightness control logic  56  determines the glare integration period based on the level of ambient light  32 . Dimming/brightness control logic  56  receives glare signal  54  and determines the level of glare  34 . Dimming logic  56  outputs dimming element control signal  46 , setting the reflectance of dimming element  40  to reduce the effects of glare  34  perceived by operator  22 . 
     Either glare sensor  52 , ambient light sensor  48  or both are sensors that include light transducers which convert incident light into charge. This charge is collected over an integration period to produce a potential which is converted by sensor  48 ,  52  into a discrete output. Embodiments for light sensors  48 ,  52  are described with regard to  FIGS. 6-8  above. 
     One difficulty with silicon-based sensors is the difference in spectral sensitivity between silicon and the human eye. An ambient light filter  58  may be placed before or incorporated within ambient light sensor  48 . Similarly, a glare filter  60  may be placed before or incorporated within glare sensor  52 . Filters  58 ,  60  attenuate certain portions of the spectrum that may include visible light, infrared, and ultraviolet radiation such that light sensors  48 ,  52  combine with the frequency response of light transducers within sensors  48 ,  52  to more closely approximate the response of the human eye and to compensate for tinting in vehicle windows such as windshield  30 . Alternatively, filters  58 ,  60  may attenuate light across the visible spectrum as discussed further below. 
     Variable transmittance element  42  may be implemented using a variety of devices. Dimming may be accomplished mechanically as described in U.S. Pat. No. 3,680,951 entitled “Photoelectrically-Controlled Rear-View Mirror” to Jordan et al., and U.S. Pat. No. 4,443,057 entitled “Automatic Rearview Mirror For Automotive Vehicles” to Bauer et al., each of which is incorporated herein by reference. Variable transmittance element  42  may be formed using liquid crystal cells as is described in U.S. Pat. No. 4,632,509 entitled “Glare-Shielding Type Reflector” to Ohmi et al., which is incorporated herein by reference. Preferably, variable transmittance element  42  is an electrochromic cell which varies its transmittance in response to an applied control voltage such as is described in U.S. Pat. No. 4,902,108 entitled “Single-Compartment, Self-Erasing, Solution-Phase Electrochromic Devices, Solutions For Use Therein, And Uses Thereof” to Byker, which is incorporated herein by reference. Many other electrochromic devices may be used to implement dimming element  40 . As will be recognized by one of ordinary skill in the art, the present invention does not depend on the type or construction of dimming element  40 . If dimming element  40  includes electrochromic variable transmittance element  42 , reflective surface  44  may be incorporated into variable transmittance element  42  or may be external to variable transmittance element  42 . 
     Each interior rearview mirror  24  and exterior rearview mirror  26  may include dimming element  40  for automatic dimming. Interior rearview mirror  24  may also include dimming/brightness control logic  56 , light sensors  48 ,  52 , and, if used, filters  58  and  60 . Additionally, interior rearview mirror  24  may include a display, which may be positioned adjacent to or behind the reflective surface  44  of mirror element  40 . Dimming/brightness control  56  can also be responsive to the outputs of ambient sensor  48  and/or glare sensor  52  to control the brightness of the display. 
     The light sensors described herein may be implemented in various ways as disclosed in U.S. Pat. No. 7,543,946, U.S. Patent Application Publication Nos. US 2012/0330504 A1 and US 2013/0032704 A1, the entire disclosures of which are incorporated herein by reference. 
       FIG. 12  shows the back of a rearview mirror assembly  24  having a mirror mount  254 , a housing  256 , and one or more ambient light sensors  48 ,  48   a  including a secondary optic  258 ,  258   a . The secondary optic may incorporate a filter  58  in the form of a tinting material. The tinting material may be a pigment that is neutral in color, such as a gray color so as to attenuate the amount of light reaching the sensing element. Such a tinted secondary optic  258  beneficially attenuates light uniformly across the visible spectrum since the light sensor described herein is much more sensitive to low light levels than prior light sensors. Such increased spectral sensitivity may cause the light sensor to otherwise be overly sensitive to high light levels.  FIG. 13  shows the attenuation levels of providing a smoke gray tint filter in front of the light sensing element versus light sensors with no such filters. The smoke gray tint filter is considered to be spectrally neutral. 
     Another advantage to providing such dark tinting in the outermost secondary optic  258  is that it improves the ascetics of the mirror assembly as many mirror housings  256  are black or gray. Prior secondary optics often included a white diffusant material which made the sensor(s) appear to be bright white and thereby have a very high contrast relative to the black or gray mirror housings. By darkening secondary optic  258 , the light sensor becomes less visible and blends in with the housing  256 . 
     Although not shown in  FIG. 12 , the gray tinting may also be used in a secondary optic used for a glare light sensor  52  or may be used in other light sensors in the rearview mirror or in the vehicle. 
     Due to manufacturing variances, most light sensors respond to light differently. To get each mirror to respond to light in the same way, each mirror may be calibrated. Currently, this is done in testers after circuit board assembly. The light sensor component in the mirror assembly is exposed to specific amounts of light and a compensation factor is written into the control circuitry within the mirror assembly. Such a manner of calibration is not particularly desirable as it is more desirable to calibrate each individual light sensor before it is populated onto the circuit board. One way to get around this is to have the calibration factor of each light sensor component be part of that individual light sensor. By incorporating a nonvolatile memory (NVM) device  1600  into each light sensor component, as shown in  FIG. 11 , the calibration factors for the given light sensor, such as offset and integration times, can be written into the memory  1600  during the initial testing of the light sensor in component testing. These calibration factors can then be read and written into the mirror control circuit after the light sensor component is assembled into the mirror eliminating the current calibration processes. 
     Another way to accomplish this would be to have a serial number written to the memory  1600  and the calibrations for the individual light sensor component written into network storage. After the light sensor component is assembled into the mirror, the serial number could be read and the corresponding compensation factors downloaded from the network into the mirror control circuit. 
     The memory  1600  could be an individual die and may not have any direct functional connection with the light sensor die. The light sensor will function as normal as if the memory die were left out of the assembly. 
     Although not currently claimed, the following text is provided to form the basis for future claims: 
     A1. A light sensor package comprising: 
     an enclosure having a window for receiving light, the enclosure admitting at least a power connection pad, a ground connection pad, and an input/output pad; 
     a capacitor provided at the input/output pad and connected between the input/output pad and ground for blocking static electricity; 
     an exposed light transducer disposed within the enclosure, the exposed light transducer operative to accumulate charge in proportion to light received through the window incident on the exposed light transducer over an integration period; and 
     a light-to-pulse circuit in communication with the exposed light transducer, the light-to-pulse circuit operative to output a pulse on the output pin, the pulse width based on the charge accumulated by the exposed light transducer. 
     A2. The light sensor package of claim A1, wherein the capacitor is part of an input low pass filter provided at the input/output pad for blocking electromagnetic interference. 
     A3. The light sensor package of claim A1, wherein the capacitor is configured such that the light sensor package is rated for at least 2 kV static protection. 
     A4. The light sensor package of claim A1 and further comprising a bandgap reference circuit for receiving power from a power source having a supply voltage level in a range of about 3.3V to about 5.0V, and for generating a set of stable reference voltages throughout the supply voltage level range to the light-to-pulse circuit. 
     A5. The light sensor package of claim A1 and further comprising a bandgap voltage reference circuit for receiving power from a power source and for generating a set of stable reference voltages to the light-to-pulse circuit, wherein the bandgap voltage reference circuit generates constant currents from the supply voltage supplied by the power supply and wherein the bandgap voltage reference circuit comprises resistive ladders through which the constant currents are passed to generate the set of stable reference voltages. 
     A6. A rearview assembly for a vehicle comprising: 
     a rearview device for providing a rearward view to a driver of the vehicle; 
     the light sensor package of claim A1; and 
     a mounting mechanism adapted for mounting the rearview device and the light sensor package to the vehicle. 
     The above description is considered that of the preferred embodiments only. Modifications of the invention will occur to those skilled in the art and to those who make or use the invention. Therefore, it is understood that the embodiments shown in the drawings and described above are merely for illustrative purposes and not intended to limit the scope of the invention, which is defined by the claims as interpreted according to the principles of patent law, including the doctrine of equivalents.