Abstract:
A radio apparatus includes a first variable-gain circuit, a second variable-gain circuit, and a demodulator, wherein a band-pass filter is provided between the first and second variable-gain circuits and the demodulator inputs an output of the second variable-gain circuit. An error occurrence probability is detected from an output of the demodulator and a signal level is detected from the output of the second variable-gain circuit. A received signal strength is estimated from the signal level of the output of the second variable-gain circuit using an aggregate gain from the first variable-gain circuit to the second variable-gain circuit, and then the respective first and second gains of the first and second variable-gain circuits are changed in opposite directions depending on the error occurrence probability and the estimated received signal strength.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention generally relates to automatic gain control (AGC) and, in particular to gain controller and gain control method for a radio receiver. 
     2. Description of the Related Art 
     Hereinafter, the meaning and interpretation of a term &#34;gain&#34; includes not only amplification but also attenuation. Therefore, a variable gain circuit means a variable-gain circuit and/or a variable attenuator. 
     There has been disclosed a radio receiver which is designed to suppress cross modulation due to undesired waves in Japanese Patent examined Publication No.5-335857. The conventional radio receiver is provided with a gain controller which controls the gain of a variable attenuator. The output of the variable attenuator is detected by a detector and the detected signal is demodulated by a demodulator. 
     The gain control is performed based on the signal level of a detected signal which is to be demodulated and the error detection of a demodulated signal. More specifically, when an error in frame synchronization is detected and the signal level is higher than a predetermined level, the gain controller decreases the gain of the variable attenuator to a low value. In other words, when the frame sync error is detected in the case of the sufficient input signal level, the gain controller decides that the cross modulation due to two or more undesired waves occurs. Therefore, by decreasing the gain of the variable attenuator, the cross modulation can be reduced. Contrarily, when the frame syc error is not detected or when the frame sync error is detected and the signal level is lower than the predetermined level, the gain controller keeps the gain of the variable attenuator to a high value. 
     Another radio receiver using a conventional AGC circuit has been disclosed in Japanese Patent examined Publication No. 7-212262. The radio receiver is provided with a pair of resonance circuits each connected to a saturable reactor. The respective resonance circuits have a higher resonance frequency and a lower resonance frequency than a desired frequency, which provides variable attenuation. In other words, such a circuit is a kind of variable-frequency notch filter. Therefore, undesired waves causing cross modulation can be selectively eliminated. 
     SUMMARY OF THE INVENTION 
     According to the conventional radio receiver using the gain controller to decrease or increase the gain of the variable attenuator, when the gain of the variable attenuator is decreased, the signal level of a desired wave is also reduced. Contrarily, when the gain of the variable attenuator is kept at a high level, there is a possibility that the input of the demodulator increase to a very high level. Therefore, it is necessary to provide the demodulator with a wide input dynamic range to ensure the correct functioning thereof. 
     Further, since the gain of the variable attenuator switches between two levels, it is impossible to select an optimum level for the attenuation depending on the respective levels of desired and undesired waves. In the case where the gain of the variable attenuator is decreased to the low level, the signal level of a desired wave is also reduced as described above, resulting in deteriorated receiving performance in the radio receiver due to thermal noise and noise factor of the entire circuits of radio receiver. 
     According to another radio receiver using a kind of variable-frequency notch filter, in the case where lots of undesired waves cause the cross modulation, a large number of variable-frequency notch filters are needed. Actually, it is impossible to provide a radio receiver with such a large number of filters. 
     An object of the present invention is to provide a gain controller and a gain control method which can reduce distortion caused by cross modulation with keeping an input signal level of a demodulator substantially constant in a radio receiver. 
     Another object of the present invention is to provide a gain controller and a gain control method which can reduce third-order distortion caused by cross modulation with reliability and can use a demodulator having a relatively narrow input dynamic range. 
     According to an aspect of the present invention, in a radio receiver comprising a first variable-gain circuit, a second variable-gain circuit, and a demodulator, wherein a band-pass filter is provided between the first and second variable-gain circuits and the demodulator inputs an output of the second variable-gain circuit, an error occurrence probability is detected from an output of the demodulator and a signal level is detected from the output of the second variable-gain circuit. Subsequently, a received signal strength is estimated from the signal level of the output of the second variable-gain circuit using an aggregate gain from the first variable-gain circuit to the second variable-gain circuit, and then a first gain of the first variable-gain circuit and a second gain of the second variable-gain circuit are changed in opposite directions depending on the error occurrence probability and an estimated received signal strength. 
     According to another aspect of the present invention, the estimated received signal strength is compared with a predetermined signal strength when the error occurrence probability is greater than a first predetermined value. After calculating a decibel difference between the estimated received signal strength and the predetermined signal strength, when the estimated received signal strength is greater than the predetermined signal strength, the first gain of the first variable-gain circuit is decreased by three times the decibel difference and the second gain of the second variable-gain circuit is increased by the decibel difference. And when the estimated received signal strength is not greater than the predetermined signal strength, the first gain of the first variable-gain circuit is increased by the decibel difference and the second gain of the second variable-gain circuit is decreased by the decibel difference. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram showing an embodiment of a gain control circuit applied to a radio receiver according to the present invention; 
     FIG. 2 is a flow chart showing a first embodiment of a gain control method according to the present invention; 
     FIG. 3 is a flow chart showing a second embodiment of a gain control method according to the present invention; and 
     FIG. 4 is a flow chart showing a feedback gain control used in the first and second embodiments of FIGS. 2 and 3. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Referring to FIG. 1, a radio receiver is provided with a first variable-gain circuit 101 which amplifies or attenuates a received radio-frequency (RF) signal S IN  by a controlled gain G 1 . The received RF signal is composed of frames each having a predetermined format. The output of the first variable-gain circuit 101 is amplified by an amplifier 102 having a fixed gain. The amplified RF signal passes through a band pass filter 103 and then is converted to an intermediate-frequency (IF) signal by a mixer 104 mixing the RF signal with a local oscillation signal Lo. The IF signal is of an intermediate frequency corresponding to the frequency difference between the RF signal and the local oscillation signal Lo. The IF signal passes through a band-pass filter 105 where components of undesired frequencies are removed from the IF signal. 
     A second variable-gain circuit 106 amplifies or attenuates the IF signal by a controlled gain G 2  to output an IF signal S 1  to a demodulator 107 which demodulates the IF signal S 1  into a demodulated signal S 2 . When receiving the demodulated signal S 2  an error detecting/correcting section 108 produces received data S OUT  and the number N E  of detected errors in frames. 
     The IF signal S 1  which is an input signal of the demodulator 107 is also output to a level detector 109 which detects the signal level L DET  thereof The signal level L DET  may use one of an amplitude of the signal S 1 , the square and the square root thereof. The signal level L DET  is output to a gain controller 110 together with the detected signal level L DET . 
     The gain controller 110, receiving the detected signal level L DET  and the detected signal level L DET , produces the G 1  control signal and the G 2  control signal which are output to the variable-gain circuit 101 and 106, respectively. The G 2  control signal is produced by a first gain controller 201 depending on the detected signal level L DET , and the G 1  control signal is produced by a second gain controller 202 based on the magnitude of the G 2  control signal. When receiving the signal S 1  from the variable-gain circuit 106, the level detector 109 outputs the signal level L DET  to the first gain controller 201 of the gain controller 110. The first gain controller 201 controls the gain G 2  of the variable-gain circuit 106 to keep an input level of the demodulator 107 at a predetermined level range. For example, when the signal level L DET  of the signal S 1  exceeds the predetermined level range, the first controller 201 decreases the gain G 2  of the variable-gain circuit 106 by using the G 2  control signal. The second gain controller 202 controls the gain G 1  of the variable-gain circuit 101 so that the gain G 2  of the variable-gain circuit 106 does not reach its maximum or minimum value. More specifically, when the gain G 2  is about to reach the maximum or minimum gain of the variable-gain circuit 106, the second gain controller 202 increases or decreases the gain G 1  of the variable-gain circuit 101 so that the gain G 2  changes to a gain which is slightly smaller or larger than the maximum or minimum gain. In this manner, the input level of the demodulator 107 is kept at the predetermined level at all times. The details will be described later referring to FIG. 4. 
     The first and second gain controllers 201 and 202 are both controlled by a processor 203 which uses the current gains G 1  and G 2 , the detected signal level L DET , and the detected signal level L DET  to perform the gain control according to the present invention. The processor 203 runs such a gain control program which is stored in a ROM (not shown). The details of the gain control will be described later referring to FIGS. 2 and 3. 
     More specifically, the variable-gain circuits 101 and 106 may be composed of a variable attenuator or a combination of a variable attenuator and a fixed-gain amplifier connected in series. Such a variable attenuator is preferably designed so that the maximum insertion loss is small. For example, a high-frequency variable resistor using a PIN diode may be used. Further, the variable attenuator may be formed with a plurality of resistor networks and a high-frequency switch which is used to select the resistor networks. Needless to say, the noise factor of the variable-gain amplifier or a fixed-gain amplifier used in the variable-gain circuit 101 or 106 is preferably as small as possible in the case of the same gain. For this purpose, especially, the input matching is adjusted to minimize the noise factor thereof at the frequency of a desired signal 
     The fixed-gain amplifier 102 is composed of a bipolar transistor, a field-effect transistor or a combination thereof. Especially, the input matching is adjusted to minimize the noise factor thereof. The band-pass filter 103 may be formed with dielectric, ceramics or micro strip line and further a surface elastic wave may be used. The band-pass filter 103 has pass frequency bands which are all possible frequencies of desired waves. Preferably, the band-pass filter 103 filters out image frequency components which have effect on the mixer 104. The mixer 104 may be a balanced or unbalanced mixer comprising a transistor, a diode, a transform and the like. An image-cancel type mixer may be used as necessary. 
     The band-pass filter 105 has only a pass band which is the frequency band of a desired wave to be received and thereby attenuates other frequency components to the extent that deterioration due to cross modulation is negligible. Especially, it is preferable to sufficiently attenuate the leakage of the local oscillation signal. Such a sharp filtering characteristic is obtained by a filter using ceramics and surface elastic wave. The dielectric and micro strip line may be used. 
     First Embodiment of Gain Control 
     As described before, the error detecting/correcting section 108 corrects errors of the demodulated signal S 2  in frames to produce the output data S OUT  and detects the number N E  of the errors in frames. The signal level L DET  of the signal S 1  is detected by the level detector 109, And current gains G 1  and G 2  to which the variable-gain circuits 101 and 106 are now set can be detected by monitoring the G 1  and G 2  control signals output from the second and first controllers 202 and 201. 
     Referring to FIG. 2, the signal level L DET  is kept constant by controlling the G 2  control signal (step S300) and the processor 203 receives the signal level L DET  from the level detector 109, the current G 1  and G 2  control signals from the second and first controllers 202 and 201, and the number N E  of errors from the error detecting/correcting section 108 (step S301). First, the processor 203 compares the number N E  of errors with a predetermined value N TH  (step S302). When N E  &gt;N TH  (YES in step S302), the processor 203 estimates a received signal power strength P IN  (step S303). The received signal power strength P IN  can be estimated by using the current signal level L DET  of the signal S 1 , the current gains G 1  and G 2  of the variable-gain circuits 101 and 106, the fixed gain of the amplifier 102, and other gains of the band-pass filters 103 and 105 and the mixer 104. 
     If the estimated received signal power strength P IN  is greater than a predetermined value P TH  (YES in step S304), the processor 203 controls the first and second gain controllers 201 and 202 so that the gain G 1  of the variable-gain circuit 101 is decreased and the gain G 2  of the variable-gain circuit 106 is increased (step S305). On the other hand, if the estimated received signal power strength P IN  is not greater than the predetermined value P TH  (NO in step S304), the processor 203 controls the first and second gain controllers 201 and 202 so that the gain G 1  of the variable-gain circuit 101 is increased and the gain G 2  of the variable-gain circuit 106 is decreased (step S306). After the step S305 or S306, control goes back to the step S300. 
     In the cases where N E  is not greater than N TH  (NO in step S302), the first and second gain controllers 201 and 202 perform a feedback control as shown in FIG. 4 (step S307). 
     As described above, in the cases where the number N E  of errors is greater than the predetermined value N TH  (YES in step S302) and the estimated received signal power strength P IN  is greater than the predetermined value PT (YES in step S304), it is determined that cross modulation would occur due to large power undesired waves before the band-pass filter 105 to generate the errors in the demodulated signal S 2  although the received signal power is relatively large. In this case, the variable-gain circuit 101 decreases in gain and, at the same time, the variable-gain circuit 106 increases in gain (step S305). Therefore, the input level of the demodulator 107 can be kept at an approximate constant level. Further, the decreased gain G 1  causes the cross modulation due to undesired waves to be reduced and the increased gain G 2  causes the desired wave passing through the band-pass filter 105 to be amplified. Therefore, distortion due to the cross modulation can be effectively suppressed. 
     Contrarily, in the cases where the number N E  of errors is greater than the predetermined value N TH  (YES in step S302) and the estimated received signal power strength P IN  is not greater than the predetermined value P TH  (NO in step S304), it is determined that the errors occur in the demodulated signal S 2  because the current gain G 1  of the variable-gain circuit 101 is lower than necessary. In this case, the variable-gain circuit 101 increases in gain and, at the same time, the variable-gain circuit 106 decreases in gain (step S306). 
     Second Embodiment of Gain Control 
     Referring to FIG. 3, where steps similar to those previously described referring to FIG. 2 are denoted by the same reference numerals, the processor 203 calculates a power difference α (dB) by subtracting a predetermined value P TH  from the estimated received signal power strength P IN  (step S400) and checks whether the power difference α is positive (step S401). If it is positive (YES in step S401), the processor 203 controls the first and second gain controllers 201 and 202 so that the gain G 1  of the variable-gain circuit 101 is decreased by α (dB) and the gain G 2  of the variable-gain circuit 106 is increased by 3α (dB) (step S402). On the other hand, if the power difference α is not positive (NO in step S401), the processor 203 calculates a power difference α (dB) between them and controls the first and second gain controllers 201 and 202 so that the gain G 1  of the variable-gain circuit 101 is increased by α (dB) and the gain G 2  of the variable-gain circuit 106 is decreased by α (dB) (step S403). After the step S402 or S403, control goes back to the step S300. 
     In the cases where N E  is not greater than N TH  (NO in step S302), the first an second gain Controllers 201 and 202 perform a feedback control as shown in FIG. 4 (step S307). 
     As described above, in the cases where the number N E  of errors is greater than the predetermined value N TH  (YES in step S302) and the estimated received signal power strength P IN  is greater than the predetermined value P TH  (YES in step S304), it is determined that cross modulation would occur due to large power undesired waves before the band-pass filter 105 to generate the errors in the demodulated signal S 2  although the received signal power is relatively large. In this case, the variable-gain circuit 101 decreases in gain by the calculated power difference α (dB) and the variable-gain circuit 106 increases in gain by three times the calculated power difference, that is, 3α (dB). When decreasing the signal level by α (dB) before a circuit generating third-order distortion, the strength of undesired wave is decreased by 3α (dB). Therefore, the gain control of the step S402 can effectively eliminate the effect of the third-order distortion. 
     FEEDBACK CONTROL 
     Referring to FIG. 4, there is shown a feedback control step S307 as shown in FIGS. 2 and 3. When receiving the signal level L DET  from the level detector 109, the first gain controller 201 decides on whether the level difference between the signal level L DET  and a predetermined value L TH  is smaller than a predetermined error ΔL (step S501). When the level difference is not smaller than ΔL (NO in step S501), the first gain controller 201 controls the gain G 2  of the variable-circuit 106 so that the signal level L DET , that is, an input level of the demodulator 107 falls into an acceptable range of L TH  ±ΔL (step S502). 
     The second gain controller 202 checks whether the gain G 2  of the variable-gain circuit 106 reaches the maximum G MAX  or the minimum G MIN  by monitoring the G 2  gain control signal at all times (step S503). When the gain G 2  of the variable-gain circuit 106 reaches the maximum G MAX  or the minimum G MIN  (YES in step S503), the second gain controller 202 increases or decreases the gain G 1  of the variable-gain circuit 101 so that the gain G 2  changes to a gain which is slightly smaller or larger than the maximum G MAX  or the minimum G MIN . In this manner, the input level of the demodulator 107 is kept at the predetermined level range at all times. Such a feedback control is performed as the step S307 in the first and second embodiments as shown in FIGS. 2 and 3. 
     In the above embodiments, the number N E  of errors is used as the reciprocal of a probability of error-free signal receiving. Therefore, in the case where the Viterbi maximum-likelihood algorithm is used in the error detecting/correcting section 108, the reciprocal of a likelihood or an aggregate Hamming distance in the algorithm may be used instead of the number N E  of errors. Similarly, the value calculated by the formula: 1- (normalized likelihood), may be used.