Abstract:
One embodiment of the present invention provides a system that facilitates implementing multi-mode specification-driven disassembler. During operation, the disassembler receives a machine-code version of a computer program. In order to disassemble a specific machine-code instruction from this machine-code version, the system compares the machine-code instruction against a set of instruction templates for assembly code instructions to identify a set of matching templates. Next, the system selects a matching template from the set of matching templates based on the state of a mode variable, which indicates a specificity mode for the disassembler. The system then disassembles the machine-code instruction using the operand fields defined by the matching template to produce a corresponding assembly code instruction.

Description:
BACKGROUND  
         [0001]    1. Field of the Invention  
           [0002]    The present invention relates to the design of disassemblers for converting machine code for a computer program into corresponding human-readable assembly code. More specifically, the present invention relates to a method and an apparatus for implementing a multi-mode specification-driven disassembler.  
           [0003]    2Related Art  
           [0004]    During development of an application for a computer system, developers typically write source code for the application in a higher-level language (HLL). This source code version of the application is then translated by a compiler (or an assembler) into corresponding machine code version of the program that is suitable for execution on a specific target computer system.  
           [0005]    To ensure correctness, developers often desire to examine the machine code created by the compiler (or assembler). Unfortunately, this machine code is comprised of a series of numbers that cannot easily be deciphered by even the most knowledgeable programmers. Hence, developers typically examine the machine code by first using a disassembler to translate the machine code into human-readable assembly code. This assembly code uses descriptive mnemonics to represent program instructions, and these mnemonics are more understandable to a human than the corresponding machine code numbers.  
           [0006]    Some instruction set architectures, such as the instruction set architecture for the PowerPC, define instructions—such as branches and traps—that are so general that the general form verges on incomprehensibility. For example, an instruction that branches on equality might be written as, 
           bc 12, 2,&lt;destination&gt;. 
           [0007]    To simplify life for the programmer, the PowerPC assembler also defines a shorthand representation for the same instruction, so that the instruction can be more intuitively represented as 
           beq&lt;destination&gt;. 
           [0008]    While it is no problem for the assembler to generate the same bits for these two different mnemonics, the disassembler, which operates in the reverse direction, must choose one form or the other when it disassembles the bits for such an instruction.  
           [0009]    Current disassemblers are designed to choose one source form, typically the most specific, such as the beq &lt;destination&gt; form. While this most-specific form is usually desired, the most general form is useful in specific situations, particularly for debugging compilers.  
           [0010]    What is needed is a method and an apparatus that allows the user to control the assembly code form that the disassembler chooses while disassembling machine code.  
         SUMMARY  
         [0011]    One embodiment of the present invention provides a system that facilitates implementing multi-mode specification-driven disassembler. During operation, the disassembler receives a machine-code version of a computer program. In order to disassemble a specific machine-code instruction from this machine-code version, the system compares the machine-code instruction against a set of instruction templates for assembly code instructions to identify a set of matching templates. Next, the system selects a matching template from the set of matching templates based on the state of a mode variable, which indicates a specificity mode for the disassembler. The system then disassembles the machine-code instruction using the operand fields defined by the matching template to produce a corresponding assembly code instruction.  
           [0012]    In one embodiment of the present invention, a given template includes an opcode template, an opcode mask, and a specificity for the given template.  
           [0013]    In one embodiment of the present invention, comparing the machine code instruction against a specific instruction template involves first performing a bitwise-AND operation between the machine code instruction and the opcode mask and then comparing the result with the opcode template. If the result of the bitwise-AND operation matches the opcode template, the system identifies the specific instruction template as a matching template.  
           [0014]    In one embodiment of the present invention, the system reassembles the corresponding assembly code instruction into a machine-code instruction. If the resulting machine-code instruction is not a valid machine-code instruction, the system removes the corresponding instruction template from the set of matching templates.  
           [0015]    In one embodiment of the present invention, the specificity for a given template indicates a number of bits that are set to one within the opcode mask of the given template.  
           [0016]    In one embodiment of the present invention, the specificity mode specifies using either a most specific template or a least specific template.  
           [0017]    In one embodiment of the present invention, the system allows a user to set the specificity mode for the disassembler through a graphical user interface. 
       
    
    
     BRIEF DESCRIPTION OF THE FIGURES  
       [0018]    [0018]FIG. 1 illustrates a computer in accordance with an embodiment of the present invention.  
         [0019]    [0019]FIG. 2 illustrates a template in accordance with an embodiment of the present invention.  
         [0020]    [0020]FIG. 3A illustrates a template with a high specificity in accordance with an embodiment of the present invention.  
         [0021]    [0021]FIG. 3B illustrates a template with a low specificity in accordance with an embodiment of the present invention.  
         [0022]    [0022]FIG. 4 presents a flowchart illustrating the process of disassembling a machine, code instruction in accordance with an embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION  
       [0023]    The following description is presented to enable any person skilled in the art to make and use the invention, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present invention. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.  
         [0024]    The data structures and code described in this detailed description are typically stored on a computer readable storage medium, which may be any device or medium that can store code and/or data for use by a computer system. This includes, but is not limited to, magnetic and optical storage devices such as disk drives, magnetic tape, CDs (compact discs) and DVDs (digital versatile discs or digital video discs), and computer instruction signals embodied in a transmission medium (with or without a carrier wave upon which the signals are modulated). For example, the transmission medium may include a communications network, such as the Internet.  
         [0025]    Computer System  
         [0026]    [0026]FIG. 1 illustrates computer  104  in accordance with an embodiment of the present invention. Computer  104  includes graphical user interface  106 , disassembler  108 , assembler  110 , machine code version of program  112 , set of instruction templates  114 , and set of matching templates  116 . Computer  104  operates under control of user  102 .  
         [0027]    User  102  accesses graphical user interface  106  to control applications executing on computer  104  and receive the results of these applications. Specifically, user  102  uses graphical user interface  106  to control disassembler  108  and to receive results generated by disassembler  108  through graphical user interface  106 .  
         [0028]    Disassembler  108  is a multi-mode, specification-driven disassembler. User  102  can set the mode of disassembler  108  to use either the most specific or the least specific assembly code representation of a machine-code instruction as described below in conjunction with FIGS. 2, 3A, and  3 B. Disassembler  108  uses templates from set of instruction templates  114  as specifications for controlling the disassembly of individual machine code instructions.  
         [0029]    Disassembler  108  operates by taking a machine-code instruction from a machine code version of a program, for example, from machine code version of program  112 , and finding matching instruction templates for the machine-code instruction from set of instruction templates  114 . Templates from the set of instruction templates  114  are described in detail in conjunction with FIGS. 2, 3A, and  3 B. Matching templates for the machine-code instruction are identified by first performing a bitwise-AND operation between the opcode mask within the template and the machine-code instruction. The result of this bitwise-AND operation is then compared with the opcode template within the template. If the result of the bitwise-AND and the opcode template match, the instruction is disassembled over each of its operand fields to form a corresponding assembly code instruction.  
         [0030]    Next, assembler  110  receives the opcode and operand fields from disassembler  108  and reassembles the instruction. If a legal instruction is formed in which the opcode and operands do not violate any assembly rules, the matching template is added to set of matching templates  116 . Computer  104  then selects either the most specific or least specific matching template from set of matching templates  116  depending on the specificity mode previously selected by user  102 . The selected matching template determines how the corresponding assembly code instruction is formed.  
         [0031]    Template  
         [0032]    [0032]FIG. 2 illustrates template  202  in accordance with an embodiment of the present invention. Template  202  includes specificity  204 , opcode template  206 , and opcode mask  208 . Opcode mask  208  is used to mask specific bits within a machine-code instruction as described above. Opcode template  206  provides a bit pattern to be compared against the results of the masking operation. If the masked machine-code instruction matches opcode template  208 , the machine-code instruction is disassembled, reassembled, and possibly selected as a matching template as is described above. Specificity  204  is a count of the number of bits specified as one in opcode mask  208 . In general, specificity  204  defines which templates within set of instruction templates  114  are the most specific and which templates are the least specific.  
         [0033]    Specific Templates  
         [0034]    [0034]FIG. 3A illustrates a template with a high specificity in accordance with an embodiment of the present invention. Template  302  has a specificity of  32  because there are thirty-two one bits in its mask. The opcode template within template  302  is 7FE00008. This opcode template exactly corresponds to an unconditional trap instruction, thus only an unconditional trap instruction will be selected by template  302 . Note that the unconditional trap instruction can be written as either “trap” or “tw 31, 0, 0” as desired by a programmer.  
         [0035]    [0035]FIG. 3B illustrates a template with a low specificity in accordance with an embodiment of the present invention. Template  304  has a specificity of  17  because there are seventeen one bits in its mask. The opcode template within template  304  is 7C0007FF. This opcode template will match any trap instruction, either conditional or unconditional, including the unconditional trap instruction 7FE00008.  
         [0036]    During operation, both template  302  and template  304  would be placed in the set of matching templates  116  for a machine-code instruction coded 7FE00008. The system generates different assembly code instructions for a given machine-code instruction based on the specificity mode for disassembler  108 . User  102  is presented with trap if the mode is set to most-specific, while user  102  is presented with tw 31, 0, 0 if the mode is set to least-specific.  
         [0037]    Disassembling an Instruction  
         [0038]    [0038]FIG. 4 is a flowchart illustrating the process of disassembling a machine-code instruction in accordance with an embodiment of the present invention. The process starts when the system receives a machine code program for disassembly (step  402 ). Next, the system selects a machine-code instruction from the program for disassembly (step  404 ).  
         [0039]    The system then selects a template from the set of templates (step  406 ). Next, the system performs a bitwise-AND between the machine-code instruction and the mask within the template (step  408 ). After performing the bitwise-AND, the system compares the result with the opcode template within the template (step  410 ). If there is a match, the system disassembles the operands for the instruction (step  412 ). The system then reassembles the disassembled instruction (step  414 ). If the reassembled instruction is a legal instruction (step  416 ), the system adds the template to the set of matching templates  116  (step  418 ).  
         [0040]    After adding the template to the set of matching templates  116 , if the reassembled instruction is not legal at step  416 , or if the result of the bitwise-AND does not match the template at step  410 , the system determines if there are more templates to check (step  420 ). If so, the process returns to step  406  to continue processing templates. Otherwise, the system selects a template from the set of matching templates  116  based on the specificity mode of the disassembler (step  422 ). As described above, the most-specific or the least-specific template is chosen based on the specificity mode of the disassembler. Finally, the system displays the data to the user (step  424 ). Note that displaying the data to the user can involve storing the data in a file for later use by the user.  
         [0041]    The foregoing descriptions of embodiments of the present invention have been presented for purposes of illustration and description only. They are not intended to be exhaustive or to limit the present invention to the forms disclosed. Accordingly, many modifications and variations will be apparent to practitioners skilled in the art. Additionally, the above disclosure is not intended to limit the present invention. The scope of the present invention is defined by the appended claims.