Abstract:
A filter circuit is provided which has a filtered input and an unfiltered input. The filtered input passes through delay elements to coefficient circuitry. The unfiltered input passes to the coefficient circuitry without passing through the delay elements. In this manner, an unfiltered offset can be added to the filtered output. This filter is especially useful when the filtered value is in phase representation form; for example, when the filter value is a hue value encoded as a phase.

Description:
BACKGROUND OF THE INVENTION 
   The present invention relates to digital filters, especially digital low-pass filters for use with graphics encoders for video signals. 
     FIG. 1  is a diagram of an example of a prior art digital filter  10 . The digital filter  10  uses delay elements  12 ,  14 ,  16 ,  18  and  20 , and summer  22 . Such a digital filter produces an output defined by the equation
 output( n )= g   1 input( n )+ g   2 input( n− 1)+ g   3 input( n− 2) 
Any input is filtered in this prior art digital filter. It is desired to have an improved digital filter system.
 
   SUMMARY OF THE PREFERRED EMBODIMENT 
   As described in the book “Video Demystified,” Second Edition, by Keith Jack, incorporated herein by reference, digital video encoders typically use digital filters. In video encoders, the video pixel data can be defined in the Hue-Saturation-Intensity color space. The intensity corresponds to the black and white picture; the hue indicates the color, such as red or blue; and the saturation is an indication of the value of the color. A color with the same hue can have different saturation values; the same hue can range from pink to a dark red. 
   The most common television standards are the National Television Standards Committee (NTSC) standard used in the United States and the Phase Alternation Line (PAL) standard used in many European countries. Both of these standards derive from earlier standards in which all of the picture data is used to encode the black and white picture or luminance. 
   The color (hue and saturation) information is encoded onto a chrominance subcarrier about a subcarrier frequency within the picture data bandwidth. The chrominance subcarrier has a phase which encodes hue information and an amplitude which encodes saturation information. 
   In some situations, as described in the co-pending application of the same inventor entitled “Reduction of Color Transition Distortions in NTSC/PAL Encoder,” now U.S. Pat. No. 5,995,164, incorporated herein by reference, it is beneficial to use the hue phase change between the pixel values which gives the minimum absolute value of the phase change. For example, a phase change from ¼π to 7/4π produces a 3/2π phase change. By using the phase change from ¼π to −¼π instead, the change in the hue is only −½π and the color distortion between pixels is reduced. 
   A difficulty with this method concerns a hue signal simply reconstructed using the modified phase values. A large number of consecutive positive or negative modified phase change values can be produced. This would require a large number of bits for the reconstructed hue. 
   One embodiment of the present invention is the use of a correction signal which is a 2πn offset, n being an integer, added to the hue signals in order to keep the hue signals bounded. The 2πn correction signal does not affect the value of hue, since the hue values are encoded as a phase. 
   Another embodiment of the present invention is the use of a special filter for the hue signal that does not filter the 2πn correction components. A normal filter would filter the 2π step change component of the correction signal and produce spurious phase (color) values in the output video signal. 
   Another embodiment of the present invention is a digital filter that includes an unfiltered correction. In a preferred embodiment, the unfiltered correction is added by a summer in coefficient circuitry of the filter, and does not pass through an input delay line of the digital filter. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The above and other features and aspects of the present invention will become more apparent upon reading the following detailed description in conjunction with the accompanying drawings, in which: 
       FIG. 1  is a diagram of a prior art digital filter; 
       FIG. 2  is a diagram of a digital filter of the present invention using an unfiltered correction input; 
       FIG. 3  is a diagram of an encoder for a video signal; 
       FIG. 4  is a diagram of the filter of the present invention for use with the encoder of  FIG. 3 ; 
       FIG. 5  is a digital phase circuitry for use with the filter of  FIG. 4 ; 
       FIG. 6A  is a graph of an input phase signal; 
       FIG. 6B  is a graph of a differential phase signal; 
       FIG. 6C  is an input to the phase corrector circuitry; 
       FIG. 6D  is a graph of the correction pulse; 
       FIG. 6E  is a graph of the filtered output of the circuit of the present invention; 
       FIG. 7  is a graph of a circuit correction diagram in the polar representation; and 
       FIG. 8  is a diagram of an alternate embodiment of the digital filter of the present invention. 
   

   DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     FIG. 2  is a diagram of the filter  30  of the present invention. The filter  30  includes an input delay line composed of digital delays  32  and  34 . The signal from the delay lines goes to the coefficient circuitry  36 ,  38  and  40 . Additionally, a correction input along lines  42  is sent to the coefficient circuitry  36 ,  38  and  40 . The correction input on line  42  is not sent through the delays  32  or  34 . In the correction circuitry, an adder  36   a ,  38   a  and  40   a  adds the correction input together with the input from the delay line. Additionally, since the correction input and main input are differential inputs, the output of the addition circuitry  36   a ,  38   a  and  40   a  is feedback after a delay as an input to the addition circuitry. The output of the delay  36   b ,  38   b , and  40   b  is also sent to the gain amplifier  36   c ,  38   c  and  40   c . The output of coefficient circuitry  36 ,  38  and  40  is sent to adder  42 , which produces the filter output. Note that, since the correction input along line  42  is not sent through any of the delays  32  or  34 , the correction input is not filtered. The correction input, however, is converted from a differential input and given a gain equal to (G 1 +G 2 +G 3 ). By sending the correction input through the adders  36   a ,  38   a  and  40   a , the correction input is given with the same gain as the delayed input. The circuitry could also be set up such that the gains G 1 , G 2  and G 3  can be modified and the correction input need not be changed. 
   The main input and correction input in  FIG. 2  are both differential inputs. As shown in  FIGS. 4–5 , a differential input filter allows the improved differential hue circuitry of  FIG. 5  to be used. 
     FIG. 3  is a diagram of a video encoder  50  that uses the filter of the present invention. A lookup table  52  converts red/green/blue (RGB) pixel data into hue saturation and intensity values. These values are filtered in filters  54  and sent to the additional PAL/NTSC encoding circuitry  56 . The additional PAL/NTSC encoding circuitry  56  uses the saturation and hue values to produce a chrominance subcarrier which is added to the intensity values to produce the video signal. The vertical and horizontal blanking interval, audio, and other information is added to the video signal. Circuitry  58 , the phase analysis element and low-pass filter, includes an embodiment of the filter of the present invention. 
     FIG. 4  illustrates a preferred embodiment of the circuitry  50  of the present invention. The circuitry  50  includes differential phase circuitry  60 , which converts the hue input into a differential phase output, along with the special filter  62  of the present invention. Also shown is the correction signal circuitry  64  used to produce the unfiltered correction signal for the filter  62 . 
   A preferred embodiment of the differential phase circuitry  60  is shown in  FIG. 5 . The differential phase circuitry is also discussed and claimed in the co-pending application entitled “Reduction of Color Transition Distortions in NTSC/PAL Encoder” by inventor Anatoliy V. Tsyrganovich, now U.S. Pat. No. 5,995,164. Also incorporated by reference is the co-pending application “Dot Crawl Reduction in NTSC/PAL Graphic Encoder,” by inventor Anatoliy V. Tsyrganovich, now U.S. Pat. No. 6,163,346. 
   Looking again at  FIG. 4 , the differential phase circuitry  60  produces a modified differential phase. A simple reconstruction of the hue using the modified differential phase produces a hue value having unbounded values. The correction signal circuitry  64  and filter  62  is used to provide boundaries for the hue signal. When the hue value on line  66  is greater than a high reference value, the comparator  68  controls multiplexer  70  to output a −2π correction value on line  74 . When the hue value on line  66  is less than a low reference value, comparator  72  controls multiplexer  70  to output a 2π correction value on line  74 . If the hue value on line  66  is in between the high reference and the low reference values, the multiplexer  70  outputs zero as the correction value along line  74 . In this manner, the hue output value is maintained within a desired boundary. In a preferred embodiment, the high reference value is 2π and the low reference value is zero. Thus, the hue output range only needs guard bands equal in width to the reference value discussed below with respect to the differential phase circuitry  60 . Thus, in one embodiment, the guard bands range from 2π to 3π and 0 to −π are used and the hue output is encoded within the range 3π to −π. 
   Note that the hue signal on line  66  is, in effect, an unfiltered reconstructed hue signal, since the differential hue, differential correction signal, and the last output of the addition circuitry  76   a  are added in addition circuitry  76   a . The hue input is filtered, but the correction offset is not filtered. The correction offset does not pass through the input delay line but goes directly to the coefficient circuitry  76 ,  78  and  80 . 
     FIG. 5  is a diagram of the differential phase circuitry  60 . This circuitry  60  uses differential circuitry  90  to provide a differential or delta hue signal. This delta hue signal is modified in circuitry  92  to produce the modified delta hue output. The absolute value of the delta hue is compared to a reference value. If the absolute value of the delta hue is greater than a reference value, then a modified value is sent through multiplexer  94  to be added to the delta hue in adder  96  to produce the modified delta hue output. 
     FIG. 6A  is a graph of the phase in signal along line  61  of the differential phase circuitry  60  of  FIG. 4 .  FIG. 6B  is a graph of the differential signal output along line  63  of the differential phase circuitry  60  of  FIG. 4 . Note that at a time T 1 , the phase input moves up 3/2π in  FIG. 6A ; however, the differential signal output drops down to produce a −½π differential signal rather than a positive 3/2π differential signal.  FIG. 6C  shows the input of the phase corrector circuitry  64  at line  66  in  FIG. 4 . Note that, at time T 1 , the phase corrector signal drops to zero rather than rising to 2π; zero and 2π being equivalent phases. At time T 2 , the phase signal at line  66  drops down to −½π. Since this is less than the low reference value, comparator  72  and multiplexer  70  cause a positive 2π correction pulse at time T 3 , as shown in  FIG. 6D . 
     FIG. 6E  shows the filter output at line  87  of  FIG. 4 . Note that the filter acts as a low-pass filter to the input phase from line  66 , as long as there is no correction pulse. At time T 3 , a correction pulse is produced which is not filtered by the circuitry  62 . The output jumps up to a corresponding value within the range 0 to 2π, and continues low-pass filtering the transition. If the correction pulse component was filtered, as shown in phantom line  100 , spurious values for the color of the pixel location would be produced. Note that the value  102  is an equivalent phase representation to the value  104  which is the filtered output that would be produced if there is no correction pulse. 
     FIG. 7  is a graph illustrating a circle correction for a virtual polar representation. As shown in  FIG. 7 , there is a main phase range  110  from zero to 2π. Guard band  112  ranges from 2π to 3π, and guard band  114  ranges from 0 to −π. Note that the values in the guard bands  112  and  114  correspond to values within the main range  110 , thus allowing a positive or negative 2π jump onto the main phase range  110 . 
     FIG. 8  is an alternate embodiment of the filter of the present invention. This alternate embodiment of the filter  120  includes the delay lines  122  and  124 , coefficient circuitry  126 ,  128  and  130 , summer  132  and the integration circuitry  134 . Integration circuitry  134  converts the differential correction signal at point  136  to a correction offset level at point  138 . The adder  126   a ,  128   a  and  130   a  adds the correction offset  138  with the output of the delay line including delays  122  and  124 . The correction offset  138  is not filtered, while the input at line  121  is filtered. The output can be given by the equation
 output( n )= g   1 (input( n )+offset( n ))+ g   2 (input( n− 1)+offset( n ))+ g   3 (input( n− 2)+offset( n )) 
which reduces to
 output( n )= g   1 input( n )+g 2 input( n −1)+ g   3 input( n− 2)+ g   t offset( n ) 
where
   g   t   =g   1   +g   2   +g   3    
When g t  is equal to 1, the output of the filter of  FIG. 8  is equal to the filtered input value on  121  plus the offset value at  138 .
 
   Various details of the implementation and method are merely illustrative of the invention. It will be understood that various changes in such details may be within the scope of the invention, which is to be limited only by the appended claims.