Abstract:
A driver circuit comprising has a pair of inputs, a pair of outputs, and multiple transistors, connected in a differential configuration, comprising a first set of transistors configured as a current mirror current source stage, a second set of transistors configured as a current source stage, and a third set of transistors configured as an emitter follower stage.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS  
       [0001]    This application claims priority under 35 USC 119(e)(1) of U.S. Provisional Patent Application Ser. No. 60/365,995 filed Mar. 19, 2002. 
     
    
     
       FIELD OF THE INVENTION  
         [0002]    The present invention relates to driver circuitry and, more particularly, high bandwidth, low power driver circuitry.  
         BACKGROUND  
         [0003]    [0003]FIG. 1 is a conventional differential emitter follower difference mode line driver circuit. The typical load is a 100 ohm terminated electrical transmission line of the same characteristic impedance. The circuit has an incremental bandwidth of about 5.2 gigahertz and nominally uses about 31 milliwatts of power for a 3.3 volt supply. While this is acceptable for some applications, future needs will require greater bandwidth but less power.  
           [0004]    The traditional circuit approach noted above suffers from problems related to power dissipation, gain, output impedance, and distortion.  
           [0005]    Thus, there is a need in the art for a line driver circuit that has a higher bandwidth and uses less power, but without the level of distortion present in the prior art.  
         SUMMARY OF THE INVENTION  
         [0006]    The present invention relates to a type of driver circuit that provides a more efficient, current mode difference mode output amplifier design that has a wider bandwidth than available from conventional output stages. By virtue of this invention, the bandwidth to power ratio is improved by a factor of more than 3:1 over traditional designs.  
           [0007]    The advantages and features described herein are a few of the many advantages and features available from representative embodiments and are presented only to assist in understanding the invention. It should be understood that they are not to be considered limitations on the invention as defined by the claims, or limitations on equivalents to the claims. For instance, some of these advantages are mutually contradictory, in that they cannot be simultaneously present in a single embodiment. Similarly, some advantages are applicable to one aspect of the invention, and inapplicable to others. Thus, this summary of features and advantages should not be considered dispositive in determining equivalence. Additional features and advantages of the invention will become apparent in the following description, from the drawings, and from the claims. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0008]    [0008]FIG. 1 is a conventional differential emitter follower difference mode line driver circuit of the prior art;  
         [0009]    [0009]FIG. 2 is an exemplary circuit according to the present invention;  
         [0010]    [0010]FIG. 3 is a graph comparing voltage gain vs. bandwidth for the circuits of FIG. 1 and FIG. 2.  
     
    
     DETAILED DESCRIPTION  
       [0011]    The invention relates to a type of driver circuit that provides a more efficient, current mode difference mode output amplifier design that has a wider bandwidth than available from conventional output stages.  
         [0012]    In accordance with the invention, the example circuit of FIG. 2 solves the power bandwidth problem by making the current source in the emitter follower active. In this way, its gain aids the emitter follower, which improves the bandwidth of the circuit. In addition, since the current of this source is made signal dependent, a current that is one-half of the peak load current is all that is needed as a quiescent current. Hence, wider bandwidth and reduced power consumption are realized.  
         [0013]    The driver circuit of FIG. 2 has the advantage of providing feedback for bandwidth adjustment. In addition, the circuit of FIG. 2 is configured so that, as the voltage demand increases, the shunt current in the long tail of the emitter follower decreases. Thus, the circuit of FIG. 2 may supply double the standby current. Furthermore, in the circuit of FIG. 2, the quality factor of the steady state frequency response is adjustable through resistor R 11 , a feature unavailable in the driver circuit of FIG. 1.  
         [0014]    In FIG. 2, the transistors are, for purposes of illustration, of the type LN 03  and LN 10  which denote transistors in the 0.35 micron SiGe process family from Jazz Semiconductor, 4321 Jamboree Road, Newport Beach, Calif. 92660, and the resistors have the resistive values shown.  
         [0015]    As illustrated in FIG. 2, the driver circuit includes transistors that may be grouped into three stages for the circuit. The first stage includes the transistors  200 ,  202 ,  204  and  206 , which are configured as an emitter follower stage. The second stage, transistors  208 ,  210 , are connected as a current source stage for supplying current for the third stage, a current mirror current source stage that includes transistors  212 ,  214 ,  216  and  218 . The circuit is configured as a differential driver circuit and therefore has two signal inputs, a negative input  220  and a positive input  225 . Accordingly, the circuit also includes two outputs situated across resistor R 8 , a positive output  230  and a negative output  235 .  
         [0016]    [0016]FIG. 3 is a graph comparing voltage gain (linear scale) vs. bandwidth (log scale) for the circuits of FIG. 1 and FIG. 2. As can be seen, the bandwidth of FIG. 2 is about 85% more than the bandwidth of the circuit of FIG. 1.  
         [0017]    Through bread-boarding, using conventional discrete parts, and analysis using computer based circuit analysis tools, it has been determined, through measurement of the bread-boarded circuit and through analysis, that the quiescent power for this circuit is only 18.6 mW of power for a 3.3 volt supply and, through analysis, that the bandwidth is 10.26 GHz.  
         [0018]    By way of comparison with the prior art, a circuit of the present invention uses 40% less current than the circuit of FIG. 1, while the bandwidth increases by about 85% over the circuit of FIG. 1. Moreover, in accordance with the invention, the bandwidth to power ratio of a circuit according to the present invention is improved by a factor of more than 3:1 over traditional designs.  
         [0019]    It should be noted that different variants of the invention can be made, for example, by embodying a circuit according to the invention in a silicon-germanium or suitable similar silicon microchip, as well as in discrete and/or integrated circuit form through the straightforward use of other CMOS, BiCMOS, or other comparable low power devices.  
         [0020]    It should be understood that the above description is only representative of illustrative embodiments. For the convenience of the reader, the above description has focused on a representative sample of all possible embodiments, a sample that teaches the principles of the invention. The description has not attempted to exhaustively enumerate all possible variations. That alternate embodiments may not have been presented for a specific portion of the invention, or that further undescribed alternate embodiments may be available for a portion, is not to be considered a disclaimer of those alternate embodiments. One of ordinary skill will appreciate that many of those undescribed embodiments incorporate the same principles of the invention and others are equivalent.