Abstract:
Embodiments disclose control methods and control apparatuses for a switched mode power supply. The switched mode power supply comprises a current-controllable device. A driving current is provided to turn ON the current-controllable device. A conduction current passing through the current-controllable device is detected. The driving current is controlled according to the conduction current. The higher the conduction current the higher the driving current.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application claims priority to and the benefit of Taiwan Application Series Number 101123953 filed on Jul. 4, 2012, which is incorporated by reference in its entirety. 
     BACKGROUND 
     The present disclosure relates generally to switched mode power supplies, more particularly to the switched mode power supplies using current-controllable devices as power switches. 
     Switched mode power supplies commonly utilize power switches to control the current flowing through inductive devices. In comparison with other kinds of power supply, switched mode power supplies usually enjoy compact size and excellent conversion efficiency, and are accordingly welcome in the industry of power supplies 
     Bipolar junction transistor (BJT), a kind of power switch, excels in simple device structure, cheap price, and low conduction loss, such that it is well adopted in low cost applications. Unlike a metal-oxide-semiconductor transistor (MOS), which is another kind of power switch and is driven according to its gate voltage, a BJT is a current-controllable device, requiring a current control apparatus to control the base current I b  flowing through the base electrode of the BJT. Base current I b  and collector current I c  merge together to become emitter current I e . The difference between emitter current I e  and collector current I c  could render, in a power supply, mismatch of output regulation or misjudgment for abnormal events. Furthermore, the switching speed of a BJT is known to be slower than that of a MOS, and it is desired in the art of circuit design of switched mode power supplies to quickly turn ON and OFF a BJT. 
     In this specification, the devices or apparatuses share the same reference characters have the same or similar function, structure, or characteristic, and can be obviously derived by a person skilled in the art based on the teaching herein. It is not required that they are exactly identical, however, and some might not be redundantly explained in consideration of brevity. 
     SUMMARY 
     Embodiments of the present invention disclose a control method for a switched mode power supply. The switched mode power supply comprises a current-controllable device. A driving current is provided to turn ON the current-controllable device. A conduction current passing through the current-controllable device is detected. The driving current is controlled according to the conduction current. The higher the conduction current the higher the driving current. 
     Embodiments of the present invention disclose a control apparatus for driving a current-controllable device. The control apparatus has a driver and a signal converter. The driver provides a driving current to the current-controllable device. The signal converter provides a control signal according to a conduction current passing through the current-controllable device. The driving current is generated according to the control signal. The higher the conduction current the higher the control signal and the driving current. 
     Embodiments of the present invention disclose a control method apt to a driver with a high-side driver and a low-side driver, commonly driving a power switch. The low-side driver is kept as disabled while using the high-side driver to turn ON the power switch. The driver is made to enter a dead time when the high-side and low-side drivers are both disabled. The dead time is terminated according to a conduction current passing through the power switch. After the dead time, the high-side driver is kept disabled and the low-side driver is used to turn OFF the power switch. 
     Embodiments of the present invention disclose a controller for driving a power switch. The controller includes a driver, a control logic and a condition decider. The driver has a high-side driver and a low-side driver, respectively turning ON and OFF the power switch. The control logic controls the driver. The condition decider is coupled to the control logic, for terminating a dead time according to a conduction current passing through the power switch. During the dead time, both the high-side and low-side drivers are disabled, not driving the power switch. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention can be more fully understood by the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
         FIG. 1  shows a switched mode power supply  10  according to embodiments of the invention; 
         FIG. 2  exemplifies the pulse width modulator together with the BJT and the current-sense resistor in  FIG. 1 ; and 
         FIG. 3  illustrates some waveforms of the signals in  FIG. 2 . 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 1  shows a switched mode power supply  10  according to embodiments of the invention. The switched mode power supply  10  has a topology of flyback converter, but the invention is not limited to. The invention could be applicable to a booster or a buck converter, for example. 
     A bridge rectifier  12  performs full-wave rectification, converting alternative-current (AC) power source from grid lines into direction-current DC line voltage V LINE  over high power line LINE and ground line GND. Connected in series between the high power line LINE and the ground line GND are the primary winding PRM of a transformer  14 , a BJT T S , and a current-sense resistor  22 . The BJT T S  controls the collector current I C  flowing through the primary winding PRM. During ON time when BJT T S  is ON and performs a short circuit, the collector current I C  ramps up over time, the transformer  14  energizing. During OFF time when BJT T S  is OFF and performs an open circuit, the magnetic energy stored in the transformer  14  is gradually released through the secondary winding SEC and a diode  16  to charge output capacitor  18 , to build up output voltage V OUT , and to power the loading  23 . An operational amplifier  24  generates compensation voltage V COM  on a compensation node COM, based on the difference between the output voltage V OUT  and a predetermined target voltage V Target , such that the output voltage V OUT  controls the compensation voltage V COM . 
     The current-sense voltage V CS  on a current-sense node CS represents the emitter current I e , which substantially flows through the current-sense resistor  22 . In case that the collector current I C  is very much larger than the base current I b , the emitter current I e  seemingly equals the conduction current flowing into the collector of the BJT T s  and through the primary winding PRM. A pulse width modulator  20 , by way of sensing the current-sense voltage V CS , detects the conduction current through the BJT T S . Based on the current-sense voltage V CS  and the compensation voltage V COM , the pulse width modulator  20  modulates the duty cycle of BJT T S . What is varied for the modulation is the ON time, the OFF time, or the operation frequency of the BJT T S , in individual or in combination. In one embodiment of the invention, for example, both the operation frequency and the ON time of the BJT T S  increase when the compensation voltage V COM  rises. 
       FIG. 2  exemplifies the pulse width modulator  20  together with the BJT T S  and the current-sense resistor  22 . Inside the pulse width modulator  20  are a clock generator  21 , a current generator  27 , transconductor  26 , a BJT driver  28 , a control logic  34 , and a condition decider  35 . 
     The clock generator  21 , based on the compensation voltage V COM , provides clock signal S CLK  to periodically turn the BJT T S  ON. A high-side driver  30  and a low-side driver  32  are in the BJT driver  28 , together driving the base electrode of the BJT T S . The driving current the high-side driver  30  provides raises the base voltage of the BJT T S , and that the low-side driver  32  provides lowers it. In one perspective, the high-side driver  30  and the low-side driver  32  are in charge of turning ON and OFF the BJT T S , respectively. The transconductor  26  is a kind of signal converter, converting the current-sense voltage V CS  to a ratio current I R . In one embodiment, I R =g m ×V CS , where g m  is the transconductance of the transconductor  26 . The clock signal S CLK  from the clock generator  21  decides the timings when the current generator  27  provides and varies an offset current I D , which will be detailed later. The ratio current I R  and the offset current I D  together flow to the high-side driver  30 . The control logic  34 , synchronized by the clock signal S CLK , periodically enables the high-side driver  30  to turn ON the BJT T S . The control logic  34  uses signals S H  and S L  to control the high-side driver  30  and the low-side driver  32 , respectively. When enabled by signal S H , for example, the high-side driver  30  provides a driving current to turn ON the BJT T S . When disabled by signal S H , the high-side driver  30  provides no driving current to the BJT T S . Similarly, a driving current is provided to turn OFF the BJT T S  when the low-side driver  32  is enabled, and it vanishes when the low-side driver is disabled. 
     The condition decider  35  shown in  FIG. 2  has two comparators  36  and  38 . The comparator  38  compares the compensation voltage V COM  with the current-sense voltage V CS ; and the comparator  36  does the compensation voltage V COM  with the sum of the current-sense voltage V CS  and a predetermined bias voltage V BIAS . As the current-sense voltage V CS  represents the emitter current I e  flowing away from the BJT T S , the compensation voltage V COM  represents a compensation current value I COM , with which the comparator  38  compares the emitter current I e . Analogously, the comparator  38  compares the emitter current I e  with the compensation current value I COM  deducted by a bias value I BIAS  represented by the bias voltage V BIAS . 
       FIG. 3  illustrates some waveforms of the signals in  FIG. 2 , where, from top to bottom, are the clock signal S CLK , the signal S H , the signal S L , the current-sense voltage V CS , the base current I b  (flowing into BJT T S  via the base electrode), and the offset current I D . Suggestively, please reference  FIG. 3  and  FIG. 2  as well for the following explanation. 
     At the moment t 0 , the clock signal S CLK  renders the control logic  34  to make the signal S L  “0” and the signal S H  “1” sequentially, as shown in  FIG. 3 . In other words, the low-side driver  32  is first disabled, and the high-side driver  30  is then enabled to turn ON the BJT T S . Meanwhile, as there starts some current flowing through the BJT T S , the current-sense voltage V CS  becomes positive and the BJT T S  enters a period named ON time T ON . A predetermined small time period right after the beginning of the ON time T ON , marked in  FIG. 3  from the moment t 0  to moment t 1 , is called as leading edge blanking time T LEB . During leading edge blanking time T LEB , the offset current I D  is a large constant I LEB  and the high-side driver  30  uses the offset current I D  alone to be the base current I b  to drive the BJT T S . 
     Starting from the moment t 1  when leading edge blanking time T LEB  ends, the offset current I D  changes to be a small constant I OFFSET . Meanwhile, the high-side driver  30  combines the ratio current I R  and the offset current I D  to be the base current I b  for keeping the BJT T S  ON. In other words, the base current I b  now is the sum of the ratio current I R  and the offset current I D . The current-sense voltage V CS  ramps up over time as the transformer  14  in  FIG. 1  energies, such that the ratio current I R  and the base current I b  rise as well. 
     At the moment t 2  when the current-sense voltage V CS  exceeds the compensation voltage V COM  deducted by bias voltage V BIAS , the comparator  36  changes its output and the control logic  34  accordingly makes the signal S H  “0” in logic, disabling the high-side driver  30 . As the high-side driver  30  stops providing driving current to the BJT T S , the base current I b  is almost 0 A. The period of time between the two moments t 1  and t 2  is named as linear-driven time T LD , hereinafter, during which the base current I b  driving the BJT T S  is generated according to the current-sense voltage V CS , and the higher the current-sense voltage V CS  the higher the base current I b . In linear-driven time T LD , the base current I b  is about constant I OFFSET  more than the ratio current I R , as shown in  FIG. 3 . 
     A period of time starting from the moment t 2  to the moment t 3  in  FIG. 3  is designated as dead time T DEAD  when both the signals S L  and S H  are “0”, disabling both the high-side driver  30  and the low-side driver  32 . The base current I b  is almost 0 A, and the base electrode of BJT T S  is left floating. At the beginning of the dead time T DEAD , the current-sense voltage V CS  declines, responding to the quick vanishing of the base current I b . Later on, the current-sense voltage V CS  resumes the ramping up because some residue charges at the base electrode of the BJT T S  starts being drained by the emitter electrode of the BJT T S . 
     At the moment t 3  when the current-sense voltage V CS  exceeds the compensation voltage V COM , the output of the comparator  38  changes, and the control logic  34  switches the signal S L  into “1” and keeps the signal S H  as “0”, terminating the dead time T DEAD . The high-side driver  30  is disabled and the low-side driver  32  enabled to drain the charges on the base electrode of the BJT T S , turning the BJT T S  OFF. In one embodiment, a switch in the low-side driver  32  shorts the base electrode to the ground line GND. Thus, the base current I b  suddenly becomes negative to pull down the voltage of the base electrode. When the voltage of the base electrode reaches 0V, the base current I b  converges to 0 A quickly, as shown in  FIG. 3 . 
     The period of time starting from the moment t 3  to the moment t 4  when the signal S H  is “0” is designated as OFF time T OFF , because the base electrode is shorted to ground line GND and the BJT T S  is constantly turned OFF. Hardly any current flows through the BJT T S  and the current-sense voltage V CS  is about 0V. 
     Contrary to the OFF time T OFF , the time period between the moment t 0  and moment t 3  is designated as ON time T ON  because of the considerable amount of conduction current flowing through the BJT T S . The ON time T ON  in  FIG. 3  consists of the leading edge blanking time T LEB , the linear-driven time T LD , and the dead time T DEAD . 
     In one embodiment, the bias voltage V BIAS  is a constant. In another embodiment, it varies, determined by the compensation voltage V COM . For example, the higher compensation voltage V COM  the higher bias voltage V BIAS . 
     By way of analyzing the results in  FIG. 2  and  FIG. 3 , the embodiment of  FIG. 2  can beneficially obtain the following achievements. 
     1. Good power saving: During the linear-driven time T LD , the base current I b  is constant I OFFSET  higher than the ratio current I R . Even although this constant I OSFFSET  could be very large and workable, it is preferably designed to be as small as the one slightly keeping BJT T S  working in a saturation mode. In other words, constant I OSFFSET  could be small such that BJT driver  28  consumes little power. 
     2. Quick switching speed: During the leading edge blanking time T LEB , the base current I b  is a large constant I LEB , which could quickly switch the BJT T S  from a cut off mode to a saturation mode. This quick switching speed beneficially reduces switching loss of the BJT T S , increasing the power conversion of the whole power supply. 
     3. Accurate current detection: When the ON time T ON  ends at the moment t 3 , the base current I b  is 0 A, and the emitter current I e , represented by the current-sense voltage V CS , is exactly the same as the collector current I C , which happens to be the very current flowing through the primary winding PRM of the transformer  14 . Accordingly, the utilization of the current-sense voltage V CS  at the moment t 3  for controlling the current passing through the primary winding PRM, as done in the embodiment of  FIG. 2 , will achieve an accurate result. 
     4. Variable length of the dead time T DEAD : The length of the dead time T DEAD  correlates to the current-sense voltage V CS  and the bias voltage V BIAS . Simply put, it is around the period of time for the current-sense voltage V CS  to increase for about the bias voltage V BIAS . In one embodiment where the bias voltage V BIAS  is about a constant, the higher the line voltage V LINE , the steeper the waveform of the current-sense voltage V CS  during the dead time T DEAD  and the shorter the dead time T DEAD . In another embodiment where the bias voltage V BIAS  varies along with the compensation voltage V COM , which somehow represents how heavy the loading  23  is in the secondary side, the dead time T DEAD  varies when the loading  23  changes. 
     While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.