Abstract:
To establish a conference connection between three participants in a TDM telephony system, use is made of the time-division switching stage which in many cases is already of a duplicated construction. The information signals (a, b, c) from the participants are written into corresponding addresses (AA, BB, CC) of two information memories while these addresses, after having been cyclically permuted, are written into the address memory associated with each of the information memories. When now the locations in the information memories are read in the sequence indicated by the address memories and summed thereafter, then each participant in the conference is supplied with a conference signal which is equal to the sum of the information signals of the two other participants in the conference connection.

Description:
The invention relates to a method of establishing conference connections between three conference participants in a TDM communication network, in which a conference signal comprising the sum of the information signals supplied by the other participants is applied to each of the conference participants. 
     The invention further relates to an arrangement for establishing conference connections in accordance with the method. 
     BACKGROUND OF THE INVENTION 
     In time-division multiplex (TDM) systems the encoded or non-encoded samples of the information (speech) supplied by a subscriber occupy time slots in consecutive frames of time slots. The connection established between two participants (for example via a time switching system or T-switch) results in the information contained in the relevant time slots of the two subscribers being mutually interchanged. If it is desired to establish a connection between three subscribers, a more complicated treatment and processing of the information stored in the (three) time slots per frame is required. 
     From German Patent Application No. 2918086, which has been laid open to public inspection, it is known to establish a conference connection between three participants by sequentially entering the information (speech samples) of the three subscribers A, B, C into one and the same memory location of a first memory. After the sample from A has been written into the first memory this sample (from A) is entered in the same location in a second memory and the sample from B is written into the first memory. When the sample from C is applied to the first memory the location in which sample B and the location in which sample A has been written is addressed by one addressing memory and the information stored in the first memory (sample from B) is added to the information in the second memory (sample from A) and transmitted in the outgoing time slot of subscriber C. This same cycle is thereafter performed for the subscribers A and B and is repeated thereafter, starting with C. 
     This method requires that the connection memory (first memory) which must be present in any case must be extended by a similar, additional memory, (second memory) which entails additional expense. 
     OBJECT OF THE INVENTION 
     It is an object of the invention to provide a novel concept of a method of establishing conference connections between three conference participants. 
     SUMMARY OF THE INVENTION 
     According to the invention, the method of establishing conference connections between three conference participants of the type described in the opening paragraph is characterized in that the information signals (a, b, c) from the participants are written into two equally large information memories at corresponding addresses (AA, BB, CC), that these addresses (AA, BB, CC) are written into two address memories each associated with one of the information memories, that the sequence in which the addresses are stored in one address memory (for example CC, AA, BB) is both cyclically permuted relative to the sequence in which the addresses are stored in the other address memory (BB, CC, AA), and stored in the two information memories (AA, BB, CC), that the information signals stored in the information memories in the corresponding memory locations given by the respective address memories are summed to form a conference signal (c+b, a+c and b+a, respectively) and that the relevant conference signal is applied to that conference participant who corresponds to the instantaneous address of the information memory (AA, BB and CC, respectively). 
     For reliability reasons large portions of the circuit are usually provided in dual form in communication networks. 
     It is advantageous for the method in accordance with the invention to be performed such that the information stores and the address memories associated therewith are implemented by co-using the connection memory required for two-way connections, the address memory associated therewith and the duplicate connection memory and the duplicate address memory associated therewith. 
     This enables a conference connection to be established between three participants virtually without additional means. 
     It is advantageous for the method in accordance with the invention, the information signals being encoded non-linearly more specifically PCM-coded and the information signals being converted into a linear code prior to the summing operation, to be constructed in such a way that the information signals are divided by two after summation and reconverted to the non-linear code. 
     According to the invention, the arrangement for establishing conference connections between three conference participants of the type described in the opening paragraph comprising a first and a second, equally large information memory, a first address memory and a summing circuit, the summing circuit being coupled to the two information memories for summing the information read from the address locations in the information memory, is characterized in that the arrangement comprises a second address memory, that the first address memory is associated with the first information memory and the second address memory is associated with the second information memory, that the first and second information memories are connected to an incoming line which in time-division multiplex comprises the information signals from the conference participants, the information signals of the participants being written into the two information memories in corresponding locations and that the arrangement further comprises means for cyclically permuting the address memory locations in which the addresses of the information memory locations from the conference participants are written. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     An embodiment of the invention and its advantages will now be described in greater detail by way of example with reference to the drawing, the sole FIGURE of which shows an embodiment of an arrangement for establishing a conference connection with reference to which the method in accordance with the invention will be further described. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The arrangment shown forms part of a PCM time division switching element by means of which not only conference connections can be established between three subscribers, but also the, more customary, connections between two subscribers. The information supplied by the subscribers is sampled, the samples are encoded (for example PCM-coded) and transmitted in the form of words of, for example, 8 bits within one of the available time slots in a block of, for example, 32 time slots. The other time slots may contain the words supplied by other subscribers. A group of n lines PCM1 1 , PCM1 2 , . . . PCM1 n , each comprising consecutive frames of 32 time slots are connected to a multiplexer MUX for converting these parallel applied frames of time slots into a super frame formed by n×32 time slots (a typical value of n is 16) on a supermultiplex line HW i . A first and a second information memory HWM 0  and HWM 1 , respectively is connected to the supermultiplex line HW i . The information contained in each time slot is written into one of the memory locations of both information memory HWM 0  and HWM 1 . The number of memory locations comprised in the information memories HWM 0  and HWM 1  depends on the anticipated number of connections. When the arrangement is only employed for the establishment of conference connections the number of memory locations will be rather small, compared with the number necessary if, simultaneously, connections between two participants must be established. 
     The outputs of the information memories HWM 0  and HWM 1 , respectively are connected to both the input of a code converter NLN 0  and NLN 1 , respectively and to an input SN i .sbsb.0 and SN i .sbsb.1, respectively of a switch SW. The outputs of code converters NLN 0  and NLN 1  are each connected to an input of a summing circuit ADD. The code converters NLN 0  and NLN 1  have for their object to convert the PCM words which were here assumed to have been nonlinearly encoded into linearly encoded words. 
     A dividing circuit DIV still to be described hereinafter is connected to an output of the summing circuit ADD. A reconverter LNL which has for its object to reconvert the now linearly encoded words into non-linearly encoded PCM words is connected to the dividing circuit DIV. The output of the reconverter LNL is connected via switch SW to an outgoing supermultiplex line HW u , which is connected to a demultiplexer DEM for converting the information stream on super multiplex line HW u  into n parallel information streams on the outgoing PCM-multiplex lines PCM u .sbsb.1, PCM u .sbsb.2, . . . PCM u .sbsb.n. 
     For the control of information memories HWM 0  and HWM 1  the arrangement comprises address memories HWA 0  and HWA 1 , which also acts as address converters as will be described below. HWA 0  and HWA 1  are, in turn, controlled by control circuit CTRL 0  and CTRL 1 , respectively. Each address memory HWA 0  and HWA 1  has at least as many storage locations as there are time slots in one super frame on the incoming supermultiplex line HW 1 . (Consequently 512 memory locations if 16 PCM-lines having frames of 32 time slots each are connected to the multiplexer MUX). 
     The arrangement shown operates as follows. Let it be assumed that a conference connection must be established between three conference participants A, B and C. The PCM words of these participants are transmitted in the time slots TA, TB and TC and are also written into the address AA, BB and CC, respectively of the information memories HWM 0  and HWM 1 . The information a from participant A, the information b from participant B and the information c from participant C are consequently present, after the entire superframe has been entered in both the information memory HWM 0  and in information memory HWM 1 . At corresponding addresses (AA, BB and CC) in the address memories HWA 0  and HWA 1  the address is entered of that memory location in the information memories HWM 0  and HWM 1  which contains information intended for the relevant participant. Since a connection between three participants must be established and the said memory location in the information memory only contains the information from one other participant, this is inadequate. Consequently, the addresses of the memory locations of the information memories are written after having been cyclically permuted, into the address memories HWA 0  and HWA 1  ; more specifically in such a way that at the addresses AA, BB and CC of address memories HWA 0  the information memory addresses CC, AA and BB respectively are written and that at the addresses AA, BB and CC of address memory HWA 1  the information memory addresses BB, CC and AA, respectively are written. This accomplishes that on addressing of information memory HWM 0  via the address stored at the address AA of address memory HWA 0 , namely information memory address CC, the information c is read and, after having been converted into a linear code by code converter NLN 0 , transmitted to the input of the summing circuit ADD. Simultaneously, the information memory HWM 1  is addressed via the address stored at the same address (AA) of the address memory HWA 0 , namely information memory address BB, and the information stored there (b) is read and transmitted to the summing circuit ADD via code converter NLN 1 . These items of information b, c are added together (b+c), divided thereafter by 2 by means of the dividing circuit DIV connected to the summing circuit and reconverted into the non-linear PCM code used. Under the control of the control circuits CTRL 0  and CTRL 1 , switch SW is adjusted to the position shown in the drawing and the conference signal (b+c/2) is transmitted in time slot TA (as address memory location AA has been addressed) on the outgoing supermultiplex line HW u . 
     For the two further participants in the conference a similar procedure is carried out. When the address BB of address memory HWA 0 , (HWA 1 ) is addressed, the information a(c) stored at address AA (CC) of the information memory HWM 0  (HWM 1 ) is read and the conference signal (a+b/2) is transmitted in time slot TB on the outgoing supermultiplex line HW u  to participant B. Likewise, when the address CC of address memory HWA 0  (HWA 1 ) is addressed the information b(a) is present at address BB (AA) to be read from the information memory HWM 0  (HWM 1 ) as a result of which the conference signal (b+a/2) is transmitted in time slot TC on the outgoing supermultiplex line HW u  to participant C. 
     If the arrangement shown is also employed to establish connections between two participants, then only one information memory (for example HWM 0 ) and one address memory (for example HWA 0 ) are required in principle. Under the control of the control circuit (for example CTRL 0 ) switch SW is adjusted to one of two possible positions, shown in the FIGURE by means of broken lines, (for example input SW i .sbsb.0 is switched to the supermultiplex line HU u ). 
     For reliability reasons large portions of the communication equipment are often duplicated. Thus a time-division multiplex system arranged in switch connections between two participants will generally still be constructed in duplicate and will, consequently consist of two identical units LR 0  and LR 1 . These units are also operated in parallel and switch SW is then adjusted to one of the two positions shown in the FIGURE by means of dotted lines, under the control of two control circuits CTRL 0  and CTRL 1 . Which position will be selected depends inter alia on the occurrence of parity errors or other errors in one of the two units LR 0  or LR 1 . 
     If such a duplicate time-division multiplex system is provided, it is possible to obtain with few additional means an arrangement with which connections can also be established between three participants. 
     It is further possible, if these additional means are provided, to make advantageous use of the additional means also for &#34;normal&#34; connections (connections between two subscribers). In that event switch SW is strictly speaking superfluous. The information (b) for subscriber A originating from subscriber B is stored in information memories HWM 0  and HWM 1  and, after having been read and added together (b+b) can be divided by 2 in dividing circuit DIV, as a result of which the information b is transmitted to subscriber A in time slot A on the outgoing supermultiplex line HU u . 
     Whether the converter (NLN i ), the reconverter (LNL), the summing circuit (ADD) and the dividing circuit (DIV) operate properly can be checked by comparing during two-way communications, for example the parity of the information signal obtained by conversion, addition, division and reconversion with the parity of the information signal previously stored in the information memories HWM 0  and HWM 1 . These two signals are identical if the processing of the first-mentioned, the outgoing, information signal was errorless.