Abstract:
According to one embodiment, four VVVF main circuit inverters for supplying electric power to drive a permanent-magnet synchronous motor are packaged into one unit. The four VVVF main circuit inverters are configured as a 4-in-1 inverter unit which shares a cooling mechanism for radiating heat generated due to power supply operation for the permanent-magnet synchronous motors to outside. A 2-in-1 semiconductor device package in which two semiconductor elements to convert electric power are packaged into one unit to be able to drive a permanent-magnet synchronous motor is contained in the 4-in-1 inverter unit. Thereby, individual control of inverters and reducing the size of the entire apparatus can be achieved for the electric-vehicle control apparatus.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is a Continuation Application of PCT Application No. PCT/JP2011/058104, filed Mar. 30, 2011 and based upon and claiming the benefit of priority from prior Japanese Patent Application No. 2010-084342, filed Mar. 31, 2010, the entire contents of all of which are incorporated herein by reference. 
     
    
     FIELD 
       [0002]    Embodiments described herein relate generally to an electric vehicle control apparatus using a cooling unit. 
       BACKGROUND 
       [0003]    In general, a permanent-magnet synchronous motor can efficiently utilize energy and generate less heat, compared with an induction motor, and can therefore be easily subjected to weight reduction. Therefore, demands for a permanent-magnet synchronous motor have been increasing in recent years. 
         [0004]    Such a permanent-magnet synchronous motor needs to be controlled by applying a voltage from a VVVF inverter in accordance with a rotation position of a rotor of each permanent-magnet synchronous motor. Therefore, individual control corresponding to each permanent-magnet synchronous motor is required. Accordingly, a special VVVF inverter is provided for each permanent-magnet synchronous motor, and a gate control apparatus for controlling each VVVF inverter is provided (for example, see Jpn. Pat. Appln. KOKAI Publication No. 2004-143577). 
         [0005]    Therefore, the number of control apparatuses increases in a conventional system which controls individually each permanent-magnet synchronous motor. Increase in size of the entire apparatus and increase in costs have caused problems. Therefore, “trolley control” of controlling a permanent-magnet synchronous motor in control units of two motors is introduced, and increase in size of the apparatus is reduced (for example, Jpn. Pat. Appln. KOKAI Publication No. 2009-72049). 
         [0006]      FIG. 9  is a circuit diagram of an electric-vehicle control apparatus which introduces conventional trolley control. Line power is supplied to a first main circuit  200  and a second main circuit  300  through a current collector (pantograph)  100 , a high-speed breaker  101 , a charging-resistance shortcircuit switch  102 , a charging resistor  103 . 
         [0007]    The first main circuit  200  comprises: a first opening contact device  104 ; a first filter reactor  105 ; an overvoltage limit circuit comprising a first overvoltage limit resistor  107  and a first overvoltage limit resistor switch  108 ; a first and a second direct voltage detector  109   a,    109   b;  a first and a second inverter filter capacitor  110   a,    110   b;  a VVVF inverter  111   a,    111   b  forming a 2-in-1 inverter unit  120   a.    
         [0008]    VVVF inverter  111   a  for the permanent-magnet synchronous electric motor  115   a  converts a power-line current as a direct current into an alternating current. The converted alternating current is supplied as a drive force to a permanent-magnet synchronous motor  115   a  through a current sensor  112   a  connected to a three-phase line, an electric-motor release contactor  113   a,  and an electric-motor internal voltage detector  114   a.  VVVF inverter  111   a  and VVVF inverter  111   b  are configured in the same manner as each other, and are connected in series with each other. The inverters form a 2-in-1 inverter unit  120   a  and share one heat radiator. 
         [0009]    The second main circuit  300  is configured in the same manner as the first main circuit  200 . The 2-in-1 inverter unit  120   a  and 2-in-1 inverter unit  120   b  are connected in parallel with each other. As a ground, a wheel  116  is connected to each of the 2-in-1 inverter unit  120   a  and the 2-in-1 inverter unit  120   b.    
         [0010]      FIG. 10  is a block diagram showing a gate control system of an electric-vehicle control apparatus shown in  FIG. 9 . As shown in  FIG. 10 , the 2-in-1 inverter unit  120   a  is provided with an overvoltage-limit controller element  107  and a gate control apparatus  130  for controlling VVVF inverters  111   a  and  111   b.  The inverter unit  120   b  is also configured in the same manner as above. In the figure, equal numerals surrounded by circles indicate that connection is made to each other. The power supply for the gate control apparatus (common controller  131 ) is provided for each set of 2-in-1 inverter units  120   a  and  120   b.    
         [0011]    The gate control apparatus  130  controls, by itself, VVVF inverters  111   a  and  111   b  and on/off of the overvoltage-limit control element  108 . Therefore, output currents detected by current sensors CTU 1 , CTW 1 , CTU 2 , and CTW 2  for VVVF inverters  111   a  and  111   b,  and an electric-motor internal voltage based on electric-motor internal-voltage detectors  114   a  and  114   b  are input to the gate control apparatus  130 . 
         [0012]    The output of the 2-in-1 inverter unit  120   a  is connected to each of the permanent magnet synchronous motors  115   a  and  115   b.  Control units depend on individual control methods. The release conductor  104  and filter reactor  105  are provided respectively for VVVF inverters  120   a  and  120   b,  and control units each are 2-in-1 inverter units for electric motors. 
         [0013]    In a conventional electric-vehicle control apparatus for a permanent-magnet synchronous motor using a 2-in-1 inverter unit, a large number of semiconductor elements need to be equipped. For each 2-in-1 inverter unit, a filter reactor, an overvoltage limit resistor, and an overvoltage limit control resistor switch are provided. Therefore, a large number of components are used, which makes it difficult to reduce the size of the entire apparatus. 
         [0014]    One embodiment has an object of providing an electric control apparatus capable of individually controlling a permanent-magnet synchronous motor and reducing the size of the entire apparatus. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0015]      FIG. 1  shows a circuit configuration of the first embodiment; 
           [0016]      FIG. 2  is an equivalent circuit diagram of a semiconductor device package according to the first embodiment; 
           [0017]      FIG. 3  is a chart showing a voltage output and a temperature increase of a semiconductor device package according to the first embodiment; 
           [0018]      FIG. 4  shows an exterior of the first embodiment; 
           [0019]      FIG. 5  shows a circuit configuration of the third embodiment; 
           [0020]      FIG. 6  shows a circuit configuration of the third embodiment; 
           [0021]      FIG. 7  is a U-phase circuit configuration of a 3-level power conversion apparatus according to the fourth embodiment; 
           [0022]      FIG. 8  is an exterior view of the 3-level power conversion apparatus according to the fourth embodiment; 
           [0023]      FIG. 9  shows a conventional circuit configuration; and 
           [0024]      FIG. 10  shows a conventional control configuration. 
       
    
    
     DETAILED DESCRIPTION 
       [0025]    Various embodiments will be described hereinafter. 
         [0026]    In general, according to one embodiment, there is provided an electric-vehicle control apparatus including: an inverter unit comprising a plurality of inverters each configured by a U-phase circuit, a V-phase circuit, and a W-phase circuit; and a cooling mechanism, the plurality of inverters provided on the cooling mechanism and sharing the cooling mechanism, wherein the U-phase, V-phase, and W-phase circuits each are configured as a semiconductor device package including two semiconductor switching elements contained in one package and in series. 
         [0027]    Hereinafter, embodiments will be described with reference to the drawings. 
       First Embodiment 
       [0028]    The first embodiment of the invention will be described with reference to the drawings. 
         [0029]      FIG. 1  shows a circuit configuration of an electric-vehicle control apparatus of the first embodiment according to the present invention.  FIG. 2  is an equivalent circuit diagram of a semiconductor device package according to the first embodiment.  FIG. 3  is a chart showing a voltage output and a temperature increase of a semiconductor device package according to the first embodiment.  FIG. 4  is an exterior view showing the first embodiment. 
         [0030]    Configuration of 4-in-1 Inverter Unit 
         [0031]    The circuit configuration of the electric-vehicle control apparatus according to the present embodiment comprises a first 4-in-1 inverter unit  1 , as shown in  FIG. 1 . On a direct-current input side, a circuit of the first 4-in-1 inverter unit  1  is configured by a pantograph  4 , a high-speed breaker  5 , a charging-resistor shortcircuit contactor  6 , a charging resistor  7 , a release contactor  8 , a filter reactor  9 , an overvoltage limit resistor  10 , an overvoltage-limit switching element  11 , a wheel  12 , and a filter capacitor  14 . On an alternating-current-output-side, a circuit is configured by permanent-magnet-synchronous electric motors  2  ( 2   a,    2   b,    2   c,  and  2   d ), motor release contactors  3  ( 3   a,    3   b,    3   c,  and  3   d ), and electric current sensors  34  ( 34   a,    34   b,    34   c,  and  34   d ). 
         [0032]    The pantograph  4  is connected to the high-speed breaker  5 , which is connected to the charging-resistor-shortcircuit conductor  6 . The charging-resistor-shortcircuit conductor  6  is connected in parallel with the charging resistor  7  and in series with the release contactor  8 . The release contactor  8  is connected to the filter reactor  9 . The filter reactor  9  is connected to a positive direct-current terminal of the first 4-in-1 inverter unit  1 , and a negative direct-current terminal is connected to a wheel  12 . An overvoltage-limit serial circuit  19  configured by serially connecting the overvoltage limit resistor  10  and the overvoltage-limit-control switching element  11  is connected, at one terminal, to the filter reactor  9  and the positive direct-current terminal of the first 4-in-1 inverter unit  1 , and is connected, at another terminal, to the negative direct-current terminal of the first 4-in-1 inverter unit  1  and the wheel  12 . The filter capacitor  14  and the direct-current voltage sensor  15  each are connected in parallel on the direct current side of the first 4-in-1 inverter unit  1 . On the alternating current side of the first 4-in-1 inverter unit  1 , current sensors  34   a,    34   b,    34   c,  and  34   d  are provided on two lines among output three-phase lines. Connected to the alternating current side are four permanent-magnet synchronous motors  2   a,    2   b,    2   c , and  2   d  through the motor release contactors  3   a,    3   b,    3   c , and  3   d.    
         [0033]    The first 4-in-1 inverter unit  1  is configured by VVVF inverters  21   a  to  21   d,  and VVVF inverters  21   a  to  21   d  are connected in parallel with each other on the direct current side. 
         [0034]    VVVF inverter  21   a  is configured by a U-phase semiconductor device package  22   a,  a V-phase-semiconductor device package  22   b,  a W-phase-semiconductor device package  22   c,  and an inverter filter capacitor  13   a.  U-, V-, and W-phase semiconductor device packages  22   a  to  22   c  are connected in parallel with each other on the direct current side, and are connected in parallel with the inverter filter capacitor  13   a.  VVVF inverters  21   b  to  21   d  each are configured in the same manner as VVVF inverter  21   a.    
         [0035]    The configuration of the control system is the same as  FIG. 10 , and each inverter  111  is controlled individually. 
         [0036]    Configuration of Semiconductor Device Package 
         [0037]      FIG. 2  is an equivalent circuit diagram of a semiconductor device package  22 .  FIG. 3  shows a switching state of a semiconductor device in the semiconductor device package, and a temperature state of the semiconductor device package by switching thereof. 
         [0038]    As shown in  FIG. 2 , the semiconductor device package  22  is configured by a serial circuit of a positive element  24   a  of an upper arm and a negative element  24   b  of a lower arm. This serial circuit is connected in parallel to the capacitor  13 . The positive element  24   a  of the upper arm is a parallel connection circuit of a switching element Tr 1  and a diode D 1 . The negative element  24   b  of the lower arm is an parallel connection circuit of a switching element Tr 2  and a diode D 2 . A connection point  26  between the positive element  24   a  and the negative element  24   b  is connected to an output terminal, and an output voltage is thereby provided. 
         [0039]    The switching element Tr 1  of the positive element  24   a  is turned on, and the switching element Tr 2  of the negative element  24   b  is turned off. Then, an output current is made flow to a load through the switching element Tr 1  and output terminal from a power line. Meanwhile, the switching element Tr 1  of the positive element  24   a  is turned off, and the switching element Tr 2  of the negative element  24   b  is turned on. Then, an output current is made flow from a load through the switching element Tr 1  and an output terminal to a negative power-supply side. By repeating such switching, the direct current power is converted into an alternating power. 
         [0040]      FIG. 3(   a ) shows a waveform of a switching voltage (gate signal) waveform of the positive element  24   a,  and  FIG. 3(   b ) shows a switching voltage waveform of the negative terminal  24   b.    FIG. 3(   c ) is an output voltage waveform of a semiconductor device package  22 .  FIG. 3(   d ) is a graph showing a temperature increase of the positive element  24   a.    FIG. 3(   e ) is a graph showing a temperature increase of the negative terminal  24   b.    
         [0041]    As shown in  FIG. 3(   d ), the temperature of the positive element  24   a  increases when the positive element  24   a  shown in  FIG. 3(   a ) is on. The temperature does not substantially change when the positive element  24   a  is off. Therefore, the temperature of the positive element  24   a  gradually increases as switching operation of on/off is repeated. As shown in  FIG. 3(   e ), the temperature of the negative element  24   b  gradually increases as switching operation of on/off is repeated. Here, the on state of the positive element  24   a  and the on state of the negative element  24   b  are alternately repeated. Therefore, the entire heat generation of the semiconductor device package  22  is constant as shown in  FIG. 3(   f ). 
         [0042]    The 4-in-1 inverter unit  1  is configured by packaging, into a unit, the four VVVF inverters  21   a  to  21   d  which use the semiconductor device package  22  as described for each phase.  FIG. 4  shows an exterior of the first 4-in-1 inverter unit  1  thereof. 
         [0043]    As shown in  FIG. 4 , the first 4-in-1 inverter unit  1  is configured by providing four three-phase VVVF inverters  21   a  to  21   d  on one cooling mechanism  23 . VVVF inverters  21   a  to  21   d  are attached to a flat surface of a heat receiving plate  23   a  forming part of the cooling mechanism  23 . To a surface of the heat receiving plate  23   a  opposite to the flat surface to which VVVF inverters  21   a  to  21   d  are attached, a heat radiator  23   b  forming the other part of the cooling mechanism  23  is connected. 
         [0044]    Operation 
         [0045]    The operation of the electric-vehicle control apparatus according to the present embodiment will be described. 
         [0046]    In  FIG. 1 , a direct current supplied from a power line through the pantograph  4  is supplied to the filter capacitor  14  through the high-speed breaker  5  which is normally on, the charging resistor  7 , the release contactor  8  which is also normally on, and the filter reactor  9 . A direct current flows through the capacitors  13   a  to  13   d  of the inverters connected in parallel with the filter capacitor  14 , and sufficient charges are stored. Then, the charging-resistor shortcircuit contactor  6  turns on, and the direct current from the power line is supplied to the first 4-in-1 inverter unit  1  through the high-speed breaker  5 , charging-resistor shortcircuit contactor  6 , release contactor  8 , and filter reactor  9 . 
         [0047]    When the inverter filter capacitor  13   a - 13   d  is fully charged and when direct-current line power is supplied to the first 4-in-1 inverter unit  1 , a direct current voltage is applied to semiconductor devices included in UVW-phase semiconductor device packages  22   a  to  22   c  in each of VVVF inverters  21   a  to  21   d.  The supplied direct power is converted into alternating current power by switching of the semiconductor elements. The converted alternating-current power is supplied to and started to drive the four permanent-magnet synchronous motors  2 . 
         [0048]    In the present embodiment, for example, when the first 4-in-1 inverter unit  1  is applied with a power-line voltage of 1500 V, the same 1500 V is applied to each of VVVF inverters  21   a  to  21   d.  The voltage of 1500 V is applied to each of VVVF inverters  21   a  to  21   d , a corresponding current to the voltage flows through the permanent-magnet synchronous motor  2 , and drives the permanent-magnet synchronous motor  2 . 
         [0049]    Thus, the permanent-magnet synchronous motor  2  is driven by power conversion of converting direct-current power of the first 4-in-1 inverter unit  1  into an alternating-current power. However, power conversion loss occurs at the time of electric power conversion. The electric-power conversion loss is caused as heat from a semiconductor device. Generated heat transfers to the heat receiving plate  23   a,  then transfers from the heat receiving plate  23   a  to the heat radiator  23   b , and is radiated out of the heat radiator  23   b.  That is, the heat generated by power conversion loss does not stay in the vehicle but is radiated to outside. 
         [0050]    Further, if one VVVF inverter  21  malfunctions in the first 4-in-1 inverter unit  1  during work of the electric-vehicle control apparatus and if the control apparatus (not shown) detects the malfunctioning, all the four VVVF inverters  21   a - 21   d  are released by releasing the high-speed breaker  5  ( FIG. 1 ). 
         [0051]    Further, if the direct-current power sensor  15  detects excess of the direct-current voltage supplied to the first 4-in-1 inverter unit  1  by variation of the power-line voltage during work of the electric-vehicle control apparatus, the overvoltage-limit switching element  11  is turned on, thereby to consume the direct-current power by the overvoltage limit resistor  10 , and to remove an excess of the voltage. Thus, the overvoltage-limit switching element  11  is controlled to turn on/off, based on an output of the direct-current voltage sensor  15 . 
         [0052]    Effects 
         [0053]    In the electric-vehicle control apparatus configured in this manner, VVVF inverters  21   a  to  21   d  each having WW-phase semiconductor device packages  22   a  to  22   c  share the heat radiator  23   b.  Therefore, a heat generation amount of the first 4-in-1 inverter unit  1  which contains VVVF inverters  21   a  to  21   d  is equalized over the entire unit, and can therefore be efficiently cooled. Further, if semiconductor elements are individually set on a heat radiator as in the conventional elements, a setting space for twenty four semiconductor elements is required. In the present embodiment, however, use efficiency of the cooler  23  improves and space saving can be performed, by using the device package  22  which contains two semiconductor devices so as to equalize the heat generation amounts of respective semiconductor devices. As a result of this, the 4-in-1 inverter unit in which twelve semiconductor device packages  22  are attached to the heat radiator  23  can be configured. 
         [0054]    Further, the filter reactor  9 , overvoltage limit resistor  10 , overvoltage-limit switching element  11  are shared in one apparatus. Accordingly, the number of components is reduced, and the entire electric-vehicle apparatus can be made smaller. 
         [0055]    Further, the direct-current voltage sensor  15 , current sensors  34   a  to  34   d,  and motor release contactors  3   a  to  3   d  can be contained in the 4-in-1 inverter unit  1 . In this case, a further effect of space saving is achieved, and wiring is simplified by containing a great number of components in a housing. Manufacture, placement, and maintenance of the entire apparatus can be facilitated. 
       Second Embodiment 
       [0056]    The second embodiment of the invention will be described with reference to the drawings. 
         [0057]      FIG. 5  shows a circuit configuration of the second embodiment. The same components as those in  FIGS. 1 to 4  are respectively denoted at the same reference signs, and descriptions thereof will be omitted herefrom. 
         [0058]    Configuration 
         [0059]    The circuit configuration of the present embodiment differs from the circuit configuration of the first embodiment in that a different connection method is employed for VVVF inverters  21   a  to  21   d  forming the 4-in-1 inverter unit, and in that, on the direct-current side of each inverter  21 , the direct-current voltage sensor  32  and inverter filter capacitor  13  each are connected in parallel. In this respect, descriptions will now be made below. 
         [0060]    A second 4-in-1 inverter unit  30  is configured by VVVF inverters  21   a  to  21   d.  VVVF inverters  21   a  and  21   b  connected in series form a serial inverter circuit  33   a . VVVF inverters  21   c  and  21   d  form a serial inverter circuit  33   b.  The serial inverter circuits  33   a  and  33   b  are connected in parallel with each other. 
         [0061]    On the direct-current side of VVVF inverter  21   a , the inverter filter capacitor  13   a  and the direct-current voltage sensor  32   a  are connected in parallel. VVVF inverters  21   c  and  21   d  have the same configuration as VVVF inverters  21   a  and  21   b.  The inverter filter capacitors  13   c  and  13   d  and the direct-current voltage sensors  32   c  and  32   d  are connected in parallel on the direct-current side. 
         [0062]    Operation 
         [0063]    The operation of the electric-vehicle control apparatus according to the present embodiment will be described. 
         [0064]    In  FIG. 5 , for example, when a second 4-in-1 inverter unit  30  is applied with a power-line voltage of 1500 V, the voltage of 1500 V is applied to each of the serial inverter circuits  33   a  and  33   b.  In each of the serial inverter circuits  33   a  and  33   b,  the power-line voltage of 1500 V is divided into two partial voltages. A voltage of 750 V is applied to each of VVVF inverters  21   a  to  21   d,  and a current corresponding to the voltage flows through a permanent-magnet synchronous motor  2 , and drives the permanent-magnet synchronous motor  2 . 
         [0065]    At this time, the direct-current voltage sensor  32   a  detects a direct-current-side voltage of VVVF inverter unit  21   a.  Similarly, the direct-current voltage sensors  32   b  to  32   c  respectively detect direct-current-side voltages of VVVF inverter units  21   b  to  21   d.    
         [0066]    Effects 
         [0067]    An effect of the electric-vehicle control apparatus according to the second embodiment is that the voltage applied to each of VVVF inverters  21  is a voltage obtained by dividing the power-line voltage by two. That is, switching of the semiconductor devices is performed at a lower voltage than the first embodiment. Therefore, heat generated as power conversion loss can be reduced. Since heat generation is reduced, the cooling mechanism can be made smaller, and energy can be saved during driving of the apparatus. 
         [0068]    By detecting a direct-current-side voltage value of each VVVF inverter  21  by using the direct-current voltage sensor  32 . The inverters can be controlled more accurately. 
       Third Embodiment 
       [0069]    The third embodiment of the invention will be described with reference to the drawings. 
         [0070]      FIG. 6  shows a circuit configuration of the third embodiment. The same components as those in  FIGS. 1 to 4  are respectively denoted at the same reference signs, and descriptions thereof will be omitted herefrom. 
         [0071]    Configuration 
         [0072]    The circuit configuration of the present embodiment differs from the circuit configuration of the first embodiment in that a different connection method is employed for VVVF inverters  21   a  to  21   d  forming a 4-in-1 inverter unit, and in that, on the direct-current side of each inverter  21 , a direct-current voltage sensor  40  and a filter capacitor  41  each are provided. In this respect, descriptions will be made below. 
         [0073]    In  FIG. 6 , a third 4-in-1 inverter unit  42  is configured by VVVF inverters  21   a  to  21   d.  VVVF inverters  21   a  and  21   b  connected in series form a parallel inverter circuit  43   a.  VVVF inverters  21   c  and  21   d  form a parallel inverter circuit  43   b.  The parallel inverter circuits  43   a  and  43   b  are connected in parallel with each other. On the direct-current side of VVVF inverter  43   a,  the filter capacitor  41   a  and the direct-current voltage sensor  40   a  are connected in parallel. Similarly, the parallel inverter circuit  40   b  is connected to each of the filter capacitor  41   b  and the direct-current voltage sensor  40   b.    
         [0074]    Operation 
         [0075]    Next, operation of the present embodiment will be described. 
         [0076]    In the present embodiment, for example, when a third 4-in-1 inverter unit  42  is applied with a power-line voltage of 1500 V, a divided voltage of 750 V is applied to each of the parallel inverter circuits  43   a  and  43   b.  When the parallel inverter circuits  43   a  and  43   b  each are applied with the voltage 750 V, the voltage of 750 V is applied to each of VVVF inverters  21   a  to  21   d.  A current corresponding to the voltage flows through a permanent-magnet synchronous motor  2 , and drives the permanent-magnet synchronous motor  2 . 
         [0077]    Effects 
         [0078]    The present embodiment can achieve the same effects as the first embodiment. That is, the voltage applied to each of VVVF inverters is a voltage obtained by dividing twice the power-line voltage. That is, switching of the semiconductor devices is performed at a lower voltage than the first embodiment. Therefore, heat generated as power conversion loss can be reduced. Since heat generation is reduced, the cooling mechanism can be made smaller, and energy can be saved during driving of the apparatus. 
         [0079]    Since the direct-current side of parallel inverter circuits  43   a  and  43   b  are detected by direct-current voltage sensors  40   a  and  40   b,  the number of components can be smaller than the second embodiment. 
       Fourth Embodiment 
       [0080]    The fourth embodiment of the invention will be described with reference to the drawings. 
         [0081]      FIG. 7  is a circuit diagram of one of U, V, and W phases of 3-level power conversion apparatus according to the fourth embodiment. Hereinafter, this phase is referred to as a U-phase.  FIG. 8  is an exterior view showing the fourth embodiment. The same components as those in  FIGS. 1 to 4  are respectively denoted at the same reference signs, and descriptions thereof will be omitted herefrom. 
         [0082]    Configuration 
         [0083]    The fourth embodiment is a modification of a semiconductor device package  22  (2-level output) according to the first embodiment into a semiconductor device package  22  of a 3-level output, and is applied to the inverter unit. The modification will now be described below. 
         [0084]      FIG. 7  shows a circuit configuration of the U-phase of the 3-level power conversion apparatus according to the present embodiment. This U-phase circuit comprises a first element  65   a,  a second element  65   b,  a third element  65   c,  a fourth element  65   d,  and a first clamp diode  69   a,  and a second clump diode  69   b.    
         [0085]    A serial U-phase circuit is configured by serially connecting the first element  65   a,  second element  65   b , third element  65   c,  and fourth element  65   d.  The first clump diode  69   a  and second clump diode  69   b  are connected in series. An anode of the first clump diode  69   a  is connected between the first element  65   a  and the second element  65   b.  A cathode of the second clump diode  69   b  is connected between the third element  65   c  and the fourth element  65   d.  The first element  65   a  and the third element  65   c  are contained in the first U-phase semiconductor device package  66   a.  The second element  65   b  and fourth element  65   d  are contained in the second U-phase semiconductor device package  66   d.    
         [0086]      FIG. 8  is an exterior view of a power conversion apparatus according to the fourth embodiment. 
         [0087]    In  FIG. 8 , a first V-phase semiconductor device package  67   a,  a second V-phase semiconductor device package  67   b,  and a third V-phase semiconductor device package  67   c  of a V-phase circuit  67 , a first W-phase semiconductor device package  68   a,  a second W-phase semiconductor device package  68   b,  and a third W-phase semiconductor device package  68   c  of the W-phase circuit  68  are commonly configured in the same manner as the U-phase circuit  66 . 
         [0088]    Next, the U-phase circuit  66 , V-phase circuit  67 , and W-phase circuit  68  are set on a heat receiving plate  23   a  of the cooling mechanism. 
         [0089]    As shown in  FIG. 8 , the U-phase circuit  66  and the W-phase circuit  68  are provided on two sides of the heat receiving plate  23   a.  The V-phase circuit  67  is provided between the U-phase circuit  66  and the W-phase circuit  68 . In the U-phase circuit  66 , a first U-phase semiconductor device package  66   a,  a second U-phase semiconductor device package  66   b,  and a third U-phase semiconductor device package  66   c  are provided in this order from upside. In the V-phase circuit  67 , a first V-phase semiconductor device package  67   a,  a second V-phase semiconductor device package  67   b,  and a third V-phase semiconductor device package  67   c  are provided in this order from upside. In the W-phase circuit  68 , a first W-phase semiconductor device package  68   a,  a second W-phase semiconductor device package  68   b,  and a third W-phase semiconductor device package  68   c  are provided in this order from upside. 
         [0090]    Operation 
         [0091]    In the U-phase circuit  66 , when a semiconductor element performs switching for power conversion, inductances of the second element  65   b  and the third element  65   c  are the greatest. That is, heat generation from the second element  65   b  and third element  65   c  is the greatest. Next, a heat generation amount from the first element  65   a  and fourth element  65   d  is the greatest. A heat generation amount from the first clump diode  69   a  and the second clump diode  69   b  is the smallest. The same as described above also applies to the V-phase circuit  67  and W-phase circuit  68 . Therefore, a heat generation amount generated from the first semiconductor device package  66   a  ( 67   a  and  68   a  as well) which contains the first element  65   a  and the third element  65   c  combined with each other is equal to a heat generation amount generated from the second semiconductor device package  66   b  ( 67   b  and  68   b  as well). A heat generation amount from the third semiconductor device package  66   c  ( 67   c  and  68   c  as well) which contains a first clump diode  69   a  and a second clump diode  69   b  combined with each other is lower than a heat generation amount generated from the first semiconductor device packages  66   a,    67   a,  and  68   a  and the second semiconductor device packages  66   b,    67   b,  and  68   b.    
         [0092]    Effects 
         [0093]    The electric-vehicle control apparatus configured as described above is arranged so as to sandwich the third semiconductor device packages  66   c,    67   c,  and  68   c  between the first semiconductor device packages  66   a ,  67   a,  and  68   a  and the second semiconductor device packages  66   b,    67   b,  and  68   b.  In this manner, the heat transferred to the heat receiving plate  23   a  is made uniform throughout the entire heat receiving plate  23   a , and efficient cooling can be achieved by the cooling mechanism  23 . Further, the 3-level power conversion apparatus having a greater number of semiconductor elements can be made even smaller than in a conventional apparatus. 
         [0094]    The semiconductor device package  22  can be applied not only to a 4-in-1 inverter unit in which four VVVF inverter units  21  are mounted on one cooling mechanism as shown in the first to fourth embodiments but also to a different configuration such as 2-in-1 inverter unit. 
         [0095]    While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.