Abstract:
The present invention discloses a linear regulator and a voltage regulation method. The method comprises: providing a power transistor for converting a supply voltage to an output voltage to a load according to the conduction condition of the power transistor; controlling the conduction condition of the power transistor according to a comparison between a feedback signal relating to the output voltage and a reference voltage; obtaining a signal relating to a load condition; and controlling the conduction capability of the power transistor according to the signal relating to the load condition.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a voltage regulator, and in particular to a linear regulator with fast response to the condition of a load. 
     2. Description of the Related Art 
     A typical example of linear regulators is the low drop-out (LDO) circuit.  FIG. 1  shows a conventional LDO circuit  10 , which includes a transconductor gm that controls a power transistor P 0  to turn on or turn off according to a comparison between a feedback signal FB and a reference voltage Vref, so that a supply voltage Vcc Is converted to an output voltage Vout. 
     Such regulator has a drawback that it can not respond in time when its load changes from heavy to light or no load; its output is unstable under such circumstance, that is, the output overshoot will last a long time until it is relieved, and it will consume power unnecessarily. 
     In view of the above, a linear regulator with fast response to the condition of a load is desired. 
     SUMMARY OF THE INVENTION 
     A first objective of the present invention is to provide a linear regulator with fast response to the condition of a load. 
     A second objective of the present invention is to provide a voltage regulation method. 
     To achieve the foregoing objectives, in one aspect, the present invention discloses a linear regulator comprising: an adjustable power transistor having a first end coupled to a supply voltage, a second end coupled to an output voltage, and a third end for receiving a comparison signal; and a control circuit for generating a control signal to adjust a characteristic of the adjustable power transistor, wherein the adjustable power transistor is controlled by the comparison signal. 
     From another aspect, the present invention discloses a linear regulator comprising: a power transistor having a first end coupled to a supply voltage, and a second end coupled to an output voltage; a transconductor having an gain, which receives and compares a feedback signal relating to the output voltage with a reference voltage to generate a comparison signal to a third end of the power transistor; a clamp circuit coupled between the first end and the third end for control a voltage difference between the first end and the third end to avoid providing too much current to the second; and a control circuit for generating a control signal to adjust at least one of the gain of the transconductor and a characteristic of the power transistor according to the comparison signal. 
     From a further other aspect, the present invention discloses a voltage regulation method comprising: providing a power transistor to generate an output signal to a load according to the conduction condition of the power transistor; obtaining a control signal according to a load condition of the load; and controlling the conduction condition of the power transistor according to the control signal. 
     For better understanding the objects, characteristics, and effects of the present invention, the present invention will be described below in detail by illustrative embodiments with reference to the attached drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a circuit diagram schematically showing a conventional LDO circuit. 
         FIG. 2  is a circuit diagram schematically showing one embodiment of the present invention. 
         FIG. 3  shows an example to obtain the required current signal. 
         FIG. 4  shows an example of the analog-to-digital converter (ADC). 
         FIG. 5  shows an embodiment of the variable power transistor according to the present invention. 
         FIG. 6  is a circuit diagram schematically showing another embodiment according to the present invention. 
         FIG. 7  shows an example of the variable current source. 
         FIG. 8  is a circuit diagram schematically showing a further embodiment according to the present invention. 
     
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       FIG. 2  schematically shows a first embodiment according to the present invention, in which an LDO circuit is shown as an example of linear regulators. As shown in the figure, the linear regulator  100  of the present invention includes a power transistor  12  having a variable size; its size is adjustable by a control signal CS. In the present invention, at least one characteristic of the power transistor  12  is adjustable. In this embodiment, the control signal CS is an N-bit digital signal generated by an analog-to-digital converter (ADC)  14  according to a voltage signal corresponding to the current signal flowing through the power transistor  12 . It requires a large current due to the heavy load, thus, the control signal CS enlarge the size of the variable power transistor  12 ; when the load changes from heavy to light or no load, since the required current decreases, the control signal CS shrinks the size of the variable power transistor  12  to speed up its response time such that the circuit quickly enters a stable state, improving the efficiency of the circuit. 
     There are many ways to obtain the current signal, one of which is shown in  FIG. 3  as an example. The current flowing through the power transistor  12  can be determined by the current flowing through the transistor  18  and the matching ratio between the transistor  12  and the transistor  18 . Note that it is not required to know the exact current flowing through the power transistor  12 ; only a rough estimation is required to know the load condition, i.e., heavy or light load. 
     There are many ways to embody the ADC, one of which is shown in  FIG. 4  as an example. The current signal (in the form of a voltage signal corresponding to the current flowing through the power transistor  12 ) is compared with multiple different reference voltages Ref  1  to Ref N, and an N-bit digital control signal CS is generated thereby. ADC is well known to those skilled in this art, so the details thereof are not further explained here for simplicity. 
     There are also many ways to adjust the size of the power transistor  12 , one of which is shown in  FIG. 5  as an example. As shown in the figure, the output of the transconductor  16  controls the gates of multiple power transistors  121 - 12 N, and the sizes (gate widths) of these power transistors may be, e.g., 1:1:1:1 . . . , or 1:2:4:8 . . . , etc. The output of the ADC  14  (i.e., the N-bit digital control signal CS) determines whether each transistor is functioning. In this embodiment, when all of the output bits of the ADC  14  are high, the multiple power transistors  121 - 12 N are all functioning; while when only some of the output bits of the ADC  14  are high, only the corresponding power transistors  121 - 12 N are functioning. Thus, the size of power transistor  12  is adjustable. 
       FIG. 6  shows a linear regulator  200  according to another embodiment of the present invention. In this embodiment, the power transistor  22  is of a fixed size, but the gain of the transconductor  26  is adjustable by the control signal CS. As shown in the figure, the transconductor  26  includes a variable current source  28 ; by adjusting the current of the variable current source  28 , the relationship between the feedback signal FB and the gate voltage of the power transistor  22  corresponding changes. When the load changes from heavy to light, the current flowing through the power transistor  22  in its ON state can be quickly reduced by decreasing the gain of the transconductor  26 , so that the linear regulator quickly reaches a stable state. 
     There are also many ways to embody the variable current source  28 , one of which is shown in  FIG. 7  as an example. As shown in the figure, the variable current source  28  includes a current mirror which is controlled by the output of the ADC  14  to determine the total current. That is, when some of the output bits of the ADC  14  are high, only the corresponding switches  281 - 28 N are ON to enable the corresponding paths to mirror the current. Thus, a variable current source with an adjustable total current is provided. 
       FIG. 8  shows a linear regulator  300  according to a further embodiment of the present invention. In this embodiment, both the size of the power transistor  12  and the gain of the transconductor  26  are adjustable. The size of the power transistor  12  and the gain of the transconductor  26  can be both controlled by the same control signal CS, or each controlled by different bits of the same control signal CS, or each controlled by a different control signal (the latter not shown; this can be embodied by, e.g., providing two ADCs performing analog-to-digital conversion according to different reference voltage levels). 
     Moreover, the circuit further includes a clamp circuit  31  to limit the gate-to-drain voltage difference Vgd of the power transistor  12  below a predetermined threshold, so as to avoid providing too much current to the output terminal, damaging a load circuit connected to the output terminal, that is to say, the clamp circuit  31  is such a circuit that provides a protection mechanism for the load circuit connected to the output terminal. 
     The features, characteristics and effects of the present invention have been described with reference to its preferred embodiments, for illustrating the spirit of the invention and not for limiting the scope of the invention. Various other substitutions and modifications will occur to those skilled in the art, without departing from the spirit of the present invention. For example, there are other locations to obtain the current signal than the one shown in  FIG. 2 ; as an example, the current signal can be obtained from the output terminal. And, there are various ways to adjust the size of the power transistor  12  other than the one shown in  FIG. 5 , i.e., to adjust the size of the power transistor  12  by controlling the switches  111 - 11 N. As an example, the output bits of the ADC  14  can be used to directly control the gates of the corresponding power transistors  121 - 12 N, and omitting the switches  111 - 11 N. Furthermore, it is only one of the preferred embodiments to control the size of the power transistor  12  by a digital signal after an analog-to-digital conversion. The size control can be done by other methods, which also belong to the scope of the present invention. Therefore, all such substitutions and modifications should be embraced within the scope of the invention as defined in the appended claims.