Abstract:
Herein is disclosed a control method suitable for a switching mode power supply. A power switch is controlled according to a clock signal to transfer electrical energy from an input power source to an output power source. A feedback signal is provided in response to an output voltage of the output power source. A clock signal is generated in response to the feedback signal and an input voltage of the input power source. The clock signal has a clock frequency determining a switching frequency of the power switch. When the feedback signal exceeds a relatively-high level, the clock frequency increases in response to decrease to the input voltage. When the feedback signal is below a relatively low level, the clock frequency is independent from the input voltage.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This application claims priority to and the benefit of U.S. Provisional Application No. 61/899,962 filed on Nov. 5, 2013, which is incorporated by reference in its entirety. 
     
    
     BACKGROUND 
       [0002]    The present disclosure relates generally to control methods and apparatuses for determining a clock frequency of a switching mode power supply. 
         [0003]    In addition to generating output power sources fulfilling required specifications such as regulated output voltage, current, power, etc. every power supply should be capable of protecting itself from damages caused by abnormal operations. For example, power supplies in the art are commonly equipped with means for over voltage protection (OVP), over current protection (OCP), over load protection (OLP), over temperature protection (OTP), and the like. 
         [0004]    As eco-friendly topics have been continuously attracting focuses all over the world, power conversion efficiency of power supplies is always a concern and is constantly been required to improve all the time. For example, the US Department of Energy (DOE) has issued a final rule on energy efficiency level VI for power supplies, and demands the minimum energy efficiency requirement stricter than the requirement in the level V of International Efficiency Marking Protocol. Generally speaking, power supply manufactures normally endeavor to make their products comply the newest requirement, because of not only the demonstration of their willing to make a friendly environment, but also the exhibition of advanced technology involved. 
       SUMMARY 
       [0005]    Embodiments of the present invention disclose a control method suitable for a switching mode power supply. A power switch is controlled according to a clock signal to transfer electrical energy from an input power source to an output power source. A feedback signal is provided in response to an output voltage of the output power source. A clock signal is generated in response to the feedback signal and an input voltage of the input power source. The clock signal has a clock frequency determining a switching frequency of the power switch. When the feedback signal exceeds a relatively high level, the clock frequency increases in response to decrease to the input voltage. When the feedback signal is under a relatively low level, the clock frequency is independent from the input voltage. 
         [0006]    Embodiments of the present invention further disclose a power controller suitable for controlling a power switch in a switching mode power supply. The power switch controls a conduction current through an inductive device connected to an input power source. The power controller comprises a detection node, an input power source detection circuit, a feedback node, and a clock generator. The detection node is coupled to the input power source. The input power source detection circuit is connected to the detection node, and detects an input voltage of the input power source to generate a detection result. A feedback signal is provided at the feedback node in response to an output voltage of an output power source. The clock generator generates a clock signal in response to the detection result and the feedback signal. The clock signal has a clock frequency, and causes the inductive device periodically transferring energy from the input power source to the output power source. When the feedback signal exceeds a relatively high level, the clock frequency increases in response to decrease to the input voltage. When the feedback signal is under a relatively low level, the clock frequency is independent from the input voltage. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]    Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following drawings. In the drawings, like reference numerals refer to like parts throughout the various figures unless otherwise specified. These drawings are not necessarily drawn to scale. Likewise, the relative sizes of elements illustrated by the drawings may differ from the relative sizes depicted. 
           [0008]    The invention can be more fully understood by the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
           [0009]      FIG. 1  shows a switching mode power supply according to embodiments of the invention; 
           [0010]      FIG. 2  demonstrates a power controller; 
           [0011]      FIG. 3  illustrates the relationships between the feedback signal V COMP  and the clock frequency f CYC  under different AC input voltages, resulted from the operation of the power controller in  FIG. 2 ; 
           [0012]      FIG. 4  shows another power controller; and 
           [0013]      FIG. 5  illustrates the relationships between the feedback signal V COMP  and the clock frequency f CYC  under different AC input voltages, resulted from the operation of the power controller in  FIG. 4 . 
       
    
    
     DETAILED DESCRIPTION 
       [0014]    One way to comply with the energy efficiency level VI for conventional power supplies is slightly increase the inductance of the transformer used in the power supplies. Nevertheless, the increment in inductance could result in the risk of magnetic saturation, especially in the condition when the magnitude of an alternating-current (AC) input power source is as low as 90 VAC and the OCP happens at the same time. 
         [0015]    In an embodiment of the invention, a power supply transfers electrical energy from an input power source to an output power source, to power a load. A power controller in the power supply controls a power switch. A clock signal generated in the power controller periodically causes the power switch to be turned ON. The clock signal is in response to a feedback signal and an input voltage of the input power source, where the feedback signal is controlled by an output voltage of the output power source. When the feedback signal is high, indicating the load is heavy, a clock frequency of the clock signal decreases if the input voltage increases. Under the same load, the increment of the clock frequency could decrease the peak current through a transformer and reduce the risk of magnetic saturation. When the feedback signal is low, indicating a light load or no load, the clock frequency is low and about a constant independent from the input voltage of the input power source. Low clock frequency can reduce switching loss in the power switch, and improves the energy efficiency when driving a light load or no load. 
         [0016]    Even though the embodiments of the invention are demonstrated by power supplies with a flyback topology, this invention is not limited to. The invention could be embodied in, for example, buck converters, boosters, or buck-booster converters. 
         [0017]      FIG. 1  shows a switching mode power supply  10  according to embodiments of the invention, including a bridge rectifier  12 , a transformer  14 , a power controller  16 , and a power switch  18 . The bridge rectifier  12  could perform full-wave or half-wave rectification, to generate a direct-current (DC) input power source IN. In this embodiment, the input voltage V IN  of the DC input power source IN is about a constant, unchanged over time. In other embodiments, the waveform of the input voltage V IN  could be a rectified sinusoidal wave, varying over time. The power controller  16 , through a driving node DRV, periodically turns the power switch  18  ON and OFF, to make the transformer  14  store electrical energy from the input power source IN and release the stored energy to the output power source OUT, which powers the load  15 . An error amplifier  26  compares an output voltage V OUT  of the output power source OUT with a target voltage V TAR , and accordingly provides a feedback signal V COMP , also referred to be a compensation signal in the art. In one embodiment, the error amplifier  26  could include a photo-coupler that provides DC isolation between the input power source IN and the output power source OUT. In another embodiment, the error amplifier  26  detects the output voltage V OUT  in the secondary side by detecting the reflective voltage across an auxiliary winding in the primary side. 
         [0018]    The power controller  16  modulates the duty cycle of the driving signal V DRV  at the driving node DRV. The duty cycle refers to the ratio of an ON time (when the power switch  18  is turned ON) to a cycle time (the duration of a switching cycle). 
         [0019]    The power controller  16  detects the magnitude of the AC input voltage V IN-AC  at the AC input power source, via brownout node BNO, resistor  22  and resistor  20 , and rectifier  19 . For instance, if the power controller  16  finds the detection voltage V BNO  at the brownout node BNO has continued to be under a predetermined brownout voltage for a certain period of time, it treats the finding as an indication of a brownout event and forces the power switch  18  to be constantly OFF, stopping energy conversion. 
         [0020]    In one embodiment, the power controller  16  has a clock generator generating a clock signal in response to the feedback signal V COMP  and the detection voltage V BNO . 
         [0021]      FIG. 2  demonstrates a power controller  16   a , including a peak detector  42 , a voltage-to-current converter  44 , a clock generator  46 , and a pulse-width-modulation (PWM) generator  48 . 
         [0022]    The peak detector  42  is a kind of input power source detection circuit, connected to the brownout node BNO to generate voltage signal V PEAK  by detecting the peak voltages of the detection voltage V BNO  equivalent to the peak voltages of the AC input voltage V IN-AC . The voltage signal V PEAK  substantially represents a peak voltage of the AC input voltage V IN-AC . A constant current source in the peak detector  42  slightly lowers the voltage signal V PEAK  once every very long period of time, 16 ms for example, so that the voltage signal V PEAK  faithfully tracks or represents the peak voltages of the AC input voltage V IN-AC . 
         [0023]    The voltage-to-current converter  44  generates a current I PEAK  in proportion to the voltage signal V PEAK . The maximum current I MAX  equals to a predetermined setting current I SET  minus the current I PEAK . Accordingly, the maximum current I MAX  decreases if the voltage signal V PEAK  increases. 
         [0024]    An analog-to-digital converter  50  converts the voltage signal V PEAK  into several digital selection signals SD BUS , which selects one of several predetermined voltages V G1 , V G2  and V G3  to be output as a turning voltage V G . 
         [0025]    The clock generator  46  generates a clock signal S CYC  with a clock frequency f CYC , based on the maximum current I MAX , the feedback signal V COMP , and the turning voltage V G . According to circuit analysis to  FIG. 2 , when the feedback signal V COMP  is below the turning voltage V G , there will be only the constant minimum current I MIN  inputted into the current-controlled oscillator  54 , such that the clock frequency f CYC  is constant and independent from the maximum current I MAX  or the voltage signal V PEAK . Further analysis to the  FIG. 2  shows that, when the feedback signal V COMP  is high enough to exceed a predetermined relatively-high level, the input current into the current-controlled oscillator  54  will reach a maximum value, which equals to the summation of the constant minimum current I MIN  and a fixed portion of the maximum current I MAX . Accordingly, when the feedback signal V COMP  exceeds the predetermined relatively-high level, once the voltage signal V PEAK  increases, the maximum current I MAX  decreases, the current inputted to the current-controlled oscillator  54  decreases, so that the clock frequency f CYC  reduces. 
         [0026]    In one embodiment, the PWM generator  48  drives the driving node DRV to turn ON the power switch  18  once every switch cycle, the reciprocal of the clock frequency f CYC . An ON time, the duration when the power switch  18  is kept as ON in a cycle time, is determined by the feedback signal V COMP . For example, the larger the feedback signal V COMP , the longer the ON time. In one embodiment, the clock frequency f CYC  is also equal to the switching frequency of the power switch  18 . 
         [0027]      FIG. 3  illustrates the relationships between the feedback signal V COMP  and the clock frequency f CYC  under different AC input voltages, for the operation of the power controller  16   a .  FIG. 3  has three curves  100 ,  102  and  104 , corresponding to AC input voltages of 264 VAC, 115 VAC and 90 VAC, respectively. Each curve has a tilted portion parallel to the tilted portion of another curve, because the resistor  59  stays unchanged when the magnitude of AC input voltage V IN-AC  changes. The magnitude of AC input voltage V IN-AC  could influence the values of the turning voltage V G  and the maximum current I MAX  though. The curve  100 , for instance, shows the correlation between the feedback signal V COMP  and the clock frequency f CYC  when the AC input voltage V IN-AC  is 264 VAC. The AC input voltage V IN-AC  of 264 VAC causes the multiplexer  52  to select the predetermined voltage V G1  as the turning voltage V G . As shown in  FIG. 3 , when the feedback signal V COMP  is below the predetermined voltage V G1 , the curve  100  is flat, meaning the clock frequency f CYC  is a constant independent from the feedback signal V COMP . The curve  100  is flat again when the feedback signal V COMP  exceeds the predetermined voltage V H  shown in  FIG. 3 . 
         [0028]    Also shown in  FIG. 3  is that all three curves  100 ,  102  and  104  merge together if the feedback signal V COMP  is under the predetermined voltage V G1 . In other words, the clock frequency f CYC  is independent from the magnitude of AC input voltage V IN-AC  when the feedback signal V COMP  is under the predetermined voltage V G1 . Furthermore, when the feedback signal V COMP  is about the predetermined voltage V H  or higher, the curve  100  (corresponding to the AC input voltage V IN-AC  of 264 VAC) has the lowest clock frequency while the curve  104  (corresponding to the AC input voltage V IN-AC  of 90 VAC) has the highest clock frequency. In other words, if the feedback signal V COMP  is about the predetermined voltage V H , the clock frequency f CYC  increases as the magnitude of AC input voltage V IN-AC  decreases. 
         [0029]    As magnetic saturation could easily happen under OCP when the AC input voltage V IN-AC  is 90 VAC, the increment of the clock frequency following the decrease of the magnitude of AC input voltage V IN-AC  could reduce the peak current through a transformer, so as to reduce the risk of magnetic saturation as well. 
         [0030]      FIG. 4  shows another power controller  16   b , portions of which are not detailed for brevity because of the similarity between the power controller  16   b  and the power controller  16   a . Different from the analog-to-digital converter  50  of the power controller  16   a , what the analog-to-digital converter  50  of the power controller  16   b  controls is the resistance of variable resistor  56 . For example, the resistance of the variable resistor  56  for the AC input voltage V IN-AC  of 264 VAC is different from that for the AC input voltage V IN-AC  of 90 VAC. 
         [0031]      FIG. 5  illustrates the relationships between the feedback signal V COMP  and the clock frequency f CYC  under different AC input voltages, resulted from the operation of the power controller  16   b .  FIG. 5  has three curves  154 ,  152  and  150 , corresponding to AC input voltages of 264 VAC, 115 VAC and 90 VAC, respectively. These three curves  154 ,  152  and  150  merge together when the feedback signal V COMP  is below the turning voltage V G . As long as the feedback signal V COMP  increases from the turning voltage V G , the three curves  154 ,  152  and  150  separate into three tilted portions with different slopes. As shown in  FIG. 5 , the tilted portion of the curve  150  ramps up quicker than the ones of the curves  154  and  152  do, because the AC input voltages of 90 VAC (corresponding to the curve  150 ) causes the variable resistor  56  to have relatively-smaller resistance, such that the tilted portion of the curve  150  is the steepest among all the three tilted portions. 
         [0032]    Also shown in  FIG. 5  is that the clock frequency f CYC  is independent from the AC input voltage V IN-AC  when the feedback signal V COMP  is under the turning voltage V G . Furthermore, when the feedback signal V COMP  is high enough, the clock frequency f CYC  decreases as the AC input voltage V IN-AC  increases. 
         [0033]    In another embodiment, the analog-to-digital converter  50  in a power controller could determine both the resistance of the variable resistor  56  and the value of the turning voltage V G . 
         [0034]    While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.