Abstract:
A method and apparatus for detecting ultra wide-band (UWB) signals using multiple detectors having dynamic transfer characteristics. A receiver circuit is implemented using devices such as op-amps to provide the required dynamic characteristics. Detectors used in the UWB communication systems of the present invention utilize direct sequence spread spectrum (DSSS) technology for multiple access reception.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application is related to and commonly assigned U.S. patent application Ser. No. 09/847,777 entitled “Method and Apxparatusifor Signal Detection in Ultra Wide-Band Communications,” filed on May 1, 2001, which is incorporated herein by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     Ultra wide-band (UWB) communication systems have received substantial attention in recent years due to their anti-multipath capabilities, simplicity in transceiver design and low cost. UWB transmission uses very short impulses of radio energy whose characteristic spectrum covers a wide range of radio frequencies. Consequently, the resultant UWB signals have high bandwidth and frequency diversity. Such characteristics make them very well suited for various applications such as wireless high-speed data communications and low cost wireless home networks. 
     In co-owned and commonly assigned U.S. patent application Ser. No. 09/847,777 a method and apparatus for detecting signals in a UWB communication system is disclosed. Signal detection, according to that application, performs well for unipolar transmitted signals. However, if the desired transmitted signal is bipolar or if there are multiple UWB transmitters operating simultaneously, for example as in the case of multiple user access applications, interference may be experienced among users. 
     SUMMARY OF THE INVENTION 
     Generally, embodiments of the present invention are directed at methods and apparatuses for transmitting and/or detecting ultra wide-band (UWB) signals. 
     According to an illustrative aspect of the invention, a UWB communication system comprises one or more transmitters operable to transmit one or more UWB signals and a receiver operable to receive the UWB signals. According to this aspect of the invention the receiver portion of the system comprises a first circuit having a first pulse generator operable to produce a first pulse sequence in response to the UWB signals; a second circuit coupled in parallel with the first circuit, said second circuit having a second pulse generator operable to produce a second pulse sequence in response to the UWB signals; and a pulse processing circuit operable to decode the first and second code sequences and determine information carried in the UWB signals. 
     According to another illustrative aspect of the invention, a receiver circuit for receiving a UWB signal comprises an antenna operable to receive the UWB signal, a first circuit having a first pulse generator operable to produce a first pulse sequence in response to the UWB signal, a second circuit coupled in parallel with the first circuit, said second circuit having a second pulse generator operable to produce a second pulse sequence in response to the UWB signal; and a pulse processing circuit operable to decode the first and second code sequences and determine information carried in the UWB signal. 
     According to another illustrative aspect of the invention, a UWB communication system comprises a plurality of transmitters operable to transmit a corresponding plurality of UWB signals, a plurality of detectors, each detector having a pulse generating circuit for generating a unique pulse sequence in response to the UWB signals, and a pulse processing circuit operable to decode the pulse sequences and determine information carried in the UWB signals. 
     According to yet another illustrative aspect of the invention, a method of producing information contained in a UWB signal comprises receiving the UWB signal, producing a first pulse sequence from the UWB signal, producing a second pulse sequence from the UWB signal, and producing information based on the first and second pulse sequences. 
     A further understanding of the nature and the advantages of the inventions disclosed herein is described now in reference to the remaining portions of the specification and the attached drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1A shows a block diagram of a transmitter for a UWB communication system, according to an embodiment of the present invention; 
     FIG. 1B shows a block diagram of a receiver for a UWB communication system, according to an embodiment of the present invention; 
     FIG. 2A shows a digital ‘0’ as represented by a positive Gaussian monocycle waveform; 
     FIG. 2B shows a digital ‘1’ as represented by a negative Gaussian monocycle waveform; 
     FIG. 3 shows i-v transfer characteristics of a nonlinear circuit element d in a detection circuit in a receiver, according to an aspect of the present invention; 
     FIG. 4 shows a UWB receiver circuit having op-amp based circuits that provide i-v transfer characteristics similar to the i-v transfer characteristics shown in FIG. 3; 
     FIG. 5 shows a receiver circuit for a UWB communication system, according to an alternative embodiment of the present invention; 
     FIG. 6 illustrates a response of the receiver shown in FIG. 5, based on a numerical simulation; and 
     FIG. 7 illustrates a receiver circuit having four detectors for a UWB communication system, according to an embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     In U.S. patent application Ser. No. 09/847,777, a UWB receiver having a detector with an N-type i-v characteristic curve is disclosed. In the present application multiple detectors similar to the detectors disclosed in the Ser. No. 09/847,777 application and a spread spectrum orthogonal modulation scheme are used in the UWB transmission system, so that multiple UWB transmitters may operate in the system simultaneously. 
     FIG. 1, shows a block diagram of a UWB communication system, according to an embodiment of the present invention. The communication system comprises one or more transmitters  5  and receivers  7 , as shown in FIGS. 1A and 1B, respectively. Although only a single transmitter  5  and a single receiver  7  are shown in the figures, embodiments of the present invention also comprise multiple access communication, so that there may be two or more transmitters  5  operating simultaneously over the same channel for reception by two or more receivers  7 . 
     For multiple access communication, interference concerns are overcome by using spread spectrum techniques. A particular spread spectrum technique, which may be used in the embodiments described herein, is the “direct sequence” spread spectrum (DSSS) technique. In a typical DSSS transmitter a pseudorandom or pseudonoise (PN) code sequence generator is used to interface the modulator at the transmitter to spread the transmitted signal. A PN code sequence comprises a code sequence of 1&#39;s and 0&#39;s whose correlation properties are similar to that of white noise. A PN code generator  12  is shown as comprising part of the transmitter  5  shown in FIG.  1 A. PN code generator  12  provides a pseudorandom code sequence. This pseudorandom code sequence is modulated onto an information signal provided by an information source  10 . The information signal comprises a plurality of data symbols intended for transmission. The modulated signal output from modulator  11  is then optionally processed by a wave shaper  13 , to condition the modulated signal prior to being radiated by an antenna  14 . 
     There exist a variety of PN code sequence schemes. Some of the widely used PN sequences are the maximum length shift register sequence (or m-sequence for short), Gold sequence and the Kasami sequence. In an embodiment of this invention, modulator  11  uses an M-ary (near) orthogonal modulation (OM) scheme with an alphabet 
     
       
           Xε{x   j ( t )} j=0   M−j , 
       
     
     where            x   j          (   t   )       =         ∑       N   s     -   1         k   =   0              (     1   -     2        c   j   k         )          p        (     t   -     kT   f       )                                  
     is the j-th symbol, and the parameter N s  is the period of the PN sequence c=(c 0 , c 1 , . . . , c N     s     −1 ),which is generated from the PN code generator  12 , c j   k  is the k-th chip of the j-th cyclic shift of c, c j   k  ε{ 0 , 1 } and T f  is the chip duration. Here the alphabet size M should satisfy M= 2   I &lt;N s , where I is an integer. 
     Modulator  11  also includes a pulse generator, which generates an analog waveform p(t) having a pulse duration T p . To ensure that there is neither inter-chip nor inter-symbol interference, the chip duration T f  satisfies the condition T p +T d &lt;T f , where T d  is the delay spread of the channel. 
     In the following discussion, a digital ‘0’ is represented by a Gaussian monocycle waveform as shown in FIG. 2A. A Gaussian monocycle signal can be described mathematically as            p        (   t   )       =       V   0                 (     -     t   τ       )     2           ,                          
     where V 0  is the peak amplitude, τ is a time constant. 
     A digital ‘1’ is represented by sending a negative Gaussian monocycle waveform as shown in FIG.  2 B. It should be noted that other types of antipodal waveforms, e.g., second derivative Gaussian pulse can also be used. 
     The modulation scheme discussed here actually employs antipodal signaling at the chip level. This, together with the properties of PN sequences, lead to a correlation between any two symbols in the set X to approximately zero when the period of the PN sequence, N s , is large. Thus, this signaling scheme is termed as an orthogonal modulation. 
     FIG. 1B shows a block diagram of the receiver  7 , according to an embodiment of the present invention. The received UWB RF signal  120  may first pass through an optional wave shaping circuit  100  such as a filter, an integrator or envelop detector to help optimize detection. 
     Signal  101 , which represents the conditioned received UWB RF signal, is coupled to parallel circuits  109  and  110 . Circuit  109  comprises an inductor  103  and a circuit  104 , which is coupled in series with inductor  103 . Circuit  104 ,has N-type i-v transfer characteristics, as shown in FIG.  3 . This characteristic curve can be dynamically manipulated by the input  107 . The output from the circuit  109  consists of a series of pulses or silences depending on the received signals. Circuit  109  may be referred to as a “positive” detector, as it only generates pulses when the received signal is above a certain positive threshold level. 
     Similarly, circuit  110  comprises an inductor  105  and another circuit  106 , which is coupled in series with inductor  105 . Like circuit  104 , circuit  106  has N-type i-v transfer characteristics. In an embodiment of the invention, circuits  104  and  106  are nonlinear circuits. Regarding the transfer characteristics of circuits  104  and  106 , the transfer curve for circuit  106  is positioned at a different location by applying a predetermined and controlled voltage at input  108 . Input  108  may also be used to dynamically manipulate the transfer curve by providing a variable voltage to input  108 . Similar to the output of circuit  109 , the output signal from circuit  110  comprises a series of pulses or silences, depending on the received signals. Because the transfer curves of circuits  109  and  110  are different, they respond differently to the same input signal. Circuit  110  may be referred to as a “negative” detector, as it responds by generating pulses only if the input signal is lower than a certain negative threshold. 
     The output signals from circuits  109  and  110  are coupled to pulse processing circuit  112 , which determines the appropriate decoded digital signal  113 . Pulse processing circuit can be implemented based on logic circuits using gate array boards, digital signal processing boards, or the like. Further details pertaining to the operation of the signal processing circuit are provided below. 
     Referring again to the characteristic curve of circuit  104  shown in FIG. 3, it is seen that the transfer curve includes two impasse points P 1 =(V v , i v ) and P 3 =(V p , i p ). Here, i v  and i p  represent the valley and the peak current of the N curve. Although shown as such, it is not necessary that the curves be piecewise linear. The only requirement is that the characteristic curve be comprised of three distinct regions: a middle region having a negative impedance slope bounded by two other regions having positive impedance slopes. Under the condition that the input signal is operating at the line segment P 1 -P 3  of the characteristic curve, pulses will be generated which travel along the state trajectory P 4 →P 3 →P 2 →P 1 →P 4 . The number of pulses generated depends on the available time (i.e. the duration that the input signal is operating on the line segment P 1 -P 3 ) and the speed of the trajectory. The basic operation of the circuit  106  is similar to what we have discussed for the circuit  104  except that the impasse points are located in different locations. 
     Referring now to FIG. 4, there is shown how circuit  104  of positive detector  109  and circuit  106  of negative detector  110  shown in FIG. 1B may be implemented using op-amp based circuits, according to an embodiment of the present invention. These op-amp based circuits have piecewise linear i-v characteristics similar to the characteristics shown in FIG.  3 . In this illustrative embodiment, the slopes of the characteristic curves and the impasse points can be adjusted easily by changing the values of R 1 , R 2 , R 3 , R 4 , R 5 , R 6  and the biasing voltages Vcc and Vdd. Control inputs  107  and  108  in FIG. 1 are shown and labeled as  403  and  404 , respectively, in FIG.  4 . In a particular embodiment, two different fixed bias voltages may simply be applied, such that the transfer curves are translated to two different predetermined locations. In an operating environment that requires a more sophisticated embodiment of the invention, an operating noise level may be detected to determine a suitable voltage to control inputs  403  and  404 . In such an embodiment, the N-type characteristic curves are dynamically translated to different locations and in real time. 
     FIG. 5 shows an alternative duo detector UWB receiver  50 , according to another illustrative embodiment of the present invention. In this UWB receiver system  50 , an input signal from signal source  501  is sent directly to circuit  509 , as in the receiver  7  shown in FIG. 1B with  109 . However, the input signal is inverted by an inverting circuit  511  before being sent to circuit  510 . Circuit  510  has i-v transfer characteristics similar to that of circuit  509 . Because the two detectors  509  and  510  receive the signals with opposite polarities, each responds differently and generates different sets of pulses. 
     The response of the UWB receiver shown in FIG. 5 with the spread spectrum orthogonal modulation scheme described above will now be described. For ease of explanation, the description assumes an M=2-ary modulation scheme, as multi-level modulation is just a simple extension. Also, in this illustrative example, a seven chip m-sequence with c={1 1 1 0 1 0 0} is used. Hence, the symbol ‘1’ is represented as 1110100 and the symbol ‘2’ is 1101001, such that the symbol ‘2’ is a one bit shifted version of the symbol ‘1’. 
     FIG. 6 illustrates a typical response of the receiver shown in FIG. 5, based on a numerical simulation. Waveform  601  represents the symbol to be transmitted. In this illustrative example, the signal being transmitted is the symbol  2  followed by the symbol  1 . With the DSSS approach and the PN sequence just mentioned, the modulated signal is shown as waveform  602 . Due to the additive white Gaussian noise presence in the channel, the received signal is somewhat corrupted and is shown as waveform  603 . The outputs from the two circuits  509  and  510  comprise a series of pulses depending on the location of the signals as well as the level of the noises. These outputs are shown as waveforms  604  and  605  for the negative and positive detectors in FIG. 5, respectively. Depending on the tuning of the circuits, the presence of the digital signal can be set to generate a specified number of pulses. In this illustrative example, four pulses are used. The waveform  606  shows a detail view of the waveform  605 . Upon receiving these pulses, the pulse processing system will determine the decoded digital signals. 
     The output signals from circuits  509  and  510  are coupled to a pulse processing circuit  512 , which determines the appropriate decoded digital signal  113 . Pulse processing circuit  512  can be implemented using logic circuits using gate array boards, digital signal processing boards, or the like. 
     Pulse processing circuit  512  performs the following tasks. First, prior to transmission, it stores a priori the ideal pulse-generating instants when the received symbols x i (t) are fed to the positive and negative detectors in M×N arrays A and B, where N l  is the number of pulses generated per symbol. The (i, j)-th element of A and B, denoted by a(i,j) and b(ij) are the j-th pulse-generating instant. Second, pulse processing circuit  512  initializes the decision metrics W=(w 0 , w1, . . . , w M−1 ) for the positive detector  509  and: the decision metrics U=(u 0 ,u 1 , . . . ,u M−1 ) for the negative detector  510  to zero. Third, pulse processing circuit  512  stores the actual pulse-generating instants from the detectors in array Y=(y 1 ,y 2 , . . . ,y N ) for positive detector  509  and array Z=(z 1 ,z 2 , . . . z N ) for negative detector  510 . Fourth, for each combination of 0≦i≦M−1, 1≦j≦N l  and 1≦k≦N pulse processing circuit  512  checks if the condition a(i, j)−Δ≦y k ≦a(i, j)+Δ is satisfied for positive detector  509 . If it is, the metric w i  is incremented by one. The parameter Δ is the width of the detection window and it is a design parameter. Similarly, pulse processing circuit  512  checks if the following condition b(i, j)−Δ≦z k ≦b(i, j)+Δ is satisfied for negative detector  510 . If it is, the metric u i  is incremented by one for negative detector  510 . Fifth, pulse processing circuit  512  combines the metrics of positive detector  509  and negative detector  510  according to δ i =u i +w i , i=0,1, . . . ,M−1. Finally, pulse processing circuit  512  decides that x m (t) is the most likely transmitted symbol, if δ m  is the largest amongst all the δ i , 0≦i≦M−1. In this example, the decoded symbol is shown as signal  607 , which is the same as the symbol sent. 
     While the above is a complete description of numerous embodiments of the invention, various alternatives, modifications, and equivalents may be used. For example, multiple detector configurations are possible and within the scope of the inventions described in this application. FIG. 7 shows, for example, a four detector system having four N-type circuits coupled in parallel. The i-v transfer characteristics for each N-type circuit may be constructed such that it has a different set of impasse points, so that it responds to input signals differently than another of the other N-type circuits, which is characterized by its own set of impasse points. FIG. 7 shows a specific example of a four detector system. However, it is to be understood that other embodiments having more or less detectors is possible according to the inventions described herein. For these and other reasons, therefore, the above description should not be taken as limiting the scope of the invention, which is defined by the appended claims.