Abstract:
An electronic circuit arranged to terminate automatically a plurality of conductors at or near a node of a network comprising: a first input terminal electrically coupled to a first output terminal; a second input terminal electrically coupled to a second output terminal; selectable current limiting means (SCLM) arranged to limit an amount of current that may flow between the second output terminal and the second input terminal; and detecting means arranged to control switching means operable to switch the circuit between a first and a second condition responsive to the electrical potential Vx of the second output terminal, wherein in the first condition the circuit is a terminating circuit and the SCLM is selected to have a first current limit, and in the second condition the circuit is a continuing circuit and the SCLM is selected to have a second current limit.

Description:
FIELD OF THE INVENTION 
       [0001]    The present invention relates to electronic circuits for terminating a transmission line of a communications network. In particular but not exclusively the present invention relates to electronic circuits suitable for terminating automatically a communications network. 
       BACKGROUND 
       [0002]    It is known to provide a communications network in which a group of electronic devices communicate with one another via a communications bus in the form of a plurality of electrical conductors of a cable. Each device may be referred to as a node of the network. 
         [0003]    It is to be understood that maintenance of the integrity of the transmitted signal and minimising signal reflection and distortion due to high frequency wideband switching and wireless communications interference are important considerations in the engineering of transmission bus networks. It is therefore important to terminate a network with a terminating circuit having an appropriate matching impedance. If a circuit is incorrectly terminated, malfunction of the network can result, due for example to reflection at a node of signals propagating through the network and introduction of noise. 
         [0004]    Networks are normally terminated at both ends, i.e. at a host device at one end of a communications cable and at a node at the opposite end of the cable. 
         [0005]    GB2407237 discloses an electronic circuit for automatic termination of a plurality of conductors of a communications network. Such a circuit may be referred to as an auto-termination circuit. 
         [0006]    The circuit has detecting means operable to detect current in at least one of the plurality of conductors and switching means operable to switch the circuit between being a continuing circuit, upon the detecting means detecting a current greater than a first predetermined threshold, and being a terminating circuit, upon the detecting means detecting current at, or less than, a second predetermined threshold wherein the detecting means comprises a sensing resistor connected in series with the at least one of a plurality of conductors, and means for detecting voltage across the sensing resistor. The document discloses using detecting means in the form of a differential amplifier connected across the sensing resistor. 
         [0007]    A known problem with this method based on a sensing resistor is that the circuit is highly susceptible to noise irrespective of any online filtering. Such noise may be generated from mobile communication devices such as handheld radio communications devices operating within the frequency range 150-750 MHz. Such devices are frequently used in industry such as in the petrochemical industry. 
         [0008]    Noise signals generated on a signal line of the network can cause the detecting means to trigger intermittently the terminator circuit causing the terminator circuit automatically to terminate the network at locations where termination is not required. This can result in instability of the network rendering the network unreliable in certain situations. It is to be understood that failure of an industrial communications network can lead to shutdown of manufacturing or other plant relying on the network. This can be costly to an operator of the plant. 
         [0009]    A further known problem with this sensing resistor-based method is that the auto-termination circuit is triggered in response to current flow through the sensing resistor. Current flow may be due to a true load or to a circuit fault such as a cable fault or electronic module fault. It is to be understood that this method is unable to detect the presence of a short circuit fault in the network. Short circuit faults can result in failure of an entire network and even damage to devices coupled to the network. 
       STATEMENT OF THE INVENTION 
       [0010]    In a first aspect of the invention there is provided an electronic circuit arranged to terminate automatically a plurality of conductors at or near a node of a network comprising:
       a first input terminal electrically coupled to a first output terminal;   a second input terminal electrically coupled to a second output terminal;   selectable current limiting means (SCLM) arranged to limit an amount of current that may flow between the first output terminal and the first input terminal; and   detecting means arranged to control switching means operable to switch the circuit between a first and a second condition responsive to the electrical potential Vx of the second output terminal,   wherein in the first condition the circuit is a terminating circuit and the SCLM is selected to have a first current limit, and   in the second condition the circuit is a continuing circuit and the SCLM is selected to have a second current limit.       
 
         [0017]    By “current limit” is meant an upper limit to the amount of current the SCLM will allow to flow therethrough. 
         [0018]    Preferably the circuit is arranged to assume the first condition when an open circuit condition exists between the first and second output terminals. 
         [0019]    More preferably the circuit is arranged to assume the first condition when a short circuit condition exists between the first and second output terminals. 
         [0020]    The circuit may be arranged to assume the second condition when a load between the first and second output terminals has an impedance Z L  between first and second impedance values Z 1  and Z 2  respectively, where 0&lt;Z 1 &lt;Z L &lt;Z 2  and Z 2  is finite. 
         [0021]    Preferably the first impedance value Z 1  is greater than around 1 kilohm and the second impedance value Z 2  is less than around 50 kilohms. 
         [0022]    Preferably the second current limit is greater than the first current limit. 
         [0023]    Alternatively the first current limit may be substantially the same as the second current limit. 
         [0024]    In a further alternative the second current limit may be less than the first current limit. 
         [0025]    Preferably the second current limit corresponds to a maximum current allowed to be drawn by the circuit when the circuit is a continuing circuit. 
         [0026]    Preferably the first current limit corresponds to a maximum current allowed to be drawn by the circuit when the circuit is a terminating circuit and a short circuit condition exists between the first and second output terminals. 
         [0027]    Preferably the detecting means comprises comparator means arranged to compare the value of the electrical potential Vx at the second output terminal with one or more reference potentials and to provide an output responsive to a difference between Vx and the one or more reference potentials thereby to control the circuit to switch between the first and second conditions. 
         [0028]    More preferably the detecting means comprises first and second comparators, the first comparator being arranged to compare the value of electrical potential Vx at the second output terminal with a first reference potential Vref 1  and to produce an output responsive to the value of Vx and Vref 1 , the second comparator being arranged to compare the value of electrical potential Vx at the second output terminal with a second reference potential Vref 2  and to produce an output responsive to the value of Vx and Vref 2 , the detecting means being operable to control the circuit by means of switching means to switch between the first and second conditions in dependence on the output of the first and second comparators. 
         [0029]    Preferably Vref 1  is greater than Vref 2 . 
         [0030]    The outputs of the first and second comparators are preferably combined by means of a logical AND operation thereby to provide an output of the detecting means. 
         [0031]    Preferably the output of the detecting means is coupled to the switching means by means of a switching means control portion, the switching means control portion comprising a shunt portion coupled between the first and second input terminals. 
         [0032]    Preferably the shunt portion comprises a resistor in series with one or more switches, the switches being arranged to assume a closed condition thereby to couple the resistor between the first and second input terminals when the circuit is in the second condition. 
         [0033]    This feature has the advantage that a risk that voltage spikes across the first and second input terminals induces unwanted disconnection of the terminating portion between the input terminals is reduced. 
         [0034]    Preferably the SCLM comprises a controlled constant current source. 
         [0035]    Preferably, in the first condition a terminating portion of the circuit is coupled between the first and second input terminals and in the second condition the terminating portion is not coupled between the first and second input terminals. 
         [0036]    Preferably the terminating portion comprises impedance matching means. 
         [0037]    The impedance matching means may comprise a terminating resistor connected in series with a terminating capacitor. 
         [0038]    The switching means may comprise one or a plurality of switching elements in series with the terminating portion. 
         [0039]    Preferably the switching means comprises a plurality of switching elements in series with the terminating portion. 
         [0040]    This feature has the advantage that if one of the switching elements fails in a closed condition the circuit will continue operating, increasing a reliability of the circuit. 
         [0041]    Preferably one of the switching elements is provided between the terminating portion and the first input terminal and another of the switching elements is provided between the terminating portion and the second input terminal. 
         [0042]    The switching elements are preferably provided by one or more transistor devices. 
         [0043]    In a second aspect of the invention there is provided a node of a communications network comprising an electronic circuit according to the first aspect. 
         [0044]    In a third aspect of the invention there is provided a communications network comprising a circuit according to the first aspect. 
         [0045]    In a fourth aspect of the invention there is provided a method of terminating automatically a circuit at or near a node of a network comprising the steps of:
       detecting an electrical potential at an output of the circuit; and   switching the circuit between a first and a second condition responsive to the electrical potential Vx of the output,   whereby in the first condition the circuit is arranged to be a terminating circuit and a maximum current that may flow between the output and an input of the circuit is selected to have a first current limit, and   in the second condition the circuit is arranged to be a continuing circuit and the maximum current that may flow between the output and the input of the circuit is selected to have a second current limit.       
 
         [0050]    In one aspect of the invention there is provided an electronic circuit arranged to terminate automatically a plurality of conductors at or near a node of a network comprising:
       input means electrically coupled to output means;   selectable current limiting means (SCLM) arranged to limit an amount of current that may flow between the output means and the input means; and   detecting means arranged to control switching means operable to switch the circuit between a first and a second condition responsive to the electrical potential Vx of the second output terminal,   wherein in the first condition the circuit is a terminating circuit and the SCLM is selected to have a first current limit, and   in the second condition the circuit is a continuing circuit and the SCLM is selected to have a second current limit.       
 
         [0056]    In a further aspect of the invention there is provided an electronic circuit arranged to terminate automatically a plurality of conductors at or near a node of a network comprising:
       a first input terminal electrically coupled to a first output terminal;   a second input terminal electrically coupled to a second output terminal;   selectable current limiting means (SCLM) arranged to limit an amount of current that may flow through the circuit between the first input terminal and the second input terminal; and   detecting means arranged to control switching means operable to switch the circuit between a first and a second condition responsive to the electrical potential Vx of an output terminal,   wherein in the first condition the circuit is a terminating circuit and the SCLM is selected to have a first current limit, and   in the second condition the circuit is a continuing circuit and the SCLM is selected to have a second current limit.       
 
         [0063]    The communication network may be for example an industrial network employing a fieldbus protocol such as the International Electrotechnical Commission (IEC) standard 61158 for industrial communication networks. 
         [0064]    Some embodiments of the invention have the advantage that they provide a stable electronic auto-termination circuit capable of maintaining the integrity of the communication signal of a network such as but not exclusively between the “T” nodes of a fieldbus network under cable faults such as open circuit and short circuit in the presence of electrical noise. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0065]    Embodiments of the invention will now be described with reference to the accompanying figures in which: 
           [0066]      FIG. 1  is a schematic diagram of an electronic circuit according to an embodiment of the present invention; 
           [0067]      FIG. 2  is a plot of Vx as a function of time for the circuit of  FIG. 1  following a cable fault in the form of a short circuit (trace A) between circuit output terminals or connection of a load between the output terminals having an acceptable impedance allowing correct network operation (trace B); 
           [0068]      FIG. 3  is an electronic signal timing diagram showing the potential at each of several locations of the circuit as a function of time following connection of a normal external load; 
           [0069]      FIG. 4  shows a communications signal of a typical fieldbus network superimposed on a DC ‘offset’ signal; 
           [0070]      FIG. 5  shows two circuits according to embodiments of the invention connected in a network; and 
           [0071]      FIG. 6  shows a series of N+1 circuits according to embodiments of the present invention connected together in a network. 
       
    
    
     DETAILED DESCRIPTION 
       [0072]      FIG. 1  shows an auto-terminating circuit  100  according to an embodiment of the present invention. 
         [0073]    The circuit  100  has first and second input terminals  101 ,  102  coupled to corresponding first and second output terminals  111 ,  112  of the circuit  100 . 
         [0074]    In use the input terminals  101 ,  102  are typically coupled to first and second terminals PS 1 , PS 2  of a power source or power supply PS. It is to be understood that the first and second input terminals  101 ,  102  may be coupled to the power source PS via one or more other circuits  100 . Other arrangements are also useful. 
         [0075]    The first and second terminals PS 1 , PS 2  of the power source PS are arranged to provide a DC power signal to the circuit  100 . It is to be understood that communications data may be superimposed on the DC power signal by devices at nodes of the network as discussed in more detail below. 
         [0076]    It is to be understood that the network devices may each be provided with an auto-terminating circuit  100  according to the present invention. 
         [0077]    The circuit  100  has four portions: a terminating portion C 1 , an output monitoring portion C 2 , an output control portion C 3  and a termination control portion C 4 . 
         [0078]    The terminating portion C 1  comprises a terminating resistor Rt in series with a terminating capacitor Ct. A first switch SW 1  is provided between the terminating resistor Rt and the first input terminal  101 . A second switch SW 2  is provided between the terminating capacitor Ct and the second input terminal  102 . Thus it is to be understood that the terminating portion C 1  may be isolated from the first and second input terminals  101 ,  102  by opening either one or both of the switches SW 1 , SW 2 . The circuit  100  may be said to be in a continuing condition in this state since the terminating portion C 1  is not connected between the first and second input terminals  101 ,  102 . 
         [0079]    The terminating portion C 1  may be coupled between the first and second input terminals  101 ,  102  thereby to terminate the circuit  100  by closing both switches SW 1 , SW 2 . The circuit may be said to be in a terminating condition in this state. 
         [0080]    In the embodiment shown the circuit  100  is arranged to control both the first and second switches SW 1 , SW 2  together by means of a termination control portion C 4  such that either both of the switches SW 1 , SW 2  are closed or both of the switches SW 1 , SW 2  are open as discussed below, although other arrangements are also useful. 
         [0081]    An input terminal C 4 in of the termination control portion C 4  is coupled to an output C 2 out of the output monitoring portion C 2 . If the logical state of the output C 2 out is low the termination control portion C 4  is arranged to control the terminating portion C 1  to close the first and second switches SW 1 , SW 2  so that the circuit  100  assumes the terminating condition. 
         [0082]    Conversely, if the logical state of the output C 2 out is high the termination control portion C 4  is arranged to control the terminating portion C 1  to open the first and second switches SW 1 , SW 2  so that the circuit  100  assumes the continuing condition. 
         [0083]    In the embodiment of  FIG. 1  the switches SW 1 , SW 2  are each provided by a transistor device although other forms of solid state switching device could be used. 
         [0084]    The output control portion C 3  is provided between the second input terminal  102  and the second output terminal  112 . The output control portion C 3  is arranged to limit a maximum current that may flow through the output control portion C 3  from the second output terminal  112  to the second input terminal  102  to either a first value or a second value, the first value being less than the second value, in dependence on a state of an input terminal C 3 in of the output control portion C 3 . The input terminal C 3 in is coupled to the output terminal C 2 out of the output monitoring portion C 2 , together with the input terminal C 4 in of the termination control portion C 4 . 
         [0085]    If the state of the input terminal C 3 in is set to logical zero, the output control portion C 3  is arranged to set the maximum current that may flow therethrough to the first (lower) value, the circuit being in the terminating condition. 
         [0086]    If the state of the input terminal C 3 in is set to logical one, the output control portion C 3  is arranged to set the maximum current that may flow therethrough to the second (higher) value, the circuit being in the continuing condition. 
         [0087]    The output monitoring portion C 2  has an input terminal C 2 in coupled to the second output terminal  112  whereby the output monitoring portion C 2  may sense a potential Vx of the second output terminal  112 . 
         [0088]    The output monitoring portion C 2  has first and second comparators A 1 , A 2  respectively. A negative input of the first comparator and a positive input of the second comparator are both coupled to the second output terminal  112 . 
         [0089]    The positive input of the first comparator A 1  is held at a first reference potential Vref 1  and the negative input of the second comparator A 2  is held at a second reference potential Vref 2  where Vref 2  is less than Vref 1 . The values of Vref 1  and Vref 2  are discussed in further detail below. 
         [0090]    Respective outputs of the first and second comparators A 1 , A 2  are coupled to respective inputs of an AND gate A 3  the output of which provides the output C 2 out of the output monitoring portion C 2 . 
         [0091]    It is to be understood that the output monitoring portion C 2  is configured to set the logical state of its output terminal C 2 out according to the value of Vx as follows. 
         [0092]    If Vx has a value that is above Vref 1  or below Vref 2  the output monitoring portion C 2  is arranged to set the state of the output terminal C 2 out to logical zero. This causes the output control portion C 3  to set the maximum allowable current therethrough to the first (lower) value and the termination control portion C 4  to control the terminating portion C 1  to assume the terminating condition. 
         [0093]    However if Vx has a value between Vref 1  and Vref 2  the output monitoring portion C 2  is arranged to set the state of the output terminal C 2 out to logical one. This causes the output control portion C 3  to set the maximum allowable current therethrough to the second (higher) value and the termination control portion C 4  to disconnect the terminating portion C 1  from the input lines  101 ,  102  whereby the circuit  100  assumes the continuing condition. 
         [0094]    It is to be understood that the second value of maximum allowable current is selected to be a value sufficient to allow the maximum amount of current that may be required in use to flow through the circuit  100 . 
         [0095]    It is to be understood that the value of Vx is responsive to a value of impendance of a load connected between the output terminals  111 ,  112  and may be used to determine whether this load has an acceptable impedance. By acceptable impedance is meant an impedance that will allow the network of which the circuit  100  may be part to perform correctly. 
         [0096]    If the output terminals  111 ,  112  are connected across a load having an acceptable impedance the value of Vx will have a value within a prescribed range. The values of Vref 1  and Vref 2  are selected such that Vref 1  is greater than the maximum allowed value of Vx when an allowed load is connected and Vref 2  is less than the minimum allowed value of Vx when an allowed load is connected. 
         [0097]    Thus, if an allowed load is connected between the output terminals  111 ,  112  the output monitoring portion C 2  controls the output control portion C 3  to set the maximum current that may flow therethrough to the second value. 
         [0098]    It is to be understood that if no load is connected between the first and second output terminals  111 ,  112  (i.e. open circuit conditions exist), the second output terminal  112  is arranged to have a potential substantially equal to that of the second input terminal  102 . This is because substantially no current can flow into or out from the second output terminal  112  through C 3  and therefore the potential across C 3  will be substantially zero. 
         [0099]    If Vref 2  is set to a potential greater than the second input terminal  102  then the output terminal C 2 out of the output monitoring portion C 2  will be set to logical zero when open circuit conditions exist between the output terminals  111 ,  112 . This in turn causes the output control portion C 3  to set the maximum current that may flow therethrough to the first value which is less than the second value and the termination control portion C 4  to couple the terminating portion C 1  between the first and second input terminals  101 ,  102 . 
         [0100]    If the output terminals  111 ,  112  are directly connected to one another by means of a short circuit (due for example to a fault in a circuit to which the terminals  111 ,  112  are connected), Vx will have substantially the same potential as the first output terminal  111  which is in turn substantially the same as that of the first input terminal  101 . 
         [0101]    Vref 1  is therefore set to a value that is less than the potential at the first input terminal  101  such that, if the first output terminal  111  is directly connected to the second output terminal  112 , Vx is greater than Vref 1  and the output monitoring portion C 2  controls the termination control portion C 4  to couple the terminating portion C 1  between the first and second input terminals  101 ,  102  by closing the first and second switches SW 1 , SW 2 . The output control portion C 3  is set to limit the maximum current that may flow therethrough to the first value. 
         [0102]    The termination control portion C 4  has a control resistor Rc coupled to the first input terminal  101  and third and fourth switch elements SW 3 , SW 4  of the circuit  100  coupled in series between the control resistor Rc and the second input terminal  102 . 
         [0103]    The third and fourth switches SW 3 , SW 4  are both coupled to the input terminal C 4 in of the termination control portion C 4  such that when the input terminal C 4 in is set to logical one both switches SW 3 , SW 4  are closed and when the input terminal C 4 in is set to logical zero both switches SW 3 , SW 4  are open. In the embodiment shown the third and fourth switches SW 3 , SW 4  are both provided by transistor devices. 
         [0104]    It is to be understood that when the third and fourth switches SW 3 , SW 4  are closed Rc is connected between the first and second input terminals  101 ,  102 . The potential applied to the first and second switches SW 1 , SW 2  is therefore the same as that of the second input terminal (logical zero) and the first and second switches remain in the open condition such that the circuit  100  functions as a continuing circuit with the terminating portion C 1  disconnected from the first and second input terminals  101 ,  102 . 
         [0105]    When the third and fourth switches SW 3 , SW 4  are open, Rc is disconnected from the second input terminal  102 . The potential applied to the first and second switches SW 1 , SW 2  is therefore the same as that of the first input terminal (logical one) and the first and second switches assume the closed condition such that the circuit  100  functions as a terminating circuit with the terminating portion C 1  connected between the first and second input terminals  101 ,  102   
         [0106]    The arrangement described in respect of termination control portion C 4  has the feature that when the circuit is in the continuing mode with the third and fourth switches closed, a shunt path exists for spikes in the potential applied between the first and second input lines, for example due to radio frequency (RF) interference. Voltage spikes can cause unwanted termination of known auto-terminating circuits by triggering connection of a terminating circuit between the input terminals  101 ,  102 . In the circuit  100  of  FIG. 1  the termination control portion C 4  allows such voltage spikes to be shunted between the first and second input lines  101 ,  102  without triggering closure of the first and second switches. This increases a stability of the network in which the circuit  100  is connected. 
         [0107]      FIG. 2  shows a plot of Vx as a function of time for different connection states of the output terminals  111 ,  112 . 
         [0108]    Trace A shows Vx as a function of time following short circuiting of output terminals  111 ,  112  at time t=0. The potential at Vx rises sharply to a peak value Vpk upon connecting the output terminals  111 ,  112  together before decreasing to a steady state value Vps corresponding to the potential Vps of the power supply PS. It can be seen that Vref 1  is set to a value that is less than Vps so that the circuit remains in a terminating condition throughout the period for which the output terminals  111 ,  112  are short circuited. 
         [0109]    Trace B shows Vx as a function of time following connection of an external load having an impedance within an allowed range. 
         [0110]    The potential Vx again rises sharply to a peak value Vpk upon connecting the external load before falling to an expected or normal value Vnorm for such a load. It can be seen that the value of Vx falls below Vref 1  after a time T has elapsed following connection of the external load. Furthermore it can be seen that Vref 2  is set to a value such that it remains below Vnorm throughout. 
         [0111]    It is to be understood that the circuit  100  assumes a terminating condition for the period for which Vx exceeds Vref 1 . However as soon as Vx falls below Vref 1  the circuit assumes the continuing condition. 
         [0112]      FIG. 3  is a timing diagram showing the states of outputs A 1 out, A 2 out of the first and second comparators A 1 , A 2  respectively, the state of output Clout of the output monitoring portion C 2  and the value of maximum current allowable to pass through the output control portion C 3  as a function of the value of Vx. 
         [0113]    It can be seen that when Vx is greater than Vref 1  (for the period from time t=T 1  to t=T 2 ) A 1  out is set to logical zero, A 2  out is set to logical one, A 3  is set to logical zero and the output control portion C 3  is set to allow maximum current flow therethrough of a first value  11 . 
         [0114]    When Vx falls below Vref 1  (after time t=T 2 ) A 1  out transitions to logical  1 , A 2 out remains at logical one and therefore A 3 out transitions to logical one. The value of maximum current permitted through the output control portion C 3  rises to a second value I 2  greater than the first value I 1 . 
         [0115]      FIG. 4  is a trace of the amplitude of a communications signal of a typical fieldbus network as a function of time. The communications signal is a binary digital signal superimposed on a DC ‘offset’ signal provided by the power supply PS. 
         [0116]    It is to be understood that other arrangements are also useful 
         [0117]      FIG. 5  is a schematic diagram illustrating the circuit  100  having input terminals  101 ,  102  coupled to a power supply PS and output terminals  111 ,  112  coupled to a further circuit  100 ′ identical to the first circuit  100 . The further circuit  100 ′ presents an impedance Zn between the output terminals  111 ,  112 . It is to be understood that the coupling of the circuits  100 ,  100 ′ provides a voltage divider arrangement such that a potential at position Vx is determined by the ratio of Zf to Zn. 
         [0118]      FIG. 6  is a schematic illustration of a network  10  comprising a power supply PS coupled to a chain of circuits  100 ,  100 ′ according to the present invention. 
         [0119]    It is to be understood that if a short circuit occurs in a cable between any two circuits  100 ,  100 ′ such that output lines  111 ,  112  of one circuit  100  become directly connected to one another and input lines  101 ′,  102 ′ of the other circuit  100 ′ become directly connected, the one circuit  100  assumes automatically a terminating condition in which its terminating portion C 1  is connected between respective input lines  101 ,  102  of the circuit  100  and the output control portion C 3  limits the amount of current permitted to flow therethrough to the first value. This allows any network devices between that circuit  100  and the power supply to continue functioning despite the existence of a short circuit between two circuits  100 ,  100 ′ of the network. 
         [0120]    Other arrangements are also useful. 
         [0121]    Throughout the description and claims of this specification, the words “comprise” and “contain” and variations of the words, for example “comprising” and “comprises”, means “including but not limited to”, and is not intended to (and does not) exclude other moieties, additives, components, integers or steps. 
         [0122]    Throughout the description and claims of this specification, the singular encompasses the plural unless the context otherwise requires. In particular, where the indefinite article is used, the specification is to be understood as contemplating plurality as well as singularity, unless the context requires otherwise. 
         [0123]    Features, integers, characteristics, compounds, chemical moieties or groups described in conjunction with a particular aspect, embodiment or example of the invention are to be understood to be applicable to any other aspect, embodiment or example described herein unless incompatible therewith.