Abstract:
A current controlled superconducting switch has a current controlling constriction such that the level of the input determines the condition of the switch. A plurality of the superconducting switches are connected to produce a logic scheme.

Description:
STATEMENT OF GOVERNMENT INTEREST 
     The invention described herein may be manufactured and used by or for the Government for governmental purposes without the payment of any royalty thereon. 
    
    
     BACKGROUND OF THE INVENTION 
     The present invention relates to superconductor devices, and, in particular, to a superconducting switch. 
     It is know that, in order to cause a superconducting circuit to shift from the superconducting state to the normal-conducting state, either all or part of the circuit must be subjected to a magnetic field or to a temperature rise, the value of which exceeds that of the field or of the critical temperature. The circuit thus loses its superconducting properties and reverts to the normal state in which its electrical resistance, in particular, is no longer zero; in the case of a closed loop with an electric current flowing therein without loss of energy it thus becomes an open circuit. Similarly, by restoring the conditions of field and temperature to their initial state, the circuit is again completely closed in the same manner as a conventional arrangement which makes use of a mechanical switch or the like. 
     One type of superconducting switch is called a cryotron which comprises a gate-conductor film on the order of 0.3-1.0 micron thickness of soft superconductive material which is crossed by a narrow control-conductor film also on the order of 0.3-1.0 micron thickness insulated therefrom and preferably formed of hard superconductive material. Both the gate-conductor and the control-conductor are thus normally in the superconducting state. If sufficient current is caused to flow through the control-conductor, the resulting magnetic field causes the gate-conductor to become resistive in the region of the crossover. 
     Other types of superconductor switches use an interface region between two superconducting regions. The interfacial region may be formed in a variety of geometries including a superconductor, insulator barrier, superconductor (SIS); superconductor, normal metal, superconductor (SNS), point contact and bridge type structures. The interfacial region in each of the above cases is a weak-link region interconnecting the superconductive regions, the weak-link breaking down when a critical supercurrent is exceeded. The weak-link is the thin insulator in the SIS structure, the thin normal metal in the SNS structure, the region of contact in the point contact structure and the region of minimum cross-sectional area in the bridge structure. 
     When the current through the interface exceeds a first critical current, I c , the voltage across the interface increases to some finite value. This voltage does not return to zero until a switchback current is reached. 
     The switching in the above devices is magnetically controlled. 
     SUMMARY OF THE INVENTION 
     The present invention is a superconducting switch that is current controlled. 
     The present invention is a single superconducting switch having a current source applied to an input, a second current source applied to a gate, the gate being on the source voltage side of the switch, a current controlled constriction, and a drain being the output of the switch. The current controlled constriction being between the input and output. 
     Therefore, one object of the present invention is to provide a superconducting switch that is current controlled. 
     Another object of the present invention is to provide a superconducting switch that may be interconnected on integrated circuits with other superconducting switches. 
     Another object of the present invention is a superconducting switch that avoids the complexities of the Josephson junction logic. 
     These and many other objects and advantages of the present invention will be readily apparent to one skilled in the pertinent art from the following detailed description of a preferred embodiment of the invention and the related drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 schematically illustrates the operating principles of the present invention. 
     FIG. 2 illustrates by electronic terminology the present invention. 
     FIG. 3 illustrates a parallel combination of the superconducting switches. 
     FIG. 4 illustrates a parallel-serial combination of the superconducting switches. 
     FIG. 5 illustrates in cross section a switch suspended by supporting device. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring to FIG. 1, a superconducting switch 10 is shown in schematic. Switch 10 may be constructed of a thin film, wire or ribbon of superconductor material such as a metal Niobium or Lead or a ceramic Y 1  Ba 2  Cu 3  O 7 . This thin film 16, for example, may be deposited on an insulating substrate 18 such as silicon. FIG. 2 illustrates the electronic switch 10 as having a source 20, a gate 22, a drain 24 and a ground 26. 
     If the switch 10 is made from a ribbon, a flat section, a substrate is not needed except a supporting device 40 would hold switch 10 in suspension. See FIG. 5. 
     In FIG. 1, the switch 10 has an input 32, a constriction 12, an output 38 and a current source 14. A current I 28 flows through the input 32 while in the turned on condition. A critical current I c  30 is that current defined by A=I c  /J c  where A is the cross sectional area of the constriction 12 and J c  is the critical current density of the material in the constriction 12. The critical current I c  30 defines the current level above which the superconducting condition in the constriction 12 is turned off and a resistance, R n , in constriction 12 occurs and below which the superconducting condition returns. The current carrying capacity is determined by the cross section A and the critical current density J c  in the constriction 12. 
     To turn off the switch 10, a control current I o  36 is generated by the current source 14 wherein I o  36 is greater than I c  30. Source 14 may be a similar switch 10 outputting a current I o . 28. 
     Thus the switch 10 becomes normal at the constriction 12 resulting in a voltage appearing thereacross. With appropriate current sources for I 28 and I o  36 it is not necessary that I o  36 exceed I c  30, rather only that I 28+I o  36 exceed I c  30 to turn the switch 10 off. 
     Because a device 34 providing the current I 28 has a maximum voltage, the current flowing through the constriction 12 is reduced in the normal (non-superconducting) state, i.e., when the switch 10 is off. This normal current I n  is given by I n  =V/R n  where V is the available voltage from the current source 14 (1 microvolt to 1 volt for example), and R n  is the normal resistance of the constriction 12 and is in the range of 1 ohm to 1 megohm. By proper selection of the material, A and V, the off current I n  is much less than I 28. 
     In the case that I 28 and I o  36 are the same, then another switch 10 can control switch 10. Clearly, in this case 2I&gt;Ic&gt;I must hold. This gives a working range for I of 0.5 I c  &lt;I&lt;I c . 
     In order to more fully disclose the operation of the switch 10, reference is made to FIGS. 3 and 4. 
     As seen in FIG. 3, a voltage V is applied to parallel resistors R. Each resistor R is connected to a switch S i , that is externally controlled and each pair of switches, S i  and S i  +1 are connected to a superconducting switch, D i . V and R are selected such that V/R≅0.7 I c  where R is much less than the normal state resistance of superconducting switch, D i . (For example, Rn±100 R). V i  is only used to indicate a voltage point. Table 1, partially, displays the various logic states. 
     
                       TABLE 1______________________________________S.sub.1  S.sub.2    S.sub.3                   S.sub.4  V.sub.1                                V.sub.2______________________________________O      O          O     O        L   LC      C          C     O        H   LO      C          C     C        L   HO      C          C     O        L   LC      C          C     C        H   H______________________________________ O = Open, C = Closed, L = Low and H = High 
    
     FIG. 4 illustrates the scheme where D 3  is connected in series with D 1  and D 2 . Table 2 illustrates the various logic states. 
     
                       TABLE 2______________________________________S.sub.1  S.sub.2          S.sub.3   S.sub.4                        V.sub.1 V.sub.2                                    V.sub.3______________________________________O        O     O         O   L       L   LC        C     O         O   H       L   LC        O     O         O   L       L   LC        O     C         O   H       H   HC        C     C         O   H       H   HC        C     C         C   H       H   H______________________________________ 
    
     Clearly, many modifications and variations of the present invention are possible in light of the above teachings and it is therefore understood, that within the inventive scope of the inventive concept, the invention may be practiced otherwise than specifically claimed.