Abstract:
A method, apparatus or system for generating a clock signal that includes determining a transmission frequency within a first frequency range for receiving or transmitting a data stream, locking a clock to the transmission frequency during a packet exchange and tuning the clock to one or more frequencies within a second frequency range after the packet exchange. The clock may be variably tuned to multiple frequencies within either the first or second range.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     The invention relates to reducing electromagnetic emissions in electronic devices.  
         [0002]     Some Universal Serial Bus (USB) devices use crystal-less oscillators to generate clock signals while providing proper communication and compliance with the USB standard. Instead of using a relatively expensive crystal oscillator, the crystal-less oscillator derives a clock signal internally from a USB data stream.  
         [0003]     These crystal-less oscillators maintain a substantially constant clock frequency by locking-in to the USB data stream sent by the USB host. Generally these crystal-less oscillator circuits cannot vary the frequency beyond the range allowed by the USB system, since this would lead to communication failures.  
         [0004]     Unfortunately, maintaining a substantially constant operating frequency increases the undesirable effects from electromagnetic emissions both for devices next to the USB device and for circuitry within the USB device. As a result, much of the cost saving from crystal-less oscillator circuits are lost to the additional electromagnetic shielding that is used in the USB device.  
       SUMMARY OF THE INVENTION  
       [0005]     A timing circuit derives a clock from a data transmission signal and then operates the clock within an allowable frequency tolerance during a data exchange. The timing circuit then tunes the clock to other frequencies after the packet exchange that may be outside of the normal operating tolerance for transferring data. Varying the operating frequency in this manner reduces the effects of electromagnetic emissions while also eliminating the need for expensive crystal oscillators.  
         [0006]     The foregoing and other objects, features and advantages of the invention will become more readily apparent from the following detailed description of a preferred embodiment of the invention which proceeds with reference to the accompanying drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0007]      FIG. 1  is a block diagram of a USB host and peripheral device.  
         [0008]      FIG. 2  is an example spread spectrum clock frequency timeline.  
         [0009]      FIG. 3  is a flow diagram describing spread spectrum logic.  
         [0010]      FIG. 4  is a more detailed diagram of a spread spectrum circuit shown in  FIG. 1 .  
         [0011]      FIG. 5  is a chart illustrating different ranges of spread spectrum frequencies.  
         [0012]      FIG. 6  is an alternative example spread spectrum clock frequency timeline. 
     
    
     DETAILED DESCRIPTION  
       [0013]     Universal Serial Bus (USB) is a high speed serial interface used to connect a host device, such as a personal computer, to one or more peripheral devices such as a keyboard, mouse, printer, modem, or digital camera. Throughout the development of modern computer systems, peripheral devices have had any number of different interface connector types, usually designed according to the specifications of the device manufacturer. The USB architecture was designed as a universal interface that works with a wide variety of different devices made by different manufacturers.  
         [0014]      FIG. 1  shows a simple block diagram of a USB system including a USB host  100  and a peripheral device  110 . The USB host  100  initiates communication with the peripheral device  110  by sending a command or request which the peripheral device  110  receives as Data-In. Data-In is sent by the USB host  100  with an associated data rate and frequency as determined by a host clock  120 . The peripheral device  110  typically operates at approximately the same frequency or a multiple of the frequency associated with the Data-In. If not operating at an appropriate frequency, it is desirable for the peripheral device  110  to adjust its own frequency to operate within the appropriate frequency. Data-Out sent by the peripheral device  110  to the USB host  100  should be transmitted at approximately the same frequency as Data-In.  
         [0015]     Peripheral devices typically require an external or master clock, often a crystal, that maintains the peripheral device clock speed within an operable frequency range. The peripheral device  110  may also include frequency tuning circuitry that corrects the clock frequency when it deviates from the operable frequency range.  
         [0016]     In an alternative embodiment, the peripheral device  110  includes oscillator circuitry that tunes the frequency of the clock according to the operable frequency range without using external components. The operable frequency range may be determined by locking to a data stream, as a type of recovered clock, and without the use of a crystal. By using crystal-less oscillator circuitry, the cost and complexity associated with the crystal can be eliminated. USB Systems that lock clock frequencies to a recovered clock are described in U.S. Pat. No. 6,297,705, entitled: Circuit for Locking an Oscillator to a Data Stream; U.S. Pat. No. 6,407,641, entitled: Auto-Locking Oscillator for Data Communications; and U.S. Pat. No. 6,525,616, entitled: Circuit for Locking an Oscillator to a Data Stream. These patents are all assigned to Cypress Semiconductor Corporation, the assignee of the present patent, and are hereby incorporated by reference in entirety.  
         [0017]     As discussed, the peripheral device  110  may use an external clock or a recovered clock to lock to the operable frequency during communication. In either case, the peripheral device  110  generally transmits Data-Out to the USB host  100  at approximately the same frequency that the host clock  120  transmits Data-In. When the peripheral device  110  contains frequency tuning circuitry, it is not as critical that the frequency of the Data-In be uniform, since the frequency tuning circuitry can adjust the clock speed of the peripheral device  110  to match the frequency of the Data-In as needed.  
         [0018]     If the peripheral device  110  operates at approximately the same frequency over an extended period of time, an increased level of electromagnetic radiation may be emitted at that frequency. This elevated level of radiation may exceed allowable regulatory requirements for USB devices. Expensive shielding or distancing of circuitry and components may then be required for reducing the emission levels.  
         [0019]     To reduce electromagnetic radiation, a spread spectrum circuit  130  may be included that varies the frequency of the peripheral device  110  and prevents the frequency from remaining at any one value for an extended period of time.  
         [0020]      FIG. 2  shows a frequency timeline for the peripheral device  110 , wherein the frequency operates at a center frequency F 0  during communication with the USB host  100  and is then varied to one or more frequencies F 1 -F 4  when the peripheral device  110  is not communicating with USB host  100 .  
         [0021]     At a time T 1 , the peripheral device may be operating at a frequency F 1 , which may or may not be the same as the center frequency F 0 . At a time T 2 , a data packet RCV 1  is received by the peripheral device  110  and the frequency is tuned to the center frequency F 0 . The peripheral device  110  may then remain at the same center frequency F 0  during subsequent transmission of one or more reply packets TX 1 . At a time T 3 , a data packet RCV 2  is received immediately after, or in close proximity, to the reply packet TX 1 . The peripheral device  110  may then remain at the center frequency F 0  (operable frequency) from time T 2  to time T 3 .  
         [0022]     At a time T 4 , the peripheral device  110  becomes idle if no more data is received or transmitted. The spread spectrum circuit  130  may then vary the peripheral device operating frequency to a frequency F 2  which may be different from the center frequency F 0  and frequency F 1 . At a time T 5  the peripheral device  110  may receive a data packet RCV 3  and subsequently transmit a reply packet TX 3 , during which time the peripheral device  110  may again be tuned to the center frequency F 0 . At a time T 6  the peripheral device  110  is idle and yet another different frequency F 3  is generated. At a time T 7  a data packet RCV 4  is received and reply packet TX 4  is transmitted, and accordingly the center frequency F 0  is reselected. At a time T 8 , the spread spectrum circuit  130  may generate yet another frequency F 4  which may be different from all previous frequencies. The timeline would typically continue for an indefinite period with additional packets being received and different frequencies selected when data is not being transmitted or received.  
         [0023]      FIG. 2  shows an example of alternating intervals when the peripheral device  110  is active and idle, and frequencies alternating between a center frequency F 0  and other frequencies F 1 -F 4 . However, there may be times of heavy communication when data may be continuously received and transmitted. In these situations, the peripheral device  110  may remain at the center frequency F 0  for an extended period of time. This is shown at times T 2  and T 3  wherein data packet RCV 1  and data packet RCV 2  are received sequentially and the frequency of the peripheral device  110  remains at the center frequency F 0 . Similarly, the peripheral device  110  may remain at some other frequency F 1 -F 4  when it is idle for an extended period of time.  
         [0024]     A flow diagram  300  for the spread spectrum circuit  130  is shown in  FIG. 3 . The USB host  100  sends data across a USB bus to a peripheral device. At operation  301  a data packet is sent to the peripheral device  110 , a USB bus communication occurs, and the peripheral device  110  locks to the center frequency F 0  of the packet transmission signal. The spread spectrum circuit  130  selects another frequency at operation  302 , in between USB bus communication, when no data packet is addressed to the peripheral device  110 .  
         [0025]     At operation  303 , the USB bus communication resumes at the center frequency F 0  when another data packet is addressed to the peripheral device  110 . Operations  302  and  303  may then be repeated as subsequent data packets are sent to and received by the peripheral device  110 . As previously discussed, if the peripheral device  110  receives consecutive data packets, then it may remain at the center frequency F 0  for an extended period of time without varying its frequency.  
         [0026]     Referring next to  FIG. 4 , an example of the spread spectrum circuit  130  is shown in more detail. The spread spectrum circuit  130  can be used in peripheral devices such as a USB mouse or keyboard, as well as other devices or circuits that may or may not operate at a low speed. The spread spectrum circuit  130  of  FIG. 4  includes a USB processing engine  405 , an oscillator locking logic circuit  410 , a spreading logic circuit  415 , an accumulator  420 , and a digitally controlled oscillator  425 .  
         [0027]     The components and circuitry in the spread spectrum circuit  130  could be included in a single Integrated Circuit (IC) component or in multiple components and still function substantially similar as described herein. For example, the USB processing engine  405 , the oscillator locking logic circuit  410 , the spreading logic circuit  415  and the accumulator  420  could be included in one circuit, and the digitally controlled oscillator  425  could be included in a separate circuit. The functions performed by the digitally controlled oscillator  425  may also be implemented as a programmable oscillator, for example.  
         [0028]     The spread spectrum circuit  130  shown in  FIG. 4  is shown implemented in a hardware solution, however it may also be implemented in firmware or in software using a programmable processing device. A hardware solution may provide for increased speeds of operation and rates of spread spectrum frequency generation.  
         [0029]     USB inputs are sent by the USB host  100  as a stream of data or data packets to all of the peripheral devices connected to the USB bus. The USB processing engine  405  receives the USB input and determines if the data packet is received by the peripheral device  110 . The USB processing engine is further able to distinguish and detect different types of data packets that the oscillator  425  may lock to. When data is received, the USB processing engine  405  sends a packet detect signal to the oscillator locking logic circuit  410 , to indicate that a start of packet event has occurred. The oscillator locking logic circuit  410  may determine the center frequency F 0  as well as an operable frequency range in which communication between the peripheral device  110  and the USB host  100  may occur.  
         [0030]     The center frequency F 0  may be determined according to an analysis of the data stream rather than according to an external precision timing element. As described in U.S. Pat. No. 6,297,705, an oscillator may be tuned to match a multiple of the data rates of the incoming signal. However it is noted that the spread spectrum circuit  130  is able to otherwise operate as described herein with or without the presence of an external precision timing element.  
         [0031]     After the oscillator locking logic circuit  410  determines the center frequency F 0 , a lock count signal LockCount representing the center frequency F 0  is sent to the accumulator  420 . The accumulator  420  registers LockCount and generates an oscillator count signal OscCount associated with a target clock speed. OscCount may be sent to a look-up table to correct or tune the rate of oscillation as necessary, as further described in U.S. Pat. No. 6,297,705. OscCount may then be used by the digitally controlled oscillator  425  to control the rate and frequency of oscillation of the clock signal. The digitally controlled oscillator  425  generates a clock signal according to OscCount and is typically some multiple of the USB input data rate. OscCount may be incremented up or down in order to adjust or tune the frequency of oscillation.  
         [0032]     During communication with the USB host  100 , the peripheral device  110  preferably operates within an operable frequency range FOP as shown in  FIG. 5 . Therefore, the spread spectrum circuit  130  may include an algorithm that would request an operating target frequency FT 1  that is different than the center frequency F 0  but still lies within the operable frequency range FOP. In this way, a moderate level of spread spectrum can be achieved even during communication with the USB host  100 , by alternating the operating target frequency FT 1  to different frequencies within the operable frequency range FOP. For example the accumulator  420 , after receiving a LockCount associated with the center frequency F 0 , may increment or decrement its internal counter such that it generates an OscCount associated with a new frequency. Similarly, the spreading logic circuit  415  may be used in conjunction with the oscillator locking logic circuit  410  to send instructions to the accumulator  420  on how to vary the OscCount. The center frequency F 0  does not need to be exclusively selected during communication as shown at times T 2 , T 3 , T 5  and T 7  of  FIG. 2 . Rather, the center frequency F 0  can be replaced with the operating target frequency FT 1  located anywhere within the operable frequency range FOP.  
         [0033]     Referring again to  FIG. 4 , after communication between the USB host  100  and the peripheral device  110  has been completed, the USB processing engine  405  determines that an end of packet event has occurred and sends a Packet Done signal to the spreading logic circuit  415 . The end of packet event may be determined according to an internal interrupt contained within the peripheral device  110 , for example. The spreading logic circuit  415  may be activated exclusively of the oscillator locking logic circuit  410 , and may be disabled during data transmission. The spreading logic circuit  415  may contain an algorithm that determines a sequential or pseudo-random change to the clock speed. The spreading logic circuit  415  sends a spread spectrum count change signal SpreadCountChange to the accumulator  420  for further processing. If the accumulator  420  had previously identified a LockCount associated with the center frequency F 0 , it may then increment or decrement its counter by the SpreadCountChange and store this new value in its register. The accumulator  420  may then send an OscCount associated with an initial spread spectrum target frequency FT 2  signal to the digitally controlled oscillator  425  which then generates the clock signal as before.  
         [0034]     In an alternative embodiment, the spreading logic circuit  415  is not disabled during data transmission and instead provides the SpreadCountChange signal to the accumulator  420  in order to spread the frequencies in the operable frequency range FOP even during data transmission. In this way, a spread spectrum is being accomplished at all times when the peripheral device  110  is active and idle.  
         [0035]     The accumulator  420  may store a count associated with a target frequency in its register and therefore assist in subsequent tuning of the oscillator  425  to a center frequency F 0  associated with a next received data packet. By retaining prior knowledge of frequency selection, the oscillator  425  may be able to lock into the data stream more rapidly when new data is received. Similarly, the accumulator  420  may use the stored count to help generate subsequent frequencies associated with a spread spectrum algorithm.  
         [0036]     The spread spectrum target frequency FT 2  may be selected from within the operable frequency range FOP that is bounded by a lower operable frequency FP 1  and by an upper operable frequency FP 2 . As shown in  FIG. 5 , FT 2  may also be selected from a spread spectrum frequency range FSS that is bounded by a still lower spread spectrum frequency FS 1  and by a still greater upper spread spectrum frequency FS 2  as compared to the operable frequency range FOP. The lower spread spectrum frequency FS 1 , therefore, may be less than the lower operable frequency FP 1 , and the upper spread spectrum frequency FS 2  may be greater than the upper operable frequency FP 2 . As a result, spread spectrum target frequency FT 2  may be located inside as well as outside of the operable frequency range FOP. In this way, an even greater amount of spread spectrum can be achieved when the peripheral device  110  remains idle, by alternating the spread spectrum target frequency FT 2  to different frequencies within the spread spectrum frequency range FSS. This may result in a further measurable reduced level of the electromagnetic emissions beyond that achieved by varying the frequency solely within the operable frequency range FOP.  
         [0037]     The digitally controlled oscillator  425  typically achieves an operating accuracy to within plus or minus 1.5% tolerance of the center frequency F 0  when a low-speed peripheral USB device is in communication with the USB host  100 . For example, if the peripheral device  110  is operating at 24 MHz, this would provide an operable frequency range FOP of 720 kHz. If the peripheral device  110  is operating at a frequency outside of the operable frequency range FOP, it is desirable to tune to an operating target frequency FT 1  during an initial transmission period of data. Otherwise, a communication failure may occur.  
         [0038]     The digitally controlled oscillator  425  having a 60 kHz per step resolution, for example, is able to timely lock in to the operable frequency range FOP from a spread spectrum target frequency FT 2  that is plus or minus 3% of the center frequency F 0 . This provides a spread spectrum frequency range FSS of 1440 kHz when the peripheral device is idle. In practice, it may be desirable to restrict the upper and lower spread spectrum frequencies FS 1  and FS 2  that bound the spread spectrum frequency range FSS to improve reliability of the system. For example, the spread spectrum frequency range FSS may be specified at approximately plus or minus 2% of the center frequency F 0 . In this way, a wide spreading range can be achieved, even beyond the accuracy limits of the bus communication, but while still maintaining reliable communication.  
         [0039]     Referring again to  FIG. 2 , the example spread spectrum clock frequency timeline shows alternating frequencies between the center frequency F 0  during data transmission and between the spread spectrum target frequency FT 2  when the peripheral device  110  is idle. Spread spectrum target frequency FT 2  is shown in  FIG. 2  by sequentially increasing frequencies of F 2 -F 4 .  FIG. 2  is not intended to suggest a limit of four frequencies outside of the center frequency F 0 . Rather, a finite number of available frequencies may be determined by the clock speed and the resolution of the digitally controlled oscillator  425 , for example. When the sequentially increasing frequency reaches the upper spread spectrum range FS 2 , for example, the accumulator  420  can restart its register and provide an OscCount associated with the frequency F 1 .  
         [0040]     Many alternative algorithms for oscillating the spread spectrum frequencies are possible, including selecting a random or pseudo-random frequency generation. For example, instead of sequentially alternating frequencies between F 0  and the spread spectrum target frequency FT 2 , a pseudo-random frequency generation algorithm could be used that would result in any combination of pseudo-random frequencies. Example pseudo-random generation algorithms are described in co-pending U.S. patent application Ser. No. 10/147,828 RANDOM NUMBER GENERATOR, assigned to Cypress Semiconductor Corporation, the assignee of the present patent, and which is herein incorporated by reference.  
         [0041]     Notwithstanding the many algorithms available, it remains desirable to select a target frequency that lies within the operable frequency range FOP shown in  FIG. 5  during data transmission. In other words, the center frequency F 0  shown in  FIG. 2  may be replaced with any sequence of frequencies wherein each frequency is greater than the lower operable frequency FP 1  and less than the upper operable frequency FP 2  during data transmission.  
         [0042]      FIG. 6  shows an alternative embodiment wherein the spread spectrum frequencies may be varied according to a set period of time. In one embodiment, the frequency may be varied each time that a USB frame marker is sent, or after some multiple of USB frame markers has been sent. Frame markers are typically sent by the USB host  100  once every millisecond whether or not they contain any data, and therefore may be used as a timer for a spread spectrum algorithm. At time T 1 , the peripheral device  110  may be operating at the frequency F 1 . Upon receiving a data packet RCV 11  at a time T 2 , the digitally controlled oscillator  425  may lock to the operating target frequency FT 1 . After transmitting reply packet TX 11  and at a time T 3 , a frequency F 2  may be selected. Similarly, at some increment of time denoted by times T 4 , T 5  and T 6  through Tn, the peripheral device  110  is made to operate at sequential frequencies F 3 , F 4  and F 5  through Fn respectively.  
         [0043]     When a next data packet RCV 12  is received by the peripheral device  110  at time Tn+1, the digitally controlled oscillator  425  may once again generate a clock speed associated with the operating target frequency FT 1  to facilitate communication with the USB host  100 . As discussed, the operating target frequency FT 1  specified at time Tn+1 may be different then the operating target frequency FT 1  specified at time T 2 .  
         [0044]     Frequencies F 1 -Fn in  FIG. 6  may be located anywhere in the spread spectrum frequency range FSS, and may further be described and represented in  FIG. 5  as the spread spectrum target frequency FT 2 . When a frequency Fn is generated at some finite time Tn, the accumulator  420  may reset its register such that OscCount would restart at a count associated with the selection of frequency F 1  for the next received data packet. Alternatively, a pseudo-random frequency generation algorithm could be used that may result in any combination of pseudo-random frequencies that would be selected at each increment of time or event. Furthermore, the increments of time may also be selected according to a pseudo-random generation algorithm such that the changes in frequency would not occur at regular intervals.  
         [0045]     Oscillating the frequency within the operable frequency range FOP during data transmission, and within the spread spectrum frequency range FSS when the peripheral device  110  remains idle may reduce overall electromagnetic emission. In an alternative embodiment the spread spectrum circuit  130  may continuously oscillate frequencies at pseudo-random time intervals and combine this with a pseudo-random frequency generation algorithm which may result in additional varying combinations and sequences of selected frequencies.  
         [0046]     Combining different frequency generation algorithms when there are multiple peripheral devices connected to the USB host  100  may further result in an overall reduction in electromagnetic radiation being emitted at the same frequency. When each of the peripheral devices is using a different frequency generation algorithm, there is less likelihood that multiple devices will be operating at the same frequency for any substantial period of time. By decreasing the overall levels of electromagnetic emission in the USB system, this may also decrease electrical interference during communication between one or more peripheral devices and the USB host  100 .  
         [0047]     When a low number of data packets are being received by the peripheral device  110 , it may be possible to increase the spread spectrum frequency range FSS. The digitally controlled oscillator  425  may be able to timely and consistently lock back to the operable frequency range FOP from a point closer to the lower and upper spread spectrum frequencies FS 1  an FS 2  during infrequent data packet exchanges. In an alternative embodiment, the spreading logic circuit  415  may vary the spread spectrum frequency range FSS proportional to the amount of data traffic over the USB bus, and more specifically to the data rate received by the peripheral device  110 . In a USB Human Interface Device, or HID, there is normally a short initial phase of dense communication (enumeration), followed by a relatively sparse data exchange. More aggressive spreading may be used during this latter phase, which significantly dominates the operation time of such devices. Similarly, during high rates of data transmission, it may be advantageous to restrict the spread spectrum to the operable frequency range FOP, even when data is not being transmitted.  
         [0048]     Different frequency generation algorithms can be selected according to the nature of the data being received by the peripheral device  110 , or according to a specific application or mode of operation of the peripheral device  110 . The spread spectrum logic may be incorporated in software, firmware, or hardware. Furthermore, the spread spectrum logic may be incorporated in communication systems other than USB, for example in Peripheral Component Interconnect (PCI) Express.  
         [0049]     Additional benefits that may be obtained from the spread spectrum logic include a reduction in the cost associated with shielding circuitry and components within a device or between devices, as well as the potential to reduce the size of devices or improve their design. For example, the spread spectrum logic helps facilitate an inexpensive keyboard design that includes a single-sided circuit board, instead of the more expensive dual-sided circuit boards.  
         [0050]     The system described above can use dedicated processor systems, micro controllers, programmable logic devices, or microprocessors that perform some or all of the operations. Some of the operations described above may be implemented in software and other operations may be implemented in hardware.  
         [0051]     For the sake of convenience, the operations are described as various interconnected functional blocks or distinct software modules. This is not necessary, however, and there may be cases where these functional blocks or modules are equivalently aggregated into a single logic device, program or operation with unclear boundaries. In any event, the functional blocks and software modules or features of the flexible interface can be implemented by themselves, or in combination with other operations in either hardware or software.  
         [0052]     Having described and illustrated the principles of the invention in a preferred embodiment thereof, it should be apparent that the invention may be modified in arrangement and detail without departing from such principles. I claim all modifications and variation coming within the spirit and scope of the following claims.