Abstract:
An object of this invention is to provide an image processing apparatus capable of preventing any color misregistration in printing even when the image processing apparatus is divided into a plurality of semiconductor integrated circuits. An image processing apparatus is used for an image forming apparatus for sequentially printing image processing results of color components by a plurality of photosensitive drums separated by predetermined distances in correspondence with the colors. In the image processing apparatus, a plurality of image processing sections for the respective color components are divided into a plurality of semiconductor integrated circuits. At least two of the plurality of image processing sections have storage sections which adjust the printing timings of the color components corresponding to the distances between the photosensitive drums. The image processing apparatus includes a synchronization circuit which synchronizes, with an image processing clock for image processing, a print request signal from a printer controller. The print request signal synchronized by the synchronization circuit is commonly used to adjust the read timings of the storage sections of the plurality of image processing sections.

Description:
FIELD OF THE INVENTION  
         [0001]    The present invention relates to an image processing apparatus, image processing method, control program, and recording medium.  
         BACKGROUND OF THE INVENTION  
         [0002]    In many image processing apparatuses for printing color images, to print at a high speed components (black, cyan, magenta, and yellow) that have undergone image processing, independent photosensitive drums  1 ,  2 ,  3 , and  4  are physically laid out at predetermined intervals  5 ,  6 , and  7  (to be referred to as drum pitches hereinafter), and a sheet surface  8  is conveyed in a predetermined direction to sequentially print the components, as shown in FIG. 1.  
           [0003]    The operation will be described below in detail with reference to FIG. 2.  
           [0004]    Image data  23  to  26  of the respective components input from an image input apparatus  10  to an image processing apparatus  11  undergo image processing operations  13  to  16 , respectively.  
           [0005]    [0005]FIG. 2 illustrates input images and output images in the same color space for the descriptive convenience, though the processing is substantially the same even when input images and output components have different color spaces (e.g., RGB inputs and CMYK outputs).  
           [0006]    Since the image processing operations for the components are parallelly executed for each pixel, delay amounts generated by the drum pitches are adjusted by storage devices  17  to  19 .  
           [0007]    To adjust phase differences generated by the drum pitches, the outputs from the image processing operations  14  to  16  are stored in the storage devices  17  to  19 , respectively, as needed.  
           [0008]    A first output component  27  is output to a printer controller  12  without intervening any storage device because no phase adjustment is necessary for the photosensitive drum  1  of the printer, which prints first.  
           [0009]    For a second output component  28 , the image-processed data is stored in the storage device  17 . In accordance with a read control signal  32  transmitted from a read control circuit  20 , the data is read out from the storage device  17  and output to the printer controller  12 . At this time, a phase difference corresponding to the drum pitch  5  is adjusted.  
           [0010]    For a third output component  29 , the image-processed data is stored in the storage device  18 . In accordance with a read control signal  33  transmitted from the read control circuit  20 , the data is read out from the storage device  18  and output to the printer controller  12 . At this time, a phase difference corresponding to the drum pitch  6  is adjusted.  
           [0011]    For a fourth output component  30 , the image-processed data is stored in the storage device  19 . In accordance with a read control signal  34  transmitted from the read control circuit  20 , the data is read out from the storage device  19  and output to the printer controller  12 . At this time, a phase difference corresponding to the drum pitch  7  is adjusted.  
           [0012]    A print request signal synchronization circuit  36  and the read control circuit  20  will be described next with reference to FIGS. 2 and 3.  
           [0013]    On the basis of a print request signal  31  from the printer controller  12 , the image input apparatus  10  is activated. After image processing by the image processing apparatus  11 , the printer controller  12  receives the output data  27  to  30  from the image processing apparatus  11  and prints them by the above-described method.  
           [0014]    In such a case, to adjust a delay generated due to the physical characteristic of the electric wire that connects the printer controller  12  to the image processing apparatus  11  or the states of the printer controller  12  and image processing apparatus  11  operating by clocks of different frequencies, the print request signal  31  input from the printer controller  12  is synchronized by an image processing clock  22  and then input to the read control circuit  20 . After the synchronization, the read control circuit  20  delays the read control signal  32  on the basis of the print request signal by a time corresponding to the period (drum pitch  5 ) in which the sheet surface is conveyed from the first photosensitive drum section  1  to the second photosensitive drum section  2 , and transmits the delayed read control signal  32  to the storage device  17 . Similarly, the read control circuit  20  delays the read control signal  33  on the basis of the print request signal by a time corresponding to the period (drum pitch  6 ) in which the sheet surface is conveyed from the first photosensitive drum section  1  to the third photosensitive drum section  3 , and transmits the delayed read control signal  33  to the storage device  18 . In addition, the read control circuit  20  delays the read control signal  34  on the basis of the print request signal by a time corresponding to the period (drum pitch  7 ) in which the sheet surface is conveyed from the first photosensitive drum section  1  to the fourth photosensitive drum section  4 , and transmits the delayed read control signal  34  to the storage device  19 .  
           [0015]    The circuit that implements the image processing apparatus  11  shown in FIG. 2 cannot be mounted on a single semiconductor integrated circuit in some cases due to its scale. Additionally, in a monochromatic printing system, the image processing apparatus  11  is redundant and increases the cost. Due to the above reasons, the image processing apparatus is sometimes divided into two semiconductor integrated circuits  11 A and  11 B, as shown in FIG. 4.  
           [0016]    The image processing apparatus is present physically as a plurality of semiconductor integrated circuits. In this case, however, when the print request signal input from the printer controller  12  is synchronized with an image processing clock by synchronization circuits  36 A and  36 B prepared in the respective integrated circuits of the image processing apparatuses, print request signals  35 A and  35 B after synchronization may have a phase difference. Hence, for example, the read control signal  33  which is expected to change at edge  1  in FIG. 5 may change at edge  2 . This causes a color misregistration in the printed picture, resulting in degradation in image quality.  
         SUMMARY OF THE INVENTION  
         [0017]    The present invention has therefore been made in consideration of the above-described problem, and has as its object to provide an image processing apparatus, image processing method, control program, and recording medium, which can prevent any color misregistration even when an image processing apparatus is divided into a plurality of semiconductor integrated circuits.  
           [0018]    In order to solve the above-described problem and achieve the object, an image processing apparatus according to the present invention is characterized by having the following arrangement.  
           [0019]    That is, there is provided an image processing apparatus which is used for an image forming apparatus for executing image processing for each color component and sequentially printing image processing results of the color components by a plurality of photosensitive drums separated by predetermined distances in a convey direction of a printing medium in correspondence with the colors and in which a plurality of image processing sections which execute image processing for the respective color components are divided into a plurality of semiconductor integrated circuits, wherein at least two of the plurality of image processing sections have storage sections which adjust printing timings of the color components corresponding to the distances between the photosensitive drums, the image processing apparatus comprises a synchronization circuit which synchronizes, with an image processing clock for image processing, a print request signal from a printer controller which controls printing operation, and the print request signal synchronized by the synchronization circuit is commonly used to adjust read timings of the storage sections of the plurality of image processing sections.  
           [0020]    An image processing method according to the present invention is characterized by having the following arrangement.  
           [0021]    That is, there is provided an image processing method which is used for an image forming apparatus for executing image processing for each color component and sequentially printing image processing results of the color components by a plurality of photosensitive drums separated by predetermined distances in a convey direction of a printing medium in correspondence with the colors and uses an image processing apparatus in which a plurality of image processing sections which execute image processing for the respective color components are divided into a plurality of semiconductor integrated circuits, comprising causing at least two of the plurality of image processing sections to have storage sections which adjust printing timings of the color components corresponding to the distances between the photosensitive drums, and synchronizing, with an image processing clock for image processing, a print request signal from a printer controller which controls printing operation, and commonly using the print request signal synchronized by the synchronization circuit to adjust read timings of the storage sections of the plurality of image processing sections.  
           [0022]    A control program according to the present invention is characterized by having the following arrangement.  
           [0023]    That is, a control program causes a computer to execute the above image processing method.  
           [0024]    A recording medium according to the present invention is characterized by having the following arrangement.  
           [0025]    That is, a recording program records the above control program.  
           [0026]    Other objects and advantages besides those discussed above shall be apparent to those skilled in the art from the description of a preferred embodiment of the invention which follows. In the description, reference is made to accompanying drawings, which form a part thereof, and which illustrate an example of the invention. Such example, however, is not exhaustive of the various embodiments of the invention, and therefore reference is made to the claims which follow the description for determining the scope of the invention. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0027]    [0027]FIG. 1 is a view showing the layout state of photosensitive drums;  
         [0028]    [0028]FIG. 2 is a block diagram showing a prior art;  
         [0029]    [0029]FIG. 3 is a timing chart showing the operation timing of the synchronization circuit and read control circuit;  
         [0030]    [0030]FIG. 4 is a block diagram showing another prior art;  
         [0031]    [0031]FIG. 5 is a timing chart showing a state wherein the timing of a read control signal shifts;  
         [0032]    [0032]FIG. 6 is a block diagram showing the arrangement of an image processing system according to the first embodiment of the present invention;  
         [0033]    [0033]FIG. 7 is a block diagram showing the arrangement of an image processing system according to the second embodiment of the present invention;  
         [0034]    [0034]FIG. 8 is a block diagram showing the arrangement of an image processing system according to the third embodiment of the present invention;  
         [0035]    [0035]FIG. 9 is a block diagram showing the arrangement of an image processing system according to the fourth embodiment of the present invention;  
         [0036]    [0036]FIG. 10 is a block diagram showing the arrangement of an image processing system according to the fifth embodiment of the present invention;  
         [0037]    [0037]FIG. 11 is a block diagram showing the arrangement of an image processing system according to a modification to the first embodiment of the present invention;  
         [0038]    [0038]FIG. 12 is a block diagram showing the arrangement of an image processing system according to a modification to the second embodiment of the present invention;  
         [0039]    [0039]FIG. 13 is a block diagram showing the arrangement of an image processing system according to a modification to the third embodiment of the present invention;  
         [0040]    [0040]FIG. 14 is a block diagram showing the arrangement of an image processing system according to a modification to the sixth embodiment of the present invention;  
         [0041]    [0041]FIG. 15 is a block diagram showing the arrangement of an image processing system according to a modification to the fourth embodiment of the present invention;  
         [0042]    [0042]FIG. 16 is a block diagram showing the arrangement of an image processing system according to a modification to the fifth embodiment of the present invention;  
         [0043]    [0043]FIG. 17 is a block diagram showing the arrangement of an image processing system according to another modification to the fourth embodiment of the present invention; and  
         [0044]    [0044]FIG. 18 is a block diagram showing the arrangement of an image processing system according to another modification to the fifth embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0045]    The preferred embodiments of the present invention will be described below.  
         [0046]    (First Embodiment)  
         [0047]    [0047]FIG. 6 is a block diagram showing the arrangement of an image processing system according to the first embodiment of the present invention. This image processing system performs printing after adjusting the phase difference between color image signals due to drum pitches already described with reference to FIG. 1.  
         [0048]    In the image processing system constituted by an image input apparatus  10 , an image processing apparatus  11  formed from a plurality of semiconductor integrated circuits  11 A and  11 B, and a printer controller  12 , image data  23  to  26  of the respective components input from the image input apparatus  10  undergo image processing operations  13  to  16 , respectively.  
         [0049]    The image processing operations for the components are parallelly executed for each pixel. To adjust delay amounts generated due to the drum pitches by storage devices  17  to  19 , the data are stored in the storage devices  17  to  19 , as needed. The storage device  17  to  19  may be mounted outside of the semiconductor integrated circuits  11 A and  11 B. This structure also can be applied to the other following embodiments.  
         [0050]    A first output component  27  is output to the printer controller  12  without intervening any storage device because no phase adjustment is necessary for a photosensitive drum  1  (FIG. 1) of the printer, which prints first.  
         [0051]    For a second output component  28 , the image-processed data is stored in the storage device  17 . In accordance with a read control signal  32  transmitted from a read control circuit  20 A, the data is read out from the storage device  17  and output to the printer controller  12 . At this time, a phase difference corresponding to a drum pitch  5  (FIG. 1) is adjusted.  
         [0052]    For a third output component  29 , the image-processed data is stored in the storage device  18 . In accordance with a read control signal  33  transmitted from a read control circuit  20 B, the data is read out from the storage device  18  and output to the printer controller  12 . At this time, a phase difference corresponding to a drum pitch  6  (FIG. 1) is adjusted.  
         [0053]    For a fourth output component  30 , the image-processed data is stored in the storage device  19 . In accordance with a read control signal  34  transmitted from the read control circuit  20 B, the data is read out from the storage device  19  and output to the printer controller  12 . At this time, a phase difference corresponding to a drum pitch  7  (FIG. 1) is adjusted.  
         [0054]    A print request signal  31  transmitted from the printer controller  12  is input to a synchronization circuit  36 A prepared in the semiconductor integrated circuit  11 A of the image processing apparatus  11 , synchronized by an image processing clock  22 , and then input to the read control circuits  20 A and  20 B prepared respectively in the semiconductor integrated circuits of the image processing apparatuses  11 A and  11 B.  
         [0055]    On the basis of a synchronized print request signal  35 A, the read control circuit  20 A in the image processing apparatus  11 A adds, to the read control signal  32 , a delay corresponding to the period in which the sheet surface is conveyed from the first photosensitive drum section  1  to the second photosensitive drum section  2 , and transmits the delayed read control signal  32  to the storage device  17 . Similarly, on the basis of the same synchronized print request signal  35 A as that for the read control circuit  20 A, the read control circuit  20 B in the image processing apparatus  11 B adds, to the read control signal  33 , a delay corresponding to the period in which the sheet surface is conveyed from the first photosensitive drum section  1  to the third photosensitive drum section  3 , and transmits the delayed read control signal  33  to the storage device  18 . In addition, on the basis of the synchronized print request signal  35 A, the read control circuit  20 B also adds, to the read control signal  34 , a delay corresponding to the period in which the sheet surface is conveyed from the first photosensitive drum section  1  to the fourth photosensitive drum section  4 , and transmits the delayed read control signal  34  to the storage device  19 .  
         [0056]    In this way, the print request signal  35 A output from the single synchronization circuit  36 A is used for both of the two separate image processing apparatuses  11 A and  11 B. With this arrangement, even when the image processing apparatus is separated into two semiconductor integrated circuits, any shift in timing can be prevented.  
         [0057]    [0057]FIG. 11 is a block diagram showing a modification to the first embodiment.  
         [0058]    Referring to FIG. 11, an image processing apparatus  11  is constituted by semiconductor integrated circuits  11 G and  11 F and has an image processing function of generating six component data (e.g., black, cyan, light cyan, yellow, magenta, and light magenta).  
         [0059]    Even when the number of output components is six, this arrangement makes it possible to prevent any shift in timing by controlling storage devices ( 17 -C 1 ,  17 -C 2 ,  18 ,  19 -M 1 , and  19 -M 2 ) in the image processing apparatuses  11 G and  11 F on the basis of a print request signal  35 A output from the image processing apparatus  11 G.  
         [0060]    (Second Embodiment)  
         [0061]    [0061]FIG. 7 is a block diagram showing the arrangement of an image processing system according to the second embodiment of the present invention.  
         [0062]    The difference between the first embodiment and the second embodiment will be described.  
         [0063]    In the second embodiment, an image processing apparatus  11  is constituted by an image processing apparatus  11 A as in the first embodiment, image processing sections  15  and  16  which process data input from an image input apparatus  10  on the basis of an image processing clock  22 , storage devices  18  and  19  which store data output from the image processing sections, a synchronization circuit  36 B which synchronizes a print request signal  31  input from a printer controller  12  with the image processing clock  22 , a selection circuit  40  which selects one of a synchronized print request signal  35 A output from the image processing apparatus  11 A and a synchronized print request signal  35 B output from the synchronization circuit  36 B, and an image processing apparatus  11 B having a read control circuit  20 B which generates component read control signals from the synchronized print request signal. With this arrangement, the storage devices  18  and  19  can be controlled on the basis of either of the two image processing apparatuses  11 A and  11 B.  
         [0064]    [0064]FIG. 12 is a block diagram showing a modification to the second embodiment.  
         [0065]    Referring to FIG. 12, the image processing apparatus  11  is constituted by semiconductor integrated circuits  11 G and  11 F and has an image processing function of generating six component data (e.g., black, cyan, light cyan, yellow, magenta, and light magenta).  
         [0066]    Even when the number of output components is six, this arrangement makes it possible to control storage devices ( 17 -C 1 ,  17 -C 2 ,  18 ,  19 -M 1 , and  19 -M 2 ) in the image processing apparatuses  11 G and  11 F on the basis of either of the two image processing apparatuses  11 G and  11 F.  
         [0067]    (Third Embodiment)  
         [0068]    [0068]FIG. 8 is a block diagram showing the arrangement of an image processing system according to the third embodiment of the present invention.  
         [0069]    The difference between the second embodiment and the third embodiment will be described.  
         [0070]    In the third embodiment, two image processing apparatuses  11 A and  11 B respectively have selection circuits  40 A and  40 B each of which selects one of a synchronized print request signal  35 A synchronized by a synchronization circuit  36 A in the image processing apparatus  11 A and a synchronized print request signal  35 B synchronized by a synchronization circuit  36 B in the image processing apparatus  11 B.  
         [0071]    With this arrangement, storage devices  17 ,  18 , and  19  can be controlled on the basis of either of the two image processing apparatuses  11 A and  11 B.  
         [0072]    [0072]FIG. 13 is a block diagram showing a modification to the third embodiment.  
         [0073]    Referring to FIG. 13, an image processing apparatus  11  is constituted by semiconductor integrated circuits  11 G and  11 F and has an image processing function of generating six component data (e.g., black, cyan, light cyan, yellow, magenta, and light magenta).  
         [0074]    Even when the number of output components is six(e.g., black, cyan, light cyan, yellow, magenta, and light magenta), storage devices ( 17 -C 1 ,  17 -C 2 ,  18 ,  19 -M 1 , and  19 -M 2 ) can be controlled on the basis of either of the two image processing apparatuses  11 G and  11 F by selection circuits  40 G and  40 F each of which selects one of a synchronized print request signal  35 A synchronized by a synchronization circuit  36 A in the image processing apparatus  11 G and a synchronized print request signal  35 B synchronized by a synchronization circuit  36 B in the image processing apparatus  11 F.  
         [0075]    (Fourth Embodiment)  
         [0076]    [0076]FIG. 9 is a block diagram showing the arrangement of an image processing system according to the fourth embodiment of the present invention.  
         [0077]    In this embodiment, an image processing apparatus  11  is constituted by image processing apparatuses  11 C and  11 D. The image processing apparatus  11 C has an image processing section and a synchronization circuit which synchronizes a print request signal  31  input from a printer controller  12  with an image processing clock. The image processing apparatus  11 C outputs one output component  27  to the printer controller  12 . Each image processing apparatus  11 D has an image processing section, a storage device, a synchronization circuit which synchronizes the print request signal  31  input from the printer controller  12  with the image processing clock, a selection circuit which selects one of a synchronized print request signal  35 A input from the image processing apparatus  11 C and a synchronized print request signal synchronized in that image processing apparatus  11 D, and a read control circuit which outputs a read control signal on the basis of the synchronized print request signal output from the selection circuit. Each image processing apparatus  11 D outputs a corresponding one of output components  28  to  30  to the printer controller  12 .  
         [0078]    With this arrangement, even in the image processing apparatus constituted by a plurality of semiconductor integrated circuits, a high print image quality can be obtained.  
         [0079]    [0079]FIGS. 15 and 17 are block diagrams showing modifications to the fourth embodiment.  
         [0080]    Referring to FIG. 17, an image processing apparatus  11  is constituted by semiconductor integrated circuits  11 C and  11 D, as in FIG. 9, and has an image processing function of generating six component data (e.g., black, cyan, light cyan, yellow, magenta, and light magenta).  
         [0081]    Even when the number of output components is six, this arrangement makes it possible to prevent any shift in timing by controlling storage devices ( 17 -C 1 ,  17 -C 2 ,  18 ,  19 -M 1 , and  19 -M 2 ) in the image processing apparatuses  11 D on the basis of a print request signal  35 A output from the image processing apparatus  11 C.  
         [0082]    Referring to FIG. 15, an image processing apparatus  11  is constituted by semiconductor integrated circuits  11 A and  11 B, as in FIG. 7, and has an image processing function of generating six component data (e.g., black, cyan, light cyan, yellow, magenta, and light magenta).  
         [0083]    Even in this case, this arrangement makes it possible to prevent any shift in timing by controlling storage devices ( 17 -C 1 ,  17 -C 2 ,  18 ,  19 -M 1 , and  19 -M 2 ) in the image processing apparatuses  11 B on the basis of a print request signal  35 A output from the image processing apparatus  11 A.  
         [0084]    (Fifth Embodiment)  
         [0085]    [0085]FIG. 10 is a block diagram showing the arrangement of an image processing system according to the fifth embodiment of the present invention.  
         [0086]    Image processing apparatuses  11 E described in the fourth embodiment are mounted in parallel in number equal to output components. Each image processing apparatus  11 E inputs a synchronized print request signal synchronized with an image processing clock to the remaining image processing apparatuses  11 E. In each image processing apparatus  11 E, a selection circuit selects one of the four synchronized print request signals.  
         [0087]    With this arrangement, storage devices can be controlled on the basis of either of the plurality of image processing apparatuses  11 E.  
         [0088]    [0088]FIGS. 16 and 18 are block diagrams showing modifications to the fifth embodiment.  
         [0089]    Referring to FIG. 18, image processing apparatuses ( 11 L) described in the fourth embodiment (FIG. 17) are mounted in parallel in number equal to output components. Each image processing apparatus  11 L inputs a synchronized print request signal synchronized with an image processing clock to the remaining image processing apparatuses  11 L. In each image processing apparatus  11 L, a selection circuit selects one of the six synchronized print request signals.  
         [0090]    Even in this case, the arrangement makes it possible to control storage devices in the image processing apparatuses  11 L on the basis of either of the plurality of image processing apparatuses  11 L.  
         [0091]    Referring to FIG. 16, an image processing apparatus  11  is constituted by a plurality of semiconductor integrated circuits ( 11 J and  11 K) described in the third embodiment (FIG. 8). One image processing apparatus  11 J and a plurality of image processing apparatuses  11 K are mounted in parallel. Each of the image processing apparatuses  11 J and  11 K inputs a synchronized print request signal synchronized with an image processing clock to the remaining image processing apparatuses  11 L and  11 K. In each of the image processing apparatuses  11 L and  11 K, a selection circuit selects one of the three synchronized print request signals.  
         [0092]    Even in this case, the arrangement makes it possible to control storage devices in the image processing apparatuses on the basis of either of the plurality of image processing apparatuses  11 J and  11 K.  
         [0093]    (Sixth Embodiment)  
         [0094]    [0094]FIG. 14 is a block diagram showing the arrangement of an image processing system according to the sixth embodiment of the present invention.  
         [0095]    Referring to FIG. 14, an image processing apparatus  11  is constituted by semiconductor integrated circuits  11 A and  11 B described in the first embodiment (FIG. 6) and has an image processing function of generating six component data (e.g., black, cyan, light cyan, yellow, magenta, and light magenta). The image processing apparatus  11 A inputs a synchronized print request signal synchronized with an image processing clock to each image processing apparatus  11 B. In each image processing apparatus  11 B, storage devices are controlled by the synchronized print request signal.  
         [0096]    With this arrangement, the plurality of image processing apparatuses  11 B can prevent any shift in timing by controlling storage devices ( 17 -C 2 ,  18 ,  19 -M 1 , and  19 -M 2 ) in accordance with a print request signal  35 A.  
         [0097]    As described above, according to the above embodiments, even when the image processing apparatus cannot be mounted on a single semiconductor integrated circuit, storage devices in another image processing apparatus can accurately be controlled on the basis of a print request signal from the first image processing apparatus.  
         [0098]    Even when storage devices in a plurality of image processing apparatuses are to be controlled by setting any one of the image processing apparatuses to the read standard, accurate control can be performed.  
         [0099]    The image processing apparatuses can be constituted in accordance with the number of output components. The storage devices can accurately be controlled on the basis of any one of the image processing apparatuses.  
         [0100]    Even when the image processing apparatus and printer controller use different operation clocks, the storage devices can accurately be controlled on the basis of any one of the image processing apparatuses.  
         [0101]    According to the above effects, even when an image processing apparatus is implemented by a plurality of semiconductor integrated circuits, a high-quality print image can be obtained. In addition, flexible printing control corresponding to the printer system can be executed.  
         [0102]    [Other Embodiment] 
         [0103]    The object of the embodiments is achieved even by supplying a storage medium (or recording medium) which stores software program codes for implementing the functions of the above-described embodiments to a system or apparatus and causing the computer (or a CPU or MPU) of the system or apparatus to read out and execute the program codes stored in the storage medium. In this case, the program codes read out from the storage medium implement the functions of the above-described embodiments by themselves, and the storage medium which stores the program codes constitutes the present invention. The functions of the above-described embodiments are implemented not only when the readout program codes are executed by the computer but also when the operating system (OS) running on the computer performs part or all of actual processing on the basis of the instructions of the program codes.  
         [0104]    The functions of the above-described embodiments are also implemented when the program codes read out from the storage medium are written in the memory of a function expansion board inserted into the computer or a function expansion unit connected to the computer, and the CPU of the function expansion board or function expansion unit performs part or all of actual processing on the basis of the instructions of the program codes.  
         [0105]    As has been described above, according to the above embodiments, even when the image processing apparatus is divided into a plurality of semiconductor integrated circuits, any color misregistration in printing can be prevented.  
         [0106]    The present invention is not limited to the above embodiments and various changes and modifications can be made within the spirit and scope of the present invention. Therefore, to apprise the public of the scope of the present invention, the following claims are made.