Abstract:
A data frame is received at a network switch, the data frame containing congestion status information for at least a first traffic class and a second traffic class associated with packets being transmitted by the network switch to a network interface device. When the network switch determines, in response to the data frame containing congestion status information, that the congestion status information indicates congestion corresponding to the first traffic class, the network switch reduces a rate of transmission of packets (i) corresponding to the first traffic class and (ii) destined for the network interface device.

Description:
CROSS REFERENCE TO RELATED APPLICATION 
     This application is a continuation of U.S. application Ser. No. 12/820,023, filed Jun. 21, 2010, now U.S. Pat. No. 8,427,947, entitled “Method and Apparatus for Preventing Head of Line Blocking in an Ethernet System,” which is a continuation of U.S. application Ser. No. 10/955,892, filed Sep. 29, 2004, now U.S. Pat. No. 7,742,412, issued on Jun. 22, 2010. The applications identified above are hereby incorporated by reference herein in their entireties. 
     This application also hereby incorporates by reference U.S. application Ser. No. 10/955,893, filed on Sep. 29, 2004, now U.S. Pat. No. 7,613,116, issued on Nov. 9, 2009. 
     FIELD OF TECHNOLOGY 
     The present disclosure relates to networking, and more specifically to traffic flow control in Ethernet networks. 
    
    
     BACKGROUND 
       FIG. 1  shows a block diagram of a conventional Ethernet switching system. As shown, the Ethernet system comprises backplane switches  101  and  102 , communicating with each other via a trunk line  103 . The Ethernet system also comprises a plurality of line cards, including line cards  104 ,  105 , and  106 . Each of the line cards includes a switch, such as a switch  1041  in the line card  104 , a switch  1051  in the line card  105 , and a switch  1061  in the line card  106 . Each of the switches communicates with a backplane switch (either of backplane switches  101  or  102 ). As a result, the line cards communicate with each other through the switches  104 ,  105  and  106  and the backplane switches  101  and  102 . 
     In the line card  104 , CPUs  1042  and  1043  communicate with each other via a network interface  1045 , the switch  1041 , and a network interface  1044 . In the line card  105 , CPUs  1052  and  1053  communicate with each other via a network interface  1055 , the switch  1051 , and a network interface  1054 . In the line card  106 , CPUs  1062  and  1063  communicate with each other via a network interface  1065 , the switch  1061 , and a network interface  1064 . A CPU and a network interface may be connected over a bus (e.g. a PCI Express bus), while other lines in the system are Ethernet connections. 
     It should be noted that the network interface functionality within blocks  1044 ,  1045 ,  1054 ,  1055 ,  1064  and  1065  may be implemented in any number of ways, whether as a chip, a portion of a chip, a card, or a portion of a card. 
     An Ethernet switch has information about its own ports, so that the switch can receive a packet and switch it over to the right port by examining the content of the packet and component information inside the switch. 
     A traffic flow may, for example, proceed from the CPU  1063  in the line card  106  to the CPU  1053  in the line card  105  via the switch  1061 , the backplane switches  101  and  102 , and the switch  1051 . Other traffic flow may proceed from the CPU  1052  in the line card  105  to the CPU  1053  in the same line card via the switch  1051 . If these two traffic flows try to exit the same egress port of the switch  1051 , congestion can occur. 
     In the conventional Ethernet system, information passed between the network interface  1054  and the switch  1051  is traffic flow only. There is no information exchanged between the conventional switches indicating that there is congestion on a port or a specific receive queue of the network interface, and that certain packets are going to be dropped by the network interface because of the congestion. If there is congestion, a switch usually would just drop the packets. The problem of recovering the packet drops is then handled by higher level software running on both sides of the network, i.e., the transmitter and receiver, which detect dropped frames and request retransmission. The protocol that is usually used for this purpose is TCP/IP. The only standard way of avoiding drops would be to employ IEEE 802.3x flow control. However, that flow control causes blocking in the network. As a result, the slowest link would degrade the performance of the entire network. 
     Usually, a switch uses several priority queues on the ingress side of a network interface, employing a classification mechanism to decide how to classify packets on the link and which priority queue a packet should go to. The packet is then received by the network interface, which employs an independent classification mechanism in assigning the packets to a certain queue inside the CPU memory. The CPU provides the network interface with resources in the CPU memory. The network interface usually supports several DMA queues that take the packets received from the network, classify them into receiving DMA queues and put them in the CPU memory. Each DMA queue is serviced by the CPU with a certain amount of buffer memory which is managed dynamically by the CPU and the DMA as packets are being received and consumed by the CPU. The CPU allocates CPU time between the queues according to a predetermined policy. For example, queues of control data may have high priority, and thus other priority queues may get congested and their receiving (RX) DMAs will run out of buffer capacity, and will be forced to drop packets that keep coming from the network (i.e. from the switch). The switch does not know what the network interface and the CPU are going to do with the traffic flow from the switch. 
     For example, the switch  1051  has two input traffic flows: the first one is the one from the CPU  1063 , and the second one is the one from the CPU  1052 . As an example, the switch  1051  may send to a destination, e.g., the CPU  1053 , a flow of data comprising 50% of the first traffic flow, and 50% of the second traffic flow under certain circumstances. 
     The destination of packets has an internal queuing mechanism. For example, there are two queues from the network interface  1054  to the CPU  1053 : the first queue for the first traffic flow and the second queue for the second traffic flow. If the network interface  1054  then detects that the first queue is already filled up, the CPU  1053  cannot serve the first queue. The network interface  1054  then drops the next packet to the first queue. 
     In this case, the link between the switch  1051  and the network interface  1054  is used inefficiently because the switch does not know the status of the network interface queue. The switch  1051  continues to send 50% of the first traffic flow, although the network interface  1054  will just drop the packets anyway. At the same time, although the CPU  1053  can serve the second queue, the switch  1051  only sends 50% of the second traffic flow. 
     However, if the switch  1051  had known about the congestion, it could have sent more packets from the CPU  1052 , and fewer packets from the CPU  1063 . In addition, if the switch  1051  had informed the switch  1061  about the congestion, the switch  1061  could have employed a packet discard mechanism to remove the packets from the CPU  1063  at the outset, thus reducing the load on the entire switching system, and allowing traffic flow from the CPU  1052  to pass through with higher bandwidth. 
     However, conventional network interfaces do not communicate with their attached switches about queue status of the network interfaces. In addition, conventional Ethernet switches that are connected via standard Ethernet ports to each other do not communicate congestion information over the Ethernet link. The only such known mechanism is the disadvantageous 802.3x flow control mechanism. The prior solution has been to use a separate link  110  to communicate congestion information. However, that information had no relation to priority queues. 
     Therefore, it would be desirable to provide a method and apparatus for communicating the queue status of a network interface to its attached switch, and for communicating the queue status between switches. 
     SUMMARY OF THE INVENTION 
     One object of the present invention is to provide a method for preventing head of line blocking in an Ethernet system, using Ethernet protocol and media to communicate congestion information. In one embodiment, a network interface detects whether there is traffic flow congestion between the network interface and a data processing unit to which the network interface is connected, such as a CPU on the line card, a CPU connected to the line card, or a peripheral. If yes, the network interface communicates the congestion status to its attached Ethernet switch. The Ethernet switch then stops serving the congested port or queue. 
     Another object of the present invention is to provide a method for reducing a load on an Ethernet system. When a network interface communicates its congestion status to its attached Ethernet switch, the attached Ethernet switch informs a switch from which the traffic flow causing the congestion originates. The originating switch then reduces bandwidth for the traffic flow causing the congestion. 
     Another object of the present invention is to provide an Ethernet network interface, which can detect traffic flow congestion between the network interface and a data processing unit to which the network interface is connected, such as a CPU on the line card, a CPU connected to the line card, or a peripheral, and communicates the congestion status to its attached switch. 
     A further object of the present invention is to provide an Ethernet switch in which, when an Ethernet network interface communicates its congestion status to the Ethernet switch, the Ethernet switch can reduce bandwidth for traffic flow causing the congestion. 
     A further object of the present invention is to provide an Ethernet system, comprising a network interface which can detect traffic flow congestion between the network interface and a data processing unit to which the network interface is connected, such as a CPU on the line card, a CPU connected to the line card, or other peripheral, and communicates the congestion status to its attached switch; and an Ethernet switch which can reduce bandwidth for traffic flow causing the congestion when receiving the congestion status from a network interface. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Embodiments of the present invention are described herein with reference to the accompanying drawings, similar reference numbers being used to indicate functionally similar elements. 
         FIG. 1  shows a block diagram of a conventional Ethernet switching system. 
         FIG. 2  shows a flow chart for method of traffic flow control in an Ethernet system according to an embodiment. 
         FIG. 3  shows a frame compliant with the IEEE 802.3x standard according to an embodiment. 
         FIG. 4  shows a block diagram of a network interface according to an embodiment. 
         FIG. 5  shows a block diagram of an Ethernet switch according to an embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Embodiments of the present invention are described herein with reference to the accompanying drawings, similar reference numbers being used to indicate functionally similar elements. 
       FIG. 2  shows a flow chart for traffic flow control in an Ethernet system according to an embodiment of the present invention. In one embodiment of the present invention, the line card is a server blade, which has one or more CPU subsystems running application software, and communicating with other line cards using Ethernet. It should be understood that the network interface of the present invention is not limited to an adapter between user equipment and the Ethernet, but could be any interface between a packet destination and the Ethernet. 
     At step  201  in  FIG. 2 , the network interface  1054  detects that one or more of its queues, for example, its DMA queues to the CPU memory, start to fill up. At step  202 , the network interface  1054  informs its attached switch, the switch  1051 , about the congestion. 
     In one embodiment, the network interface  1054  communicates to its attached switch the network interface queue status. The network interface  1054  uses IEEE 802.3x compliant packets to reflect its queue status. A frame compliant with the IEEE 802.3x standard is shown in  FIG. 3 . As shown, the 802.3x compliant packet is a 64 byte packet that has a destination MAC address field, a source MAC address field, a field indicating the length and type of the frame, a field for MAC control opcode, a field for MAC control parameters, a filler, and a field for frame check sequence (FCS). 
     IEEE 802.3x defines reserved bits in the filler. In an embodiment of the present invention, the filler is used to send congestion information about priority queue or priority port. For example, the network interface  1054  sends 8 bits to a port of the switch  1051 , where the first bit corresponds to a priority queue 0 and the last bit corresponds to a priority queue 7. Each bit represents status of one queue of the network interface at a moment. A value 0 means “do not send any more” and a value 1 means “continue to send”. In another example, the bits correspond to priority port status. 
     Usually, an 802.3x compliant packet only defines two states, on and off, to control data flow. In one implementation, a timer with a value that indicates how much more data can be sent by a link partner is employed. A typical usage is binary indication of transmission allowance. However, as discussed above, in one embodiment of the present invention, the filler of a 802.3x compliant packet is filled with a bitmap, indicating status of priority queue or priority port. This can be extended to hold one timer per class as well. For example, the filler could contain multiple timers, one per class of traffic. 
     The network interface  1054  sends to the switch  1051  its queue status periodically, so that the traffic flows to these queues continue or stop for a certain period of time, until a new 802.3x packet with an updated bitmap is received. Thus, the 802.3x compliant packet, according to an embodiment of the present invention, does not just inform the switch to send packets or not. Instead, it provides the switch with status of the network interface&#39;s priority queues on receiving, so that the switch can distribute its resource accordingly: reducing packets to congested queues, and increasing packets to other queues. 
     It should be understood that the network interface could inform its attached switch about the congestion in other ways, which the ordinarily skilled artisan will understand. 
     At step  203 , the switch  1051  stops serving the congested queue. The congested queues start to fill up in the switch, and then depending on the switch, could eventually be dropped. 
     In an embodiment, the method ends with step  203 . In another embodiment, to further reduce the load on the Ethernet system, the originating switch of the congested queue could be informed to stop sending traffic flows. To do so, at step  204 , the switch  1051  informs the originating switch of the congested queues, e.g., the switch  1061 , about the congestion. The switch to switch notification could be done over a proprietary line, as shown in  FIG. 1 . The switch to switch notification could also be done over the Ethernet, as described in the concurrently filed application Ser. No. 10/955,893, and entitled Method and Apparatus for Preventing Head of Line Blocking among Ethernet Switches. 
     At step  205 , the originating switch reduces the bandwidth of the traffic flow going to the congested queue. 
     According to yet another embodiment of the invention, at step  206 , the originating switch could also increase the bandwidth of other traffic flows, to make better use of the switch&#39;s available bandwidth. 
       FIG. 4  shows a block diagram of a network interface according to an embodiment of the present invention. As with conventional N1Cs, the network interface  400  comprises a bus interface unit  402 , such as a PCI interface, communicating with a CPU chipset  401 , which communicates with a CPU  409  and a CPU main memory  410 ; a multi-channel transmitting DMA  403 ; a multi-channel receiving DMA  404 ; a packet manipulation module  405 ; a packet classification module  406 ; the Ethernet MAC layer  407 ; and the Ethernet PHY layer  408 . Additionally, the network interface  400 , according to an embodiment of the present invention, further comprises a congestion status detector  421  and a congestion status information generator  422 . The congestion status detector  421  receives signals from the multi-channel receiving DMA  404 , determines whether any queue is congested, and sends the congestion status information to the congestion status information generator  422 . The congestion status information generator  422  generates a frame containing the queue status information, e.g., a 802.3x compliant frame containing a bitmap shown in  FIG. 3 , and sends the frame to the attached switch via the Ethernet MAC layer  407  and the Ethernet PHY layer  408 . The multi-channel receiving DMA  404  knows the status of the main memory per each DMA channel. It should be understood that the congestion status detector  421  could be a part of the multi-channel receiving DMA  404 , and the congestion status information generator  422  could be a part of the Ethernet MAC  407 . 
     It should be understood that obtaining the queue status information from the multi-channel transmitting DMA  403  has a similar effect. In addition, a skilled artisan would appreciate that instead of queue status, the network interface could monitor its port status and communicate the port congestion status to the switch for the traffic flow control via a bitmap in an IEEE 802.3x compliant frame. 
       FIG. 5  shows a block diagram of an Ethernet switch according to an embodiment of the present invention. The switch comprises switch fabric  501 ; an address parse module  502 , a packet buffer module  503 , a management module  504 , a FIFO  505 , and a multiplexer (MUX)  506 , all of which communicate with the switch fabric  501 . In addition, the management module  504  communicates with management data I/O (MDIO), and the address parse module  502  communicates with a MAC address database  507 . The FIFO  505  communicates with the Ethernet port to the backplane switch, and the MUX  506  communicates with two Ethernet ports to end points. 
     The management module  504  could program mapping of the switch queues to the network interface queues. From the 802.3x frame from the network interface, the management module  504  decides the affected switch queues, and reduces bandwidths for these affected queues accordingly. In an embodiment, the management module  504  also could increase bandwidth for other queues. 
     While the invention has been described in detail above with reference to some embodiments, variations within the scope and spirit of the invention will be apparent to those of ordinary skill in the art. Thus, the invention should be considered as limited only by the scope of the appended claims.