Abstract:
Disclosed is a method for manufacturing a semiconductor device, comprising depositing an electrically conductive film on an insulating film formed above a semiconductor substrate and having a recessed portion, polishing the surface of the electrically conductive film constituting a processing surface with an alkaline slurry on a polishing cloth to expose the surface of the insulating film to the outside while leaving the electrically conductive film selectively within the recessed portion of the insulating film, treating the processing surface, in which the surface of the insulating film is exposed to the outside by the polishing treatment with the alkaline slurry, with a deionized water and, then, with an acidic washing solution so as to render the processing surface acidic, and transferring the semiconductor substrate from the position on the polishing cloth into a washing unit while keeping the processing surface acidic.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
       [0001]     This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2004-110411, filed Apr. 2, 2004, the entire contents of which are incorporated herein by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     1. Field of the Invention  
         [0003]     The present invention relates to a method of manufacturing a semiconductor device, particularly, to a CMP (Chemical-Mechanical Planarization) process for forming, for example, a Cu damascene wiring for a system LSI or a high speed LOGIC-LSI.  
         [0004]     2. Description of the Related Art  
         [0005]     A high degree of integration of the elements is critical to the realization of a high speed LSI of the next era. In this connection, the design rule for the damascene wiring that is formed by the CMP process is going to increase in severity to enable a wiring width of 0.07 to 30 μm and film thickness of 100 nm.  
         [0006]     For forming a damascene wiring having a film thickness of 100 nm, a CMP process using a slurry is carried out in general. Where the washing step after the CMP process is insufficient so as to render the finished state of the wiring poor, e.g., where a local abnormality is included in the finished state, the performance of the manufactured semiconductor device is markedly lowered. Also, since it is possible for the wiring to be broken during operation of the semiconductor device, vigorous research is currently being carried out on the washing method of the semiconductor wafer after the CMP process.  
         [0007]     In the case of forming a Cu damascene wiring, it is critical to eliminate, as much as possible, the defects such as Cu corrosion, Cu dissolution, scratches, and the reattachment of dust (e.g., contamination due to the abrasive particles, the materials formed by the polishing treatment, or the materials from the polishing cloth) after the washing process. In recent years, the influence of the defects on the product yield has been clarified in accordance with progress in the miniaturization of the semiconductor device, with the result that the demands for the reduction in defects have been greatly increased. The corrosion generated in a special pattern portion alone and a very small erosion in the tip portion of the wiring have been confirmed by the enhancement in the level of defect evaluation. It has also been clarified that dust and scratches are not negligible factors.  
         [0008]     Under the circumstances, a method for manufacturing a semiconductor device, which permits overcoming the defects pointed out above so as to make it possible to manufacture a semiconductor device of a high reliability, has not yet been developed.  
       BRIEF SUMMARY OF THE INVENTION  
       [0009]     A method for manufacturing a semiconductor device according to one aspect of the present invention comprises depositing an electrically conductive film above an insulating film formed above a semiconductor substrate and having a recessed portion; polishing the surface of the electrically conductive film constituting a processing surface with an alkaline slurry on a polishing cloth to expose the surface of the insulating film to the outside while leaving the electrically conductive film selectively within the recessed portion of the insulating film; treating the processing surface, in which the surface of the insulating film is exposed to the outside by the polishing treatment with the alkaline slurry, with a deionized water and, then, with an acidic washing solution so as to render the processing surface acidic; and transferring the semiconductor substrate from the position on the polishing cloth into a washing unit while keeping the processing surface acidic.  
         [0010]     A method for manufacturing a semiconductor device according to another aspect of the present invention comprises depositing an electrically conductive film above an insulating film formed above a semiconductor substrate and having a recessed portion; polishing the surface of the electrically conductive film constituting a processing surface with an acidic slurry on a polishing cloth so as to make the processing surface acidic and to expose the surface of the insulating film to the outside while leaving the electrically conductive film selectively within the recessed portion of the insulating film; and transferring the semiconductor substrate from the position on the polishing cloth into a washing unit while keeping acidic the processing surface in which the surface of the insulating film is exposed to the outside.  
         [0011]     Further, a method for manufacturing a semiconductor device according to still another aspect of the present invention comprises supplying a liquid onto a polishing cloth under the state that a processing surface formed on a semiconductor substrate is abutted against the polishing cloth so as to treat the processing surface while monitoring a property value on the polishing cloth, the property value being an acid concentration or a pH value; and allowing the semiconductor substrate to be retreated from the position on the polishing cloth into a washing unit upon detection that the property value has been deviated from within a prescribed range set in advance. 
     
    
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING  
       [0012]      FIGS. 1A and 1B  are cross sectional views collectively showing a method of manufacturing a semiconductor device according to one embodiment of the present invention;  
         [0013]      FIG. 2  schematically shows the state of the CMP process;  
         [0014]      FIG. 3  schematically shows the construction of a polishing apparatus used in the manufacturing method of the semiconductor device according to the embodiment of the present invention;  
         [0015]      FIG. 4  is a cross sectional view showing the state of an insulating film after the polishing treatment by the conventional method; and  
         [0016]      FIG. 5  is a cross sectional view showing a process step included in the manufacturing method of a semiconductor device according to another embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0017]     Some embodiments of the present invention will now be described.  
         [0018]     As a result of extensive research on the defects such as the corrosion generated in a special pattern portion alone and a very small erosion generated in the wiring edge, the present inventors have found that these defects are caused by the finishing method or the washing method, not by the CMP process itself. In the case of, for example, a Cu film, the corrosion or the erosion of the wiring edge is not generated in the polishing stage with the conventional alkaline slurry or in the subsequent polishing stage with a deionizid water (DIW) because the Cu film is protected by a protective film formed by a complexing agent within the slurry. However, the corrosion or the erosion in a special pattern portion is generated if the polishing is performed with a DIW after the polishing treatment with an acidic washing solution. As a result of extensive research on the causes of these defects, it has been found that the protective film on the surface of the Cu film is removed by the polishing treatment using an acidic washing solution, and that the defects noted above are generated by the polishing treatment with a DIW after removal of the protective film.  
         [0019]     It has also been found that a DIW is involved in the increases in dust and scratches. To be more specific, during the polishing treatment with a washing solution, dust either on the wafer or the polishing cloth tends to be washed away easily. However, if the polishing treatment is performed with a DIW, a reverse contamination of the semiconductor wafer from the polishing cloth is invited, with the result that the dust tends to remain on the surface of the semiconductor wafer or the polishing cloth. In other words, if a DIW is used for the finish washing treatment, the reverse contamination of the semiconductor wafer from the polishing cloth is generated so as to increase the dust, leading to a secondary increase in scratches. It should be noted that the reverse contamination derived from the DIW is generated on the polishing cloth during the polishing treatment with a DIW after the washing step.  
         [0020]     Under the circumstances, the present inventors have found that, in order to suppress the defects noted above, it is necessary to avoid the polishing with a DIW after exposure of a pure Cu surface to the outside by the polishing with a washing solution. To be more specific, it has been found that, for suppressing the particular defects, it is necessary to make the processing surface acidic after exposure of the Cu surface to the outside by the processing on the polishing cloth. In the manufacturing method of a semiconductor device according to the embodiment of the present invention, the processing surface should not be excessively washed with a DIW, but should be put under an acidic state after completion of the polishing treatment with a washing solution and, in general, before the transfer of the wafer into the washing unit. Also, where the semiconductor wafer is polished with a slurry alone without using a washing solution and, then, transferred into the washing unit, it is necessary for the processing surface after the polishing treatment with the slurry to be put under an acidic state. The processing surface can be kept acidic by maintaining the pH value or the acid concentration of the processing surface after the processing on the polishing cloth within a prescribed range. To be more specific, the processing surface can be kept acidic by allowing the pH value to be smaller than  7 . Also, the processing surface can be kept acidic by allowing the acid concentration to be not lower than 0.05% by weight in the case of using, for example, citric acid as the acid, though the actual acid concentration differs depending on the kind of acid used.  
         [0021]     In the embodiment of the present invention, the processing surface is processed on a polishing cloth by using an acidic processing solution, and the semiconductor substrate after the processing is transferred directly into the washing unit so as to overcome the defects in respect of the corrosion in a special pattern portion and the erosion in the wiring edge. It is possible for the acidic processing solution to be formed of either a slurry or a washing solution. Where the polishing treatment is carried out by using an acidic slurry having a pH value lower than 7, the semiconductor substrate after the polishing treatment can be transferred as it is directly into the washing unit. Alternatively, it is possible to carry out the washing with an acidic washing solution after the polishing treatment with an acidic slurry, followed by transferring the semiconductor substrate into the washing unit. In the case of using an acidic washing solution, it is possible to use an alkaline slurry having a pH value exceeding 7. In this case, the polishing treatment with a DIW is carried out after the polishing treatment with an alkaline slurry, followed by carrying out the washing and polishing treatment with an acidic washing solution. In the case of using the alkaline slurry, it is desirable to carry out the polishing treatment with a DIW in order to shift the processing surface to an acidic side before the semiconductor substrate is transferred into the washing unit. By carrying out the polishing treatment with a DIW after the polishing treatment with the alkaline slurry, the state of the polishing cloth can be once changed into a neutral region so as to make it possible to prevent scratches and the corrosion of the wiring that is caused by the agglomeration of the abrasive particles that is brought about by a rapid change in the pH value. In order to enhance the effect of removing the abrasive particles, it is possible to carry out the polishing treatment with a DIW even in the case of using an acidic slurry as far as the acidic state can be maintained on the processing surface.  
         [0022]     (Embodiment 1)  
         [0023]     A method of forming a Cu damascene wiring will now be exemplified.  FIGS. 1A and 1B  are cross sectional views collectively showing the Cu-CMP process.  
         [0024]     In the first step, an insulating film  11  was deposited to a thickness of 6,000 Å on a semiconductor substrate  10  having an element (not shown) formed thereon, followed by forming a groove  14  as a recessed portion in the insulating film  11 , as shown in  FIG. 1A . The insulating film  11  was formed by using TEOS (tetraethoxy silane).  
         [0025]     In the next step, a TaN film was formed as a liner material  12  on the entire surface of the insulating film  11  by a sputtering method to a thickness of 100 Å, followed by forming a Cu film as a wiring material film  13  to a thickness of 6,000 Å on the liner material  12  by a plating method. Incidentally, the liner material  12  is not limited to the TaN film. For example, it is possible for the liner material  12  to be of a single layer structure formed of Ta, TaN, Ti, or TiN or to be of a laminate structure formed of the films of the materials noted above. This is also the case with the other embodiments of the present invention described herein later.  
         [0026]     Further, the undesired portions of the Cu film  13  and the TaN film  12  are removed by the CMP process so as to form a Cu damascene wiring. To be more specific, a top ring  23  holding a semiconductor substrate  22  was abutted against a turntable  20  having a polishing cloth  21  attached thereto while rotating the turntable  20  at a rotation speed of 100 rpm, as shown in  FIG. 2 . The semiconductor substrate  22  was abutted against the polishing cloth  21  with a polishing load of 300 gf/cm 2 . During the polishing treatment, a slurry used as a processing solution  27  was supplied from a processing solution supply nozzle  25  onto the polishing cloth  21  at a flow rate of 200 cc/min with the rotation speed of the top ring  23  set at 100 rpm. The polishing treatment was carried out for 80 seconds until the undesired portion of the Cu film  13  outside the groove  14  was removed so as to expose the TaN film  12  positioned below the Cu film  13  to the outside by using “CMS 7401/CMS 7452” (trade name, manufactured by JSR Inc.) as the slurry, and “IC 1000” (trade name, manufactured by RODEL Inc.) as the polishing cloth. Incidentally, a water supply nozzle  24  and a dresser  26  are also shown in  FIG. 2 .  
         [0027]     After removal of the undesired portion of the Cu film  13 , the undesired portion of the TaN film  12  was removed by the CMP process so as to expose the surface of the insulating film  11  to the outside, as shown in  FIG. 1B . In this case, the polishing treatment was carried out for 60 seconds under the conditions equal to those for the previous polishing treatment, except that the rotation speed of each of the top ring  23  and the turntable  20  was changed to 50 rpm, that the polishing load was changed into 400 gf/cm 2 , and that “CMS 8301” (trade name, manufactured by JSR Inc.) was used as the slurry. The slurry “CMS 8301” is an alkaline slurry having a pH value of 9.5 and is mixed with a corrosion preventing agent. It is desirable to use an acidic slurry. However, it is possible to use an alkaline slurry if a corrosion preventing agent is added to the slurry.  
         [0028]     After the polishing treatment, a DIW was supplied from the water supply nozzle  24  for carrying out a polishing treatment for 15 seconds in preparation for the shifting of the pH value toward the acidic side, followed by supplying an aqueous solution containing 0.2% by weight of citric acid, said aqueous solution being used as the washing solution, from a washing solution supply nozzle (not shown) so as to carry out the polishing treatment for 30 seconds. The process steps until the polishing treatment with the aqueous solution of citric acid were carried out consecutively on the single turntable  20  shown in  FIG. 2 , followed directly by the next process step such as the roll washing step. Since the aqueous solution of citric acid has a pH value of 3, the roll washing step is carried out with the processing surface kept acidic. It is possible to use an acidic aqueous solution of, for example, citric acid, oxalic acid, maleic acid, or malonic acid as the washing solution.  
         [0029]      FIG. 3  schematically shows the construction of the polishing apparatus used for the manufacturing method of the semiconductor device according to the first embodiment (embodiment 1) of the present invention. As apparent from the drawing, which shows the general construction of the polishing apparatus, the polishing apparatus comprises a CMP section  30 , in which the polishing is carried out in two systems, and a washing section  31  for washing a semiconductor wafer  33  transferred from each of the two systems included in the CMP section  30 . A CMP processing is applied to the semiconductor wafer  33  on a turntable  32  arranged in the CMP section  30  and, then, the semiconductor wafer  33  is held by a polishing unit  34 . In the example described above, the polishing treatment with an aqueous solution of citric acid is applied first to the semiconductor wafer  33  and, then, the semiconductor wafer  33  is transferred under the state that the surface of the semiconductor wafer  33  is held acidic. Incidentally, a dressing unit  35  is also shown in the CMP section  30 .  
         [0030]     In the washing section  31 , a wafer hanger (not shown) of a wafer transfer robot  36  receives the semiconductor wafer  33  from the polishing unit  34  and, then, the semiconductor wafer  33  is transferred into a double-sided roll washing device  37 . The both surfaces of the semiconductor wafer  33  are washed with, for example, water by the double-sided roll washing device  37  and, then, the semiconductor wafer  33  is transferred by the wafer transfer robot  36  into an inverting device  38 . The inverted wafer is washed and, then, dried in a pencil washing device  39 . Finally, the semiconductor wafer  33  is housed in a cassette  40 .  
         [0031]     In the first embodiment of the present invention, the roll washing is applied to the semiconductor wafer  33  under the state that the processing surface of the semiconductor wafer  33  is held acidic. The defects such as the corrosion of Cu and the erosion of the Cu wiring edge, which were not found on the processing surface of the semiconductor wafer before the roll washing treatment, were not found even after the roll washing treatment. Also, the degree of the scratches on the Cu film was found to be low, i.e., as low as 10 scratches/cm 2 . Further, as a result of observation with a defect evaluating apparatus, the dust degree was also found to be low, i.e., as low as 60 dust particles/cm 2 .  
         [0032]     For comparison, the polishing treatment was carried out by the conventional method. To be more specific, the process steps up to the polishing treatment with an aqueous solution of citric acid were carried out as described above. In addition, a polishing treatment with a DIW was carried out for 15 seconds after the polishing treatment with the aqueous solution of citric acid. As shown in  FIG. 4 , an erosion  50  in the Cu wiring edge was generated in the insulating film  11  after the polishing treatment with the DIW. The erosion  50  was found to be very deep, i.e., the maximum depth was found to be 500 Å. Also, the scratch degree on the Cu film was found to be high, i.e., as high as 98 scratches/cm 2 , and the dust degree was also found to be high, i.e., as high as 170 dust particles/cm 2 . In conclusion, it has been confirmed that the defects are increased by the polishing treatment with a DIW.  
         [0033]     (Embodiment 2)  
         [0034]     A film structure equal to that shown in  FIG. 1A  was formed on the semiconductor substrate  10  as in the first embodiment (embodiment 1), except that the insulating film  11  shown in  FIG. 1A  was changed into a laminate structure comprising a first insulating film  51  formed of LKD 5109 (trade name, manufactured by JSR Inc.) and having a thickness of 3,000 Å and a second insulating film  52  formed of LKD 27 (trade name, manufactured by JSR Inc.) and having a thickness of 1,500 Å, and that the liner material  12  shown in  FIG. 1A  was changed into a Ta/TaN film  53 , as shown in  FIG. 5 . The material “LKD 27” used for forming the second insulating film  52  is a hydrophobic material.  
         [0035]     Further, the undesired portion of the Cu film  13  was removed by applying a CMP process (polishing treatment) under the conditions equal to those for the first embodiment so as to expose the surface of the Ta/TaN film  53  to the outside, followed by further applying a CMP process under the conditions equal to those described previously so as to expose the surface of the second insulating film  52  to the outside.  
         [0036]     After the polishing treatment, an additional polishing treatment was carried out for 15 seconds by supplying a DIW from the water supply nozzle  24 . Further, a washing solution was supplied from the washing solution supply nozzle (not shown) so as to carry out the polishing treatment for 30 seconds. An aqueous solution containing 1% by weight of citric acid, which was prepared by diluting CITREX (trade name, manufactured by Wako Junyaku Kogyo K. K.) with a DIW, was used as the washing solution. The processing after the polishing of the Ta/TaN film  53  with a slurry was carried out while monitoring the citric acid concentration on the polishing cloth. To be more specific, the acidity was measured by using a near infrared spectrometer so as to monitor the citric acid concentration on the polishing cloth.  
         [0037]     When the washing solution supplied onto the processing surface was switched to a DIW, the citric acid concentration on the polishing cloth was found to be lower than 0.1% by weight. Therefore, the semiconductor substrate was immediately retreated from the position on the polishing cloth into a washing unit.  
         [0038]     It is possible to control the polishing apparatus such that the operations described above are interlocked. To be more specific, it is possible to permit the polishing apparatus body to be interlocked when the citric acid concentration detected by a sensor has been lowered below a prescribed level, e.g., 0.1% by weight, set in advance. The washing and polishing treatments are carried out while monitoring the citric acid concentration on the polishing cloth by using a sensor. When the citric acid concentration has deviated from a prescribed range, the polishing apparatus body is interlocked upon receipt of an electronic signal from the sensor. As a result, the top ring is guided immediately to the waiting position so as to transfer the semiconductor substrate into the washing unit.  
         [0039]     If the citric acid concentration is slightly lower than 0.1% by weight, the acidic state can be maintained sufficiently. Such being the situation, the washing treatment is carried out in the washing unit under the state that the acidic state is kept at the processing surface in the second embodiment (embodiment 2) of the present invention, too. The surface of the semiconductor substrate immediately after the retreat from the position on the polishing cloth was observed, with the result that no defect was recognized as in embodiment 1. In other words, it was possible to avoid the Cu abnormality.  
         [0040]     The prescribed value of the acid concentration is a value that can be determined in accordance with the lowest acid concentration that permits the processing surface abutting against the polishing cloth to assume an acidic state. It follows that the prescribed value of the acid concentration can be determined appropriately in accordance with the kind of the acid used. In general, the acidic state can be formed under an acid concentration of 0.05% by weight. However, it is desirable for the prescribed value of the acid concentration to be set at about 0.1% by weight in order to maintain an acidic state of the processing surface without fail.  
         [0041]     For comparison, a polishing treatment with a DIW was carried out for 15 seconds after the washing and polishing treatment with the washing solution. The erosion as shown in  FIG. 4  was generated on the processing surface after the polishing treatment with the DIW.  
         [0042]     In general, a reverse contamination tends to be accelerated by a DIW when it comes to the insulating film formed of a hydrophobic material. The known hydrophobic insulating materials include, for example, SiLK (trade name, manufactured by Dow Chemical, Co., Ltd.), Coral (trade name, manufactured by Novellus Systems, Inc.), and BD (black diamond) (trade name, manufactured by Applied Materials Inc.) in addition to LKD 27 referred to above. As described above, it is possible to avoid the use of a DIW by allowing the acid concentration on the polishing cloth to fall within a prescribed range so as to make it possible to suppress the reverse contamination of the insulating film.  
         [0043]     (Embodiment 3)  
         [0044]     As shown in  FIG. 5 , the Ta/TaN film  53  was exposed to the outside as in the second embodiment (embodiment 2) described above. The slurry for polishing the Ta/TaN film  53  was prepared by adding 5% by weight of colloidal silica used as abrasive particles, 0.1% by weight of BTA (benzotriazole) used as a corrosion preventing agent, and 0.1% by weight of nitric acid used as a pH adjusting agent to a DIW. The slurry thus prepared was found to exhibit a pH value of 1.5. The undesired portion of the Ta/TaN film  53  was removed under the conditions equal to those for embodiment 1, except that used was the slurry prepared as described above. In the third embodiment (embodiment 3) of the present invention, the polishing treatment of the Ta/TaN film  53  was carried out while monitoring the pH value of the processing surface by using a sensor having a high resolution in the vicinity of the pH value of 2.5. To be more specific, the ion concentration was measured by using a conductivity meter so as to monitor the pH value on the polishing cloth.  
         [0045]     After the polishing treatment with the slurry, a DIW was supplied from the water supply nozzle  24 . As a result, the pH value of the processing surface instantly exceeded 2.5 and, thus, the semiconductor substrate was immediately retreated from the position on the polishing cloth into the washing unit.  
         [0046]     It is possible to control the polishing apparatus such that the operations described above are interlocked. To be more specific, the polishing apparatus body is interlocked when the pH value detected by the sensor has exceeded a prescribed value, e.g., 2.5. The polishing treatment with a DIW is carried out while monitoring the pH value on the polishing cloth by using a sensor. When the monitored pH value has exceeded the prescribed value, the polishing apparatus body receives an electric signal from the sensor so as to be interlocked. Then, the top ring is immediately guided to the waiting position so as to transfer the semiconductor substrate to the washing unit.  
         [0047]     Since an acidic state is formed if the pH value is not larger than about 2.5, the washing is carried out in the washing unit under the state that the processing surface is put under the acidic state in the third embodiment (embodiment 3) of the present invention, too. The processing surface before the roll washing stage was observed, with the result that no defect was observed as in embodiment 1, supporting that it was possible to avoid the Cu abnormality.  
         [0048]     The prescribed pH value is the largest pH value that permits the processing surface abutting against the polishing cloth to be put under the acidic state. It is reasonable to state that an acidic state is formed, if the pH value is less than 7. However, it is desirable for the prescribed pH value to be low, i.e., not larger than about 3, in order to maintain without fail the acidic state of the processing surface.  
         [0049]     For comparison, a polishing treatment was carried out on the polishing cloth as above, except that a DIW was supplied until the pH value on the processing surface exceeded 7.0. In this case, the erosion as shown in  FIG. 4  was generated on the polishing surface after the polishing treatment with the DIW. In other words, it has been confirmed that a defect is generated even if the processing surface is polished by using an acidic slurry, if the polishing treatment is carried out with a DIW in the subsequent step until the processing surface is rendered neutral.  
         [0050]     Incidentally, it is possible to monitor the acid concentration as in the second embodiment (embodiment 2) in supplying a DIW after the polishing treatment with an acidic slurry. Alternatively, it is also possible to monitor the pH value in supplying a DIW after the washing and polishing treatment with an acidic washing solution. The combination between the kind of the acidic processing solution and the property value to be monitored is not particularly limited, and it is possible to employ a desired combination appropriately.  
         [0051]     The description given above is directed to the formation of a Cu damascene wiring. However, the wiring material is not limited to Cu. It is possible to avoid abnormalities after the polishing treatment by transferring the semiconductor substrate into the washing unit under an acidic state even in the case of using Al or W as the wiring material.  
         [0052]     As described above, the embodiment of the present invention provides a method of manufacturing a semiconductor device that permits avoiding the defect generation so as to enhance the reliability of the semiconductor device.  
         [0053]     Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.