Abstract:
A single ATM traffic stream is carried over a plurality of lower bandwidth media, such as T- 1  or E- 1  interfaces, using inverse multiplexing assisted by a prepended byte at the beginning of each ATM cell, the byte containing a key to permit recovery of the proper order of ATM cells.

Description:
CROSS REFERENCE TO RELATED APPLICATION 
     This application is a continuation-in-part of U.S. patent application Ser. No. 09/151,139 filed Sep. 10, 1998, and entitled “Method for Inverse Multiplexing of ATM Using Sample Prepends.” 
    
    
     TECHNICAL FIELD OF THE INVENTION 
     This invention relates to digital communications, and in particular to channelized digital data communications over digital loop carrier wired networks. The invention has particular application in distributed digital switching systems for high-speed digital communications. 
     BACKGROUND OF THE INVENTION 
     Asynchronous Transfer Mode (ATM) based communication is a high-speed packet-based switched communication technique wherein “cells” (packets) are communicated between a source node and a target node through one or more switches. ATM benefits from high-bandwidth transport media. T 1  time division multiplexed (TDM) transmission formats are widely deployed in North America and correspondingly E 1  is used in Europe for the transport of multiplexed voice channels and other digital communication. A T 1  signal consists of 24 DS- 0  channels transported with an eight-bit sample every frame period, with the frame repeating each 125 μs to yield an overall bit rate per DS- 0  channel of 64,000 b/s. Higher bandwidth formats are known and used but are much more expensive and less available. DS- 3  channels have a reported rate capacity of about 45 Mb/s. 
     It is desirable to have a single ATM stream with a bandwidth in excess of the T 1  transmission format (1.544 Mb/s) but less than is available over the much more expensive DS- 3  channel transmission format (45 Mb/s). 
     ATM cells can be communicated over T 1  transport media by dividing up the ATM stream and using inverse multiplexing techniques. In order to do so it is necessary to reconstruct the cell order. The ATM Forum has adopted an IMA standard for inverse multiplexing of ATM which relies on a stream of control signalling cells and more specifically the existing T 1  UNI standard to support IMA. An intricate payload block mapping technique is used to reconstruct cell order. This results in considerable cell overhead and is difficult and expensive to implement. 
     Those of ordinary skill in the art should be aware of the background information found in the following typical publications: 
     “Synchronous Optical Network (SONET) Transport Domains: Common Generic Criteria,” Bellcore GR-253-CORE, Issue 2, December 1995. 
     “Functional Architecture of Transport Networks Based on ATM,” ITU-T Recommendation I. 326, draft revision June, 1997. 
     “Voice and Telephony over ATM to the Desktop Specification,” ATM Forum, AF-VTOA-0083.000, May 1997. 
     “Inverse Multiplexing for ATM (IMA) Specification,” ATM Forum, AF-PHY-0086.000, April 1997. 
     What is needed is a mechanism to optimize usage of available resources, such as T 1  resources, and to support ATM data streams with greater flexibility. 
     SUMMARY OF THE INVENTION 
     According to the invention, in a digital multi-path communication system employing asynchronous communication, a single byte prepended to each cell or unit of telecommunication information is used as a key for reconstructing information as required for maintaining data order and integrity. Specifically, a single ATM traffic stream is carried over a plurality of lower bandwidth media and interfaces between an original source and an ultimate destination, such as via multiple T- 1  or E- 1  interfaces, using inverse multiplexing assisted by a prepended byte at the beginning of each ATM cell, the prepended byte being simply a count used as the key for recovering proper order of the ATM cells. 
     The invention will be better understood by reference to the following detailed description in connection with the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     For a more complete understanding of the present invention, and for further features and advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, where like reference numerals represent like parts, in which: 
     FIG. 1 is a block diagram of a single direction of an IMA transport mechanism according to the invention; 
     FIG. 2 is a block diagram of a recirculating buffer in a first state according to the invention; and 
     FIG. 3 is a block diagram of a recirculating buffer in a second state according to the invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring to FIG. 1, there is shown block diagram of a single direction of an IMA transport mechanism  10  according to the invention. An ATM/T 1  cluster interface  12  is provided for receiving an ATM data stream on a broadband ATM transport line  14  or from an ATM switch. The T 1  cluster includes mechanisms for receiving and inverse multiplexing ATM cells among a plurality of lower bandwidth links, such as T 1  and/or HDSL-2 links  16 - 1 ,  16 - 2 ,  16 -N, which in turn are connected to a complementary T 1 /ATM cluster interface  18 . The T 1 /ATM cluster interface  18  is an inverse multiplexer which reorders the cells of a single cluster in a data stream received over the links  16  into the original cell order and applies the restored data stream to an output broadband transport line  15  or sends it to an ATM switch. According to the invention, the reordering is effected using a prepend byte attached to each cell and thus communicated as part of the inband data stream, the prepend byte containing a simple cell count to identify the order of the cell in the cell stream. Still further according to the invention, T 1  links and HDSL-2 links can be randomly mixed to communicate data. The cluster interface  18  includes a mechanism for capturing and buffering ATM cells and examining at least minimal control information associated with each ATM cell. Many different implementations are suitable, the details of which are within the capability of those of ordinary skill. 
     The ordering operation according to the invention, which is performed by mechanisms within the cluster interface  18 , is based on handling of a received count value. How the count value is detected is outside the scope of this disclosure. The count value as processed in the cluster interface  18  is a count ranging from 0 to a value C range , where C range  is pre-programmable for each ATM stream. That value indicates the maximum cell count allowable, which if exceeded restarts at zero. While the count value is typically less than one byte in length, multiple bytes may also be used to hold the value. 
     At the cluster interface  18 , a queue  20  is provided for collecting received cells. When the cells are received, the count value of each cell, herein C, determines where it should be written in the queue  20  associated with the cell group or IMA stream. As used herein C, H, T, and M are both labels and values associated with the labels at positions in a queue  20 . The queue  20  is typically contained in a circular buffer with storage bins sufficiently large to contain a cell, the buffer being of size C range +1. 
     FIG. 2 illustrates such a buffer  20  with an associated router  21 . The location of the “head” H of the queue is shown, the head being that cell with the highest count in its prepend yet received. The tail T is the location in the queue  20  of the lowest count cell which has not yet been received. A margin space M is of great importance. M is the margin space ahead of the head. Because the buffer is circular, some mechanism is required for determining whether a newly arrived cell is “younger” or “older” than the head H. If the count value C of the prepend of the newly-arrived cell is ahead of head H and behind tail T, then the cell must be younger than H. In this case, the H value must be reset to ahead of the T value and behind the H value, then the cell must be older than the head H, in which case no change is made to the H value. 
     The determination is made difficult if the value H is not far behind the tail (see FIG.  3 ), and if the count C is slightly ahead of the tail value T. If the circular buffer is sized correctly, the H value can only approach the T value when the T value is the count of a cell that has been lost in transmission. To remain well clear of the H value, the T value will normally increase as cells arrive. When the H value is not far behind the T value, a newly arrived cell of count C that is slightly ahead of the T value might not be older than the H value. It may in fact be younger than the head, but be intruding into the buffer region resulting from the delayed tail. The margin space M, represented by the M value, is used in this instance to determine whether the current cell count C is older or younger than the head H. The value M is defined as being the range in which it is possible for a count C to surpass H. A test is applied cyclically to determine to which cell group a cell belongs. Should count value C fall between the values H and H+M, it is considered to be younger than the head, regardless of the value T of the tail. 
     The tail T must be advanced when the head H has come sufficiently close to it for the tail T to fall within the range values between H and H+M. FIG. 3 illustrates the case when the margin M has moved past T, thus overlapping the T position. 
     The following algorithm may be used to support IMA service according to the invention: 
     A. Whenever a cell arrives it is written into the circular queue dedicated to the cell stream to which it belongs. The exact queue location to which each cell is written is directly determined by its count (C) (the VPI/VCI value of the cell is not considered). The count prepend is discarded when the write operation takes place. Both H values and T values may be adjusted, based on the conditions: 
     1. if (C≦H) then set C comp =C+C range +1, otherwise set C comp =C 
     2. if (T≦H) then set T comp =T+C range +1, otherwise set T comp =T 
     3. if (C comp &lt;T comp ) then set H=C 
     4. if (C comp ≧T comp ) and (C comp ≦H+M) then: 
     5. set H=C 
     6. set T=C+1 
     7. if (T&gt;C range ) then set T=0. 
     In reference to statements  1  and  2 , since the count “rolls over” (the buffer is circular), both the C and T values must be adjusted to keep them “ahead” of H. This allows the comparisons required in the algorithm to be easily made. 
     B. During queue read opportunities the following is performed: 
     1. if (T≦H) then set T comp =T+C range +1, otherwise set T comp =T 
     2. if (T=H) then 
     3. output cell at location T (valid or otherwise) and then invalidate queue location without incrementing T 
     4. else if (cell at location T is valid) OR (T comp ≦H+M) then: 
     5. output the cell at location T (valid or otherwise) and then invalidate queue location 
     6. set T=T+1 
     7. if (T&gt;C range ) then set T=0. 
     The minimum amount of buffer space required to store the queue of cells, Q, between H and T, according to the invention, is based on the need to accommodate the maximum number of cells that can arrive during the longest delay that can be expected to be experienced by a receiving cluster interface. It is possible to calculate this number exactly. In addition, margin size is set to be at least as large as the largest amount that the C value can exceed the H value. A worst-case estimate of this value may be obtained by determining how many cells can be in transit simultaneously over all but the fastest interface. The value of C range +1, where C range =2 b −1, where b an integer must be greater than or equal to the queue size Q plus Margin M. Some excess padding will result from quantization of these values if the buffering is stored in a memory with a size based on the power of 2, so allocation of the excess between Q and M is appropriate. It is preferable to pad in favor of M in order to minimize the delay associated with allowing T to be forced to move past a lost cell location and to minimize the chance that a newly arriving cell will overwrite the end of the queue after T has been forced to move past a lost cell location. Hence M′ is set to C range +1−Q′ where M′ is a padded value for M. 
     Although the present invention has been described with several embodiments, a myriad of changes, variations, alterations, transformations, and modifications may be suggested to one skilled in the art, and it is intended that the present invention encompass such changes, variations, alterations, transformations, and modifications as fall within the scope of the appended claims.