Abstract:
A switch circuit and method for converting a hard switch into a soft switch. In one example, the circuit includes a first switch having a first node and a second node, and a switch control circuit coupled in parallel with the first switch between the first and second nodes. The switch control circuit includes a series resonant circuit including a capacitor and an inductor coupled together in series, a second switch coupled in parallel with the series resonant circuit, a third switch coupled in series between the first node and the series resonant circuit, and a first diode coupled between the series resonant circuit and the second node, an negative terminal of the first diode being coupled to the second node.

Description:
BACKGROUND 
       [0001]    1. Field of Invention 
         [0002]    The present invention is in the field of electronic circuits and, more particularly, is directed to a switch circuit and method of operating same. 
         [0003]    2. Discussion of Related Art 
         [0004]    When a switch makes or breaks a circuit connecting a voltage source to a load, there is power loss that occurs in the switch during the transition.  FIG. 1  illustrates a basic circuit diagram of a voltage source  100  connected to a load  110  via a switch  120  and diode  130 . Those skilled in the art will appreciate that although the diode  130  is illustrated separate from the switch  120 , the diode  130  may be integrated with and a part of the switch  120 . When the switch  120  is opened or turned off (from the closed/on position), during the transition period from on to off, the current in the switch falls, and the voltage across the switch rises, as shown in  FIG. 2A .  FIG. 2A  illustrates a graph of the current (trace  210 ) and voltage (trace  220 ) in the switch (with units amps and volts, respectively, on the vertical axis) as a function of time (in microseconds on the horizontal axis). During the on-off transition, there is a period during which both current and voltage are present in the switch, referred to as the period of overlap, as can be seen in  FIG. 2A . During this period of overlap, power loss in the switch  120  can be observed, as shown in  FIG. 2B . In the illustrated example, for a voltage source operating at approximately 100 Volts (V) and 10 Amps (A), as shown in  FIG. 2A , the power loss in the switch  120  is approximately 250 Watts (W), as shown in  FIG. 2B . A similar loss is experienced during turn-on of the switch  120 , as illustrated in  FIG. 2C , during the period of overlap illustrated in  FIG. 2D . 
         [0005]    This problem may be even more pronounced in the case where the switch  120  connects the voltage source  100  to the load  110  via a current source  140 , as shown in  FIG. 3 . This is the case in many power electronics applications.  FIG. 4A  illustrates a graph of switch current (trace  410 ) and voltage (trace  420 ) as a function of time for the circuit of  FIG. 3 . During the turn-off transition, the current  410  in the switch  120  falls, and the voltage  420  across the switch  120  rises, as shown in  FIG. 4A . Power loss is experienced in the switch  120  during the period of overlap when current and voltage are both present in the switch, as shown in  FIG. 4B . As can be seen from a comparison of  FIGS. 2B and 4B , the power loss is greater (about 1 kilowatt (kW) versus 250 W) for the circuit of  FIG. 3 . During turn-on, the voltage  420  across the switch drops and the current  410  rises, as shown in  FIG. 4C , and a similar power loss is experienced during the transition, as shown in  FIG. 4D . 
       SUMMARY OF INVENTION 
       [0006]    Aspects and embodiments are directed to a switching method and apparatus that may significantly reduce the losses associated with conventional switches and may be applied to a wide variety of switching topologies. 
         [0007]    According to one embodiment, a switch circuit comprises a first switch having a first node and a second node, and a switch control circuit coupled in parallel with the first switch between the first and second nodes. The switch control circuit comprises a series resonant circuit including a capacitor and an inductor coupled together in series, a second switch coupled in parallel with the series resonant circuit, a third switch coupled in series between the first node and the series resonant circuit, and a first diode coupled between the series resonant circuit and the second node, a negative terminal of the first diode being coupled to the second node. 
         [0008]    In one example, the switch circuit further comprises a second diode coupled between the second switch and a junction point of the series resonant circuit and the first diode. In another example, the switch circuit further comprises a controller coupled to each of the first, second and third switches and configured to provide control signals to turn the first, second and third switches on and off. In one example, prior to turn on or turn off of the first switch, the controller is configured to control the third switch to reverse a polarity of a voltage across the capacitor. The controller may be further configured to turn on the second switch, after the polarity of the voltage across the capacitor has been reversed, to discharge the capacitor. The controller may be further configured to turn the first switch on or off at approximately at zero-crossing point of the voltage across the capacitor. 
         [0009]    Another embodiment is directed to a method of operating a control circuit to actuate a switch, the control circuit comprising a series resonant circuit including a capacitor and an inductor, a first auxiliary switch coupled between a first node of the switch and an input of the series resonant circuit, a diode coupled between an output of the series resonant circuit and a second node of the switch, and a second auxiliary switch coupled in parallel with the series resonant circuit. The method comprises turning on the second auxiliary switch, turning off the second auxiliary switch after a polarity of a voltage across the capacitor has been reversed, turning on the first auxiliary switch to discharge the capacitor, and actuating the switch at approximately a zero-crossing point of the voltage across the capacitor. 
         [0010]    In one example, the method further comprises turning off the first auxiliary switch after turning on the switch. In one example, wherein a time period between turning on the second auxiliary switch and turning off the second auxiliary switch is at least π√{square root over (LC)}, wherein L is a value of an inductance of the inductor of the series resonant circuit and C is a value of a capacitance of the capacitor of the series resonant circuit. 
         [0011]    According to another embodiment, a method of operating a switch comprises reducing a voltage across the switch to approximately zero responsive to an instruction to turn on the switch, closing the switch when the voltage across the switch is approximately zero, reducing a current through the switch to approximately zero responsive to an instruction to turn off the switch, and opening the switch when the current is approximately zero. In one example, of the method, reducing the voltage across the switch includes generating a resonant current in a resonant circuit coupled in parallel with the switch. In another example, reducing the current through the switch includes generating a resonant current in a resonant circuit coupled in parallel with the switch. 
         [0012]    Still other aspects, embodiments, and advantages of these exemplary aspects and embodiments, are discussed in detail below. Moreover, it is to be understood that both the foregoing information and the following detailed description are merely illustrative examples of various aspects and embodiments, and are intended to provide an overview or framework for understanding the nature and character of the claimed aspects and embodiments. Any embodiment disclosed herein may be combined with any other embodiment in any manner consistent with at least one of the objects, aims, and needs disclosed herein, and references to “an embodiment,” “some embodiments,” “an alternate embodiment,” “various embodiments,” “one embodiment” or the like are not necessarily mutually exclusive and are intended to indicate that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment. The appearances of such terms herein are not necessarily all referring to the same embodiment. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0013]    Various aspects of at least one embodiment are discussed below with reference to the accompanying figures, which are not intended to be drawn to scale. The figures are included to provide illustration and a further understanding of the various aspects and embodiments, and are incorporated in and constitute a part of this specification, but are not intended as a definition of the limits of the invention. Where technical features in the figures, detailed description or any claim are followed by references signs, the reference signs have been included for the sole purpose of increasing the intelligibility of the figures, detailed description, and/or claims. Accordingly, neither the reference signs nor their absence are intended to have any limiting effect on the scope of any claim elements. In the figures, each identical or nearly identical component that is illustrated in various figures is represented by a like numeral. For purposes of clarity, not every component may be labeled in every figure. In the figures: 
           [0014]      FIG. 1  is a diagram of a conventional switching topology; 
           [0015]      FIG. 2A  is a graph of switch current and switch voltage (in Amps and Volts, respectively on the vertical axis) as a function of time (in microseconds along the horizontal axis) for the circuit of  FIG. 1  during a turn-off transition of the switch; 
           [0016]      FIG. 2B  is a graph of power loss in the switch (in Watts on the vertical axis) as a function of time (in microseconds along the horizontal axis), corresponding to the graph of  FIG. 2A ; 
           [0017]      FIG. 2C  is a graph of power loss in the switch (in Watts on the vertical axis) as a function of time (in microseconds along the horizontal axis), for the circuit of  FIG. 1  during a turn-on transition of the switch; 
           [0018]      FIG. 2D  is a corresponding graph of switch current and switch voltage (in Amps and Volts, respectively on the vertical axis) as a function of time (in microseconds along the horizontal axis) for the turn-on transition shown in  FIG. 2C ; 
           [0019]      FIG. 3  is a diagram of another conventional switching topology; 
           [0020]      FIG. 4A  is a graph of switch current and switch voltage (in Amps and Volts, respectively on the vertical axis) as a function of time (in microseconds along the horizontal axis) for the circuit of  FIG. 3  during a turn-off transition of the switch; 
           [0021]      FIG. 4B  is a graph of power loss in the switch (in Watts on the vertical axis) as a function of time (in microseconds along the horizontal axis), corresponding to the graph of  FIG. 4A ; 
           [0022]      FIG. 4C  is a graph of switch current and switch voltage (in Amps and Volts, respectively on the vertical axis) as a function of time (in microseconds along the horizontal axis) for the circuit of  FIG. 3  during a turn-on transition of the switch; 
           [0023]      FIG. 4D  is a graph of power loss in the switch (in Watts on the vertical axis) as a function of time (in microseconds along the horizontal axis), corresponding to the graph of  FIG. 4C ; 
           [0024]      FIG. 5  is a schematic diagram of one example of system including a soft switching topology according to aspects of the invention; 
           [0025]      FIG. 6  is a timing diagram for one example of a soft switching technique according to aspects of the invention; 
           [0026]      FIG. 7  is a flow diagram of one example of a method of soft switching for a turn-on transition, according to aspects of the invention; 
           [0027]      FIG. 8A  is a schematic circuit diagram showing the switching topology of  FIG. 5  in a first state during a soft switching procedure according to aspects of the invention; 
           [0028]      FIG. 8B  is a schematic circuit diagram showing the switching topology of  FIG. 5  in a second state during a soft switching procedure according to aspects of the invention; 
           [0029]      FIG. 8C  is a schematic circuit diagram showing the switching topology of  FIG. 5  in a third state during a soft switching procedure according to aspects of the invention; 
           [0030]      FIG. 8D  is a schematic circuit diagram showing the switching topology of  FIG. 5  in a fourth state during a soft switching procedure according to aspects of the invention; 
           [0031]      FIG. 8E  is a schematic circuit diagram showing the circuit of  FIG. 5  in a fifth state during a soft switching procedure according to aspects of the invention; 
           [0032]      FIG. 8F  is a schematic circuit diagram showing the circuit of  FIG. 5  in a steady state at and after completion of a turn-on transition of the switch and prior to a turn-off transition of the switch; 
           [0033]      FIG. 9A  is a timing diagram illustrating an example of power loss in the switches of the circuit of  FIG. 5  during a turn-on transition of switch S 1 , according to aspects of the invention; 
           [0034]      FIG. 9B  is a timing diagram illustrating an example of the voltages across the switches S 1  and S 2  and diode D 3  in the circuit of  FIG. 5  during a turn-on transition of switch S 1 , according to aspects of the invention; 
           [0035]      FIG. 9C  is a timing diagram illustrating an example of capacitor voltage as a function of time for the circuit of  FIG. 5  and method of  FIG. 7 , according to aspects of the invention; 
           [0036]      FIG. 9D  is a timing diagram illustrating an example of currents in the circuit of  FIG. 5  during a turn-on transition of switch S 1 , according to aspects of the invention; 
           [0037]      FIG. 10  is a screen shot of a measurement device illustrating example measured signals in a circuit such as that illustrated in  FIG. 5 , according to aspects of the invention; 
           [0038]      FIG. 11A  is a graph of current and switch voltage (in Amps and Volts, respectively on the vertical axis) in switch S 1  as a function of time (in microseconds along the horizontal axis) for the circuit of  FIG. 5  during a turn-on transition of the switch S 1 ; 
           [0039]      FIG. 11B  is a graph of power loss in the switch S 1  (in Watts on the vertical axis) as a function of time (in microseconds along the horizontal axis), corresponding to the graph of  FIG. 11A ; 
           [0040]      FIG. 12  is a flow diagram of one example of a method of soft switching for a turn-off transition, according to aspects of the invention; 
           [0041]      FIG. 13A  is a schematic circuit diagram showing the switching circuit of  FIG. 5  in a first state during a soft switching procedure for a turn-off transition, according to aspects of the invention; 
           [0042]      FIG. 13B  is a schematic circuit diagram showing the switching topology of  FIG. 5  in a second state during the soft switching procedure for a turn-off transition, according to aspects of the invention; 
           [0043]      FIG. 13C  is a schematic circuit diagram showing the switching topology of  FIG. 5  in a third state during the soft switching procedure for a turn-off transition, according to aspects of the invention; 
           [0044]      FIG. 13D  is a schematic circuit diagram showing the switching topology of  FIG. 5  in a fourth state during a soft switching procedure for the turn-off transition, according to aspects of the invention; 
           [0045]      FIG. 14A  is a timing diagram illustrating an example of capacitor voltage as a function of time for the circuit of  FIG. 5  and method of  FIG. 12 , according to aspects of the invention; 
           [0046]      FIG. 14B  is a timing diagram illustrating an example of currents in the circuit of  FIG. 5  during a turn-off transition of switch S 1 , according to aspects of the invention; 
           [0047]      FIG. 14C  is a timing diagram illustrating an example of power loss in the switches of the circuit of  FIG. 5  during a turn-off transition of switch S 1 , according to aspects of the invention; 
           [0048]      FIG. 15A  is a graph of current and switch voltage (in Amps and Volts, respectively on the vertical axis) in switch S 1  as a function of time (in microseconds along the horizontal axis) for the circuit of  FIG. 5  during a turn-off transition of the switch S 1 ; 
           [0049]      FIG. 15B  is a graph of power loss in the switch S 1  (in Watts on the vertical axis) as a function of time (in microseconds along the horizontal axis), corresponding to the graph of  FIG. 15A ; 
           [0050]      FIG. 16  is a screen shot of a measurement device illustrating example measured signals in a circuit such as that illustrated in  FIG. 5 , according to aspects of the invention; 
           [0051]      FIG. 17  is a screen shot of a measurement device illustrating example measured signals in a circuit such as that illustrated in  FIG. 5 , according to aspects of the invention; and 
           [0052]      FIG. 18  is a screen shot of a measurement device illustrating example measured signals in a circuit such as that illustrated in  FIG. 5 , according to aspects of the invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0053]    Aspects and embodiments are directed to a switching method and apparatus that may significantly reduce the switching losses experienced during turn-on and turn-off transitions of a switch. The switching topologies shown in  FIGS. 1 and 3  are referred to as “hard” switches because there is significant overlapping current and voltage in the switch during the turn-on/turn-off transitions, as discussed above. Aspects and embodiments are directed to an apparatus that may be used to convert any hard switch topology into a “soft” switch in which there is little or no overlapping current and voltage, and which experiences greatly reduced switching losses. Embodiments of the technique discussed herein are universal and may be applied to a wide variety of switch topologies. Reducing switching losses may provide a number of benefits, including improving the switch efficiency and reducing or eliminating requirements for a heat sink on the switch. These benefits may be particularly advantageous in power converter applications and aerospace applications, where size, weight and efficiency may be critical design parameters. 
         [0054]    It is to be appreciated that embodiments of the methods and apparatus discussed herein are not limited in application to the details of construction and the arrangement of components set forth in the following description or illustrated in the accompanying figures. The methods and apparatus are capable of implementation in other embodiments and of being practiced or of being carried out in various ways. Examples of specific implementations are provided herein for illustrative purposes only and are not intended to be limiting. In particular, acts, elements and features discussed in connection with any one or more embodiments are not intended to be excluded from a similar role in any other embodiments. 
         [0055]    Also, the phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting. Any references to embodiments or elements or acts of the systems and methods herein referred to in the singular may also embrace embodiments including a plurality of these elements, and any references in plural to any embodiment or element or act herein may also embrace embodiments including only a single element. References in the singular or plural form are not intended to limit the presently disclosed systems or methods, their components, acts, or elements. The use herein of “including,” “comprising,” “having,” “containing,” “involving,” and variations thereof is meant to encompass the items listed thereafter and equivalents thereof as well as additional items. References to “or” may be construed as inclusive so that any terms described using “or” may indicate any of a single, more than one, and all of the described terms. 
         [0056]    Referring to  FIG. 5 , there is illustrated an example of a system incorporating a soft switching topology according to one embodiment. This topology is also referred to herein as a “zero voltage switch” (ZVS), as discussed further below. The circuit  500  includes a voltage source, or power source,  100  coupled to a load  110  comprising a diode  501 , an inductor  503 , a capacitor  505 , and a resistor  507 , via a switch  510  and diode  520 . The switch  510  and diode  520  combination, also referred to as S 1 , is the primary switch where soft switching (and low loss switching) is to be achieved. It will be appreciated by those skilled in the art that although diode  520  and switch  510  are illustrated as separate components, the diode  520  may be integrated with the switch  510 , and hence the combination of switch  510  and diode  520  is referred to herein as S 1 . The circuit  500  further comprises an arrangement of two auxiliary switches  530  (S 2 ) and  540  (S 3 ) and a resonant circuit including an inductor  550  and a capacitor  560 , which is used to provide soft switching during turn-on and turn-off of the switch S 1 , as discussed further below. In one embodiment, diodes  570  (D 2 ) and  580  (D 3 ) are ultra fast diodes that have very small reverse recovery charges, that is, small charges in comparison to the minimum expected stored charge in the capacitor  560 . Diode  570  acts as an isolator, preventing reverse charging of capacitor  560  through switch  530  (S 2 ). Similarly, diode  580  acts as an isolator preventing reverse charging of the capacitor  560  through switch  540  (S 3 ). The resonant elements, inductor  550  and capacitor  560 , help to achieve substantially zero voltage across the main switch S 1  during transitions, and also help to achieve soft switching for the auxiliary switches S 2  and S 3 , as discussed further below. A controller  590  supplies control signals, on lines  592 ,  594  and  596 , to the switches S 1 , S 2  and S 3 , respectively, to turn the switches on and off. 
         [0057]    Examples of operation of embodiments of the zero voltage switch of  FIG. 5  will be discussed below with continuing reference to  FIG. 6  and  FIG. 7 .  FIG. 6  illustrates a timing diagram for one example of a soft switching methodology according to one embodiment, and  FIG. 7  is a flow diagram of one example of a method of soft switching for a turn-on transition according to one embodiment. 
         [0058]    For a turn-on transition of S 1 , the switch  510  is flipped from the off (or open) state, shown in  FIG. 5 , to the on (or closed) state. Accordingly, for the turn-on transition of S 1 , the initial state of the circuit  500  is as shown in  FIG. 5 , with switches S 1 , S 2  and S 3  all in the open (off) position. In  FIG. 6 , time t 1  is the desired time at switch S 1  is to be turned on. In one example, the switching circuit is part of a power converter, such as a buck converter, in which S 1  is continually being switched on and off, and thus, the capacitor  560  is continually charging and discharging. Therefore, according to one embodiment, in order to achieve soft switching in switch S 1 , the polarity of the voltage across the capacitor  560  is reversed. Accordingly, at time t=t 1 , in step  710 , the controller  590  sends a control signal on line  596  to close switch  540  (S 3 ), and the circuit  500  enters “state  1 ” shown in  FIG. 8A . The turn-on losses in switch  540  may be low because when the initial current in switch  540  is essentially zero since all the switches  510 ,  530  and  540  were open in the initial state. However, there may be a dynamic impedance created during the turn-on transition of switch  540  that causes a small loss in switch  540 . 
         [0059]      FIGS. 9A-9D  are timing diagrams illustrating examples of the waveforms in the various components of circuit  500  during the turn-on transition of switch S 1 .  FIG. 9A  illustrates power loss (in Watts) in the switches  51 , S 2  and S 3  as a function of time. In  FIG. 9A , trace  905  is the power loss in switch  540  (S 3 ), showing the loss discussed above.  FIG. 9B  illustrates the control voltages for switches S 1  and S 2  and S 3  as a function of time. In  FIG. 9B , trace  910  is the control voltage for switch S 3 , where positive polarity indicates that the corresponding switch is given a switch-on command and negative polarity indicates that the switch is given switch-off command. Any values in between positive and negative extremes indicate that there is a dynamic change in the impedance happening in the corresponding switch. It is to be appreciated that the sign (positive or negative) of the units plotted on the vertical axes in  FIGS. 9A-9D  indicate polarity and not absolute value. 
         [0060]    Switch  540  remains closed for a duration T 3  (from time t=t 1  to time t=t 2 ), as shown in  FIG. 6 , allowing the capacitor  560  to charge to the opposite polarity. This is illustrated in  FIG. 9C , which shows the capacitor voltage (trace  915 ) as a function of time. In one example, the duration T 3  for which the switch  54  is closed is calculated based on the capacitance and inductance values of the capacitor  560  and inductor  550 , respectively, according to the equation: 
         [0000]        T 3≧π√{square root over ( LC )}  (1)
 
         [0000]    In equation (1), L is the inductance value of the inductor  550  and C is the capacitance value of the capacitor  560 . During time duration T 3 , there may also be a conduction loss depending on the state of the impedance of the switch  540  and the voltage drop across the diode  580 . However, these losses (the conduction loss and loss in switch  540  due to the dynamic impedance condition) are negligible compared to the total losses that would occur in the switch  510  during a conventional hard-switched turn-on transition. 
         [0061]    Toward the end of time period T 3 , the voltage across capacitor  560  becomes completely reversed, as shown at time t 2  in  FIG. 9C , and the circuit  500  enters “state  2 ” shown in  FIG. 8B . During the time from t 1  to t 2  in  FIG. 9C , the capacitor voltage reverses. The trace  920  in  FIG. 9D  indicates current through diode  580  which is essentially the same as the current through switch  540 . The trace  930  in  FIG. 9D  indicates current though diode  570  which is essentially the same as the current through the switch  530 . The trace U 20  in  FIG. 9D  indicates current through the switch  510 . In one example, since the current in the resonant tank formed with the capacitor  560  and inductor  550  is practically zero when the polarity of the capacitor  560  has reversed, if switch  540  remains closed, as shown in  FIG. 8B , the voltage across the inductor  550  may resonate with the junction capacitance of diode  580 , various stray inductances and the primary resonant inductor  550 ; however this is a harmless oscillation. If switch  540  is opened in this condition, the resonance may take place with the output capacitance of switch  540 . This may occur at time t=t 2 , when switch  540  is opened. Depending on the frequency of the oscillation, the oscillation may influence the gate signal through miller capacitance. An example of this effect is illustrated in  FIG. 10 , which shows oscillations  1010  reflected at the gate of switch  540  through miller capacitance due to parasitic components. In  FIG. 10 , trace  1020  is the signal at the gate of switch  540 , trace  1030  is the voltage across capacitor  560 , and trace  1040  is the signal at the gate of switch  510 . Accordingly, to avoid the reflected oscillations  1010 , it may be important to minimize the parasitic effects in the circuit path made up of the inductor  550 , the capacitor  560 , switch  540  and diode  580 . 
         [0062]    According to one embodiment, the minimization of the parasitic effect can be qualitatively analyzed by taking various Kirchhoff&#39;s voltage loops involved in the system to the s-domain. For example, the loop to be considered for analysis in the case of resonance under consideration is the loop comprising the resonant inductor  550 , the resonant capacitor  560 , diode  580  and switch  540 . The resonance can be explained as effect of the complex conjugate poles consisting predominantly of the resonant inductor  550  (plus various trace inductances depending on magnitude) and the junction capacitance of the diode  580  in the impedance transfer function for the loop. The transient source for the resonance is initiated by sudden collapse of voltage across the resonant inductor  550 . This is caused by the non-availability of time rate of change of current through the inductor  550  due to commuting diode  580 . When the switch  540  is opened, the resonant oscillations that is set in by the junction capacitance of diode  580  and resonant inductor  550  continues to resonate at a different frequency and amplitude depending on the resultant complex conjugate poles consisting predominantly of resonant inductor  550 , the junction capacitance of the diode  580  and the output capacitance of the switch  540 . Any parametric adjustments that change the location of these poles to move them further away from the imaginary axis in the left half of the s-plane, bring them closer to the real axis, or move them on the real axis, will minimize or eliminate the parasitic effects. 
         [0063]    In one example implementation, a high value resistor across diode  580  helped in bringing the complex conjugate pairs closer to real axis there by reducing oscillation. Actual power loss in the resistor was negligible. In one example, the value of the resistor was on the order of about 10 kiloOhm for a junction capacitance of approximately 20 pF and resonant inductor of 16 uH. In a another example, a switch with a higher on-state resistance may be selected for switch  540 ; however this carries the risk of moving the location of complex conjugate pairs that are created by resonant inductor  550  and resonant capacitor  560  in the s-plane during normal operation. Accordingly, in at least some implementations, it may be preferable to use the first example. 
         [0064]    In addition, in one embodiment, during the design of the circuit, it may be necessary to consider all loops that could be impacted by a impulse voltage across the resonant inductor for each of the transient time instances t 1  to t 10  as depicted in  FIG. 6 . In one embodiment, the objective of the analysis is to push the complex conjugate pole pairs in the impedance transfer function due to parasitic effects is well into the left half of the s-plane, or close to or on the real axis, such that the quality of parasitic resonance is poor, while not compromising the quality of the resonance made by resonant capacitor  560  and resonant inductor  550 . In one example, quality is defined as the ratio of peak energy stored in energy storing elements to the energy dissipated while the impedance oscillates as a response to impulse. 
         [0065]    Referring to  FIGS. 6 and 7 , at time t=t 2 , switch  540  is opened again (step  720 ) responsive to a signal from the controller  590 , and the circuit  500  enters the state (“state  3 ”) shown in  FIG. 8C . As shown in  FIG. 8C , in this state, the polarity of the capacitor  560  has been reversed. In one example, state  3  is “dead time” for the circuit  500 , occurring between time t=t 2  and time t=t 3  in  FIG. 6 , and between the turn-off of switch S 3  (at t=t 2 ) and turn-on of switch S 2  (at t=t 3 ). This dead time of state  3  has a duration T 4 , and is used to prevent significant overlap of the turn-on of switch S 2  and S 3 , which can potentially create a hard switched condition by taking the path of closed switch  530 , closed switch  540 , diode  580  and diode  570 , and thereby avoiding the switching losses. 
         [0066]    At time t=t 3 , switch  530  (S 2 ) is closed (turned on) by the controller  590 , step  730 , to start pushing current into diode  570  (D 2 ), and the circuit enters “state  4 ” shown in  FIG. 8D . When the switch  530  is turned on, a path is formed with the voltage source  100 , closed switch  530  (S 2 ), the inductor  550 , the capacitor  560 , the load inductor  503 , the load capacitor  505  and the load resistor  507 . The capacitor voltage (trace  915 ) begins to decrease toward zero, as shown in  FIG. 9C , and the current in the inductor  550  (trace  920 ) begins to rise, as shown in  FIG. 9D . In one example, at time t=t 3 , the voltage across the switch  530  is essentially zero. In addition, the inductor  550  prevents fast rise of the current through the switch  530 . Referring to  FIG. 9D , trace  930  represents the current through the switch  530 , which, from time t 3  to time t 5  can be seen to essentially match the current through the inductor  550  (trace  920 ). Thus the switch  530  soft switches during its turn-on transition, with relatively low loss. In  FIG. 9A , trace  935  represents the loss in switch  530  (S 2 ). Since the load consisting of the load inductor  503 , the load capacitor  505  and the load resistor  507  has current source characteristics, the diode  520  will not forward bias until the resonant current exceeds the load current (that is, the current that S 1  would carry after completion of the turn-on process). 
         [0067]    As discussed above, in state  4 , the voltage across the capacitor  560  decreases as shown in  FIG. 9C . Accordingly, after a certain time has elapsed with the circuit  500  in state  4 , the zero crossing of the voltage across the capacitor  560  will occur, such that switch  510  can be closed (at time t=t 4 ). Allowing the resonant capacitor voltage to drop to zero before turning on the switch  510  may ensure that the voltage across the switch is close to zero when the switch closes, thereby achieving soft switching. Referring to  FIG. 6 , the duration between the turn-on of switch S 2  (at t=t 3 ) and the turn-on of switch S 1  (at t=t 4 ) is T 5 . In one example, T 5  is ¼/*Tr, where Tr is the resonant time period of the tank circuit made up of the capacitor  560  and inductor  550 . 
         [0068]    At time t=t 4 , the controller  590  sends a control signal on line  592  to close the main switch  510  (step  740 ), and the circuit  500  enters “state  5 ” as shown in  FIG. 8E . Referring to  FIGS. 9C and 9D , at time t=t 4 , the capacitor voltage (trace  915 ) is approximately zero and the resonant current (trace  930 ) peaks. Thus, since to forward bias the diode  520 , the resonant current exceeds the load current, as discussed above, and the resonant current is at a peak at time t=t 4 , the voltage across the switch  510  is approximately zero, and switch S 1  may be turned on at t 4  with little or no loss. Thus, when the switch  510  is closed at time t=t 4 , and the current through the switch begins to rise, there is little or no voltage across the switch. This is shown in  FIG. 11A , which illustrates a graph of switch voltage (trace  1110 ) and switch current (trace  520 ) as a function of time for an example of a ZVS (zero voltage switching) switch topology, such as circuit  500 , during a turn-on transition. As a result, the power loss in the switch S 1  during the current-voltage overlap period in the switch is significantly lower. For example,  FIG. 11B  illustrates the power loss (trace  940 ) in the switch S 1  as a function of time, corresponding to the voltage and current plots shown in  FIG. 11A . This power loss is also shown in  FIG. 9A  (trace  940 ). As can be seen in  FIG. 11B , the power loss during the overlap period is only about 3.5 W, compared to the 250 W or 1 kW losses experienced using the hard switching topologies of  FIGS. 1 and 3 . Thus, using an embodiment of the circuit  500 , soft switching with low losses can be achieved in switch  510  (S 1 ). 
         [0069]    In one example, the minimum time for which switch S 1  is required to be turned on or turned off for effective soft switching is a function of the resonant time period of circuit formed by the capacitor  560  and inductor  550 . Thus, in one example, a minimum time for which switch S 1  should be kept turned on and off is given by: 
         [0000]        T 1(min)=2π√{square root over ( LC )}  (1A)
 
         [0000]    The minimum time lag between operation of switch S 3  and switch S 2  is given by: 
         [0000]        T 5(min)=π/2√{square root over ( LC )}  (1B)
 
         [0000]    Using the ZVS switch may cause a minimum delay given as (3π/2)√{square root over (LC)} in the switching process relative to a hard switching topology. For example, referring to  FIG. 11A , it can be seen that the turn-on switching process takes approximately 1.3 microseconds (μs) to complete (from about 953.15 μs to 954.45 μs on the time axis). This delay is also shown in  FIG. 6 , as the difference between t 1 , the point at which the switch S 1  is to be turned on, and t 4 , when switch S 1  is actually turned on. In addition, the maximum frequency achievable is limited to ¼π√{square root over (LC)}. This delay and operating frequency limitation, however, may be a relatively small price to pay for the greatly reduced switching losses that may be achieved using the ZVS switch. 
         [0070]    According to one embodiment, the turn-on process for switch S 1  is completed by turning off switch S 2  (step  750 ) once switch S 1  has been turned on. It may be important not to keep the switch  530  closed for too long a duration as it may cause a parasitic component oscillation, with the inductor  550  supplying the oscillation source voltage, when the current drops to zero in the resonant tank formed by the inductor  550  and the capacitor  560 . The energy involved in the oscillations may be very low, but if the oscillation frequency matches the characteristic impedance of component leads present in the circuit  500 , it may cause radiated emissions, which would be undesirable. Accordingly, as shown in  FIG. 6 , switch  530  (S 2 ) may remain closed for a duration T 2 , allowing sufficient time for the switch  510  (S 1 ) to be turned on, and then be turned off at time t=t 5 . At time t=t 5 , the circuit  500  enters a steady state, shown in  FIG. 8F , and the turn-on process for switch S 1  is complete. The switch S 1  may remain on for a time period T 1 , as shown in  FIG. 6 . 
         [0071]    According to one embodiment, a similar process may be used to achieve soft switching for a turn-off transition for the switch S 1  using the same (or a similar) circuit  500 .  FIG. 12  illustrates one example of a method of soft switching for a turn-off transition of switch S 1 . In addition,  FIGS. 14A-14C  are timing diagrams illustrating examples of the waveforms in the various components of circuit  500  during the turn-off transition of switch S 1 . Examples of a method of soft switching for a turn-off transition are discussed below with continuing reference to  FIG. 6 ,  FIG. 12 ,  FIGS. 13A-13D  and  FIGS. 14A-14C . 
         [0072]    For a turn-off transition, the circuit  500  is initially in the state shown in  FIG. 8F , with switch  51  closed, and switches S 2  and S 3 ,  530  and  540 , respectively, open. Referring to  FIG. 6 , time t=t 6  is the desired time at switch S 1  is to be turned off. Accordingly, at t 6 , the switch  540  (S 3 ) is turned on (step  1210 ) by the controller  590  to reverse the polarity of the capacitor  560 , as discussed above. The circuit  500  enters the state shown in  FIG. 13A . During the time from t 6  to t 7 , the voltage across the capacitor  560  reverses polarity, as shown in  FIG. 14A  in which trace  1410  is the capacitor voltage. Switch  540  remains on for a duration T 3  to allow the capacitor voltage to reverse polarity. Referring to  FIG. 14B , in which trace  1420  is the inductor current, as the voltage in the capacitor  560  changes polarity, the current in the inductor  550  increases, reaching a peak at the time of the aero-crossing of the capacitor voltage, and decreases again to approximately zero when the capacitor voltage peaks in the opposite polarity. Once the capacitor  360  has completely reversed polarity, at time t 7 , the switch  540  can be opened (turned off) again (step  1220 ), and the circuit  500  enters the state shown in  FIG. 13B . As discussed above, there is a “dead time” between time t=t 7  when switch  540  (S 3 ) is turned off and time t=t 8 , when the switch  530  (S 2 ) is switched, during which the circuit is in the state shown in  FIG. 13B , to reduce switching losses in the switches S 2  and S 3 .  FIG. 14C  is a timing diagram illustrating an example of power loss in the switches during the turn-off transition of switch S 1 , in which trace  1430  represents the power loss in switch S 3 , trace  1440  represents the power loss in switch S 2 , and trace  1450  represents the power loss in switch S 1 . As shown in  FIG. 14C , there is a small loss of fewer than 5 Watts in each of switches S 3  and S 2  during their transitions at times t 6  and t 8 , respectively. 
         [0073]    At time t=t 8 , switch  530  (S 2 ) is closed (turned on) responsive to a signal from the controller  590  to force a current through the switch  530  (step  1230 ). As a result, the net current through the switch S 1  decreases to the difference between the resonant current, through the inductor  550  and capacitor  560 , and the steady state current through the switch S 1 . This is illustrated in  FIG. 14B , in which trace  1460  represents the current through the switch S 1 . During the same time period, from time t 8  to time t 9 , the current through the switch S 2  (trace  1470 ) substantially matches the resonant current in the inductor  550  (trace  1420 ) and increases to a peak at time t 9 . As shown in  FIG. 14A , during the same time period, the capacitor voltage decreases to substantially zero at time t 9 . In one example, when the circuit  500  is in the state shown in  FIG. 13C , it is in a resonant mode of the resonant tank formed by the inductor  550  and capacitor  560  through closed switches S 1   510 , S 2   530  and diode  570 . 
         [0074]    At time t=t 9 , the switch S 1  is turned off (step  1240 ), and the circuit  500  enters the state shown in  FIG. 13D . As discussed above and shown in  FIG. 6 , the time period from time t=t 8  to time t=t 9  has a duration T 5 , which, as discussed above, in one example is approximately given by: 
         [0000]        T 5=π/2√{square root over ( LC )}  (1C)
 
         [0000]    At time t=t 9 , the voltage across the capacitor  560  is approximately zero (as shown in  FIG. 14A ), and the resonant current through the inductor  550  is close to its peak level, as shown in  FIG. 14B . As discussed above, closing switch  530  at time t 8  caused the current in the switch S 1  to decrease (as shown in  FIG. 14B ), as the resonant current increased. As a result, because the peak resonant current is greater than the current in switch S 1  at time t 9 , the diode  520  is forward biased and the voltage across the switch  510  becomes close to zero, enabling soft switching of switch S 1 . Referring to  FIG. 15A , during turn-off of switch S 1 , the current  1510  in the switch drops to close to zero before the voltage  1520  across the switch begins to rise. As a result, the power loss during the switch transition is small, about 2.5 W in the example illustrated in  FIG. 15B . This small power loss is also shown (trace  1450 ) in  FIG. 14C . 
         [0075]    According to one embodiment, the circuit  500  remains in the state shown in  FIG. 13D , with switch  530  closed, for a time period of duration T 2 . After switch S 1  has been turned off, the resonant current flows into the load  110 . In one example, the time period T 2  can be considered as the sum of two time periods T 6  and T 7 , as shown in  FIG. 6 . T 7  is a time period equivalent to ½*Tr, where Tr is the resonant time period of the resonant circuit foamed by the inductor  550  and capacitor  560 , as discussed above. Switch S 1  is turned off during time period T 7 . In one example, the switch S 1  is turned off approximately half way through time period T 7  and therefore, T 5  is approximately ¼*Tr. According to one example, the circuit  500  remains in the state shown in  FIG. 13D  for a relatively extended period in order to recharge the capacitor  560  after the circuit  500  has been in the resonant mode shown in  FIG. 13C . In one example, the time period T 6  is the minimum time to recharge the capacitor  560  to the off-state voltage of the switch S 1 . Maintaining the circuit  500  in the state shown in  FIG. 13D  for the additional time period T 6  after T 7  allows for charge replenishment of the capacitor  560  that may have lost charge in the various losses in the auxiliary switches S 2  and S 3  and the diodes  570  and  580 . 
         [0076]    Referring to  FIGS. 14A and 14B , after the current in switch  530  (S 2 ) and inductor  550  (traces  1420  and  1470 ) has decreased to approximately zero, and the voltage (trace  1410 ) across the capacitor  560  is close to (or has reached) its peak value, at time t=t 10 , the switch  530  can be turned off (step  1250 ), as shown in  FIG. 6 . As the current through the switch  530  is close to zero at the time of the turn-off transition, the switch  530  experiences soft, and close to loss-less, switching. In one example, the reversal switch  540  may be used for reduced current stresses in case of current source switching. Once the switch  530  has been turned off (opened), the turn-off transition for the switch S 1  is complete, and the circuit  500  is once again in the state shown in  FIG. 5 . 
         [0077]    According to one embodiment, the values of the capacitor (C) and inductor (L) may be selected based on the minimum on time/off time desired for the circuit and also the peak current that the main switch S 1  would break or make. It may be also important to know how much time will be taken by the main switch S 1  to turn off (and the tolerance of this transition time) once the switch S 1  is given a turn-off command. As discussed above, implementing the soft switching technique takes some amount of time, slowing down the switching transition. In one example, the band of time available (transition time) for the soft switching is given by: 
         [0000]    
       
         
           
             
               
                 
                   
                     T 
                     band 
                   
                   = 
                   
                     
                       LC 
                       ( 
                       
                         π 
                         - 
                         
                           
                             sin 
                             
                               - 
                               1 
                             
                           
                           ( 
                           
                             
                               I 
                               0 
                             
                             
                               V 
                                
                               
                                 
                                   C 
                                   L 
                                 
                               
                             
                           
                           ) 
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   2 
                   ) 
                 
               
             
           
         
       
     
         [0000]    In equation (2), I o  is the largest load current to be broken by the switch S 1 , and V is the minimum voltage that comes across the capacitor  560  after the switch S 1  is turned on. In one example, the switch S 1  is turned on or off after a time period: 
         [0000]        T 5=π/2√{square root over (LC)}
 
         [0000]    Accordingly, the available time to turn on/off the switch S 1  is T band /2. Therefore: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
                         T 
                         band 
                       
                       2 
                     
                     ≥ 
                     
                       T 
                       on 
                     
                   
                   , 
                   
                     T 
                     off 
                   
                 
               
               
                 
                   ( 
                   3 
                   ) 
                 
               
             
           
         
       
     
         [0000]    In equation (3), T on  is the total on time of the main switch S 1 , while T off  is total off time of the main switch S 1 . 
         [0078]    Assuming the peak current allowed/desired in the circuit  500  is I p , then the values of C and L are constrained according to the equation: 
         [0000]    
       
         
           
             
               
                 
                   
                     I 
                     p 
                   
                   ≥ 
                   
                     
                       V 
                       
                         c 
                          
                         
                             
                         
                          
                         max 
                       
                     
                      
                     
                       
                         C 
                         L 
                       
                     
                   
                 
               
               
                 
                   ( 
                   4 
                   ) 
                 
               
             
           
         
       
     
         [0000]    In equation (4), V cmax  is the maximum capacitor voltage at any instant of operation of the circuit  500 . Accordingly, the capacitor  560  may be voltage rated for V cmax  and the minimum dv/dt or current rating of the capacitor may be given by: 
         [0000]      (dv/dt) min   =V   cmax √{square root over (LC)}  (5)
 
         [0079]    According to one embodiment, the root mean squared (rms) current in the inductor  550  passes about two resonant cycles for one switching period T s . Accordingly, the inductor rms current is given by: 
         [0000]    
       
         
           
             
               
                 
                   
                     I 
                     Irms 
                   
                   = 
                   
                     
                       2 
                        
                       
                         2 
                       
                        
                       π 
                        
                       
                           
                       
                        
                       
                         V 
                         
                           c 
                            
                           
                               
                           
                            
                           max 
                         
                       
                        
                       C 
                     
                     
                       T 
                       s 
                     
                   
                 
               
               
                 
                   ( 
                   6 
                   ) 
                 
               
             
           
         
       
     
         [0000]    Ts is minimum switching time period for proper operation of a converter system in which the switch is used. Ts may be greater than or equal to 2*T 1 (min) derived in equation 1A. This is a parameter decided by the designer of the converter system in which the switching method and apparatus of embodiments of the invention may be applied. For example, if the switching converter is required to operate at a max frequency of 100 kHz, Ts will be 10 μs. 
         [0080]    The inductor air gap may be specified to account for a high current peak and to provide fair linearity during the entire period of resonance. The air gap, L g , for the inductor  550  may be specified as follows: 
         [0000]    
       
         
           
             
               
                 
                   
                     L 
                     g 
                   
                   = 
                   
                     
                       
                         n 
                         2 
                       
                        
                       
                         μ 
                         0 
                       
                        
                       
                         A 
                         c 
                       
                     
                     L 
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
           
         
       
     
         [0000]    In equation (7), n is number of turns on the inductor  550 , μ 0  is permeability of air, and A c  is the cross-sectional area of the inductor core. To ensure linearity of operation, the following condition should also be satisfied: 
         [0000]    
       
         
           
             
               
                 
                   
                     B 
                     max 
                   
                   ≥ 
                   
                     
                       
                         
                           μ 
                           0 
                         
                          
                         
                           V 
                           
                             c 
                              
                             
                                 
                             
                              
                             max 
                           
                         
                       
                       
                         L 
                         g 
                       
                     
                      
                     
                       
                         C 
                         L 
                       
                     
                   
                 
               
               
                 
                   ( 
                   8 
                   ) 
                 
               
             
           
         
       
     
         [0000]    Where B max  is the maximum flux density allowed in the core material. The value L of the inductor  550  may be selected as any value that will satisfy equations (6), (7) and (8). 
         [0081]    In one example, the auxiliary switches  530  (S 2 ) and  540  (S 3 ), as well as the diodes  570  and  580  may be rms current rated according to equation (6), and may be rated for peak repetitive current (I prr ) as follows: 
         [0000]    
       
         
           
             
               
                 
                   
                     I 
                     prr 
                   
                   = 
                   
                     
                       V 
                       
                         c 
                          
                         
                             
                         
                          
                         max 
                       
                     
                      
                     
                       
                         C 
                         L 
                       
                     
                   
                 
               
               
                 
                   ( 
                   9 
                   ) 
                 
               
             
           
         
       
     
         [0000]    Fast switches and diodes may be generally presently preferred. 
         [0082]    An example of a zero voltage switch having a circuit similar to that shown in  FIG. 5  was implemented and used to convert a hard switching device used with a buck converter into a soft switch. In one example, for a 120 Watt system, an improvement in the switching efficiency from 85% to 93% was observed. Referring to  FIG. 16 , there are illustrated some of the measured waveforms for this example. In  FIG. 16 , trace  1610  represents the voltage across the capacitor  560 . Trace  1610  shows the charging of the capacitor  560  in the positive and negative direction during the turn-on process of switch S 1 . As can be seen in  FIG. 16 , there is a difference in the levels of the steady state capacitor voltage before and after the charge/discharge cycle. This difference represents a loss of charge that preferably may be replenished during the time period T 6 , as discussed above. In  FIG. 16 , trace  1620  represents the current in the inductor  503 , and trace  1630  represents the voltage at the gate of the switch S 1 . As discussed above, the switch S 1  is turned on close to the zero crossing of the second polarity change of the capacitor voltage  1610 , such that the switch soft switches.  FIG. 17  illustrates the time period of the soft switching operation for this example by showing the inductor ( 503 ) current (trace  1710 ) and capacitor ( 560 ) voltage (trace  1720 ) in the same plot.  FIG. 18  illustrates the measured switching waveforms for the implemented example. In  FIG. 18 , trace  1810  represents the switch S 3 , trace  1820  represents the switch S 2  and trace  1830  represents the switch S 1 . As can be seen with reference to  FIG. 18 , the switches S 1 , S 2  and S 3  are turned on and off as discussed above with reference to  FIGS. 7 and 12  to achieve soft switching of switch S 1 . The example demonstrates that the soft switching techniques discussed herein may be practically implemented. 
         [0083]    Having thus described several aspects of at least one embodiment, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure and are intended to be within the scope of the invention. Accordingly, the foregoing description and drawings are by way of example only, and the scope of the invention should be determined from proper construction of the appended claims, and their equivalents.