Abstract:
Throughput and accuracy of testing of a semiconductor device is improved by forming the contacts to allow the leads of a packaged semiconductor device to pass through the contacts. Both AC and DC testing may be done because the contact length is substantially shortened.

Description:
This application is a continuation of prior application Ser. No. 07/582,819, filed Sep. 13, 1990, now abandoned, which is a continuation of prior application Ser. No. 07/413,034, filed Sep. 27, 1989, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     This invention relates, in general, to the testing of semiconductor devices, and more particularly, to an apparatus for testing of packaged semiconductor devices. 
     In the past, the testing of semiconductor devices packaged in dual inline (DIL) packages, or semiconductor packages similar thereto, has been accomplished by using activated contacts. Activated contacts make electrical contact to the outside of each lead of a packaged semiconductor device. The productivity or throughput of testing products using activated contacts is slow because time is taken up waiting for the contacts to stop moving and make good electrical contact. In addition, activated contacts have long lead lengths which represent non-transmission lines. Thus, because of the losses which take place, the activated contacts are only good for DC testing, but not AC testing. In order to make an activated contact a transmission line, a ground plane must be added to the activated contacts. This reduces the losses and allows AC testing to take place. It is also very difficult to provide Kelvin contacts to an activated contact apparatus, because the contacts are large compared to the package leads. Kelvin contacts provide for better accuracy in measurement, therefore, inaccuracies in measurement must be tolerated when using activated contacts. Lastly, activated contacts use about 30 grams of pressure when testing each part, thus the contacts, which are typically made of a beryllium/copper alloy, must be replaced frequently due to wear. 
     Other methods of testing semiconductor devices in SOIC (Small Outline Integrated Circuit) packages are not directly compatible with the testing of dual inline packages. The leads of an SOIC are bent in a &#34;J&#34; configuration, while the leads of a dual inline package are straight. Thus, a method of making contact to the bottom surface of the leads of an SOIC can not be used for dual inline packages or other similar packages. 
     Accordingly, it is an object of the present invention to provide an apparatus for testing packaged semiconductor devices with an improved productivity. 
     Another object of the present invention is to provide an apparatus for testing packaged semiconductor devices which has shorter contact lead lengths which allows for AC and DC testing. 
     An additional object of the present invention is to provide an apparatus for testing packaged semiconductor devices which improves accuracy by providing a Kelvin contact. 
     A further object of the present invention is to provide an apparatus for testing semiconductor devices which provides for less wear. 
     SUMMARY OF THE INVENTION 
     The above and other objects and advantages of the present invention are achieved by providing an apparatus for testing semiconductor devices which utilizes wiping contacts rather than activated contacts. The wiping contact apparatus has at least one contact which makes electrical contact to a side of each lead of a semiconductor device. Two contacts which are bifurcated may be used to improve testing accuracy. In addition, bifurcated Kelvin contacts may be easily added in order to improve the accuracy of measurement. The wiping contacts are preferably made of an alloy comprised of platinum, gold and silver. This provides for contacts which do not oxidize and reduce replacement frequency. 
    
    
     BRIEF DESCRIPTION OF DRAWINGS 
     FIG. 1 is a side view of a testing apparatus and a device under test according to one embodiment of the present invention; 
     FIG. 2 is a top view of a portion of a testing apparatus according to one embodiment of the present invention; and 
     FIG. 3 illustrates a perspective view of a portion of a testing apparatus according to one embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1 illustrates a side view of the testing of a packaged semiconductor device 15 with wiping contacts 10 according to one embodiment of the present invention. Wiping contacts 10 are formed in a contact molded assembly 11, which connects to a loadboard 13. Loadboard 13 is then connected to a tester (not shown). A first and second plurality of wiping contacts 10 is used in this embodiment because dual inline package 15 has a first and second plurality of leads 14 parallel to each other. A plurality of wiping contacts 10 may also be formed in a single contact molded assembly 11. Package 15 shown is a dual inline package, however, the present invention would also apply to other types of packages. Dual inline package 15 is positioned by transfer pocket 17 such that contacts 10 make electrical contact by wiping the sides of leads 14 as transfer pocket 17 moves horizontally in the direction of arrow 18. 
     FIG. 2 better illustrates wiping contacts 10 making electrical contact to leads 14 of dual inline package 15. The top view of transfer pocket 17 illustrates contact slots 19 and lead slots 20. Contact slots 19 are located so as to match the locations of leads 14 of dual inline package 15 and guide wiping contacts 10 across leads 14. As can be seen in FIG. 2, contacts 10 are bifurcated contacts which make electrical contact to each side of lead 14. Although only one contact 10 is necessary to make electrical contact with a lead, providing bifurcated contacts 10 reduces the percentage of not making electrical contact to packaged semiconductor device 15 under test. In addition, bifurcated Kelvin contacts may be added (not shown in FIG. 2) to improve the accuracy of testing. Making electrical contact by wiping the sides of lead 14 instead of making direct contact to the outer edge of lead 14 uses only approximately 2 grams of pressure, therefore contacts 10 do not need to be replaced as frequently as activated contacts. In addition, because wiping contacts 10 are very small and have very short lead lengths, they may be fabricated using an alloy of platinum, gold, and silver. Other suitable alloys may be used. Prior art contacts are typically large and have long lead lengths, thus are made of a less expensive alloy, such as a gold plated beryllium and copper alloy which is not as hard as the platinum, gold, and silver alloy. In addition, because wiping contacts 10 can be fabricated to have short lead lengths, both AC and DC testing can be done. 
     FIG. 3 illustrates a perspective view of wiping contacts 10 making electrical contact to leads 14. Only some of the wiping contacts 10 have been illustrated in both FIGS. 2 and 3 in order to simplify the drawings. FIG. 3 more readily illustrates various embodiments of the present invention. In a first embodiment, a single wiping contact 10A may be used to make electrical contact to the side of each lead 14. In a second embodiment, 10B illustrates two bifurcated wiping contacts may be used, which can be two contacts which provide voltage for testing or one to provide the voltage and a Kelvin contact to provide for accuracy. Contacts 10C illustrate a third embodiment, which is preferably comprised of two bifurcated voltage contacts and one Kelvin contact. Contacts 10D illustrate a fourth embodiment, which is comprised of two bifurcated voltage contacts and two bifurcated Kelvin contacts. FIG. 3 also more readily illustrates how leads 14 pass through wiping contacts 10, which allows for a substantial increase in throughput. Note also that transfer pocket 17 is not shown in FIG. 3 to illustrate that other means may be used to position package 15 such that leads 14 pass through wiping contacts 10. 
     By now it should be appreciated that there has been provided an improved apparatus for testing of semiconductor devices packaged in dual inline packages, and packages similar thereto.