Abstract:
A start up circuit ( 4 - 1 ) for a boost circuit ( 10 ) includes an adjustable-duty-cycle oscillator ( 1 - 2 ) that turns on a switch transistor (M SW ) connected to an inductor (L) receiving an input voltage (V IN ). If a voltage (V 9 ) of a junction between the transistor and the inductor exceeds a predetermined value corresponding to a maximum inductor current (I L ), an amplifier (A 1 ) immediately terminates a first phase of an oscillator cycle, which turns off the transistor. Built-up inductor current is steered into a load. Duty-cycle-adjustment circuitry (R 1 ,R 2 ,C 1 ) causes the oscillator to complete a normal second phase of the cycle before a new cycle begins.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    The present invention relates generally to improving the operability of energy harvesting devices, and more particularly to low voltage start up circuitry for a boost converter in an inductive energy harvesting system. 
         [0002]    Engineers have attempted to design “ultra low” power integrated circuits, for example integrated circuits that require extremely low amounts of operating current and which can be operated without being plugged into conventional AC power systems. Instead, it is desirable that such ultra-low-power integrated circuits be powered by small amounts of power “scavenged” or “harvested” from ambient solar, vibrational, thermal, and/or biological energy sources by means of micro-energy “harvesting devices” and stored in batteries or super-capacitors. 
         [0003]    Prior Art  FIG. 1  shows a conventional ring oscillator  1 - 1 . Ring oscillator  1 - 1  has an oscillation frequency determined by the values of resistor R 0  and capacitors C 0  and C 1 . For a CMOS implementation, the duty cycle of ring oscillator  1 - 1  is 0.5, i.e., 50%, if the threshold of inverter I 1  is midway between the upper supply voltage (typically V DD ) and the lower supply voltage (typically ground). 
         [0004]    Prior Art  FIG. 2  shows a ring oscillator  1 - 2  which is a modified version of ring oscillator  1 - 1  of Prior Art  FIG. 1 . In oscillator  1 - 2 , the output of inverter I 2  is connected by conductor  13  to one plate of capacitor C 0 , the gate of a P-channel transistor M 0 , and the gate of a N-channel transistor M 1 . The other plate of capacitor C 0  is connected by conductor  15  to the input of inverter I 1  and one plate of capacitor C 1 , the other plate of which is connected to ground. The output of inverter I 1  is connected to the input of inverter I 2 . The drain of transistor M 0  is connected by resistor R 1  to conductor  15 , and the source of transistor M 0  is connected to V DD . The drain of transistor M 1  is connected to conductor  15  by resistor R 2 , and the source of transistor M 1  is connected to ground. 
         [0005]    Thus, in  FIG. 2  the resistance is separated into two separate resistors R 1  and R 2  connected in series between transistors M 0  and M 1 . The total resistance should be equal to R 1 +R 2 =2×R 0  for oscillator  1 - 2  of  FIG. 2  to have the same oscillation frequency as oscillator  1 - 1  of  FIG. 1 . In this case, the frequency of oscillator  1 - 2  of  FIG. 2  is the same that of oscillator  1 - 1   1  of  FIG. 1  but the duty cycle is determined by the resistor ratio R 0 /R 1 ), and therefore can be set to any desired value. 
         [0006]    During start-up operation in an energy harvester, the supply voltage V DD  supplied to the oscillator of a start-up circuit for a DC-DC boost converter (which converts a DC output or a rectified output of the energy harvester to a battery charging voltage) is very low, approximately 0.4 volts. Consequently, none of the circuitry in the boost converter is operable during the start-up operation. Setting the duty cycle of the oscillator in  FIG. 2 , when it is used in a start-up circuit for the DC-DC boost converter, by setting a ratio of resistors R 1  and R 2  in  FIG. 2  is not adequate if the input voltage has different values and varies over a wide range, e.g. from 0.4 volts V to 2.0 volts. This is because the duty cycle preferably is equal to the ratio of input and output voltages of the boost converter, and therefore the duty cycle should be adjusted as the output voltage of the boost converter rises during charging of the load capacitance. The duty cycle also should be adjusted as the boost converter input voltage varies when its output voltage remains stable. 
         [0007]    A DC-DC boost converter should be able to start up in response to an input voltage V IN  as low as 0.4 volts in the absence of a charged-up battery or any other energy harvester power source. For example, the minimum workable value of input voltage V IN  of a DC-DC boost converter needs to be approximately 0.4 to 0.5 volts in order to boost the output of a single solar cell harvester. However, until the output voltage of an energy harvesting device applied to provide the input voltage of a boost converter reaches a value of approximately 1.3 to 1.5 volts, none of the usual control circuitry inside the boost converter is operable. As a practical matter, meaningful feedback can not be produced by the boost converter to control the duty cycle of its switch transistor until the output voltage of the boost converter is greater than approximately 1.6 to 1.8 volts. 
         [0008]    The closest prior art is believed to also include U.S. Pat. No. 7,081,739 entitled “Voltage Converting Circuit Having Parallel-Connected Switching Devices” issued Jul. 25, 2006 to Osinga et al. During start-up the power switch of the disclosed boost converter is toggled on and off without feedback, and is controlled only by a low-voltage start up oscillator. The duty cycle of the oscillator is chosen for the worst-case combination of low input voltage from a solar collector, low inductor value, and load resistance in order to provide sufficient current to cause the output voltage to rise to a value at which normal feedback operation of the converter can start. However, that choice of duty cycle leads to over-designing of the power switch and too much consumption of current through the inductor of the boost converter during start up operation in most modes of operation. 
         [0009]    It should be noted that even short-term overloading of the inductor of a boost converter may cause failure of the inductor, especially when the inductor is implemented as a low-cost monolithic inductor. 
         [0010]    Thus, there is an unmet need for a low-cost, low complexity, low power start up circuit and method for use in conjunction with a boost converter which has a very low input voltage, especially for use in energy harvesting applications. 
         [0011]    There also is an unmet need for a low-cost, low complexity, extremely low power start up circuit and method for use in conjunction with a boost converter having a very low input voltage and which avoids damage caused by excessive current in the inductor and/or power switch transistor of the boost converter. 
         [0012]    There also is an unmet need for a way to avoid over-design of the power switch in a DC-DC boost converter, especially in energy harvesting applications. 
         [0013]    There also is an unmet need for a start up circuit technique which is capable of starting up a DC-DC boost converter from an input voltage that is substantially lower in magnitude than the lowest value of input voltage at which internal circuitry of the boost circuit is operable. 
       SUMMARY OF THE INVENTION 
       [0014]    It is an object of the invention to provide a low-cost, low complexity, low power start up circuit and method for use in conjunction with a boost converter having a very low input voltage, especially for use in energy harvesting applications. 
         [0015]    It is another object of the invention to provide a low-cost, low complexity, extremely low power start up circuit and method for use in conjunction with a boost converter which has a very low input voltage and which avoids damage caused by excessive current in the inductor and/or power switch transistor of the boost converter. 
         [0016]    It is another object of the invention to provide a way to avoid over-design of the power switch in a DC-DC boost converter, especially in energy harvesting applications. 
         [0017]    It is another object of the invention to provide a start up circuit technique which is capable of starting up a DC-DC boost converter from an input voltage that is substantially lower in magnitude than the lowest value of input voltage at which internal circuitry of the boost circuit is operable. 
         [0018]    It is another object of the invention to provide a power-efficient and fast start up circuit and method for a DC-DC boost converter receiving a very low input voltage. 
         [0019]    Briefly described, and in accordance with one embodiment, the present invention provides a start up circuit ( 4 - 1 ) for a boost circuit ( 10 ) which includes an adjustable-duty-cycle oscillator ( 1 - 2 ) that turns on a switch transistor (M SW ) connected to an inductor (L) receiving an input voltage (V IN ). If a voltage (V 9 ) of a junction between the transistor and the inductor exceeds a predetermined value corresponding to a maximum inductor current (I L ), an amplifier (A 1 ) immediately terminates a first phase of an oscillator cycle, which turns off the transistor. Built-up inductor current is steered into a load. Duty-cycle-adjustment circuitry (R 1 ,R 2 ,C 1 ) causes the oscillator to complete a normal second phase of the cycle before a new cycle begins. 
         [0020]    In one embodiment, the invention provides a start up circuit ( 4 - 1 ) for assisting start up of an inductive boost circuit ( 10 ) that includes a switch transistor (M SW ) having a drain coupled to an inductor (L) as an input voltage (V IN ) coupled to the inductor (L) rises to a predetermined input voltage level, the boost circuit ( 10 ) generating a first voltage (V 9 ) indicative of a current (I L ) flowing in the inductor (L). The start up circuit ( 4 - 1 ) includes oscillator circuitry ( 1 - 2 , 3 ) that includes delay circuitry ( 16 , 21 , 17 ) having an input coupled to a first conductor ( 15 ) and an output coupled to a second conductor ( 13 ). The second conductor ( 13 ) is coupled to a first terminal of a first capacitor (C 0 ), a second terminal of the first capacitor (C 0 ) is coupled by the second conductor ( 15 ) to a first terminal of a first resistor (R 1 ), a first terminal of a second resistor (R 2 ), and a first terminal of a second capacitor (C 1 ). The first resistor (R 1 ) has a second terminal coupled to a drain of a first transistor (M 0 ) and the second resistor (R 2 ) has a second terminal coupled to a drain of a second transistor (M 1 ). The first transistor (M 0 ) has a source coupled to a first supply voltage (V DD ) and a gate coupled to the first terminal of the first capacitor (C 0 ). Values of the first (R 1 ) and second (R 2 ) resistors and values of the first (C 0 ) and second (C 1 ) capacitors determine a duty cycle of the oscillator circuitry ( 1 - 2 , 3 ). The second transistor (M 1 ) has a source coupled to a second supply voltage (GND) and a gate coupled to the gate of the first transistor (M 0 ). Amplifier circuitry (A 1 ) has a first input (−) coupled to receive the first voltage (V 9 ) and also has an output coupled to turn off the switch transistor (M SW ) if the first voltage (V 9 ) exceeds a predetermined level to prevent the inductor current (I L ) from exceeding a predetermined inductor current level. 
         [0021]    In the described embodiments, a gate driver circuit ( 5 , 5 A) has an input coupled to the second conductor ( 13 ) and an output ( 19 ) coupled to a gate of the switch transistor (M SW ). The gates of the first (M 0 ) and second (M 1 ) transistors are directly coupled to the second conductor ( 13 ) and the first terminal of the first capacitor (C 0 ). In one embodiment, the delay circuitry ( 1 - 2 , 3 ) includes a first inverter ( 16 ) having an input coupled to the first conductor ( 15 ) and an output coupled to an input of a second inverter ( 17 ) having an output coupled to the second conductor ( 13 ). 
         [0022]    In one embodiment, the output of the amplifier circuitry (A 1 ) is coupled to the first conductor ( 15 ) by means of a third transistor (M 3 ) having a gate coupled to the output of the amplifier circuitry (A 1 ), a drain coupled to the first conductor ( 15 ), and a source coupled to the first supply voltage (V DD ) by means of a fourth transistor (M 2 ) having a gate coupled to the second conductor ( 13 ). 
         [0023]    In one embodiment, the output of the amplifier circuitry (A 1 ) is directly coupled to the first conductor ( 15 ). The amplifier circuitry (A 1 ) has a second input (+) coupled to receive a reference voltage (V REF ) equal to the predetermined level of the first voltage (V 9 ). 
         [0024]    In one embodiment, the gates of the first (M 0 ) and second (M 1 ) transistors are coupled to the second conductor ( 13 ) by means of an inverting circuit (MP 17 ,MN 26 ) including a third transistor (MP 17 ) having a gate coupled to the second conductor ( 13 ), a source coupled to the first supply voltage (V DD ) and a drain coupled by a third conductor ( 28 ) to the gates of the first (M 0 ) and second (M 1 ) transistors and a drain of a fourth transistor (MN 26 ) having a gate coupled to the second conductor ( 13 ) and a source coupled to the second supply voltage (GND). 
         [0025]    In one embodiment, the delay circuitry ( 16 , 21 , 17 ) includes a first inverter ( 16 ) having an input coupled to the first conductor ( 15 ) and an output coupled to an input of a second inverter ( 21 ) having an output coupled to an input of a third inverter ( 17 ) having an output coupled to the second conductor ( 13 ). The amplifier circuitry (A 1 ) includes a fifth transistor (M 4 ) having a source coupled to receive the first voltage (V 9 ), a gate and drain coupled to receive a bias current ( 23 ) from the first supply voltage (V DD ) and a gate of a sixth transistor (M 3 ). The sixth transistor (M 3 ) has a source coupled to the second supply voltage (GND) and a drain coupled to the first conductor ( 15 ), wherein channel-width-to-channel-length ratios of the fifth (M 4 ) and sixth (M 3 ) transistors are mismatched to in effect provide a threshold voltage equal to the predetermined level of the first voltage (V 9 ) at which the switch transistor (M SW ) is to be turned off. The start up circuit includes a seventh transistor (MN 7 ) having a source coupled to the second supply voltage (GND), a drain coupled to the gates of the fifth (M 4 ) and sixth (M 3 ) transistors, and a gate connected to the output ( 29 ) of the first inverter ( 16 ) to disable the amplifier circuitry (A 1 ) while the switch transistor (M SW ) is off. 
         [0026]    In a described embodiment, the boost circuit ( 10 ) includes a diode (D) having an anode coupled to the drain of the switch transistor (M SW ) and a cathode coupled to an output ( 11 ) of the boost converter ( 10 ), for steering the current (I L ) in the inductor (l) through an output conductor ( 11 ) of the boost converter ( 10 ). In one embodiment, the input voltage (V IN ) comes from a rectifier circuit of a low voltage energy harvesting system. 
         [0027]    In one embodiment, the invention provides a method for assisting start up of an inductive boost circuit ( 10 ) including a switch transistor (M SW ) having a drain coupled to a first terminal of an inductor (L) having a second terminal coupled to receive an input voltage (V IN ). The method includes turning on the switch transistor (M SW ) in response to a first phase of a cycle of oscillator circuitry ( 1 - 2 , 3 ) having an adjustable duty cycle, to cause a build-up of the inductor current (I L ); coupling a drain voltage (V 9 ) of the switch transistor (M SW ) to a first input of amplifier circuitry (A 1 ) to cause a first change in an output of the amplifier circuitry (A 1 ) if the drain voltage (V 9 ) exceeds a predetermined value corresponding to a maximum desired build-up of the inductor current (I L ); immediately turning off the switch transistor (M SW ) in response to the first change in the output of amplifier circuitry (A 1 ) by immediately terminating the first phase of the oscillator circuitry ( 1 - 2 , 3 ); steering the built-up inductor current (I L ) into a load; and operating the oscillator circuitry ( 1 - 2 , 3 ) to complete a normal second phase of the cycle immediately after the terminating of the first phase. 
         [0028]    In one embodiment, the method includes turning the switch transistor (M SW ) on during a first phase of a cycle of duty-cycle-adjustable oscillator circuitry ( 1 - 2 , 3 ) which includes delay circuitry ( 16 , 17 ) having an input coupled to a first conductor ( 15 ) and an output coupled to a second conductor ( 13 ), the second conductor  13  being coupled to a first terminal of a first capacitor (C 0 ), a second terminal of the first capacitor (C 0 ) being coupled by the second conductor ( 15 ) to a first terminal of a first resistor (R 1 ), a first terminal of a second resistor (R 2 ), and a first terminal of a second capacitor (C 1 ), the first resistor (R 1 ) having a second terminal coupled to a drain of a first transistor (M 0 ), the second resistor (R 2 ) having a second terminal coupled to a drain of a second transistor (M 1 ), the first transistor (M 0 ) having a source coupled to a first supply voltage (V DD ) and a gate coupled to the first terminal of the first capacitor (C 0 ), values of the first (R 1 ) and second (R 2 ) resistors and values of the first (C 0 ) and second (C 1 ) capacitors being determinative of a duty cycle of the duty-cycle-adjustable oscillator circuitry ( 1 - 2 , 3 ), the second transistor (M 1 ) having a source coupled to a second supply voltage (GND) and a gate coupled to the gate of the first transistor (M 0 ). The first (C 0 ) and second (C 1 ) capacitors are charged to a first logic level in response to the first change in the output of the amplifier circuitry (A 1 ), wherein the switch transistor (M SW ) is turned off in response to the first logic level. Subsequently the first (C 0 ) and second (C 1 ) capacitors are charged to a second logic level through one of the first (R 1 ) and second (R 2 ) resistors, wherein the switch transistor (M SW ) is turned on in response to the second logic level. An output voltage ( 13 ) of the delay circuit ( 16 , 17 ) is applied to an input of a gate driver circuit ( 5 ), an output of which turns the switch transistor (M SW ) on, and an output voltage ( 13 ) of the delay circuit ( 16 , 17 ) is applied to an input of the gate driver circuit ( 5 ), the output of which turns the switch transistor (M SW ) off. 
         [0029]    In one embodiment, the invention provides a start up circuit ( 4 - 1 ) for assisting start up of an inductive boost circuit ( 10 ) including a switch transistor (M SW ) having a drain coupled to a first terminal of an inductor (L) which has a second terminal coupled to receive an input voltage (V IN ). The start up circuit ( 4 - 1 ) includes means ( 1 - 2 ) for turning on the switch transistor (M SW ) in response to a first phase of a cycle of oscillator circuitry ( 1 - 2 , 3 ) having an adjustable duty cycle, to cause a build-up of the inductor current (I L ); means ( 9 , 20 ) for coupling a drain voltage (V 9 ) of the switch transistor (M SW ) to an input of amplifier circuitry (A 1 ) to cause a first change in an output of the amplifier circuitry (A 1 ) if the drain voltage (V 9 ) exceeds a predetermined value corresponding to a maximum desired build-up of the inductor current (I L ); means ( 1 - 2 , 20 ) for immediately turning off the switch transistor (M SW ) in response to the first change in the output of amplifier circuitry (A 1 ) by immediately terminating the first phase; means (D) for steering the built-up inductor current (I L ) into a load; and means (R 1 ,R 2 ,C 1 ) for operating the oscillator circuitry ( 1 - 2 , 3 ) to complete a normal second phase of the cycle immediately after the terminating of the first phase. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0030]      FIG. 1  is a schematic diagram of a conventional ring oscillator. 
           [0031]      FIG. 2  is a schematic diagram of a known modification of the ring oscillator of  FIG. 1 . 
           [0032]      FIG. 3  is a schematic diagram of a low voltage start-up circuit including an oscillator in combination with a gate driver and boost converter. 
           [0033]      FIG. 4  is a more detailed schematic diagram of the low-voltage start-up oscillator of  FIG. 3  in combination with the gate driver and boost converter. 
           [0034]      FIG. 5  is a schematic diagram of an implementation of the oscillator of  FIG. 4 . 
           [0035]      FIGS. 6 and 7  are timing diagrams useful in explaining the operation of the circuit of  FIGS. 4 and 5 . 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0036]      FIG. 3  shows a circuit  3 - 1  which includes a start up circuit  4 - 1  that includes the oscillator  1 - 2  of Prior Art  FIG. 2 , a conventional gate driver circuit  5 , an amplifier A 1 , P-channel transistors M 2  and M 3 , and a voltage reference circuit  20 . The output  13  of oscillator  1 - 2  is connected to the input of gate driver circuit  5 . 
         [0037]    As in  FIG. 2 , the output  13  of oscillator  1 - 2  is connected to one plate of capacitor C 0 , the gate of a P-channel transistor M 0 , and the gate of a N-channel transistor M 1 . The other plate of capacitor C 0  is connected by conductor  15  to the input of inverter I 1  and one plate of capacitor C 1 , the other plate of which is connected to ground. The output of inverter I 1  is connected to the input of inverter I 2 , the output of which is connected to conductor  13 . The drain of transistor M 0  is connected by resistor R 1  to conductor  15 , and the source of transistor M 0  is connected to V DD . The drain of transistor M 1  is connected to conductor  15  by resistor R 2 , and the source of transistor M 1  is connected to ground. The gates of transistors M 0  and M 1  are connected to conductor  13 . 
         [0038]    The output of gate driver circuit  5  is connected to the gate of a N-channel switch transistor M SW  of a DC-DC boost converter circuit  10 . Boost converter  10  also includes an inductor L having a lower terminal connected by conductor  9  to the anode of a diode D, the drain of switch transistor M SW , and the (−) input of an amplifier A 1  included in start up circuit  4 - 1 . The upper terminal of inductor L is connected to receive a DC voltage V IN , which could be a DC signal from a solar cell harvester or a rectified output signal produced by a rectifier circuit (not shown) receiving a low frequency, low voltage harvested AC signal from a piezo or induction energy harvester device (not shown). (Note that V DD  can be equal to V IN , and that is how it is shown in  FIGS. 3-5 .) The anode of diode D is connected by conductor  11  to one terminal of a load capacitor CL, the other terminal of which is connected to ground, so that a boosted DC output voltage V OUT  is generated on conductor  11 . (Note that diode D can be implemented by means of a simple active rectifier circuit instead of a single diode, if there is sufficient supply voltage available to operate the comparator of the active rectifier circuit.) Boost converter  10  also includes a conventional control circuit  22  having an input coupled to output conductor  11 , and generates a feedback control signal on conductor  22 A which is connected to the gate of a separate N-channel switch transistor M SW2  coupled between conductor  9  and ground. (Alternatively, the output  22 A of control circuit  22  could be coupled to an input of a multiplexer having another input coupled to the output of gate driver  5  and an output coupled to the gate of switch transistor M SW .) Note that boost converter  10  is off, i.e., not boosting the output voltage V OUT , while the gate of power switch M SW  is being controlled by the start up circuitry, and when boost converter  10  is boosting the output voltage V OUT , start up circuitry  4 - 1  does not control gate of power switch M SW . 
         [0039]    Oscillator output conductor  13  is also connected to the gate of transistor M 2 , which has source connected to V DD  and its drain connected to the source of transistor M 3 . The gate of transistor M 3  is connected to the output of amplifier A 1 , the (+) input of which is connected to the (+) terminal of a voltage reference circuit  20 , the (−) terminal of which is connected to ground, so voltage reference circuit  20  produces a reference voltage V REF  on the (+) input of amplifier A 1 . The drain of transistor M 3  is connected by conductor  15  to the junction between resistors R 1  and R 2  of oscillator  1 - 2 . 
         [0040]    The duty cycle of oscillator circuitry  1 - 2  in  FIG. 3  can be adjusted during operation of start up circuit  3  by varying the charging and discharging currents of capacitors C 0  and C 1 . 
         [0041]    When the current I L  in inductor L increases, that increases the amount of voltage drop across the channel resistance R ON  of power switch transistor M SW  and therefore also increases the drain voltage V 9  of switch transistor M SW . When V 9  exceeds V REF , amplifier A 1  turns transistor M 3  on, which pulls the voltage of conductor  15  toward V DD . That voltage causes a “1” level to, in effect, propagate through inverters  16  and  17  to the input of gate driver  5 , which then turns off switch transistor M SW . This decreases the duty cycle during which switch transistor M SW  is turned on and therefore limits the amount of current through switch transistor M SW , and therefore also limits the maximum level of current I L  in inductor L during start up because of the limited channel resistance R ON  of switch transistor M SW . This protects inductor L from over-current damage and improves its reliability and also improves the circuit operating speed. 
         [0042]      FIG. 4  shows a circuit  3 - 2  which is another implementation of circuitry  3 - 1  in  FIG. 3 . Boost converter  10  in  FIG. 4  is the same as shown in  FIG. 3 . In  FIG. 4 , amplifier A 1  of start up circuit  4 - 2  includes current source  18  and N-channel transistors M 2 , M 3 , and M 4 . Current source  18  provides a constant current I 0  through diode-connected transistor M 4 , the gate and drain of which are connected by conductor  12  to the gate of transistor M 3  and the drain of transistor M 2 . The source of transistor M 3  is connected to the (+) input of amplifier A 1  and the (+) terminal of a voltage reference circuit  20  that generates V REF . The drain of transistor M 3  is connected to conductor  15 . The gate of transistor M 2  is connected to conductor  13 , and its source is connected to ground. The source of diode-connected transistor M 4  is connected by conductor  9  to the (−) input of amplifier A 1  and the drain of switch transistor M SW . The rest of the circuitry in  FIG. 4 , including oscillator  1 - 2 , is the same as in  FIG. 3 , except that gate driver circuit  5  is non-inverting. The overall operation of the circuit in  FIG. 4  also is essentially the same as the operation of circuit  3 - 1  of  FIG. 3 . 
         [0043]      FIG. 5  shows a circuit  3 - 3  which includes a start up circuit  4 - 3  that is somewhat different than start up circuit  4 - 2  of  FIG. 4 . Boost converter  10  as shown in  FIG. 5  is the same as in  FIGS. 3 and 4 . The oscillator circuitry  1 - 3  in  FIG. 5  is quite similar to oscillator circuitry  1 - 2  in  FIGS. 3 and 4 , but includes three inverters  16 ,  21 , and  17  connected in series, rather than two inverters as in  FIGS. 3 and 4 . The input of inverter  16  is connected by conductor  15  to one plate of each of capacitors C 0  and C 1  and to one terminal of each of resistors R 1  and R 2 . The other plate of capacitor C 1  is connected to ground. The other plate of capacitor C 0  is connected by conductor  28  to the gate of P-channel transistor M 0 , the gate of N-channel transistor M 1 , the drain of a N-channel transistor MN 26 , and the drain of a P-channel transistor MP 17 . Transistors MN 26  and MP 17  together form an inverter that drives the gate of transistors M 0  and M 1  of oscillator circuitry  1 - 3 . The sources of transistors M 1  and MN 26  are connected to ground. The drain of transistor M 1  is connected to the other terminal of resistor R 2 . The sources of transistors M 0  and MP 17  are connected to V DD . The drain of transistor M 0  is connected by conductor  15  to the other terminal of resistor R 1 . The sources of transistors M 0  and MP 17  are connected to V DD . 
         [0044]    In the example of  FIG. 5 , there is a total of five series-connected inverting stages in the feedback loop including inverters  16 ,  21 , and  17 , the inverter including P-channel transistor MP 17  and N-channel transistor NN 26 , and the inverting stage including P-channel transistor M 0  and N-channel transistor M 1 . This number of inverting stages was chosen to provide sufficient voltage gain to ensure sustainable oscillation. (Low-threshold transistors are used in the inverter including transistors MP 17  and MN 26 , and standard-threshold transistors are used in the other 4 inverting stages in order to reduce the total amount of shoot-through current during circuit operation.) Inverting gate driver  5 A produces a gate driver voltage signal V 19  on the gate of power switch transistor M SW . 
         [0045]    The output of inverter  17  produces an oscillator output signal V OSC  on conductor  13 , which is connected to the gates of inverter transistors MP 17  and MN 26  and also to the input of inverting gate driver circuit  5 A. 
         [0046]    N-channel transistors M 4  and M 3  form a common gate amplifier A 1  that is analogous to amplifier A 1  in  FIG. 3 . The voltage V 9  on the drain of switch transistor M SW  in  FIG. 5  is applied to the source of diode-connected transistor M 4 , which has its gate coupled to its drain and to the gate of transistor M 3  and the drain of a N-channel transistor MN 7 . The drain of transistor M 4  is coupled by resistor  23  to V DD . The source of transistor M 4  is the (−) input of amplifier A 1 . The drain of transistor M 3  is coupled to conductor  15 , which is connected to the junction between resistors R 1  and R 2  of oscillator circuitry  1 - 3 . The source of transistor M 3  is the (+) input of amplifier A 1 , and is connected to ground. The source of transistor MN 7  is connected to ground and its gate is connected by conductor  29  to the output of inverter  16  and the input of inverter  21 . The output of inverter  21  is connected to the input of inverter  17 . Transistor MN 7  operates to shut down the duty-cycle-controlling circuitry when switch transistor M is to be turned off. That is, transistor MN 7  is in its turned on condition when switch transistor M SW  is off so its drain voltage V 9  is high and inductor current is being steered through diode D. 
         [0047]    The function of V REF  voltage source  20  in  FIGS. 3 and 4  is accomplished in  FIG. 5  by providing transistor M 4  with a larger channel-width-to-channel-length ratio than for transistor M 3 , so that amplifier A 1  in  FIG. 5  has an internal input offset voltage equal to V REF . 
         [0048]    Start up circuitry  4 - 3  of  FIG. 5  normally operates as indicated in the following example, wherein the duty cycle of oscillator circuitry  1 - 3  and switch transistor M SW  is selected to be 5. This duty cycle means the “on” time of switch transistor M SW  is much longer than its “off” time. When switch transistor M SW  is turned on, it starts to integrate the inductor current I L  (by causing a build-up of I L  in inductor L, depending on the magnitude of V IN ). When I L  increases to a particular value determined by the above-mentioned threshold voltage and the “on” resistance R ON  of switch transistor M SW , start up circuitry  4 - 3  turns switch transistor M SW  off. Specifically, up circuitry  4 - 3  turns switch transistor M SW  off by causing transistor M 3  to pull the voltage on conductor  15  toward ground. This transition causes the low or “0” level on conductor  15  to be inverted 3 times by inverters  16 ,  21 , and  17  to produce a “1” level on the input of inverting gate driver  5 A. This generates a low “0” level on the gate of switch transistor M SW , thereby turning it off. This causes the inductor current I L  to be steered through diode D to the load, which may include a battery being charged. Note that if the input voltage V IN  is substantially increased, then inductor current I L  increases much faster, and if the value of inductor current I L  becomes too large, it may exceed the current-carrying capability and reliability limits of switch transistor M SW  and/or inductor L. 
         [0049]    To prevent this, the present invention reduces the “on” time of switch transistor M SW  (and therefore decreases the duty cycle) if the drain voltage V 9  of M SW  exceeds the above mentioned threshold voltage. After capacitor C 2  has been discharged through resistor R 2  to the switching threshold of inverter  16 , start up circuitry  4 - 3  starts the next oscillator cycle by turning M SW  on again. In this manner, the duty cycle of the oscillator circuitry  1 - 3  can be, in effect, adjusted “on-the-fly” to a value anywhere between, for example, 10 and 1 as necessary to prevent inductor current I L  becoming too large in response to large values of V IN . 
         [0050]    To summarize, low input voltage start up of boost converter  10  is accomplished by providing oscillator circuitry  1 - 3  with a varying duty cycle by varying the gate drive voltage V 19  in order to adjust the channel resistance R ON  of switch transistor M SW , and hence the voltage drop across R ON . Furthermore, and in contrast to the prior art, the invention provides feedback V 9  representative of the magnitude of the inductor current I L  to start up circuitry  4 - 3  prior to activation of the error amplifier A 1  formed by transistors M 4  and M 3 . This speeds up the start up operation, avoids overloading of inductor L and/or switch transistor M SW  with too much current and thus improves the reliability of inductor L and/or switch transistor M SW , and also improves energy efficiency of the start up operation. 
         [0051]    It should be appreciated that the conventional expedient of using non-overlapping clock signals (not shown) can be employed to prevent or reduce shoot-through currents in the CMOS circuitry to further improve energy efficiency. 
         [0052]      FIG. 6  shows simulated waveforms for the circuit of  FIG. 5  for the case when both V IN  and V DD  are equal to 0.5 volts. In  FIG. 6 , the V 19  waveform represents the gate voltage of switch transistor M SW , and the V 9  waveform represents the voltage at the drain of switch transistor M SW . The middle waveform in  FIG. 6  represents the inductor current I L . The simulated bottom waveform represents the total current consumption of gate driver circuit  5 . The V 9  waveform begins to increase when switch transistor M SW  is initially turned on in response to V 19 . The I L  waveform then starts to increase. At some point, the drain voltage V 9  of switch transistor M SW  reaches the above mentioned threshold of 100 to 200 millivolts, and at that moment start up circuitry  4 - 3  operates to stop charging inductor L (i.e., to stop further increases in I L ) by turning off switch transistor M SW . This causes the drain voltage waveform V 9  to increase sharply. During this time, inductor current I L  is steered through diode D to the battery (not shown) or load capacitor. Start up circuitry  4 - 3  then waits until capacitor C 1  is charged through resistor R 1  to threshold voltage of inverter I 1 , at which time the next oscillation cycle begins. 
         [0053]    The simulated waveforms shown in  FIG. 7  are somewhat similar to those in  FIG. 6 , for the case in which both V DD  and V IN  are equal to 0.4 volts. It can be seen from the V 9  waveform of  FIG. 7  that the current integration takes much longer than in  FIG. 6 , resulting in a total value of the duty cycle for  FIG. 7  that is much higher, and hence the amount of energy delivered to the battery in the case of  FIG. 7  is much smaller than for the case shown by  FIG. 6 . This is because the inductor L saturates in the case shown in  FIG. 7 , as indicated by the I L  waveform. 
         [0054]    The invention provides a simple, very low cost way of increasing the reliability and efficiency of the boost converter or battery charger start up circuit. The described embodiments of the invention include the combination of the oscillator with the switch transistor, inductor, and diode of a boost converter, and provide additional negative feedback that decreases the duty cycle of the switch transistor M SW  when the switch current, and hence also the inductor current I L  reaches a predetermined threshold value. However, the start up circuitry could be in conjunction with start up of circuits other than boost converters. 
         [0055]    While the invention has been described with reference to several particular embodiments thereof, those skilled in the art will be able to make various modifications to the described embodiments of the invention without departing from its true spirit and scope. It is intended that all elements or steps which are insubstantially different from those recited in the claims but perform substantially the same functions, respectively, in substantially the same way to achieve the same result as what is claimed are within the scope of the invention. Although the described embodiments of the invention provide start up circuitry which operates from very low voltage, low-frequency AC input signals applied to a boost converter, the start up circuitry could be operated in conjunction with any circuit that needs to start up from a very low (e.g. 400 millivolt) input signal.