Abstract:
A protection circuit applied to a convertor including M pieces of driving switch modules each coupled to a power source, a load and one of M sets of driving signals. The ith driving switch module is controlled by the ith set of driving signals to selectively enable current paths between the power source and the load. A first sub protection circuit in the protection circuit includes a first protection switch module and a first detection module coupled to the first protection switch module. When the ith set of driving signals indicates an error event, the first protection switch module selectively couples the ith set of driving signals to a reference voltage according to a first detection signal. M and i are positive integers, and i is not larger than M.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This non-provisional application claims priority under 35 U.S.C. §119(a) on Patent Application No(s). 104133010 filed in Taiwan, R.O.C. on Oct. 7, 2015, the entire contents of which are hereby incorporated by reference. 
       TECHNICAL FIELD 
       [0002]    The disclosure relates to a protection circuit. 
       BACKGROUND 
       [0003]    Recently matrix conversion devices have been progressively attracting public attention. The so-called matrix conversion device is a power conversion device capable of directly converting three-phase AC power into another AC power having any voltage and frequency without converting AC power into DC power. Therefore, a matrix convertor has a smaller size, less components, and lower manufacture costs. Because of these properties, matrix convertors progressively become prevalent in the fields requiring rigid usage conditions, such as energy conservation or low noise. 
         [0004]    Generally, a matrix conversion device requires accurate time sequence control in order to switch on or off every switch at the right time. When an error occurs on the time sequence of any driving signal or when noises cause the offset of the potential of any driving signal, it will influence the performance of the matrix convertor and even cause short-circuits damaging circuits. 
       SUMMARY 
       [0005]    According to one or more embodiments, the disclosure provides a protection circuit applied to a convertor including M pieces of driving switch modules coupled to a power source, a load, and M sets of driving signals. The ith driving switch module is controlled by the ith set of driving signals to selectively enable an ith set of current paths between the power source and the load. The protection circuit includes a first sub protection circuit and a first detection module. The first protection switch module selectively couples the ith set of driving signals to a reference voltage according to a first detection signal. The first detection module is coupled to the first protection switch module. When the ith set of driving signals indicate an error event, the first detection module generates the first detection signal according to the ith set of driving signals. M and i are positive integers, and i is not larger than M. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0006]    The present disclosure will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only and thus are not limitative of the present disclosure and wherein: 
           [0007]      FIG. 1  is a functional block diagram of a protection circuit with respect to a convertor in an embodiment; 
           [0008]      FIG. 2  is a functional block diagram of the structure of a protection circuit; 
           [0009]      FIG. 3A  is a schematic circuit diagram of a protection circuit in an embodiment; 
           [0010]      FIG. 3B  is a schematic circuit diagram of a protection circuit in another embodiment; 
           [0011]      FIG. 4A  is a schematic circuit diagram of a protection circuit in another embodiment; 
           [0012]      FIG. 4B  is a schematic circuit diagram of a protection circuit in another embodiment; 
           [0013]      FIG. 5A  is a schematic circuit diagram of a protection circuit in another embodiment; 
           [0014]      FIG. 5B  is a schematic circuit diagram of a protection circuit in another embodiment; 
           [0015]      FIG. 6A  is a schematic circuit diagram of a protection circuit in another embodiment; 
           [0016]      FIG. 6B  is a schematic circuit diagram of a protection circuit in another embodiment. 
       
    
    
     DETAILED DESCRIPTION 
       [0017]    In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawings. 
         [0018]    Please refer to  FIG. 1  and  FIG. 2 .  FIG. 1  is a functional block diagram of a protection circuit with respect to a convertor in an embodiment, and  FIG. 2  is a functional block diagram of the structure of a protection circuit. A protection circuit  1  is applied to a convertor  2 . The convertor  2  includes driving switch modules  21  and  23 . The driving switch modules  21  and  23  are coupled to a power source  3  and a load  4 , and the driving switch modules  21  and  23  are coupled to a set of driving signals  51  and a set of driving signals  53 , respectively. Specifically, the driving switch modules  21  and  23  include driving switches  211  to  215  and driving switches  231  to  235 , respectively. The set of driving signals  51  includes driving signals  511  to  515 , and the set of driving signals  53  includes driving signals  531  to  535 . The driving switch modules  21  and  23  are controlled by the sets of driving signals  51  and  53  respectively to selectively enable multiple sets of current paths between the power source  3  and the load  4 . In an example with respect to the driving switch module  21 , the driving switch  211  is controlled by the driving signal  511  in the set of driving signals  51  to selectively enable one current path of one of multiple sets of current paths between the power source  3  and the load  4 , and the driving switch  213  is controlled by the driving signal  513  in the set of driving signals  51  to selectively enable one current path of one of the sets of current paths between the power source  3  and the load  4 . A person skilled in the art can deduce the relationship between other driving switches and driving signals, and the disclosure will have no limitation in it. 
         [0019]    The convertor  2  is, for example, not limited to a matrix convertor. All convertors having multi-phase and multi-arm and being capable of converting energy of a power source into energy of another power source can be applied to the protection circuit in the disclosure. Likewise, the load  4  is, for example, not limited to a DC load or an AC load. The power source  3  is, for example, not limited to a DC power source or an AC power source. The following embodiments are described based on that a matrix convertor used as the convertor  2 , an AC three-phase power source used as the power source  3 , a DC load used as the load  4 . Likewise, although the following embodiments are described based on the set of driving signals  51  and  53 , the disclosure has no limitation on the number of sets of driving signals and the number of driving signals in each set. 
         [0020]    The protection circuit  1  includes a first sub protection circuit  11  and a second sub protection circuit  13 . Similarly, the number of sub protection circuits will not be limited, and the first sub protection circuit  11  and the second sub protection circuit  13  are exemplarily described as follows. The first sub protection circuit  11  includes a first protection switch module  111  and a first detection module  113 . The first detection module  113  is coupled to the first protection switch module  111 . When the set of driving signals  51  indicate that an error event occurs, the first protection switch module  111  selectively couples the set of driving signals  51  to a reference voltage according to a first detection signal Si. In an embodiment, the first detection module  113  determines a value specified by the set of driving signals  51  and then selectively the output terminals of relevant circuits for the set of driving signals  51  to the reference voltage. The error event herein indicates, for example but not limited to, that any error occurs on the time sequences of the driving signals  511  to  515  in the set of driving signals  51  or to that any potential offset occurs on the driving signals  511  to  515 , and the error event will be described in detail later. 
         [0021]    Please refer to  FIG. 3A  to describe the protection circuit in detail.  FIG. 3A  is a schematic circuit diagram of a protection circuit in an embodiment. A first detection module  11   a  includes a NOR gate  1111   a  and a first logic gate  1113   a.  The NOR gate  1111   a  is coupled to the first logic gate  1113   a.  The first protection switch module  113   a  includes protection switches  1131   a - 1135   a.  The NOR gate  1111   a  generates a first logic signal L 1   a  according to the driving signals  511  to  515 , and the first logic gate  1113   a  generates a first detection signal S 1   a  according to the first logic signal L 1   a . The control terminals of the protection switches  1131   a  to  1135   a  are coupled to the output terminal of the first logic gate  1113   a  so the protection switches  1131   a  to  1135   a  selectively couple the driving signals  511  to  515  to the reference voltage according to the first detection signal S 1   a . In this embodiment, the driving signals  511  to  515  are, for example, not limited to be selectively coupled to the ground end. 
         [0022]    In this embodiment, the first logic gate  1113   a  is a NOT gate so the first detection signal S 1   a  is opposite to the first logic signal L 1   a . For the NOR gate  1111   a , when only one of the driving signals  511  to  513  is at a high voltage, the first logic signal L 1   a  is at a high voltage. Therefore, when all the driving signals  511  to  513  are simultaneously at low voltage potential, or when at least two of the driving signals  511  to  513  are simultaneously at a high voltage, the first logic signal L 1   a  is at low voltage potential. Herein, since the first detection signal S 1   a  is opposite to the first logic signal L 1   a , the first detection signal S 1   a  is at high voltage potential, which leads to the turned on of the protection switches  1131   a  to  1135   a , which couple the driving signals  511  to  513  to the ground end. 
         [0023]    In another aspect, when all the driving signals  511  to  513  are simultaneously at low voltage potential, since the driving switches  211  to  215  are turned off, coupling the driving signals  511  to  513  to the ground end by the protection circuit  1  will not affect the original operation of the convertor  2 . However, when at least two of the driving signals  511  to  513  are at high voltage potential, it means that at least two of the driving switches  211  to  215  will simultaneously be turned on. Herein, at least two of three phase output terminals of the power source  3  are short-circuited, resulting in the occurrence of errors or damages on circuits. Accordingly, when at least two of the driving signals  511  to  513  are at high voltage potential at the same time, the protection circuit  1  couples the driving signals  511  to  513  to the ground end in order to avoid the occurrence of the short circuit on the three phase output terminals of the power source  3  and the occurrence of any false action on the relevant circuits. 
         [0024]    Note that, as described in  FIG. 3A , when the first detection signal S 1   a  is at high voltage potential, the protection switches  1131   a  to  1135   a  are turned on; when the driving signals  511  to  515  and  531  to  535  are at high voltage potential, the driving switches  211  to  215  and  231  to  235  are turned on in pairs. This operation will be described in detail later. Other embodiments may be contemplated in which the protection switches  1131   a  to  1135   a  and the driving switches  211  to  215  and  231  to  235  are turned on in response to the low voltage potential. Those skilled in the art can readily use the disclosed conception and specific embodiments as a basis for designing or modifying the related circuit structure for carrying out the same purposes of the present invention, and the related circuit structure will not be limited by the exemplary embodiments in the disclosure. 
         [0025]    Moreover, the protection circuit provided in the disclosure may further avoid the overcurrent on the load  4 . Please refer to  FIG. 3B .  FIG. 3B  is a schematic circuit diagram of a protection circuit in another embodiment. The first detection module  111   b  further selects one or more of the driving signals  511  to  515  to couple the selected one or more driving signals to the ground end according to an overcurrent detection signal  6  transmitted from the load  4 . In details, the first detection module  111   b  further includes a second logic gate  1115   b  which is coupled to the first logic gate  1113   b.  The second logic gate  1115   b  generates a second logic signal L 2  according to the overcurrent detection signal  6 . In this embodiment, the first logic gate  1113   b  generates the first detection signal S 1   b  according to the first logic signal L 1   b  and the second logic signal L 2   b.  For example, the first logic gate  1113   b  is a NAND gate, and the second logic gate  1115   b  is a NOT gate. Other embodiments may be contemplated in which the first logic gate  1113   b  and the second logic gate  1115   b  can be replaced by other circuits having the same input and output as the first logic gate  1113   b  and the second logic gate  1115   b , respectively. 
         [0026]    The previous description relates to a single sub protection circuit. In practice, as shown in  FIG. 2 , the protection circuit in the disclosure can include multiple sub protection circuits, and the sub protection circuits are capable of interlocking each other for more rigorous protection control. Please refer to  FIG. 4A .  FIG. 4A  is a schematic circuit diagram of a protection circuit in another embodiment. A protection circuit  1   c  includes a first sub protection circuit  11   c  and a second sub protection circuit  13   c.  The first sub protection circuit  11   c  is coupled to the second sub protection circuit  13   c.  The second sub protection circuit  13   c  includes a second detection module  131   c  and a second protection switch module  133   c.  The second detection module  131   c  includes an exclusive-OR (XOR) gate  1311   c , a third logic gate  1313   c , and a fourth logic gate  1315   c.  The second protection switch module  133   c  includes protection switches  1331   c  to  1335   c.  The first sub protection circuit  11   c  and the second sub protection circuit  13   c  have similar circuit structure and operation, and these similar parts will not be repeated hereinafter. 
         [0027]    The output terminal of the first detection module  111   c  in the first sub protection circuit  11   c  is coupled to the second detection module  131   c  in the second sub protection circuit  13   c , and the output terminal of the second detection module  131   c  in the second sub protection circuit  13   c  is coupled to the first detection module  111   c  in the first sub protection circuit  11   c . The first detection module  111   c  further generates a first detection signal S 1   c  according to a second detection signal S 2   c  generated by the second detection module  131   c , and the second detection module  131   c  further generates the second detection signal S 2   c  according to the first detection signal S 1   c  generated by the first detection module  111   c.    
         [0028]    For the operation of the first detection module  111   c , the second logic gate  1115   c  in the first detection module  111   c  generates a second logic signal L 2   c  according to the second detection signal S 2   c , and the first logic gate  1113   c  generates the first detection signal S 1   c  according to the first logic signal L 1   c  and the second logic signal L 2   c.  In this embodiment, the first logic gate  1113   c  is a NAND gate, and the second logic gate  1115   c  is a NOT gate. In other words, when the second detection signal S 2   c  is at high voltage potential, the first detection signal S 1   c  becomes high voltage potential. Herein, the protection switches  1131   c  to  1135   c  in the first protection switch module  113   c  and the protection switches  1331   c  to  1335   c  in the second protection switch module  133   c  are turned on so that the driving signals  511  to  515  and  531  to  535  are coupled to the ground end. Similarly, when the first detection signal S 1   c  is at high voltage potential, the protection switches  1131   c  to  1135   c  in the first protection switch module  113   c  and the protection switches  1331   c  to  1335   c  in the second protection switch module  133   c  are turned on. In view of another aspect, only if one of the sets of driving signals  51  and  53  indicates the occurrence of an error event are all the sets of driving signals  51  and  53  coupled to the ground end. Herein, none of the driving switches  211  to  215  and  231  to  235  is turned on in order to rigorously avoid false actions in circuits. 
         [0029]    Also, the first sub protection circuit may further selectively couple one or more driving signals to the ground end according to the operation of the second sub protection circuit and the overcurrent detection signal. Please refer to  FIG. 4B .  FIG. 4B  is a schematic circuit diagram of a protection circuit in another embodiment. As described in the drawing, second logic gates  1115   d  and  1315   d  generate first logic signals L 1   d  and L 3   d  according to an overcurrent detection signal  6  transmitted from the load  4 , respectively. In this embodiment, the first logic gates  1113   d  and  1313   d  are, for example, not limited to NAND gates, and the second logic gates  1115   d  and  1315   d  are, for example, not limited to NOR gates. For the first sub protection circuit  11   d , when at least two of the driving signals  511  to  515  are at high voltage potential, or when either the overcurrent detection signal  6  or the second detection signal S 2   d  is at high voltage potential, the first detection signal S 1   d  will become high voltage potential. Herein, the second detection signal S 2   d  also becomes high voltage potential, and the driving signals  511  to  515  in the set of driving signals  51  and the driving signals  531  to  535  in the set of driving signals  53  are coupled to the ground end through the turned-on protection switches  1131   d  to  1135   d  and  1331   d  to  1335   d.    
         [0030]    In another embodiment, the first detection module is a single NOR gate, as shown in  FIG. 5A .  FIG. 5A  is a schematic circuit diagram of a protection circuit in another embodiment. A first detection module  111   e  is an XNOR gate, and the first detection module  111   e  generates a first detection signal S 1   e  according to the driving signals  511  to  515  and a second detection signal S 2   e.  Similar to the previous one or more embodiments, when the driving signals  511  to  515  indicate that an error event occurs on the load  4 , the first sub protection circuit  11   e  will also selectively couple the driving signals  511  to  515  to the ground end according to the driving signals  511  to  515 . Furthermore, the first sub protection circuit  11   e  and other sub protection circuits can interlock each other so only if one of sets of driving signals indicates the occurrence of an error event will all driving signals be coupled to the ground end, so as to avoid false actions in circuits. 
         [0031]    Moreover, the protection circuit  1   e  further includes multiple output stages  71   e  to  75   e . The output stages  71   e  to  75   e  drive the driving switches  211  to  215  according to the driving signals  511  to  515 , respectively in order to selectively turn on one or more current paths between the power source  3  and the load  4 . In an exemplary description with respect to the output stage  71   e , as described in  FIG. 5A , the output stage  71   e  includes a first transistor  711   e  and a second transistor  713   e.  The first transistor  711   e  is a PNP bipolar junction transistor, and the second transistor  713   e  is a NPN bipolar junction transistor. The emitter of the first transistor  711   e  is coupled to the driving switch  211 , the collector of the first transistor  711   e  is coupled to the high voltage potential, and the base of the first transistor  711   e  is coupled to the driving signal  511 . The emitter of the second transistor  713   e  is coupled to the reference voltage, the collector of the second transistor  713   e  is coupled to the emitter of the first transistor  711   e  and the driving switch  211 , and the base of the second transistor  713   e  is coupled to the driving signal  511  and the base of the first transistor  711   e.    
         [0032]    Please refer to  FIG. 5B .  FIG. 5B  is a schematic circuit diagram of a protection circuit in another embodiment. An exemplary embodiment with respect to the first sub protection circuit  11   f  is described as follows in which the first sub protection circuit  11   f  selectively couples the driving signals  511  to  515  to the ground end according to the overcurrent detection signal  6 . Specifically, the overcurrent detection signal  6  is a control terminal applied to the protection switches  1131   f  to  1135   f  in the protection switch module  113   f . When the overcurrent detection signal  6  indicates that an overcurrent event occurs, the protection switches  1131   f  to  1135   f  are turned on. In this embodiment, the overcurrent detection signal  6 , indicating that an overcurrent event occurs, is at high voltage potential. Moreover, since the sub protection circuits can interlock each other, when the first sub protection circuit  11   f  couples the driving signals  511  to  515  to the ground end, other sub protection circuits also couple their respective driving signals to the ground end. The related detailed description can be referred to the aforementioned embodiments and thus, will not be repeated hereinafter. 
         [0033]    Moreover, other embodiments with respect to the output stages of the protection circuit are described below. 
         [0034]    Please refer to  FIG. 6A .  FIG. 6A  is a schematic circuit diagram of a protection circuit in another embodiment. A sub protection circuit  11   g  has a structure similar to the embodiment shown in  FIG. 5A . Each of the output stages  71   g  and  75   g  in  FIG. 6A  includes optical couplers  715   g ,  717   g  and  719   g  and a resistor  716   g.  The optical coupler  715   g  functions as an emitting terminal, and the optical couplers  717   g  and  719   g  function as receiving terminals. The optical coupler  715   g  is coupled to the driving signal  511  and is coupled to the high voltage potential through the resistor  716   g.  The optical couplers  717   g  and  719   g  are coupled to the driving switch  211 . The optical coupler  715   g  outputs a light signal to the optical couplers  717   g  and  719   g  according to the driving signal  511  in order to selectively turn on the driving switch  211 . 
         [0035]    Please refer to  FIG. 6B .  FIG. 6B  is a schematic circuit diagram of a protection circuit in another embodiment. A protection circuit  1   h  includes the same structure of the output stage shown in  FIG. 6A  and selectively couples the driving signals  511  to  515  to the ground end according to the overcurrent detection signal  6 . The details description of the protection circuit  1   h  can be referred to the aforementioned embodiments and thus, will not be repeated hereinafter. 
         [0036]    In view of the embodiments of the protection circuit in the disclosure, when at least two driving signals in the same set of driving signals simultaneously indicate one or more current paths to be enabled between a power source and a load, a sub protection circuit in the protection circuit couples all driving signals in the set of driving signals to the ground end. Moreover, the protection circuit may have more sub protection circuits which can interlock each other. Therefore, when a set of driving signals indicating the occurrence of an error event is coupled to the ground end, other sets of driving signals are also coupled to the ground end in order to avoid accidental false actions in circuits. In addition, the sub protection circuits in the protection circuit may further interlock each other according to an overcurrent detection signal transmitted from the load in order to avoid the overload on the load. Also, the persons skilled in the art should understand that although the above embodiments are exemplified by a matrix convertor, the protection circuit in the disclosure can be applied to any conversion circuit or any control circuit, which has multiple phases and multiple arms. The disclosure may have a better practicability.