Abstract:
A computer implemented method and an apparatus for generating exposure data of a layout pattern used to fabricate semiconductor integrated circuits. The layout pattern is first analyzed to determine if it can be modified to one or more predefined patterns without having to segment the layout pattern into rectangular patterns. The layout pattern is then modified to the one or more predefined patterns. The modified pattern is also analyzed to determine if it can be modified into segmental block patterns and if so, it is modified accordingly. Finally, exposure data is generated using the modified segmental block patterns.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates to semiconductors, and, more particularly, to method and apparatus for generating exposure data of use in a design pattern of a semiconductor integrated circuit on an exposure medium. 
     FIG. 1 is a schematic diagram of an electron beam (EB) exposure apparatus. The EB exposure apparatus has a stencil mask (or block mask)  12  and a plate  11  having a rectangular opening  13 . As shown in FIG. 2, the stencil mask  12  has a plurality of first transmission apertures  14  having rectangular shapes, and a plurality of block areas  15 . 
     Second transmission apertures  16  are formed in some block areas  15 , and third transmission apertures  17  are formed in the other block areas  15 . The second transmission apertures  16  take the shapes of “recursive patterns” which are acquired by extracting common portions from layout pattern data of LSI circuits. The recursive patterns include plural kinds of patterns. The block areas  15  in which the second transmission apertures  16  are formed are called “recursive blocks”. The third transmission apertures  17  take the shapes of predetermined “segmental patterns” including oblique sides. That is, segmental patterns include oblique sides corresponding to the size of the block areas  15 . The block areas  15  in which the third transmission apertures  17  are formed are called “segmental blocks”. 
     Referring again to FIG. 1, an electron beam  10  is deflected by a first electromagnetic deflector  19  before passing the plate  11 . The electron beam  10  is then deflected by a second electromagnetic deflector  20  before passing any one of the first to third transmission apertures  14 - 17  of the stencil mask  12 . Accordingly, the cross-sectional shape of the electron beam  10  or the shape of its exposure pattern is changed. The electron beam  10  after it has passed the stencil mask  12  is further deflected by a third electromagnetic deflector  21 . As a platform or stage  22  is moved along the X and Y axes, a desired pattern is exposed on a predetermined area of a wafer  23  located on the stage  22 . 
     The size of a rectangular pattern exposed on the wafer  23  is determined by adjusting the degree of overlapping of the beam passing through the plate  11  with the associated first transmission aperture  14 . This exposure scheme is called a variable rectangular system. As the electron beam  10  passes any second transmission aperture  16 , the associated recursive pattern is exposed by a single shot. In a block exposure scheme using “recursive blocks”, the third electromagnetic deflector  21  and the stage  22  are controlled to expose recursive patterns of the same shape on a plurality of areas of the wafer  23 . As this block exposure involves fewer shots, the exposure time is decreased. In a block exposure scheme using “segmental blocks”, as an electron beam passes any third transmission aperture  17 , the associated segmental pattern is exposed by a single shot. Combining some segmental patterns permit a pattern of a desired shape to be exposed on the wafer. 
     As shown in FIG. 3A, in a case where the variable rectangular system is used to expose a pattern with an oblique side  24 , on a wafer  23 , for example, the pattern is formed by shooting a plurality of rectangular patterns  25  at a time. This scheme however increases the number of shots and elongates the exposure time. Further, this scheme exposes the oblique side  24  of the pattern in a stepwise form. To make the oblique side  24  as straight a line as possible, the rectangular patterns  25  constituting the pattern should have relatively narrow widths. This approach would result in an undesirable increase in the number of rectangular patterns  25  or the number of shots. 
     FIG. 3B shows a pattern formed by combining triangular patterns  26   a  and  26   b  and rectangular patterns  27   a  and  27   b  to improve the linearity of the oblique side  24  of the pattern. The triangular patterns  26   a  and  26   b  are formed by the third transmission aperture  17  formed in the stencil mask  12 . The third transmission aperture  17  has a right-triangular shape including an oblique side which has the same inclination as the oblique side  24  of the pattern. The pattern can be formed with fewer shots than is required by the scheme in FIG. 3A by individually shooting the triangular patterns  26   a  and  26   b  and the rectangular patterns  27   a  and  27   b . The triangular pattern  26   b  having a relatively small size is obtained by adjusting the degree of overlapping of the beam  10 , which has passed the plate  11 , with the associated third transmission aperture  17 . The rectangular patterns  27   a  and  27   b  are obtained by adjusting the degree of overlapping of the beam  10 , which has passed the plate  11 , with the associated first transmission aperture  14 . 
     An exposure data generating apparatus receives layout pattern data from a CAD system (not shown) and performs a graphics process on the layout pattern data. The graphics process includes a sizing process, a shrinking process and a rounding process which converts the coordinates of the layout pattern data to the grids (coordinates) of data the exposure apparatus handles. The exposure data generating apparatus then determines if exposure using the layout patterns on the stencil mask  12  is possible. Exposable layout patterns include, for example, a rectangular pattern  29   a  in FIG. 4A, right-triangular patterns  29   b  to  29   e  in FIG. 4B, parallelogram patterns  29   f  to  2   i  in FIGS. 4C and 4D, trapezoidal patterns  29   j  to  29   n  in FIGS. 4E and 4F and the patterns of the third transmission apertures  17  shown in FIG.  2 . When exposure is possible, the exposure data generating apparatus converts the format of the layout pattern data to an adequate format for the exposure apparatus. 
     Patterns that cannot be exposed using the patterns on the stencil mask  12  are layout patterns which do not include horizontal and/or vertical sides. The exposure data generating apparatus segments such layout pattern data to produce plural pieces of rectangular pattern data. The exposure data generating apparatus then performs format conversion on the plural pieces of rectangular pattern data and supplies the converted rectangular pattern data to the exposure apparatus. The exposure apparatus carries out divided shot exposure using a plurality of rectangular patterns instead of the patterns on the stencil mask  12 . 
     Depending on the shapes of the layout pattern, the layout pattern data after the graphics process may differ from the layout pattern data before the graphics process. This difference or error leads to an incoincidence between the coordinates of the layout pattern data before processing (format conversion) and the coordinates of the layout pattern data after processing. This leads to a probable case where although the original layout pattern is exposable using the patterns on the stencil mask  12 , exposure is actually conducted using plural pieces of rectangular pattern data. This increases the number of shots by the exposure apparatus, increasing the exposure time for a single wafer. Particularly, specific triangular layout patterns excluding triangles having one angle of approximately 45 degrees are likely to be affected by the error. That is, since the graphics process may cause the inclination of the oblique side of a triangle to be varied by the error, the pattern data of the third transmission apertures  17  previously prepared cannot be used for such a specific triangular layout pattern. Therefore, exposure is executed using plural pieces of rectangular pattern data in place of the pattern data of the third transmission apertures  17 . This results in an increased number of shots by the exposure apparatus. 
     Accordingly, it is an objective of the present invention to provide an efficient exposure data generating method and apparatus capable of decreasing the exposure time. 
     SUMMARY OF THE INVENTION 
     In one aspect of the present invention, a method for generating exposure data for use in exposing a layout pattern of a semiconductor integrated circuit on a medium using a mask having a plurality of segmental block patterns of predetermined shapes is provided. The method includes the step of performing a first determining step to determine whether the layout pattern can be modified to one or more predetermined exposable patterns without segmenting the layout pattern into a plurality of rectangular patterns. A first modifying step is performed to modify the layout pattern to the one or more predetermined exposable patterns when modification is determined as being possible in the first determining step. A second determining step is performed to determine whether the modified one or more predetermined exposable patterns can be modified to segmental block patterns. A second modifying step is performed to modify the modified one or more predetermined exposable patterns to the segmental block patterns when modification is determined as being possible in the second determining step. A generating step is performed to exposure data using the modified segmental block patterns. 
     In another aspect of the present invention, an exposure data generating apparatus exposes a layout pattern of a semiconductor integrated circuit on a medium using a mask having a plurality of segmental block patterns of predetermined shapes. The apparatus includes a memory unit having a segmental block pattern data file and a first pattern data file in which layout pattern data is stored. The processing unit, which is connected to the memory unit, receives the layout pattern data from the first pattern data file and processes the layout pattern data to generate exposure data. The processing unit includes first means for determining whether the layout pattern can be modified to one or more predetermined exposable patterns without segmenting the layout pattern into a plurality of rectangular patterns. First modifying means modifies the layout pattern to the one or more predetermined exposable patterns when modification is determined as possible in the first determining means. Second determining means determines whether the modified one or more predetermined exposable patterns can be modified to segmental block patterns. Second modifying means modifies the modified one or more predetermined exposable patterns to the segmental block patterns when modification is determined as being possible in the second determining means. Generating means generates exposure data using the modified segmental block patterns. 
     In yet another aspect of the present invention, a computer readable recording medium has a program code recorded thereon to generate exposure data for exposing a layout pattern of a semiconductor integrated circuit on a target medium using a mask having a plurality of segmental block patterns of predetermined shapes. The program code includes first means for determining whether the layout pattern can be modified to one or more predetermined exposable patterns without segmenting the layout pattern into a plurality of rectangular patterns. First modifying means modifies the layout pattern to one or more predetermined exposable patterns when modification is determined as being possible in the first determining means. Second determining means determines whether the modified one or more predetermined exposable patterns can be modified to segmental block patterns. Second modifying means modifies the modified one or more predetermined exposable patterns to the segmental block patterns when modification is determined as being possible in the second determining means. Generating means generates exposure data using the modified segmental block patterns. 
     Other aspects and advantages of the invention will become apparent from the following description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention, together with objects and advantages thereof, may best be understood by reference to the following description of the presently preferred embodiments together with the accompanying drawings in which: 
     FIG. 1 is a schematic diagram of a conventional block exposure apparatus; 
     FIG. 2 is a plan view of a stencil mask used by the exposure apparatus in FIG. 1; 
     FIGS. 3A and 3B illustrate a conventional exposure data generating process; 
     FIGS. 4A through 4F show various kinds of patterns which can be exposed by the exposure apparatus; 
     FIG. 5 is a flowchart illustrating an exposure data generating process according to a first embodiment of the present invention; 
     FIG. 6 is a flowchart of a modification process of the process shown in FIG. 5; 
     FIG. 7 is a schematic block diagram of an exposure data generating apparatus in accordance with the present invention; 
     FIGS. 8A and 8B are explanatory diagrams of a process of computing the amount of change included in the modification process shown in FIG. 6; 
     FIG. 9A shows the format of recursive block pattern data, FIG. 9B shows the format of segmental block pattern data, and FIG. 9C shows the format of original pattern data; 
     FIG. 10 depicts block patterns registered in the exposure data generating apparatus of FIG. 7; 
     FIGS. 11A through 11C illustrate a modification process for a triangular pattern; 
     FIG. 12 shows the format of the triangular pattern data of FIG. 11C; 
     FIGS. 13A through 13D illustrate a modification process for a rectangular pattern; 
     FIG. 14 shows the format of the pattern data of FIG. 13D; 
     FIG. 15 is a flowchart of a modification process for a triangular pattern; 
     FIGS. 16A through 16D illustrate a modification process for a first example of a triangular pattern according to the flowchart of FIG. 15; 
     FIG. 17 shows the format of the pattern data of FIG. 16D; 
     FIGS. 18A and 18B depict a modification process for a second example of triangular pattern in accordance with the flowchart of FIG. 15; 
     FIGS. 19A through 19D show a modification process for a third example of a triangular pattern in accordance with the flowchart of FIG. 15; 
     FIG. 20 shows the format of the pattern data of FIG. 19D; 
     FIG. 21 is a flowchart of a first variation of a modification process for a rectangular pattern; 
     FIGS. 22A through 22F illustrate a modification process for a first example of a rectangular pattern in according to the flowchart in FIG. 21; 
     FIG. 23 shows the format of the pattern data of FIG. 22F; 
     FIGS. 24A and 24B depict a second example of a modification process for a rectangular pattern in accordance with the flowchart of FIG. 21; 
     FIGS. 25A and 25B show a modification process for a third example of a rectangular pattern in accordance with the flowchart of FIG. 21; 
     FIG. 26 is a flowchart of a second variation of a modification process for a rectangular pattern; 
     FIGS. 27A through 27D illustrate a modification process for a first example of a rectangular pattern in according to the flowchart of FIG. 26; 
     FIGS. 28A through 28C show the formats of the pattern data of FIG. 27D; 
     FIGS. 29A through 29D depict a modification process for a second example of a rectangular pattern in accordance with the flowchart of FIG. 26; 
     FIGS. 30A through 30C show the formats of the pattern data of FIG. 29D; 
     FIG. 31 is a flowchart of a third variation of a modification process for a rectangular pattern; 
     FIGS. 32A through 32D illustrate a modification process for a first example of a rectangular pattern according to the flowchart in FIG. 31; 
     FIGS. 33A through 33C show the formats of the pattern data in FIG. 32D; 
     FIGS. 34A through 34C depict a modification process for a second example of a rectangular pattern in accordance with the flowchart of FIG. 31; 
     FIGS. 35A and 35B show a modification process for a third example of a rectangular pattern in accordance with the flowchart of FIG. 31; 
     FIG. 36 is a flowchart of a first variation of a process of modifying a triangular or rectangular pattern using a plurality of segmental blocks; 
     FIGS. 37A through 37D illustrate a modification process for a rectangular pattern in a first example according to the flowchart shown in FIG. 36; 
     FIG. 38 shows the format of the pattern data in FIG. 37D; 
     FIGS. 39A through 39D depict a modification process for a triangular pattern in a second example according to the flowchart of FIG. 36; 
     FIGS. 40A and 40B show the formats of the pattern data in FIG. 39D; 
     FIG. 41 is a flowchart of a second variation of a process of modifying a triangular or rectangular pattern using a plurality of segmental blocks; 
     FIGS. 42A through 42C illustrate a modification process for a triangular pattern in a first example according to the flowchart shown in FIG. 41; 
     FIGS. 43A and 43B show the formats of the pattern data of FIG. 42C; 
     FIGS. 44A through 44D depict a modification process for a rectangular pattern in a second example according to the flowchart shown in FIG. 41; 
     FIG. 45 shows the format of the pattern data in FIG. 44D; and 
     FIG. 46 illustrates a modification process involving segmentation of a triangular pattern into a plurality of triangular patterns. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 7 is a schematic block diagram of an exposure data generating apparatus  31  according to the present invention. The exposure data generating apparatus  31  comprises a central processing unit (CPU)  32 , a memory unit  33 , an MT (Magnetic Tape) drive  34 , a terminal unit  35  and a  25  disk drive  36 . The units  33  to  36  are all connected to the CPU  32 . 
     A recording medium such as a magnetic tape (MT)  37  is set in the MT drive  34 . Program data for an exposure data generating process is recorded on the magnetic tape  37 . The CPU  32  reads the program data from the magnetic tape  37  via the MT drive  34  and stores the data on a storage device, such as a disk drive  36 . An operator operates the terminal unit  35  to instruct the CPU  32  to execute the exposure data generating process using the program data. Recording media on which computer software programs are recorded are known by those skill in the art and include at least a semiconductor memory, a floppy disk (FD), a hard disk (HD), optical disks (CD and DVD), magneto-optical disks (MO and MD), a phase change disk (PD) and a magnetic tape. 
     As shown in FIG. 5, the disk drive  36  has first to seventh data files  41  to  47 . The first data file  41  stores design data (layout pattern data) of a semiconductor device (LSI) chip like a memory which includes recursive patterns generated by a CAD system (not shown). The CPU  32  receives pattern data from the first data file  41  and executes an exposure data generating process according to steps S 1  to S 8  using the pattern data. The CPU  32  selectively stores data generated in the exposure data generating process in the second to seventh data files  42 - 47 . 
     The exposure data generating process will now be discussed more specifically. In step S 1 , the CPU  32  receives plural pieces of pattern data from the data file  41  (process data inputting process). 
     Next, the CPU  32  performs predetermined graphics processes (e.g., an OR process, sizing process and resizing process) on all of the pattern data in step S 2 . When layout data of a polygon equal to or greater than a pentagon exists, the CPU  32  carries out a segmentation process, segmenting the layout pattern into a triangular layout pattern and a rectangular layout pattern. The CPU  32  stores the processed layout pattern as intermediate processed data in the second data file  42 . 
     In the next step S 3 , the CPU  32  receives the intermediate processed data from the second data file  42  (intermediate processed data inputting process). 
     In step S 4 , the CPU  32  recognizes and extracts layout pattern data having a recursiveness from the intermediate processed data (recursive data extracting process). The CPU  32  stores the extracted layout pattern data as recursive block data in the fourth data file  44 . The CPU  32  recognizes first layout pattern data excluding the recursive block data from the intermediate processed data and stores that first layout pattern in the third data file  43 . 
     Next, the CPU  32  receives segmental block pattern data to be mounted on the stencil mask  12  of FIG. 2 from the disk drive  36  (segmental block data inputting process) in step S 5 . The segmental block pattern data is stored in advance in the disk drive as control statements  48 . 
     In step S 6 , the CPU  32  receives the first pattern data stored in the third data file  43  and carries out recognition of the first pattern data to determine if the first pattern data is within an allowance value range for a predetermined pattern. Based on the result of the decision, the CPU  32  modifies the first pattern data when the first pattern data is within the allowance value range and stores the modified pattern data as second pattern data in the fifth data file  45  (pattern modification process). 
     Next, the CPU  32  compares the second pattern data with segmental block pattern data and determines based on the comparison result if the second pattern data is modifiable to one or a plurality of segmental block patterns which combined approximate the second pattern data. That is, the CPU  32  determines whether or not one or more segmental block patterns of substantially the same shape as that of the second pattern data can be used in place of the second pattern data. The second pattern data being modifiable, the CPU  32  modifies the second pattern data to segmental block pattern data, and stores the modified segmental block pattern data in the sixth data file  46 . Modification of the second pattern data to segmental block pattern data can ensure exposure using segmental blocks. This allows exposure to be implemented with fewer shots than the conventional exposure scheme that uses a plurality of rectangular patterns, and leads to an improvement on the linearity of the oblique side of each pattern. 
     When having determined in step S 6  that the first pattern data is larger than the allowance value of a predetermined pattern, the CPU  32  proceeds to step S 7  to segment the first pattern data to plural pieces of rectangular pattern data (shot dividing process). The CPU  32  stores the segmented plural pieces of rectangular pattern data as second pattern data in the fifth data file  45 . This shot dividing process may be executed by the exposure apparatus. 
     After the pattern modification process in step S 6  or the dividing process in step S 7  is completed for all the first pattern data, the CPU  32  receives individual pattern data from the fourth to sixth data files  44 - 46 , and converts the format of the individual pattern data to the proper format for the exposure apparatus to generate exposure data (exposure data generating process) in step S 8 . The CPU  32  stores the generated exposure data in the seventh data file  47 . This completes the exposure data generating process. 
     The exposure apparatus shown in FIG. 1 receives from the exposure data generating apparatus  31  the exposure data stored in the seventh data file  47  and uses the exposure data to expose the desired pattern at a predetermined position on the wafer  23  while controlling the first to third electromagnetic deflectors  19 - 21  and the stage  22 . 
     FIG. 6 is a flowchart illustrating substeps of step  6 , the shape modification process. In step S 11 , the CPU  32  reads the first pattern data from the third data file  43 , and then recognizes if one pattern data is triangular or rectangular (shape recognition process) in step S 12 . The shape recognition process is performed such that different modification processes are executed according to recognized shapes. 
     In step S 13 , the CPU  32  determines if the recognized first pattern data is rectangular (rectangular determination process). When the first pattern data is rectangular, no shape modification is needed and the CPU  32  moves from step S 13  to step S 20  to read the next first pattern data. When the first pattern data is not rectangular, the CPU  32  moves from step S 13  to step S 14  to perform a shape modification process on this first pattern data. 
     In step S 14 , the CPU  32  acquires from the first pattern data the amount of change that is used as a modification determination value (amount-of-change computing process). The amount of change represents a difference between the original first pattern data and the modified first pattern data produced by modifying the first pattern data to exposable predetermined pattern data. The shape of the pattern data is determined by values such as the coordinates of a side and the angle of the side. In this embodiment, a difference between the side coordinates of the original first pattern data and the side coordinates of the modified first pattern data is defined as the “amount of change”. 
     When the first pattern data is triangular, the CPU  32  w specifies two sides that define the largest one of the three internal angles. When the first pattern data is rectangular, the CPU  32  specifies two opposite sides. The CPU  32  acquires the amount of change that is produced by shifting at least one of the specified two sides in the horizontal direction (parallel to the X axis) or the vertical direction (perpendicular to the X axis and parallel to the Y axis). 
     FIG. 8A shows, as a first example, first pattern data of an original triangle indicated by the solid line and first pattern data of a right triangle after modification, indicated by the dashed line. The original first pattern data includes coordinate data which specifies the positions of the sides A, B and C. That is, the position of each of the sides A, B and C is specified by the coordinates of both ends of that side (the coordinates of each vertex of the triangle). The CPU  32  shifts the sides B and C horizontally so that the two sides A and B which form the largest internal angle form a right angle. In this way, the vertex T 1  of the original triangle moves to a vertex T 2  of the modified right triangle. The amounts of change of the side B are expressed by differences Δx (=x1−x2) and Δy (=y1−y2) between the coordinates (x1, y1) of the vertex T 1  of the original first pattern data and the coordinates (x2, y2) of the vertex T 2  of the modified first pattern data. When the side A is not horizontal, the CPU  32  also obtains the amounts of change AΔx and AΔy of the side A in the same manner as done for the side B. A difference (angle θ) between the angle between the sides A and B of the original first pattern data and the angle of the sides A and B of the modified first pattern data or the area of the region (hatched) between the side B of the original first pattern data and the side B of the modified first pattern data may be used as the amount of change. 
     FIG. 8B shows, as a second example, first pattern data of an original parallelogram indicated by the solid line and first pattern data of a parallelogram after modification, indicated by the dashed line. The CPU  32  shifts the sides A, B and C of the parallelogram while maintaining the parallelism of the sides A and C. Thus, two points of intersection of the sides A and C and the side B shift along the Y axis, and the amount of displacement (i.e., a difference Δy between the Y coordinates of each intersecting point) is determined as the amount of change. 
     Referring again to FIG. 6, the CPU  32  determines in step S 15  if the amount of change of the first pattern data obtained in step S 14  is within a predetermined error allowance value range (i.e., if the first pattern data is modifiable to predetermined pattern data) (first modification determination process). The error allowance value guarantees that a pattern actually formed using the modified first pattern data does not affect the LSI performance. When an interval between adjoining wiring patterns is narrow, for example, signal interference occurs, and when the width of the actual wiring pattern is narrower than the designed wiring pattern, signal attenuation occurs. To prevent these phenomena, the predetermined error allowance value is used. It is therefore possible to set a geven error allowance value in accordance with the layout pattern of an LSI. 
     When the amount of change of the first pattern data has been determined as being within the error allowance value range, the CPU  32  proceeds to step S 16  to modify the first pattern data to predetermined pattern data (first modification process). Specifically, the CPU  32  replaces the coordinates of each side of the original first pattern data to the coordinates of the associated side of the predetermined pattern data. For the triangular pattern shown in FIG. 8A, for example, the coordinates (x1, y1) of the sides B and C included in the first pattern data are replaced with the coordinates (x2, y2). The first pattern data including the coordinates (x2, y2) is stored as second pattern data in the fifth data file  45 . 
     When the amount of change of the first pattern data has been determined as exceeding the error allowance value, the CPU  32  proceeds to step S 7  to execute the shot dividing process on the first pattern data. 
     In step S 17 , the CPU  32  computes a difference value representing a difference between the second pattern data stored in the fifth data file  45  and the selected block pattern data (difference value computing process). In this embodiment, the difference value is expressed by a difference in the coordinates of a vertex between both patterns. Like the amount of change, the difference value may be expressed by an angle or an area. 
     Specifically, the CPU  32  reads the second pattern data from the fifth data file  45  and selects a single block pattern similar to the second pattern data or a combination of a plurality of block patterns which can represent the second pattern data. 
     For the second pattern data of a right triangle, for example, the CPU  32  selects the block pattern of a right triangle similar to the former right triangle. For the second pattern data of a parallelogram, the CPU  32  selects the block pattern of a parallelogram similar to the former parallelogram. A parallelogram can be expressed by a combination of a plurality of right triangles. The CPU  32  thus selects the block patterns of a plurality of right triangles which express a parallelogram. 
     FIG. 10 shows predetermined registered segmental block patterns. Each segmental block has a pattern formed by a transmission aperture of its own predetermined shape (hatched). A specific block number is assigned to each segmental block. This block number is assigned to an area  52   a  of segmental block pattern data  52  shown in FIG.  9 B. The exposure apparatus selects the block area  15  on the stencil mask  12  where the transmission aperture  17  corresponding in shape to the block pattern that has been selected based on the block number. As a result, the block pattern corresponding to the block number is exposed on the wafer  23 . Exposure data includes the segmental block pattern data  52  in FIG.  9 B and recursive block data  51  in FIG.  9 A and pattern data  53  in FIG.  9 C. 
     The CPU  32  then enlarges or reduces data of the selected block pattern in the X and Y directions in such a way that the size of the selected block pattern substantially coincides with the size of the second pattern data. The CPU  32  further computes a difference between the coordinates of each side of the enlarged or reduced block pattern with the coordinates of each associated side of the second pattern data. 
     In step S 18 , the CPU  32  compares the difference value computed in step S 17  with the predetermined error allowance value to determine if the second pattern data is modifiable to segmental block pattern data (second modification determination process). 
     When the difference value is within the error allowance value range, the CPU  32  determines the second pattern data as being modifiable to segmental block pattern data and proceeds to step S 19 . When the difference value exceeds the error allowance value, the CPU  32  determines the second pattern data is unmodifiable to segmental block pattern data and proceeds to step S 20 . That is, the CPU  32  leaves the subroutine and goes to step S 8 . In step S 8 , the CPU  32  converts the format of the second pattern data to generate exposure data and stores the exposure data in the seventh data file  47 . As the exposure data is prepared from pattern data not having undergone shot division, the amount of the exposure data is less than the amount of the rectangular pattern data that has undergone shot division in step S 7 . The exposure apparatus receives the exposure data from the seventh data file  47 , generates plural pieces of rectangular segmental pattern data from the exposure data and carries out exposure using the generated rectangular segmental pattern data. The generation of rectangular segmental patterns by the exposure apparatus may be implemented by the exposure data generating apparatus  31 . 
     In step S 19 , the CPU  32  modifies the second pattern data to segmental block pattern data, and stores the segmental block pattern data in the sixth data file  46  (second modification process). That is, the CPU  32  converts the format of the second pattern data to the format of the segmental block pattern data, and stores the segmental block patterns in the sixth data file  46 . 
     This process will be discussed below more specifically. The recursive block data  51  in FIG. 9A is for exposing a pattern with a recursiveness by using the second transmission aperture  16  formed in any recursive block in FIG.  2 . The recursive block data  51  has a number data area  51   a , a block type data area  51   b , and layout coordinates data areas  51   c  and  51   d  all of a recursive block on the stencil mask, the data areas  51   c  and  51   d  representing the layout coordinates on the chip. 
     The segmental block pattern data  52  in FIG. 9B is used for exposing a pattern using the third transmission aperture  17  formed in any segmental block in FIG.  2 . The segmental block pattern data  52  has a number data area  52   a,  a block type data area  52   b , a pattern shape data area  52   c , layout coordinates data areas  52   d  and  52   e , and a pattern size data area  52   f  of a segmental block on the stencil mask. 
     The pattern data  53  in FIG. 9C, which is first and second pattern data, has a pattern shape data area  53   a , layout coordinates data areas  53   b  and  53   c  and a pattern size data area  53   d . The first pattern data is the pattern data for which no recursive block pattern can be used. The second pattern data is the pattern data for which no segmental block pattern can be used. 
     The CPU  32  stores the block number of the block pattern, selected in step S 17 , in the data area  52   a  of the segmental block pattern data  52 , stores information indicative of the segmental block in the data area  52   b , and stores information indicative of the shape of the first pattern data in the data area  52   c.  The CPU  32  stores the layout coordinates (x, y) and the pattern size, stored in the data areas  53   b-   53   d , in the data areas  52   d-   52   f , respectively. 
     The process of steps S 14  to S 19  for triangular first pattern data will be discussed below with reference to FIGS. 11A to  11 C and  12 . FIG. 11A shows a triangular first pattern  61  read from the third data file  43 . The CPU  32  acquires the amounts of change of the first pattern  61  when the triangle is modified to a right triangle. The amounts of change AΔx, AΔy, BΔx and BΔy based on the sides A and B that define the largest internal angle of the first pattern  61  are obtained. As the side A is horizontal, the amounts of change AΔx and AΔy are set to “0”. 
     The CPU  32  then determines if the amounts of change BΔx and BΔy on the side B are within the error allowance value range. When those amounts are within the error allowance value range, the CPU  32  modifies the first pattern data  61  to second pattern data  61   a  indicated by the dashed line in FIG.  11 B. The CPU  32  selects a segmental block pattern which approximates the second pattern  61   a . In this case, the CPU  32  selects a segmental block pattern BP with a number “2” shown in FIG.  10 . This segmental block pattern BP( 2 ) is indicated by the dashed lines in FIGS. 11B and 11C. 
     The CPU  32  then enlarges the segmental block pattern BP( 2 ) to generate an enlarged pattern  63 , and compares the second pattern  61   a  with the enlarged pattern  63 . The base of the enlarged pattern  63  substantially coincides in length with the base A of the second pattern  61   a , producing a difference (Δy) between the length of the side B 1  of the second pattern  61   a  and the length of the side of the enlarged pattern  63 . This difference Δy as a difference value is compared with the error allowance value. When the difference Δy is within the error allowance value range, the second pattern is modified to the segmental block pattern BP( 2 ). That is, the CPU  32  stores the number “2” of the selected block pattern data BP( 2 ) in a data area  64   a , information indicative of “segmentation” in a data area  64   b , and information indicative of “triangle” in a data area  64   c  as shown in FIG.  12 . The CPU  32  further stores the X coordinate and Y coordinate at which the second pattern is to be laid out in data areas  64   d  and  64   e , and size information of the second pattern in a data area  64   f . As shown in FIG. 11C, exposure is carried out using the segmental block pattern BP( 2 ) in place of the original first pattern  61  in this manner. When the segmental block pattern substantially matches the recursive block pattern, the data stored in the data area  64   b  may represent “recursive” instead of “segmentation”. In this case, the exposure apparatus executes the exposure process without determination and computation for shot division. 
     The process for a rectangular first pattern will be discussed with reference to FIGS. 13 and 14. When a rectangular first pattern  71  as shown in FIG. 13A is read from the third data file  43 , the CPU  32  specifies a pair of sides B and D opposite to each other in the vertical direction, and acquires the amount of change BΔx on the side B when the sides B and D shift in parallel. The CPU  32  compares the amount of change BΔx with the error allowance value to determine if the first pattern  71  is modifiable to a parallelogram. 
     Next, the CPU  32  acquires, as a difference value Δy1, a difference between the coordinates of both first ends of the sides A and C whose second ends are placed one on the other as shown in FIG.  13 B. When the difference value Δy1 is within the error allowance value range, the CPU  32  modifies the first pattern  71  to a parallelogram. When the difference value Δy1 exceeds the error allowance value, the CPU  32  modifies the first pattern  71  to a trapezoid. 
     Next, the CPU  32  selects a segmental block pattern which approximates the modified second pattern  72 . In this case, the CPU  32  selects a segmental block pattern BP( 11 ) with a number “11” in FIG. 10 (indicated by the broken line in FIG.  13 C). 
     The CPU  32  then enlarges the segmental block pattern BP( 11 ) to generate an enlarged pattern  74 . At this time, the length of the left side and the side D of the enlarged pattern  74  substantially coincide with each other. The CPU  32  acquires, as a difference value, a difference (Δy2) between the side A 1  (or the side C 1 ) of the enlarged pattern  74  and the side A of the second pattern  72  in the direction of the Y axis. When determining that the difference value Δy2is within the error allowance value range, the CPU  32  modifies the second pattern  72  to the segmental block pattern BP( 11 ). That is, the CPU  32  stores the number “11” of the selected segmental block pattern BP( 11 ) in a data area  75   a , information indicative of “segmentation”, a block type, in a data area  75   b , and information indicative of “parallelogram”, a pattern shape, in a data area  75   c  as shown in FIG.  14 . Further, the CPU  32  stores the X coordinate and Y coordinate at which the second pattern should be laid out, in data areas  75   d  and  75   e , and pattern size information in a data area  75   f.  As shown in FIG. 13D, exposure is carried out using the segmental block pattern BP( 11 ) instead of the second pattern  72 . 
     In step S 20  in FIG. 6, the CPU  32  determines if the shape modification process has been completed for every first pattern data (completion determination process). When there is any first pattern data that has not undergone the modification process, the CPU  32  proceeds to step S 11  from step S 20  and repetitively executes the loop of steps S 11 -S 20 . 
     The process of steps S 14  to S 19  for various triangular shapes will now be discussed specifically. 
     (1) Process for First Pattern Data  81  of a Triangular Shape Shown in FIG. 16A 
     Steps S 21  to  23  in FIG. 15 are substeps of step S 14  (amount-of-change computing process) in FIG. 6, and steps S 24  and S 25  in FIG. 15 are substeps of step S 15  (first modification determination process) in FIG.  6 . Steps S 26  to S 29  in FIG. 15 respectively correspond to steps S 16 -S 19  in FIG.  6 . 
     First, the CPU  32  specifies sides A and B which form the maximum internal angle of the first pattern  81  in step S 21 , then acquires the amounts of change of the side A, AΔx and AΔy, in step S 22 . As the side A is horizontal and the ends of the side A do not shift horizontally, the CPU  32  sets the amounts of change AΔx and AΔy to “0”. The CPU  32  then acquires the amounts of change of the side B, BΔx and BΔy, in step S 23 . 
     When the CPU  32  determines in step S 24  that the amounts of change AΔy and BΔx of the sides A and B are both within the error allowance value range, the CPU  32  determines that the first pattern  81  can be modified to an exposable right triangle, and proceeds to step S 25 . The CPU  32  determines in step S 25  that modifying the first pattern  81  to set the side B perpendicularly will set the internal angle between the sides A and B to 90 degrees, and proceeds to step S 26 . 
     In step S 26 , the CPU  32  modifies the first pattern  81  to generate a second pattern  81   a  (see FIG. 16B) of a right triangle with the side B set perpendicular, and stores the second pattern data in the fifth data file  45 . 
     In the next step S 27 , the CPU  32  selects a segmental block pattern BP with a block number “2” which approximates the second pattern  81   a , and compares the second pattern  81   a  with the selected segmental block pattern BP( 2 ). 
     At this time, as shown in FIG. 16C, the segmental block pattern BP( 2 ) is enlarged to the size of the second pattern  81   a , generating an enlarged pattern  81   b , and the enlarged pattern  81   b  is put over the second pattern  81   a  to acquire the difference Δy between both patterns as a difference value. 
     The CPU  32  determines in step S 28  that the difference value (Δy) is within the error allowance value range, and then goes to step S 29  and modifies the enlarged pattern  81   b  in such a way that the inclination of the oblique side of the second pattern  81   a  substantially coincides with the inclination of the segmental block pattern BP( 2 ) as shown in FIG.  16 D. That is, segmental block pattern data  82  (see FIG. 17) for the second pattern  81   a  is generated. The CPU  32  stores the segmental block pattern data  82  in the sixth data file  46 , and terminates the shape modification process. 
     (2) Process for First Pattern Data  83  of a Triangular Shape Shown in FIG. 18A 
     In step S 21 , the CPU  32  specifies sides A and B which form the maximum internal angle of the first pattern  83  in FIG. 18A, and then acquires the amounts of change of the side A, AΔx and AΔy, and the amounts of change of the side B, BΔx and BΔy, in steps S 22  and S 23 . 
     In step S 24 , the CPU  32  determines that the amounts of change AΔx and AΔy of the side A are both greater than the error allowance value, and thus determines that the first pattern  83  is unmodifiable to an exposable shape. Then, the CPU  32  segments the first pattern  83  into a plurality of rectangular patterns  84  as shown in FIG. 18B in step S 7 , and stores the pattern data of the rectangular patterns  84  in the fifth data file  45 . 
     (3) Process for First Pattern Data  85  of a Triangular Shape Shown in FIG. 19A 
     The CPU  32  specifies sides A and B of the first pattern  85  in step S 21 , and acquires the amounts of change of the side A, AΔx and AΔy, and the amounts of change of the side B, BΔx and BΔy, in steps S 22  and S 23 . Next, in step S 24 , the CPU  32  determines that the amounts of change AΔx and BΔy are both within the error allowance value range, and thus determines that the first pattern  85  is modifiable to an exposable shape. In the next step S 25 , it is determined that the angle between the sides A and B 1  is 90 degrees. Then, the CPU  32  generates a second pattern  85   a  (see FIG. 19B) of a right triangle and stores that second pattern  85   a  in the fifth data file  45  in step S 26 . 
     In the next step S 27 , the CPU  32  selects a segmental block pattern BP with a block number “8” (see FIG. 10) which approximates the second pattern  85   a , and enlarges the segmental block pattern BP( 8 ) to generate an enlarged pattern  85   b  as shown in FIG.  19 C. The CPU  32  compares the enlarged pattern  85   b  with the second pattern  85   a  to acquire a difference value Δx. 
     In step S 28 , the difference value Δx is determined to be within the error allowance value range. In step S 29 , the enlarged pattern  85   b  is modified to the segmental block pattern BP( 8 ) as shown in FIG. 19D, yielding segmental block pattern data  86  (see FIG. 20) for the second pattern  85   a . The segmental block pattern data  86  is then stored in the sixth data file  46 . 
     The process of steps S 14  to S 19  for various rectangular shapes will now be discussed specifically. 
     First, a description will be given of a process when segmental block patterns of a parallelogram are used, with reference to a flowchart in FIG.  21  and FIGS. 22 to  25 . Steps S 31  and  32  are substeps of step S 14  (amount-of-change computing process) in FIG. 6, and steps S 33  to S 39  are substeps of step S 15  (first modification determination process) in FIG.  6 . Steps S 40  and S 44  are substeps of step S 16  (first modification process), and steps S 41  to S 43  respectively correspond to steps S 17 -S 19  in FIG.  6 . 
     (1) Process for First Pattern Data  91  of a Rectangular Shape Shown in FIG. 22A 
     In step S 31 , the CPU  32  acquires the amounts of change AΔx, AΔy, BΔx, BΔy, CΔx, CΔy, DΔx and DΔy of the four sides A to D of the rectangular first pattern  91 . Then, the CPU  32  searches for any amount of change which is within the error allowance value range in step S 32 , and determines in step S 33  based on the search result that the amounts of change BΔx and DΔx (DΔx is zero) of the sides B and D are within the error allowance value range. 
     Then, the CPU  32  proceeds to step S 34  from step S 33  and generates a second pattern  91   a  (see FIG. 22B) having a side B 1  obtained by setting the side B perpendicular. Then, in step S 36 , the CPU  32  determines whether or not the directions of inclination of the sides A and C are identical in order to check if the second pattern  91   a  approximates a parallelogram. In this case, the directions of inclination of the sides A and C are identical, the CPU  32  proceeds to step S 38  to acquire, as a difference value Δy, a difference between the coordinates of second ends of the sides A and C with first ends of both sides A and C overlapping each other, as shown in FIG.  22 C. 
     When the CPU  32  determines in step S 39  that the difference value Δy is within the error allowance value range, the CPU  32  goes to step S 40  and modifies the second pattern  91   a  so that the inclination of the side C substantially coincides with that of the side A, generating a third pattern  91   b  (see FIG. 22D) of a parallelogram. The CPU  32  then stores the third pattern  91   b  in the fifth data file  45 . 
     In the next step S 41 , the CPU  32  selects a segmental block pattern BP with a block number “12” in FIG. 10 which approximates the third pattern  91   b , and compares the third pattern  91   b  with the segmental block pattern BP( 12 ). At this time, the segmental block pattern BP( 12 ) is enlarged to the size of the third pattern  91   b , generating an enlarged pattern  91   c , and the enlarged pattern  91   c  is placed over the third pattern  91   b  to acquire a difference value Δy between both patterns. 
     In the next step S 42 , the CPU  32  compares the difference value Δy with the error allowance value. In this case, as the difference value Δy is within the error allowance value range, the CPU  32  proceeds to step S 43  and modifies the third pattern  91   b  to generate a modified pattern  91   c  (having the same reference numeral as the enlarged pattern  91   c ) having the same inclination as that of a segmental block pattern BP( 12 ) as shown in FIG.  22 F. Then, the CPU  32  converts the data format of the modified pattern  91   c  to the data format of a segmental pattern, generating segmental block pattern data  92  as shown in FIG.  23 . 
     (2) Process for First Pattern Data  93  of a Rectangular Shape Shown in FIG. 24A 
     In step S 31 , the amounts of change of the four sides A to D of the first pattern  93  are obtained. The first pattern  93  being a parallelogram, the individual processes in steps S 32 , S 33 , S 34  and S 36  are executed after which the process goes to step S 38 . In step S 38 , a difference value Δy between the sides A and C is acquired. As the difference value Δy exceeds the error allowance value, it is determined in step S 39  that the first pattern  93  is unmodifiable, and the flow goes to step S 44 . In step S 44 , the first pattern  93  is stored as trapezoidal pattern in the fifth data file  45 . 
     (3) Process for First Pattern Data  94  of a Rectangular Shape Shown in FIG. 25A 
     In step S 31 , the amounts of change of the four sides A to D of the first pattern  94  are obtained. As the amounts of change excluding the amount of change AΔy (=0) exceed the error allowance value in step S 32 , the first pattern  94  is determined as unmodifiable in step S 33 . Then, the first pattern  94  is segmented to a plurality of rectangular patterns  95  as shown in FIG. 25B in step S 7 , and data of the rectangular patterns  95  are then stored in the fifth data file  45 . 
     A description will now be given of a modification process for a combination pattern of segmental block patterns of a plurality of right triangles of a rectangular first pattern. 
     Steps S 51  and S 52  in FIG. 26 are substeps of step S 14  (amount-of-change computing process) in FIG. 6, and respectively correspond to steps S 31  and S 32  in FIG.  21 . Steps S 53  to S 59  are substeps of step S 15  (first modification determination process) in FIG.  6  and respectively correspond to steps S 33 -S 39  in FIG.  21 . Steps S 60  and S 65  are substeps of step S 16  (first modification process) in FIG.  6  and respectively correspond to steps S 40  and S 44  in FIG.  21 . Steps S 61  and S 62  are substeps of step S 17  (difference value computing process) in FIG.  6  and steps S 63  and S 64  respectively correspond to steps S 18  and S 19  in FIG.  6 . 
     (1) Process for a First Pattern  101  After the First Modification Process Shown in FIG. 27A 
     After individual processes in steps S 51 -S 59  are executed, the parallelogram first pattern  101  which has undergone the first modification process is generated in step S 40 . Next, in step S 61 , the CPU  32  generates a first right-triangular pattern  101   a  including one oblique side A of the first pattern  101  and selects a segmental block pattern BP( 4 ) with a block number “4” in FIG. 10, which approximates the first right-triangular pattern  101   a . As shown in FIG. 27B, the CPU  32  enlarges the selected segmental block pattern BP( 4 ) to the size of the first right-triangular pattern  101   a , generating an enlarged pattern  101   c . The CPU  32  then compares the enlarged pattern  101   c  with the first right-triangular pattern  101   a  to acquire a difference value AΔy. 
     Then, in step S 62 , the CPU  32  generates a second right-triangular pattern  101   b  including another oblique side C of the first pattern  101  and selects a segmental block pattern BP( 2 ) with a block number “2” in FIG. 10, which approximates the second right-triangular pattern  101   b . As shown in FIG. 27C, the CPU  32  enlarges the selected segmental block pattern BP( 2 ) to the size of the second right triangle pattern  101   b , generating an enlarged pattern  101   d . The CPU  32  then compares the enlarged pattern  101   d  with the second right-triangular pattern  101   b  to acquire a difference value CΔy. 
     When the CPU  32  determines in step S 63  that the difference values AΔy and CΔy are within the error allowance value range, the CPU  32  proceeds to step S 64  and constructs the first pattern  101  by a combination of a plurality of right-triangular segmental block patterns  102  and  103 , which are similar pattern to the segmental block patterns BP( 4 ) and BP( 2 ), as shown in FIG.  27 D. In other words, the first pattern  101  is segmented to a plurality of segmental patterns  102  and  103 . The CPU  32  converts the format of the data of the segmental patterns  102  and  103  to the format of the segmental block pattern data, generating segmental block pattern data including a plurality of segmental pattern data  102   a  and  103   a  as shown in FIGS. 28A and 28B. 
     When the first pattern  101  is assembled by a plurality of segmental patterns  102  and  103  in step S 53 , a rectangular pattern  104  as shown in FIG. 27D may be needed. In this case, the CPU  32  adds data  104   a  of the rectangular pattern  104  as shown in FIG. 28C to the segmental block pattern data. 
     (2) Process for a First Pattern  105  After the First Modification Process Shown in FIG. 29A 
     In steps S 51  and S 52 , first and second right triangles  105   a  and  105   b  respectively including the sides B and D of the first pattern  105  are generated, and segmental block patterns BP( 5 ) and BP( 1 ) with block numbers “5” and “1” in FIG. 10, which approximate the first and second right triangles  105   a  and  105   b , are selected respectively. 
     Next, as shown in FIGS. 29B and 29C, the first and second right triangles  105   a  and  105   b  are respectively compared with enlarged patterns  106  and  107 , which are acquired by enlarging the selected segmental block patterns BP( 5 ) and BP( 1 ). Based on the comparison results, the first and second right triangles  105   a  and  105   b  are modified to generate modified patterns  106  and  107  as shown in FIG.  29 D. Segmental block pattern data  106   a  and  107   a  (see FIGS. 30A and 30B) of the modified patterns  106  and  107  are stored in the sixth data file  46 . Pattern data  105   ca  (see FIG. 30C) of a rectangular pattern  105   c  located between the modified patterns  106  and  107  is stored as second pattern data in the fifth data file  45 . When a rectangular pattern is segmented to two triangular patterns, only one of the triangular patterns may be modified to a segmental block pattern. 
     A process of modifying rectangular first pattern data to a trapezoidal segmental block pattern will now be discussed. 
     Steps S 71  and S 72  in FIG. 31 are substeps of step S 14  (amount-of-change computing process) in FIG. 6, and respectively correspond to steps S 31  and S 32  in FIG.  21 . Steps S 73  to S 77  and S 83  are substeps of step S 15  (first modification determination process) in FIG.  6 . Steps S 73  to S 77  respectively correspond to steps S 33  to S 37  in FIG.  21 . Steps S 78  and S 84  are substeps of step S 16  (first modification process) in FIG.  6 . Steps S 79  and S 80  are substeps of step S 17  (difference value computing process) in FIG.  6 . Steps S 81  and S 82  respectively correspond to steps S 18  and S 19  in FIG.  6 . 
     (1) Process for Rectangular First Pattern Data Shown in FIG. 32A 
     In step S 71 , the CPU  32  acquires the amounts of change AΔx, AΔy, BΔx, BΔy, CΔx, CΔy, DΔx and DΔy of four sides A to D of a rectangular first pattern  111 . In step S 72 , the CPU  32  determines if the amounts of change AΔy and CΔy for the sides A and C are within the error allowance value range. 
     As the amount of change AΔy of the side A and the amount of change CΔy of the side C are both within the error allowance value range in step S 73 , the first pattern  111  is determined as modifiable. Then, the CPU  32  modifies the side C to the side C 1  lying horizontal to generate a second pattern  111   a  (see FIG. 32B) in step S 75 . In step S 77 , the CPU  32  then determines if the inclination directions of the sides B and D are identical. In this case, since the inclination directions of the sides B and D differ from each other, the second pattern  111   a  is determined as a trapezoid, and the trapezoidal second pattern  111   a  is generated in step S 78 . Data of the second pattern  111   a  is stored in the fifth data file  45 . 
     Then, as shown in FIG. 32B, the CPU  32  generates a first right-triangular pattern  111   b  including the side B of the second pattern  111   a  and selects a segmental block pattern BP( 7 ) with a block number “7” in FIG. 10, which approximates the first right-triangular pattern  111   b , in step S 79 . As shown in FIG. 32C, the CPU  32  then enlarges the selected segmental block pattern BP( 7 ) to the size of the first right-triangular pattern  111   b , generating an enlarged pattern  112 , and acquires a difference value BΔy2between the enlarged pattern  112  and the first right-triangular pattern  111   b.    
     Then, in step S 80 , the CPU  32  generates a second right-triangular pattern  111   c  including the side D of the second pattern  111   a  and selects a segmental block pattern BP( 3 ) with a block number “3” in FIG. 10, which approximates the second right-triangular pattern  111   c . Then, the CPU  32  enlarges the selected segmental block pattern BP( 3 ) to the size of the second right-triangular pattern  111   c , generating an enlarged pattern  113 , and acquires a difference value DΔx2 between the enlarged pattern  113  and the second right-triangular pattern  111   c.    
     When the CPU  32  determines in step S 81  that the difference values BΔy2 and DΔx2 are within the error allowance value range, the CPU  32  proceeds to step S 82 . In step S 82 , the CPU  32  generates right-triangular segmental patterns  113  and  112  similar to the segmental block patterns BP( 3 ) and BP( 7 ), and converts the data format of those segmental patterns to the data format of segmental block patterns, generating segmental block pattern data  113   a  and  112   a  as shown in FIGS. 33A and 33B. Those segmental block pattern data  113   a  and  112   a  are stored in the sixth data file  46 . 
     When the second pattern  111   a  is segmented in step S 82 , a rectangular pattern  111   d  remains. Data  111   da  (see FIG. 33C) of that rectangular pattern  111   d  is stored as second pattern data in the fifth data file  45 . 
     (2) Process for Rectangular First Pattern Data  114  Shown in FIG. 34A 
     In step S 71 , the CPU  32  acquires the amounts of change AΔx, AΔy, BΔx, BΔy, CΔx, CΔy, DΔx and DΔy of four sides A to D of the first pattern  114 . This first pattern  114  is a trapezoid including mutually parallel sides A and C. After individual processes in steps S 72 , S 73 , S 75 , S 77  and S 78  are executed, the flow goes to step S 79 . In steps S 79  and S 80 , first and second right-triangular patterns  114   a  and  114   b  including the sides B and D are generated. Here, it is assumed that there are no segmental block patterns which approximate the first and second right-triangular patterns  114   a  and  114   b . In this case, the CPU  32  cannot acquire difference values for the individual sides of the first and second right-triangular patterns  114   a  and  114   b . Therefore, the shape modification process ends at the determination process in step S 81 . 
     In this case, the exposure data generating apparatus supplies the data of the trapezoidal first pattern  114 , stored in the data file  45 , to the exposure apparatus. The exposure apparatus segments the first pattern  114  to a plurality of rectangular patterns and exposes the first pattern  114  by using data of those rectangular patterns. 
     (3) Process for Rectangular First Pattern Data  115  Shown in FIG. 35A 
     In step S 71 , the CPU  32  acquires the amounts of change AΔx, AΔy, BΔx, BΔy, CΔx, CΔy, DΔx and DΔy of four sides A to D of the rectangular first pattern  115 . Since only the amount of change AΔy for this first pattern  115  is within the error allowance value range, the first pattern  115  is determined as unmodifiable and the flow proceeds to step S 7 . In step S 7 , the first pattern  115  is subjected to shot segmentation to be segmented to a plurality of rectangular patterns  116 . Data of those rectangular patterns  116  are stored as second pattern data in the fifth data file  45 . 
     A modification process using the segmental block patterns in the first case will now be discussed. Steps S 91  to S 94  in FIG. 36 respectively correspond to steps S 12  and S 14 -S 16  in FIG.  6 . Steps S 95  and S 98  are substeps of step Si (difference value computing process) in FIG.  6 . Steps S 96  and S 99  are substeps of step S 18  (second modification determination process) in FIG.  6 . Steps S 97 , S 100  and S 101  in FIG. 36 are substeps of step S 19  (second modification process) in FIG.  6 . 
     (1) Process for First Pattern Data  121  After the First Modification Process Shown in FIG. 37A 
     The processes in steps S 91 -S 95  generate the first pattern  121  which has undergone the first modification process. Those processes will now be discussed specifically. In step S 91 , the CPU  32  recognizes the shape of the original first pattern. When the recognition result indicates that the original first pattern is not rectangular, the CPU  32  computes the amount of change in step S 92 . In the next step S 93 , the CPU  32  determines based on the amount of change if the original first pattern is modifiable. When the original first pattern is determined as modifiable, the CPU  32  executes the first modification process in step S 94 , generating a modified first pattern  121 . 
     Then, in step S 95 , the CPU  32  selects a segmental block pattern BP( 19 ) with a block number “19” in FIG. 10, which approximates the first pattern  121 , and enlarges the selected segmental block pattern BP( 19 ), generating an enlarged pattern  122  in step S 95 . The CPU  32  then compares the enlarged pattern  122  with the first pattern  121  to acquire a first difference value Δx1. The CPU  32  then compares the first difference value Δx1 with the error allowance value in step S 96 . As the first difference value Δx1 is greater than the error allowance value at this time, the CPU  32  proceeds to step S 98 . 
     In step S 98 , the CPU  32  reduces the first pattern  121  to the size of the segmental block pattern BP( 19 ), generating a reduced pattern  123 , and acquires a second difference value Δx2 between the reduced pattern  123  and the segmental block pattern BP( 19 ) as shown in FIG.  37 C. 
     In step S 99 , the CPU  32  compares the second difference value Δx2 with the error allowance value. As the second difference value Δx2 is within the error allowance value range, the CPU  32  segments the first pattern  121  to a plurality of patterns  124  of segmental blocks BP( 19 ), as shown in FIG. 37D, generating segmental block pattern data  124   a  (see FIG. 38) for the patterns  124 . The segmental block pattern data  124   a  is stored in the sixth data file  46 . 
     (2) Process for First Pattern Data  125  After the First Modification Process Shown in FIG. 39A 
     Executing the processes in steps S 91 -S 94  generates the first pattern  125 . Then, in step S 95 , the CPU  32  selects a segmental block pattern BP( 1 ) with a block number “1” in FIG. 10, which approximates the first pattern  125 . Then, the CPU  32  enlarges the selected segmental block pattern BP( 1 ), generating an enlarged pattern  126  and acquires a first difference value Δy1 between the enlarged pattern  126  and the first pattern  125 , as shown in FIG.  39 B. In the next step S 96 , the CPU  32  compares the first difference value Δy1 with the error allowance value. As the first difference value Δy1 exceeds the error allowance value, the CPU  32  reduces the first pattern  125  to the size of the segmental block pattern BP( 1 ), generating a reduced pattern  127 , and acquires a second difference value Δy2 between the fit reduced pattern  127  and the segmental block pattern BP( 1 ) in step S 98 . 
     In step S 99 , the CPU  32  compares the second difference value Δy2 with the error allowance value. As the second difference value Δy2 is within the error allowance value range, the CPU  32  proceeds to step S 100  to segment the first pattern  125  to segmental block patterns  128  and rectangular patterns  129  as shown in FIG.  39 D. In step S 101 , the CPU  32  generates segmental block pattern data  128   a  (FIG. 40A) for the segmental block patterns  128  and pattern data  129   a  (FIG. 40B) for the rectangular patterns  129 . The segmental block pattern data  128   a  is stored in the sixth data file  46 , while the pattern data  129   a  is stored as second pattern data in the fifth data file  45 . 
     A modification process using the segmental block patterns in the second case will now be discussed. Steps Sill to S 116  in FIG. 41 respectively correspond to steps S 91  to S 96  in FIG.  36 . Steps S 117 , S 118  and S 119  in FIG. 41 are substeps of step S 19  (second modification process) in FIG.  6 . 
     (1) Process for Triangular First Pattern Data  131  After the First Modification Process Shown in FIG. 42A 
     Executing the processes in steps S 110 -S 114  generates the first pattern  131  undergone the first modification process. Then, in step S 115 , the CPU  32  selects a segmental block pattern BP( 10 ) with a block number “10” in FIG. 10, which approximates the first pattern  131 , and enlarges the selected segmental block pattern BP( 10 ), generating an enlarged pattern  132 , as shown in FIG.  42 B. 
     The CPU  32  compares the enlarged pattern  132  with the first pattern  131  to acquire a first difference value Δx1. In the next step S 116 , the CPU  32  compares the first difference value Δx1 with the error allowance value. As the first difference value Δx1exceeds the error allowance value at this time, in step S 118 , the CPU  32  determines the size of segmental patterns  133  based on the segmental block pattern BP( 10 ) such that a difference value Δx2 between the first pattern  131  and each segmental pattern  133  is within the error allowance value range, as shown in FIG.  42 C. In this case, the segmental patterns  133  are reduced patterns of the segmental block pattern BP( 10 ). The CPU  32  separates the first pattern  131  to the size-determined patterns  133  and rectangular patterns  134 . In step S 119 , the CPU  32  generates segmental block pattern data  133   a  (see FIG. 43A) for the segmental patterns  133  and pattern data  134   a  (see FIG. 43B) for the rectangular patterns  134 . The segmental block pattern data  133   a  is stored in the sixth data file  46 , and the pattern data  134   a  is stored as the second pattern data in the fifth data file  45 . 
     (2) Process for Rectangular Pattern Data After the First Modification Process Shown in FIG. 44A 
     Executing the processes in steps S 111 -S 114  generates the first pattern  135  undergone the first modification process. Then, in step S 115 , the CPU  32  selects a segmental block pattern BP( 14 ) with a block number “14” in FIG. 10, which approximates the first pattern  135 , and enlarges the selected segmental block pattern BP( 14 ), generating an enlarged pattern  136 . The CPU  32  then acquires a first difference value Δy1 between the enlarged pattern  136  and the first pattern  135 . In step S 116 , the CPU  32  compares the first difference value Δy1 with the error allowance value. As the first difference value Δy1 is greater than the error allowance value, the CPU  32  proceeds to step S 118  and reduces the first pattern  135  to the size of the segmental block pattern BP( 14 ), generating a reduced pattern  137 . For this reduced pattern  137 , the difference value also exceeds the error allowance value, so that the CPU  32  determines the first pattern  135  as unmodifiable. In this case, in step S 118 , the CPU  32  determines the size of reduced patterns  138  based on the segmental block pattern BP( 14 ) such that a difference value between the first pattern  135  and each reduced pattern  138  is within the error allowance value range, as shown in FIG.  44 C. The CPU  32  separates the first pattern  135  into a plurality of reduced patterns  138 . In the next step S 119 , the CPU  32  generates segmental block pattern data  138   a  for those reduced go segmental patterns  138 . The reduced segmental block pattern data  138   a  is stored in the sixth data file  46 . 
     It should be apparent to those skilled in the art that the present invention may be embodied in many other specific forms without departing from the spirit or scope of the invention. Particularly, it should be understood that the invention may be embodied in the following forms. 
     After segmentation of a triangular pattern to a plurality of right-triangular patterns, it may be determined if the plural right-triangular patterns are modifiable. When triangular patterns  141  to  144  shown in FIGS. 46A to  46 D are determined as unmodifiable, for example, each of the triangular patterns  141 - 144  is segmented to right-triangular patterns  141   a  and  141   b ,  142   a  and  142   b ,  143   a  and  143   b , or  144   a  and  144   b . The amount of exposure data and the exposure time are reduced by modifying those right-triangular patterns  141   a - 144   b  to segmental block patterns. The triangular first pattern  83  in FIG. 18A may be separated into a triangular pattern including the side A and a right-triangular pattern including the side B. In this case, the right-triangular pattern can be modified to segmental block patterns. 
     This invention may be adapted to a case where a pattern is exposed on a substrate which is used for a display device, such as an Liquid Crystal Display (LCD) or Plasma Display Panel (PDP). 
     Therefore, the present examples and embodiments are to be considered as illustrative and not restrictive and the invention is not to be limited to the details given herein, but may be modified within the scope and equivalence of the appended claims.