Abstract:
A solid-state image pickup element comprises: a semiconductor substrate; an imaging section comprising a photoelectric converting portion, formed on the semiconductor substrate; an intralayer lens formed in an upper layer of the imaging section; and a peripheral circuit section that processes an output of the imaging section, formed on the semiconductor substrate, wherein at least part of the intralayer lens is formed in a lower layer of a wiring portion in the peripheral circuit section.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Filed of the Invention  
         [0002]     The present invention relates to a solid-state image pickup element and a method of producing it, and more particularly to formation of an intralayer lens.  
         [0003]     2. Description of the Related Art  
         [0004]     Recently, in solid-state image pickup elements, increase of the number of imaging pixels is advanced to the level of gigapixels or more, and miniaturization of an element is going on progressing. Under such circumstances, the sensitivity is requested to be improved. However, an on-chip lens which is formed on a color filter and in the uppermost layer is not sufficient for improving the sensitivity. A technique has been proposed in which a lens (intralayer lens) is further formed between an on-chip lens and a sensor portion, thereby enhancing the light converging function. As an example of such an intralayer lens, there is a convex superior portion which is formed on a face planarized by filling a step caused by a transfer electrode or the like, and in which the surface side is formed as a convex face.  
         [0005]     As an example of a method of producing such a convex superior portion, there is a method in which a stacked layer of a film of a lens material for the convex superior portion and a resist is dry etched. In the method, a film of the lens material is deposited, the resist on the film is patterned into a shape of the lens, and the lens shape of the resist is transferred to the lens material film by dry etching.  
         [0006]     Another method of enhancing the sensitivity by adjusting the focal length of a lens to a desired length in a wide range has been proposed (JP-A-2000-164837).  
         [0007]     In this method, a resist mask having a shape of a lens is formed on a layer of a material for an intralayer lens, the lens shape of the resist mask is transferred to the layer of the intralayer lens material by the etch back method, thereby forming an intralayer lens, and the focal length is adjusted by the etch back amount.  
         [0008]     When an intralayer lens is disposed below an on-chip lens formed by a microlens as described above, incident light is converged in two steps to enable a larger amount of light to enter a light receiving portion. The sensitivity of a solid-state image pickup element can be enhanced as compared with the case where only an on-chip lens is formed.  
         [0009]     In this way, the height of an intralayer lens of a solid-state image pickup element can adjust the focal length by means of controlling the etch back amount. The intralayer lens is formed by a method which is performed after formation of metal wiring, and in which the lens material is used also as a wiring protective film (passivation film). In a step of forming the lens, when the lens thickness is reduced in the process of etching back the lens material, also the passivation film for a wiring portion is thinned, and the wiring portion may be exposed. Therefore, the film thickness has limitations, and reduction of the height of the intralayer lens is restricted. Also when the lens material is not used also as the wiring protective film, the irregularity of the surface of the wiring portion may cause the accuracy of a step of patterning the lens or the like to be reduced.  
       SUMMARY OF THE INVENTION  
       [0010]     The invention has been conducted in view of the above-discussed circumstances. It is an object of the invention to provide a solid-state image pickup element in which the height of an intralayer lens can be freely adjusted, which has high sensitivity, and which is highly reliable.  
         [0011]     The solid-state image pickup element of the invention comprises: a semiconductor substrate; an imaging section comprising a photoelectric converting portion and a charge transferring portion that transfers a charge produced in the photoelectric converting portion, the imaging section being formed on the semiconductor substrate; an intralayer lens formed in an upper layer of the imaging section; and a peripheral circuit section that processes an output of the charge transferring portion and is formed on the semiconductor substrate, wherein at least part of the intralayer lens is formed in a lower layer of a wiring portion in the peripheral circuit section.  
         [0012]     According to the configuration, the thickness of the intralayer lens can be adjusted without being affected by the thickness of a passivation film of the wiring portion, and hence the optical design can cope with more conditions.  
         [0013]     In the solid-state image pickup element of the invention, the intralayer lens comprises a convex inferior portion and a convex superior portion, and the wiring portion of the peripheral circuit section is formed in an upper layer of the convex inferior portion, and is formed in a lower layer of the convex superior portion.  
         [0014]     According to the configuration, the wiring portion is formed in the intralayer lens consisting of the convex inferior portion and the convex superior portion, and hence the reliability can be further improved.  
         [0015]     In the solid-state image pickup element of the invention, a passivation film which covers the wiring portion of the peripheral circuit section configures the convex superior portion.  
         [0016]     According to the configuration, the passivation film functions also as the intralayer lens, and therefore the number of production steps can be reduced.  
         [0017]     In the solid-state image pickup element of the invention, the intralayer lens comprises a convex inferior portion and a convex superior portion, and the wiring portion of the peripheral circuit section is formed in an upper layer of the convex inferior portion and the convex superior portion.  
         [0018]     According to the configuration, the height of the intralayer lens can be freely adjusted, and a wiring portion of high reliability can be formed.  
         [0019]     In the solid-state image pickup element of the invention, the wiring portion is connected to a gate electrode of the peripheral circuit section via a plug.  
         [0020]     In the solid-state image pickup element of the invention, a sidewall of the convex inferior portion is covered by a light blocking film.  
         [0021]     According to the configuration, a sidewall of the convex inferior portion is covered by a light blocking film, and hence light leakage to the charge transferring portion can be prevented fro occurring.  
         [0022]     In the solid-state image pickup element of the invention, the passivation film is a resin film.  
         [0023]     According to the configuration, the solid-state image pickup element can be processed easily.  
         [0024]     In the solid-state image pickup element of the invention, the passivation film is an inorganic film.  
         [0025]     According to the configuration, the protectivity is high, and the reliability can be improved.  
         [0026]     The method of producing a solid-state image pickup element of the invention comprises: a semiconductor substrate; an imaging section comprising a photoelectric converting portion and a charge transferring portion that transfers a charge produced in the photoelectric converting portion, the imaging section being formed on the semiconductor substrate; and a peripheral circuit section that processes an output of the charge transferring portion, the peripheral circuit section being formed on the semiconductor substrate, the method comprising: a step of forming an intralayer lens in an upper layer of the imaging section; and a step of forming a wiring portion which is to be connected from the imaging section to the peripheral circuit section, in an upper layer of the intralayer lens.  
         [0027]     According to the configuration, in the formation of the intralayer lens, the height (the thickness of the lens) can be freely adjusted without being affected by the thickness of a passivation film of the wiring portion.  
         [0028]     In the method of producing a solid-state image pickup element of the invention, the step of forming the intralayer lens comprises: a step of forming a convex inferior portion; and a step of forming a convex superior portion, and  
         [0029]     the step of forming the wiring portion is executed after the step of forming the convex inferior portion.  
         [0030]     According to the configuration, also in the etching back step in the formation of the convex inferior portion, the wiring portion can be formed without a fear of being exposed.  
         [0031]     In the method of producing a solid-state image pickup element of the invention, the step of forming the convex superior portion is executed after formation of the wiring portion of the peripheral circuit section.  
         [0032]     According to the configuration, in the formation of the intralayer lens, the height (the thickness of the lens) can be freely adjusted without being affected by the thickness of a passivation film of the wiring portion.  
         [0033]     In the method of producing a solid-state image pickup element of the invention, the step of forming the convex superior portion comprises a step of forming the convex superior portion so as to cover the wiring portion in the peripheral circuit section, and, on the wiring portion, patterning the convex superior portion as a passivation film.  
         [0034]     According to the configuration, also in the etching back step in the formation of the convex inferior portion, the wiring portion can be formed without a fear of being exposed.  
         [0035]     In the method of producing a solid-state image pickup element of the invention, the step of forming the wiring portion is executed after the step of forming the convex superior portion.  
         [0036]     According to the configuration, the passivation film can be formed without depending on the film thickness of the convex superior portion.  
         [0037]     In the method of producing a solid-state image pickup element of the invention, the step of forming the wiring portion includes a step of forming a contact hole, and connecting the wiring portion to a gate electrode of the peripheral circuit section via a plug formed in the contact hole.  
         [0038]     According to the configuration, the plug which is to be connected to the gate electrode is formed in an upper layer portion. Therefore, the number at which a conductor layer coupled to the gate electrode is exposed to plasma is greatly reduced, and gate destruction caused by plasma damage can be prevented from occurring.  
         [0039]     In the method of producing a solid-state image pickup element of the invention, the step of forming the wiring portion comprises a step of performing a patterning process so as to leave an electrically conductive film configuring a wiring layer in peripheral circuit and so as to cover the sidewall of the convex inferior portion with a light blocking film.  
         [0040]     According to the configuration, the light blocking film can be formed on the sidewall of the convex inferior portion in the step of patterning the wiring layer. Therefore, a solid-state image pickup element having excellent optical characteristics can be formed without increasing the number of production steps. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0041]      FIG. 1  is a section view showing a solid-state image pickup element of Embodiment 1 of the invention;  
         [0042]      FIG. 2  is a plan view showing the solid-state image pickup element of Embodiment 1 of the invention;  
         [0043]      FIG. 3  is a section view showing a main portion of the solid-state image pickup element of Embodiment 1 of the invention;  
         [0044]      FIGS. 4A and 4B  are diagrams showing a main portion of the solid-state image pickup element of Embodiment 1 of the invention;  
         [0045]      FIGS. 5A  to  5 C are views showing steps of producing the solid-state image pickup element of Embodiment 1 of the invention;  
         [0046]      FIGS. 6A and 6B  are diagrams showing a solid-state image pickup element of Embodiment 2 of the invention; and  
         [0047]      FIG. 7  is a diagram showing a solid-state image pickup element of Embodiment 3 of the invention. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0048]     Hereinafter, embodiments of the invention will be described in detail with reference to the accompanying drawings.  
       Embodiment 1  
       [0049]      FIG. 1  is a section view showing a main portion of a solid-state image pickup element,  FIG. 2  is a plan view, and  FIG. 3  is a plan view of a main portion of an imaging region.  FIG. 1  is a view showing the section taken along the line A-A of  FIG. 3 , and that taken along the line B-B of  FIG. 2 .  FIG. 3  is an enlarged view of the imaging region  100  of  FIG. 2 , and  FIGS. 4A and 4B  are sectional views of main portions correspondingly showing an imaging section and a peripheral circuit section, respectively. As shown in  FIGS. 4A and 4B , the solid-state image pickup element is characterized in that an intralayer lens  20  formed on a photoelectric converting portion is formed below a wiring layer  28  configuring a wiring portion of the peripheral circuit section. The thickness of the intralayer lens can be adjusted without being affected by the thickness of a passivation film  25  of the wiring portion. The reference numeral  27  denotes a contact plug connected to a gate of a transistor of the peripheral circuit section. The upper layer of the wiring layer  28  is covered with a silicon oxide film functioning as a planarizing layer which, in the imaging section, configures the foundation of a color filter layer  50 , and, in the peripheral circuit section, functions as a passivation film.  
         [0050]     A light blocking film  7  in which an opening is formed in a region corresponding to a photodiode  30  serving as a photoelectric converting portion is disposed above the imaging section of the solid-state image pickup element. A convex inferior portion  22  formed by a silicon nitride film, a planarizing layer  25 , a convex superior portion  23 , a planarizing layer  24 , the color filter  50 , a planarizing layer  70 , and a microlens  60  are sequentially stacked on the light blocking film via a planarizing layer  21  made of a BPSG film.  
         [0051]     As shown in the schematic plan view of  FIG. 2 , the solid-state image pickup element chip comprises the imaging region  100  configured by photodiodes and a charge transferring portion, and a peripheral circuit section  200  such as an amplifier which is formed in the periphery of the region, on the semiconductor substrate. In a peripheral edge portion, pad portions  300  are configured as external connecting terminals. As shown in  FIG. 1 , plural photodiodes  30  are formed in p-wells  12  which are separated from one another by an element separating region  11 , and the charge transferring portions  40  which transfer charges detected from the photodiodes are formed in a meandering form between the photodiodes  30 . Although not shown in  FIG. 3 , charge transfer channels  14  through which signal charges transferred by the charge transferring portions  40  are moved are formed similarly in a meandering form in a direction crossing the direction along which the charge transferring portions  40  elongate.  
         [0052]     In the solid-state image pickup element, as shown in  FIG. 1 , a first layer electrode  3   a  and a second layer electrode  3   b  which are arranged with interposing therebetween an inter-electrode insulating film  4  made of a silicon oxide film  4   a  and an HTO film  4   b  are formed via the gate oxide film  2  on the surface of each of the charge transferring portions  40 , thereby constituting a charge transfer electrode. Each of The photodiodes  30  is formed by an n-type impurity region  31  which cooperates with the p-well  12  to form a pn junction, and a heavily doped p-type impurity region which is formed on the surface of the n-type impurity region  31 , and which functions as a surface potential adjusting layer  32 . The gate oxide film  2  is configured by a stacked structure (ONO) film including: a bottom oxide film  2   a  made of a silicon oxide (SiO) film; a silicon nitride (SiN) film  2   b ; and a top oxide film  2   c  made of a silicon oxide (SiO) film. An over-drain buffer layer  13  made of a p-type semiconductor layer is formed below the p-well  12 , so that, when a voltage is applied, charges can be drained.  
         [0053]     The antireflection film  6  made of a silicon nitride film having a thickness of 30 nm is formed above the first layer electrode  3   a  and the second layer electrode  3   b  via a silicon oxide film  5 . On the film, a thin tungsten film which functions as the light blocking layer  7 , which has an opening in a light receiving region of the photodiode  30 , and which has a thickness of 200 nm is formed via a titan nitride layer (not shown) which is formed by the sputtering method, and which has a thickness of 50 nm. The tungsten thin film is covered by an insulating layer  21  formed by a silicon oxide film  9  for preventing contamination due to a BPSG film, and a BPSG film. The intralayer lens in the upper layer is as described above.  
         [0054]     Next, steps of forming the charge transfer electrode in the production steps of the solid-state image pickup element will be described with reference to  FIGS. 5A  to  5 C. In this example, ion implantation is performed in order to form the n-type impurity region  31  for forming a photodiode region, the p-type impurity diffusion region functioning as the surface potential adjusting layer  32 , and the n-type impurity region functioning as the transfer channel  14  shown in  FIG. 1 , and thereafter a gate oxide film and a gate electrode are formed. For the sake of simplicity, the photodiode region and the transfer channel which are formed in the semiconductor substrate are omitted in the following steps.  
         [0055]     As shown in  FIG. 5A , after the steps of forming the gate oxide film  2 , the first layer electrode  3   a , the inter-electrode insulating film  4 , and the second layer electrode  3   b , the insulating film  5  and the silicon nitride film  6  are formed, the light blocking layer  7  made of the tungsten film which is opened in the photodiode  30  is then formed, and the BPSG film serving as the insulating film  21  is thereafter grown via the silicon oxide film  9  (not shown in the figure, see  FIG. 1 ). The films are fluidized by reflow to obtain a desired shape. In this case, a gate electrode of a MOSFET of an amplifier portion in the peripheral circuit section is formed in the same step as the second layer electrode  3   b.    
         [0056]     As shown in  FIG. 5B , a resist is applied thereon, and an etching back process and a planarizing process are performed to form the concave lens  22 .  
         [0057]     In the peripheral circuit section, thereafter, a contact hole is formed so as be opened in the inter-layer film ( 22 ) formed in the same step as the concave lens, the insulating film  21 , the silicon oxide film  9 , and the like, the contact hole is filled with tungsten to form the contact plug.  
         [0058]     As shown in  FIG. 5C , therefore, the planarizing layer  25  is formed, and a thin film of a high-refractive index material such an SiN film (refractive index n=1.9 to 2.0) is formed on the layer. Thereafter, a patterning process is performed so that the upper face is formed as a convex portion configured by a curved face, thereby forming the convex superior portion  23 . In this case, in advance of the formation of the planarizing layer  25 , the contact plug is formed in the peripheral circuit section, and functions as a passivation film.  
         [0059]     Then, the planarizing layer  24 , the color filter  50 , the planarizing layer  70 , and the microlens  60  are formed in the usual method, with the result that the solid-state image pickup element shown in FIGS.  1  to  4  is formed.  
         [0060]     In the thus formed solid-state image pickup element, the thickness of the intralayer lens can be adjusted without depending on the thickness of the wiring layer of the peripheral circuit section, and hence the optical design can cope with more conditions. When the distance to the light receiving face is adjusted, it is possible to expect an improvement of F-value dependence, an enhancement of the sensitivity, and a reduction of smear. Furthermore, an enhancement of the reliability can be attained simply by changing the order of the production steps. In the embodiment, the convex superior portion is formed above the plug, and used as a passivation film, and therefore the convex superior portion can be formed without increasing the number of production steps.  
         [0061]     The plug which is to be connected to the gate electrode of the peripheral circuit section is formed in an upper layer portion. Even when various plasma steps such as plasma CVD and plasma etching are used, therefore, gate destruction caused by plasma charging due to the antenna effect can be suppressed, and the reliability can be enhanced. In the Embodiment 1, the light blocking layer  7  and the wiring layer  28  were formed in the separate steps, however, they may be formed in the same step.  
       Embodiment 2  
       [0062]     In Embodiment 1 above, the convex superior portion is formed in an upper layer of the plug, and used as a passivation film. In the embodiment, a wiring portion in the peripheral circuit section is formed in an upper layer of the convex superior portion serving as an intralayer convex lens. In other words, the intralayer lens comprises a convex inferior portion serving as an intralayer concave lens  22  and a convex superior portion serving as an intralayer convex lens  23 , and in an upper layer of them, the plug  27  and the wiring layer  28  constituting the wiring portion are formed.  
         [0063]     Namely, as shown in  FIGS. 6A and 6B , the plug  27  is formed so as to penetrate from an upper layer of the intralayer convex lens  23  to the passivation film  25  (planarizing layer), the intralayer concave lens  22 , and the insulation layer  21  made of a BPSG film. According to this structure, the layers which are formed above the plug  27  and the wiring layer  28  are the planarizing layer (protective layer)  24  and the planarizing layer  70 . One of color filters may be caused to remain in the peripheral circuit section.  FIGS. 6A and 6B  are sectional views of the imaging section and the peripheral circuit section, and correspond to  FIGS. 4A and 4B  on the Embodiment 1, respectively. The other configuration is formed in the same manner as Embodiment 1, and hence the description is omitted.  
         [0064]     In the above-mentioned embodiment, the plug  27  and the wiring layer  28  were formed in the separate steps, however, they may be formed in the same step.  
         [0065]     According to the configuration, also when the convex superior portion is configured by a silicon nitride film by the plasma CVD method, plasma charging exerts no influence, both the convex inferior portion and the convex superior portion can be thinned without any restriction, and there is no fear that the wiring portion is exposed by etching back.  
       Embodiment 3  
       [0066]     The embodiment is characterized in that, as shown in  FIG. 7 , a light blocking film  26  made of a tungsten layer is formed on the sidewall of the convex inferior portion  22  formed in Embodiment 1.  
         [0067]     In the process of patterning the light blocking film, anisotropic etching is employed. Therefore, the patterning process can be performed so that the light blocking film remains on the sidewall of the photodiode portion, and it is possible to form a solid-state image pickup element in which the light converging property is enhanced, and which is highly reliable. In the embodiment also, the other configuration is formed in the same manner as Embodiment 1, and hence the description is omitted.  
         [0068]     In the above-mentioned embodiment, the charge transporting device (CCD) is used as the imaging section, however, the invention is applicable to an embodiment in which a CMOS element is used for the imaging section.  
         [0069]     As described above, according to the solid-state image pickup element of the invention, the thickness of the intralayer lens can be adjusted without depending on the thickness of the wiring portion of the peripheral circuit section, and hence the optical design can cope with more conditions.  
         [0070]     When the distance to a light receiving face is adjusted, it is possible to expect an improvement of F-value dependence, an enhancement of the sensitivity, and a reduction of smear.  
         [0071]     According to the method of producing a solid-state image pickup element of the invention, an enhancement of the reliability, and an improvement of the height of a wiring layer can be attained simply by changing the order of production steps.  
         [0072]     As described above, according to the invention, it is possible to form a solid-state image pickup element in which the height of an intralayer lens can be freely adjusted, which is thin, and which is highly reliable. Therefore, the solid-state image pickup element is useful in a small communication apparatus such as a mobile telephone.  
         [0073]     The entire disclosure of each and every foreign patent application from which the benefit of foreign priority has been claimed in the present application is incorporated herein by reference, as if fully set forth.