Abstract:
The present invention relates to a method for protecting a zone in a power system, which zone comprises a number of transmission lines connected to power sources and a number of transmission lines connected to a number of loads where the power sources and the loads are arranged outside the zone, wherein the method comprises the steps of: continuously measuring all the incoming currents (I in ) to the zone, continuously measuring all the outgoing currents (I out ) from the zone, and continuously calculating the differential current (I d ) according to I d =I in −I out . The method is characterised in continuously integrating I in , I out  and I d  according to Formula (I), where T is the fundamental frequency cycle, whereby changes of the continuously integrated values I?IN?, I OUT  and I D  constitute indications of whether faults on the power system occur within or outside the zone. The present invention also relates to a device and computer program product for performing the method.

Description:
TECHNICAL FIELD  
         [0001]    The present invention relates to a method for protecting a zone in a power system, which zone comprises a number of transmission lines connected to power sources and a number of transmission lines connected to a number of loads where the power sources and the loads are arranged outside the zone, wherein the method comprises the steps of: continuously measuring all the incoming currents (I in ) to the zone, continuously measuring all the outgoing currents (I out ) from the zone, and continuously calculating the differential current (I d ) according to I d =I in −I out .  
         BACKGROUND OF THE INVENTION  
         [0002]    During a number of years there has been a rapid development of power systems and the capacity requirements of these in turn require highly reliable relaying principles for protecting the system or components of the system in case of faults. These protection requirements apply to many parts of the power system such as for example transformer differential protection, motor differential protection, generator differential protection and busbar protection.  
           [0003]    In this kind of protection system, the incoming and outgoing currents of a certain protection zone has been measured since these may be used to detect if a fault occurs within or outside the protection zone. In order to measure these currents, so called current transformers, or CT, are used, one on each incoming and outgoing line. Further each line is provided with a circuit breaker for breaking the line in case of a fault. Traditionally the secondary currents of all the CTs are lead to a central differential relay which calculates the differential and the restraint current, compares them and makes the decision whether to trip all breakers of the in- and outgoing lines of the protection zone. In the case of an internal fault, i e a fault within the protection zone, the differential relay should trip the breakers.  
           [0004]    If however the differential relay trips all circuit breakers during an external fault, or misoperates in normal operating conditions, this will cause serious technical and economical consequences for the power system.  
           [0005]    One solution to this is to have a distributed, or decentralised, algorithm processing principle. This principle is presented in the paper “Implementation of a distributed digital bus protection system”, by He Jaili et al., IEEE Transaction on Power Delivery, Vol. 12, No. 4, October 1997. Here the whole bus protection system is divided into a number of protection units, each installed on one circuit of the bus, i e incoming and outgoing transmission line or transformer. All the protection units are connected by a data communication network. Each unit samples and compares instantaneous values of the differential and restraint currents, and makes a decision whether or not to trip its own circuit breaker.  
           [0006]    The low impedance protection algorithm widely used in digital protection systems may be expressed as follows. If for example we suppose a busbar which connects N lines, the differential current I d  and restraint current I r  among these lines are expressed as  
               I   d     =              ∑   N       i   =   1          L                  (   1   )                 I   r     =         ∑   N       i   =   1               L                  (   2   )                               
  I   d   −kI   r   &gt;D   (3) 
           [0007]    In case of an internal fault, then I d =I r  and equation (3) can be confined if proper values to k (k&lt;1) and D are chosen. Equation (3) is also known as the percentage differential protection since it introduces the restraint current in order to make the protection more stable for external faults.  
           [0008]    In the case of normal loads or external faults, I d  should be zero in order for equation (3) to be satisfied and no trip signal will be issued.  
           [0009]    However, for external faults, I d  will be greater than zero during the saturation period of the CT, causing a misoperation during this time period. Saturation occurs as a result of unpredictably high fault currents, during which, the CT saturates and produces erroneous non-proportional values for the actual current. The main technical problem for the differential protection algorithm is thus misoperation due to external faults principally because the saturation of the CT in the faulted line will produce a picture similar to an internal fault in the measuring circuits, that is to say, the differential current I d  will be the same as the restraint current I r  during the saturation period of the CT when an external fault occurs.  
           [0010]    Another problem with the above system is that it, due to the above mentioned transformer saturation problems, requires a stabilised restraint current signal to keep stability in the case of an external fault. As a consequence the tripping time is increased to above 20 milliseconds. For many systems it is however required to have faster tripping signals, preferably below 15 milliseconds due to system stability and safety requirements.  
         BRIEF DESCRIPTION OF THE INVENTION  
         [0011]    One object of the present invention is to provide a fast tripping algorithm for power system protection that remedies the above mentioned problems encountered with present technology.  
           [0012]    An additional object of the present invention is to provide a means to guaranty supply of electric power through a protected zone in a case when a fault is external to the protected zone.  
           [0013]    These object are achieved by methods according to claim 1 and 15, and a device for performing the methods. Further aspects of the present invention are covered by the dependent claims.  
           [0014]    The present invention displays a number of advantages over the state of the art. Since the integrated values of the incoming, outgoing and differential currents are used for determining where a fault has occurred, much more stable values are obtained. This means that the evaluation will be more reliable and accurate and that external faults will not wrongly trip the protection device. Because the rate of change values, based on the incoming, outgoing and differential currents, display very characteristic behaviour depending on whether the fault is inside or outside the protection zone, the risk of wrongly tripping the system is substantially reduced.  
           [0015]    Further the protection device will not be influenced by current transformer saturation with the present invention. With the algorithm presented, a very fast tripping signal may be obtained that operates either well below the fault current levels or well below the operational time of conventional protection devices.  
           [0016]    Another advantage of an embodiment of the present invention is that the method may be used to guaranty power transmission through a protected area in the case of a fault that is external to the protected area. Such a guaranty of assured supply with greatly reduced risk of power outages, brownouts etc due to faulty tripping in a protected area is of great economic benefit, especially to a supplier of electrical power. Such a guaranty facilitates the avoidance of unnecessary loss of supply leading to extremely expensive consequences in terms of lost production, scrapped production, downtime of expensive plant and so on.  
           [0017]    These and other aspects of, and advantages with, the present invention will become apparent from the detailed description and from the accompanying drawings. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]    In the detailed description of the invention, reference will be made to the accompanying drawings, of which  
         [0019]    [0019]FIG. 1 shows schematically the principle of a protection zone according to the invention,  
         [0020]    [0020]FIG. 2 shows a flow chart for a fast tripping logic,  
         [0021]    [0021]FIG. 3 shows an example of a test result for an internal fault when using the method according to the invention,  
         [0022]    [0022]FIG. 4 shows an example of a test result for an external fault when using the method according to the invention, and  
         [0023]    [0023]FIG. 5 shows schematically a device for performing the method according to the invention.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0024]    The present invention relates to protection of power systems, and in particular to areas of power systems having no sources or loads within those areas. These areas will hereafter be named protection zones PZ. Within these zones a number of feed lines connected to external sources are arranged as well as a number of feed lines connected to external loads. External in this context means outside the protection zone. The protection zone does not contain any sources or loads and can be seen as a passive part of a power system.  
         [0025]    In FIG. 1 is shown schematically the principle of the protection zone PZ. The total current from all sources entering the zone is referred to as I in  and the total current to all loads from PZ is referred to as I out . The currents are conventionally measured by current transformers CT. For a given PZ it is quite clear that all incoming currents have to be equal to the outgoing currents in normal load cases, when the PZ is defined as above, i e I in =I out  or I out /I in =1. This is also true if an external fault occurs.  
         [0026]    If one phase is considered in a PZ and we suppose that N feed lines are present in a certain PZ, the incoming current I in  and outgoing current I out  of the phase can be obtained by equations (1) and (2):  
               I   in     =              ∑   M       i   =   1          Ii                  (   1   )                 I   out     =              ∑   N       i   =     M   +   1            Ii                  (   2   )                               
 
         [0027]    Here, the index i from 1 to M corresponds to the incoming currents to PZ and i from M+1 to N corresponds to the outgoing currents from the protection zone.  
         [0028]    The instantaneous values of the differential current I d  and the restrained current I r  can be expressed by I in  and I out  as 
           I   d   =I   in   −I   out   (3) 
           I   r   =I   in   +I   out   (4) 
         [0029]    In order to have stable values of the incoming current I in  and the outgoing current I in  for a certain protection zone, integrated values of these currents as well as I d  can be obtained by integration over each fundamental frequency cycle T as  
                 I   IN     =       ∫   t1     (     t1   +   T     )              I   in             t                              (   5   )                 I   OUT     =       ∫   t1     (     t1   +   T     )              I   out             t                 (   6   )                 I   D     =       ∫   t1     (     t1   +   T     )                         I   x             t                 (   7   )                               
 
         [0030]    The integrated values obtained from equations (5)-(7) will be used to form an algorithm by which faults inside the protection zone are detected very fast and by means of which a very fast tripping signal may be generated, disconnecting the zone from the power system.  
         [0031]    For most power systems, in case of serious faults, tripping must be done very quickly because of the stability of the system but also in order to prevent serious damages. Preferably a tripping signal should be produced within 5 ms following internal faults.  
         [0032]    This may be achieved with the present invention by using the rate of change of the integrated continuous values of I IN , I OUT  and I D . The fact that all of these three integration values are one variable function in the time domain if a continuous integration is performed is used. This means that integration values will change depending on when the integration is performed. If we suppose that 
           k   1 ( t )= d ( I   D ( t ))/ dt   
           k   2 ( t )= d ( I   IN ( t ))/ dt   
           k   3 ( t )= d ( I   OUT ( t ))/ dt   (8) 
         [0033]    where k 1 , k 2 , k 3  are rate of change values. If a discrete time domain system is used, the rate of change values may be expressed as 
           k   1 ( i )= I   D ( i )− I   D ( i −1) 
           k   2 ( i )= I   IN ( i )− I   IN ( i −1) 
           k   3 ( i )= I   OUT ( i )− I   OUT ( i −1) 
         [0034]    Here, index i corresponds to the sampling instant in the discrete time domain and i−1 corresponds to the previous sampling time.  
         [0035]    It has been shown that there exists differences for the factors k 1 (i), k 2 (i) and k 3 (i) for different cases such as normal load, external faults and internal faults. This is shown in table 1 below.  
                                                       Normal                   load cases   External fault cases   Internal fault cases                           k 1 (i) = 0   k 1 (i) increases after   k 1 (i) increases               saturation of current               transformer           k 2 (i) = 0   k 2 (i) increases   k 2 (i) increases           k 3 (i) = 0   k 3 (i) increases   k 3 (i) decreases               before saturation of               current transformer                      
 
         [0036]    By continuously monitoring the rate of change values k 1 , k 2  and k 3  a logic may be created for producing a fast tripping signal.  
         [0037]    The logic for tripping when an internal fault occurs may by built up as is shown in FIG. 2.  
         [0038]    The factors k 1 , k 2  and k 3  are each checked against set threshold values, s 1 , s 2 , and s 3  respectively, in three separate comparators. As seen from table 1 above the logic is designed to work as follows. Since k 1 (i) increases during an internal fault, it is checked if it reaches above the set value s 1 , since k 2 (i) also increases during an internal fault, it is checked if it reaches above the set value s 2  and since k 3 (i) decreases during an internal fault, it is checked if it reaches below the set value s 3 . The comparators are connected to an AND function and if the AND function reaches signals from all the comparators a signal is transmitted to a second AND function.  
         [0039]    The integrated value I D (i) is also checked against a set threshold value in a separate comparator. In this case for internal faults I D (i) should be above a set pickup value. If so, a signal will sent to the second AND function and together with the signal from the first AND function a tripping signal will be issued.  
         [0040]    During tests of the fast tripping algorithm and logic of the present invention it has been found that the threshold values s 1 , s 2  and s 3  should be in the range 5-50% of the integrated value of the incoming current, and preferably 5-25%.  
         [0041]    [0041]FIG. 3 shows as an example a diagram over a test of the present invention for an internal fault. As can be seen from the diagram the rate of change values k 1 (i), k 2 (i) and k 3 (i) all have distinct peaks just at the occurrence of an internal fault, where k 1 (i) and k 2 (i) increase while k 3 (i) decreases.  
         [0042]    [0042]FIG. 4 shows another test example for an external fault. In this case k 2 (i) and k 3 (i) increase rapidly just at the occurrence of an external fault, while k 1 (i) remains unchanged until the CT saturates and k 1 (i) increases rapidly.  
         [0043]    As can be seen from the examples, there are very distinct differences between internal and external faults. Further, with the method according to the invention a very fast tripping signal may be obtained.  
         [0044]    [0044]FIG. 5 schematically shows how the method according to the invention may be implemented in a power system. A busbar  10  is connected to a number of transmission lines  12 , where some are incoming lines connected to power sources and some are outgoing lines connected to loads. The connection of the transmission lines to the busbar is considered to be the protection zone PZ.  
         [0045]    Each transmission line is arranged with a current transformer CT. Each transmission line is further provided with a breaker  13 , capable of breaking the connection. The CTs are connected to a fast tripping device  14  via lines  16 . The CTs are designed to provide currents that are proportional to the currents of the transmission lines. The fast tripping device comprises means for carrying out the steps of measuring the currents, calculating the differential current, integrating the currents, differentiating the integrated values in order to obtain the rate of change values, comparing the rate of change values with threshold values and producing a tripping signal. The tripping signal is transmitted to all breakers arranged on the transmission lines via line  18 . The fast tripping device may comprise filters for filtering the signals, converters for sampling the signals and one or more micro computers. The micro processor (or processors) comprises a central processing unit CPU performing the steps of the method according to the invention. This is performed with the aid of a dedicated computer program, which is stored in the program memory. It is to be understood that the computer program may also be run on a general purpose industrial computer instead of a specially adapted computer.  
         [0046]    The software includes computer program code elements or software code portions that make the computer perform the method using equations, algorithms, data and calculations previously described. A part of the program may be stored in a processor as above, but also in a ROM, RAM, PROM or EPROM chip or similar. The program in part or in whole may also be stored on, or in, other suitable computer readable medium such as a magnetic disk, CD-ROM or DVD disk, hard disk, magneto-optical memory storage means, in volatile memory, in flash memory, as firmware, or stored on a data server.  
         [0047]    A further embodiment of the present invention constitutes a method to guaranty supply of electric power through a protected zone by means of determining if a detected fault is external to the zone or not. The fast tripping method and algorithm according to the invention is used to determine if a fault is external or not, and so guaranty that a protection device in the protected zone will not trip in response to an external fault.  
         [0048]    The method comprises supplying a power network with a fast tripping device as described above functioning according to the method and logic as described above. The method to assure supply is a method to reduce the risk of power outages due to faulty tripping in a protected zone, leading to loss of supply. Loss of supply can have extremely expensive consequences in terms of lost production, scrapped production, downtime of expensive plant and so on.  
         [0049]    It is to be understood that the embodiments described above and shown on the drawings are to be regarded as non-limiting examples of the present invention and that it is defined by the appended patent claims.