Abstract:
Electronic circuitry for generating and distributing standing wave clock signals. The electronic circuitry includes one or more two-conductor transmission line segments that are interconnected with an odd number of voltage-reversing connections to form a closed loop. A regeneration device is connected between the conductors of the transmission line segments and operates to establish and maintain a standing wave on the loop. At any location on a segment there is a pair of oppositely phase oscillations.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
   This application is a continuation of U.S. application Ser. No. 10/331,748, filed on Dec. 30, 2002, now U.S. Pat. No. 6,816,020, and titled “Electronic Circuitry,” the latter application being a divisional application of U.S. application Ser. No. 09/529,076, filed on Apr. 6, 2000, now U.S. Pat. No. 6,556,089, titled “Electronic Circuitry,” which application is a U.S. national stage filing of a PCT Application PCT/GB00/00175, filed on Jan. 24, 2000, and titled “Electronic Circuitry,” which application claims priority to: GB9902001.8, filed Jan. 30, 1999, GB9901618.0, filed Jan. 25, 1999, and GB9901359.1, filed Jan. 22, 1999. 

   FIELD OF THE INVENTION 
   The invention relates to electronic circuitry concerning timing signals and their production and distribution; oscillators as sources of such as timing signals; and communications according to timing signals. 
   DESCRIPTION OF THE RELATED ART 
   Digital electronic data processing circuitry and systems require timing signals to synchronize data processing activities. Customarily, such timing signals include a master timing signal from which other timing signals can be derived. Such a master timing signal is commonly referred to as a ‘clock’ signal. It is often desirable to have a clock signal that is available in more than one phase. 
   An example of a two-phase clock signal is where available clock signals have a phase difference of 180-degrees as often used for dynamic logic and shift register circuitry. An example of a four-phase clock signal is where available clock signals have successive phase differences of 90-degrees. Semiconductor integrated circuits (ICs or chips) are typical host environments, often very large scale (VLSI) chips as for microprocessors or memories. 
   Historically, modest operating clock frequencies up to about 50 MHz were satisfied by use as off-chip quartz crystal clock oscillator with simple point-to-point on-chip clock signal distribution. Nowadays, at much higher operating frequencies, typically aiming for 300 MHz to 1 GHz, inherent on-chip distribution problems associated with clock signal reflection and skew have become highly significant as binary signal widths/durations are no longer so much shorter than clock signal pulses. Natural progression of IC designs is for chips to become physically bigger and functionally more complex, which compounds these problems. 
   Clock signal generation is presently typically by frequency multiplication from off-chip crystal clock oscillators using on-chip phase locked loop (PLL) control circuitry which occupies valuable chip area, consumes considerable power, and experiences problems with signal reflections, capacitive loading and power dissipation that effectively limit maximum operating frequency. Related clock signal distribution usually involves tree-like arrangement of operational circuitry with chains of clock signal boosting buffers at intervals. Even so, variability of semiconductor process parameters, including in the buffers, leads to undesirable and unpredictable phase delays (skew) at different positions on the chip, thus can adversely affect reliable synchronous operation and communication even for neighboring areas of a chip. As a result, ICs often have to be rated and run at lower than maximum designed-for clock rates. Indeed, IC manufacturers are even reversing long-standing trends by use of smaller chip sizes for latest ICs. 
   The development of ever more comprehensive ‘systems-on-silicon’ chips is being hampered by lack of viable provisions for reliably clocking large area high-density chips. It is noteworthy that clock rates tend to be limited to less than about 1 Gigahertz despite such as MOSFET IC transistor features being capable of switching at 25 Gigahertz or more. 
   This invention arises basically from looking for some alternative approach that at least reduces area and/or power demands of on-chip PLL provisions, if possible further addresses and to some useful extent resolves clock signal distribution problems. 
   BRIEF SUMMARY OF THE INVENTION 
   One broad view or aspect of this invention resides in the concept and realization of method and means for effectively integrating or synergistically combining distribution of repeating pulse or cyclic signals with active means for producing and maintaining those signals. A composite electromagnetic/semiconductor structure is facilitated that simultaneously generates and distributes timing signals, including a master clock. A suitable said signal path exhibits endless electromagnetic continuity affording signal phase inversion of an electromagnetic wave type signal, conveniently with path-associated regenerative means. 
   A successful inventive rationale aspect hereof has been evolved in which time constant for repeating pulse or cyclic signals is related to and effectively defined by electrical length of said signal path in the signal distribution means. A traveling electromagnetic wave recirculating endlessly electromagnetically continuous said signal path is preferred, when its traverse time of the signal path determines said time constant. 
   Interestingly and quite surprisingly, this has been found to be conducive to particular inventive direct production of pulse-like cyclic signals inherently having fast rise and fall characteristics, i.e., already “square” as produced, rather than requiring resort to “squaring” action on a basic inherently substantially sinusoidal signal as hitherto conventional. Indeed, such inventive electrical length/signal traverse time-constant-defining rationale hereof leads conveniently and advantageously to said electrical length or one said signal traverse effectively first defining one unipolar half-cycle signal excursion and next, or at next said signal traverse, effectively completing definition of a full bipolar cycle comprising two opposite half-cycle excursions. Said electrical length thus corresponds to 180-degrees for each of two successive pulse excursions for such full bipolar cycle. 
   Specific inventive aspects hereof to achieve such rationale are viewed as involving signals of a traveling wave nature with the signal distribution path involved having a suitably propagating nature therefor, typically of endless transmission-line form, further with transposing effect and inverting action associated with re-circulations of desired signals. 
   In one specific inventive aspect hereof, desired repeating cyclic signals involve re-circulatory traveling wave propagation means effectively affording rotation thereabout by a desired traveling wave and setting duration of each signal excursion, with active regenerative means that can be of switching and amplifying nature, conveniently bidirectional inverting amplifier, supplying energy requirements and setting relatively short rise and fall at ends of each signal excursion. 
   Suitable traveling wave propagation means with desired transposing effect relative to active inverting means is exemplified, as seen by the traversing traveling wave, by physical width twisted along its length to connect opposite sides to input and output of the inverting means, say as though a Moebius band or ribbon. Indeed, an integrated circuit made on a flexible substrate could be of elongate form with said path following its length and its ends interconnected as a Moebius band or ribbon, even with functional circuitry blocks to either or both sides of or straddling its traveling wave propagation feature. At least then, integration of inverting and traveling wave propagating features of cyclic signal means hereof could be to the extent of up to all its length being of continuous semiconductor inverter nature, at least using CMOS technology. 
   However, for planar implementation of traveling wave propagation means, a typical transmission-line form uses spaced path-following conducting features, aforesaid Moebius twist effect being afforded by way of no more than a mutually insulated cross-over of those spaced conducting features. An alternative would be use of a transmission-line inverting transformer in or associated with otherwise transmission-line form of the traveling propagation means. 
   An inventive aspect of exemplary implementation hereof uses spaced conductive features as trace formations each having substantially the same length and being transposed on the way between output and input of at least one inverter feature connected to, preferably between, those conductive traces. In practice, at least where the inverter feature is of extent less than about 1% along the conductive features, there will preferably be plural inverter features spaced along the conductive features or traces—unless this invention is adapted to operation as a standing wave oscillator. 
   Preferred inverter means is of bidirectional nature, such as a pair of opposite inverters side-by-side or back-to-back; and such provision facilitates direct simultaneous production of similar or substantially identical anti-phase cyclic signal components. 
   Particularly interesting and advantageous results available from this invention include timing signal provision with extremely low power consumption that can effectively be limited to transmission-line and inverter action losses, i.e., to near-negligible topping-up via the inverter provision(s), and take-off to operational circuitry is readily made, e.g. by way of light bidirectional connection paths of passive resistive and/or capacitive and/or inductive or transmission-line nature, or unidirectional say using diodes or inverters, etc as will be described in more detail. 
   Another such available result is that, at least in principle and absent fabrication imperfections, cyclic signal provision hereof has no innate preference for either direction or rotation of traveling wave propagation, though either may be predisposed or imposed by such as prescribed spacings or other differences between or within inverter means. 
   Inventive proposals and aspects hereof as to pulse generators and oscillators as such include transmission-line structures using conductive metal and insulating dielectric layers in a manner compatible with IC production generally and particularly together with regenerative circuitry associated with the transmission-line as such, typically and conveniently formed below and connected by vias; required insulated cross-overs or spaced transmission-line transformer parts are likewise readily formed including such as via jump connections for the cross-overs; and resulting advantageously DC unstable interconnection of terminals of such as bidirectional inverters as the regenerative means; synchronous detection and bridge rectifier action of preferred bidirectional inverters; reinforcing sequential action of such bidirectional inverters including recycling electrical energy relative to supplies; etc. 
   Moreover, there are inventive aspects in interconnection/intercoupling of timing signal generating and distribution circuitry hereof, whether by direct connection or by sharing magnetic and/or electrical fields; and doing so on a self-synchronizing basis with extension to different frequencies particularly in odd-harmonic relationship. Intercoupling and coordinating between ICs as such and further with transferring data also have important innovative and inventive merit. 
   One embodiment of the present invention is electronic circuitry for generating and distributing standing wave clocking signals. The embodiment includes one or more transmission line segments, an odd number of passive connection means, and at least one regeneration device. Each transmission line segment is a length of two-conductor transmission line, with each conductor being electrically continuous. The passive connection means connect the transmission line segments to form a closed loop of segments and passive connection means. The regeneration device is connected between the first and second conductors of a segment and is operative to establish and maintain a standing wave on the loop, where the wave includes a voltage wave between the first and second conductors. Each of the passive connection means causes the voltage wave between the first and second conductors to reverse polarity, so that, at any location on a segment, except at any null point, there is a pair of oppositely phased oscillations. 
   Another embodiment of the present invention includes a plurality of propagating means, an odd number of energy-continuous interconnecting means, and means for initiating and maintaining the propagated signals. The plurality of propagating means is operative to propagate a signal. The energy-continuous interconnecting means is operative to interconnect the plurality of propagating means to form a closed loop of propagating means and interconnecting means and to reverse the polarity of the signal. The means for initiating and maintaining the propagated signals on the closed loop is operative to form a standing wave on the loop, such that at any point, except at any null point, on the propagating means there is a pair of oppositely phased signals. 
   Other aspects and features of the present invention arise later in this Description, and/or are as set out in independent and dependent claims wording of which is to be taken as incorporated here too. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     These and other features, aspects and advantages of the present invention will become better understood with regard to the following description, appended claims, and accompanying drawings where: 
     Specific exemplary implementation for the invention is now described and shown by reference to the accompanying diagrammatic drawings, in which 
       FIG. 1  is an outline diagram for a transmission-line structure hereof; 
       FIG. 2  shows a Moebius strip; 
       FIG. 3  is an outline circuit diagram for a traveling wave oscillator hereof; 
       FIG. 4  is another outline circuit diagram for a traveling wave oscillator hereof; 
       FIGS. 5   a  and  5   b  are equivalent circuits for distributed electrical models of a portion of a transmission-line hereof; 
       FIG. 6   a  shows idealized graphs for respective differential output waveforms hereof; 
       FIG. 6   b  illustrates relationship between propagation delay, electrical length and physical length of a transmission-line hereof; 
       FIGS. 7(   i )– 7 ( ix ) are idealized graphs illustrating the phase of signal waveforms hereof; 
       FIGS. 8   a ,  8   b  illustrate instantaneous phasing of one waveform in a transmission-line oscillator hereof; 
       FIG. 9  is a cross sectional view of part of a transmission-line on an IC; 
       FIGS. 10   a  and  10   b  are outline circuit and idealized graphs for a standing wave version; 
       FIG. 11  is a scrap outline of a transmission-line with inverting transformer; 
       FIG. 12  shows a pair of back-to-back inverters connected across part of a transmission-line; 
       FIGS. 13   a  and  13   b  are outline and equivalent circuit diagrams of CMOS back-to-back inverters; 
       FIG. 14   a  details capacitive elements of a transmission-line together with CMOS transistors; 
       FIG. 14   b  is on an equivalent circuit diagram for  FIG. 14   a;    
       FIG. 15  shows capacitive stub connections to a transmission-line; 
       FIG. 16  shows one connection for self-synchronizing transmission-line oscillators; 
       FIGS. 17   a – 17   c  show other connections for self-synchronizing transmission-line oscillators; 
       FIG. 18  is a diagrammatic equivalent representation for  FIG. 13   a;    
       FIGS. 19   a  and  19   b  show connection of four transmission-line oscillators; 
       FIGS. 20 and 21  show magnetically coupled self-synchronized transmission-line oscillators; 
       FIG. 22  shows three magnetically couple self-synchronized transmission-line oscillators; 
       FIG. 23  shows connection of self-synchronizing transmission-lines oscillators of different frequencies; 
       FIG. 24  shows an example of a clock distribution network for a monolithic IC; 
       FIG. 25  shows 3D implementation for timing systems hereof; 
       FIGS. 26   a  and  26   b  show examples of dual phase tap-off points; 
       FIG. 27  shows three concentrically arranged transmission-line oscillators; 
       FIGS. 28   a  and  28   b  show a transmission-line having a cross-loop connection; 
       FIG. 29   a  shows a transmission-line configuration for four-phase signals; 
       FIG. 29   b  shows idealized resulting four-phase signal waveforms; 
       FIG. 30  shows an open-ended transmission-line connection; 
       FIG. 31  concerns co-coordinating frequency and phase for two IC&#39;s; 
       FIG. 32  shows digitally selectable shunt capacitors of MOSFET type; and 
       FIG. 33  shows capacitive loading and routing data and/or power across a transmission-line. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   Known transmission-lines broadly fall into two categories in that they are either open-ended or specifically terminated either partially or fully. Transmission-lines as proposed herein are different in being neither terminated nor open-ended. They are not even unterminated as such term might be understood hitherto; and, as unterminated herein, are seen as constituting a structural aspect of invention, including by reason of affording a signal path exhibiting endless electromagnetic continuity. 
     FIG. 1  shows such a transmission-line  15  as a structure that is further seen as physically endless, specifically comprising a single continuous “originating” conductor formation  17  shown forming two appropriately spaced generally parallel traces as loops  15   a ,  15   b  with a cross-over at  19  that does not involve any local electrical connection of the conductor  17 . Herein, the length of the originating conductor  17  is taken as S, and corresponds to two ‘laps’ of the transmission-line  15  as defined between the spaced loop traces  15   a ,  15   b  and through the cross-over  19 . 
   This structure of the transmission-line  15  has a planar equivalence to a Moebius strip, see  FIG. 2 , where an endless strip with a single twist through 180.degree. has the remarkable topology of effectively converting a two-sided and two-edged, but twisted and ends-joined, originating strip to have only one side and one edge, see arrows endlessly tracking the centre line of the strip. From any position along the strip, return will be with originally left- and right-hand edges reversed, inverted or transposed. The same would be true for any odd number of such twists along the length of the strip. Such a strip of conductive material would perform as required for signal paths of embodiments of this invention, and constitutes another structural aspect of invention. A flexible substrate would allow implementing a true Moebius strip transmission-line structure, i.e., with graduality of twist that could be advantageous compared with planar equivalent cross-over  19 . A flexible printed circuit board so formed and with its ICs mounted is seen as a feasible proposition. 
     FIG. 3  is a circuit diagram for a pulse generator, actually an oscillator, using the transmission-line  15  of  FIG. 1 , specifically further having plural spaced regenerative active means conveniently as bi-directional inverting switching/amplifying circuitry  21  connected between the conductive loop traces  15   a ,  15   b . The circuitry  21  is further illustrated in this particular embodiment as comprising two inverters  23   a ,  23   b  that are connected back-to-back. Alternatives regenerative means that rely on negative resistance, negative capacitance or are otherwise suitably non-linear, and regenerative (such as Gunn diodes) or are of transmission-line nature. It is preferred that the circuitry  21  is plural and distributed along the transmission-line  15 , further preferably evenly, or substantially evenly; also in large numbers say up to 100 or more, further preferably as many and each as small as reasonably practical. 
   Inverters  23   a ,  23   b  of each switching amplifier  21  will have the usual operative connections to relatively positive and negative supply rails, usually V+ and GND, respectively. Respective input/output terminals of each circuit  21  are shown connected to the transmission-line  15  between the loops  15   a ,  15   b  at substantially maximum spacing apart along the effectively single conductor  17 , thus each at substantially halfway around the transmission-line  15  relative to the other. 
     FIG. 4  is another circuit diagram for an oscillator using a transmission-line structure hereof, but with three cross-overs  19   a ,  19   b  and  19   c , thus the same Moebius strip-like reversing/inverting/transposing property as applies in  FIG. 3 . 
   The rectangular and circular shapes shown for the transmission-line  15  are for convenience of illustration. They can be any shape, including geometrically irregular, so long as they have a length appropriate to the desired operating frequency, i.e., so that a signal leaving an amplifier  21  arrives back inverted after a full ‘lap’ of the transmission-line  15 , i.e., effectively the spacing between the loops  15   a,b  plus the crossover  19 , traversed in a time Tp effectively defining a pulse width or half-cycle oscillation time of the operating frequency. 
   Advantages of evenly distributing the amplifiers  21  along the transmission-line  15  are twofold. Firstly, spreading stray capacitance effectively lumped at associated amplifiers  21  for better and easier absorbing into the transmission-line characteristic impedance Zo thus reducing and signal reflection effects and improving poor waveshape definition. Secondly, the signal amplitude determined by the supply voltages V+ and GND will be more substantially constant over the entire transmission-line  15  better to compensate for losses associated with the transmission-lines dielectric and conductor materials. A continuous closed-loop transmission-line  15  with regenerative switching means  21  substantially evenly distributed and connected can closely resemble a substantially uniform structure that appears the same at any point. 
   A good rule is for elementary capacitance and inductance (Ce and Le) associated with each regenerative switching means and forming a resonant shunt tank LC circuit to have a resonant frequency of 1/(2π√{square root over (L e C e )}) that is greater than the self-sustaining oscillating frequency F (F3, F5 etc.) of the transmission-line  15 . 
     FIG. 5   a  is a distributed electrical equivalent circuit or model of a portion of a transmission-line  15  hereof. It shows alternate distributed resistive (R) and inductive (L) elements connected in series, i.e., R 0  connected in series with L 1  in turn connected in series with R 2  and so on for a portion of loop  15   a , and registering L 0  connected in series with R 1  in turn connected in series with L 2  and so on for the adjacent portion of loop  15   b ; and distributed capacitive elements C 0  and C 1  shown connected in parallel across the transmission-line  15  thus to the loops  15   a  and  15   b  between the resistive/inductive elements R 0 /L 1  and the inductive/resistive elements L 0 /R 1 , respectively for C 0 , and between the inductive/resistive elements L 1 /R 2  and the resistive/inductive elements R 1 /L 2 , respectively for C 1 : where the identities R 0 =R 1 =R 2 , L 1 =L 2 =L 3  and C 0 =C 1  substantially hold and the illustrated distributed RLC model extends over the whole length of the transmission-line  15 . Although not shown, there will actually be a parasitic resistive element in parallel with each capacitive element C, specifically its dielectric material. 
     FIG. 5   b  is a further simplified alternative distributed electrical equivalent circuit or model that ignores resistance, see replacement of those of  FIG. 5   a  by further distribution of inductive elements in series at half (L/2) their value (L) in  FIG. 5   a . This model is useful for understanding basic principles of operation of transmission-lines embodying the invention. 
   During a ‘start-up’ phase, i.e., after power is first applied to the amplifiers  21 , oscillation will get initiated from amplification of inherent noise within the amplifiers  21 , thus begin substantially chaotically though it will quickly settle to oscillation at a fundamental frequency F, typically within nanoseconds. For each amplifier  21 , respective signals from its inverters  23   a  and  23   b  arrive back inverted after experiencing a propagation delay Tp around the transmission-line  15 . This propagation delay Tp is a function of the inductive and capacitive parameters of the transmission-line  15 ; which, as expressed in henrys per meter (L) and in farads per meter (C) to include all capacitive loading of the transmission-line, lead to a characteristic impedance Zo=SQR (L/C) and a line traverse or propagation or phase velocity Pv=1/SQRT(L/C). Reinforcement, i.e., selective amplification, of those frequencies for which the delay Tp is an integer sub-divisor of a half-cycle time gives rise to the dominant lowest frequency, i.e., the fundamental frequency F=1/(2.multidot.Tp), for which the sub-divisor condition is satisfied. All other integer multiples of this frequency also satisfy this sub-divisor condition, but gain of the amplifiers  21  ‘falls off’, i.e., decreases, for higher frequencies, so the transmission-line  15  will quickly settle to fundamental oscillation at the frequency F. 
   The transmission-line  15  has endless electromagnetic continuity, which, along with fast switching times of preferred transistors in the inverters  23   a  and  23   b , leads to a strongly square wave-form containing odd harmonics of the fundamental frequency F in effectively reinforced oscillation. At the fundamental oscillating frequency F, including the odd harmonic frequencies, the terminals of the amplifiers  21  appear substantially unloaded, due to the transmission-line  15  being ‘closed-loop’ without any form of termination, which results very desirably in low power dissipation and low drive requirements. The inductance and capacitance per unit length of the transmission-line  15  can be altered independently, as can also be desirable and advantageous. 
     FIG. 6   a  shows idealized waveforms for a switching amplifier  21  with inverters  23   a  and  23   b . Component oscillation waveforms .PHI. 1 , .PHI. 2  appear at the input/output terminals of that amplifier  21  shortly after the ‘start-up’ phase, and continue during normal operation. These waveforms .PHI. 1  and .PHI. 2  are substantially square and differential, i.e., two-phase inverse in being 180 degrees out-of-phase. These differential waveforms .PHI. 1  and .PHI. 2  cross substantially at the mid-point (V+/2) of the maximum signal amplitude (V+). This mid point (V+/2) can be considered as a ‘null’ point since the instant that both the waveforms .PHI. 1  and .PHI. 2  are at the same potential, there is no displacement current flow present in nor any differential voltage between the conductive loop traces  15   a  and  15   b . For the preferred recirculating traveling wave aspect of this invention, this null point effectively sweeps round the transmission line  15  with very fast rise and fall times and a very ‘clean’ square-wave form definition. This null point is also effectively a reference voltage for opposite excursions of a full cycle bipolar clock signal. 
   For the transmission-line  15 , it is convenient to consider complete laps as traversed by a traveling wave, and also total length S of the originating conductive trace  17 , both in terms of ‘electrical length’.  FIG. 6   b  shows relationships between the propagation delay or traverse time (Tp), electrical length in degrees, and physical length (S) of originating conductive line/trace  17 . For each of the out-of-phase waveforms .PHI. 1  and .PHI. 2 , and as seen by a traveling wave repeatedly traversing the transmission-line  15 , each substantially square wave excursion corresponds to one complete lap, i.e., one traverse time Tp, and successive opposite wave excursions require two consecutive laps, i.e., two traverse times (2.times.Tp). One lap of the transmission-line  15  thus has an ‘electrical length’ of 180 degrees, and two laps are required for a full 0.degree.–360.degree. bipolar signal cycle, i.e., corresponding to the full lengths of the originating conductor  17 . 
   By way of example, an electrical length of 1800 corresponding to one lap and ½ wavelength at 1 GHz could be formed from a 45 mm transmission-line having a phase velocity (Pv) that is 30% that of the speed of light (c), i.e., Pv=0.3*c, or 4.5 mm where Pv=0.03*c, or 166 mm in free space, i.e., where Pv=1*c. 
     FIGS. 7(   i )– 7 ( ix ) show waveforms .PHI. 1 , .PHI. 2  through a full cycle to start of the next cycle, specifically at eight equal electrical-length spacings of 45 degrees between sample positions along the conductor line or trace  17 . Phase labelings are relative to  FIG. 7(   i ) which can be anywhere along the trace  17 , i.e., twice round the transmission line  15 , as such, and 0/360-degrees for rise/fall of the .PHI. 1 , .PHI. 2  waveforms  15  is arbitrarily marked. Taking  FIG. 7(   i ) as time to,  FIG. 7(   ii ) shows the waveforms .PHI. 1 , .PHI. 2  at time t0+(0.25 Tp) after one-eighth (0.125 S) traverse of total length S of the line  17 , thus traverse of one-quarter of the transmission line  15 , and 45-degrees of electrical length. Times t0+(0.5 Tp), t0+(0.75 Tp), t0+(0.75 Tp) . . . t0+(2 Tp); traverses 0.25 S, 0.375 S, 0.5 S . . . 1.0 S and 90, 135, 180 . . . 360-degrees should readily be seen self-evidently to apply to  FIGS. 7(   iii )–( ix ), respectively. 
     FIGS. 8   a  and  8   b  show snap-shots of excursion polarity (shown circled), displacement current flow (shown by light on-trace arrows), and instantaneous phasing from an arbitrary 0/360-degree position on the electromagnetically endless transmission line  15  covering two laps thereof (thus the full length the continuous originating conductor  17 ). Only one differential travelling electromagnetic (EM) waveform (say .PHI. 1 ) of  FIG. 7  is shown, but for rotation propagation around the transmission-line  15  in either of opposite directions, i.e., clockwise or counter-clockwise. The other waveform (.PHI. 2 ) will, of course be 180.degree. out of phase with the illustrated waveform (.PHI. 1 ). The actual direction of rotation of the EM wave will be given by Poynting vector, i.e., the cross product of the electric and magnetic vectors. The crossover region  19  produces no significant perturbation of the signals .PHI. 1  or .PHI. 2  as the EM wave traverses this region  19 . In effect, the fast rise/fall transitions travel round the transmission-line at phase velocity Pv, the switching amplifiers  21  serving to amplify the transitions during first switching between supply voltage levels. 
   The phases of the waveforms .PHI. 1  and .PHI. 2  can, for a transmission-line  15  hereof, be accurately determined from any arbitrary reference point on the transmission-line  15 , thus have strong coherence and stability of phasing. 
   Suitable (indeed preferred in relation to present IC manufacturing technology and practice) switching amplifiers  21  for bidirectional operation are based on back-to-back MOSFET inverters  23   a,b , for which up to well over 1,000 switching inverting amplifier pairs could be provided along typical lengths of transmission-line structures hereof. 
   The bidirectional inverting action of the switching amplifiers  21  is of synchronous rectification nature. The rise and fall times of the waveforms .PHI. 1  and .PHI. 2  are very fast indeed compared with hitherto conventional timing signals, being based on electron-transit-time of preferred MOSFET transistors of the inverters  23   a,b . Moreover, reinforcement is related to the transmission-line  15  having lower impedance than any ‘on’ transistor in inverters of preferred bidirectional switching amplifiers  21 , though total paralleled is usefully of the same order. Switching of such inverters means that each amplifier  21  contributes to the resulting wave polarity by way of a small energy pulse which, by symmetry, must propagate in both directions, the forwardly directed EM wave pulse thus contributing as desired. The reverse EM wave pulse that travels back to the previously switched amplifier  21  is of the same polarity as already exists there, thus reinforces the pre-existing switched state. Ohmic paths between power supply rails and the transmission line  15  through ‘on’ transistors of the preferred inverters of amplifiers  21  ensure that energy of such reverse EM wave pulses is absorbed into those power supply rails V+,GND, i.e., there is useful power conservation. 
   It should be appreciated that implementation could be by other than CMOS, e.g. by using N-channel pull-ups, P-channel pull-downs, bipolar transistors, negative resistance devices such as Gunn diodes, MESFET, etc. 
   Regarding the transmission-lines  15  as such, a suitable medium readily applicable to ICs and PCBs and interconnects generally is as commonly referred to as microstrip or coplanar waveguide or stripline, and well known to be formable lithographically, i.e., by patterning of resists and etching. Practical dielectrics for an on-IC transmission-line include silicon dioxide (SiO2) often referred to as field oxide, inter-metal dielectrics, and substrate dielectrics (which can be used at least for semi-insulating structures, e.g. of silicon-on-insulator type). 
     FIG. 9  is a cross-section through a portion of one exemplary on-IC transmission-line formation comprising three metal layers  56 ,  58  and  60  and two dielectric layers  62  and  64 . Middle metal layer  58  is illustrated as comprising the two transmission-line loop conductive traces  15   a  and  15   b  that are at least nominally parallel. Upper metal layer  60  could be used as an AC ‘ground’ plane and could be connected to the positive supply voltage V+, lower metal  56  being a ‘ground’ plane that could be connected to the negative supply voltage GND. The dielectric layers  62  and  64  between the metal transmission-line traces at  58  and ‘ground’ planes  56  and  58  are typically formed using silicon dioxide (SiO2). The full illustrated structure is seen as preferable, though maybe not essential in practice, i.e., as to inclusion of either or both of the ‘ground’ planes and the dielectric layers  62 ,  64 . The physical spacing  66  between the conductive traces  15   a ,  15   b  affects the differential and common modes of signal propagation, which should preferably have equal, or substantially equal, velocities in order to achieve minimum dispersion of the electromagnetic field from the spacing  66 . Screening properties improve with use of ‘ground planes’, as does the ability for the structure to drive non-symmetrical, i.e., unbalanced, loads applied to the conductive traces  15   a ,  15   b.    
   Inter-metal dielectric layers on a typical IC CMOS process are thin, typically about 0.7 um, so microstrip transmission-line features with low signal losses must have a low characteristic impedance Zo (as hitherto for unterminated, partially terminated or series terminated lines acting to reduce signal reflections to a manageable level). Self-sustaining, non-terminated, closed-loop transmission-lines  15  hereof inherently have very low power consumption for maintained traveling EM wave oscillation as the dielectric and conductor losses to be overcome are typically low. From  FIG. 5   b , it will be appreciated that, if there were no resistive losses associated with the transmission-line  15  and amplifiers  21 , the transmission-line  15  would require no more energy than required initially to ‘charge-up’ the transmission-lines inductive Le and capacitive Ce elements. The EM wave would continually travel around the transmission-line with all energy in the transmission-line  15  simply transferred, or recycled between its electric and magnetic fields, thus capacitive Ce and inductive Le elements. Whilst there must be some resistive losses associated with the transmission-line  15  and amplifiers  21 , see transmission-line resistive elements R 0 –R 2  in  FIG. 5   a , the resistance is typically low and associated resistive losses will be also low. There is no penalty herein from for using low-impedance transmission-lines  15 , even advantage from being less affected by capacitive loading, thus resulting in ‘stiffer’ drive to logic gates. 
   A crossover  19  can be implemented on an IC using ‘vias’ between the metal layers, preferably with each via only a small fraction of total length S of the transmission-line  15 . 
   A variant is available where a transmission-line  15  hereof has only one amplifier  21  connected to the transmission-line, and the EM wave no longer travels around the transmission-line  15  so that a standing wave oscillation results, see  FIG. 10   a  for single amplifier  21  and  FIG. 10   b  for differential waveforms. Such amplifier should not extend over more than approximately 5.degree. of the electrical length of the transmission-line  15 . If the single amplifier  21  never goes fully ‘on’ or ‘off’ a standing sine wave oscillation will result in the transmission-line  15 , which will have varying amplitude with the same phases at the same positions including two stationary, two null regions. 
   It follows that traveling wave operation will be available using a few spaced or just one lengthy CMOS bidirectional inverter formation, though plural small inverters will produce smoother faster results. Offsetting formations of the amplifiers  21 , even just its input/output terminals, can predispose a traveling EM wave to one direction of transmission-line traversal, as could specific starter circuit such as based on forcing first and slightly later second pulses onto the transmission-line at different positions, or incorporation of some known microwave directional coupler. 
   Inverting transmission-line transformers can be used instead of the crossovers ( 19 ) and still yield a transmission line having endless electromagnetic continuity, see  FIG. 11  for scrap detail at 21T. 
     FIG. 12  shows a pair of back-to-back inverters  23   a ,  23   b  with supply line connectors and indications of distributed inductive (L/2) and capacitive (C) elements of a transmission-line as per  FIG. 5   b .  FIG. 13   a  shows N-channel and P-channel MOSFET implementation of the back-to-back inverters  14   a  and  14   b , see out of NMOS and PMOS transistors. 
     FIG. 13   b  shows an equivalent circuit diagram for NMOS (N 1 , N 2 ) and PMOS (P 1 , P 2 ) transistors, together with their parasitic capacitances. The gate terminals of transistors P 1  and N 1  are connected to the conductive trace  15   a  and to the drain terminals of transistors P 2  and N 2 . Similarly, the gate terminals of transistors P 2  and N 2  are connected to the conductive trace  15   b  and to the drain terminals of transistors P 2  and N 2 . The PMOS gate-source capacitances CgsP 1  and CgsP 2 , the PMOS gate-drain capacitances CgdP 1  and CgdP 2 , and the PMOS drain-source and substrate capacitances CdbP 1  and CdbP 2 , also the NMOS gate-source capacitances CgsN 1  and CgsN 2 , the NMOS gate-drain capacitances CgdN 1  and CgdN 2 , and the NMOS drain-source and substrate capacitances CdbN 1  and CdbN 2  are effectively absorbed into the characteristic impedance Zo of the transmission-line, so have much less effect upon transit times of the individual NMOS and PMOS transistors. The rise and fall times of the waveforms .PHI. 1  and .PHI. 2  are thus much faster than for prior circuits. 
   For clarity  FIGS. 12–14  omit related resistive (R) elements.  FIG. 14   a  shows only the capacitive elements (as per  FIGS. 12 and 13   b ) of the transmission-line  15  together with those of the N/PMOS transistors.  FIG. 14   b  illustrates another equivalent circuit diagram for  FIG. 14   a  including the transmission-line distributed inductive (L/2) elements and the effective capacitance Ceff given by:
 
 Ceff=C+CgdN+CgdP+[ ( CgsN+CdbN+CgsP+CdbP )/4];
 
   Where:
     CgdN=CgdN 1 +CgdN 2 ;   CgdP=CgdP 1 +CgdP 2 ;   CgsN=CgsN 1 +CgsN 2 ;   CdbN=CdbN 1 +CdbN 2 ;   CgsP=CgsP 1 +CgsP 2 ; and   CdbP=CdbP 1 +CdbP 2 .   

   Capacitance loading due to gate, drain, source and substrate junction capacitances are preferably distributed as mentioned previously. 
   An advantage of having a differential- and common-mode, transmission-line, is that ‘parasitic’ capacitances inherent within MOSFET transistors can be absorbed into the transmission-line impedance Zo, as illustrated in  FIGS. 14   a  and  14   b , and can therefore be used for energy transfer and storage. The gate-source capacitances (Cgs) of the NMOS and PMOS transistors appear between the signal conductor traces  15   a ,  15   b  and their respective supply voltage rails and can be compensated for by removing the appropriate amount of respective capacitance from connections of the transmission-line  15  to the supply voltage rails, say by thinning the conductor traces  15   a ,  15   b  by an appropriate amount. The gate-drain capacitance (Cgd) of the NMOS and PMOS transistors appear between the conductive traces  15   a  and  15   b  and can be compensated for by proportionally increasing the spacing  66  between the conductive traces  15   a ,  15   b  at connections to the NMOS and PMOS transistors of the inverters  23   a/b.    
   By way of a non-restrictive example, on a 0.35 micron CMOS process, a usable 5 GHz non-overlapping clock signal should result with transmission-line loop length (S/2) of 9 mm for a phase velocity of 30% of speed-of-light, as determined by capacitive shunt loading distribution and dielectric constants, the total length (S), of the conductor  17  thus being 18 mm. 
   The substrate junction capacitances (Cdb) of the NMOS and PMOS transistor could be dramatically reduced by using semi-insulating or silicon-on-insulator type process technologies. 
   There is a continuous DC path that directly connects the terminals of each of the amplifiers  21 , i.e., the respective input/output terminals of each and all of the inverters  23   a ,  23   b , but this path is characterized by having no stable DC operating point. This DC instability is advantageous in relation to the regenerative action of each of the respective amplifiers  21   1 – 21   4  and their positive feedback action. 
   Transmission-lines  15  hereof can be routed around functional logic blocks as closed-loops that are ‘tapped into’ to get ‘local’ clock signals. CMOS inverters can be used as ‘tap amplifiers’ in a capacitive ‘stub’ to the transmission-line  15 , which can be ‘resonated out’ by removing an equivalent amount of ‘local’ capacitance from the transmission-lines, say by local thinning of conductor traces ( 15   a / 15   b ) as above. Capacitive ‘clock taps’ can be spread substantially evenly along a transmission-line  15  hereof having due regard as a matter of design to their spacings, which, if less than the wavelength of the oscillating signal, will tend to slow the propagation of the EM wave and lower the characteristic impedance Zo of the transmission-line ( 15 ), but will still result in good signal transmission characteristics. 
   Within functional logic blocks that are small relative to clock signal wavelength, unterminated interconnects work adequately for local clocking with phase coherence, see  FIG. 15 . For clarity, the pairs of connections to the transmission-line  15  are shown slightly offset, though they would typically be opposite each other in practice. Alternative tap-off provisions include light bidirectional of passive resistive, inductive or transmission-line nature, or unidirectional or inverting connections, including much as for what will now be described for interconnecting transmission-lines  15  themselves. 
   Plural oscillators and transmission-lines  15  can readily be operatively connected or coupled together in an also inventive manner, including synchronizing with each other both in terms of phase and frequency provided that any nominal frequency mismatch is not too great. Resistive, capacitive, inductive or correct length direct transmission-line connections/couplings, or any combinations thereof, can make good bidirectional signal interconnections. Signal connection or coupling between transmission-lines can also be achieved using known coupling techniques as used for microwave micro-strip circuits, generally involving sharing of magnetic and/or electrical flux between adjacent transmission lines. Unidirectional connections can also be advantageous. Connectors and couplings hereof are capable of maintaining synchronicity and coherency of plural transmission-line oscillators throughout a large system, whether within ICs or between IC&#39;s say on printed circuit boards (PCBs). 
   Connection/coupling of two or more transmission-lines and cross-connection rules are similar to Kirchoff&#39;s current law but based on the energy going into a junction, i.e., a connection or coupling, of any number of the transmission-lines being equal to the energy coming out of the same junction, i.e., there is no energy accumulation at the junction. When the supply voltage V+is constant, the rule is, of course, precisely Kirchoff&#39;s current law. By way of a practical example, if there is a junction common to three transmission-lines, the simplest, but not the only, solution is that one of the transmission-lines has half the characteristic impedance of the other two transmission-lines. Where there are any even number of coupled transmission-lines, their respective characteristic impedances can all be equal. However, there are an infinite number of combinations of impedances which will satisfy Kirchoff&#39;s current law. The cross-connection rule, within a transmission-line, is the same as the rules for coupling two or more transmission-lines described above. 
   There will be high quality differential signal waveforms Φ 1  and Φ 2 , in terms of phase and amplitude, at all points around a transmission-line network  15  when the following criteria are met: 
   (i) the transmission-lines have substantially matching electrical lengths 
   (ii) above Kirchoff-like power rules are satisfied 
   (iii) there is phase inversion. 
   There are, of course, an infinite number of coupled network designs and supply voltages that will fulfill the above three criteria, such as for example: short sections of slow, low impedance transmission-lines that are coupled to long fast, high impedance transmission-lines; and one- and/or three-dimensional structures etc. However, for the best wave-shapes and lowest parasitic power losses, the phase velocities of the common-mode and the differential-mode, i.e., even and odd modes, should be substantially the same. The same, or substantially the same, phase velocities can be designed into a system by varying the capacitances of the transmission-lines. 
   The supply voltage V+does not have to be constant throughout a system, provided that above Kirchoff-like power/impedance relationships are maintained and result in an inherent voltage transformation system that, when combined with the inherent synchronous rectification of the inverters  23   a  and  23   b , allows different parts of the system to operate at different supply voltages, and power to be passed bi-directionally between such different parts of the system. 
     FIG. 16  shows two substantially identical transmission-line oscillators hereof that are operatively connected such that they are substantially self-synchronizing with respect to frequency and phase. The transmission-lines  15   1  and  15   2  are shown ‘siamesed’ with the common part of their loop conductive traces meeting above Kirchoff-like power/impedance rule by reason of its impedance being half the impedances ( 20 ) of the remainders of the transmission-lines  15   1  and  15   2 , because the common parts carry rotating wave energy of both of the two transmission-lines  15   1  and  15   2 . As noted above, the originating trace length S of a transmission-line is one factor in determining the frequency of oscillation so transmission-lines  15   1  and  15   2  using the same medium and of substantially identical length S will have substantially the same frequency of oscillation F and will be substantially phase coherent. In  FIG. 16 , respective EM waves will travel and re-circulate in opposite directions around the transmission-lines  15   1  and  15   2 , see marked arrows  1 L,  2 L (or both opposite), in a manner analogous to cog wheels. Such siamesing connection of transmission-lines can readily be extended sequentially to any number of such ‘cogged’ transmission-line oscillators. 
     FIG. 17   a  shows another example of two substantially identical transmission-line oscillators with their transmission lines  15   1  and  15   2  operatively connected to be substantially self-synchronizing in frequency and phase by direct connections at two discrete positions  40  and  42 .  FIG. 17   b  shows such direct connections via passive elements  44 ,  46  that could be resistive, capacitive or inductive or any viable combination thereof.  FIG. 17   c  shows such direct connections via unidirectional means  48  that can be two inverters  15   1  and  15   2 . The unidirectional means  48  ensures that there is no coupling or signal reflection from one of the transmission-lines ( 15   2 ) back into the other ( 15   1 ), i.e., only the other way about. Directions of travel of re-circulating EM waves are again indicated by arrows  1 L,  2 L that are solid but arbitrary for transmission-line oscillator  15   1  and dashed for  15   2  in accordance with expectations as to a ‘parallel’-coupled pair of transmission-lines yielding contra-directional traveling waves.  FIG. 18  is a convenient simplified representation of the two self-synchronized transmission-line oscillators of  FIG. 17   a , and similar representations will be used in following Figures. 
     FIG. 19   a  shows four self-synchronized transmission-line oscillators  15   1  and  15   4  connected together basically as for  FIGS. 17   a – 17   c , but so as further to afford a central fifth effective transmission-line timing signal source of this invention affording a re-circulatory traveling EM wave according to indicated EM wave lapping directions  1 L– 4 L of the four transmission-line oscillators  15   1  and  15   4 . As shown the central fifth transmission-line oscillator physically comprises parts of each of the other four, and has a lapping direction  5 L that is opposite to theirs, specifically clockwise for counter-clockwise  1 L– 4 L. It will be appreciated that this way of connecting transmission-line oscillators together can also be extended to any desired number and any desired variety of overall pattern to cover any desired area. 
   An alternative is shown in  FIG. 19   b  where the central fifth transmission-line oscillator is not of re-circulating type, but is nonetheless useful and could be advantageous as to access to desired phases of timing signals. 
     FIG. 20  shows two self-synchronizing oscillators with their transmission-lines  15   1  and  15   2  not physically connected together, rather operatively coupled magnetically; for which purpose it can be advantageous to use elongated transmission-lines to achieve more and better magnetic coupling.  FIG. 21  shows another example of magnetically coupled self-synchronizing oscillators with transmission-lines  15   1  and  15   2  generally as for  FIG. 20 , but with a coupling enhancing ferromagnetic strip  52  operatively placed between adjacent parts to be magnetically coupled. 
     FIG. 22  shows three self-synchronizing oscillators with their transmission-lines  15   1 ,  15   2  and  15   3  magnetically coupled by a first ferrous strip  52  placed between transmission-lines  15   1  and  15   2  and a second ferrous strip  54  placed between transmission-lines  15   2  and  15   3 . As a source of oscillating signals, the transmission-line  15 .sub. 2  does not need any regenerative provisions  21  so long as enough energy for oscillation is magnetically coupled from the other transmission-lines  15   1  and  15   3  that are complete with provisions  21 . It is considered practical for the transmission-line  15 .sub. 2  to be longer and circumscribe a larger area but not to need or have regenerative provisions  21 , nor a cross-over  19 ; and is then preferably an odd multiple ( 3 S,  5 S,  7 S etc) of the length (S) or at least the electrical length of at least one of the transmission-lines  15   1  and  15   3 . This, of course, has further implications for self-synchronizing frequency- and phase-locking of oscillators (say as using transmission-lines  15   1  and  15   3 ), at a considerable spacing apart. 
   Further alternatives include use of a dielectric material (not illustrated) that spans over and/or under the portions of the conductive traces to be electromagnetically coupled. 
   It is feasible and practical to synchronize transmission-line oscillators operating at different frequencies. In  FIG. 23 , transmission-lines of two self-synchronizing oscillators are of different electrical lengths. Specifically, using same transmission-line structure/materials, first transmission-line  15 .sub. 1  has a total conductive length S for a fundamental oscillating frequency F=F 1  and is operatively connected and synchronized to a second transmission-line  15   2  having a total conductive length that is one third of that of the first transmission-line  15   1 , i.e., S/3, thus an oscillating frequency of 3F. The dashed lines with arrows indicate the direction of rotation of the EM waves. Operative connection is as for  FIGS. 17   a–c , though any other technique could be used. Self-synchronizing is due to above-mentioned presence in the highly square first transmission-line signal of a strong third harmonic (3F). Similar results are available for higher odd harmonics, i.e., at frequencies of 5F, 7F etc. 
   Preferred coupling between transmission-lines of oscillators operating at such different odd harmonic related frequencies, is unidirectional so that the naturally lower frequency line ( 15   1 ) is not encouraged to try to synchronize to the naturally higher frequency line ( 15   2 ). Any number of transmission-line oscillators of different odd-harmonically related frequencies can be coupled together and synchronized as for  FIG. 23 . 
   Re-circulatory transmission-line oscillators hereof can be used in and for the generation and distribution of reference, i.e., clock, timing signal(s) in and of a semiconductor integrated circuit (IC); and is also applicable to a printed-circuit-board (PCB), e.g. as serving to mount and interconnect circuitry that may include plural ICs, or indeed, any other suitable apparatus/system where timing reference signal(s) is/are required. 
   For ICs as such, simulations using the industry standard SPICE techniques show potential for supplying clock signals of very high frequencies indeed, up to several tens of GHz, depending upon the IC manufacturing process employed and projections for their development. Generation and distribution can effectively be at, and service, all parts of an IC with predictable phases at and phase relationships between such parts, including as multiple clock signals that ay have the same or different frequencies. Moreover, principles of operation of transmission-line oscillators hereof and their self-synchronizing inter-coupling extend or lead readily not only to reliable service of timing signals to operational circuitry within any particular IC and between ICs, but further and it is believed also importantly and inventively to data transfer between ICs etc. 
   The entire transmission-line  15  structure and network involving regenerative circuits  21  oscillates. The transmission-line  15  operates unterminated, i.e., the transmission-line forms a closed-loop. The characteristic impedance Zo of the transmission-line is low and only ‘top-up’ energy is required to maintain oscillation. 
   Impedance between the two conductor traces  15   a ,  15   b  is preferably evenly distributed, thus well balanced, which helps achieve well defined, differential signal waveforms (Φ 1 , Φ 2 ). Coherent oscillation occurs when the signals Φ 1 , Φ 1  on the transmission-line  15  meet this 180°, or substantially a 180°, phase shift requirement for all inverting amplifiers  21  connected to the transmission-line  15 , i.e., when all the amplifiers  21  operate in a coordinated manner with known phase relationship between all points along the transmission-line  15 . Signal energy is transmitted into the transmission-line  15  both inductively and capacitively, i.e., magnetically and electrically, between the signal conductors  15   a ,  15   b  for the differential-mode, also between each signal conductor and the ground reference for the two individual common-mode (not present if the upper and lower ‘ground’ planes are absent, nor for connections via unshielded twisted-pair cables). 
   CMOS inverters as non-linear, operative switching and amplifying circuit elements have low losses from cross-conduction current as normally lossy transistor gate ‘input’ and drain ‘output’ capacitances are absorbed into the characteristic impedance Zo of the transmission-line  15 , along with the transistor substrate capacitances, so power consumption is not subject to the usual 1/2CV 2 f formula. 
   It is quite often assumed that the power dissipation due to capacitive charging and discharging of MOS transistor gates, for example, is unavoidable. However, the self sustaining oscillating nature of the transmission-line  15  is able to ‘drive’ the transistor gate terminals with low power loss. This is due to the fact that the required ‘drive’ energy is alternating between the electrostatic field, i.e., the capacitive field of the MOS gate capacitances, and the magnetic field, i.e., the inductive field elements of the transmission-line  15 . Therefore, the energy contained within the transmission-line  15  is not being completely dissipated, it is in fact being recycled. Energy saving applies to all operatively connected transistor gates of the transmission-line  15 . 
   It is envisaged that low loss efficiency of transmission-line oscillator hereof could well be used to ‘clock’ ICs for many previously popular logic systems that have since been overshadowed or abandoned as non-viable options for reasons attributed to problems associated with clock skew, clock distribution, power consumption etc. Non-exhaustive examples of such logic arrangements include poly-phase logic and charge recovery or adiabatic switching logic, such logic arrangements being known to those skilled in the art. 
     FIG. 24  shows a possible clock distribution network hereof as applied to a monolithic IC  68  (not to scale, as is other Figures hereof. The IC  68  has a plural transmission-lines hereof shown as loops  1 L– 13 L, of which loops  1 L– 10 L and  13 L all have the same effective lengths (say as for S above) and oscillate at a frequency F, and loops  11 L and  12 L each have shorter loop lengths (say as for S/3 above) and oscillate at a frequency 3F. Loops  1 L– 8 L and  11 L– 13 L are fill transmission-line oscillator complete with regenerative means, and loops  9 L and  10 L arise as parts of four of the former transmission-lines, namely  1 L,  3 L,  4 L and  5 L;  4 L,  5 L,  6 L and  8 L respectively. 
   The transmission-line ( 15 ) of the loop  13 L is elongated with a long side close to the edge (i.e., scribe line) of the IC  68 , so that it is possible to couple to another similarly set up separate monolithic IC for inter-coupling by such as flip-chip technology for frequency and phase locking by such as magnetic coupling, as described above. Phase and frequency locking of separate monolithic IC&#39;s can be very useful in such as hybrid systems. 
     FIG. 25  indicates feasibility of a three-dimensional network of interconnected transmission line oscillators hereof for signal distribution, specifically for a simple pyramidal arrangement, though any other structure could be serviced as desired, no matter how complex so long as interconnect rules hereof are met regarding electrical length, impedance matching, any phasing requirements for data transfer, etc. 
   ICs hereof can be designed to have whatever may be desired up to total frequency and phase locking, also phase coherence, including for and between two or more self-sustaining transmission-line oscillators greatly to facilitate synchronous control and operation of data processing activities at and between all the various logic and processing blocks associated with such IC. 
     FIG. 26   a  shows an example of dual phase tap-off using a pair of CMOS inverters  70   1  and  72   2  connected to the transmission-line conductive traces  15   a  and  15   b  respectively to provide local clock to and/or to be distributed about a logic block  72   1 . Whilst the logic block  72   1  is shown as being ‘enclosed’ within the transmission-line  15  alternatives include it being outside any area enclosed by the transmission-line  15 , as for the logic block  72   2  and its associated inverters  72   3 ,  72   4 , and/or it spanning the conductive traces  15   a ,  15   b  of the transmission line  15 . If desired, say for large logic blocks  72   1  and/or  72   2  plural pairs of inverters  70  can ‘tap’ into the transmission-line  15 , including for any desired phasing needed locally in the logic block  72 , see dashed line. Capability accurately to select the phase of the oscillating clock signals .PHI. 1 , .PHI. 2  allows complex pipeline logic and poly-phase logic (see  FIG. 29  below) to be operatively designed and controlled. 
     FIG. 26   b  differs in that the logic blocks  72   1 ,  72   2  are replaced by respective processing elements  73   1 ,  73   2 , though there could be more, and for which one or more transmission-lines can be used to clock one or more of the processing elements. Two or a greater plurality of processing elements can operate independently and/or together, i.e., in parallel to achieve very fast and powerful data processing ICs/systems. 
     FIG. 27   a  shows concentrically arranged transmission-lines  15   1 – 15   3  of progressively less physical lengths. However, each of the three transmission-lines  15   1 – 15   3  can be made so that they all oscillate at the same frequency, whether as a matter of structure or by respective velocities of the EM waves rotating around each of the shorter transmission-lines  15   2 – 15   3  3 being suitably retarded by increasing their inductance and/or capacitance per unit length. Moreover, the transmission-lines  15   1 – 15   3  can optionally have one or more operative connections  70  and  72  that will serve to synchronize the three transmission-lines  15   1 – 15   3 . The advantages, apart from synchronicity, of having these connections  70 ,  72  are that the transmission-lines  15   1 – 15   3  will or can 
   (i) act as a single multi-filament transmission-line; 
   (ii) have smaller conductive traces ( 15   a ,  15   b ); 
   (iii) cover a larger clocking area; 
   (iv) produce lower skin effect losses; and 
   (v) produce lower crosstalk and coupling. 
     FIG. 28   a  shows a transmission-line having a cross-loop connection between positions A, B, C and D, which comprises further transmission-line  15   c ,  15   d  that has, in this particular example, an electrical length of 90.degree. to match spacing of the positions A, B and C, D. Other cross-connection electrical length could be chosen, then operatively connected at correspondingly different spacings of the positions A, B and C, D. Cross-loop connections allow further tap-off positions within area enclosed by the transmission-line  15 . The transmission-line part  15   d  is shown connected in parallel, between points A and C, and part of the transmission-line  15  represented by line  74 . Likewise, the transmission-line part  15   c  is shown connected in parallel, between points B and D, with part of the transmission-line  15  represented by line  76 . The transmission-line parts  15   c ,  15   d ,  74  and  76  will be satisfactory if they each have an impedance that is half that associated with the remainder of the transmission-line  15 , as above. The transmission-lines  15  and  15   c,d  will have operatively connected amplifiers  21 .  FIG. 28   b  shows the cross-loop connection  15   c,d  and the positions A, B, C and D set up relative to parts  78  and  80  of the transmission-line  15 , i.e., instead of parts  74  and  76 , respectively; but with Kirchoff-type rules applying again to result in parts  15   c ,  15   d ,  78  and  80  each having an impedance of half that associated with the remainder of the transmission-line  15 . Introduction of plural additional transmission-lines such as  15   c,d  across a transmission-line  15  is feasible as required. 
     FIG. 29   a  shows one way to produce four-phase clock signals. Effectively, a transmission-line  15  makes a double traverse of its signal carrying boundary, shown as rectangular, and further repeated traverses could produce yet more phases. In the example shown, the positions A 1 , A 2 , B 1  and B 2  will yield localized four-phase clock signals, as will the positions C 1 , C 2 , D 1 , and D 2 . The repeated boundary traverses will be with suitable mutual spacing/separation of the transmission-line  15  to avoid inter-coupling.  FIG. 29   b  shows idealized four-phase signal waveforms at points A 1 , A 2 , B 1  and B 2  and at C 1 , C 2 , D 1  and D 2 . 
     FIG. 30  shows addition of an open-ended passive transmission-line ( 15   e ,  15   f ) connected to the closed-loop transmission-line  15  and having the characteristics, of having an electrical length of 180.degree., of producing no adverse effect at the tap point, since it acts as an open-circuit oscillating stub. Amplifiers  21  will not be present along this open-ended line  15   e,f  but inverters  23  could be far ends of each of the traces  15   c  and  15   d  to reduce risk of spurious oscillations. Indeed, tuned oscillation in such stubs  15   e,f  can have useful regenerative effects for the transmission-line  15  and thus serve for reinforcement and/or stability purposes. 
   Passive transmission-line connections with no particular requirement for impedance matching can be used to connect oscillating transmission-lines of the same, or substantially the same, frequency together, at least provided that enough inter-connections are established between two systems, at connection positions with the same relative phases in the inter-connected networks. Such connections can assist in synchronizing high speed digital signals between IC&#39;s and systems because non-clock signals (i.e., the IC/system data lines) will have similar delay characteristics if they are incorporated into the same routing (e.g. ribbon cable, twisted pair, transmission-line) as the clock connections, thus making data and clocking coherent between different systems. 
     FIG. 31  shows one example of coherent frequency and phase operation of two clock distribution networks of two monolithic ICs  68 .sub. 1 ,  68 .sub. 2  each having a clock generation and distribution hereof and pairs of inter-IC connections E, F and G, H. The two ICs concerned will operate coherently, i.e., at the same frequency and with the same phase relationships, where each of the connections is substantially of 180-degrees electrical lengths, or a multiple satisfying 360°n+180°, where n is zero or an integer. 
   A single pair of inter-IC connections (E, F or G, H) will result in frequency and phase ‘locking’. More than one pair of inter-IC connections (E, F and G, H as shown) will result further in clock wave direction or rotation locking. 
   Also shown in  FIG. 31  is a first and second ‘stub’ connections  82  and  83 , though there could be more of either or each. The first stub connection  82  has a total electrical length of 180.degree. to assist in stabilizing operation. The second stub connection  83  is open-ended and also of 180.degree. electrical length and helpful for stabilization. Such stubs  82 ,  83  can be particularly useful for non-IC applications of the invention where conductive trace definition may be less precise than for ICs. 
   Impedance of the pairs of connections E, F and G, H and connections  82 ,  83  can have any value since, in normal operation and once these connections are energized, there will be no net power flow therein for correct phasing thereof. It is, however, preferred that the impedance of these connections E, F and G, H and  82 ,  83  is greater than that of oscillator transmission-lines  15  to which they are connected. These connections will support a standing EM wave rather than a traveling EM wave. 
   Such  FIG. 31  inter-connections can be applied equally well to intra-IC, inter-IC, IC-to-PCB and/or any non-IC, i.e., PCB-to-PCB system connections. 
     FIG. 32  illustrates digitally selectable shunt capacitors that are formed out of MOSFET transistors. 
   Digitally selectable shunt capacitors illustrated in  FIG. 33  can be operatively connected to the transmission-line  15  and controlled for the traveling EM wave to be delayed slightly, i.e., the frequency of oscillation can be controlled. Such delays are useful for fine tuning the frequency of a transmission-line(s). As shown, eight shunt capacitors are implemented by means of MOSFET transistors. The MOSFET transistors M 1 , M 2 , M 5  and M 6  are PMOS transistors and MOSFET transistors M 3 , M 4 , M 7  and M 8  are NMOS transistors. 
   The MOSFETS M 1 , M 3 , M 5  and M 7  have their drain and source terminals connected to the ‘inner’ transmission-line conductor  15   a , for example, and the MOSFETs M 2 , M 4 , M 6  and M 8  have their drain and source terminals connected to the ‘outer’ transmission-line conductor  15   b . The substrate terminals of MOSFETs M 1 , M 2 , M 5  and M 6  are connected to the positive supply rail V+ and the substrate terminals of MOSFETs M 3 , M 4 , M 7  and M 8  are connected to the negative supply rail GND. 
   The gate terminals of MOSFETs M 1  and M 2  are connected together and controlled by a control signal CS 0  and the gate terminals of MOSFETs M 3  and M 4  are connected together and controlled by the inverse of control signal CS 0 . Likewise, the gate terminals of MOSFETs M 5  and M 6  are connected together and controlled by a control signal CS 1  and the gate terminals of MOSFETs M 7  and M 8  are connected together and controlled by the inverse of control signal CS 1 . 
   The following truth table illustrates which MOSFET shunt capacitors (M 1 –M 8 ) contribute capacitance, i.e., ‘MOSFETs On’, to the transmission-line  15 . 
   
     
       
             
             
             
             
             
           
         
             
                 
                 
             
             
                 
               CS0 
               CS1 
               Mosfets ‘On’ 
               Mosfets ‘Off’ 
             
             
                 
                 
             
           
           
             
                 
               0 
               0 
               M1–M8 
               — 
             
             
                 
               0 
               1 
               M1–M4 
               M5–M8 
             
             
                 
               1 
               0 
               M5–M8 
               M1–M4 
             
             
                 
               1 
               1 
               — 
               M1–M8 
             
             
                 
                 
             
           
        
       
     
   
   It is preferred that the respective sizes and numbers of shunt capacitors connected to the ‘inner’ and ‘outer’ transmission-line conductive traces  15   a ,  15   b  are the same, i.e., balanced. Whilst eight MOSFET shunt capacitors M 1 –M 8  are shown, any number of MOSFET shunt capacitors having suitable sizes, and hence capacitances, can be used, provided that the transmission-line  15  is balanced, as per  FIG. 32 . 
   There are other configurations for producing digitally controllable shunt capacitors that, may or may not be formed using MOSFET transistors. One known example, again using MOSFETs, could be the use of binary weighted MOSFET capacitors for example. Alternatives to MOS capacitors affording variable capacitance include varactors and P/N diodes for example. 
   It can be advantageous for the ‘capacitor arrays’ to be replicated at regular intervals around the transmission-line(s) so as to distribute the impedance. 
     FIG. 33  shows how to route data and/or power across a transmission-line  15  and for altering its capacitive loading by way of formations  88  resembling railway sleepers deposited, preferably at regular intervals below the conductive traces  15   a ,  15   b . Alternatively, formations such as  88  could be deposited above and/or below the transmission-lines conductive traces  15   a ,  15   b . As can be seen from the cross sectional view, the traces  15   a ,  15   b  are preferably on a metal layer that is isolated from the formation  88  e.g. by a silicon dioxide  92  layer. These formations  88  have the effect of increasing the transmission-lines capacitance and can therefore be used to alter the transmission-line impedance thus the velocity of the traveling EM wave. These formations  88  can also be used to route data and/or power  99 . One advantage of routing data and/or power  99 , as illustrated, is that since the clock signals .PHI. 1 , .PHI. 2  on the transmission-line  15  are differential, these clock signals .PHI. 1 , .PHI. 2  have no effect upon the routed data and/or power signals. 
   The bi-directional switches ( 21 ) using inverters  23   a ,  23   b  inherently act as synchronous rectifiers of the clock frequency as can be deduced by the ohmic path from these inverters most negative supply rail to GND and their most positive supply rail to V+. Therefore, the NMOS and PMOS transistors that constitute the back-to-back inverters  23   a  and  23   b  (see  FIG. 22   b ) will always be switched by an incident EM wave on the transmission-line  15  to a state where the two ‘on’ transistors (an NMOS and PMOS respectively) will connect the most negative transmission-line conductive trace to the local GND supply for an NMOS transistor and the local V+supply for a PMOS transistor. The two NMOS/PMOS pairs of transistors alternate as the incident EM wave signal polarity reverses for oscillation in the manner of bridge rectification that is synchronous and exemplifies the bi-directionality of the DC-AC-DC conversion mode involved. The transmission-line  15  is thus able to extract and redirect power bi-directionally to supply power to the transmission-line  15  when the local supply rail voltage is greater than the transmission-line voltage and to remove power when the local supply rail voltage is less than the transmission-line voltage, and the transmission-line  15  acts as a power conductor in this mode, see following table: 
   
     
       
             
             
             
             
           
         
             
                 
             
             
               Inputs 
               PMOS ‘on’ 
               NMOS ‘on’ 
               P/NMOS ‘off’ 
             
             
                 
             
           
           
             
               15a + GND 
               P1 (15b connected 
               N2 (15a connected 
               N1, P2 
             
             
               15b = V+ 
               to local V+) 
               to local GND) 
             
             
               15a = V+ 
               P2 (15a connected 
               N1 (15b connected 
               N2, P1 
             
             
               15b + GND 
               to local V+) 
               to local GND) 
             
             
                 
             
           
        
       
     
   
   This power recycling is particularly appropriate to IC process technologies where the gate length is less than approximately 0.1 microns when the parallel ‘on-resistance’ will be comparable to the series DC resistance of the supply connections. Such synchronous rectification can act as the basis of power distribution in the absence or impossibility of power supply routing to certain area&#39;s of an IC, particularly can be used for ‘charge pump’ circuitry, i.e., DC-to-DC power conversion. There is also inherent capability for converting DC-to AC power conversion and visa versa. Alternatively, of course, known ‘on-chip’ transformers could be employed. 
   The possibility is envisaged of achieving highest possible operating frequencies consistent with disconnectable switching of logic circuitry, including as semiconductor fabrication technology is bound to develop. 
   Indeed, transmission-line formations themselves should scale with IC process technology, thus smaller and faster transistor formations lead naturally to shorter and faster transmission-line oscillators for yet higher clock frequencies. 
   Other possibilities include maintaining low power consumption; regardless of applications, which could be as to any resonating of capacitive and inductive connections to a transmission-line, and specifically use relative to such as shift registers or ‘precharge’/‘evaluate’ logic. 
   Whilst there is evident advantage in not having to use external timing reference such as a quartz crystal, nor PLL techniques, there may be situations and applications where this invention is applied in conjunction with such external timing crystals etc. 
   Whilst detailing herein has been within the context of currently dominant CMOS technology for ICs, it will be appreciated by those skilled in the art that principles are involved that are also applicable to other semiconductor technologies, e.g. Silicon-Germanium (Si—Ge), Gallium-Arsenide (Ga—As) etc. 
   Finally, highly beneficial particular utility in overcoming the problems associated with high frequency clocking, e.g. where F&gt;1 GHz, no other applicability of combined timing sign generation and distribution is to be excluded from intended scope hereof, say for systems and apparatus to operate at frequencies less than 1 GHz. 
   Although the present invention has been described in considerable detail with reference to certain preferred versions thereof, other versions are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the preferred versions contained herein.