Abstract:
An assembly including a processor socket having a cut region. The assemble further including a probe board having a repeater positioned in alignment with the cut region. The repeater is to receive at least a first signal. The repeater is to tap the first signal. The tapped first signal is to be transmitted to a first device. The repeater is also to reinject the first signal, and the reinjected first signal to be transmitted to a processor.

Description:
FIELD OF INVENTION 
   The field of invention relates generally to probing bus signals using repeaters. 
   BACKGROUND 
   At the lower bus speeds of today&#39;s processors, the current methodology to gain observe-ability of the bus signals is to install a probe interposer assembly  102  between the processor socket  104  and the motherboard socket  106 , as illustrated in  FIG. 1 . The interposer assembly is typically wired to “tap-off” a small amount of energy from each bus signal such that the actual bus is minimally perturbed and may operate normally at full speed. The small amount of energy which gets “tapped off” for each signal in the interposer assembly is routed by cable  108  to components which recover those signals and allow them to be conditioned to make them coherent for purposes of analyzing what is happening on the bus when failures occur. 
   Improvements in the bus observe-ability/probing methodology are desired in view of the higher bus speeds in development today, which “break” the current “tap-off” bus observe-ability/probing methodology. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  illustrates a diagram of a probe interposer assembly to provide observe-ability of the bus signal. 
       FIG. 2  illustrates a bus observe-ability/probing technique using signal repeaters. 
       FIG. 3  illustrates a probe interposer assembly using a repeater, in accordance with one embodiment. 
       FIG. 4  illustrates a cutaway view of a probe interposer assembly using a repeater, in accordance with one embodiment. 
       FIG. 5  illustrates a probe interposer assembly using a repeater, in accordance with an alternative embodiment. 
   

   DETAILED DESCRIPTION 
   An improved method and apparatus to probe bus signals using repeaters is described. In one embodiment, bus signals are intercepted and routed to a signal repeater device, which is located in a cut out region of a processor socket such that the added signal lengths due to probing are reduced. 
   In the following description, numerous specific details are set forth. However, it is understood that embodiments may be practiced without these specific details. In other instances, well-known circuits, structures and techniques have not been shown in detail in order not to obscure the understanding of this description. 
   Reference throughout this specification to “one embodiment” or “an embodiment” indicate that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. 
   Because the higher bus speeds in development today “break” the current “tap-off” bus observe-ability/probing methodology, bus observe-ability/probing methodology using signal repeaters are used to address the higher speeds. As illustrated in  FIG. 2 , a repeater-based bus observe-ability probe  202  intercepts the bus signals  210  after the signal travels thru a motherboard socket  206 , and routes the signals to a repeater device  208  on the probe  202 . The repeater “taps” the signals  210  and the tapped signal  212  is sent to the test equipment (such as a Logic Analyzer). The repeater  208  drives/re-injects signal  211  back into the processor  204  via the interposer  202  thru a processor socket  214  on the probe. 
   However, when an interposer probe is implemented between the mother board socket  206  and the processor socket  214 , the routed lengths  216  in the probe from the bus signal interrupt point to the repeater device  208  adds length to the bus signals, and therefore adds risk of rendering the bus signals inoperative if they are operating at or near their margin.  FIG. 2  shows a typical repeater-based interposer where the repeater device  208  is shown as it would typically be assembled onto the probe  202  (outside of and away from the processor socket mounted on the probe board  202 ) and illustrates the added bus lengths  216  imposed by that typical approach. 
   As illustrated in  FIG. 3 , a region/cavity  302  of a processor socket  304  is removed where the bus signals of interest reside. Removing the region  302  of the processor socket  304  allows for placement of a repeater  306  on the probe board  308  to reduce added signal lengths due to probing, as described in more detail below. In one embodiment, the processor socket  304  is a Land Grid Array (LGA) socket, and the repeater  306  is an Application Specific Integrated Circuit (ASIC) repeater. Variations of the processor socket and the repeater may be used in alternative embodiments. 
   As illustrated in the cross-sectional view of  FIG. 4 , in one embodiment, the signals  410  of interest coming from a remote device (such as a chipset) via the motherboard are intercepted at the probe board  408 . In one embodiment, the probe board intercepts the bus signals at a location that is very near the repeater device  406 , to reduce the added bus length needed to route the bus signals to the repeater device. 
   After being intercepted at the probe board  408 , the signals  410  are routed a short distance to the repeater  406  where the signal  410  is recovered by an input receiver on the repeater  406 . The signal  410  is “tapped” in the repeater, and the tapped signal  412  may be sent to a piece of test equipment such as a logic analyzer. The signal  411  is also “re-injected” into the probe board  408  via an output driver of the repeater  406 . 
   In one embodiment, the re-injected signal  411  is to be routed via an integrated flex circuit  416 . The flex circuit  416 , as illustrated in  FIG. 3 , flexes into the “cut” region  302  of the processor socket  304  and aligns/interconnects to the processor package lands using, in one embodiment, a low-profile LGA connector  318 . In alternative embodiments, a number of alternative technologies could also be used in place of the low profile LGA connector. 
   In one embodiment, the low-profile LGA connector  318  may be pre-soldered to the integrated flex, or may be a separate element. In an alternative embodiment, the integrated flex could be hand-soldered to the processor package directly (i.e., without a low-profile LGA connector in between). 
   As illustrated in  FIG. 4 , when a low-profile LGA connector  418  is used, considering pressure will be used to make the interconnect between the flex circuit  416  and the processor package lands  422  via the low-profile LGA connector  418 , a compliant pressure pad  424  (such as an elastomer) may be used. When the assembly is compressed, adequate pressure is to be applied to the low-profile connector to make a reliable interconnect. 
   In addition, if the repeater device  406  requires cooling, a cold-plate, heat pipe, or other solution may be included. For example, in one embodiment, as illustrated in  FIG. 4 , a cold-plate  426  may be placed over the repeater  406 . 
   For certain processors, as illustrated in  FIG. 5 , power may be delivered thru the top of a processor  540  from a vertically integrated voltage regulator  542 . As such, in an alternative embodiment, the probe board is provided in two halves of an assembly. In one embodiment, as further illustrated in  FIG. 5 , the two parts of the probe assembly include a probe baseboard  526  and processor riser board  528 . The two assemblies electromechanically assemble together to form the probe assembly, in one embodiment. 
   In one embodiment, as further illustrated in  FIG. 5 , the probe base board  526  includes the repeater device  506  located where the socket-interface half of the probe resides  527 , to reduce added bus lengths needed to route signals  510  coming through the baseboard  526  to the repeater  506 . The signal  510  is “tapped” in the repeater  506 , and the tapped signal  512  may be sent to a piece of test equipment such as a logic analyzer. The signal  511  is also “re-injected” into the probe baseboard  526  via an output driver of the repeater  506 . In addition, connectors and/or cables or some other interconnect mechanism  534  are provided to route the re-injected signals  511  from the probe base board  526  to the processor  540  located in a processor socket  504  on the probe riser board  528 . 
   In the foregoing specification, the invention has been described with reference to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. For example, the above described thermal management technique could also be applied to desktop computer device. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.