Abstract:
To provide a current detection circuit capable of detecting with low current consumption that a prescribed current flows into a current measuring resistor. A current detection circuit is equipped with a reference voltage circuit which has two NMOS transistors having different threshold voltages and a resistor, and generates a reference voltage at the resistor, and a comparison output circuit which is comprised of a PMOS transistor, an NMOS transistor, and a measuring resistor connected in series in a manner similar to a PMOS transistor, an NMOS transistor, and a resistor and outputs a comparison result.

Description:
RELATED APPLICATIONS 
       [0001]    This application claims priority under 35 U.S.C. §119 to Japanese Patent Application No. 2016-062156 filed on Mar. 25, 2016, the entire content of which is hereby incorporated by reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    Field of the Invention 
         [0003]    The present invention relates to a current detection circuit, and particularly to a current detection circuit which detects that a prescribed current flows into a current measuring resistor. 
         [0004]    Background Art 
         [0005]    A circuit diagram of a related art current detection circuit  200  is illustrated in  FIG. 2 . 
         [0006]    The related art current detection circuit  200  is equipped with a current inflow terminal  203 , a reference terminal  202 , a current measuring resistor  241 , and a current detection part  251 . 
         [0007]    The current detection part  251  is comprised of a voltage input terminal  204 , a reference terminal voltage input terminal  206 , a reference voltage circuit  20 , a voltage comparison circuit  261 , and an output terminal  205 . 
         [0008]    The current inflow terminal  203  and the reference terminal  202  are connected to each other through the current measuring resistor  241  and further connected to the voltage input terminal  204  and the reference terminal voltage input terminal  206  respectively. 
         [0009]    The reference voltage circuit  20  is provided between the reference terminal voltage input terminal  206  and a minus input terminal of the voltage comparison circuit  261  and supplies a reference voltage Vref based on a voltage of the reference terminal voltage input terminal  206  to the minus input terminal of the voltage comparison circuit  261 . The voltage input terminal  204  is connected to a plus input terminal of the voltage comparison circuit  261 , and the output of the voltage comparison circuit  261  is connected to the output terminal  205 . 
         [0010]    The relate art current detection circuit  200  configured as described above is operated as follows. 
         [0011]    With a measuring current flowing from the current inflow terminal  203  to the reference terminal  202  through the current measuring resistor  241 , a voltage generated at one end of the current measuring resistor  241  is inputted to the voltage input terminal  204 . This input voltage and the reference voltage Vref are compared by the voltage comparison circuit  261 . 
         [0012]    Since the voltage of the voltage input terminal  204  exceeds the reference voltage Vref when the measuring current reaches a detection current value, the output of the voltage comparison circuit  261  becomes a high level so that a high-level current detection signal is outputted from the output terminal  205  (refer to, for example,  FIG. 2  of Patent Document 1). 
         [0013]    [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-241463 
         [0014]    In the above-described related art current detection circuit  200 , since the voltage comparison circuit  261  is normally configured to include at least a differential amplifier circuit and a buffer circuit, current consumption of the voltage comparison circuit  261  is large. 
       SUMMARY OF THE INVENTION 
       [0015]    A current detection circuit of the present invention is equipped with a reference voltage circuit which has two NMOS transistors having different threshold voltages and a resistor, and generates a reference voltage at the resistor, and a comparison output circuit which is comprised of a PMOS transistor, an NMOS transistor, and a measuring resistor connected in series in a manner similar to a PMOS transistor, an NMOS transistor, and a resistor and outputs a comparison result. 
         [0016]    According to the current detection circuit of the present invention, current paths from a power supply terminal to a GND terminal can be less reduced as compared with the related art detection circuit. Therefore, the present current detection circuit is capable of reducing current consumption than that in the related art current detection circuit. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0017]      FIG. 1  is a circuit diagram illustrating a current detection circuit according to the present embodiment; and 
           [0018]      FIG. 2  is a circuit diagram illustrating a related art current detection circuit. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0019]    The present embodiment will hereinafter be described with reference to the accompanying drawing. 
         [0020]      FIG. 1  is a circuit diagram illustrating a current detection circuit  100  according to the present embodiment. 
         [0021]    The current detection circuit  100  according to the present embodiment is comprised of a power supply terminal  101 , a GND terminal  102 , a measuring current input terminal  103 , a current measuring resistor connecting terminal  104 , an output terminal  105 , a PMOS transistor  113 , NMOS transistors  123  and  124 , a current measuring resistor  141 , and a reference voltage circuit  10 . The PMOS transistor  113  and the NMOS transistor  123  configure a comparison output circuit. 
         [0022]    The power supply terminal  101  is supplied with a plus voltage from a power supply. The GND terminal  102  is supplied with a minus voltage from the power supply. 
         [0023]    The reference voltage circuit  10  is configured to include PMOS transistors  111  and  112 , NMOS transistors  121  and  122 , and resistors  131  and  132 . 
         [0024]    The PMOS transistors  111 ,  112  and  113  have gates connected in common and a source commonly connected to the power supply terminal  101 . The NMOS transistor  121  has a gate connected to a drain of the PMOS transistor  111 , and a source connected to the GND terminal  102 . The resistor  131  has one end connected to the drain of the PMOS transistor  111 , and the other end connected to a drain of the NMOS transistor  121 . The NMOS transistor  122  has a drain connected to a drain of the PMOS transistor  112 , and a gate connected to the drain of the NMOS transistor  121 . The resistor  132  is connected between a source of the NMOS transistor  122  and the GND terminal  102 . 
         [0025]    The NMOS transistor  123  has a drain connected to the output terminal  105  and a drain of the PMOS transistor  113 , and a gate connected to the gate of the NMOS transistor  122 . The current measuring resistor connecting terminal  104  is connected to the measuring current input terminal  103  and a source of the NMOS transistor  123 . The current measuring resistor  141  has one end connected to the current measuring resistor connecting terminal  104 , and the other end connected to the GND terminal  102 . The NMOS transistor  124  has a gate connected to one end of the resistor  131 , a drain connected to the current measuring resistor connecting terminal  104 , and a source connected to the GND terminal  102 . 
         [0026]    The NMOS transistors  121  and  124  respectively have a normal threshold voltage. Threshold voltages of the NMOS transistors  122  and  123  are lower than those of the NMOS transistors  121  and  124 . 
         [0027]    In the reference voltage circuit  10  in the current detection circuit  100  configured as described above, a current flowing through the NMOS transistor  122  low in threshold voltage is copied to a drain current of the PMOS transistor  111  by a current mirror circuit comprised of the PMOS transistor  112  and the PMOS transistor  111 . The drain current of the PMOS transistor  111  flows into the NMOS transistor  121  having the normal threshold voltage through the resistor  131 . 
         [0028]    Now, when the NMOS transistor  122  and the NMOS transistor  121  are made equal to each other in drive capability, and both NMOS transistors are being saturation-operated, overdrive voltages of both NMOS transistors become the same. Therefore, the total value of voltages applied across the resistors  131  and  132  becomes a difference between the threshold voltages of both NMOS transistors. Thus, a reference voltage VREF being a voltage lower than the difference between the threshold voltages of both NMOS transistors can be generated at a connecting point N of the NMOS transistor  122  and the resistor  132 . 
         [0029]    Incidentally, when the resistance value of the resistor  132  is set lower than that of the resistor  131 , the voltage value of the reference voltage VREF can be further lowered. 
         [0030]    A current made to flow by applying the reference voltage VREF to the resistor  132  is copied to a drain current of the PMOS transistor  113  through the PMOS transistor  112 . 
         [0031]    When a drain current made to flow by the NMOS transistor  123  is larger than the drain current of the PMOS transistor  113 , the output terminal  105  assumes a voltage at the current measuring resistor connecting terminal  104  and becomes a value close to the voltage of the GND terminal  102 . On the other hand, when the drain current made to flow by the NMOS transistor  123  is smaller than that of the PMOS transistor  113 , the output terminal  105  assumes the voltage of the power supply terminal  101 . 
         [0032]    Here, for example, the PMOS transistor  111 , the PMOS transistor  112 , and the PMOS transistor  113  are set equal to each other in drive capability, the NMOS transistor  122  and the NMOS transistor  123  are set equal to each other in drive capability, and the NMOS transistor  121  and the NMOS transistor  124  are set equal to each other in drive capability. 
         [0033]    Thus, when the voltage of the current measuring resistor  141  is lower than the reference voltage VREF, the drain current made to flow by the NMOS transistor  123  becomes larger than the drain current of the PMOS transistor  113 , so that a voltage close to the voltage of the GND terminal  102  is outputted from the output terminal  105 . When the voltage of the current measuring resistor  141  is higher than the reference voltage VREF, the drain current made to flow by the NMOS transistor  123  becomes smaller than that of the PMOS transistor  113 , so that the voltage of the power supply terminal  101  is outputted from the output terminal  105 . 
         [0034]    Further, the same current as the drain current of the PMOS transistor  113  is copied to the NMOS transistor  124 . Therefore, the drain current of the PMOS transistor  113  flows into the NMOS transistor  124  and does not flow into the current measuring resistor  141 . Thus, since only the current inputted from the measuring current input terminal  103  flows into the current measuring resistor  141 , the influence of an error current other than the measuring current can be eliminated. 
         [0035]    According to the current detection circuit  100  of the present embodiment as described above, it is possible to compare the reference voltage VREF and the voltage generated by I-V conversion using the current measuring resistor and detect that a prescribed current flows into the current measuring resistor, without using the voltage comparison circuit requiring many current paths from the power supply terminal to the GND terminal as in the related art current detection circuit. Thus, it is possible to significantly reduce current consumption. 
         [0036]    Incidentally, the present embodiment has described that each PMOS transistor and each NMOS transistor are equal to each other in drive capability, but is not limited to it. For example, the ratio of drive capability between the PMOS transistor  112  and the PMOS transistor  113  and the ratio of drive capability between the NMOS transistor  122  and the NMOS transistor  123  may preferably be the same. Also, for example, the current made to flow by the NMOS transistor  124  may preferably be the same as the current made to flow by the PMOS transistor  113 . 
         [0037]    Further, the resistance value of the resistor  132  may be changed in accordance with a mirror ratio between the PMOS transistor  112  and the PMOS transistor  111 . 
         [0038]    Further, in the present embodiment, the voltages applied across the resistor  131  and the resistor  132  do not change with respect to the temperature because temperature changes in the threshold voltages of both NMOS transistors are substantially equal to each other. Also, the voltage applied across the resistor  132  does not change with respect to the temperature by forming the resistor  131  and the resistor  132  from the same material. Thus, there is also obtained an effect that the reference voltage VREF with less temperature change can be generated at the connecting point N on the basis of the GND terminal  102 .