Abstract:
A dual purpose PCI-X DDR configurable terminator/driver providing programmable termination of the interface in a PCI-X system a plurality of N-channel devices divided into at least two groups and a plurality of P-channel devices also divided into at least two groups. A driver control individually controls selected ones of the groups of N-channel and P-channel devices on or off for providing internal termination to the transmission line. The configurable PCI-X DDR driver/terminator is configurable in three termination modes: pull-up mode, pull-down mode, and symmetric mode.

Description:
FIELD OF THE INVENTION 
   The present invention generally relates to the field of Peripheral Component Interfaces (PCI) utilized in computer systems and the like, and particularly to a dual purpose PCI-X DDR configurable terminator/driver providing programmable termination of the interface. 
   BACKGROUND OF THE INVENTION 
   The Peripheral Component Interface (PCI) is used in personal computers as an interface between the central processing unit (CPU) and various peripheral components such as VGA controllers, and the like. The PCI-X 2.0 DDR provides PCI technology with Double Data Rate (DDR) transfers. The original PCI bus was an unterminated transmission media mostly used in the point-to-point connections. This methodology worked well as long as the board trace length was restricted and the clock/data rates were below 100 MHz (legacy PCI systems have data rates equal to 33 MHz and 66 MHz). The signal integrity deteriorates rapidly in data transmission systems utilizing the unterminated transmission lines. The mismatch between the transmission line characteristic impedance and the load impedance (in this case the load impedance is an open circuit) will cause the signal reflections and negatively affect the signal integrity. 
   Future generations of PCI, such as PCI-X DDR, will increase the data rates to frequencies (f) of 133 MHz and beyond. Shorter signal periods (T=1/f) will not allow sufficient time for the signal overshoot/undershoot and ringing to settle out. Even with short transmission lines (board traces) the reflections must be minimized and controlled by proper line termination. Use of external line termination is unacceptable for a number of reasons. First, external termination is costly, incurring additional component, assembly labor and board area costs. Further, signal integrity is degraded due to the added external devices and trace parasitics. Moreover, the terminator must be made switchable, i.e. must be turned off, when the direction of data transfer is reversed. 
   The addition of an on-chip terminator costs an unacceptable silicon area penalty. The PCI-X DDR transceivers are located on the silicon chip periphery, called pads. The PCI-X DDR driver consumes the largest portion of the pad due to large MOSFET output devices. The addition of another large MOSFET device for implementation of the discrete terminator will consume a large amount of additional pad silicon area and will increase the PCI pad parasitic capacitance which is harmful to the signal integrity. 
     FIG. 1  illustrates a typical PCI-X system  100 . As shown in  FIG. 1 , data transfer is from the PCI 1  block  102  to the PCI 2  block  104 . The driver DX 1    106  is enabled to drive the transmission line X 1    108  such as PC board trace. The transmission line X 1    108  far-end terminal X 1out    110  is connected to the input of the enabled receiver RX 2    112 . The receiver RX 1    114  and the driver DX 2    116  are disabled during this data transmission. 
   For high signal integrity, it is desirable to have the driver DX 1    106  output impedance Z out  equal to the transmission line characteristic impedance Z o , i.e. Z out =Z o . Thus, it is desirable to have the input impedance Z in  of the receiver RX 2    112  also equal to the transmission line characteristic impedance Z o , i.e. Z IN =Z o . In the embodiment shown in  FIG. 1 , the input impedance Z IN  of receiver RX 2    116  is many orders of magnitude higher than the characteristic impedance Z o  of the transmission line, i.e. Z IN &gt;&gt;Z o . In existing PCI systems no termination is used at the far end of the transmission line. This results in impedance mismatch for the unterminated transmission line. Consequently, signal reflections will cause severe distortions to the signal and negatively affect the reliability of data transmission. 
   During the mode of transmission described, the far end driver DX 2    116  is tri-stated, idle, while the receiver RX 2    112  is receiving the incoming data stream. The present invention employs the unused driver DX 2  devices  116  for the purpose of implementation of proper far end transmission line termination. 
   SUMMARY OF THE INVENTION 
   Accordingly, the present invention is directed to a dual purpose PCI-X DDR configurable terminator/driver suitable for use in a PCI-X DDR system for providing programmable termination of the interface in a PCI-X system. In exemplary embodiments, the PCI-X DDR configurable terminator/driver includes a plurality of N-channel devices divided into at least two groups and a plurality of P-channel also divided into at least two groups. A driver control individually controls selected ones of the groups of N-channel and P-channel devices on or off for providing internal termination to the transmission line. The configurable PCI-X DDR driver/terminator is configurable in three termination modes: pull-up mode, pull-down mode, and symmetric mode. 
   The configurable PCI-X DDR driver/terminator may utilize existing driver devices without the additional chip area penalty, and may be programmable for correct terminator impedance value R T =Z o  and maintains the process/voltage/temperature characteristics of the termination impedance. Preferably, the configurable PCI-X DDR driver/terminator does not increase the parasitic capacitance of the pad by using the same devices of the driver. The driver/terminator may further have applications in other transmission methodologies such as AGP4X, AGP8X, and the like. 
   It is to be understood that both the forgoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and together with the general description, serve to explain the principles of the invention. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The numerous advantages of the present invention may be better understood by those skilled in the art by reference to the accompanying figures in which: 
       FIG. 1  is a block diagram illustrating an exemplary PCI-X system; 
       FIG. 2  is a block diagram illustrating a PCI-X DDR system with pull-up type termination in accordance with an exemplary embodiment of the present invention; and 
       FIG. 3  is a circuit diagram illustrating a configurable PCI-X DDR Driver providing an internal terminator in accordance with an exemplary embodiment of the present invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   Reference will now be made in detail to the presently preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. 
     FIG. 2  illustrates a PCI-X DDR system  200  in accordance with an exemplary embodiment of the present invention. Like the PCI-X system  100  shown in  FIG. 1 , data transfer is again from the PCI 1  block  202  to the PCI 2  block  204 . The driver DX 1    206  is enabled to drive the transmission line X 1    208  such as a PC board trace. The transmission line X 1    208  far end terminal X 1out    210  is connected to the input of the enabled receiver RX 2    212  and to the terminal T 1    214 . The receiver RX 1    216  and the driver DX 2    218  are both disabled during this data transmission. 
   In exemplary embodiments of the present invention, correct impedance matching is obtained among the driver, transmission line and receiver input. The output impedance Z OUT  of driver DX 1    206  is matched to the transmission line characteristic impedance Z o . The far end transmission line becomes properly terminated by making the terminator T 1  resistance R T =Z o . Thus, the receiver RX 2  high input impedance Z IN  becomes inconsequential, resulting in an impedance match for the entire PCI-X DDR system  200 . As a result, signal reflections are substantially minimized and signal integrity is substantially improved, increasing the reliability of data transmission. 
   Referring now to  FIG. 3 , a simplified PCI-X DDR driver/terminator  300  in accordance with an exemplary embodiment of the present invention is described. The PCI-X DDR driver  300  (which corresponds, for example, to driver DX 2    218  shown in  FIG. 2 ) includes a driver control  302 . Preferably, the driver control  302  includes the impedance controller to correct for process/voltage/temperature (PVT) effects. In  FIG. 3 , the devices MP 1x , MP 2x , . . . MP ix    304 – 308  and MN 1x , MN 2x , . . . MN ix    310 – 314  represent groups of devices even though only one device is shown for simplicity. In exemplary embodiments, the sizes of these devices are weighted to achieve the desired output impedance in conjunction with discrete resistors R Pi    316  or R Ni    318  for the given PVT conditions. 
   As shown in  FIG. 3 , the PCI-X DDR driver  300  is subdivided into groups of P and N channel devices  320  &amp;  322  along dashed lines  324  &amp;  326 . Each group  320  &amp;  322  is individually controlled by driver control  302  to be either on or off. This approach permits selection of any of the device groups  320  or  322  independently allowing the driver  300  to be configured to provide three different termination types: pull-up type, pull-down type, and symmetric type. For a pull-up type termination, the terminator impedance (R T =Z o ) from transmission line end X 1out    210  ( FIG. 2 ) is connected to the power supply VDD. The power supply VDD acts as an AC ground. For a pull-down type termination, the terminator impedance (R T =Z o ) from transmission line end X 1out    210  ( FIG. 2 ) is connected to the system ground VSS. Finally, for a symmetric type termination, the terminator impedance (R T =Z o ) from transmission line end X 1out    210  ( FIG. 2 ) is connected to both VDD (R P ) and VSS (R N ). In this case the equivalent load impedance is equal to the parallel combination of these two resistors, i.e. R T =R P ∥R N . 
   The implementation of a pull-up type PCI-X DDR terminator for a specific impedance value is now described for illustration. All groups of N channel devices are tri-stated by setting the V N1 , V N2 , . . . V Ni  control terminals  328 – 332  low via driver control  302 . To select the particular value of terminal impedance R T , selected V P1 , V P2 , . . . V Pi  control terminals  334 – 338  are also set low by the driver control  302 . For example, to obtain a value of R T =50Ω, the V P1 , V P5 , . . . V P7  control terminals may be set low, enabling only selected groups of corresponding MP 1x , MP 5x , and MP 7x  devices. 
   For implementation of a pull-down type of termination, the groups of N-channel devices are enabled by setting the V N1 , V N2 , . . . V Ni  control terminals  328 – 332  high via the driver control  302 . All P-channel devices are disabled for the pull-down type of terminator. 
   For implementation of a symmetric type of termination, selected groups of both P and N-channel devices are enabled to meet the overall termination impedance R T =R P ∥R N  as depicted in  FIG. 3 . 
   The PCI-X DDR driver  300  may utilize existing driver devices without the additional chip area penalty, and may be programmable for correct terminator impedance value R T =Z o  and maintains the process/voltage/temperature characteristics of the termination impedance. Preferably, the driver  300  does not increase the parasitic capacitance of the pad by using the same devices of the driver. The driver/terminator may further have applications in other transmission methodologies such as AGP4X, AGP8X, and the like. 
   It is believed that the dual purpose PCI-X DDR configurable terminator/driver of the present invention and many of its attendant advantages will be understood by the forgoing description. It is also believed that it will be apparent that various changes may be made in the form, construction and arrangement of the components thereof without departing from the scope and spirit of the invention or without sacrificing all of its material advantages. The form herein before described being merely an explanatory embodiment thereof. It is the intention of the following claims to encompass and include such changes.