Abstract:
A digital tuning receiver having an electrically tuneable tuner and an AFT circuit is driven in a unidirectional sweep by the D/A converted output of a reversible counter. The reversible counter continues to count input pulses, and the unidirectional sweep continues until stopped by the reception of a signal which produces a first signal from an AFT frequency discriminator followed within a predetermined time by a second signal of opposite polarity from the AFT frequency discriminator. The number stored in the stopped reversible counter may be further adjusted by AFT signals and stored for later recall. If the second signal is not received within a predetermined time, as occurs with spurious beat signals, the sweep is not stopped but continues until a proper signal is received.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates generally to a digital tuning receiver, and is directed more particularly to an AFT circuit thereof. 
     2. Description of the Prior Art 
     A prior art television receiver which uses a digital tuning system is described with reference to FIG. 1. An electronic tuner 1 is electronically tuneable using, for example, a variable capacitance diode (not shown) as a resonant element in its respective tuning circuit. The electronic tuner 1 is tuned by a tuning voltage V c  generated by a tuning control circuit shown generally at 10. The tuning control circuit 10 has two modes of operation. In a first mode, tuning is swept smoothly upward or downward under the control of up-sweep switch S u  and down-sweep switch S d . When the appropriate switch is operated, pulses from pulse oscillator 14 are counted up or counted down in a reversible counter 13. The digital number stored in reversible counter 13 is D to A converted in D/A converter 18 to generate the channel selecting voltage V c . When a channel is located by the sweep method, the sweep is automatically stopped and the digital number in reversible counter 13 may optionally be stored in a channel memory 11. 
     In the second mode of operation, tuning control circuit 10 selects channels previously stored in channel memory 10 under control of channel switches S 1  -S 10 . In this case, the digital number previously stored in channel memory 11 for a given channel is read out, D to A converted in D/A converter 18 and thus directly generates channel selecting voltage V c  to tune tuner 1 to the selected channel. 
     In each mode of operation, an automatic fine tuning device compensates for minor misalignment of the tuner by correcting the digital number employed in generation of channel selecting voltage V c . A conventional video intermediate frequency (VIF) amplifier 2 is connected to electronic tuner 1, a video detector 3 is connected to the VIF amplifier 2, a video amplifier 4 is connected to the video detector 4, and the output signal from the video amplifier 4 is applied to a television picture tube 5. Upon channel selection, the digital channel data A 1  -A n  from channel memory 11 is connected to D/A converter 18 which produces the channel selecting voltage V c  corresponding to the desired broadcast channel. The channel memory 11 contains addresses whose number corresponds to TV channels to be received, for example, TV channel 10. Memory 11 is preferably non-volatile in order to retain the contents therein even in the event that power is lost. An addressing circuit 12 is provided to which channel selecting switches S 1  to S 10  are connected. When one of the switches S 1  to S 10  is operated, a corresponding channel address in memory 11 is selected and connected to D/A converter 18. A reversible counter 13 is employed to initially generate the codes A 1  to A n  for the sweep mode and for channel selection. A pulse oscillator or generator 14 supplies pulses P o  to reversible counter 13. A memory control circuit 15 controls the storage of addresses from reversible counter 13 in channel memory 11. A mode switch S m  determines whether tuner 1 is scanned looking for a signal or whether it is controlled by channel memory 11. By placing mode switch S m  in the R position, the apparatus is placed in a write-in (preset) mode in which scanning is performed until a signal having a predetermined characteristic is found, and the scanning is then stopped and the digital value representing the channel is stored in channel memory 11. When switch S m  is placed in the P position, the apparatus is placed in a read-out (tuning) mode in which tuning is controlled by channel memory 11 15. 
     A write pulse forming circuit 16 generates a pulse which enables memory control circuit 15 to store the number from reversible counter 13 in channel memory 11. A reset circuit 17 generates a reset pulse under control of mode switch S m  to erase the number in reversible counter 13. 
     In FIG. 1, there are also provided circuits 21 to 23 which receive the output signal from the VIF amplifier 2 and produce the VIF signal from the VIF amplifier 2 is applied through a band pass amplifier 21 of AFT circuit 70 to a frequency discriminator 22 which then produces a typical S-shaped AFT voltage V s  as shown in FIG. 2A. This voltage V s  is fed to a level detecting circuit 23 which has threshold levels V 1  and V 2  and produces the AFT signals V u  and V d  as shown in, for example, FIG. 2B when the S-shaped voltage V s  exceeds the positive threshold V 1  or the negative threshold V 2 . AFT signal V u  becomes 1 in the frequency range between (f o  -1.2 MH z ) and (f o  -50 KH z ) where f o  represents the normal tuning point or frequency and becomes 0  in the frequency ranges other than the above frequency range, while the AFT signal V d  becomes 1  in the frequency range between (f o  +50 KH z ) and (f o  +1.2 KH z ) and becomes 0 in the other frequency ranges. In this case, the frequency range (f o  ±50 KH z ) become a tuning range. 
     In FIG. 1, a logic circuit formed of circuit elements 31 to 39 controls reversible counter 13 and write pulse forming circuit 16. When the switch S u  or S d  is placed in the ON position, a train of pulses P o  from pulse oscillator 14 is supplied to the up or down input of counter 13. 
     Accordingly, when television channels are to be located by sweeping, the mode switch S m  is placed in the P position with its movable element in contact with its preset contact P. Counter 13 is reset by a reset pulse generated by reset circuit 17 due to switching mode switch S m  into the P position. Channel memory 11 is placed in the write-in mode by the memory control circuit 15. 
     Thus, when switch S 1  and up-sweep switch S u  are both operated, the address corresponding to the switch S 1  in channel memory 11 is addressed through addressing circuit 12 to receive and store the digital number generated in reversible counter 13. The output from the inverter 31 becomes 1 upon operation of switch S u . This enables one input of AND gate 32. Pulses P o  from pulse oscillator 14 are supplied through AND gate 32 and OR gate 33 to the UP input of reversible counter 13. Thus, the number is reversible counter 13 increases sequentially from zero [00---0]. The digital number in reversible counter 13, fed to the D-A converter 18, produces the channel selecting voltage V c  corresponding to the bits A 1  to A n  of reversible counter 13. This voltage V c  increases by ΔV each time the content of the counter 13 increases by 1. As a result, the frequency to which the tuner 1 is tuned increases sequentially to achieve an upward sweep of the received frequency. 
     If the above sweep operation is performed in the Tokyo area which has a TV channel, for example, when the station broadcasting channel 1 is received, up-sweep switch S u  is released. Thus, the tuning for the desired channel can be achieved. When the up-sweep switch S u  is released slightly late and hence the received frequency is higher than the desired frequency, down-sweep switch S d  may be operated. Down-sweep switch S d  causes inverter 34 to generate a 1 which enables one input of AND gate 34. A train of pulses P o  from pulse oscillator 14 is fed through the AND gate 35 and the OR gate 36 to the down input of reversible counter 13. Thus, channel selecting voltage V c  is swept lower to achieve fine tuning of the received frequency. 
     When the switch S u  (or S d ) is released, the output from AND gate 37 becomes 1. This enables a first input of AND gates 38 and 39. If the received frequency is a little lower than the desired frequency, the AFT signal V u  is 1 at this time. AFT signal V u  enables a second input of AND gate 39. With two of its inputs enabled, AND gate 39 connects a train of pulses P o  from pulse oscillator 14 through OR gate 33 to the up input of reversible counter 13. This causes the tuning frequency to increase. When the tuning is moved upward to within 50 KH z  of channel 1, the AFT output becomes 0. This inhibits AND gate 39 and halts further increase in the number in reversible counter 13. Similarly, if the received frequency is a little higher than the desired frequency, the AFT signal V d  is 1, the trains of pulses P o  from pulse oscillator 14 is delivered through AND gate 39 and OR gate 36 to the down input of reversible counter 13 when V u  =V d  =0, the received frequency is within ±50 KH z  of the precise frequency f o . A frequency deviation of no more than 50 KH z  is considered correct tuning and has no substantial effect on the received picture. 
     Write pulse forming circuit 16 is enabled by the 1 from AND gate 37 at the end of operation of up-sweep switch S u  or down-sweep switch S d . Write pulse forming circuit 16 applies a delay long enough to permit the AFT circuit 70 to complete its fine tuning function and then produces a write pulse. The write pulse from the write pulse forming circuit 16 is fed through the memory control circuit 15 to the channel memory 11 to erase the content thereof at the address designated by switch S 1  and to write the contents of reversible counter 13 into that address. Accordingly, the part of the channel memory 11 corresponding to the address designated by the switch S 1  contains channel selecting codes A 1  to A n  corresponding to the channel selecting voltage V c  for channel 1. 
     Next, switches S 2  and S u  may be operated. The address of memory 11 corresponding to the switch S 2  is designated for change and the content of the counter 13 reversible is further increased from the value stored in it from the preceding operation. The selecting voltage V c  continues to sweep the received frequency higher until the next broadcast station above channel 1, for example, channel 3 in the Tokyo area is received. Up-sweep switch S u  is released, a delay is imposed by write pulse forming circuit 16 to permit completion of the AFT operation, then digital number A 1  -A n  in reversible counter 13, corresponding to channel 3 is written into channel memory 11 at the address designated by switch S 2 . Similarly, the remaining television channels for a given area can be preset in memory 11. 
     When mode switch S m  is placed in the R position, and one of channel selecting switches S 1  to S 10  corresponding to a desired channel is operated. Channel memory 11 is place in its read-out mode by memory control circuit 15. At this time, if switch S 2 , for example, operated, the number stored in the corresponding address channel memory 11 corresponding to channel 3 is read out. The read-out codes A 1  to A n  are fed through the counter 13 to the D-A converter 18 to generate the channel selecting voltage V c  which is then fed to the tuner 1. Thus, the channel 3 can be received. 
     Further, in this case if the received frequency is by mistuned by more than 50 KH z  due to temperature variation in electronic tuner an AFT voltage V u  or V d  is generated as previously described. An appropriate amount is added to or subtracted from the number in reversible counter 13 to correct the selecting codes A 1  to A n , which are fed from the counter 13 to the D-A converter 18 until the AFT voltage is removed. 
     According to the prior art tuning control circuit 10, however, upon sweeping the received frequency in the presence of a strong signal which is not subjected to automatic gain control (AGC), false AFT signals are generated. 
     The frequency response of the VIF amplifier 2 is as shown in FIG. 3A. The pass band of band pass amplifier is shown between dot-dash lines 72a and 72b in FIGS. 3B-3I. The S-shaped voltage V s  which is generated when the picture carrier signal F p1 , for example, of channel 1 is swept past the band pass amplifier 21 is shown in FIG. 3B. In the figures, f s  and f p  represent a normal sound intermediate frequency and a normal video intermediate frequency, respectively. 
     For the sake of simplicity it is assumed that for the above characteristic an AGC voltage V a  for the tuner 1 is such that the AGC voltage V a  is 1 only when the sound carrier frequency f s  signal or video carrier frequency f r  in a received signal are in the frequency range of VIF amplifier 2 between 54.25 MH z  and 60.25 MH z  and is 0 in all other frequency bands as shown in FIG. 3C. accordingly, when V a  =1, the AGC operation is carried out and hence the gain of the tuner 1 is reduced, while when V a  =0 no AGC operation is carried out and hence the tuner 1 is at full gain. 
     FIGS. 3D-3I show a sequence of conditions in which the signals and beat signals of two adjacent channels are swept in the rightward direction past the stationary frequency response curves of VIF amplifier 2 and band pass amplifier 21. For normal reception, as shown in FIG. 3D, sound and video intermediate frequency signals F s1  and F p1  in the desired channel are positioned at the frequencies f s  and f p . Further, in normal television broadcast, band allocations, only alternate channels are occupied in a given area. This provides a guard band of 6 MH z  between adjacent allocated channels. Thus the nearest video intermediate frequency signals F s2  and F p2  of an adjacent station are positioned 12 MH z  from signals F s1  and F p1 . 
     A strong signal containing F s1  and F p1  can generate beat signals F u1  and F d1  a television receiver due to mutual modulation of the carrier signals. Beat signal F u1  is positioned 4.5 MH z  above F s1 . Beat signal F d1  is positioned 4.5 MH z  below F p1 . Similarly, quasi-signals f u2  and F d2  are generated by mutual modulation of signals F s2  and F p2 , respectively and are positioned 4.5 MH z  above and below them respectively. 
     When a television is properly tuned as shown in FIG. 3D, V a  =1 and the AGC is applied to the electronic tuner 1 and hence its gain is low. F u1  to F d2  are attenuated to such a low level that they are essentially not a factor. This is illustrated in FIGS. 3D and 3G-3I by showing these signals as broken arrows. 
     When tuning has progressed to the condition shown in FIG. 3E, signals F s1  and F p1  are moved outside the passband of VIF amplifier 2 shown in FIG. 3A but adjacent signals F s2  and F p2  have not yet been moved inside the passband. Since there is neither a picture nor a sound carrier within the VIF passband, the AGC voltage is low. Thus, no AGC is applied to the electronic tuner 1 and hence electronic tuner 1 and other circuits are at full gain with the result that the quasi-signals F d1  and F u2  are generated within the VIF passband and also signal F u2  is within the bandpass of band pass amplifier 21. Note that signal F u2   is between band edge 72b and cross-over point 72c. Thus, a positive AFT voltage V s  is generated by F u2  in this location. This time is indicated at time t 10  in FIGS. 4A-4K. 
     A short time later, denoted as t 11  in FIG. 3F and FIGS. 4A-4K, tuning has progressed to the point that F u2  is approaching crossover line 72c (FIG. 3F). But note that, at this same time, the picture carrier signal F p2  is just outside the edge of the VIF passband. An instant later, at time t 12  beat signal F u2  is located between crossover line 72c and band edge 72a. This position of beat signal F u2  would produce a negative voltage V s  (FIG. 3B) except for the fact that, just as signal F u2  crossed crossover line 72c, picture carrier f p2  entered the VIF passband. The presence of F p2  in the VIF passband reestablishes a strong AGC signal. Thus signal F u2  is suppressed, as shown by the broken arrow, to such an extent that it is incapable of generating a negative alternation of V s . 
     Still later, at time t 13 , beat signal F u2  is outside the VIF pass band and F d1  is located between crossover line 72c and 72a. However, as before, the presence of the picture carrier F p2  within the VIF passband suppresses beat signal F d1  and prevents generation of a negative component of V s . 
     With continued tuning, picture carrier signal F p2  enters the passband of the band pass amplifier 21 between band edges 72b and 72a. At time t 14  (FIGS. 3I and 4A-4K), the picture carrier signal F p2  is aligned with crossover line 72c. Unless disturbed, the AFT system will maintain this condition. 
     As a result, when the received frequency is swept from left to right, as shown in FIGS. 4A to 4C, a false S-shaped voltage V u  having only a positive alternation corresponding to FIGS. 3F and 3E is generated between times t 2  and t 3 , and then the normal positive and negative S-shaped voltage V s  and AFT signals V u  and V d  are obtained in correspondence with FIGS. 3I between times t 5  and t 8 . 
     If the direction of frequency sweep is reversed, the sequence of positions shown in FIGS. 3I to 3D produce the same S-shaped voltage V s  and AFT signals V u  and V d  as previously described but in the reverse order as shown in FIGS. 5A to 5C. 
     When a false signal V u , such as at times t 10  -t 11 , other than the normal AFT signals V u  and V d  is generated as set forth above, the prior art tuning control circuit 10 stops the sweep operation the frequency position at which the false AFT signal V u  becomes &#34;0&#34;. Accordingly, receiver tuning stops on a false signal, such as F u2 . This mis-tuning gives a picture in which proper synchronization cannot be achieved, the higher frequency components are missing and no color appears. The resulting picture quality is seriously deteriorated with the normal picture screen. 
     OBJECTS AND SUMMARY OF THE INVENTION 
     Accordingly, it is an object of the invention to provide a novel digital tuning receiver free from the defects inherent to the prior art. 
     It is another object of the invention to provide a digital tuning receiver in which AFT operation is prevented from being carried out erroneously by a beat signal. 
     It is a further object of the invention to provide a receiver for automatic tuning in which AFT operation is performed only with a normal AFT signal by utilizing the difference between normal and spurious AFT signals. 
     According to an aspect of the present invention, an automatic tuning receiver comprises: an electronic tuner, an intermediate frequency amplifier having a bandwidth, sweeping means for sweeping the tuning frequency of the tuner in a unidirectional sweep, stopping means for stopping the sweep when a signal reaches a fixed frequency within the bandwidth and inhibiting means for inhibiting said stopping means in response to a characteristic of the signal. 
     According to a feature of the invention, an up flip-flop or a down flip-flop is set by operation of an up-sweep or down-sweep switch respectively. The set flip-flop enables counting in the appropriate direction in an up-down counter which generates a digital word used for controlling the frequency. 
     When an AFT signal of either polarity is obtained, another flip-flop is set which begins a preset waiting period for the arrival of an AFT signal of the opposite polarity. If the opposite polarity AFT signal is received within the preset waiting period, the initially set flip-flop is reset and counting is halted. If the opposite polarity AFT signal is not received within the waiting period, as is the case with spurious beat signals, the effect of the first portion of the AFT signal is cancelled. In this event, scanning is continued until an AFT signal having a first polarity followed within a predetermined time by a second polarity is received. 
     According to a further feature of the invention there is provided a receiver for automatic tuning which comprises an electronic tuning tuner having at least one signal-controlled variable reactance element converting an input radio frequency signal to an intermediate frequency signal, a demodulating circuit connected to the tuner for reproducing a desired signal, a frequency discriminating circuit connected to the tuner for generating an up-signal when a received frequency is lower than a center frequency and a down-signal when the received frequency is higher than the center frequency, a pulse generator for producing counting pulses, a counter for counting said counting pulses from the pulse generator; a tuning frequency controlling circuit connected to the tuner for controlling a tuning frequency of the tuner in response to a condition of the counter, a first flip-flop circuit for controlling a supply of counting pulses to the counter, and an up-sweep starting or down-sweep starting device for setting the first flip-flop circuit, characterized in that the receiver further comprises a second flip-flop circuit which is set when a set output of the first flip-flop circuit and the up-signal or down-signal or the frequency discriminating circuit exist at the same time, and a resetting circuit for resetting the first flip-flop circuit when a set output of the second flip-flop circuit and the down-signal or up-signal of the frequency discriminating circuit exist at the same time. 
     The other objects, features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings through which the like reference numerals and symbols designate the same elements. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a logic diagram showing a prior art digital tuning receiver; 
     FIGS. 2A, 2B, FIGS. 3A to 3I, FIGS. 4A to 4K, and FIGS. 5A to 5K, inclusive, are waveform diagrams used for explaining the above prior art and the present invention; and 
     FIG. 6 is a logic diagram showing an embodiment of a digital tuning receiver according to the present invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     As described in connection with FIGS. 3 to 5, when the received frequency is swept in one direction, an AFT signal indicating tuning through a television broadcast channel, signals V u  and V d   of opposite polarity are obtained. However, a false AFT signal generated by a beat signal, for example F u2 , produces only a single signal V u  or V d  without being followed within a predetermined time by the other of V d  or V u . 
     According to the invention, once an up-sweep or down-sweep is initiated, the sweep is continued until the proper sequence AFT signals V u  and V d  is received. If only one AFT signal V u  or V d  is obtained, the sweep is continued at a constant speed. When the inverse AFT signal V d  or V u  is obtained within a predetermined time after receiving the first AFT signal the sweep is stopped. 
     An embodiment of the digital tuning receiver according to the present invention is described with reference to FIG. 6 in which the elements corresponding to those of FIG. 1 have the same reference numerals and their detailed explanation is therefore omitted. 
     An up-start flip-flop circuit 41 and a down-start flip-flop circuit 42 control the connection of pulses P u  through AND gates 32 and 35 and OR gates 33 and 36 to the up and down inputs respectively of reversible counter 13. The appropriate one of up-start and down-start flip-flop circuits 41, 42, initially reset, is triggered into the set condition by a start signal connected from up-sweep switch S u  or down-sweep switch S d  through inverter 31 or 34 to the appropriate set input S. Once set, up-start or down-start flip-flop circuit 41 or 42 remains set until reset by outputs from both stop flip-flop circuits 43 and 44 as will be explained. 
     Initially, up-start flip-flop circuit 41, down-start flip-flop circuit 42, and stop flip-flop circuits 43 and 44 are all reset as shown prior to t 1  by Q1-Q4 in FIGS. 4E-4H. assume for purposes of illustration that switch S u  is momentarily operated at time t 1 . Inverter 31 produces an up-starting pulse P u  for the up-sweep at time t 1  as shown in FIG. 4D. Starting pulse P u  is supplied directly to the set input S of up-start flip-flop circuit 41 and through OR gate 52 to the reset input R of down-start flip-flop circuit 42. The set output Q 1  of up-start flip-flop circuit 41 enables one input of AND gate 32 which thereupon gates a train of pulses P o  through OR gate 33 to the up input of reversible counter 13. Further, up-starting pulse P u  is supplied through the OR gate 58 to reset input R of flip-flop circuits 43 and 44 to ensure that these circuits are reset. The condition of outputs Q 1  -Q 4  after time t 1  is shown in FIGS. 4E-4H. The received frequency starts to increase due to the P o  pulses being counted in reversible counter 13 at time t 1 . At time t 2 , the positive alternation of voltage V s  is produced by the quasi-signal F u2  and thereby the false AFT signal V u  is generated. This false AFT signal V u  and the output Q 1  from flip-flop circuit 41 are supplied to AND gate 53 and the output from the latter is applied to the set terminal S of stop flip-flop circuit 43. Output Q 3  from flip-flop circuit 43 becomes 1 at time t 2  as shown in FIG. 4G. Although AFT signal V u  is also applied to AND gates 38, 53 and 56, since switch S m  is in contact with its preset contact P to ground, AND gates 38 and 39 are inhibited. AND gate 56 also remains inhibited by the 0 output Q 4  from flip-flop circuit 44. 
     The output Q 3  from flip-flop circuit 43 is fed through OR gate 57 to delay circuit 45. A pulse P 5  is derived from delay circuit 45 at time t 4  after the time t 2 . Time t 4  lags t 2  by a predetermined time period τ as shown in FIG. 4I. The predetermined time period τ is long enough to permit the occurrence of the opposite-polarity AFT signal before pulse P 5  is generated. If no opposite-polarity AFT signal occurs before the end of τ, pulse P 5  is fed through OR gate 58 to the reset inputs of flip-flop circuits 43 and 44. AFT signal V u  generated between the times t 2  and t 3  is the false AFT signal. No opposite-polarity AFT signal V s  is provided following the AFT signal V u . Thus, V d  remains 0 and output Q 3  remains 1 until reset at t 4  enabling one input of AND gate 55, but the absence of V d  at its other input keeps Q 5  at 0 as shown in FIG. 4J. Accordingly, the output Q 3  from the flip-flop circuit 43 becomes 0 at time t 4 . With Q 5  maintained at 0, no reset signal is available for connection through OR gate 51 to the reset input R of up flip-flop circuit 41. Therefore the sweep is not stopped. 
     When real broadcast channel is received at a time t 5 , the S-shaped voltage V s  is produced and hence the positive going AFT signal V u  is produced. Therefore, output Q 3  becomes 1 in to the manner previously described. In this case, since a real broadcast channel is being received, the positive-going AFT signal V 1  is replaced by negative going AFT signal V d  at time t 6 . The occurrence of AFT signal V d  at t 6  enables the second input of AND gate 55 and generates the reset signal Q 5  which is connected through OR gate 51 to the reset input R of up flip-flop circuit 41. Up flip-flop circuit 41 is consequently reset and the 0 at its set output Q 1  inhibits AND gate 33 thus halting the further counting of pulses P o  in reversible counter 13. 
     When the output Q 1  of flip-flop circuit 41 becomes 0, output Q 1  is fed through OR gate 59 to write pulse forming circuit 16 which then produces the write pulse. This write pulse is fed through memory control circuit 15 to the memory 11. As a result, the content of the counter 13 is written in the memory 11 as the selecting codes A 1  to A n . 
     It is to be noted that reversible counter 13 is stopped only AFT signal V d  is produced at the time t 6 . The contents of reversible counter 13 at that time has overshot the zero crossing of AFT voltage V s . However, the sweep is stopped on the first counting pulse P o  after AFT signal V d  is made 1 (refer to FIG. 4K). Therefore the tuning error is only one count of the pulses P o  beyond the range of (f 0  ±50 KH z ). In addition, AFT operation is carried out every time the receiver is retuned to a station. Accordingly, even if the contents of channel memory 11 is incorrect due to the above slight mistuning, codes A 1  -A 6  selected from channel memory 11 are corrected after being applied to reversible counter 13. 
     At time t 7 , which follows time t 5  by the time period τ, delay circuit 45 delivers the reset pulse P 5 . Pulse P 5  is fed through OR gate 58 to the reset inputs of flip-flop circuits 43 and 44. Output Q 3  is reset to 0 at time t 7 . If up-sweep switch S u  is operated again, the upward sweep is continued until another real broadcast signal (not shown) is located. The sweep again is stopped and the number in reversible counter 13 is stored. FIGS. 4A to 4C show the change when the sweep is continued, which is similar to the change shown in FIGS. 5A to 5C.) 
     When the switch S d  is operated, inverter 34 produces a starting pulse P d  for the down-sweep as shown in FIG. 5D. In this case, circuits 42, 35, 36 and 54 perform functions in starting and stopping a down sweep which correspond to those described for the up sweep. During the down sweep, signals are as shown in FIG. 5, in which Q 6  represents an output from the AND-gate 56. 
     A stored broadcast channel can be selected by the switches S 1  to S 10 . When switch S m  is in contact with its receiving contact R. After the code A 1  -A n  is transferred into reversible counter 13, AND gates 38 and 39 deliver pulses P o  controlled by AFT signals V u  and V d  respectively to appropriately increase or decrease the stored number to achieve correct fine tuning. 
     As described above, according to the present invention, by utilizing the difference between normal AFT signals V u , V d  and false AFT signal V u  caused by the quasi-signal F u2 , a unidirectional sweep is not stopped by the presence of quasi-signal F u2  but is continued until a real station, which provides normal AFT signals V u  and V d  is found. Thus, the present invention permits rapid and accurate location and tuning of a broadcast channel. 
     Channel memory 11 and addressing circuit 12 may be omitted without departing from the scope of the present invention. In that case, all channel selection is achieved by operation of up-sweep switch S u  or down-sweep switch S d  to increase or decrease the number stored in reversible counter 13. 
     Although the above description is given on a single preferred embodiment of the invention, it will be apparent that many modifications and variations could be effected by one skilled in the art without departing from the spirits or scope of the novel concepts of the invention.