Abstract:
A semiconductor device includes a first semiconductor chip formed with bonding electrodes in predetermined widths and lead frames provided on the first semiconductor element and working as electrical inputs/outputs. The semiconductor device further includes a substrate provided on the lead frames and formed with metal wirings each having a predetermined width, and a second semiconductor chip provided on the substrate and formed with bonding electrodes having substantially the same width as the metal wirings. The semiconductor device further includes solder balls for respectively electrically connecting the bonding electrodes formed on the second semiconductor element and the metal wirings formed on the substrate, first metal wires for respectively electrically connecting the bonding electrodes formed on the first semiconductor element and the lead frames, and second metal wires for-respectively electrically connecting the metal wirings formed on the substrate and the lead frames.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    The present invention relates to a semiconductor device called a lead frame type MCP (Multi-Chip Package), wherein a plurality of semiconductor elements are mounted in one package and sealed with an encapsulating resin.  
           [0002]    In a conventional MCP type semiconductor device, a first semiconductor chip or element is bonded to a chip mounting pad and inner lead portions of lead frames by means of a semiconductor element adhesive composed of an epoxy resin or the like. Bonding electrodes provided on the first semiconductor element are connected to their corresponding inner lead portions by first metal wires. Further, a second semiconductor chip or element is, connected to the inner lead portions through solder balls. The first semiconductor element, the second semiconductor element, the inner lead portions and the respective connecting portions are sealed with a mold resin.  
           [0003]    Bonding electrodes on the second semiconductor element are arranged with pitches ranging from about 80 μm to 200 μm. In order to connect the inner lead portions and the second semiconductor element, there is a need to set the arraying pitches of the inner lead portions in a manner similar to the above (at pitches ranging from about 80 μm to 200 μm). However, the pitch of each inner lead portion is greater than about 180 μm. This is because of criteria of stable machining of each inner lead portion. Therefore, there are developed unmountable ones depending on the pitches of the bonding electrodes on the second semiconductor element. Thus, there were restrictions on applicable semiconductor elements. Namely, a problem arose in that the second semiconductor element having the bonding electrodes whose each arraying pitch was about 180 μm or less, could not be mounted.  
           [0004]    Since the inner lead portions are separated from one another, they easily deform due to vibrations developed in an assembly process, contacts with an assembly device or the like, etc. Therefore, there was a case in which the tip pitches of the inner lead portions were misregistered from the bonding electrodes on the mounted second semiconductor element so that the inner lead portions and the bonding electrodes could not be connected.  
           [0005]    Since the inner lead portions become ununiform in height when they are deformed due to a reason similar to the above, there was a case in which a failure in the connection of the second semiconductor element was encountered. Namely, there exist portions having wide and narrow intervals between the inner lead portions and the second semiconductor element. There was a case in which the solder balls and the inner lead portions were not brought into contact at the portions wide in interval, thereby causing failures in their connections.  
           [0006]    Furthermore, since there is a need to connect the bonding electrodes on the first semiconductor element and the second semiconductor element to the same inner lead portions respectively (to share the use of the inner lead portions), only semiconductor elements having the same pin assignments or the completely same semiconductor elements utilized in combination could be mounted, so that the scope of application of products was restricted.  
         SUMMARY OF THE INVENTION  
         [0007]    The present invention provides a novel and improved semiconductor device capable of preventing deviations in pitch in an assembly process of semiconductor elements and inner lead portions to thereby prevent failures in their connections, thus making it possible to enhance reflow packaging of the semiconductor device and connection reliability relative to external thermal stress (change in temperature) subsequent to its packaging, and a manufacturing method thereof.  
           [0008]    A semiconductor device of the present invention includes a first semiconductor chip formed with bonding electrodes in predetermined widths and lead frames provided on the first semiconductor element and working as electrical inputs/outputs. The semiconductor device further includes a substrate provided on the lead frames and formed with metal wirings each having a predetermined width, and a second semiconductor chip provided on the substrate and formed with bonding electrodes having substantially the same width as the metal wirings. The semiconductor device further includes solder balls for respectively electrically connecting the bonding electrodes formed on the second semiconductor element and the metal wirings formed on the substrate, first metal wires for respectively electrically connecting the bonding electrodes formed on the first semiconductor element and the lead frames, and second metal wires for respectively electrically connecting the metal wirings formed on the substrate and the lead frames. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0009]    While the specification concludes with claims particularly pointing out and distinctly claiming the subject matter which is regarded as the invention, it is believed that the invention, the objects and features of the invention and further objects, features and advantages thereof will be better understood from the following description taken in connection with the accompanying drawings in which:  
         [0010]    [0010]FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention;  
         [0011]    [0011]FIG. 2(A) is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention;  
         [0012]    [0012]FIG. 2(B) is a plan view of the semiconductor device according to the second embodiment of the present invention;  
         [0013]    [0013]FIG. 2(C) is a cross-sectional view taken along line A-A′ of FIG. 2(B); and  
         [0014]    FIGS.  3 (A) through  3 (J) are respectively views showing a method of manufacturing a semiconductor device of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0015]    Preferred embodiments of a semiconductor device according to the present invention and a manufacturing method thereof will hereinafter be described in detail with reference to the accompanying drawings. Incidentally, components each having substantially the same functional configuration in the present specification and the drawings are respectively identified by the same reference numerals and the description of certain common components will therefore be omitted.  
         [0016]    [0016]FIG. 1 is an explanatory view showing a semiconductor device &#39; 100  according to a first embodiment.  
         [0017]    In the semiconductor device  100 , a first semiconductor chip or element  101  is bonded to a chip mounting pad  107  and inner lead portions  105   a  of lead frames  105  by means of a semiconductor element adhesive  103  such as an epoxy resin. Bonding electrodes  112  placed on the first semiconductor element  101 , and the inner lead portions  105   a  are respectively connected to one another by first metal wires  104   a . The first metal wires  104   a  are of components corresponding to the metal wires described in the related art.  
         [0018]    The present embodiment is characterized by the following structure.  
         [0019]    A substrate  110  made up of a glass epoxy resin or the like is bonded to the inner lead portions  105   a  by a substrate adhesive  111  composed of an epoxy resin or a polyimide resin. A second semiconductor chip or element  102  is connected to metal wirings  109  mounted to the substrate  110  through solder balls  108 . Here, the pitches of the metal wirings  109  at their junctions are substantially the same as bonding electrodes  113  on the second semiconductor element  102 . Further, the metal wirings  109  are connected to their corresponding inner lead portions  105   a  by means of second metal wires  104   b.    
         [0020]    The first semiconductor element  101 , the second semiconductor element  102 , the inner lead portions  105   a  and the respective connecting portions are encapsulated in a mold resin  106 . According to the present embodiment as described above, the following advantageous effects are obtained.  
         [0021]    Since the respective metal wirings  109  provided for the substrate  110  are formed on and fixed to the substrate  110  in advance, deviations in pitch and the like in an assembly process do not occur and the wiring pitch thereof is constant. It is therefore possible to prevent the metal wirings  109  and the bonding electrodes  113  on the second semiconductor element  102  from being misregistered. Thus, the solder balls  108  and the metal wirings  109  can be reliably connected to one another.  
         [0022]    Since the respective metal wirings  109  mounted to the substrate  110  become constant in height due to a similar reason, the interval between each of the solder balls  108  and its corresponding metal wiring  109  becomes constant, so that a failure in their connections can be prevented from occurring.  
         [0023]    Since the reliable junction between the second semiconductor element  102  and the substrate  110  is implemented as described above, reflow packaging of the semiconductor device, and connection reliability relative to external thermal stress (change in temperature) subsequent to its packaging are enhanced.  
         [0024]    [0024]FIG. 2(A) is a cross-sectional view of a semiconductor device  200  according to a second embodiment, FIG. 2(B) is a plan view thereof, and FIG. 2(C) is a cross-sectional view taken along line A-A′ of FIG. 2(B), respectively. The present embodiment is one which has applied the semiconductor device  100  illustrated in the first embodiment and is characterized by a substrate&#39;s structure.  
         [0025]    In the semiconductor device  200 , solder-ball mounting pads  109   a  and wire-bonding pads  109   b  are provided on a substrate  210 . They are connected to one another by metal wiring patterns  109   c.    
         [0026]    The size of each solder-ball mounting pad  109   a  ranges from about 70 μm to 180 μm in diameter, and the pitch thereof is laid out at about 80 μm to 200 μm. Each of the wire-bonding pads  109   b  is shaped in the form of an ellipse having a width of about 100 μm and a length of about 200 μm to 300 μm. In order to ensure adhesion to a mold resin  106 , resists  114  are coated on the wiring patterns  109   c  as shown in FIG. 2(C). Further, the metal wirings  109  are provided only on one sides (upper sides as viewed in the cross-sectional view taken along line A-A′) of the substrate  210 .  
         [0027]    A resin inflow frame  113  is provided inside the solder-ball mounting pads  109   a  on the substrate  210 .  
         [0028]    Since other components are substantially identical to those of the semiconductor device  100  according to the first embodiment, the description of common components will be omitted.  
         [0029]    According to the present embodiment as described above, since the substrate  210  is provided with the resin inflow frame  113 , the mold resin  106  can be charged through a resin inflow path  115 . Thus, the same material as the mold resin for sealing these peripheries can be used for charging between the first semiconductor element  101  and the second semiconductor element  102 . Since the same resin is used for its charge, the generation of a thermal stress due to a difference in linear expansion coefficient can be suppressed, and solder resistance and thermal resistance equivalent to the conventional structure can be ensured.  
         [0030]    FIGS.  3 (A) through  3 (J) are respectively explanatory views showing a method of manufacturing a semiconductor device of the present invention.  
         [0031]    A method of manufacturing the semiconductor device  200  illustrated in the second embodiment will be described with reference to FIGS.  3 (A) through  3 (J) by way of example.  
         [0032]    As shown in FIG. 3(A), substrates  210  equipped with resin inflow frames  113  in advance are formed in a substrate block  116 . Incidentally, if substrates unequipped with such resin inflow frames are used, then the semiconductor devices  100  each illustrated in the first embodiment can also be manufactured.  
         [0033]    Next, second semiconductor elements  102  are mounted over the substrate block  116  as shown in FIG. 3(B). As shown in FIG. 3(C) herein, the second semiconductor elements  102  are collectively flip-chip packaged over solder ball pads  109   b  on the substrates  210  of the substrate block  116  with solder balls  108  interposed therebetween. Ones subsequent to their packaging are formed as shown in FIG. 3(D). From the above, the substrate block  116  equipped with the second semiconductor elements  102  on the respective substrates  210  is completed.  
         [0034]    As shown in FIG. 3(E), a film-shaped substrate adhesive  111  having holes defined in their corresponding positions of the resin inflow frames  113  is applied onto a surface of the substrate block  116 , which is opposite to a surface thereof for mounting the second semiconductor elements  102 . The substrate adhesive  111  is composed of a polyimide resin or an epoxy resin. Incidentally, when the substrates provided with no resin inflow frames are used, such a film-shaped substrate adhesive having no such holes is used in such a process step as shown in FIG. 3(A).  
         [0035]    A method of applying the substrate adhesive  111  will be described in detail with reference to FIG. 3(F).  
         [0036]    A description will be made of an example in which the thermoplastic polyimide resin film “DF-400” manufactured by Hitachi Chemical Co., Ltd. is used as the substrate adhesive  111  by way of example. A heater table  124  subjected to Teflon coating or the like is heated at about 100° C. to 180° C. and the substrate adhesive  111  is laid thereon. The substrate block  116  is placed thereabove while it is being positioned thereto. When left standing for about 1 to 2 minutes, the substrate adhesive  111  is bonded to the substrate block  116 . Next, the substrate block  116  is lifted from the heater table  124  so that the substrate block  116  with the substrate adhesive  111  attached thereto is completed. Since the heater table  124  has been Teflon-coated, the substrate adhesive  111  is no longer left on the heater table  124 .  
         [0037]    As shown in FIG. 3(G), the surface for the substrate adhesive  111 , of the substrate block  116  equipped with the substrate adhesive  111  is bonded to a mount tape  119 . Here, the mount tape  119  has been fixed to a wafer ring  117 . A mounting surface for the substrate block  116 , of the mount tape  119  has been coated with an adhesive. As the adhesive, may be, for example, an ultraviolet cured one like “D˜675” manufactured by LINTEC Corporation. After the substrate block  116  have been mounted to the mount tape  119 , it is brought into fractionization or pieces every substrates  210  along scribe lines  118  through the use of a standard scribe process step, whereby the substrates  210  each equipped with the second semiconductor element  102  are completed.  
         [0038]    Thereafter, as shown in FIG. 3(H), a standard die bonder for each semiconductor element is used to upthrust the periphery of the resin inflow frame  113  of each substrate  210  by means of upthrust pins  121 , whereby the corresponding second semiconductor element  102  is absorbed by a suction collet  120 .  
         [0039]    As shown in FIG. 3(I), lead frames  105  in which a first semiconductor element  101  is placed therebelow in advance and wire bonding has been completed, are mounted on a die bond heater block  122 , and a substrate adhesive  111  and inner lead portions  105   a  are bonded to one another by thermocompression bonding. Here, the die bond heater block  122  is heated to approximately 100° C. to 200° C. and provides a temperature enough for a reaction temperature of the substrate adhesive  111 .  
         [0040]    Next, as shown in FIG. 3(J), the lead frames  105  in which the first semiconductor element  101  is placed therebelow and the wire bonding has been completed, are mounted on a wire bond heater block  123  in a wire bond process step, and wire-bonding pads  109   b  of each substrate  210  and their corresponding inner lead portions  105   a  are connected to one another by thermocompression bonding. Thereafter, the semiconductor device  200  shown in FIG. 2 is completed according to a standard mold process step.  
         [0041]    According to the present embodiment as described above, the semiconductor device  200  according to the second embodiment can be easily manufactured. Incidentally, if the substrate unequipped with the resin inflow frame and the substrate adhesive are used, then the semiconductor device  100  according to the first embodiment can be easily fabricated according to a similar method.  
         [0042]    While the preferred embodiments of the semiconductor device according to the present invention and its manufacturing method have been described with reference to the accompanying drawings, the present invention is not limited to such examples. It will be apparent to those skilled in the art that various changes or modifications can be supposed to be made to the invention within the scope of a technical idea described in the following claims. It is understood that those changes or modifications belong to the technical scope of the present invention.  
         [0043]    According to the present invention as described above, since respective metal wirings provided for a substrate are formed on and fixed to a substrate in advance, deviations in pitch and the like in an assembly process do not occur and a wiring pitch is held constant. It is therefore possible to prevent the metal wirings and their corresponding bonding electrodes on a second semiconductor element from being misregistered. Solder balls and the metal wirings can thus be reliably connected to one another.  
         [0044]    Since the respective metal wirings mounted to the substrate become constant in height due to a similar reason, the interval between each of the solder balls and each of the metal wirings becomes constant, so that a failure in their connections can be prevented from occurring.  
         [0045]    Furthermore, since a reliable junction between the second semiconductor element and the substrate is implemented as described above, reflow packaging of a semiconductor device, and connection reliability relative to external thermal stress (change in temperature) subsequent to its packaging are enhanced.  
         [0046]    According to the application of the present invention, the same material as a mold resin for sealing the peripheries of a first semiconductor element and a second semiconductor element can be used for charging between the first semiconductor element and the second semiconductor element. Since the same resin is used for its charge, the generation of thermal stress due to a difference in linear expansion coefficient can be suppressed, and solder resistance and thermal resistance equivalent to the conventional structure can be ensured.  
         [0047]    According to the present invention as well, a semiconductor device can be easily manufactured which brings about the above excellent effects.