Abstract:
A communication apparatus includes a connection port and a processor. The connection port is connected to a switch apparatus. The processor is configured to acquire data to be transmitted to an external apparatus. The processor is configured to generate a packet destined to the external apparatus. The packet contains the data. The processor is configured to store the packet in a buffer. The processor is configured to acquire the packet from the buffer. The processor is configured to transmit the packet to the switch apparatus via the connection port. The processor is configured to acquire a state of a network to which the connection port is connected. The processor is configured to control, on basis of the state of the network and a predetermined packet generation time, a number of packets to be generated.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2014-211242, filed on Oct. 15, 2014, the entire contents of which are incorporated herein by reference. 
       FIELD 
       [0002]    The embodiments discussed herein are related to a communication apparatus, an information processing apparatus, and a method of controlling a communication apparatus. 
       BACKGROUND 
       [0003]    As information processing is advanced and becomes complex in recent years, an information processing system that allows communications between a plurality of arithmetic processing units to execute processing tends to increase. For example, a parallel computer includes nodes performing computation and switches forming networks of the nodes. 
         [0004]    In such a parallel computer, when communication is performed between the nodes, a node divides a message into packets and transmits the packets to a switch connected to the node. When a switch receives a packet via an input port to which a node or another switch is connected, the switch determines a destination port on the basis of a destination of the packet and transmits the packet using the determined destination port. 
         [0005]    When a plurality of packets received via respective input ports are to be transmitted to the same destination port, the switch performs arbitration for the packets and transmits the packets in an order based on the arbitration result. The switch includes a buffer for each destination port and holds the packet stacked by the arbitration in the buffer. 
         [0006]    For example, a case is considered where a first node to a fourth node are arranged in series through switches. In this case, the switches are connected through the ports with one another to form a path which bypasses the nodes. In a case where the first node transmits packets to the fourth node, a network interface of the first node sequentially generates packets destined to the fourth node and stores the packets in a transmission buffer. This is because if a subsequent packet is not generated even when a transmission of a preceding packet is completed and the subsequent packet may be transmitted, the subsequent packet is unable to be immediately transmitted and thus throughput is reduced. 
         [0007]    A related technique is suggested in which in order to suppress a reduction of the throughput, a notification is sent to a transmission side apparatus to suppress a transmission rate in a case where a switch or a reception side apparatus becomes congested. Further, a related technique is suggested in which a packet is prohibited from being transmitted from a transmission apparatus when a quantity of data accumulated in a buffer of a switch exceeds a threshold value. 
         [0008]    Related techniques are disclosed in, for example, Japanese Laid-Open Patent Publication No. 09-270821 and Japanese National Publication of International Patent Application No. 2002-519912. 
         [0009]    The subsequent packet becomes transmittable depending on a state of a network. When it takes time until the subsequent packet becomes transmittable, an influence may be exerted on communications to other nodes. 
         [0010]    A case is considered where, in addition to the first node, the second node and the third node also transmit packets to the fourth node in the example of the information processing system including the first node to the fourth node as described above. In this case, since the packets from a plurality of transmission sources are simultaneously transmitted to the fourth node as the same destination, arbitration is performed on each switch located on the path, and transmission of some packets may be suspended. The suspended packets are stored in the buffers. When the suspended term becomes longer, the packets stored in the buffer are gradually increased. When a buffer of a switch is saturated, the transmitted packets are accumulated in a buffer of another switch located on the path, and the number of switches having saturated buffers is increased gradually on the path. Finally, even the switch connected to the first node, which is a transmission source, is saturated and packets to be transmitted by the first node are not allowed to be transmitted until an available space is created in the buffer of the switch to which the first node is connected. As described above, a situation where the switch connected to a destination port of packets becomes saturated is referred to as a “clogging of destination port” in the following description. When the first node attempts to transmit packets to another node in a state where the destination port is clogged, the transmission buffer of the network interface of the first node is saturated and a sufficient space is not available, such that the packets destined to the another node are not generated. Therefore, there is a possibility that the throughput of the first node is reduced. 
         [0011]    As described above, in the conventional information processing system, it is difficult to reduce degradation in performance caused by the clogging of the destination port. 
         [0012]    It may be considered that a transmission buffer may be provided for each destination port in the network interface, but the amount of desired materials is increased as the number of destination ports is increased and it is difficult to provide a transmission buffer for each destination port from the viewpoint of, for example, an increase of manufacturing cost or an increase of a mounting area. 
         [0013]    In the conventional technique in which the notification is sent to the transmission side apparatus to reduce the transmission rate in a case of being congested, it is difficult to reduce degradation in performance of the system due to the reduction of the transmission rate. In the conventional technique in which the packet is prohibited from being transmitted from the transmission apparatus in a case where the quantity of data accumulated in the buffer exceeds the threshold value, it is difficult to reduce the degradation in performance of the system since the packet transmission is stopped. 
       SUMMARY 
       [0014]    According to an aspect of the present invention, provided is a communication apparatus including a connection port and a processor. The connection port is connected to a switch apparatus. The processor is configured to acquire data to be transmitted to an external apparatus. The processor is configured to generate a packet destined to the external apparatus. The packet contains the data. The processor is configured to store the packet in a buffer. The processor is configured to acquire the packet from the buffer. The processor is configured to transmit the packet to the switch apparatus via the connection port. The processor is configured to acquire a state of a network to which the connection port is connected. The processor is configured to control, on basis of the state of the network and a predetermined packet generation time, a number of packets to be generated. 
         [0015]    The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0016]      FIG. 1  is a diagram illustrating an exemplary configuration of an information processing system; 
           [0017]      FIG. 2  is a diagram illustrating an information processing apparatus according to a first embodiment; 
           [0018]      FIG. 3  is a diagram explaining packet generation and packet transmission for a case of N=1; 
           [0019]      FIG. 4  is a diagram explaining packet generation and packet transmission for a case of N=2; 
           [0020]      FIG. 5  is a flowchart of a control process of packet generation by a network interface according to a first embodiment; 
           [0021]      FIG. 6  is a flowchart of a packet transmission process; 
           [0022]      FIG. 7  is a diagram illustrating an information processing apparatus according to a second embodiment; 
           [0023]      FIG. 8  is a flowchart of a control process of packet generation by a network interface according to a second embodiment; and 
           [0024]      FIG. 9  is a diagram illustrating an exemplary hardware configuration of an information processing apparatus. 
       
    
    
     DESCRIPTION OF EMBODIMENTS 
       [0025]    Hereinafter, descriptions will be made in detail on embodiments of a communication apparatus, an information processing apparatus, and a method of controlling a communication apparatus with reference to the accompanying drawings. The communication apparatus, the information processing apparatus, and the method of controlling the communication apparatus are not limited to the embodiments to be described below. 
       First Embodiment 
       [0026]      FIG. 1  is a diagram illustrating an exemplary configuration of an information processing system. As illustrated in  FIG. 1 , the information processing system includes a plurality of nodes  101  to  104  that are information processing apparatuses. In the following, when it is not intended to distinguish the respective nodes  101  to  104 , each node may be referred to as a “node  10 ”. Further, the information processing system includes a plurality of switches  21  to  24 . In the following, when it is not intended to distinguish the respective switches  21  to  24 , each switch may be referred to as a “switch  20 ”. 
         [0027]    The node  101  is connected to the switch  21 , the node  102  is connected to the switch  22 , the node  103  is connected to the switch  23 , and the node  104  is connected to the switch  24 . The switches  21  to  24  are connected in series. That is, the nodes  101  to  104  are linearly arranged to form a one-dimensional mesh network topology. Here, in the present embodiment, for the convenience of explanation, the one-dimensional mesh network topology is described by way of an example, but the network topology is not particularly limited, and a one-dimensional torus, two-dimensional mesh or torus network topology, or three-dimensional mesh or torus network topology may be employed. 
         [0028]    Each node  10  includes a port for being connected to a corresponding switch  20 . The port of each node  10  includes a packet storage unit  132 . The packet storage unit  132  is a transmission buffer. 
         [0029]    Each switch  20  includes a port for being connected to a corresponding node  10  and ports for being connected to other switches  20 . Each port of each switch  20  includes a buffer  201 . 
         [0030]    For example, when the node  101  sends a message to the node  104 , the node  101  divides the message to generate packets and transmits the generated packets to the node  104  via the switches  21  to  24 . When there is no available space in the buffer  201  of the port of the switch  21 , which is connected to the switch  22 , the node  101  stores the packets in the packet storage unit  132  until a transmission permission for the packets is received from the switch  21 . When the transmission permission for the packet is received from the switch  21 , the node  101  outputs the packets stored in the packet storage unit  132  to the switch  21 . 
         [0031]    Next, descriptions will be made on details of the information processing apparatus according to the present embodiment with reference to  FIG. 2 .  FIG. 2  is a diagram illustrating an information processing apparatus according to first embodiment. 
         [0032]    The node  10  includes a processor  11 , a main storage unit  12 , a network interface  13  which is a communication apparatus, and a port  14 . The processor  11 , the main storage unit  12 , and the network interface  13  are connected with one another by a bus. The port  14  may be regarded as a portion of the network interface  13 . 
         [0033]    The processor  11  is an arithmetic processing unit. The processor  11  receives a direct memory access (DMA) request from the network interface  13 . The processor  11  transmits an address at which the data is stored to the network interface  13 . The processor  11  transmits a permission to use the bus and a message transmission request to the network interface  13 . Then, the processor  11  releases the bus. 
         [0034]    When a DMA completion notification is received from the network interface  13 , the processor  11  regains a right to use the bus. 
         [0035]    The main storage unit  12  is divided into storage areas and each storage area is assigned with an address. The main storage unit  12  stores data in the storage area corresponding to each address. 
         [0036]    Next, descriptions will be made on the network interface  13 . The network interface  13  includes a DMA processing unit  131 , the packet storage unit  132 , a control unit  133 , and a packet transmission unit  134  as illustrated in  FIG. 2 . The network interface  13  is connected with the switch  20  through the port  14 . 
         [0037]    The DMA processing unit  131  transmits a DMA request together with information of data to be transferred by DMA to the processor  11 . Thereafter, the DMA processing unit  131  receives, from a DMA managing unit  331  (described below), an address and a data length of data to be stored in each packet for transmitting the data. The data is divided for a plurality of packets to be transmitted. In the following, a topmost packet among the packets in which the data is stored is referred to as a “leading packet” and other packets succeeding to the leading packet are referred to as “subsequent packets”. 
         [0038]    The DMA processing unit  131  sequentially acquires data which amounts to the data length, from the main storage unit  12  starting from the address received from the DMA managing unit  331 . The DMA processing unit  131  generates a packet containing the acquired data. Thereafter, the DMA processing unit  131  transmits the generated packet to the packet storage unit  132 . 
         [0039]    The DMA processing unit  131  generates a packet on the basis of a sequentially designated address and a data length and stores the packet in the packet storage unit  132 , as long as a start address and a data length of data to be stored in a packet are sent from the DMA managing unit  331 . 
         [0040]    When a DMA end notification is received from the DMA managing unit  331 , the DMA processing unit  131  transmits the DMA completion notification to the processor  11 . The DMA processing unit  131  corresponds to an example of a “generation unit”. 
         [0041]    The packet storage unit  132  sequentially stores and accumulates the packets transmitted from the DMA processing unit  131 . The packet storage unit  132  corresponds to an example of a “storage unit”. 
         [0042]    The control unit  133  controls DMA processing executed by the DMA processing unit  131 . The control unit  133  includes the DMA managing unit  331  and a generation number control unit  332 . 
         [0043]    The DMA managing unit  331  receives the address of the data to be transferred by DMA together with the message transmission request from the processor  11 . The DMA managing unit  331  obtains a top address and a data length of data to be stored in each packet in order to divide the data to be transferred by DMA into small-sized data that may be stored in each packet. 
         [0044]    Next, the DMA managing unit  331  determines whether an instruction to limit the number of packets to be generated to N packets is received from the generation number control unit  332 . 
         [0045]    When it is determined that the instruction to limit the number of packets to be generated is not received, the DMA managing unit  331  sequentially transmits each of top addresses and data lengths of data to be stored in each of the leading packet and all the subsequent packets succeeding to the leading packet to the DMA processing unit  131 . 
         [0046]    In contrast, when the instruction to limit the number of packets to be generated to N packets is received, the DMA managing unit  331  sequentially transmits each of top addresses and data lengths of data to be stored in each of the leading packet and the subsequent packets succeeding to the leading packet to the DMA processing unit  131 . When the number of packets stored in the packet storage unit  132  becomes N packets, the DMA managing unit  331  temporarily stops the transmission of an address and a data length to the DMA processing unit  131 . Thereafter, when the number of packets stored in the packet storage unit  132  becomes less than N packets, the DMA managing unit  331  sequentially sends an address and a data length to the DMA processing unit  131  such that the number of packets stored in the packet storage unit  132  becomes N packets. As described above, a state where the DMA processing unit  131  is allowed to generate the packets such that the number of packets stored in the DMA processing unit  131  becomes the N packets is referred to as a “state where the number of packets to be generated is limited”. 
         [0047]    When a notification of cancelling the limitation is received from the generation number control unit  332  in the state where the number of packets to be generated is limited, the DMA managing unit  331  transmits a top address and a data length of remaining data to be stored in the respective packets to the DMA processing unit  131  without limiting the number of packets to be generated. When the instruction to limit the number of packets to be generated to N packets is received from the generation number control unit  332  again, the DMA managing unit  331  returns to the state where the number of packets to be generated is limited. 
         [0048]    When generation of the leading packet is completed, the DMA managing unit  331  receives a generation completion notification of the leading packet from the DMA processing unit  131 . When the generation completion notification of the leading packet is received, the DMA managing unit  331  transmits, to the packet transmission unit  134 , an instruction to transmit the leading packet. Further, the DMA managing unit  331  notifies the generation number control unit  332  of the output of the instruction to transmit the leading packet. 
         [0049]    With regard to the subsequent packets, the DMA managing unit  331  transmits, to the packet transmission unit  134 , an instruction to transmit a packet, at the timing when an address and a data length are transmitted to the DMA processing unit  131 . Further, the DMA managing unit  331  notifies the generation number control unit  332  of the output of the instruction to transmit the packet. 
         [0050]    The DMA managing unit  331  determines whether generation of all the packets for transmitting the data to be transferred by DMA is completed. When it is determined that the generation of all the packets is not completed, the DMA managing unit  331  continues to transmit an address and a data length. When it is determined that the generation of all the packets is completed, the DMA managing unit  331  transmits the DMA end notification to the DMA processing unit  131 . 
         [0051]    The generation number control unit  332  stores therein a “packet generation time” which is a time taken for packet generation, in advance. For example, the packet generation time may be obtained as follows. It is assumed that a “latency for storing a packet” is defined as a period of time between a timing at which the DMA processing unit  131  requests the main storage unit  12  for data and a timing at which a packet containing the requested data is stored in the packet storage unit  132 . Further, it is assumed that a “data transfer time” is defined as a value obtained by dividing a data length by a bandwidth between the main storage unit  12  and the network interface  13 . The latency for storing a packet and the data transfer time may be acquired from a specification or obtained by measuring a time actually taken for generating a packet. In this case, the packet generation time is obtained as a value obtained by adding the latency for storing a packet and the data transfer time. 
         [0052]    The generation number control unit  332  receives, from the DMA managing unit  331 , the notification of the output of the instruction to transmit a packet. Thereafter, the generation number control unit  332  receives, from the packet transmission unit  134 , a transmission permission corresponding to the instruction to transmit the packet. The generation number control unit  332  calculates a “transmission permission time” which is a period of time between a timing at which the instruction to transmit a packet is output and a timing at which the transmission permission is received. For example, the generation number control unit  332  calculates the transmission permission time by subtracting a timing at which the instruction to transmit a packet is output from the DMA managing unit  331  from a timing at which the transmission permission is received. The transmission permission time corresponds to an example of a “state of a network”. 
         [0053]    Next, the generation number control unit  332  compares the transmission permission time with the packet generation time. When the transmission permission time is longer than the packet generation time, the generation number control unit  332  notifies the DMA managing unit  331  of the fact that the number of packets to be generated is to be limited to N packets. 
         [0054]    When the transmission permission time becomes shorter than the packet generation time in a state where the number of packets to be generated is limited, the generation number control unit  332  determines whether a transmission cancellation is received from the packet transmission unit  134 . When it is determined that the transmission cancellation is received, the generation number control unit  332  notifies the DMA managing unit  331  of the fact that the limitation on the number of packets to be generated is cancelled. In contrast, when the transmission cancellation is not received, the generation number control unit  332  maintains the state where the number of packets to be generated is limited to N packets. This is because when the instruction to transmit the packet is not cancelled, no packet to be transmitted is generated. In this case, it is considered that a large number of packets may be stored in the packet storage unit  132 . Therefore, even if the transmission permission time is shorter than the packet generation time, when the limitation on the number of packets to be generated is cancelled to generate packets without the limitation, the generated packets are likely to be accumulated in the packet storage unit  132 . Accordingly, when the transmission cancellation is received, that is, when the packet generation does not follow the packet transmission, the generation number control unit  332  cancels the limitation on the number of packets to be generated. 
         [0055]    Here, descriptions will be made on a determination method of the number of packets N for a case where the number of packets to be generated is to be limited. In order to prevent a reduction of throughput, the N may be set as, for example, N=packet generation time/(packet transmission time+shortest time taken until transmission permission is turned back). Here, the packet transmission time refers to a period of time between a timing at which the transmission permission is received and a timing at which the packet transmission to the switch  20  is completed. The shortest time taken until transmission permission is turned back refers to the shortest period of time between a timing at which after the DMA managing unit  331  outputs the instruction to transmit the packet to the packet transmission unit  134  and a timing at which the generation number control unit  332  receives the transmission permission from the packet transmission unit  134 . That is, it may be considered that a time obtained by adding the shortest time taken until the transmission permission is turned back to the packet transmission time corresponds to the shortest time taken until the next packet is sent. 
         [0056]    When the shortest time taken until the next packet is sent is identical with the packet generation time, since the subsequent packet may be generated after the packet transmission is started, the number of subsequent packets to be generated becomes at most 1 in order to reduce the throughput. In this case, the N may be set to 1 (one), that is, N=1. 
         [0057]      FIG. 3  is a diagram explaining packet generation and packet transmission for a case of N=1. In  FIG. 3 , the horizontal axis represents a lapse of time. Here, descriptions will be made on a case where processing is performed for a packet A and a packet B. A time period  201  is a transmission time for the packet A, a time period  202  is a transmission permission time for the packet B, and a time period  203  is a generation time of the packet B. In a case of N=1, time T 3 =time T 1 +time T 2 . That is, at the timing at which the transmission permission for the packet B is received, the packet B is already generated and the network interface  13  is in a state capable of immediately transmitting the packet B. Accordingly, the network interface  13  may prevent the reduction of the throughput. 
         [0058]    However, when the time taken for the packet generation is twice the shortest time taken until the next packet is sent, at least two packets may be generated for the number of subsequent packets needed to be generated. That is, the N may be set to 2 (two), that is, N=2. In this case, when the N is set to 1, that is, N=1, a period of time during which the packet is not transmitted occurs and reduction of the throughput is caused. 
         [0059]      FIG. 4  is a diagram explaining packet generation and packet transmission for a case of N=2. In  FIG. 4 , the horizontal axis represents a lapse of time. Here, descriptions will be made on a case where processing is performed for packets A to D. A time period  211  is a transmission time of the packet A and a time period  212  is a transmission permission time for the packet B. A time period  213  is a transmission time of the packet B and a time period  214  is a transmission permission time for the packet C. Further, a time period  215  is a transmission time of the packet C and a time period  216  is a transmission permission time for the packet D. A time period  217  is a generation time of the packet C and a time period  218  is a generation time for the packet D. Here, descriptions will be made on a case where generation of two packets of the packets A and B is completed before the time period  211  and time period  217  begin. 
         [0060]    In a case of N=2, the time taken until three packets are transmitted and the transmission permission for the subsequent packet is received is identical with the time taken for generating two packets. That is, time T 17 =time T 11 +time T 12 +time T 13 +time T 14 +time T 15 +time T 16 . Accordingly, at the timing at which the transmission permission for the packet C is received, the packet C is already generated and the network interface  13  is in a state capable of immediately transmitting the packet C. Further, at the timing at which the transmission permission for the packet D is received, the packet D is already generated and the network interface  13  is in a state capable of immediately transmitting the packet D. Accordingly, the network interface  13  may prevent reduction of the throughput. 
         [0061]    Alternatively, the number of packets N may be determined by using the number of ports connected to the switch  20  such that N=(buffer size/(packet size×number of ports)). 
         [0062]    The packet transmission unit  134  receives the instruction to transmit a packet from the DMA managing unit  331 . The packet transmission unit  134  transmits a packet transmission request for a designated packet to a destination port of the switch  20  via the port  14 . When a transmission permission is received from the destination port of the switch  20 , the packet transmission unit  134  transmits the transmission permission to the generation number control unit  332 . Further, the packet transmission unit  134  determines whether the packet corresponding to the received transmission permission is present in the packet storage unit  132 . 
         [0063]    When it is determined that the packet is present in the packet storage unit  132 , the packet transmission unit  134  transmits the corresponding packet to the destination port of the switch  20  via the port  14 . 
         [0064]    In contrast, when it is determined that the packet corresponding to the received transmission permission is not present in the packet storage unit  132 , the packet transmission unit  134  transmits a transmission cancellation to the switch  20 . Further, the packet transmission unit  134  also transmits the transmission cancellation to the generation number control unit  332 . The packet transmission unit  134  corresponds to an example of a “transmission unit”. 
         [0065]    The switch  20  receives the packet transmission request from the packet transmission unit  134 . The switch  20  determines whether there is an available space in the buffer  201  (see  FIG. 1 ) of the destination port designated by the packet transmission request. When it is determined that there is an available space in the buffer  201 , the switch  20  transmits the transmission permission to the packet transmission unit  134 . 
         [0066]    In contrast, when it is determined that there is no available space in the buffer  201 , the switch  20  waits until an available space is created in the buffer  201  of the destination port. When the available space is created, the switch  20  transmits the transmission permission to the packet transmission unit  134 . 
         [0067]    Next, descriptions will be made on a control flow of the packet generation by the network interface  13  according to the present embodiment with reference to  FIG. 5 .  FIG. 5  is a flowchart of a control process of the packet generation by a network interface according to the first embodiment. 
         [0068]    The DMA managing unit  331  receives a message transmission request from the processor  11  (S 101 ). The DMA managing unit  331  calculates top addresses and data lengths of data to be stored in the leading packet and each of the subsequent packets succeeding to the leading packet in order to divide the data designated by the message transmission request into small-sized data that may be stored in each packet. 
         [0069]    Next, the DMA managing unit  331  transmits the top address and data length of the data to be contained in the leading packet to the DMA processing unit  131  (S 102 ). 
         [0070]    The DMA managing unit  331  determines whether the generation of the leading packet is completed by a notification sent from the DMA processing unit  131  (S 103 ). When it is determined that the generation of the leading packet is not completed (“NO” at S 103 ), the DMA managing unit  331  waits until the generation of the leading packet is completed. 
         [0071]    In contrast, when it is determined that the generation of the leading packet is completed (“YES” at S 103 ), the DMA managing unit  331  transmits a transmission instruction to transmit the leading packet to the packet transmission unit  134  (S 104 ). Further, the DMA managing unit  331  notifies the generation number control unit  332  of the output of the transmission instruction. 
         [0072]    Thereafter, the generation number control unit  332  receives, from the packet transmission unit  134 , a notification of transmission permission corresponding to the transmission instruction (S 105 ). 
         [0073]    Next, the generation number control unit  332  calculates a transmission permission time. The generation number control unit  332  determines whether the calculated transmission permission time is equal to or greater than a predetermined packet generation time (S 106 ). When it is determined that the transmission permission time is equal to or greater than the packet generation time (“YES” at S 106 ), the generation number control unit  332  notifies the DMA managing unit  331  of the fact that the number of packets to be generated is to be limited to N packets. The DMA managing unit  331  receives the notification and limits the number of packets to be generated to N packets (S 107 ). 
         [0074]    In contrast, when it is determined that the transmission permission time is less than the packet generation time (“NO” at S 106 ), the generation number control unit  332  determines whether a transmission cancellation is received from the packet transmission unit  134  (S 108 ). When it is determined that the transmission cancellation is not received (“NO” at S 108 ), the packet generation process proceeds to S 110 . 
         [0075]    In contrast, when it is determined that the transmission cancellation is received (“YES” at S 108 ), the generation number control unit  332  notifies the DMA managing unit  331  of the cancellation of the limitation. The DMA managing unit  331  receives the notification and cancels the limitation on the number of packets to be generated (S 109 ). Thereafter, the packet generation process proceeds to S 111 . 
         [0076]    The DMA managing unit  331  determines whether the number of packets being generated is less than the N packets (S 110 ). When it is determined that the number of packets being generated is the N packets (“NO” at S 110 ), the processing performed by the DMA managing unit  331  proceeds to S 113 . 
         [0077]    In contrast, when it is determined that the number of packets being generated is less than the N packets (“YES” at S 110 ), the DMA managing unit  331  transmits an address and a data length of the data to be contained in the subsequent packet to the DMA processing unit  131  (S 111 ). 
         [0078]    Next, the DMA managing unit  331  transmits, to the packet transmission unit  134 , a transmission instruction to transmit the subsequent packet (S 112 ). Further, the DMA managing unit  331  notifies the generation number control unit  332  of the output of the transmission instruction. 
         [0079]    The DMA managing unit  331  determines whether transmission instructions for all the packets are transmitted to the packet transmission unit  134  (S 113 ). When it is determined that a packet for which a transmission instruction is not made remains (“NO” at S 113 ), the packet generation process goes back to S 106 . In contrast, when it is determined that transmission instructions for all the packets are transmitted (“YES” at S 113 ), the DMA managing unit  331  ends the packet generation process. 
         [0080]    Next, descriptions will be made on a flow of a packet transmission process by the packet transmission unit  134  with reference to  FIG. 6 .  FIG. 6  is a flowchart of a packet transmission process. 
         [0081]    The packet transmission unit  134  receives, from the DMA managing unit  331 , a transmission instruction to transmit a packet (S 201 ). 
         [0082]    The packet transmission unit  134  transmits a packet transmission request to a destination port of the switch  20  (S 202 ). 
         [0083]    The packet transmission unit  134  receives a transmission permission from the switch  20  as a reply to the packet transmission request (S 203 ). 
         [0084]    The packet transmission unit  134  notifies the generation number control unit  332  of the reception of the transmission permission (S 204 ). 
         [0085]    The packet transmission unit  134  determines whether generation of a packet corresponding to the received transmission permission is completed (S 205 ). When it is determined that generation of the packet is not completed (“NO” at S 205 ), the packet transmission unit  134  cancels the transmission instruction corresponding to the received transmission permission (S 206 ). Further, the packet transmission unit  134  transmits a transmission cancellation to the generation number control unit  332 . Thereafter, the process performed by the packet transmission unit  134  goes back to S 202 . 
         [0086]    In contrast, when it is determined that generation of the packet is completed (“YES” at S 205 ), the packet transmission unit  134  transmits the packet corresponding to the received transmission permission to a destination port of the switch  20  (S 207 ). 
         [0087]    As described above, the network interface according to the first embodiment and the information processing apparatus equipped with the network interface limit the number of packets to be generated in a case where it takes a time until the packet transmission to the switch is started. That is, the number of packets to be generated is limited in a case where clogging occurs in the destination port. Accordingly, the performance deterioration due to the clogging of the destination port may be reduced. 
       Second Embodiment 
       [0088]      FIG. 7  is a diagram illustrating an information processing apparatus according to a second embodiment. The network interface  13  according to the second embodiment is different from the first embodiment in that the network interface  13  determines the state of a network on the basis of a buffer use rate and a packet transmission time of the switch  20 . In the following, descriptions on a similar function of each unit as that of the first embodiment will be omitted. 
         [0089]    The generation number control unit  332  receives, from a switch  20  to which a packet corresponding to a transmission instruction is to be transmitted, a packet transmission time and a buffer use rate of the buffer  201  (see  FIG. 1 ) of a destination port of the switch  20 . Here, the packet transmission time is a period of time between a timing at which the packet is transmitted to the destination port and a timing at which the packet is transmitted from the destination port. The buffer use rate and the packet transmission time of the destination port of the switch  20  correspond to an example of a “state of a network”. 
         [0090]    The generation number control unit  332  determines whether the buffer use rate of the buffer  201  of the destination port is 100%. When it is determined that the buffer use rate of the buffer  201  of the destination port is not 100%, the generation number control unit  332  determines that the number of packets to be generated is not to be limited. If the number of packets to be generated is limited, the generation number control unit  332  notifies the DMA managing unit  331  of cancellation of the limitation. 
         [0091]    In contrast, when it is determined that the use rate of the buffer  201  of the destination port is 100%, the generation number control unit  332  determines whether the packet transmission time is equal to or greater than the predetermined packet generation time. When it is determined that the packet transmission time is equal to or greater than the predetermined packet generation time, the generation number control unit  332  notifies the DMA managing unit  331  of the fact that the number of packets to be generated is to be limited. In contrast, when it is determined that the packet transmission time is less than the predetermined packet generation time, the generation number control unit  332  determines that the number of packets to be generated is not to be limited. If the number of packets to be generated is limited, the generation number control unit  332  notifies the DMA managing unit  331  of cancellation of the limitation. 
         [0092]    The switch  20  monitors the use rate of the buffer  201  of each of its own ports and the packet transmission time thereof. When the packet transmission request is received from the packet transmission unit  134 , the switch  20  acquires the use rate of the buffer  201  and the packet transmission time of the destination port to which a packet to be transmitted. The switch  20  transmits the use rate and the packet transmission time of the buffer  201  of the destination port to the generation number control unit  332 . 
         [0093]    Next, descriptions will be made on a control flow of packet generation by the network interface  13  according to the present embodiment with reference to  FIG. 8 .  FIG. 8  is a flowchart of a control of packet generation by a network interface according to the second embodiment. 
         [0094]    The DMA managing unit  331  receives a message transmission request from the processor  11  (S 301 ). The DMA managing unit  331  calculates top addresses and data lengths of data to be stored in the leading packet and each of the subsequent packets succeeding to the leading packet in order to divide the data designated by the message transmission request into small-sized data that may be stored in each packet. 
         [0095]    Next, the DMA managing unit  331  transmits the top address and data length of the data to be contained in the leading packet to the DMA processing unit  131  (S 302 ). 
         [0096]    The DMA managing unit  331  determines whether the generation of the leading packet is completed by a notification sent from the DMA processing unit  131  (S 303 ). When it is determined that the generation of the leading packet is not completed (“NO” at S 303 ), the DMA managing unit  331  waits until the generation of the leading packet is completed. 
         [0097]    In contrast, when it is determined that the generation of the leading packet is completed (“YES” at S 303 ), the DMA managing unit  331  transmits a transmission instruction to transmit the leading packet to the packet transmission unit  134  (S 304 ). 
         [0098]    The generation number control unit  332  receives, from the switch  20  to which a packet corresponding to the transmission instruction is transmitted, the use rate of the buffer  201  of the destination port of the switch  20  and the packet transmission time thereof (S 305 ). 
         [0099]    The generation number control unit  332  determines whether the use rate of the buffer  201  is 100% and the packet transmission time of the destination port is equal to or greater than the predetermined packet generation time (S 306 ). When it is determined that the use rate of the buffer  201  is 100% and the packet transmission time of the destination port is equal to or greater than the predetermined packet generation time (“YES” at S 306 ), the generation number control unit  332  notifies the DMA managing unit  331  of the fact that the number of packets to be generated is to be limited to N packets. The DMA managing unit  331  receives the notification and limits the number of packets to be generated to the N packets (S 307 ). 
         [0100]    In contrast, when it is determined that the use rate of the buffer  201  of the destination port is less than 100% or the packet transmission time of the destination port is less than the predetermined packet generation time (“NO” at S 306 ), the generation number control unit  332  determines whether a transmission cancellation is received from the packet transmission unit  134  (S 308 ). When it is determined that the transmission cancellation is not received (“NO” at S 308 ), the packet generation process proceeds to S 310 . 
         [0101]    In contrast, when it is determined that the transmission cancellation is received (“YES” at S 308 ), the generation number control unit  332  notifies the DMA managing unit  331  of the cancellation of the limitation. The DMA managing unit  331  receives the notification and cancels the limitation on the number of packets to be generated (S 309 ). Thereafter, the packet generation process proceeds to S 311 . 
         [0102]    The DMA managing unit  331  determines whether the number of packets being generated is less than the N packets (S 310 ). When it is determined that the number of packets being generated is the N packets (“NO” at S 310 ), the processing performed by the DMA managing unit  331  proceeds to S 313 . 
         [0103]    In contrast, when it is determined that the number of packets being generated is less than the N packets (“YES” at S 310 ), the DMA managing unit  331  transmits an address and a data length of the data to be contained in the subsequent packet to the DMA processing unit  131  (S 311 ). 
         [0104]    Next, the DMA managing unit  331  transmits, to the packet transmission unit  134 , a transmission instruction to transmit the subsequent packet (S 312 ). Further, the DMA managing unit  331  notifies the generation number control unit  332  of the output of the transmission instruction. 
         [0105]    The DMA managing unit  331  determines whether transmission instructions for all the packets are transmitted to the packet transmission unit  134  (S 313 ). When it is determined that a packet for which a transmission instruction is not made remains (“NO” at S 313 ), the packet generation process goes back to S 306 . In contrast, when it is determined that the transmission instructions for all the packets are transmitted (“YES” at S 313 ), the DMA managing unit  331  ends the packet generation process. 
         [0106]    As described above, the network interface according to the second embodiment determines the state of the network and decides whether to limit the number of packets to be generated on the basis of the buffer use rate and the packet transmission time. It is possible to determine whether to limit the number of packets to be generated using any information which is capable of determining the state of the network connecting the network interface which transmits the packet with a transmission destination. Accordingly, a method of determining whether to limit the number of packets to be generated may be changed depending on available information and a flexible operation suitable for a system may be performed. 
         [0107]    Next, descriptions will be made on a hardware configuration of the network interface according to each embodiment with reference to  FIG. 9 .  FIG. 9  is a diagram illustrating an exemplary hardware configuration of the information processing apparatus. 
         [0108]    As illustrated in  FIG. 9 , the network interface  13  includes a processor  91 , a DMA controller  92 , and a transmission buffer  93 . 
         [0109]    The processor  91  is connected with the DMA controller  92  and the transmission buffer  93  through a bus. The bus connecting the processor  91 , the DMA controller  92 , and the transmission buffer  93  is connected with a bus connecting the main processor  11  and the memory  90  of the node  10 . Further, the bus connecting the processor  91 , the DMA controller  92 , and the transmission buffer  93  is connected to the port  14 . 
         [0110]    The memory  90  implements the function of, for example, the main storage unit  12  illustrated in  FIG. 2 . 
         [0111]    The processor  91  implements the function of the control unit  133  including the DMA managing unit  331  and the generation number control unit  332 , and the function of the packet transmission unit  134  illustrated in  FIG. 2 . 
         [0112]    The transmission buffer  93  implements the function of the packet storage unit  132  illustrated in  FIG. 2 . The DMA controller  92  implements the function of the DMA processing unit  131  illustrated in  FIG. 2 . 
         [0113]    All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to an illustrating of the superiority and inferiority of the invention. Although the embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.