Abstract:
In one aspect of the invention, a carrier frequency offset (CFO) estimation method to estimate a CFO value of a received signal is provided, and the method comprises: receiving a preamble signal which includes several non-perfect repeat segments; applying an interpolation procedure to interpolate the perfect repeat point of one segment compared with the next segment or the previous segment; acquiring a delay correlation value based on the two perfect repeat signal segments and estimating the CFO value based on the delay correlation value.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a wireless system, and more particularly to a carrier frequency offset estimation method and system. 
         [0003]    2. Description of the Related Art 
         [0004]    Conventionally, a carrier frequency offset value is usually calculated by the delay correlation value in time axis, and a basic requirement of the carrier frequency offset estimation method is that the preamble signal comprises at least two identical signals, wherein the two identical signals may be composed of two or more OFDM (Orthogonal Frequency Division Multiplexing) symbols, or two or more identical signals in one OFDM symbol. According to the identical feature, a delay correlation value generated by the two identical signals can be used to estimate the carrier frequency offset value. The basic idea can be interpreted by the following equations. 
         [0000]    
       
         
           
             
               
                 
                   z 
                   = 
                   
                     
                       ∑ 
                       
                         n 
                         = 
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         [0005]    z is a delay correlation function to show the sum of the product of data value at two corresponding position in the received signal; 
         [0006]    r n  is the data value at n th  point of the received signal; 
         [0007]    r n+D  is the data value at (n+D) th  point of the received signal; 
         [0008]    s n  is the data value at n th  point of the transmitted signal; 
         [0009]    s n+D  is the data value at (n+D) th  point of the transmitted signal; 
         [0010]    f Δ  is the carrier frequency offset; 
         [0011]    T s  is sampling period; 
         [0012]    D is the delay length, wherein the data value at n th  point of the received signal is the same as the data value at (n+D) th  point of the received signal when no noise and frequency offset occur; and 
         [0013]    * means to calculate the corresponding complex conjugate. 
         [0014]    According to the delay correlation function, it can be found that the carrier frequency offset is determined based on the phase of the function, and the carrier frequency offset can be acquired after the phase of the function is normalized. The carrier frequency offset can be shown as the following: 
         [0000]    
       
         
           
             
               
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         [0015]    In the standard of IEEE 802.16e, the preamble symbol has three repeat segments in time domain and the delay correlation technique can be applied to the carrier frequency offset estimation. However, after sampling, the three repeat signals may not have the repeat feature. In other words, a phase offset is generated and this causes an undesired phase term, wherein the undesired phase term is different according to the preamble signals in different sectors. Please refer to  FIGS. 1   a  and  1   b .  FIG. 1   a  and  FIG. 1   b  are schematic diagrams of data values determined by sampling the three repeat signals with different sampling rates in the discrete time domain. In  FIG. 1   a , we find that the data values at the corresponding positions in the three repeat signals are the same and this is because the three repeat signals are sampled by 9 points. However, in the  FIG. 1   b , the data values at the corresponding positions in the three repeat signals are different and this is because the three repeat signals are sampled by 10 points. In the IEEE 802.16e standard, the preamble signal has three-repeat feature. But in the receiver design, if the sampling rate is not the threefold system bandwidth or multiple of 3, say, twofold or fourfold. In such cases, it will cause the same phenomenon shown in  FIG. 1   b  and the undesired phase term is generated during the delay correlation computing procedure. The described phenomenon can also be observed by mathematical operations. Please refer to the following equations. 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
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         [0016]    The equation Eq. 1 shows the delay correlation of the signal with repeat feature. The equation Eq. 2 shows the delay correlation of the signal with non-perfect repeat feature. According to the equation Eq. 2, an undesired phase term Θ n  is generated, and after eliminating the undesired phase term, Θ n , the accurate carrier frequency offset is then calculated. 
       BRIEF SUMMARY OF THE INVENTION 
       [0017]    One exemplary of an embodiment of the invention is to use an interpolation filter to receive a sampled signal with unideal repeat features to generate repeat signals and another objective is to use the carrier frequency offset estimation method based on the delay signal correlation to estimate the carrier frequency offset value. 
         [0018]    In one exemplary of the invention, a carrier frequency offset (CFO) estimation method to estimate a CFO value of a received signal is provided, and the method comprises: receiving a preamble signal including a first repeat signal segment and a second repeat signal segment; applying an interpolation procedure on the first or the second unideal repeat signal to generate a perfect repeat signal with the second or the first signal; and acquiring a delay correlation value based on the first signal and the second repeat signal and estimating the CFO value based on the delay correlation value. 
         [0019]    In another exemplary of the invention, a carrier frequency offset (CFO) estimation system to estimate a CFO value of a received signal is provided, and the system comprises a conjugate signal generator comprising an interpolation filter and a computing unit, a first multiplier, and a carrier frequency offset estimator. The conjugate signal generator receives the first repeat signal to generate a first conjugate signal corresponding to the second repeat signal by the interpolation filter and the computing unit. The first multiplier calculates a first product of the second repeat signal and the first conjugate signal. The carrier frequency offset estimator estimates the carrier frequency offset value based on the first product. 
         [0020]    A detailed description is given in the following embodiments with reference to the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0021]    The present invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
           [0022]      FIG. 1   a  and  FIG. 1   b  are schematic diagrams of data values determined by sampling the three repeat signals with different sampling rates in the discrete time domain. 
           [0023]      FIG. 2  is a block diagram of an embodiment of a carrier frequency offset estimation system according to the invention. 
           [0024]      FIG. 3  is a block diagram of another carrier frequency offset estimation system capable of reducing the unideal phase term during the carrier frequency offset estimation procedure. 
           [0025]      FIG. 4  is a block diagram of another embodiment of the carrier frequency estimation system according to the invention. 
           [0026]      FIG. 5  is a schematic diagram of the output data value of the interpolation filter  48  in  FIG. 4  after inputting an input data r(n) into the interpolation filter  48 . 
           [0027]      FIG. 6  is a block diagram of another embodiment of the carrier frequency estimation system according to the invention. 
           [0028]      FIG. 7  is a schematic diagram of the output data value of the interpolation filter  68  in  FIG. 6  after inputting an input data r(n) into the interpolation filter  68 . 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0029]    The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims. 
         [0030]      FIG. 2  is a block diagram of an embodiment of a carrier frequency offset estimation system capable of reducing the unideal phase term during the carrier frequency offset estimation process. The delay unit  21  receives and delays the input signal r(n) for D sample points, wherein D is the length of the repeat signal in the input signal. In other words, the delay unit  21  is a memory device, such as a shift register or memory. The delay unit  21  receives and stores the data from r(n) to r(n+D−1), and when the delay unit  21  receives the data of r(n+D), the delay unit  21  transmits the data of r(n). The computing unit  22  receives the input signal r(n) directly and calculates the corresponding complex conjugate. The multiplier  24  multiplies the signal r(n+D) with the output signal from the computing unit  22  r(n) to acquire signal x(n). If r n  represents the data value of the n th  sample point of the signal r(n) and r n+D  represents the data value of the (n+D) th  sample point of the signal r(n+D), the data value of the n th  sample point of the signal x(n), x n , can be expressed as follows: 
         [0000]      x n =r n r* n+D    
         [0031]    An average value computing unit  23  receives a plurality of data values of signal x(n) to calculate an average value and a delay correlation value z is determined based on the average value. The carrier frequency offset estimator  25  estimates a carrier frequency offset value {circumflex over (f)} Δ  based on the delay correlation value z. In this embodiment, the carrier frequency offset estimator  25  further comprises a phase calculating unit  26 , multipliers  27  and  29  and a phase eliminating unit  28 . The phase calculating unit  26  receives the delay correlation value z to calculate a phase angle ∠z. In an embodiment of IEEE 802.16e standard, the unideal phases generated by the preamble signal of the three sectors are approximately 0, +/−2π/3. Thus, the unideal phase can be roughly eliminated by multiplying the phase angle by 3. Based on the described phenomenon, the multiplier  27  multiplies the phase angle by 3 and the phase eliminating unit  28  removes +/−2π to eliminate the unideal phase offset. The multiplier  29  multiplies the phase angle ∠z with a compensation value 
         [0000]    
       
         
           
             - 
             
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                 6 
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                 π 
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         [0000]    to acquire the carrier offset value {circumflex over (f)} Δ , wherein D is the length of the repeat signal in the input signal and T s  is sampling period of the input signal. The delay correlation value can be calculated by the following equations. 
         [0000]    
       
         
           
             
               
                 
                   z 
                   = 
                   
                     
                       ∑ 
                       
                         n 
                         = 
                         0 
                       
                       
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                         - 
                         1 
                       
                     
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                         n 
                       
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                           + 
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                       · 
                       
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         [0032]    In the IEEE 802.16e standard, the Φ of the preamble signal in different sectors, are approximately 0°, 120° and −120° (or 0, 2π/3, −2π/3 in radian unit), respectively. Thus, the phase angle of the delay correlation value z can be expressed as the following three equation: 
         [0000]      ∠z 1 =−2πf Δ DT s    
         [0000]      ∠z 2 =−2πf Δ DT s +2π/3 
         [0000]      ∠z 3 =−2πf Δ DT s −2π/3 
         [0033]    The three equations are multiplied by 3 and added to eliminate the term of +/−360°. Similarly, the computing unit  22  can be coupled between the input signal r(n) and the delay unit  21  or between the delay unit  21  and the multiplier  29 , wherein the compensation value is changed to 
         [0000]    
       
         
           
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         [0000]    in case of the arrangement. 
         [0034]      FIG. 3  is a block diagram of another carrier frequency offset estimation system capable of reducing the unideal phase term during the carrier frequency offset estimation procedure. The CFO estimation system of  FIG. 3  considers three repeat signals of the preamble to calculate not only the first delay correlation value of the first repeat signal and the second repeat signal, but also a second delay correlation value of the first repeat signal and the third repeat signal. The related equations are shown as follows: 
         [0000]    
       
         
           
             
               
                 
                   
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         [0035]    z 12  represents the first delay correlation value and z 13  represents the second delay correlation value. In the described equation, Φ and Θ respectively represents the phase offset caused by the non-perfect repeat feature of the three repeat signals (|s n |≠s n+D |≠s n+2D |). According to the experimental result, the two phase offsets Φ and Θ have almost reverse property, in other words, Φ=−Θ. Therefore, we can add the two phase of the two delay correlation values to eliminate non-ideal phase offset and acquire the carrier frequency offset. The related equation is shown as follows: 
         [0000]    
       
         
           
             
               
                 
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                   = 
                   
                     
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                       12 
                     
                     × 
                     
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                       13 
                     
                   
                 
               
             
             
               
                 
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                       1 
                     
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                       2 
                     
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                           ( 
                           
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                             + 
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         [0036]    Then, the carrier frequency offset can be determined by the following equation: 
         [0000]    
       
         
           
             
               
                 f 
                 ^ 
               
               Δ 
             
             = 
             
               
                 - 
                 
                   1 
                   
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         [0037]    The first delay unit  31  receives the input signal r(n) and delays D sample points, wherein D is the length of the repeat signal in the input signal. In other words, the first delay unit  31  delays the first repeat signal of the three repeat signals. The first computing unit  33   a  receives the input signal and executes a first complex conjugate operation corresponding to the first repeat signal. The multiplier  39   a  multiples the signal r*(n+D) with the output signal r(n) from the first delay unit  31  to generate signal x 12 (n). The first average value computing unit  35   a  is an accumulator, which receives the data values of the signal x 12 (n) and accumulate for N values then generates a first delay correlation value z 12  based on the first average value. The first phase computing unit  37   a  receives the delay correlation value z 12  and generates corresponding phase angle ∠z 12 . 
         [0038]    The second delay unit  32  receives the input signal r(n) and delays 2D sample points, wherein D is the length of the repeat signal in the input signal. In other words, the second delay unit  32  delays the first repeat signal and the second repeat signal of the three repeat signals. The second computing unit  33   b  receives the input signal and executes a second complex conjugate operation corresponding to the second repeat signal. The multiplier  39   b  multiples the signal r*(n+2D) with the output signal r(n) from the second delay unit  32  to generate signal x 13 (n). The second average value computing unit  35   b  receives the data values of the signal x 13 (n) to calculate a second average value and generates a second delay correlation value z 13  based on the second average value. The second phase computing unit  37   b  receives the delay correlation value z 13  and generates corresponding phase angle ∠z 13 . The adder  38  adds the phase angle φz 12  and the phase angle ∠z 13  to get a phase angle ∠z. 
         [0039]    In another embodiment of the invention, a multiplier may be adapted to multiply the first delay correlation value by the second delay correlation value, and then the product of the first delay correlation value and the second delay correlation value is fed to a phase computing unit, such as the first phase computing unit  37   a  or the second phase computing unit  37   b , to estimate the phase angle ∠z. The multiplier  39   c  multiplies the phase angle ∠z with a compensation value 
         [0000]    
       
         
           
             - 
             
               1 
               
                 6 
                  
                 π 
                  
                 
                     
                 
                  
                 DTs 
               
             
           
         
       
     
         [0000]    to acquire the carrier offset value {circumflex over (f)} Δ . In this embodiment, the first computing  33   a  is parallel coupled with the first delay unit  31 , however, the first computing unit  33   a  can be cascaded with the first delay unit  31 . In other words, the first computing unit  33   a  can be coupled between the input signal r(n) and the first delay unit  31  or between the first delay unit  31  and the multiplier  39   a . Similarly, the second computing unit  33   b  can be coupled between the input signal r(n) and the second delay unit  32  or between the second delay unit  32  and the multiplier  39   b , wherein the compensation value is changed to 
         [0000]    
       
         
           
             1 
             
               6 
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               π 
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         [0000]    in case of the arrangement. 
         [0040]      FIG. 4  is a block diagram of another embodiment of the carrier frequency estimation system according to the invention. The delay unit  41  receives the input signal r(n) and delays D sample points, wherein D is the length of the repeat signal in the input signal. In other words, the delay unit  41  delays the first repeat signal of the three repeat signals. The interpolation filter  48  processes the first repeat signal and acquires an over-sampled signal by an interpolation procedure with three times sampling rate. 
         [0041]    For further discussion with the operation of interpolation filter  48 , please refer to  FIG. 5 .  FIG. 5  is a schematic diagram of the output data value of the interpolation filter  48  after inputting an input data r(n) into the interpolation filter  48 . Since a first signal with better repeat feature with the second repeat signal [D 5 , D 6 , D 7 ] is required, an interpolation procedure is applied to calculate the data values of each trisection point between D 1  and D 2 , D 2  and D 3 , and D 3  and D 4 , such as D 11 , D 12 , D 21  and D 22 . Then, the interpolation filter  48  selects corresponding data values based on the position of the second repeat signal [D 5 , D 6 , D 7 ] to generate the first signal. In this embodiment, the first signal is composed of the data values D 12 , D 22  and D 32 . 
         [0042]    In addition, except for the position of the interpolation filter  48  designed in the position shown of  FIG. 4 , the interpolation filter  48  can also be designed at the position between the input signal and the delay unit  41 , or in another path, such as the interpolation filter  68  shown in  FIG. 6 . Furthermore, the delay unit  41  and the computing unit  42  can be cascaded connected or in different paths, and the interpolation filter  48  can be designed at the position before or after the computing unit  42 .  FIG. 7  illustrates the operation of the interpolation filter  68  with the second repeat signal. Referring to  FIG. 7 ,  FIG. 7  is a schematic diagram of the output data value of the interpolation filter  68  after inputting an input data r(n) into the interpolation filter  68 . Since a first signal with better repeat feature with the second repeat signal [D 1 , D 2 , D 3 , D 4 ] is required, an interpolation procedure is applied to calculate the data values of each trisection point between D 4  and D 5 , D 5  and D 6 , D 6  and D 7 , and D 7  and D 8 , such as D 41 , D 42 , D 51 , D 52 , D 61  and D 62 . Then, the interpolation filter  68  selects corresponding data values based on the position of the second repeat signal [D 1 , D 2 , D 3 , D 4 ] to generate the first signal. In this embodiment, the first signal is composed of the data values D 41 , D 51 , D 61  and D 71 . 
         [0043]    The computing unit  42  receives the first signal from input r(n) to generate a first conjugate signal, wherein the first conjugate signal is composed of the complex conjugate values of corresponding data values in the first signal. The multiplier  44   a  multiplies the signal r(n+D) with the output signal of the computing unit  42  to generate the signal x(n). The average value computing unit  43  receives a plurality of data values of signal x(n) to calculate an average value and a delay correlation value z is determined based on the average value. The carrier frequency offset estimator  45  estimates a carrier frequency offset value {circumflex over (f)} Δ  based on the delay correlation value z. In this embodiment, the carrier frequency offset estimator  45  further comprises a phase calculating unit  46 , multipliers  44   b  and  44   c  and a phase eliminating unit  47 . The phase calculating unit  46  receives the delay correlation value z to calculate a phase angle ∠z. In an embodiment of IEEE 802.16e standard, the unideal phases generated by the preamble signal of the three sectors are approximately 0, +/−2π/3. Thus, the unideal phase can be roughly eliminated by multiplying the phase angle by 3. Based on the described phenomenon, the multiplier  27  multiplies the phase angle by 3 and the phase eliminating unit  28  removes +/−2π to eliminate the unideal phase offset. The multiplier  44   c  multiplies the phase angle ∠z with a compensation value 
         [0000]    
       
         
           
             - 
             
               1 
               
                 6 
                  
                 π 
                  
                 
                     
                 
                  
                 DTs 
               
             
           
         
       
     
         [0000]    to acquire the carrier offset value {circumflex over (f)} Δ , wherein D is the length of the repeat signal in the input signal and T s  is sampling period of the input signal. 
         [0044]    While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.