Abstract:
Embodiments of the invention relate generally to semiconductors for power generation and conversion applications, and more particularly, to devices, integrated circuits, substrates, and methods to convert direct current (“DC”) voltage signals to alternating current (“AC”) voltage signals. In some embodiments, a method for converting DC voltage signals to AC voltage signals can include generating a first portion of an output voltage signal using a polarity circuit, generating a second portion of the output voltage signal using another polarity circuit, wherein the output voltage signal comprises an AC signal, and synchronizing the first portion and the second portion of the output voltage signal to a frequency using an AC reference signal. In other embodiments, an inverter can include a modulator configured to convert a DC signal into a first variable signal, the modulator comprising two or more transistors, one of the two or more transistors configured to generate a portion of the first variable signal another of the two or more transistors configured to generate another portion of the first variable signal, a transformation module configured to step up the first variable signal to form a second variable signal, the transformation module being configured to generate a first portion of the second variable signal and a second portion of the second variable signal, and a waveform generator configured to synchronize the first portion and the second portion of the second variable signal with an AC reference signal to generate an AC signal.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is a continuation of U.S. Non-Provisional patent application Ser. No. 12/479,763, filed Jun. 5, 2009, and entitled “DC-TO-AC POWER INVERTER AND METHODS,” which is herein incorporated by reference for all purposes. 
     
    
     FIELD 
       [0002]    Embodiments of the invention relate generally to semiconductors for power generation and conversion applications, and, more particularly, to devices, integrated circuits, substrates, and methods to convert direct current (“DC”) voltage signals to alternating current (“AC”) voltage signals. 
       BACKGROUND 
       [0003]    Inverters are electrical devices that typically include transformers, switches, and control circuits for converting direct current (“DC”) voltages to alternating current (“AC”) voltages, with the resulting AC voltage being at a particular amplitude (e.g., 120V or 220V) and frequency (e.g., 50 to 60 Hz). Inverters are used in portable appliances, consumer electronics, backup power supplies for telecommunication and computer installations, such as uninterrupted power supplies, or UPS, or other applications that include DC sources of power. Inverters are being used increasingly in power generation and distribution systems based on solar, wind power and fuel cell technologies to convert DC voltages (i.e., variable DC voltages) to 120/220 VAC. In one approach, some traditional “modified sine wave” inverters implement modified square waves to approximate a sinusoidal AC voltage waveform. The modified sine wave inverters, however, use square-shaped waveforms that tend to produce levels of noise that may not be suitable for motors or other applications in which sinusoidal-shaped voltages might be desired. 
         [0004]      FIG. 1  depicts another approach to implementing conventional inverters with multiple levels, including a DC-to-DC conversion level and a DC-to-AC conversion level. Examples of some traditional inverters that have multiple levels include class-A/B and class-D inverters, whereby a raw power level is converted into a regulated DC voltage within a first level, and the regulated DC voltage is converted into AC voltage in a second level. Inverter  100  is a multiple-level inverter that includes a DC-to-DC Generator  102  coupled to a DC-to-AC Generator  152 . Typically, inverter  100  uses DC-to-DC Generator  102  to boost a DC voltage (e.g., 12VDC or 24VDC) applied to input terminals  104  up to 170VDC, which, in turn, is converted into 120VAC at output terminals (“AC output”)  160  by DC-to-AC Generator  152 . As shown, DC-to-DC Generator  102  includes a number of relatively large switching devices  108  to drive transformer (“T 1 ”)  110  to step up the input DC voltage. DC-to-DC Generator  102  also includes rectifying circuits  112 , a filter choke  114  and electrolytic capacitors  120 . Filter choke  114  and electrolytic capacitors  120  constitute a reconstruction filter  113  in some conventional inverters. Note that DC-DC control circuit  130  controls switching devices  108  responsive to linear feedback from transformed DC voltages between filter choke  114  and electrolytic capacitors  120 . Further to inverter  100 , DC-to-AC Generator  152  includes a DC-to-AC control circuit  154 , an H-bridge circuit  156 , and a filter  158 . 
         [0005]    While functional, inverter  100  has various drawbacks in its implementation. First, DC-to-DC Generator  102  and DC-to-AC Generator  152  each include control circuits, rectifier circuits and feedback circuits, which consume resources such as semiconductor and computational resources. Second, a current path magnetically coupled from input terminals  104  to output terminals  160  may pass through five semiconductor devices (and their junctions), such as through Q 3 , Q 2 , and Q 1  of switching devices  108  and through any two of the devices in H-bridge circuit  156 , whereby each of the semiconductor devices in the current path dissipates power due to switching and conduction losses. Third, transformer  110  and filter choke  114  may dissipate power due to, for example, core losses and conduction losses. Fourth, the current path also passes (e.g., as ripple current) into electrolytic capacitors  120  as storage capacitors. A ripple current may cause electrolytic capacitors  120  to heat up, thereby drying out the electrolyte material. In some inverters, electrolytic capacitors  120  can be the least reliable components of inverter  100  as the mean time between failures (“MTBF”) may be 5 to 7 years, which is not uncommon for an electrolytic capacitors  120 . Note that the MTBF for electrolytic capacitors  120  is typically less than the life expectancy of their intended applications (e.g., for use in solar energy generation systems). Note, too, that conduction and switching losses may be associated with rectifying circuits  112 . Fifth, transformer  110  typically has multiple windings at the side coupled to rectifying circuits  112 . Further, transformer  110  has an amount of windings necessary to step up a DC voltage (e.g., 12VDC or 24VDC) to 170VDC, as well as an amount of iron or core material to support the amount of windings, whereby the amount of windings and the amount of core material may contribute respectively to conduction losses and core losses. 
         [0006]    It is desirable to provide improved techniques, systems, integrated circuits, and methods that minimize one or more of the drawbacks associated with devices, integrated circuits, substrates, and methods for convert direct current voltage signals to alternating current voltage signals. 
     
    
     
       BRIEF DESCRIPTION OF THE FIGURES 
         [0007]    The invention and its various embodiments are more fully appreciated in connection with the following detailed description taken in conjunction with the accompanying drawings, in which: 
           [0008]      FIG. 1  depicts another approach to implementing conventional inverters with multiple levels, including a DC-to-DC conversion level and a DC-to-AC conversion level; 
           [0009]      FIG. 2  is a diagram depicting an inverter in accordance with various embodiments of the invention; 
           [0010]      FIG. 3  is a diagram depicting an inverter in accordance with at least some embodiments of the invention; 
           [0011]      FIG. 4  is depicts an inverter in accordance with at least some embodiments of the invention; 
           [0012]      FIGS. 5A and 5B  illustrate modes of operation of an inverter, according to embodiments of the invention; and 
           [0013]      FIG. 6  illustrates an example of a flow for a method of operating an inverter, according to embodiments of the invention. 
       
    
    
       [0014]    Like reference numerals refer to corresponding parts throughout the several views of the drawings. Note that most of the reference numerals include one or two left-most digits that generally identify the figure that first introduces that reference number. 
       DETAILED DESCRIPTION 
       [0015]      FIG. 2  is a diagram depicting an inverter in accordance with various embodiments of the invention. Diagram  200  depicts an inverter  220  is configured to couple via input terminals  210  to a power source  202 , and to couple further via output terminals  211   a  and  211   b  to a load  204 . Inverter  220  operates to convert a direct current (“DC”) signal, such as a DC voltage signal, at input terminals  210  to an alternating current (“AC”) signal, such as an AC voltage signal, at output terminals  211   a  and  211   b . Inverter  220  also includes a switching-mode signal generator (“ 1 ”)  230  coupled between input terminals  210  and an output terminal  211   a , a switched-mode power generator (“ 2 ”)  240  coupled between input terminals  210  and an output terminal  211   b , and an inverter controller  260 . Further, inverter  220  includes a path  254  coupling switching-mode signal generator  230  and switching-mode signal generator  240  in series with each other. Inverter  220  also includes an inverter controller  260  that is coupled to switching-mode signal generator  230  and switching-mode signal generator  240 , and is configured to control operation of each of switching-mode signal generators  230  and  240 . For example, inverter controller  260  can control switching-mode signal generators  230  and  240  in a first mode and a second mode of operation, respectively, for inverter  220 . Specifically, inverter controller  260  can cause switching-mode signal generator  230  to generate a first portion of an output voltage signal in the first mode, and can cause switching-mode signal generator  240  to generate a second portion of the output voltage signal in the second mode. In some embodiments, the first portion of an output voltage signal is portion  206  of the AC signal and the second portion is portion  208  of the AC signal. Further, inverter controller  260  can be configured to operate switching-mode signal generator  240  as a short-circuit path portion  242  in the first mode, and to operate switching-mode signal generator  230  as a short-circuit path portion  232  in the second mode. Therefore, inverter controller  260  can configure switching-mode signal generator  230  to convey a current  252  (e.g., a load current) to switching-mode signal generator  240  in the first mode, and can configure switching-mode signal generator  240  to convey a current  250  to switching-mode signal generator  230  in the second mode. 
         [0016]    In view of the foregoing, inverter  220  can separate the generation of the portions of the AC signal converted from a DC signal. Accordingly, switching devices (not shown) in switching-mode signal generators  230  and  240  can be subject to less than the peak-to-peak voltage (“Vp-p”) of the AC signal (e.g., one-half of Vp-p). For example, if the root-mean-square (“RMS”) voltage of the AC signal is 120 VAC, then the switching devices operate with voltage differences of, for example, about one-half. In some embodiments, the size and/or requirements of the switching devices (e.g., transistors, such as MOSFET transistors) can be different than otherwise might be the case when peak-to-peak voltages are applied to the switching devices. For example, the switching devices or MOSFET transistors can have reduced sizes, which, in turn, can reduce capacitances associated with relatively larger sizes. As another example, MOSFET transistors in switching-mode signal generators  230  and  240  can be configured to operate with less current (e.g., amounts of current that are approximately one-half that associated with the magnitude of the peak-to-peak voltage). Thus, the MOSFET transistors in switching-mode signal generators  230  and  240  can be designed to consume less power than otherwise might be the case. Further, the reliability components of switching-mode signal generators  230  and  240  can be enhanced by reducing the currents, according to at least some embodiments. In specific embodiments, inverter  220  can be configured to operate without storing DC voltage, and/or can omit implementation of reconstruction filters and/or electrolytic capacitors, which can enhance reliability than otherwise might be the case. As switching-mode signal generators  230  and  240  can be configured to operate differently in different modes, each can operate as a closed switch in alternating modes to produce different portions of the sine wave. Therefore, switching-mode signal generators  230  and  240  can serve as a return path for load current in the different modes of operation. As used herein, the term “switching-mode signal generator” can refer, at least in some embodiments, to a circuit or firmware, or a combination thereof, that is configured to generate amounts of voltage or current as a power supply, with switching devices being configured to switch between states (e.g., between on and off) at rates higher than the frequency of the AC voltage signal generated at output terminals  211   a  and  211   b.    
         [0017]      FIG. 3  is a diagram depicting an inverter in accordance with at least some embodiments of the invention. Diagram  300  depicts an inverter  301  including a modulator  304 , a transformation module  310 , a waveform generator  320 , and an inverter controller  360 . Inverter  301  is coupled between a source  302 , which can be a DC power source, and one or more output terminals  330  to provide an alternating current (“AC”) signal AC signal  332 . Modulator  304  can be modulator configured to convert a direct current (“DC”) signal into a variable signal. As used herein, the term “variable signal” can refer, at least in some embodiments, to signal that varies with respect to a reference potential. A variable signal can be a DC signal that varies its magnitude, for example, above (e.g., positive DC values) or below (e.g., negative DC values) a reference potential, such a ground. One example of such a variable signal is a pulse width modulated signal (e.g., a pulsing DC waveform), such as waveform  303 . According to some embodiments, the term “variable signal” also can be referred to as an AC signal that varies its magnitude, for example, about a reference potential, such zero VAC, or other reference potentials. The term “variable signal” also can be used interchangeably with “voltage signal,” according to some embodiments. Transformation module  310  can be configured to step up the first variable signal to form a second variable signal. An example of a second variable signal is depicted as waveform  305 . Transformation module  310  also is configured to generate a first portion of the second variable signal and a second portion of the second variable signal. Waveform generator  320  can be configured to synchronize the first portion and the second portion of the second variable signal at a frequency (e.g., at 60 Hz) to generate AC signal  332 . 
         [0018]    Inverter  301  can include a polarity circuit  370  configured to generate a portion  324   a  of the alternating current signal  332  (e.g., at a first output terminal with a second output terminal being associated with a reference potential), and a polarity circuit  380  configured to generate another portion  324   b  of the alternating current signal  332  (e.g., at a second output terminal with a first output terminal being associated with the reference potential). Note that in some instances, the term “polarity circuit” can be used interchangeably with “inverter portion circuit.” In some embodiments, polarity circuits  370  and  380  each can include multiple portions of modulator  304 , transformation module  310 , and waveform generator  320 , each of which can operate to form either portions  324   a  or  324   b.    
         [0019]    Modulator  304 , for example, can include power modulator  306   a  and power modulator  306   b , any of which can be configured to operate as any circuit that can convert a fixed (or substantially fixed) DC signal into a variable signal. Examples of such a circuit include a DC chopper circuit (or equivalent) that can form the variable signal, such as a variable DC signal. Inverter controller  360  can be configured to generate control signals that can be applied via path  352  to modulator  304  to generate pulsing voltage levels, whereby inverter controller  360  can be configured to modulate the pulsing voltage levels responsive to a sine wave signal  351 . In some embodiments, the first variable voltage signal can have a magnitude (e.g., a voltage difference between peaks) substantially equivalent to that of fixed input voltage signal. Inverter controller  360  can be configured to transmit a first signal or set of signals via path  352  to modulator  304  to vary the direct current signal to form the first variable signal (e.g., modulating the DC signal to form the first variable signal at a rate of change or frequency). 
         [0020]    Transformation module  310  can include transformers  312   a  and  312   b , whereby one of transformers  312   a  and  312   b  operates for an interval of time and the other is disabled simultaneous (or substantially simultaneous) to the operation of the first. Thus, current flows through one or the other during the interval of time. In some embodiments, transformers  312   a  and  312   b  can be configured to step up the variable signal by a smaller amount than otherwise might be the case. Therefore, transformers  312   a  and  312   b  can include less core material than otherwise might be the case. In some embodiments, a reduction in core material can facilitate a reduction in copper losses. Further, transformers  312   a  and  312   b  can be sized smaller than transformers configured to step up the variable signal by larger amounts. With a smaller relative size, transformers  312   a  and  312   b  can have a reduced mean length per turn (“MLT”), which, in turn, can reduce resistive losses, according to some embodiments. 
         [0021]    Waveform generator  320  can include phase synchronous demodulator  322   a  and phase synchronous demodulator  322   b , whereby one of phase synchronous demodulators  322   a  and  322   b  operates for an interval of time and the other operates as a short-circuit or return path for a load current. In some embodiments, any of synchronous demodulators  322   a  and  322   b  can be configured do detect a frequency of an AC reference signal (e.g., 60 Hz) and can synchronize portions of a second variable signal from transformation module  310  with the AC reference signal. In some instances, the phases of portions of a second variable signal can be aligned with the phases of the AC reference signal. Thus, synchronous demodulators  322   a  and  322   b  can produce portions  324   a  and  324   b , respectively, to form the alternating current signal  332  synchronized with a frequency. In some embodiments, inverter controller  360  can receive the AC reference signal (e.g., 60 Hz) and can transmit a second signal or set of signals via path  354  to waveform generator to synchronize portions of the alternating current signal to form AC signal  332 . 
         [0022]      FIG. 4  is depicts an inverter in accordance with at least some embodiments of the invention. Inverter  400  includes switching devices and transformers coupled to an inverter controller  450 . As shown, inverter  400  includes DC input terminals  402  to which a DC source  406  can be coupled, and includes output terminals  404  to provide an AC voltage signal. In some embodiments, devices  412  and  414  constitute a modulator, transformers  422  and  424  constitute a transformation module, devices  432  and  434  constitute a portion of a waveform generator, and devices  436  and  438  constitute another portion of the waveform generator. In some embodiments, inverter  400  can include a first polarity circuit and a second polarity circuit. The first polarity circuit can include a device (“Q 1 ”)  412 , a transformer (“T 1 ”)  422 , and devices (“Q 3 ”)  432  and (“Q 4 ”)  434 , and the second polarity circuit including a device (“Q 2 ”)  414 , a transformer (“T 2 ”)  424 , and devices (“Q 5 ”)  436  and (“Q 6 ”)  438 . A path that couples the first polarity circuit and the second polarity circuit in series can extend from node  419   a  to node  419   b.    
         [0023]    The first polarity circuit can be structured as follows. Device  412  can be a MOSFET device (e.g., an n-channel power CMOS transistor) having a source terminal  411   b  configured to receive a direct current signal, a gate terminal  411   a , and a drain terminal  411   c . Transformer  422  can include a first winding between a winding terminal  421   a  and a winding terminal  421   b , and a second winding between a winding terminal  421   c  and a winding terminal  421   d . As shown, winding terminal  421   a  is coupled to drain terminal  411   c  of device  412 , and winding terminal  421   b  is coupled to ground potential reference node  417  associated with DC source  406 . A portion of the waveform generator can include devices  432  and  434 . Device  432  can be a MOSFET having a gate terminal  431   a , a drain terminal  431   c  coupled to winding terminal  421   c , and a source terminal  431   b  coupled via node  419   a  to a reference potential at terminal  449  (and along the path from node  419   a  to node  419   b ). Device  434  can be a MOSFET having a gate terminal  433   a , a drain terminal  433   c  coupled to winding terminal  421   d , and a source terminal  433   b  coupled to the reference potential associated with terminal  449 . Further, drain terminal  433   c  can serve as an output terminal  490 , according to some embodiments. Inverter controller  450  is coupled to gate terminal  411   a  to transmit via terminal  481  to a control signal (e.g., a pulse width modulated signal) configured to generate a first variable signal. Further, inverter controller  450  can be coupled via terminal  483  to gate terminal  431   a  and via terminal  485  to gate terminal  433   a  to transmit one or more control signals to synchronize the alternating current signal at a frequency. The second first polarity circuit can be structured similarly. The above-described devices and transformers can be modified or supplemented with other components in other embodiments. For example, while  FIG. 4  depicts the use of NMOS device, note that PMOS devices or any other MOS device or semiconductor technology can used to form the switching devices in an inverter. In alternate embodiments, device  412  can be disposed in between a node  417  associated with the ground potential reference and winding terminal  421   b  rather than as shown in  FIG. 4 . In one embodiment, one of devices  432  and  434  can be omitted and substituted with a short-circuited path portion. Inverter  400  and it elements shown in  FIG. 4  are merely illustrative of one of a number of structures that can be used to implement the functionality of converting DC into AC, according to various embodiments. 
         [0024]    In some embodiments, inverter  400  can also include a low pass filter including inductor (“L 1 ”)  442  and a capacitor (“C 1 ”)  446 , and another low pass filter including inductor (“L 2 ”)  444  and a capacitor (“C 2 ”)  448 . Further, the low pass filter including inductor  442  and capacitor  446  can be coupled between output terminal  490  and terminal  449 , and the low pass filter including inductor  444  and capacitor  448  can be coupled between output terminal  492  and terminal  449 . Inverter controller  450  can be configured to couple alternately output terminal  490  and output terminal  492  via the first low pass filter and the second low pass filter, respectively, to output terminals  494  and  496 , which correspond to output terminals  404 . In some embodiments, inverter controller  450  can be configured to operate in the first mode to couple the output terminal  494  via the first low pass filter to a switching-mode signal generator composed of the first polarity circuit (as described above), and to couple output terminal  496  via the second low pass filter to a reference potential at terminal  449 . Further, inverter controller  450  can be configured to operate in the second mode to couple output terminal  496  via the second low pass filter to another switching-mode signal generator composed of the second polarity circuit (as described above), and to couple output terminal  494  via the first low pass filter to the reference potential at terminal  449 . 
         [0025]    Inverter controller  450  includes a synchronous demodulator controller  452  and a modulator controller  454 . In a first mode of operation, modulator controller  454  is configured to transmit a control signal to gate terminal  411   a  to modulate the DC signal from input terminals  402 , and is further configured to transmit another control signal to a gate terminal  471   a  of device  414  to place device  414  in an open-circuit condition, thereby preventing current flow to disable transformer  424 . Further to the first mode of operation, synchronous demodulator controller  452  can be configured to transmit a subset of signals to gate terminals  431   a  and  433   a  to operate devices  432  and  434  to perform synchronous demodulation (e.g., phase matching to synchronize with a frequency, such as 60 Hz), and can be further configured to transmit another subset of control signals to gate terminals  473   a  and  475   a  of respective devices  436  and  438  so that devices  436  and  438  operate as short-circuit path portions. In a second mode of operation, modulator controller  454  is configured to transmit a control signal to gate terminal  471   a  of device  414  to modulate the DC signal from input terminals  402 , and is further configured to transmit another control signal to gate terminal  411   a  to place device  412  in an open-circuit condition, thereby preventing current flow to disable transformer  422 . Further to the second mode of operation, synchronous demodulator controller  452  can be configured to transmit a subset of signals to gate terminals  473   a  and  475   a  of respective devices  436  and  438  so that devices  436  and  438  operate to perform synchronous demodulation. Synchronous demodulator controller  452  can be further configured to transmit another subset of control signals to gate terminals  431   a  and  433   a  to operate devices  432  and  434  as short-circuit path portions. 
         [0026]      FIGS. 5A and 5B  illustrate modes of operation of an inverter, according to embodiments of the invention. In  FIG. 5A , inverter  500  operates in a first mode of operation under the control of inverter controller  550 . In the first mode, device  512  is configured to modulate a DC voltage to generate variable voltage and current  510 , which is applied to transformer  522 . A transformed voltage and current  511  is generated to pass through at least device  532 , when devices  532  and  534  operate to generate a waveform portion synchronized to a reference AC signal frequency. In some instances, device  532  and device  534  can cooperate to generate an AC current for wave portion  513  that passes through inductor  542  and node  494 , thereafter returning to inverter  500  via node  496  so that the current  549  flows down a path between node  419   b  to node  419   a . In one embodiment, device  532  in the first mode can be predominantly in an on condition, with device  534  operating to predominantly demodulate the current to synchronize with a reference AC signal. Inverter controller  550  can control the operation of current  551  by switching device  534  between on and off conditions at rates determined by inverter controller  550 . Further, inverter controller  550  can cause device  514  to operate as an open-circuit and devices  536  and  538  to operate as close-circuit path portions, thereby disabling transformer  524 . In this configuration, output terminal  496  is associated with a reference potential, and output terminal  494  is associated with a waveform portion  513 , which includes positive values with respect to the reference potential. In  FIG. 5B , inverter  500  operates in a second mode of operation under the control of inverter controller  550 . In the second mode, device  514  is configured to modulate a DC voltage to generate variable voltage and current  590 , which is applied to transformer  524 . A transformed voltage and current  591  is generated to pass through devices  536  and  538 , which are configured to synchronize waveform portion to a reference AC signal frequency. In some instances, device  536  and device  538  can cooperate to generate an AC current for wave portion  593 , whereby current  591  passes through device  538  and flows down a path as current  559  between node  419   b  to node  419   a  and out of inverter ( 501  via node  494 . The current returns via node  496  through inductor  544 . In one embodiment, device  538  in the second mode can be predominantly in an on condition, with device  536  operating to predominantly demodulate the current to synchronize with a reference AC signal. Inverter controller  550  can control the operation of current  591  by switching device  536  between on and off conditions at rates determined by inverter controller  550 . Further, inverter controller  550  causes device  512  to operate as an open-circuit and devices  532  and  534  to operate as close-circuit path portions, thereby disabling transformer  522 . In this configuration, output terminal  494  is associated with a reference potential, and output terminal  496  is associated with a waveform portion  593 , which includes negative values with respect to the reference potential. 
         [0027]      FIG. 6  illustrates an example of a flow for a method of operating an inverter, according to embodiments of the invention. Flow  600  begins at  602 , after which a DC power source is coupled via a first power switch to a first transformer at  604  and a second power switch is decoupled from the DC power source at  606 . At  608 , the DC power signal is modulated to form a variable signal. At  610 , the inverter transforms the magnitude of the variable signal to form a transformed variable signal. At  612 , the inverter synchronously demodulates a transformed variable signal to form a first portion of the transformed variable signal. Then, the inverter can couple the first portion of the transformed variable signal to a first output terminal at  614 , while coupling a second output terminal via an optional filter to reference potential at  616 . At  624 , the DC power source is coupled via the second power switch to a second transformer, and the first power switch is decoupled from the DC power source at  626 . At  628 , the DC power signal is modulated to form another variable signal. At  630 , the inverter transforms the magnitude of the other variable signal to form another transformed variable signal. At  632 , the inverter synchronously demodulates the other transformed variable signal to form a second portion of the transformed variable signal. Then, the inverter can couple the second portion of the transformed variable signal to the second output terminal at  634 , while coupling the first output terminal via an optional filter to reference potential at  636 . A cycle of AC signal generation is completed at  640 , after which the inverter can repeat the above-described flow  600  to generate other cycles. 
         [0028]    Various embodiments or examples of the invention may be implemented in numerous ways, including as a system, a process, an apparatus, or a series of program instructions on a computer readable medium such as a computer readable storage medium or a computer network where the program instructions are sent over optical, electronic, or wireless communication links. In general, operations of disclosed processes may be performed in an arbitrary order, unless otherwise provided in the claims. 
         [0029]    In some embodiments, a computer simulation program can be configured simulate or model the behavior the structures described herein. Thus, instructions to simulate the inverter of the various embodiments can be embedded in a computer readable medium, whereby the instructions can cause a processor to function in accordance with the various methods and structures described herein. 
         [0030]    The term “computer readable medium” refers, at least in one embodiment, to any medium that participates in providing instructions to a processor for execution. Such a medium can take many forms, including but not limited to, non-volatile media, volatile media, and transmission media. Non-volatile media includes, for example, optical or magnetic disks, such as a disk drive. Volatile media includes dynamic memory, such as a system memory. Transmission media includes coaxial cables, copper wire, and fiber optics, including wires that comprise a bus. Transmission media can also take the form of electromagnetic, acoustic or light waves, such as those generated during radio wave and infrared data communications. 
         [0031]    Common forms of computer readable media includes, for example, floppy disk, flexible disk, hard disk, magnetic tape, any other magnetic medium, CD-ROM, any other optical medium, punch cards, paper tape, any other physical medium with patterns of holes, RAM, PROM, EPROM, FLASH-EPROM, any other memory chip or cartridge, time-dependent waveforms, or any other medium from which a computer can read instructions. 
         [0032]    In at least some examples, the structures and/or functions of any of the above-described features can be implemented in software, hardware, firmware, circuitry, or a combination thereof. Note that the structures and constituent elements above, as well as their functionality, may be aggregated with one or more other structures or elements. Alternatively, the elements and their functionality may be subdivided into constituent sub-elements, if any. As software, the above-described techniques may be implemented using various types of programming or formatting languages, frameworks, syntax, applications, protocols, objects, or techniques. As hardware and/or firmware, the above-described techniques may be implemented using various types of programming or integrated circuit design languages, including hardware description languages, such as any register transfer language (“RTL”) configured to design field-programmable gate arrays (“FPGAs”), application-specific integrated circuits (“ASICs”), or any other type of integrated circuit. In some examples, the methods, techniques and processes described herein may be performed and/or executed by executable instructions on computer processors, for which such methods, techniques and processes may be performed (e.g., to simulate the methods and structures described herein). For example, one or more processors in a computer or other display controller may implement the methods describe herein by executing software instructions in a program memory accessible to a processor. These can be varied and are not limited to the examples or descriptions provided. 
         [0033]    A detailed description of one or more examples is provided herein along with accompanying figures. The detailed description is provided in connection with such examples, but is not limited to any particular example. The scope is limited only by the claims, and numerous alternatives, modifications, and equivalents are encompassed. Numerous specific details are set forth in the description in order to provide a thorough understanding. These details are provided as examples and the described techniques may be practiced according to the claims without some or all of the accompanying details. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, as many alternatives, modifications, equivalents, and variations are possible in view of the above teachings. For clarity, technical material that is known in the technical fields related to the examples has not been described in detail to avoid unnecessarily obscuring the description. 
         [0034]    The description, for purposes of explanation, uses specific nomenclature to provide a thorough understanding of the invention. However, it will be apparent that specific details are not required in order to practice the invention. In fact, this description should not be read to limit any feature or aspect of to any embodiment; rather features and aspects of one example can readily be interchanged with other examples. Notably, not every benefit described herein need be realized by each example of the invention; rather any specific example may provide one or more of the advantages discussed above. In the claims, elements and/or operations do not imply any particular order of operation, unless explicitly stated in the claims. It is intended that the following claims and their equivalents define the scope of the invention.