Abstract:
A voltage controlled oscillator (VCO) to produce a variable frequency and duty cycle output proportional to the applied (input) voltage. The VCO comprises RC charge networks to vary both the frequency and duty cycle of an astable multivibrator with applied voltage variations. The VCO has particular application for low voltage and low frequency operation.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates generally to voltage controlled oscillator circuits. It is particularly directed to the provision of a voltage controlled oscillator for use in low voltage devices such as electronic timepieces, to produce voltage pulses having a frequency and duty cycle which varies in proportion to the applied voltage. 
     VCO circuits produce output signals whose frequency varies as a function of an input control voltage. VCOs are useful in systems employing phase locked loops (PLL) as well as in any system where a variable frequency output signal is required as a function of the input signal. A VCO circuit employing cascaded inverters connected in a ring configuration to form a ring oscillator is described, for example, in U.S. Pat. No. 3,931,588 entitled &#34;Voltage Controlled Oscillator Utilizing Field Effect Transistors&#34; issued Jan. 6, 1976 to W. S. Gehweiler. In this reference the frequency of the ring oscillator is varied, over the relatively high operating range of approximately 6 MHZ to 21 MHZ, by varying the operating voltage applied across at least one of the inverting stages of the oscillator. 
     A VCO circuit employing cascaded inverters to form an astable multivibrator is described, for example, in U.S. Pat. No. 3,878,482 entitled &#34;Wide Band Voltage Controlled Oscillator Utilizing Complementary Metal Oxide Semiconductors Integrated Circuits And A Constant Current MOS Field Effect Transistor&#34; issued to L. F. Schowe, Jr. In this reference, the operating current and voltage is applied to a complementary inverter where a transistor of P conductivity type functions as a current source. As the conduction of the P type transistor is varied more or less current flows into the inverter. 
     Other prior art patents of interest include U.S. Pat. Nos. 4,156,204 issued May 22, 1979 to Robert N. Hargis; 3,911,378 issued Oct. 7, 1975 to James E. Buchanan; 4,072,910 issued Feb. 7, 1978 to Andrew Gordon Francis Dingwall et al.; 4,146,849 issued Mar. 27, 1979 to Kouichirou Satou; and 3,919,625 issued Nov. 11, 1975 to Troyce D. Barton. 
     In contrast to the prior art, the present invention provides a VCO circuit which varies both frequency and duty cycle as a function of the applied voltage, provides an output voltage/current source which varies inversely to the applied (input) voltage and has particular application for low voltage and low frequency operation. 
     SUMMARY OF THE INVENTION 
     Essentially, and in accordance with the invention, the VCO is designed for relatively low voltage and low frequency operation by use of two RC networks responsive to the applied voltage to control the operation of an astable multivibrator to produce an output (pulse) whose frequency and duty cycle varies with the applied voltage over a predetermined range and the output voltage/current (pulse) source varies inversely to the applied input voltage variations. 
     It is, therefore, an object of the present invention to provide a VCO suitable for relatively low voltage and low frequency operation. 
     It is a further object of the present invention to provide a VCO which is responsive to the applied voltage to produce a variable frequency and variable duty cycle pulsed signal output. 
     It is another object of this invention to provide a circuit responsive to variations in the applied voltage for providing a controlled drive pulse and/or variable duty cycle pulse (power) source which varies inversely to the variations of the applied input voltage. 
     Further advantages and objectives of the present invention will be apparent from the following detailed description of the preferred embodiment of the invention. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of the VCO circuit according to the invention; 
     FIG. 2 is a set of waveforms for illustrating the operation of the FIG. 1 circuit. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The following is a detailed description of the best presently contemplated mode of carrying out the invention. This description is not to be taken in a limiting sense but is made merely for the purpose of illustrating general principles of the invention since the scope of the invention is best defined by the appended claims. 
     Referring now to FIGS. 1 and 2, the variable controlled oscillator circuit comprises an astable multivibrator 1 (shown within a phantom outline), an RC charge network 2, a discharge network 3 (also shown within a phantom outline), and a threshold network 4. 
     The applied input voltage V in  is selected to vary from approximately 2.2 to 5 volts DC. 
     The astable multivibrator 1 comprises two NPN type transistors Q 2 , Q 3  connected in cascade, a feedback network R 5  C 3  and an RC network R 2  C 2  connected between the two transistors Q 2 , Q 3 . The collectors of transistors Q 2 , Q 3  are coupled to the applied voltage V in  through resistors R 3  and R 4 , respectively. The feedback network C 3  R 5  is connected between the collector of transistor Q 3  and the base or gate terminal of transistor Q 2 . 
     The emitters of transistors Q 2 , Q 3  are returned to a reference (ground) potential. The common junction between resistor R 4  and the collector of transistor Q 3  forms the output terminal 5 of the VCO. As noted above, the output terminal 5 is connected to the input of the multivibrator 1, i.e., to the base transistor of Q 2 , via the feedback network C 3  R 5 . The feedback network C 3  R 5  couples (in a bootstrap like manner) a sustaining signal from the output terminal 5 to the base of Q 2  to maintain conduction of transistor Q 2  during a logic 1 or high output from the multivibrator 1. The output of the multivibrator 1 is also coupled to a discharge network 3. The discharge network 3 comprises transistor Q 1  and resistors R 6  and R 7 . Transistor Q 1  serves as a switch actuated by the output pulse from the multivibrator 1 to discharge capacitor C 1  to the reference potential. 
     The RC charge network 2, comprises a series RC circuit connected between the reference potential and the applied voltage V in . The common junction between resistor R 1  and capacitor C 1  is coupled to the collector of transistor Q 1  and, via threshold network 4, to the base of transistor Q 2 . The threshold or voltage trigger network 4 comprises two diodes D 1 , D 2  connected in series between the base of transistor Q 2  and the common junction of resistor R 1  and capacitor C 1 . 
     The circuit was designed to produce a variable duty cycle and variable frequency such that at the lowest voltage the duty cycle is predetermined at approximately 50% and the frequency is approximately 1000 hertz. As the voltage increases towards the maximum, the duty cycle decreases to about 25% and the frequency approaches 2000 hertz. 
     The astable multivibrator is triggered into oscillation when the voltage at terminal TP2 approaches the predetermined threshold voltage of diodes D 1 , D 2 , and Q 2  &#39;s emitter base junction, which is predetermined at approximately 1.8 volts. 
     The pulse width PW of the output signal Vout is determined by the charge time of the RC network R 2  C 2  and the V in  potential level such that a predetermined voltage is established on terminal TP3 to turn off transistor Q 3 . With Q 3  turned off, i.e., not conducting, output terminal 5 is at the V in  potential. 
     The duration of the logic 0 or reference potential GND portion of the output signal Vout is primarily determined by the charge time of the RC charge network 2 and the V in  potential level whereby a predetermined (trigger) voltage is established on terminal TP2 to turn on transistor Q 2 . 
     Therefore, since the applied voltage is predetermined to vary over a fixed range, the time constant to reach the trigger voltages on C 1  and C 2  will vary in accordance with the applied voltage V in . And as noted above, the pulse width PW is controlled by the RC network R 2 , C 2  and the logic 0 portion of the output signal Vout is determined by the RC charge network R 1 , C 1 . In this manner, as the V in  voltage increases, the RC networks charge to the predetermined (trigger) voltages in a shorter period of time which in turn controls the frequency and duty cycle of the output wave form Vout. 
     In operation, the circuit functions as follows: When power is first applied, transistor Q 3  conducts because it is forwarded biased through R 3 . Transistor Q 1  is cutoff because the collector of transistor Q 3  approaches ground and back biases transistor Q 1  through R 6  and R 7 . Transistor Q 2  is cutoff due to the back bias established by the collector of transistor Q 3  and R 5 . The RC charge network 2 begins to charge up toward the applied voltage V in  until the threshold of D 1  and D 2  and the emitter base of transistor Q 2  is overcome (about 1.8 volts). Once transistor Q 2  starts to conduct, capacitor C 2  couples the negative going voltage to the base of transistor Q 3 , cutting off transistor Q 3 . Transistor Q 3  will be held cutoff until capacitor C 2  charges up through transistor Q 2  and resistor R 3 . When transistor Q 3  cuts off, transistor Q 1  conducts shunting out capacitor C 1  ; transistor Q 1  is cutoff when transistor Q 3  once again conducts. The feedback circuit R 5  C 3  maintains transistor Q 2  conducting until transistor Q 3  conducts once again. 
     While a wide variety of types of transistors and associated elements may be employed, the VCO circuit embodiment illustrated in FIG. 1 was constructed and successfully operated to provide the results indicated in Table 2 using the following components. 
     
                       TABLE 1______________________________________            DIODE______________________________________Q.sub.1, Q.sub.2, Q.sub.3   = Texas        D.sub.1, D.sub.2                          = Texas Instruments&#39;    Instrument&#39; 2N4401     1N914R.sub.1, R.sub.6, R.sub.7   = 33K - ohms   C.sub.1 = 0.001 microfaradsR.sub.3, R.sub.4   = 4.7K - ohms  C.sub.2 = 0.005 microfaradsR.sub.2 = 47K - ohms   C.sub.3 = 0.0033 microfaradsR.sub.5 = 100K - ohms______________________________________ 
    
     
                       TABLE 2______________________________________                     TIME  TIME                     @ Gnd @ V.sub.1n                     MI-   MI-                     CRO-  CRO-  DUTY                     SEC-  SEC-  CYCLE  FREQ.IN   TP-1    TP-2   TP-3  ONDS  ONDS  % ON   K. HZ______________________________________2.2V +1.4    +.55   + .55 176    270  60     2.25-0.3    -1.3   -1.652.5V +1.5    +.55   +.55  152    265  64     2.4-0.4    -1.5   -1.93.0V +1.5    +.55   +.55  130    260  67     2.56-0.6    -1.8   -2.33.5V +1.55   +.55   +0.6  114    255  69     2.7-0.9    -2.2   -2.84.0V +1.6    +.55   +.7   103    250  71     2.83-1.2    -2.5   -3.24.5V +1.65   +.55   +.7    93    240  72     3.0-1.5    -2.8   -3.55.0V +1.65   +.55   +.7    85    230  73     3.16-1.75   -3.2   -4.0______________________________________