Abstract:
An electronic circuit for use in an anti-radiation missile system of the type which uses the electromagnetic transmissions of a target radar for guidance information, detects when the missile has flown into a target null and is no longer receiving energy from one of the main lobes or side lobes of the target radar transmitter. When this condition is detected, the circuit causes an attenuation in the epsilon error guidance signal to momentarily prevent guidance commands based upon the now suspect epsilon error signals from being implemented.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention pertains to the field of electronics and in particular to the field of digital electronics. With greater particularity, this invention pertains to the field of digital signal processing. With greatest particularity, the present invention pertains to a null filter circuit for digital signal processing to prevent erroneous guidance commands in an anti-radiation guided missile (ARM). 
     2. Description of the Related Art 
     Anti-radiation missiles are generally passive tracking devices, relying on the radio frequency (RF) energy emitted from a target to generate tracking signals, zeroing out angle errors, and following this energy path to a point of impact upon the target. Radiating targets of interest usually have highly directional energy density patterns in order to achieve small angular resolution for their target tracking purposes. 
     This is accomplished by focusing the energy with an antenna into a main beam. The focusing process is not perfect, generating lower power density beams known as sidelobes and backlobes which vary in energy density, solid angle, and angular position from the center of the main beam. Included in this beam structure are angular areas where very small amounts of energy are radiated out from the target, known as nulls. 
     These nulls present a warped phase front which makes the target appear to be emanating from a different position than it&#39;s actual location, and they also allow the ARM to receive signals off surrounding objects (multipath) making the target appear to be in a different location. The missile signal processing may then generate erroneous guidance information steering the missile away from the intended target, causing a miss. 
     SUMMARY OF THE INVENTION 
     The problem of erroneous missile guidance caused when an anti-radiation missile, which passively tracks radiation emission from a target, encounters a target null, has been solved by the present invention which detects when a null condition exists and momentarily attenuates the guidance error signal so that no guidance commands are issued during the time the null is present. 
     The invention includes an analog differencing circuit, a comparator, a one-shot multivibrator, a D flip-flop, a clock circuit (variable), three three-input NAND gates, an up/down counter, a multiplying digital to analog converter, two four-input NAND gates, four digital inverters, and an analog output buffering circuit. 
     Signal inputs include the automatic gain control (AGC) voltage which represents the average power level of the energy received from the target, and the guidance error signal epsilon from which all control commands are generated. The output is a modified epsilon signal which is attenuated when a null is detected, removing the erroneous guidance commands. 
     The null filter is designed to use the physical property of increasing signal power level as the missile approaches the target. If the received power level begins to drop, and does so at a rapid rate, a target anomaly or null has probably been encountered. By detecting this drop in power level, action may be taken to remove the bad tracking data from the guidance commands allowing the missile to coast, until good tracking data is again received. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     The invention will be better understood when the detailed description which follows is studied in conjunction with the appended drawing figures, wherein: 
     FIG. 1 illustrates an ARM encountering a target null; 
     FIG. 2 illustrates a block diagram of a null filter according to the invention; 
     FIG. 3 illustrates a circuit diagram of a null filter according to the invention; and 
     FIG. 4 illustrates typical signals present in the circuitry during operation of the invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring now to the drawing figures wherein like parts and elements are represented by like reference characters throughout the several figures, and referring in particular to FIG. 1, there is shown target missile  11  having active radar guidance electronics  12  which produce mainlobe  13 , sidelobe  14  and backlobe  15 . Between the respective lobes are areas of low signal strength termed nulls. FIG. 1 further illustrates an anti-radiation missile (ARM)  21  which has passive radiant energy guidance electronics  22 . ARM  21  is shown intercepting target missile  11 . 
     As can be seen from the schematic representation of FIG. 1, ARM  21  may encounter the main or sidelobe of target missile  11  or may be in a null at different times during the flight. Guidance commands tending to steer ARM  21  toward target missile  11  based upon the signal strength of mainlobe  13  could be confused and disrupted when ARM  21  encounters a null. 
     Referring now to FIG. 2, there is shown a block diagram of a null filter according to the present invention. The null filter circuit can be seen to comprise a differencing circuit  31 , a comparator  32 , a 0.5 second timer  33 , a gate  34 , a clock  35 , a sequencer-counter  36 , and a digitally controlled attenuator  37 . 
     Operation of the circuit is as follows. The AGC voltage is differenced with a narrower bandwidth voltage of the AGC to determine the rate of change of the received power level. This is done in the differencing circuit  31  by dividing the AGC voltage into two paths, inverting the voltage in one path with a standard operational amplifier inverting configuration  41 , and inverting and filtering the voltage in the other path with a single pole low pass filter  42 . The output from one operational amplifier is then subtracted from the other using an operational amplifier configured as a differencing amplifier  43 . The output of this amplifier is thus the difference between the present target signal power level and a long time average of this power level. 
     This output voltage is directed to a comparator  32  which is biased to enable when the AGC difference voltage has dropped an equivalent of a 3 dB drop in received power from the target. This is the process by which the null is detected and flagged to the rest of the circuitry, which removes the guidance commands. 
     When the output of the comparator is enabled, it indicates a “Null Present”. The enable signal triggers a one-shot multivibrator  51  which is set to produce a 0.5 second output pulse. This is a “time-out override” of the null present enable, used to make sure the missile doesn&#39;t fly without guidance for any longer than 0.5 seconds. The null present enable and the time-out override are gated together with a NAND gate  34  such that whichever signal disables first, takes precedence and signals the end of the event. 
     The null present (logical) and time-out signal is routed to a D flip-flop  53  where it is synchronized to a clock  54 . Outputs from the D flip-flop  53  (true and complement of the signal null present (logical) and time-out) are directed to respective inputs of two three-input NAND gates  55  and  56 . These two NAND gates  55  and  56  provide the clocking signals to a 4 bit up/down counter  57  depending on the status of the system. Outputs from counter  57  drive the 4 most significant bits of a multiplying digital to analog converter  58  (MDAC) which is configured as a digitally controlled analog attenuator. The counter  57  outputs are also directed to the inputs of a four-input NAND gate  61 , and a set of logical inverters  62 , 63 , 64  and  65 . Output from NAND gate  61  indicates when the counter has reached a count of  15 , or all four outputs are high. This logical signal is fed to the input of NAND gate  56  which disables the count-up clock signal directed to counter  57 . The outputs from the inverters  62 ,  63 ,  64  and  65  are routed to a four-input NAND gate- 66  and its output indicates when counter  57  has reached zero, all outputs low. This signals the NAND gate  66  to disable the count-down clock signal to the counter  57 . All this circuitry provides the means to control the amplitude of the error signal epsilon. 
     When a null is detected, and assuming the counter  57  outputs are all ones, NAND gate  55  will enable the count down clock to the counter  57 . As the count decreases, the attenuation of epsilon increases, until the count equals zero a n d the count down clock  57  is disabled. This is a stable state as long as the null is present and the 0.5 second time-out has not occurred. When the null is no longer present, the count down clock stays disabled and the count up clock is enabled via NAND gate  56 . The counter  57  begins to increment, attenuation of epsilon decreases until the count reaches all ones and the count up clock is disabled. This is also a stable state, where epsilon is not attenuated, and a null is not present. The operational amplifiers  71  and  72  on the output of the MDAC  58  are needed to buffer and invert epsilon for output to the missile guidance electronics. 
     FIG. 4 illustrates typical signals from various portions of the circuitry. AGC voltage (A) represents the voltage proportional to the received signal strength from the target missile at the input to differencing circuit  31 . Null present signal (B) illustrates the output of comparator  32  when a null signal has been encountered. Time-out signal (C) illustrates the output of one-shot  51  when a null has been encountered. Count-down signal (D) illustrates the output from NAND gate  55  when a null has been encountered. Count-up signal (E) illustrates the output from NAND gate  56  after NAND gate  55  has counted down. All zeros signal (F) illustrates the output from NAND gate  66  which disables NAND gate  55 . All ones signal (G) illustrates the output from NAND gate  61  which disables NAND gate  56 . Finally, FIG. 4 shows the attenuation of gain which operates on the epsilon error guidance signal to gradually remove the error signal and then gradually replace it after a predetermined period of time. 
     This method provides a means to detect and remove the adverse effects of flying an ARM missile into a target null. The integrated circuits which have been used to advantage in the present invention are common components available from commercial sources. The following table lists the components as described in this description and the circuit numbers of corresponding commercial products which are representative of workable circuit components. 
     
       
         
               
               
               
             
           
               
                 TABLE I 
               
               
                   
               
             
             
               
                 Operational amplifier 
                 41 
                 TL084 
               
               
                 Operational amplifier 
                 42 
                 TL084 
               
               
                 Operational amplifier 
                 43 
                 TL084 
               
               
                 Comparator 
                 32 
                 LM111 
               
               
                 One-shot multivibrator 
                 51 
                 26L02 
               
               
                 NAND gate 
                 34 
                 74LS10 
               
               
                 D flip-flop 
                 53 
                 74LS74 
               
               
                 Clock 
                 54 
                 74LS124 
               
               
                 NAND gate 
                 55 
                 74LS10 
               
               
                 NAND gate 
                 56 
                 74LS10 
               
               
                 Up/Down Counter 
                 57 
                 74LS193 
               
               
                 NAND gate 
                 61 
                 74LS20 
               
               
                 NAND gate 
                 66 
                 74LS20 
               
               
                 Inverters 
                 62, 63, 64 and 65 
                 74LS04 
               
               
                 Multiplying Digital to Analog Converter 
                 58 
                 AD7524 
               
               
                 Operational Amplifier 
                 71 
                 TL084 
               
               
                 Operational Amplifier 
                 72 
                 TL084 
               
               
                   
               
             
          
         
       
     
     The invention can and has been implemented using a microprocessor and software to perform the same function, allowing considerably greater flexibility in parameter adjustment. In this particular implementation the AGC voltage is digitized and read into the microprocessor where logic operations are performed to detect a null condition. Attenuation of the error signal epsilon is handled in the same way with an MDAC, but the digital word is output from the microprocessor rather than a counter. 
     Obviously, many modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.