Abstract:
The present invention provides an etching process for decreasing mask defect. The process comprises providing a substrate, and sequentially forming a thin film layer, a mask, and a photoresist on the surface of the substrate. Then the photoresist is trimmed by a bromide compound, and a first etching process is performed to transfer patterns from the photoresist to the mask. A strip process is performed to strip photoresist by mixing gases that include fluorine. Finally, a second etching process is performed to transfer the pattern from patterned mask to the thin film layer.

Description:
BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The invention relates to etching process for decreasing mask defect, and more particularly, to etching process which can completely clean a photoresist. 
   2. Description of the Prior Art 
   Along with continuously reducing line widths of semiconductor elements, the size of each element of MOS transistors continues to be miniaturized. However, exposure machine, etching machine, and photosensitive material limits the line widths of a semiconductor element so that the development of smaller line widths experiences a bottleneck, especially in the same etching reaction chamber named an in-situ etching process. Therefore, it is important to determine how to decrease a mask defect and improve etching accuracy in the latter etching process. 
   Please to refer to  FIG. 1  and  FIG. 2  that are schematic diagrams for defining the gate pattern of a MOS transistor according to prior art. As shown in  FIG. 1 , a gate oxide layer  12  is formed on a silicon substrate  10 , and a doped polysilicon layer  14 , a silicon nitride compound mask  16 , and a bottom anti-reflection coating (BARC) layer  18  are sequentially formed on the gate oxide layer  12 . Finally, a photoresist layer  20  is formed on the BARC  18 . 
   A photolithographic process is performed to define the gate pattern on the photoresist layer  20 . Then, an anisotropic etching process is performed, such as utilizing dry etching to remove the BARC  18  and portions of the mask  16  not covered by the patterned photoresist layer  20  to transfer the pattern from the photoresist layer  20  to the mask  16 . Employing an in-situ etcher or etching system, the photoresist layer  20  is removed. Utilizing the mask  16  as a hard mask in the etching process, the doped polysilicon layer  14  is etched down to the surface of the gate oxide layer  12  to form the polysilicon pattern, as shown in  FIG. 2 . 
   However, the above-described prior art method still has shortcomings. When using a smaller than 90 nm process, the above-described in-suit etching process cannot completely remove the photoresist layer. Today&#39;s pure O 2  strip processes will produce halogenated compound polymers formed by F, HBr, Cl, etc. from the etching mask  16  and the photoresist  20  during the process. The halogenated compound polymers causes hard mask defects in later etching of the doped polysilicon layer  14  and influences the accuracy of the mask  16 , seriously affecting the quality of the latter etching process. 
   Therefore, the applicant proposes a method of reducing mask defects to prevent above-described problems. 
   SUMMARY OF THE INVENTION 
   It is therefore a primary objective of the claimed invention to provide an etching process for decreasing mask defect to solve the above-mentioned problems. 
   According to the claimed invention, etching process for decreasing mask defect includes providing a substrate, and sequentially forming a thin film layer, a mask, and a photoresist on the surface of the substrate. Then a bromide compound trims the photoresist, and a first etching process is performed to transfer patterns from the photoresist to the mask. A strip process is performed to strip the photoresist by mixing gases that include fluorine. Finally, a second etching process is performed to transfer the pattern from patterned mask to the thin film layer. 
   It is an advantage of the claimed invention that the etching process for decreasing mask defect utilizes a bromide compound to trim the patterned photoresist, and uses mixed gases including fluorine to strip the photoresist so that the method can completely remove the photoresist and prevent halogenated compound polymers from remaining on the mask. The process can enhance the quality of the latter process and decrease the cost. 
   These and other objectives of the claimed invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  and  FIG. 2  are schematic diagrams for defining a gate pattern of a MOS transistor according to prior art. 
       FIG. 3  to  FIG. 6  are schematic diagrams for manufacturing a gate pattern of a hard mask according to the present invention. 
       FIG. 7  to  FIG. 10  are schematic diagrams for manufacturing a hard mask of shallow trench isolation according to the present invention. 
   

   DETAILED DESCRIPTION 
   The present invention etching process is applied in a two-stage pattern transfer in the manufacture of the integrated circuits. Please refer to  FIG. 3  to  FIG. 6  that are schematic diagrams for manufacturing a gate pattern of a hard mask according to present invention. As shown in  FIG. 3 , the present invention provides a substrate  30 , such as a silicon substrate, and sequentially forms a gate oxide layer  32 , a polysilicon layer  34 , a mask  36 , a bottom anti-reflection coating (BARC)  38 , and a patterned photoresist  40 . The mask  36  can be a silicon oxide compounds layer, silicon nitride compounds, a dielectric layer, or a metal layer. The BARC  38  can be silicon oxide nitride compounds, and can be regarded to selectively deposited under the photoresist  40 , but presence or absence of the BARC  38  layer is subject to design considerations. In addition, the patterned photoresist  40  has been exposed and developed in a photolithographic process, and is trimmed or cured by utilizing a boron compound  42 , such as HBr, HBr 2 , or HBr x . 
   Then etching process is performed in the same reaction chamber as above process. As shown in  FIG. 4 , first an etching process is performed to etch the BARC  38  and the mask  36  not covered by patterned photoresist  40 . As shown in  FIG. 5 , mixing gases comprising fluorine, such as mixing gases also comprising oxygen (O 2 ) and fluorocarbon (C x F y ), or also comprising mixing gases of oxygen (O 2 ) and fluorosulfur (S x F y ) are utilized in the reaction chamber to strip the photoresist  40  and the BARC  38 , exposing the patterned mask  36  remaining on the surface of the polysilicon  34  to be used as a hard mask of the polysilicon  34  and gate oxide layer  32 . As shown in  FIG. 6 , another etching process is performed in the same reaction chamber to etch the polysilicon  34  down to the surface of the substrate  30  by utilizing the mask  36  as the hard mask for the polysilicon  34 , or to etch the polysilicon  34  and gate oxide layer  32  down to the surface of the substrate  30 . In addition, the trimming process by the bromide compound and the striping photoresist process are performed in the reaction chamber, named an in-situ etching process. 
   It is noted that the bromide compound, such as HBr, HBr 2 , or HBr x , is used to trim or cure the photoresist  40 . Therefore, the mixing gases comprising fluorine, such as mixing gases also comprising oxygen (O 2 ) and fluorocarbon (C x F y ), or mixing gases also comprising oxygen (O 2 ) and fluorosulfur (S x F y ), are utilized in an in-situ etching reaction chamber to strip the photoresist  40  according to the present invention. The invention solves the prior art problem that the photoresist cannot be completely removed using an in-situ etching process, etcher, or etching system, and therefore prevents hard mask defects previously formed by F, HBr, Cl . . . halogenated compounds polymers. The results of experiment show that when the process is smaller than a 90 nm process, the mixing gases of oxygen (O 2 ) and tetafluoromethane (CF 4 ) are used about 60˜100 seconds in the photoresist strip process, and the yield after etching can be substantially enhanced to 99.9%. 
   The present invention can additionally be applied to other in-situ etching processes. Please refer to  FIG. 7  to  FIG. 10  that are schematic diagrams for manufacturing a hard mask of shallow trench isolation (STI) according to the present invention. As shown in  FIG. 7 , the present invention provides a substrate  50 , such as silicon substrate, and sequentially forms a pad oxide layer  52 , a silicon nitride compounds layer  54 , a BARC  56 , and a patterned photoresist  58  on the surface of the substrate. The BARC  56  can be silicon oxide nitride compounds, and can be regarded to selectively deposited under the photoresist  58  according to design considerations. In addition, the patterned photoresist  58  has been exposed and developed in a photolithographic process, and is trimmed or cured utilizing a bromide compound  60  such as HBr, HBr 2 , or HBr x . 
   Then, an etching process is performed in the same reaction chamber as above process. As shown in  FIG. 8 , first an etching process is performed to etch the BARC  56  and the silicon nitride layer  54  not covered by the patterned photoresist  58 . As shown in  FIG. 9 , then a strip process is performed to strip the photoresist  58  and the BARC  56  utilizing mixing gases comprising fluorine, such as mixing gases also comprising oxygen (O 2 ) and fluorocarbon (C x F y ), or mixing gases also comprising oxygen (O 2 ) and fluorosulfur (S x F y ), so as to use the silicon nitride layer  54  as a hard mask of the STI. As shown in  FIG. 10 , another etching process is performed to etch the pad oxide layer  52  and a portion of the substrate  50  to form SIT  62 . In addition, the trimming process by the bromide compound and the striping photoresist process are performed in the reaction chamber, named an in-situ etching process. 
   A bromide compounds, such as HBr, HBr 2 , or HBr x , is used to trim or cure the photoresist  58 . Therefore, the mixing gases comprising fluorine, such as mixing gases also comprising oxygen (O 2 ) and fluorocarbon (C x F y ), or mixing gases also comprising oxygen (O 2 ) and fluorosulfur (S x F y ), are utilized in an in-situ etching reaction chamber to strip photoresist  58  according to the present invention. The invention can effectively solve the prior art problems of hard mask defects and enhance the yield of the in-situ etching process. 
   To sum up, the present invention can effectively solve problems that the photoresist cannot be completely removed using an in-situ etching process, etcher, or etching system of prior art, and substantially avoids the hard mask defects formed by halogenated compound polymers in the trimming or curing of the photoresist process. In addition, the present invention method of decreasing hard mask defects can not only be applied to the above-described manufacturing of a hard mask for a polysilicon gate and an STI, but also can used for a hard mask in any trimming or curing photoresist process, two stages mask process, and metal conducting wire process. 
   When compared to prior art, the present invention decreases mask defects by utilizing a bromide compound to trim or cure photoresist, and a mixing gases comprising fluorine to etch the mask. Not only can the method decrease mask defects, but also it also accurately orientates structures in latter etching processes to enhance the quality and yield of product, and decrease cost. 
   Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.