Abstract:
The invention concerns a method for encrypting, with a random quantity (r), a calculation using at least a modular operation ( 3 ), the method consisting in multiplying a first modulo (n) by said random quantity, in taking as modulo of the operation, the result (m) of said multiplication and in carrying out a modular reduction of the result of the operation, on the basis of the first modulo (n).

Description:
BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention relates to the protection of a secret key or datum (binary word) used in a process of authentication or identification of an electronic circuit (for example, a smart card) or the like, against piracy attempts. The present invention more specifically relates to the scrambling of calculations taking into account the secret datum. “Scrambling” designates a modification of the observable physical features (power consumption, thermal, electromagnetic radiation, etc.) induced by the operation of a component. 
   2. Discussion of the Related Art 
   An example of application of the present invention relates to a countermeasurement process against an attack by simple power analysis (SPA) or differential power analysis (DPA) of a digital processing circuit exploiting a private or secret datum. Such an attack by power analysis is an attack capable of being used by pirates to attempt discovering a digital key or the like. Such an attack consists of evaluating the direct or statistical dependence between the circuit power consumption and the use of digital data processed by a chip and involving a secret value. Indeed, in an algorithmic processing by means of a processing circuit, there exists a dependence between the circuit power consumption and the processed datum. The pirate uses the data input into the circuit, and thus “visible”, and used by the algorithm, to determine the secret datum present in the circuit, by examining its power consumption upon execution of the algorithm. 
   To make attacks by differential power analysis more difficult, it is generally attempted to make the visible data independent from the processed data. “Visible data” designates the binary words input into the algorithmic processing circuit and extracted from this circuit. The actual calculation, which most influences the circuit power consumption, is then performed on a modified or scrambled datum. 
   Generally, a random value is used to convert the input datum into a scrambled datum involved in the calculation. 
     FIG. 1  shows, in the form of a very simplified flowchart, a conventional example of a method for processing a datum A input into an authentication chip by a calculation algorithm performing a modular operation. The inputting of datum A is symbolized in  FIG. 1  by a block  1  (IN). Datum A is then converted into a datum A′ (block  2 ) by a using a random value r. This conversion consists, for example, of applying an arithmetical operation to operands A and r. Datum A′ is submitted to the calculation of the authentication function (block  3 ). This calculation consists of performing an operation B′=f(A′) modulo n, where function f represents a modular arithmetical operation. The size (number of bits) of the modulo n of this function is generally predetermined by the number of bits for which the processing circuit is provided. Indeed, the number of bits on which the operations are executed is generally sized according to the moduli used by these operations and to the maximum sizes of the operands and results. 
   In the more specific application of the present invention to a processing of an algorithm involving a secret datum s, this datum is contained in the chip (for example, permanently stored) and is provided to the algorithm in the calculation operation (block  3 ). The pirate attempts to detect this secret datum by analyzing the power consumption. Without the scrambling of datum A into datum A′, this possible pirating is eased since the pirate knows the input datum A as well as the modulo n of the modular function. 
   A current example of a modular arithmetical function is the modular exponentiation which consists of applying the following formula:
 
B′=A′ s  modulo n.
 
   Once result B′ is obtained by the implementation of the calculation algorithm, this result is inversely converted to restore a datum B (block  4 ), which is provided (block  5 , OUT) at the circuit output. Random amount r must be stored (block  6 , MEM) between steps  2  and  4 , to be used again upon the inverse conversion applied to the result of the algorithm. 
   A disadvantage of conventional scrambling methods implementing the algorithm operand is that they require additional computation power with respect to the mere execution of the algorithm. In particular, the conversion of B into B′ requires as many resources (memory, calculation time, etc.) as the actual calculation of the function. 
   Another disadvantage of conventional processes is that the storing of random value r makes the countermeasurement process more vulnerable to an attack by examination of the circuit power consumption. 
   Further, the simple fact of having to store this random datum requires specific circuits taking up additional space. 
   EP-A-1006492 discloses a calculation method implementing a modular operation in which a random value is used at the end of the method. So, the random quantity must be stored. 
   WO-A-9852319 also discloses a calculation method in which a random quantity is used. This quantity is used in the modulo of the operation and must also be stored. 
   SUMMARY OF THE INVENTION 
   The present invention aims at providing a novel solution for scrambling a calculation involving at least one modular arithmetical operation, which requires less calculation resources than conventional solutions, and which avoids storage, during the entire calculation duration, of a random value involved in the scrambling. 
   To achieve these and other objects as well as others, the present invention provides a method for scrambling, by means of a random value, a calculation involving at least one modular operation, including multiplying a first modulo by said random value, taking as the modulo of the operation the result of this multiplication, and performing a modular reduction, based on the first modulo, of the result of the operation is performed. 
   According to an embodiment of the present invention, said operation involves at least one input datum as well as at least one secret datum. 
   According to an embodiment of the present invention, said secret datum is contained in an electronic circuit implementing the method. 
   According to an embodiment of the present invention, said input datum is a datum input into an electronic circuit implementing the method. 
   The invention also provides a processing circuit implementing this method. 
   The foregoing objects, features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings, in which: 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  illustrates in the form of a simplified flowchart the implementation of a calculation method involving an external datum scrambled according to the state of the art; and 
       FIG. 2  illustrates in a very simplified flowchart an embodiment of the scrambling method according to the present invention. 
   

   DETAILED DESCRIPTION 
   The same elements are designated with the same references in the different drawings. For clarity, only those steps of the scrambling and calculation method which are necessary to the understanding of the present invention have been illustrated in the drawings and will be described hereafter. In particular, the processings affecting the data have not been. The present invention applies whatever the downstream and upstream processings performed. 
     FIG. 2  illustrates, in a simplified flowchart to be compared to that in  FIG. 1 , an embodiment of the method according to the present invention. 
   A feature of the present invention is to scramble, no longer operand A input from the outside (block  1 , IN), but the modulo of the performed modular arithmetical operation. 
   Thus, according to the present invention, for a modulo-n modular function, a random integer r is drawn for each calculation and this random number is multiplied (block  2 ′) to the modulo n. This then provides a number m, which, according to the present invention, is used as the modulo of the authentication calculation (block  3 ′). This calculation thus directly involves operand A and modified modulo m. The involved operation is not modified with respect to the conventional case. However, it can be seen that by affecting the modulo of the authentication algorithm, the respective values, and thus the circuit power consumption, are affected. The object of scrambling the calculation is thus achieved. 
   Result B′=f(A) modulo m must, as was previously the case (block  4 ,  FIG. 1 ), be inversely converted. 
   However, according to the present invention, this inverse conversion (block  4 ′,  FIG. 2 ) is particularly simple. Indeed, since the modulo m used in the modular operation is a multiple of n (m=r.n), it is sufficient to reduce number B′ modulo n to obtain result B to be provided (block  5 , OUT) at the circuit output. 
   An advantage of the present invention is that such a modular reduction and the multiplicative operation of the modulo generates only a few calculations. 
   Another advantage of the present invention is that it is no longer necessary to store random value r for the inverse conversion. Random value r can then be deleted as soon as number m has been calculated (block  2 ′). The possible pirating of the secret datum s involved in the calculation is made even more difficult. 
   The scrambling or masking performed according to the present invention is particularly simple to implement. Account must simply be taken of the number of bits taken into account in the operations with the largest modulo, to size the number processing circuits. 
   For example, for a processing circuit conventionally performing a modular operation over 1024 bits, it can be provided to add 64 bits to the processed number. The 64 bits represent the size of the involved random value r. 
   In a specific application of the present invention to a modular exponentiation, the present invention has the particular advantage of considerably simplifying the calculations with respect to the conventional operand processing. Indeed, a modular exponentiation is generally implemented by a well known square multiplication technique including operating as many modular squares as there are bits of the exponent and as many products as there are bits at state 1 in the exponent. 
   Of course, the present invention is likely to have various alterations, modifications, and improvements which will readily occur to those skilled in the art. In particular, any dimensions may be chosen for numbers n and r. A compromise will generally be selected between the size of the modulo and the size of the random value. In practice, the size of the modulo is often determined by external imperatives (standards, etc.). The number of bits processed by the circuit is then slightly increased (according to the size chosen for the random value). 
   Further, the method according to the present invention may be combined with the conventional method for applications where calculation time can be sacrificed to increase the scrambling. 
   Further, it should be noted that the present invention more generally applies to any modular function (for example, addition, subtraction, multiplication, modular inversion, etc.) and whatever the numbers of calculated functions and of input/output data, its implementation being within the abilities of those skilled in the art based on the functional indications given hereabove. Reference may for example be made, for example, to work “Handbook of Applied Cryptography” by A. J. Menezes, P. C. van Oorschot, and S. A. Vanstone, published in 1997, CRC Press LLC (pages 297, 454 to 459 and 484) for so-called ELGAHAL and derived examples of algorithms, involving modular operations, to which the present invention applies. 
   Finally, the design and construction of a processing circuit implementing the calculation and scrambling method of the present invention is within the abilities of those skilled in the art based on the functional indications given hereabove. The implementation of the present invention only requires conventional means, be it a software implementation by a microcontroller or a hardware implementation by a wired logic state machine. The present invention, which has been described hereabove with reference to examples of number sizes indicated in bit form may of course be transposed to other bases, provided that the calculation means used accept such bases. 
   Having thus described at least one illustrative embodiment of the invention, various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be within and scope of the invention. Accordingly, the foregoing description is by way of example only and is not as limiting. The invention is limited only as defined in the following claims and the equivalents thereto.