Abstract:
A semiconductor package includes a semiconductor chip having a major surface and first pads formed on the major surface. The semiconductor package also includes a package substrate having (a) opposite first and second major surfaces, (b) a side surface extending between the first and second major surfaces, (c) a pad forming region adjacent to and along the side surface, (d) second pads formed on the pad forming region, (e) external electrodes formed on the first major surface of the package substrate, wherein the second major surface of the package substrate is fixed to the major surface of the semiconductor chip, and wherein the external electrodes are electrically connected to the second pads. The semiconductor package further includes bonding wires electrically connecting the first pads to the second pads and a sealing material covering the bonding wires and first and second pads.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The present invention generally relates to a semiconductor package, and more particularly, to a semiconductor package having a Ball Grid Array structure.  
           [0003]    This application relies for priority on Japanese patent application, Serial Number 234614/1998, filed Aug. 20, 1998, which is incorporated herein by reference in its entirety.  
           [0004]    2. Description of the Related Art  
           [0005]    An example of a conventional semiconductor device using a BGA (Ball Grid Array) structure is shown in FIG. 1. As shown in FIG. 1, a semiconductor device  40  (i.e., semiconductor package) is made up of a printed circuit board  14 , a semiconductor element  16  (e.g., a semiconductor chip) and a resin  13 .  
           [0006]    The printed circuit board  14  has printed wirings formed on both front and back surfaces thereof and solder balls  12  which are arrayed along all sides of the printed circuit board  14  and are electrically connected to the wirings of the back surface of the printed circuit board  14 . The semiconductor element  16  is placed on the front surface of the printed circuit board  14  so that a front surface  16   a  thereof on which circuits are formed faces upward. The semiconductor element  16  is electrically connected to wirings formed on the printed circuit board  14  through bonding wires  18  made of gold. The resin  13  protects the semiconductor element  16 , bonding wires  18 , and connection areas where the bonding wires  18  are connected to the wirings formed on the printed circuit board  14  from an external environment.  
           [0007]    Another conventional semiconductor device  42  which is intended to reduce a device thickness and size is shown in FIG. 2. In the semiconductor device  42 , a semiconductor element  16  is placed on the front surface of a printed circuit board  14  so that a surface  16 a on which circuits are formed faces downward. Electrodes formed on the semiconductor element  16  are connected to electrodes on the printed circuit board  14  through solder bumps  15 . The space located between the surface  16 a and the printed circuit board  14  is sealed by an insulating resin  13 .  
           [0008]    In recent years, there has been a strong demand to further miniaturize the semiconductor device. In the case of the semiconductor device  40  shown in FIG. 1, it is necessary to set the length of the bonding wire to a relatively long length to avoid the possibility where the bonding wire  18  is shorted to the semiconductor element  16  by physically contacting the edge of the semiconductor element  16 . Therefore, it is also necessary to use a bonding wire which has a relatively high wire-bond loop profile to avoid imperfect contact or breaking of the wire. However; in such a technique, the relatively long bonding wire  18  causes the thickness of the resin  13  become greater than that of the printed circuit board  14  and thus the total thickness of the semiconductor device  40  increases. This means that it is difficult to reduce the size of the semiconductor device as a whole.  
           [0009]    In the case of the semiconductor device  40  shown in FIG. 2, the size of the printed circuit board  14  can be set to nearly the same as that of the semiconductor element  16 . However, since the bump electrodes, which are provided on the printed circuit board  14  or the semiconductor element  16 , are used for connecting the printed circuit board  14  and the semiconductor element  16 , this technique has an low manufacturing-efficiency and is less cost-effective when compared to the wire-bonding technique.  
           [0010]    Consequently, there has been a need for an improved semiconductor device.  
         SUMMARY OF THE INVENTION  
         [0011]    It is an object of the present invention is to provide a semiconductor package having a smaller size.  
           [0012]    It is another object of the present invention is to provide a method of fabricating a semiconductor package that may be reduced in overall size.  
           [0013]    It is another object of the present invention is to provide a semiconductor package that is well cost-effective to produce.  
           [0014]    It is another object of the present invention is to provide a semiconductor package that has a high manufacturing-efficiency.  
           [0015]    According to one aspect of the present invention, for achieving one or more of the above objects, there is provided a semiconductor package which includes a semiconductor chip having a major surface and first pads formed on the major surface. The semiconductor package also includes a package substrate having (a) opposite first and second major surfaces, (b) a side surface extending between the first and second major surfaces, (c) a pad forming region adjacent to and along the side surface, (d) second pads formed on the pad forming region, (e) external electrodes formed on the first major surface of the package substrate, wherein the second major surface of the package substrate is fixed to the major surface of the semiconductor chip, and wherein the external electrodes are electrically connected to the second pads. The semiconductor package further includes bonding wires electrically connecting the first pads to the second pads and a sealing material covering the bonding wires and first and second pads.  
           [0016]    The above and further objects and novel features of the invention will more fully appear from the following detailed description, appended claims, and the accompanying drawings. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0017]    [0017]FIG. 1 is a cross sectional view showing a conventional semiconductor device.  
         [0018]    [0018]FIG. 2 is a cross sectional view showing a conventional semiconductor device.  
         [0019]    [0019]FIG. 3 is a top plan view showing a semiconductor device according to a first preferred embodiment of the present invention.  
         [0020]    [0020]FIG. 4 is a cross sectional view taken on line  4 - 4  of FIG. 3.  
         [0021]    [0021]FIG. 5 is an expanded cross sectional view showing a part of FIG. 4.  
         [0022]    [0022]FIG. 6 is a top plan view showing a semiconductor device according to a second preferred embodiment of the present invention.  
         [0023]    [0023]FIG. 7 is a top plan view showing a semiconductor device according to a second preferred embodiment of the present invention.  
         [0024]    [0024]FIG. 8 is a cross sectional view taken on line  8 - 8  of FIG. 7.  
         [0025]    [0025]FIG. 9 is a top plan view showing a semiconductor device according to a third preferred embodiment of the present invention.  
         [0026]    [0026]FIG. 10 is a top plan view showing a semiconductor device according to a fourth preferred embodiment of the present invention.  
         [0027]    [0027]FIG. 11 is a cross sectional view taken on line  11 - 11  of FIG. 10.  
         [0028]    [0028]FIG. 12 is a top plan view showing a semiconductor element  16  according to a fourth preferred embodiment of the present invention.  
         [0029]    [0029]FIG. 13 is a cross sectional view of another example of a fourth preferred embodiment of the present invention.  
         [0030]    [0030]FIG. 14 is a top plan view showing a semiconductor device according to a fifth preferred embodiment of the present invention.  
         [0031]    [0031]FIG. 15 is a cross sectional view taken on line  15 - 15  of FIG. 14.  
         [0032]    [0032]FIG. 16 is a cross sectional view of another example of a fifth preferred embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
     First Preferred Embodiment  
       [0033]    A semiconductor device according to the present invention will be explained hereinafter with reference to FIG. 3 through FIG. 16. In order to simplify explanations, like elements are given like or corresponding reference numerals through this specification and figures.  
         [0034]    [0034]FIG. 3 is a top plan view showing a semiconductor device according to a first preferred embodiment of the present invention. FIG. 4 is a cross sectional view taken on line  4 - 4  of FIG. 3.  
         [0035]    As shown in FIG. 3 and FIG. 4, the semiconductor device of the first preferred embodiment has a semiconductor element  16  (i.e., a semiconductor chip) and a wiring substrate  20  (i.e., a wiring board or a package substrate).  
         [0036]    The semiconductor element  16  has circuits, not shown in FIG. 3 and FIG. 4, which are formed in the center area of a front surface thereof and a plurality of electrode pads  16   a  (i.e., an electrode part) which are formed on the peripheral area of the front surface thereof.  
         [0037]    The wiring substrate  20 , having the size that is accommodated inside the peripheral area of the semiconductor element  16 , is fixed on the center area of the semiconductor element  16  by an insulating adhesive  30  (refer to FIG. 5). The wiring substrate  20  is electrically connected to the semiconductor element  16  by bonding wires  18 . An area (i.e., a bonding part) where the bonding wires  18  and the semiconductor element  16  are connected to each other is sealed with a resin  13  and thus the area is protected from an external environment.  
         [0038]    The wiring substrate  20  is preferably made of a processed two-layer board, which has a base material  22  (herein after a glass epoxy base) comprising a glass epoxy resin and copper foils formed on both surfaces of the base material  22 .  
         [0039]    [0039]FIG. 5 is an expanded cross sectional view showing a part of FIG. 4.  
         [0040]    As shown in FIG. 5, the wiring substrate  20  has electrode pads  24  which are formed on the front surface thereof and are used for solder balls  12  and wirings  21  which are preferably made of the patterned copper foil formed on the back surface thereof The wirings  21  are electrically connected to the electrode pads  24  through conductive materials within through holes. A solder resist  26  is applied to an area of the front surface of the wiring substrate  20  where the electrode pads  24  are not formed. The solder resist  26  is also applied to the back surface of the wiring substrate  20  including the wirings  21 . The solder resist  26  protects the surfaces of the wiring substrate  20 .  
         [0041]    The wiring substrate  20  also has wiring pads  23 , which are formed, on a pad forming surface  21   a . The pad forming surface  21   a  is formed to remove the copper foil of the front surface and the glass epoxy material  22  where they are located at the peripheral of the wiring substrate  20  by using a cutting tool, e.g., a drill. The wirings  21  on the pad forming surface  21   a  are plated with a copper and thus the plated portions thereof serve as the wiring pads  23 . Each of the wiring pads  23  and the wirings  21  is associated with respective electrode pads  16   a.    
         [0042]    Next, a method of fabricating the semiconductor device according to the first preferred embodiment will be explained hereinafter. The method is also called a method of assembling the semiconductor device.  
         [0043]    First, the rectangular semiconductor element  16  having the circuits, which are formed on the center area of the front surface thereof, and the electrodes  16   a , which are formed on the peripheral area of the front surface thereof, is provided.  
         [0044]    Next, the rectangular wiring substrate  20  having a length and breadth which is smaller than that of the semiconductor element  16  and which is accommodated inside the peripheral area of the semiconductor element  16  is provided.  
         [0045]    Next, the wiring substrate  20  is fixed to about the center area of the semiconductor element  16  by applying the insulating adhesive  30  therebetween so that the front surface of the semiconductor element  16  faces upward.  
         [0046]    After that, the wiring pads  23  which are disposed along the peripheral of the wiring substrate  20  are wire-bonded to the electrodes  16   a  of the semiconductor element  16  and thus they are electrically connected to each other.  
         [0047]    Finally, the resin  13  is flowed onto the peripheral area of the front surface of the semiconductor element  16 . Therefore, the area where the bonding wires  18  exist is sealed with the resin  13 .  
         [0048]    The semiconductor device is obtained from these steps.  
         [0049]    As explained above, in the first preferred embodiment, since the positions of the wiring pads  23  of the wiring substrate  20  are close to the front surface of the semiconductor element  16  or the distances between the electrodes  16   a  and the wiring pads  23  are decreased compared to the conventional semiconductor device, it is not necessary to consider the bonding wires  18  contacting the edges of the wiring substrate  20 . Therefore, the length of the bonding wires  18  can be shorter than those of the conventional semiconductor device. As a result, bonding wires  18  having a relatively low-height wire-bond loop profile can be used. This means that the possibility of imperfect contact or breaking of wire can be reduced.  
         [0050]    Furthermore, the thickness of the resin  13  can be set within the thickness of the wiring substrate  20  because of the relatively low-height bonding wire  18 . This means that the semiconductor device  40 , having the thickness which corresponds to the thickness of the semiconductor element  16  and the wiring substrate  20  can be obtained.  
         [0051]    Furthermore, the semiconductor device having a length and breadth which is approximately identical to that of the semiconductor element  16  can be obtained.  
         [0052]    Furthermore, since only the periphery of the wiring substrate  20  is sealed with the resin  13 , the sealing process can be done precisely and easily.  
       Second Preferred Embodiment  
       [0053]    A semiconductor device according to a second preferred embodiment will be explained hereinafter with reference to FIG. 6 through FIG. 8.  
         [0054]    [0054]FIG. 6 and FIG. 7 are top plan views showing semiconductor devices according to the second preferred embodiment. FIG. 8 is a cross sectional view taken on line  8 - 8  of FIG. 7.  
         [0055]    The second preferred embodiment is directed to another method for fabricating the semiconductor device mentioned in the first preferred embodiment of the present invention.  
         [0056]    As shown in FIG. 6, the wiring substrates  20  are fixed by the insulating adhesive  30  to areas which are surrounded by the respective sets of electrodes  16   a  in a state that a wafer  32  having the semiconductor elements  16  has not been separated into a plurality of pieces each having a respective one of the semiconductor elements  16 .  
         [0057]    Then, the wiring pads  23  which are disposed along the peripheral of the wiring substrates  20  are wire-bonded to the electrodes  16   a  of the semiconductor elements  16  and thus they are electrically connected to each other by the bonding wires  18 .  
         [0058]    After that, as shown in FIG. 5 and FIG. 6, the resin  13  is flowed onto an area between the wiring substrates  20  and into the sides of the outermost wiring substrates  20 . Thus, the areas where the bonding wires  18  are located are sealed with resin  13 .  
         [0059]    After curing the resin  13 , the wafer  32  is scribed and separated into the pieces each having a respective one of the semiconductor elements  16  and the wiring substrates  20 . At this time, the semiconductor devices are obtained.  
         [0060]    As mentioned above, since the wiring substrates  20  are mounted on the respective semiconductor elements  16  and the wiring pads  23  are wire-bonded to the electrodes  16   a  in the state that the wafer  32  has not been scribed, many semiconductor elements  16  can be handled all at once. Since the resin  13  is flowed onto the peripheral areas of the semiconductor elements  16  while the wafer  32  has not been separated into pieces, the scribing step can be the final step in obtaining the semiconductor devices. These means that an assembling period can be largely decreased and manufacturing-efficiency is improved.  
         [0061]    Furthermore, appearance type failures do not occur, which result from an excess of resin hanging down.  
       Third Preferred Embodiment  
       [0062]    A semiconductor device according to a third preferred embodiment will be explained hereinafter with reference to FIG. 9.  
         [0063]    [0063]FIG. 9 is a top plan view showing a semiconductor device according to the third preferred embodiment of the present invention.  
         [0064]    The third preferred embodiment is directed to another method for fabricating the semiconductor device mentioned in the first preferred embodiment of the present invention.  
         [0065]    As shown in FIG. 9, a rectangular wiring substrate  38 , which includes a frame part  34  and the wiring substrates  20 , is used in the third preferred embodiment. The respective wiring substrates  20  are supported by supporters  36   a ,  36   b ,  36   c , and  36   d  at the respective centers of their sides. The wiring substrates  20  and their supporters  36   a ,  36   b ,  36   c , and  36   d  are coupled in series by the frame part  34 .  
         [0066]    First, the semiconductor elements  16  are successively fixed to the wiring substrate from one end to the other end by the insulating adhesive  30  (FIG. 5) so that the front surfaces thereof contact the back surfaces of the wiring substrates  20 . At this time, the semiconductor elements  16  are placed on the wiring substrates  20  so that the peripheral areas thereof on which the electrodes  16   a  are formed, do not touch the wiring substrates  20  and the frame part  34 . Also, they are placed on the wiring substrates  20  so that the electrodes  16   a  do not touch the supporters  36   a ,  36   b,    36   c,  and  36   d  or not overlap the supporters  36   a ,  36   b ,  36   c , and  36   d.    
         [0067]    Next, the wiring pads  23  are wire-bonded to the electrodes  16   a  from one end of the wiring substrate  20  to the other end of the wiring substrate  20  in sequence.  
         [0068]    After that, the resin  13  (FIG. 5) is flowed onto the sides of the wiring substrates  20  and the peripheral of the semiconductor elements  16 . Thus, the areas where the bonding wires  18  are located are sealed with resin  13 .  
         [0069]    After curing the resin  13 , the supporters  36   a ,  36   b ,  36   c , and  36   d  are cut and thus the semiconductor elements  16  and the wiring substrates  20  are separated into pieces. At this time, the semiconductor devices are obtained.  
         [0070]    As described above, since the rectangular wiring substrate  38  which includes the wiring substrates  20  coupled in series by the frame part  34  is used in the third preferred embodiment, a well known conveyor or the like which has an intermittent working mechanism can be used to process the wiring substrates  20  so that the wiring substrates  20  are processed from one end thereof to the other end thereof in sequence. That is, a highly manufacturing-efficiency can be achieved.  
         [0071]    Furthermore, since such a well known conveyor can be adopted to fabricate the semiconductor device and thus it is not necessary to invest in special and new plant machinery, the semiconductor device can be fabricated in a more cost-effective manner.  
       Fourth Preferred Embodiment  
       [0072]    A semiconductor device according to a fourth preferred embodiment will be explained hereinafter with reference to FIG. 10 through FIG. 12.  
         [0073]    [0073]FIG. 10 is a top plan view showing a semiconductor device according to the fourth preferred embodiment. FIG. 11 is a cross sectional view taken on line  11 - 11  of FIG. 10. FIG. 12 is a top plan view showing a semiconductor element  16  (e.g., a semiconductor chip) according to the fourth preferred embodiment.  
         [0074]    As shown in FIG. 10 through FIG. 12, the semiconductor device has a first wiring substrate  20   a  (i.e., a wiring board or a package substrate), a second wiring substrate  20   b  (i.e., a wiring board or a package substrate), a element protect board  28  (i.e., a package substrate), and a semiconductor element  16  (i.e., a semiconductor chip)  
         [0075]    The element protect board  28  is preferably made of a glass epoxy base material and has a concave portion positioned at the center thereof.  
         [0076]    The second wiring substrate  20   b  has a frame shape and is stacked on the peripheral of the element protect board  28  so that the outer sides thereof are respectively aligned with corresponding outer sides of the element protect board  28 .  
         [0077]    The semiconductor element  16  has inside electrodes  16   a  and outside electrodes  16   b , which are aligned in two rows along each side thereof as illustrated in FIG. 10. The semiconductor element  16  is set into the concave portion of the element protect board  28 .  
         [0078]    The first wiring substrate  20   a , having a structure similar to that of the wiring substrate  20  in the first preferred embodiment, is fixed onto the center of the front surface of the semiconductor element  16  (i.e., an area surrounded by the inside electrodes  16   a ) by unillustrated insulating adhesive.  
         [0079]    The wiring pads  23   a  on the first wiring substrate  20   a  are wire-bonded to the inside electrodes  16   a  and the wiring pads  23   b  on the first wiring substrate  20   b  are wire-bonded to the outside electrodes  16   b.    
         [0080]    An area between the first wiring substrate  20   a  and the second wiring substrate  20   b  is filled with the resin  13 . Thus, this area is protected from an external environment.  
         [0081]    As will be explained below, the structure of the second wiring substrate  20   b  is similar to that of the wiring substrate  20 .  
         [0082]    The second wiring substrate  20   b  is preferably made of a two-layer board which comprises a glass epoxy base and copper foils formed on both surfaces thereof. A rectangular area, which is the center portion of the second wiring substrate  20   b , is removed and thus it has the frame shape.  
         [0083]    The second wiring substrate  20   b  has also electrode pads which are formed on the front surface thereof and are used for the solder balls  12  and wirings which are preferably made of a patterned copper foil formed on the back surface thereof The wirings are electrically connected to these electrode pads through conductive materials within through holes.  
         [0084]    An unillustrated solder resist is applied on an area of the front surface of the second wiring substrate  20   b  where the electrode pads are not formed. The solder resist is also applied on the back surface of the second wiring substrate  20   b  including the wirings. The solder resist protects the surfaces of the second wiring substrate  20   b.    
         [0085]    The second wiring substrate  20   b  also has wiring pads  23   b , which are formed, on a pad forming surface  23   c.  The pad forming surface  23   c  is formed by using a cutting tool (e.g., a drill) to remove the copper foil of the front surface and the glass epoxy material at the inside edges of the second wiring substrate  20   b.  Portions of the pad forming surface  23   c  are plated with copper and thus the plated portions thereof serve as the wiring pads  23   b.  Each of the wiring pads  23   b  and the wirings formed on the back surface of the second wiring substrate  20   b  is associated with a respective electrode pad  16   b.    
         [0086]    In the element protect board  28 , the concave portion thereof has a length and a breadth which is slightly larger than that of the semiconductor element  16 , and a depth which is substantially the same as the thickness of the semiconductor element  16 . The outer dimensions of the element protect board  28  and the second wiring substrate  20   b  are substantially the same. The second wiring substrate  20   b  is fixed to the element protect board  28  such that their outer edges are aligned. Since the first wiring substrate  20   a  has the same structure as the wiring substrate  20  of the first preferred embodiment, an explanation thereof is omitted here.  
         [0087]    Next, a method of fabricating the semiconductor device will be explained hereinafter.  
         [0088]    First, the rectangular semiconductor element  16  having the circuits, which are formed on the center area of the front surface thereof, and having the electrodes  16   a  and  16   b,  which are formed on the peripheral area of the front surface thereof, is provided.  
         [0089]    Next, the rectangular wiring substrate  20   a  having a size which is smaller than that of the semiconductor element  16  and which is accommodated inside the inside electrodes  16   a  is provided.  
         [0090]    Next, the first wiring substrate  20   a  is fixed to about the center area of the semiconductor element  16  by applying the insulating adhesive  30  therebetween so that the front surface of the semiconductor element  16  faces upward.  
         [0091]    After that, the back surface of the semiconductor element  16  is adhered into the concave portion of the element protect board  28 .  
         [0092]    Then, the wiring pads  23   a  which are disposed along the peripheral of the first wiring substrate  20   a  are wire-bonded to the inside electrodes  16   a  of the semiconductor element  16  and the wiring pads  23   b  which are disposed along the inner sides of the second wiring substrate  20   b  are wire-bonded to the outside electrodes  16   b  of the semiconductor element  16 .  
         [0093]    Finally, the resin  13  is flowed into a space between the first wiring substrate  20   a  and the second wiring substrate  20   b  so that the surface thereof is level with the front surfaces of the first and second wiring substrates  20   a  and  20   b.  As a result, the area where the bonding wires  18  are located is sealed with the resin  13  and thus the semiconductor device is obtained.  
         [0094]    As mentioned above, the fourth preferred embodiment has the same advantage as that of the first preferred embodiment and an additional advantage as follows.  
         [0095]    Since the second wiring substrate  20   b  having wiring pads  23   b  are provided, a larger number of wiring pads than those of the first preferred embodiment may be provided on the semiconductor element  16 . As a result, a large number of signals may be used in the semiconductor device and the number of pins (i.e., solder balls  12 ) can be increased.  
         [0096]    This means that mounting density on a motherboard, i.e., a PC board, on which the semiconductor devices or the like are mounted, may be increased. This means also that the number of semiconductor devices on the motherboard can be increased. (that is, high density can be achieved)  
         [0097]    Since the length and breadth of the semiconductor device is substantially the same as that of the second wiring substrate  20   b , the overall size of the semiconductor device is relatively small for a device having a large number of wiring pads (i.e., solder balls). The overall size of the semiconductor device may be as small as possible.  
         [0098]    Furthermore, another semiconductor device which has a larger number of wiring pads compared to the conventional semiconductor device and which may improve the mounting density is shown in FIG. 13.  
         [0099]    [0099]FIG. 13 is a cross sectional view of another example of the fourth preferred embodiment.  
         [0100]    The difference between FIG. 11 and FIG. 13 resides in locations where the wiring pads  23   a  and wiring pads  23   b  are formed. That is, as shown in FIG. 13, the wiring pads  23   a  and  23   b  are formed on the front surfaces of the first wiring substrate  20   a  and the second wiring substrate  20   b , respectively. In this case, providing the through holes and the conductive material within the through holes which electrically connect between the solder balls  12  and the wiring pads  23   a ,  23   b  in the wiring substrates  20   a ,  20   b  is not necessary. Furthermore, the wiring pads  23   a ,  23   b  may be formed at the same time when the electrode pads for solder balls are patterned. Therefore, it is easy to produce the wiring substrates.  
       Fifth Preferred Embodiment  
       [0101]    A semiconductor device according to a fifth preferred embodiment will be explained hereinafter with reference to FIG. 14 and FIG. 15.  
         [0102]    [0102]FIG. 14 is a top plan view showing a semiconductor device according to the fifth preferred embodiment. FIG. 15 is a cross sectional view taken on line  15 - 15  of FIG. 14.  
         [0103]    As shown in FIG. 14 and FIG. 15, one of the features of the fifth preferred embodiment is to provide a wiring substrate  25  having openings  27   a  through  27   d  which are formed therein. The semiconductor element  16  is fixed on a back surface of the wiring substrate  25  so that its inside electrodes  16   a  and outside electrodes  16   b  are positioned at areas where the openings  27   a  through  27   d  are located. The solder balls  12  are also formed on the back surface of the wiring substrate  25 . The thickness of the semiconductor device can be reduced by this structure.  
         [0104]    The wiring substrate  25  is preferably made of a two-layer board which comprises a glass epoxy base and copper foils formed on both surfaces thereof. The wiring pads  25   a  and  25   b  are formed on a front surface of the wiring substrate  25  and disposed adjacent to and along the Bides of the openings  27   a  through  27   d  respectively. Wirings  29 , which are obtained by patterning the copper foil, are formed on the front surface of the wiring substrate  25 . Inside wiring pads  25   a  and the outside wiring pads  25   b  are electrically connected to the corresponding solder balls  12  through conductive materials within through holes, which are defined in the wiring substrate  25 .  
         [0105]    Since the semiconductor element  16  has the same structure as that of the semiconductor element  16  of the fourth preferred embodiment, an explanation thereof is omitted here.  
         [0106]    Next, a method of fabricating the semiconductor device will be explained hereinafter.  
         [0107]    First, the rectangular semiconductor element  16  having the circuits, which are formed on the center area of the front surface thereof, and having the inside electrodes  16   a  and the outside electrodes  16   b , which are formed on the peripheral area of the front surface thereof, is provided.  
         [0108]    Next, the wiring substrate  25  having the openings  27   a  through  27   d  is provided.  
         [0109]    Next, the semiconductor element  16  is adhered onto the center area on the back surface of the wiring substrate  25  by applying the insulating adhesive therebetween so that the inside electrodes  16   a  and the outside electrodes  16   b  are positioned at areas where the openings  27   a  through  27   d  are located.  
         [0110]    After that, the inside wiring pads  25   a  which are disposed adjacent to and along first sides of the openings  27   a  through  27   d  are wire-bonded to the inside electrodes  16   a  of the semiconductor element  16 , and the wiring pads  25   b  which are disposed adjacent to and along second sides of the openings  27   a  through  27   d  are wire-bonded to the outside electrodes  16   b  of the semiconductor element  16 .  
         [0111]    Finally, the resin  13  is flowed into the openings  27   a  through  27   d  and their periphery (i.e., on the inside and outside wiring pads  25   a  and  25   b ). As a result, the area where the bonding wires  18  are located is sealed with the resin  13  and thus the semiconductor device is obtained.  
         [0112]    The fifth preferred embodiment has advantages which are explained as follows.  
         [0113]    Since the wiring substrate  25  having openings  27   a  though  27   d  for exposing the inside and outside electrodes  16   a ,  16   b  is provided, and the solder balls  12  are formed on the back surface of the wiring substrate  25  on which the semiconductor element  16  is located, the total thickness (i.e., stack height) of the semiconductor device when it is assembled on the mother board or the like can be obtained by combining the thickness (i.e., height) of the solder ball  12  to the thickness of the wiring substrate  25 . This means that a thinner package can be obtained.  
         [0114]    Furthermore, a lager number of inside and outside wiring pads  25   a ,  25   b  may be disposed along the openings. As a result, a large number of signals may be used in the semiconductor device and the number of pins (i.e., solder balls  12 ) can be increased.  
         [0115]    This means that mounting density on the motherboard, i.e., a PC board, on which the semiconductor devices or the like are mounted, may be increased. Thus, the number of semiconductor devices on the motherboard can be increased. (that is, a high density is achieved)  
         [0116]    The overall size of the semiconductor device may be as small as possible, because the length and breadth of the semiconductor device is substantially the same as that of the wiring substrate  25 .  
         [0117]    Furthermore, another semiconductor device having a thickness which is thinner than that of the semiconductor device shown in FIG. 15 is shown in FIG. 16 as another example of the fifth preferred embodiment.  
         [0118]    The difference between the semiconductor device as shown in FIG. 15 and that shown in FIG. 16 resides in the structure of the wiring substrate.  
         [0119]    The wiring substrate  26  has wiring pads  25   a ,  25   b , which are formed, on pad forming surfaces  33   a ,  33   b  respectively. The pad forming surfaces  33   a ,  33   b  are formed by using a cutting tool (e.g., a drill) to remove the copper foil of the front surfaces and the glass epoxy materials at the periphery of the openings  27   a ,  27   b  of the wiring substrate  26 . Portions of the pad forming surfaces  33   a ,  33   b  are plated with a copper and thus the plated portions thereof serve as the wiring pads  25   a ,  25   b . This structure is similar to that of the wiring substrate  20  as shown in FIG. 5.  
         [0120]    In this case, since the sealed portions sealed with the resin  13  may be confined within the openings  27   a  through  27   b , it is possible to prevent the solder balls  12  from being covered by the resin  13 . Furthermore, the surface of the resin  13  in the front side may be positioned inside the front surface of the wiring substrate  26 . This means that a semiconductor device having a thickness which is thinner than the semiconductor device shown in FIG. 15 may be obtained.  
         [0121]    Furthermore it is not necessary to provide the through holes and the conductive materials within the through holes which electrically connect between the solder balls  12  and the wiring pads  25   a ,  25   b  in the wiring substrate  26 . Furthermore, the wiring pads  25   a ,  25   b  may be formed at the same time when the electrode pads for solder balls  12  are patterned. Therefore, it is easy to produce the wiring substrate  26 .  
         [0122]    As detailed above, the present invention may provide the semiconductor device having a size which is smaller than that of the conventional semiconductor device and having less manufacturing cost.  
         [0123]    Furthermore, the present invention can provide the method of fabricating such a device.  
         [0124]    While the preferred form of the present invention has been described, it is to be understood that modifications will be apparent to those skilled in the art without departing from the spirit of the invention.  
         [0125]    The scope of the invention, namely, is to be determined solely by the following claims.