Abstract:
A method is provided for product culmination estimation in a microelectronics manufacturing environment. The method includes providing a manufacturing executing system including a plurality of processing entities. The manufacturing executing system provides interconnectivity and management of the processing entities. The method also assigns a standard queue time factor to product advancing through the manufacturing executing system, and determines an actual and theoretical cycle time and associated with the product through each process entity of the manufacturing executing system. The method further includes anticipating a target queue time for the product through the manufacturing executing system, and forecasting product cycle time of the product through the manufacturing executing system.

Description:
BACKGROUND  
       [0001]     The present disclosure relates generally to product flow management in a semiconductor fabrication facility, and, more specifically, to a system and method for product culmination estimation utilizing a promulgated standard queue time factor.  
         [0002]     During fabrication, one or more semiconductor devices are typically arranged on a substrate such as a wafer, and wafers are formed into groups, or “lots.” The fabrication of complex semiconductor devices utilizes many process steps where the total fabrication of a plurality of complex semiconductor devices may take up to several months. The time employed between processes and the time for a process may vary according to a vast number of parameters. The waiting time between processes for a product may generally be referred to as the queue time. Each process may be a batch process, where a group of semiconductor devices (e.g., one or more wafer lots) are processed at the same time, or a serial process, where devices or wafers are individually processed. Furthermore, the product may be clustered together and may be transported to each process as a group. Product may be fabricated upon a substrate that may include a single product or a plurality of different products upon the substrate. The product substrates may be grouped together into a lot, wherein the size of the lot may vary or may be a standard number of substrates or products. The time to process a lot of wafers or other substrates may generally be referred to as the process or cycle time.  
         [0003]     Process times and queue times are very important for several reasons. For example, reliability, performance and product yield can be affected by these times. Also, it is generally desirable to understand and predict the flow of wafers through the fabrication facility (fab). The monitoring and forecasting of product movement through a fab is hereinafter referred to as “product culmination forecasting”. Accordingly, what is needed is a system and method of improved product culmination forecasting. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0004]     Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures.  
         [0005]      FIG. 1  illustrates a block schematic view of one embodiment of a system constructed according to aspects of the present disclosure.  
         [0006]      FIG. 2  illustrates a block diagram view of another embodiment of a manufacturing executing system constructed according to aspects of the present disclosure.  
         [0007]      FIG. 3  illustrates a flow chart view of one embodiment of the product culmination estimation method constructed according to aspects of the present disclosure.  
         [0008]      FIG. 4  illustrates a flow chart view of the embodiment of the product culmination estimation method constructed according to aspects of the present disclosure.  
         [0009]      FIG. 5  illustrates a flow chart view of another embodiment product culmination estimation method constructed according to aspects of the present disclosure. 
     
    
     DETAILED DESCRIPTION  
       [0010]     It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of various embodiments. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Moreover, the communication of a first entity to a second entity in the description that follows may include embodiments in which the first and second entity are directly linked, and may also include embodiments in which additional entities may be interposing the link of the first and second entities, such that the first and second entities may not be in a direct link.  
         [0011]     Referring to  FIG. 1 , a system  100  is one example of a system for implementing one or more embodiments of the present disclosure. The system  100  comprises at least two components. The first component is a manufacturing executing system  102  which includes processing equipment, product transportation equipment, automation systems, a computer network, an administrative system, and additional interfaces. The manufacturing executing system  102  may also include a “virtual fab,” which allows the administrative system to monitor and control the processing equipment, product transportation equipment, and/or the automation systems via one or more wired or wireless networks. Wireless systems which may interact with the virtual fab include personal data devices (PDAs), cell phones, computers, and other interfaces. Examples of a virtual fab are disclosed in U.S. Patent Ser. No. 10/613,139 filed Jul. 1, 2003, which is hereby incorporated by reference.  
         [0012]     The second component of the system  100  is a product culmination estimator  104 . The product culmination estimator  104  may operate through the manufacturing executing system  102 , such as through the above-mentioned virtual fab. The product culmination estimator  104  includes hardware, software, and memory for executing a plurality of methods for determining the product queue time and process cycle time, as well as forecasting product culmination. The product culmination estimator  104  may interact with the manufacturing executing system  102  to access data for a plurality of process entities to extract cycle time and queue time data. The product culmination estimator  104  may process data retrieved by the manufacturing executing system  102 . The data may comprise a plurality of times “in” and times “out” of a process step (process time), and the time between process steps (queue time).  
         [0013]     Referring to  FIG. 2 , the manufacturing executing system  102  includes a plurality of product route operations or “log points”  202 - 208 , wherein each product route operation may include one or more process tools  210 - 216 , respectively. Each process tool  210 - 216  may include one or more process events  218 - 224 , respectively. For example, a thin films process operation  202  may utilize a cluster tool  210 . The cluster tool  210  is used with a process event  218   a,  e.g. refractory metal deposition process, a second process event  218   b,  e.g., a bulk metal deposition process, and a third process event  218   c,  e.g., forming a barrier layer. The materials fabricated upon a substrate may cover features with geometries ranging between about 180 nm and about 0.5 nm. The process events  218   a - c  may utilize a common system, such as a plasma furnace, or different systems such as those used for physical vapor deposition (PVD), atomic layer deposition (ALD), chemical vapor deposition (CVD), or plasma enhanced chemical vapor deposition (PECVD).  
         [0014]     Referring to  FIG. 3 , a flow diagram  300  can be used with one embodiment of the product culmination estimation method  104  ( FIG. 1 ). For the sake of continued example, the flow diagram  300  refers to the product route operations  202 - 208  of  FIG. 2 . The product route operations  202 - 208  may represent a plurality of events and operations which may occur in a manufacturing environment  102  ( FIG. 1 ). The flow diagram  300  illustrates one concept of cycle times and queue times in the manufacturing environment. Several theoretical cycle times (TCT) are represented in flow diagram  300  as TCT 1 , TCT 2 , TCT 3 , and TCT 4 , corresponding to product route operations  202 - 208 , respectively. To simplify the following discussion, it will be assumed that each product route operation  202 - 208  has a single process event (e.g., process event  218   a  for product route operation  202 ), and the corresponding TCT represents the time needed to complete the event. It is understood, however, that for those product route operations with multiple process events, the corresponding TCT can represent the time needed to complete all of the events. In an alternative embodiment, a single product route operation can have multiple consecutive TCTs to represent multiple process events. Each TCT may be dependent upon a plurality of parameters which may be constant or variable. The change of a TCT may be dependent upon process parameters. For example, a scheduled maintenance/calibration may be required after a predetermined number of wafers or wafer lots. Also, some processes may require extended time based upon the specific product being processed.  
         [0015]     Several target queue times (TQT) are represented as TQT 1 , TQT 2 , TQT 3 , TQT 4 , and TQT N . Each TQT represents a desired queue time between a prior product route operation and a next product route operation. The TQT may be different at each product route operation due to various factors, such as the preceding or next product route operation may be serial (single) or parallel (batch) and due to the process cycle time TCT. In the embodiments where there are multiple process events for a single product route operation, multiple TCTs and TQTs may be used, as needed. In addition, more than one TQT and/or more than one TCT can be arranged in sequence. For example, two process events can be in sequence, without any appreciable TQT there between. Also, two queue times can be in sequence with no process event there between.  
         [0016]     Referring to  FIG. 4 , a method  400  can be used to implement one embodiment of the product culmination estimation method  104  ( FIG. 1 ). The method  400  of the system  100  includes steps  402 - 410  for the forecasting of target queue times TQTs and product cycle times TCTs through the product route operations  202 - 208 .  
         [0017]     The method  400  begins at step  402 , where a standard queue time factor QTF may be applied to a plurality of product. The standard QTF represents a constant value which may be specified to the individual product route operation(s)  202 - 208  and/or the processing event(s) in the manufacturing executing system  102 . The standard QTF may differ for each product route operation  202 - 208  and/or processing event. In the present embodiment, the standard QTF is a numerical value corresponding to historical data (e.g., compared to similar products, similar wafer sizes, and/or similar processing flows and technologies). For example, in the case of 8 inch (200 mm) diameter wafers, the lot size may range between about 1 and about 25 wafers, and for 12 inch (300 mm) diameter substrates the lot size may range between about 1 and about 15 wafers. In another embodiment, the QTF is dependent on lot size. Also, the standard QTF may be promulgated to limited real estate areas upon a semiconductor substrate, referred to as multiple project wafers, wherein each real estate area may be associated with a different product(s) and/or different customer order(s).  
         [0018]     At step  404 , a standard theoretical cycle time STCT is determined for each product route operation  202 - 208  and/or processing event of the manufacturing executing system  102  (the STCT may be different for each). The STCT may correspond to the cycle time for a standardize product size or product lot size. The STCT is also based on whether processing occurs serially (single wafer) or by batch (multiple wafers), as well as other process environmental conditions. The configuration and design of the process equipment may further influence the standard STCT. The STCT may further be limited to be the same for a plurality of product route operation  202 - 208  and/or processing events. Alternatively, the STCT may be unique for every product route operation  202 - 208  and/or processing event.  
         [0019]     After the determination of the STCT at step  404 , an adjusted product size theoretical cycle time ATCT is determined at step  406 . The ATCT corresponds to the theoretical cycle time for product sizes or lot sizes greater or less than the STCT product or lot size. In a manufacturing environment, there may be a plurality of product lots or groupings wherein the size may not coincide with the STCT product or lot size. For example, there may be wafer lots with as few as five wafers compared to a STCT of fifteen. The use of a smaller lot size may be a result of a child lot from a parent standard lot, a process test lot, or an engineering device test lot. The engineering test lot may be frequently utilized in a manufacturing environment for evaluating new processes and implementations. Step  406  assigns the variable ATCT for each product lot or product size that may be processed through a product route operation  202 - 208  and/or processing event.  
         [0020]     At step  408 , a target queue time TQT is determined by the product of the standard QTF and the standard STCT. Therefore, at each product route operation  202 - 208  and/or processing event, a unique TQT may be anticipated. Alternatively, a global TQT may be anticipated for a plurality of product route operation(s)  202 - 208  and/or processing event(s). Employing a standard QTF for each product size or lot, regardless of the product size, provides a method for estimating the culmination of a product through a manufacturing process. The standard QTF allows for consistent flow of material through a process without sacrificing process cycle time for reduced product sizes or lots, therefore forecasting of product culmination in a manufacturing system may be more readily anticipated by the system  100  of  FIG. 1 .  
         [0021]     At step  410 , the product cycle time may be forecasted by the summation of the ATCT and the TQT for a specified product route operation  202 - 208  and/or processing event.  
         [0022]     Referring to  FIG. 5 , a method  500  can be used to implement another embodiment of the product culmination estimation method  104  ( FIG. 1 ). The method  500  begins at step  502 , where the application of a plurality of standard queue time factors QTF i  are associated with a plurality of product route operations  202 - 208  and/or processing events. Each of the standard QTF i  may represent a value that is maintained constant throughout the manufacturing cycle time and the queue time estimation of the manufacturing executing system  102 . The standard QTF i  may differ for individual product route operation(s)  202 - 208  and/or processing event(s). Alternatively, the standard QTF i  may be globally shared for the product route operation(s)  202 - 208  and/or processing event(s) of the method  500  of the product culmination estimation method  104 . In the present embodiment, the standard QTF i  provides a numerical value corresponding to a frequently occurring QTF i  of a predetermined product size. For example, the product may be grouped by lots wherein a myriad of product wafers may be transported between individual product route operation(s)  202 - 208  or processing event(s). Alternatively, the lot size may be arbitrary and the plurality of standard QTF i  utilized by the product culmination estimation method  104  is the QTF i  of the typical number of wafers incorporated into a lot. The standard QTF i  may be promulgated to limited real estate areas upon a semiconductor substrate, referred to as multiple project wafers, wherein each real estate area may correspond to a different product and/or different customer order.  
         [0023]     At step  504 , a plurality of standard theoretical cycle time TCT i  are determined for each product route operation  202 - 208  and/or processing event of the manufacturing executing system  102 . The plurality of standard TCT i  may correspond to the cycle time for the standardize product size or product lot size. The plurality of standard TCT i  may be determined according to the process, wherein processing (e.g., serial or batch) and by the process environmental conditions. The configuration and design of the process equipment may further influence the plurality of standard TCT i . The plurality of standard TCT i  may further be limited to be the same for a plurality of product route operations  202 - 208  and/or processing events. Alternatively, the plurality of standard TCT i  may be unique for every product route operations  202 - 208  and/or processing events.  
         [0024]     At step  506 , following the determination of the plurality of standard TCT i , a plurality of actual product size theoretical cycle times ATCT i  are determined. The plurality of ATCT i  corresponds to the theoretical cycle time for product sizes or lot sizes greater or less than the standard TCT i  product or lot size. For example, there may be wafer lots with as few as two wafers as compared to a plurality of standard TCT i  of fifteen. The use of smaller lot size(s) may be a result of a child lot separated or split from a parent lot, a process test lot, and/or an engineering device test lot. The variable ATCT i  are assigned for each product lot or product size that may be processed through a product route operation  202 - 208  and/or processing event.  
         [0025]     At step  508 , a plurality of target queue times TQT N  can be determined by the product of the standard QTF i  and the standard ATCT i . Therefore, at each product route operation  202 - 208  and/or processing event, a unique plurality of TQT N  may be anticipated. Alternatively, a global TQT N  may be anticipated for a plurality of product route operations  202 - 208  and/or processing events. Employing a plurality of standard QTF i  for each product size or lot regardless of the product size provides a simple method for estimating the culmination of a product through a manufacturing process. The plurality of standard QTF i  allows for consistent flow of material through a process without sacrificing process cycle time for reduced product sizes or lots, therefore forecasting product culmination in a manufacturing system may be more readily anticipated by the system  100  of  FIG. 1 . At step  510 , a plurality of product cycle times are forecasted by the summation of the ATCT i  and the TCT i  for each product route operation  202 - 208  and/or processing event (or collections thereof).  
         [0026]     Although embodiments of the present disclosure have been described in detail, those skilled in the art should understand that they may make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.