Abstract:
A picture displaying method is for displaying a picture by means of a plurality of picture displaying units. A picture signal representing the picture is supplied to each of the picture displaying units. A first picture displaying unit displays a first part of the picture according to the picture signal and produces a start pulse signal after displaying of the first part of the picture. A second picture displaying unit displays a second part of the picture according to the picture signal in response to the start pulse signal.

Description:
[0001]     This application claims priority to prior applications JP 2005-245583 and JP 2006215361, the disclosures of which are incorporated herein by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     This invention relates to a flat panel display unit and to picture displaying by the use thereof, in particular, to picture displaying by means of a plurality of flat panel display units.  
         [0003]     For displaying different pictures with a plurality of liquid crystal display units, it is necessary to provide the same number of signal sources as the liquid crystal display units. For instance, the same number of graphic boards, each of which has a picture signal output, as the liquid crystal display units is used as the signal sources. Alternatively, a graphic board having the same number of picture signal outputs as the liquid crystal display units is used as the signal sources.  
         [0004]     Moreover, there is a liquid crystal display unit that a liquid crystal display panel thereof can display two different pictures at a time by dividing a screen. The liquid crystal display unit has also two image signal sources. Such a display unit is disclosed in Japanese Patent Unexamined Publication No. 9-62230.  
         [0005]     On the other hand, it is known that a liquid crystal display unit has two pairs of drivers to drive a liquid crystal panel and to display a picture. The liquid crystal display unit simultaneously scans two areas of the liquid crystal panel. Therefore, the liquid crystal display unit needs two signal sources. Such a display unit is disclosed in Japanese Patent Unexamined Publication No. 5-80714.  
         [0006]     At any rate, the liquid crystal display unit needs the same number of signal sources as pictures which would be displayed. That is, it is currently impossible that one of two liquid crystal display units displays an upper/left half of a picture according to a picture signal while the other displays a lower/right half of the picture according to the same picture signal. Furthermore, it is currently impossible that one of two liquid crystal display units displays a picture according to a picture signal while the other displays another picture according to the same picture signal. This is true of the liquid crystal display unit which has liquid crystal display panel divided into two areas.  
       SUMMARY OF THE INVENTION  
       [0007]     It is therefore an object of this invention to provide a method that a plurality of picture displaying units, each of which displays a part of a picture, displays the whole of the picture according to a single picture signal without the same number of signal sources, such as graphic boards, as the picture displaying units.  
         [0008]     Other objects of this invention will become clear as the description proceeds.  
         [0009]     According to a first aspect of this invention, a picture displaying method is for displaying a picture by means of a plurality of picture displaying units each of which has a displaying panel driven with primary and secondary driving signals produced according to an input picture signal. The picture displaying method comprises the steps of supplying the input picture signal to each of the picture displaying units; starting, in a first displaying unit which is one of the picture displaying units, producing first primary and first secondary driving signals according to the input picture signal; starting, in a second displaying unit which is another one of the picture displaying units, producing one of second primary and second secondary driving signals according to the input picture signal; driving a first displaying panel of the first displaying unit with the first primary and the first secondary driving signals to display a first part of the picture represented by the input picture signal; sending a start pulse signal produced by the first displaying unit to the second displaying unit after displaying the first part of the picture; starting, in the second displaying unit, producing the other of the second primary and the second secondary driving signals in response to the start pulse signal; and driving a second displaying panel of the second displaying unit with the second primary and the second secondary driving signals to display a second part, which is different from the first part, of the picture represented by the input picture signal.  
         [0010]     According to a second aspect of this invention, a picture displaying system comprises a plurality of picture displaying units each of which has a displaying panel driven with primary and secondary driving signals produced according to an input picture signal. The input picture signal is supplied to each of the picture displaying units. A first picture displaying unit which is one of the picture displaying units starts producing first primary and first secondary driving signals according to the input picture signal, drives a first displaying panel thereof with the first primary and the first secondary driving signals to display a first part of a picture represented by the input picture signal, and then sends a start pulse signal to a second picture displaying unit which is another one of the picture displaying units. The second picture displaying unit starts producing one of second primary and second secondary driving signals according to the input picture signal, and starts producing the other of the second primary and the second secondary driving signals according to the picture signal in response to the start pulse signal, and drives a second displaying panel thereof with the second primary and the second secondary driving signals to display a second part, which is different from the first part, of the picture represented by the input picture signal.  
         [0011]     According to a third aspect of this invention, a picture displaying unit comprises a start pulse signal producing circuit for producing start pulse signals to start producing first primary and first secondary driving signals according to an input picture signal. Primary and secondary driver circuits are for producing the first primary and the first secondary driving signals in response to the start pulse signals. A displaying panel is for being driven with the first primary and the first secondary driving signals. The primary driver circuit sends an additional start pulse signal to another picture displaying unit which receives the input picture signal to start producing one of second primary and second secondary driving signals after producing the first primary driving signal. The displaying panel displays a part of a picture represented by the input picture signal.  
         [0012]     According to a fourth aspect of this invention, a picture displaying unit comprises a start pulse signal producing circuit for producing an internal start pulse signal to start producing primary driving signals according to an input picture signal. A primary driver circuit is for producing the primary driving signal in response to the internal start pulse signal. A secondary driver circuit is for receiving an external start pulse signal from the outside to produce the secondary driving signal. A displaying panel is driven with the primary and the secondary driving signals for displaying a part of a picture represented by the input picture signal.  
         [0013]     According to a fifth aspect of this invention, a picture displaying unit comprises a start pulse signal producing circuit for producing an internal start pulse signal to start producing a primary driving signal according to an input picture signal. A primary driver circuit is for producing the primary driving signal in response to the internal start pulse signal. A secondary driver circuit is for receiving an external start pulse signal from a preceding picture displaying unit to produce a secondary driving signal. The secondary driver circuit produces another external start pulse signal to be supplied to a following picture displaying unit. A displaying panel is driven with the primary and the secondary driving signals to display a part of a picture represented by the input picture signal.  
         [0014]     According to a sixth aspect of this invention, a picture displaying method is for displaying a picture represented by a picture signal by means of a plurality of picture displaying units. The picture displaying method comprises the steps of: supplying the input picture signal to each of the picture displaying units; displaying a first part of the picture according to the picture signal by means of a first picture displaying unit which is one of the picture displaying units; sending a start signal from the first picture displaying unit to a second picture displaying unit which is another one of the picture displaying units after displaying of the first part of the picture; and displaying a second part different from the first part of the picture according to the picture signal in response to the start signal by means of the second picture displaying unit.  
         [0015]     According to a seventh aspect of this invention, a picture displaying system is for displaying a picture represented by a picture signal. The system comprises a first picture displaying unit for receiving the picture signal to display a first part of the picture and to produce a start signal after displaying the first part of the picture. A second picture displaying unit is for receiving both of the picture signal and the start signal to display a second part different form the first part of the picture. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0016]      FIG. 1  is a block diagram of a picture displaying system according to a first embodiment of this invention;  
         [0017]      FIG. 2  is a time chart of source driving signals and gate driving signals in the picture displaying system of  FIG. 1 ;  
         [0018]      FIG. 3  is a block diagram of a picture displaying system according to a second embodiment of this invention;  
         [0019]      FIG. 4  is a time chart of source driving signals and gate driving signals in the picture displaying system of  FIG. 3 ;  
         [0020]      FIG. 5  is a block diagram of a picture displaying unit according to another embodiment of this invention; and  
         [0021]      FIG. 6  is a block diagram of a picture displaying unit according to still another embodiment of this invention. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0022]     Referring to  FIG. 1 , a description will be made about a picture displaying system  100  according to a first embodiment of this invention.  
         [0023]     The picture displaying system  100  includes first and second liquid crystal display units  1  and  2  and a signal source  3 .  
         [0024]     The first and the second liquid crystal display units  1  and  2  display different pictures according to a common picture signal S 1  supplied from the signal source  3 .  
         [0025]     The signal source  3  produces the picture signal S 1 . The signal source  3 , for example, is a video card for a computer. The picture signal S 1 , for example, includes color signals RGB, a horizontal synchronization signal Hsync, a vertical synchronization signal Vsync and a dot clock signal CLK. The picture signal S 1  includes a picture frame which represents a picture having 2n (n: a natural number) of scanning lines each of which corresponds to m (m: a natural number) of pixels. Alternatively, the picture frame represents two successive pictures each of which has n of scanning lines. A conventional liquid crystal display unit needs a liquid crystal display panel with at least 2n of gate lines to display the picture having 2n of the scanning lines.  
         [0026]     The first liquid crystal display unit  1  includes a first control circuit  11 , a first source driver  12 , a first gate driver  13  and a first panel  14 . The first panel  14  is a TFT (or active matrix type) liquid crystal panel having m (m: a natural number) of source lines and n of gate lines (G 1 , G 2 , . . . , Gn). The first source driver  12  has a first writing shift register  12   r  having the same number (=m) of stages (e.g. flip-flops) as the source lines of the first panel  14 . The first gate driver  13  has a first scanning shift register  13   r  having the same number (=n) of stages (e.g. flip-flops) as the gate lines of the first panel  14 .  
         [0027]     Similarly, the second liquid crystal display unit  2  includes a second control circuit  16 , a second source driver  17 , a second gate driver  15  and a second panel  18 . The second panel  18  similar to the first panel  14 . That is, the second panel  18  is a TFT (or active matrix type) liquid crystal panel having m (m: a natural number) of source lines and n (n: a natural number) of gate lines (Gn+1, Gn+2, . . . , Gn+n). The second source driver  17  has a second writing shift register  17   r  having the same number (=m) of stages as the source lines of the second panel  18 . The second gate driver  15  has a second scanning shift register  15   r  having the same number (=n) of stages as the gate lines of the second panel  18 .  
         [0028]     The first liquid crystal display unit  1  operates as follows.  
         [0029]     On receiving the picture signal S 1  from the signal source  3 , the first control circuit  11  passes the color signals RGB included in the picture signal S 1  to the first source driver  12  as a first color signal RGB 1 . Furthermore, the first control circuit  11  produces a first writing start pulse signal S 2 , a first writing shift clock signal S 3 , a first scanning start pulse signal S 4  and a first scanning shift clock signal S 5 . These signals s 2 -S 5  are produced by using the horizontal synchronization signal Hsync, the vertical synchronization signal Vsync and/or the dot clock signal CLK. The first writing start pulse signal S 2  and the first writing shift clock signal  83  are supplied to the first source driver  12  while the first scanning start pulse signal S 4  and the first scanning shift clock signal  85  are supplied to the first gate driver  13 .  
         [0030]     In the first source driver  12 , the first writing start pulse signal S 2  from the first control circuit  11  is supplied to the first writing shift register  12   r . The first writing shift register  12   r  shifts and outputs the first writing start pulse signal S 2  in response to the first writing shift clock signal S 3 . One of the source lines of the first panel  14  is specified according to the stage of the first writing shift register  12   r  that outputs the first writing start pulse signal S 2 . The first source driver  12  performs sampling of the color signal RGB 1  in response to the output of the first writing shift register  12   r . Subsequently the first source driver  12  performs D-A conversion of the sampled color signal to produce a first source driving signal S 6 . The first source driving signal S 6  is supplied from the first source driver  12  to the specified source line of the first panel  14 . Thus, the source lines of the first panel  14  are driven by the first source driving signal S 6  in order. Thus, the source lines of the first panel are driven by the first source driving signal one by one.  
         [0031]     On the other hand, in the first gate driver  13 , the first scanning start pulse signal S 4  from the first control circuit  11  is supplied to the first scanning shift register  13   r . The first scanning shift register  13   r  shifts and outputs the first scanning start pulse signal S 4  in response to the first scanning shift clock signal S 5 . One of the gate lines G 1 -Gn of the first panel  14  is specified according to the stage of the first scanning shift register  13   r  that outputs the first scanning start pulse signal S 4 . The first gate driver  13  converts the output of the shift register  13   r  into an ON voltage of a TFT level and supplies it to the specified gate line of the first panel  14  as a first gate driving signal S 7 . As a result, the gate lines G 1 -Gn are supplied with the ON voltage one by one according to the first scanning shift clock signal S 4 .  
         [0032]     The first gate driver  13  further supplies a second scanning start pulse signal  88  to the second gate driver  15 , after the ON voltage is supplied to the nth gate line of the first panel  14 .  
         [0033]     The first panel  14  receives the first source driving signal S 6  from the first source driver  12  and the first gate driving signal S 7  from the first gate driver  13 . The first panel  14  selects the gate lines one by one according to the first gate driving signal S 7 . While each gate line is selected, the first panel  14  writes the first source driving signal S 6  to the source lines thereof in turn.  
         [0034]     The second control circuit  16  receives the picture signal S 1  from the signal source  3  and passes the color signals RGB included in the picture signal S 1  to the second source driver  17  as a second color signal RGB 2 . Furthermore, the second control circuit  16  produces a second writing start pulse signal  89 , a second writing shift clock signal S 10  and a second scanning shift clock signal S 11  according to the picture signal S 1 . The second writing start pulse signal S 9  and the second writing shift clock signal S 10  are supplied to the second source driver  17  while the second scanning shift clock signal S 1  is supplied to the second gate driver  15 . The second control circuit  16  does not supply a start pulse signal to the second gate driver  15  differently from the first control circuit  11 . The second color signal RGB 2 , the second writing start pulse signal S 9 , the second writing shift clock signal S 10  and the second scanning shift clock signal S 11  are identical to the first color signal RGB 1 , the first writing start pulse signal S 2 , the first writing shift clock signal S 3  and the first scanning shift clock signal S 5 , respectively.  
         [0035]     In the second source driver  17 , the second writing start pulse signal S 9  from the second control circuit  16  is supplied to the second writing shift register  17   r . The second writing shift register  17   r  shifts and outputs the second writing start pulse signal S 9  in response to the second writing shift clock signal S 10 . One of the source lines of the second panel  18  is specified according to the stage of the second writing shift register  17   r  that outputs the second writing start pulse signal S 9 . The second source driver  17  performs sampling of the second color signal RGB 2  in response to the output of the second writing shift register  17   r . Subsequently the second source driver  17  performs D-A conversion of the sampled color signal to produce a second source driving signal S 12 . The second source driving signal S 12  is supplied from the second source driver  17  to the specified source line of the second panel  18 . The second source driving signal  812  is identical to the first source driving signal S 6 .  
         [0036]     On the other hand, in the second gate driver  15 , the second scanning start pulse signal S 8  from the first gate driver  13  is supplied to the second scanning shift register  15   r . The second scanning shift register  15   r  shifts and outputs the second scanning start pulse signal S 8  in response to the second scanning shift clock signal S 11 . One of the gate lines Gn+1-Gn+n of the second panel  18  is specified according to the stage of the second scanning shift register  15   r  that outputs the second scanning start pulse signal S 9 . The second gate driver  15  converts the output of the second scanning shift register  15   r  into ON voltage of the TFT level and supplies it to the specified gate line of the second panel  18  as a second gate driving signal S 13 . As a result, the gate lines Gn+1-Gn+n are supplied with the ON voltage one by one according to the second scanning shift clock signal S 11  after the second scanning start pulse signal S 8  is supplied from the first gate driver  13  to the second gate driver  15 .  
         [0037]     The second panel  18  receives the second source driving signal  812  from the second source driver  17  and the second gate driving signal S 13  from the second gate driver  15 . The second panel  18  selects the gate lines one by one according to the second gate driving signal S 13 . While each gate line is selected, the second panel  18  writes the second source driving signal S 12  to the source lines thereof in turn.  
         [0038]      FIG. 2  shows a timing chart of the driving signals S 6 , S 7 , S 12  and S 13  in the picture displaying system  100 .  
         [0039]     As mentioned above, the picture signal S 1  has the picture frame having 2n of the scanning lines. A first half, from the first scanning line to the nth scanning line, of the picture frame is displayed by the first panel  14  while a latter half, from the n+1th scanning line to the 2 nth scanning line, of the picture frame is displayed by the second panel  18 .  
         [0040]     The scanning start pulse signal S 4  registered in the first scanning shift register  13   r  is sifted in response to the first scanning shift clock pulse signal S 5 , and thereby the first gate driving signal S 7  is supplied to the gate lines G 1 , G 2 , . . . , Gn of the first panel  14  in turn. At the same time, the first source driving signal S 6  is supplied to the first panel  14  in response to the first writing shift clock signal S 3 . Thus, the first to the nth scanning lines are displayed on the first panel  14 .  
         [0041]     After production of the first gate driving signal S 7  for the nth gate line, the first gate driver  13  produces the second scanning start pulse signal  88  to supply it to the second gate driver  15 .  
         [0042]     The second scanning start pulse signal S 8  is registered in the second scanning shift register  15   r  and shifted in response to the second scanning shift clock signal S 11 . As a result, the second gate driving signal  813  is supplied to the gate lines Gn+1, Gn+2, . . . , Gn+n of the second panel  18  in turn. At the same time, the second source driving signal S 12  is supplied to the second panel  14  in response to the second writing shift clock signal S 10 . Thus, the n+1th to the 2 nth scanning lines are displayed on the second panel  18 .  
         [0043]     As mentioned above, the former n of the scanning lines included in the picture frame of the picture signal S 1  are displayed on the first panel  14  while the latter n of the scanning lines are displayed on the second panel  18 . Thus, the displaying system can display different pictures (or areas of a picture) without providing the same number of the signal sources such as graphic boards as the picture displaying units.  
         [0044]     Referring to  FIG. 3 , the description is directed to a picture displaying system  200  according to a second embodiment of this invention. The parts similar to those of  FIG. 1  are designated by similar reference numerals. In this embodiment, the picture frame of the picture signal S 1  has n of the scanning lines each of which corresponds to 2m of the pixels.  
         [0045]     The picture displaying system  200  has liquid crystal displaying units  4  and  5  which are different from the units  1  and  2  of  FIG. 1 . Particularly, a first source driver  21 , a first gate driver  22 , a second gate driver  23 , a second control circuit  24  and a second source driver  25  are different in function from those in the units  1  and  2 .  
         [0046]     The first source driver  21  includes a first writing shift register  21  r which has the same number (=m) of stages as the source lines of the first panel  14 . The first writing start pulse signal S 2  output from the first control circuit  11  is supplied to the first writing shift register  21   r . The first writing shift register  21   r  shifts and outputs the first writing start pulse signal S 2  in response to the first writing shift clock signal  83 . One of the source lines of the first panel  14  is specified according to the stage of the first writing shift register  21   r  that outputs the first writing start pulse signal  82 . The first source driver  21  performs sampling of the first color signal RGB 1  in response to the output of first writing shift register  21   r . Subsequently, the first source driver  21  performs D-A conversion of the sampled color signal to produce the first source driving signal S 6 . The first source driving signal S 6  is supplied from the first source driver  21  to the specified source line of the first panel  14 .  
         [0047]     The first source driver  21  further supplies a second writing start pulse signal S 20  to the second source driver  25  after it receives the shift clock signal S 3  for the number of the source lines of the first panel  14 . That is, the first source driver  21  supplies the second writing start pulse signal S 20  to the second source driver  25  when the first source driving signal S 6  is supplied to the mth source line of the first panel  14 .  
         [0048]     The first gate driver  22  is different from the first gate driver  13  of  FIG. 1  in that it does not produce the second scanning start pulse signal S 8 . Otherwise, the first gate driver  22  is similar to the first gate driver  13  of  FIG. 1 .  
         [0049]     The second gate driver  23  includes a second scanning shift register  23   r  having the same number (=n) of stages as the gate lines Gn+1-Gn+n of the second panel  18 . The second scanning shift register  23   r  receives a second scanning start pulse signal S 21  and the second scanning shift clock signal S 11  from the second control circuit  24 . The second scanning shift register  23   r  shifts the second scanning start pulse signal S 21  in response to the second scanning shift clock signal S 11 . The second gate driver  23  converts the output of the second scanning shift register  23   r  into the ON voltage of the TFT level. The ON voltage is supplied to the specified gate line as the second gate driving signal S 13 . The second gate driving signal S 13  is identical to the first gate driving signal S 7 .  
         [0050]     The second control circuit  24  receives the picture signal S 1  and passes the color signals RGB included in the picture signal S 1  to the second source driver  25  as a second color signal RGB 2 . The second control circuit  24  further produces a second writing shift clock signal S 10 , the second scanning signal clock signal S 11  and the second scanning start pulse signal S 21 . The second writing shift clock signal S 10  is supplied to the second source driver  25 , The second scanning start pulse signal S 21  and the second scanning shift clock signal S 11  are supplied to the second gate driver  23  as mentioned above. It will be noticed that the second control circuit  24  does not produces the second writing start pulse signal S 9  differently from that of  FIG. 1 .  
         [0051]     The second source driver  25  includes a second writing shift register  25   r  which has the same number (=m) of stages as the source lines of the second panel  18  like the first writing shift register  21   r . The second writing start pulse signal S 20  output from the first source driver  21  is supplied to the second writing shift register  25   r . The second writing shift register  25   r  shifts and outputs the second writing start pulse signal S 20  in response to the second writing shift clock signal S 10  supplied from the second control circuit  24 . One of the source lines of the second panel  18  is specified according to the stage of the second writing shift register  25   r  that outputs the second writing start pulse signal S 20 . The second source driver  25  performs sampling of the second color signal RGB 2  in response to the output of second writing shift register  25   r . Subsequently, the second source driver  25  performs D-A conversion of the sampled color signal to produce the second source driving signal S 12 . The second source driving signal S 12  is supplied from the second source driver  25  to the specified source line of the second panel  18 .  
         [0052]      FIG. 4  shows a timing chart of the driving signals S 6 , S 7 , S 12  and S 13  in the picture displaying system  200 . As mentioned above, the first source driver  21  supplies the start pulse S 20  to the second source driver  25  after it receives the shift clock signal S 3  for the number of the source lines of the first panel  14 . The second source driver  25  operates like the second driver  17  of the first embodiment except for a source of the start pulse signal, Then, the picture displaying system  200  draws a first half of each scanning line on the first panel  14 . A latter half of each scanning line is drawn on the second panel  18 . As a result, a left half of the picture frame is displayed on the first panel  14  while a right half of the picture frame is displayed on the second panel  18 .  
         [0053]     Thus, the displaying system can display different pictures (or areas of a picture) like that of the first embodiment without providing the same number of the signal sources such as graphic boards as the picture displaying units.  
         [0054]     While this invention has thus far been described in conjunction with the preferred embodiments thereof, it will readily be possible for those skilled in the art to put this invention into practice in various other manners.  
         [0055]     For example, three or more liquid crystal units may be used in a picture displaying system though each of the systems  100  and  200  has two units  1  and  2  or  4  and  5 . Specifically, one or more liquid crystal display unit(s)  6  shown in  FIG. 5  may be disposed between the liquid crystal displaying units  1  and  2  of  FIG. 1  to configure a picture displaying system  300 . Alternatively, one or more liquid crystal display unit(s)  7  shown in  FIG. 6  may be disposed between the liquid crystal display units  4  and  5  of  FIG. 3  to configure a picture displaying system  400 .  
         [0056]     The size of each panel of the picture displaying system  300  or  400  depend on the number of the liquid crystal units and the number of pixels of the picture frame. If the number of the liquid crystal units is equal to I (I: an integer equal to or larger than three) and the number of the pixels of the picture frame is equal to m×n (m, n: natural numbers), each panel of the system  300  has n of gate lines and m/l of source lines. On the same assumption, each panel of the system  400  has n/l of gate lines and m of source lines.  
         [0057]     In  FIG. 5 , the liquid crystal display unit  6  is similar to the liquid crystal display unit  2  of  FIG. 1  except for providing a second gate driver  30  in place of the second gate driver  15 .  
         [0058]     The second gate driver  30  of  FIG. 5  receives the second scanning start pulse signal S 8  from the first gate driver  13  to operate like the second gate driver  15  of  FIG. 1 . Furthermore, the second gate driver  30  produces a third scanning start pulse signal S 30  after the second gate driving signal S 13  is supplied to the last (e.g. nth) gate line of the second panel  18 . The third scanning start pulse signal S 30  is supplies to the following liquid crystal display unit ( 6  or  2 ). The following liquid crystal display unit receives the third scanning start pulse signal S 30  instead of the second scanning start pulse signal s 8  and operates as mentioned above regarding the liquid crystal displaying unit  2  or  6 .  
         [0059]     In  FIG. 6 , the liquid crystal display unit  7  is similar to the liquid crystal display unit  5  except for providing a second source driver  40  in place of the second source driver  17 .  
         [0060]     The second source driver  40  of  FIG. 6  receives the second writing start pulse signal S 20  from the first source driver  21  to operate like the second source driver  25  of  FIG. 3 . Furthermore, the second source driver  40  produces a third writing start pulse signal S 40  after the second source driving signal S 12  is supplied to the last (e.g. mth) source line of the second panel  18 . The third writing start pulse signal S 40  is supplies to the following liquid crystal display unit ( 7  or  5 ). The following liquid crystal display unit receives the third writing start pulse signal S 40  instead of the second writing start pulse signal s 20  and operates as mentioned above regarding the liquid crystal displaying unit  5  or  7 .  
         [0061]     Furthermore, this invention is not limited to the system having the liquid crystal display panels. Other flat panel display may be used as far as raw and column lines are used in each panel.