Abstract:
Disclosed herein is a reactor, including, a plurality of reaction regions, a plurality of heating elements, each arranged in each of the reaction regions, and cooling elements that cool other regions than reaction regions which are heated by the heating elements, wherein the heating element including a heater and a temperature detecting element and having a detection section configured to detect temperature from the temperature detecting element and a temperature control section configured to control the heater&#39;s temperature according to the detected temperature information.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a reactor to be applied to PCR for gene amplification and, more particularly, to a reactor capable of accurate temperature control. 
         [0003]    2. Description of the Related Art 
         [0004]    In the case where it is necessary to control reactions according to temperature conditions, it is desirable to be able to control the temperature conditions more accurately. Capability of accurate temperature control is desirable for any reactors for liquids, solids, and gases. This holds true in the technical field of gene analysis. 
         [0005]    One example of such cases is PCR (polymerase chain reaction) for gene amplification. PCR may be regarded as the standard process for quantitative analysis of nucleic acid in trace amounts. 
         [0006]    PCR is designed to repeat the cycle of amplification, which consists of “thermal denaturation→annealing with primer→polymerase extension reaction”, thereby amplifying the amount of DNA several hundred thousand times. 
         [0007]    The PCR amplified product obtained in this manner can be monitored in real time for quantitative analysis of nucleic acid in trace amounts. 
         [0008]    However, PCR requires that the amplification cycle be accurately controlled. To this end, a highly accurate temperature control is essential. 
         [0009]    Inadequate temperature control will lead to amplification of unnecessary DNA sequence or prevent amplification. 
         [0010]    Thus, the above-mentioned reactor needs capability of highly accurate temperature control as a reactor. Technologies relating to this are disclosed in Japanese Patent Laid-open No. 2003-298068 and Japanese Patent Laid-open No. 2004-025426. 
         [0011]    Control of heat generation in a minute region is accomplished by means of semiconductor devices. Semiconductor devices can be applied to heater elements arranged in matrix form. The technologies relating to matrix arrangement and reaction control are disclosed in Japanese Patent Laid-open Nos. 2003-180328 and 2006-238759, respectively. 
       SUMMARY OF THE INVENTION 
       [0012]    The reactor poses a problem of causing heat diffusion from adjacent heaters if it is provided with semiconductor elements or resistance heating elements for heat control in minute regions arranged in a matrix pattern. 
         [0013]      FIG. 1  shows how heat diffusion takes place. 
         [0014]    When three heaters (A) 1 , (B) 2 , and (C) 3  are turned on simultaneously, there exists a temperature profile between the heaters (A) 1  and (B) 2 , as shown in  FIG. 1 . It is noted that heat diffusion raises the temperature at an intermediate point X between the heaters (A) 1  and (B) 2 . It is also noted that peak B is higher than peak A, which are peak temperatures due to heaters (B) 2  and (A) 1 , respectively. This is because the heater (B) 2  is affected by heat diffusion from the heaters (A) 1  and (C) 3 . 
         [0015]    Heat diffusion poses the following problems.
   The actual temperature is higher than the temperature which has been set for the heater. This prevents accurate temperature control.   Increasing the distance between adjacent heaters to avoid heat diffusion increases the total area of the matrix.   Individual temperature control of heaters arranged in a matrix pattern is difficult to achieve because heaters vary in heat diffusion depending on their positions.   
 
         [0019]    An embodiment of the present invention to provide a reactor which is capable of accurate temperature control even though heat diffusion from adjacent heaters takes place. 
         [0020]    According to an embodiment of the present invention there is provided a reactor, including: a plurality of reaction regions; 
         [0021]    a plurality of heating elements, each arranged in each of the reaction regions; and 
         [0022]    cooling elements that cool other regions than reaction regions which are heated by the heating elements, wherein 
         [0023]    the heating element including a heater and a temperature detecting element and having
       detection means for detecting temperature from the temperature detecting element and   temperature control means for controlling the heater&#39;s temperature according to the detected temperature information,   the temperature control means performing
           processing for the temperature cycle which includes the first temperature holding control in denature treatment,   processing for the second temperature holding control in cooling from denature treatment to annealing treatment and also in annealing treatment,   processing for the first temperature rise control for the first heating from annealing treatment to extension treatment,   processing for the third temperature holding control in extension treatment, and   processing for the second temperature rise control for the second heating from extension treatment to denature treatment.   
               
 
         [0032]    According to another embodiment of the present invention there is provided a reactor, including: 
         [0033]    a plurality of reaction regions; 
         [0034]    a plurality of heating elements, each arranged in each of the reaction regions; and 
         [0035]    cooling elements that cool other regions than reaction regions which are heated by the heating elements, wherein 
         [0036]    the heating element including a heater and a temperature detecting element and having
       detection means for detecting temperature from the temperature detecting element and   temperature control means for controlling the heater&#39;s temperature according to the detected temperature information,   the temperature control means performing processing includes
           a first temperature holding control in denature treatment,   a temperature down control in cooling from denature treatment to annealing treatment,   a second temperature holding control in annealing treatment and extension treatment, and   a temperature rise control in heating from extension treatment to denature treatment.   
               
 
         [0044]    The present invention offers the advantage of performing accurate temperature control even when heat diffusion from adjacent heaters occurs. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0045]      FIG. 1  is a diagram showing an example of heat diffusion; 
           [0046]      FIG. 2  is a conceptual diagram showing the reactor according to an embodiment of the present invention; 
           [0047]      FIG. 3  is a schematic diagram showing the structure of the heating part in the reactor according to the embodiment of the present invention; 
           [0048]      FIG. 4  is a schematic diagram showing the structure of the system to perform temperature control feedback for the control unit in the reactor according to the embodiment of the present invention; 
           [0049]      FIG. 5  shows one example of the control parameters used in this embodiment; 
           [0050]      FIG. 6  is a flow chart to illustrate the basic feed back control in this embodiment; 
           [0051]      FIG. 7  is a flow chart to illustrate the PCR process control; 
           [0052]      FIG. 8  is a diagram listing the control processes (phases) in this embodiment; 
           [0053]      FIG. 9  is a flow chart to illustrate the action of the phase to set the potentiometer for temperature measurement; 
           [0054]      FIG. 10  is a flow chart to illustrate the action of the phase to acquire AD data; 
           [0055]      FIG. 11  is a flow chart to illustrate the action of the phase to calculate the amount of heater control; 
           [0056]      FIG. 12  shows one example of the control subphases in this embodiment; 
           [0057]      FIG. 13  is a flow chart to illustrate the action of the Peltier control phase; 
           [0058]      FIG. 14  is a flow chart to illustrate the action of the heater control phase; 
           [0059]      FIG. 15  is a schematic diagram showing the structure of the heater matrix device according to the embodiment of the present invention; 
           [0060]      FIG. 16  is a circuit diagram showing a first example of the structure of the heater unit in the heater matrix device according to the embodiment of the present invention; 
           [0061]      FIG. 17  is a circuit diagram showing one activated state of the circuit shown in  FIG. 16 ; 
           [0062]      FIG. 18  is a circuit diagram showing another activated state of the circuit shown in  FIG. 16 ; 
           [0063]      FIG. 19  is a circuit diagram showing a modified example of the circuit shown in  FIG. 16 ; 
           [0064]      FIG. 20  is a circuit diagram showing another modified example of the circuit shown in  FIG. 16 ; 
           [0065]      FIG. 21  is a circuit diagram showing further another modified example of the circuit shown in  FIG. 9 ; 
           [0066]      FIG. 22  is a circuit diagram showing further another modified example of the circuit shown in  FIG. 16 ; 
           [0067]      FIG. 23  is a circuit diagram showing a typical example of the circuit shown in  FIG. 16 ; 
           [0068]      FIG. 24  is a circuit diagram showing a modified example of the circuit shown in  FIG. 16 ; 
           [0069]      FIG. 25  is a circuit diagram showing another modified example of the circuit shown in  FIG. 9 ; 
           [0070]      FIG. 26  is a schematic diagram showing the structure of the heater matrix device having the heater unit shown in  FIG. 18 ; 
           [0071]      FIG. 27  is a circuit diagram showing another modified example of the circuit shown in  FIG. 9 ; 
           [0072]      FIG. 28  is a circuit diagram showing further another modified example of the circuit shown in  FIG. 9 ; 
           [0073]      FIG. 29  is a schematic diagram showing the structure of the temperature detecting matrix device according to the embodiment of the present invention; 
           [0074]      FIG. 30  is a circuit diagram showing the structure of the temperature detecting unit according to the embodiment of the present invention; 
           [0075]      FIG. 31  is a graph showing the dependence of dark current on temperature; 
           [0076]      FIG. 32  is a graph showing how temperature depends on the forward voltage of the PIN diode which is produced when the PIN diode is given a certain forward current; 
           [0077]      FIG. 33  is a schematic diagram showing the structure of the fluorescence detecting matrix device according to the embodiment of the present invention; 
           [0078]      FIG. 34  is a circuit diagram showing the structure of the fluorescence detecting unit according to the embodiment of the present invention; 
           [0079]      FIG. 35  is a schematic diagram showing the structure of the heater temperature detecting matrix device according to the embodiment of the present invention; 
           [0080]      FIG. 36  is a circuit diagram showing the structure of the heater temperature detecting unit according to the embodiment of the present invention; 
           [0081]      FIG. 37  is a graph showing the relation between the current of the heater unit and the voltage detected in response to current flowing through the PIN diode of the temperature detecting unit; 
           [0082]      FIG. 38  is a schematic diagram showing the structure of the temperature fluorescence detecting matrix device according to the embodiment of the present invention; 
           [0083]      FIG. 39  is a circuit diagram showing the structure of the temperature fluorescence detecting unit according to the embodiment of the present invention; 
           [0084]      FIG. 40  shows how the temperature fluorescence detecting unit according to the embodiment of the present invention performs temperature detection and fluorescence detection depending on whether the transistors as switches turn on and off; 
           [0085]      FIG. 41  is a diagram illustrating how temperature detection is performed by the temperature fluorescence detecting unit according to the embodiment of the present invention; 
           [0086]      FIG. 42  is a diagram illustrating how fluorescence detection is performed by the temperature fluorescence detecting unit according to the embodiment of the present invention; 
           [0087]      FIG. 43  is a diagram illustrating the fluorescence detection; 
           [0088]      FIG. 44  is a schematic diagram showing the structure of the heater temperature fluorescence detecting matrix device according to the embodiment of the present invention; and 
           [0089]      FIG. 45  is a circuit diagram showing the structure of the heater temperature fluorescence detecting unit according to the embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0090]    The embodiments of the present invention will be described below with reference to the accompanying drawings. 
         [0091]    The embodiments illustrated in the accompanying drawings represent merely some typical ones of the present invention, and they should not be construed to restrict the scope of the present invention. 
         [0092]    The drawings used hereunder show the structure of the apparatus in a simplified manner for the convenience of illustration. 
         [0093]      FIG. 2  is a conceptual diagram showing the reactor according to the embodiment of the present invention. 
         [0094]    The reactor shown herein may be properly changed in size and layer structure according to objects. The shape and structure of the reactor  10  may be designed or modified within the scope of the present invention. 
         [0095]    As shown in  FIG. 2 , the reactor  10  according to an embodiment of the present invention is composed of a well substrate  11 , a heater substrate  12 , a heating part (heater)  13 , a reaction region  14  formed in the well substrate  11 , a cooling part  15 , and a radiator  16 . 
         [0096]    As explained above, the reactor  10  has the well substrate  11 , which has a plurality of reaction regions  14 , and the heating part  13 , which heats the reaction region  14 . 
         [0097]    The cooling part  15  is a Peltier element which absorbs heat. Absorbed heat is released by the radiator  16 . 
         [0098]    The reaction regions  14  are intended for reactions under different conditions. Therefore, they permit a comprehensive analysis if reaction conditions are established individually for them. 
         [0099]      FIG. 3  is a schematic diagram showing the structure of the heating part in the reactor according to the embodiment of the present invention. 
         [0100]    According to this embodiment, the reactor  10  has the reaction regions  14  arranged in a matrix pattern and each reaction region is provided with the heating part  13 . All of the heating part  13  are arranged in a matrix pattern in the X and Y directions, as shown in  FIG. 3 . 
         [0101]    This structure permits the semiconductor heat generating elements  20  to be controlled collectively. 
         [0102]      FIG. 4  is a schematic diagram showing the structure of the system to perform temperature control feedback for the control unit in the reactor according to the embodiment. 
         [0103]    This system is intended to feed back the amount of heat generated by the semiconductor heat generating element  20  of the heating part (heater)  13  and also to feed back the temperature detected by the temperature detecting element  21 . To this end, it is composed of a current control circuit  22 , a digital potentiometer  23 , a control unit (CPU)  24 , an analog-digital converter (ADC)  25 , and a temperature detecting circuit  26 , a potentiometer for temperature measurement  27 , a constant current circuit  28  and a memory  29 . 
         [0104]    The CPU  24  has the memory  29  inside, which stores parameters such as temperature information. It performs control in the same way even though it has the memory  29  outside. 
         [0105]    The CPU  24  as the temperature control means performs processing for the temperature cycle which includes the first temperature holding control in denature treatment, the second temperature holding control in cooling from denature treatment to annealing treatment and also in annealing treatment, the first temperature rise control for the first heating from annealing treatment to extension treatment, the third temperature holding control in extension treatment, and the second temperature rise control for the second heating from extension treatment to denature treatment. 
         [0106]    Also, the CPU  24  performs processing which includes the first temperature holding control in denature treatment, the second temperature holding control in cooling from denature treatment to annealing treatment and also in annealing treatment and extension treatment, and the temperature rise control in heating from extension treatment to denature treatment. 
         [0107]    Incidentally, the temperature control means includes an analog-digital converter. 
         [0108]    The CPU  24  also performs processing to detect temperature from the temperature detecting element  21 , to calculate the amount of heater control, to control the heater  13 , and to control the cooling element  15 . 
         [0109]    The CPU  24  also detects temperature from the temperature detecting element  21  by controlling current to be applied to the temperature detecting element  21  and converting the voltage of the temperature detecting element  21  by means of an analog-digital converter  25 . 
         [0110]      FIG. 5  shows one example of the control parameter used in the embodiment of the present invention. 
         [0111]    The control parameters include the type of reaction, the duration of one cycle, the holding time, the anneal temperature, the heater control ON/OFF, the number of loops, the control phase, the heater output, and others. 
         [0112]      FIG. 6  is a flow chart illustrating the fundamental feedback control according to the embodiment. 
         [0113]    The fundamental feedback control according to the embodiment is carried out as explained below with reference to  FIG. 6 . 
         [0114]    The PCR process control in Step S 40  is carried out periodically at fixed intervals. The lapse of the cycle time is determined in step S 10 . If it is determined that the cycle time has elapsed, the control phase parameter is changed into the potentiometer setting phase for temperature measurement in step S 20 . 
         [0115]    Then, the control phase data is stored as the control parameter in step S 30 . 
         [0116]      FIG. 7  is a flow chart illustrating how to control PCR process. 
         [0117]      FIG. 8  is a list of controls (phases) in this embodiment. 
         [0118]    The action of the PCR process will be explained below with reference to the flow chart shown in  FIG. 7 . 
         [0119]    Each phase is processed as the control phase data is acquired from the control parameter S 100  in Step S 110 . 
         [0120]    Determination is made in Step S 120  as to whether or not the phase is in the course of control. 
         [0121]    If the phase is not in the course of control, the control phase is checked for its kind in Step S 130 . 
         [0122]    In the case of potentiometer setting for temperature measurement, the control phase is changed into the phase in the course of potentiometer setting for temperature measurement in Step S 140 . And, the potentiometer for temperature measurement is set up in Step S 190 . 
         [0123]    In the case of acquisition of AD value resulting from conversion from analog data of PIN diode into digital data, the control phase is changed into the phase in the course of AD value acquisition in Step S 150 . And, the AD value is received in Step S 200 . 
         [0124]    In the case where the amount of heater control is calculated, the control phase is changed into the phase in the course of calculating the amount of heater control in Step S 160 . And, the amount of heater control is calculated in Step S 210 . 
         [0125]    In the case of heater control, the control phase is changed into the phase in the course of heater control in Step S 170 . And, the heater control is performed in Step S 220 . 
         [0126]    In the case of Peltier control, the control phase is changed into the phase in the course of Peltier control in Step S 180 . And, the Peltier control is performed in Step S 230 . 
         [0127]      FIG. 9  is a flow chart illustrating how the phase of potentiometer setting for temperature measurement works. 
         [0128]    The action of the phase of potentiometer setting for temperature measurement is explained below with reference to  FIG. 9 . 
         [0129]    The heater to be controlled is selected in Step S 310 . 
         [0130]    In Step S 320 , the potentiometer for temperature measurement is set up which is connected to the temperature detecting element in the same cell as the heater so that the temperature of the selected heater is measured. 
         [0131]    After the setting of potentiometer for temperature measurement is completed, the control parameter is changed into the AD data acquisition phase in Step S 330 . 
         [0132]      FIG. 10  is a flow chart illustrating how the AD data acquisition phase works. 
         [0133]    The action of the AD data acquisition phase is explained below with reference to  FIG. 10 . 
         [0134]    A command is sent to the analog-digital converter (ADC) to start analog-digital conversion in Step S 340 . 
         [0135]    After AD conversion is completed, digital data is received from the analog-digital converter in Step S 350 . 
         [0136]    After data acquisition, the control phase is changed into the heater control calculation phase in Step S 360 . 
         [0137]      FIG. 11  is a flow chart illustrating how the phase of calculating the amount of heater control works. 
         [0138]    The action of the phase of calculating the amount of heater control is explained below with reference to  FIG. 11 . 
         [0139]    The temperature information and the control subphase are acquired from the control parameter in Step S 410 . 
         [0140]    The control subphase represents the control step in PCR process when the heater output is calculated. 
         [0141]      FIG. 12  is a list showing the control subphase in this embodiment. 
         [0142]    Determination is made as to whether or not there exists difference between the present temperature and the target temperature in Step S 430 . 
         [0143]    If there exists difference between the present temperature and the target temperature, the optimum heater output for the heater is calculated from the difference between the target temperature and the present temperature in Step S 440 . 
         [0144]    If there exists no difference between the present temperature and the target temperature, determination is made as to whether or not the control subphase is the temperature holding phase in Step S 450 . 
         [0145]    If the control subphase is the temperature holding phase, the control subphase is changed into the next phase and the result is stored in the control parameter in Step S 480 . 
         [0146]    If the control subphase is not the temperature holding phase or if Step S 440  or Step S 450  has been completed, the heater output is stored in the control parameter in Step S 460 . 
         [0147]    The Steps from S 430  to S 460  are repeated as many times as the number of heaters to be controlled in Step S 420 . 
         [0148]    The control phase is changed into the Peltier control phase in Step S 470 . 
         [0149]      FIG. 13  is a flow chart illustrating how the Peltier control phase works. 
         [0150]    The action of the Peltier control phase is explained below with reference to the flow chart shown in  FIG. 13 . 
         [0151]    The Peltier set temperature and the present Peltier temperature are acquired from the control parameter in Step S 510 . 
         [0152]    The Peltier output is calculated from the target Peltier temperature and the present Peltier temperature in Step S 520 . 
         [0153]    The optimum Peltier temperature is set from the Peltier set temperature and the present Peltier temperature (both acquired in Steps S 510  and S 520 ) in Step S 530 . 
         [0154]    The Peltier set temperature is stored in the control parameter in Step S 540 . 
         [0155]    The control phase is changed into the heater control phase in Step S 550 . 
         [0156]      FIG. 14  is a flow chart illustrating how the heater control phase works. 
         [0157]    The action of the heater control phase is explained below with reference to the flow chart shown in  FIG. 14 . 
         [0158]    The heater set value is acquired from the control parameter in Step S 610 . 
         [0159]    The set value is sent to each heater in Step S 620 . 
         [0160]    The specific method of output is explained with reference to  FIG. 4 . The CPU  24  supplies the digital potentiometer  23  with digital values. The heating element  13  is kept at a controlled temperature by the digital potentiometer  23  and the current control circuit  22 . 
         [0161]    As mentioned above, this embodiment allows more accurate temperature control through temperature control feedback based on the temperature information detected by means of the temperature detecting element  21 . 
         [0162]    In the event of heat diffusion as shown in  FIG. 1 , the temperature detecting element  21  observes heat generation exceeding the set value and rapidly changes the set value of the heater  20 . In addition, the fact that the heater  20  is provided individually with the temperature detecting element  21  for control to be performed independently and individually permits all the heaters  20  to be controlled accurately regardless of their position in the matrix. 
         [0163]    Explained below is the heat control matrix device to which the above-mentioned heater control method can be applied and which can be applied to the reactor  10  for PCR process. 
         [0164]    The reactor for PCR process includes, for example, the real-time PCR apparatus to detect gene expression. 
         [0165]    The PCR apparatus is basically provided with the semiconductor heat generating part (heater)  20 , the temperature detecting part (element)  21 , and the fluorescence detector. 
         [0166]    The PCR apparatus may be constructed such that the reaction signal is received by a separate functioning part which is formed above or under the TFT substrate serving as the heating part. In this case the heater matrix should preferably be formed on a comparatively large transparent insulating substrate (such as glass) which will not prevent detection of fluorescence for reaction signals. 
         [0167]    To this end, it is desirable to use thin film transistors (TFT for short hereinafter) as the semiconductor elements from the standpoint of production cost and manufacturing process. 
         [0168]    It is known that, however, TFT is more liable to variation in manufacturing process and change with time than single-crystal semiconductor elements. 
         [0169]    To be more specific, the heater in the PCR apparatus should preferably be formed by low-temperature polysilicon process that forms TFT (suitable for current drive) on a large glass substrate. This process usually consists of coating a glass substrate with an amorphous silicon film and crystallizing by laser annealing for protecting the substrate from thermal deformation). 
         [0170]    The disadvantage of this process is that a large glass substrate involves difficulties in uniform irradiation with laser energy and hence inevitably varies in the state of crystallization of polysilicon from one place to another. As the result, TFTs formed on the same substrate may vary in threshold value (Vth) by more than hundreds of mV or even more than 1 V. With such TFTs, it is difficult to construct a highly accurate and reliable PCR reactor by the existing technology. 
         [0171]    In order to overcome this difficulty, the following embodiment is proposed in which the PCR apparatus with TFTs formed on a transparent insulating substrate achieves highly accurate temperature control with the help of a heat control matrix device. 
         [0172]    To be concrete, the embodiment mentioned below is designed to achieve highly accurate temperature control by constituting heater units from TFTs with current copy circuit or current mirror circuit. Moreover, it is also designed to achieve a highly accurate comprehensive analysis by performing feedback with the help of a PIN diode as a sensor and by detecting fluorescence as amplification reaction signals with the help of parallel PIN diode. 
         [0173]    The heat control matrix device pertaining to this embodiment may also be used as the heating part  13 , temperature detecting part, or fluorescence detecting part of PCR  1  mentioned above. 
         [0174]    The embodiment for the heat control matrix device covers the following ones which will be described below one by one.
   Heater matrix device that can be used as the heating part (or heat generating part) capable of controlling the amount of heat generation.   Temperature detecting matrix device that can be used as the temperature detecting part.   Fluorescence detecting matrix device that can be used as the fluorescence detecting part.   Temperature fluorescence detecting matrix device that functions as both the temperature detecting matrix device and the fluorescence detecting matrix device.   Heater temperature detecting matrix device that functions as both the heater matrix device and the temperature detecting matrix device.   Heater temperature fluorescence detecting matrix device that functions as both the heater matrix device and the temperature fluorescence detecting matrix device.   
 
         [0181]    The heater matrix device will be explained first. 
       &lt;Heater Matrix Device&gt; 
       [0182]      FIG. 15  is a schematic diagram showing the structure of the heater matrix device according to the embodiment of the present invention. 
         [0183]    The heater matrix device  100  shown in  FIG. 15  consists of the cell array  101  with heater units  110  arranged in an m x n matrix pattern, the data line driving circuit (DTDRV)  102 , the scanning line driving circuit (WSDRV)  103 , the data lines DTL 101  . . . DTL 10   n  which give the heater units  110  the information about the amount of heat generation, and the scanning lines WSL 101  . . . WSL 10   m  which select the heater units  110 , write the information about the amount of heat generation, and supply current in response to the written information about the amount of heat generation. 
         [0184]    The data line driving circuit  102  applies signal current to each of the data lines DTL 101  . . . DTL 10   n  in synchronism with the driving timing of the scanning lines WSL 101  . . . WSL 10   m  of the scanning line driving circuit  103 , thereby writing the information about the amount of heat generation to the heater unit  110  as the heating part for each row. 
         [0185]    The scanning line driving circuit  103  sequentially selects the scanning lines WSL 101  . . . WSL 10   m  for pulse driving. The scanning line driving circuit  103  drives the scanning lines WSL 101  . . . WSL 10   m  to control the timing at which the heater unit  110  acquires the information about the amount of heat generation. 
         [0186]    The scanning line driving circuit  103  writes the information about the amount of heat generation to the heater unit  110  and then unselects the scanning lines WSL 101  . . . WSL 10   m , thereby continuing to supply each heat generating part (heater unit) with the driving current of the same magnitude as the signal current. 
         [0187]    In this way it supplies each heater unit  110  with as much current as necessary to generate heat in a desired amount. 
         [0188]    Incidentally, the data line driving circuit  102  transfers signal current, which is the information about the amount of heat generation in response to the control signal CTL supplied from the temperature detecting and controlling system (not shown), to each data line DTL 101  DTL 10   n,  thereby controlling the amount of heat generated by each heater unit  110 . 
         [0189]    In other words, the amount of heat generated by the heater unit  110  is controlled by the information about the amount of heat generation which has been written. 
         [0190]    The heater unit  110  is constructed as explained in the following. 
         [0191]      FIG. 16  is a circuit diagram showing a first example of the structure of the heater unit in the heater matrix device according to the embodiment of the present invention.  FIG. 17  is a circuit diagram showing one activated state of the circuit shown in  FIG. 16 .  FIG. 18  is a circuit diagram showing another activated state of the circuit shown in  FIG. 16 . 
         [0192]    The heater unit  110  shown in  FIG. 16  consists of the transistor T 111  which is an n-channel insulated gate transistor, the switches SW 111 , SW 112 , and SW 113 , the capacitor C 111 , and the nodes ND 111 , ND 112 , and ND 113 . Incidentally, symbols g, d, and s in  FIG. 9  represent gate, drain, and source, respectively, and symbol Cs denotes the capacity of the capacitor C 111 . 
         [0193]    The heater unit  110  is constructed such that the transistor  111  which functions as a driving transistor has its drain d, gate g, and source s connected respectively to the nodes ND 111 , ND 112 , and ND 113 . The node ND 113  is connected to the ground potential GND. 
         [0194]    The switch SW 111  is connected to the data line DTL which transmits signal current I sig  and the node ND 113 . The switch SW 112  is connected to the node ND 111  and the node ND 112 . The switch SW 113  is connected to the node ND 111  and the source potential VDD. 
         [0195]    The capacitor C 111  is connected to the node ND 112  through its first electrode and the node ND 113  (or ground potential GND) through its second electrode. 
         [0196]    In the heater unit  110 , the switches SW 111  and SW 112  turn on and off in phase in response to the level of the scanning lines WSL 101  . . . WSL 10   m.    
         [0197]    The switch SW 113  turn on and off complimentarily to the switches SW 111  and SW 112  in response to the level of the scanning lines WSL 101  . . . WSL 10   m.    
         [0198]    Of these constituents, the switches SW 111  and SW 112  receive the information about the amount of heat generation which is given to the data line DTL when the scanning line WSL is selected. 
         [0199]    The capacitor C 111  holds the information about the amount of heat generation even after the scanning line has been unselected. 
         [0200]    And, the transistor T 111  and the switch SW 113  allow current to flow according to the written information about the amount of heat generation, and they function as the driver to generate heat in response to the current. 
         [0201]    In the heater unit  110 , the driving current flows from the source potential VDD to the ground potential GND through the transistor T 111  and the switch SW 113 . 
         [0202]    The resistance of the transistor T 111  and the switch SW 113  generates Joule heat to be used as the heat source. 
         [0203]    Incidentally, the transistor T 111  is not limited to n-channel one; it may be replaced by p-channel one. 
         [0204]    In this embodiment, the information about the amount of heat generation which is transmitted from the data line DTL is signal current I sig . Therefore, it is desirable to construct a circuit which controls heat by converting this signal current into signal voltage. The action of the circuit shown in  FIG. 9  will be described with reference to  FIGS. 17 and 18 . 
         [0205]      FIG. 17  shows the action of writing to the heater unit  110  the information about the amount of heat generation in the form of current level (or signal current). During this writing action, the switches SW 111  and SW 112  are on and the switch SW 113  is off. 
         [0206]    The transistor T 111  permits the signal current I sig  to flow, with the drain d and the gate g shorted by the switch SW 2 . See  FIG. 17 . 
         [0207]    As the result, the signal voltage V gs  occurs between the gate and the source in response to the value of the signal current I sig . 
         [0208]    In the case where the transistor T 111  is that of enhancement mode (or the threshold value V th &gt;0), it works in the saturation region. Thus the signal current I sig  and the signal voltage V gs  are related to each other by the following well-known equation. 
       [Equation 1] 
       [0209]      I sig   =μ·C   ox   ·W/L/ 2·( V   gs   −V   th   2    (1) 
         [0210]    In the equation above, μ denotes the carrier mobility, C ox  denotes the gate capacity per unit area, W denotes the channel width, and L denotes the channel length. 
         [0211]    When the circuit becomes stable, the switch SW 112  turns off so that the gate-source voltage V sg  is stored in the capacitor C 111 . Then the switch SW 111  turns off to complete the signal writing action. 
         [0212]    Then, the switch SW 113  turns on at any timing as shown in  FIG. 18 , so that current flows from the source voltage VDD to the ground potential GND. At this time, the driving current I drv  flowing through the transistor T 111  is represented by the equation (2) below irrespective of the source-drain voltage V ds  if source voltage VDD is set sufficiently high and the resistance of the switch SW 113  is set sufficiently low so that the transistor T 111  works in the saturation region. And the driving current I drv  coincides with the signal current I sig  mentioned above. 
       [Equation 2] 
       [0213]      I drv   =μ·C   ox   ·W/L/ 2·( V   gs   −V   th ) 2    (2) 
         [0214]    In general, the parameters that appear in the right side of the equations (1) and (2) above vary from one substrate to another or vary from one position to another in the same substrate. However, driving as shown in  FIGS. 17 and 18  makes the signal current I sig  to coincide with the driving current I drv  irrespective of the values of the individual parameters. 
         [0215]    Since the signal current I sig  mentioned above can be generated accurately by the control circuit outside the heater matrix device, Joule heat generated by the heater unit (shown in  FIG. 16 ) has an accurate value determined by VDD×I sig  (or the product of the source voltage VDD and the signal current I sig ) without being affected by variation in transistor characteristics. 
         [0216]      FIG. 19  is a circuit diagram showing a modified example of the circuit shown in  FIG. 16 . 
         [0217]    The circuit shown in  FIG. 19  differs from that shown in  FIG. 16  in the connection of the switch SW 112 . To be specific, the switch SW 112  is placed between the data line DTL and the node ND 112  instead of being placed between the node ND 111  and the node ND 112 . 
         [0218]    The circuit shown in  FIG. 19  is equivalent in its action to the circuit shown in  FIG. 16 ; the difference is that the node ND 112  is connected to the data line DTL through the switch SW 111  and the node ND 111  in  FIG. 16 . 
         [0219]    The circuit shown in  FIG. 119  works in the same way as that shown in  FIG. 16 . That is, the switches  111  and  112  turn on and the switch SW 113  turns off at the time of signal writing. And, the switches SW 111  and SW 112  turn off and the switch SW 113  turns on at the time of heat generation. 
         [0220]    The circuit shown in  FIG. 119  functions in the same way as the circuit shown in  FIG. 16 . 
         [0221]      FIG. 20  is a circuit diagram showing another modified example of the circuit shown in  FIG. 16 . 
         [0222]    The circuit shown in  FIG. 20  differs from that shown in  FIG. 16  in that the transistor T 111  is a p-channel transistor and the direction of current is reversed. 
         [0223]    In the case of the circuit shown in  FIG. 20 , the source s of the transistor T 111  is connected to the source potential (node ND 113 ), the drain d of the transistor T 111  is connected to the node ND 111 , and the switch SW 113  is connected to the intermediate point between the node ND 111  and the ground potential GND. 
         [0224]    The circuit shown in  FIG. 20  is in principle common to that shown in  FIG. 16  and both function in the same way. 
         [0225]    According to the embodiment of the present invention, it is desirable to employ a p-channel insulation gate transistor (PMOS) for the low-temperature polysilicon thin film transistor (TFT) because of its stable characteristics. 
         [0226]      FIG. 21  is a circuit diagram showing further another modified example of the circuit shown in  FIG. 16 . 
         [0227]    The circuit shown in  FIG. 21  is identical with that shown in  FIG. 16  in the way the switches SW 111 , SW 112 , and SW 113  are controlled but it is so designed as to draw the signal current I sig  from the source of the transistor T 111 . 
         [0228]    In the case of the circuit shown in  FIG. 21 , the transistor T 111  is an n-channel transistor and the drain d of the transistor T 111  is connected to the source potential (VDD), the source s of the transistor T 111  is connected to the node ND 111 , and the switch SW 113  is connected to the intermediate point between the node ND 111  and the ground potential GND. 
         [0229]    The circuit shown in  FIG. 21  works in the same way as that shown in  FIG. 16  in that it permits the signal current I sig  to flow while the gate and the drain are shorted to each other and the resulting gate-source voltage V gs  is stored in the capacitor C 111 . Both function in the same way. 
         [0230]      FIG. 22  is a circuit diagram showing further another modified example of the circuit shown in  FIG. 16 . 
         [0231]    The circuit shown in  FIG. 22  differs from that shown in  FIG. 16  in that it additionally has the transistor T 112 , the switch SW 114 , and the capacitor  112 . The switch SW 114  is controlled in the same way as the switch SW 112 . 
         [0232]    The transistor T 112  has its gate connected to the node ND 114 , its drain connected to the node ND 113 , and its source connected to the ground potential GND. The switch SW 114  is connected to the intermediate point between the node ND 113  and the node ND 114 . The capacitor C 112  has its first electrode connected to the node ND 114  and its second electrode connected to the ground potential GND. 
         [0233]    This circuit works in the following way. 
         [0234]    In the circuit shown in  FIG. 16 , the signal current I sig  is given by the equation ( 1 ), the drive current I drv  is given by the equation ( 2 ), and the signal current I sig  coincides with the drive current I drv , as mentioned above. This fact accords with the principle that the current flowing through a MOS (metal oxide semiconductor) transistor depends only on the gate-source voltage V gs  irrespective of the drain-source voltage V ds  for action in the saturation region. 
         [0235]    However, in a practical transistor, an increase in the drain-source voltage V ds  usually results in a slight increase in the drain-source current I ds . Probably, this is due to the back gate effect (the potential of the drain affects the conduction state of the channel) and the short channel effect (the depletion layer at the end of the drain extends to the source side to shorten the effective channel length L). 
         [0236]    This will be illustrated with reference to the circuit shown in  FIG. 16 . In the case where a comparatively small signal current I sig  is written, the gate-source voltage V gs  that arises according to the equation (1) is a comparatively small value and the drain-source voltage V ds  is a small value equal to the gate-source voltage V gs . 
         [0237]    On the other hand, at the time of driving, the drive current I drv  is small and hence the voltage drive across the switch SW 113  is small, and the drain-source voltage V ds  of the transistor T 111  becomes a larger value than that at the time of writing. Thus, usually the drain-source voltage V ds  at the time of writing is not equal to that at the time of driving. Consequently, the signal current I sig  and the drive current I drv  do not exactly coincide with each other. This may be a reason why the desired amount of heat generation is not obtained. 
         [0238]    By contrast, the circuit shown in  FIG. 22  functions in the following manner. 
         [0239]    As in the circuit shown in  FIG. 16 , the drain-source voltage V ds  of the transistor T 111  at the time of writing usually varies from that at the time of driving. 
         [0240]    However, when the drain-source voltage V ds  is large at the time of driving, the drive current I drv  becomes larger than the signal current I sig , however, if the transistor T 112  is working in its saturation state (or working close to the constant current source), its differential resistance takes on a very large value. 
         [0241]    Thus, with a slight increase in the drive current I drv , the source potential of the transistor T 111  greatly increases. This reduces the gate-source voltage V gs  of the transistor T 111  and also decreases the drive current I drv . 
         [0242]    As the result, the drive current I drv  does not increase so much relative to the signal current I sig , and coincidence between the drive current I drv  and signal current I sig  becomes better than that in the case shown in  FIG. 16 . 
         [0243]      FIG. 23  is a circuit diagram showing a typical example of the circuit shown in  FIG. 23 . 
         [0244]    The circuit shown in  FIG. 23  is composed of the p-channel transistor T 113  (which functions as the switch SW 111 ), the p-channel transistor T 114  (which functions as the switch SW 112 ), and the n-channel transistor T 115  (which functions as the switch SW 113 ). 
         [0245]    These three transistors T 113 , T 114 , and T 115  have their gates commonly connected to the scanning line WSL. When the scanning line WSL is at a low level, signal writing is accomplished, and when it is at a high level, drive action is performed. 
         [0246]    As mentioned later, the present invention may be modified such that the transistors T 113 , T 114 , and T 115  do not have their gates commonly connected to the scanning line WSL. However, the circuit shown in  FIG. 22  is desirable because of its simple structure. 
         [0247]      FIG. 24  is a circuit diagram showing a modified example of the circuit shown in  FIG. 23 . 
         [0248]    The circuit shown in  FIG. 24  differs from that shown in  FIG. 23  in that it has the transistors T 114   a  and T 114   b.    
         [0249]    TFTs are usually liable to become defective in the manufacturing process. For example, there is the possibility that the switch transistor permits a minute leakage current to flow when it is off. 
         [0250]    The circuit shown in  FIG. 23  works in such a way that when a leakage current occurs in the transistor T 114 , the leakage current changes the voltage held in the capacitor C 111 . This leads to a situation in which adequate heat generation cannot be maintained. 
         [0251]    By contrast, the circuit shown in  FIG. 24 , which has the two transistors T 114   a  and T 114   b  connected in series in place of the one transistor T 114  used in the circuit shown in  FIG. 23 , is able to suppress leakage current as a whole even though one of the two transistors is defective. 
         [0252]    By the same token, the transistor T 114  may be replaced by three or more transistors connected in series or each of the transistors T 113  and T 115  may be replaced by more than one transistor connected in series. 
         [0253]      FIG. 25  is a circuit diagram showing another modified example of the circuit shown in  FIG. 16 . 
         [0254]      FIG. 26  is a schematic diagram showing the structure of the heater matrix device having the heater unit shown in  FIG. 25 . 
         [0255]    The circuit shown in  FIG. 25  is constructed such that the transistor T 115  is controlled independently of the transistors T 113  and T 114 . 
         [0256]    The heater matrix device  100 A shown in  FIG. 26  differs from that shown in  FIG. 15  in that it additionally has the drive line driving circuit  104  and the drive scanning lines DSL 101  . . . DSL 10   m  which drive the transistor T 115 . 
         [0257]    In this case, at the time of signal writing, the write scanning lines SWL 101  . . . SWL 10   m  and the drive scanning lines DSL 101  . . . DSL 10   m  are kept low. 
         [0258]    After writing has been completed (or after the write scanning lines have been made high), the drive scanning lines DSL 101  . . . DSL 10   m  are made high at arbitrary timing, so that heat generation is activated. 
         [0259]    Conversely, as the drive scanning lines DSL 101  . . . DSL 10   m  are made low, heat generation can be suspended easily; this is desirable when it is necessary to lower temperature rapidly. This leads to capability of adjusting the duration of heat generation. That is, the device can produce a very small amount of heat very accurately even when the signal current source cannot generate a small current accurately. 
         [0260]    Incidentally, in the case where it is desirable to avoid intermittent heating due to the foregoing action, the steps for heat generation and suspension of heat generation should be repeated several times in the period from the writing of the information about the amount of heat generation to the next writing of the information about the amount of heat generation. This ensures temporal stability of heat generation. 
         [0261]      FIG. 27  is a circuit diagram showing another modified example of the circuit shown in  FIG. 16 . 
         [0262]    In  FIG. 27 , the supply potential line LVDD is parallel to the scanning line WSL and the diode D 111  is equivalent to the switch SW 113  shown in  FIG. 16 . 
         [0263]    At the time of signal writing, the source voltage VDD is brought to a low level to turn off the diode D 111 , and at the time of driving, the source voltage VDD is brought to a high level to turn on the diode D 111 . In this way the diode D 111  functions as a switch Thus, the circuit shown in  FIG. 27  functions in the same way as the circuit shown in  FIG. 25 . 
         [0264]      FIG. 28  is a circuit diagram showing further another modified example of the circuit shown in  FIG. 16 . 
         [0265]    The circuit shown in  FIG. 28  differs from that shown in  FIG. 16  in that it has the transistor T 116  to convert the signal current I sig  into a voltage and the transistor T 111  to permit current to flow for heat generation. 
         [0266]    The transistor T 116  has its drain and gate connected to each other, with the connecting point connected to the nodes ND 111  and ND 112 , and the transistor T 116  has its source connected to the ground potential GND. 
         [0267]    At the time of signal writing, the switches SW 111  and SW 112  becomes on to supply the signal current I sig  to the transistor T 116 . In this situation, the following equation (3) holds. 
       [Equation 3] 
       [0268]      I sig   =μ·C   ox   −W 1/ L/ 2·( V   gs   −V   th ) 2    (3) 
         [0269]    The parameters in Equation (3) are defined as in Equation (1). The transistor T 116  has a channel width of W 1 . At the time of driving, the switches SW 111  and SW 112  tun off. 
         [0270]    On the other hand, the capacitor C 111  holds the gate-source voltage V gs  due to writing, so that the drive current I drv  flowing through the transistor T 111  accords with the following equation (4). 
       [Equation 4] 
       [0271]      I drv   =μ·C   ox   ·W 2/ L/ 2·( V   gs −V th ) 2    (4) 
         [0272]    Since the transistor T 111  has channel width of W 2  and the transistors T 116  and T 111  are formed in a minute heating part, C ox  and V th , which are the parameters of the Transistors T 116  and T 111 , are considered to be equal to each other. Moreover, the channel length L can be designed to be identical for these transistors. As the result, the equations (3) and (4) yield the following equation (5). 
         [0000]      I drv /I sig   =W   2   /W   1    (5) 
         [0273]    In general, the parameters in the right side of the equations (3) and (4) above vary from one substrate to another or vary from one position to another in the same substrate. It is known that these parameters have nothing to do with the ratio between the signal current I sig  to the drive current I drv  which coincides with the ratio between the channel width of the transistor T 111  and the channel width of the transistor T 116 . 
         [0274]    This circuit differs from that shown in  FIG. 16  in that it makes it possible to arbitrarily adjust the ratio between the signal current I sig  and the drive current I drv . If it is desirable to generate a very small amount of heat but the external circuit cannot generate a very small amount of current, then this problem is solved by designing the channel width such that the right side of the equation (5) takes on a small value. Conversely, it is also easy to design such that a very small signal current I sig  can control a large drive current I drv . 
         [0275]    The foregoing is a description of the heater matrix device. 
         [0276]    The following is a description of the temperature detecting matrix device. 
       &lt;Temperature Detecting Matrix Device&gt; 
       [0277]      FIG. 29  is a schematic diagram showing the structure of the temperature detecting matrix device according to the embodiment of the present invention. 
         [0278]    The temperature detecting matrix device  200  shown in  FIG. 29  consists of the cell array  201  of temperature detecting units  210  arranged in an m x n matrix pattern, the current driving circuit (IDRV)  202 , the scanning line driving circuit (WSDRV)  203 , the voltage detecting lines (V)  204 - 1  . . .  204 - n,  the current driving lines IDL 201  . . . IDL 20   m,  the temperature sense lines TSL 201  . . . TSL 20   m,  and the scanning liens SSL 201  . . . SSL 20   m,  which select the temperature detecting units  210  and send the detected signals from the temperature detecting unit  210  to the temperature sense lines TSL 201  . . . TSL 20   m.    
         [0279]      FIG. 30  is a circuit diagram showing the structure of the temperature detecting unit according to the embodiment of the present invention. 
         [0280]    The temperature detecting unit  210  shown in  FIG. 30  has the PIN diode D 211 , the n-channel transistors T 211  and T 212  which function as switches, and the node ND 211 . 
         [0281]    The PIN diode  211  has its anode connected to the node ND 211  and its cathode connected to the ground potential GND. 
         [0282]    The transistor T 211  has its source and drain connected to the node ND 211  and the current driving line IDL, respectively. The transistor T 212  has its source and drain connected to the node ND 111  and the temperature detecting line TSL. 
         [0283]    And, the transistors T 211  and T 212  have their gates connected in common to the scanning line SSL. 
         [0284]    The transistors T 211  and T 212  turned on when the scanning line SSL is at a high level and are turned off when the scanning line SSL is at a low level. 
         [0285]    The temperature detecting unit  210  functions in the following manner. 
         [0286]    It is connected to the current source I 211  that supplies current I det  to the current driving line IDL, so that the forward current I det  flows to the PIN diode D 211  from the current source I 211  connected to the current driving line IDL when the scanning line SSL is at a high level. 
         [0287]    At the same time, the voltage detector  204  is connected to the temperature sense line TSL, so that the forward voltage that occurs in the PIN diode D 211  is detected. The voltage detector  204  may be an analog-digital converter. 
         [0288]    The temperature detecting unit  210  detects temperature as the PIN diode D 211  senses dark current. The thus detected temperature is referenced to control the amount of heat generation by each heater unit in the heater matrix device. 
         [0289]      FIG. 31  is a graph showing the dependence of dark current on temperature. 
         [0290]    This characteristic can be used to determine temperature from the detected current. 
         [0291]    When the PIN diode D 211  is given a certain forward current I det , it produces a forward voltage which is related with temperature as shown in  FIG. 32 . 
         [0292]    That is, the forward voltage changes linearly with temperature and hence the forward voltage of the temperature sense line TSL connected to the PIN diode D 211  gives the information about temperature. 
         [0293]    The following is a description of the fluorescence detecting matrix device. 
       &lt;Fluorescence Detecting Matrix Device&gt; 
       [0294]      FIG. 33  is a schematic diagram showing the structure of the fluorescence detecting matrix device according to the embodiment of the present invention. 
         [0295]    The fluorescence detecting matrix device  300  shown in  FIG. 33  consists of the cell array  301  of fluorescence detecting units  310  arranged in an m X n matrix pattern, the scanning line driving circuit (WSDRV)  303 , the reverse voltage line RVL 301 , the fluorescence detecting lines LSL 301  . . . LSL 30   n,  and the scanning lines SSL 301  . . . SSL 30   m  which select the detecting unit  310  and transfer the detecting signal from the fluorescence detecting unit  310  to the fluorescence detecting lines LSL 301  . . . LSL 30   n.    
         [0296]      FIG. 34  is a circuit diagram showing the structure of the fluorescence detecting unit according to the embodiment of the present invention. 
         [0297]    The fluorescence detecting unit  310  shown in  FIG. 34  consists of the PIN diode D 311 , the p-channel transistors T 311  and T 312  which function as switches, and the node ND 311 . 
         [0298]    The PIN diode D 311  has its anode connected to the node D 311  and its cathode connected to the ground potential GND. 
         [0299]    The transistor T 311  has its source and drain connected to the node ND 311  and the reverse voltage line RVL, respectively. The transistor T 312  has its source and drain connected to the node DN 311  and the fluorescence sense line LSL. 
         [0300]    The transistors T 311  and T 312  have their gates connected in common to the scanning line SSL. 
         [0301]    The transistors T 311  and T 312  turn on or off when the scanning line SSL is at a low level or at a high level, respectively. 
         [0302]    The fluorescence detecting unit  310  work in the following way. 
         [0303]    When the reverse voltage line RVL is connected to the negative voltage source and the scanning line SSL is at a low level, the PIN diode D 311  is reverse-biased by the negative voltage applied to the reverse voltage line RVL, and the reverse current IR flows. 
         [0304]    This reverse current I out  is detected by the fluorescence detecting line LSL. In this way fluorescence is detected. 
         [0305]    The following is a description of the heater temperature detecting matrix device. 
       &lt;Heater Temperature Detecting Matrix Device&gt; 
       [0306]      FIG. 35  is a schematic diagram showing the structure of the heater temperature detecting matrix device according to the embodiment of the present invention. 
         [0307]    The heater temperature detecting matrix device  400  shown in  FIG. 35  is a combination of the heater matrix device  100  shown in  FIG. 15  and the temperature detecting matrix device  200  shown in  FIG. 29 . Therefore, the same symbols are applied to those components in  FIG. 35  which are equivalent to those components in  FIGS. 15 and 29 , for easy understanding. 
         [0308]    The heater temperature detecting matrix device  400  shown in  FIG. 35  includes the cell array  401  of heater temperature detecting units  410  arranged in an m×n matrix pattern, the data line driving circuit (DTDRV)  102 , the scanning line driving circuit (WSDRV)  103 , the data lines DTL 101  . . . DTL 10   m  that supply information about the amount of heat generation to the heater unit  110 , the scanning lines WSL 101  . . . WSL 10   m  which select the heater unit  110 , write information about the amount of heat generation, and flow current in response to the written information about the amount of heat generation, the current driving circuit (IDRV)  202 , the scanning line driving circuit (WSDRV)  203 , the voltage detectors (V)  204 - 1  . . .  204 - n,  the current drive lines IDL 201  . . . IDL 20   m,  the temperature sense lines TSL 201  . . . TSL 20   m,  and the scanning lines SSL 201  . . . SSL 20   m  which select the temperature detecting unit  210  and transfer the detection signal of the temperature detecting unit  210  to the temperature detecting lines TSL 201  . . . TSLL 20   m.    
         [0309]      FIG. 36  is a circuit diagram showing the structure of the heater temperature detecting unit according to the embodiment of the present invention. 
         [0310]    The heater temperature detecting unit  410  shown in  FIG. 36  includes the heater unit shown in  FIG. 23  and the temperature detecting unit  210  shown in  FIG. 30 . 
         [0311]    Therefore, the same symbols are applied to those components in  FIG. 36  which are equivalent to those components in  FIGS. 15 and 30 , for easy understanding. 
         [0312]    The heater temperature detecting matrix device  400  shown in  FIG. 35  senses the amount of actual heat generation after written as information about the amount of heat generation by current copier, so that it is capable of controlling and correcting the temperature by sensing dark current by means of the PIN diode for current copier and the written amount of information about the amount of heat generation. 
         [0313]    In this case, the PIN diode D 211  detects temperature by relation between the current of the heater unit  110  and the voltage in response to current flowing through the PIN diode of the temperature detecting unit  210 . 
         [0314]      FIG. 37  is a graph showing the relation between the current of the heater unit and the voltage detected in response to current flowing through the PIN diode of the temperature detecting unit. 
         [0315]    In  FIG. 37 , the abscissa represents the heater current and the ordinate represents the voltage of the diode. 
         [0316]    In  FIG. 37 , IF 1  denotes the voltage corresponding to the diode current of 10 μA, and IF 2  denotes the voltage corresponding to the diode current of 100 μA. 
         [0317]    Temperature can be obtained (by conversion) from the difference in voltage given by the following equation when the diode current is 10 μA and 100 μA. 
       [Equation 6] 
       [0318]      Δ V =η( kT/q )ln( IF 1/ IF 2)   (6) 
         [0319]    Temp(C)=5.0072×ΔV+273.15 
         [0320]    The following is a description of the temperature fluorescence detecting matrix device. 
       &lt;Temperature Fluorescence Detecting Matrix Device&gt; 
       [0321]      FIG. 38  is a schematic diagram showing the structure of the temperature fluorescence detecting matrix device according to the embodiment of the present invention. 
         [0322]    The temperature fluorescence detecting matrix device  500  shown in  FIG. 38  is a combination of the temperature detecting matrix device  200  shown in  FIG. 29  and the fluorescence detecting matrix device  300  shown in  FIG. 33 . Therefore, the same symbols are applied to those components in  FIG. 38  which are equivalent to those components in  FIGS. 29 and 33 , for easy understanding. 
         [0323]    The temperature fluorescence detecting matrix device  500  shown in  FIG. 38  consists of the cell array  501  of temperature fluorescence detecting units  510  arranged in an m X n matrix pattern, the current driving circuit (IDRV)  202 , the scanning line driving circuit (WSDRV)  203 , the voltage detectors (V)  204 - 1  . . .  204 - n,  the current driving lines IDL 201  . . . IDL 20   m,  the temperature sense lines TSL- 201  . . . TSL 20   m,  the scanning lines SSL 201  . . . SSL 20   m  which select the detecting unit  210  and transfer the detected signals of the temperature detecting unit  210  to the temperature sense lines TSL 201  . . . TSL 20   m,  the scanning lines SSI 301  . . . SSL 30   n  to select the fluorescence detecting unit  210 , the scanning line driving circuit (WSDRV)  303 , the reverse voltage line RVL 301 , and the fluorescence detecting lines LSL 301  . . . LSL 30   n.    
         [0324]      FIG. 39  is a circuit diagram showing the structure of the temperature fluorescence detecting unit according to the embodiment of the present invention. 
         [0325]    The temperature fluorescence detecting unit  510  shown in  FIG. 39  is a combination of the PIN diode D 211  and the node ND 211  of the temperature detecting unit  210  shown in  FIG. 30  and the PIN diode D 311  and the node ND 311  of the fluorescence detecting unit  310  shown in  FIG. 34 . Therefore, the same symbols are applied to those components in  FIG. 39  which are equivalent to those components in  FIGS. 30 and 34 , for easy understanding. 
         [0326]    The temperature fluorescence detecting unit  510  includes one PIN diode D 211  (D 311 ), two n-channel transistors T 211  and T 212 , and two p-channel transistors T 311  and T 312 . 
         [0327]      FIG. 40  shows how the temperature fluorescence detecting unit according to the embodiment of the present invention performs temperature detection and fluorescence detection depending on whether the transistors as switches turn on and off. 
         [0328]    The scanning line SSL receives the switch signal which periodically changes from high level to low level and vice versa. The n-channel transistors T 211  and T 212  and the p-channel transistors T 311  and T 312  are connected in common to the scanning line SSL. 
         [0329]    Thus, when the scanning line SSL is at a high level, the transistors T 211  and T 212  turn on and the transistors T 311  and T 312  turn off. 
         [0330]    On the other hand, when the scanning line SSL is at a low level, the transistors T 211  and T 212  turn off and the transistors T 311  and T 312  turn on. 
         [0331]      FIG. 41  is a diagram illustrating how temperature detection is performed by the temperature fluorescence detecting unit according to the embodiment of the present invention.  FIG. 42  is a diagram illustrating how fluorescence detection is performed by the temperature fluorescence detecting unit according to the embodiment of the present invention. 
         [0332]    At the time of temperature detection, connection is made with the current source I 211  that supplies current I det  to the current drive line IDL. When the scanning line SSL is at a high level, a forward current I det  flows from the current source I 211  connected to the current drive line IDL to the PIN diode D 211 . At the same time, the voltage detector  204  is connected to the temperature sense line TSL so that the forward voltage that occurs in the PIN diode D 211  is detected. 
         [0333]    There is a relationship as shown in  FIG. 33  between the temperature and the forward voltage that occurs across the PIN diode D 211  when a certain forward current I det  flows through the PIN diode D 211 . 
         [0334]    In other words, there is a linear relationship between the forward voltage and the temperature, and the temperature information can be obtained by detecting the forward voltage of the temperature sense line TSL connected to the PIN diode D 211 . 
         [0335]    At the time of fluorescence detection, the negative voltage source is connected to the reverse voltage line RVL, so that, when the scanning line SSL is at a low level, the PIN diode D 311  is reverse-biased by the negative voltage applied to the reverse voltage line RVL and the reverse current IR flows as shown in  FIG. 42 . 
         [0336]    This reverse current I out  is detected through the fluorescence detecting line LSL to detect fluorescence. 
         [0337]    The temperature fluorescence matrix device  500  shown in  FIG. 38  works in such a way that the scanning line driving circuit  203  put the scanning lines SSL 201  . . . SSL 20   m  sequentially at a high level and, in synchronism with it, the current driving line driving circuit  202  applies a constant current to the current driving lines IDL 201  . . . IDL 20   n  and the voltage of the temperature sense line TSL 201  . . . TSL 20   n  is monitored, so that the temperature information can be detected row by row for each PIN diode D 211 . 
         [0338]    After temperature detection is completed, the scanning lines are sequentially put to a low level, so that each PIN diode D 211  is given a reverse voltage and the fluorescence information can be detected row by row for each PIN diode D 211 . 
         [0339]    In this way each unit detects temperature and fluorescence alternately. 
         [0340]    Incidentally, the fluorescence detection is accomplished in such a way that the dark current of the PIN diode D 2111  (D 311 ) is detected first, the detected value is binarized to give V 1 , and an average of V 1  is obtained after scanning two or three times, as shown in  FIG. 43 . (ST 101 ) 
         [0341]    Then, the fluorescence detection mentioned above is accomplished, the detected value is binarized to give V 2 , and an average of V 2  is obtained after scanning two or three times. (ST 102 ) 
         [0342]    The difference between V 2  and V 1  is obtained. (T 103 ) 
         [0343]    This procedure allows accurate fluorescence detection. 
         [0344]    The following is a description of the heater temperature fluorescence detecting matrix device. 
       &lt;Heater Temperature Fluorescence Detecting Matrix Device&gt; 
       [0345]      FIG. 44  is a schematic diagram showing the structure of the heater temperature fluorescence detecting matrix device according to the embodiment of the present invention. 
         [0346]    The heater temperature fluorescence detecting matrix device  600  shown in  FIG. 44  is a combination of the heater matrix device  100  shown in  FIG. 15 , the temperature detecting matrix device  200  shown in  FIG. 30 , and the fluorescence detecting matrix device  300  shown in  FIG. 35 . Therefore, the same symbols are applied to those components in  FIG. 43  which are equivalent to those components in  FIGS. 15 ,  30 , and  33 , for easy understanding. 
         [0347]    The heater temperature fluorescence detecting matrix device shown  600  shown in  FIG. 44  includes the cell array  601  of heater temperature fluorescence detecting units  610  arranged in an m×n matrix pattern, the data driving circuit (DTDRV)  102 , the scanning line driving circuit (WSDRV)  103 , the data lines DTL 101  . . . DTL 10   m  that give the information about the amount of heat generation to the heater unit  110 , the scanning lines WSL 101  . . . WSL 10   m  which select the heater unit  210 , write the information about the amount of heat generation, and flow current in response to the information about the amount of heat generation which has been written, the current driving circuit (IDRV)  202 , the scanning line driving circuit (WSDRV)  203 , the voltage detectors (V)  204 - 1  . . .  204 - n,  the current drive lines IDL 201  . . . IDL 20   m,  the temperature sense lines TSL 201  . . . TSL 20   m,  the scanning liens SSL 201  . . . SSL 20   m  which select the temperature detecting unit  210  and transfer the signals detected by the temperature detecting unit  210  to the temperature detecting lines TSL 201  . . . TSL 20   n,  the current driving circuit (IDTC)  302 , and scanning line driving circuit (WSDRV)  303 , the reverse voltage line RVL 301 , and the fluorescence detecting lines LSL 301  . . . LSL 30   m.    
         [0348]    The foregoing structure may be modified such that the data line driving circuit  102  and the current driving circuit  202  function in common. 
         [0349]    In this case the data line DTL and the temperature sense line TSL function in common. 
         [0350]      FIG. 45  is a circuit diagram showing the structure of the heater temperature fluorescence detecting unit according to the embodiment of the present invention. 
         [0351]    The heater temperature fluorescence detecting unit  610  shown in  FIG. 45  consists of the heater unit  110  shown in  FIG. 23  and the temperature fluorescence detecting unit  510  shown in  FIG. 39 . Therefore, the same symbols are applied to those components in  FIG. 45  which are equivalent to those components in  FIGS. 23 and 29 , for easy understanding. 
         [0352]    In this embodiment, the data line DTL and the temperature detecting line TSL function in common. 
         [0353]    The heater temperature fluorescence detecting matrix devic 3   600  shown in  FIG. 44  senses the amount of actual heat generation by using current copier after writing as the information about the amount of heat generation, so that it senses the dark current by the PIN diode for the written information about the amount of heat generation for current copier. In this way it is possible to correct the temperature control. 
         [0354]    And, by sensing the current that occurs when fluorescence is received, it is possible to detect the reaction of amplification. 
         [0355]    To be specific, it is possible to detect in real time the reaction of amplification in terms of the amount of fluorescence by the PIN diode D 211  which is the temperature detecting device by using the detection of fluorescence as the signal of detection of amplification reaction in the stage of feeding back in real time the control of heat generation by the circuit composed of the current copier (heater unit) and the temperature detecting unit. 
         [0356]    As mentioned above, the heat control matrix device applicable to the reactor for DNA amplification produces the following effects. 
         [0357]    It is possible to control the temperature of individual wells by active matrix control and hence it is possible to perform comprehensive gene analysis in a short time. 
         [0358]    It is possible to obtain the accurate amount of heat generation by feedback mechanism owing to the temperature detecting circuit even though the semiconductor elements vary in characteristics or have temperature characteristics, and this leads to efficient PCR control. 
         [0359]    It is possible to obtain the accurate amount of heat generation by feedback mechanism owing to the temperature detecting circuit even though the semiconductor elements change with time in characteristics, and this leads to the highly reliable PCR control device. 
         [0360]    Having the function to suspend the action of heat generation by each scanning line, it is possible to lower the temperature easily and rapidly, and being able to control the duration of heating, it is easy to control minute heat generation. 
         [0361]    When the information about heat generation is written, it accurately senses the actual amount of heat generation and corrects the written amount of heat generation, so that it offers the accurate amount of heat generation. 
         [0362]    It is possible to detect fluorescence as the signal of amplification reaction by using the circuit identical with the temperature detecting circuit for temperature sensing. 
         [0363]    Thus, the reactor according to this embodiment permits temperature control to be performed on wells accurately and individually. This reactor will be used in any application area where reactions with accurate temperature control are required. It is suitable particularly for the PCR device for gene amplification reaction. 
         [0364]    The present application contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2008-105841 filed in the Japan Patent Office on Apr. 15, 2008, the entire content of which is hereby incorporated by reference. 
         [0365]    It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.