Abstract:
The present invention comprises a controller for the cascade H-bridge three-phase multilevel converter used as a shunt active filter. Based on the proposed mathematical model, the controller is designed to compensate harmonic distortion and reactive power due to a nonlinear distorting load. Simultaneously, the controller guarantees regulation and balance of all capacitor voltages. The idea behind the controller is to allow distortion of the current reference during the transients to guarantee regulation and balance of the capacitors voltages. The controller provides the duty ratios for each H-bridge of the cascade multilevel converter.

Description:
FIELD OF THE INVENTION 
   The present invention is a controller based on the mathematical model of the cascade multilevel converter. These converters are used in many different applications such as active rectifiers, active filters, inverters, among others. In particular, the invention addresses the control of an active filter, that is, the control is intended for the compensation of reactive power and harmonic distortion in the line current. These disturbances are produced in many industry applications where nonlinear distorting loads are connected to the grid. As the active rectifier is a special case of the active filter application, the invention also is related with the active rectifier application. 
   BACKGROUND OF THE INVENTION 
   The technology of multilevel converters has emerged as a very important alternative in the area of a high power medium voltage energy control. Due to the series connection of semiconductors, it is possible to reach medium-high voltages with standard components. 
   Multilevel converters offer several advantages compared to their conventional counterparts. By synthesizing the AC output terminal voltage from several voltage levels, staircase waveforms can be produced, which in their turn approach the sinusoidal waveform with low harmonic distortion, thus reducing filtering requirements. However, the several sources on the DC side of the converter make multilevel technology difficult to control by the need to balance the several DC voltages. Thus, linear controllers, designed on the basis of the small-signal linearization, are not effective, and stability can not be ensured as large-signal disturbance occur. 
   Up to now, the topologies for high power multilevel converter are classified in three main types: flying capacitor converter (FC), diode clamped converter (NPC) and cascaded H-bridge converter (HB). These topoligies are described in a paper by J. Rodríguez, et al, “Multilevel Inverters: A survey of topologies, controls and applications,”  IEEE Trans. on Ind. Electr. , Vol 49, No. 4, pp. 724-738, August 2002; a paper by R. Teodorescu, et al., “Multilevel Converters: A Survey,” in  Proc. EPE&#39; 99, Lausanne, 1999; and a paper by J. S. Lai, et al., “Multilevel Converters—A New Breed of Power Converters,” in  Proc. IEEE - IAS Conf.,  1995, pp. 2441-2548. 
   Even if the cascaded H-bridge converter has the disadvantage of needing separated DC sources, this topology is an attractive option due to its several advantages, such as, modularity, simplest composition, and reduced number of components (they do not have the need of extra clamping diodes, nor balanced capacitors). Additionally, the structure of multicells in cascade H-bridge allows the nourishment of different charges in DC when it is used in an active rectifier application. See U.S. Pat. No. 6,005,788 titled “Hybrid topology for multilevel power conversion” by Lipo, et al., which is incorporated by reference. 
   The use of cascaded H-bridges has been successfully implemented in commercially available large drives and some static VAR compensators as reported in F. Z. Peng, et al., “A Multilevel Voltage Source Inverter with Separate DC Sources for Static VAR Generation,” in  Proc. IEEE - IAS&#39; 95  Conf. , pp. 2541-2548. 
   However, H-bridge converters have a major challenge regarding their control. It must guarantee a current almost sinusoidal and in phase with the line voltage in the AC-side and for each phase. Simultaneously, the controller must regulate and stabilize the voltages levels of every single capacitor on the DC-side. This means that the number of available controllers is inferior to the controlled variables. For instance, in a three-phase H-bridge converter of 2n+1 levels (n H-bridge converters in cascade), the control problem consists in controlling n+3 state variables (three currents plus n DC voltages) with only n switching functions. This is due to the fact that every H-bridge cannot be considered as an independent structure to control, as they interact with other cells. For instance, in a branch of a series connection of H-bridges they share the same current and the effective injected voltage is the sum of voltages in every cell. 
   Generally, an active filter application involves the compensation of harmonic distortion and reactive power, i.e., periodic disturbances, caused by a distorting nonlinear load. Control schemes based on the introduction of a bank of harmonic oscillators (resonant filters) is perhaps one of the most appealed techniques to guarantees rejection of periodic disturbances, thanks to its simplicity and effectiveness. This type of schemes is based on the internal model principle. This principle states that the controlled output can track a class of reference commands without a steady state error if the generator, or the model, of the reference is included in the stable closed-loop system. Therefore, according to the internal model principle, if a periodic disturbance has an infinite Fourier series (of harmonic components), then an infinite number of resonant filters are required to reject such a disturbance. For a detailed description of internal model principle, reference is made to B. Francis and W. Wonham, “The internal model principle for linear multivariable regulators,”  Applied Mathematics and Optimization , Vol. 2, pp. 170-194, 1975, which is incorporated by reference. Applications of this principle to power electronics systems are disclosed in U.S. Pat. No. 6,940,187 titled “Robust controller for controlling a UPS in unbalanced operation” by Escobar, et al., and also in U.S. Pat. No. 60,265,727 titled “Adaptative controller for D-STATCOM in the stationary reference frame to compensate for reactive and harmonic distortion under unbalanced conditions” by Escobar, et al. 
   SUMMARY OF THE INVENTION 
   This document presents a controller based on the mathematical model for cascade H-bridge three-phase multilevel converter used as a shunt active filter. This controller is proposed in order to achieve compensation of harmonic distortion and reactive power due to a nonlinear load. This is accomplished by guaranteeing that the line current follows a reference proportional to the line voltage during the steady state. Simultaneously, the controller must guarantee regulation and balance of every single capacitor voltage on the DC-side. 
   The idea behind the controller is to intentionally introduce certain amount of distortion in the current reference with the aim of achieving balance of all capacitors voltages. At the best, such a distortion will act during the transient only. Once the voltage balance is reached, the distortion vanishes, thus remaining a current reference proportional to the source voltage. Instrumental for these proposal are the several transformations applied on the model that highlight certain structural properties that enormously facilitate the controller design. The three-phase five-level topology is presented, however, the results can be easily scaled to higher levels. 
   As above mentioned, the controller is based on the mathematical model obtained for cascade H-bridge three-phase multilevel converter used as a shunt active filter. For the control design purposes the averaged model is considered instead of the switched model, i.e., the control inputs represent continuous signals. This is supported by the fact that, for the real implementation, an appropriate modulation technique, such as multi-carrier phase-shifted or level-shifted modulation, with a relative high effective switching frequency is used. 
   It is also assumed that the inductor current dynamics are faster than the capacitor voltage dynamics. Thus, based on the time scale separation principle, the control design is split in two parts (this is referred in the power electronics literature as the decoupling assumption). First, an inner current (tracking) control loop in which the currents provided by the source are forced to track references which are proportional to the source voltages. Second, an outer voltage control loop, which is divided in two more control loops: a regulation loop that drives the sum of the squares of the capacitor voltages of each branch towards a desired constant value and, a balance loop to force to zero the difference of the squares of the capacitor voltages of each branch. It is shown that, under the assumption that all capacitor voltages maintain a positive value, which is valid in normal operation, the fulfillment of the above control objectives guarantees the regulation of all capacitor voltages towards their constant reference independently. 
   To make the controller robust against parameters uncertainties, the controller design considers that the system parameters are unknown constants, possibly changing in steps, or that can be slowly varying. To facilitate the design, it is also assumed that the source voltage and the load current are unbalanced periodic signals that contain higher odd harmonics of the fundamental frequency denoted by ω 0  which is assumed to be a known constant. Therefore, even if the amplitudes and phase angles of these components could take arbitrary values, the harmonic coefficients are considered constants. 
   For the tracking objective a control input is built which cancels measurable disturbances (such as the source voltage) adds a damping term and introduces a bank of resonant filters tuned at the selected harmonics under compensation, i.e., odd harmonics, to cancel the periodic disturbance. Controllers with this similar structure can be found in the literature as resonant regulator, PIS compensator, stationary-frame generalized integrator, etc. 
   As described in more detail below, balancing was possible after the introduction of extra control inputs that intentionally distort the current reference. However, this distortion lasts during transients only, and vanishes in the stationary state. Based on this idea, a current reference is designed which comprises a linear combination of vectors of periodic signals with different phase shifts and possibly different sequences. Each of these signals having an associated multiplying gain, namely, g 1 , g 2 , g 3 . In particular, the first gain g 1  is associated to a vector signal proportional to the source voltage. Therefore, it must be guaranteed that gain g 1  reaches a non zero constant value in the stationary state, while the other two gains g 2  and g 3  causing the distortion vanish. The definition of the current reference in this way constitutes the main contribution of this work. 
   The regulation objective is solved by designing g 1 , g 2  and g 3  which are required to construct the current reference. These control loops are formed by proportional plus integral schemes operating on the corresponding error signal. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  shows a schematic diagram of the three-phase five-level cascade H-bridge multilevel converter used in an active filter application. 
       FIG. 2  shows a block diagrams of the transformation processors and the coordinate converter used to implement the proposed controller. 
       FIG. 3  shows a block diagram of the overall controller including tracking, regulation and balance control loops as well as the coordinate transformation processor. 
       FIG. 4  shows block diagrams of the duty ratios processors to generate the control inputs in the original coordinates. 
       FIG. 5  shows steady state responses of the proposed solution: (from top to bottom) line voltage, line current, load current and injected current. 
       FIG. 6  shows a transient response of the capacitors voltages during load step changes. 
       FIG. 7  shows transient responses during load step changes: (from top to bottom) scaled apparent conductance G 1 =g 1 ν S,RMS   2 , and extra control inputs G 2 =g 2 ν S,RMS   2  and G 3 =g 3 ν S,RMS   2 . 
       FIG. 8  shows (gray) Injected voltage ε 1  as computed in the control algorithm, and (black) the real injected voltage using a multicarrier phase-shifted modulation algorithm. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   The schematic of the three-phase five-level cascade H-bridge converter is shown in  FIG. 1 . The block diagrams of the proposed controller are shown in  FIG. 2  and  FIG. 3 . The modeling process is divided in two stages. First, the expressions for the model following Kirchhoff&#39;s laws are obtained. Second, the model is transformed and expressed in αβ-coordinates. 
   All along the document bold typeface characters represent either vectors or matrices, while normal typeface characters represent scalars. 
   The expressions of the model after application of the Kirchhoff&#39;s laws to the schematic in  FIG. 1  (considering the IGBTs ideal switches) yields the following system 
                     L   ⁢     ⅆ     ⅆ   t       ⁢     i     S   ⁢           ⁢   123         =       v     S   ⁢           ⁢   123       -     B   ⁢           ⁢     ɛ   123       +     L   ⁢     ⅆ     ⅆ   t       ⁢     i   0123           ⁢     
     ⁢               C   ⁢     ⅆ     ⅆ   t       ⁢     z   1       =         ɛ   1     ⁡     (       i     S   ⁢           ⁢   1       -     i   01       )       -       2   ⁢     z   1       R         ,             C   ⁢     ⅆ     ⅆ   t       ⁢     y   1       =         δ   1     ⁡     (       i     S   ⁢           ⁢   1       -     i   01       )       -       2   ⁢     y   1       R                       C   ⁢     ⅆ     ⅆ   t       ⁢     z   2       =         ɛ   2     ⁡     (       i     S   ⁢           ⁢   2       -     i   02       )       -       2   ⁢     z   2       R         ,             C   ⁢     ⅆ     ⅆ   t       ⁢     y   2       =         δ   2     ⁡     (       i     S   ⁢           ⁢   2       -     i   02       )       -       2   ⁢     y   2       R                       C   ⁢     ⅆ     ⅆ   t       ⁢     z   3       =         ɛ   3     ⁡     (       i     S   ⁢           ⁢   3       -     i   03       )       -       2   ⁢     z   3       R         ,             C   ⁢     ⅆ     ⅆ   t       ⁢     y   3       =         δ   3     ⁡     (       i     S   ⁢           ⁢   3       -     i   03       )       -       2   ⁢     y   3       R                       (   1   )               
where the input control signals have been redefined as
 
                           ɛ   1     =         u   11     ⁢     v     C   ⁢           ⁢   11         +       u   12     ⁢     v     C   ⁢           ⁢   12             ,             δ   1     =         u   21     ⁢     v     C   ⁢           ⁢   21         -       u   22     ⁢     v     C   ⁢           ⁢   22                           ɛ   2     =         u   21     ⁢     v     C   ⁢           ⁢   21         +       u   22     ⁢     v     C   ⁢           ⁢   22             ,             δ   2     =         u   11     ⁢     v     C   ⁢           ⁢   11         -       u   12     ⁢     v     C   ⁢           ⁢   12                           ɛ   3     =         u   31     ⁢     v     C   ⁢           ⁢   31         +       u   32     ⁢     v     C   ⁢           ⁢   32             ,             δ   3     =         u   31     ⁢     v     C   ⁢           ⁢   31         -       u   32     ⁢     v     C   ⁢           ⁢   32                         (   2   )               
the states are redefined according the following functions
 
                           z   1     =         v     C   ⁢           ⁢   11     2     2     +       v     C   ⁢           ⁢   21     2     2         ,             y   1     =         v     C   ⁢           ⁢   11     2     2     -       v     C   ⁢           ⁢   21     2     2                       z   2     =         v     C   ⁢           ⁢   21     2     2     +       v     C   ⁢           ⁢   22     2     2         ,             y   2     =         v     C   ⁢           ⁢   21     2     2     -       v     C   ⁢           ⁢   22     2     2                       z   3     =         v     C   ⁢           ⁢   31     2     2     +       v     C   ⁢           ⁢   32     2     2         ,             y   3     =         v     C   ⁢           ⁢   31     2     2     -       v     C   ⁢           ⁢   32     2     2                     (   3   )               
and matrix B is given by
 
   
     
       
         
           
             
               
                 B 
                 = 
                 
                   
                     1 
                     3 
                   
                   ⁢ 
                   
                     ( 
                     
                       
                         
                           2 
                         
                         
                           
                             - 
                             1 
                           
                         
                         
                           
                             - 
                             1 
                           
                         
                       
                       
                         
                           
                             - 
                             1 
                           
                         
                         
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                           2 
                         
                       
                     
                     ) 
                   
                 
               
             
             
               
                 ( 
                 4 
                 ) 
               
             
           
         
       
     
   
   Variables u ij (iε{1,2,3},jε{1,2,3}) denote the switch position for the ij-th H-bridge (i for the branch and j for the position of the H-bridge in the branch) and acts as the original control input. In the average model case these control inputs are considered continuous signals taking values in the range [−1, 1]. As above explained, this is supported by the fact that, in the real implementation, an appropriate modulation technique with a relative high switching frequency is used. 
   To facilitate the control design the model is expressed in terms of the line currents, instead of the injected currents as usual. Notice also that variables z i  and y i  (iε{1,2,3}) represent the i-th dynamics of the sum and difference of the squares of the capacitor voltages, respectively. 
   The model is transformed into conventional αβ-coordinates, using the normalized Clarke&#39;s transformation 
   
     
       
         
           
             
               
                 T 
                 = 
                 
                   
                     
                       2 
                       3 
                     
                   
                   ⁢ 
                   
                     ( 
                     
                       
                         
                           1 
                         
                         
                           
                             
                               - 
                               1 
                             
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                             2 
                           
                         
                         
                           
                             
                               - 
                               1 
                             
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                             2 
                           
                         
                       
                       
                         
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                             2 
                           
                         
                         
                           
                             
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                             2 
                           
                         
                       
                       
                         
                           
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                               2 
                             
                           
                         
                       
                     
                     ) 
                   
                 
               
             
             
               
                 ( 
                 5 
                 ) 
               
             
           
         
       
     
   
   Thus, the final expression for the model takes the form 
                     L   ⁢     ⅆ     ⅆ   t       ⁢     i     S   ⁢           ⁢   αβ         =       v   αβ     -     ɛ   αβ     +     L   ⁢     ⅆ     ⅆ   t       ⁢     i     o   ⁢           ⁢   αβ             ⁢     
     ⁢       C   ⁢           ⁢       x   .     1       =           ɛ   αβ   T     ⁡     [         1       0           0       1         ]       ⁢     i     S   ⁢           ⁢   αβ         -       2   ⁢     x   1       R         ⁢     
     ⁢       C   ⁢           ⁢       x   .     2       =           ɛ   αβ   T     ⁡     [         1       0           0         -   1           ]       ⁢     i     S   ⁢           ⁢   αβ         -       2   ⁢     x   2       R         ⁢     
     ⁢       C   ⁢           ⁢       x   .     1       =           ɛ   αβ   T     ⁡     [         0       1           1       0         ]       ⁢     i     S   ⁢           ⁢   αβ         -       2   ⁢     x   3       R                 (   6   )               
where the following transformation has been considered
 
   
     
       
         
           
             
               
                 
                   [ 
                   
                     
                       
                         
                           x 
                           1 
                         
                       
                     
                     
                       
                         
                           x 
                           2 
                         
                       
                     
                     
                       
                         
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                           3 
                         
                       
                     
                   
                   ] 
                 
                 = 
                 
                   
                     
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                             1 
                           
                           
                             1 
                           
                           
                             1 
                           
                         
                         
                           
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                     ⁡ 
                     
                       [ 
                       
                         
                           
                             
                               z 
                               1 
                             
                           
                         
                         
                           
                             
                               z 
                               2 
                             
                           
                         
                         
                           
                             
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                               3 
                             
                           
                         
                       
                       ] 
                     
                   
                   . 
                 
               
             
             
               
                 ( 
                 7 
                 ) 
               
             
           
         
       
     
   
   This nonsingular linear transformation is instrumental for the control design as it permits to write the model in the form shown in (6), that is, matrices 
               M   1     =     [         1       0           0       1         ]       ,       M   2     =     [         1       0           0         -   1           ]       ,       M   3     =     [         0       1           1       0         ]             
appear explicitly in the model, all of them affecting the source currents vector. This structure is used next to design the currents reference vector.
 
   Based on this model the control objectives can be stated as follows: 
   Tracking: Consists in forcing the source currents vector to track a reference vector which, in the steady state, is proportional to the corresponding source voltages vector, that is, i Sαβ →i* Sαβ  as t→∞ where the current reference is designed according to 
                         i     S   ⁢           ⁢   αβ     *     =           g   1     ⁡     [         1       0           0       1         ]       ⁢     v     S   ⁢           ⁢   αβ         +         g   2     ⁡     [         1       0           0         -   1           ]       ⁢     v     S   ⁢           ⁢   αβ         +         g   3     ⁡     [         0       1           1       0         ]       ⁢     v     S   ⁢           ⁢   αβ                       =         g   1     ⁢     M   1     ⁢     v     S   ⁢           ⁢   αβ         +       g   2     ⁢     M   2     ⁢     v     S   ⁢           ⁢   αβ         +       g   3     ⁢     M   3     ⁢     v     S   ⁢           ⁢   αβ                         (   8   )               
where g 1  represents the apparent conductance observed by the source, and g 2  and g 3  are two extra control inputs required to accomplish the regulation and balancing objectives. Notice that these two extra control inputs distort the reference current in order to balance the capacitor voltages; once the voltages are balanced, the extra control inputs vanish as well as the distortion, thus, making the current reference proportional to the source voltage in the steady state. Notice also that the form of this reference, i.e., the introduction of matrices M 1 , M 2  and M 3  is directly related with the form of model (6).
 
   Regulation: The sums of the squares of the capacitor voltages should be regulated to a given constant level, that is, z k →V d   2 , ∀kε{1,2,3}, which is equivalent to guarantee that x 1 →3V d   2 , x 2 →0, x 3 →0. 
   Balancing: Consists in zeroing the difference of the squares of the capacitor voltages, that is, y 1 →0, y 2 →0, y 3 →0. 
   To accomplish the above control objectives, a controller is designed in three loops as described next: 
   A1. Current tracking loop. For the tracking objective, the control input ε αβ  is built in the following form 
                   ɛ   αβ     =         K   1     ⁢       i   ~       S   ⁢           ⁢   αβ         +     v     S   ⁢           ⁢   αβ       +       ∑     k   ∈     {     1   ,   3   ,   5   ,           ⁢   …     ⁢           }         ⁢     diag   ⁢     {         2   ⁢     γ   k     ⁢   s         s   2     +       k   2     ⁢     ω   2           ,       2   ⁢     γ   k     ⁢   s         s   2     +       k   2     ⁢     ω   2             }     ⁢       i   ~       S   ⁢           ⁢   αβ                     (   9   )               
where ĩ Sαβ =(i Sαβ −i* Sαβ ) represents the tracking error vector, and K 1 &gt;0, γ k &gt;0 (kε{1,3,5, . . . }) are positive design parameters representing the damping gain, and the gain of the k-th resonant converter, respectively. Notice that this control input cancels ν Sαβ , adds a damping term of the form K 1 ĩ Sαβ  and introduces a bank of resonant filters tuned at the harmonics under compensation (odd harmonics) to compensate the periodic disturbance.
 
   B1. Voltage regulation loop. To solve the regulation and the balance objectives, it is assumed (decoupling assumption) that the current tracking objective has been reached, that is, i Sαβ =i* Sαβ , and that the bank of resonant filters have reconstructed the disturbances. Using these assumptions in the voltage dynamics equations described in (6) and after some straightforward computations yields the following expressions 
                     C   ⁢           ⁢       x   .     1       =         g   1     ⁢     v     S   ⁢           ⁢   αβ     2       -       2   ⁢     x   1       R     +     φ   1         ⁢     
     ⁢       C   ⁢           ⁢       x   .     2       =         g   2     ⁢     v     S   ⁢           ⁢   αβ     2       -       2   ⁢     x   2       R     +     φ   2         ⁢     
     ⁢       C   ⁢           ⁢       x   .     3       =         g   3     ⁢     v     S   ⁢           ⁢   αβ     2       -       2   ⁢     x   3       R     +     φ   3                 (   10   )               
where φ 1 , φ 2  and φ 3  are disturbances composed mainly by higher order harmonics. The form of the expressions above is due to the application of the following properties of the symmetric matrices M 1 , M 2  and M 3    
                   M   1   2     =       M   2   2     =       M   3   2     =     I   2                 [   involution   ]                     ξ   αβ   T     ⁢     M   2     ⁢     M   3     ⁢     ξ   αβ       =   0     ,     ∀     ξ   αβ               [     skew   ⁢     -     ⁢   simmetry     ]                   ξ   αβ   T     ⁢     M   2     ⁢     ξ   αβ       =       ξ   α   2     -     ξ   β   2                                   ξ   αβ   T     ⁢     M   3     ⁢     ξ   αβ       =     2   ⁢     ξ   α     ⁢     ξ   β                               
where I 2  is the identity matrix of dimension 2×2.
 
   The regulation objective is solved by designing g 1 , g 2  and g 3  (required to construct the reference i* Sαβ  given by (8)) that guarantee regulation of variables x 1 , x 2  and x 3  towards their corresponding references x 1 →3V d   2 , x 2 →0, x 3 →0. For this purpose proportional plus integral schemes operating on the corresponding error signals as proposed as follows 
                         g   1     ⁢     v     S   ,   RMS     2       =         -     k     p   ⁢           ⁢   1         ⁢       x   ~     1       -       k     i   ⁢           ⁢   1       ⁢       ∫   0   t     ⁢         x   ~     1     ⁢     ⅆ   t               ⁢     
     ⁢         g   2     ⁢     v     S   ,   RMS     2       =         -     k     p   ⁢           ⁢   2         ⁢     x   2       -       k     i   ⁢           ⁢   2       ⁢       ∫   0   t     ⁢       x   2     ⁢     ⅆ   t                 ⁢     
     ⁢         g   3     ⁢     v     S   ,   RMS     2       =         -     k     p   ⁢           ⁢   3         ⁢     x   3       -       k     i   ⁢           ⁢   3       ⁢       ∫   0   t     ⁢       x   3     ⁢     ⅆ   t                       (   11   )               
where {tilde over (x)} 1 □(x 1 −3V d   2 ); k p1 , k i1 , k p2 , k i2 , k p3  and k i3  are the gains of the proportional plus integral (PI) schemes, all of them are selected positive, and ν S,RMS  is the RMS value of the source voltages vector, which is considered a constant.
 
   B2. Voltage balance loop. For the voltage balance objective, the control inputs δ 1 , δ 2  and δ 3  are designed to force the squares of the capacitor voltages to zero. This control loop is built as follows
 
δ 1 =ρ 1 ν S1 , δ 2 =ρ 2 ν S2 , δ 3 =ρ 3 ν S3   (12)
 
where the auxiliary variables ρ 1 ,ρ 2  and ρ 3  are formed by a proportional plus an integral term over the corresponding variables y 1 ,y 2  and y 3  as follows
 
                     ρ   1     =         -     β     p   ⁢           ⁢   1         ⁢     y   1       -       β     i   ⁢           ⁢   1       ⁢       ∫   0   t     ⁢       y   1     ⁢     ⅆ   t               ⁢     
     ⁢       ρ   2     =         -     β     p   ⁢           ⁢   2         ⁢     y   2       -       β     i   ⁢           ⁢   2       ⁢       ∫   0   t     ⁢       y   2     ⁢     ⅆ   t               ⁢     
     ⁢       ρ   3     =         -     β     p   ⁢           ⁢   3         ⁢     y   3       -       β     i   ⁢           ⁢   3       ⁢       ∫   0   t     ⁢       y   3     ⁢     ⅆ   t                       (   13   )               
where β p1 ,β i1 ,β p2 ,β i2 ,β p3  and β i3  are the proportional and integral gains of the PI schemes, all of them are selected positives.
 
   Design criteria for the controller parameters. The bandwidth of the controller frequency response is limited by the maximum frequency of sampling/commutation. Usually, the bandwidth of the current loop is desired to be 1/10 of the sampling frequency. Based on this, an approximate procedure is followed to find an initial setting of the parameters for the current tracking control loop. First, is it proposed to set K 1  equal to 2πf ic ·L, where f ic  is the desired current loop bandwidth, in this case, f ic =f sw /10. Second, the remaining transfer function seen by the plurality of resonant filters is a first order low pass filter having a pole at 2πf ic . Disregarding, for simplicity, the influence of such a pole, we can set the gain γ k  as γ k =2.2T kr , where T kr  is the desired response time for each harmonic component (evaluated between the 10% and 90% of a step response of the amplitude of the corresponding sinusoidal perturbation). This relation is exact only when different band-pass filters give independent contributions. In a general case, however, this procedure gives a useful estimate of controller parameters given the desired response time for various harmonic components. 
   In the first outer loop, corresponding to the regulation of the capacitor voltages, the parameter selection is guided by conventional techniques given the desired regulation loop bandwidth and phase margin. Note, however, that due to the ripple on the dc-voltage at twice the supply frequency during unbalanced conditions, the voltage loop bandwidth should be limited to approximately 10-20 Hz in order to avoid possible amplification of the second harmonic in the line current reference. 
   In the second outer loop, corresponding to the balance of the capacitor voltages, the parameter selection is guided also by conventional techniques. The main consideration in this outer loop is that the response in frequency of the controllers is limited by the response in frequency of the first outer loop. The response in frequency in this loop is usually set ⅕ of the response in frequency of the regulation loop. 
   Simulation parameters. For simulations the following elements have been considered. 
   A three phase voltage source of 220 Vrms at f 0 =60 Hz (ω 0 =377 rad/s). 
   The nonlinear distorting load is composed of a three-phase diode bridge rectifier with a resistive load taking values of 20Ω and 100Ω. To create the unbalance, a resistor of 100Ω is connected between two phases. 
   The overall load produces an unbalanced distorted current containing odd harmonics (kε{1,3,5,7,9,11,13}) of the fundamental frequency (f 0 =60 Hz). The active filter has been designed with parameters L=3 mH, C=2200 μF, and it has been assumed that the losses take the value R=2.2 KΩ. The switching frequency for the switching devices is fixed to 20 kHz. 
   The control design parameters are fixed to: V d =150, γ k =200×kω 0  (kε{1,3,5,7,9,11,13}), K 1 =30, k p1 =0.05, k i1 =0.02, k p2 =0.00937, k i2 =0.000937, k p3 =0.00937, k i3 =0.000937, β p1 =10.89, β i1 =0.1815, β p2 =10.89, β i2 =0.1815, β p3 =10.89, β i3 =0.1815. 
   DESCRIPTION OF THE DRAWINGS 
     FIG. 1  depicts a three-phase cascade H-bridge multilevel converter used as a shunt active filter. The system includes a power grid that provides source currents  104 ,  105 , and  106  corresponding to the first, second, and third phase, respectively, along with the corresponding source voltages  101 ,  102 , and  103 . The load  113  is composed by a three phase non-linear distorting load current, one distorted current for each phase, with the only restriction that their sum is equal to zero. As loads on all three phases are different from each other, the load currents  110 ,  111 , and  112  are unbalanced and can have independently unbalanced harmonics disturbance signals. The heart of the converter is composed by three branches of 2 H-bridge converters each connected in cascade. Each branch providing injected voltages  117 ,  118  and  119 , respectively. For instance, the cascade converter  121  is capable of providing a five level injected voltage  117 . These voltages are coupled to the corresponding phase of the power distribution system via filter inductors  114 ,  115  and  116 , respectively. Each H-bridge converter in a branch includes an output capacitor and an output resistor on the DC-side,  128  and  129 , respectively, for the first H-bridge in the first branch. Capacitor voltages on the DC-side are listed from  122  to  127 . 
     FIG. 2  depicts a detailed block diagram of the transformation processors, as well as the three-phase to stationary coordinate converter, all them used to obtain the signals required in the controller implementation. Input ports  201  and  202  are the source voltages vector and source currents vector, respectively. Blocks  203  and  204  contain the Clarke&#39;s transformation to convert from three-phase to stationary frame coordinates (123-coordinates to αβ-coordinates). The output ports  205  and  206  of these modules are the source voltages and source currents vectors in αβ-coordinates, respectively. Signals in the input ports  207  to  212  are the measured voltages across the output capacitors of each H-bridge converter. Each of these voltages is squared in multiplier modules  213  to  218 . The squares are then multiplied by a corresponding constant gain in modules  219  to  224 . The multiplexer modules  225 ,  226  and  227  combine the resulting expressions in their input ports to form vectors. These vectors are then operated by matrix modules  228  to  230 . The demultiplexor modules  231  to  233  provide the state variables denoted by z j  (jε{1,2,3}) in output ports  234  to  236 , and state variables denoted by y j  in output ports  237  to  239 . 
     FIG. 3  depicts a detailed block diagram of the proposed controller. Input ports  301  to  303  are the state variables that represents the dynamics of the sum of the squares of the capacitor voltages. These input ports are gathered in a single vector after multiplexer module  304 . The resulting vector is then operated by matrix  305  and demultiplexed by module  306 . As a result, a new set of variables x 1 , x 2  and x 3  is obtained and available at output ports  307  to  309 . Recall that this transformation is crucial in the developments as it allows to highlight a model structure that facilitates the design of the control loops. 
   The regulation controller receives variables x 1 , x 2  and x 3  at input ports  307 ,  308  and  309 , respectively, and their corresponding references at input ports  310 ,  311  and  312 . The differences between variables x 1 , x 2  and x 3 , and their corresponding references are computed at difference modules  313 ,  314  and  315 . These error signals are required to construct g 1 , g 2  and g 3  via proportional plus integral (PI) schemes operating on the corresponding error signal. The PI modules are depicted in  316 ,  317  and  318 . The output from the PI modules is multiplied by the scaled source voltages vector in modules  321  to  323 . The source voltages vector is scaled by the square of its RMS value in the module  320 . The products provided by the multiplier modules  321  to  323  are operated by the matrices in  324 ,  325  and  326 , respectively. The outputs of these modules are accumulated by adder  327  to construct the currents reference vector i* Sαβ . 
   Reference vector i* Sαβ  is subtracted from the source currents vector i Sαβ , coming from input port  328 , in adder  329 . This results in the error signal ĩ Sαβ . This error signal is multiplied by a predetermined constant K 1  in  330 . The error signal ĩ Sαβ  is also provided to a plurality of harmonic or resonant filters depicted in  331 . Other resonant filters may be added depending on the considered harmonics to compensate. In  331  only two resonant filters are shown to exemplify. The resonant frequency of each harmonic filter is given by kω 0 , where k is the k-th pre-selected harmonic to compensate, wherein kε{1,3,5, . . . }. Each resonant filter of the plurality of resonant filters provide a control signal component which is accumulated and added in adder  332  to the damping term obtained in  330 . The result of this sum is then added to source voltage ν Sαβ  in adder  333  to generate the control vector ε αβ . This control vector is transformed from fixed frame coordinates to its original coordinates by means of transformation  334 . This yields, after demultiplexing in  335 , the control signals  336 ,  337  and  338 . 
   For the balance controller, the control signals δ 1 , δ 2  and δ 3  in output ports  351 ,  352  and  353  are designed to force the difference of squares of the capacitor voltages y 1 , y 2  and y 3  in input ports  339 ,  340  and  341  to zero. These control signals are obtained by multiplying the source voltages in original coordinates ν S1 , ν S2  and ν S3  in input ports  342  to  344 , with the corresponding auxiliary variables ρ 1 , ρ 2  and ρ 3 . These last are obtained with proportional plus integral schemes  345 ,  346  and  347 , actuating over variables y 1 , y 2  and y 3 . 
     FIG. 4  depicts a detailed block of the duty ratios processors, that is, the inverse transformations, required to recover the control inputs in their original coordinates, that is, u ij  (iε{1,2,3}, jε{1,2,3}). This control inputs are later used in a modulation scheme to generate the switching sequence for every single switching device. The control inputs for the H-bridges on the top of each branch are represented by u i1 , where iε{1,2,3} represents the corresponding branch, and are delivered to output ports  434 ,  436  and  438 , respectively. These control inputs are formed by the addition ε i +δ i  (iε{1,2,3}), or equivalently using matrix operations  416  to  418 , multiplexers  413  to  415  and demultiplexers  419  to  421 . This sum is then divided by the capacitor voltage ν Ci1  of the corresponding top H-bridge in each branch using modules  422 ,  424  and  426 . The results are then divided by two in modules  428 ,  430  and  432 . The control inputs for the H-bridges on the bottom of each branch are represented by u i2 , where as before iε{1,2,3} represents the corresponding branch, and are available in output ports  435 ,  437  and  439 . They are formed by the difference ε i −δ i  (iε{1,2,3}), or equivalently using matrix operations  416 ,  417  and  418 , multiplexers  413  to  415  and demultiplexers  419  to  421 . This difference is then divided by the capacitor voltage ν Ci2  (iε{1,2,3}) of the corresponding bottom H-bridge in each branch using modules  423 ,  425  and  427 . The results are then divided by two in modules  429 ,  431  and  433 . 
     FIG. 5  shows the steady state responses of the controlled system with the proposed solution. It is shown that the compensated source current i S1  in plot  502  is an almost sinusoidal signal in phase with the source voltage v S1  in plot  501 , despite of the highly distorted load current i 01  in plot  503 . Plot  504  shows the injected current i 1  produced by the active filter under the proposed controller. 
     FIG. 6  shows the capacitors voltages transient responses during load step changes. In this case a non controlled three phase diode rectifier feeding a simple resistor has been considered as the nonlinear load. The transients are due to changes in this resistor from 100Ω to 20Ω and back to 100Ω. On each plot there are two curves one for each capacitor voltage belonging to the same branch. The responses of capacitor voltages in the top H-bridges are indicated with  601 ,  602  and  603 , while those of the bottom H-bridges are indicated with  604 ,  605  and  606 . In general, it is observed that after a relatively small transient, all capacitor voltages converges towards their common reference fixed to 150 V DC  in this test. 
     FIG. 7  shows the scaled apparent conductance G 1 =g 1 ν S,RMS   2  in indicated with  701  and the extra control inputs G 2 =g 2 ν S,RMS   2  and G 3 =g 3 ν S,RMS   2  indicated with  702  and  703 , respectively, during a transient due to load step changes. Notice that, G 1 =g 1 ν S,RMS   2  reaches a constant value proportional to the total dissipated power, while G 2 =g 2 ν S,RMS   2  and G 3 =g 3 ν S,RMS   2  reach zero in average after a relatively short transient. 
     FIG. 8  shows the injected voltage ε 1  indicated by  802  as it is computed in the control algorithm, that is, as a continuous signal, and, indicated by  801 , the real injected voltage measured at the terminals of each branch, where a multicarrier phase-shifted modulation algorithm was used.