Abstract:
A band-gap reference voltage generator is provided that is capable of being used at low voltage simultaneously with adjusting a reference voltage.

Description:
TECHNICAL FIELD 
   The present disclosure relates to a band-gap reference voltage generator, and more particularly to a band-gap reference voltage generator capable of being used at low voltage simultaneously with adjusting a reference voltage. 
   DESCRIPTION OF THE RELATED ART 
   Generally, a band-gap reference voltage generator is designed to stably provide a constant or preferred voltage irrespective of a variation of temperature or external voltage. Such a band-gap reference voltage generator is widely used for a semiconductor memory device or other application devices requiring a reference voltage such as a thermal sensor of an On-Die thermometer. 
   The above-mentioned band-gap reference voltage generator generates a reference voltage V REF  by adding a voltage V BE  of a Voltage Base-Emitter  (V BE ) generator, for constantly providing a predetermined diode voltage by performing a diode-connection to a bipolar transistor, and a voltage V T  of a thermal voltage (V T ) generator which is capable of generating a voltage proportional to a constant “KT” (where K=Boltzman constant and T=absolute temperature) by generating a V BE  difference between two bipolar transistors, such that it minimizes a temperature coefficient using the equation denoted by V REF =V BE +KV T . 
   In this case, the unique voltage (V BE ) generator has a negative temperature coefficient of −1.8 mV/° C., and the thermal voltage (V T ) generator has a positive(+) temperature coefficient of 0.082 mV/° C. 
   Therefore, the unique voltage (V BE ) generator and the thermal voltage (V T ) generator have temperature coefficients opposite to each other. If the unique voltage (V BE ) generator and the thermal voltage (V T ) generator search for an absolute temperature associate with a reference voltage which is constant relative a variation of temperature, and calculates a reference voltage (V REF ) using the absolute temperature, the reference voltage (V REF ) may be set to about 1.25V. Provided that the reference voltage (V REF ) is almost equal to a band-gap voltage of silicon (Si), it should be noted that the device associated with the reference voltage (V REF ) is referred to as a band-gap reference voltage generator. 
     FIG. 1  is a circuit diagram illustrating a conventional band-gap reference voltage generator. 
   Referring to  FIG. 1 , the conventional band-gap reference voltage generator includes a V BE  reference voltage generator  11  and a V T  reference voltage generator  12 . The V BE  reference voltage generator  11  has a negative temperature coefficient (i.e., −1.8 mV/° C. ). The V T  reference voltage generator  12  has a positive(+) temperature coefficient of 0.082 mV/° C. 
   The conventional band-gap reference voltage generator shown in  FIG. 1  further includes a comparator  13  and a PMOS transistor MP 1 . The comparator  13  compares an output signal of the V BE  reference voltage generator  11  with an output signal of the V T  reference voltage generator  12 . The PMOS transistor MP 1  provides a power-supply voltage (VDD) to the V BE  reference voltage generator  11  and V T  reference voltage generator  12 . 
   By the above-mentioned circuit configuration, a current flowing in a diode-connected bipolar transistor and a voltage different as between both ends can be represented by the following equation 1: 
   
     
       
         
           
             
               
                 I 
                 ≅ 
                 
                   
                     
                       I 
                       s 
                     
                     · 
                     
                       ⅇ 
                       
                         q 
                         · 
                         
                           
                             V 
                             f 
                           
                           / 
                           k 
                         
                         · 
                         T 
                       
                     
                   
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   
                     V 
                     f 
                   
                 
                 ≅ 
                 
                   
                     
                       V 
                       T 
                     
                     · 
                     ln 
                   
                   ⁢ 
                   
                     I 
                     
                       I 
                       s 
                     
                   
                 
               
             
             
               
                 [ 
                 
                   Equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   1 
                 
                 ] 
               
             
           
         
       
     
   
   The V a -node voltage and the V b -node voltage of  FIG. 1  implements an equation denoted by V a =V b , such that a voltage dVf between both ends of a resistor R 3  can be represented by the following equation 2: 
   
     
       
         
           
             
               
                 
                   dV 
                   f 
                 
                 = 
                 
                   
                     
                       V 
                       
                         f 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         1 
                       
                     
                     - 
                     
                       V 
                       
                         f 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         2 
                       
                     
                   
                   = 
                   
                     
                       V 
                       T 
                     
                     · 
                     
                       ln 
                       ⁡ 
                       
                         ( 
                         
                           
                             
                               N 
                               · 
                               R 
                             
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                           
                             R 
                             ⁢ 
                             
                                 
                             
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                             1 
                           
                         
                         ) 
                       
                     
                   
                 
               
             
             
               
                 [ 
                 
                   Equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   2 
                 
                 ] 
               
             
           
         
       
     
   
   Therefore, a reference voltage of a band-gap circuit can be represented by the following equation 3: 
   
     
       
         
           
             
               
                 
                   V 
                   ref 
                 
                 = 
                 
                   
                     
                       V 
                       
                         f 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         1 
                       
                     
                     + 
                     
                       
                         
                           R 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           2 
                         
                         
                           R 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           3 
                         
                       
                       · 
                       
                         dV 
                         f 
                       
                     
                   
                   = 
                   
                     
                       V 
                       
                         f 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         1 
                       
                     
                     + 
                     
                       
                         
                           R 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           2 
                         
                         
                           R 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           3 
                         
                       
                       · 
                       
                         ln 
                         ⁡ 
                         
                           ( 
                           
                             
                               
                                 N 
                                 · 
                                 R 
                               
                               ⁢ 
                               
                                   
                               
                               ⁢ 
                               2 
                             
                             
                               R 
                               ⁢ 
                               
                                   
                               
                               ⁢ 
                               1 
                             
                           
                           ) 
                         
                       
                       · 
                       
                         V 
                         T 
                       
                     
                   
                 
               
             
             
               
                 [ 
                 
                   Equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   3 
                 
                 ] 
               
             
           
         
       
     
   
   In other words, a rate of variation based on temperature of the voltage V f1  is −1.8 mV/° C., and a rate of variation based on temperature of the voltage V T  is 0.082 mV/° C., such that a coefficient of (R 2 /R 3 )ln(NR 2 /R 1 ) of Equation 3 is adjusted to provide a reference voltage insensitive to temperature variation. The above-mentioned reference voltage corresponds to a Si (Silicon) band-gap, and has a value of about 1.25V. 
   However, the conventional band-gap reference voltage generator produces a reference voltage using the sum of a PTAT (Proportional To Absolute Temperature) voltage and a CTAT (Complementary proportional To Absolute Temperature) voltage, such that it is difficult to normally operate the circuit at low operation voltage equal to or less than a reference voltage (i.e., 1.25V). 
   There is a need for a band-gap reference voltage generator capable of being used at low voltage simultaneously with adjusting a reference voltage. 
   SUMMARY 
   In accordance with one aspect of the present disclosure, a band-gap reference voltage generator is provided which comprises a first reference current generator including a unique-voltage generator for generating a base-emitter unique voltage having a negative temperature coefficient; a thermal voltage generator for generating a thermal voltage having a positive temperature coefficient, and a driver for generating a first reference current in response to a first voltage signal generated by comparison of the unique voltage and the thermal voltage, a second reference current generator including a driver for generating a second reference current in response to a second voltage signal generated by comparison of a division voltage of a power-supply voltage and the unique voltage, and a reference voltage generator including a driver for forming a current mirror in association with each of the first reference current generator and the second reference current generator, and generating a third reference current and a fourth reference current via the formed current mirrors, and a current-voltage converter for adding the third reference current and the fourth reference current, converting the sum of the third reference current and the fourth reference current into a reference voltage, and outputting the reference voltage. 
   Preferably, the first reference current generator includes a base-emitter unique voltage generator which is diode-connected to a bipolar transistor, and generates a constant diode voltage when receiving the power-supply voltage, a thermal voltage generator for generating a V BE  difference between two bipolar transistors, and generating a thermal voltage proportional to a specific constant KT (where K=Boltzman constant and T=absolute temperature) when receiving the power-supply voltage, a comparator for comparing an output voltage of the base-emitter unique voltage generator with an output voltage of the thermal voltage generator, amplifying a difference between the output voltage of the base-emitter unique voltage generator and the output voltage of the thermal voltage generator, and outputting the amplified result, a first driver for transmitting the power-supply voltage to the thermal voltage generator in response to the output signal of the comparator, and generating the first reference current, and a second driver for transmitting the power-supply voltage to the unique-voltage generator in response to the output signal of the comparator. The first driver and the second driver form a current mirror. 
   Preferably, the base-emitter unique voltage generator is diode-connected to the bipolar transistor to receive the power-supply voltage via the second driver. 
   Preferably, the thermal voltage generator connects a resistor for receiving the power-supply voltage via the first driver to the diode-connected bipolar transistor in the form of a series connection. 
   Preferably, the comparator includes an operational amplifier (OP-amp) configured to compare the base-emitter unique voltage of the unique voltage generator with the thermal voltage of the thermal voltage generator, amplify a difference between the base-emitter unique voltage and the thermal voltage, and output the amplified result to the current mirror. 
   Preferably, the OP-amp receives the base-emitter unique voltage as an inverting(−) signal, and receives the thermal voltage as a non-inverting(+) signal. 
   Preferably, the second driver generates a current signal having a multiple relation in association with the first reference current. 
   Preferably, the first driver and the second driver are PMOS transistors, respectively. 
   Preferably, the second reference current generator includes a voltage divider for performing division of the power-supply voltage, a comparator for comparing the division voltage of the voltage divider with the unique voltage, amplifying a difference between the division voltage and the unique voltage, and outputting the amplified result, and a third driver for transmitting the power-supply voltage to the voltage divider in response to an output signal of the comparator, and generating the second reference current. 
   Preferably, the voltage divider includes a resistor configured to receive the power-supply voltage via the third driver. 
   Preferably, the comparator includes an OP-amp for comparing the division voltage with the unique voltage, amplifying a difference between the division voltage and the unique voltage, and outputting the amplified result to the third driver. 
   Preferably, the OP-amp receives the base-emitter unique voltage as an inverting(−) signal, and receives the division voltage as a non-inverting(+) signal. 
   Preferably, the third driver is a PMOS transistor. 
   Preferably, the reference voltage generator includes a fifth driver for providing the power-supply voltage in response to an output signal of a comparator of the first reference current generator, forming a current mirror in association with a first driver, and generating a third reference current which has a multiple relation in association with the first reference current, a fourth driver for providing the power-supply voltage in response to an output signal of a comparator of the second reference current generator, forming a current mirror in association with a third driver of the second reference current generator, and generating the fourth reference current which has a multiple relation in association with the second reference current, and a current-voltage converter for adding the third reference current of the fifth driver and the fourth reference current of the fourth driver, converting the sum of the third reference current and the fourth reference current into a reference voltage, and outputting the reference voltage. 
   Preferably, the fourth driver and the fifth driver are composed of PMOS transistors, respectively. 
   Preferably, the current-voltage converter includes a resistor configured to receive the power-supply voltage via the fourth driver and the fifth driver, and convert the sum of the third reference current generated from the fifth driver which forms the current mirror in association with the first driver, and the fourth reference current generated from the fourth driver which forms the current mirror in association with the third driver, into the reference voltage. 
   As described above, the band-gap reference voltage generator according to the subject matter of the present disclosure converts the sum of I PTAT  signal (where PTAT is a Proportional To Absolute Temperature) and I CTAT  signal (where CTAT is a Complementary proportional To Absolute Temperature) into a voltage via a resistor, and generates a reference voltage. Therefore, the band-gap reference voltage generator has no limitation in its operation voltage, and can properly adjust a desired reference voltage via resistance. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The above-mentioned and other features and advantages of the subject matter of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which: 
       FIG. 1  is a circuit diagram illustrating a conventional band-gap reference voltage generator; 
       FIG. 2  is a circuit diagram illustrating a band-gap reference voltage generator according to an exemplary embodiment of the present disclosure; and 
       FIG. 3  is a graph illustrating the simulation result of the band-gap reference voltage generator shown in  FIG. 2 . 
   

   DESCRIPTION OF THE PREFERRED EMBODIMENTS 
   Now, preferred embodiments of the present disclosure will be described in detail with reference to the annexed drawings. In the drawings, the same or similar elements are denoted by the same reference numerals even though they are depicted in different drawings. In the following description, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present disclosure rather unclear. 
     FIG. 2  is a circuit diagram illustrating a band-gap reference voltage generator according to a preferred embodiment of the present disclosure. 
   Referring to  FIG. 2 , the band-gap reference voltage generator includes a first reference current generator  20 , a second reference current generator  30 , and a reference voltage generator  40 . 
   The first reference current generator  20  includes a unique-voltage generator  21 , a thermal voltage generator  22 , and a driver MP 1 . 
   The unique-voltage generator  21  generates a base-emitter unique voltage having a negative temperature coefficient. The thermal voltage generator  22  generates a thermal voltage having a positive temperature coefficient. The driver MP 1  generates a first reference current (I PTAT ) in response to a first voltage signal generated by the comparison/amplification of the unique voltage and the thermal voltage. 
   The second reference current generator  30  includes a driver MP 3 , which generates a second reference current (I CTAT ) in response to a second voltage signal generated by the comparison/amplification of a division voltage of a power-supply voltage (VDD) and the unique voltage. 
   The reference voltage generator  40  includes a driver, which forms a current mirror in association with each of the first reference current generator  20  and the second reference current generator  30 , and generates a third reference current (M·I PTAT ) and a fourth reference current (K·I CTAT ) via the formed current mirrors. The reference voltage generator  40  includes a current-voltage converter  41 , which adds the third reference current (M·I PTAT ) and the fourth reference current (K·I CTAT ), converts the sum of the third reference current (M·I PTAT ) and the fourth reference current (K·I CTAT ) into a reference voltage, and outputs the reference voltage. 
   The first reference current generator  20  includes a base-emitter unique voltage generator  21 , a thermal voltage generator  22 , a comparator  23 , a first driver MP 1 , and a second driver MP 2 . The base-emitter unique voltage generator  21  diode-connected to a bipolar transistor Q 1  generates a constant diode voltage when receiving a power-supply voltage (VDD). The thermal voltage generator  22  generates a V BE  difference between two bipolar transistors Q 1  and Q 2 , and generates a thermal voltage (V T : Va-node voltage) proportional to a specific constant KT (where K=Boltzman constant and T=absolute temperature) when receiving the power-supply voltage (VDD). The comparator  23  compares an output voltage of the base-emitter unique voltage generator  21  with an output voltage of the thermal voltage generator  22 , amplifies a difference between the output voltage of the base-emitter unique voltage generator  21  and the output voltage of the thermal voltage generator  22 , and outputs the amplified result. The first driver MP 1  transmits a power-supply voltage (VDD) to the thermal voltage generator  22  in response to the output signal of the comparator  23 , and generates the first reference current (I PTAT ). The second driver MP 2  transmits the power-supply voltage (VDD) to the unique-voltage generator  21  in response to the output signal of the comparator  23 . In this case, it should be noted that the first driver MP 1  and the second driver MP 2  form a current mirror. 
   The base-emitter unique-voltage generator  21  is diode-connected to the bipolar transistor Q 1  for receiving the power-supply voltage (VDD) via the second driver MP 2 . 
   The thermal voltage generator  22  connects a resistor R 1  for receiving the power-supply voltage (VDD) via the first driver MP 1  to the diode-connected bipolar transistor Q 1  in the form of a series connection. 
   The comparator  23  includes an operational amplifier (OP-amp)  23  capable of comparing a base-emitter unique voltage (V BE1 ) with the thermal voltage (V T ) of the thermal voltage generator  22 , amplifying a difference between the base-emitter unique voltage (V BE1 ) and the thermal voltage (V T ), and outputting the amplified result to the current mirror  24 . In this case, the OP-amp  23  receives the base-emitter unique voltage (V BE ) as an inverting(−) signal, and receives the thermal voltage (V T ) as a non-inverting(+) signal. 
   The current mirror  24  includes a first driver MP 1  and a second driver MP 2 . The first driver (MP 1 ) transmits the power-supply voltage (VDD) to the thermal voltage generator  22  in response to the output signal of the comparator  23 , and generates a first reference current (I PTAT ). The second driver MP 2  forms a current mirror in association with the first driver MP 1 , and transmits the power-supply voltage (VDD) to the unique-voltage generator  21  in response to the output signal of the comparator  23 , and has a multiple relation in association with the first reference current (I PTAT ). 
   Each of the first and second drivers MP 1  and MP 2  is composed of a PMOS transistor. 
   The second reference current generator  30  includes a voltage divider  33 , a comparator  31 , and a third driver MP 3 . The voltage divider  33  performs division of the power-supply voltage (VDD). The comparator  31  compares the division voltage of the voltage divider  33  with the unique voltage (V BE1 ), amplifies a difference between the division voltage and the unique voltage (V BE1 ), and outputs the amplified result. The third driver MP 3  transmits the power-supply voltage (VDD) to the voltage divider  33  in response to an output signal of the comparator  31 , and generates a second reference current (I CTAT ). 
   The voltage divider  33  includes a resistor R 2  for receiving the power-supply voltage (VDD) via the third driver MP 3 . 
   The comparator  31  includes an OP-amp  31 , which compares the division voltage (i.e., a V3-node voltage) with the unique voltage (V BE1 ), amplifies a difference between the division voltage and the unique voltage (V BE1 ), and outputs the amplified result to the third driver MP 3 . 
   The OP-amp  31  receives a base-emitter unique voltage as an inverting(−) signal, and receives the division voltage as a non-inverting(+) signal. In other words, the OP-amp  31  receives the base-emitter unique voltage at its inverting(−) terminal, and receives the division voltage at its non-inverting(+) terminal. 
   The third driver MP 3  is composed of a PMOS transistor. 
   The reference voltage generator  40  includes a fifth driver MP 5 , a fourth driver MP 4 , and a current-voltage converter  41 . The fifth driver MP 5  provides a power-supply voltage (VDD) in response to an output signal of the comparator  23  of the first reference current generator  20 , forms a current mirror  24  in association with the first driver MP 1 , and generates a third reference current (M·I PTAT ) which has a multiple relation in association with the first reference current (I PTAT ). The fourth driver MP 4  provides the power-supply voltage (VDD) in response to an output signal of the comparator  31  of the second reference current generator  30 , forms a current mirror  32  in association with the third driver MP 3 , and generates a fourth reference current (K·I CTAT ) which has a multiple relation in association with the second reference current (I CTAT ) 
   The current-voltage converter  41  adds the third reference current (M·I PTAT ) of the fifth driver MP 5  and the fourth reference current (K·I CTAT ) of the fourth driver MP 4 , converts the sum of the third reference current (M·I PTAT ) and the fourth reference current (K·I CTAT ) into a reference voltage (V ref ), and outputs the reference voltage (V ref ). 
   The current-voltage converter  41  includes a resistor R 3 . The resistor R 3  receives the power-supply voltage (VDD) via the fourth driver MP 4  and the fifth driver MP 5 , and converts the sum of the third reference current (M·I PTAT ) generated from the fifth driver MP 5  which forms the current mirror  24  in association with the first driver MP 1 , and the fourth reference current (K·I CTAT ) generated from the fourth driver MP 4  which forms the current mirror  32  in association with the third driver MP 3 , into the reference voltage (V ref ). 
   The fourth driver MP 4  and the fifth driver MP 4  are composed of PMOS transistors, respectively. 
   Operations of the above-mentioned band-gap reference voltage generator according to a preferred embodiment of the present disclosure will hereinafter be described. 
   A unique voltage generator  21  of the first reference current generator  20  generates a constant diode unique voltage (V BE1 ) upon receiving the power-supply voltage (VDD) from a diode-connected bipolar transistor Q 1 . The thermal voltage generator  22  generates a thermal voltage proportional to an absolute temperature upon receiving the power-supply voltage (VDD) generated by a V BE  difference between two bipolar transistors Q 1  and Q 2 . 
   The comparator  23  compares the unique voltage V BE1  (i.e., Vb-node voltage) with the thermal voltage V T  (i.e., V1-node voltage), amplifies a difference between the unique voltage V BE1  and the thermal voltage V T , and outputs the amplified result to the first driver MP 1 . 
   The first driver MP 1  transmits the power-supply voltage (VDD) to the thermal voltage generator  22  in response to the output signal of the comparator  23 , such that it generates a first reference current (I PTAT ). The second driver MP 2  capable of forming the current mirror  24  in association with the first driver Mp 1  transmits the power-supply voltage (VDD) to the unique voltage generator  21  in response to the output signal of the comparator  23 , such that it generates a current (α·I PTAT ) proportional to the first reference current (I PTAT ). 
   In this case, a current signal flowing in the two diode-connected bipolar transistors can be represented by the following equation 4:
 
 I   Q1   =I   S exp[ V   BE1   /V   T   ] I   Q2   =N·I   S exp[ V   BE2   /V   T ]  [Equation 4]
 
   In this case, V T  is the value of K·T/q proportional to an absolute temperature (T) (where K=Boltzman constant, T=absolute temperature, and q=basic-charge quantity) 
   Also, the Va-node voltage and the Vb-node voltage are represented by Va=Vb due to the feedback operation of the OP-amp of the comparator  23 , such that the first reference current (I PTAT ) can be represented by the following equation 5: 
   
     
       
         
           
             
               
                 
                   I 
                   PTAT 
                 
                 = 
                 
                   
                     
                       ( 
                       
                         
                           V 
                           
                             BE 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             1 
                           
                         
                         - 
                         
                           V 
                           
                             BE 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                         
                       
                       ) 
                     
                     
                       R 
                       1 
                     
                   
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                         ⁡ 
                         
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                             · 
                             α 
                           
                           ) 
                         
                       
                       · 
                       
                         V 
                         T 
                       
                     
                     
                       R 
                       1 
                     
                   
                 
               
             
             
               
                 [ 
                 
                   Equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   5 
                 
                 ] 
               
             
           
         
       
     
   
   The third driver MP 3  of the second reference current generator  30 , in response to the output signal of the comparator  31  for comparing the division voltage of the voltage divider  33  with the unique voltage (V BE1 ), amplifying a difference between the division voltage and the unique voltage (V BE1 ), and outputting the amplified result, applies the power-supply voltage (VDD) to the voltage divider  33 , and generates the second reference current (I CTAT ). 
   The fifth driver MP 5  of the reference current generator  40  provides the power-supply voltage (VDD) in response to the output signal of the comparator  23  of the first reference current generator  20 , and forms the current mirror  24  in association with the first driver MP 1 , such that it generates the third reference current (M·I PTAT ) having a multiple relation in association with the first reference current (I PTAT ) In this case, the current signal of the fifth driver MP 3  is proportional to the current signal of the first driver Mp 1 , such that the third reference current (M·I PTAT ) can be represented by the following equation 6:
 
 I   5   =M·I   1    [Equation 6]
 
   The fourth driver MP 4  of the reference current generator  40  provides the power-supply voltage (VDD) in response to the output signal of the second reference current generator  30 , and forms the current mirror  32  in association with the third driver MP 3 , such that it generates the fourth reference current (K·I CTAT ) having a multiple relation in association with the second reference current (I CTAT ). In this case, the Vb-node voltage is equal to the Vc-node voltage at the OP-amp of the comparator  31 , and the current signal of the fourth driver MP 4  is proportional to the current signal of the third driver MP 3 , such that the fourth reference current (K·I CTAT ) can be represented by the following equation
 
 I   4   =K·I   3    [Equation 7]
 
   Therefore, the current-voltage converter  41  adds the third reference current (M·I PTAT ) generated by the current mirror of the fifth driver MP 5  to the fourth reference current (K·I CTAT ) generated by the current mirror of the fourth driver MP 4 , converts the sum of the third reference current (M·I PTAT ) and the fourth reference current (K·I CTAT ) into the reference voltage (V ref ), and outputs the reference voltage (V ref ). 
   In this case, the current signal of the fourth driver MP 4  is represented by K·I CTAT , and the current signal of the fifth driver MP 5  is represented by M·I PTAT , such that the reference voltage (V ref ) can be represented by the following equation 8: 
   
     
       
         
           
             
               
                 
                   V 
                   ref 
                 
                 = 
                 
                   K 
                   · 
                   
                     
                       R 
                       3 
                     
                     
                       R 
                       2 
                     
                   
                   · 
                   
                     ( 
                     
                       
                         V 
                         
                           BE 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           1 
                         
                       
                       + 
                       
                         
                           
                             M 
                             · 
                             
                               R 
                               2 
                             
                           
                           
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                             · 
                             
                               R 
                               1 
                             
                           
                         
                         · 
                         
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                           ⁡ 
                           
                             ( 
                             
                               N 
                               · 
                               α 
                             
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                         · 
                         
                           V 
                           T 
                         
                       
                     
                     ) 
                   
                 
               
             
             
               
                 [ 
                 
                   Equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   8 
                 
                 ] 
               
             
           
         
       
     
   
   In more detail, a variation rate of temperature of the voltage (V BE1 ) is −1.8 mV/° C., and a variation rate of temperature of the voltage V T  is 0.082 mV/° C., such that the reference voltage (V ref ) can be properly adjusted by not only values of three resistors (R 1 , R 2 , and R 3 ) but also three variables (α, M, and K) capable of providing a multiple-relation current ratio to minimize a variation width of a reference potential. 
     FIG. 3  is a graph illustrating the simulation result of the band-gap reference voltage generator shown in  FIG. 2 . 
   As can be seen from  FIG. 3 , the band-gap reference voltage generator stepwise-reduces the power-supply voltage (VDD) in the range from 1.8V to 0.8V, and provides different temperature environments of −10° C., 50° C., and 120° C. under the condition that the above-mentioned power-supply voltage (VDD) is provided. Therefore, the graph of  FIG. 3  shows a variation of the reference voltage generated at the above-mentioned temperature environments of −10° C., 50° C., and 120° C. 
   As a result, as shown in  FIG. 3 , the reference voltage is always fixed to a specific voltage of 0.65V irrespective of a temperature variation within a VDD-range from 1.1V to 1.8V. In other words, the reference voltage is always constant at 0.65V irrespective of the temperature variation within the VDD-range from 1.1V to 1.8V. 
   Therefore, the band-gap reference voltage generator according to the present disclosure can normally operate a circuit although the power-supply voltage drops to 1.1V (i.e., a power-supply voltage less than 1.25V acting as a band-gap voltage). 
   As apparent from the above description, the band-gap reference voltage generator according to the present disclosure generates a reference voltage by converting the sum of the I PTAT  signal and the I CTAT  signal into a voltage signal via a resistor, such that it can be operated at low voltage, and a desired reference voltage can be properly adjusted via resistance of the resistor. 
   Therefore, the band-gap reference voltage generator according to the present disclosure can be applied to not only semiconductor memory devices, each of which should be operated at lower voltage to reduce power consumption and generation of heat, but also other application devices requiring the reference voltage. 
   Although preferred embodiments of the present disclosure have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the disclosure and the accompanying claims. 
   This patent specification is based on and claims the priority of Korean patent application no. 2006-61488, filed Jun. 30, 2006, the entire contents of which are incorporated by reference herein.