Abstract:
The present invention provides a method of enabling measurement access to small integrated circuit features that comprises selecting a feature of an integrated circuit on a wafer and providing access to the selected feature by removing a portion of the integrated circuit adjacent to the feature, thereby preserving the wafer.

Description:
FIELD OF THE INVENTION 
     The invention relates generally to the manufacture of integrated circuits and, more particularly, to a method for improving access to integrated circuit micro-sections. 
     BACKGROUND OF THE INVENTION 
     Measuring the dimensions of features, such as sidewall angles and trenches for devices such as dynamic random access memories (DRAMs), is a critical and difficult task that impacts the design, development and fabrication of integrated circuits (ICs). Critical Dimensions (CDs) are the sizes of the smallest geometrical features, such as the width of interconnect lines, contacts or trenches, that can be formed during integrated circuit device/circuit manufacturing using given technology. Current methods for measuring CDs are either limited by size or result in destruction of the wafer. 
     Critical Dimension Scanning Electron Microscopy (CD-SEM) is an imaging method with a lateral resolution below 10 nm. A focused beam of electrons is scanned across a sample and an image is constructed based on the detection of secondary electron current. The sample being measured must be coated with a conductive film. Two main types of measurements are employed: 1) top-down SEMs, used for linewidth measurements of features, and 2) feature cross-section measurements. CD-SEMs are able to measure dimensions near the surface of a chip, but they cannot collect secondary electron signals from the bottom of a hole or trench. 
     Atomic Force Microscopy (AFM) is a method that is capable of surface visualization with near-atomic resolution. AFM provides a measurement of the roughness of solid surfaces based on electrostatic interactions between the surface and the measuring tip. The measuring tip can be set above the surface, on the surface, or can tap the surface, oscillating at high frequency (tapping mode). However, if the openings of the features are small, AFM tips may not be able to reach into them. Currently, sidewall angles for these features are measured from cross-section SEM images. This requires cleaving and destruction of the wafer. 
     Many features of interest in integrated circuit manufacturing are difficult to measure by using AFMs or top-down CD-SEMs. This is because either the tip of the AFM is too large for the opening of the features or the collection angle for the secondary electrons is steep. There are many such parameters for which measurements are desired, such as sidewall angles and profiles and trench and various recess depths. 
     Accordingly, there is a need for a method to enable access to small features of integrated circuits, a method that does not result in the destruction of the wafer. The present invention enables access to small integrated circuit features by increasing the size of openings to those features without destroying the wafer. The present invention uses masking and etching to clear sufficiently large areas to allow a measurement tool ingress. 
     More specifically, the present invention provides a method of enabling measurement access to small integrated circuit features that comprises selecting a feature of an integrated circuit on a wafer and providing access to the selected feature by removing a portion of the integrated circuit adjacent to the feature, thereby preserving the wafer. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The above and further advantages of the invention may be better understood by referring to the following description in conjunction with the accompanying drawings in which corresponding numerals in the different figures refer to the corresponding parts, in which: 
     FIG. 1 displays a flow diagram in accordance with an embodiment of the present invention; 
     FIG. 2 illustrates a mask positioned in accordance with an embodiment of the present invention; 
     FIG. 3 illustrates a three dimensional view of a representative feature to be measured; 
     FIG. 4 illustrates FIG. 3 coated in accordance with an embodiment of the present invention; 
     FIG. 5 illustrates FIG. 4 with areas of coating exposed through a mask in accordance with an embodiment of the present invention; 
     FIG. 6 illustrates FIG. 5 with exposed areas of coating removed in accordance with an embodiment of the present invention; 
     FIG. 7 illustrates FIG. 6 after etching in accordance with an embodiment of the present invention; and 
     FIG. 8 illustrates FIG. 7 after coating removal in accordance with an embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION 
     While the making and using of various embodiments of the present invention are discussed herein in terms of preparing and measuring an integrated circuit trench, it should be appreciated that the present invention provides many inventive concepts that can be embodied in a wide variety of contexts. The specific embodiments discussed herein are merely illustrative of specific ways to make and use the invention, and are not meant to limit the scope of the invention. 
     The present invention enables access to small integrated circuit features by increasing the size of openings to such features without destroying the wafer. FIG. 1 displays a flow diagram in accordance with an embodiment of the present invention. Starting at terminal  105 , a integrated circuit feature measured is selected for measurement in block  110 . The entire wafer is then coated in block  115 , with, for example, a conventional photosensitive resist. Next, a mask, such as a conventional lithographic mask, is applied to the coated wafer in block  120  to expose the selected integrated circuit feature. In block  125 , using any desired conventional process, the resist is removed from the areas of the wafer exposed by the mask. The exposed areas are then etched in block  130 . Finally, the resist is removed from the remainder of the wafer in block  135 , resulting in an enlarged opening capable of receiving an AFM tip. At block  140 , the selected integrated circuit feature is accessed for measurement. 
     Turning now to FIG. 2, mask  220  positioned in accordance with an embodiment of the present invention is illustrated. Wafer  200  includes trenches  210 . Although FIG. 2 displays trenches  210  as long trenches, the present invention is also suitable for circular or elliptical trenches. For measurements of trenches  210 , mask  220  is skewed at angle  225  relative to the longitudinal direction of trenches  210 . By skewing mask  220 , improved access to at least one wall (described in relation to FIG. 3, below) of one of trenches  210  is realized. Additionally, if mask  220  is skewed, its placement need not be precise. If mask  220  translates or rotates a small amount relative to trenches  210 , the present invention can still achieve the desired result. Alternatively, mask  220  may be rotated 180° about an axis parallel to the longitudinal direction of trenches  210  to enable improved access to other areas of trenches  210 . Furthermore, a single mask  220  may also be used in conjunction with other masks  220 . For example, two masks  220  may be placed to form a “V” on wafer  200 , thereby bridging multiple, adjacent trenches  210  at mirror image angles. Such a configuration could, for example, enable measurement of the width of an area between multiple trenches  210  via the “peninsula” formed between the legs of the “V.” 
     FIG. 3 illustrates a three dimensional view of a representative feature, trench  210 , to be measured. Trench  210  is an element of wafer  200 . For purposes of this discussion, the angle of sidewall  315  of trench  210  is the critical dimension (CD) to be measured. Increased access to trench  210  will also allow other features to be measured. Trench  210  is currently too small to allow a measurement tool, such as an AFM tip, access. In this example, the present invention will create an opening large enough for an AFM tip to measure the angle of sidewall  315 . 
     The present invention initially coats wafer  200  with coating  430  as shown in FIG.  4 . Photosensitive resist would be an exemplary choice for coating  430 . FIG. 4 illustrates FIG. 3 coated in accordance with an embodiment of the present invention. Although all of wafer  200  is covered by coating  430 , only a small section of coating  430  is shown in FIG.  4 . Trench  210  with sidewall  315  is beneath coating  430 . Next, mask  220  is positioned on coating  430 . A section of coating  430  is exposed through mask  220 . FIG. 5 illustrates FIG. 4 with areas of coating  430  exposed through mask  220  in accordance with an embodiment of the present invention. Again, although all of wafer  200  is covered by coating  430 , only a small section of coating  430  is shown in FIG.  5 . Mask  220  is shown at angle  225  relative to the longitudinal direction of trench  210 . Trench  210  with sidewall  315  is now beneath both coating  430  and mask  220 . 
     FIG. 6 illustrates FIG. 5 with the exposed areas of coating  430  removed in accordance with an embodiment of the present invention. Coated wafer  200  now includes exposure  650  through coating  430 . Although a portion of trench  210  with sidewall  315  is revealed in exposure  650 , it is important to note that coating  430  still covers and protects a portion of sidewall  315  of trench  210 (denoted by area  655 ). Exposure  650  is then etched to produce exposure  760  as shown in FIG. 7, which illustrates FIG. 6 after etching in accordance with an embodiment of the present invention. Although exposure  760  is much larger than exposure  650 , coating  430  of wafer  200  still protects sidewall  315  of trench  210  (denoted by area  655 ). Finally, coating  430  is removed from wafer  200 . The result is shown on wafer  200  in FIG.  8 . Exposure  760  facilitates greater access to trench  210  at opening  870 . Exposure  760  allows a measurement tool, such as an AFM tip, to be inserted, generally parallel to the longitudinal direction of trench  210 , into trench  210  through opening  870 , thereby enabling the measurement of the angle of sidewall  315 . 
     The present invention can also be performed with a dedicated lithography process or combined with a subsequent lithography-etch step. The choice would depend on the application. For example, if the depth of a subsequent etch will clear sufficient area on the sidewall, the lithography-etch for improving access to micro-sections can be incorporated, rather than performed independently. Additionally, another embodiment includes the selective use of masks on disparate areas of a wafer. For example, the present invention can be used on a particular chip on a wafer or a specific area of an individual chip without causing loss of product. It is not necessary to use the entire chip. An exemplary application of the present invention would be to test areas of an actual product chip. Alternatively, edge chips, that may or may not be partial chips and do not yield product, can be used because similar measurements will be obtained from chip to chip across a given wafer. 
     Although exemplary embodiments of the present invention have been described in detail, it will be understood by those skilled in the art that various modifications can be made therein without departing from the spirit and scope of the invention as set forth in the appended claims.