Abstract:
A symmetric double heterojunction transistor consisting of a lightly doped wide bandgap--heavily doped narrow bandgap--lightly doped wide bandgap structure with the wide bandgap materials having a conductivity type opposite to that of the narrow bandgap material is optically accessed, symmetric with respect to the polarity of applied bias across the transistor and has linear current-voltage characteristics through the origin. A preferred embodiment uses a nGa 1-x  Al x  As-pGaAs-nGa 1-x  Al x  As structure.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention relates generally to heterojunction transistors and particularly to a symmetrical double heterojunction phototransistor. 
     2. Description of the Prior Art 
     Heterostructure transistors have been studied in considerable detail since they were originally proposed by Shockley in 1951 (U.S. Pat. No. 2,569,347), because the wide bandgap emitter opened possibilities of obtaining high injection efficiencies into a narrow bandgap base. Many material systems, including Si-Ge, Si-GeSi, GaAs-Ge, ZnSe-GaAs, ZnSe-Ge, and Ga 1-x  Al x  As-GaAs, have been investigated and used to make heterojunction devices with varying amounts of success. For example, the devices described in U.S. Pat. No. 3,211,970 will have low breakdown voltages, for reasonable base thicknesses, because the carrier concentration is less in the base than in the emitter or collector. With many of the material systems investigated, defect currents through interface recombination states limit current gains to small values. At the present time, the Ga 1-x  Al x  As-GaAs system appears most promising because junctions can be fabricated with a low density of interfacial states because of the good lattice match. U.S. Pat. No. 3,780,359 describes an (n-Ga 1-x  Al x  As) - (p-GaAs) - (n-GaAs), 0.3&lt;x&lt;0.9, heterostructure designed for high frequency use and having a DC current gain of 25 . A further study of the same system reported in Journal of Applied Physics 46, pp. 2120-2124, May 1975, used a thinner base and achieved current gains of 350. 
     Interest in heterojunction devices is further increased as they are attractive for use as photodetectors because, unlike homojunction devices, materials can be chosen that are essentially transparent to the light of interest. This permits higher efficiencies as all incident photons can be absorbed where desired within the device. Devices of this type, i.e., transistors with optically accessed bases, have been made by Alferov, Soviet Physics-Semiconductors 7, pp. 780-782, December 1973, and Beneking, Electronics Letters 12, pp. 395-396, Aug. 5, 1976, who reported gains of 350 and 2,000, respectively. 
     There are many situations where it is desirable to provide electrical isolation between two electrical circuits. For example, it may be desired to insure circuits are independent of each other with respect to DC potential levels or to restrict spurious or unwanted voltages to a single part of the complete electrical system. Many devices, including relays and transformers, can provide electrical isolation. However, for some purposes, primarily relating to size, it has been found desirable to couple circuits optically. 
     Devices providing such optical coupling are commonly called opto-isolators. These are solid state devices consisting of a light source connected to the input circuit, commonly a light emitting diode (LED), and a photodetector connected to the output circuit. A current flowing in the input circuit causes the light source to emit and some of the light falls on the photodetector which causes the output circuit to respond. Because of their small sizes, opto-isolators are well-suited for use in solid state equipment. 
     Although photodetectors of the type described can be used in opto-isolators, they suffer a drawback that complicates their use in opto-isolators. For many purposes, it is more convenient to operate the photodetector with either polarity of applied voltage. The devices described will work with only one polarity of voltage across the photodetector and care must therefore be taken to insure that the voltage polarity is always correct. In many cases, such as supervisory signaling in telephone systems, this is inconvenient or impossible and a bilateral switch is desired. 
     SUMMARY OF THE INVENTION 
     In accordance with the present invention, an optically accessed double heterostructure transistor is provided whose operation is symmetric with respect to the polarity of the applied bias. The device is a symmetric structure having a lightly doped wide bandgap-heavily doped narrow bandgap-lightly doped wide bandgap configuration in which the narrow bandgap layer is of a conductivity type opposite to that of the two wide bandgap layers. The narrow bandgap layer serves as the base and, depending upon the polarity of the applied bias, one of the wide bandgap layers is the emitter and the other is the collector. In a preferred embodiment, the device has a multilayer Ga 1-x  Al x  As-Ga 1-y  Al y  As-Ga 1-x  Al x  As, 0.1&lt;x&lt;0.8, and x&gt;y, structure. The device has a linear bilateral current-voltage characteristic through the origin and is well-suited for use in opto-isolators. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     FIGS. 1(a) and 1(b) are energy band diagrams of the double heterostructure transistor when unbiased and when biased; 
     FIG. 2 illustrates the physical structure of the transistor; 
     FIGS. 3(a) and 3(b) are equivalent circuits of a conventional phototransistor and of the bilateral phototransistor; and 
     FIG. 4 depicts typical current-voltage characteristics of the bilateral phototransistor. 
    
    
     DETAILED DESCRIPTION 
     FIGS. 1(a) and 1(b) are energy band diagrams for devices of this invention. FIG. 1(a) shows the energy levels when the device is not biased and FIG. 1(b) shows the energy levels for the device when biased. The diagrams depict n-p-n devices and the invention will be described with respect to n-p-n devices although p-n-p devices can be made with obvious modifications. The devices depicted are symmetric, provided the injection efficiencies for both junctions are equal and close to unity. This is insured by having the emitter and collector bandgaps sufficiently larger than the base bandgap for good injection efficiency. The difference should be at least two Kt. 
     The presence of the wide bandgap emitter and collector means that a majority of the incident photons, provided their energies are less than that of the emitter or collector bandgap, will pass through either the emitter or collector and, if their energies exceed that of the base bandgap, be absorbed in the narrow bandgap base. The bandgap of the emitter and collector regions must be such that those regions are essentially transparent to the incident light. This structure differs from that of the more usual homostructure phototransistor in which most of the photons are absorbed in the vicinity of the base-collector junction although some photons are necessarily absorbed as they pass through either the emitter or collector. 
     The structures of this invention can be fabricated using any one of a number of well-known and conventional techniques. An exemplary technique, liquid phase epitaxy, will be described in some detail. Other methods, such as vapor phase epitaxy or molecular beam epitaxy, may also be used. 
     A conventional double chamber pyrolytically coated graphite slider boat is employed. The first chamber contains gallium and aluminum as solvents and tellurium as dopant. Other well-known dopants, such as sulphur, selenium, tin, and silicon, might also be used. The second chamber, used for growing the base layer, contains gallium as the solvent and germanium as dopant. Other well-known dopants, such as silicon, zinc and cadmium, might also be used. Both chambers are maintained at a nominal temperature of 900 degrees C. and saturated with arsenic from a GaAs source. The temperature selected is not crucial. Temperatures as low as 400 degrees C. or as high as the melting temperature of GaAs might also be used. Below 400 degrees C., the growth process becomes too slow for useful results. The dopant level is such that the p carrier concentration is desirably less than 10 20  /cm 3  and the n carrier concentration is desirably less than 10 18  /cm 3  and n is always less than p. The melt composition in the first chamber may be varied in well-known manner so as to grow Ga 1-x  Al x  As with 0.15&lt;x&lt;0.8, and similarly in the second chamber so as to grow Ga 1-y  Al y  As, x&gt;y. For a typical high voltage embodiment of the device, nominal values for n and p are 10 15  /cm 3  and 10 17  /cm 3 , respectively. Equal doping concentrations for the n type regions yield symmetric breakdown voltages, which is desirable for many purposes. The concentrations need not be equal, however. If the Al content becomes too low, i.e., if x&lt;0.15, the emitter efficiency becomes too small for useful results. If the Al content is too high, i.e., if x&gt;0.8, the materials tend to become hydroscopic. If x does not sufficiently exceed y, there will be poor absorption in the base or very narrow spectral sensitivity. A particularly useful embodiment has y equal to 0.0. Additionally, x should exceed y by an amount such that the bandgap difference between emitter and base exceeds several kT. 
     The structures may be grown on any suitable substrate that matches lattice constants and thermal expansion coefficients and is chemically compatible with the material grown, such as the (100) face of a GaAs crystal. The substrate selected is brought under the first chamber, to grow the first layer, at a nominal temperature of 900 degrees C. and the furnace temperature is lowered at a nominal rate of 1 degree C. per minute although the cooling rate may be varied in well-known manner. Alternatively, the ovens may be maintained at a constant temperature and an electric current applied. The substrate is moved to the second chamber, to grow the second layer, and then returned to the first chamber to grow the third layer. Growth is terminated at 700 degrees C. Times and temperatures within each chamber as well as cooling rates may be varied in well-known manner depending upon the dimensions desired of the layers of the structure. 
     The substrate is removed, if so desired, with selective chemical etching with a hydrogen peroxide-ammonium hydroxide solution having a pH between 8.4 and 8.6, and contacts such as Sn-Au or Al-Sn-Au are applied to both surfaces. The contacts to the first layer grown are typically small dots such as 5 mil diameter dots on 15 mil centers that minimize light absorption and reflection. The contact on the opposite side can be a solid area contact. Using conventional techniques, the wafer is sawed into chips. 
     The widths of the emitter and collector are desirably between 2 μm and 200 μm. The base width is a compromise between competing considerations. The phototransistor gain, β, is approximated by the expression β=2(L/W) 2  where L is the minority carrier diffusion length in the base and W is the thickness of the base. The base width cannot be made arbitrarily small to maximize the gain because the base must have a width sufficient to absorb a large fraction of the incident light in the base and also to keep an adequately high breakdown voltage to prevent base punchthrough. Because of these considerations, the base width is necessarily a compromise and will vary with the materials chosen. For the GaAs base described, the minimum width now is approximately 1000 angstroms although alternative growth techniques such as molecular beam epitaxy might lower this to 10 angstroms, and the maximum base width that still yields useful gains is approximately 10 μm.  Larger widths do not yield adequate gains and smaller widths have breakdown voltages too low for practical use. 
     FIG. 2 shows the physical structure of the symmetric transistor whose fabrication has just been described. Electrical contact 9 is a solid area contact made to region 7 which is either the emitter or collector depending upon the polarity of the applied voltage. Region 5 is the base and region 3 is either the collector or emitter. Contacts 1 are applied to region 3 and are typically dots to permit light hv from light source 11 to pass through. When the transistor is used in an opto-isolator, contacts 1 and 9 are connected to the electrical output circuit and light source 11, typically an LED, is connected to an electrical input circuit and the transistor and LED are optically coupled. 
     A fundamental difference between normal transistors and optically accessed transistors, i.e., phototransistors, is that normal transistors are biased ON by charge carrying electrons while phototransistors are biased ON by chargeless photons which create electron-hole pairs in the absorption process. If the base of the phototransistor is left floating, the collector current will equal the emitter current. The equivalent circuit for such a phototransistor is shown in FIG. 3(a) with I ph  representing the photogenerated current and C, B and E the collector, base and emitter, respectively. The equivalent circuit for the symmetric structures of this invention is shown in FIG. 3(b). The equivalent circuit indicates that the current-voltage characteristics should pass through and be symmetric about the origin if the gain of the structure is the same for both polarities. 
     EXAMPLE 
     Growth was initiated at 800 degrees C. using a (100) face of a GaAs single crystal as a substrate. The furnace was cooled at a rate of 0.25 degree C. per minute. At 795 degrees C., the substrate was moved to the second chamber for 180 seconds and then returned to the first chamber. The dopants were tin and germanium, and the carrier concentrations were mid 10 16  /cm 3  and 10 17  /cm 3  for the n and p regions, respectively. Growth was terminated at 790 degrees C. The emitter and collector regions were Ga 0 .7 Al 0 .3 As and the base was GaAs. Al-Sn-Au contacts were applied to both surfaces. The contacts to the first surface were 5 mil diameter dots on 15 mil centers and the contact on the opposite side, i.e., the GaAs substrate side, was a solid area contact. Conventional techniques were used to saw the wafer into chips 1.1 mm on a side. The base had a width of 0.3 μm. 
     The gain and current voltage characteristics were measured with the chip illuminated with a krypton laser emitting at 799.5 μm. The highest gain measured was 5917 and the minimum breakdown voltage was 2.6 volts. This value is somewhat lower than the expected value because of the relatively small collector layer thickness. 
     FIG. 4 shows the current-voltage characteristic curves for device at several injection levels. At the lowest injection levels, i.e., for currents less than a few milliamperes, symmetry is not present. Lack of symmetry at low currents is believed due to minor differences in the two heterojunctions rather than being inherent in the device. At higher injection levels, symmetry is present. 
     Structures fabricated as described were mounted in a conventional optical cavity of an opto-isolator package and paired with Ga 1-x  Al x  As LEDs having a graded junction with x going from 0.3 to 0.0 and doped with silicon and whose peak emission intensity is at 0.885 μm. When tested with conventional techniques, the saturated characteristic was linear through the origin. 
     Examples of other material combinations that may be used in practicing the invention are GaAs-Ge, Cd 1-x  Mg x  Te-ZnTe, x less than 0.5 to prevent a phase change, InP-CdSnP 2  or GaP-Si. In all of these combinations, the second material mentioned forms the base.