Abstract:
An amplifier including a current source transistor for supplying a current to a node from a voltage rail and an input transistor switching the current at the node in response to an input signal chopped by a chopping signal. A cascode-chopping transistor operating both as a cascode transistor and a chopping transistor couples the node and an amplifier output in response to a bias voltage chopped by the chopping signal.

Description:
FIELD OF INVENTION 
   The present invention relates in general to analog circuit techniques, and in particular, to chopper stabilization circuits and methods. 
   BACKGROUND OF INVENTION 
   Operational amplifiers (“opamps”) are basic circuits utilized in a wide range of electronic circuits. In addition to amplification and buffering, opamps are typically utilized to implement operations such as summing, integration, multiplication, and others. Typical opamp applications include comparators, oscillators, filters, sample and hold circuits, and instrumentation amplifiers. 
   Opamps are often subject to an inherent input-referred offset voltage. Generally, when the voltages at the differential inputs of the opamp are equal, the output voltage should theoretically be at the mid-supply voltage. In actual applications, a slight offset in the output voltage from the mid-supply voltage occurs when the input voltages are equal. This voltage offset is commonly called the input-referred offset voltage. Additionally, opamp transistors typically generate flicker noise during switching. 
   In many more sensitive applications, reducing input-referred offset and flicker noise are important design considerations. Hence, one particular technique that has been utilized for addressing the problems of input-referred offset and flicker noise is chopper stabilization. In chopper stabilization, the signal of interest at the input of one or more stages of an opamp is modulated or “chopped” at a high frequency. Typically, the chopping frequency is selected to be at least twice the frequency of the band of the signal of interest to avoid aliasing. At the output of the chopper-stabilized stage, the signal of interest is demodulated back into the original signal band by a second chopping operation. This second chopping also modulates any inherent offset and/or flicker (1/f) noise out of the frequency band of the signal of interest. 
   While chopper stabilization advantageously minimizes the effects of input-referred offset and flicker noise, chopper stabilization can also reduce amplifier gain and/or produce chopping artifacts in the opamp output. In some applications, such as audio amplification, neither a significant reduction in gain nor the introduction of chopping artifacts in the opamp output signal is normally acceptable. For such noise and gain sensitive applications, new chopper stabilization techniques are required. 
   SUMMARY OF INVENTION 
   The principles of the present invention are embodied in a representative amplifier including a current source transistor for supplying a current to a node from a voltage rail and an input transistor switching the current at the node in response to an input signal chopped by a chopping signal. A cascode-chopping transistor operating both as a cascode transistor and a chopping transistor couples the node and an amplifier output in response to a bias voltage chopped by the chopping signal. 
   Embodiments of the present principles are advantageous in noise and gain sensitive amplifier applications, such as audio amplification. In particular, in folded-cascode amplifiers, and similar circuits, chopper stabilization is provided which maximizes voltage overhead and gain and minimizes chopping artifacts at the amplifier output. 

   
     BRIEF DESCRIPTION OF DRAWINGS 
     For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which: 
       FIG. 1  is a high level block diagram of an audio system suitable for describing a typical application of the present inventive principles; 
       FIG. 2A  is an electrical schematic diagram of a typical chopper-stabilized operational amplifier (opamp) according to the prior art; 
       FIG. 2B  is an electrical schematic diagram of another typical chopper-stabilized opamp according to the prior art; 
       FIG. 3  is an electrical schematic diagram of a representative chopper-stabilized opamp embodying the principles of the present invention; 
       FIG. 4  is an exemplary circuit suitable for generating selected bias voltages shown in  FIG. 3 ; and 
       FIG. 5  is a block diagram illustrating a quadrature opamp system according to the principles of the present invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   The principles of the present invention and their advantages are best understood by referring to the illustrated embodiment depicted in  FIGS. 1–5  of the drawings, in which like numbers designate like parts. 
     FIG. 1  is a high-level block diagram of an audio system  100  suitable for describing a typical system application of the principles of the present invention. Audio system  100  includes a digital media drive  101 , such as a compact disk (CD) or digital versatile disk (DVD) player. Digital media drive  101  provides a serial digital audio data stream ( SDATA ) to a digital to analog converter (DAC) subsystem  102 , along with associated clock and control signals. The clock signals include a master clock ( MCLK ) signal, which is utilized by the digital filters and delta-sigma modulators within DAC subsystem  102 . A serial clock ( SCLK ) signal times the transfer of serial audio data  SDATA  between digital media drive  101  and DAC subsystem  102 . Finally, a left-right clock ( LRCK ) signal determines whether left or right channel data are currently being transmitted on the  SDATA  path. Control signals ( CNTL ) support operations, such as system reset and filter de-emphasis control. 
   After conversion by DAC subsystem  102 , the analog audio signals undergo further processing, such as analog filtering, within analog audio processing block  103 . The resulting audio signals are finally amplified by audio amplification block  104 . Audio amplification block  104 , which preferably includes opamps in accordance with the inventive principles discussed below, drives a headset  105 , or similar audio output device. 
     FIG. 2A  is an electrical schematic diagram of a typical conventional chopper stabilized folded-cascode opamp  200 . In exemplary opamp  200 , the differential input signals V in+  and V −  in are chopped by input transmission gates  202   a  and  202   b  at a chopping frequency f Chop  in response to the non-overlapping chopping signals φ 1  and φ 2 . Output transmission gates  202   a  and  202   b  demodulate the resulting differential output signals V Out+  and V Out− , and chop any input-referred offset voltage and flicker noise in response to the chopping signals φ 1  and φ 2 . 
   The chopped differential input signals V in+  and V in−  drive a differential pair of NMOS transistors  203   a  and  203   b  which are coupled at nodes C and D between current mirror PMOS transistors  204   a – 204   b  and PMOS cascode transistors  205   a – 205   b , respectively. The output nodes A and B are also coupled to NMOS cascode transistors  206   a  and  206   b , respectively biased by NMOS bias transistors  207   a  and  207   b.    
   One significant disadvantage of opamp  200  is a reduction in amplifier gain due to the switching of the output parasitic capacitances C ParA  and C ParB  at high impedance output nodes A and B during the switching of transmission gates  202   a  and  202   b . Specifically, the switching of parasitic capacitances C ParA  and C ParB  produces an effective resistance R Eff  between high impedance nodes A and B. In  FIG. 2A , the effective resistance R Eff  is represented in dashed lines and is generally described as:
 
 R   Eff   =[f   Chop ( C   ParA   +C   ParB )] −1  
 
If all of the transistors  203   a – 203   b ,  204   a – 204   b ,  205   a – 205   b ,  206   a – 206   b , and  207   a – 207   b  are biased to have approximately the same impedance r O  and transconductance g m , then the resulting gain A V  of opamp  200  is approximately:
 
 A   V   ≈g   m [( g   m   r   O   2 /2)| R   Eff ]
 
   In the typical folded-cascode amplifier, such as opamp  200 , the effective resistance R Eff  is not substantially greater than the output impedance, thereby proportionally reducing the amplifier gain A V . For example, if the chop frequency f Chop  is nominally 3 MHz, and the total output parasitic capacitance C ParA +C ParB  is nominally 200 fF, the effective resistance R Eff  is nominally 1.7 MΩ. In comparison, the typical output impedance of a folded-cascode amplifier, such as opamp  200 , is in the range of 1 to 10 MΩ. 
   One technique for addressing the problem chopping-induced gain reduction in a chopper stabilized folded-cascode opamp is illustrated in  FIG. 2B . As shown in  FIG. 2B , the output chopping operation is performed by transmission gates  208   a – 208   d  at the sources of PMOS cascode transistors  205   a  and  205   b . Consequently, high impedance parasitic capacitances C ParA +C ParB  are not chopped. While the parasitic capacitances at the gates of cascade transistors  205   a – 205   b  and  206   a – 206   b  are chopped, this chopping does not reduce the gain of opamp  200 , since the sources of cascode devices are low impedance by design. Thus, neither the output impedance R O  nor the opamp gain are reduced by chopping. However, the series switching transistors  208   a – 208   c  introduce additional voltage drops between the voltage rails, which limits the voltage overhead in low voltage designs. 
     FIG. 3  is an electrical schematic diagram of an opamp  300  embodying the principles of the present invention. Opamp  300  is suitable as a stand-alone device or as a stage in a multiple stage device, such as a multiple-stage opamp Advantageously, opamp  300  minimizes effective resistance R Eff  while maximizing voltage headroom. 
   Opamp  300  includes two pairs of p-type metal oxide semiconductor (PMOS) transistors  301   a – 301   b  and  302   a – 302   b  and two pairs of n-type metal oxide semiconductor (NMOS) transistors  303   a – 303   b  and  304   a – 304   b . The outputs of PMOS transistors  301   a – 301   b  and NMOS transistors  303   a – 303   b  are cross-coupled with the outputs of PMOS transistors  302   a – 302   b  and NMOS transistors  304   a – 304   b , respectively. The corresponding bias voltages p 1  and n 2  are clocked with the non-overlapping chopping signals φ 1  and φ 2  to generate the control signals p 2 φ 1 , p 2 φ 2 , n 2 φ 1  and n 2 φ 2 . 
   In opamp  300 , PMOS transistors  301   a – 301   b  and  302   a – 302   b  and NMOS transistors  303   a – 303   b  and  304   a – 304   b  each operate as both cascode devices and chopping switches. PMOS transistors  301   a – 301   b  and  302   a – 302   b  chop the output from the sources of current mirroring transistors  204   a  and  204   b , respectively. NMOS transistors  303   a – 303   b  and  304   a – 304   b  respectively chop the input to the drains of biasing transistors  306   a  and  306   b . Advantageously, the number of voltage drops between the power supply rail V DD  and ground is minimized, thereby improving voltage headroom in opamp  300 . 
   The drain of PMOS transistor  301   a  is cross-coupled with the drain of PMOS transistor  302   a , such that parasitic capacitance C ParA  of  FIGS. 2A and 2B  is always coupled to the output V Out+ . Similarly, the drain of PMOS transistors  301   b  and  302   b  are cross-coupled, as well as coupled to the mirror bias voltage V Mir , such that parasitic capacitance C ParB  also is always coupled to output V out− . Since parasitic capacitances C ParA +C ParB  do not switch during chopping, the effective resistance R Eff  is substantially reduced or eliminated and the gain of opamp  300  is maximized. 
   In alternate embodiments, opamp  300  may be based on a PMOS differential output pair, in which all PMOS transistors shown in  FIG. 3  are replaced with NMOS transistors, all NMOS transistors shown in  FIG. 3  are replaced with PMOS transistors, and the voltages are appropriately varied. 
     FIG. 4  is an electrical schematic of an exemplary circuit  400  suitable for generating the control signal p 2 φ 1 . Similar circuits are preferably utilized to generate the control signals p 2 φ 2 , n 2 φ 1  and n 2 φ 2 . In circuit  400 , the control signal p 2 φ 1  is generated by switching a current I, in which:
   I=I   BIAS   +I   Correction    
I Bias  is equal to the cascode bias current, and I Correction  is equal to:
   I   Correction =( V   DD   −p 2) C   Para   /f   Chop    
   In order to avoid glitches and other artifacts due to the switching of currents, rather than voltages, four (4) opamps  300   a – 300   b , as shown in  FIG. 3 , may be utilized in the quadrature chopping amplifier  500  shown in the electrical schematic of  FIG. 5 . In quadrature chopping amplifier  500 , the chopped output signals V Out1 –V Out4  from opamps  300   a – 300   d  are shifted out of phase in increments of forty-five degrees (45°) to minimize current glitches by chopping with respects to phase. If only two opamps  300   a  and  300   b  are utilized, the outputs V Out1 –V Out2  of amplifiers  300   a  and  300   b  are ninety degrees (90°) out of phase with respects to each other. 
   Although the invention has been described with reference to specific embodiments, these descriptions are not meant to be construed in a limiting sense. Various modifications of the disclosed embodiments, as well as alternative embodiments of the invention, will become apparent to persons skilled in the art upon reference to the description of the invention. It should be appreciated by those skilled in the art that the conception and the specific embodiment disclosed might be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims. 
   It is therefore contemplated that the claims will cover any such modifications or embodiments that fall within the true scope of the invention.