Abstract:
A power supply circuit ( 1 ), particularly for a microcontroller of a transmission control unit, comprises a first output ( 3 ) supplying a first output voltage (U OUT1 ) and a second output ( 4 ) supplying a second output voltage (U OUT2 ), the first output voltage (U OUT1 ) being different from the second output voltage (U OUT2 ). The power supply circuit ( 1 ) also comprises a unit (OP 1 , T 2 , OP 2 , T 3 ) adjusting the first (U OUT1 ) and second output voltage (U OUT2 ) and a controller (OP 3 -OP 5 , T 2 , T 3 ) limiting the voltage difference between the first (U OUT1 ) and second output voltage (U OUT2 ).

Description:
CROSS REFERENCE TO RELATED APPLICATION 
     This application is a continuation of copending International Application No. PCT/DE03/01496 filed May 9, 2003 which designates the United States, and claims priority to German application no. 102 21 889.7 filed May 16, 2002. 
    
    
     TECHNICAL FIELD OF THE INVENTION 
     The invention relates to a power supply circuit, especially for a microcontroller of a transmission control unit. 
     DESCRIPTION OF THE RELATED ART 
     Modern microcontrollers mostly need two different supply voltages of for example 5 Volts and 3.3 Volts, where the two supply voltages may only vary between two prespecified bandwidths in order not to adversely affect the functional capabilities of the microcontroller. Under no circumstances may the voltage difference between the two supply voltages exceed or fall below the maximum permissible values stated in the data sheet of the relevant microcontroller. This is especially critical after switch-on and during power down during the switch-off phase since then different load currents flow and furthermore different load capacities can be used. 
     Power supply circuits are therefore known in which the two supply voltages are each regulated by a linear regulator in order to avoid power variations. 
     The disadvantage of this is however that the regulation variations of the two supply voltages are regulated out separately so that the regulation for greatly different load currents at the two outputs is not sufficient under some circumstances to adhere to the specified voltage difference. 
     Further it is known that the two outputs of these types of power supply circuits can be connected with Zener diodes or Power Schottky diodes, to keep the voltage different between the two supply voltages within the permitted bandwidth. The voltage difference between the two supply voltage can then only rise until the breakdown voltage of the Zener diode is reached. 
     The disadvantage of this type of power supply circuit is the relatively high expense associated with the use of Zener diodes or Power Schottky diodes. 
     SUMMARY OF THE INVENTION 
     The object of the invention is therefore to create a power supply circuit with two different output voltages, where the voltage difference between the two output voltages can be kept within the permitted bandwidth with as little effort as possible. 
     The object can be achieved by a power supply circuit, especially for a microcontroller of a transmission control, comprising a first output to provide a first output voltage, a second output to provide a second output voltage, wherein the first output voltage and the second output voltage being different, an adjusting unit for setting the first output voltage and the second output voltage, and a first regulator for limiting the voltage difference between the first output voltage and the second output voltage by regulating the voltage difference between the first and second output voltages. 
     The object can also be achieved by a power supply circuit, especially for a microcontroller of a transmission control, comprising a first voltage control circuit for providing a first output voltage at a first output, a second voltage control circuit for providing a second output voltage at a second output, wherein the first output voltage and the second output voltage being different, and a comparator coupled with the first and second output voltage and with the first and second control circuit for limiting the voltage difference between the first output voltage and the second output voltage by controlling the first and second voltage control circuits to regulate the voltage difference between the first and second output voltages. 
     The first regulator can be connected on the input side to the first output and the second output and on the output side to the adjusting unit. The first regulator may comprise a comparator with a first input and a second input, with the first input of the comparator being connected to the first output while the second input of the comparator is connected to the second output. For low-resistance connection of the first output to the second output at least one controllable switching element can be provided, with the comparator being connected on the output side with the switching element. The adjusting unit for setting the first output voltage may comprise a first switching element and for setting the second output voltage a second switching element, in which case the first switching element and the second element are connected in series between the first output and the second output and are connected to the comparator for activation. The first regulator may comprise two comparators which, to record the voltage difference are each connected on the input side with the first output and the second output. At least one of the two comparators of the first regulator can be connected via a reference voltage element with the first output or the second output. The adjusting unit may comprise a second regulator to regulate the first output voltage and a third regulator to regulate the second output voltage. The second regulator and/or the third regulator can be connected on the input side with a reference voltage element. The reference voltage element may comprise a variable output voltage which corresponds to a prespecified voltage time line. The first output and/or the second output can be connected to an output capacitor, in which case to discharge the output capacitor, a short circuit switch is provided. To provide an internal control voltage a charge pump circuit can be provided. 
     The invention includes the general technical disclosure of regulating the voltage difference between the two output voltages to prevent the permitted voltage difference being exceeded, whereas with the known power supply circuits the two output voltages are regulated separately from each other. 
     The power supply circuit in accordance with the invention therefore features a regulator which regulates the voltage difference between the two output voltages to a prespecified value. 
     Preferably to control the voltage difference the regulator is connected on the input side with the two outputs of the power supply circuit and on the output side with a unit which adjusts the two output voltages, via which a feedback loop is formed. 
     The adjusting unit can for example feature two conventional linear regulators which regulate the two output voltages according to a specified required value separately from one another. In this case the regulation loop for regulating the voltage difference preferably overlays the two separate regulation loops for regulating the two output voltages. 
     In a simple embodiment of the inventive power supply circuit the two output voltages are adjusted instead without any feedback by a control, with the regulator for regulating the voltage difference specifying the control variable. Thus the regulating loop for regulating the voltage difference in this case overlays the voltage difference for adjusting the two output voltages. 
     In a variant of the invention the regulator for regulating the voltage difference features a comparator, in which case the two inputs of the comparator are connected to the two outputs of the power supply circuit, so that the comparator measures the voltage difference between the two output voltages. 
     A variant of the invention provides for at least one switching element which allows a low-resistance connection of the two outputs of the power supply circuit to reduce or limit the voltage difference between the two outputs. 
     A separate switching element can be used for this, arranged between the two outputs of the power supply circuit and connecting these together at low resistance to limit the voltage difference. 
     Preferably for the low-resistance connection of the two outputs of the power supply circuit however two switching elements are employed which are used for separate regulation of the two output voltages. 
     Thus the two output voltages are usually provided by one output capacitor in each case, with the two output capacitors being charged via one switching element each by an input voltage. Through switching of the two switching elements leads in this case to a low-resistance connection between the two outputs of the power supply circuit, which leads to a synchronization. 
     In a variant of the invention the regulator for regulating the voltage difference features two comparators which are each connected on the input side with the two outputs of the power supply circuit. One of the two inputs of the comparators in this case is connected via a reference voltage element to the relevant output of the power supply circuit, in which case the two reference voltage elements specify the maximum voltage difference in the positive of the negative direction. One comparator thus indicates whether the voltage difference between the two output voltages is exceeding the permitted bandwidth upwards. The other comparator specifies conversely whether the voltage difference between the two output voltages is exceeding the permitted bandwidth downwards. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Other advantageous developments of the invention are identified in the subclaims or are explained in greater detail below together with the description of the preferred exemplary embodiment of the invention on the basis of the figures. The figures show: 
         FIG. 1  a power supply circuit in accordance with the invention in the form of a circuit diagram as well as 
         FIG. 2  an alternate embodiment of a power supply circuit in accordance with the invention. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The block diagram shown in  FIG. 1  illustrates a power supply circuit  1  in accordance with the invention which is supplied via an input  2  with an input voltage U IN  and features two outputs  3 ,  4 , in which case at output  3  an output voltage U OUT1 =+5V is output, whereas at output  4  an output voltage U OUT2 =+3.3V is provided. 
     To stabilize the output voltage U OUT1  the output  3  of the power supply circuit  1  is connected to ground by two output capacitors C 1 , C 2 . 
     Output  4  is also connected to ground by two output capacitors C 3 , C 4  in order to stabilize the output voltage U OUT2 . 
     On the input side the power supply circuit  1  features a transistor T 1  which is activated by a pre-regulator  5 , where one of the tasks of the pre-regulator  5  is to limit the current. 
     To measure the current the transistor T 1  is connected in series with a measurement resistor R 0 , in which case the pre-regulator  5  measures the voltage drop across the measuring resistor R 0  and blocks the transistor T 1  if the current through the measuring resistor R 0  rises disproportionately. 
     On the output side the measuring resistor is connected via a transistor T 2  with the output  3  and via a transistor T 3  with the output  4  of the power supply circuit. 
     If the two transistors T 1  and T 2  become conductive, the two output capacitors C 1 , C 2  can be changed via the input voltage U IN  which leads to an increase in the output voltage U OUT1 . A blocking of the transistor T 2  on the other hand leads to load-dependent discharging of output capacitors C 1 , C 2 , which causes output voltage U OUT1  to drop. 
     Accordingly the two output capacitors C 3 , C 4  can be charged if the two transistors T 1  and T 3  conduct, which leads to a rise in the output voltage U OUT2 . If on the other hand the transistor T 3  blocks, the output capacitors C 3 , C 4  are discharged depending on the electrical load connected at output  4 , which leads to a drop in the output voltage U OUT2 . 
     Both the output voltage U OUT1  and also the output voltage U OUT2  are regulated in this case by a regulator, with the required value of the relevant output voltage U OUT1  or U OUT2  being specified by a reference voltage element  6 . 
     The regulator for the output voltage U OUT1  features a comparator OP 1  which on the input side compares the output voltage U OUT1  with the specified required value and, depending on the regulation deviation, activates the transistor T 2  to regulate the output voltage U OUT1  to the prespecified required value. 
     To record the output voltage U OUT1  a voltage divider is provided consisting of two resistors R 1 , R 2  which are connected in series between output  3  of the power supply circuit  1  and ground. The center tap of the voltage divider between the two resistors R 1 , R 2  is connected to the inverting input of comparator OP 1 , while the non-inverting input of comparator OP 1  is connected to the reference voltage element  6 . A fall in output voltage U OUT1  to below the required value specified by the reference voltage element  6  thus leads to the comparator OP 1  activating transistor T 2 , so that the output capacitors C 1 , C 2  can be charged. A rise in the output voltage U OUT1  to above the required value specified by the reference voltage element  6  leads on the other hand to the comparator OP 1  blocking the transistor T 2 , so that the output capacitors C 1 , C 2  are no longer charged, which leads to a load-dependent fall in output voltage U OUT1 . 
     In the same way the regulator for the output voltage U OUT2  features a comparator OP 2  which compares the output voltage U OUT2  with a specified required value and activates the transistor T 2  accordingly, to regulate the output voltage U OUT2  to the specified required value. 
     To measure the output voltage U OUT2 , a voltage divider consisting of two resistors R 3 , R 4  is also provided which are connected between the output  4  of power supply circuit  1  and ground. The center tap between the two resisters R 3 , R 4  is connected to the inverting input of comparator OP 2 , while the non-inverting input of comparator OP 2  is connected to the reference voltage element  6 . A fall in the output voltage U OUT2  to below the required values specified by the reference voltage element  6  thus leads to the comparator OP 2  activating the transistor T 2 , so that the output capacitors C 3 , C 4  can be charged. An increase in the output voltage U OUT2  to above the required value specified by the reference voltage element  6  leads to the comparator OP 2  blocking the transistor T 2 , so that the output capacitors C 3 , C 4  are no longer charged, which leads to a load-dependent fall in the output voltage U OUT2 . 
     The required values for the output voltages U OUT1  and U OUT2  are however not the same but can be determined by its suitable dimensioning of the resistors R 1 , R 2  or R 3 , R 4 . 
     Furthermore the power supply circuit  1  in accordance with the invention features in regulation loop to limit the voltage difference between the output voltage U OUT1  and the output voltage U OUT2 . 
     To measure this voltage difference a comparator OP 3  is provided, in which case the inverting input of the comparator OP 3  is connected to output  3  of the power supply circuit, while the non-inverting input of the comparator OP 3  is connected to the output  4  of power supply circuit  1 . 
     On the output side the comparator OP 3  is connected to the two comparators OP 1  and OP 2  so that the comparator OP 3  indirectly activates the two transistors T 2  and T 3 . If the output voltage U OUT1  falls below the output voltage U OUT2 , the comparator OP 3  activates the two comparators OP 1  and OP 2  so that the two transistors T 2  and T 3  switch. In this case the output  3  will be short-circuited via the output  4  via the two transistors T 2  and T 3 , which forces a synchronization of the two output voltages U OUT1  and U OUT2 . If on the other hand the output voltage U OUT1  is above the output voltage U OUT2 , the comparator OP 3  has no influence on the two comparators OP 1  and OP 2 . 
     In an alternative shown by dashed lines the power supply circuit  1  features a transistor T 4  which is connected between the output  3  and the output  4  and is activated by the comparator OP 3 . The comparator OP 3  switches transistor T 4  if the output voltage U OUT1  falls below the output voltage U OUT2  which forces a synchronization of the output voltages U OUT1  and U OUT2 . If the output voltage U OUT1  lies above the output voltage U OUT2  on the other hand, in this alternative the comparator OP 3  blocks the transistor T 4 , so that the output voltages U OUT1  and U OUT2  are regulated by the two comparators OP 1  and OP 2  to their relevant required values. 
     In addition the power supply circuit  1  features a controllable switching element  7  which connects the output  4  to ground and thereby enables the output voltage U OUT2  to be short-circuited to ground. In this way the two output capacitors C 3 , C 4  can be completely discharged in order to establish a defined initial status for the next start up after the switch-off process. In addition a through switching of the switching element  7  also leads to a discharging of the output capacitors C 1 , C 2  if the two transistors T 2 , T 3  through switch simultaneously or if the transistor T 4  conducts. 
     The switching element  7  is activated here by a control unit  8  which is connected with the output  4  and compares the output voltage U OUT2  with a prespecified limit value. If this limit value is undershot the control unit  8  then switches switching element  7  so that the output capacitors C 3 , C 4  or C 1 , C 2  are fully discharged at the end of a switch-off phase. 
     Further the power supply circuit  1  features a conventional charge pump circuit  9  which pumps the electrical energy stored in a pump capacitor C 5  several times into a buffer capacitor C 6 , so that the output voltage of the charge pump current  9  rises via the input voltage U IN . The charge pump circuit  9  is activated by a conventional charge pump oscillator  10 . 
     The switch-on process of the power supply circuit  1  described here is now explained. 
     In this case the reference voltage element  6  specifies a continuously rising required value for the output voltages U OUT1  or U OUT2 , in which case the voltage rises so slowly that the two regulators for the output voltage U OUT1  or U OUT2  are able, even with a different loading of outputs  3 ,  4 , to regulate the output voltages U OUT1 , U OUT2  without any great deviation in regulation to the relevant required value. The slow startup of the required value for the output voltages U OUT1 , U OUT2  thus prevents the voltage difference between the output voltages U OUT1 , U OUT1  leaving the allowed range. 
     The switch-off process of the power supply circuit  1  described here, which can be initiated in different ways is now explained. 
     One possibility for initiating the switch-off process consists of applying a switch-off signal to the control input Switch which is connected to the comparator OP 1 . The switch-off signal then leads to the comparator OP 1  blocking the transistor T 2 . 
     In addition the switch-off process can also be initiated by the pre-regulator  5 , when the input voltage U IN  is switched off. The pre-regulator  5  is therefore also connected to comparator OP 1  and controls this at the beginning of the switch-off process so that the transistor T 2  blocks. 
     The blocking of the transistor T 2  initially leads to a load-dependent discharge of the output capacitors C 1 , C 2  via the output  3  and thereby to a fall in the output voltage U OUT1  which at the beginning of the switch-off process is greater than the output voltage U OUT2 . 
     The output voltage U OUT2  by contrast is initially still kept to its required value by the comparator OP 2 , until the output voltage U OUT1  than falls as a result of the discharging of the output capacitor C 1 , C 2  below the output voltage U OUT2 . 
     As soon as the output voltage U OUT1  has fallen to the output voltage U OUT2  the synchronization function is activated by the comparator OP 3  activating the two comparators OP 1 , OP 2  so that these switch through the two transistors T 2 , T 3 . In this state the output  3  is short circuited via the two transistors T 2  and T 3  with the output  4  of the power supply circuit, so that a synchronization of the two output voltages U OUT1 , U OUT2  is forced. 
     In addition the comparator OP 3  also controls the pre-regulator  5  at this point so that this disconnects the transistor T 1 , so that a complete shutdown of the two output voltages U OUT1  and U OUT2  is made possible. 
     The two output voltages U OUT1  and U OUT2  then fall synchronously until a lower limit value specified by the control unit  8  is exceeded, at which point the control unit  8  switches the switch element  7  so that the output capacitors C 1 , C 2  and C 3 , C 4  are finally short circuited to ground, which leads to a complete discharging of output capacitors C 1 -C 4 . 
     On the one hand the short circuit of the output capacitors C 1 -C 4  via the switching element  7  shortens the switch-off process. 
     On the other hand the complete discharging of the output capacitors C 1 -C 4  at the end of a switch-off process leads to a defined initial state for the next start up. 
     The electrical energy required for the switch off process is provided by the charging pump circuit  9  if the input voltage U IN  has been switched off. In such a case the pre-regulator  5  switches off the charge pump oscillator  10  in order to save energy during the switch-off process. 
     The alternative embodiment shown in  FIG. 2  of a power supply circuit  1  in accordance with the invention largely matches the power supply circuit described above and shown in  FIG. 1 , so that to avoid any repetitions below reference is made largely to the existing description. 
     In addition components in  FIGS. 1 and 2  which correspond are given the same reference symbols to make assignment easier. 
     A special feature of this exemplary embodiment is in the regulation of the voltage difference between the two output voltages U OUT1  and U OUT2 . To this end the power supply circuit  1  features two comparators OP 4  and OP 5  which check whether the voltage difference between the two output voltages U OUT1  and U OUT2  leaves the permitted range. 
     In this case comparator OP 4  checks whether the voltage difference between the two output voltages U OUT1 , U OUT2  becomes too large. To this end the non-inverting input of the comparator OP 4  is connected to output  3  while the inverting input of the comparator OP 4  is connected via a reference voltage element  11  with the output  4 . The reference voltage element  11  in this case delivers a reference voltage U REF1  which corresponds to the maximum allowed voltage difference between the two output voltages U OUT1 , U OUT2 . On the output side the comparator OP 4  is connected to the transistor T 2  to regulate the voltage difference between the two output voltages U OUT1  and U OUT2 . The comparator OP 4  thus checks the following voltage condition:
 
 U   OUT1   &gt;U   OUT2   +U   REF1 .
 
     If this voltage condition is fulfilled the comparator OP 4  blocks the transistor T 2  so that the output voltage U OUT1  does not rise any further. This ensures that the maximum permitted voltage difference U OUT1 -U OUT2  remains between the two output voltages within the limit values specified by the reference voltage. 
     The comparator OP 5  on the other hand is designed to prevent the minimum allowed voltage difference between the two output voltages U OUT1 , U OUT2  being exceeded. To this end the inverting input of the comparators OP 5  is connected to the output  3 , while the non-inverting input of the comparator OP 5  is connected via a reference voltage element  12  with the output  4 . The reference voltage element  12  in this case delivers the reference voltage U REF2  which corresponds to the minimum permitted voltage difference between the output voltages U OUT1 , U OUT2 . On the output side the comparator OP 5  is connected to the transistor T 3  so that the output voltage U OUT2  is regulated depending on the measured voltage difference. In this case the comparator OP 5  checks the following voltage condition:
 
 U   OUT1   &lt;U   OUT2   +U   REF2 .
 
     If this condition is fulfilled the comparator OP 5  blocks the transistor T 3 , so that the output voltage U OUT2  cannot rise any further. This guarantees that the voltage difference between the two output voltages U OUT1 -U OUT2  remains within the limits specified by the reference voltage. 
     The invention is not restricted to the preferred exemplary embodiments described here. Instead numerous variants and variations are conceivable, which also make use of the inventive idea and therefore come within the protected area.