Abstract:
Provided are a method and apparatus for detecting and processing transmission errors of various types of data which are transmitted in MPEG-2 transport streams. The transmission error processing method includes: detecting an error for an individual PES (packetized elementary stream) after detecting transmission error information from a received MPEG-2 transport stream (TS) including the transmission error information and demultiplexing the MPEG-2 TS into a plurality of PESes; recording data of the PES in a memory and adding a flag indicating that an error occurs to an end part of the data of the PES, and afterwards recording the data of the PES; and generating an interrupt according to the error detection.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     This application claims the benefit of Korean Patent Application No. 10-2004-0045855, filed on Jun. 19, 2004, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.  
         [0002]     1. Field of the Invention  
         [0003]     The present invention relates to detection and processing of a transmission error in a digital multimedia broadcasting system, and more particularly, to a method and apparatus for detecting and processing transmission errors in various types of data transmitted in MPEG-2 transport streams.  
         [0004]     2. Description of the Related Art  
         [0005]     A digital multimedia broadcasting (DMB) receiver is a next generation digital broadcasting receiver that is capable of receiving various additional data services, such as a traffic or stock information service, as well as an audio service providing high quality sound like a CD (compact disk), and also high quality clear video during high-speed movement. A DMB system encodes various types of data, such as video, audio, additional data, and so on, in an MPEG-4 data format, converts the encoded various data into MPEG-2 transport stream format, and then transmits the converted data, in order to transfer high-quality video data and audio data according to MPEG-2 and MPEG-4 standards.  
         [0006]     Meanwhile, a Korean DMB system is based on a Eureka-147 standard, and according to this standard, audio data is encoded using BSAC (bit sliced arithmetic coding) and video data is encoded using an H.264 standard. In the DMB system, there is no problem when the power of a received signal is sufficiently strong. However, difficulty in receiving a DMB signal occurs in a tunnel or an area where the power of the received signal is weak. Hence, to overcome the problems, a Reed-Solomon (RS) (204, 188) outer-coding technique is applied to the Eureka-147 so that transmission errors caused by weakness can be prevented.  
         [0007]     In a general DMB receiver, when errors are generated from a transmission channel part, error information is transferred to a media processing unit. The media processing unit outputs data by decoding the encoded audio, video, and additional data. That is, the error information detected in outer-decoding and demultiplexing the received DMB data, which includes the existence of the error, information on a location where the error occurs, and so on, is transferred to the media processing unit via an interrupt and a register. Then, the media processing unit receives the error information using the interrupt and the register, and executes an error processing routine by using an interrupt service routine (ISR).  
         [0008]     In the DMB system, media data is transmitted in the MPEG-2 transport stream format, and the MPEG-2 transport stream includes a plurality of packetized element streams (PESes). The PES includes an audio PES, a video PES, an object descriptor (OD) PES, and a BIFS (binary format for scene) PES. The respective PESes are decoded using an audio decoder, a video decoder, an OD decoder, and a BIFS decoder, and then output to be displayed to a user.  
         [0009]     However, even when the errors occurring during transmission are detected by decoding each type of PES packet, since the PES packets including the errors are decoded the receiver malfunctions due to a heavy load imposed on the receiver or non-execution of normal procedures.  
         [0010]     Additionally, in transmitting MPEG-4 data in MPEG-2 data format, problems may occur during data transmission between a part for detecting the errors in hardware and an error processing program for receiving and processing the detected errors.  
       SUMMARY OF THE INVENTION  
       [0011]     The present invention provides an apparatus for and a method of detecting errors of various types of data of a PES and efficiently processing the detected errors in an MPEG-2 transport stream demultiplexer.  
         [0012]     The present invention also provides an apparatus for and a method of processing errors generated when receiving a DMB (digital multimedia broadcasting) signal by generating an error flag for every type of data and storing the error flag together with a PES packet in a memory for storing the PES packet when the error occurs in received data due to unstable reception of DMB.  
         [0013]     According to an aspect of the present invention, there is provided a transmission error processing method including: detecting an error for an individual PES (packetized elementary stream) after detecting transmission error information from a received MPEG-2 transport stream (TS) including the transmission error information and demultiplexing the MPEG-2 TS into a plurality of PESes; recording data of the PES in a memory and adding a flag indicating that an error occurs to an end part of the data of the PES, and afterwards recording the data of the PES; and generating an interrupt according to the error detection.  
         [0014]     The error information included in the MPEG-2 TS may be interpreted by an outer-decoding method.  
         [0015]     The detected error may be transferred to an interrupt service routine through a predetermined register.  
         [0016]     According to another aspect of the present invention, there is provided a transmission error processing method including: transferring a write address that is a location where an MPEG-2 demultiplexer records data in a memory and the number of the recorded data to a CPU through an interrupt; and performing an interrupt service routine that processes the interrupt according to the received write address and the number of the data.  
         [0017]     In the performing of the interrupt service routine, the write address transferred by the demultiplexer may be compared with an address calculated by counting the number of the received interrupt, and when the write address and the calculated address are different, it may be determined that an error occurs, thereby the received data not being processed and being discarded.  
         [0018]     According to still another aspect of the present invention, there is provided a transmission error processing apparatus comprising: an outer-decoder extracting error information after receiving an MPEG-2 TS including transmission error information; a TS demultiplexer demultiplexing the MPEG-2 TS into a plurality of PESes, and generating an error signal for each PES, and informing an occurrence of an error through an interrupt; and an interrupt processing unit recording the data of the PES in a memory, and adding a flag indicating that an error occurs to the end part of the data of the PES, and recording the data. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0019]     The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:  
         [0020]      FIG. 1  is a schematic diagram showing the configuration of a DMB (digital multimedia broadcasting) system;  
         [0021]      FIG. 2  is a diagram showing a process of generating of an MPEG-2 transport stream in a DMB system;  
         [0022]      FIG. 3  is a block diagram of a DMB receiver for detecting and processing an error according to an exemplary embodiment of the present invention;  
         [0023]      FIG. 4  is a timing diagram of the transmission of an MPEG-2 TS (transport stream) packet;  
         [0024]      FIG. 5  is a diagram showing a process of generating an error flag;  
         [0025]      FIG. 6  is a flowchart for explaining an error processing method which is executed in a demultiplexer according to an embodiment of the present invention;  
         [0026]      FIG. 7  is a flowchart for explaining a method of detecting and processing a transmission error according to another exemplary embodiment of the present invention; and  
         [0027]      FIG. 8  is a flowchart for explaining a method of processing data using an address and a counter according to still another exemplary embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0028]      FIG. 1  is a schematic diagram showing the configuration of a DMB (digital multimedia broadcasting) system.  
         [0029]     A stream received from a Eureka-147 system  110  is an MPEG-2 TS (transport stream) on which outer-coding is performed. The MPEG-2 TS includes PES (packetized elementary stream) packets generated by packetizing MPEG-4 data which are converted from audio data, video data and additional data, respectively. Reed-Solomon (RS) decoding is performed on a received MPEG-2 transport stream by an outer-decoder  120 . A TS demultiplexer  130  demultiplexes the MPEG-2 transport stream output after RS decoding, to generate audio PES, video PES, and additional PES. An SL (sync layer) depacketizer  140  removes SL headers from the PESes to produce MPEG-4 video ES (elementary stream), MPEG-4 audio ES, and MPEG-4 additional ES. An example of the MPEG-4 additional data is an MPEG-4 OD/BIFS (object descriptor/binary format for scene), and an MPEG-4 IOD (initial object descriptor). Each data is decoded by a media processor  190 , and then output.  
         [0030]     Meanwhile, according to an exemplary embodiment of the present invention, the media processor  190  includes an H.264 decoder  150 , a BSAC (bit sliced arithmetic coding) decoder  160 , an OD/BIFS decoder  170 , and an IOD decoder  180 . Further, error information sent from the outer-decoder  120  passes through the TS demultiplexer  130  and is transferred to the SL depacketizer  140  via a hardware interrupt IRQ, and then processed using software.  
         [0031]      FIG. 2  is a diagram showing a process of generating of an MPEG-2 transport stream in a DMB system.  
         [0032]     Audio data, video data, and additional data are firstly encoded according to an MPEG-4 format. Although the audio data is described below as an example, the video data and the additional data are generated as MPEG-2 transport streams in the same manner. An SL header  220  is added to the audio data  210  converted into MPEG-4 data to produce MPEG-4 system data. The SL header  220  includes object clock reference (OCR) information. Next, a PES header  230  is added to the produced MPEG-4 system data to generate an MPEG-2 PES. The PES header  230  includes program clock reference (PCR) information. Then, the MPEG-2 PES is divided by a length of 184 bytes to produce a TS payload, and a TS header  240  with a length of 4 bytes is added to the TS payload to generate an MPEG-2 TS packet with a length of 188 bytes. An outer-encoder adds an outer-code  250  for error verification to the MPEG-2 TS packet, and then the MPEG-2 TS packet is transmitted to a DMB receiver (not shown).  
         [0033]      FIG. 3  is a block diagram of a DMB receiver for detecting and processing an error according to an exemplary embodiment of the present invention.  
         [0034]     A sync detection unit  305  detects a sync signal of an MPEG-2 TS. The detection of the sync signal is described referring to  FIG. 4 .  
         [0035]      FIG. 4  is a timing diagram of the transmission of an MPEG-2 TS packet.  
         [0036]     Referring to  FIG. 4 , the MPEG-2 TS packet is composed of a 4-byte header and a 184-byte payload. The payload may include an audio PES, a video PES, an OD/BIFS PES. The start of a header is a value of 0×47, which is a hexadecimal value, and thereby when 0×47 of the value is read, the sync detection unit  305  can recognize the start of the MPEG-2 TS packet.  
         [0037]     A TS demultiplexing unit  310  demultiplexes the received MPEG-2 TS. In the MPEG-2 TS packet, program specific information (PSI), which is composed of a program allocation table (PAT) and a program map table (PMT), is inserted periodically. As it is possible to detect a program ID (PID) by interpreting the PSI, an audio PES packet, a video PES packet, and an additional data PES packet are generated according to the PID.  
         [0038]     A PES decoder  315  decodes an audio PES, a video PES, and an additional data PES to generate MPEG-4 audio, MPEG-4 video, and MPEG-4 additional data.  
         [0039]     An error flag detection unit  320  receives an error_flag from the TS demultiplexing unit  310 , and generates again an error flag of a PES packet of data in which the error occurs. That is, the error flag is generated for each data.  
         [0040]      FIG. 5  is a diagram showing a process of generating an error flag.  
         [0041]     When an error occurs in data, an error flag signal of the corresponding data becomes a logic “high”, and the “high” value of the error flag is stored in a register. Thereafter, a CPU  340  reads the register to detect the occurrence of the error, and drops the error flag to a logic “low” to perform an error processing routine in an interrupt service routine (ISR).  
         [0042]     A memory control unit  325  controls a DMA (direct memory access) memory  330  in order to store the demultiplexed PES packet in a main memory. That is, a payload of each PES packet is stored in the main memory (not shown), and an interrupt is generated after storing one PES packet. When the generated interrupt is transferred to the CPU  340 , the CPU  340  detects which data has an error causing the received interrupt using a register control unit  345 , and records the data in queue included in the CPU  340 . Thereafter, the CPU  340  performs the interrupt service routine (ISR).  
         [0043]     Further, the memory control unit  325  records the error flag and generates the interrupt after storing the last PES packet in the main memory. This is for the CPU  340  to accurately detect the error flag by recording the data in the memory and simultaneously sending the error flag using the register.  
         [0044]     Besides, an SDRAM  350  is a memory for storing the PES packet and a corresponding error signal, a video decoder  355  decodes the video PES packet, and a video register control unit  360  controls a video register (not shown) used in the video decoder  355 .  
         [0045]      FIG. 6  is a flowchart for explaining an error processing method which is executed in a demultiplexer according to an embodiment of the present invention.  
         [0046]     The TS demultiplexer  130  reads a value of DMB_StatusReg that is a register indicating which stream is to be filtered among the received MPEG-2 transport streams (S 610 ). According to the read value, the TS stream is filtered, and then a desired stream is input (S 620 ). Then, the input TS stream is demultiplexed to generate an SL packet (S 630 ), and the generated SL packet and length information of the packet is written to an SL buffer (S 640 ). A Done_check register for the packet written to the SL buffer is set to “1” (S 650 ), and address information of the written packet is also written to the register (S 660 ). Then, an interrupt is generated to the CPU (S 670 ), and the CPU performs the ISR by calling the ISR (S 680 ).  
         [0047]      FIG. 7  is a flowchart for explaining a method of detecting and processing a transmission error according to another exemplary embodiment of the present invention.  
         [0048]     First, the maximum allowed value of the error (MaxErrNum) is determined. That is, the MaxErrNum that is a constant indicating the maximum number of the received errors for which no action is to be taken is determined (S 710 ). Subsequently, an interrupt is received (S 720 ). Then, as a processing operation in the ISR, it is determined whether an error exists in the received data by detecting the register in which an individual error flag existing for each data is registered (S 730 ). Here, the register is an arbitrary register recording the existence of an error. When it is determined that an error exists, the error flag is disabled and an error counter is increased by one (S 740 ). Then, it is determined whether the error counter is larger than or equal to the value of MaxErrNum set previously (S 760 ). When the error counter is larger than or equal to the value, the DMB receiver is initialized by resetting an RF module (not-shown) (S 770 ).  
         [0049]     That is, if more number of errors occurs than the previously fixed MaxErrNum, it is assured that the errors burst during transmission of data or synchronization information is lost during the transmission of data. The reset of the RF module is performed through an 12C bus. Although in the present embodiment, the RF module is reset in response to the occurrence of the error (S 770 ), the present invention is not limited to the reset of the RF module, and various methods, such as reset of the DMB receiver or reset of a data receiving unit, can be used in response to the occurrence of the error.  
         [0050]     When an error does not exist in the received data, the received data is transferred to the media processing unit (S 750 ), and decoded therein to be output. In addition, when the error counter is smaller than the MaxErrNum, which is still in an error allowance range, the received data is transferred to the media processing unit (S 750 ).  
         [0051]      FIG. 8  is a flowchart for explaining a method of processing data using an address and a counter according to still another exemplary embodiment of the present invention.  
         [0052]     First, the address register and the counter register are initialized (S 810 ). The address register stores a start address where data is stored in the memory by types of data, such as, audio, video, and additional data. A size of the counter register is decided according to each data. In other words, the write address of the SDRAM that is presently being written and the number of data written are stored in the register, thereby allowing the received data to be processed without errors even when the data cannot be handled immediately due to a message queue delay or for other various reasons.  
         [0053]     Next, an interrupt is received from the TS demultiplexer  130  (S 820 ). The interrupt is received and in the ISR, the write address of the memory and the counter are sent via the message queue (S 830 ). Thereafter, it is determined whether or not an error occurs (S 840 ). Specifically, after the write start address of the memory is obtained using the current counter value sent from the TS demultiplexer  130 , the start address is compared with the address received from the TS demultiplexer  130 . When the start address and the received address are different from each other, as it is determined that the error occurs, no operation is performed and the interrupt service routine is terminated. Alternatively, when the start address and the received address are the same so that an error is determined not to exist, the write start address written by TS demultiplexer  130  is obtained using the counter. SL depacketizing is performed on the obtained start address via the message queue, and the depacketized start address is transferred to a media decoder to be output (S 850 ).  
         [0054]     Therefore, even if the point of time when the TS demultiplexer writes the data in the memory is different from the time when the data is read from the ISR, the number of data written to the SDRAM and a location where the data is lastly written are delivered through the register of the TS demultiplexer so that the transmission error of data does not occur. Since each register for audio, video, and addition data exists in the ISR, there occurs no transmission error of data between the TS demultiplexer and the ISR.  
         [0055]     The transmission error processing method described above can be written as a computer program and implemented in a computer that executes the program using a computer readable recording medium. The computer readable recording medium includes magnetic storage media, optical recording media, and storage media such as carrier waves. Also, codes and code segments for accomplishing the present invention can be easily construed by programmers skilled in the art to which the present invention pertains.  
         [0056]     As described above, since an individual error flag for each audio, video, and additional data is generated, the error can be immediately processed corresponding to each data stream. Even when an error occurs in one of the data streams, the influence on the other data stream having no errors can be minimized.  
         [0057]     Additionally, since hardware and software exchange the error flags using the register and record the error flags in the memory, the generated error is appropriately addressed for each PES of data types, so that malfunction of the receiver can be prevented.  
         [0058]     While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.