Abstract:
An image sensor pixel for use in a high dynamic range image sensor includes a first photodiode, a plurality of photodiodes, a shared floating diffusion region, a first transfer gate, and a second transfer gate. The first photodiode is disposed in a semiconductor material. The first photodiode has a first light exposure area and a first doping concentration. The plurality of photodiodes is also disposed in the semiconductor material. Each photodiode in the plurality of photodiodes has the first light exposure area and the first doping concentration. The first transfer gate is coupled to transfer first image charge from the first photodiode to the shared floating diffusion region. The second transfer gate is coupled to transfer distributed image charge from each photodiode in the plurality of photodiodes to the shared floating diffusion region.

Description:
TECHNICAL FIELD 
       [0001]    This disclosure relates generally to optics, and in particular but not exclusively, relates to high dynamic range image sensors. 
       BACKGROUND INFORMATION 
       [0002]    High dynamic range (“HDR”) image sensors are useful for many applications. In general, ordinary image sensors, including for example charge coupled device (“CCD”) and complementary metal oxide semiconductor (“CMOS”) image sensors, have a dynamic range of approximately 70 dB dynamic range. In comparison, the human eye has a dynamic range of up to approximately 100 dB. There are a variety of situation in which an image sensor having an increased dynamic range is beneficial. For example, image sensors having a dynamic range of more than 100 dB are needed in the automotive industry in order to handle different driving conditions, such as driving from a dark tunnel into bright sunlight. Indeed, many applications may require image sensors with at least 90 dB of dynamic range or more to accommodate a wide range of lighting situations, varying from low light conditions to bright light conditions. 
         [0003]    One known approach for implementing HDR image sensors is to use a combination of a photodiodes in each pixel. One of the photodiodes can be used to sense bright light conditions while another photodiode can be used to sense low light conditions. In this approach, the photodiode used to sense bright light is typically smaller (having a smaller light exposure area) than the photodiode used to sense low light conditions. However, this approach requires an asymmetric layout that tends to increase costs. In addition to increasing cost, asymmetric fabrication of the photodiodes in each pixel includes optical asymmetry that may introduce image light ray angle separation. Image light ray angle separation can cause asymmetric blooming, crosstalk, and other undesirable effects, especially when the image light is angled relative to the face of the image sensor. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0004]    Non-limiting and non-exhaustive embodiments of the invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified. 
           [0005]      FIG. 1  is a block diagram schematic illustrating one example of an HDR imaging system, in accordance with an embodiment of the disclosure. 
           [0006]      FIG. 2  is a schematic illustrating one example of an HDR pixel that can be implemented in the HDR image sensor illustrated in  FIG. 1 , in accordance with an embodiment of the disclosure. 
           [0007]      FIG. 3  is a plan view of one example of an image sensor pixel that includes a large sub-pixel and a small sub-pixel, in accordance with an embodiment of the disclosure. 
           [0008]      FIG. 4  is a plan view of one example of an image sensor pixel that includes a large sub-pixel and a small sub-pixel, in accordance with an embodiment of the disclosure. 
           [0009]      FIG. 5  is a plan view of one example of a pixel group that includes image sensor pixels that include a large sub-pixel and a small sub-pixel, in accordance with an embodiment of the disclosure. 
       
    
    
     DETAILED DESCRIPTION 
       [0010]    In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. One skilled in the relevant art will recognize, however, that the techniques described herein can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects. 
         [0011]    Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. 
         [0012]      FIG. 1  is a block diagram schematic illustrating one example of an HDR imaging system  100 , in accordance with an embodiment of the disclosure. HDR imaging system  100  includes an example pixel array  102 , control circuitry  108 , readout circuitry  104 , and function logic  106 . As shown in the depicted example, HDR imaging system  100  includes pixel array  102  which is coupled to control circuitry  108  and readout circuitry  104 . Readout circuitry  104  is coupled to function logic  106 . Control circuitry  108  is coupled to pixel array  102  to control operational characteristics of pixel array  102 . For example, control circuitry  108  may generate a shutter signal for controlling image acquisition. In one example, the shutter signal is a global shutter signal for simultaneously enabling all pixels within pixel array  102  to simultaneously capture their respective image data during a single acquisition window. In another example, the shutter signal is a rolling shutter signal such that each row, column, or group of pixels is sequentially enabled during consecutive acquisition windows. 
         [0013]    In one example, pixel array  102  is a two-dimensional (2D) array of imaging sensors or pixels  110  (e.g., pixels P1, P2 . . . , Pn). In one example, each pixel  110  is a CMOS imaging pixel including at least a large sub-pixel and a small sub-pixel. The large sub-pixels and the small sub-pixels in the pixel array may receive separate shutter signals. As illustrated, each pixel  110  is arranged into a row (e.g., rows R1 to Ry) and a column (e.g., column C1 to Cx) to acquire image data of a person, place, object, etc., which can then be used to render an image of the person, place, object, etc. 
         [0014]    In one example, after each pixel  110  has acquired its image data or image charge, the image data is read out by readout circuitry  104  through readout columns  112  and then transferred to function logic  106 . In various examples, readout circuitry  104  may include amplification circuitry, analog-to-digital (ADC) conversion circuitry, or otherwise. Function logic  106  may simply store the image data or even manipulate the image data by applying post image effects (e.g., crop, rotate, remove red eye, adjust brightness, adjust contrast, or otherwise). In one example, readout circuitry  104  may read out a row of image data at a time along readout column lines (illustrated) or may read out the image data using a variety of other techniques (not illustrated), such as a serial read out or a full parallel read out of all pixels simultaneously. The image charge generated by the large sub-pixel and the small sub-pixel may be read out separately during different time periods. 
         [0015]      FIG. 2  is a schematic illustrating one example of an HDR pixel  210  that can be implemented as pixel(s)  110  in HDR imaging system  100 , in accordance with an embodiment of the disclosure. Pixel  210  includes a small sub-pixel  275  and a large sub-pixel  285 . Small sub-pixel  275  includes a transfer transistor  233  (T1 A ) and a first photodiode  235  (PD A ) disposed in a semiconductor material (e.g. silicon). Transfer transistor  233  is coupled between shared floating diffusion region  229  and first photodiode  235 . Large sub-pixel  285  includes a plurality of photodiodes that includes photodiodes  245  (PD B ),  255  (PD C ) . . . and  295  (PD ω ), where ω represents the number of photodiodes in large sub-pixel  285 . Large sub-pixel  285  also includes transfer transistors  243  (T1 B ),  253  (T1 C ) . . . and  293  (T1 ω ), where ω still represents the number of photodiodes and corresponding transfer transistors in large sub-pixel  285 . Transfer transistors  243  (T1 B ),  253  (T1 C ) . . . and  293  (T1 ω ) are coupled between their respective photodiodes  245  (PD B ),  255  (PD C ) . . . and  295  (PD ω ) and shared floating diffusion region  229 . 
         [0016]    Image light incident on pixel  210  will generate image charge in each of the photodiodes PD A  through PD ω . First image charge is generated in first photodiode  235  PD A . When transfer transistor  233  T1 A  receives a first transfer signal TX S    231  at its transfer gate, the first image charge is transferred to shared floating diffusion region  229 . Photodiodes PD B  through PD ω  in large sub-pixel  285  will also generate image charge in response to incident image light. Collectively, the image charge generated by the photodiodes in large sub-pixel  285  will be referred to as “distributed image charge” as it is distributed among the photodiodes, at least initially. When transfer transistors T1 B -T1 ω  receive second transfer signal TX L    241  at their transfer gates, the distributed image charge from each photodiode in the plurality of photodiodes in large sub-pixel  285  is transferred to shared floating diffusion region  229 . As  FIG. 2  illustrates, transfer transistors T1 B -T1 ω  all receive a common transfer signal (TX L    241 ). In one embodiment (not illustrated), the transfer transistors T1 B -T1 ω  share a physically consolidated transfer gate which reduces the need for trace routing. Even in the illustrated embodiment, because they are electrically connected to receive a common transfer signal TX L    241 , the transfer gates of the transfer transistors T1 B -T1 ω  may be described as one transfer transistor having sub-gates coupled between shared floating diffusion region  229  and each photodiode PD B  through PD ω . 
         [0017]    The first image charge that accumulates in first photodiode PD A  is switched through transfer transistor T1 A    233  into shared floating diffusion region  229  in response to a control signal TX S  being received on a first transfer gate of transfer transistor T1 A    233 . The distributed image charge that accumulates in the plurality of photodiodes PD B  through PD ω  is switched through a second transfer transistor (which may include transfer gates of transfer transistors T1 B -T1 ω  coupled together) into shared floating diffusion region  229  in response to control signal TX L  being received on the second transfer gate of the second transfer transistor. It is understood that shared floating diffusion region  229  may be a physical combination of the drains of transfer transistors T1 A -T1 ω . 
         [0018]    As shown in the example, pixel  210  also includes an amplifier transistor T3  224  that has a gate terminal coupled to shared floating diffusion region  229 . Thus, in the illustrated example, the image charge from small sub-pixel  275  and large sub-pixel  285  are separately switched to shared floating diffusion region  229 , respectively, which shares the same amplifier transistor T3  224 . In one example, amplifier transistor T3  224  is coupled in a source follower configuration as shown, which therefore amplifies an input signal at the gate terminal of amplifier transistor T3  224  to an output signal at the source terminal of amplifier transistor T3  224 . As shown, row select transistor T4  226  is coupled to the source terminal of amplifier transistor T3  224  to selectively switch the output of amplifier transistor T3  224  to readout column  212  in response to a control signal SEL. As shown in the example, pixel  210  also includes reset transistor T2  222  coupled to shared floating diffusion region  229 , which may be used to reset charge accumulated in pixel  210  in response to a reset signal RST. In one example, the charge accumulated in shared floating diffusion region  229  can be reset during an initialization period of pixel  210 , or for example each time after charge information has been read out from pixel  210  and prior to accumulating charge in small sub-pixel  275  and large sub-pixel  285  for the acquisition of a new HDR image in accordance with the embodiments of the disclosure. 
         [0019]    In one embodiment, each photodiode PD B  through PD ω  is substantially identical to the first photodiode PD A    235 . For example, each photodiode PD B  through PD ω  may have the same charge capacity and other electrical characteristics as PD A . This may reduce or eliminate the need to compensate for physical differences that impact the electrical function of the photodiodes. For example, some HDR pixel configurations include a single physically larger photodiode as a large sub-pixel. However, these singular physically larger photodiodes serving as a large sub-pixel often suffer higher lag, which can negatively influence the image charge transferred and the timing of the transfer. Furthermore, a singular physically larger photodiode as the large sub-pixel also introduces optical asymmetry that can introduce undesirable artifacts. In contrast, the photodiodes in large sub-pixel  285  being substantially identical to first photodiode PD A    235 , allows image charge to transfer out of each photodiode PD B  through PD ω  with essentially the same electrical characteristics as PD A    235 , while still leveraging the increased semiconductor size for capturing image light by utilizing multiple photodiodes PD B  through PD ω . These shared electrical characteristics may reduce lag time in the transfer of image charge from the large sub-pixel. The optical artifacts (e.g. crosstalk, ray angle separation) associated with the singular physically large photodiode are also mitigated as each photodiode in the plurality of photodiodes PD B  through PD ω  are substantially identical. 
         [0020]      FIG. 3  is a plan view of one example of an image sensor pixel  310  that includes a large sub-pixel  385  and a small sub-pixel  275 , in accordance with an embodiment of the disclosure. The plan view illustrated in  FIG. 3  is one example layout of image sensor pixel  210 . Image sensor  310  includes three photodiodes PD B    245 , PD C    255 , and PD D    265  in large sub-pixel  385 . The three photodiodes PD B    245 , PD C    255 , and PD D    265  and photodiode PD A    235  in small sub-pixel  275  are evenly spaced in a symmetrical pattern that is both vertically and horizontally symmetric. 
         [0021]      FIG. 3  also illustrates transfer gates  234 ,  244 ,  254 , and  264 , which are the transfer gates of transfer transistors  233 ,  243 ,  253 , and  263 , respectively. In one embodiment (not illustrated), transfer gates  244 ,  254 , and  264  are physically consolidated. Although the electrical connection is not illustrated in  FIG. 3 , transfer gates  244 ,  254 , and  264  are all coupled to receive transfer signal TX L    241  and transfer gate  234  is coupled to receive transfer signal TX S    231 . Each transfer gate is for transferring image charge from its respective photodiode to shared floating diffusion region  229 . Shared floating diffusion region  229  is wired (via a trace) to the gate terminal of amplifier transistor T3  224 , which may be coupled as a source follower (“SF”). Reset transistor T2  222  is coupled to reset shared floating diffusion region  229 . Select transistor T4  226  is coupled to transfer an amplified image signal from amplifier transistor T3  224  to readout column  212 . 
         [0022]      FIG. 4  is a plan view of one example of an image sensor pixel  410  that includes a large sub-pixel  485  and small sub-pixel  275 , in accordance with an embodiment of the disclosure. The plan view illustrated in  FIG. 4  is one example layout of image sensor pixel  210 . Image sensor pixel  410  includes fifteen photodiodes (PD B -PD P ) in large sub-pixel  485 .  FIG. 4  shows that embodiments of this disclosure can include different numbers of photodiodes in the plurality of photodiodes that are included in large sub-pixel  285 . In  FIG. 3 , three photodiodes are included in the plurality of photodiodes. In  FIG. 4 , fifteen photodiodes are included in the plurality of photodiodes. In different embodiments, the plurality of photodiodes may include two or more photodiodes. 
         [0023]    In  FIG. 4 , the shaded triangles represent the transfer gates corresponding to their respective photodiodes, similar to  FIG. 3 . Although not illustrated, the transfer gates corresponding to the fifteen photodiodes in large sub-pixel  485  are coupled to receive a common transfer signal (e.g. TX L    241 ) to transfer the distributed image charge from the fifteen photodiodes, while the transfer gate corresponding to first photodiode PD A    235  is coupled to receive transfer signal (e.g. TX S    231 ) to transfer the first image charge from the first photodiode  235 . Shared floating diffusion region  429 A is wired (via a trace) to the gate terminal of amplifier transistor T3  224 , which may be coupled as a source follower (“SF”). The gate terminal of amplifier transistor T3  224  is also coupled to shared floating diffusion regions  429 B,  429 C, and  429 D, in  FIG. 4 . Since shared floating diffusion regions  429 A,  429 B,  429 C, and  429 D are physically wired together, they may be referred to as a local floating diffusion regions that are electrically coupled together to form a combined shared floating diffusion region. Reset transistor T2  222  is coupled to reset shared floating diffusion regions  429 A,  429 B,  429 C, and  429 D. Select transistor T4  226  is coupled to transfer an amplified image signal from amplifier transistor T3  224  to readout column  212 . In  FIG. 4 , layout space is saved having only three transistors ( 222 ,  224 , and  226 ) serving to transfer the image signal to the readout column  212 . 
         [0024]      FIG. 5  is a plan view of one example of a pixel group  500  that includes image sensor pixels  310  that include large sub-pixels  585  and small sub-pixels  575 , in accordance with an embodiment of the disclosure. Pixel group  500  includes four image sensor pixels  310  (as illustrated in  FIG. 3 ) arranged in a Red, Green, Green, Blue (“RGGB”) Bayer pattern. 
         [0025]    In  FIG. 5 , small sub-pixel  575 A includes first photodiode PD A  which is disposed under a red filter that passes red light but that substantially filters out other wavelengths of light from becoming incident on photodiode PD A . Large sub-pixel  585 A includes photodiodes PD B -PD D  which are also disposed under a red filter that passes red light but that substantially filters out other wavelengths of light from becoming incident on photodiodes PD B -PD D . Similarly, small sub-pixel  575 B and  575 C along with large sub-pixels  585 B and  585 C are disposed under green filters, while small sub-pixel  575 D and large sub-pixel  585 D are disposed under blue filters, forming a Bayer pattern. Pixel group  500  may be repeated to form an HDR RGGB image sensor, in accordance with embodiments of the disclosure. 
         [0026]    In the disclosed embodiments of this disclosure it is appreciated that the first photodiode PD A  and the plurality of photodiodes PD B -PD ω  are included in an HDR image sensor that is capable of capturing an HDR image in a single frame. In other words, the first photodiode PD A  and the plurality of photodiodes PD B -PD ω  are able to accumulate image charge in overlapping time periods. First photodiode PD A  may be designed to capture bright light image data while the plurality of photodiodes PD B -PD ω  are designed to capture low light image data. The first image charge from first photodiode PD A  is read out separately from the distributed image charge from the plurality of photodiodes PD B -PD ω  to generate a bright light signal. The distributed image charge from the plurality of photodiodes PD B -PD 107  is read out separately from the first image charge to generate a low light signal. The bright light signal and the low light signal can be utilized by HDR algorithms to generate an HDR image. 
         [0027]    The above description of illustrated embodiments of the invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize. 
         [0028]    These modifications can be made to the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.