Abstract:
A system for testing a conversion efficiency of a power supply unit includes a power meter, a plurality of switches, a multimeter, a microcontroller unit (MCU), a computer, and a signal conversion circuit for communicatively connecting the MCU to the computer. The power meter is capable of measuring an input power supplied to the power supply unit. The switches are powered on/off according to a sequence predetermined by the computer. The multimeter is configured to measure an output power of the power supply. The computer is capable of reading data measured from the power meter and the multimeter and calculating a conversion efficiency of the power supply unit.

Description:
This application is related to a co-pending U.S. patent application Ser. No. 12/576,855, filed on Oct. 9, 2009, entitled “Power Supply Testing System”. The present application and the co-pending application are assigned to the same assignee. 
     BACKGROUND 
     1. Technical Field 
     The present disclosure relates to a testing system, and more particularly to a testing system for testing conversion efficiency of a power supply. 
     2. Description of Related Art 
     A typical testing system for testing conversion efficiency of a power supply unit (PSU) includes an AC source applied to the PSU, a power meter, a first multimeter, a second multimeter, a first rotary switch, a second rotary switch, a third rotary switch, and a DC electronic load. The switches S1, S2, S3 are one pole multi-way switches. The power meter is connected between the AC source and the PSU for measuring AC input power to the PSU. The PSU output power rails include: 12V, 12 VCPU (a power rail for CPU), 5V, 3.3V, −12V, and 5 Vaux (standby voltage of 5V). Each of the power rails&#39; output from the PSU is supplied to the DC electronic load via a resistor. The first rotary switch can be switched from one conducting position to another. Thus, the first multimeter is capable of connecting to each of the power rails and measuring an effective output voltage of each of the power rails. The second and third rotary switches can be switched from one conduction position to another for connecting the second multimeter to each of the resistors in a parallel connection. Thus, an output current of each of the power rails can be calculated using the formula: I=U/R. An output power of each of the power rails can be calculated by the formula: P=UI. A total output power of the PSU equals the sum of all the output power of the power rails. The ratio of the total output power of the PSU to the AC input power can be calculated to determine whether the PSU achieves a standard conversion efficiency. 
     However, the typical testing system needs an operator to manually turn the rotary switches and record the current and voltage of each of the power rails, which is inefficient. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  illustrates a testing system for testing conversion efficiency of a power supply unit (PSU). 
         FIGS. 2-5  depict a single chip microcontroller (hereinafter MCU) and peripheral circuits coupled to the MCU of the testing system of  FIG. 1 . 
     
    
    
     DETAILED DESCRIPTION 
     The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one. 
     Referring to  FIG. 1 , an embodiment of a testing system for testing a conversion efficiency of a PSU  20  includes an MCU  10 , a relay control center  30 , a power meter  40 , an AC source  50 , a computer  60 , an electronic load  70 , a multimeter  80 , and a plurality of switches K 1 -K 13 . The PSU  20  is capable of outputting power rails of 12V, 12V cpu, 5V, 3.3V, −12V, 5 Vaux respectively through connected resistors R 1 , R 2 , R 3 , R 4 , R 5 , R 6 . The power rails output from the PSU  20  are supplied to the electric load  70  via the resistors R 1 -R 6 . The computer  60  is connected to the AC source  50  for controlling an on/off state of the AC source  50  connected to the electric load  70  for controlling a resistance of the electric load  70 , and connected to the MCU  10  for informing the MCU  10  to power on/off the switches K 1 -K 13 . The computer  60  is further connected to the power meter  40  and the multimeter  80  for receiving data from the power meter  40  and the multimeter  80  and then calculating a power conversion efficiency of the PSU  20 . 
     The switches K 1 -K 13  are relay switches. The MCU  10  controls the relay control center  30  for further controlling on/off states of the switches K 1 -K 13 . The switch K 13  is a double pole-double throw switch. When the switch K 13  is turned to connect a contact point A and ground in a first closed position, the multimeter  80  can measure an effective voltage of each of the power rails after each of the switches K 1 -K 6  is closed in turn. For example, if the switch K 13  is turned to connect the contact point A and ground (GND) and the switch K 1  is closed, and the other switches are open, the multimeter  80  is connected to the 12V power rail and measures the effective voltage of the 12V power rail. If the switch K 13  is turned to connect the contact point A and ground (GND) and the switch K 2  is closed, and the other switches are open, the multimeter  80  can measure the effective voltage of the 12V cpu power rail. 
     When the switch K 13  is turned to connect contact points B&amp;C at a second closed position, the multimeter  80  can measure a voltage drop across each of the resistors R 1 -R 6 . For example, if the switch K 13  is turned to connect contact points B&amp;C and the switch K 7  is turned to a closed position, keeping other switches open, the multimeter  80  and the resistor R 1  are connected in parallel, and the multimeter  80  can measure the voltage drop across the resistor R 1 . A current flow through each of the resistors R 1 -R 6  can be calculated using the formula: I=U/R. An output power of each of the power rails can be calculated using the formula: P=UI. Then a total output power of the PSU  20 , equal to a sum of the output powers of all the power rails (P=P 1 +P 2 +P 3 + . . . Pn), can be calculated. 
     An AC input power applied to the PSU  20  can be measured by the power meter  40 . Thus, a ratio of the total output power to the AC input power can be calculated to determine conversion efficiency of the PSU  20 . 
     Referring also to  FIGS. 2 to 5 , pins P 10 -P 15  of the MCU  10  respectively connect to a first switch circuit  101 , a second switch circuit  102 , a third switch circuit  103 , a fourth switch circuit  104 , a fifth switch circuit  105 , and a sixth switch circuit  106 , for controlling on/off states of the switches K 1 -K 6 . Pins P 20 -P 25  of the MCU  10  respectively connect to a seventh switch circuit  107 , an eighth switch circuit  108 , a ninth switch circuit  109 , a tenth switch circuit  110 , an eleventh switch circuit  111 , and a twelfth switch circuit  112 , for controlling on/off states of the switches K 7 -K 12 . A pin P 27  of the MCU  10  is connected to a thirteenth switch circuit  113 , for controlling the on/off state of the switch K 13 . 
     The first switch circuit  101  includes a first PNP bipolar junction transistor Q 1 , a first diode D 1 , and the switch K 1 . A base electrode of the transistor Q 1  connects to the pin P 10  of the MCU  10  via a resistor. An emitting electrode of the transistor Q 1  is fed by a power source VCC. A collecting electrode of the transistor Q 1  is connected to a cathode of the first diode D 1 . An anode of the first diode D 1  is connected to ground. The switch K 1  is a single pole-single throw relay switch and connected with the first diode D 1  in parallel. When the pin P 10  of the MCU  10  sends a high level signal to the base electrode of the transistor Q 1 , the transistor Q 1  is rendered non-conductive; a voltage level of the collecting electrode of the transistor Q 1  is low; and there is nearly no current flowing through a relay coil (not shown) of the switch K 1 , thereby keeping the switch K 1  open. When the pin P 10  of the MCU  10  sends a low level signal to the base electrode of the transistor Q 1 , the transistor Q 1  is rendered conductive; a voltage level of the collecting electrode of the transistor Q 1  is high; and there is an electric current (exceeding a threshold current to turn on the relay switch) flowing through the relay coil of the switches K 1 , thereby turning on the switch K 1 . 
     The second switch circuit  102  includes a second PNP bipolar junction transistor Q 2 , a second diode D 2 , and the switch K 2 . The switch K 2  is a single pole single throw relay switch. 
     The third switch circuit  103  includes a third PNP bipolar junction transistor Q 3 , a third diode D 3 , and the switch K 3 . The switch K 3  is a single pole single throw relay switch. 
     The fourth switch circuit  104  includes a fourth PNP bipolar junction transistor Q 4 , a fourth diode D 4 , and the switch K 4 . The switch K 4  is a single pole single throw relay switch. 
     The fifth switch circuit  105  includes a fifth PNP bipolar junction transistor Q 5 , a fifth diode D 5 , and the switch K 5 . The switch K 5  is a single pole single throw relay switch. 
     The sixth switch circuit  106  includes a sixth PNP bipolar junction transistor Q 6 , a sixth diode D 6 , and the switch K 6 . The switch K 6 , K 12  is a single pole single throw relay switch. 
     The seventh switch circuit  107  includes a seventh PNP bipolar junction transistor Q 7 , a seventh diode D 7 , and the switch K 7 . The switch K 7  is a double pole single throw relay switch. 
     The eighth switch circuit  108  includes an eighth PNP bipolar junction transistor Q 8 , an eighth diode D 8 , and the switch K 8 . The switch K 8  is a double pole single throw relay switch. 
     The ninth switch circuit  109  includes a ninth PNP bipolar junction transistor Q 9 , a ninth diode D 9 , and the switch K 9 . The switch K 9  is a double pole single throw relay switch. 
     The tenth switch circuit  110  includes a tenth PNP bipolar junction transistor Q 10 , a tenth diode D 10 , and the switch K 10 . The switch K 10  is a double pole single throw relay switch. 
     The eleventh switch circuit  111  includes an eleventh PNP bipolar junction transistor Q 11 , an eleventh diode D 11 , and the switch K 11 . The switch K 11  is a double pole single throw relay switch. 
     The twelfth switch circuit  112  includes a twelfth PNP bipolar junction transistor Q 12 , a twelfth diode D 12 , and the switch K 12 . The switch K 12  is a double pole single throw relay switch. 
     The thirteenth switch circuit  113  (See  FIG. 2 ) includes a thirteenth PNP bipolar junction transistor Q 13 , a thirteenth diode D 13 , and the switch K 13 . The switch K 13  is a double pole double throw relay switch. 
     In one embodiment, a circuit connection and an operation principle of each of the second switch circuit  102 , the third switch circuit  103 , the fourth switch circuit  104 , the fifth switch circuit  105 , the sixth switch circuit  106 , the seventh switch circuit  107 , the eighth switch circuit  108 , the ninth switch circuit  109 , the tenth switch circuit  110 , the eleventh switch circuit  111 , the twelfth switch circuit  112 , and the thirteenth switch circuit  113  are similar to that of the first switch circuit  101  described above. 
     An alarm circuit  114  is connected to a pin P 17  of the MCU  10 . The alarm circuit  114  includes a fourteenth bipolar junction transistor Q 14  and a speaker  140  connected to the fourteenth transistor Q 14 . When the test ends, the speaker  140  generates audible signals. 
     A signal conversion circuit  115  (see  FIG. 5 ) is connected to the MCU  10 . The signal conversion circuit  115  includes a data conversion chip  150 , e.g., a MAX  232  chip. Pin  13 (R 1  IN), pin  12 (R 1  OUT), pin  11 (T 1  IN), and pin  14 (T 1  OUT) is one data channel of the data conversion chip  150 . Pin  8 (R 2  IN), pin  9 (R 2  OUT), pin  10 (T 2  IN), and pin  7 (T 2  OUT) is another data channel of the data conversion chip  150 . Pin  11 (T 1  IN) of the data conversion chip  150  is connected to pin RXD of the MCU  10 , and pin  12 (R 1  OUT) of the data conversion chip  150  is connected to PIN TXD of the MCU  10 . Pin  13 (R 1  IN) and pin  14 (T 1  OUT) are connected to a serial port connector  152  of the computer  60 . The MCU  10  can send signals to the computer  60  via pin  11 (T 1  IN) and pin  14 (T 1  OUT) of the data conversion chip  150 , and the computer  60  can send signals to the MCU  10  via pin  13 (R 1  IN) and pin  12  (R 1  OUT) of the data conversion chip  150 . Signals sent from the MCU  10  are TTL level signals; the data conversion chip  150  is capable of converting the TTL level signals to serial signals, which are receivable by the serial port connector  152  of the computer  60 . Signals sent from the serial port connector  152  of the computer  60  are serial signals; the data conversion chip  150  is capable of converting the serial signals to TTL level signals which are receivable by the MCU  10 . 
     During testing, the PSU  10  is powered on and outputs the power rails. The power meter  40  measures the AC input power supplied to the PSU  10  and sends the measured data to the computer  60 . The computer  60  informs the MCU  10  to switch on/off the switches K 1 -K 13  according to a predetermined sequence. The multimeter  80  measures the effective output voltage of each of the power rails of the PSU  20 , measures the voltage drop across each of the resistors R 1 -R 6 , and sends the measurements to the computer  60 . The computer  60  stores data of the resistors R 1 -R 7  and has processing capability to calculate the current flow of each of the power rails of the PSU  20  using the formula I=U/R, the total output power of the PSU  20 , and the conversion efficiency of the PSU  20 . Then the computer  60  compares the conversion efficiency of the PSU  20  with a standard ratio (such as 80%) and determines whether the conversion efficiency of the PSU  20  meets the standard. 
     It is to be understood, however, that even though numerous characteristics and advantages have been set forth in the foregoing description of preferred embodiments, together with details of the structures and functions of the preferred embodiments, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.