Abstract:
Systems for displaying images and control methods are provided. In this regard, a representative control method for a display panel comprising a first source line, a second source line, a third source line, a first gate line and a second gate line, comprises: asserting the first gate line; and sequentially providing a data signal of a first polarity from a first data driver to the first source line and the third source line, and then providing a data signal of a second polarity from the data driver to the second source line.

Description:
BACKGROUND 
     The disclosure relates to the display of images, such as by using display panels. 
       FIG. 1  is a schematic diagram of a display device. Gate driver  10  outputs the scan signals (also referred to as scan pulses) of each of the gate lines G 1 , G 2 , . . . , Gn according to a predetermined sequence. When a scan signal is carried on one gate line, the thin film transistors (TFTs) within all display units  200  on the same row or “scan line” are turned on while the TFTs within all display units  200  on rows or other scan lines are in a state to be turned off. When a scan line is selected, data or source driver  20  outputs a video signal (gray value) to the m display units of the respective rows through source lines S 1 , S 2 , . . . , Sm according to the image data to be displayed. After gate driver  10  scans n rows continuously, the display of a single frame is completed. Thus, repeated scans of each scan line can achieve the purpose of continuously displaying the image. 
     Typically, a video signal, which is transferred by the source lines S 1 , S 2 , . . . , Sm, is divided into a positive video signal and a negative video signal based on the relationship with the common electrode voltage V COM . The positive video signal indicates a signal having a voltage level higher than the voltage V COM . On the other hand, the negative video signal indicates a signal having a voltage level lower than the voltage V COM . When a positive video signal and a negative video signal are individually applied to the display units  200 , the display effect generally is the same. 
     In order to prevent the liquid crystal molecules of a display unit from continuously receiving a single-polar bias voltage, which reduces the liquid crystal molecular life, a display unit respectively receives positive and negative polar video signals corresponding to odd and even frames. 
     The disposition of the different polar video signals in each display unit can be divided into frame inversion, column inversion, and dot inversion. In frame inversion driving mode, the polarity of the video signals are the same for all display units during the same frame, but the opposite polarity is used for all displays during adjacent frames. 
       FIG. 2   a  is a schematic diagram of a column inversion driving mode. The display units of the same column on the same frame use the same polarity of the video signal, but the opposite polarity of the video signal is used for display units of adjacent lines or columns. For example, when gate driver  10  asserts gate line G 1 , controller  25  turns on switch SW 21   a  and data driver  21  provides data signal D 1  of a positive voltage to source line S 1 . Next, controller  25  turns on switch SW 21   b  and data driver  21  provides data signal D 1  of a negative voltage to source line S 2 . Then, controller  25  turns on switch SW 21   c  and data driver  21  provides data signal D 1  of a positive voltage to source line S 3 . 
     When gate driver  10  asserts gate line G 2 , controller  25  turns on switch SW 21   a  and data driver  21  provides data signal D 1  of a positive voltage to source line S 1 . Next, controller  25  turns on switch SW 21   b  and data driver  21  provides data signal D 1  of a negative voltage to source line S 2 . Then, controller  25  turns on switch SW 21   c  and data driver  21  provides data signal D 1  of a positive voltage to source line S 3 . Note that the operation of data drivers  22 - 24  is similar to that of data driver  21 . 
     In this example, the polarity of the data signal D 1  provided from data driver  21  is changed twice per line. Assuming the resolution of the display panel is 240×3×320 and a frame frequency is 60 Hz, a switch frequency of data driver  21  is 38.4 KHz (60 Hz×320×2). 
       FIG. 2   b  is a schematic diagram of a dot inversion driving mode. In dot inversion driving mode, the polarity of the video signals used by the display units during the same frame is presented in an interlaced form. 
     For example, when gate driver  10  asserts gate line G 1 , controller  25  turns on switch SW 21   a  and data driver  21  provides data signal D 1  of a positive voltage to source line S 1 . Next, controller  25  turns on switch SW 21   b  and data driver  21  provides data signal D 1  of a negative voltage to source line S 2 . Then, controller  25  turns on switch SW 21   c  and data driver  21  provides data signal D 1  of a positive voltage to source line S 3 . 
     When gate driver  10  asserts gate line G 2 , controller  25  turns on switch SW 21   a  and data driver  21  provides data signal D 1  of a negative voltage to source line S 1 . Next, controller  25  turns on switch SW 21   b  and data driver  21  provides data signal D 1  of a positive voltage to source line S 2 . Then, controller  25  turns on switch SW 21   c  and data driver  21  provides data signal D 1  of a negative voltage to source line S 3 . 
     In this example, the polarity of voltage provided from data driver  21  is changed three times per line. That is, in contrast to the column inversion driving mode, the polarity of the signal D 1  changes a third time for each gate line because the signal D 1  changes polarity between the last source line of a respective gate line and the first source line of the next gate line, e.g., between G 1 -S 3  and G 2 -S 1 . Assuming the resolution of the display panel is 240×3×320 and a frame frequency is 60 Hz, a switch frequency of data driver  21  is 57.6 KHz (60 Hz×320×3). 
     SUMMARY 
     Systems for displaying images and control methods are provided. In this regard, an exemplary embodiment of such a system comprises a display panel. The display panel comprises: a first data driver, a first source line, a second source line, a third source line, a first gate line and a second gate line; a first selection unit coupled to the first source line; a second selection unit coupled to the second source line; and a third selection unit coupled to the third source line. The display device is operative such that a data signal of a first polarity or a data signal of a second polarity to the first source lines or the second source line through the first selection units or the second selection unit, wherein the processing unit can sequentially turns on the first selection units such that the first source lines receive the data signal of the first polarity and then turns on the second selection unit such that the second source line receives the data signal of the second polarity. 
     Another exemplary embodiment of such a system comprises a control module for a display panel comprising a first and a second source lines and a first and a second gate lines. The control module comprises: a first selection unit coupled to the first source line; a second selection unit coupled to the second source line; and a processing unit operative to control the first selection unit and the second selection unit and to output a data signal of a first polarity or a data signal of a second polarity to the first source line or the second source line through the first selection unit or the second selection unit, wherein as the first gate line is asserted, the processing unit turns on the first selection unit such that the first source line receives the data signal of the first polarity and then turns on the second selection unit such that the second source line receives the data signal of the second polarity, and as the first gate line is un-asserted and the second gate line is asserted, the processing unit turns on the second selection unit such that the second source line receives the data signal of the second polarity and then turns on the first selection unit such that the first source line receives the data signal of the first polarity. 
     An exemplary embodiment of a control method for a display panel comprising a first source line, a second source line, a third source line, a first gate line and a second gate line, comprises: asserting the first gate line; and sequentially providing a data signal of a first polarity from a first data driver to the first source line and the third source line, and then providing a data signal of a second polarity from the data driver to the second source line. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention can be more fully understood by reading the subsequent detailed description and examples with reference made to the accompanying drawings, wherein: 
         FIG. 1  is a schematic diagram of a display device; 
         FIG. 2   a  is a schematic diagram of a column inversion driving mode; 
         FIG. 2   b  is a schematic diagram of a dot inversion driving mode; 
         FIG. 3   a  is a schematic diagram of an exemplary embodiment of a system for displaying images; 
         FIG. 3   b  is a timing diagram that can be used by the control module of  FIG. 3   a;    
         FIG. 3   c  is another timing diagram that can be used by the control module of  FIG. 3   a;    
         FIG. 4   a  is a flowchart of an embodiment of a control method; 
         FIG. 4   b  is a flowchart of another embodiment of a control method; 
         FIG. 5  is a schematic diagram of another exemplary embodiment of a system for displaying images; 
         FIG. 6  is a flowchart depicting functionality of the control module shown in  FIG. 5 . 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 3   a  is a schematic diagram of an exemplary embodiment of a system for displaying images. As shown in  FIG. 3   c , the system is implemented as an electronic device  30  that comprises an adapter  31  and a display device  33 . Adapter  31 , such as DC to DC converter, provides a driving voltage to the display device  33  for displaying images. In this embodiment, display device  33  utilizes a dot inversion driving method to display images. The display device comprises a display module  331 , a gate driver  333 , and a control module  335 . 
     Display module  331  comprises a plurality of source lines and gate lines for controlling a plurality of pixel units. For clarity, only six source lines S 1 ˜S 6  and two gate lines G 1 ˜G 2  are shown. The source lines and gate lines are used to control the display units  300 . 
     In particular, gate driver  333  asserts gate lines G 1  and G 2 . When gate line G 1  is asserted, display units in the first row (horizontal direction) receive a data signal from source lines S 1 ˜S 6 . When gate line G 2  is asserted, display units in the second row (horizontal direction) receive a data signal from source lines S 1 ˜S 6 . 
     Control module  335  comprises switches SW 1 ˜SW 6  and a processing unit  332 . Switches SW 1 ˜SW 6  are divided into first selection units and second selection units and are respectively coupled to source lines S 1 ˜S 6 . Processing unit  332  provides a data signal of a first polarity or a data signal of a second polarity to the first or the second selection units. 
     In this embodiment, processing unit  322  comprises data drivers  3321 ,  3323 , and processor  3325 . In other embodiments, the processing unit only utilizes one controller to control all of the switches. Since the operations of data drivers  3321  and  3323  are the same, data driver  3321  is given as an example. 
     Data driver  3321  provides data signal D 1  to switches SW 1 ˜SW 3 . Since data driver  3321  provides the data signals of the first polarity to source lines S 1  and S 3  through switches SW 1  and SW 3 , switches SW 1  and SW 3  are first selection units and source lines S 1  and S 3  are first source lines. Since data driver  3321  provides the data signals of the second polarity to source line S 2  through switch SW 2 , switch SW 2  is the second selection unit and source line S 2  is the second source line. In this embodiment, the data of the first polarity is positive and the data of the second polarity is negative. 
     First, processor  3325  sequentially asserts control signals C 1  and C 3  for sequentially turning on switches SW 1  and SW 3 . Therefore, source lines S 1  and S 3  receive the data of the first polarity output from data driver  3321  through switches SW 1  and SW 3 . Next, processor  3325  asserts control signal C 2  for turning on switch SW 2 . Therefore source line S 2  receives the data of the second polarity output from data driver  3321  through switch SW 2 . 
     A column inversion driving method to display images also can be used, an embodiment of which will now be described with respect to  FIG. 3   b . In this regard,  FIG. 3   b  is a timing diagram of the control module. With reference to  FIG. 3   a , during period P 1 , gate driver  333  asserts gate line G 1 . During period P 11 , processor  3325  asserts control signal C 1  to turn on switch SW 1 . Data driver  3321  provides positive data signal D 1  to source line S 1 . 
     During period P 12 , processor  3325  asserts control signal C 3  to turn on switch SW 3 . Data driver  3321  provides positive data signal D 1  to source line S 3 . 
     During period P 13 , processor  3325  asserts control signal C 2  to turn on switch SW 2 . Data driver  3321  provides negative data signal D 1  to source line S 2 . 
     Next, during period P 2 , gate driver  333  asserts gate line G 2 . During period P 21 , processor  3325  asserts control signal C 1  to turn on switch SW 1 . Data driver  3321  provides negative data signal D 1  to source line S 1 . 
     During period P 22 , processor  3325  asserts control signal C 3  to turn on switch SW 3 . Data driver  3321  provides negative data signal D 1  to source line S 3 . 
     During period P 23 , processor  3325  asserts control signal C 2  to turn on switch SW 2 . Data driver  3321  provides positive data signal D 1  to source line S 2 . 
     Data driver  3321  provides positive data signal D 1  during periods P 11 , P 12  and provides negative data signal D 1  during periods P 13 , P 21 . The polarity of the data signal is only changed once, i.e. changed during period P E1  comprising periods P 11 , P 12 , P 13 , and P 21 . Assuming the resolution of the display panel is 240×3×320 and a frame frequency is 60 Hz, a switch frequency of data driver  3321  is 19.2 KHz (60 Hz×320×1). Thus, the switch frequency of data driver  3321  has been reduced by two-thirds as compared with data driver  21 . Therefore, power waste is reduced. 
       FIG. 3   c  is another timing diagram that can be used by a control module, such as the control module of  FIG. 3   c .  FIG. 3   c  is similar to  FIG. 3   b  except that timing of data signal during period P 4  differs from the timing of the data signal during period P 2 . 
     During period P 4 , gate driver  333  asserts gate line G 2 . During period P 41 , processor  3325  asserts control signal C 2  to turn on switch SW 2 . Data driver  3321  provides positive data signal to source line S 2 . 
     During period P 42 , processor  3325  asserts control signal C 1  to turn on switch SW 1 . Data driver  3321  provides negative data signal to source line S 1 . 
     During period P 43 , processor  3325  asserts control signal C 3  to turn on switch SW 3 . Data driver  3321  provides negative data signal to source line S 3 . 
     Data driver  3321  provides positive data signal D 1  during periods P 31 , P 32 , provides negative data signal D 1  during periods P 33 , and provides positive data signal D 1  during periods P 41 . The polarity of the data signal changes twice, i.e., the polarity changes during period P E2  comprising periods P 31 , P 32 , P 33 , and P 41 . Assuming the resolution of the display panel is 240×3×320 and a frame frequency is 60 Hz, a switch frequency of data driver  3321  is 38.4 KHz (60 Hz×320×2). This switch frequency of data driver  3321  has been reduced by one third as compared with data driver  21 . 
       FIG. 4   a  is a flowchart of an embodiment of a control method. With reference to  FIGS. 3   a  and  3   b , gate line G 1  is asserted in step  411 . Next, a data signal of first polarity is provided and then a data signal of second polarity is provided in step  412 . For example, as shown in  FIG. 3   a , data driver  3321  sequentially provides positive data signal to source lines S 1  and S 3  through switches SW 1  and SW 3  and then provides negative data signal to source line S 2  through switch SW 2 . 
     Gate line G 1  is un-asserted in step  413  and gate line G 2  is asserted in step  414 . Next, a data signal of the second polarity is provided and then a data signal of the first polarity is provided in step  415 . For example, as shown in  FIG. 3   a , data driver  3321  sequentially provides negative data signal to source lines S 1  and S 3  through switches SW 1  and SW 3  and then provides positive data signal to source line S 2  through switch SW 2 . 
       FIG. 4   b  is a flowchart of another embodiment of a control method.  FIG. 4   b  is similar to  FIG. 4   a  except that step  416  differs from step  415 . After gate line G 2  is asserted in step  414 , a data signal of the first polarity is provided and a data signal of the second polarity is then provided in step  416 . For example, as shown in  FIG. 3   a , data driver  3321  provides positive data signal to source line S 2  through switch SW 2  and then sequentially provides negative data signal to source lines S 1  and S 3  through switches SW 1  and SW 3 . 
       FIG. 5  is a schematic diagram of another exemplary embodiment of a system for displaying images. As shown in  FIG. 5 , this system incorporates an electronic device  50  that comprises an adapter  51  and a display device  53 . Adapter  51 , such as DC to DC converter, provides a driving voltage to the display device  53 . Display device  53  utilizes a two dot inversion driving method to display images and comprises a display module  531 , a gate driver  533 , and a control module  535 . 
       FIG. 5  is similar to  FIG. 3   a  except that processing unit  532  differs from processing unit  332 . Processing unit  532  provides a data signal of a first polarity or a data signal of a second polarity to a first selection unit or a second selection unit. 
     Each of the data drivers  3321  and  3323  within processing unit  332  can control at least three selection units. Each of the data drivers  5321 ,  5323 , and  5327  within processing unit  532  only controls two selection units. Operations of data drivers  5321 ,  5323 , and  5327  are the same, data driver  5321  is given as an example. Note that in this embodiment, the data signal of the first polarity is positive and the data signal of the second polarity is negative. 
     When gate line G 1  is asserted by gate driver  533 , processor  5325  asserts control signal C 1  to turn on switch SW 1 . Therefore, source line S 1  receives the data signal of first polarity output from data driver  5321  through switch SW 1 . 
     Next, control signal C 2  is asserted by processor  5325  such that switch SW 2  is turned on. Therefore, source line S 2  receives the data signal of second polarity output from data driver  5321  through switch SW 2 . 
     Gate line G 1  is un-asserted and gate line G 2  is asserted by gate driver  533 . Processor  5325  asserts control signal C 2  to turn on switch SW 2 . Therefore, source line S 2  receives the data signal of second polarity output from data driver  5321  through switch SW 2 . 
     Next, control signal C 1  is asserted by processor  5325  such that switch SW 1  is turned on. Therefore, source line S 1  receives the data signal of first polarity output from data driver  5321  through switch SW 1 . 
       FIG. 6  is a flowchart depicting functionality of the control module shown in  FIG. 5 . As shown in  FIG. 6 , gate line G 1  is asserted in step  611 . Next, a data signal of the first polarity is provided and then a data signal of the second polarity is provided in step  612 . For example, as shown in  FIG. 5 , data driver  5321  provides a positive data signal to source line S 1  and then provides a negative data signal to source line S 2 . 
     Gate line G 1  is un-asserted in step  613 . Gate line G 2  is asserted in step  614 . A data signal of the second polarity is provided and then a data signal of the first polarity is provided in step  615 . For example, as shown in  FIG. 5 , data driver  5321  provides a negative data signal to source line S 2  and then provides a positive data signal to source line S 1 . 
     While the invention has been described by way of example and in terms of preferred embodiments, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.