Abstract:
An amplification device includes: an amplitude adjustment circuit configured to adjust an amplitude level of an input signal so as to keep the amplitude level within a given range; an amplifier configured to amplify the adjusted signal; and a circuitry configured to change an amplitude level of the amplified signal, based on the amplitude level of the input signal and a first distortion compensation corresponding to the amplitude level of the input signal.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2013-070680 filed on Mar. 28, 2013, the entire contents of which are incorporated herein by reference. 
       FIELD 
       [0002]    The embodiments discussed herein are related to an amplification device and an amplification method. 
       BACKGROUND 
       [0003]    In the related art, an amplifier is used in various electronic devices. It is known that the efficiency of the amplifier is the highest in an output saturation state (that is, a nonlinear state). Therefore, in the related art, a technology has been proposed in which the amplitude of a signal that carries information is kept at a certain level and the signal is amplified with high efficiency, and thereafter amplitude information is superimposed on the amplified signal. 
         [0004]    In addition, in the related art, a technology has been proposed in which nonlinear distortion that is included in a signal that is amplified in an amplifier having less linearity is compensated for. In such distortion compensation, at the input of the amplifier, the input signal of the amplifier is multiplied by the reverse phase of the nonlinear distortion. As a result, the nonlinear distortion that is included in the amplified signal may be reduced. 
         [0005]    Japanese Laid-open Patent Publication No. 2012-147385 is an example of the related art. 
       SUMMARY 
       [0006]    According to an aspect of the invention, an amplification device includes: an amplitude adjustment circuit configured to adjust an amplitude level of an input signal so as to keep the amplitude level within a given range; an amplifier configured to amplify the adjusted signal; and a circuitry configured to change an amplitude level of the amplified signal, based on the amplitude level of the input signal and a first distortion compensation corresponding to the amplitude level of the input signal. 
         [0007]    The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims. 
         [0008]    It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0009]      FIG. 1  is a block diagram illustrating an example of an amplification device according to a first embodiment; 
           [0010]      FIG. 2  is a diagram illustrating an example of a second look-up table; 
           [0011]      FIG. 3  is a diagram illustrating an example of a first look-up table; 
           [0012]      FIG. 4  is a flowchart illustrating an example of a processing operation of the amplification device; 
           [0013]      FIG. 5  is a schematic diagram illustrating an example of a signal that is input to an amplifier in a case of a high level mode; 
           [0014]      FIG. 6  is a schematic diagram illustrating an example of a signal that is input to the amplifier in a case of a low level mode; 
           [0015]      FIG. 7  is a diagram illustrating a first configuration example of a load variable section; 
           [0016]      FIG. 8  is a diagram illustrating a second configuration example of the load variable section; 
           [0017]      FIG. 9  is a block diagram illustrating an example of an amplification device according to a second embodiment; and 
           [0018]      FIG. 10  is a diagram illustrating a hardware configuration example of an amplification device. 
       
    
    
     DESCRIPTION OF EMBODIMENTS 
       [0019]    The embodiments of the amplification device and the amplification method discussed herein are described below in detail with reference to accompanying drawings. The amplification device and the amplification method discussed herein are not limited to the embodiments. In addition, the same reference numerals are assigned to configurations having the similar function in the embodiment, and the duplicated description is omitted herein. 
         [0020]    While inventing the present embodiments, observations were made regarding a related art. Such observations include the following, for example. 
         [0021]    In an amplifier of related art, when the technology is used in which the amplitude of the input signal of the amplifier is kept unchanged in order to operate the amplifier with high efficiency, it is difficult to perform distortion compensation for the amplitude component at the input of the amplifier. This is because, in the technology, it is assumed that the amplitude of the input signal of the amplifier is kept at a certain level. 
         [0022]    Therefore, the embodiments disclosed herein may provide, for example, an amplification device and an amplification method in which amplification is performed with high efficiency, and an amplification device and an amplification method in which distortion compensation is performed. 
       First Embodiment p [Configuration Example of an Amplification Device] 
       [0023]      FIG. 1  is a block diagram illustrating an example of an amplification device according to a first embodiment. In  FIG. 1 , an amplification device  10  includes an amplitude level detection section  11 , a level determination section  12 , an adjustment section  13 , a look-up table (LUT) storage section  14 , a distortion compensation section  15 , an amplifier  16 , a control signal output section  17 , a load variable section  18 , a comparison section  19 , and coefficient update sections  20  and  21 . 
         [0024]    The amplitude level detection section  11  detects the amplitude (that is, electric power) of a signal that is input to the amplification device  10 . That is, the amplitude level detection section  11  extracts, for example, an envelope of the input signal. In addition, the amplitude level detection section  11  outputs the detected amplitude value to the level determination section  12 , the LUT storage section  14 , and the control signal output section  17 . Here, the input signal includes an amplitude component and a phase component. In addition, for example, when the amplification device  10  is applied to a transmission device, the input signal is a transmission signal, and includes an I component and a Q component. In this case, the amplitude component and the phase component of the input signal vary depending on transmission data. 
         [0025]    The level determination section  12  determines an amplitude level based on the amplitude value that is detected in the amplitude level detection section  11 . For example, the level determination section  12  compares the amplitude value that is received from the amplitude level detection section  11  with a level determination threshold that is set beforehand, and determines whether the detected amplitude value is in a high level or a low level, based on the sizes of the amplitude value and the level determination threshold. For example, the level determination section  12  determines that the detected amplitude value is in the high level when the detected amplitude value is the level determination threshold or higher, and determines that the detected amplitude value is in the low level when the detected amplitude value is lower than the level determination threshold. Here, the amplification device  10  operates in a high level mode when the level determination section  12  determines that the detected amplitude value is in the high level, and operates in a low level mode when the level determination section  12  determines that the detected amplitude value is in the low level. 
         [0026]    In addition, the level determination section  12  outputs information on the determined level (hereinafter, may be simply referred to as “level information”) to the adjustment section  13 , the LUT storage section  14 , and the control signal output section  17 . Here, the level information indicates whether the level is the high level or the low level, and is also information on the mode (hereinafter, may be simply referred to as “mode information”). 
         [0027]    When the level information that is received from the level determination section  12  indicates that the level is the high level, the adjustment section  13  adjusts the amplitude level of the input signal so as to keep the amplitude level within a certain range, and outputs the signal after the level adjustment to the distortion compensation section  15 . As a result, the level of the amplitude of the signal that is input to the amplifier  16  is kept at a certain level, and the signal becomes a signal on which the phase information is merely superimposed. In addition, when the level information that is received from the level determination section  12  indicates the level is the low level, the adjustment section  13  outputs the input signal to the distortion compensation section  15  without adjusting the amplitude level. As a result, the signal that is input to the amplifier  16  becomes a signal on which both of the amplitude information and the phase information are superimposed. 
         [0028]    The LUT storage section  14  outputs a second distortion compensation coefficient that corresponds to the amplitude value that is detected in the amplitude level detection section  11 , to the distortion compensation section  15 . For example, the LUT storage section  14  stores a second look-up table in which a plurality of address values are respectively associated with second distortion compensation coefficients that correspond to the address values. Each of the address values corresponds to a candidate of the amplitude value. In addition, the LUT storage section  14  outputs the second distortion compensation coefficient that is associated with the detected amplitude value (that is, an address value) to the distortion compensation section  15 . The second distortion compensation coefficient includes an amplitude component coefficient and a phase component coefficient. 
         [0029]      FIG. 2  is a diagram illustrating an example of the second look-up table. As illustrated in  FIG. 2 , in the second look-up table, a pair of an amplitude component coefficient “α n ” and a phase component coefficient “β n ” are associated with an address “a n ”. In addition, an address of “a k ” or larger corresponds to the above-described high level, an address of smaller than “a k ” corresponds to the above-described low level. Here, “a k ” corresponds to the above-described level determination threshold. In addition, a value of the amplitude component coefficient becomes a value that corresponds to the address in the low level range. That is, for example, as an address number becomes large, a value of the corresponding amplitude component coefficient also increases. In addition, a value of the amplitude component coefficient is a value within a certain range in the high level range regardless of an address. That is, for example, the value of the corresponding amplitude component coefficient is kept unchanged regardless of an address. Here, when the amplitude component coefficient is kept unchanged in the high level range, distortion compensation for the amplitude component is not performed in the high level range. On the other hand, a value of the phase component coefficient becomes a value that corresponds to the address regardless of whether the range is a low level range or a high level range. 
         [0030]    In addition, the LUT storage section  14  updates, using an update coefficient that is received from the coefficient update section  20 , the second distortion compensation coefficient (that is, the amplitude component coefficient and the phase component coefficient) that has been used to calculate the update coefficient and that correspond to an amplitude value (that is, an address) of a transmission signal at focused timing. 
         [0031]    The distortion compensation section  15  performs distortion compensation for the signal that is output from the adjustment section  13  using the second distortion compensation coefficient that is received from the LUT storage section  14 . Here, as described above, the value of the amplitude component coefficient that is received from the LUT storage section  14  is kept unchanged in the high level mode, so that the distortion compensation section  15  does not perform distortion compensation for the amplitude component of the input signal and merely perform distortion compensation for the phase component. In addition, the distortion compensation section  15  performs distortion compensation for both of the amplitude component and the phase component in the low level mode. 
         [0032]    For example, the distortion compensation section  15  includes a multiplier  31 . The multiplier  31  multiplies the signal that is output from the adjustment section  13  by the second distortion compensation coefficient that is output from the LUT storage section  14 , and outputs the obtained signal to the amplifier  16 . 
         [0033]    The amplifier  16  amplifies the signal that is output from the distortion compensation section  15 , and outputs the amplified signal to the load variable section  18 . Here, the above-described high level range corresponds to a nonlinear region of the amplifier  16 . In addition, the amplitude (that is, electric power) of the signal that is adjusted in the adjustment section  13  corresponds to the nonlinear region of the amplifier  16 . 
         [0034]    The control signal output section  17  generates a control signal by correcting the amplitude value that is detected in the amplitude level detection section  11 , using the first distortion compensation coefficient that corresponds to the amplitude value that is detected in the amplitude level detection section  11 , and the control signal output section  17  outputs the generated control signal to the load variable section  18 . That is, the value of the control signal is a value also in consideration of distortion compensation. That is, the control signal output section  17  functions as an amplitude value output section that corrects the amplitude value that is detected in the amplitude level detection section  11 , using the first distortion compensation coefficient that corresponds to the amplitude value that is detected in the amplitude level detection section  11 , and that performs output of the corrected amplitude value. 
         [0035]    For example, the control signal output section  17  includes a LUT storage section  41  and a multiplier  42 . 
         [0036]    The LUT storage section  41  outputs the first distortion compensation coefficient that corresponds to the amplitude value that is detected in the amplitude level detection section  11 , to the distortion compensation section  15 . For example, the LUT storage section  41  stores the first look-up table in which a plurality of address values are respectively associated with first distortion compensation coefficients that correspond to the address values. Each address value corresponds to a candidate of the amplitude value. In addition, the LUT storage section  41  outputs the first distortion compensation coefficient that is associated with the detected amplitude value (that is, an address value) to the multiplier  42 . The first distortion compensation coefficient does not include a phase component coefficient but includes an amplitude component coefficient, which is different from the above-described second distortion compensation coefficient. 
         [0037]      FIG. 3  is a diagram illustrating an example of the first look-up table. As illustrated in  FIG. 3 , in the first look-up table, an amplitude component coefficient “γ n ” is associated with an address “a n ”. In addition, similarly to the above-described second look-up table, an address of “a k ” or larger corresponds to the above-described high level, and an address of smaller than “a k   38  corresponds to the above-described low level. Here, “a k ” corresponds to the above-described level determination threshold. In addition, the value of the amplitude component coefficient is within a certain range in the low level range regardless of an address. That is, for example, the value of the corresponding amplitude component coefficient is kept unchanged regardless of an address. On the other hand, the value of the amplitude component coefficient becomes a value that corresponds to the address in the high level range. That is, for example, as an address number becomes large, a value of the corresponding amplitude component coefficient also increases. Here, when the amplitude component coefficient is kept unchanged in the low level range, distortion compensation for the amplitude component is not performed in the low level range. As described above, distortion compensation for the amplitude component is not performed at the output of the amplifier  16  in the low level range, because distortion compensation is performed in the distortion compensation section  15 . In addition, in the high level range, distortion compensation for the amplitude component is not performed in the distortion compensation section  15 , so that distortion compensation for the amplitude component is performed in the output of the amplifier  16 . Distortion compensation for the phase component is performed in the distortion compensation section  15  regardless of whether the range is a low level range or a high level range. Thus, in the first look-up table, a phase component coefficient is not included. 
         [0038]    In addition, the LUT storage section  41  updates, using an update coefficient that is received from the coefficient update section  21 , the first distortion compensation coefficient (that is, the amplitude component coefficient) that has been used to calculate the update coefficient and that corresponds to an amplitude value (that is, an address) of a transmission signal at focused timing. 
         [0039]    The multiplier  42  multiplies the amplitude value that is detected in the amplitude level detection section  11  by the first distortion compensation coefficient that is output from the LUT storage section  41 . Such multiplication result corresponds to the control signal that is output to the load variable section  18 . 
         [0040]    The load variable section  18  changes the amplitude of the amplified signal that is output from the amplifier  16  by changing the load based on the control signal that is received from the control signal output section  17 . Here, the control signal has a value based on the amplitude value that is detected in the amplitude level detection section  11 , so that the amplitude information that has been superimposed on the input signal to the amplification device  10  may be superimposed on the amplified signal by changing the load in the load variable section  18  based on the control signal. In addition, the control signal has a value for which distortion compensation for the amplitude component is considered, in the high level range, so that distortion compensation for the amplitude component may be performed when the load variable section  18  changes the load based on the control signal. A configuration example of the load variable section  18  is described later. 
         [0041]    An input signal to the amplification device  10  at each target timing is input to the comparison section  19 . In addition, an output signal from the load variable section  18 , which corresponds to the input signal at each target timing is input to the comparison section  19  through a feedback system. Hereinafter, the signal that is input to the comparison section  19  through the feedback system may be referred to as “a feedback signal”. 
         [0042]    In addition, the comparison section  19  compares an input signal and a feedback signal that correspond to the same target timing. For example, the comparison section  19  subtracts the feedback signal from the input signal to obtain a difference between the input signal and the feedback signal. Further, the comparison section  19  outputs the obtained difference to the coefficient update sections  20  and  21 . 
         [0043]    The coefficient update sections  20  and  21  calculate update coefficients based on the difference that is obtained in the comparison section  19  and output the calculated update coefficients to the LUT storage sections  14  and  41 , respectively. As a result, the distortion compensation coefficients are updated in the LUT storage sections  14  and  41 . By repeating such update processing, finally, the value converges to an optimal distortion compensation coefficient, and distortion in the amplifier  16  is compensated for. 
         [0044]    [Operation Example of the Amplification Device] 
         [0045]    An example of a processing operation of the amplification device that includes the above-described configuration is described below.  FIG. 4  is a flowchart illustrating an example of the processing operation of the amplification device. Here, in particular, distortion compensation processing in the high level mode and distortion compensation processing in the low level mode are described. 
         [0046]    The amplitude level detection section  11  detects the amplitude value of an input signal to the amplification device  10  (Step S 101 ). 
         [0047]    The level determination section  12  compares the amplitude value that is received from the amplitude level detection section  11  with a level determination threshold that is set beforehand, and determines whether or not the detected amplitude value is in a high level, based on the sizes of the amplitude value and the level determination threshold (Step S 102 ). Here, the amplification device  10  operates in the above-described high level mode when the level determination section  12  determines that the detected amplitude value is in the high level, and operates in the above-described low level mode when the level determination section  12  determines that the detected amplitude value is not in the high level, that is, the detected amplitude value is in the low level. 
         [0048]    When the level determination section  12  determines that the detected amplitude value is in the high level (Yes in Step S 102 ), the adjustment section  13  adjusts the amplitude level of the input signal so as to keep the amplitude level within a certain range (Step S 103 ). As a result, the signal that is input to the amplifier  16  becomes a signal the amplitude level of which is kept in the certain range and on which phase information is merely superimposed.  FIG. 5  is a schematic diagram illustrating an example of a signal that is input to the amplifier in the case of the high level mode. Such adjusted amplitude level corresponds to a nonlinear region of the amplifier  16 . Therefore, the amplifier  16  may operate with high efficiency. 
         [0049]    The distortion compensation section  15  does not perform distortion compensation for the amplitude component of the input signal but performs distortion compensation for the phase component of the input signal (Step S 104 ). 
         [0050]    The amplifier  16  amplifies the signal that is output from the distortion compensation section  15  (Step S 105 ). In addition, the amplified signal is output to the load variable section  18 . 
         [0051]    The load variable section  18  performs distortion compensation for the amplitude component of the amplified signal while superimposing the amplitude information that has been superimposed on the input signal, on the amplified signal, based on the control signal that is received from the control signal output section  17  (Step S 106 ). 
         [0052]    As described above, in the high level mode, the amplifier  16  may operate with high efficiency by adjusting the amplitude level of the signal that is input to the amplifier  16  so as to keep the amplitude level at a certain level. In addition, even when the amplitude level of the signal that is input to the amplifier  16  is at a certain level, distortion compensation may be performed by executing distortion compensation processing for the amplitude component at the output of the amplifier  16 . 
         [0053]    When the level determination section  12  determines that the detected amplitude value is not in the high level (No in Step S 102 ), the adjustment section  13  outputs the input signal to the distortion compensation section  15  without adjusting the amplitude level. As a result, the signal that is input to the amplifier  16  becomes a signal on which both of the amplitude information and the phase information are superimposed.  FIG. 6  is a schematic diagram illustrating an example of a signal that is input to the amplifier in the case of the low level mode. 
         [0054]    In addition, the distortion compensation section  15  performs distortion compensation for both of the amplitude component and the phase component of the input signal (Step S 107 ). 
         [0055]    The amplifier  16  amplifies the signal that is output from the distortion compensation section  15  (Step S 108 ). In addition, the amplified signal is output to the load variable section  18 . Here, in the low level mode, processing of changing the amplitude of the amplified signal is not executed in the load variable section  18 . This is because, in the low level mode, the adjustment processing is not executed in the adjustment section  13  and distortion compensation for the amplitude component and the phase component is performed in the distortion compensation section  15 . 
         [0056]    [Configuration Example of the Load Variable Section] 
         [0057]    A configuration example of the load variable section  18  is described below. 
       FIRST CONFIGURATION EXAMPLE 
       [0058]      FIG. 7  is a diagram illustrating a first configuration example of the load variable section. In  FIG. 7 , the load variable section  18  includes a matching unit  50  and a quantization section  51 . 
         [0059]    The quantization section  51  forms a quantization bit string of quantization bit number N (here, N is a natural number of 2 or more) by quantizing the control signal that is output from the control signal output section  17 . 
         [0060]    The matching unit  50  is provided at the output of the amplifier  16  and changes the amplitude of the amplified signal that is output from the amplifier  16  by changing the load based on the quantization bit string that is formed in the quantization section  51 . 
         [0061]    For example, as illustrated in  FIG. 7 , the matching unit  50  includes capacitors  52 ,  53 , and  54  that have different capacities, and switches  55 ,  56 , and  57 . That is, the matching unit  50  is a switched capacitor. One end of the capacitor  52  is connected to a main transmission line, and the other end of the capacitor  52  is grounded through the switch  55 . Similarly, one end of the capacitor  53  is connected to the main transmission line, and the other end of the capacitor  53  is grounded through the switch  56 . One end of the capacitor  54  is connected to the main transmission line, and the other end of the capacitor is grounded through the switch  57 . 
         [0062]    Here, the quantization bit string is constituted, for example, by 3 bits. The highest-order bit in the quantization bit string corresponds to the capacitor  52  having the largest capacity and the switch  55 , and the second highest-order bit corresponds to the capacitor  53  having the second largest capacity and the switch  56 . In addition, the third highest-order bit corresponds to the capacitor  54  having the third largest capacity and the switch  57 . The capacity of the capacitor  52  is, for example, 4 pico-Faraday [pF], the capacity of the capacitor  53  is 2 [pF] that is ½ of the capacity of the capacitor  52 , and the capacity of the capacitor  54  is 1 [pF] that is ¼ of the capacity of the capacitor  52 . In addition, when the switch that corresponds to the bit the value of which is 1 in the quantization bit string is turned on, the corresponding capacitor is grounded. When the capacity value is changed depending on the quantization bit string that is a digital value as described above, the size of load impedance may be changed. 
       SECOND CONFIGURATION EXAMPLE 
       [0063]      FIG. 8  is a diagram illustrating a second configuration example of the load variable section. In  FIG. 8 , the load variable section  18  includes a matching unit  50 , a quantization section  51 , a matching unit  60 , and a digital/analog (D/A) conversion section  61 . 
         [0064]    The quantization section  51  forms a quantization bit string of a quantization bit number N (here, N is a natural number of 2 or more) by quantizing the control signal that is output from the control signal output section  17 . The quantization bit string includes a higher-order bits group and a lower-order bit group. The higher-order bit group is output to the matching unit  50  as it is, and the lower-order bit group is converted from a digital value to an analog value in the D/A conversion section  61 , and the analog value that corresponds to the lower-order bit group is output to the matching unit  60 . The higher-order bit corresponds to a large step width, and the lower-order bit corresponds to a small step width. 
         [0065]    The matching units  50  and  60  are provided at the output of the amplifier  16 , and change the amplitude of the amplified signal that is output from the amplifier  16  by changing the load based on the quantization bit string that is formed in the quantization section  51 . 
         [0066]    For example, the matching unit  60  changes the capacity in accordance with an analog value that is obtained in the D/A conversion section  61 . For example, as illustrated in  FIG. 8 , the matching unit  60  includes a pair of varactor diodes that are connected in series and in opposition to each other between the main transmission line and the ground, that is, an inverse-series varactor pair. 
         [0067]    For example, as illustrated in  FIG. 8 , the matching unit  60  includes a capacitor  62 , varactors  63  and  64 , and resistances  65  and  66 . One end of the capacitor  62  is connected to the main transmission line, and the other end of the capacitor  62  is connected to the anode of the varactor  63 . The connection point between the capacitor  62  and the varactor  63  is connected to the ground through the resistance  65 . The cathode of the varactor  64  is connected to the cathode of the varactor  63 . The anode of the varactor  64  is grounded. The connection point between the varactor  63  and the varactor  64  is connected to the D/A conversion section  61  through the resistance  66 . 
         [0068]    Here, the capacity value is changed in accordance with an analog value (that is, an analog voltage signal) by applying the analog value to the connection point between the varactor  63  and the varactor  64 . As a result, the size of the load impedance may be changed. Each of the capacities of the varactors  63  and  64  is less than the capacity of a capacitor that is included in the matching unit  60  and has the smallest capacity. 
         [0069]    In the matching unit  60 , instead of using the inverse-series varactor pair, an inverse-parallel varactor pair may be employed. That is, the matching unit  60  may include a pair of varactor diodes that are connected in parallel and in opposition to each other, that is, an inverse-parallel varactor pair between the main transmission line and the ground. 
         [0070]    As described above, according to the first embodiment, in the case of the high level mode in the amplification device  10 , the adjustment section  13  adjusts the amplitude level of the input signal so as to keep the amplitude level within a certain range. In addition, the control signal output section  17  forms a control signal by correcting the amplitude value that is detected in the amplitude level detection section  11  using the first distortion compensation coefficient that corresponds to the amplitude value that is detected in the amplitude level detection section  11 . In addition, the load variable section  18  changes the amplitude of the amplified signal by changing the load based on the control signal that is formed in the control signal output section  17 . 
         [0071]    In such configuration of the amplification device  10 , amplification may be performed with high efficiency, and distortion compensation for the amplitude component of the input signal may be performed. 
       Second Embodiment 
       [0072]    In a second embodiment, the load variable section is provided at the input of the amplifier as well. 
         [0073]      FIG. 9  is a block diagram illustrating an example of an amplification device according to the second embodiment. In  FIG. 9 , the amplification device  100  includes a load variable section  101 , and the LUT storage sections  102  and  103 . 
         [0074]    The load variable section  101  is provided at the input of the amplifier  16 . The load variable section  101  shifts the frequency of a signal that is input to the amplifier  16 , to a frequency that is indicated by frequency band setting information, by changing the load based on the frequency band setting information. 
         [0075]    For example, when the amplification device  100  is applied to a communication device that is allowed to perform communication in one of a plurality of frequency bands, the frequency band that is used for the communication is instructed to the load variable section  101  based on the frequency band setting information. The load variable section  101  shifts the frequency of the signal that is input to the amplifier  16 , to the frequency that is indicated by the frequency band setting information. As a result, the frequency of the transmission signal is adjusted to a frequency in the frequency band that is used for the communication. That is, variable tuning is performed over a certain band, so that multiband communication may be performed. In order to achieve the multiband communication, a certain offset voltage is applied to the load variable section  101  to determine a band, and a wide band signal that causes load impedance to move at high speed in accordance with an envelope is added to the offset voltage. 
         [0076]    When the frequency band to be used is changed, distortion characteristics are also changed. Therefore, the LUT storage sections  102  and  103  include a plurality of look-up tables that respectively correspond to a plurality of frequency bands. The LUT storage sections  102  and  103  perform switching into a look-up table that corresponds to a frequency band that is indicated by the input frequency band setting information, and operate using the switched look-up table, similarly to the LUT storage sections  14  and  41  that are described in the first embodiment. Here, the configuration is described above in which the LUT storage sections  102  and  103  hold the plurality of look-up tables, and switching of the look-up table is performed in accordance with the frequency band setting information, but the embodiment is not limited to such a configuration. For example, a configuration may be employed in which data to be held in a look-up table that corresponds to the frequency band to be used is input from a control section (not illustrated) to the LUT storage sections  102  and  103 , and the LUT storage sections  102  and  103  update the look-up table using such data. 
         [0077]    As described above, according to the second embodiment, in the amplification device  100 , since the load variable section  101  is provided at the input of the amplifier  16  and changes the load based on the frequency band setting information, the frequency of the signal that is adjusted by the adjustment section  13  is changed. 
         [0078]    In such a configuration of the amplification device  100 , the amplification device that is allowed to be applied to a communication device that performs multiband communication may be achieved. 
       Another Embodiment 
       [0079]    [1] 
         [0080]    In the first embodiment and the second embodiment, the scheme is described in which the mode is switched in accordance with an amplitude value, but the embodiments are not limited to such a scheme. For example, a scheme may be employed in which the amplitude of the signal that is input to the amplifier is adjusted at a certain level regardless of an amplitude value. That is, for example, there is a communication scheme in which the input level of an amplifier is kept unchanged, and power supply voltage of the amplifier is varied in response to an amplitude level. To such a scheme, the processing in the high level mode that is described in the first embodiment and the second embodiment may be applied. 
         [0081]    [2] 
         [0082]    The amplification devices according to the first embodiment and the second embodiment may be achieved, for example, by the following hardware configuration. 
         [0083]      FIG. 10  is a diagram illustrating a hardware configuration example of the amplification device. In  FIG. 10 , an amplification device  200  includes an amplitude adjustment circuit  201 , a multiplier  202 , a matching circuit  203 , an amplifier  204 , a matching circuit  205 , a processor  206 , and a memory  207 . The amplitude adjustment circuit  201 , the multiplier  202 , the matching circuit  203 , the amplifier  204 , and the matching circuit  205  respectively correspond to the adjustment section  13 , the multiplier  31 , the load variable section  101 , the amplifier  16 , and the load variable section  18  in the amplification devices according to the first embodiment and the second embodiment. 
         [0084]    As an example of the processor  206 , a central processing unit (CPU), a digital signal processor (DSP), a field programmable gate array (FPGA), or the like is employed. In addition, as an example of the memory  207 , a random access memory (RAM) such as a synchronous dynamic random access memory (SDRAM), a read only memory (ROM), a flash memory, or the like is employed. 
         [0085]    In addition, various processing functions that are executed in the amplification devices according to the first embodiment and the second embodiment may be achieved by causing a processor that is included in the amplification device to execute a program that is stored in a memory such as a non-volatile storage medium. That is, programs that correspond to the processes that are executed by the amplitude level detection section  11 , the level determination section  12 , the comparison section  19 , the coefficient update sections  20  and  21 , and the LUT storage sections  14 ,  41 ,  102 , and  103  may be recorded to the memory  207 , and each of the programs may be executed by the processor  206 . In addition, the holding function by the LUT storage sections  14 ,  41 ,  102 , and  103  may be achieved by the memory  207 . 
         [0086]    The above-described hardware configuration is merely an example, and the embodiments are not limited to such a configuration. For example, all of the processes of the function sections that are described in the first embodiment and the second embodiment may be achieved by the processor. 
         [0087]    All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although the embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.