Abstract:
A power saving system is provided, comprising a system chip, at least one controller and at least one corresponding switch. The system chip is coupled to the controller. The controller is coupled between the system chip and a connector. The switch is coupled between the controller and a power and is turned on or off according to a GPIO signal. When the switch is turned on, the controller is active. When there is no device through the connector and the controller coupled to the system chip, the controller is turned off for power saving.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This Application claims priority of Taiwan Patent Application No. 097107856, filed on Mar. 6, 2008, the entirety of which is incorporated by reference herein. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The invention relates to a power saving circuit, and more particularly, to a power saving circuit applied in computer systems. 
         [0004]    2. Description of the Related Art 
         [0005]    In a conventional computer system, all peripheral devices will be waked up when powered on. In other words, all controller chips corresponding to the peripheral devices will also be activated for operation. 
         [0006]    However, users may not utilize all of the computer peripheral devices all the time or users may only utilize some computer peripheral devices during a specific time period. The peripheral devices which are not frequently used and controller chips corresponding thereto, however, still consume power, thus causing the conventional computer systems to inefficiently utilize and waste power. 
         [0007]    Five ACPI (Advanced Configuration and Power Interface) states, such as S0, S1, S3, S4 and S5 states, are commonly utilized in computer systems. However, computer systems can only normally operate in the S0 state, while computer systems enter a sleep state in the S1-S5 states. Thus, while computer system power can be saved, computer system operation is inconvenient. 
       BRIEF SUMMARY OF THE INVENTION 
       [0008]    A power saving method for use in an electronic system is disclosed, wherein the electronic system comprises at least one controller respectively connecting to at least one peripheral device. The method comprises the following steps. First, whether any of the peripheral devices is coupled to the respective controllers is detected. The controller is powered off by the electronic system when no peripheral device is coupled to the respective controllers. A device configuration table is updated and next peripheral device is continuously detected. 
         [0009]    A power saving system for determining whether a peripheral device being coupled thereto for power saving control is further disclosed, comprising a system chip, a controller coupled to the system chip and a switch. When the system detects that the controller is not connect to the peripheral device, the GPIO port sends a control signal to the switch such that the switch turns off a power supplied to the controller for power saving. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]    The invention can be more fully understood by reading the subsequent detailed description and examples with reference to the accompanying drawings, wherein: 
           [0011]      FIG. 1  is a flowchart showing an embodiment of a power saving method according to the invention; and 
           [0012]      FIG. 2  shows another embodiment of a power saving system according to the invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0013]    The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims. 
         [0014]      FIG. 1  is a flowchart showing an embodiment of a power saving method according to the invention. According to one embodiment of the invention, when the electronic system is powered on and activates all of the controllers or activates a checking procedure or the state of any of the controllers is turned from a turned-off state to a turned-on state (step S 100 ), a checking procedure may be performed by performing an AP (application program) for scanning (i.e. detection) after a control button is pressed by a user. The checking procedure may also be performed by performing an AP for scanning after a screen option has been selected by a user. The AP would then scan whether one of the peripheral devices through a connector coupled to a corresponding controller exists (step S 110 ), and determine whether the peripheral device is coupled to the controller (step S 120 ). If a peripheral device is coupled to the corresponding controller, the corresponding controller is activated. If the peripheral device is not coupled to the corresponding controller, the AP outputs a control signal to a switch through the BIOS (Basic Input Output System) and a GPIO (General purpose input/output) port so that the switch forces the power of the corresponding controller to be turned off for power saving (step S 130 ) and the AP informs the OS (Operation System) to perform a DM (Device Manager) program to update a device configuration table (step S 140 ). Then, it is determined whether all of the peripheral devices have been scanned (step S 150 ). If any of the peripheral devices have not scanned, the flow returns to step S 110 . In another embodiment, the electronic system may utilize hardware to scan and determine whether the peripheral device is coupled to the electronic system, and is not limited to only utilizing the AP. 
         [0015]      FIG. 2  shows another embodiment of a power saving system  300  according to the invention. The power saving system  300  comprises a South-Bridge chip  310 , pluralities of controllers, such as LAN controller  320 , Card Bus controller  330 ,  1394  controller  340 , ESATA (External Serial ATA) controller  350 , pluralities of corresponding switches  322 ,  332 ,  342  and  352  and pluralities of corresponding computer peripheral devices  324 ,  334 ,  344  and  354 , respectively. As shown in  FIG. 3 , the South-Bridge chip  310  is connected to the LAN controller  330  through a PCI bus, connected to the  1394  controller  340  through the PCI or a PCI express bus, and connected to the ESATA controller  350  through the PCI express bus. Each of the controllers  320 ,  330 ,  340  and  350  comprises a connector (not shown), and the controllers  320 ,  330 ,  340  and  350  are connected to the peripheral devices  324 ,  334 ,  344  and  354  respectively through the corresponding connector. Each of the controllers  320 ,  330 ,  340  and  350  are coupled to a supplied power Vdd through the switches  322 ,  332 ,  342  and  352  respectively. 
         [0016]    In one embodiment of the invention, each of the switches  322 ,  332 ,  342  and  352  is coupled between a supplied power Vdd and the corresponding controller, and each switch is turned on or off according to a GPIO signal. For example, the switch  322  is turned on or off according to a GPIO signal GPIO 1 . When the device  324  is connected to the controller  320  through the connector, the GPIO signal GPIO 1  is at a high voltage level such that the NMOS transistor  322  is turned on and the LAN controller  320  is activated due to reception of the supplied power Vdd. The South-Bridge chip  310  thus connects to the LAN controller  320  through the PCI interface and the LAN controller  320  and starts transmitting data to/receiving data from therebetween. When the device  324  is not connected to the South-Bridge chip  310  through the connector and the LAN controller  320 , the AP will issue a GPIO signal GPIO 1  to turn off the switch  322  thereby powering off the LAN controller  320  for reducing power consumption. 
         [0017]    When the device  334  is not connected to the South-Bridge chip  310  through the connector and the Card Bus controller  330 , the AP will issue a GPIO signal GPIO 2  to turn off the switch  332  thereby powering off the Card Bus controller  330  for reducing power consumption. Similarly, when the  1394  controller  340  and the ESATA controller  350  are not being used, i.e. both the peripheral devices  344  and  354  are not connected to the controllers  340  and  350 , the AP will issue GPIO signals GPIO 3  and GPIO 4  to turn off the switches  342  and  352  respectively thereby power off the  1394  controller  340  and the ESATA controller  350  for reducing power consumption. It is to be understood that although the switches  322 ,  332 ,  342  and  352 , in this embodiment, are implemented by NMOS transistors, the invention is not limited thereto. In other words, the switches can be implemented by any other devices or elements with similar functionality. 
         [0018]    In summary, compared with conventional computer systems where all controllers of peripheral devices are activated when powered up, specific controllers, according to the invention, is activated only when a corresponding peripheral device is connected to the system chip through the connector and the controller for avoiding unnecessary power consumption. Moreover, scanning of all of the peripheral devices may be performed while the computer system is being powering up or it may be performed only when a trigger event occurs. 
         [0019]    While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to the skilled in the art). Therefore, the scope of the appended claims should be accorded to the broadest interpretation so as to encompass all such modifications and similar arrangements.