Abstract:
A chip socket scale package. The package presents combined compatibility with two different chip scale package types with solder balls in same position, thereby using only one chip socket scale package.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The present invention relates to a chip scale package chip socket, and in particular a chip socket for two different chip scale package types that have solder balls in the same position.  
           [0003]    2. Description of the Related Art  
           [0004]    The electronics industry has been progressing with the miniaturization of electronic devices. This trend influences semiconductor packaging technology, which enables the connection between bare IC chips and other components, and enables the connection between bare IC chips and other components. Typically, a semiconductor package has a footprint much larger than that of the chip. To adapt to the miniaturization trend, the size difference between the package and the chip has been reduced, producing a new package type called a Chip scale package (CSP). The solder balls of chip scale package are smaller than ball grid array (BGA) that had arranged according to international standard of Joint Electron Device Engineering Council (JEDEC). When it comes to personal and portable electronic devices, smaller is better, and various products need different chip scale package types and, accordingly, different chip scale package chip sockets. Different chip scale package types need different burn-in board and Hi-Fix and tester change kits that elevate costs.  
           [0005]    [0005]FIG. 1 a  and FIG. 1 b  show schematic diagrams of a conventional chip socket for a first chip socket scale package type  70 . The first chip scale package type  70  is square. FIG. 1 a  shows a schematic diagram of a conventional chip scale package chip socket with the frame switch in first position. FIG. 1 b  shows a schematic diagram of the conventional chip scale package chip socket with the frame switch in open position. In FIG. 1 a  and FIG. 1 b,  the first chip scale package type  70  is on the top of conventional chip scale package chip socket. The first chip scale package type  70  is square. Both sides of the chip have a clamp  72 A  72 B. The chip has a plurality of solder balls  76  arranged according to international standard of Joint Electron Device Engineering Council (JEDEC).  
           [0006]    [0006]FIG. 2 a  and FIG. 2 b  show a conventional chip socket for the second chip scale package type  80  wherein the second chip scale package type  80  is rectangular. FIG. 2 a  shows a schematic diagram of a conventional chip socket for second chip scale package type  80  with the frame switch in first position. FIG. 2 b  shows a schematic diagram of a conventional chip scale package chip socket with the frame switch in open position. Both sides of the chip have a clamp  82 A- 82 B. The chip has a plurality of solder balls  86  arrayed according to international standard of Joint Electron Device Engineering Council (JEDEC).  
           [0007]    In FIG. 1 a,  a chip scale package chip socket comprising a body  10  has a bay  20  for seating first Chip scale package type  70 . Electrical connection probes  12  are formed from outside to the bay  20  to electrically connect the chip  70 . Two tong members  14 A- 14 B are formed in the body  10  closing to fix a chip in the bay and opening to release the chip. A frame switch  16  is formed on the body  10  moving between a first position and a second position, to move tong members  14 A- 14 B between closed and open position, respectively (see FIG. 1 a  and  1   b ) On the top of the conventional chip scale package chip socket is a first chip scale package type  70 , which is square. Both sides of the chip have a clamp  72 A- 72 B. The chip has a plurality of solder balls  76  arrayed according to the international standard of Joint Electron Device Engineering Council (JEDEC).  
           [0008]    [0008]FIG. 2 a  shows a schematic diagram of a conventional chip socket for second chip scale package type  80 . The chip scale package chip socket comprises at least a body  30  with a bay  40  for seating second chip scale package type  80 . Electrical connection probes  32  extend from outside to the bay  40  to electrically connect the chip  80 . Two tong members  34 A- 34 B are formed in the body  30  moving between a closed position and an opened position, thereby fixing a chip in bay  40  and releasing the chip, respectively. A frame switch  36  is formed on the body  30  moving between first position and second position, thereby moving tong members  34 A  34 B between closed and opened position, respectively (see FIG. 2 a  and  2   b ) The second chip scale package type  80 , on top of the conventional chip scale package chip socket, is rectangular. Both sides of the chip have a clamp  82 A- 82 B. The chip has a plurality of solder balls  86  arrayed according to international standard of Joint Electron Device Engineering Council (JEDEC).  
         SUMMARY OF THE INVENTION  
         [0009]    Accordingly, an object of the invention is to provide a chip scale package chip socket for first and second chip scale package types.  
           [0010]    The chip scale package socket comprises a body having a first bay for seating first chip scale package type and a second bay extending from both sides of the first bay for seating second chip scale package type. Electrical connection probes extend from outside to the bay. Two tong members formed in the body moving between closed and opened position, and a frame switch formed on the body moving between first position and second position, moving the tong members between closed and opened position, respectively. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0011]    The present invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:  
         [0012]    [0012]FIG. 1 a  shows a schematic diagram of a conventional chip socket for first chip scale package type with the frame switch in first position;  
         [0013]    [0013]FIG. 1 b  shows a schematic diagram of a conventional chip socket for first chip scale package type with the frame switch in second position;  
         [0014]    [0014]FIG. 2 a  shows a schematic diagram of a conventional chip socket for second chip scale package type with the frame switch in first position;  
         [0015]    [0015]FIG. 2 b  shows a schematic diagram of a conventional chip socket for second chip scale package type with the frame switch in second position;  
         [0016]    [0016]FIG. 3 a  shows a schematic diagram of chip scale package chip socket of the present invention with frame switch in first position;  
         [0017]    [0017]FIG. 3 b  shows a schematic diagram of chip scale package chip socket of the present invention with frame switch in second position.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0018]    [0018]FIG. 3 a  and FIG. 3 b  show the present invention chip socket for first chip scale package type  73  and second chip scale package type  83  wherein the first chip scale package type  73  is square and the second chip scale package type  83  is rectangular. FIG. 3 a  shows a schematic diagram of chip scale package chip socket of the present invention with frame switch in first position. FIG. 3 b  shows a schematic diagram of the chip scale package chip socket of the present invention with frame switch in second position.  
         [0019]    [0019]FIG. 3 a  and FIG. 3 b  show a chip scale package chip socket of the present invention for first chip scale package type  73  and second chip scale package type  83 . The chip scale package chip socket comprises at least a body  50  with a first bay  52  for seating first chip scale package type  73 . The second bay  54  extends from both sides of the first bay  52  to seat second chip scale package type  83 . Electrical connection probes  56  extend from outside to the bay to electrically connect the chip. Two tong members  58 A- 58 B are formed in the body  50  moving between closed and open positions, thereby fixing and releasing a chip in the bay, respectively. A frame switch  60  is formed on the body  50  moving between first position and second position, to move the tong members  58 A- 58 B between closed and open positions, respectively. FIG. 3 a  and FIG. 3 b  show a chip scale package chip socket for first chip scale package type  73  and second chip scale package type  83 . The first chip scale package type  73  is square. The second chip scale package type  83  is rectangular. On both sides of first chip scale package type  73  are clamps  74 A- 74 B. On both sides of second chip scale package type  83  are clamps  84 A- 84 B. The chip has a plurality of solder balls  75  arrayed according to international standard of Joint Electron Device Engineering Council (JEDEC). A chip has a plurality of solder balls  85  arrayed according to international standard of Joint Electron Device Engineering Council (JEDEC).  
         [0020]    Finally, while the invention has been described by way of example and in terms of the above preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.