Abstract:
A drive circuit apparatus for driving a magnetic head includes a magnetic core, a coil wound around the magnetic core, and a unit for supplying current to the coil. The supplying unit includes first and second capacitors and a charging unit such that the second capacitor is charged while the current is supplied to the coil by a charge stored in the first capacitor.

Description:
This application is a continuation of prior application, Ser. No. 07/793,093 filed Nov. 15, 1991, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a drive apparatus for a magnetic head used in an optomagnetic recording system and, more particularly, to a drive circuit apparatus for a magnetic head used in information recording of a magnetic field modulation scheme. 
     2. Related Background Art 
     In recent years, an optomagnetic recording apparatus has received a great deal of attention as a large-capacity external memory for a computer. An optical modulation scheme and a magnetic field modulation scheme are available as existing information recording schemes for the optomagnetic recording apparatus. Of these modulation schemes, the magnetic field modulation scheme has an advantage in that information recording can be performed without decreasing information transfer speed since an overwrite operation can be performed to simultaneously erase recorded information and write new information. 
     FIG. 1 is a schematic circuit diagram for driving a magnetic head used in the above magnetic field modulation scheme. In the magnetic field modulation scheme, as is known well, a light beam is emitted from a light source such as a semiconductor laser to an information recording medium to increase the temperature of an irradiated portion over a Curie point, and a magnetic field modulated in accordance with a recording signal is applied to this high-temperature portion, thereby changing the direction of magnetization in correspondence with the bit information. The circuit shown in FIG. 1 is an arrangement of a magnetic head using two coils L 1  and L 2  to generate a bias magnetic field. A switch element SW1 is connected to the coil L 1  through a resistor R 1 , and a switch element SW2 is connected to the coil L 2  through a resistor R 2 . A recording signal is supplied to the control terminal of the switch element SW1, and to the control terminal of the switch element SW2 through an inverter 100. As shown in FIG. 2, the coils L 1  and L 2  are wound around a magnetic core 101 serving as a magnetic field generation core in opposite directions. Terminals a to d of the coils in FIG. 2 correspond to those in FIG. 1. When a current is supplied from the terminal a to the terminal b, the coil L 1  generates a magnetic field having a given direction of polarization. When a current is supplied from the terminal c to the terminal d, the coil L 2  generates a magnetic field having a direction of polarization opposite to the given direction. 
     Assume that the recording signal is set at &#34;1&#34;. Since the switch element SW1 is turned on and a current flows through the coil L 1 , a magnetic field is generated by the coil L 1 . At this time, since the switch element SW2 is kept off, no magnetic field is generated by the coil L 2 . On the other hand, when the recording signal is set at &#34;0&#34;, the switch element SW1 is kept off, and the switch element SW2 is turned on. Therefore, a magnetic field is generated by the coil L 2 . The direction of the magnetic field generated by the coil L 1  is opposite to that of the magnetic field generated by the coil L 2 . Therefore, bias magnetic fields having different polarities corresponding to the levels of the recording signals can be generated. 
     FIG. 3 shows a magnetic head for generating a bias magnetic field by using one coil. In this arrangement, a current is switched and selectively supplied to a coil L 3  by using four switch elements SW1 to SW4. The recording signal is directly input to the control terminals of the switch elements SW2 and SW3, and to the switch elements SW1 and SW4 through an inverter 102. The coil L 3  is wound around a magnetic core 103, as shown in FIG. 4. By changing a current flow direction, the polarity of the generated magnetic field is changed. Terminals e and f of the coil shown in FIG. 4 correspond to those in FIG. 3. 
     In the above arrangement, for example, when the recording signal is set at &#34;1&#34;, the switch elements SW2 and SW3 are turned on, and a current is supplied to the coil L 3  in a direction extending from the terminal f to the terminal e. On the other hand, when the recording signal is set at &#34;0&#34;, the switch elements SW1 and SW4 are turned on, and a current is supplied to the coil L 3  in a direction from the terminal e to the terminal f. The direction of the magnetic field generated by the coil L 3  is changed, and therefore a bias magnetic field corresponding to the level of the recording signal can be generated. 
     In the magnetic field modulation scheme, the magnetic head is not used to reproduce information. It is, therefore, possible to maximize the distance between a recording medium and the magnetic head. An accident such as a head crash can be prevented. A magnetic field generated by the magnetic head must be larger than that generated by a magnetic recording apparatus such as an HDD. For this purpose, the coil must have a large inductance, and a current flowing through the coil must also be large. In order to always obtain a high-quality reproduced signal, a time (to be referred to as a switching time) required for reversing the magnetic field must be minimized. 
     In the conventional example described above, in order to satisfy this requirement, a power source voltage applied to the coil must be high. For this purpose, a new power source for the magnetic head is required in an optomagnetic recording apparatus, thus complicating the arrangement of the apparatus and increasing the size and cost of the apparatus. 
     SUMMARY OF THE INVENTION 
     The present invention has been made to eliminate the conventional problems described above, and has as its object to provide a simple magnetic head drive apparatus for driving a magnetic field generation coil at a high voltage without arranging a magnetic head high-voltage source. 
     In order to achieve the above object of the present invention, there is provided a magnetic head drive apparatus having at least one coil and operated so that a direction of a current supplied to the coil is controlled to generate a bias magnetic field corresponding to a recording signal applied to an information recording medium, comprising at least one capacitor (condenser) corresponding to each direction of a magnetic field generated upon supply of the coil current, wherein the capacitor stores a charge during a period in which a magnetic field having a direction corresponding to the capacitor is not generated, and the current is supplied from the charge stored in the capacitor when the magnetic field having the direction corresponding to the capacitor is generated. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram showing a conventional magnetic head drive apparatus; 
     FIG. 2 is a perspective view for explaining states of wound coils of a magnetic head used in the apparatus shown in FIG. 1; 
     FIG. 3 is a circuit diagram showing another conventional example; 
     FIG. 4 is a perspective view showing a state of a wound coil of a magnetic head in an apparatus shown in FIG. 3; 
     FIG. 5 is a circuit diagram of a magnetic head drive apparatus according to an embodiment of the present invention; 
     FIGS. 6A to 6L are timing charts showing an operation of the embodiment shown in FIG. 5; 
     FIG. 7 is a graph showing a discharge curve of a capacitor (condenser) used in the embodiment of FIG. 5; 
     FIG. 8 is an equivalent circuit diagram of a discharge circuit for the embodiment shown in FIG. 5; 
     FIG. 9 is a circuit diagram showing another embodiment of the present invention; 
     FIGS. 10A to 10K are timing charts showing an operation of the embodiment shown in FIG. 9; 
     FIG. 11 is a circuit diagram showing still another embodiment of the present invention; 
     FIGS. 12A to 12L are timing charts showing an operation of the embodiment shown in FIG. 11; 
     FIG. 13 is a circuit diagram showing still another embodiment of the present invention; and 
     FIGS. 14A to 14L are timing charts showing an operation of the embodiment shown in FIG. 13. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 5 is a circuit diagram showing a drive circuit apparatus for a magnetic head according to an embodiment of the present invention. This embodiment exemplifies a drive apparatus using two coils as in FIGS. 1 and 2. The same parts as in FIG. 1 denote the same parts in FIG. 5, and a detailed description thereof will be omitted. 
     Referring to FIG. 5, capacitors C 1  and C 2  are arranged in correspondence with directions of magnetic fields, respectively. A current is supplied to each coil in accordance with a charge of a corresponding capacitor, as will be described later. A switch element SW3 is connected to one terminal of the capacitor C 1 , and a switch element SW5 is connected to the other terminal of the capacitor C 1 . The switch element SW3 is driven by the recording signal. While the coil L 1  does not generate a magnetic field, the switch element SW3 is connected to the power source side. However, while the coil L 1  generates a magnetic field, the switch element SW3 is connected to a resistor R 1 . A switch element SW5 is similarly driven by the recording signal. While the coil L 1  does not generate a magnetic field, the switch element SW5 is connected to ground. However, while the coil L 1  generates the magnetic field, the switch element SW5 is connected to the power source side. 
     Switch elements SW4 and SW6 are connected to the two terminals of the capacitor C 2 , respectively. The switch elements SW4 and SW6 are driven by a recording signal inverted by the inverter 100. The switch element SW4 is connected to the power source side while the coil L 2  does not generate a magnetic field. The switch element SW4 is connected to a resistor R 2  while the coil L 2  generates a magnetic field. The switch element SW6 is connected to ground while the coil L 2  does not generate a magnetic field. However, the switch element SW6 is connected to the power source side while the coil L 2  generates a magnetic field. Note that the switch elements SW1 and SW2 are similarly driven by the recording signals. When the recording signal is set at a high level, the switch elements SW1 and SW2 are turned on. When the recording signal is set at a low level, the switch elements SW1 and SW2 are turned off. 
     An operation of this apparatus will be described with reference to the timing charts shown in FIGS. 6A to 6L. FIG. 6A shows a recording signal of level &#34;1&#34;. As shown in FIGS. 6B, 6D, and 6F, signals of high level are supplied to the switch elements SW1, SW3, and SW5, respectively. Under these conditions, the switch element SW1 is turned on, the switch element SW3 is connected to the resistor R 1 , and the switch element SW5 is connected to the power source side. That is, the respective switch elements are set in the state shown in FIG. 5. The capacitor C 1  is connected between the power source and the resistor R 1 . The capacitor C 1  is charged to a power source voltage V (to be described later). The coil L 1  receives a current from the current source including the capacitor C 1 . 
     While the recording signal is kept at &#34;1&#34;, signals of low level obtained by inverting the recording signal by the inverter 100 are supplied to the switch elements SW2, SW4, and SW6, as shown in FIGS. 6C, 6E, and 6G. In this case, the respective switch elements are set in the state shown in FIG. 5. That is, the switch element SW2 is turned off, the switch element SW4 is connected to the power source side, and the switch element SW6 is connected to ground. The capacitor C 2  is connected between the power source and ground. During this period, the capacitor C 2  is charged to the power source voltage V. The capacitor C 1  is charged to the power source voltage V in the same operation as described above, thereby driving the coil L 1 , as described above. At this time, a voltage (i.e., a voltage at the negative terminal of the resistor R 1 ) at a point g is 2V as a sum of the power source voltage V and the charge voltage V of the capacitor C 1 , as shown in FIG. 6H. A voltage twice the power source voltage V is applied to the resistor R 1  and the coil L 1 . A current from the current source including the charge of the capacitor C 1  is supplied to the coil L 1 . The current of the coil L 1  is shown in FIG. 6J. A magnetic field +H is generated by the coil L 1  by the current of FIG. 6J, as shown in FIG. 6L. The generated magnetic field is applied to an optomagnetic information recording medium such as an optomagnetic disk (not shown). The information recording medium is also irradiated with a laser beam having a predetermined intensity. By the light radiation and the application of the bias magnetic field, bit information corresponding to the recording signal of level &#34;1&#34; is recorded in the optomagnetic disk. 
     When the recording signal goes to &#34;0&#34; level, the switch element SW1 is turned off, and the switch element SW2 is turned on. In synchronism with the OFF operation of the switch element SW1, the switch element SW3 is connected to the power source side, and the switch element SW5 is connected to ground. Charging of the capacitor C 1  is started again. Similarly, in synchronism with the ON operation of the switch element SW2, the switch element SW4 is connected to the resistor R 2 , and the switch element SW6 is connected to the power source side. In this case, the voltage (i.e., the voltage at the negative terminal of the resistor R 2 ) at the point h is twice the voltage of the power source voltage, as shown in FIG. 6I, because the capacitor C 2  has already been charged to the power source voltage. The coil L 2  is driven by the voltage twice the power source voltage and receives a current shown in FIG. 6K. As shown in FIG. 6L, a magnetic field -H is generated by the coil L 1 . When this bias magnetic field is applied to the information recording medium, bit information corresponding to the recording signal of level &#34;0&#34; is recorded. In this manner, the operations of the switch elements are controlled in accordance with the levels of the recording signals. Each coil receives the current corresponding to the voltage twice the power source voltage. 
     As described above, according to this embodiment, the capacitors C 1  and C 2  are charged while the corresponding coils do not generate magnetic fields. When the corresponding coils generate the magnetic fields, the charges of the capacitors are used to supply currents to these coils. Therefore, the voltage applied to each coil is the sum of the power source voltage and the charge voltage of the capacitor. That is, the coil is driven at the voltage twice the power source voltage. For this reason, even if the coil has a large inductance, the switching time (rise time of the coil current) of the coil can be shortened. In this case, if the power source voltage is equal to that used in a conventional arrangement, the switching time can be reduced into 1/2. A new magnetic head high-voltage source need not be arranged. The power source voltage can be doubled by a simple apparatus including the capacitors and the switch elements described above. 
     In the embodiment of FIG. 5, potentials at the points g and h are lowered as a function of time. Decreases in potentials are shown in FIG. 7. An equivalent circuit during capacitor discharge is shown in FIG. 8. Referring to FIG. 8, R corresponds to R 1  and R 2 , L corresponds to L 1  and L 2 , and C corresponds to C 1  and C 2 . An initial charge stored in the capacitor is defined as Q, and an initial potential is defined as V D . 
     Referring to FIG. 7, a time T 0  required to lower the potential of the capacitor C by 10% for R=0 is given as follows: ##EQU1## That is, unless the duration of the recording signal of level &#34;0&#34; or &#34;1&#34; is longer than T 0 , an effective voltage cannot be applied to the coil. A longest duration T (to be referred to as a maximum magnetic field reversal time hereinafter) of the recording signal is given as follows: ##EQU2## The capacitor C must satisfy the following condition: 
     
         C&gt;T.sup.2 /1000×L                                    (3) 
    
     FIG. 9 shows another embodiment of the present invention, exemplifying a magnetic head apparatus for generating a bias magnetic field by using one coil as in FIG. 3. The same reference numerals as in FIGS. 3 and 5 denote the same parts in FIG. 9, and a detailed description thereof will be omitted. 
     Arrangements of capacitors C 1  and C 2  and switch elements SW3 to SW6 connected to their two terminals in FIG. 9 are the same as those in FIG. 5. The switches SW1 and SW2 are symmetrical with those in FIG. 5 about a vertical line. In this embodiment, the switch elements SW3 and SW5 are operated in synchronism with the switch element SW2, and the switch elements SW4 and SW6 are operated in synchronism with the operation of the switch element SW1 in accordance with the recording signals. The switch elements are switched to control charging and discharging of the capacitors C 1  and C 2 . The coil L 3  is driven at a voltage twice the power source voltage in the same manner as in the above embodiment. 
     FIGS. 10A to 10K are timing charts showing a detailed operation of the embodiment shown in FIG. 9. FIG. 10A shows a recording signal, and FIGS. 10B to 10G are voltage signals respectively supplied to the switch elements SW1 to SW6. When the recording signal is set at level &#34;1&#34;, the switch element SW2 is turned on, the switch element SW3 is connected to the power source side, and the switch element SW5 is connected to ground, thereby obtaining the state in FIG. 9. The capacitor C 1  is charged and is ready to discharge the charge to the coil L 3 . On the other hand, the switch element SW1 is kept off, the switch element SW4 is connected to a resistor R 2 , and the switch element SW6 is connected to the power source side, thereby obtaining a state shown in FIG. 9. A current path from the power source to ground in an order of the capacitor C 2 , the coil L 3 , and the switch element SW2 is formed. A current is supplied to the coil L 3 , as shown in FIG. 10J. In this case, the capacitor C 2  is charged to almost the power source voltage, and a voltage at a point j is twice the power source voltage, as shown in FIG. 10H. In this embodiment, therefore, as described above, the coil is driven at a voltage twice the power source voltage. As a result, a magnetic field shown in FIG. 10K is generated by the coil L 3 . When this field is applied to the information recording medium, bit information corresponding to the recording signal of level &#34;1&#34; is recorded. 
     When the recording signal goes to level &#34;0&#34;, the switch element SW2 is turned off, and the switch element SW1 is turned on. The switch element SW3 is connected to the resistor R 1 , and the switch element SW5 is connected to the power source side in synchronism with these operations of the switch elements SW1 and SW2. In addition, the switch element SW4 is connected to the resistor R 2 , and the switch element SW6 is connected to ground. The capacitor C 2  is charged again, and the capacitor C 1  is discharged. The charge of the capacitor C 1  is supplied to the coil L 3 . In this case, a potential at a point i of FIG. 9 is twice the power source voltage, as shown in FIG. 10I. A current flows through the coil L 3  in an opposite direction, as shown in FIG. 10J. The direction of the magnetic field is also opposite, as shown in FIG. 10K. The generated magnetic field is applied to the recording medium, and bit information corresponding to the recording signal of level &#34;0&#34; is recorded. As described above, according to this embodiment, the capacitor is charged, and the charge is supplied to the coil. The coil can be driven at a voltage twice the power source voltage, thereby obtaining the same effect as in the embodiment of FIG. 5. 
     FIG. 11 is a circuit diagram showing still another object of the present invention. This embodiment is a modification of the embodiment of FIG. 5. The embodiment of FIG. 11 has a characteristic feature in that currents are supplied from the capacitors to coils L 1  and L 2  only during rise times of the currents. The same reference numerals as in FIG. 5 denote the same parts in FIG. 11. 
     Referring to FIG. 11, a drive apparatus includes the coils L 1  and L 2  serving as bias magnetic field generating coils, coil drive capacitors C 1  and C 2 , and switch elements SW1 and SW2 operated by recording signals. The functions of the above components are the same as those in the embodiment of FIG. 5. Switch elements SW2 to SW6 control charging/discharging of the capacitors as in the previous embodiments. These switch elements are controlled by a timing control circuit (not shown) to supply capacitor charges to the corresponding coils only during rise times of the currents. In this embodiment, a voltage of a power source for charging the capacitors C 1  and C 2  is defined as V 1 , a power source voltage for the coils L 1  and L 2  is V 2 , and the voltages V 1  and V 2  satisfy the condition V 1  &gt;V 2 . The drive apparatus also includes reverse blocking diodes D 1  to D 4 . 
     FIGS. 12A to 12L are timing charts showing an operation of the above embodiment. FIG. 12A shows a recording signal, FIG. 12B shows a signal supplied to the switch element SW1, and FIG. 12C shows a signal supplied to the switch element SW2. When the recording signal is set at level &#34;1&#34;, the switch element SW1 is ON, and the switch element SW2 is OFF. FIGS. 12D to 12G show signals respectively supplied to the switch elements SW3 to SW6. Each of these signals has a pulse width t. This pulse width t is set almost equal to the current rise time of each of the coils L 1  and L 2 . When the recording signal is set at level &#34;1&#34;, the switch element SW1 is turned on, and the switch elements SW3 and SW4 are set in a state shown in FIG. 11. At this time, the switch element SW2 is turned off, and the switch elements SW4 and SW6 are set in a state shown in FIG. 11. The charge of the capacitor C 1  is supplied to the coil L 1 , and a current is supplied to the coil L 1 , as shown in FIG. 12J. In this case, a voltage at a point a in FIG. 11 is 2V 1 , which is twice the power source voltage V 1 , as shown in FIG. 12H. A time required to double the voltage is almost equal to the rise time of the current flowing through the coil L 1 . Therefore, a high voltage can be applied to the coil L 1  during only the rise time of the current. In addition, no resistance is present in a current path, and the current rise time for the coil L 1  can be greatly shortened. When the time t has elapsed, the power source voltage V 2  is applied to the coil L 1 . 
     During this period, the capacitor C 2  is charged to the power source voltage V 1  to prepare for the supply of the current to the coil L 2 . When the recording signal goes to level &#34;0&#34;, the switch element SW2 is turned on, the switch elements SW4 and SW6 are connected in directions opposite to those shown in FIG. 11, and a current is supplied from the capacitor C 2  to the coil L 2 . At this time, a voltage at a point c is doubled to 2V 1  during the time t, as shown in FIG. 12I. The coil L 2  is driven at the voltage twice the power source voltage during the rise time of the current, and FIG. 12K shows the current of the coil L 2  at this time. When the time t has elapsed, the power source voltage V 2  is applied to the coil L 2 . A high voltage is similarly applied to the coil L 2  during only the current rise time, thereby greatly shortening the current rise time. Meanwhile, the capacitor C 1  is charged again to prepare for the supply of the current to the coil L 1 . FIG. 12L shows the magnetic field generated by the coil L 1  or L 2 . This generated magnetic field is applied to the information recording medium, and pieces of bit information corresponding to the recording signals of levels &#34;1&#34; and &#34;0&#34; are recorded. 
     In this embodiment, a high voltage is applied to each of the coils L 1  and L 2  during only the current rise time, and no resistance is present in the current supply path. The current rise time of each coil can be greatly shortened as compared with conventional cases. When the charge of each capacitor is to be supplied to the corresponding coil, the energy stored in the capacitor can be effectively used due to the absence of the resistance in the current path, thereby reducing the total power consumption. 
     FIG. 13 shows still another embodiment of the present invention. This embodiment is a modification of FIG. 11. Only one capacitor is used for each coil in the embodiment of FIG. 11. However, in the embodiment of FIG. 13, two capacitors are used for each coil to supply a current thereto. 
     A capacitor C 3  is connected in series with a capacitor C 1 , and a capacitor C 4  is connected in series with a capacitor C 2 . During current supply to each coil, each pair of capacitors are connected in series with each other, so that a voltage three times the power source voltage is applied to each coil. The capacitors C 1  and C 3  and the capacitors C 2  and C 4  are charged parallel to each other. Charging/discharging of the capacitor C 3  is controlled by switch elements SW7 and SW9. Charging/discharging of the capacitor C 4  is controlled by switch elements SW8 and SW10. A relationship between power source voltages V 1  and V 2  satisfies the condition V 1  &gt;V 2 . Other arrangements in FIG. 13 are the same as those in FIG. 11. 
     FIGS. 14A to 14L are timing charts showing an operation of the embodiment in FIG. 13. FIG. 14A shows a recording signal, and FIGS. 14B and 14C show signals respectively supplied to the switch elements SW1 and SW2, as in the embodiment of FIG. 11. Signals shown in FIGS. 14D to 14G are supplied to switch elements SW3 to SW6 and the switch elements SW7 to SW10, all of which serve to control charging/discharging of the corresponding capacitors. In this embodiment, the switch elements SW3 and SW7 and the switch elements SW5 and SW9 are simultaneously switched. The switch elements SW4 and SW8, and the switch elements SW6 and SW10 are simultaneously switched. When the recording signal is set at level &#34;1&#34;, the switch element SW1 is ON, and the switch SW2 is OFF. In this case, the switch elements SW3 and SW5 and the switch elements SW7 and SW9 are set in a state shown in FIG. 13. In this state, the capacitors C 1  and C 3  are connected in series with each other. This connecting time is set equal to a time t as the current rise time of the coil L 1  in the same manner as in FIG. 11. 
     The capacitors C 1  and C 3  are charged to the power source voltage V 1  each. A voltage at a point a is three times the power source voltage V 1 , as shown in FIG. 14H. In this embodiment, the voltage three times the power source voltage can be applied during the current rise time of the coil L 1 . The current rise time of the coil L 1  can be further shortened. When the time t has elapsed, the power source voltage V 2  is applied to the coil L 1 . In this period, the switch elements SW4 and SW8 and the switch elements SW6 and SW10 for controlling the capacitors C 2  and C 4  are set in the state shown in FIG. 13. The capacitors C 2  and C 4  are charged with the power source voltage V 1  in a parallel manner. 
     When the recording signal is set at level &#34;0&#34;, the switch element SW1 is turned off, and the switch element SW2 is turned on. The capacitor control switches SW3 to SW10 are connected in a state opposite to that shown in FIG. 13. In this case, the capacitors C 2  and C 4  are connected in series with each other. The charges of the capacitors C 2  and C 4  cause a current to flow in the coil L 2 . FIG. 14I shows a voltage at a point c. During the time t, the voltage is three times the power source voltage. During the current rise time of the coil L 2 , the voltage three times the power source voltage is applied, so that the current rise time of the coil L 2  is shortened. Meanwhile,, the capacitors C 1  and C 3  are charged again to prepare for the next current supply cycle. FIG. 14J shows the current of the coil L 1 , FIG. 14H shows the current of the coil L 2 , and FIG. 14L shows the generated magnetic field. 
     As described above, according to this embodiment, since a current is supplied to each coil by using a pair of capacitors, a voltage three times the power source voltage can be applied to the coil during the current rise time. The current rise time of the coil can be shortened, as compared with the embodiment shown in FIG. 11. In the embodiment shown in FIG. 13, each coil is driven using a pair of capacitors. However, a coil can be driven using three or more series-connected capacitors. In the embodiments of FIGS. 5 and 9, it is possible to supply a current to a coil by using a plurality of capacitors. 
     According to the present invention, as has been described above, since the bias magnetic field generation coil is driven by utilizing charge stored in the capacitor, a voltage including the charge voltage of the capacitor and higher than the power source voltage can be applied to the coil. Therefore, a large current is supplied to the coil. Even if an inductance of a coil is large, the switching time of the coil can be shortened by an increase in voltage applied thereto. In addition, a high power source for a coil need not be arranged. The above effects can be obtained by a simple apparatus including a capacitor and a switching element.