Abstract:
A combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The present application is based upon and claims the benefit of priority to Japanese Patent Application No. 2014-044520, filed Mar. 7, 2014, the entire contents of which are incorporated herein by reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to a combined substrate in which a second substrate is superposed on and electrically connected to a first substrate. 
         [0004]    2. Description of Background Art 
         [0005]    In a combined substrate, a metal post that protrudes from a substrate may be soldered to a solder bump of another substrate (for example, see Korean Patent No. 100722634. The entire contents of this publication are incorporated herein by reference. 
       SUMMARY OF THE INVENTION 
       [0006]    According to one aspect of the present invention, a combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]    A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein: 
           [0008]      FIG. 1  illustrates a cross-sectional view of a combined substrate according to a first embodiment of the present invention; 
           [0009]      FIG. 2  illustrates a plan view of an F surface of a first substrate; 
           [0010]      FIG. 3  illustrates a plan view of a B surface of a second substrate; 
           [0011]      FIG. 4  illustrates an exploded cross-sectional view of the combined substrate; 
           [0012]      FIG. 5  illustrates a cross-sectional view of a first and a second metal post; 
           [0013]      FIG. 6  illustrates a cross-sectional view of a first and a second metal post of a second embodiment; 
           [0014]      FIG. 7  illustrates a cross-sectional view of a first and a second metal post of a third embodiment; and 
           [0015]      FIG. 8  illustrates a cross-sectional photograph of a metal post. 
       
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
       [0016]    The embodiments will now be described with reference to the accompanying drawings, wherein like reference numerals designate corresponding or identical elements throughout the various drawings. 
       First Embodiment 
       [0017]    In the following, a first embodiment of the present invention is described based on  FIG. 1-5 . A combined substrate  10  of the present embodiment is formed by superposing a second substrate  30  on a first substrate  11 . A so-called PoP structure (package-on-package structure) in which a third substrate  20  is superposed on the combined substrate  10  is illustrated in  FIG. 1 . In the PoP structure, the second substrate  30  becomes an interposer for connecting the third substrate  20  to the first substrate  11 . 
         [0018]    The first substrate  11  is, for example, a CPU substrate in which a CPU  12  is mounted on a substrate body ( 11 H). The substrate body ( 11 H) forms a multilayer structure with a built-in circuit (not illustrated in the drawings). An F surface ( 11 F), which is a mounting surface, and a B surface ( 11 B), which is a back surface of the substrate body ( 11 H), are covered by solder resist layers ( 11 S,  11 S). Further, for example, multiple circular pad openings ( 11 K) are formed in the front and back solder resist layers ( 11 S,  11 S). Multiple pads ( 13   a,    13   b,    14 ) connected to the internal circuit of the substrate body ( 11 H) are arranged on deep sides of the pad openings ( 11 K) of the solder resist layers ( 11 S,  11 S). A plan view of the F surface ( 11 F) of the first substrate  11  is illustrated in  FIG. 2 . A group of the pads ( 13   a ) for connecting to the above-described CPU  12  is arranged in a matrix shape in a central portion of the F surface ( 11 F). A group of the pads ( 32   b ), which are larger than the pads ( 13   a ), is arranged in a matrix shape in a frame-shaped region surrounding the pads ( 13   a ). The above-described CPU  12  is bump-connected (this is also referred to as a “flip-chip connection”) to the group of the pads ( 13   a ) by solder balls  15 , and first metal posts  51  (to be described in detail later) protrude from the group of the pads ( 13   b ). The substrate body ( 11 H) may be a multilayer substrate having a core substrate, for example, as described in Japanese Patent Laid-Open Publication No. 2007-227512, or may be a so-called coreless substrate that does not have a core substrate as described in Japanese Patent Laid-Open Publication No. 2005-236244. The entire contents of Japanese Patent Laid-Open Publication No. 2007-227512 are incorporated herein by reference. Further, the group of the pads  14  of the B surface ( 11 B) of the substrate body ( 11 H) is bump-connected to another substrate (not illustrated in the drawings). 
         [0019]    The third substrate  20  is, for example, a memory substrate in which a memory chip  21  is mounted on a substrate body ( 20 H). The substrate body ( 20 H), for example, has a planar shape that is substantially the same as the substrate body ( 11 H) of the first substrate  11 . Further, although not illustrated in the drawings, the substrate body ( 20 H) also forms a multilayer structure with a built-in circuit, similar to the substrate body ( 11 H) of the first substrate  11 . Multiple pads that are connected to the internal circuit are provided on an F surface ( 20 F) and a B surface ( 20 B). The above-described memory chip  21  is fixed at a center of the F surface ( 20 F) and is wire-bonded to a group of pads  23  surrounding the memory chip  21 . Further, solder bumps  25  connected to a group of pads (not illustrated in the drawings) are provided on substantially the entire B surface ( 20 B) of the substrate body ( 20 H). 
         [0020]    The second substrate  30 , for example, has a planar shape that is substantially the same as the substrate bodies ( 11 H,  20 H) of the first substrate  11  and the third substrate  20 . 
         [0021]    Similar to the above-described substrate bodies ( 11 H,  20 H), the second substrate  30  also forms a multilayer structure with a built-in circuit (not illustrated in the drawings). An F surface ( 30 F) and a B surface ( 30 B) are covered by solder resist layers ( 30 S,  30 S). Pads  33 ,  34  are provided on deep sides of pad openings ( 30 K) of the solder resist layers ( 30 S,  30 S). A plan view of the B surface ( 30 B) of the second substrate  30  is illustrated in  FIG. 3 . The group of the pads  34  is arranged opposing the group of the pads ( 13   b ) arranged on the F surface ( 11 F) of the first substrate  11  illustrated in  FIG. 2 . Further, as compared to the substrate bodies ( 11 H,  20 H) in which the CPU  12  or the memory chip  21  is mounted, in the second substrate  30 , strength required is low and a circuit structure is also simple. Therefore, the second substrate  30  is thinner than the first substrate  11  and the third substrate  20 . 
         [0022]    The solder bumps  25  of the third substrate  20  are soldered to the group of the pads  33  of the F surface ( 30 F) of the second substrate  30 . On the other hand, multiple second metal posts  52  corresponding to the first metal posts  51  of the first substrate  11  protrude from the group of the pads  34  of the B surface ( 30 B) of the second substrate  30 . The group of the second metal posts  52  and the group of the first metal posts  51  are fixed by solders  53  in a state in which the second metal posts  52  and the first metal posts  51  respectively butt against each other. 
         [0023]    The first and second metal posts ( 51 ,  52 ) are formed, for example, by subjecting the substrate body ( 11 H) of the first substrate  11  and the second substrate  30  to copper plating processing. Specifically, the substrate body ( 11 H) is covered by an insulating film (not illustrated in the drawings). A circular hole is formed in a part of the insulating film to expose the pad ( 13   b ) of the substrate body ( 11 H). In this state, the substrate body ( 11 H) is subjected to copper plating processing and thereby the first metal post  51  is formed. As illustrated in  FIG. 5 , for example, the first metal post  51  forms a columnar shape having an outer diameter larger than that of the circular opening ( 11 K) for the pad ( 13   b ) in the solder resist layer ( 11 S), and is in close contact with an opening edge and an inner surface of the pad opening ( 11 K) and the pad ( 13   b ) in the pad opening ( 11 K). The second metal post  52  is also similarly formed by plating processing, forms a columnar shape having an outer diameter larger than that of the pad opening ( 30 K) of the solder resist layer ( 30 S), and is in close contact with an opening edge and an inner surface of the pad opening ( 30 K) and the pad  34 . 
         [0024]    The first metal post  51  is thinner and longer than the second metal post  52 . Specifically, the first metal post  51  has an outer diameter of 70-170 μm and a total length of 30-160 μm, and the second metal post  52  has an outer diameter of 70-140 μm and a total length of 15-90 μm. Here, when a pitch (distance between centers) of the pads on which the metal posts are formed is less than 100 μm, the metal posts that can be formed become thin and connection reliability is likely to decrease. When the pitch is larger than 300 μm, a size of the substrate increases, a stress acting on the metal posts increases, and the connection reliability is likely to decrease. Therefore, it is preferable that the pitches between the pads ( 13   b ) and between the pads  34  be 100-300 μm. The total length of a metal post means a height from a surface of an uppermost layer (the solder resist layers ( 11 S,  30 S)) of the substrate to a highest part of the metal post. Specifically, as in the case of the second metal post  52  illustrated in  FIG. 5 , where a front-end surface ( 52 B) is a concave surface having a recess ( 52 A), the total length means a height from the surface of the solder resist layer ( 30 S) to an outer edge of the front-end surface ( 52 B). As in the case of the first metal post  51  illustrated in  FIG. 5  where a front-end surface ( 51 B) is a flat surface that does not have a recess, the total length means a height from the surface of the solder resist layer ( 11 S) to the front-end surface ( 51 B), which is a flat surface. 
         [0025]    The entire front-end surface ( 51 B) of the first metal post  51  is flat, whereas the front-end surface ( 52 B) of the second metal post  52  is in a shape of a concave surface in which the recess ( 52 A) is formed in a part of a flat surface. The recess ( 52 A) is recessed so as to gradually become deeper from the outer edge toward a center part of the front-end surface ( 52 B) of the second metal post  52 . More specifically, a maximum depth of the recess ( 52 A) is 5-40 μm. 
         [0026]    As illustrated in  FIG. 4 , for example, the solder  53  that connects the first and second metal posts ( 51 ,  52 ) is initially fixed to the second metal post  52  side in a spherical or ellipsoidal shape. A portion of the solder  53  covers a part of or the entire side surface of the second metal post  52 . Further, the solder  53  has a melting point lower than that of the solder ball  15  of the CPU  12  and higher than that of the solder bump  25  of the third substrate  20 . 
         [0027]    The description about the structure of the combined substrate  10  of the present embodiment is as given above. Next, a method for manufacturing the combined substrate  10  is described. In order to manufacture the combined substrate  10 , the third substrate  20  is prepared in advance in which the memory chip  21  is mounted on the F surface ( 20 F) of the substrate body ( 20 H) that is provided with the solder bumps  25 . Further, the first substrate  11  is manufactured in which the CPU  12  is mounted on the F surface ( 11 F) of the substrate body ( 11 H). Then, the second substrate  30  is mounted on the first substrate  11 . 
         [0028]    Specifically, the second substrate  30  is superposed on the F surface ( 11 F) of the first substrate  11 , and the solders  53  of the group of the second metal posts  52  and the front-end surfaces ( 51 B) of the group of the first metal posts  51  are put in a state of being in contact with each other. Next, the first substrate  11  and the second substrate  30  are heated at a temperature lower than the melting point of the solder balls  15  of the CPU  12  to reflow the solders  53  and to crush the solders  53  between the front-end surfaces ( 51 B,  52 B) of the first and second metal posts ( 51 ,  52 ). Then, the solders  53  are solidified to formed a combined body in which the second substrate  30  is fixed on the first substrate  11 . Thereafter, the third substrate  20  is superposed on the second substrate  30  of the combined body and is heated at a temperature lower than the melting point of the solders  53  to reflow the solder bumps  25  of the third substrate  20  and thereby solder the third substrate  20  to the second substrate  30 . Thus, the combined substrate  10  is manufactured. It is also possible that, after the first substrate  11  and the second substrate  30  are connected, the third substrate  20  is mounted after mold resin is poured in to fix the CPU  12  and the substrate. 
         [0029]    As described above, according to the combined substrate  10  of the present embodiment, the recess ( 52 A) is formed on the front-end surface ( 52 B) of the second metal post  52 . Therefore, a contact area between the solder and the metal post is widened and bonding strength of the solder is increased. As a result, reliability of electrical connection between the first substrate  11  and the second substrate  20  is improved. Further, the first and second metal posts ( 51 ,  52 ) are formed by copper plating. Therefore, each of the groups of the metal posts can be easily formed to have a uniform height. In addition, as in the present embodiment, the first and second metal posts ( 51 ,  52 ) are formed by copper plating to have the outer diameters that are respectively larger than the outer diameters of the pad openings ( 11 K,  30 K). Therefore, central portions of the front-end surfaces ( 51 B,  52 B) of the first and second metal posts ( 51 ,  52 ) can be recessed to form the recesses, sizes of the recesses respectively corresponding to sizes of the pad openings ( 11 K,  30 K). 
         [0030]    Further, the outer diameter of the first metal post  51  is larger than the outer diameter of the second metal post  52 . Therefore, positional displacement of the front-end surface ( 52 B) of the second metal post  52  can be allowed within the front-end surface ( 51 B) of the first metal post  51 . This facilitates the operation to make the first and second metal posts ( 51 ,  52 ) to butt against each other. In addition, as described above, the first substrate  11  is thicker than the second substrate  30  and thus is unlikely to thermally deform. In the present embodiment, as described above, the first metal post  51  of the first substrate  11  that is unlikely to thermally deform is formed longer. Therefore, when the first substrate  11  and the second substrate  30  are heated to be soldered, relative positional displacement between the front-end surfaces ( 51 B,  52 B) of the first and second metal posts ( 51 ,  52 ) can be suppressed. 
       Second Embodiment 
       [0031]      FIG. 6  illustrates first and second metal posts ( 51 ,  52 ) provided in a combined substrate of a second embodiment. In the present embodiment, the second metal post  52  of the second substrate  30  is longer than the first metal post  51  of the first substrate  11 . By making the second metal post  52  longer, which is the thinner one of the first and second metal posts ( 51 ,  52 ), the second metal post  52  can be easily bent and thus an internal stress due to thermal deformation of the first substrate  11  and the second substrate  30  can be relaxed. 
       Third Embodiment 
       [0032]      FIG. 7  illustrates first and second metal posts ( 51 ,  52 ) provided in a combined substrate of a third embodiment. The first and second metal posts ( 51 ,  52 ) are formed to have the same diameter and length, and recesses ( 51 A,  52 A) are respectively formed on front-end surfaces ( 51 B,  52 B) of the first and second metal posts ( 51 ,  52 ). As a result, bonding strength between solder and the surfaces of the first and second metal posts on which the recesses are formed is increased and reliability of electrical connection between the first substrate  11  and the second substrate  30  is improved. 
       Example 
       [0033]      FIG. 8  illustrates a photograph of an actual second metal post  52  that was formed by subjecting the second substrate  30  to copper plating processing as described above in the first embodiment. As illustrated in  FIG. 8 , the recess ( 52 A) is formed in the front-end surface ( 52 B) of the second metal post  52 . 
       Other Embodiments 
       [0034]    The present invention is not limited to the above-described embodiments. For example, the embodiments described below are also included in the technical scope of the present invention. Further, in addition to the embodiments described below, the present invention can also be embodied in various modified forms within the scope without departing from the spirit of the present invention. 
         [0035]    (1) In the first embodiment, after the second substrate  30  is mounted on the first substrate  11 , the third substrate  20  is mounted on the second substrate  30 . However, it is also possible that, after the third substrate  20  is mounted on the second substrate  30 , the second substrate  30  is mounted on first substrate  11 . 
         [0036]    (2) In the first and second embodiments, an example is described in which the recess ( 52 A) is formed only on the second metal post  52 , which is the thinner one of the first and second metal posts ( 51 ,  52 ) that have different lengths and diameters. However, it is also possible that a recess is provided on the first metal post  51 , which is the thicker one of the first and second metal posts ( 51 ,  52 ), or a recess is provided on each of both the first and second metal posts ( 51 ,  52 ) that have different diameters. 
         [0037]    In a combined substrate which has metal posts protruding from one substrate and soldered to solder bumps of another substrate, there is a conceivable problem that an internal stress occurs between the metal posts and the solder bumps due to thermal deformation of the substrates and thus reliability of electrical connection between the substrates decreases. 
         [0038]    A combined substrate according to an embodiment of present invention has high reliability of electrical connection between substrates. 
         [0039]    A combined substrate according to an embodiment of the present invention includes a first substrate that has a first metal post; a second substrate that has a second metal post that is formed at a position opposing the first metal post; and a solder that is sandwiched between the first metal post and the second metal post. A recess is formed on one of or each of surfaces of the first metal post and the second metal post, the solder being placed on the surfaces. 
         [0040]    Obviously, numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.