Abstract:
A conductive polymer shielding layer covering insulating layer formed on an integrated-circuit die is provided and a method thereof. The method comprises die attaching, wire bonding, back etching, insulation molding, partial cutting, conductive material/polymer coating, and singulation.

Description:
[0001]    CROSS-REFERENCE TO RELATED APPLICATION(S) 
         [0002]    This application claims priority under 35 U.S.C. §119(e) of the U.S. Provisional Patent Application Ser. No. 61/916,712, filed Dec. 16, 2013 and titled, “CONDUCTIVE SHIELD FOR SEMICONDUCTOR PACKAGE,” which is hereby incorporated by reference in its entirety for all purposes. 
     
    
     FIELD OF THE INVENTION 
       [0003]    The present invention relates to semiconductor packaging. More specifically, the present invention relates to protective elements for the semiconductor packaging. 
       BACKGROUND OF THE INVENTION 
       [0004]    Most of radio frequency (RF) electronics components require electromagnetic interference (EMI) shielding. Conventional packages use metal lids or cans for the shielding. However, the metal lid has disadvantages in terms of the size density and costs.  FIG. 1  illustrates a conventional package with a metal lid  102  coupling with an electronic component  104 . 
       SUMMARY OF THE INVENTION 
       [0005]    In some embodiments, a semiconductor package with a conductive polymer shielding on the molding compound is provided. The conductive polymer can be a layer of coating material formed as the EMI shield. 
         [0006]    In an aspect, a method of forming a conductive shield comprises forming a conductive layer covering an integrated circuit die (hereinafter “die”). In some embodiments, the method further comprises screen-printing to form the conductive layer. In other embodiments, the method further comprises coating to form the conductive layer. In some other embodiments, the method comprises dipping or spraying coating. In some embodiments, the method further comprises molding a molding material over the integrated circuit die. In some other embodiments, the method further comprises back etching. In some embodiments, the method further comprises molding an insulation layer. In other embodiments, the method further comprises partial cutting before forming the conductive layer. In some other embodiments, the method further comprises fully singulation after forming the conductive layer. In some other embodiments, the conductive layer comprises a polymer. In some embodiments, the polymer comprises a conductive polymer. In some embodiments, the method further comprises attaching an integrated circuit die. In other embodiments, the method further comprises performing wire bonding. 
         [0007]    In another aspect, a die protective device comprising a conductive polymer enclosing an insulating layer formed over a die. In some embodiments, the device further comprises a molding material between the conductive polymer and the die (an integrated circuit die). In other embodiments, the conductive polymer forms a Farady cage. In some other embodiments, the conductive polymer comprises a cuboid body. In some embodiments, the conductive polymer comprises conductive polyurethane. In other embodiments, the conductive polymer comprises conductive polyimide. 
         [0008]    In another aspect, a method of forming a semiconductor package comprises attaching one or more dies, wire bonding, encapsulating the dies and wires by molding with an electrically insulating molding material, forming a partially cut unit, forming a conductive layer over the partially cut unit, and fully singulating. 
         [0009]    Other features and advantages of the present invention will become apparent after reviewing the detailed description of the embodiments set forth below. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]    Embodiments will now be described by way of examples, with reference to the accompanying drawings which are meant to be exemplary and not limiting. For all figures mentioned herein, like numbered elements refer to like elements throughout. 
           [0011]      FIG. 1  illustrates a conventional package with a metal lid coupling with an electronic component. 
           [0012]      FIG. 2  illustrates a semiconductor package in accordance with some embodiments of the present invention. 
           [0013]      FIG. 3A  illustrates semiconductor packages in accordance with some embodiments of the present invention. 
           [0014]      FIG. 3B  illustrates exemplary ground ring structures in accordance with some embodiments of the present invention. 
           [0015]      FIG. 4  illustrates a packing forming process in accordance with some embodiments of the present invention. 
           [0016]      FIG. 5  is a flow chart illustrating a conductive shield forming process in accordance with some embodiments of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0017]    Reference is made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings. While the invention is described in conjunction with the embodiments below, it is understood that they are not intended to limit the invention to these embodiments and examples. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which can be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to more fully illustrate the present invention. However, it is apparent to one of ordinary skill in the prior art having the benefit of this disclosure that the present invention can be practiced without these specific details. In other instances, well-known methods and procedures, components and processes have not been described in detail so as not to unnecessarily obscure aspects of the present invention. It is, of course, appreciated that in the development of any such actual implementation, numerous implementation-specific decisions must be made in order to achieve the developer&#39;s specific goals, such as compliance with application and business related constraints, and that these specific goals vary from one implementation to another and from one developer to another. Moreover, it is appreciated that such a development effort can be complex and time-consuming, but is nevertheless a routine undertaking of engineering for those of ordinary skill in the art having the benefit of this disclosure. 
         [0018]      FIG. 2  illustrates a semiconductor package  200  in accordance with some embodiments of the present invention. In some embodiments, the package  200  has electronic components  204  coupled with a molding material  206  and a ground ring  208  couples with the ground  210 . A protective layer  202  can be formed over the molding material  206 . The electronic components  204  can be coupled with a PCB ground  210 . In some embodiments, insulating materials  212  encloses the package  200 . 
         [0019]    In some embodiments, the protective layer  202  comprises a conductive polymer. A person of ordinary skill in the art appreciates that any other conductive materials are able to be used to form the protective layer  202 . In some embodiments, the protective layer  202  provides a 
         [0020]    Faraday cage effect, which forms an enclosure blocking a transmission or reception of radio frequency waves and any other types of electromagnetic radiation, such as a radio frequency interference (RFI). 
         [0021]      FIG. 3A  illustrates semiconductor packages  300  in accordance with some embodiments of the present invention. In some embodiments, the semiconductor packages  300  comprises package  302 ,  304 , and  306 , which have conductive shields  301 ,  303 , and  305  respectively. The conductive shields  301 ,  303 , and  305  can be coated on the packages  302 ,  304 , and  306 . The conductive shields  301 ,  303 , and  305  can encapsulate the molding compounds  308 ,  310 , and  312 , such as formed on a Land Grid Array (LGA) package. In some embodiments, the semiconductor packages  300  comprises series feature ground ring structures  314 ,  316 , and  318 . 
         [0022]      FIG. 3B  illustrates exemplary ground ring structures in accordance with some embodiments of the present invention. In some embodiments, the ground ring can be grounded by PCB circuit and/or wire bond in the semiconductor package. A first exemplary ground ring structure  320  comprises a ground ring  328  having no connection with a ground paddle  332  and no connection with the device pin  330 . A second exemplary ground ring structure  322  comprises a ground ring  322  coupled with a ground paddle  338 . The coupling between the ground ring  322  coupled and the ground paddle  338  can be through the connections  340 , which form conductive channels to the two sides of the ground ring  322 . A third exemplary ground ring structure  324  comprises a ground ring  344  coupling with a ground paddle  342  via a top connecting channel  346  and a bottom connecting channel  348 . A fourth exemplary ground ring structure  326  comprises a ground ring  350  coupling with a ground paddle  352  and device pin  354  via one or more connecting channels  356 . The exemplary ground ring structures  320 ,  322 ,  324 , and  326  are bottom view/terminal views of the semiconductor packages. A person of ordinary skill in the art appreciates that various ground ring structures are within the scope of the present invention. Different connecting patterns can be formed based on specific functions as needed, such as the thickness and the shape of the shield. 
         [0023]      FIG. 4  illustrates a package forming process  400  in accordance with some embodiments of the present invention. At Step  401 , one or more dies  402  are attached to the PCB  404 . Wire bonding is performed to form the wires  406 . At Step  403 , molding is performed to encapsulate the dies and wires inside a molding material  408 . At Step  405 , back etching is performed on the surface of the molding material  408  forming a back etched surface  410 . At Step  407 , insulation molding is performed to form an insulation layer  412  on the back etched surface  410 . At Step  409 , a cutting tool  414 , such as saw or laser, is used to partially cut the package. At Step  411 , individual and partially cut molded array  416  are formed. At Step  413 , screen-printing or dipping/spraying coating are used to form a layer of conductive coating  418  on the molded array  416 . The conductive coating  418  can be formed of conductive polymers (such as conductive polyurethane and polyimide) or metallic materials. At Step  415 , a 2 nd  singulation procedure is performed. The molded array with a layer of conductive coating is flipped to be attached with a singulation dicing tape  422 . A tool  420  is used to fully cut the molded array forming individual unit  428 . At Step  417 , the removal of the tool  420  forms finished units  424 . 
         [0024]      FIG. 5  is a flow chart illustrating a conductive shield forming process  500  in accordance with some embodiments of the present invention. The method  500  can start at Step  502 . At Step  504 , dies are attached and wires are bonded to a PCB. At Step  506 , molding is performed. At Step  508 , back etching is performed. At Step  510 , insulation molding is performed. At Step  512 , partial cutting is performed. At Step  514 , a conductive coating is formed. At Step  516 , fully singulation is performed. The method can stop at Step  518 . 
         [0025]    The conductive polymer shield can be utilized to shield and prevent electromagnetic interference. 
         [0026]    In operation, the conductive polymer shield provide a function as a Farady cage, which results from an external static electric field causing the electric charges within the cage&#39;s conducting material to be distributed such that the field&#39;s effect in the cage interior is cancelled. 
         [0027]    The present invention has been described in terms of specific embodiments incorporating details to facilitate the understanding of principles of construction and operation of the invention. Such reference herein to specific embodiments and details thereof is not intended to limit the scope of the claims appended hereto. It is readily apparent to one skilled in the art that other various modifications can be made in the embodiment chosen for illustration without departing from the spirit and scope of the invention as defined by the claims.