Abstract:
A driving circuit of an organic light emitting display includes: a first PMOS transistor turned on in response to a driving signal to transfer a data signal; an OLED (organic light emitting diode) where an amount of light emitted is controlled by a control current; a second PMOS transistor for supplying the control current to the OLED; a third PMOS transistor connected to a node to which the first and second PMOS transistors are connected; a first capacitor connected between the first PMOS transistor and the third PMOS transistor; and a second capacitor connected between the second PMOS transistor and the first PMOS transistor.

Description:
[0001]     This application claims the benefit of priority to Korean patent application No.: 2004-59608 which was filed on Jul. 29, 2004 and which is incorporated herein by reference.  
       TECHNICAL FIELD  
       [0002]     The present application relates to an organic light emitting display, and more particularly, to a driving circuit of an organic light emitting display and a method of driving the same.  
       BACKGROUND  
       [0003]     An organic electro-luminescence display or an organic light emitting display (OELD) generally refers to a flow of electricity in organic material and a light emitting process. The flow of electricity in organic material can be divided into a flow of electrons and a flow of holes. A semiconductor analysis method is generally used because a dominant flow is determined by molecular structures of organic materials.  
         [0004]     That is, the flow of electrons or the flow of holes can be dominant according to the molecular structures. The light emitting process is associated with the motion of electrons within molecule. Electrons in the molecule can exhibit a specific energy state such as an excited state, so that electrons hold energy that can be emitted. One aspect of the emission of energy is the observation of light.  
         [0005]     In development and application of the organic light emitting display, efficiency is important. Even though a high-brightness device can be fabricated, if the efficiency of the electric energy to optical energy conversion in the device is degraded, an actual application is difficult. Since the organic light emitting display has low power consumption, it is competitive in the markets. Thus, many developments of the organic light emitting display are in progress.  
         [0006]     In the organic light emitting device, devices for representing red (R), green (G) and blue (B) colors are separately manufactured. Unlike a TFT-LCD, an organic light emitting device does not use a color filter. That is, RGB colors are reproduced using organic materials that exhibit colors with different brightness according to the applied voltages. Therefore, the organic light emitting device can display images on a screen without using a backlight and a color filter.  
         [0007]     The organic materials exhibiting RGB colors have different characteristics according to the applied voltages. That is, brightness characteristics are different according to the applied voltages and efficiency is also different. A driving circuit of a related art organic light emitting display will be described below with reference to the accompanying drawings.  
         [0008]      FIG. 1  is a circuit diagram of a driving circuit of a related art organic light emitting display.  
         [0009]     Referring to  FIG. 1 , a PMOS transistor T 1  serving as a switching element is arranged in a position where a gate line (GL) and a data line (DL)) are vertically intersected. A gate of the PMOS transistor T 1  is electrically connected to the gate line, and a source of the PMOS transistor T 1  is electrically connected to the data line.  
         [0010]     A drain of the PMOS transistor T 1  is electrically connected to a gate of the PMOS transistor T 2  that controls a current flowing through an organic light emitting diode (OLED).  
         [0011]     A power line arranged parallel to the data line is electrically connected to a source of the PMOS transistor T 2 . A capacitor Cst is connected between the source and the gate of the PMOS transistor T 2  to store a data signal for 1 frame.  
         [0012]     A drain of the PMOS transistor T 2  is serially connected to one terminal the OLED and another terminal of the OLED is connected to ground.  
         [0013]     When a driving signal is applied through the gate line GL, the PMOS transistor T 1  connected to the gate line GL is turned on, and data signal is transferred from the source to the drain of the PMOS transistor T 1 .  
         [0014]     Therefore, the data voltage is applied on a node X. Due to the data voltage, a gate-source voltage Vgs is generated in combination with a power supply voltage VDD connected to the source of the PMOS transistor T 2  that controls the OLED. The PMOS transistor T 2  is controlled by the gate-source voltage Vgs.  
         [0015]     That is, while the data voltage Vdata applied to the gate of the PMOS transistor T 2  and the power supply voltage VDD are charged in the capacitor Cst for 1 frame, the current flowing through the drain of the PMOS transistor T 2  is controlled.  
         [0016]     The driving current (I) flowing through the drain of the PMOS transistor T 2  is given by a following Equation 1, which is the same equation as for a general field effect transistor (FET). 
 
 I=K ( V   gs   −V   th ) 2   (Equation 1) 
 
 where  
       K   =       1   2     ⁢   μ   ⁢           ⁢     Cox   ⁡     (     W   L     )             
 
 where μ is a mobility, Vth is a threshold voltage of the transistor T 2 , and Cox is an oxide capacitance, that is, a capacitance for unit area of the gate of the second transistor T 2 . 
 
         [0017]     Accordingly, the driving current I flowing through the PMOS transistor T 2  is controlled by the voltage gate-source voltage V gs  and the power supply voltage VDD. The OLED is controlled by the driving current I.  
         [0018]     The driving current of the OLED is derived from the power supply voltage VDD. Therefore, the number of pixels increases, a larger amount of current must be supplied.  
         [0019]     For example, when a number of pixels N are provided in a row direction and a full white is driven, the power supply voltage VDD must supply a current (NI pixel ). A voltage drop occurs due to line resistance in the VDD supply line (V=IR). That is, the voltage drop in an n-th row is given by 
 
[N(N+1)/2] pixel *I pixel  
 
 where R pixel  is a line resistance in each pixel and I pixel  is a driving current. 
 
         [0020]     Since the voltage Vgs of the thin film transistor disposed at each pixel is changed due to the voltage drop, a difference of the current in the OLED is caused, depending on the OLED location  
         [0021]     The difference of the current applied to the OLED is serious in the large-sized display, causing a non-uniformity of picture quality.  
       SUMMARY  
       [0022]     An organic light emitting diode (OLED) is described in which when a power supply voltage (VDD) is supplied to each pixel through a power line, a gate-source voltage (Vgs) of a driving transistor is not associated with the power supply voltage (VDD) applied thereto, such that a current applied to an OLED is not changed due to voltage drop in the power supply line.  
         [0023]     A driving circuit of an organic light emitting display includes: a first PMOS transistor turned on in response to a driving signal to transfer a data signal; an OLED (organic light emitting diode) of where an amount of light emitted therefrom is controlled by a control current; a second PMOS transistor for supplying a control current to the OLED; a first capacitor connected between the second PMOS transistor and the first PMOS transistor; a third PMOS transistor connected to a node to which the first PMOS transistor and first capacitor are connected; and a second capacitor connected between the first PMOS transistor and the third PMOS transistor.  
         [0024]     In another aspect, there is provided an organic light emitting display, including: a first NMOS transistor turned on in response to a driving signal to transfer a data signal; an OLED (organic light emitting diode) of where an amount of light emitted therefrom is controlled by a control current; a second NMOS transistor for supplying the control current to the OLED; a third NMOS transistor connected to the second NMOS transistor; a first capacitor connected between the first NMOS transistor and the third NMOS transistor; and a second capacitor connected between the second NMOS transistor and the first NMOS transistor.  
         [0025]     In a further aspect, there is provided a method of driving a driving circuit of an organic light emitting display, the driving circuit including: a first PMOS transistor turned on in response to a driving signal to transfer a data signal; an OLED (organic light emitting diode) where an amount of light emitted therefrom is controlled by a control current; a second PMOS transistor for supplying a control current to the OLED; a second capacitor connected between the second PMOS transistor and the first PMOS transistor; a third PMOS transistor connected to a node to which the first PMOS transistor and first capacitor are connected; a second capacitor connected between the first PMOS transistor and the third PMOS transistor, wherein a gate-source voltage of the second PMOS transistor is comprised of a value of a data voltage function and the OLED is controlled using the gate-source voltage of the second PMOS transistor.  
         [0026]     In yet another aspect, there is provided a method of driving a driving circuit of an organic light emitting display, the driving circuit including: a first NMOS transistor turned on in response to a driving signal to transfer a data signal; an OLED (organic light emitting diode) where an amount of light emitted therefrom is controlled by a control current; a second NMOS transistor for supplying the control current to the OLED; a third NMOS transistor connected to the second NMOS transistor; a first capacitor connected between the first NMOS transistor and the third NMOS transistor; and a second capacitor connected between the second NMOS transistor and the first NMOS transistor, wherein a gate-source voltage of the second NMOS transistor is comprised of a value of a data voltage function and the OLED is controlled using the gate-source voltage of the second NMOS transistor. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0027]      FIG. 1  is a circuit diagram of a driving circuit for a related art organic light emitting display;  
         [0028]      FIG. 2  is a view illustrating a driving circuit and a driving waveform of an organic light emitting display according to a first embodiment;  
         [0029]      FIG. 3  is a view illustrating a driving circuit and a driving waveform of an organic light emitting display according to a second embodiment.  
         [0030]      FIG. 4  is a view illustrating a driving circuit and a driving waveform of an organic light emitting display according to a third embodiment; and  
         [0031]      FIG. 5  is a view illustrating a driving circuit and a driving waveform of an organic light emitting display according to a fourth embodiment. 
     
    
     DETAILED DESCRIPTION  
       [0032]     Exemplary embodiments may be better understood with reference to the drawings, but these embodiments are not intended to be of a limiting nature. Like numbered elements in the same or different drawings perform equivalent functions.  
         [0033]     Referring to  FIG. 2 , a PMOS transistor T 3  performs a switching operation to supply a data signal to a driving circuit of an organic light emitting display, and a PMOS transistor T 1  serves as a driving element for controlling a current. An organic light emitting diode (OLED) generates light in accordance with a current controlled by the PMOS transistor T 1 . A capacitor C 2  is connected between a gate of the PMOS transistor T 1  and a drain of the PMOS transistor T 3 . A capacitor C 1  is connected between the capacitor C 2  and the PMOS transistor T 3 . A PMOS transistor T 2  is connected to the gate of the PMOS transistor T 1  and applies a power supply voltage VDD.  
         [0034]     When a select driving signal Select  2  is applied to the gate of the PMOS transistor T 2 , the PMOS transistor T 2  is turned on, and the power supply voltage VDD is applied through a source of the PMOS transistor T 2  to a node A 1 , which is connected to the gate of the PMOS transistor T 1 , thereby initializing the node A 1 .  
         [0035]     Then, a select driving signal Select  1  is applied to the gate of the PMOS transistor T 3 , and the PMOS transistor T 3  is turned on. Accordingly, a node B 1  is initialized to an initial data voltage Vdata_int.  
         [0036]     That is, when both the PMOS transistors T 2  and T 3  are turned on in response to the select driving signals Select  2  and Select  1 , the initial data voltage Vdata_int is applied to the node B 1 .  
         [0037]     A voltage of the node A 1  becomes VDD and a voltage of the node B 1  becomes Vdata_int. Therefore, a voltage across the capacitor C 2  becomes VDD-Vdata_int.  
         [0038]     When the PMOS transistor T 3  is in a turned-on state, if the PMOS transistor T 2  is turned off in response to the select driving signal Select  2 , an effective data voltage Vdata_eff is applied to the node B 1  through the PMOS transistor T 3 .  
         [0039]     The effective data voltage Vdata_eff applied to the node B 1  is charged in the capacitor, so that the voltage of the node B 1  is maintained at Vdata_eff.  
         [0040]     Similarly, if the effective data voltage Vdata_eff is applied to the node B 1 , the voltage of the node A 1  becomes Vdata_eff+VDD-Vdata_int (Vc 2 ).  
         [0041]     Then, if the PMOS transistor T 3  is turned off, the voltage of the node B 1  is maintained at Vdata_eff by the capacitor C 1  and the voltage of the node A 1  becomes Vdata_eff+VDD-Vdata_int.  
         [0042]     Accordingly, a gate-source voltage Vgs of the PMOS transistor T 1  for supplying a current to the OLED becomes Vdata_eff+VDD-Vdata_int−VDD.  
         [0043]     Since a current I flowing through the drain of the PMOS transistor T 1  is controlled by I=K(V gs −V th ) 2   
               (       where   ⁢           ⁢   K     =       1   2     ⁢   μ   ⁢           ⁢     Cox   ⁡     (     W   L     )           )     ,           (     Equation   ⁢           ⁢   1     )             
 
 a result can be expressed as  
             I   =       ⁢       1   2     ⁢       K   ⁡     (            V   gs          -          V   th            )       2                   =       ⁢       1   2     ⁢       K   ⁡     (              Vdata   eff     +   VDD   -     Vdata   initial     -   VDD          -          V   th            )       2                   =       ⁢       1   2     ⁢       K   ⁡     (            Δ   ⁢           ⁢   Vdata          -          V   th            )       2                 
 
         [0044]     That is, the current flowing through the OLED can be controlled regardless of VDD. Even though a voltage drop occurs when the power supply voltage is applied along a power line, a constant current can be supplied.  
         [0045]     Accordingly, when the power supply voltage is supplied along a row line, the gate-source voltage of the PMOS transistor T 1  can be controlled regardless of VDD, even when different voltages are applied to each pixel due to the voltage drop. Thus, a constant current can be applied to the OLED.  
         [0046]     In another aspect, shown in  FIG. 3 , the voltage applied to the node B 2  is supplied not from the data voltage but from an external power source.  
         [0047]     A PMOS transistor T 3  performs a switching operation to supply a data signal, and a PMOS transistor T 1  serves as a driving element for controlling a current. An OLED generates light in accordance with a current controlled by the PMOS transistor T 1 . A capacitor C 2  is connected between a gate of the PMOS transistor T 1  and a drain of the PMOS transistor T 3 . A capacitor C 1  is connected between the capacitor C 2  and the PMOS transistor T 3 . A PMOS transistor T 2  is connected to the gate of the PMOS transistor T 1  and applies a power supply voltage VDD. Also, a PMOS transistor T 4  is connected to the drain of the PMOS transistor T 3  and applies an initialization voltage.  
         [0048]     When a select driving signal Select n- 1  is applied to the gate of the PMOS transistor T 2 , the PMOS transistors T 2  and T 4  are simultaneously turned on.  
         [0049]     At this time, the power supply voltage VDD is applied through a source of the PMOS transistor T 2  to a node A 2 , which is connected to the gate of the PMOS transistor T 1 , thereby initializing the node A 2 . The initialization voltage is applied to the node B 2  through a source of the PMOS transistor T 4  by the select driving signal Select n- 1 .  
         [0050]     Accordingly, the initialization voltage of the node B 2  is a turn-on voltage V_initial of the select driving voltage Select n- 1 , not the initial value Vdata_int of the data voltage as in  FIG. 2 .  
         [0051]     At this time, a voltage of the node A 2  becomes VDD and a voltage of the node B 2  becomes V_int. Therefore, a voltage across the capacitor C 2  becomes VDD-V_int.  
         [0052]     When the PMOS transistor T 3  is turned on in response to the select driving signal Select n, the select driving signal Select n- 1  changes from a low level to a high level, so that the PMOS transistors T 2  and T 4  are turned-off.  
         [0053]     An effective data voltage Vdata_eff is supplied to the node B 2  by the turned-on PMOS transistor T 3 .  
         [0054]     Accordingly, the effective data voltage Vdata_eff is applied through the PMOS transistor T 3  to the node B 2 , so that the voltage of the node B 2  becomes the effective data voltage Vdata_eff.  
         [0055]     Also, the effective data voltage in the node B 2  is charged in the capacitor C 1 , so that the voltage of the node B 2  is maintained at Vdata_eff.  
         [0056]     Thus, if the effective data voltage Vdata_eff is applied to the node B 2 , the voltage of the node A 2  becomes Vdata_eff+VDD-V_int (Vc 2 ).  
         [0057]     When the PMOS transistor T 3  is turned off, the voltage of the node B 2  is maintained at Vdata_eff by the capacitor C 1  and the voltage of the node A 2  becomes Vdata_eff+VDD-V_int.  
         [0058]     Accordingly, a gate-source voltage Vgs of the PMOS transistor T 1  for supplying a current to the OLED becomes Vdata_eff+VDD-V_int−VDD.  
         [0059]     As described in  FIG. 1 , since a current I flowing through the drain of the PMOS transistor T 1  is controlled by I=K(V gs −V th ) 2   
         (       where   ⁢           ⁢   K     =       1   2     ⁢   μ   ⁢           ⁢     Cox   ⁡     (     W   L     )           )     ,       
 
 a result can be expressed as  
             I   =       ⁢       1   2     ⁢       K   ⁡     (            V   gs          -          V   th            )       2                   =       ⁢       1   2     ⁢       K   ⁡     (              Vdata   eff     +   VDD   -     V   initial     -   VDD          -          V   th            )       2                   =       ⁢       1   2     ⁢       K   ⁡     (            Δ   ⁢           ⁢   Vdata          -          V   th            )       2                 
 
         [0060]     That is, the current flowing through the OLED can be controlled regardless of VDD. Even though a voltage drop occurs when the power supply voltage is applied along a power line, a constant current can be supplied.  
         [0061]     The select driving signal Select n- 1  used as the initialization voltage V_int can be generated by a separate driving circuit or may be generated using a previous-stage gate signal.  
         [0062]     Accordingly, when the power supply voltage is supplied along a row line, the gate-source voltage of the PMOS transistor T 1  can be controlled regardless of VDD, even when different voltages are applied to each pixel due to the voltage drop. Thus, a constant current can be applied to the OLED.  
         [0063]      FIG. 4  is a circuit diagram of a driving circuit similar to that of  FIG. 2 , except that the PMOS transistors used as the switching element or the driving element are replaced with NMOS transistors.  
         [0064]     The driving method of the organic light emitting display is similar to that of  FIG. 2 . The transistors are turned on by the select driving signal and the data signal that change from a low level to a high level.  
         [0065]     An NMOS transistor T 3  performs a switching operation to supply a data signal, and an NMOS transistor T 1  serves as a driving element for controlling a current. An OLED generates light in accordance with a current controlled by the NMOS transistor T 1 . A capacitor C 2  is connected between a gate of the NMOS transistor T 1  and a drain of the NMOS transistor T 3 . A capacitor C 1  is connected between the capacitor C 2  and the NMOS transistor T 3  and charges a data voltage. An NMOS transistor T 2  is connected to the gate of the NMOS transistor T 1  and applies a power supply voltage VDD.  
         [0066]     As the operation of the driving circuit shown in  FIG. 4  is substantially identical to that of  FIG. 2 , only differences in operation are described.  
         [0067]     The OLED is connected to the power supply voltage VDD and generates light by the current control of the NMOS transistor T 1 .  
         [0068]     The source of the NMOS transistor T 1  is connected to ground.  
         [0069]     Unlike in  FIG. 2 , a node B 3  between the NMOS transistor T 3  and the capacitor C 2  is initialized to a low level (Vdata_int) by the data voltage, and then an effective data voltage Vdata_eff of a high level is applied.  
         [0070]     When the select driving signal Select  2  is applied to the gate of the NMOS transistor T 2 , the NMOS transistor T 2  is turned on. At this time, the power supply voltage VDD is applied through the source of the NMOS transistor T 2  to a node A 3 , which is connected to the gate of the NMOS transistor T 1 .  
         [0071]     Then, the select driving signal Select  1  is applied to the gate of the NMOS transistor T 3  and the NMOS transistor T 3  is turned on.  
         [0072]     Thus, the node B 3  is initialized to the initial value Vdata_int (low level) of the data voltage.  
         [0073]     That is, when both the NMOS transistors T 2  and T 3  are turned on in response to the select driving signals Select  2  and Select  1 , the initial voltage Vdata_int is applied to the node B 3 .  
         [0074]     The subsequent driving process and effect are substantially identical to that of  FIG. 2 .  
         [0075]     In a further aspect, in the driving circuit shown in  FIG. 5 , the voltage applied to the node B 4  is supplied not from the data voltage but from an external power source.  
         [0076]     An NMOS transistor T 3  performs a switching operation to supply a data signal, and an NMOS transistor T 1  serves as a driving element for controlling a current. An OLED generates light in accordance with a current controlled by the NMOS transistor T 1 . A capacitor C 2  is connected between a gate of the NMOS transistor T 1  and a drain of the NMOS transistor T 3 . A capacitor C 1  is connected between the capacitor C 2  and the NMOS transistor T 3  and charges a data voltage. An NMOS transistor T 2  is connected to the gate of the NMOS transistor T 1  and applies a power supply voltage VDD. Also, an NMOS transistor T 4  is connected to the drain of the NMOS transistor T 3  and applies an initialization voltage.  
         [0077]     The driving circuit shown in  FIG. 5  has a similar operation and effect as the driving circuit shown in  FIG. 3 .  
         [0078]     That is, the PMOS transistors of  FIG. 3  are replaced with the NMOS transistors, and the driving signal changing from a low level to a high level is applied.  
         [0079]     The period of the signals is corresponds to that of  FIG. 3 . When the power supply voltage is supplied to each pixel through the power line, it is possible to solve the problem that causes the current applied to the OLED to be un-uniform due to the voltage drop, which results from the resistive components of the line. When the power supply voltage VDD is supplied to each pixel through the power line, the gate-source voltage Vgs of the driving transistor is constant regardless of VDD, such that the current applied to the OLED is not changed due to the voltage drop. Consequently, the non-uniformity of picture quality can be solved.  
         [0080]     Although the present invention has been explained by way of the examples described above, it should be understood to the ordinary skilled person in the art that the invention is not limited to the examples, but rather that various changes or modifications thereof are possible without departing from the spirit of the invention. Accordingly, the scope of the invention shall be determined only by the appended claims and their equivalents.