Abstract:
The present invention provides an electronic package for high speed, high performance semiconductors. It includes a plurality of devices, circuit members and short interconnections between the circuit members for maintaining high electrical performance. Suitable applications requiring high speed, impedance-controlled transmission line buses throughout the entire package include microprocessor and digital signal processor data buses, and high speed memory buses for products such as laptop and handheld computing and telecommunications devices. Circuit members include printed circuit boards and circuit modules, and may be formed from a wide variety of materials with unpacked or packed semiconductors attached directly to the circuit members. Through the use of clamps the package is at least factory reworkable and can be field separable. Thermal management structures may be included to maintain the high density devices within a reliable range of operating temperatures.

Description:
RELATED PATENT APPLICATIONS  
       [0001]    This application is related to U.S. Pat. No. 6,172,895, issued to Brown et al. for HIGH CAPACITY MEMORY MODULE WITH BUILT-IN HIGH SPEED BUS TERMINATIONS and copending U.S. patent applications, Ser. No. 09/457,776, filed Dec. 9, 1999, copending U.S. patent applications Ser. Nos. 09/645,860, 60/227,689, 60/227,859, 09/645,859, and 09/645,858, all filed Aug. 24, 2000; copending U.S. patent application Serial No. ______, [HCD-109], filed ______, 2001; and copending U.S. patent application Serial No. _______ [HCD-115], filed ______,  2001 , all of which are hereby incorporated by reference. 
     
    
     
       FIELD OF THE INVENTION  
         [0002]    The present invention relates to high density, low profile electronic packages and, more particularly, to the packaging of high performance, high density semiconductors having impedance-controlled transmission line buses for maintaining high electrical performance.  
         BACKGROUND OF THE INVENTION  
         [0003]    The current trend in electronic package design for use in high speed electronic systems is to provide high electrical performance, high density and highly reliable interconnections between various circuit devices, which form important parts of those systems. The system may be a computer, a telecommunications network device, a handheld “personal digital assistant”, medical equipment, or any other electronic equipment.  
           [0004]    High reliability for such connections is essential due to potential end product failure, should vital misconnections of these devices occur. It is also very important that the interconnections be as dense as possible, use the least possible amount of real estate on the printed circuit board, and provide minimal impact on the printed circuit board wiring. In some cases, such as for laptop computers and handheld devices, it is very important that the height of the connectors and the auxiliary circuit members be as low as possible.  
           [0005]    As system density and performance have increased so dramatically, so have the stringent specifications for interconnections. One way high electrical performance is manifested is in improved signal integrity. This can be accomplished by providing the interconnections with shielding that helps them to more closely match a desired system impedance. These demanding requirements, especially when coupled with the requirement for field-separability, have led to a wide variety of possible connector solutions.  
           [0006]    Also, to assure effective repair, upgrade, and/or replacement of various components of the system (e.g., connectors, cards, chips, boards, modules, etc.), it is desirable that the connections be reworkable at the factory. It is also highly desirable in some cases that, within the final product, such connections be separable and reconnectable in the field. Such a capability is also desirable during the manufacturing process for such products in order to facilitate testing, for example.  
           [0007]    A land grid array (LGA) is an example of such a connection in which each of two primarily parallel circuit elements to be connected has a plurality of contact points, arranged in a linear or two-dimensional array. An array of interconnection elements, known as an interposer, is placed between the two arrays to be connected, and provides the electrical connection between the contact points or pads. For even higher density interconnections, additional parallel circuit elements may be stacked and electrically connected through additional LGA connectors to create three-dimensional packages. In any case, since a retentive force is not inherent as in a pin-and-socket type interconnection, a clamping mechanism is needed to create the force necessary to ensure each contact member is compressed an appropriate amount during engagement to form the required interconnections to the circuit elements. While LGA interposers are implemented in many different ways, the implementations of most interest are those described in the aforementioned copending U.S. patent applications.  
           [0008]    There have been many limitations to the successful implementation of high density, low profile, low cost, three dimensional electronic packages. Firstly, higher density packages were needed only for very high-end electronic applications such as supercomputers, where size, weight and cost were not issues. Secondly, high volume products such as personal computers were cost sensitive and had sufficient internal room which encouraged engineers to use existing electronic packages. Thirdly, portable and handheld devices were simple enough and too cost sensitive to demand higher density packaging technologies. Overall, the electronic package technology currently available has been unable to meet the stringent set of requirements listed above. It is believed that a high density, low profile, low cost, three dimensional electronic package would constitute a significant advancement in the art.  
           [0009]    It is, therefore, an object of the invention to enhance the electrical interconnection art.  
           [0010]    It is another object of the invention to provide a high density electronic package with improved electrical and mechanical performance and reliability.  
           [0011]    It is an additional object of the invention to provide a high density electronic package that is low profile.  
           [0012]    It is an additional object of the invention to provide a high density electronic package with improved manufacturability, lower cost and one that is factory reworkable.  
           [0013]    It is an additional object of the invention to provide a high density electronic package that is light weight and provides a small, low profile form factor.  
           [0014]    It is a still further object of the invention to provide a high density electronic package that is field separable.  
         SUMMARY OF THE INVENTION  
         [0015]    The present invention provides a high density, low profile electronic package for high speed, high performance semiconductors. It includes a plurality of devices, circuit members and short interconnections between the circuit members for maintaining high electrical performance. Certain applications requiring high speed, impedance-controlled transmission line buses throughout the entire package. These include but are not limited to microprocessor and digital signal processor data buses, and high speed memory buses for products such as laptop and handheld computing and telecommunications devices. Circuit members include printed circuit boards and circuit modules, and may be formed from a wide variety of materials with unpacked or packed semiconductors attached directly to the circuit members. Through clamping means the package is at least factory reworkable and can be field separable. Thermal management structures may be included to maintain the high density devices within a reliable range of operating temperatures.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0016]    A complete understanding of the present invention may be obtained by reference to the accompanying drawings, when taken in conjunction with the detailed description thereof and in which:  
         [0017]    [0017]FIG. 1 a  is a side view, in section and on an enlarged scale, of a low profile electronic package in accordance with one embodiment of the present invention;  
         [0018]    [0018]FIG. 1 b  is a cross section, enlarged side view of the electronic package shown in FIG. 1 a  further including alignment means;  
         [0019]    [0019]FIG. 1 c  is a cross section, enlarged side view of the electronic package shown in FIG. 1 a  further including an interposer;  
         [0020]    [0020]FIG. 2 is a cross section, enlarged side view of a field separable, low profile electronic package in accordance with a second embodiment of the present invention;  
         [0021]    [0021]FIG. 3 a  is a cross section, enlarged side view of a field separable, low profile electronic package in accordance with an extension of the second embodiment of the present invention; and  
         [0022]    [0022]FIG. 3 b  is an exploded perspective view of the electronic package shown in FIG. 3 a.   
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0023]    Generally speaking, the present invention provides an electronic package for high speed, high performance semiconductors. The package includes a plurality of devices, circuit members and short interconnections between the circuit members for maintaining high electrical performance. Examples of circuit members include high density circuit cards or modules with either bare semiconductors or conventionally packaged ones mounted thereon. The package includes clamping means and, optionally, may have thermal management structures and alignment means. Short LGA connectors provide the electrical interconnection between circuit members and a mother board.  
         [0024]    Referring first to FIG. 1 a , there is shown an electronic package  10  of the present invention for electrically interconnecting electrical circuit members  24  and  34  by means of a connector  11  disposed between them. Examples of circuit members suitable for interconnection by connector  11  include printed circuit boards, circuit modules, etc. The term “printed circuit board” is meant to include but not be limited to a multilayered circuit structure including one or more conductive (i.e., signal, power and/or ground) layers therein. Such printed circuit boards, also known as printed wiring boards, are well known in the art and further description is not believed necessary. The term “circuit module” is meant to include a substrate or like member having various electrical components (e.g., semiconductor chips, conductive circuitry, conductive pins, etc.), which may form part thereof. Such modules are also well known in the art and further description is not believed necessary.  
         [0025]    In these embodiments the clamping mechanism is not field separable but is readily reworkable at the factory. This is appropriate for applications where the ability to upgrade in the field is not a requirement and lowest possible manufacturing cost is desired.  
         [0026]    Connector  11  includes a common, electrically insulative carrier member  12  having a plurality of internal apertures or openings  14 . The openings  14  are typically cylindrical in shape. Resilient contact members  16  are located so as to substantially occupy a respective opening  14  in carrier member  12 . Contact members  16  are preferably of a construction and composition as taught in copending U.S. patent application, Ser. No. 09/457,776.  
         [0027]    In one example each contact member  16  has a diameter of about 0.026 inch and a corresponding length of about 0.040 inch. Openings  14  have a diameter of 0.028 inch, just 0.002 inch larger than that of contact members  16 . The center-to-center distance is 0.050 inch, but could be reduced to about 0.035 inch or less, if required. For any given application, an individual contact member may be used to provide a signal, power, or ground interconnection. In one example each contact member  16  has a maximum resistance of 0.020 ohm. This allows contact members  16  to pass high currents with only a small voltage drop.  
         [0028]    Each opposing end  18  and  20  of each contact member  16  is designed for electrically contacting respective circuit members  24  and  34 . As stated, circuit members  34  may be printed circuit boards having flat conductive pads (e.g., copper terminals)  28  located on an upper surface thereof. These circuit members may also comprise a circuit module  24  including a substrate  26  having a plurality of semiconductor elements  32  thereon. Circuit modules  24  may be packaged or unpackaged devices with a myriad attachment options including but not limited to surface mount, ball grid array, and wire bond. It should be understood that other electronic components, such as but not limited to resistors and capacitors, would typically be included with and interconnected to elements  32 . They are not shown here only for purposes of clarity.  
         [0029]    Corresponding thin, flat, copper conductive pads  28  can be located on a bottom, external surface of circuit module  24 . Understandably, the conductive pads  28  are electrically coupled to corresponding circuitry, which forms part of the respective electrical circuit members. These pads  28  may provide signal, power or ground connections, depending on the operational requirements of the respective circuit member.  
         [0030]    Carrier member  12 , which may also include alignment openings  37  (FIG. 1 b ), is designed for positioning between opposing circuit members  24  and  34 , and is aligned therewith. While carrier member  12  is shown in one of its simpler embodiments, for improved clarity of other elements and features of the invention, the teachings of two of the referenced copending U.S. patent applications are considered important aspects of the instant invention that significantly improve performance of carrier member  12 . Copending U.S. patent application Ser. No. 09/645,860 teaches the mechanical and reliability improvement of carrier member  12  through the inclusion of features such as retentive members in openings  14 , and layers of spacers located above and below the planer surfaces of carrier member  12 . Copending U.S. patent applications Ser. No. 60/227,859 and __/____ , [HCD-115] teach that carrier member  12  can be improved electrically such as by metallizing openings  14 , including conductive layers, including additional components, and further including pairs of shorter length contact members, thereby creating a shielded carrier member  12  with additional functionality that can also save real estate on circuit members  24  and  34 . The recommendations of materials and processes of the aforementioned patent applications are also important to the improved manufacturability and lower cost of the instant invention.  
         [0031]    Each resilient contact member  16  is compressed during engagement by clamping means  52  to form the appropriate interconnection between corresponding pairs of conductive pads  28 . Clamping means  52  consists of an upper plate  54 , spacers  56 , and relief chambers  58 . Upper plate  54  is intended to contact and apply force to the top surface of circuit member  24 . Depending on requirements, upper plate  54  may contact only a small portion of the perimeter of circuit member  24  or it may contact a much larger portion thereof. In this embodiment, upper plate  54  is preferably made of a metal such as steel or a copper alloy and is 0.100 inch thick. Steel is preferred for its strength.  
         [0032]    Spacers  56  are preferably metal, but may also be made of other materials such as plastic. Relief chambers  58  are also preferably metal such as steel.  
         [0033]    The height of spacer/relief chamber pairs  60  relative to the height of contact members  16  is used to control the displacement of, or force on the contact members  16  of connector  11 . Spacers  56  must be elastically robust in order to maintain the required contact force on all of the contact members  16  over the life of the clamping mechanism  52  following assembly. Relief chamber  58  has a cross sectional shape that is complementary to that of spacer  56  but is slightly larger. It also provides a relatively flat surface  62  that is used to attach it to circuit member  34 .  
         [0034]    Spacers  56  and relief chambers  58  work together as integral units to provide the clamping forces on upper plate  54 . In this embodiment, the spacer/chamber pairs  60  are longer strips located just left and right, and extend to the back edge of circuit member  24  and carrier member  12 . Variations to this may be desirable and are well within the teachings of this invention. Spacer/chamber pairs  60  are designed to allow movement in two dimensions in the plane of circuit member  34  to relieve thermal expansion displacement mismatches. The attachment means  64  can be made as thin as possible in order to be elastically strong but avoid high thermal stresses, which are damaging to thin layers of material.  
         [0035]    In this embodiment spacers  56  are attached to upper plate  54  and relief chambers  58  are attached to circuit member  34  by attachment means  64 , which is intended to be reworkable at the factory. Many methods many be used to accomplish this reworking procedure including chemical (e.g., dissolvable adhesives) and metallurgical (e.g., thin solder layers).  
         [0036]    To take full advantage of the benefits this clamping mechanism  52  provides, such as avoiding CTE mismatches and having a light weight and a small form, it is preferable that connector  11  have high compliance to accommodate the non-planarity of mating circuit members  24  and  34 , especially at lower clamping forces.  
         [0037]    It should be obvious to those skilled in the art that the parameters such as the specific shape, dimensions, and materials of upper plate  54  and spacer/chamber pairs  60  may vary depending on certain requirements. These types of variations are well within the scope of the present invention.  
         [0038]    Although a means for aligning circuit member  24  and carrier member  12  to circuit module  34  has not been shown specifically in this embodiment, it should be readily apparent to those skilled in the art of the multitude of methods that may be implemented. Examples are disclosed in copending U.S. patent applications, Ser. Nos. 09/645,860 and 60/227,859. An additional method is disclosed in FIG. 1 b.  There is shown an electronic package  30  further including alignment means to align carrier member  12  to circuit member  34 . In this embodiment the alignment means consists of a plurality of pins  33 , solder, chemical, or other attachment mechanism known in the art  64  and alignment openings  37 . It should be obvious to those skilled in the art how this approach can be applied to other embodiments, including those described hereinbelow.  
         [0039]    During the assembly process, each resilient contact member  16  is compressed by assembly fixturing (not shown) and retained by clamping means  52  to form the appropriate interconnection between corresponding pairs of conductive pads  28 .  
         [0040]    Referring now to FIG. 1 c,  there is shown a side view of an electronic package  40  similar to electronic package  10  of FIG. 1 a,  but further including an interposer  42  for providing a reworkable plurality of conductive pads  48  for electrical circuit member  34 . When used in conjunction with connector  11 , a path for electrically interconnecting electrical circuit members  24  and  34  is provided.  
         [0041]    Interposer  42 , as taught in copending U.S. patent application Ser. 60/227,689, acts as a carrier for higher-risk and/or expensive processes, such as special platings on contact pads, that may limit or affect the yields and/or costs of printed circuit structures, such as boards, cards, modules, etc. Contact pads are provided that are large enough for adequate connector alignment tolerances and the proper functioning of high density connectors. The inclusion of interposer  42  improves the manufacturability and reliability of the present invention. It should be obvious to those skilled in the art how this approach can be applied to other embodiments, including those described hereinbelow.  
         [0042]    Interposer  42  includes a dielectric layer  44  having a plurality of internal stepped apertures or openings  46 , each one corresponding to and aligned with a conductive pad  48 . In one example, dielectric layer  44  is composed of Kapton (a trademark of E. I. DuPont deNemours &amp; Co., Wilmington, Del.) or Upilex (a trademark of Ube Industries, Ltd., Japan) and is 0.010-inch thick. Other examples of suitable material for dielectric layer  44  are liquid crystal polymer (LCP) and epoxy-glass-based materials (i.e., FR 4 ). This material has a coefficient of thermal expansion (CTE) that substantially matches the CTE of the surrounding structures. Dielectric layer  44  may also comprise more than one layer of material to allow the implementation of alternate methods of manufacture.  
         [0043]    Conductive members  38  are intended to be located in corresponding stepped openings  46  and are in electrical contact with corresponding conductive pads  48 . In one example, the diameter of conductive member  38  is 0.026 inch and the height is 0.013 inch prior to reflow. Conductive pads  48  are copper, covered by a plating layer  50 , which in this example is a 200 micro-inch thick layer of nickel covered by a 50 micro-inch thick layer of gold. In this example, the center-to-center distance of conductive pads  48  is 0.050 inch, but could be reduced to about 0.035 inch or less, if required.  
         [0044]    Referring now to FIG. 2, there is shown an electronic package  70  in accordance with an alternate embodiment of the invention for electrically interconnecting electrical circuit members  24  and  34 , and intermediate circuit members  94 . Although a stack of four parallel circuit members  24 ,  34 ,  94  are shown for purposes of disclosure, it should be readily apparent that the concepts taught in this embodiment apply to other quantities of circuit members  24 ,  34 ,  94  as well. For this embodiment the clamping mechanism  72  is field separable. This is appropriate for applications that require the ability to upgrade or replace a circuit member  24 , intermediate circuit members  94  or connectors  11  in the field.  
         [0045]    Intermediate circuit members  94  may comprise materials, structures, components and wirability similar to circuit members  24  and  34 , all of which are application dependent. These intermediate circuit members  94  may be printed circuit boards having flat conductive pads (e.g., copper terminals)  28  located on both upper and lower surfaces thereof. Intermediate circuit members  94  may also comprise a circuit module similar to circuit member  24 , including a substrate  96  having a plurality of semiconductor elements  32  and/or other components (not shown) thereon. Corresponding thin, flat, copper conductive pads  28  can be located on both upper and lower external surfaces thereof. Understandably, the conductive pads  28  are electrically coupled to corresponding circuitry, which forms part of the respective electrical circuit members. These pads  28  may provide signal, power or ground connections, depending on the operational requirements of the respective circuit member.  
         [0046]    Although a specific means for aligning intermediate circuit members  94  and carriers  12  to circuit module  34  have not been shown specifically in this embodiment, it should be readily apparent to those skilled in the art that many methods may be implemented, including the method described in FIG. 1 b.    
         [0047]    Clamping means  72  consists of upper plate  74 , spacers  76 , and retentive members  78 . Upper plate  74  again is intended to contact and apply force to the top surface of circuit member  24 . Depending on requirements, it may contact only a small portion of the perimeter of circuit member  24  or it may contact a much larger portion thereof. In this embodiment, upper plate  74  is preferably made of a material such as steel, a copper alloy, or a plastic material and is 0.100 inch thick. Steel is preferred for its strength.  
         [0048]    Spacers  76  are preferably metal but may also be made of other materials such as plastic. They must be elastically robust in order to maintain the required contact force on all of the contact members  16  over the life of the clamping mechanism  72  following assembly.  
         [0049]    Each retentive member  78  consists of a case  88  and inner spring members  90 , which further include stops  92 . Case  88 , spring members  90 , and stops  92  may be manufactured as a unitary piece through a process such as extrusion from a material such as metal or plastic. As an alternate, spring members  90  and stops  92  may be formed as a C-shaped spring from a material such as spring steel and then incorporated within a mold or extrusion where the case  88  may be formed from an optimal material.  
         [0050]    Case  88  provides several functions beyond being a housing for retentive member  78 . It provides a relatively flat surface  82  that is used to attach it to circuit member  34 . It also provides rough alignment for the insertion of spacer  76  into retention member  78  and it limits the outward excursion of spring members  90 .  
         [0051]    Once spacers  76  are inserted into retentive members  78 , they work together as integral units to provide the clamping forces on upper plate  74 . In this embodiment, the spacer/retentive member pairs  80  are longer strips located just left and right, and extending to the back edge of circuit member  24  and carrier member  12 .  
         [0052]    The vertical position of the interface between spacers  76  and stops  92  relative to the height of contact members  16  controls the displacement of, or force on the contact members  16  of connector  11 . Spring members  90  and stops  92  are designed to allow movement to relieve thermal expansion displacement mismatches during operation. The attachment means  84  can be made as thin as possible in order to be elastically strong but avoid high thermal stresses, which are damaging to thin layers of material.  
         [0053]    It should be obvious to those skilled in the art of the myriad possible design and manufacturing alternatives available, such as but not limited to the specific shape, dimensions, processes and materials of the elements of electronic package  70 , which may vary depending on specific requirements. These types of variations are well with the scope of the present invention.  
         [0054]    In this embodiment spacers  76  are attached to upper plate  74  and retentive members  78  are attached to circuit member  34  by attachment means  84 , which is intended to be reworkable at the factory. Many methods may be used to accomplish this reworking procedure including chemical (e.g., dissolvable adhesives) and metallurgical (e.g., thin solder layers).  
         [0055]    To take full advantage of the benefits, such as avoiding CTE mismatches and having a light weight and a small form, as this clamping mechanism  72  provides, it is preferable that connector  11  have high compliance to accommodate the non-planarity of mating circuit members  24  and  34 , especially at lower clamping forces.  
         [0056]    To enable interconnection, circuit member  24  (with spacers  76  attached) is intended to be inserted vertically into retentive member  78  and retained by stops  92  of spring members  90 . Removal of circuit member  24  with spacers  76  attached may be accomplished in several ways. The simplest method is to slide circuit member  24  sideways the full length of retentive member  78 . Other methods are described in U.S. patent application, Ser. No. ______, [HCD-109].  
         [0057]    Referring now to FIGS. 3 a  and  3   b,  there are shown a cross section, enlarged side view and a cross section, enlarged end view, respectively, of a field separable, low profile electronic package in accordance with an extension of the second embodiment of the present invention, further including thermal management structures  98 .  
         [0058]    The natural cooling efficiency of an electronic package  70  is low due to the lack of an effective thermal transfer medium from the die or package of semiconductor elements  32  to the air, and the lack of a short air channel in the direction of air flow (i.e., parallel to circuit member  34 ). It is exacerbated by the relatively large size of today&#39;s semiconductor elements  32  and the proximity to other heat generating elements  32  in such a dense package  70 . The thermal management structures  98  of the inventive package are designed to optimize both thermal conduction and radiation, thus allowing maximum circuit density without heat build-up, which could degrade semiconductor element  32  performance and reliability.  
         [0059]    Thermal management structures  98  are intended to sink heat away from semiconductor elements  32 . Such structures  98  may be stand alone elements (e.g., heatsinks) or they may provide a low resistance thermal path to another surface such as the outer enclosure of a device (e.g., a laptop computer), which may include thermally conductive material.  
         [0060]    Thermal management structures  98  may be implemented in many ways. They may be as simple as a layer of thermally conductive material, such as aluminum, attached or retained to semiconductor elements  32  by thermally enhanced compounds or clamps. Structures  98  may be more complex (FIG. 3 b ) and include elements such as fins  99  to augment cooling. Other methods may include the use of conformal pouches of liquid thermal transfer material, thin heat pipes, and thermoelectric devices. Other methods of solving thermal issues will be obvious to those skilled in the art.  
         [0061]    Since other modifications and changes varied to fit particular operating requirements and environments will be apparent to those skilled in the art, this invention is not considered limited to the example chosen for purposes of this disclosure, and covers all changes and modifications which does not constitute departures from the true spirit and scope of this invention.  
         [0062]    Having thus described the invention, what is desired to be protected by Letters Patent is presented in the subsequently appended claims.