Abstract:
A process for fabricating a strained layer of silicon or of a silicon/germanium alloy, includes: 
       a) the formation of a layer ( 2 ) of silicon or of a silicon/germanium alloy on a layer ( 1 ) of a material having a modifiable lattice parameter; and b) the modification of the lattice parameter.

Description:
CROSS-REFERENCE TO RELATED APPLICATION  
       [0001]     This application is based upon and claims priority from prior French Patent Application No. 03 07982, filed on Jul. 1, 2003, the entire disclosure of which is herein incorporated by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     1. Field of the Invention  
         [0003]     The invention generally relates to integrated circuits and more particularly to the fabrication of strained layers of silicon (Si) or of a silicon/germanium (SiGe) alloy, the said integrated circuits generally being used in the fabrication of transistors.  
         [0004]     2. Description of the Related Art  
         [0005]     The application of a tensile stress to a silicon film results in a considerable increase in the mobility of the carriers.  
         [0006]     The techniques currently employed for fabricating strained Si films are entirely based on the epitaxy of silicon or of a silicon/germanium alloy. The first silicon/germanium layer obtained by epitaxy on a bulk silicon substrate is in compression. However, as soon as this first layer exceeds a certain thickness (depending on the germanium concentration and on the deposition temperature), there is strain relief and the silicon/germanium film resumes its “bulk” lattice parameter. The latter is generally called a “relaxed substrate”. Since this lattice parameter is higher than that of silicon, the epitaxial growth of an Si film on this relaxed silicon/germanium layer is again in tension.  
         [0007]     Fabrication of transistors on this type of strained silicon film has clearly demonstrated the increase in the performance of the devices thanks to better carrier mobility. However, the fabrication of relaxed silicon/germanium substrates of high crystallographic quality remains a complex process. This is because relaxing the strain in the silicon/germanium film is manifested by the formation of a high dislocation density, which may make the material unusable.  
         [0008]     By growing silicon/germanium films having a germanium gradient, the formation of an emergent dislocation at the surface may be avoided. However, in order to be relaxed, the silicon/germanium layer must have a thickness of greater than 1 μm (depending on the germanium concentration). This results in very lengthy deposition times that are therefore incompatible with industrial use.  
         [0009]     In addition, after the deposition phase, the silicon/germanium layer requires a chemical-mechanical polishing step and therefore a cleaning step, which makes the process expensive.  
         [0010]     Accordingly, there exists a need for overcoming the disadvantages of the prior art as discussed above.  
       SUMMARY OF THE INVENTION  
       [0011]     The aim of the invention is to provide a solution to these problems.  
         [0012]     The present invention therefore proposes a process for fabricating a strained layer of silicon or of a silicon/germanium alloy, comprising:  
         [0013]     a) the formation of a layer of silicon or of a silicon/germanium alloy on a layer of a material having a modifiable lattice parameter; and  
         [0014]     b) the modification of the lattice parameter.  
         [0015]     The material with a modifiable lattice parameter is advantageously porous silicon. This is because porous silicon is capable of having its lattice parameter varied continuously around the value that it possesses in bulk silicon. This property may be exploited so as to grow, on top of the porous silicon, layers in epitaxial relationship. In the case of heteroepitaxial growth, the thickness of the strained layers may even reach a “limiting thickness”, at which thickness dislocations that relax the built-up strain appear.  
         [0016]     The process according to the invention therefore makes it possible to modify at will, for example by a simple heat treatment in a controlled atmosphere, or by filling the pores of the subjacent layers, the value of the lattice parameter of the porous material (the strain value of the porous layer) and therefore to modify the tensile (or relaxation) state of the epitaxially grown silicon or silicon/germanium upper layer. This is because it is in and on this upper layer that the transistors will be fabricated, the strained state of the channel of which may be modified.  
         [0017]     The upper layer of material having a modifiable lattice parameter, for example porous silicon, may be formed before or after the layer of silicon or silicon/germanium intended to be strained is formed.  
         [0018]     The strained state of the porous silicon layer may be modified by a heat treatment, for example of between 200 and 700° C.  
         [0019]     The strained state of the porous silicon may also be modified by molecular grafting using groups such as, for example, methyl groups. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0020]     Other advantages and features of the invention will become apparent on examining the detailed description of embodiments and methods of implementation, which are in no way limiting, and the appended drawings in which:  
         [0021]      FIGS. 1   a  to  1   f  diagrammatically illustrate the main steps of a first method of implementing the invention; and  
         [0022]      FIGS. 2   a  to  2   f  diagrammatically illustrate the main steps of a second method of implementing the invention. 
     
    
     DETAILED DESCRIPTION  
       [0023]     In  FIG. 1   a , the reference SB denotes a semiconductor substrate, for example made of silicon or of silicon/germanium, and possibly containing carbon C if necessary.  
         [0024]     The first step of the process is the formation of a layer  1  of porous silicon on the substrate ( FIG. 1   b ). Porous silicon is a single-crystal material having a highly developed surface, with an area of up to 1000 m2 per cm3 of material, and is obtained in a manner known per se electrochemically, for example in a hydrofluoric acid medium.  
         [0025]     After the layer  1  has been formed, the entire surface of the porous silicon is saturated with hydrogen (SiH bonds) and this presence of hydrogen strains the porous silicon layer. The amount of hydrogen may be modified in several ways so as to make the layer pass from a compressive state to a tensile state.  
         [0026]     Thus, the strained state of the porous silicon layer  1  may be modified by treating the said layer with hydrofluoric acid.  
         [0027]     It is also possible to modify the strained state and the developed surface area of the material by varying the porosity of the material and/or the type of substrate (p, p+, n or n+).  
         [0028]     For a given type of substrate, the amount of hydrogen may be modified by heat treatment within a temperature range of between 200 and 700° C. The temperature is limited to around 700° C. so as to prevent the porous silicon from being transformed by pore coalescence.  
         [0029]     During this heat treatment, hydrogen is desorbed and therefore the strain is modified. For example, after formation the porous silicon has a larger lattice parameter than bulk silicon. Above 200° C., there is hydrogen desorption and the lattice parameter decreases until reaching that of bulk silicon at around 400° C., and continues to decrease at higher temperatures.  
         [0030]     This change in the strained state is reversible. This is because, after heat treatment, the porous silicon need only be brought into contact with hydrofluoric acid in order for it to resume its initial state, before any heat treatment. It is therefore apparent that, by simple heat treatment of the porous silicon the desired strain in the silicon layer may be obtained by adjusting the lattice parameter values.  
         [0031]     The next step of the process ( FIG. 1   c ) comprises the growth, by an epitaxial operation known per se, of a layer  2  of silicon or of a silicon/germanium alloy.  
         [0032]     To gain access to the porous silicon layer  1 , in order to modify its lattice parameter by various possible treatments, apertures  20  are etched in the layer  2  ( FIG. 1   d ), for example by chemical etching.  
         [0033]     The wafer is then immersed in a hydrofluoric acid solution ( FIG. 1   e ). The purpose of this treatment is to restore the hydrogen coverage lost during the epitaxial phase.  
         [0034]     After this hydrofluoric acid treatment, the silicon film  2  is then under a high tensile stress.  
         [0035]     It is then possible, if necessary, to provide a heat treatment of the type mentioned above in order to modify the lattice parameter of the porous silicon so as to reduce or eliminate the strain in the silicon layer  2 , or even induce a compressive strain therein.  
         [0036]     To modify the strained state of the porous silicon, hydrogen at the surface of the silicon may also be replaced with another species, for example methyl groups, using molecular grafting methods.  
         [0037]     According to one method of implementing the invention, illustrated in  FIGS. 2   a  to  2   f , the order of the steps may be modified. A silicon layer  3  is formed on a base substrate SB and then doped ( FIG. 2   b ). The dopant concentration is, for example, greater than 1017/cm3. A layer  4  of silicon or of a silicon/germanium alloy is formed by an epitaxial operation known per se ( FIG. 2   c ). The latter layer  4  is selectively and locally etched ( FIG. 2   d ) so as to gain access to the silicon layer  3 . The silicon of the layer  3  is transformed to porous silicon and the strain is then generated during this step ( FIG. 2   e ). A heat treatment may then be applied ( FIG. 2   f ).  
         [0038]     In one or other of the variants described, the structure obtained after heat treatment may, if necessary, be stabilized by a stabilization treatment. This stabilization may be obtained by various methods. One of them consists of a low-temperature (&lt;450° C.) oxidation step that results in an oxide layer covering the internal surface of the structure. The stabilization may also be obtained by covering or filling the pores with another material, as described for example in French Patent Application No. 94/02197.  
         [0039]     While there has been illustrated and described what is presently considered to be embodiments of the present invention, it will be understood by those of ordinary skill in the art that various other modifications may be made, and equivalents may be substituted, without departing from the true scope of the present invention.  
         [0040]     Additionally, many modifications may be made to adapt a particular situation to the teachings of the present invention without departing from the central inventive concept described herein. Furthermore, an embodiment of the present invention may not include all of the features described above. Therefore, it is intended that the present invention not be limited to the particular embodiments disclosed, but that the invention include all embodiments falling within the scope of the appended claims.