Abstract:
Methods and circuitry for calibrating inductive-capacitive resonant circuits are disclosed. An example of the circuitry includes an inductive-capacitive (L-C) resonant circuit operable to receive signals in response to induced electromagnetic signals transmitted on a carrier frequency. A demodulator has a signal source and is operable to demodulate signals generated by the L-C resonant circuit. Switching circuitry is operable to inject signals generated by the signal source into the L-C resonant circuit during a calibration mode. The calibration mode is for adjusting the capacitance in the L-C resonant circuit to tune the L-C resonant circuit to the carrier frequency.

Description:
RELATED APPLICATION 
       [0001]    This application claims the benefit of U.S. Provisional Patent Application No. 62/244,220, filed Oct. 21, 2015, entitled “SYSTEMS AND METHODS FOR CALIBRATING L-C RESONANANCE CIRCUITS”, of Sudipto Chakraborty, et al., which is incorporated herein in its entirety. 
     
    
     BACKGROUND 
       [0002]    Inductor-capacitor (L-C) resonant circuits (also known as tank circuits) are widely used in electronic systems, for example for clock signals, oscillators, switching power supplies, and wireless communications. One common measure used to characterize L-C resonant circuits is the Q-factor (also known as the quality factor). One definition of Q-factor for L-C circuits is the resonant frequency of an L-C resonant circuit divided by the half-power bandwidth of the L-C resonant circuit. In some systems, for maximum efficiency and sensitivity, the L-C resonant circuit must be calibrated to maximize the Q-factor at a predetermined frequency. In some calibration processes, a modulated test tone is injected into the L-C resonant circuit using external instrumentation, which is time consuming and complex. In some systems, components used for calibration cause additional loading of the L-C resonant circuit, which affects measurement accuracy and may provide unwanted coupling to noise sensitive circuits. There is a need for a simple, fast, and accurate calibration mechanism for L-C resonant circuits. 
       SUMMARY 
       [0003]    Methods and circuitry for calibrating inductive-capacitive (L-C) resonant circuits are disclosed. An example of the circuitry includes an L-C resonant circuit operable to receive signals in response to induced electromagnetic signals transmitted on a carrier frequency. A demodulator has a signal source and is operable to demodulate signals generated by the L-C resonant circuit. Switching circuitry is operable to inject signals generated by the signal source into the L-C resonant circuit during a calibration mode. The calibration mode is for adjusting the capacitance in the L-C resonant circuit to tune the L-C resonant circuit to the carrier frequency. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0004]      FIG. 1  is a block diagram of an example embodiment of circuitry that includes an L-C resonant circuit. 
           [0005]      FIG. 2A  is a block diagram showing an example of additional detail for a frequency and phase selector circuit in the circuitry of  FIG. 1  during normal operation. 
           [0006]      FIG. 2B  is a block diagram showing an example of additional detail for a frequency and phase selector circuit in the circuitry of  FIG. 1  in a first calibration mode. 
           [0007]      FIG. 3  is a block diagram showing an example of additional detail for an alternative embodiment of a frequency and phase selector circuit in the circuitry of  FIG. 1  in a second calibration mode. 
           [0008]      FIG. 4  is a schematic diagram of an example embodiment of an array constituting the variable capacitor and the variable resistor in the circuitry of  FIG. 1 . 
           [0009]      FIG. 5  is a flowchart describing an example of the first calibration mode. 
           [0010]      FIG. 6  is a frequency diagram showing an exemplary frequency response of the resonant circuit during a calibration mode. 
           [0011]      FIG. 7  is a flowchart describing an example of a second calibration mode. 
           [0012]      FIG. 8  is a block diagram showing L-C resonant circuits implemented in wireless communications and power devices using near-field communications. 
       
    
    
     DETAILED DESCRIPTION 
       [0013]      FIG. 1  is a block diagram of an example of circuitry  100  that includes an L-C resonant circuit  102 . Both the circuitry  100  and the resonant circuit  102  may be formed in a microcircuit. In general, capacitors, including capacitors formed in microcircuits, have some inherent tolerance limits due to manufacturing variations. Circuits in general, including microcircuits, include some inherent variable stray capacitance. Therefore, as initially manufactured, there is some inherent variation in the resonant frequency and bandwidth of the L-C resonant circuit  102  due to the variance in capacitance. The L-C resonant circuit  102  is initially manufactured with a fixed capacitor C F . During manufacturing, a calibration process is implemented to adjust the resonant frequency of the resonant circuit  102  by adjusting a variable capacitor C V . The values of the capacitors C F  and C V  are referred to as the capacitances C F  and C V . In addition, the calibration process may adjust the bandwidth of the resonant circuit  102  by adjusting a variable resistor R V . The resistance of the variable resistor R V  is referred to as the resistance R V . 
         [0014]    In the example resonant circuit  102  of  FIG. 1 , an Inductor L and the capacitors C F  and C V  are coupled in parallel. The calibration processes disclosed herein are equally applicable to resonant circuits in which an inductor and at least one capacitor are coupled in series. In some examples, a parallel L-C resonant circuit is implemented as an antenna that is configured for receiving a signal transmitted by a targeted sensor. In other examples, a series L-C resonance circuit is implemented to perform impedance transformation between a circuit and an antenna for maximum power transfer. 
         [0015]    The circuitry  100  is an example of an active wireless receiver used in a near-field communication (NFC) system. In NFC systems, a transmitter induces signal currents in a magnetically coupled receiver having an L-C resonant circuit in a parallel L-C configuration. NFC systems are used, for example, in wireless data transmissions within automobiles and airplanes, and in wireless data transmissions between financial transaction terminals and personal electronic devices such as cell phones and watches. In NFC systems, the receiver must be close enough to the transmitter to be magnetically coupled, effectively forming an air-core transformer. This requirement for close proximity between the transmitter and the receiver has several advantages, including reduced interference with other systems in the proximity of the system and increased security. For example, only a nearby magnetically coupled NFC system can receive the transmitted data. In general, a high-Q L-C resonant circuit is needed for selectivity, power efficiency, and maximum data transfer rate in an NFC system. The circuitry  100  may be operated in a time division duplex (TDD) mode or a frequency division duplex (FDD) mode. In addition, the circuitry  100  can be configured as one of several types of transceiver systems, and the calibration works with all of the transceiver configurations. 
         [0016]    NFC systems commonly use an amplitude-modulated signal. In an NFC amplitude-modulated transmitter, an Information signal (also known as the baseband signal) modulates the amplitude of a high frequency transmission signal (also known as the carrier signal). To provide maximum selectivity (i.e. image rejection) and digital calibration to combat analog circuit impairments, quadrature signal processing may be used in the receiver. One common type of receiver circuit for demodulating an amplitude modulated signal is an IQ demodulator, wherein the circuitry  100  is an example of an IQ demodulator. In an NFC receiver having an IQ demodulator, the received modulated carrier signal is multiplied by a signal, such as a local oscillator signal, having a frequency close to the Input carrier signal. The result of the multiplication is one signal component having the sum of the two carrier frequencies and a second signal component having the difference of the two carrier frequencies. A low-pass filter or a band-pass filter removes the sum frequency, leaving the difference frequency or baseband signal. In contrast to commonly available IQ demodulator circuits, the IQ demodulator circuit in the circuitry  100  can be switched to a calibration mode, as discussed further below. The L-C resonant circuit  102  is calibrated using the internal IQ demodulator circuitry that is also used for normal operation of the circuitry  100 . That is, no external signal source is needed for calibration and there is no additional loading on the L-C resonant circuit  102  during calibration. 
         [0017]    There are several standards for the frequency of the carrier signal in NFC systems. One standard specifies a carrier frequency of 13.56 MHz. For maximum efficiency and sensitivity, the L-C resonant circuit  102  needs to have a resonant frequency equal to a predetermined input carrier frequency, which in the standard above is 13.56 MHz. During calibration, the circuitry  100  adjusts the variable capacitor C V  in the L-C resonant circuit  102  so that the resonant frequency of the L-C resonant circuit  102  is at the predetermined input carrier frequency. In addition, during calibration, the circuitry  100  may adjust the variable resistor R V  to adjust the bandwidth of the L-C resonant circuit  102 . In the following description, the normal operation of circuitry  100  will be described followed by a description of the calibration process. 
         [0018]    In the following description, the input carrier frequency is designated as f 1  and the resonant frequency of the L-C resonant circuit  102  is designated as f R . During normal operation of the circuitry  100  a switch SW 11  is closed and a transmitter (not shown) is magnetically coupled to the resonant circuit  102 . The magnetical coupling causes the resonant circuit  102  to receive signals generated by the transmitter. A frequency and phase-selector circuit  104  provides quad-phase signals at the frequency f 1 . Mixers  106  and  108  mix the signals output by the resonant circuit  102  with the signals generated by the frequency and phase selector circuit  104 . For example, mixer  106  may receive phases 0° and 180° from the frequency and phase selector circuit  104  and mixer  108  may receive phases 90° and 270° from the frequency and phase selector circuit  104 . The mixed signals generated by the mixers  106  and  108  are amplified by baseband amplifiers  110  and  112 . Two current generators  114  and  116 , such as digital-to-analog converters (iDACs), compensate (remove) any DC offsets at the Inputs to the amplifiers  110  and  112 . A first analog filter circuit  118  generates a first output signal V 11  at a first output  122  and a second analog filter circuit  120  generates a second output signal V 12  at a second output  124 . Both the first and second analog filter circuits  118  and  120  may be active or passive. The first output signal V 11  at the first output  122  is the magnitude of an in-phase signal component and the second output signal V 12  at the second output  124  is the magnitude of a quadrature signal component. 
         [0019]    A controller or processor  126  controls whether the frequency and phase selector circuit  104  is operating in a normal mode or in a calibration mode. During calibration, the controller  126  controls the frequencies generated by the frequency and phase selector circuit  104 . The controller also opens a switch SW 11 , which prevents signals from being input to the amplifier  110 . In addition, during calibration, the controller  126  receives the second signal V 12  and computes an appropriate value for the variable capacitor C V . Based on this computation, the controller  126  adjusts the variable capacitor C V  to the appropriate value in order to make the resonant frequency f R  equal to the carrier frequency f 1 , as discussed in greater detail below. In addition, during calibration, the controller  126  adjusts the variable resistor R V  to optimize the bandwidth of the resonant circuit  102 , as discussed in greater detail below. 
         [0020]      FIG. 2A  shows an example of additional detail for the frequency and phase selector circuit  104  during normal operation. A phase-locked-loop (PLL)  200  controls two oscillators, such as voltage-controlled ring oscillators,  202  and  204 , each operating at the carrier frequency f 1 . Typically, these oscillators  202  and  204  provide good frequency resolution and may be realized using fractional-N topology. During normal operation, the oscillator  202  provides phases 0° and 180° at the frequency f 1  and the oscillator  204  provides phases 90° and 270° at the frequency f 1 . 
         [0021]    During calibration, the frequency and phase selector circuit  104  is switched to a calibration mode.  FIG. 2B  shows an example of additional detail of the frequency and phase selector circuit  104  during a first calibration mode. In the first calibration mode, the frequency and phase selector circuit  104  generates two signals having two different frequencies, f 2  and f 3 . The oscillators  202  and  204  may have slightly different frequencies while still being phase locked to the PLL  200 . The frequencies f 2  and f 3  are slightly different from each other such that their difference (i.e. abs(f2−f3)) is within the 3 dB bandwidth of the filter circuits  118  and  120 ,  FIG. 1 . For example, the carrier frequency f 1  may be 13.56 MHz, and f 3 −f 2  may be less than 1 MHz. It is noted that the filter circuit  118  is not used in the calibration process. 
         [0022]    With additional reference to  FIG. 1 , during the first calibration mode, the IDAC  114  provides a DC offset current. This DC offset current is chopped (upconverted) to the frequency f 2  by the mixer  106 . The resulting current having the frequency f 2  is injected into the resonant circuit  102  where a signal that is proportional to the impedance of the resonant circuit  102  at the frequency f 2  is passed. The mixer  108  mixes the resulting signal with the differential phase of the signal generated by the oscillator  204  at the frequency f 3 . The iDAC  116  removes any DC offset at the inputs of the amplifier  112 . The filter  120  removes high frequency components and the resulting signal V 12  at the output  124  has a frequency of f 3 −f 2 , which is sometimes referred to as the filtered signal V 12 . The amplitude of the filtered signal V 12  having a frequency of f 3 −f 2  is proportional to the impedance of the resonant circuit  102  at an average frequency of 0.5(f 2 +f 3 ). It is noted that |f 3 −f 2 |&lt;&lt;(f 3 ,f 2 ), and under this condition, the arithmetic mean of the two frequencies equals the geometric mean of the two frequencies. The controller  126  then determines the value of the variable capacitor C V  that will cause the resonant frequency f R  of the resonant circuit  102  to equal or be substantially equal to the carrier frequency f 1 . 
         [0023]    One method for determining the resonant frequency f R  is to measure the impedance by way of the amplitude of the filtered signal V 12  at multiple values of the frequency f 2  with the frequency f 3 −f 2  fixed. This can be obtained by changing the frequency f 2  using an oscillator, such as an on-chip oscillator, or synthesizing different f 3 −f 2  values using a multi-modulus divider and an offset mixing technique (i.e. f 3 =f 2 ±f 2 /N, where N is an integer). The value of the frequency f 2  that results in the maximum impedance indicates the resonant frequency f R  of the resonant circuit  102 . Alternatively, given several values for impedance as a function of frequency, successive approximation and interpolation, or other curve fitting methods (for example, a second degree polynomial fit through three sample values) may be used to determine the resonant frequency f R . 
         [0024]    Equation (1) is the equation for the resonant frequency f R  of the resonant circuit  102  with the value of the variable capacitor C V  equal to zero. Given the resonant frequency f R  (measured as discussed above) and the inductance L of the resonant circuit  102 , equation (1) may be used to determine the value of the fixed capacitor C F . 
         [0000]    
       
         
           
             
               
                 
                   
                     f 
                     R 
                   
                   = 
                   
                     1 
                     
                       2 
                        
                       π 
                        
                       
                         
                           LC 
                           F 
                         
                       
                     
                   
                 
               
               
                 
                   Equation 
                    
                   
                       
                   
                    
                   
                     ( 
                     1 
                     ) 
                   
                 
               
             
           
         
       
     
         [0025]    In equation (2), an unknown variable capacitance C V  is added to adjust the resonant frequency f R  of the resonant circuit  102  to the carrier frequency f 1 . 
         [0000]    
       
         
           
             
               
                 
                   
                     f 
                     1 
                   
                   = 
                   
                     1 
                     
                       2 
                        
                       π 
                        
                       
                         
                           L 
                            
                           
                             ( 
                             
                               
                                 C 
                                 F 
                               
                               + 
                               
                                 C 
                                 V 
                               
                             
                             ) 
                           
                         
                       
                     
                   
                 
               
               
                 
                   Equation 
                    
                   
                       
                   
                    
                   
                     ( 
                     2 
                     ) 
                   
                 
               
             
           
         
       
     
         [0026]    Equation (3) provides the variable capacitance C V  in terms of known values (C F , f R , and f 1 ). The controller  126  computes the variable capacitance C V  and adjusts the variable capacitance C V  as discussed below. 
         [0000]    
       
         
           
             
               
                 
                   
                     C 
                     V 
                   
                   = 
                   
                     
                       
                         C 
                         F 
                       
                        
                       
                         ( 
                         
                           
                             f 
                             R 
                             2 
                           
                           - 
                           
                             f 
                             1 
                             2 
                           
                         
                         ) 
                       
                     
                     
                       f 
                       1 
                       2 
                     
                   
                 
               
               
                 
                   Equation 
                    
                   
                       
                   
                    
                   
                     ( 
                     3 
                     ) 
                   
                 
               
             
           
         
       
     
         [0027]    Equation (4) provides the Impedance Z R  of the resonant circuit  102  at the resonant frequency f R  in terms of a desired quality factor Q, inductance L, and total capacitance C, wherein the total capacitance C is equal to the sum of the fixed capacitance C F  and the variable capacitance C V . 
         [0000]    
       
         
           
             
               
                 
                   
                     Z 
                     R 
                   
                   = 
                   
                     Q 
                      
                     
                       
                         L 
                         C 
                       
                     
                   
                 
               
               
                 
                   Equation 
                    
                   
                       
                   
                    
                   
                     ( 
                     4 
                     ) 
                   
                 
               
             
           
         
       
     
         [0028]    Given a total capacitance C being equal to the sum of the fixed capacitance C F  and the variable capacitance C V  as described, and given Q is equal to the resonant frequency f R  divided by the bandwidth BW, equation (5) provides the impedance Z R  in terms of known quantities. Given the impedance Z R , the value of the variable resistor R V  can be calculated and adjusted to obtain the desired bandwidth BW. 
         [0000]    
       
         
           
             
               
                 
                   
                     Z 
                     R 
                   
                   = 
                   
                     
                       f 
                       1 
                     
                     
                       BW 
                        
                       
                         
                           L 
                           C 
                         
                       
                     
                   
                 
               
               
                 
                   Equation 
                    
                   
                       
                   
                    
                   
                     ( 
                     5 
                     ) 
                   
                 
               
             
           
         
       
     
         [0029]      FIG. 3  illustrates an alternative embodiment and circuitry  300  of the frequency and phase selector circuit  104  operating in a second calibration mode. The alternative embodiment of  FIG. 3  reduces the measurement time by using only one two-frequency measurement and the resonant frequency f R  and bandwidth BW are both adjusted in one step. In the embodiment of  FIG. 3 , an oscillator  304  generates a single frequency f 1 , which is sent to the mixer  108  of  FIG. 1 . A series of digital dividers  306  provides a frequency f 1  divided by predetermined divisors. In the example of  FIG. 3 , there are k divisors. A selector  310  selects one of the divisor outputs (f 1 /k) and the corresponding frequency is sent to the mixer  106  of  FIG. 1 . The mixer  106  generates two frequencies, f R +f 1 /k and f R −f 1 /k, that are injected into the resonant circuit  102 . The variable k is selected to provide the desired bandwidth. Assuming the frequency f 1  is the desired resonant frequency, and a frequency f 3db  is half the 3 dB bandwidth, these frequencies are given as f 2 =f r +f 3db , and f 3 =f r −f 3db . Since any L-C resonant circuit provides a second order monotonic characteristic for impedance, the voltages corresponding to these frequencies are obtained at the output  124 ,  FIG. 1 , of the filter  120  wherein the voltage V 12  in this embodiment is referred to as V(f 2 ) and V(f 3 ), and wherein the voltages V(f 2 ) and V(f 3 ) are proportional to the L-C impedances at these frequencies. For example, the impedance Z(f 2 ) is proportional to the voltage V(f 2 ) and the impedance Z(f 3 ) is proportional to the voltage V(f 3 ). The voltages V(f 2 ) and V(f 3 ) are made equal by setting the appropriate value for the variable capacitor C V . Hence, both the resonant frequency calibration and the bandwidth calibration can be performed in one step. 
         [0030]      FIG. 4  is a schematic diagram of an example embodiment of an array  400  constituting the variable capacitor C V  and variable resistor R V  illustrated in  FIG. 1 . The array  400  of  FIG. 4  is a weighted capacitor array  402  and weighted resistor array  404 , which is one example of a switch-controlled variable capacitor C V  and switch-controlled variable resistor R V . There are multiple capacitors  410  and multiple switches  412  in the capacitor array  402 . The switches  412  are controlled by the controller  126  of  FIG. 1 . The overall capacitance of the capacitor array  402  is adjusted by selecting which capacitors  410  in the capacitor array  402  are coupled in series and parallel. In addition, there are multiple resistors  420  and switches  422  in the resistor array  404 . The overall resistance of the resistor array  404  is adjusted by selecting which resistors  420  are coupled in series and in parallel. 
         [0031]    As described herein, there are several methods for performing the calibration. For example, the measurement methods described above may include detection of amplitude and phase information. The different calibration methods have trade-offs in terms of calibration time required. In the first method, the frequency and phase selector network  104  configures one of the oscillators  202  or  204  to generate a signal with the desired resonant frequency. The signal has an amplitude proportional to the DC offset current generated by the iDAC  114 . The mixer  108  upconverts the signal passed by the resonant circuit  102  and the processor  126  measures the amplitude and phase of the signal V 12  at the output of 124. The first step in the calibration procedure involves adjusting the capacitance in the resonant circuit  102  so that the phase at the output  124  is zero or a minimum. Adjusting the capacitance in the resonant circuit  102  involves adjusting the variable capacitor C V , which may be performed by adjusting the capacitor array  402  as shown in  FIG. 4 . When the phase at the output  124  is zero or a minimum, the resonant circuit  102  is at resonance. A second tone having the desired bandwidth point, amplitude, and phase is injected into the resonant circuit  102 . At the bandwidth point, the amplitude is adjusted to be 3 dB lower and the phase is adjusted to be ±45° relative to the first signal injected into the resonant circuit  102 . The variable resistor R V  in the resonant circuit  102  is adjusted to achieve the amplitude and phase described above. For example, the resistor array  404  of  FIG. 4  may be adjusted to achieve the amplitude and phase described above. 
         [0032]      FIG. 5  is a flowchart  500  describing another example of the first calibration process and  FIG. 6  is a frequency diagram  600  showing the frequency response of the resonant circuit  102  during the calibration process. The process commences at block  502  with configuring the circuitry  100  for calibration. The configuring involves instructing the oscillator  202  to generate signals having a frequency f 2  with zero and 180° phase. The frequency response of the resonant circuit  102  is shown by a frequency response graph  602  in  FIG. 6 . As shown, the resonant frequency f R  is not equal to a carrier frequency f 2  at this point. In some examples, the values of the variable capacitor C V  and the variable resistor R V  are set to the middle of their ranges per block  504 . Setting the values of the variable capacitor C V  and the variable resistor R V  to the middle of their ranges enables the widest possible variation in their values during calibration. 
         [0033]    In step  506  the phase of the signal passed by the resonant circuit  102  is measured. Decision step  508  determines if the phase is zero or a minimum value. The zero or minimal phase indicates the L-C portion of the resonant circuit  102  is tuned to the carrier frequency f 2  as shown by the graph  606 . As shown in  FIG. 6 , the center frequency is shifted a value Δf between the graph  602  and the graph  606 . If the response of the decision block  508  is negative, processing proceeds to step  510  where the value of the variable capacitor C V  is changed. Processing then proceeds back to step  506  to measure the phase of the signal passed by the resonant circuit  102 . If the response of the decision step  508  is affirmative, processing proceeds to step  512  where the amplitude of the signal passed by the resonant circuit  102  is measured. 
         [0034]    Processing then proceeds to step  514  where the 3 dB signal, based on step  512 , is injected into the resonant circuit  102 . Decision step  516  determines if the phase of the signal passed by the resonant circuit  102  is 45°, which corresponds to the graph  610  where the bandwidth is set at the center frequency, which provides the correct Q factor. If the result of the decision step  516  is negative, processing proceeds to step  518  where the value of the variable resistor R V  is changed. Processing then proceeds again to decision step  516  to determine if the phase is 45°. The variable resistor R V  is changed until the phase is 45°, indicating that the 3 dB bandwidth has been set. When the phase is equal to 45°, the resonant circuit  102  is calibrated as noted in step  520 . 
         [0035]    In the second calibration embodiment, the variable capacitance C V  is set to zero and an upconverted signal having the desired frequency f 2  is injected into the resonant circuit  102 . A lookup table is stored in a memory device, such as in the processor  126 , that provides amplitude and phase information with respect to fractional frequency offset from the resonant frequency f R  of the uncompensated resonant circuit  102  as shown with respect to  FIG. 3 . Equation (6) is used to derive the total capacitance C based on a known inductance value L and the known resonant frequency f R . 
         [0000]    
       
         
           
             
               
                 
                   LC 
                   = 
                   
                     1 
                     
                       4 
                        
                       
                         π 
                         2 
                       
                        
                       
                         f 
                         R 
                         2 
                       
                     
                   
                 
               
               
                 
                   Equation 
                    
                   
                       
                   
                    
                   
                     ( 
                     6 
                     ) 
                   
                 
               
             
           
         
       
     
         [0036]    The variable capacitor C V  is changed to the maximum capacitance available and the frequency is measured again and noted as the frequency f M . Equation (7) is applied to derive the changes in the variable capacitance C V , wherein N is the number of capacitance possibilities for the variable capacitor C V . The change in capacitance from one value of N to the next value of N is referred to as the unit capacitance ΔC. 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       Δ 
                        
                       
                           
                       
                        
                       C 
                     
                     C 
                   
                   = 
                   
                     
                       1 
                       N 
                     
                      
                     
                       [ 
                       
                         1 
                         - 
                         
                           
                             ( 
                             
                               
                                 f 
                                 M 
                               
                               
                                 f 
                                 R 
                               
                             
                             ) 
                           
                           2 
                         
                       
                       ] 
                     
                   
                 
               
               
                 
                   Equation 
                    
                   
                       
                   
                    
                   
                     ( 
                     7 
                     ) 
                   
                 
               
             
           
         
       
     
         [0037]    Equation (7) leads to a measurement of manufacturing variation of the unit capacitance ΔC by comparing the measured ΔC from equation (7) with a stored value of nominal capacitance in a lookup table. Using the closed form of the second order L-C tank circuit in the resonant circuit  102 , the impedance Z T  is derived from equation (8) as follows: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                        
                       
                         Z 
                         T 
                       
                        
                     
                     2 
                   
                   = 
                   
                     
                       
                         R 
                         2 
                       
                        
                       
                         L 
                         2 
                       
                        
                       
                         ω 
                         2 
                       
                     
                     
                       
                         
                           
                             R 
                             2 
                           
                            
                           
                             ( 
                             
                               1 
                               - 
                               
                                 LCω 
                                 2 
                               
                             
                             ) 
                           
                         
                         2 
                       
                       + 
                       
                         
                           L 
                           2 
                         
                          
                         
                           ω 
                           2 
                         
                       
                     
                   
                 
               
               
                 
                   Equation 
                    
                   
                       
                   
                    
                   
                     ( 
                     8 
                     ) 
                   
                 
               
             
           
         
       
     
         [0038]    The amplitude of the signal passed by the resonant circuit  102  is measured at three frequencies, f 1 , f 2 , f 3 , and three power values, P RX1 , P RX2 , P RX3 , respectively. The value of L/R is obtained with a nominal value of L. The remaining variables are calculated based on equation (9) as follows wherein the LC term is described above with reference to equation (6): 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
                         L 
                         2 
                       
                        
                       
                         
                           C 
                           2 
                         
                          
                         
                           [ 
                           
                             
                               
                                 ω 
                                 2 
                                 2 
                               
                                
                               
                                 
                                   ω 
                                   3 
                                   2 
                                 
                                  
                                 
                                   ( 
                                   
                                     
                                       P 
                                       
                                         RX 
                                          
                                         
                                             
                                         
                                          
                                         2 
                                       
                                     
                                     
                                       P 
                                       
                                         RX 
                                          
                                         
                                             
                                         
                                          
                                         3 
                                       
                                     
                                   
                                   ) 
                                 
                               
                             
                             - 
                             
                               
                                 ω 
                                 1 
                                 2 
                               
                                
                               
                                 
                                   ω 
                                   3 
                                   2 
                                 
                                  
                                 
                                   ( 
                                   
                                     
                                       P 
                                       
                                         RX 
                                          
                                         
                                             
                                         
                                          
                                         1 
                                       
                                     
                                     
                                       P 
                                       
                                         RX 
                                          
                                         
                                             
                                         
                                          
                                         3 
                                       
                                     
                                   
                                   ) 
                                 
                               
                             
                           
                           ] 
                         
                       
                     
                     - 
                     
                       2 
                        
                       
                           
                       
                        
                       
                         
                           LCω 
                           3 
                           2 
                         
                          
                         
                           ( 
                           
                             
                               
                                 P 
                                 
                                   RX 
                                    
                                   
                                       
                                   
                                    
                                   2 
                                 
                               
                               - 
                               
                                 P 
                                 
                                   RX 
                                    
                                   
                                       
                                   
                                    
                                   1 
                                 
                               
                             
                             
                               P 
                               
                                 RX 
                                  
                                 
                                     
                                 
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         [0039]    This second calibration method is illustrated by the flowchart  700  of  FIG. 7 . In step  702 , the circuitry  100  is configured for the calibration mode as described above. In step  704 , the variable capacitance C V  and the variable resistance R V  are set to known values, such as the middle of their ranges. The frequency and phase controller  104  sets the frequency f 2  equal to the desired resonance frequency f R  and the amplitude of the resulting signal passed by the resonant circuit  102  is measured as P RX3  in step  706 . The frequency f M  is determined from a lookup table or other means in step  708 . The frequency f M  is the resonant frequency of the resonant circuit  102  with the variable capacitor C V  set to its maximum capacitance. The values of the total capacitance C T  and the incremental capacitance ΔC are determined based on the known inductance L as described above and described in step  710 . The frequencies f 2  and f 3  are injected into the resonant circuit  102  and the outputs P RX2  and P RX3  are measured in step  712 . In step  714 , the value of UL/R is determined and the variable resistance value is set for the appropriate bandwidth. 
         [0040]      FIG. 8  is a block diagram showing L-C resonant circuits implemented in wireless communications and power devices using near-field communications (NFC). The NFC is implemented in a wireless communication system  800  that includes a first unit  802  and a second unit  804  that communicate with each other by way of NFC. The first unit  802  includes a transmitter  810  and a receiver  812 . The second unit  804  includes a receiver  820  and a transmitter  822  that communicate via NFC with the transmitter  810  and the receiver  812  of the first unit  802 . The transmitter  810  in the first unit  802  includes a modulator  830  that modulates an input signal for transmission by a coil (inductor) L 81 . A coil L 82  in the receiver  820  of the second unit receives signals generated by the coil L 81  and generates current in response to the received signals. The coil L 82  is tuned as described above by way of the circuitry  100  and the processor  126 . The circuitry  100  further provides output signals V 11  and V 12  as described above. The transmitter  822  in the second unit  804  and the receiver  812  in the first unit  802  function in a similar or identical manner as the transmitter  810  and the receiver  820  where a coil L 83  transmits and a coil L 84  receives. 
         [0041]    The circuitry  100  may also be implemented in power transfer devices. In such devices, a transmitter coil is excited with AC power and generates signals. The signals are received by a receiver coil. A rectifier rectifies the signals received by the receiver coil to provide DC power to a device. The circuitry  100  may be implemented to tune the receiver coil as described above. 
         [0042]    Although illustrative embodiments have been shown and described by way of example, a wide range of alternative embodiments is possible within the scope of the foregoing disclosure.