Abstract:
An electronic switch circuit generates an output signal which is alternatively brought either into a first condition or into a second condition dependent upon a voltage level of an input signal. The electronic switch circuit includes first and second transistors which are mutually connected to form a differential circuit. A first bias circuit applies a first bias voltage to the first transistor. A second bias circuit applies to the second transistor a second bias voltage of a constant level which is independent of the voltage level of the input signal. The second bias voltage is different from the first bias voltage, when the voltage level of the input signal is smaller than a predetermined voltage level. When the voltage level of the input signal is not smaller than the predetermined voltage level, a control circuit operates to change the bias voltage for the second transistor so as to invert the large-and-small relationship between the bias voltages of the first and second transistors.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an electronic switch circuit including a contactless switch composed of transistors, and more specifically to improvement of an electronic switch circuit used as a part of an electronic change-over device which is incorporated in for example a television receiver and a video tape recorder. 
     2. Description of Related Art 
     Recent television receivers and video tape recorders have been equipped with electronic change-over devices for controlling the conditions of a displayed image and an audio output, and these electronic change-over devices are adapted to be operated by for example a remote control device. 
     Most of electronic switch circuits used in the electronic change-over devices are composed of transistors so as to utilize an ON/OFF operation of a transistor which is obtained by changing a base-emitter voltage. For example, in a television receiver, switching signals of different levels corresponding to an audio output condition and a muting condition, respectively are selectively applied to a base of a transistor, so that the transistor is on/off-controlled dependently upon the level of the switching signal, with the result that an audio signal is selectively either outputted or muted. 
     Referring to FIG. 1, there is shown a circuit diagram of a typical conventional electronic switch circuit. The shown electronic switch circuit includes a pair of PNP transistors Q 1  and Q 2  having their commonly connected emitters which are connected through a constant current source I 1  to a high voltage supply line Vcc. A base of the transistor Q 1  is connected to an emitter of a PNP transistor Q 3 , which has a base connected to a reference voltage V 1  and a collector connected to the ground GND. A collector of the transistor Q 1  is connected to a collector of an NPN transistor Q 4  having an emitter connected to the ground GND. 
     The electric switch circuit also includes a pair of NPN transistors Q 5  and Q 6  having their commonly connected collectors which are connected to the high voltage supply line Vcc. A base of the transistor Q 5  is connected to the collector of the transistor Q 1 , and an emitter of the transistor Q 5  is connected to a base of the transistor Q 4  as well as a base of a switching transistor (not shown) incorporated in for example an external amplifying circuit (not shown). 
     A base of the transistor Q 2  is connected to an emitter of a PNP transistor Q 7 , which has a base connected through a resistor R 1  to an input terminal S 1  and a collector connected to the ground GND. A collector of the transistor Q 2  is connected to a collector of an NPN transistor Q 8  having an emitter connected to the ground GND. A base of the transistor Q 6  is connected to the collector of the transistor Q 2 , and an emitter of the transistor Q 6  is connected to a base of the transistor Q 8  as well as a base of another switching transistor (not shown) incorporated in the above mentioned external amplifying circuit (not shown). 
     In the above mentioned electronic switch circuit, if a voltage larger than the reference voltage V 1  (a high level signal H) is applied to the input terminal S 1 , the transistor Q 1  is turned on and the transistor Q 2  is turned off, so that the transistor Q 5  outputs an control signal so as to turn on the first transistor of the not-shown external amplifying circuit. 
     On the other hand, if a voltage smaller than the reference voltage V 1  (a low level signal L) is applied to the input terminal S 1 , the transistor Q 1  is turned off and the transistor Q 2  is turned on, so that the transistor Q 6  outputs another control signal so as to turn on the another transistor of the not-shown external amplifying circuit. 
     In bipolar transistors, when the transistor is on, a voltage difference corresponding to one diode will occur between a base and an emitter of the transistor. In the above mentioned electronic switch circuit, therefore, if an input signal of zero volt is inputted to the input terminal S 1  as the low level signal (L), a forward bias is applied between the base and the collector of the transistor Q 2 , and therefore, the transistor Q 2  becomes difficult to turn on. 
     Assuming that a base-emitter voltage drop V BE  is 0.7 volts, if the input signal of zero volt is inputted to the input terminal S 1 , the collector of the transistor Q 2  is brought to 1.4 volts because of the turned-on transistors Q 6  and Q 8  and the emitter of the transistor Q 2  is brought to 0.7 volts because of the turned-on transistor Q 7 , so that a forward bias of 0.7 volts is applied between the base and the collector of the transistor Q 2 . Therefore, it is necessary to apply a voltage lower than the reference voltage V 1  to the input terminal S 1  in order to cause the transistor Q 6  to output the control signal, but, it is not a sufficient condition. Namely, under the above assumption, the voltage applied to the input terminal S 1  must be of 0.7 volts or more. Incidentally, this voltage is dependent upon a material of the transistor. In any case, a range of the switching voltage is limited. In addition, the transistors Q 3  and Q 7  can be omitted in the circuit shown in FIG. 1. In this case, however, the low level input voltage must be not smaller than 1.4 volts. 
     In general, the television receivers are such that an output signal outputted from a microcomputer is applied as the switching signal to the input terminal S1. However, the output signal of the microcomputer is for example 0 volt or 5 volts, and therefore, 0 volt is assigned to the low level signal. As mentioned above, if a signal of 0.7 volts or more is required as the low level signal, a new limitation is placed on a design of the output circuit of the microcomputer. 
     SUMMARY OF THE INVENTION 
     Accordingly, it is an object of the present invention to provide an electronic switch circuit which has overcome the above mentioned defect of the conventional one. 
     Another object of the present invention is to provide an electronic switch circuit capable of having a widened range of a switching voltage. 
     Still another object of the present invention is to provide an electronic switch circuit giving a reliable switching operation. 
     A further object of the present invention is to provide an electronic switch circuit which can be stably operated directly by an output signal from a microcomputer. 
     A still further object of the present invention is to provide an electronic switch circuit which can be easily implemented on a semiconductor integrated circuit. 
     The above and other objects of the present invention are achieved in accordance with the present invention by an electronic switch circuit for generating an output signal which is alternatively brought either into a first condition or into a second condition dependently upon a voltage level of an input signal. The electronic switch circuit comprises first and second transistors mutually connected in the form of a differential circuit, means for applying a first bias voltage to the first transistor, means for applying to the second transistor a second bias voltage of a constant level which is independent of the voltage level of the input signal and which is different from the first bias voltage, when the voltage level of the input signal is smaller than a predetermined voltage level, and means for changing the bias voltage for the second transistor so as to invert the large-and-small relation between the bias voltages of the first and second transistors when the voltage level of the input signal is not smaller than the predetermined voltage level. 
     The above and other objects, features and advantages of the present invention will be apparent from the following description of preferred embodiments of the invention with reference to the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of a conventional electronic switch circuit; 
     FIG. 2 is a circuit diagram of a first embodiment of the electronic switch circuit in accordance with the present invention; 
     FIG. 3 is a circuit diagram of a second embodiment of the electronic switch circuit in accordance with the present invention; and 
     FIG. 4 is a circuit diagram of a third embodiment of the electronic switch circuit in accordance with the present invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Referring to FIG. 2, there is shown a circuit diagram of a first embodiment of the electronic switch circuit in accordance with the present invention. 
     The shown electronic circuit includes a pair of PNP transistors Q 10  and Q 12  having their commonly connected emitters which are connected through a constant current source 10 to a high voltage supply line Vcc. A base of the transistor Q 10  is connected to an input terminal S 2 , and a collector of the transistor Q 10  is connected to a ground GND. On the other hand, a base of the transistor Q 12  is connected to a positive end of a reference voltage source V 2 , whose negative end is connected to the ground GND. A collector of the transistor Q 12  is connected to a base of a PNP transistor Q 14 . As seen from the above explanation and FIG. 2, a differential amplification circuit is formed by the transistors Q 10  and Q 12 . 
     A base of the PNP transistor Q 14  is connected to the high voltage supply line Vcc through a resistor R 2  and to the ground GND through a resistor R 3 . An emitter of the PNP transistor Q 14  is connected to an emitter of a PNP transistor Q 16 , and the commonly connected emitters of the PNP transistors Q 14  and Q 16  are connected through a constant current source 12 to the high voltage supply line Vcc, so that a differential amplification circuit is formed by the transistors Q 14  and Q 16 . 
     A collector of the transistor Q 14  is connected to a base of an NPN transistor Q 18  having a collector connected to the high voltage supply line Vcc and also to a collector of an NPN transistor Q 20  having an emitter connected to a base of the transistor Q 20  and to form a first output terminal. 
     A base of the transistor Q 16  is connected to a positive end of another reference voltage source V 3 , whose negative end is connected to the ground GND. A collector of the transistor Q 16  is connected to a base of an NPN transistor Q 22  having a collector connected to the high voltage supply line Vcc and also to a collector of an NPN transistor Q 24  having an emitter connected to the ground GND. An emitter of the transistor Q 22  is connected to a base of the transistor Q 24  and to form a second output terminal. 
     The transistors Q 18  and Q 20  and the transistors Q 22  and Q 24  are in the Wilson type connection, respectively, and constitute external control circuits, respectively. 
     In the above mentioned electronic switch circuit, the reference voltage V 3  is determined as follows: 
     
         {Vcc×R.sub.3 /(R.sub.2 +R.sub.3)}&lt;V.sub.3 
    
     
         V.sub.3 &lt;{Vcc×R.sub.3 /(R.sub.2 +R.sub.3)}+(R.sub.3 ×I.sub.2) 
    
     where I 2  is a constant current flowing through the transistor Q 12  when it is turned on. 
     Now, an operation of the first embodiment will be explained. 
     Assume that an input voltage V 4  applied to the input terminal S 2  varies between zero volt (the ground level) and Vcc. If V 4  &lt;V 2 , the transistor Q 10  is turned on, and a base voltage V 5  of the transistor Q 14  becomes as follows: 
     
         V.sub.5 =Vcc×R.sub.3 /(R.sub.2 +R.sub.3) 
    
     In this condition, the base voltage V 5  of the transistor Q 14  becomes smaller than the base voltage V 3  of the transistor Q 16 , and therefore, the transistor Q 14  is turned on so that a current I 01  is supplied through the transistor Q 18 . 
     If V 4  &gt;V 2 , the transistor Q 12  is turned on, so that the base voltage of the transistor Q 14  is raised to V 6 , which is higher than V 5  by (R 3  ×I 2 ). Therefore, since it becomes V 3  &lt;V 6 , the transistor Q 16  is turned on so that a current I 02  is supplied through the transistor Q 22 . 
     As seen from the above, it is in the first embodiment that the voltage level V 4  of the input signal as the switching instructing voltage can be freely determined by suitably setting the reference voltages V 2  and V 3 . In addition, even if the voltage level V 4  of the input signal is set to zero volt, the circuit can perform the switching operation. 
     Accordingly, the input voltage V 4  can have a wide tolerated range, and even if the high voltage supply voltage Vcc is low, a reliable and stable switching operation can be obtained. 
     Turning to FIG. 3, there is shown a circuit diagram of a second embodiment of the electronic switch circuit in accordance with the present invention. 
     The shown electronic circuit includes a pair of PNP transistors Q 26  and Q 28  having their commonly connected emitters which are connected through a constant current source 14 to a high voltage supply line Vcc, so that a differential amplification circuit is formed by the transistors Q 26  and Q 28 . A base of the transistor Q 26  is connected through a resistor R 4  to an input terminal S 3 , and a collector of the transistor Q 26  is connected to a base of an NPN transistor Q 30  having a collector connected to the high voltage supply line Vcc and also to a collector of an NPN transistor Q 32  having an emitter connected to the ground GND. An emitter of the transistor Q 30  is connected to a base of the transistor Q 32  and to form a first output terminal. 
     A base of the transistor Q 28  is connected to a positive end of a reference voltage source V 7 , whose negative end is connected to the ground GND. A collector of the transistor Q 28  is connected to a base of an NPN transistor Q 34  having a collector connected to the high voltage supply line Vcc and also to a collector of an NPN transistor Q 36  having an emitter connected to the ground GND. An emitter of the transistor Q 34  is connected to a base of the transistor Q 36  and to form a second output terminal. 
     Namely, the transistors Q 30  and Q 32  and the transistors Q 34  and Q 36  constitute external control circuits, respectively. 
     In addition, the base of the transistor Q 28 , namely the reference voltage V 7  is connected to a base of an NPN transistor Q 38 , which has a collector connected to the high voltage supply line Vcc, and an emitter connected to the base of the transistor Q 26 . With this arrangement, assuming that a base-emitter voltage of the transistor Q 38  is V BE , when the transistor Q 38  is in an ON condition, a base voltage V 8  of the transistor Q 26  becomes (V 7  -V BE ). Namely, V 8  =V 7  -V BE . 
     The electronic switch circuit shown in FIG. 3 operates as follows: 
     If an input voltage V 9  of the input terminal S 3  is smaller than the reference voltage V 7  (V 9  &lt;V 7 ), the transistor Q 38  is turned on, so that the base potential V 8  of the transistor Q 26  becomes lower than the reference voltage V 7  (V 8  &lt;V 7 ). As a result, the transistor Q 26  is turned on, and the transistor Q 30  outputs from its emitter an output current I 01  for a low level. 
     In this situation, even if the input voltage V 9  of the input terminal S 3  is zero volt, the base potential V 8  of the transistor Q 26  is biased by V 7  -V BE . 
     If the input voltage V 9  rises and reaches the voltage V 8 , the transistor Q 38  is turned off. Thereafter, the base potential of the transistor Q 26  is raised with increase of the input voltage V 9 . When the input voltage V 9  becomes larger than the reference voltage V 7 , the transistor Q 28  is turned on. As a result, the transistor Q 34  outputs from its emitter an output current I 02  for a high level. 
     As seen from the above, in this second embodiment, even if the input voltage V 9  as the switching voltage is zero volt, the base of the transistor Q 26  is properly biased by cooperation of the transistor Q 38  and the resistor R 4 , so that a stable switching operation is ensured. Therefore, a wide tolerated range is obtained for the input voltage V 9 , and an accurate switching operation is obtained even under a low supply voltage. 
     Referring to FIG. 4, there is shown a circuit diagram of a third embodiment of the electronic switch circuit in accordance with the present invention. 
     The shown electronic circuit includes an NPN transistor Q 40  having a base connected to an input terminal S 4 , and a collector connected to a high voltage supply line Vcc. An emitter of the transistor Q 40  is connected to a collector of another NPN transistor Q 42 . This transistor Q 42  has a base connected to the collector of the transistor Q 42  itself. Namely, the transistor Q 42  is connected in the form of a diode. An emitter of the transistor Q 42  is connected to an connection node of resistors R 5  and R 6  series-connected between the high voltage supply line Vcc and the ground GND. A connection node between the transistors Q 40  and Q 42  is connected to a base of a PNP transistor Q 44 . 
     An emitter of the PNP transistor Q 44  is connected to an emitter of an PNP transistor Q 46 , and the commonly connected emitters of the PNP transistors Q 44  and Q 46  are connected through a constant current source 16 to the high voltage supply line Vcc, so that a differential amplification circuit is formed by the transistors Q 44  and Q 46 . 
     A collector of the transistor Q 44  is connected to a base of an NPN transistor Q 48  having a collector connected to the high voltage supply line Vcc and also to a collector of an NPN transistor Q 50  having an emitter connected to the ground GND. An emitter of the transistor Q 48  is connected to a base of the transistor Q 50  and to form a first output terminal. 
     A collector of the transistor Q 46  is connected to a base of an NPN transistor Q 52  having a collector connected to the high voltage supply line Vcc and also to a collector of an NPN transistor Q 54  having an emitter connected to the ground GND. An emitter of the transistor Q 52  is connected to a base of the transistor Q 54  and to form a second output terminal. Thus, the transistors Q 48  and Q 50  and the transistors Q 52  and Q 54  constitute external control circuits, respectively. 
     A base of the transistor Q 46  is connected to an emitter of an NPN transistor Q 56  and an one end of a resistor R 7 , which is grounded at its other end. A base and a collector of the transistor Q 56  are commonly connected to one end of another resistor R 8 , which is connected at its other end to high voltage supply line Vcc. 
     The electronic switch circuit shown in FIG. 4 operates as follows: 
     If an input voltage V 12  of the input terminal S 4  is at zero volt, the transistor Q 40  is turned off. In this condition, a base potential V 11  of the transistor Q 44  is expressed as follows: 
     
         V.sub.11 ={R.sub.6 ×Vcc/(R.sub.5 +R.sub.6)}+V.sub.BE +(R.sub.6 ×I.sub.42) 
    
     where V BE  is a base-emitter voltage of the transistor Q 42 , I 42  is a current flowing through the transistor Q 42 . This current I 42  flowing through the transistor Q 42  corresponds to a base current of the transistor Q 44 . 
     Here, the circuit is set so that V 11  becomes lower than the base potential V 13  of the transistor Q 46 . Therefore, the transistor Q 44  is turned on, so that the transistor Q 48  outputs from its emitter an output current I 01  for a low level. 
     If the input voltage V 12  rises and becomes larger than the voltage V 11  by a base-emitter voltage V BE40  of the transistor Q 40 , the transistor Q 40  is turned on. Thereafter, the base potential of the transistor Q 44  is raised with increase of the input voltage V 12 . Namely, the base potential of the transistor Q 44  becomes (V 12  -V BE40 ). When the base potential of the transistor Q 44  becomes larger than the base potential V 13  of the transistor Q 46 , the transistor Q 44  is turned off. As a result, the output current I 01  for the low level is blocked, and the transistor Q 52  outputs from its emitter an output current I 02  for a high level. 
     As seen from the above, in this third embodiment, even if the input voltage V 12  as the switching voltage becomes low, the differential circuit is properly biased. In addition, since the bias can be freely set, a wide tolerated range is obtained for the input voltage V 12 , and an accurate switching operation obtained even under a low supply voltage. 
     In the third embodiment, each of the transistor Q 42  and the transistor Q 56  functions as a connection means having a level shift function. Therefore, each of the transistor Q 42  and the transistor Q 56  can be deleted or can be replaced with a resistor. 
     It will be apparent from the above mentioned description of the embodiments, that the PNP transistors and the NPN transistors in each of the embodiments can be replaced by NPN transistors and PNP transistors, respectively, taking a polarity of the voltage supply into consideration. In this case, the bias voltage for the differential circuit in each embodiment is inverted. In addition, if a condition of outputting a current is deemed as a first switch condition and if another condition of outputting no current is regarded as a second switch condition, it is sufficient if only one of the output currents I 01  and I 02  is used. 
     The invention has thus been shown and described with reference to the specific embodiments. However, it should be noted that the present invention is in no way limited to the details of the illustrated structures but changes and modifications may be made within the scope of the appended claims.