Abstract:
An input-separated switching device driving circuit in an equivalent power source for supplying a sourc3e current, the input-separated switching device driving circuit including: an input-separated switching device which includes a main switching device for switching a load current portion of the source current based on a first driving signal applied to a first driving signal input, and a sense switching device for switching another portion of the source current based on a second driving signal applied to a second driving signla input in order to check the intensity of the load current.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    (a) Field of the Invention  
           [0002]    The present invention relates to a MOS FET (metal oxide semidoncutor field effect transistor) driving circuit. More specifically, the present invention relates to a MOS FET with a main FET and a sense FET, and a driving circuit of the same.  
           [0003]    (b) Description of the Related Art  
           [0004]    In general, a current is allowed to flow thorugh a MOS FET when an electrical field is applied to a gate of the MOS FET to form a channel between the drain and the source of the MOS FET. The MOS FET can be switched on/off by contorlling the intensity of the electric field applied to the gate of the MOS FET.  
           [0005]    To switch the MOS FET on/off, a MOS FET driving circuit for contorlling the voltage applied to the gate of teh MOS FET and a sense FET for detecting the intensity of the current flowing to the MOS FET are required.  
           [0006]    [0006]FIG. 1 is a circuit diagram of a conventional MOS FET driving circuit.  
           [0007]    As shown in FIG. 1, the conventioanl MOS FET driving circuit senses load current I L  through a current sensing resistor R S  and thereby controls the drive of the mOS FET. This driving circuit is relatively simplified in construction such that upon a raid increase in the load current I L , under excessive conditions, the voltage applied to the current sensing resistor R S  is raised and the voltage V gs  between the gate and the source of the MOS FET is reduced. The effect is an increase in resistance R ds  between the drain and the source of the switched on MOS FET, which limits the load current and prevents a breakdown of the MOS FET.  
           [0008]    [0008]FIG. 2 is a circuit diagram of another conventional MOS FET driving circuit.  
           [0009]    As shown in FIG. 2, in another exmaple of the conventional MOS FET driving circuit, the drain of a main FET is connected to that of a sense FET and the gate of the main FET is connected to that of the sense FET. The source of the sense FET is connected to current sensing resistor R S . The main FET and the sense FET are contained in a single chip and are similar to each ohter in characteristics. But, a current ratio is set such that almost all the current flows towards the main FET to reduce energy consumtpion at the current sensing resistor.  
           [0010]    However, the conventional MOS FET driving circuit shown in FIG. 2 increases a voltage applied to the current sensing resistor R S  as the load current I L  rises so that the ratio of the current I main  flowing to the main FET and the current I sense  flowing to the sense FET becomes incorrect. Upon a rapid increase in the load current I L , under excessive conditions, the circuit raises the voltage applied to the current sensing resistor R S  and thereby lowers the voltages V gs  and V sense  of the sense FET but not the voltages V gs  and V main  of the main FET, thus inevitably incurring a breakdown of the main FET.  
         SUMMARY OF THE INVENTION  
         [0011]    It is an object of the rpesent invention to solve the abobe problems and to provide an input-separated switching device that has a sense FET so as to control the current accurately and prevent a breakdown of the MOS FET, and a driving circuit of the same.  
           [0012]    To achieve the soltuion to the problems with the prior art, the MOS FET and the MOS FET driving circuit according to the present invnetion include a main FET and a sense FET, in which the drain of the main FET is connected to the drain of the sense FET and the gate of the main FET is separated from the gate of the sense FET.  
           [0013]    In one aspect of the present invention, there is provided an input-separated switching device including: a main switching device for switching a laod current portion of the soruce current based on a first driving singal applied to a first driving signal input; and a sense switching device for switching another portion of the source current based on a second driving signal applied to a second driving signal input in order to check the intensity of the load current.  
           [0014]    The main switching device and the sense swithcing device are a main FET and a sense FET, respectively, wherein a drain of the main FET is connected to a drain of the sense FET, and hwerein a gate and a source of the main FET are separated from a gate and a srouce of the sense FET, respectively.  
           [0015]    In another aspect of the present invention, an input-separated switching device driving circuit includes an input-separated switching device, a current sensor, and a current ratio compensator.  
           [0016]    The input-separated switching device includes a main switching device for switching a load current portion of the source current based on a first driving signal applied to a first driving signal input, and a sense switching device for switching another portion of the source current based on a second driving signal applied to a second driving signal input in order to check the intensity of the load current.  
           [0017]    The current sensor forms a sensing voltage to check the intensity of the load current using current flowing to the sense switching device, the current sensor having one terminal thereof connected to the current output of the sense switching device.  
           [0018]    The current ratio compensator applies the sensing voltage to the second driving signal input. The current ratio compensator has a first terminal connected to one terminal of the current sensor, and a second terminal connected to the second driving signal input.  
           [0019]    In still another aspect of the present invention, an input-separated switching device driving circuit includes an input-separated switching device, a current sensor, and a current ratio compensator.  
           [0020]    The input-separated switching device includes a main switching device for switching a load current portion of the source current based on a first driving signal applied to a first driving signal input, and a sense switching device for switching another portion of the source current based on a second driving signal applied to a second driving signal input in order to check the intensity of the load current.  
           [0021]    The current sensor forms a sensing voltage to check intensity of the load current using current flowing to the sense switching device, the current sensor having one terminal thereof connected to a current output of the sense switching device.  
           [0022]    The current ratio compensator reduces a voltage applied to the first driving signal input by way of the sensing voltage, the current ratio compensator having a first terminal connected to one terminal of the current sensor, and a second terminal connected to the first driving signal input.  
           [0023]    In still another aspect of the present invention, an input-separated switching device driving circuit includes an input-separated switching device, a first delay circuit, a main switch driver, a second delay circuit, a sense switch driver, and a current sensor.  
           [0024]    The input-separated switching device includes a main switching device for switching a load current portion of a source current, and a sense switching device for switching another portion of the source current in order to check intensity of the load current.  
           [0025]    The first delay circuit receives the second control signal to delay a time, and outputs a delayed second control signal.  
           [0026]    The main switch driver switches on the main switching device based on the first control signal, and switches off the main switching device with a delay based on the second control signal output from the first delay circuit.  
           [0027]    The second delay circuit receives the first control signal to delay a time, and outputs a delayed first control signal;  
           [0028]    The sense switch driver switches on the sense switching device with a delay based on the first control signal output from the second delay circuit, and switches off the sense switching device based on the second control signal.  
           [0029]    The current sensor forms a sensing voltage to check the intensity of the load current using current flowing to the sense switching device, the current sensor having one terminal thereof connected to a current output of the sense switching device.  
           [0030]    The main switching device and the sense switching device are a main FET and a sense FET, respectively, wherein a drain of the main FET is connected to a drain of the sense FET, and wherein a gate and a source of the main FET are separated from a gate and a source of the sense FET, respectively. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0031]    The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention, and, together with the description, serve to explain the principles of the invention:  
         [0032]    [0032]FIG. 1 is a circuit diagram of a conventional MOS FET driving circuit, in accordance with the prior art;  
         [0033]    [0033]FIG. 2 is a circuit diagram of another conventional MOS FET driving circuit, in accordance with the prior art;  
         [0034]    [0034]FIG. 3 is a circuit diagram of an input-separated switching device according to an embodiment of the present invention;  
         [0035]    [0035]FIG. 4 is a circuit diagram of a switching device driving circuit according to a first embodiment of the present invention;  
         [0036]    [0036]FIG. 5 is a circuit diagram of a switching device driving circuit according to a second embodiment of the present invention; and  
         [0037]    [0037]FIG. 6 is a circuit diagram of a switching device driving circuit according to a third embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0038]    In the following detailed description, only the preferred embodiment of the invention has been shown and described, simply by way of illustration of the best mode contemplated by the inventor(s) of carrying out the invention. As will be realized, the invention is capable of modification in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not restrictive.  
         [0039]    Hereinafter, a description will be given as to a MOS FET with a sense FET, and a driving circuit for the MOS FET according to the present invention with reference to the accompanying drawings.  
         [0040]    [0040]FIG. 3 is a circuit diagram of an input-separated switching device according to an embodiment of the present invention.  
         [0041]    As shown in FIG. 3, the input-separated switching device according to the embodiment of the present invention includes a main FET  100  for switching a load current based on a driving signal, and a sense FET  200  for forming a feedback signal based on a second driving signal.  
         [0042]    The drain of the main FET  100  is connected to the drain of the sense FET  200 , and the gate and the source of the main FET  100  are separated from the gate and the source of the sense FET  200 , respectively. The main FET  100  and the sense FET  200  are contained in a single chip and have the same characteristics. The MOS FET according to the embodiment of the present invention has five terminals in total, i.e., one drain, two sources and two gates.  
         [0043]    [0043]FIG. 4 is a circuit diagram of a switching device driving circuit according to a first embodiment of the present invention.  
         [0044]    As shown in FIG. 4, the switching device driving circuit according to the first embodiment of the present invention includes an input-separated switching device  10 , a current sensor  300 , a current ratio compensator  400 , and a switching device protector  500 .  
         [0045]    The input-separated switching device  10  includes a main FET  100  and a sense FET  200 , in which the drain of the main FET  100  is connected to the drain of the sense FET  200 , and the gate and the source of the main FET  100  are separated from the gate and the source of the sense FET  200 , respectively.  
         [0046]    The current sensor  300  is to sense the intensity of the current flowing to the input-separated switching device  10  and is connected to the source of the sense FET  200 . The current sensor  300  according to the first embodiment of the present invention uses a resistor R S  in sensing the current, with one terminal of the resistor R S  connected to the source of the sense FET  200  and the other terminal being grounded.  
         [0047]    The current ratio compensator  400  is to compensate for the incorrectness of the ratio of the current flowing to the main FET  100  and the current flowing to the sense FET  200  that occurs when a voltage formed at the current sensor  300  by the current flowing to the current sensor  300  reduces the voltage applied between the gate and the source of the sense FET  200 . The current ratio compensator  400  according to the first embodiment of the present invention uses an adder, which has a first terminal connected to one terminal of the current sensor  300 , and a second terminal connected to the gate of the sense FET  200 .  
         [0048]    The MOS FET driving circuit shown in FIG. 2 has an incorrect current ratio when an increase in the intensity of the current flowing to the sense FET  200  raises a voltage applied to the current sensing resistor R S  and thereby reduces a voltage between the gate and the source of the sense FET  200 . Contrarily, the driving circuit of the input-separated switching device  10  according to the embodiment of the present invention, upon an increase in the intensity of the current flowing to the sense FET  200 , causes the current ratio compensator  400  to apply a voltage to the gate of the sense FET  200 . The voltage applied to the gate of the sense FET  200  by the current ratio compensator  400  will be as high as the voltage applied to the current sensor  300  and will thereby maintain the voltage between the gate and the source of the sense FET  200  in spite of an increase in the voltage applied to the current sensor  300 .  
         [0049]    The switching device protector  500  is to prevent a breakdown of the main FET  100  and the sense FET  200  caused by an excessive current flowing to the gates of the main FET  100  and the sense FET  200 . The switching device protector  500  senses the excessive current flowing to the gates of the main FET  100  and the sense FET  200  and sinks input signals of the gates of the main FET  100  and the sense FET  200 . The switching device protector  500  according to the first embodiment of the present invention uses first and second Zener diodes  510  and  520 , in which the second Zener diode  520  has a cathode connected to the gate of the main FET  100  and an anode being grounded, and the first Zener diode  510  has a cathode connected to a third terminal of the current ratio compensator  400  and an anode being grounded.  
         [0050]    Now, a description will be given in detail as to the operation of the switching device driving circuit according to the first embodiment of the present invention with reference to FIG. 4.  
         [0051]    The MOS FET driver outputs a driving signal to the gates of the main FET  100  and the sense FET  200  to drive the main FET  100  and the sense FET  200 . As the main FET  100  and the sense FET  200  are driven, the current flows between the drain and the source of the main FET  100  and of the sense FET  200 .  
         [0052]    The resistor R S  of the current sensor  300  detects the current flowing to the sense FET  200  to form a sensing voltage. This sensing voltage is applied to the current ratio compensator  400  that in turn applies the sensing voltage to the gate of the sense FET  200 . The sensing voltage is applied to the gate of the sense FET  200  so as to maintain the voltage between the gate and the source of the sense FET  200  even with an increase in the sensing voltage, thereby maintaining the ratio of the current flowing to the sense FET  200  to the current flowing to the main FET  100 .  
         [0053]    When an excessive voltage is applied to the gates of the main FET  100  and the sense FET  200  due to a factor, the first and second Zener diodes  510  and  520  of the switching device protector  500  are switched on to sink the signals applied to the gates of the main FET  100  and the sense FET  200 .  
         [0054]    Now, the second embodiment of the present invention will be described in detail with reference to the accompanying drawings.  
         [0055]    [0055]FIG. 5 is a circuit diagram of a switching device driving circuit according to a second embodiment of the present invention.  
         [0056]    As shown in FIG. 5, the switching device driving circuit according to the second embodiment of the present invention includes an input-separated switching device  10 , a current sensor  300 , a current ratio compensator  400 , and a switching device protector  500 .  
         [0057]    The input-separated switching device  100  and the current sensor  300  are the same as described in the first embodiment and will not be further described herein.  
         [0058]    The current ratio compensator  400  is to compensate for the incorrectness of the ratio of the current flowing to the main FET  100  to that of the current flowing to the sense FET  200  that occurs when a voltage formed at the current sensor  300  by the current flowing to the current sensor  300  reduces a voltage between the gate and the source of the sense FET  200 . The current ratio compensator  400  according to the second embodiment of the present invention uses an adder that has a first terminal connected to one terminal of the current sensor  300  and a second terminal connected to the gate of the main FET  100 .  
         [0059]    Accordingly, when an increase in the intensity of the current flowing to the sense FET  200  raises a voltage applied to the current sensor  300  and reduces a voltage between the gate and the source of the sense FET  200 , the current ratio compensator  400  reduces the voltage between the gate and the source of the main FET  100 . The voltage is reduced by the decrement of the voltage between the gate and the source of the sense FET  200  so as to maintain the ratio of the current flowing to the main FET  100  with that of the current flowing to the sense FET  200 . In addition, the current ratio compensator  400  also reduces the voltage between the gate and the source of the main FET  100  by the sensing voltage in order to protect the main FET  100 .  
         [0060]    The switching device protector  500  is to prevent a breakdown of the main FET  100  and the sense FET  200  caused by an excessive current flowing to the gates of the main FET  100  and the sense FET  200 . The switching device protector  500  senses the excessive current flowing to the gates of the main FET  100  and the sense FET  200  and sinks input signals of the gates of the main FET  100  and the sense FET  200 .  
         [0061]    The switching device protector  500  according to the second embodiment of the present invention uses third and fourth Zener diodes  530  and  540 , in which the fourth Zener diode  540  has a cathode connected to the third terminal of the current ratio compensator  400  and an anode being grounded, and the third Zener diode  530  has a cathode connected to the gate of the sense FET  200  and an anode being grounded.  
         [0062]    Now, a description will be given in detail as to the operation of the switching device driving circuit according to the second embodiment of the present invention with reference to FIG. 5.  
         [0063]    The MOS FET driver outputs a driving signal to the gates of the main FET  100  and the sense FET  200  to drive the main FET  100  and the sense FET  200 . As the main FET  100  and the sense FET  200  are driven, the current flows to the main FET  100  and the sense FET  200 .  
         [0064]    The resistor R S  of the current sensor  300  detects the current flowing to the sense FET  200  to form a sensing voltage. This sensing voltage is applied to the current ratio compensator  400  that in turn reduces the voltage applied to the gate of the main FET  100  by the sensing voltage to increase the sensing voltage and reduces the voltage between the gate and the source of the main FET  100  by as much as the reduced voltage between the gate and the source of the sense FET  200 , thus maintaining the ratio of the current flowing to the main FET  100  with that of the current flowing to the sense FET  200 .  
         [0065]    The current ratio compensator  400  according to the second embodiment of the present invention reduces the voltage applied to the gate of the main FET  100  by way of the sensing voltage to prevent a breakdown of the main FET  100  that may otherwise occur due to an excessive voltage.  
         [0066]    When an excessive voltage is applied to the gates of the main FET  100  and the sense FET  200  due to a factor during the operation of the switching device driving circuit, the third and fourth Zener diodes  530  and  540  of the switching device protector  500  are switched on to sink the signals applied to the gates of the main FET  100  and the sense FET  200  and thereby protect the main FET  100  and the sense FET  200 .  
         [0067]    As described above, the driving circuit controls the main FET  100  and the sense FET  200  separately using a five-terminal MOS FET to maintain the ratio of the current flowing to the main FET  100  to the current flowing to the sense FET  200 .  
         [0068]    [0068]FIG. 6 is a circuit diagram of a switching device driving circuit according to a third embodiment of the present invention.  
         [0069]    As shown in FIG. 6, the switching device driving circuit according to the third embodiment of the present invention includes an input-separated switching device  10 , a current sensor  300 , a first switching device protector  510 , a second switching device protector  520 , a sense FET driver  610 , a first delay circuit  620 , a main FET driver  630 , and a second delay circuit  640 .  
         [0070]    The input-separated switching device  10 , the current sensor  300 , and the first and second switching device protectors  510  and  520  are the same as described in the first embodiment and will not be further described herein. Unlike the first and second embodiments, the cathodes of the first and second switching device protectors  510  and  520  are connected to the gates of the sense FET  200  and the main FET  100 , respectively, to protect the main FET  100  and the sense FET  200  when an excessive voltage is applied to the gates of the main FET  100  and the sense FET  200 .  
         [0071]    The sense FET driver  610  outputs an on/off signal of the sense FET  200  based on first and second control signals Q and {overscore (Q)}, which are opposite to each other in truth value. The sense FET driver  610  is composed of two bipolar junction transistors (BJT), i.e., first and second switches  611  and  613 , in which the first switch  611  has a collector connected to power source V CC , a base connected to the first conrol singla Q, and an emitter connected to the collector of the second switch  613 .  
         [0072]    The first delay circuit  620  delays the second control signal {overscore (Q)} and outputs the delayed second control signal to the base fo the second switch  613 .  
         [0073]    The main FET driver  630  outputs an on/off signal of the main FET  100  based on the first and second control signals Q and {overscore (Q)}. The main FET driver  630  is composed of two BJT&#39;s, i.e., third and fourth switches  631  and  633 , in which the collector of the third switch  631  is connected to a power source V CC , the collector of the fourth switch  633  is connected to the emitter of the third switch  631 , and the base of the fourth switch  633  is connected to the input of the second control signal {overscore (Q)}.  
         [0074]    The second delay circuit  640  delays the first control signal Q and outputs the delayed first control signal to the base of the third switch  631 .  
         [0075]    As described above, the third embodiment of the present invention has the gate of the main FET  100  separated from the gate of the sense FET  200  so that the main FET  100  and the sense FET  200  can be switched on/off with a delay as set by the designer. The third embodiment of the present invention causes the main FET  100  to be switched on slowly and off rapidly, while it switches the sense FET  200  on rapidly and off slowly.  
         [0076]    While this invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.  
         [0077]    For example, in place of the main FET and the sense FET other switching devices may be used.  
         [0078]    As described above, the input-separated switching device and a driving circuit thereof according to the present invention not only maintains the ratio of the current flowing to the main FET to the current flowing to the sense FET, but also prevents a breakdown of the gate-separated MOS FET.