Abstract:
A method of forming a wire bond having a free end includes joining an end of a metal wire to a conductive element at a surface of a first component, the end of the metal wire being proximate a surface of a bonding tool adjacent an aperture through which the metal wire extends. A predetermined length of the metal wire is drawn out from the aperture. The surface of the bonding tool is used to plastically deform a region of the metal wire between the surface of the bonding tool and a metal element at the surface of the first component. The bonding tool then applies tension to the metal wire to cause a first portion of the metal wire having the end joined to the conductive element to detach from a remaining portion of the metal wire at the plastically deformed region.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    Microelectronic devices such as semiconductor chips typically require many input and output connections to other electronic components. The input and output contacts of a semiconductor chip or other comparable device are generally disposed in grid-like patterns that substantially cover a surface of the device (commonly referred to as an “area array”) or in elongated rows which may extend parallel to and adjacent each edge of the device&#39;s front surface, or in the center of the front surface. Typically, devices such as chips must be physically mounted on a substrate such as a printed circuit board, and the contacts of the device must be electrically connected to electrically conductive features of the circuit board. 
         [0002]    Semiconductor chips are commonly provided in packages that facilitate handling of the chip during manufacture and during mounting of the chip on an external substrate such as a circuit board or other circuit panel. For example, many semiconductor chips are provided in packages suitable for surface mounting. Numerous packages of this general type have been proposed for various applications. Most commonly, such packages include a dielectric element, commonly referred to as a “chip carrier” with terminals formed as plated or etched metallic structures on the dielectric. These terminals typically are connected to the contacts of the chip itself by features such as thin traces extending along the chip carrier itself and by fine leads or wires extending between the contacts of the chip and the terminals or traces. In a surface mounting operation, the package is placed onto a circuit board so that each terminal on the package is aligned with a corresponding contact pad on the circuit board. Solder or other bonding material is provided between the terminals and the contact pads. The package can be permanently bonded in place by heating the assembly so as to melt or “reflow” the solder or otherwise activate the bonding material. 
         [0003]    Many packages include solder masses in the form of solder balls, typically about 0.1 mm and about 0.8 mm (5 and mils) in diameter, attached to the terminals of the package. A package having an array of solder balls projecting from its bottom surface is commonly referred to as a ball grid array or “BGA” package. Other packages, referred to as land grid array or “LGA” packages are secured to the substrate by thin layers or lands formed from solder. Packages of this type can be quite compact. Certain packages, commonly referred to as “chip scale packages,” occupy an area of the circuit board equal to, or only slightly larger than, the area of the device incorporated in the package. This is advantageous in that it reduces the overall size of the assembly and permits the use of short interconnections between various devices on the substrate, which in turn limits signal propagation time between devices and thus facilitates operation of the assembly at high speeds. 
         [0004]    Packaged semiconductor chips are often provided in “stacked” arrangements, wherein one package is provided, for example, on a circuit board, and another package is mounted on top of the first package. These arrangements can allow a number of different chips to be mounted within a single footprint on a circuit board and can further facilitate high-speed operation by providing a short interconnection between packages. Often, this interconnect distance is only slightly larger than the thickness of the chip itself. For interconnection to be achieved within a stack of chip packages, it is necessary to provide structures for mechanical and electrical connection on both sides of each package (except for the topmost package). This has been done, for example, by providing contact pads or lands on both sides of the substrate to which the chip is mounted, the pads being connected through the substrate by conductive vias or the like. Solder balls or the like have been used to bridge the gap between the contacts on the top of a lower substrate to the contacts on the bottom of the next higher substrate. The solder balls must be higher than the height of the chip in order to connect the contacts. Examples of stacked chip arrangements and interconnect structures are provided in U.S. Patent App. Pub. No. 2010/0232129 (“the &#39;129 Publication”), the disclosure of which is incorporated by reference herein in its entirety. 
         [0005]    Microcontact elements in the form of elongated posts or pins may be used to connect microelectronic packages to circuit boards and for other connections in microelectronic packaging. In some instances, microcontacts have been formed by etching a metallic structure including one or more metallic layers to form the microcontacts. The etching process limits the size of the microcontacts. Conventional etching processes typically cannot form microcontacts with a large ratio of height to maximum width, referred to herein as “aspect ratio”. It has been difficult or impossible to form arrays of microcontacts with appreciable height and very small pitch or spacing between adjacent microcontacts. Moreover, the configurations of the microcontacts formed by conventional etching processes are limited. Various packages have been developed that use wire bonds to replace the elongated posts or pins used to interconnect microelectronic packages. However the speed and accuracy with which such wire bonds are formed has presented challenges, particularly with respect to consistent height and positioning of the ends of the wire bonds. 
       BRIEF SUMMARY OF THE INVENTION 
       [0006]    An aspect of the present disclosure relates to a method of forming a wire bond having a free end. The method includes joining an end of a metal wire to a conductive element at a surface of a first component, the end of the metal wire being proximate a surface of a bonding tool adjacent an aperture through which the metal wire extends, and drawing a predetermined length of the metal wire out from the aperture. Then, the surface of the bonding tool is used to plastically deform a region of the metal wire between the surface and a metal element at the surface of the first component. The method then includes using the bonding tool to apply tension to the metal wire to cause a first portion of the metal wire having the end joined to the conductive element to detach from a remaining portion of the metal wire at the plastically deformed region with the first portion forming a wire bond extending from the joined end to a free end of the wire bond remote from the conductive element. 
         [0007]    In an example, the metal element can be a portion of a conductive circuit structure included within the first component. The portion of the conductive circuit structure is selected from at least one of a trace, a pad, a plating, line, a power plane, and a ground plane. 
         [0008]    The bonding tool can be a capillary and the surface can be a face of the capillary. In an example, the bonding tool can be a bonding wedge and the surface can be a face of the bonding wedge. 
         [0009]    The method can further include moving the bonding tool to a position over the metal element such that a portion of the length of wire is between the surface and the metal element. The movement of the bonding tool can then for a first bend in a portion of the wire between the surface and the joined end. After the step of applying pressure, the method can include moving the bonding tool to a predetermined position approximating a desired position of the free end of the wire bond, thereby forming a second bend in a portion of the wire bond adjacent the joined end. The step of applying tension can cause at least partial straightening of the first bend. In a further example, the steps of applying pressure and applying tension can impart a shape on the wire bond such that the wire bond defines an axis between the free end and the base, the wire bond being bent to extend away from the axis on a plane, the entire wire bond being substantially positioned on the plane on a single side of the axis. 
         [0010]    The plastically deformed region of the metal wire can defines an axis that is displaced from an axis of an adjacent portion of the wire in at least one direction. 
         [0011]    The conductive element can be one of a plurality of conductive elements at the surface of the substrate and the metal element can be one of a plurality of metal elements at the surface of the substrate. In such an example, the step of applying tension can form another end on the remaining portion of the wire, and the method can include repeating the steps of joining, drawing, plastically deforming, and applying tension to form a plurality of wire bonds extending away from at least some of the conductive elements to respective free ends remote from the conductive elements. Such a method can further include forming a dielectric encapsulation layer so as to at least partially cover the surface of the substrate and portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by at least the ends of the wire bonds that are uncovered by the encapsulation layer. 
         [0012]    Another aspect of the present disclosure relates to a method for making a microelectronic package. The method includes forming a plurality of wire bonds on an in-process unit. The in-process unit includes a substrate having a first surface and a second surface remote therefrom, a plurality of conductive elements exposed at the first surface, and a plurality of metal elements at the surface of the substrate and defined separately from the conductive elements. The formation of at least some of the wire bonds includes joining an end of a metal wire to one of the conductive elements, the end of the metal wire proximate a surface of a bonding tool adjacent an aperture through which the metal wire extends. The formation further includes drawing a predetermined length of the metal wire out from the aperture, and then using the surface of the bonding tool to plastically deform a region of the metal wire between the surface and one of the metal elements. Using the bonding tool, tension is applied to the metal wire to cause a first portion of the metal wire having the end joined to the conductive element to detach from a remaining portion of the metal wire at the plastically deformed region. The first portion forms a wire bond extending from the joined end to a free end of the wire bond remote from the conductive element. A dielectric encapsulation layer is then formed on the in process unit. The encapsulation layer is formed so as to at least partially cover the first surface and portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by at least the ends of the wire bonds that are uncovered by the encapsulation layer. 
         [0013]    The method can further include mounting a microelectronic element to the substrate and electrically interconnecting the microelectronic element with at least some of the conductive elements. 
         [0014]    In one example, the formation of at least some of the wire bonds can include forming a bend in the wire segment before the step of applying tension. In another example, the first portion of the wire detaching from the remaining portion can form tips of the wire bonds on which the ends are defined. In such an example, the wire bonds can define a first diameter between the bases and the tips, and the tips can have at least one dimension that is smaller than the respective first diameters. 
         [0015]    Another aspect of the present disclosure relates to a microelectronic package, including a substrate having a first surface, a plurality of conductive elements at the first surface, and a plurality of metal elements exposed at the first surface and defined separately from the conductive elements. The package further includes a plurality of wire bonds having first ends joined to at least some of the conductive elements and extending away therefrom to respective free ends remote from the conducive elements. A dielectric encapsulation layer at least partially covers the surface of the substrate and completely covers the metal elements. The dielectric encapsulation layer further covers portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by at least the free ends of the wire bonds that are uncovered by the encapsulation layer. 
         [0016]    The microelectronic can further include a microelectronic element mounted on the substrate and electrically connected with at least some of the conductive elements. 
         [0017]    In an example, at least one of the wire bonds can define an axis between the free end and the base thereof. Such a wire bond can be bent to extend away from the axis on a plane with the entire wire bond being substantially positioned on the plane on a single side of the axis. 
         [0018]    At least some of the metal elements can be unitary with at least some of the conductive elements in a plurality of conductive metal pads such that the metal elements are defined separately from the conductive elements by extending beyond portions of the conductive metal pads that are sized to receive the bases of the wire bonds thereon. Additionally or alternatively, the metal elements can be further defined separately from the conductive elements by having a width that is less than a diameter of the conductive elements. At least some of the metal elements can have wire marks thereon. Further, at least some of the wire bonds can include bonding tool marks thereon. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0019]      FIG. 1  shows a microelectronic package including a plurality of wire bonds thereon according to an aspect of the present disclosure. 
           [0020]      FIG. 2  shows a schematic side view of a microelectronic package similar to that shown in  FIG. 1 . 
           [0021]      FIG. 3  shows a detail view of the microelectronic package of  FIG. 1 . 
           [0022]      FIGS. 4-9  show a microelectronic package during various steps of a fabrication method according to another aspect of the present disclosure. 
           [0023]      FIGS. 10A-10C  are detail views of various wire bonds that can be fabricated according to a method of the present disclosure and can be included in a microelectronic package similar to that of  FIG. 2 . 
           [0024]      FIG. 11  is a further detail view of a portion of the wire bond shown in  FIG. 10A . 
           [0025]      FIGS. 12 and 13  show a microelectronic package during various steps of an alternative fabrication method according to another aspect of the present disclosure. 
           [0026]      FIG. 14  shows a system that can include a microelectronic package as described herein. 
       
    
    
     DETAILED DESCRIPTION 
       [0027]    Turning now to the figures, where similar numeric references are used to indicate similar features, there is shown in  FIG. 1  a microelectronic assembly  10  according to an embodiment of the present invention. The embodiment of  FIG. 1  is a microelectronic assembly in the form of a packaged microelectronic element such as a semiconductor chip assembly that is used in computer or other electronic applications. 
         [0028]    The microelectronic assembly  10  of  FIGS. 1 and 2  includes a substrate  12  having a first surface  14  and a second surface  16 . The substrate  12  typically is in the form of a dielectric element, which is substantially flat. The dielectric element may be sheet-like and may be thin. In particular embodiments, the dielectric element can include one or more layers of organic dielectric material or composite dielectric materials, such as, without limitation: polyimide, polytetrafluoro-ethylene (“PTFE”), epoxy, epoxy-glass, FR-4, BT resin, thermoplastic, or thermoset plastic materials. The first surface  14  and second surface  16  are preferably substantially parallel to each other and are spaced apart at a distance perpendicular to the surfaces  14 , 16  defining the thickness of the substrate  12 . The thickness of substrate  12  is preferably within a range of generally acceptable thicknesses for the desired application. In an embodiment, the distance between the first surface  14  and the second surface  16  is between about 25 and 500 μm. For purposes of this discussion, the first surface  14  may be described as being positioned opposite or remote from second surface  16 . Such a description, as well as any other description of the relative position of elements used herein that refers to a vertical or horizontal position of such elements is made for illustrative purposes only to correspond with the position of the elements within the Figures, and is not limiting. 
         [0029]    In an example, substrate  12  is considered as divided into a first region  18  and a second region  20 . The first region  18  lies within the second region  20  and includes a central portion of the substrate  12  and extends outwardly therefrom. The second region  20  substantially surrounds the first region  18  and extends outwardly therefrom to the outer edges of the substrate  12 . In this embodiment, no specific characteristic of the substrate itself physically divides the two regions; however, the regions are demarked for purposes of discussion herein with respect to treatments or features applied thereto or contained therein. 
         [0030]    A microelectronic element  22  can be mounted to first surface  14  of substrate  12  within first region  18 . Microelectronic element  22  can be a semiconductor chip or another comparable device. In the embodiment of  FIG. 1 , microelectronic element  22  is mounted to first surface  14  in what is known as “flip-chip”, or face down, configuration, where contacts  23  on the microelectronic element  22  can face and be connected to conductive elements  17  within first region  18  by electrically conductive bumps  25  (e.g., solder bumps, micropillars, or the like) that are positioned beneath microelectronic element  22 . In another configuration, a microelectronic element can be mounted face-up on a substrate and can be electrically connected to a conductive feature on the chip by wire leads that extend over an outwardly-facing surface of the substrate. In such an example the wire leads can pass through an opening in the substrate and can be encapsulated by an overmold. In another example, the microelectronic element can be mounted in a conventional or “face-up” fashion. In such a configuration, wire leads (not shown) can be used to electrically connect the microelectronic element to some of a plurality of conductive elements  28  at first surface  14 . Such wire leads can also be joined to traces  46  or other conductive features within substrate  12  that are, in turn, connected to conductive elements  28 . 
         [0031]    Conductive elements  28  are at the first surface  14  of substrate  12  and include respective contact portions  30 . As used in the present description, when an electrically conductive element is described as being “at” the surface of another element having dielectric structure, it indicates that the electrically conductive structure is available for contact with a theoretical point moving in a direction perpendicular to the surface of the dielectric structure toward the surface of the dielectric structure from outside the dielectric structure. Thus, a terminal or other conductive structure that is at a surface of a dielectric structure may project from such surface; may be flush with such surface; or may be recessed relative to such surface and exposed through a hole or depression in the dielectric. 
         [0032]    Conductive elements  28  can be flat, thin elements in which contact portion  30  is at first surface  14  of substrate  12 . Conductive elements  28  can be of a solid metal material such as copper, gold, nickel, or other materials that are acceptable for such an application, including various alloys including one or more of copper, gold, nickel or combinations thereof. In one example, conductive elements  28  can be substantially circular and can be interconnected between each other or to microelectronic element  22  by traces (not shown). 
         [0033]    As shown in the detail view of  FIG. 3 , at least some of the conductive elements  28  can further include a bearing portion  26  that is also at first surface  14  of substrate  12 . Bearing portion  26  can be continuous with and extend outwardly from or adjacent to contact portion  30  and can provide an additional metal surface or area for use in the fabrication of additional features of the assembly  10 , as will be discussed below. The arrangement of both a contact portion and a bearing portion  26  within at least some of the conductive elements  28  can give such contact elements  28  an oblong shape such as an oval, rounded rectangle, pear or eggplant-shaped configuration. Other shapes and configurations are also possible to carry out the function of bearing portion  26  described below. As a further alternative, some conductive elements  28  can include a bearing portion  26  alone, without a contact portion  30  and can be present at a surface  14  of a substrate  12  that includes other conductive elements  28  with both a contact portion  30  and a bearing portion  26 , or a contact portion  30  only. 
         [0034]    Conductive elements  28  can be formed at least within second region  20  of substrate  12 . Additionally, in certain examples, some conductive elements  17  can also be formed within first region  18 . Such an arrangement is particularly useful when mounting microelectronic element  22  in the flip-chip configuration of  FIGS. 1 and 2 . In such an example, the conductive elements  15  can be without a bearing portion. 
         [0035]    At least some of conductive elements  28  can be interconnected to corresponding terminals  40 , such as conductive pads, exposed at second surface  16  of substrate  12 . Such an interconnection can be completed using vias  41  formed in substrate  12  that can be lined or filled with conductive metal that can be of the same material as conductive elements  28  and  40 . Optionally, conductive elements  40  can be further interconnected by traces on substrate  12 . 
         [0036]    Microelectronic assembly  10  further includes a plurality of wire bonds  32  joined to at least some of the conductive elements  28  on the contact portions  30  thereof. Wire bonds  32  are joined at a base  34  thereof to the conductive elements  28  and extend to a corresponding free end  36  remote from the base  34  and from substrate  12 . The ends  36  of wire bonds  32  are characterized as being free in that they are not connected or otherwise joined to microelectronic element  22  or any other conductive features within microelectronic assembly  10  that are, in turn, connected to microelectronic element  22 . In other words, free ends  36  are available for electronic connection, either directly or indirectly as through a solder ball or other features discussed herein, to a conductive feature of a component external to assembly  10 , such as, for example, another such assembly  10 , a microelectronic element, or a microelectronic package. The fact that ends  36  held in a predetermined position by, for example, encapsulant layer  42  (shown in  FIG. 2 ) or otherwise joined or electrically connected to another external component does not mean that they are not “free”. Conversely, base  34  is not free as it is either directly or indirectly electrically connected to microelectronic element  22 , as described herein. As shown in  FIG. 2 , base  34  can be substantially rounded in shape, extending outward from an edge surface  37  (as shown, for example, in  FIGS. 10A-C ) of wire bond  32  defined between base  34  and end  36 . The particular size and shape of base  34  can vary according to the type of material used to form wire bond  32 , the desired strength of the connection between wire bond  32  and conductive element  28 , or the particular process used to form wire bond  32 . Example methods for making wire bonds  32  are and are described in U.S. Pat. No. 7,391,121 to Otremba and in U.S. Pat. App. Pub. Nos. 2012/0280386 (“the &#39;386 Publication”) and 2005/0095835 (“the &#39;835 Publication,” which describes a wedge-bonding procedure that can be considered a form of wire bonding) the disclosures of which are incorporated herein by reference in their entireties. Alternative configurations are possible where wire bonds  32  are additionally or alternatively joined to conductive elements that are exposed on second surface  16  of substrate  12 , extending away therefrom. 
         [0037]    Wire bonds  32  can be made from a conductive material such as copper, gold, nickel, solder, aluminum or the like. Additionally, wire bonds  32  can be made from combinations of materials, such as from a core of a conductive material, such as copper or aluminum, for example, with a coating applied over the core. The coating can be of a second conductive material, such as aluminum, nickel or the like. Alternatively, the coating can be of an insulating material, such as an insulating jacket. In an example, the wire used to form wire bonds  32  can have a thickness, i.e., in a dimension transverse to the wire&#39;s length, of between about 15 μm and 150 μm. In other examples, including those in which wedge bonding is used, wire bonds  32  can have a thickness of up to about 500 μm. In general, a wire bond is formed on a conductive element, such as conductive element  28  within contact portion  30  using specialized equipment. 
         [0038]    As described further below, during formation of a wire bond of the type shown and described herein, a leading end of a wire segment is heated and pressed against the receiving surface to which the wire segment bonds, typically forming a ball or ball-like base  34  joined to the surface of the conductive element  28 . The desired length of the wire segment to form the wire bond is drawn out of the bonding tool, which can then cut the wire bond at the desired length. Wedge bonding, which can be used to form wire bonds of aluminum, for example, is a process in which the heated portion of the wire is dragged across the receiving surface to form a wedge that lies generally parallel to the surface. The wedge-bonded wire bond can then be bent upward, if necessary, and extended to the desired length or position before cutting. In a particular embodiment, the wire used to form a wire bond can be cylindrical in cross-section. Otherwise, the wire fed from the tool to form a wire bond or wedge-bonded wire bond may have a polygonal cross-section such as rectangular or trapezoidal, for example. 
         [0039]    The free end  36  of wire bond  32  has an end surface  38 . End surface  38  can form at least a part of a contact in an array formed by respective end surfaces  38  of a plurality of wire bonds  32 .  FIG. 1  shows an example pattern for such an array of contacts formed by end surfaces  38 . Such an array can be formed in an area array configuration, variations of which could be implemented using the structures described herein. Such an array can be used to electrically and mechanically connect the microelectronic assembly  10  to another microelectronic structure, such as to a printed circuit board (“PCB”), or to other packaged microelectronic elements. In such a stacked arrangement, wire bonds  32  and conductive elements  28  can carry multiple electronic signals therethrough, each having a different signal potential to allow for different signals to be processed by different microelectronic elements in a single stack (in an example, conductive elements  28  can be connected with vias (not shown) that extend through substrate  12  to additional contacts at second surface  16 , or conductive elements  28  can be vias themselves). Solder masses can be used to interconnect the microelectronic assemblies in such a stack, such as by electronically and mechanically attaching end surfaces to conductive elements. Examples of stacked configurations using microelectronic assemblies with arrays of exposed ends of wire bonds are shown and described in, for example, the &#39;386 Publication. 
         [0040]    Microelectronic assembly  10  further includes an encapsulation layer  42  formed from a dielectric material. As shown in  FIG. 2 , encapsulation layer  42  extends over the portions of first surface  14  of substrate  12  that are not otherwise covered by or occupied by microelectronic element  22 , or conductive elements  28 . Similarly, encapsulation layer extends over the portions of conductive elements  28 , including bearing portions  26  and areas of contact portions  30  that are not otherwise covered by bases  34  of wire bonds  32 . Encapsulation layer  42  can also substantially cover microelectronic element  22 , wire bonds  32 , including the bases  34  and at least a portion of edge surfaces  37  thereof. A portion of wire bonds  32  can remain uncovered by encapsulation layer  42 , which can also be referred to as an unencapsulated portion, thereby making the wire bond available for electrical connection to a feature or element located outside of encapsulation layer  42 . In the examples shown in the Figures, a surface, such as major surface  44  of encapsulation layer  42  can be spaced apart from first surface  14  of substrate  12  at a distance great enough to cover microelectronic element  22 . Accordingly, examples of microelectronic assembly  10  in which ends  38  of wire bonds  32  are flush with surface  44 , will include wire bonds  32  that are taller than the microelectronic element  22 , and any underlying solder bumps for flip chip connection. Other configurations for encapsulation layer  42 , however, are possible. For example, the encapsulation layer can have multiple surfaces with varying heights. In such a configuration, the surface  44  within which ends  38  are positioned can be higher or lower than an upwardly facing surface under which microelectronic element  22  is located. 
         [0041]    Encapsulation layer  42  serves to protect the other elements within microelectronic assembly  10 , particularly wire bonds  32 . This allows for a more robust structure that is less likely to be damaged by testing thereof or during transportation or assembly to other microelectronic structures. Encapsulation layer  42  can be formed from a dielectric material with insulating properties such as that described in U.S. Patent App. Pub. No. 2010/0232129, which is incorporated by reference herein in its entirety. 
         [0042]    The example of wire bonds  32  shown in  FIG. 2 , which are shown in further detail in  FIGS. 10A and 11 , define a particular curved shape that can be imparted on the wire bonds  32  by a process of making the wire bonds  32  that utilizes the bearing portions  26  of the conductive elements  28 . Such a method is further described below in connection with  FIGS. 4-9 . The shape of wire bonds  32  is such that the end surfaces  38  are aligned along an axis  50  with a base end  35  of the wire bond  32  that is immediately adjacent the base  34 . In the example of wire bond  32  shown in  FIGS. 2 and 10A , the axis is generally perpendicular to the contact portion  30  such that the end surface  38  is positioned directly above the base end  35 . Such a configuration can be useful for a plurality of wire bonds  32  in an array wherein the array of connections on major surface  44  of encapsulation layer  42  are intended to have a pitch that generally matches a pitch of the conductive elements  28  to which the wire bonds  32  are respectively joined. In such a configuration, the axis  50  can also be angled with respect to contact portion  30  such that end surface  38  is offset slightly from the base end  35  but is still positioned above base  34 . In such an example, the axis  50  can be at an angle of 85° to 90° with respect to contact portion  30 . 
         [0043]    Wire bond  32  can be configured such that a first portion  52  thereof, on which the end surface  38  is defined, extends generally along a portion of the axis  50 . The first portion  52  can have a length that is between about 10% and 50% of the total length of wire bond  32  (as defined by the length of axis  50 , for example). A second portion  54  of the wire bond  32  is curved, or bent, so as to extend away from the axis from a location adjacent the first portion  52  to an apex  56  that is spaced apart from the axis  50 . The second portion  54  is further curved so as to be positioned along axis  50  at a location at or near base end  35  and to also extend away from the axis  50  to apex  56  from the side of base end  35 . It is noted that first portion  52  need not be straight or follow axis  50  exactly and that there may be some degree of curvature or variation therein. It is also noted that there may be abrupt or smooth transitions between first portion  52  and second portion  54  that may themselves be curved. It is noted, however, that the wire bonds  32  depicted in  FIGS. 2 and 10A , including second portion  54 , are further configured to lie on a single plane on which axis  50  also lies. 
         [0044]    Further, both first  52  and second  54  portions of the wire bond  32  are configured such that any portions thereof that do not intersect axis  50  are all on one side of axis  50 . That is, some portions of first and second portions  52  and  54  may be, for example, on a side of axis  50  opposite the apex  56  of the curved shape defined by second portion  54 ; however, any such portions would be in areas of the wire bond  32  that axis  50  intersects at least partially. In other words, first and second portions  52  and  54  of wire bond  32  are configured to not fully cross axis  50  such that the edge surface  37  within those portions is only spaced apart from axis  50  on a single side of axis  50 . In the example of  FIG. 10A  the plane can be along the page on which the illustration of wire bond  32  is presented. 
         [0045]      FIGS. 10B and 10C  show examples of wire bonds  32  with ends  36  that are not positioned directly above the respective bases  34  thereof. That is, considering first surface  14  of substrate  12  as extending in two lateral directions, so as to substantially define a plane, an end  36  of one of the wire bonds  32  can be displaced in at least one of these lateral directions from a corresponding lateral position of base  34 . As shown in  FIGS. 10B and 10C , wire bonds  32  can be of the same general shape as the wire bonds of  FIG. 10A  and can have an end  36  that is aligned with the portion of the wire bond  32  immediately adjacent the base  34  thereof to define an axis  50 . The wire bonds  32  can, similarly, include a first portion  52  that extends generally along axis  50  and a second portion  54  that is curved so as to define an apex  56  that is spaced apart from axis  50  on a single side thereof to define a plane that extends along axis  50 . The wire bonds  32  of  FIGS. 10B and 10C , however, can be configured such that the axis  50 , defined as described above, is angled with respect to contact portion  30  at an angle of, for example, less than 85°. In another example, angle  58  can be between about 30° and 75°. 
         [0046]    Wire bond  32  can be such that the apex  56  defined within second portion  54  of wire bond can be either exterior to the angle  58 , as shown in  FIG. 10B , or interior thereto, as shown in  FIG. 10C . Further, axis  50  can be angled with respect to contact portion  30  such that end surface  38  of wire bond  32  is laterally displaced relative to contact portion  30  in multiple lateral directions. In such an example, the plane defined by second portion  54  and axis  50  can itself be angled with respect to contact portion  30  and/or first surface  14 . Such an angle can be substantially equal to or different than angle  58 . That is the displacement of end  36  relative to base  134  can be in two lateral directions and can be by the same or a different distance in each of those directions. 
         [0047]    In an embodiment, various ones of wire bonds  132  can be displaced in different directions and by different amounts throughout the assembly  110 . Such an arrangement allows for assembly  110  to have an array that is configured differently on the level of surface  144  compared to on the level of substrate  12 . For example, an array can cover a smaller overall area or have a smaller pitch on surface  144  than at the first surface  114  level compared to that at first surface  114  of substrate  112 . Further, some wire bonds  132  can have ends  138  that are positioned above microelectronic element  122  to accommodate a stacked arrangement of packaged microelectronic elements of different sizes. In another example, shown in  FIG. 19 , wire bonds  132  can be configured such that the end  136 A of one wire bond  132 A is positioned substantially above the base  134 B of another wire bond  134 B, the end  132 B of that wire bond  134 B being positioned elsewhere. Such an arrangement can be referred to as changing the relative position of a contact end surface  136  within an array of contacts, compared to the position of a corresponding contact array on second surface  116 . Within such an array, the relative positions of the contact end surfaces can be changed or varied, as desired, depending on the microelectronic assembly&#39;s application or other requirements. 
         [0048]      FIG. 4  shows a further embodiment of a microelectronic subassembly  210  having wire bonds  232  with ends  236  in displaced lateral positions with respect to bases  234 . In the embodiment of  FIG. 4 , the wire bonds  132  achieve this lateral displacement by including a curved portion  248  therein. Curved portion  248  can be formed in an additional step during the wire bond formation process and can occur, for example, while the wire portion is being drawn out to the desired length. This step can be carried out using available wire-bonding equipment, which can include the use of a single machine. 
         [0049]    In a variation of the assembly  10  of  FIG. 2 , wire bonds  32  can be angled as shown in either  FIG. 10B ,  FIG. 10C , or a combination thereof such that at least some of the ends  36  of the wire bonds  32  extend into an area that overlies a major surface  24  of the microelectronic element  22 . Such an area can be defined by the outer periphery of microelectronic element  22  and can extend upwardly therefrom. 
         [0050]    As shown in  FIG. 11 , the free ends  36  of at least some of the wire bonds can have an asymmetrical configuration the end surfaces  38  thereof defined on tips  62  of the wire bonds  32  that are narrower than the adjacent portions of thereof, at least in one direction. The narrow tip  62  of the free end  36  can be imparted on wire bond  32  by a process used for manufacture thereof, an example of which is discussed further below. As shown, the narrow tip  62  can be offset such that an axis  60  through the center thereof is offset from an axis  62  through the center of the adjacent portion of the wire bond  32 . Further, a centroid  64  of the end surface  38  can be along axis  60  such that it is offset from the adjacent wire bond portion. The tip  62  of wire bond  32  may also be narrowed in a direction perpendicular to the dimensions shown in  FIG. 11  or can be the same width as the adjacent portion of wire bond  32  or can be somewhat wider. 
         [0051]      FIGS. 4-9  show a microelectronic assembly  10  in various steps of a fabrication method thereof.  FIG. 4  shows microelectronic assembly  10 ′ at a step where microelectronic element  22  has been electrically and mechanically connected to substrate  12  on first surface  14  and within first region  18 , thereof, as described above in connection with  FIGS. 1 and 2 .  FIG. 4  further shows a capillary  70  of a wire bonding tool in proximity to the first surface  14  of substrate  12 . The capillary  70  shown schematically in  FIG. 4 , along with the bonding tool (not shown) with which it is associated can be of the type generally described above and can be configured to form a plurality of successive wire bonds in an assembly by heating a leading end  72  of a wire  74  that passes through the capillary  70  and aligning the capillary  70 , and accordingly the leading end  72  of the wire  74  with a contact portion  30  of a conductive element  28 . The base  34  of a wire bond is then formed joined to the contact portion  30  by pressing the heated free end  72  thereagainst by appropriate movement of the capillary  70 , as shown in  FIG. 5 . 
         [0052]    After a desired length of the wire  74  has been drawn out of capillary  70  so as to extend above surface  14  of substrate  12  at an appropriate distance for the height of the wire bond to be formed ( FIG. 6 ), the wire  77  is severed and appropriately positioned. As shown in  FIG. 7 , the severing and positioning is started by moving capillary  70  to a position over a bearing portion  26  of a conductive element  28 . In the example shown in  FIG. 7 , the capillary  70  is positioned over the bearing portion  26  of the same conductive element to which base  34  is joined within contact portion  30 . Other examples are discussed below wherein the capillary  70  is positioned over the bearing portion  26  of another conductive element  28 , including a conductive element  28  that includes only a bearing portion  26 . After capillary  70  is appropriately positioned, it is pressed toward bearing surface  26  with a portion of the wire  74  between bearing surface  26  and a face  76  of capillary  70  that extends outwardly from wire  74 . Pressure is then applied to the wire to move face  76  toward contact portion  30 , which compresses wire  74  therebetween, causing plastic deformation of wire  74 , e.g., flattening or constriction of the wire, in area  78 . Through such deformation, area  78  of wire  74  becomes somewhat weaker than the remaining portions of wire  74  on either side thereof and weaker than the joint between base  34  and contact portion  30 . For example, area  78  may be somewhat flattened, constricted, or twisted relative to other portions of the wire  74  on either side thereof. 
         [0053]    After deformation of area  78  of wire  74 , the capillary  70  is then moved back toward a final desired position for the free end  36  of the wire bond  32  to-be formed, as shown in  FIG. 8 . This position can be directly above base  43 , as shown in the example of  FIG. 8  or can be laterally displaced therefrom, as discussed above with respect to the examples of  FIGS. 10B and 10C . The position of capillary  70  in  FIG. 8  can be generally in the desired lateral area of free end  36  and can be just somewhat closer to first surface  14  than the desired final position. Further, as shown in  FIG. 8 , the wire may remain partially bent, including a shape similar to the shape of the finished wire bonds  32  discussed above including a first portion  52  and second portion  54 . 
         [0054]    Capillary  70  can then be moved away from surface  14  to apply tension to the segment of wire  74  (which can be clamped or otherwise secured within capillary  70 ) between capillary  70  and base  34 . This tension causes wire  74  to break within area  78 , as shown in  FIG. 9 , which separates wire bond  32  from the remaining portion of wire  74  with a portion of area  78  forming the tip  62  of free end  36  with end surface  38  defined thereon. A remaining portion of area  78  remains on a new leading end  72 ′ of the wire  74 . These steps can be repeated on other conductive elements  28  at the surface  14  of the substrate  12  to form an array of wire bonds  32  in a desired pattern. 
         [0055]    The use of bearing portions  26  of conductive elements  30  can provide a specific surface on which to form areas  78  of the wire  74  during the formation of wire bonds  32 , according to methods such as the one discussed above. The use of the conductive elements  30  can be beneficial because the metal material from which they are made is harder than the substrate  12  material and, accordingly, less susceptible to damage under the force of capillary  70 . Further, by providing designated conductive elements  28  or portions of conductive elements  28  in the form of bearing surfaces  26 , the integrity of the desired contact portions  20  is maintained. For example, the compression of wire  74  against the bearing portions  26  can result in surface scratches thereon, which would potentially adversely affect the strength of the joint between bases  34  and the contact portions  30 , if such scratches were present thereon. 
         [0056]    In examples where bearing portions  26  of conductive elements  28  are configured for use to compress a portion of a wire  74  thereagainst, as discussed above, the shape of bearing portion  26  can be based on factors involved in such use. For example, the bearing portion  26  can be positioned relative to contact portion  30  to extend away therefrom at a distance sufficient for capillary  70  to move the desired portion of wire  74  into contact therewith at a sufficient distance from base  34  to result in the ultimately-desired height for the wire bond  32 . Further, the width of the bearing portion  26  can be sufficient to extend across the width of the wire  74  when in contact therewith. In other words, the bearing portion  26  can be at least as wide as the final width of area  78 , which can be influenced by the diameter or gauge of the wire  74 . 
         [0057]    After formation of the desired number of wire bonds  32 , encapsulation layer  42  can be formed by depositing a resin over microelectronic assembly  10 . This can be done by placing the assembly  10  in an appropriately configured mold having a cavity in the desired shape of the encapsulation layer  42  that can receive assembly  10 . Such a mold and the method of forming an encapsulation layer therewith can be as shown and described in U.S. Pat. App. Pub. No 2010/0232129, the disclosure of which is incorporated by reference herein it its entirety. Encapsulation layer can be formed such that, initially, surface  44  thereof is spaced above end surfaces  38  of wire bonds  32 . To expose the end surfaces  38 , the portion of encapsulation layer  42  that is above end surfaces  38  can be removed, exposing a new surface  44  that is substantially flush with end surfaces  38 . Alternatively, encapsulation layer  42  can be formed such that surface  44  is already substantially flush with end surfaces  38  or such that surface  44  is positioned below end surfaces  38 . Removal, if necessary, of a portion of encapsulation layer  42  can be achieved by grinding, dry etching, laser etching, wet etching, lapping, or the like. If desired, a portion of the free ends  36  of wire bonds  32  can also be removed in the same, or an additional, step to achieve substantially planar end surfaces  38  that are substantially flush with surface  44 . 
         [0058]    Bearing portions  26  can be used in variations of the wire bond formation method discussed with respect to  FIGS. 4-9  to achieve wire bonds  132  of different heights, as shown in  FIGS. 12 and 13 . In particular, as shown in  FIG. 12 , a number of different conductive elements  28  can be at surface  14  of substrate  12 . One or a plurality of each of the different types of conductive elements  28  can be included on substrate  12 , depending on the desired configuration of wire bonds  32  and the desired layout or array thereof. In the example shown, some of the conductive elements  28   a  include only a contact portion  30 . Other conductive elements  28   b  can include both a contact portion  30  and a bearing portion  26  in similar configurations to those discussed above with respect to  FIG. 3 , for example. Still other conductive elements  28   c  can include only a bearing portion  26 . Such a conductive element  28   c  can be an appropriately-sized and positioned individual bearing portion  26  that can be similar to the bearing portion  26  shown in  FIG. 3 , but lacking an attached contact portion  30 . Alternatively, such a conductive element  28   c  can be in the form of a bearing strip  48 , an example of which is also shown in  FIG. 3 . The bearing strip can surround the entire outside area of an array of conductive elements  28  or can extend partially along the outside of such an array or be interspersed therewith. 
         [0059]    As further shown in  FIG. 12 , wire  174  can be joined at a base  134   a  of conductive element  128   a , which includes only a contact portion  130 . The same wire  174  can then be compressed, in a manner similar to that which was previously discussed with respect to  FIG. 7 , against the bearing portion  126  of a different conductive element  128 , such as that of conductive element  128   b . Doing so can accommodate a longer length of wire  174  having been drawn out of capillary  170 , which can, in turn result in a taller wire bond  132   a , as shown in  FIG. 13 , after wire  174  is severed in a similar manner to that which was discussed above with respect to  FIGS. 8 and 9 . Similarly, a base  134   b  can be formed on the contact portion  130  of conductive element  128   b , and the wire segment  174  can be compressed against conductive element  128   c , which includes only a bearing surface  126  to form a wire bond on conductive element  128   b  of generally the same height as wire bond  132   a . For a similar substrate that includes more than two rows of wire bonds, additional conductive elements having both a contact portion and a bearing portion can be included between conductive elements  128   c  and  128   a . Other arrangements can be made using similar principles. 
         [0060]    Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims.