Abstract:
A dynamic element matching method and system thereof is provided. The method includes grouping a plurality of switches into a plurality of groups; allocating a plurality of to-be-turned-on switches of the switches for an input signal to the groups; and maintaining a switch activity of each of the groups at a predetermined value. Accordingly, mismatch noise and harmonic noise are effectively reduced.

Description:
CROSS REFERENCE TO RELATED PATENT APPLICATION 
       [0001]    This patent application is based on Taiwan, R.O.C. patent application No. 099108341 filed on Mar. 22, 2010. 
       FIELD OF THE INVENTION 
       [0002]    The present invention relates to a dynamic element matching (DEM) technique, and more particularly, to a DEM system applied to a multi-bit Sigma-Delta (Σ-Δ) modulator and method thereof. 
       BACKGROUND OF THE INVENTION 
       [0003]    A Σ-Δ modulator is widely implemented in connection with data conversion, e.g., the Σ-Δ modulator can be used in a digital-to-analog converter (DAC) or an analog-to-digital converter (ADC). The Σ-Δ modulator is classified as two types—a single-bit Σ-Δ modulator or a multi-bit Σ-Δ modulator. Since quantization noise of the multi-bit Σ-Δ modulator is much smaller than that of the single-bit Σ-Δ modulator, the multi-bit Σ-Δ modulator is more frequently employed. However, due to fabrication process differences between DACs or ADCs, mismatch noises or errors occur. In view of the foregoing description, a DEM mechanism is developed to reduce mismatch noises for noise-shaping.  FIG. 1  shows a block diagram of a Σ-Δ modulator  10 , a DEM  12  and a DAC  14 . The DEM  12  comprises a plurality of controlled switches. The DEM  12  turns on or off the switches according to an output signal from the Σ-Δ modulator  10  so as to reduce mismatch noises. 
         [0004]    In a conventional DEM mechanism, a dynamic weighting average (DWA) selectively turns on/off switches via a continuous alternative approach according to the number of to-be-turned-on switches. Table 1 illustrates an example of ten switches of which to-be-turned-on switches are marked by “V” and to-be-turned-off switches are not marked. 
         [0000]    
       
         
               
               
               
               
               
               
               
               
               
               
               
               
             
           
               
                 TABLE 1 
               
               
                   
               
               
                 Number of 
                   
                   
                   
                   
                   
                   
                   
                   
                   
                   
                   
               
               
                 on/off 
                   
                   
                   
                   
                   
                   
                   
                   
                   
                   
                 Motion 
               
               
                 Switches 
                 1 
                 2 
                 3 
                 4 
                 5 
                 6 
                 7 
                 8 
                 9 
                 10 
                 Activity 
               
               
                   
               
             
             
               
                 3 
                 V 
                 V 
                 V 
                   
                   
                   
                   
                   
                   
                   
                 — 
               
               
                 5 
                   
                   
                   
                 V 
                 V 
                 V 
                 V 
                 V 
                   
                   
                 8 
               
               
                 2 
                   
                   
                   
                   
                   
                   
                   
                   
                 V 
                 V 
                 7 
               
               
                 8 
                 V 
                 V 
                 V 
                 V 
                 V 
                 V 
                 V 
                 V 
                   
                   
                 10  
               
               
                 7 
                 V 
                 V 
                 V 
                 V 
                 V 
                   
                   
                   
                 V 
                 V 
                 3 
               
               
                   
               
             
          
         
       
     
         [0005]    In this example, at the beginning, the first three switches are turned on. After that, a continuous series of five switches is turned on. The first switch is to be turned on until all of the ten switches are in sequence turned on once. A final item of Table 1 illustrates a switch activity representing the number of switches of which on/off statuses are changed when a previous signal traverses to a current signal. That is, the number of switches of which on/off statuses are changed is equal to the number of switches changing from being turned on to turned off adding to the number of switches changing from being turned off to turned on. For example, when a signal amplitude is large and is around a maximum point and a minimum point of a signal, the switch activity is small; when the signal amplitude is between the maximum point and the minimum point of the signal, the switch activity is large. 
         [0006]    Although the foregoing conventional DWA technique is simple and is easily implemented, harmonic noise is created due to large switch activity when the conventional DWA technique is applied to a signal with large amplitude. The harmonic noises related with signal amplitude is also referred to as signal-related harmonic noises. 
         [0007]    In view of the conventional DEM technique that cannot reduce mismatch noise, a novel DEM system and method thereof capable of maintaining DEM noise-shaping as well as reducing harmonic noise related with a signal with large amplitude is in need. 
       SUMMARY OF THE INVENTION 
       [0008]    One object of the present invention is to provide a DEM system and method thereof applied to a multi-bit Σ-Δ modulator to effectively reduce mismatch noise and harmonic noise. 
         [0009]    The present invention provides a DEM method comprising grouping a plurality of switches into a plurality of groups; allocating a plurality of to-be-turned-on switches of the switches for an input signal to the groups; and maintaining a switch activity for each group substantially at a predetermined value. 
         [0010]    The present invention also provides a DEM system comprising a plurality of switches, an allocating apparatus, and an activity control device. The switches are grouped into a plurality of groups each having a same number of switches. The allocating apparatus generates an allocation result to averagely allocate a plurality of to-be-turned-on switches for an input signal to the groups. The activity control device maintains a switch activity for each group substantially at a predetermined value according to the allocation result of the allocating apparatus. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0011]      FIG. 1  is a block diagram of a Σ-Δ modulator, a DEM system and a DAC in the prior art. 
           [0012]      FIG. 2  is a flow chart of a DEM method in accordance with an embodiment of the present invention. 
           [0013]      FIG. 3  is a block diagram of a DEM system in accordance with an embodiment of the present invention. 
           [0014]      FIG. 4  is a schematic diagram of a tree structure formed by groups A, B and C. 
           [0015]      FIG. 5  is a block diagram of an activity control device in accordance with an embodiment of the present invention. 
           [0016]      FIG. 6  is a detailed circuit of an on-to-off status decider in accordance with an embodiment of the present invention. 
           [0017]      FIGS. 7A and 7B  show a detailed circuit of a sorting device in accordance with an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0018]      FIG. 2  shows a flow chart of a DEM method in accordance with an embodiment of the present invention.  FIG. 3  is a block diagram of a DEM system  3  in accordance with an embodiment of the present invention. The DEM system  3  receives an output signal of a multi-bit Σ-Δ modulator, e.g., an audio signal or a video signal. An output signal of the DEM system  3  is fed to a DAC to reduce mismatch errors or noise for noise-shaping. In this embodiment, the number of switches of the DEM system  3  is 18 for the following explanation. 
         [0019]    In Step  21 , the switches (or most switches) are grouped into a plurality of groups. In this embodiment, the 18 switches are grouped into three groups. Therefore, each of the groups has six switches.  FIG. 4  shows a tree structure associated with groups A, B and C, and each block represents one switch. 
         [0020]    In Step  22 , the to-be-turned-on switches are allocated by the allocating apparatus  30  to each of the groups according to the number of to-be-turned-on switches required by an input signal DEM_IN, and the number of to-be-turned-on switches of each group is represented by a signal DIN. In this embodiment, the to-be-turned-on switches are substantially averagely allocated to all groups. Remaining switches after the allocation are again averagely allocated to a portion of groups. For example, after initialization, when the number of to-be-turned-on switches for the input signal at a first time is 7, two switches are allocated to each of the groups A, B and C since 7 divided by 3 is 2 with a remainder 1. The remaining one switch is allocated to the group A. When the number of to-be-turned-on switches for the input signal at a second time is 8, two switches are allocated to each of the groups A, B and C since 8 divided by 3 is 2 with a remainder 2. The remaining two switches are in turn allocated to the groups B and C since the group A has been allocated for the previous remainder. 
         [0021]    Referring to  FIG. 3 , the allocating apparatus  30  obtains a quotient and a remainder utilizing a divider  301  according to the number of to-be-turned-on switches and the number of groups for the input signal DEM_IN. The remainder is alternately averagely allocated to partial groups by a remainder-rotating allocator  302 . In this embodiment, the divider  301  is realized by a lookup table. The quotient generated by the divider  301  and the output signals REM_ROT[ 0 ], REM_ROT[ 1 ] and REM_ROT[ 2 ] generated by the remainder-rotating allocator  302  are respectively received by adders  303 A,  303 B and  303 C to generate partial output signals DIN for the groups A, B and C. Accordingly, each of the groups obtains the number of to-be-turned-on switches for each group according to the signals DIN. 
         [0022]    Referring to  FIG. 2 , in Step  23 , a switch activity for each group is maintained at a substantially constant value. In one embodiment, the switch activity is maintained at half of the number of the switches for each group. For the tree structure in  FIG. 4 , the switch activity of each group is maintained at three, i.e., there are three switches of which on/off statuses are changed when a previous signal traverses to a current signal. Under some situations, the switch activity can be two or four. 
         [0023]    In this embodiment, an overlapping approach is applied to maintain the switch activity. Table 2 illustrates one group comprising six switches of which to-be-turned-on switches are marked by “V” and to-be-turned-off switches are not marked. 
         [0000]    
       
         
               
               
               
               
               
               
               
               
               
             
           
               
                 TABLE 2 
               
               
                   
               
               
                   
                 Number of 
                   
                   
                   
                   
                   
                   
                   
               
               
                   
                 to-be-turned-on 
                   
                   
                   
                   
                   
                   
                 Switch 
               
               
                 Signal 
                 Switches 
                 1 
                 2 
                 3 
                 4 
                 5 
                 6 
                 Activity 
               
               
                   
               
             
             
               
                 a 
                 1 
                 V 
                   
                   
                   
                   
                   
                 — 
               
               
                 b 
                 2 
                   
                 V 
                 V 
                   
                   
                   
                 3 
               
               
                 c 
                 2 
                   
                   
                 V 
                 V 
                   
                   
                 2 
               
               
                 d 
                 3 
                   
                   
                   
                 V 
                 V 
                 V 
                 3 
               
               
                 e 
                 4 
                 V 
                 V 
                   
                   
                 V 
                 V 
                 3 
               
               
                   
               
             
          
         
       
     
         [0024]    In this embodiment, a signal c requires two to-be-turned-on switches (i.e., switches  3  and  4 ). When a signal d is received, since there are three to-be-turned-on switches, a switch needs to be overlapped (e.g., the switch  4 ) to maintain the switch actively at three, such that an on/off status of the switch  4  stays unchanged and on/off statuses of switches  3 ,  5  and  6  are changed. When a signal e is received, there are four to-be-turned-on switches, and two switches (e.g., the switches  5  and  6 ) are overlapped to maintain the switch activity at three, such that the on/off statuses of the switches  5  and  6  remain unchanged, and the on/off statuses of the switches of the switches  1 ,  2  and  4  are changed. 
         [0025]    In this embodiment, a counter recording a switch history or weighting of each switch and a sorting technique are applied to determine which switch(es) is/are to be changed or overlapped. For example, the sorting technique, a complete sorting approach, sorts a switch having a least switch history or a smallest weighting at the beginning of a sequence, i.e., the switch is provided with a highest priority for changing its on/off status. 
         [0026]    Referring to  FIG. 3 , activity control device  32 A,  32 B and  32 C for the groups A, B and C respectively perform the foregoing weighting recording and sorting, and respectively determine an on/off status for the switches according to the output signals DIN of the allocation apparatus  30 . The on/off status for the switches is represented by DOUT 0 - 5 , DOUT 6 - 11  and DOUT 12 - 17 . 
         [0027]      FIG. 5  shows a detailed circuit of activity control devices  32 A,  32 B and  32 C in accordance with an embodiment of the present invention. An on-to-off quantity generator  320 A generates a switch number ON_SW of switches to be turned off according to input signals DIN from the allocating apparatus  30  and a switch activity target value TAR_TS. In this embodiment, referring to  FIG. 4 , the switch activity target value TAR_TS is three. Likewise, an off-to-on quantity generator  320 B generates a switch number OFF_SW of switches to be turned on according to the input signals DIN from the allocating apparatus  30  and the switch activity target value TAR_TS. As illustrated in Table 2, the on-to-off switch number ON_SW and the off-to-on switch number OFF_SW are generated according to the overlapping approach. 
         [0028]    In this embodiment, the activity control devices  32 A,  32 B and  32 C further comprise a counter  322 , which records a switch history and weighting of each switch via a count value COUNTn. 
         [0029]    An on-to-off decider  324 A determines which one or which switches are to be turned off according to the on-to-off switch number ON_SW received from the on-to-off quantity generator  320 A, the count value COUNTn, and a previous output signal DOUTn. Similarly, an off-to-on decider  324 B determines which switch(es) are to be turned on according to the off-to-on switch number OFF_SW received from the off-to-on quantity generator  320 B, the count value COUNTn, and the previous output signal DOUTn. 
         [0030]    As mentioned above, the foregoing determinations are performed via the sorting approach.  FIG. 6  shows a block diagram of a detailed circuit of the off-to-on decider  324 B in accordance with an embodiment of the present invention. Operations of the off-to-on decider  324 B are described with reference to Table 3. A structure and operations of the on-to-off decider  324 A are similar to those of the off-to-on decider  324 B, and shall not be described for brevity. 
         [0000]    
       
         
               
               
               
             
               
               
               
               
               
               
               
               
             
           
               
                   
                 TABLE 3 
               
             
             
               
                   
                   
               
               
                   
                 Sequence Number 
                   
               
             
          
           
               
                   
                 n 
                 0 
                 1 
                 2 
                 3 
                 4 
                 5 
               
               
                   
                   
               
               
                   
                 Count Value 
                 4 
                 5 
                 3 
                 2 
                 2 
                 2 
               
               
                   
                 COUNTn 
               
               
                   
                 Previous Status 
                 1 
                 0 
                 0 
                 0 
                 1 
                 1 
               
               
                   
                 DOUTn 
               
               
                   
                 Sorting Output 
                 3 
                 2 
                 1 
                 0 
                 4 
                 5 
               
               
                   
                 SOUTn 
               
               
                   
                 OFF_SW_n 
                 0 
                 0 
                 1 
                 1 
                 0 
                 0 
               
               
                   
                   
               
             
          
         
       
     
         [0031]    Suppose that the off-to-on switch number FF_SW is equal to 2. When the previous status signal DOUTn has an on status (i.e., “1”), a multiplexer  3240  outputs a large value, e.g. 63, to a sorting device  3242 ; when the previous status signal DOUTn has an off status (i.e., “1”), the multiplexer  3240  passes the count value COUNTn to the sorting device  3242  for sorting. The sorting device sorts input values SINn to generate sorted output values SOUTn. The off-to-on switch number OFF_SW (i.e., 2 in this embodiment) is compared with the sorted output values SOUTn via a comparator  3244 . In this embodiment, only the first two sorted output values (i.e., SOUTn=“0”, “1”) generate active outputs (i.e., OFF_SW_n=“1”), i.e., only the two switches corresponding to the first two sorted output values are turned on. A logical circuit  326  generates output signals DOUTn according to ON_SW_n and OFF_SW_n respectively outputted by the off-to-on decider  324 A and the off-to-on decider  324 B to control to turn on or turn off each switch. 
         [0032]      FIGS. 7A and 7B  show a detailed circuit of the sorting device  3242 , utilizing a complete sorting approach, in  FIG. 6 , in accordance with an embodiment of the present invention. Every two input values SINn are compared by a comparing device  32420 . In this embodiment, each group has six input values, 15 (i.e., C 2   6 =15) comparators are utilized for each group. Three groups may require 45 comparators. However, comparators depicted by dashed lines can share the comparators depicted by solid lines in  FIGS. 7A and 7B . It should be noted that, if the 18 switches are not grouped, the number of comparing device  32420  required to sort the 18 switches reaches as much as 153 (i.e., C 2   18 =153). Accordingly, advantages of grouping the switches simplify sorting complexity and the number of hardware comparators required for sorting and improve the signal quality. 
         [0033]    While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not to be limited to the above embodiments. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.