Abstract:
One embodiment of the invention provides a system that facilitates auto-alignment of images for defect inspection and defect analysis. The system operates by first receiving a reference image and a test image. Next, the system creates a horizontal cut line across the reference image and chooses a vertical feature on the reference image with a specified width along the horizontal cut line. The system also creates a vertical cut line across the reference image and chooses a horizontal feature on the reference image with the specified width along the vertical cut line. Finally, the system locates the vertical feature and the horizontal feature on the test image so that the reference image and the test image can be aligned to perform defect inspection and defect analysis.

Description:
BACKGROUND  
         [0001]    1. Field of the Invention  
           [0002]    The invention relates to the process of inspecting integrated circuit images. More specifically, the invention relates to a method and an apparatus to facilitate auto-alignment of mask and die images of integrated circuits for defect inspection and/or defect analysis.  
           [0003]    2. Related Art  
           [0004]    Integrated circuits can be produced through an optical lithography process that involves creating a mask with a pattern specifying where the various features of the integrated circuit are to be placed and then passing radiation through the mask to expose the pattern on a semiconductor wafer. This pattern defines where the surface of the semiconductor wafer is to be etched or where new material is to be added to create the integrated circuit.  
           [0005]    As the features of an integrated circuit continue to get smaller, quality control becomes increasingly important in order to ensure that the integrated circuit functions properly. As part of this quality control, integrated circuit manufacturers often compare various images of an integrated circuit; for example, a manufacturer may compare a computer-generated image of the integrated circuit to a mask of the integrated circuit or may compare the mask to a die created from the mask. These comparisons can determine if defects exist and can help determine the cause of these defects.  
           [0006]    These comparisons can be made by first aligning the images being compared and then subtracting, pixel-by-pixel, the reference image from the test image. The resultant difference is ideally zero for all pixels. Differences other than zero may indicate a defect in the test image, which can be analyzed to determine the severity of the defect, and can help determine the cause of the defect. During this defect analysis process, accurate alignment of the images is critical for this process to yield the expected results.  
           [0007]    Current systems use an auto-correlation method to align these images. Auto-correlation is a very slow process because it requires a computationally intensive mathematical process to be performed pixel-by-pixel on the images. Also, the success rate of auto-correlation is not very high. The auto-correlation algorithm attempts to maximize the correlation coefficient:  
       c   =       ∑       (       x     i   ,   j       -     x   _       )     ×     ∑     (       y     i   ,   j       -     y   _       )                 (     ∑       (       x     i   ,   j       -     x   _       )     2       )       1   /   2       ×       (     ∑       (       y     i   ,   j       -     y   _       )     2       )       1   /   2                                 
 
           [0008]    where x i,j  and y i,j  are the pixel values of the images at the respective location i and j, and {overscore (x)} and {overscore (y)} are the mean values of each image. Thus the auto-correlation algorithm is searching for a location by shifting the two images around to maximize the coefficient. This is an intensive calculation and the range of the shifted positions that are tried will limit the quality of the found position.  
           [0009]    What is needed is a method and an apparatus to facilitate auto-alignment of integrated circuit images for defect inspection and defect analysis that do not exhibit the problems described above.  
         SUMMARY  
         [0010]    One embodiment of the invention provides a system that facilitates auto-alignment of images for defect inspection and defect analysis. The system operates by first receiving a reference image and a test image. Next, the system creates a horizontal cut line across the reference image. The system then chooses a vertical feature on the reference image with a specified width along the horizontal cut line. Next, the system determines that the vertical feature substantially maintains the specified width over a specified range above and below the horizontal cut line. The system also creates a vertical cut line across the reference image. The system then chooses a horizontal feature on the reference image with the specified width along the vertical cut line. Next, the system determines that the horizontal feature substantially maintains the specified width over a specified range left and right of the vertical cut line. Finally, the system locates the vertical feature and the horizontal feature on the test image so that the reference image and the test image can be aligned to perform defect inspection and defect analysis.  
           [0011]    In one embodiment of the invention, the system creates multiple horizontal cut lines across the reference image and then chooses a horizontal cut line including at least one vertical feature from these horizontal cut lines. The system also creates multiple vertical cut lines across the reference image and chooses a vertical cut line including at least one horizontal feature from these vertical cut lines. Next, the system creates multiple horizontal cut lines across the test image and chooses a test horizontal cut line by iterating through these horizontal cut lines until the test horizontal cut line includes a test vertical feature with substantially the same horizontal width as the vertical feature and the same neighboring characteristics on the feature, as determined by width. The system also creates multiple vertical cut lines across the test image and chooses a test vertical cut line by iterating through these vertical cut lines until the test vertical cut line includes a test horizontal feature with substantially the same vertical width as the horizontal feature and the same neighboring characteristics. Finally, the system aligns the reference image, and the test image using the horizontal cut line, the test horizontal cut line, the vertical cut line, and the test vertical cut line, and the respective features. As a convenience the cut lines will be referred to although it will be understood that the respective features are being aligned.  
           [0012]    In one embodiment of the invention, the system aligns the reference image and the test image using edges of the vertical feature and the horizontal feature.  
           [0013]    In one embodiment of the invention, the system aligns the reference image and the test image using midpoints of the vertical feature and the horizontal feature.  
           [0014]    In one embodiment of the invention, the reference image includes an inspection mask image generated by mask inspection equipment, a mask image from a database, a wafer image, or a die.  
           [0015]    In one embodiment of the invention, the test image includes an inspection mask image generated by mask inspection equipment, a mask image from a database, a wafer image, or a die.  
           [0016]    In one embodiment of the invention, the system clusters feature widths within the reference image and then chooses a width that occurs most often as the specified width. 
       
    
    
     BRIEF DESCRIPTION OF THE FIGURES  
       [0017]    [0017]FIG. 1 illustrates integrated circuit images in accordance with an embodiment of the invention.  
         [0018]    [0018]FIG. 2A illustrates multiple horizontal cuts across an integrated circuit image in accordance with an embodiment of the invention.  
         [0019]    [0019]FIG. 2B illustrates width groupings in accordance with an embodiment of the invention.  
         [0020]    [0020]FIG. 3 illustrates determining feature width in the neighborhood of a horizontal cut in accordance with an embodiment of the invention.  
         [0021]    [0021]FIG. 4 illustrates image aligner 402 in accordance with an embodiment of the invention.  
         [0022]    [0022]FIG. 5 is a flowchart illustrating the process of aligning a test image with a reference image in accordance with an embodiment of the invention. 
     
    
     DETAILED DESCRIPTION  
       [0023]    Integrated Circuit Images  
         [0024]    [0024]FIG. 1 illustrates integrated circuit images in accordance with an embodiment of the invention. Reference image  102  and test image  104  include the same features of an integrated circuit, however, their sizes may not be identical, as shown. Reference image  102  may be a computer-generated image generated from a GDS-II description or other system description of the layout, a mask image, or a wafer image used for comparison with test image  104 . Test image  104  may also be a computer-generated image, a mask image, or a wafer image used for comparison with reference image  102 , and may include defects such as defect  114 .  
         [0025]    In operation, the system places horizontal and vertical cut lines on reference image  102 . FIG. 1 illustrates horizontal cut line  106  and vertical cut line  108  on reference image  102 . The system also places horizontal and vertical cut lines on test image  104 . FIG. 1 illustrates horizontal cut line  110  and vertical cut line  112  on test image  104 . The system aligns reference image  102  and test image  104  by locating the same features using horizontal cut lines  106  and  110  and vertical cut lines  108  and  112 . Once aligned, the system can compute the difference between reference image  102  and test image  104  for defect analysis. For example, defect  114  could be identified and reported to a user of the software tool, e.g. by visually highlighting the area, generating an error report, etc. The user might then simulate the region with the defect using a tool such as the Virtual Stepper® to determine if a particular mask error should be reported. Virtual Stepper® is a registered trademark of Numerical Technologies, Inc. of San Jose, Calif. Determining if a particular mask error should be reported can involve defect severity scoring. Inspection, severity scoring, and mask error reporting are described in more detail in U.S. patent applications Ser. No. 09/130,996, entitled “Visual Inspection and Verification System,” by Fang-Cheng Chang, et al, filed Aug. 7, 1998, which is hereby incorporated by reference; Ser. No. 09/815,023, entitled “System and Method of Providing Mask Quality Control,” by Lynn Cai, et al, filed Mar. 20, 2001, which is hereby incorporated by reference; and Ser. No. 09/815,025, entitled “System and Method of Providing Mask Defect Printability Analysis,” by Lynn Cai, et al, filed Mar. 20, 2001, which is hereby incorporated by reference.  
         [0026]    Using Multiple Cut Lines  
         [0027]    [0027]FIG. 2A illustrates multiple horizontal cuts across an integrated circuit image in accordance with an embodiment of the invention. Note that this integrated circuit image can be either reference image  102  or test image  104 . Cut lines  208 ,  210 ,  212 , and  214  have been placed across image features  202 ,  204 , and  206 . More specifically, cut line  208  crosses feature  204  at point A; cut line  210  crosses features  202  and  204  at points B and C, respectively; cut line  212  crosses features  202 ,  204 , and  206  at points D, E, and F, respectively; and cut line  214  crosses features  202  and  206  at points G and H, respectively. More or fewer cut lines can be used. The same procedures and discussions apply equally to vertical cut lines so no further discussion of vertical cut lines will be included herein. After cut lines have been placed across the image, the crossing points are grouped according to width.  
         [0028]    [0028]FIG. 2B illustrates width groupings in accordance with an embodiment of the invention. Feature  202  has a nominal width between 95 and 110 nm; feature  204  has a nominal width between 90 and 95 nm; and feature  206  has a nominal width between 110 and 130 nm. As shown in grouping chart  216 , points A, C, and E are grouped together with a nominal width of 90-95 nm; points B, D, and G are grouped together with a nominal width of 95-110 nm; and points F and H are grouped together with a nominal width of 110-130 nm. The system selects a feature with the selected width from one of the groups in grouping chart  216 , for example feature  202  at point D. In one embodiment, the chosen point is a feature having median width. In another embodiment the chosen point is a feature having a width that occurs most often. Next, the system determines if the width is substantially constant within a specified range from point D as described below in conjunction with FIG. 3. If the width is not substantially constant, the system selects a different point before continuing. The next point can be from within the same width group or another point with a different width, e.g. point F. A substantially constant width is used to avoid corners and defect locations and to assure better alignment results. If no points are found that work, the criteria for the range above and below the points can be lowered. If still no points are found, the alignment fails.  
         [0029]    Determining Feature Width  
         [0030]    [0030]FIG. 3 illustrates the process of determining feature width in the neighborhood of a horizontal cut in accordance with an embodiment of the invention. The system determines the width at several points on feature  202  about cut line  212  between limits  302  and  304 . Limits  302  and  304  are selected to give assurance that feature  202  has a substantially constant width and that the selected point can be used to make a valid comparison between reference image  102  and test image  104 . After determining that the selected point on reference image  102  can be used to make a valid comparison, the system attempts to locate the equivalent point on test image  104  as described below in conjunction with FIG. 5.  
         [0031]    Image Aligner  
         [0032]    [0032]FIG. 4 illustrates image aligner  402  in accordance with an embodiment of the invention. Image aligner  402  includes image receiver  404 , cut line generator  406 , feature width clusterer  408 , feature chooser  410 , width checker  412 , feature matcher  414 , and image alignment mechanism  416 . Image receiver  404  receives reference image  102  and test image  104  for alignment. Cut line generator  406  creates both horizontal and vertical cut lines across reference image  102  and test image  104  as described above in reference to FIGS.  1 - 3 .  
         [0033]    After cut line generator  406  creates cut lines across reference image  102  and test image  104 , feature width clusterer  408  classifies each feature according to width and sorts the features into groups as described above in conjunction with FIG. 2A. Feature chooser  410  then selects a feature for comparison as described below in conjunction with FIG. 5.  
         [0034]    Width checker  412  checks the width of the feature chosen by feature chooser  410  to ensure that the width of the chosen feature remains substantially constant over a small range near the cut line by stepping small increments in both directions from the cut line and comparing the feature width with the feature width at the cut line.  
         [0035]    After features have been chosen on both horizontal and vertical cut lines, feature matcher  414  matches the features on test image  104  to match the selected features on reference image  102 . A feature on the test image can be said to be matched with a feature on the reference image if (1) it has substantially the same width and (2) substantially the same neighborhood properties as the feature on the reference image. In one embodiment, the tolerance is allowed to compensate for slightly different image sizes, e.g. plus-or-minus ten percent. When matching features have been found on both reference image  102  and test image  104 , image alignment mechanism  416  aligns these images for subtraction and subsequent defect inspection and analysis.  
         [0036]    Aligning the Images  
         [0037]    [0037]FIG. 5 is a flowchart illustrating the process of aligning a test image with a reference image in accordance with an embodiment of the invention. The system starts by receiving reference image  102  and test image  104  (step  502 ). Next, the system places multiple cut lines through reference image  102  (step  504 ). The system then measures the width of the features on the cut lines (step  506 ).  
         [0038]    After measuring the width of the features, the system groups the measured width values into buckets sorted according to size (step  508 ). Next, the system selects a feature with a width that occurs most often from the measured width values (step  510 ). The system then ensures that the width is substantially constant near the selected cut line by iterating about the cut line in small increments (step  512 ). If the width is not substantially the same, a new point is selected.  
         [0039]    After selecting a point on reference image  102 , the system locates the same feature on test image  104  (step  514 ). Next, the system ensures that the cut line has the same features near the selected feature to determine that the features are the same (step  516 ). Finally, the system aligns the edges of the feature on both images (step  518 ). The system can also align the midpoints of the feature. Note that the same process is followed to align the images using the vertical cut lines for the vertical direction alignment. After both directions are aligned, the images are aligned.  
         [0040]    The preceding description is presented to enable one to make and use the invention, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be readily apparent, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the invention. Thus, the invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.  
         [0041]    The data structures and code described in this detailed description are typically stored on a computer readable storage medium, which may be any device or medium that can store code and/or data for use by a computer system. This includes, but is not limited to, magnetic and optical storage devices such as disk drives, magnetic tape, CDs (compact discs) and DVDs (digital versatile discs or digital video discs), and computer instruction signals embodied in a transmission medium (with or without a carrier wave upon which the signals are modulated). For example, the transmission medium may include a communications network, such as the Internet.  
         [0042]    The foregoing descriptions of embodiments of the invention have been presented for purposes of illustration and description only. They are not intended to be exhaustive or to limit the invention to the forms disclosed. The scope of the invention is defined by the appended claims.