Abstract:
A compact circuit device wherein a semiconductor element that performs high current switching is embedded is provided. The hybrid integrated circuit device ( 10 ) is provided with: a circuit board ( 12 ); a plurality of ceramic substrates ( 22 A- 22 G) disposed on the top surface of the circuit board ( 12 ); circuit elements such as transistors mounted on the top surface of the ceramic substrates ( 22 A- 22 G); and a lead ( 29 ) or the like that is connected to the circuit elements and is exposed to the outside. Furthermore, in the present embodiment, leads ( 28, 30, 31 A- 31 C) are disposed superimposed in the vicinity of the center of the circuit board ( 12 ), and a circuit element such as an IGBT is disposed and electrically connected approaching the region at which the leads are superimposed. The alternating current transformed by the IGBT is output externally via the leads ( 31 A, etc.).

Description:
REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is a national stage application under 35 USC 371 of International Application No. PCT/JP2011/005209, filed Sep. 15, 2011, which claims the priority of Japanese Patent Application No. 2010-213695, filed Sep. 24, 2010, the entire contents of which are incorporated herein by reference. 
     
    
     FIELD OF THE INVENTION 
       [0002]    A preferred embodiment of the invention relates to a circuit device, and specifically, relates to a circuit device in which a power semiconductor element for switching a high current is mounted on the upper surface of a circuit board. 
       BACKGROUND OF THE INVENTION 
       [0003]    With reference to  FIG. 9 , the configuration of a conventional configuration integrated circuit device  100  will be explained. Firstly, a predetermined electric circuit is formed such that a conductive pattern  103  is formed on the surface of a rectangular substrate  101  with an insulating layer  102  of a thickness of about 200 μm interposed therebetween, and circuit elements are connected to desired portions of the conductive pattern  103 . Here, as the circuit elements, a semiconductor element  105 A and a chip element  105 B are fixed thereto. Further, an electrode formed on an upper surface of the semiconductor element  105 A is connected to the desired conductive pattern  103  through a fine metal wire  114 , and electrodes provided on both ends of the chip element  105 B are fixed to the conductive pattern via solder. Moreover, a lead  104  is connected to a pad made of a conductive pattern  109  formed in a periphery part of the substrate  101 , and functions as an external terminal. A sealing resin  108  has a function of sealing the electric circuit formed on the surface of the substrate  101 . 
         [0004]    A case material  111  has a frame-like shape, and abuts on the side surfaces of the substrate  101 , whereby a space for filling the sealing resin  108  is formed on the upper surface of the substrate  101 . 
         [0005]    A manufacturing method of the hybrid integrated circuit device  100  of the configuration mentioned above is as follows. Firstly, the conductive pattern  103  having a predetermined shape is formed on the upper surface of the substrate  101 , the upper surface coated with the insulating layer  102  made of a resin. Next, a circuit element such as the semiconductor element  105 A is placed on the upper surface of the substrate  101 , and the predetermined conductive pattern  103  and the semiconductor element  105 A are electrically connected to each other. In addition, the lead  104  is fixed to the conductive pattern  109  formed in a pad shape. Next, the case material  111  is attached, the liquid or semisolid sealing resin  108  is injected into a space surrounded by the case material  111 , and then is cured by heating, thereby sealing the semiconductor element  105 A and the fine metal wire  114  with the resin.
   Patent Document 1: Japanese Patent Application Publication No. 2007-036014.   
 
       SUMMARY OF THE INVENTION 
       [0007]    However, in the case of the hybrid integrated circuit device  100  of the configuration mentioned above, the lead  104  and the semiconductor element  105 A are connected to each other through the conductive pattern  103  formed on the upper surface of the substrate  101  and has a thickness of about 100 μm. Accordingly, when the semiconductor element  105 A is configured to switch a high current of about several tens of amperes, the width of the conductive pattern  103  needs to be widened in order to secure the large current capacity. This has prevented downsizing of the hybrid integrated circuit device  100 . 
         [0008]    The preferred embodiment of the invention was made in view of the problem described above, and a main objective of the preferred embodiment of the invention is to provide a compact circuit device including a built-in semiconductor element for high current switching 
         [0009]    A circuit device in the preferred embodiment of the invention includes: a circuit board; a semiconductor element disposed on an upper surface of the circuit board; a first lead electrically connected to the semiconductor element, on the upper surface of the circuit board; a second lead electrically connected to the semiconductor element, at least a part of the second lead being superimposed on the first lead; and a third lead electrically connected to the semiconductor element, at least a part of the third lead being superimposed on the first lead and the second lead. 
         [0010]    With the preferred embodiment of the invention, the first lead, the second lead, and the third lead connected to the embedded semiconductor elements are disposed to be superimposed on one another in a state being insulated from the circuit board. Accordingly, these leads occupy a reduced area on the upper surface of the circuit board to contribute to downsizing of the entire device. 
         [0011]    Moreover, the semiconductor element mounted on the upper surface of the circuit board is not connected to a conductive pattern on the circuit board but is connected to the lead disposed on the upper surface of the circuit board. Accordingly, no conductive pattern needs to be formed on the upper surface of the circuit board, which eliminates a problem of a short circuit between the circuit board and the conductive pattern. 
         [0012]    In addition, with the preferred embodiment of the invention, the third lead disposed as the upper most layer continuously extends to the outside from the region on which the leads are disposed in the superimposed manner. Accordingly, when an inverter circuit is embedded in the circuit device, a major part of a path for outputting the converted alternating-current power to the outside is the third lead. Hence, the path through which the converted current passes has a lower resistance value than in a case where the fine metal wire serves as the path. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0013]      FIG. 1  depict views of a circuit device according to a preferred embodiment of the invention,  FIG. 1A  is a plan view thereof, and  FIG. 1B  is a cross-sectional view thereof. 
           [0014]      FIG. 2  is a cross-sectional view illustrating an enlarged portion where a ceramic substrate is mounted in the circuit device in the preferred embodiment of the invention. 
           [0015]      FIG. 3  is a plan view illustrating an enlarged portion where circuit elements constituting a converter circuit are mounted in the circuit device in the preferred embodiment of the invention. 
           [0016]      FIG. 4  is a plan view illustrating an enlarged portion where circuit elements constituting an inverter circuit are mounted in the circuit device in the preferred embodiment of the invention. 
           [0017]      FIG. 5A  is a circuit diagram illustrating a solar power generation system in which the circuit device in the preferred embodiment of the invention is incorporated, and  FIG. 5B  is a partially enlarged circuit diagram. 
           [0018]      FIG. 6  depicts views illustrating a manufacturing method of the circuit device in the preferred embodiment of the invention,  FIG. 6A  is a plan view,  FIG. 6B  is a cross-sectional view, and  FIG. 6C  is an enlarged cross-sectional view. 
           [0019]      FIG. 7  depicts views illustrating the manufacturing method of the circuit device in the preferred embodiment of the invention,  FIG. 7A  is a plan view,  FIG. 7B  is a cross-sectional view, and  FIG. 7C  is an enlarged cross-sectional view. 
           [0020]      FIG. 8  depicts views illustrating the manufacturing method of the circuit device in the preferred embodiment of the invention, and  FIG. 8A  to  FIG. 8C  are cross-sectional views. 
           [0021]      FIG. 9  is a cross-sectional view illustrating a circuit device in the background art. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0022]    With reference to  FIG. 1  to  FIG. 4 , the structure of a hybrid integrated circuit device  10  will be explained as an example of a circuit device. 
         [0023]    With reference to  FIG. 1 , the hybrid integrated circuit device  10  is mainly provided with a circuit board  12 , three leads  28 ,  30 , and  31 A- 31 C which are superimposed on an upper surface of the circuit board  12 , circuit elements such as a transistor  34  which are disposed on the upper surface of the circuit board  12  and close to these leads, a frame-shaped case material  14  fixed to the upper surface of the circuit board  12 , and a sealing resin  16  filled in a region surrounded by the case material  14 . 
         [0024]    The circuit board  12  is a circuit board containing aluminum (Al), copper (Cu), or the like as a main material. When a substrate made of aluminum is employed as the circuit board  12 , both main surfaces of the circuit board  12  are coated with anodized films. In order to improve the heat radiation property, the circuit board  12  has a thickness of, for example, about 0.5 mm or more and 2.0 mm or less. Note that, as for a material of the circuit board  12 , a material other than a metal can be employed, and for example, a resin material such as a glass epoxy substrate, ceramic, or the like, can be employed. Here, as illustrated in  FIG. 2 , the upper surface of the circuit board  12  made of a metal is coated with an insulating layer  50  made of a resin material and having a thickness of about 60 μm, and an island  18  is formed on an upper surface of the insulating layer  50 . 
         [0025]    The lead  28  is incorporated in the case material  14 , and is disposed on the upper surface of the circuit board  12  in such a manner to extend to the outside at one end thereof in the left side of the drawing and to transverse across a central portion of the circuit board  12 . The lead  28  is connected to a positive electrode side of a direct-current power supply, and direct-current power before being converted by an inverter circuit passes through the lead  28 . Moreover, the lead  28  has a width of, for example, about 8 mm, and is formed to be wider than the width (6.5 mm) of the lead  30  and the width (5.0 mm) of the leads  31 A- 31 C, which are disposed in a superimposed manner above the lead  28 . This causes the upper surface of the output lead  28  disposed below to be partially exposed to allow a fine metal wire to be connected to the exposed upper surface portion. 
         [0026]    The lead  30  is incorporated in the case material  14  in such a manner to be superimposed above the lead  28 . Here, the lead  30  is not exposed to the outside, but is connected to a lead  29  which is extended to the outside through a conductive pattern formed on an upper surface of a ceramic substrate  22 D. The lead  30  is connected to a negative electrode side of the direct-current power supply through the externally exposed lead  29  and a resistance mounted on the ceramic substrate  22 D, and has a function of routing the direct-current power inside the device. Moreover, because the width of the lead  30  is wider than that of the leads  31 A- 31 C disposed in the superimposed manner above the lead  30  as mentioned above, a part of the upper surface of the lead  30  is exposed not being coated with the leads  31 A- 31 C. Further, a fine metal wire is connected to the upper surface of the exposed portion of the lead  30 . 
         [0027]    The leads  31 A- 31 C are approximately L-shaped, and each one side (a long side in the in the transverse direction of the drawing) thereof is disposed on a portion superimposed on the leads  28  and  30 . In addition, lower ends of the leads  31 A- 31 C of the drawing are exposed to the outside from the case material  14 . 
         [0028]    The lead  31 A is connected to circuit elements such as transistors which are mounted on ceramic substrates  22 A and  22 E through fine metal wires. The lead  31 B is connected to circuit elements such as transistors which are mounted on ceramic substrates  22 B and  22 F. In addition, the lead  31 C is connected to circuit elements which are mounted on ceramic substrates  22 G and  22 C. The structure of connecting the leads  31 A- 31 C will be described later with reference to  FIG. 3  and  FIG. 4 . Here, the leads  31 A and  31 B are leads from which alternating-current power converted by the inverter circuit built in the device is outputted to the outside. 
         [0029]    Here, the thickness of each of the leads  28 ,  30 , and  31 A- 31 C mentioned above is, for example, 1 mm or more. In addition, the externally exposed portion of each lead may be provided with a through-hole for a screw or may be on-board by being solder-connected to PCB at the set side. 
         [0030]    Moreover, with reference to  FIG. 1B , the lead  28 , the lead  30 , and the lead  31 A are insulated from one another by the insulating material of the case material  14  interposed therebetween. Specifically, the lead  28  and the lead  30  are separated from each other in the thickness direction by a distance of, for example, 1 mm or more. Similarly, the lead  30  and the lead  31 A are separated from each other in the thickness direction also by a distance of 1 mm or more. In addition, a lower surface of the lead  28  and the upper surface of the circuit board  12  are also insulated from each other by the insulating material of the case material  14 , and the insulating material has a thickness of, for example, 1 mm or more. 
         [0031]    The case material  14  is formed in a frame shape by injection molding of a resin material such as an epoxy resin, and all the leads mentioned above are incorporated therein. Moreover, the case material  14  is fixed to the upper surface of the periphery part of the circuit board  12  to form a space for resin-sealing of the circuit elements such as the transistor  34  on the upper surface of the circuit board  12 . In addition, wiring leads  40  to be connected to control electrodes of the semiconductor elements to be embedded are disposed at the upper and lower sides of the case material  14  of the drawing. 
         [0032]    The ceramic substrates  22 A- 22 G are made of an inorganic solid material such as Al 2 O 3  (alumina), AlN (aluminum nitride), or the like, and have a thickness of, for example, 0.25 mm or more and 1.0 mm or less. The ceramic substrate  22  has a function of insulating the transistor  34  mounted on the upper surface thereof from the circuit board  12 . The structure of fixing the ceramic substrate  22  to the circuit board  12  will be described later with reference to  FIG. 2 . Moreover, the heat generated when the transistor  34  or a diode  36  is being operated is released to the outside through the ceramic substrate  22  and the circuit board  12 . Here, the circuit elements such as the transistor  34  are not necessarily fixed to the circuit board  12  with the ceramic substrate interposed therebetween, or alternatively the circuit elements may be directly fixed to the upper surface of the circuit board  12 . 
         [0033]    With reference to  FIG. 1B , approximate upper end portions of the wiring lead  40  are inserted into through-holes of a substrate  42  to be fixed. In other words, the circuit elements such as the transistor  34  which are disposed on the upper surface of the circuit board  12  are electrically connected to the substrate  42  through the wiring leads  40 . Multiple signal leads  44  are disposed on the substrate  42 , and the signal leads  44  function as external connection terminals. The substrate  42  is formed such that, for example, conductive patterns are formed on the main surface of a glass epoxy substrate having a thickness of about 1 mm. The substrate  42  may be a ceramic substrate or a metal substrate. 
         [0034]    The sealing resin  16  is made of a resin material, such as an epoxy, into which a filler such as alumina is filled, and is filled into the space surrounded by the case material  14  on the upper surface of the circuit board  12 . Further, the sealing resin  16  seals the ceramic substrate  22 A and the like, the transistor  34 , the diode  36 , fine metal wires  26 , the substrate  42 , and the like. 
         [0035]    With reference to  FIG. 1A , multiple ceramic substrates are disposed on the upper surface of the circuit board  12 . Specifically, seven ceramic substrates  22 A- 22 G are fixed to the upper surface of the circuit board  12 , and each predetermined circuit element is mounted on the upper surface of each of the ceramic substrates  22 A- 22 G. 
         [0036]    Transistors including an IGBT, an MOSFET, and the like and diodes are mounted on the upper surfaces of the ceramic substrates  22 A,  22 B,  22 E, and  22 F, and these elements constitute an inverter circuit. Further, diodes are mounted on the ceramic substrate  22 C and transistors including an IGBT, an MOSFET, and the like are mounted on the ceramic substrate  22 G, and these elements constitute a converter circuit. Moreover, resistances for detecting a current value are disposed on the upper surface of the ceramic substrate  22 D. 
         [0037]    In the embodiment, for example, the lead  28  and the lead  30  which are wide leads through which a direct-current of about 70 amperes passes are disposed in the superimposed manner on the upper surface of the circuit board  12 . Thus, the leads  28  and  30  occupy a reduced area in comparison with a case where both of the leads are disposed on the same plane, thereby downsizing the entire device. 
         [0038]    Further in the embodiment, the leads  28  and  30  are disposed in the superimposed manner in a region by which the circuit board  12  is evenly divided around the central portion thereof. Further, the circuit elements such as transistors are disposed around the region where these leads are disposed in the superimposed manner, and are connected to the leads through the fine metal wires. Thus, the circuit elements such as transistors are disposed close to the leads  28  and  30 . This shortens the fine metal wires connecting the leads and the circuit elements, and thereby makes it possible to reduce the electric resistance of the connection means. 
         [0039]    Still further, in the embodiment, together with the lead  28  and the lead  30 , parts of the leads  31 A- 31 C are superimposed on these leads. In addition, the parts of the leads  31 A- 31 C which are disposed on the portions superimposed on these leads are connected to the circuit elements such as the semiconductor elements through the fine metal wires, and end portions of these leads  31 A- 31 C are exposed to the outside. Accordingly, the leads  31 A- 31 C serve as a major part of paths for the currents outputted through the semiconductor elements built in the device, thereby making it possible to reduce the electric resistance in the paths. 
         [0040]    Moreover, each of the leads  31 A- 31 C is shaped in an L-character of the alphabet. Each one side thereof is connected to the circuit element including the semiconductor element or the like, and an end portion at the other side is exposed to the outside from the case material  14  to form an external terminal. Accordingly, the circuit element and the external terminal are connected to each other with the shortest distance. 
         [0041]    Further in the embodiment, an effect of pair wiring can be obtained such that the lead  30  connected to the negative electrode side of the direct-current power supply is superimposed on the lead  28  connected to the positive electrode side of the direct-current power supply. Specifically, a magnetic field generated when the current passes through the lead  30  and a magnetic field generated when the current passes through the lead  28  are canceled with each other to reduce a noise to be generated. 
         [0042]    Further in the embodiment, the circuit elements such as transistors are connected to one another on the upper surface of the circuit board  12  through the leads  28 ,  30 , and  31 A- 31 C each having a large cross-sectional area to improve the electric characteristics. Specifically, wiring inductance is reduced to suppress switching voltage vibration generated at switching operation with an L load and a generation amount of noise. 
         [0043]    With reference to  FIG. 2 , the structure of fixing the ceramic substrate  22  to the circuit board  12  will be explained. Firstly, when the circuit board  12  is a circuit board made of aluminum, the upper surface and the lower surface of the circuit board  12  are respectively coated with oxide films  46  and  48  formed of anodized aluminum by anodic oxidation. Further, the upper surface of the circuit board  12  on which the oxide film  46  is formed is coated with the insulating layer  50  made of a resin material into which a filler is highly filled. 
         [0044]    On the upper surface of the circuit board  12 , the island  18  having a thickness of about 50 μm is formed by etching a metal film such as copper in a predetermined shape. The island  18  is not used as wiring for an electric signal to pass. In the embodiment, the island  18  is used for improving the wettability of a fixing material  38  (solder) used to fix the ceramic substrate  22 . 
         [0045]    The lower surface of the ceramic substrate  22  is coated with a metal film  20  having a thickness of about 250 μm. Here, the metal film  20  is formed in a solid state in the whole lower surface region of the ceramic substrate  22 . Thus, when solder is used as the fixing material  38 , the solder is excellently welded to the whole lower surface region of the ceramic substrate  22 . Moreover, the solder is excellently welded also to the island  18  provided on the upper surface of the circuit board  12 . Accordingly, the ceramic substrate  22  is firmly fixed to the circuit board  12  with the fixing material  38 . In addition, the solder which is a metal excellent in thermal conductivity is employed as the fixing material  38  to allow the heat generated when the transistor  34  is being operated to be excellently conducted to the circuit board  12 . 
         [0046]    On the upper surface of the ceramic substrate  22 , a conductive pattern  24  in which a metal film having a thickness of about 250 μm is etched in a predetermined shape is formed. Further, the transistor  34  or the diode  36  is mounted on the conductive pattern  24  with the conductive fixing material such as the solder. 
         [0047]    As for the transistor  34 , an MOSFET, an IGBT, or a bipolar transistor is employed. In the embodiment, the transistor  34  performs switching of a high current, for example, having a current value of one ampere or more. An electrode provided on the lower surface of the transistor  34  is connected to the conductive pattern  24  with the conductive fixing material such as the solder. In the following explanation, a case where an IGBT is employed as the transistor will be explained. 
         [0048]    The diode  36  has an electrode provided on the upper surface thereof and connected to the transistor  34  with the fine metal wire  26 , and an electrode provided on the lower surface thereof and connected to the conductive pattern  24  with the conductive fixing agent such as the solder. 
         [0049]    As for a specific example, when the transistor  34  is an IGBT, an emitter electrode provided on the upper surface of the transistor  34  is connected to an anode electrode provided on the upper surface of the diode through the fine metal wire  26 . Further, a collector electrode provided on the lower surface of the transistor  34  is connected to a cathode electrode provided on the lower surface of the diode through the conductive pattern  24 . The details of the connection structure will be described later with reference to  FIG. 3  and  FIG. 4 . 
         [0050]    Here, the fine metal wires  26  mentioned above and used for the electric connection between the transistors and the like are made of, for example, aluminum having a diameter of about 150 μm to 500 μm. Moreover, instead of the fine metal wires  26 , ribbon bonding in which a metal foil such as aluminum is formed in a ribbon state may be employed. 
         [0051]    In the embodiment, similar to the technology in the background art, the insulating layer  50  made of a resin is provided on the upper surface of the circuit board  12 . The insulating layer  50  has a thickness of, for example, 60 μm (50 μm or more and 70 μm or less). The material of the insulating layer  50  is similar to that in the background art, and obtained such that a filler such as alumina is highly filled into a resin material such as an epoxy resin. 
         [0052]    The upper surface of the circuit board  12  is coated with the insulating layer  50  in order to easily form the island  18 . In other words, it is possible to form the island  18  made of copper directly on the upper surface of the oxide film  46  which coats the upper surface of the circuit board  12 , however, this results in a weaker adhesion strength between the circuit board  12  and the island  18 . Therefore, in the embodiment, the insulating layer  50  made of an organic material is interposed between the circuit board  12  and the island  18  to improve the adhesion strength between the island  18  and the circuit board  12 . 
         [0053]    The thermal conductivity of the insulating layer  50  formed to be thin is lower than that in the background art. However, because the island  18  formed on the upper surface of the insulating layer  50  is not connected to the transistor  34 , the high thermal conductivity is not necessary for the insulating layer  50  in the embodiment. 
         [0054]    In addition, the thermal conductivity of the thin insulating layer  50  in the embodiment is 4 W/mK or more, which is four or more times the thermal conductivity of the thick insulating layer  102  having a thickness of about 200 μm. Accordingly, it is possible to excellently release the heat generated in the transistor  34  to the outside through the insulating layer  50 . 
         [0055]    In  FIG. 3 , the structure of connecting IGBTs(Q 1   s ) and diodes D 1   s  constituting the converter circuit inside the hybrid integrated circuit device is explained. Here, two IGBTs(Q 1   s ) are mounted on the upper surface of the ceramic substrate  22 G, and five diodes are mounted on the upper surface of the ceramic substrate  22 C. Moreover, the IGBTs(Q 1   s ) and the diodes D 1   s  are disposed to be opposed to each other in the vertical direction of the drawing across the region where the lead  28 , the lead  30 , and the lead  31 C are superimposed. 
         [0056]    The collector electrode provided on the rear surface of the IGBT(Q 1 ) is connected to the conductive pattern of the ceramic substrate  22 G with the conductive fixing material such as the solder, the emitter electrode on the upper surface thereof is connected to the lead  30  with the fine metal wire  26 , and a gate electrode on the upper surface thereof is connected to the wiring lead  40  with the fine metal wire  26 . In addition, the conductive pattern of the ceramic substrate  22 G is connected to the lead  31 C through the fine metal wire  26 . Accordingly, the emitter electrode of the IGBT(Q 1 ) is connected to the positive electrode side of the direct-current power supply through the lead  30 . Here, the respective electrodes of the two IGBTs(Q 1   s ) are connected to each other in parallel, which allows the large current capacity to be secured. 
         [0057]    On the upper surface of the ceramic substrate  22 C, cathode electrodes of the five diodes D 1   s  are connected with solder. Further, anode electrodes on the upper surfaces of the diodes D 1   s  are connected to the lead  31 C through the fine metal wires  26 , and the cathode electrodes on the lower surfaces thereof are connected to the conductive pattern formed on the upper surface of the ceramic substrate  22 C with solder. In addition, the conductive pattern on the ceramic substrate  22 C is connected to the lead  28  through the fine metal wire. Accordingly, the cathode electrodes of the diodes D 1   s  are connected to the negative electrode side of the direct-current power supply. 
         [0058]    With the configuration mentioned above, the cathode electrodes of the IGBTs(Q 1   s ) mounted on the ceramic substrate  22 G and the anode electrodes of the diodes D 1   s  mounted on the ceramic substrate  22 C are connected through the fine metal wires and the lead  31 C. Here, the configuration and the like of the converter circuit including the IGBTs(Q 1   s ) and the like will be described later with reference to  FIG. 5A . 
         [0059]    With reference to  FIG. 4 , the structure of connecting elements constituting the inverter circuit will be explained. Here, the lead  28 , the lead  30 , and the lead  31 A are disposed, in the superimposed manner, on a region around the central portion of the circuit board  12  in the transverse direction of the drawing. The lead  28  receives a direct-current voltage boosted up by the converter circuit. In addition, an alternating-current current converted by switching the current supplied from the leads  28  and  30  is outputted to the outside from the lead  31 A. 
         [0060]    In the upper side of the leads  28 ,  30 , and  31 A of the drawing, IGBTs(Q 3   s ) and diodes D 3   s  are connected to the ceramic substrate  22 E. Electrodes on the rear surfaces thereof are fixed to the same conductive pattern provided on the upper surface of the ceramic substrate  22 E with solder. Accordingly, the collector electrode provided on the rear surface of the IGBT(Q 3 ) and the cathode electrode provided on the rear surface of the diode D 3  are connected to each other through the conductive pattern of the ceramic substrate  22 E. Moreover, the gate electrode provided on the upper surface of the IGBT(Q 3 ) is connected to the wiring lead  40  provided on the side wall of the case material  14  through the fine metal wire  26 . In addition, the emitter electrode of the IGBT(Q 3 ) and the anode electrode of the diode D 3  are connected to the lead  30  through the multiple fine metal wires  26 . Moreover, the conductive pattern of the ceramic substrate  22 E is connected to the lead  31 A through the fine metal wire  26 . 
         [0061]    Note that, the two IGBTs(Q 3   s ) are mounted on the upper surface of the ceramic substrate  22 E, and the respective electrodes of both the elements are connected in common. In other words, the two IGBTs(Q 3   s ) are connected in parallel, which allows the large current capacity to be secured. This also applies to other ceramic substrates. 
         [0062]    Collector electrodes provided on the rear surfaces of IGBTs(Q 2   s ) and cathode electrodes provided on the rear surfaces of diodes D 2   s  are mounted on the conductive pattern provided on the upper surface of the ceramic substrate  22 A with the conductive fixing material such as the solder. The conductive pattern on which these elements are mounted is connected to the lead  28  through the fine metal wire  26 . Gate electrodes of the IGBTs(Q 2   s ) are connected to the wiring leads  40  respectively via the fine metal wires  26 . Moreover, emitter electrodes formed on the upper surfaces of the IGBTs(Q 2   s ) and anode electrodes formed the upper surfaces of the diodes D 2   s  are connected to the lead  31 A through the fine metal wires. 
         [0063]    In other words, in the embodiment, the IGBT(Q 3 ) mounted on the ceramic substrate  22 E and the IGBT(Q 2 ) mounted on the ceramic substrate  22 A are connected to each other through the fine metal wires  26  and the lead  31 A. 
         [0064]    The IGBT(Q 2 ) and the IGBT(Q 3 ) connected to each other as mentioned above convert the direct-current power into the alternating-current power. Specifically, the direct-current power supplied from the lead  28  and the lead  30  is supplied to the IGBT(Q 2 ) and the IGBT(Q 3 ). Further, these IGBTs complementarily perform switching on the basis of a control signal to generate alternating-current power, and the alternating-current power is outputted to the outside through the lead  31 A. 
         [0065]    As mentioned above, the IGBTs(Q 2   s ) and the IGBTs(Q 3   s ) constituting the inverter circuit are disposed nearest to the lead  31 A and connected to each other, and the lead  31 A continuously extends to the outside to constitute an external output terminal. Accordingly, a major part of a path through which the alternating-current power converted by both of the IGBTs is outputted to the outside is the lead  31 A having a large cross-sectional area, thereby making it possible to reduce the electric resistance in the path. 
         [0066]    Here, with reference to  FIG. 1A , circuit elements mounted on the upper surfaces of the ceramic substrates  22 F and  22 B and the connection structure thereof are similar to those mentioned above. In other words, diodes and IGBTs are mounted on the upper surfaces of the ceramic substrates  22 F and  22 B. Further, the IGBT mounted on the ceramic substrate  22 F and the IGBT mounted on the ceramic substrate  22 B are connected to each other in series through the fine metal wire  26 . As a result of this structure, the direct-current power supplied from the lead  30  and the lead  28  is converted by the IGBTs mounted on the ceramic substrates  22 F and  22 B into alternating-current power, and the alternating-current power is outputted to the outside through the lead  31 B. 
         [0067]    Next, with reference to  FIG. 5 , the circuit configuration of a solar cell generation system in which the hybrid integrated circuit device  10  mentioned above is incorporated will be explained.  FIG. 5A  is a circuit diagram illustrating an overall solar cell generation system, and  FIG. 5B  is a circuit diagram illustrating the IGBT(Q 3 ) included in the system in detail. 
         [0068]    The generation system illustrated in the drawing is provided with a solar cell  70 , a solar cell opening and closing unit  72 , a boost-up chopper  74 , an inverter  76 , and relays  78  and  80 . The electric power generated by the generation device of such a configuration is supplied to an electric power system  82  or a load  84  for self-sustaining operation. Moreover, a converter  86  and the inverter  76  which are parts of the boost-up chopper  74  are incorporated in the hybrid integrated circuit device  10  of the embodiment. 
         [0069]    The solar cell  70  is a converter to convert radiated light into electric power to be outputted, and outputs the direct-current electric power. Although one solar cell  70  is illustrated here, multiple solar cells  70  in a state of being connected in series and in parallel may be employed. 
         [0070]    The solar cell opening and closing unit  72  is provided with a function of collecting the electricity generated in the solar cell  70  and preventing backflow thereof, and supplying a direct-current current to the boost-up chopper  74 . 
         [0071]    The boost-up chopper  74  is provided with a function of boosting up a voltage of the direct-current power supplied from the solar cell  70 . In the boost-up chopper  74 , the IGBT(Q 1 ) repeats an ON operation and an OFF operation periodically to boost up the direct-current power at the voltage of about 250 V generated by the solar cell  70  to the direct-current power of about 300 V. Specifically, the boost-up chopper  74  is provided with a coil L 1  connected in series to an output terminal of the solar cell, and the IGBT(Q 1 ) connected between the coil L 1  and a ground terminal. Further, the direct-current power boosted up by the coil L 1  is supplied to the inverter  76  of the next stage via the diode D 1  and a smoothing capacitor C 1  for a backflow device. 
         [0072]    In the embodiment, the IGBTs(Q 1   s ) and the diodes D 1   s  included in the boost-up chopper  74  are placed on the upper surface of the ceramic substrates  22 G and  22 C illustrated in  FIG. 1A . Moreover, the switching of the IGBT(Q 1 ) is performed on the basis of control signals externally supplied through the signal leads  44  and the wiring leads  40 , illustrated in  FIG. 1B . In other words, the inverter circuit and the converter circuit are operated on the basis of control signals outputted from the control elements mounted on the substrate  42 . 
         [0073]    The direct-current power boosted up by the boost-up chopper  74  is converted into alternating-current power having a predetermined frequency by the inverter  76 . The inverter  76  is provided with the two IGBTs (Q 2 ) and Q 3  connected in series between the output terminal of the boost-up chopper  74 , and the two IGBTs (Q 4 ) and Q 5  connected in series as well. Moreover, the switching of these transistors are controlled by a control signal supplied from the outside, the transistors Q 2  and Q 3  and the transistors Q 4  and Q 5  are complementarily switched. Further, the alternating-current power set to the predetermined frequency by these switching is outputted to the outside from a connection point between the transistors Q 2  and Q 3  and a connection point between the transistors Q 4  and Q 5 . Here, the two-phase inverter circuit consisting of four transistors is constructed. Note that, referring to  FIG. 1A , the transistors Q 2 , Q 3 , Q 4  and Q 5  are mounted on the ceramic substrates  22 A,  22 E,  22 B, and  22 F. 
         [0074]    The alternating-current power converted by the inverter  76  is supplied to the commercial electric power system  82  or the load  84  for self-sustaining operation. The relay  78  is interposed between the electric power system  82  and the inverter  76 , the relay  78  is in a conduction state at the normal time, and the relay  78  is in a cut-off state if abnormality is detected either one of electric power system  82  and the inverter  76 . Moreover, the relay  80  is interposed also between the inverter  76  and the load for self-sustaining operation, and the supply of electric power is cut off by the relay  80  in an abnormal state. 
         [0075]    In the embodiment, with reference to  FIG. 1A , the leads  31 A and  31 B serve as a major part of the path of output of the inverter circuit mentioned above. The leads  31 A and  31 B are made of copper having a low electric resistance value and in addition have large cross-sectional areas as mentioned above, resulting in a low electric resistance of the path through which the converted electrode is outputted. 
         [0076]    Further in the embodiment, the elements included in the boost-up chopper  74  and the inverter  76  are fixed to the upper surfaces of the ceramic substrates  22  illustrated in  FIG. 2 . Accordingly, even if the inverter circuit is operated, because no voltage is applied to the upper surface of the island  18  formed on the upper surface of the circuit board  12 , no short circuit is generated between the circuit board  12  and the island  18 . 
         [0077]    With reference to  FIG. 5B , the IGBT(Q 3 ) which is one of the transistors included in the inverter  76  mentioned above is configured to include two IGBTs (Q 31 ) and (Q 32 ), and four diodes D 31 , D 32 , D 33 , and D 34  which are inversely connected to main electrodes of these transistors. 
         [0078]    The IGBT(Q 31 ) and the IGBT(Q 32 ) are connected to each other in parallel. Specifically, gate electrodes, emitter electrodes, and collector electrodes of the IGBT(Q 31 ) and the IGBT(Q 32 ) are connected commonly. Thus, the larger current capacity can be obtained than in the case of one transistor. 
         [0079]    Moreover, anode electrodes of the diodes D 31 , D 32 , D 33 , and D 34  are connected to the emitter electrodes of the IGBT(Q 31 ) and the IGBT(Q 31 ). Further, cathode electrodes of these diodes are connected to the collector electrodes of the IGBT(Q 31 ) and the IGBT(Q 32 ). 
         [0080]    Next, with reference to  FIG. 6  to  FIG. 8 , a manufacturing method of the hybrid integrated circuit device  10  mentioned above will be explained. 
         [0081]    Firstly, with reference to  FIG. 6 , the circuit board  12  is prepared.  FIG. 6A  is a plan view illustrating this process, and  FIG. 6B  and  FIG. 6C  are cross-sectional views illustrating this process. 
         [0082]    With reference to  FIG. 6A  and  FIG. 6B , the circuit board  12  to be prepared is a circuit board made of a thick metal, such as aluminum and copper, having a thickness of about 1 mm to 3 mm. When aluminum is employed as a material of the circuit board  12 , the upper surface and the lower surface of the circuit board  12  are coated with anodized films. Note that, the circuit board  12  is molded in a predetermined shape by performing press processing or grinding processing with respect to a large-sized circuit board. 
         [0083]    Islands  18 A- 18 G are formed by etching the copper foil stuck on the upper surface of the circuit board  12  in a predetermined shape. The islands  18 A- 18 G are not for circuit elements such as transistors being mounted thereon but for improving the wettability of solder used when ceramic substrate is mounted, which is described later. 
         [0084]    With reference to  FIG. 6C , when aluminum is employed as a material of the circuit board  12 , the upper surface and the lower surface of the circuit board  12  are, respectively coated with the oxide films  46  and  48  formed of anodized aluminum by anodic oxidation. In addition, the upper surface of the oxide film  46  on which the oxide film  46  is formed is coated with the insulating layer  50 . The composition or the thickness of the insulating layer  50  is as mentioned above. Because providing the insulating layer  50  results in a good adhesiveness between the insulating layer  50  and the island  18 , this makes it possible to firmly adhere the island  18  containing a resin as an organic material to the circuit board  12 . 
         [0085]    Next, with reference to  FIG. 7 , ceramic substrates are disposed on predetermined portions of the circuit board  12 .  FIG. 7A  is a plan view illustrating this process, and  FIG. 7B  and  FIG. 7C  are cross-sectional views. 
         [0086]    With reference to  FIG. 7A , the ceramic substrates  22 A- 22 G on which predetermined circuit elements such as transistors and diodes are mounted on are fixed to the upper surface of the circuit board  12 . Here, the ceramic substrates  22 A- 22 G are respectively fixed to the upper surfaces of the islands  18 A- 18 G formed on the upper surface of the circuit board  12  in the previous process. 
         [0087]    With reference to  FIG. 7C , the conductive pattern  24  and the metal film  20  are respectively formed on the upper surface and the lower surface of the ceramic substrate  22 . Further, the metal film  20  with which the lower surface of the ceramic substrate  22  is coated is fixed to the island  18  provided on the upper surface of the circuit board  12  with the fixing material  38  such as solder. The metal film  20  is provided to entirely cover all over the lower surface of the ceramic substrate  22 , and thereby the fixing material  38  is adhered on the entire lower surface region of the ceramic substrate  22 . Accordingly, the ceramic substrate  22  is firmly joined to the circuit board  12 . Here, the transistor  34  and the diode  36  may be fixed on the upper surface of the ceramic substrate  22  in advance, or alternatively, these elements may be mounted thereon after the ceramic substrate  22  is fixed to the circuit board  12 . 
         [0088]    In this process, the ceramic substrate  22  is surface-mounted by a reflow process in which solder paste is applied on the upper surface of the island  18 , and the ceramic substrate  22  is placed on the upper surface of the solder paste and then is subjected to heat curing. Here, both of the metal film  20  formed on the lower surface of the ceramic substrate  22  and the island  18  formed on the upper surface of the circuit board  12  are made of metals and have the excellent wettability of solder. Accordingly, the fixing material  38  made of the fused solder is entirely brought into contact with the both thereof, thereby obtaining a good junction. 
         [0089]    Next, with reference to  FIG. 8A , the case material  14  is bonded to the upper surface periphery part of the circuit board  12 . In the case material  14 , as mentioned above, the output leads  28 ,  30 , and  31 A and the wiring leads  40  are incorporated in advance. The case material  14  is bonded to the upper surface of the circuit board  12  with a bonding material such as an epoxy resin. 
         [0090]    Next, with reference to  FIG. 8B , the circuit elements are electrically connected to the respective leads by the fine metal wires  26 . Specifically, the gate electrode of the transistor  34  fixed to the upper surface of the ceramic substrate  22 B is connected to the wiring lead  40  through the fine metal wire  26 . Moreover, the emitter electrode disposed on the upper surface of the transistor  34 , together with the anode electrode provided on the upper surface of the diode  36 , are connected to the output lead  30 . Moreover, the transistor  34  mounted on the upper surface of the ceramic substrate  22 F is connected to the output lead  28  through the fine metal wires  26 . In addition, the conductive pattern formed on the upper surface of the ceramic substrate  22 E is connected to the lead  31 A through the fine metal wire  26 . 
         [0091]    In this process, the fine metal wires made of aluminum having a diameter of about 150 μm to 500 μm are used for connection of the circuit elements. Moreover, instead of the wire bonding by the fine metal wires, ribbon bonding in which a ribbon-shaped aluminum foil is used may be employed. 
         [0092]    Next, with reference to  FIG. 8C , upper end portions of the wiring leads  40  are inserted into holes of the substrate  42 . Accordingly, the respective wiring leads  40  are connected to the signal leads  44  provided on the surface of the substrate  42  through the conductive pattern formed on the substrate  42 . 
         [0093]    In addition, the sealing resin  16  is filled into a space surrounded by the case material  14 . As for the sealing resin  16 , a silicon resin or an epoxy resin is employed. Moreover, a resin material into which a filler such as alumina is filled may be employed as the sealing resin  16 . The transistor  34 , the diode  36 , the fine metal wires  26 , the wiring leads  40 , the substrate  42 , and the like are resin-sealed by the sealing resin  16 . 
         [0094]    The hybrid integrated circuit device  10  illustrated in  FIG. 1  is manufactured through the processes above.