Abstract:
The invention relates to a digital receiver part of a spread spectrum receiver, to which receiver part an intermediate-frequency signal (S in ) is applied, and from whose output a carrier and code demodulated signal (S out ) is obtained, comprising a code mixer ( 204 ) for code demodulation of the signal by means of a local spreading code replica, a carrier mixer ( 202 ) for carrier demodulation of the signal by means of a local carrier replica, and first decimation means ( 305 ). The receiver part of the invention is characterized in that said code mixer ( 204 ) is arranged to precede said carrier mixer ( 202 ) on the signal path, said first decimation means ( 305 ) are arranged between said code mixer ( 204 ) and said carrier mixer ( 202 ), and the output of the carrier mixer ( 202 ) is functionally connected as an output (S out ) of the digital receiver part.

Description:
BACKGROUND OF THE INVENTION 
     The invention relates to a spread spectrum receiver and particularly to stepwise decimation in a spread spectrum receiver. 
     In spread spectrum systems, the bandwidth used for transmitting a signal is substantially wider than is required for the data to be transmitted. The spectrum of a signal is spread in the transmitter by means of a pseudo-random spreading code, which is independent of the original data. In the receiver, a code replica, which is an identical copy of said spreading code, is used to narrow the spectrum of a signal. Spread spectrum systems can be coarsely divided into direct sequence (DS) spread spectrum systems and frequency hopping (FH) spread spectrum systems. In frequency hopping systems, the transmission frequency is varied in accordance with a pseudo-random spreading code within the limits of the available bandwidth, i.e. hopping occurs from one frequency to another. In direct sequence systems, the spectrum is spread to the available bandwidth by shifting the phase of the carrier in accordance with a pseudo-random spreading code. The bits of a spreading code are usually called chips as distinct from actual data bits. 
       FIG. 1A  is a block diagram of a spread spectrum system based on a direct sequence, a transmitter  101  comprising not only a data modulator  104 , but also a spreading code modulator  106  for spreading a transmitted spectrum by means of a spreading code. A receiver  102  comprises a despreading modulator  108 , which operates with a spreading code replica identical to said spreading code and correlates a received signal with said spreading code replica. If the spreading code and the spreading code replica generated in the receiver are identical, and the spreading code replica and the spreading code included in the received signal are in phase, a data modulated signal preceding the spreading is obtained from the output of the despreading modulator  108 . At the same time, any spurious signals are spread. A filter  110 , which succeeds the despreading modulator  108 , lets the data modulated signal through, but removes most of the power of a spurious signal, which improves the signal-to-noise ratio of the received signal. 
       FIG. 1B  shows a prior art spread spectrum receiver. A received signal S RF  is mixed by multipliers  112  and  114  with a sine-phased and cosine-phased component generated by a local oscillator  116 , and filtered with low-pass filters  118  and  120  to generate intermediate-frequency I_if (in-phase) and Q_if (quadrature) signals. The I_if and Q_if signals are then subjected to analog-to-digital conversion in A/D converters  122  and  124 , and applied to a digital receiver part  126 , in which code and carrier demodulation is performed, and whose output is further connected to a data demodulator (not shown) which performs data demodulation to the signal. 
       FIGS. 2A and 2B  are block diagrams of two such prior art implementations of the digital receiver part of a spread spectrum receiver based on direct sequence spreading that are usable as the digital receiver part  126  of FIG.  1 B. The double lines in the block diagrams denote I and Q signals. In the implementation of  FIG. 2A , an incoming intermediate-frequency signal S in  is first multiplied by a local carrier replica generated in a frequency generator  203  using a carrier mixer  202  to remove the carrier and the Doppler shift, whereupon it is multiplied in a code mixer  204  by a local spreading code replica generated by a code generator  207  controlled by a frequency generator  205 . The multiplication by the spreading code replica provides despreading and narrows the spectrum of the signal. Next, the narrowband signal obtained from the code mixer  204  is filtered with a low-pass filter  206  to remove noise and interference, and the sampling frequency of the low-pass filtered signal is lowered to a frequency according to the spectrum of the data modulation with a decimator  208 . Signal S out  obtained from the decimator  208  is applied to carrier and code tracking means  212  and  214  and to a data demodulator (not shown) which performs data demodulation to the signal. 
       FIG. 2C  shows the spectrum shape of a wideband incoming signal S in  at an intermediate frequency f IF .  FIG. 2D  shows the spectrum shape of a signal obtained from the output of the carrier mixer  202  and down-converted to base frequency.  FIG. 2E , in turn, shows the spectrum shape of a narrowband signal obtained from the output of the code mixer  204 . However,  FIGS. 2C  to  2 E are only intended to illustrate the shape of the spectrum of a signal, and not to present the actual spectrum of a signal. 
     The implementation of  FIG. 2B  is functionally identical to that of FIG.  2 A. In this implementation, a local carrier replica, and a spreading code replica are combined in a mixer  213  to generate a local signal replica, and the incoming signal S in  is multiplied by this signal replica in a mixer  215 . Otherwise, the signal processing corresponds to the implementation of FIG.  2 A. This implementation is in use particularly in systems based on analog components, since it minimizes the number of components required on the signal path. 
     The implementation of  FIG. 2A  is widely used. The implementation of  FIG. 2A  is preferable to that of  FIG. 2B , because spread spectrum receivers usually have to comprise several out-of-phase signal paths, starting from the multiplication by the spreading code replica, to enable the implementation of spreading code tracking. Spreading code tracking can be implemented for example with a correlator structure shown in FIG.  2 F and comprising two out-of-phase signal paths  222  and  223 , in which an incoming signal S code  freed from carrier modulation is correlated with an early C 0  and late C 1  spreading code replica generated locally with a code generator  224 . A signal depending on the phase difference of the local spreading code replica and the code included in the signal S code , is obtained from the output of an adder  226 , and this signal is used to adjust the phase of the spreading code replica in the right direction. Spreading code tracking is typically carried out separately for I and Q signals, i.e. the number of required components is double compared with the structure of FIG.  2 F. 
     A common feature in prior art implementations is that the carrier and the spreading code are removed at the same sampling frequency and that out-of-phase signal paths are processed in parallel. 
     BRIEF DESCRIPTION OF THE INVENTION 
     An object of the invention is to provide a digital receiver part for a spread spectrum receiver so as to lower the power consumption of the spread spectrum receiver. The invention also relates to a spread spectrum receiver of the like device, which uses the digital receiver part of the invention. The objects of the invention are achieved with a digital receiver part and a spread spectrum receiver, which are characterized by what is stated in the independent claims. The preferred embodiments of the invention are disclosed in the dependent claims. 
     The invention is based on stepwise decimation in the receiver so that the sampling frequency used at each particular time is as low as possible. This allows the number of high-speed signal processing blocks to be minimized, resulting in minimal power consumption. 
     In accordance with the invention, to narrow the spectrum of a signal, the signal at an intermediate frequency is first mixed with a spreading code replica to perform code demodulation. Decimation for lowering the sampling rate is the next step, followed by removal of the carrier by mixing the signal with a carrier replica. The lower sampling frequency allows the components carrying out removal of the carrier to be timed at a frequency lower than that in prior art solutions, and/or the removal of the carrier to be time multiplexed for several signal paths. If, after removal of the carrier, the sampling frequency of the signal is still higher than the sampling frequency required by data demodulation, a further lowering of the sampling frequency (i.e. decimation) within the limits set by the bandwidth of data modulation before data demodulation. 
     Generally, the solution of the invention is more complex than prior art solutions, in which the signal processing for removing carrier and code is carried out at the same sampling frequency, but the final implementation is not substantially more complex and does not require substantially more components than prior art solutions. In addition, the solution of the invention allows the carrier demodulation of out-of-phase signal paths in a time-multiplexed manner, which reduces the number of required components. 
     The invention is suitable for digital implementations. The solution is particularly advantageous in implementations in which the intermediate frequency of an intermediate-frequency signal coming to a digital receiver part, and the bandwidth required by data demodulation are less than the bandwidth required by the spreading code. This often materializes in digital CDMA (Code Division Multiple Access) systems, in which the last intermediate frequency generated by the radio part is low. 
     An advantage of the digital receiver part of the spread spectrum receiver and the spread spectrum receiver of the invention is optimized power consumption. A further advantage of the invention is that the components used for carrier demodulation can be timed at a lower frequency, and that time multiplexing is possible. 
    
    
     
       BRIEF DESCRIPTION OF THE FIGURES 
       The invention will now be described in greater detail by means of preferred embodiments with reference to the attached drawings, of which 
         FIG. 1A  is a block diagram of a spread spectrum system based on a direct sequence, 
         FIG. 1B  is a block diagram of a prior art spread spectrum receiver based on a direct sequence, 
         FIGS. 2A and 2B  are block diagrams of some prior art digital receiver parts of a spread spectrum receiver, 
         FIGS. 2C ,  2 D and  2 E show the spectrum shape of a signal at different points of the digital receiver part shown in  FIG. 2A , 
         FIG. 2F  shows a prior art correlator structure, 
         FIG. 3A  is a block diagram of the digital receiver part of a spread spectrum receiver of the invention, 
         FIGS. 3B ,  3 C and  3 D show the spectrum shape of a signal at different points of the digital receiver part of the invention shown in  FIG. 3A , 
         FIG. 4  is a more specified block diagram of a digital receiver part of a spread spectrum receiver of the invention, and 
         FIG. 5  is a more specified block diagram of another digital receiver part of the spread spectrum receiver of the invention. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       FIG. 3A  is a block diagram of a digital receiver part of a spread spectrum receiver of the invention, which can be used as the digital receiver part  126  of FIG.  1 B. The double lines in the block diagram denote I and Q signals. An incoming signal S in  is first multiplied by a local spreading code replica generated with a code generator  207  controlled by a frequency generator  205  using a code mixer  204 , which narrows the signal spectrum to the width of data modulation. The signal is then filtered with a low-pass filter  304 , and the low-pass filtered signal is decimated with a decimator  306 . Next, the obtained signal, which is at a lower sampling frequency, is multiplied by a local carrier replica generated with a frequency generator  203  using a carrier mixer  202 , which shifts the signal to the base frequency by removing the carrier frequency and the Doppler shift. The signal obtained from the carrier mixer  202  is filtered further with a low-pass filter  308 , and this low-pass filtered signal may be further decimated with a decimator  310  within the bandwidth required by data modulation. Finally, the signal S out  obtained from the decimator  310  is applied to carrier and code tracking means  212  and  214 , which control the frequency generators  203  and  205 , respectively, and to a data demodulator (not shown). 
       FIG. 3B  shows the spectrum shape of a broadband incoming signal S in  at an intermediate frequency f IF , the shape being the same as the spectrum shape shown in FIG.  2 C. At this stage, the sampling frequency of the signal may be in the range 16 MHz, for example.  FIG. 3C  shows the spectrum shape of a narrowband signal at the intermediate frequency f IF  and obtained from the output of the code mixer  204 . At this stage the signal is decimated, for example to about 255 kHz.  FIG. 30 , in turn, shows the spectrum shape of a narrowband signal shifted to the base frequency and obtained from the output of the carrier mixer  202 , the shape being the same as the spectrum shape shown in FIG.  2 E. At this stage, the sampling frequency may be in the range of 1 kHz, for example.  FIGS. 3B  to  3 D are only intended to illustrate the shape of the spectrum of a signal and not to represent the real spectrum of a signal. 
     In the structure of  FIG. 3A , the signal to be applied to the carrier and code tracking means  212  and  214  can also be taken directly from the output of the carrier mixer  202 . The flow-pass filter  308  and the decimator  310  can also be omitted from the structure of the invention, particularly if the bandwidth of the signal obtained from the carrier mixer  202  corresponds to the bandwidth requited by data demodulation, and the signal cannot be subjected to further decimation before the data demodulation is removed. The signals can be low-pass filtered and decimated for instance with ‘integrate and dump’ type of filters, in which an input signal is integrated for a given time, whereupon the result of the integration is sampled, and the integration is restarted from the beginning.  FIG. 3A  shows the signal path for only one IQ signal pair, but to implement spreading code tracking, such signal paths are typically needed at least two for two out-of-phase signals. 
       FIG. 4  is a more specified block diagram of a digital receiver part of a spread spectrum receiver of the invention, and comprises three signal paths for out-of-phase signals, which comprise separate I and Q components. The receiver part can be divided into a code demodulation part  401 , a carrier demodulation part  402  and a processing part  403 , which, in turn, can be divided by hardware and software into parts to be implemented in a digital signal processor, for example in such a way that the code demodulation part  401  and the carrier demodulation part  402  are implemented with hardware and the processing part  403  with software. 
     The code demodulation part  401  comprises three code mixers  404 ,  405  and  406  for removing the code modulation of out-of-phase signals by means of a local spreading code replica for code tracking. However, the number of out-of-phase signal paths is not limited to three, but there may be fewer or more than three of them. The outputs of the code mixers  404 ,  405  and  406  are connected to decimation means  407 ,  408  and  409 , respectively, which can be implemented for example as ‘integrate and dump’ type of filters. 
     The outputs of the decimation means  407 ,  408  and  409  are connected to carrier mixers  410 ,  411  and  412 , respectively, of the carrier demodulation part  402 , and are used to shift the intermediate frequency of signals to the base frequency by carrying out complex multiplication of I and Q signals by sine-phased and cosine-phased signals LO_sin and LO_cos generated by the local oscillator. The outputs of the carrier mixers  410 ,  411  and  412  are connected to other decimation means  413 ,  414  and  415 , respectively, which can be implemented for example as ‘integrate and dump’ type of filters and which further decimate the signal. 
     The outputs of the decimation means  413  and  414  are connected to the code tracking means  214  of the processor part  403  for performing code tracking. The output of the code tracking means controls the frequency generator  205  of the code demodulation part  401 , which generator, in turn, control the code generator  207 , which generates out-of-phase spreading code replicas for the code mixers  404 ,  405  and  406 . The inputs of the decimation means  415  are connected to the carrier tracking means  215  of the processing part  403  for performing carrier tracking. The outputs of the carrier tracking means control the frequency generator  207  of the carrier demodulation part  402 , which generator generates sine-phased and cosine-phased signals LO_sin and LO_cos for the carrier mixers  410 ,  411  and  412 . From the output of the decimation means  415  is also obtained a carrier and code demodulated signal S out , which is further applied to a data demodulator, which is not shown in the figure. 
       FIG. 5  is a more specified block diagram of another digital receiver part of a spread spectrum receiver of the invention, comprising three signal paths for out-of-phase signals, which comprise separate I and Q signals. The receiver part can be divided into a code demodulation part  401 , a carrier demodulation part  502  and a processing part  503 , which, in turn, can be divided with hardware and software into parts to be implemented in a digital signal processor, for example in such a way that the code demodulation part  401  and the carrier demodulation part  502  are implemented by hardware and the processing part  503  is implemented by software. 
     The code demodulation part  401  comprises three code mixers  404 ,  405  and  406  for removing the code modulation of out-of-phase signals by means of a local spreading code replica for code tracking. However, the number of out-of-phase signal paths is not limited to three, but there may be fewer or more than three of them. The outputs of the code mixers  404 ,  405  and  406  are connected to the decimation means  407 ,  408  and  409 , respectively, which can be implemented for instance as ‘integrate and dump’ type of filters. 
     The outputs of the decimation means  407 ,  408  and  409  are connected to a multiplexer  504  in the carrier demodulation part  502  for implementing time multiplexing of out-of-phase signal paths. The output of the multiplexer  504  is coupled to a carrier mixer  505  for shifting the intermediate frequency of the signals to the base frequency by performing complex multiplication of the I and Q signals by the sine-phased and cosine-phased signals LO_sin and LO_cos generated by the local oscillator. The output of the carrier mixer  505  is connected to other decimation means  506 , which can be implemented for example as an ‘integrate and dump’ type of filter and which further decimate the signal. 
     The output of the decimation means  506  is coupled to a processing part  503 , which is implemented in a signal processor  507  with software and in which the time multiplexed signals are processed to perform code tracking and carrier tracking and to generate a carrier and code demodulated signal S out  from the output of the decimation means  506 . As an output from the processing part  503 , a signal is also obtained that controls the frequency generator  205  of the code demodulation part  401 , which generator in turn controls the code generator  207 , which generates the out-of-phase spreading code replicas for the code mixers  404 ,  405  and  406 , and a signal, which controls the frequency generator  207  of the carrier demodulation part  502 , which generator generates the sine-phased and cosine-phased signals LO_sin and LO_cos for the carrier mixer  505 . The carrier and code demodulated signal S out  obtained from the output of the signal processor  507  is further applied to a data demodulator, which is not shown in the figure and which frees the signal from data modulation. 
     It is obvious to a person skilled in the art that as technology advances, the basic idea of the invention can be implemented in a variety of ways. The invention and its embodiments are thus not restricted to the above examples, but may vary within the scope of the claims.