Abstract:
Due to a difference in a film thickness generated in structure layers located on top of a light receiver, a bottom surface of an open part does not flatten and an amount of incident light within a surface of the light receiver becomes nonuniform. A flat layer is formed by using a damascene process to form a first metal interlayer or by polishing using CMP an insulation film stacked after the first metal layer is formed. As a result, the insulation film stacked on the light receiver is also formed evenly. Thus, when an inside of the light receiver is opened by etching, the bottom surface of the open part can be formed evenly.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The priority application number JP2006-198586 upon which this patent application is based is hereby incorporated by the reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to a semiconductor integrated circuit device in which an integrated circuit is formed on a semiconductor substrate which includes a light receiver and, more particularly, to a method for manufacturing a semiconductor integrated circuit device in which an open part is formed by etching an interlayer insulation film stacked on a substrate. 
         [0004]    2. Description of the Related Art 
         [0005]    In recent years, as information recording media, optical disks such as CDs (Compact Disks) and DVDs (Digital Versatile Disks) have become predominant. A playback device of the optical disks replays recorded data based on detection by a photodetector of a change in intensity of reflected light of laser light irradiated along a track of the optical disk. 
         [0006]      FIG. 1  is a schematic plan view of a conventional photodetector  10 . 
         [0007]      FIG. 2  is a schematic sectional view of a light receiver  11  and a wiring structure  12  taken along the line A-A′ of  FIG. 1  and vertical to a semiconductor substrate. 
         [0008]    The photodetector  10 , which detects reflected light, has the light receiver  11  buried in a surface of the semiconductor substrate  14 . The light receiver  11  includes a PIN photodiode (PD) diffusion layer  34  divided into 2.times.2=4 partitions. The PD diffusion layer  34  is formed as, for instance, a cathode area where an N-type impurity is diffused at a high concentration. Furthermore, the PD diffusion layer  34  is separated by a separative diffusion layer  33 . The separative diffusion layer  33  is formed as, for instance, an anode area where a P-type impurity is diffused at a high concentration on the surface of the semiconductor substrate  14 . A faint photoelectric conversion signal is generated by inputting reflected light of laser light into the light receiver  11 , and this signal is amplified by an amplifier formed in an adjacent area and is output to a signal processing circuit in a latter stage. 
         [0009]    The photodetector  10  has a first interlayer insulation film  16 , a first metal layer  17 , a second interlayer insulation film  18 , a second metal layer  19  and a third interlayer insulation film  20  stacked in sequence on the semiconductor substrate  14 . The first metal layer  17  and the second metal layer  19 , respectively, are formed of aluminum (Al), etc. and patterned by using a photolithographic technique. By patterning, a wiring structure  12 , and a signal line  13 A and a voltage application line  13 B which are connected to the wiring structure  12  are formed in the first metal layer  17 . As a result, the separative diffusion layer  33  is set at a fixed electric potential by the voltage application line  13 B through the wiring structure  12 . On the other hand, a photoelectric conversion signal generated at each PD diffusion layer  34  is also taken out by the signal line  13 A through the wiring structure  12 . 
         [0010]    In the above-described configuration, in order to secure frequency characteristics of the photoelectric conversion signal and to suppress noise superposition, both each PD diffusion layer  34  and the separative diffusion layer  33  are required to be electrically connected to the signal line  13 A and the voltage application line  13 B respectively so as to be low resistance. Therefore, it is necessary that the wiring structure  12  is electrically connected to each diffusion layer through as many contact holes as possible. Thus, as shown in  FIG. 1 , the wiring structure  12  is arranged so as to encompass the light receiver  11 . 
         [0011]    After the metal layers and the interlayer insulation films are stacked, an open part  15  is formed by etching interlayer insulation films, etc. stacked on the light receiver  11  in order to enhance incident efficiency of light to the light receiver  11 . The open part  15  is opened so as to be a similar shape, which is one size smaller, to the one that the wiring structure  12  forms. 
         [0012]      FIG. 3  is a perspective view of the light receiver  11  and the wiring structure  12 . As shown in  FIG. 3 , the wiring structure  12  is arranged around the light receiver on the semiconductor substrate. 
         [0013]    After the wiring structure  12  is formed around the light receiver  11 , an insulation film is formed. The insulation film is formed by using materials such as SOG (Spin on Glass), BPSG (Boro-Phospho Silicate Glass) and TEOS (Tetraethyl Orthosilicate). 
         [0014]    After the insulation film is formed, the insulation film, etc. stacked on the light receiver  11  is removed by anisotropic etching and the open part  15  is formed. Since the wiring structure  12  is thick, the surface of the insulation film stacked on the wiring structure  12  does not flatten and becomes a concavo-convex shape. Additionally, when an insulation film, etc. is further stacked in sequence on the insulation film whose surface is formed into a concavo-convex shape, the surface of a film formed on top also does not flatten and becomes a concavo-convex shape. Thus, when the open part  15  is formed by etching the insulation film, etc. stacked on the light receiver  11 , a bottom surface of the open part  15  has a form which the surface form of the film formed on the top is transcribed as it is before etching. That is, the bottom surface of the open part  15  is not also formed evenly. 
         [0015]    Thus, when the bottom surface of the open part  15  is not formed evenly, the incident efficiency within the surface of the light receiver  11  is not equalized. Furthermore, when the uneven portion of the bottom surface of the open part  15  reflects the light, a photoelectric conversion of the photodetector may be adversely affected. 
       [Patent Reference 1] JP 2001-60713 A 
     SUMMARY OF THE INVENTION 
       [0016]    The present invention provides a method for manufacturing a semiconductor integrated circuit device comprising: 
         [0017]    on a semiconductor substrate which includes a light receiver, 
         [0018]    forming a first insulation film on the semiconductor substrate; 
         [0019]    forming a wiring structure around the light receiver on the first insulation film by a damascene process; 
         [0020]    forming a second insulation film on the wiring structure; 
         [0021]    and opening the second insulation film formed on the light receiver by etching. 
         [0022]    The present invention provides a method for manufacturing a semiconductor integrated circuit device comprising: 
         [0023]    on a semiconductor substrate which includes a light receiver, 
         [0024]    forming a first insulation film on the semiconductor substrate; 
         [0025]    forming a wiring structure around the light receiver on the first insulation film; 
         [0026]    forming a second insulation film on the wiring structure; 
         [0027]    flattening a surface of the second insulation film; 
         [0028]    forming a third insulation film on the second insulation film; 
         [0029]    and opening the third insulation film formed on the light receiver by etching. 
     
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0030]      FIG. 1  is a schematic plan view of a conventional photodetector; 
           [0031]      FIG. 2  is a schematic sectional view of a conventional photodetector; 
           [0032]      FIG. 3  is a perspective view showing an arrangement of a light receiver and a wiring structure; 
           [0033]      FIGS. 4A-4D  show formation processes of a photodetector in accordance with a first embodiment of the present invention; and 
           [0034]      FIGS. 5A-5F  show formation processes of a photodetector in accordance with a second embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0035]    In what follows, embodiments of the present invention will be described with reference to the drawings. 
         [0036]      FIGS. 4A-4D  are views showing formation processes of a photodetector in accordance with a first embodiment of the present invention. 
         [0037]      FIGS. 4A-4D  are sectional views taken along the line A-A′ of  FIG. 1  and vertical to a semiconductor substrate. The planar shape of the photodetector in this embodiment is the same as that in  FIG. 1 . 
         [0038]    Firstly, a first insulation film  56  is formed on a semiconductor substrate  54  where a light receiver  51  is formed on the surface and further, a first metal layer  57  is formed by a damascene process ( FIG. 4A ). The first metal layer  57  is formed of aluminum (Al), tungsten (W), etc. The surfaces of the first insulation film  56  and the first metal layer  57  are formed evenly by using the damascene process and a wiring structure  52 , and a signal line  53 A and a voltage application line (not shown) which are connected to the wiring structure  52  are formed in the first metal layer  57 . The wiring structure  52  is formed around the light receiver  51 . Furthermore, the wiring structure  52  is connected electrically to a separative diffusion layer  73  and each PD diffusion layer  74  through a plurality of contact holes. As a result, the separative diffusion layer  73  is set at a fixed electric potential by the voltage application line through the wiring structure  52 . For instance, a ground potential is applied to the separative diffusion layer  73 . Furthermore, a photoelectric conversion signal generated by inputting reflected light into each PD diffusion layer  74  is taken out by the signal line  53 A through the wiring structure  52 . 
         [0039]    After the first metal layer  57  is formed, a second insulation film  58  and a second metal layer  59  are formed ( FIG. 4B ). Since the second insulation film  58  is stacked on the first insulation film  56  and the first metal layer  57  whose surfaces are formed evenly, a surface of the second insulation film  58  is also formed evenly. Then, the second metal layer  59  is formed at a position farther from the light receiver  51  than the wiring structure  52  and connected to the first metal layer  57  through a contact hole. In this embodiment, after a metal layer is stacked on the second insulation film  58 , the second metal layer  59  is formed by patterning this metal layer by using the photolithographic technique. However, the damascene process and other methods can also be used. 
         [0040]    After the second metal layer  59  is formed, a third insulation film  60  is formed ( FIG. 4C ). Since the second metal layer  59  is formed at a position farther from the light receiver  51  than the wiring structure  52 , a flatness of the third insulation film  60  formed on the light receiver  51  is not affected. Thus, the third insulation film  60  on the light receiver  51  is formed evenly. 
         [0041]    After each metal layer and each insulation film are stacked, an open part  55  is formed ( FIG. 4D ) by etching each insulation film stacked on the light receiver  51  in order to enhance incident efficiency of reflected light to the light receiver  51 . Since the surface of the third insulation film  60  stacked on the light receiver  51  is formed evenly, a bottom surface of the open part  55  is also formed evenly. This is because that the bottom surface of the open part  55  has a form which the surface form of the film formed on the top is transcribed as it is before etching. 
         [0042]    As described in this embodiment, by forming the first metal layer  57  by using the damascene process, a formation of the wiring structure  52  and flattening of the insulation film on the light receiver  51  can be realized in the identical process. Furthermore, each insulation film stacked on the light receiver  51  can be stacked so as to be flat and the bottom surface of the open part  55  can be flattened. As a result, the incident efficiency within the surface of the light receiver  51  can be equalized. Furthermore, an adverse affect on the photoelectric conversion of the photodetector generated due to light reflected by an uneven portion of the bottom surface of the open part  55  can be suppressed. 
         [0043]    Next, a second embodiment will be described below. 
         [0044]      FIGS. 5A-5F  are views showing formation processes of a photodetector in accordance with a second embodiment of the present invention. 
         [0045]      FIG. 5A-5F  are sectional views taken along the line A-A′ of  FIG. 1  and vertical to a semiconductor substrate. The planar shape of the photodetector in this embodiment is the same as that in  FIG. 1 . 
         [0046]    Firstly, the first insulation film  56  and the first metal layer  57  are stacked in sequence on the semiconductor substrate  54  where the light receiver  51  is formed on the surface ( FIG. 5A ). The first metal layer  57  is formed of aluminum (Al), etc. and patterned by using a photolithographic technique. The wiring structure  52 , and a signal line  53 A and a voltage application line (not shown) which are connected to the wiring structure  52  are formed in the first metal layer  57  by patterning. The wiring structure  52  is formed around the light receiver. As a result, the separative diffusion layer  73  is set at a fixed electric potential by the voltage application line through the wiring structure  52 . For instance, a ground potential is applied to the separative diffusion layer  73 . Furthermore, a photoelectric conversion signal generated by inputting reflected light into each PD diffusion layer  74  is taken out by the signal line  53 A through the wiring structure  52 . 
         [0047]    After the first metal layer  57  is formed, a second insulation film  78  is stacked ( FIG. 5B ). Since the first metal layer  57  is thick, a surface of the second insulation film  78  does not become flat. 
         [0048]    After the second insulation film  78  is stacked, the surface of the second insulation film  78  is formed evenly by using CMP (Chemical Mechanical Polishing) and so on ( FIG. 5C ). 
         [0049]    A third insulation film  80  and a second metal layer  79  are formed ( FIG. 5D ) on a layer which the first metal layer  57  and the second insulation film  78  are formed. Since the third insulation film  80  is stacked on the second insulation film  78  whose surface is formed evenly, the surface of the third insulation film  80  is also formed evenly. When the second insulation film  78  is thick enough, it is not necessary to stack the third insulation film  80 . The second metal layer  79  is formed at a position farther from the light receiver  51  than the wiring structure  52  and the second metal layer  79  and the first metal layer  57  are connected through a contact hole. In this embodiment, after a metal layer is stacked on the third insulation film  80 , the second metal layer  79  is formed by patterning this metal layer by using the photolithographic technique. However, the damascene process and other methods can also be used. 
         [0050]    After the second metal layer  78  is formed, a fourth insulation film  81  is formed ( FIG. 5E ). Since the second metal layer  78  is formed at a position farther from the light receiver  51  than the wiring structure  52 , the flatness of the fourth insulation film  81  formed on the light receiver  51  is not affected. Thus, the fourth insulation film  81  on the light receiver  51  is formed evenly. 
         [0051]    After each metal layer and each insulation film are stacked, an open part  55  is formed ( FIG. 5F ) by etching each insulation film stacked on the light receiver  51  in order to enhance incident efficiency of reflected light to the light receiver  51 . Since a surface of the fourth insulation film  81  stacked on the light receiver  51  is formed evenly, the bottom surface of the open part  55  is also formed evenly. This is because that the bottom surface of the open part  55  has a form which the surface form of the film formed on the top is transcribed as it is before etching. 
         [0052]    As described in this embodiment, when a flat layer is formed by the second insulation film  78 , each insulation film stacked on the light receiver  51  is also formed evenly. Thus, the bottom surface of the open part  55  can be formed evenly and the incident efficiency within the surface of the light receiver  51  can be equalized. Furthermore, an adverse affect on the photoelectric conversion of the photodetector generated due to light reflected by an uneven portion of the bottom surface of the open part  55  can be suppressed. 
         [0053]    As explained above, the present invention provides a method for manufacturing a semiconductor integrated circuit device comprising: on a semiconductor substrate which includes a light receiver, forming a first insulation film on the semiconductor substrate; forming a wiring structure around the light receiver on the first insulation film by the damascene process; forming a second insulation film on the wiring structure; and opening the second insulation film formed on the light receiver by etching. 
         [0054]    Furthermore, another embodiment of the present invention provides a method for manufacturing a semiconductor integrated circuit device comprising: on a semiconductor substrate which includes a light receiver, forming a first insulation film on the semiconductor substrate; forming a wiring structure around the light receiver on the first insulation film; forming a second insulation film on the wiring structure; flattening a surface of the second insulation film; forming a third insulation film on the second insulation film; and opening the third insulation film formed on the light receiver by etching. 
         [0055]    According to the present invention, since a bottom surface of an open part can be formed evenly, an amount of incident light within a surface of a light receiver can be equalized.