Abstract:
An amplifier circuit includes a bias control feedback loop. A sensing transistor ( 108 ) is matched to one or more power transistors ( 101   a,    101   b,    101   c ) and is correspondingly biased. The difference between collector voltage of the sensing transistor ( 108 ) and a reference voltage amplified by a differential amplifier ( 111, 114 ) to provide the base bias voltage for the power transistors ( 101   a,    101   b,    101   c ) and the sensing transistor ( 105 ). The gain of the amplifier is controlled by applying a control voltage to a resistor ( 110 ) connected to the collector of the sensing transistor ( 105 ).

Description:
DESCRIPTION  
         [0001]    The present invention relates to an amplifier circuit.  
           [0002]    It is often necessary for the gain of an amplifier to be stabilised so that it does not vary with environmental factors such as temperature and manufacturing tolerances.  
           [0003]    A circuit for stabilising the bias current of a bipolar amplifier is disclosed in EP-A-0942524 . The disclosed circuit has a driver transistor which controls the base biasing currents of a plurality of power transistors, connected in series, and a control transistor via respective base resistors. A differential amplifier has one input connected to the output of a potential divider, for setting the desired bias point, and the other input connected to the collector of the control transistor. The collector of the control transistor is also connected to a regulated supply voltage via a resistor. One of the outputs of the differential amplifier is coupled to the base of the driver transistor. Any increase in the collector currents of the power transistors is reflected in the collector current of the control transistor thereby reducing the voltage fed to the second input of the differential amplifier. Consequently, the voltage applied to the base of the driver transistor is reduced and the base biasing currents of the power transistors and the control transistor are reduced. Thus, the bias currents of the power transistors are controlled by a negative feedback control loop.  
           [0004]    It can be seen that the output of the differential amplifier cannot be usefully less than two Vbe&#39;s plus the voltage across the base resistors of the power transistors. In the case of GaAs HBT devices, Vbe is 1.2V, leaving less than 0.6V available for the output range of the differential amplifier when Vcc is 3V which is typical.  
           [0005]    Furthermore, the prior art designs are less than ideal for Enhanced Data Rates for GSM (“EDGE”) systems.  
           [0006]    According to the present invention, there is provided an amplifier circuit comprising:  
           [0007]    a first common emitter transistor amplifier including a base biasing resistor;  
           [0008]    a second common emitter transistor amplifier including a base biasing resistor and configured such that its bias collector current is substantially proportional to that of the first common emitter transistor amplifier; and  
           [0009]    a differential amplifier having one input connected to a reference voltage and a second input connected to receive the output of the second common emitter transistor amplifier,  
           [0010]    wherein the base biasing currents of the transistors of said common emitter transistors amplifiers are provided from an output of the differential amplifier which is directly coupled to the base biasing resistors of the first and second common emitter amplifiers.  
           [0011]    The first common emitter transistor amplifier may comprise a plurality of transistors having respective base biasing resistors and sharing a common collector load impedance.  
           [0012]    Preferably, the output of the second common emitter amplifier is taken from the junction between two series connection collector load resistors.  
           [0013]    A bias control input may be included to provide an additional collector current path, e.g. via a resistor, for the second emitter follower amplifier. The bias control input can be used to control the gain of the first emitter follower amplifier, for instance to give an output signal a desired power envelope.  
           [0014]    An amplifier circuit according to the present invention may be employed advantageously in a mobile phone. 
       
    
    
       [0015]    An embodiment of the present invention will now be described, by way of example, with reference to the accompanying drawings:  
         [0016]    [0016]FIG. 1 is a block diagram of a mobile phone;  
         [0017]    [0017]FIG. 2 is a circuit diagram of the rf power amplifier of the mobile phone of FIG. 1; and  
         [0018]    [0018]FIG. 3 shows the power profile of a burst produced by the mobile phone of FIG. 1 and the corresponding power amplifier control signal. 
     
    
       [0019]    Referring to FIG. 1, a mobile telephone comprises an antenna  1 , an rf subsystem  2 , a baseband DSP (digital signal processing) subsystem  3 , an analogue audio subsystem  4 , a loudspeaker  5 , a microphone  6 , a controller  7 , a liquid crystal display  8 , a keypad  9 , memory  10 , a battery  11  and a power supply circuit  12 .  
         [0020]    The rf subsystem  2  contains if and rf circuits of the mobile telephone&#39;s transmitter and receiver and a frequency synthesizer for tuning the mobile telephone&#39;s transmitter and receiver. The antenna  1  is coupled to the rf subsystem  2  for the reception and transmission of radio waves.  
         [0021]    The baseband DSP subsystem  3  is coupled to the rf subsystem  2  to receive baseband signals therefrom and for sending baseband modulation signals thereto. The baseband DSP subsystems  3  includes codec functions which are well-known in the art.  
         [0022]    The analogue audio subsystem  4  is coupled to the baseband DSP subsystem  3  and receives demodulated audio therefrom. The analogue audio subsystem  4  amplifies the demodulated audio and applies it to the loudspeaker  5 . Acoustic signals, detected by the microphone  6 , are pre-amplified by the analogue audio subsystem  4  and sent to the baseband DSP subsystem  4  for coding.  
         [0023]    The controller  7  controls the operation of the mobile telephone. It is coupled to the rf subsystem  2  for supplying tuning instructions to the frequency synthesizer and to the baseband DSP subsystem for supplying control data and management data for transmission. The controller  7  operates according to a program stored in the memory  10 . The memory  10  is shown separately from the controller  7 . However, it may be integrated with the controller  7 . A timer for triggering interrupts is also provided by the controller  7 .  
         [0024]    The display device  8  is connected to the controller  7  for receiving control data and the keypad  9  is connected to the controller  7  for supplying user input data signals thereto. Amongst other function, the display device displays the estimated extant life of the battery  11  by  
         [0025]    The battery  11  is connected to the power supply circuit  12  which provides regulated power at the various voltages used by the components of the mobile telephone. The positive terminal of the battery  11  is connected to an analogue-to-digital converter (ADC) input of the controller  7 .  
         [0026]    Referring to FIG. 2, the rf power amplifier of the rf subsystem  2  of FIG. 1 includes a plurality of npn power transistors  101   a ,  101   b ,  101   c , having respective base biasing resistors  103   a ,  103   b ,  103   c  and input capacitors  104   a ,  104   b ,  104   c  connecting the bases of the power transistors  101   a ,  101   b ,  101   c  with an rf input. A control transistor  105 , matched to the power transistors  101   a ,  101   b ,  101   c , has a base bias resistor  107 . The control transistor  105  is matched to the power transistors  101   a ,  101   b ,  101   c  such that the bias current of the control transistor  105  is proportional to the bias currents of the power transistors  101   a ,  101   b ,  101   c . Also, the control transistor  105  should be positioned so that it experiences the same environmental conditions as the power transistors  101   a ,  101   b ,  101   c.    
         [0027]    The collector of the control transistor  105  is connected to a regulated supply voltage Vcc via first and second series connected resistors  108 ,  109 . The collector of the control transistor  105  is also connected to a control input Vp via a third resistor  110 .  
         [0028]    The junction between the first and second resistors  108 ,  109  is coupled to the base of a first transistor  111  of a differential pair. The first transistor  111  has its collector connected directly to the regulated supply voltage Vcc and its emitter connected to earth via a fourth resistor  112 . The second transistor  114  of the differential pair has its emitter connected to the emitter of the first transistor  110  and its collector connected to the regulated supply voltage Vcc via a fifth resistor  116 . The collector of the second transistor  114  is also connected to the base bias resistors  103   a ,  103   b ,  103   c ,  107  of the power transistors  101   a ,  101   b ,  101   c  and the control transistor  105 . The base of the second transistor  114  is connected to the junction between sixth and seventh resistors  118 ,  120  which form a potential divider between the regulated supply voltage Vcc and earth.  
         [0029]    Ignoring for the moment the effect of the control input Vp, the bias currents of the power transistors  101   a ,  101   b ,  101   c  and the control transistor  105  is set by the first potential divider, comprising the sixth and seventh resistors  118 ,  120 , and the voltage fed back from the second potential divider, comprising the first and second resistors  108 ,  109 , to the first transistor  111 .  
         [0030]    If the bias currents following through the power transistors  101   a ,  101   b ,  101   c  increase, for example due to a temperature increase, a corresponding increase occurs in the bias current flowing through the control transistor  105 . This lowers the voltage on the base of the first transistor  111  increasing the collector current of the second transistor  114 . The increased collector current through the second transistor  114  leads to a reduction in its collector voltage and, consequently, a reduction in the base bias currents of the power transistors  101   a ,  101   b ,  101   c  and the control transistor  105 .  
         [0031]    Conversely, it can be seen that a decrease in the dc collector currents of the power transistors  101   a ,  101   b ,  101   c  and the control transistor  105  will result in an increase in the collector voltage of the second transistor  114  and an increase in the base bias currents of the power transistors  101   a ,  101   b ,  101   c  and the control transistor  105 .  
         [0032]    Referring to FIG. 3, for each burst transmitted by the mobile phone, the power level is ramped up over a predetermined number of symbol periods to a desired maximum and ramped down at the end of the burst. This ramping reduces the generation of harmonics at the beginning and end of each burst to acceptable levels. The power ramping and maximum power level are controlled by Vp.  
         [0033]    As Vp increases, the voltage on the base of the first transistor  111  increases, leading to an increase in the collector voltage of the second transistor  114  and a corresponding increase in the bias currents of the power transistors  101   a ,  101   b ,  101   c  and the control transistor  105 .  
         [0034]    While Vp remains constant, the bias currents of the power transistors  101   a ,  101   b ,  101   c  are stabilised by the process described above.  
         [0035]    At the end of a burst, Vp ramps down and the voltage on the base of the first transistor  111  is decreased causing a ramping down of the bias currents of the power transistors  101   a ,  101   b ,  101   c.