Abstract:
A voltage-controlled oscillator includes a negative resistance generator, a resonant circuit, a first series circuit, a second series circuit, and a third series circuit. The first series circuit controls an oscillation frequency for changing a resonant frequency of the resonant circuit, and the second series circuit modulates this frequency. The third series circuit consists of a capacitor and a variable capacitance diode to which the modulation signal is supplied. The third series circuit changes the resonant frequency of the resonant circuit in a direction for cancelling a change in modulation sensitivity caused by the second series circuit.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates to a voltage-controlled oscillator which can perform frequency modulation. 
     A voltage-controlled oscillator (to be referred to as a VCO hereinafter) is used for reference frequency oscillation of various electronic circuits. When the VCO is used for reference frequency oscillation of a radio transmitter/receiver, an oscillation center frequency must be controlled by a control voltage and an oscillation frequency must be deviated by a modulation signal, thereby performing frequency modulation (to be referred to as FM hereinafter). In this case, an arrangement shown in FIG. 9 is generally used. 
     That is, a resonant circuit 2 consisting of an inductance coil and a capacitor is excited by a negative resistance generator 1 consisting of active elements, thereby oscillating a frequency determined by a resonant frequency of the resonant circuit 2. A first series circuit consisting of a first capacitor Cc and a first variable capacitance diode (to be referred to as a VCD hereinafter) Dv and a second series circuit consisting of a second capacitor Cs and a second VCD·Df are connected in parallel with the resonant circuit 2. A control voltage Vc is applied from a terminal 3 to the VCD·Dv to change the resonant frequency of the resonant circuit 2, and a modulation signal Vm is supplied from a terminal 4 to the VCD·Df to change the resonant frequency of the resonant circuit 2. That is, the oscillation frequency is controlled by the control voltage Vc, and FM is performed by the modulation signal Vm. 
     FIGS. 10(A) and 10(B) show equivalent circuits of FIG. 9, in which FIG. 10(A) shows elements for determining the oscillation frequency and FIG. 10(B) shows a synthetic state of the elements. Assuming that a capacitance of the VCD·Df is Cf, that an invariable component corresponding to a DC component of the modulation signal Vm is C 0 , and that a variable component corresponding to an AC component of the signal Vm is ΔC, Cf=C 0  +ΔC. Assuming that a capacitance of the VC·Dv is Cv, that an inductance and a capacitance which constitute the resonant circuit 2 are L and C, respectively, and that a synthetic capacitance connected to both ends of the inductance L is Ct, Ct is given by the following equation: ##EQU1## 
     Assuming that oscillation frequency for ΔC=0 is f 0 , oscillation frequency f determined by the above equations is represented by the following equation: ##EQU2## 
     Since equation (2) is a function of ΔC, this equation is subjected to Taylor expansion to obtain the following equation: ##EQU3## 
     Assuming that f=f 0  +Δf, frequency deviation Δf is represented by the following equation: ##EQU4## 
     The characteristic of the VCD·Df is Cf =K·V -r  as is well known. Assume that an invariable component of the modulation signal Vm is V 0 , that a variable component thereof is ΔV, and that Vm=V 0  +ΔV. In this case, since Cf=C 0  +ΔC, the following equation is obtained: ##EQU5## In this case, since C 0  is a capacitance obtained when ΔV=0, C 0  =K·V 0   -r  is obtained. Therefore, the following equation is obtained: ##EQU6## 
     A substitution of equation (5) into equation (4) yields frequency deviation Δf near only V 0  as follows: ##EQU7## Therefore, modulation sensitivity S is represented as the following equation: ##EQU8## When a and b of equation (1) are substituted into equation (6), the following equation is obtained: ##EQU9## 
     When a relationship between Cp and f 0  obtained from equation (3) is substituted into equation (7), the following equation is obtained: ##EQU10## 
     Therefore, the modulation sensitivity S is increased in proportion to the third power of the center oscillation frequency f 0 . 
     However, when the oscillation frequency f 0  is used as a reference of a carrier frequency, the modulation frequency varies in accordance with it. Therefore, if a conventional VCO is used, modulation sensitivities of channels having different frequencies are, not undesirably, uniform. 
     SUMMARY OF THE INVENTION 
     It is, therefore, an object of the present invention to provide a VCO in which modulation sensitivities of channels are uniform. 
     According to a first aspect of the present invention, there is provided a voltage-controlled oscillator comprising a negative resistance generator, a resonant circuit excited by the negative resistance generator and including an inductance, a first series circuit, consisting of a first capacitor and a first variable capacitance diode to which a control voltage is applied, for controlling an oscillation frequency for changing a resonant frequency of the resonant circuit, a second series circuit, consisting of a second capacitor and a second variable capacitance diode to which a modulation signal is supplied, for modulating a frequency for changing the resonant frequency of the resonant circuit, and a third series circuit, consisting of a third capacitor and a third variable capacitance diode to which the modulation signal is supplied, for changing the resonant frequency of the resonant circuit in a direction for canceling a change in modulation sensitivity caused by the second series circuit. 
     According to a second aspect of the present invention, there is provided a voltage-controlled oscillator comprising a negative resistance generator, a resonant circuit excited by the negative resistance generator and including an inductance, a first series circuit, consisting of a first capacitor and a first variable capacitance diode to which a control voltage is applied, for controlling an oscillation frequency for changing a resonant frequency of the resonant circuit, a second series circuit, consisting of a second capacitor and a second variable capacitance diode to which a modulation signal is supplied, for modulating a frequency for changing the resonant frequency of the resonant circuit, a third series circuit, consisting of a third capacitor and a third variable capacitance diode to which the modulation signal is supplied, for changing the resonant frequency of the resonant circuit in a direction for canceling a change in modulation sensitivity caused by the second series circuit, a bias circuit for applying a DC bias voltage to the second and third variable diodes, and variable voltage dividers each inserted in a corresponding one of paths for supplying modulation signals to the second and third variable capacitance diodes. 
     According to a third aspect of the present invention, there is provided a voltage-controlled oscillator comprising a negative resistance generator, a resonant circuit excited by the negative resistance generator and including an inductance, a first series circuit, consisting of a first capacitor and a first variable capacitance diode to which a control voltage is applied, for controlling an oscillation frequency for changing a resonant frequency of the resonant circuit, a second series circuit, consisting of a second capacitor and a second variable capacitance diode to which a modulation signal is supplied, for modulating a frequency for changing the resonant frequency of the resonant circuit, a third series circuit, consisting of a third capacitor and a third variable capacitance diode to which the modulation signal is supplied, for changing the resonant frequency of the resonant circuit in a direction for canceling a change in modulation sensitivity caused by the second series circuit, and a superposing circuit for superposing and supplying the modulation signal and the control voltage to the second and third variable capacitance diodes. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of a voltage-controlled oscillator (VCO) according to an embodiment of the present invention; 
     FIGS. 2(A), 2(B), and 2(C) are equivalent circuit diagrams of FIG. 1; 
     FIG. 3 is a graph showing a relationship between an oscillation frequency and modulation sensitivities; 
     FIGS. 4 to 6(B) are equivalent circuit diagrams of modifications of the VCO in FIG. 1; 
     FIG. 7 is a circuit diagram corresponding to a second embodiment; 
     FIG. 8 is a circuit diagram corresponding to a third embodiment; 
     FIG. 9 is a circuit diagram of a conventional example; and 
     FIGS. 10(A) and 10(B) are equivalent circuit diagrams of FIG. 9. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The present invention will be described in detail below with reference to the accompanying drawings. 
     FIG. 1 is a circuit diagram of an embodiment of the present invention. In FIG. 1, a first series circuit consisting of a first capacitor Cc and a first VCD·Dv and a second series circuit consisting of a second capacitor Cs and a second VC·Df are connected to a resonant circuit 2 which is excited by a negative resistance generator 1 consisting of active elements. A control voltage Vc is applied from a terminal 3 to the VCD·Dv, and a modulation signal Vm is supplied from a terminal 4 to the VCD·Df, thereby controlling the oscillation frequency and performing FM as in FIG. 9. A third series circuit consisting of a third capacitor Cs&#39; and a third VCD·Df&#39; is connected in parallel with the capacitor Cc through a capacitor C 1  for blocking a DC voltage. The anode of the VCD·Df&#39; is connected to a common circuit through a high-frequency choke coil CH. The modulation signal Vm from the terminal 4 is also supplied to the cathode of the VCD·Df&#39;. 
     FIGS. 2(A), 2(B), and 2(C) show an equivalent circuit of FIG. 1, in which FIG. 2(A) shows all the elements concerning oscillation frequency, FIG. 2(B) shows a state in which a change in modulation sensitivity is canceled by the capacitor Cs&#39; and the VCD·Df&#39;, and FIG. 2(C) shows a synthetic state. 
     In consideration of the capacitor Cs&#39; and the VCD·Df&#39; as shown in FIG. 2(B), if the modulation signal is supplied to only the VCD·Df&#39;, ##EQU11## is established. 
     For this reason, when the modulation sensitivity S&#39; is obtained as in FIG. 9, it is represented as follows as equation (6): ##EQU12## 
     Assuming the α and β are as follows, 
     α=Cc(C 0  +Cs&#39;)+C 0  ·Cs&#39; 
     β=C 0  +Cs 
     the following equation is obtained: ##EQU13## 
     In equation (12), assuming that only Cv changes to change the oscillation frequency while Cp is constant, the following equation is obtained: ##EQU14## Therefore, the following equation is obtained: ##EQU15## A substitution of equation (12) into equation (13) yields the following equation: ##EQU16## 
     Assuming that only Cv changes to change the oscillation frequency while Cp is constant, it is apparent that a change in modulation sensitivity S&#39; with respect to a change in oscillation frequency f 0  is reduced in inverse proportion to the oscillation f 0  and in proportion to the fourth power of f 0 . 
     Even if Cp is increased, ##EQU17## and therefore, 
     
         1-4π.sup.2.f.sub.0.sup.2.L.Cp&gt;0 
    
     is obtained. That is, the above relationship remains the same. 
     Therefore, as shown in FIG. 1, when the modulation signal Vm is supplied to the VC·Df and VC·Df&#39; at the same time, a change in modulation sensitivity S caused by the VC·Df is proportional to the third power of the oscillation frequency f 0  as represented by equation (8). However, a change in modulation sensitivity S&#39; caused by the VC·Df&#39; is in a direction for substantially canceling the change in modulation sensitivity S caused by the VC·Df as represented by the equation (14). As a result, the change in modulation sensitivity with respect to the change in oscillation frequency f 0  can be substantially suppressed. 
     FIG. 3 is a graph a relationship between the oscillation frequency f 0  and the modulation sensitivities S and S&#39; for explaining the above state. In FIG. 3, a state obtained when the modulation signal Vm is supplied to only the VC·Df is represented by a dotted line, a state obtained when the modulation signal Vm is supplied to only the VC·Df&#39; is represented by an alternate long and short dashed line, and a state obtained by synthesizing these two states is represented be a solid line. By supplying the modulation signal Vm to the VC·Df and the VC·Df&#39; at the same time to change the oscillation frequency f 0 , a change state of a synthetic modulation sensitivity S+S&#39; is suppressed to be substantially zero. 
     The first to third series circuits and the resonant circuit 2 can be freely connected in various combinations. Modifications as equivalent circuits are shown in FIGS. 4 to 6(B). 
     In FIG. 4, a parallel resonant circuit is used as in FIGS. 2(A) to 2(C), and a first series circuit is connected in parallel with the resonant circuit. A second series circuit is connected in parallel with a capacitor Cc, and a third series circuit is connected in parallel with a VC·Dv. 
     In FIGS. 5(A) to 5(D), a series resonant circuit is used, and a first series circuit is connected in series with an inductance L. In FIG. 5(A), a second series circuit is connected in parallel with a capacitor Cc, and a third series circuit is connected in parallel with a VC·Dv. In FIG. 5(B), a second series circuit is connected in parallel with a capacitor Cc, and a third series circuit is connected in parallel with the first series circuit. 
     In FIGS. 5(C) and 5(D), a third series circuit is connected in parallel with an inductance L and a first series circuit. In FIG. 5(C), a second series circuit is connected in parallel with a VC·Dv. In FIG. 5(D), a second series circuit is connected in parallel with a first series circuit. 
     In FIGS. 6(A) and 6(B), a series circuit is used as in FIGS. 5(A) to 5(C), a second series circuit is connected in series with an inductance L, and a first series circuit is connected in parallel with the inductance L and the second series circuit. In FIG. 6(A), a third series circuit is connected in parallel with a VC·Dv. In FIG. 6(B), a third series circuit is connected in parallel with the inductance L and the first series circuit. 
     In either case, the modulation signal Vm must be simultaneously supplied to the VC·Df and VC·Df&#39; while applying the control voltage Vc to the VC·Dv. In accordance with a connection state, one or both of a DC blocking capacitor and a high-frequency choke coil are inserted into a desired portion, thereby obtaining an arrangement similar to that shown in FIG. 1. 
     FIG. 7 is a circuit diagram corresponding to a second embodiment. In addition to the elements shown in FIG. 1, a DC bias voltage Vb is applied to a VCD Df and VC·Df&#39; from a terminal 5 connected to a high-frequency bypass capacitor C2 through a bias circuit consisting of resistors R 1  and R 2 . An L-shaped variable voltage divider consisting of a variable resistor RV 1  and a resistor R 3  and that consisting of a variable resistor RV 2  and a resistor R 4  are inserted in paths for supplying the modulation signal Vm from the terminal 4 to the VC·Df and VC·Df&#39;, respectively. Voltage-divided outputs from the variable voltage dividers are applied to the VC·Df and VC·Df&#39; through DC blocking capacitors C 3  and C 4 , respectively. 
     For this reason, an AC component of the modulation signal Vm is supplied together with the CD bias voltage Vb to the VC·Df and VC·Df&#39;, respectively, thereby obtaining the same results as in FIG. 1. In addition, by adjusting the variable resistors RV 1  and RV 2 , an application voltage of the modulation signal Vm is controlled for each of the VC·Df and VC·Df&#39;. As a result, since an application voltage vs. capacitance change characteristics difference between the VC·Df and VC·Df&#39; can be freely corrected, the canceling relationship shown in FIG. 3 can be optimally set. 
     FIG. 8 is a circuit diagram corresponding to a third embodiment. In FIG. 8, a high-frequency bypass capacitor C 5  is connected to a terminal 3, and a control voltage Vc is applied to a VC·Dv through a resistor R 5  and is also applied to a VC·Df and a VC·Df&#39; through a superposing circuit consisting of resistors R 6  and R 7 . A modulation signal Vm from a terminal 4 is supplied to the VC·Df and VC·Df&#39; through a DC blocking capacitor C 6  Therefore, an AC component of the modulation signal Vm and the control voltage Vc are superposed and simultaneously supplied to the VC·Df and VC·Df&#39;. 
     Therefore, when application voltage vs. capacitance change characteristics of the VC·Df and VC·Df&#39; are different from each other and hence a difference is produced between ratios of modulation sensitivity changes of the modulation signal Vm, this difference can be corrected in accordance with the control voltage Vc. As a result, the canceling relationship in FIG. 3 can be optimally maintained as in FIG. 7. 
     Note that in FIGS. 7 and 8, arrangements similar to those shown in FIGS. 4 to 6(B) can be arbitrarily made. 
     In FIGS. 1, 7, and 8, the high-frequency choke coil CH can be replaced with a resistor or vice versa, and a potentiometer can be used as a voltage divider. That is, various modifications can be made to obtain the same results. 
     As has been described above, according to the present invention, a change state of the modulation sensitivity with respect to a change in the oscillation frequency can be suppressed. Therefore, when a carrier wave based on the oscillation frequency is used as a transmission wave of each channel, uniform modulation sensitivity can be obtained for each channel. As a result, a significant effect can be obtained in a VCO for various applications in which FM is performed.