Abstract:
The current bias circuit used in a magnetic-signal detection head includes an amplifier that generates a bias current control voltage based on a reference current which regulates the bias current. A bias current I supplied to a MR head is controlled based on this control voltage. The current bias circuit is also provided with a control voltage changing unit that includes a current source and a switch. This control voltage changing unit changes a value of the control voltage without changing the reference current.

Description:
FIELD OF THE INVENTION  
         [0001]    The present invention relates to a current bias circuit used in a magnetic-signal detection head applied to a magnetic memories, such as a hard disk drives (“HDD”) or floppy disk drives (“FDD”). More specifically, this invention relates to a current bias circuit that prevents flow of unnecessarily large transient current to the head.  
         BACKGROUND OF THE INVENTION  
         [0002]    Conventionally, the circuit shown in FIG. 13 is used as a current bias circuit for a magnetic-signal detection head (“MR head”) of the HDD. This current bias circuit includes a current amplifying amplifier constituted of the amplifier AP 1 , current source CS 1 , resistances R 1 , R 2 , and the variable current source CS 2 . This current amplifying amplifier outputs head bias current Is obtained by multiplying a reference current Iref from the current source CS 1  by (R 1 /R 2 ), to thereby bias the MR head H by this bias current Is.  
           [0003]    The amplifier AP 1  compares the reference current Iref and the bias current Is and outputs a voltage Vo 1  corresponding to the difference. However, since a high frequency noise is contained in this reference current Iref, high frequency noise is also contained in the output voltage Vo 1  of the amplifier AP 1 . Therefore, the low-pass filter LPF 1  outputs a voltage Vo 1 ′ obtained by removing the high frequency noise from the output voltage Vo 1  to thereby drive the variable current source CS 2 . The output of the MR head H biased by the output current Is of the current source CS 2  is amplified by a read amplifier Ramp and output to the next stage.  
           [0004]    The amplifier AP 2  compares a midpoint potential of the MR head H obtained by a pair of resistances Rg connected in parallel to the MR head H with the GND potential, and outputs a voltage Vo 2  corresponding to the difference between these potentials. To the output of this amplifier AP 2  is connected a low-pass filter LPF 2  for cutting the high frequency noise contained in the voltage Vo 2 . The output voltage Vo 2 ′ of this low-pass filter LPF 2  drives the variable current source CS 3 , and hence the midpoint potential of the MR head H is maintained to the GND potential.  
           [0005]    A switch Sw 11  provided between the current source CS 2  and one end of the MR head H, and a switch Sw 12  put between the other end of the MR head H and the current source CS 3  are turned OFF at the time of write or at the time of electric power saving when it is necessary to cut the bias current Is. However, when the bias current Is is cut, a voltage drop by means of the resistance R 2  is lost, and hence high voltage is input to the amplifier AP 1  via this resistance R 2 . As a result, the output voltage Vo 1  of this amplifier AP 1  is scaled out.  
           [0006]    Therefore, when the switches Sw 11  and Sw 12  are turned OFF, the amplifier Ap 1  is also turned OFF by means of a control logic, to thereby prevent a change in the output voltage Vo 1 . When the switches Sw 11  and Sw 12  are turned OFF, the output voltage Vo 2  of the amplifier AP 2  also changes. Therefore, when the switches Sw 11  and Sw 12  are turned OFF, the amplifier AP 2  is also turned OFF by the control logic, to thereby prevent a change in the output voltage Vo 2 . As a result, the output voltage Vo 1 ′ of the low-pass filter LPF 1  and the output voltage Vo 2 ′ of the low-pass filter LPF 2  can be maintained to substantially the same value as that of when the current Is being flowing, even when the bias current Is is cut.  
           [0007]    On the other hand, when the bias current Is is made to be changed, the value of the reference current Iref is also changed. At this time, with a change of the output voltage Vo 1  of the amplifier AP 1 , feedback is provided so that the current value of the current source CS 2  is returned to the original value. Therefore, if the time constant of the low-pass filter LPF 1  is kept large, it takes time until the output voltage Vo 1 ′ becomes a desired value, due to a response delay of the low-pass filter LPF 1 . Also on the side of the amplifier AP 2 , due to the response delay attributable to the time constant of the low-pass filter LPF 2 , it takes time until the output voltage Vo 2 ′ becomes a desired value.  
           [0008]    In order to solve such problems, while a certain period of time has passed since when the value of the reference current Iref is changed, the time constants of the low-pass filters LPF 1 , LPF 2  are made small, to thereby reduce time until the values of these output voltages Vo 1 ′, Vo 2 ′ are fixed.  
           [0009]    Generally, in the HDD, magnetic heads are present in plural numbers. FIG. 14 shows a current bias circuit applied to such magnetic heads. In this current bias circuit, at the time of selecting a MR head H 1 , switches Sw 11  to Sw 15  are turned ON. At the time of selecting a MR head H 2  instead of the MR head H 1 , switches Sw 11  to Sw 15  are turned OFF and switches Sw 21  to Sw 25  are turned ON. At this time, since the output impedance of the variable current source CS 2  has a finite value, when the resistance values Rh 1 , Rh 2  of the MR heads H 1 , H 2  are different, the current value of the current source CS 2  changes immediately after switching these heads. In order to suppress this change in the current value, the time constants of the low-pass filters LPF 1  and LPF 2  are made small for a certain period of time immediately after the switching thereof, so that the bias current Is can be promptly settled to a predetermined value, at the time of switching the heads.  
           [0010]    As described above, at the time of cutting the bias current Is, the operation of the amplifier AP 1  is turned OFF by the control logic so as to maintain the output voltage Vo 1 ′ of the low-pass filter LPF 1  to a value before cut of the bias current Is. During the bias current Is being cut, if it is assumed that the value of the above voltage Vo 1 ′ is not changed at all, the value of the current Is immediately after reset of the bias current Is becomes the same as the value before cut.  
           [0011]    However, the value of the output voltage Vo 1 ′ may be shifted during the bias current Is being cut, due to an influence of a leak current, a temperature drift or the like in the amplifier AP 1 . In this case, the value of the bias current Is becomes different immediately after reset and before the cut.  
           [0012]    The above described shifted output voltage Vo 1 ′ tends to return to the value before the shift, with the operation of resetting the bias current Is (ON operation of the switches Sw 1 , Sw 2 ). However, if it takes long time to reset, a problem occurs in that the time required until the bias current Is returns to the value before the cut becomes long. However, this problem can be overcome by decreasing the time constant of the low-pass filter LPF 1  to thereby lose no time in giving a response of the voltage Vo 1 ′ with respect to the reset change of the voltage Vo 1  (the same thing applies to the output voltage Vo 2 ′ of the low-pass filter LPF 2 ).  
           [0013]    There may be a case where the value of the bias current Is immediately after reset increases or decreases with respect to the value before the cut, due to the shift direction of the voltage Vo 1 ′, a circuit construction or the like. In the former case, following problems occur. That is to say, the MR head has recently been improved steadily in the detection sensitivity. This is because with an increase of recording density, it is required to be able to detect a small magnetic-signal. Therefore, flowing a large bias current to the MR head even in a very short period of time may cause deterioration or breakage in the MR head.  
           [0014]    On the other hand, at the time of switching the heads or switching the set value of the bias current, a large current may flow temporarily to the MR head, and this may cause damage in the MR head. Therefore, it becomes necessary to have a protection circuit for preventing a large current having a possibility of deteriorating or breaking the MR head from flowing to the head.  
         SUMMARY OF THE INVENTION  
         [0015]    It is an object of the present invention to obtain a current bias circuit that can prevent a large electric current from flowing temporarily to the MR head, at the time of resetting the bias current, at the time of switching the heads, or at the time of switching the set value of the bias current.  
           [0016]    The current bias circuit according to the present invention includes an amplifier that generates a bias current control voltage based on a reference current which regulates the bias current. A bias current I supplied to a magnetic-signal detection head is controlled based on this control voltage. The current bias circuit is also provided with a control voltage changing unit that includes a current source and a switch. This control voltage changing unit changes a value of the control voltage without changing the reference current.  
           [0017]    Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]    [0018]FIG. 1 is a circuit diagram showing a first embodiment of the current bias circuit according to the present invention;  
         [0019]    [0019]FIG. 2 is a circuit diagram showing a current bias circuit in the first embodiment applied to a plurality of heads;  
         [0020]    [0020]FIG. 3 is a circuit diagram showing one example of a low-pass filter;  
         [0021]    [0021]FIG. 4 is a time chart exemplifying operating waveforms when the bias current is turned ON and OFF;  
         [0022]    [0022]FIG. 5 is a time chart exemplifying operating waveforms when a head is switched over;  
         [0023]    [0023]FIG. 6 is a circuit diagram showing a second embodiment of the current bias circuit according to the present invention;  
         [0024]    [0024]FIG. 7 is a circuit diagram showing a configuration example of a conductance amplifier;  
         [0025]    [0025]FIG. 8 is a circuit diagram showing the construction of an inverting amplifier;  
         [0026]    [0026]FIG. 9 is a circuit diagram showing the construction of a low-pass filter including the conductance amplifier and the inverting amplifier;  
         [0027]    [0027]FIG. 10 is a circuit diagram of a current bias circuit using a read amplifier of a single-end input type;  
         [0028]    [0028]FIG. 11 is a circuit diagram showing a third embodiment of the current bias circuit according to the present invention;  
         [0029]    [0029]FIG. 12 is a circuit diagram showing a fourth embodiment of the current bias circuit according to the present invention;  
         [0030]    [0030]FIG. 13 is a circuit diagram showing one example of a conventional current bias circuit; and  
         [0031]    [0031]FIG. 14 is a circuit diagram showing another example of a conventional current bias circuit. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0032]    Embodiments of the current bias circuit of the magnetic-signal detection head according to the present invention will now be described with reference to the accompanying drawings.  
         [0033]    [0033]FIG. 1 and FIG. 2 show the current bias circuit of the magnetic-signal detection head according to the first embodiment of the present invention. The current bias circuit in FIG. 1 is applied to a single head, and the current bias circuit in FIG. 2 is applied to a plurality of (two in this example) heads.  
         [0034]    The current bias circuit shown in FIG. 1 and FIG. 2 has a construction common to the current bias circuit shown in FIG. 13 and FIG. 14, respectively, except of comprising a switch SwA and a voltage source E. Therefore, description of the common construction and the operation thereof is omitted. The above switch SwA and the voltage source E are put between the output of the low-pass filter LPF 1  and the ground in series. The low-pass filters LPF 1  and LPF 2  have, as shown in FIG. 3, a construction comprising a resistance Rf, a capacitor C and a resistance Rf′ connected in parallel to the resistance Rf via a switch Swf, and can change the time constant by opening and closing operation of the switch Swf.  
         [0035]    The switch SwA shown in FIG. 1 and FIG. 2 are maintained in the ON state continuously, while the switches Sw 11  and Sw 12  are turned OFF, as shown in FIG. 4. As described above, when the switches Sw 11  and Sw 12  are turned OFF, the amplifier Ap 1  is also turned OFF by the control logic, to thereby maintain the output voltage Vo 1 ′ of the low-pass filter LPF 1  in substantially the same value as that of when the bias current Is being flowing. In this state, when the switch SwA is turned ON, the voltage source E is connected to the output of the low-pass filter LPF 1 . As a result, the output voltage Vo 1 ′ of the low-pass filter LPF 1  is changed forcibly to the output voltage Voff of the voltage source E.  
         [0036]    The output voltage Voff of the voltage source E is set the value of the output voltage Vo 1 ′ of the low-pass filter LPF 1  when Is is sufficiently lower than that in the steady states where the switches Sw 11  and Sw 12  are turned ON, as shown in FIG. 4. The value of the bias current Is in the state that the switches Sw 11  and Sw 12  are turned ON depends on the output voltage Vo 1 ′ of the low-pass filter LPF 1  (in the example shown in FIG. 1 and FIG. 2, the bias current Is increases with an increase of the output voltage Vo 1 ′). Therefore, at the time when the switches Sw 11  and Sw 12  are turned ON in order to reset the bias current Is, as shown in FIG. 4, a bias current Ismin corresponding to the voltage Voff (sufficiently small compared to the value of the bias current Is before cut) flows to the MR head.  
         [0037]    Thereafter, the output voltage Vo 1 ′ of the low-pass filter LPF 1  tends to return to the value before the bias current Is is cut. At that time, the switch Swf for changing the time constant shown in FIG. 3 is turned ON, so as to decrease the time constant of the low-pass filter LPF 1 . In FIG. 4( c ), there is shown a transient based on the time constant when this switch Swf is turned ON. The bias current Is promptly returns to the desired value before the bias cut, in the transient based on such a small time constant. After completion of resetting the bias current Is, the switch Swf for changing the time constant is turned OFF.  
         [0038]    As described above, according to the first embodiment, the output voltage Vo 1 ′ of the low-pass filter LPF 1  during the bias current Is being cut is changed forcibly to the output voltage Voff of the voltage source E, and hence during the cut, the above output voltage Vo 1 ′ does not exceed the value before the bias cut. Therefore, there is no possibility that an excessive current flows to the MR head (in the circuit of FIG. 2, the MR head H 1  or Rh 1 ), immediately after reset of the bias current Is. As a result, deterioration and breakage of the head due to this excessive current can be reliably avoided. The time constant of the low-pass filter LPF 2  is decreased with the same timing as that of the time constant of the low-pass filter LPF 1 .  
         [0039]    The switch SwA is turned ON also at the time of selecting the MR head H 2  instead of the MR head H 1 , in the current bias circuit in FIG. 2. As already described with reference to FIG. 14, the output impedance of the variable current source CS 2  has a finite value. Therefore, when the values of resistances Rh 1  and Rh 2  of the MR heads H 1  and H 2  are different, the current value of the current source CS 2  changes immediately after switching these heads. This means that immediately after switching from the MR head H 1  to the MR head H 2 , there is a possibility that an excessive current may flow to this MR head H 2 .  
         [0040]    Therefore, as shown in FIG. 5, the switch SwA is turned ON for a predetermined period of time at the time of switching, for example, from the MR head H 1  to the MR head H 2 . At the time of switching the heads, the time constant of the low-pass filter LPF 1  is decreased for a certain period of time immediately after the switching thereof, so that the bias current Is can be promptly settled to a predetermined value. The above switch SwA is turned ON at the initial stage of the transient based on this decreased time constant.  
         [0041]    When the switch SwA is turned ON, as shown in FIG. 5, the output voltage Vo 1 ′ of the low-pass filter LPF 1  is changed to the voltage Voff or so as to approach the voltage Voff. Therefore, the bias current Is approaches the value Ismin corresponding to this voltage Voff. When the switch SwA is again turned OFF, the bias current Is changes to a desired value in the remaining transient.  
         [0042]    As described above, according to the first embodiment, the output voltage Vo 1 ′ of the low-pass filter LPF 1  is changed forcibly to the output voltage Voff of the voltage source E for a certain period of time at the time of switching the heads. Hence, there is no possibility that an excessive bias Is flows to the selected head (in the above example, the MR head H 2 ), immediately after switching the heads. As a result, deterioration and breakage of the head due to this excessive current can be reliably avoided.  
         [0043]    Also at the time of switching the set value of the bias current, a large current may flow temporarily to the MR head, and this may cause damage in the MR head. Therefore, also at the time of changing the value of the reference current Iref to change the bias current Is, the switch SwA is turned ON at the initial stage of the above transient, as at the time of switching the heads.  
         [0044]    [0044]FIG. 6 shows a current bias circuit according to the second embodiment. In this current bias circuit, conductance amplifiers AP 11  and AP 22  are used instead of the amplifier Ap 1  and AP 2  shown in FIG. 1, and filter capacitors Cf 1  and Cf 2  are respectively put between the output of these conductance amplifiers AP 11  and AP 22  and the ground line, with a resistance Rm (Rm&gt;Rh) being connected in series, respectively, to one end and to the other end of the MR head H.  
         [0045]    [0045]FIG. 7 shows a configuration example of the conductance amplifiers AP 11  and AP 22 . In this FIG. 7, an input voltage V +  and an input voltage V −  are applied respectively to transistors TrA and TrB constituting a differential circuit. Transistors TrC, TrD are put between the common emitter junction of these transistors TrA and TrB and the ground in parallel. A constant voltage generated by a transistor TrE is applied to the base of the transistor TrC, and this constant voltage is applied to the base of the transistor TrD via a switch SwT. Therefore, with the switch SwT opened, an electric current of Ic=I2 flows out from the common emitter junction via the transistor TrC, and with the switch SwT closed, an electric current of Ic=I2+13 flows out from the common emitter junction via the transistors TrC and TrD.  
         [0046]    Here, if it is assumed that the difference between the input voltage V +  and the input voltage V −  is Vid, the output voltage Iout of the transconductance amplifiers AP 11  and AP 22  is expressed as Iout=gm·Vid, using a conductance gm. The conductance gm is given by the following equation: 
         gm=Ic/Vt  (1) 
         [0047]    where in Vt: thermal voltage=kT/q (k denotes the Boltzman&#39;s constant, T denotes the absolute temperature, and q denotes an electric charge). Hence, these transconductance amplifiers AP 11  and AP 22  can change the conductance gm by opening or closing the switch SwT. The conductance amplifier shown in FIG. 2 is constructed by using a bipolar-type transistor, but it is also possible to constitute the conductance amplifier by using a CMOS-type transistor.  
         [0048]    On the other hand, the current bias circuit in this second embodiment uses an N-channel MOS-type transistor Tr 1  as the current source CS 1 , and a P-channel MOS-type transistor Tr 2  as the current source CS 2 . Moreover, a resistance Rm is respectively put between the switch SW 11  and the MR head H 1 , and between the switch SW 12  and the MR head H 1 .  
         [0049]    The transistor Tr 1  increases a head bias current Is, with an increase of the output voltage Vo 1 ′ of the low-pass filter LPF 1  (which will be described later), and the transistor Tr 2  provides feedback to the output voltage Vo 2 ′ of the low-pass filter LPF 2 , so that the midpoint potential of the MR head H 1  becomes the GND potential. Since the midpoint potential is maintained substantially to the GND potential, the transistor Tr 1  constitutes an inverting amplifier as shown in FIG. 8. The gain A of this inverting amplifier is expressed as follows: 
           A=V out/ V in= R   2 / {Rm+ ( Rh   1 /2)}  (2) 
         [0050]    wherein Vin is input voltage and Vout is output voltage.  
         [0051]    As shown in FIG. 9, when a circuit is constructed such that the output of the conductance amplifier AP, serving as a voltage-input current-output amplifier, is connected to the input of the inverting amplifier having the gain A (which has a function as a buffer amplifier when the gain A is 1), with the output of this inverting amplifier connected to one input of the conductance amplifier AP, and a filter capacitor C is put between the output of the inverting amplifier and the ground, then the relation between the input voltage Vin of the amplifier AP and the output voltage Vout of the inverting amplifier can be expressed as follows: 
           V out={ gm·A/ ( gm·A+jωC )}/ V in  (3) 
         [0052]    wherein ω is an angular frequency. That is to say, this circuit has a function as a low-pass filter having a time constant of C/(gm·A).  
         [0053]    Therefore, a conductance amplifier AP 11 , the inverting amplifier including a transistor Tr 1 , and a filter capacitor Cf 1  shown in FIG. 6 constitutes a low-pass filter. The time constant τ 1  of this low-pass filter is expressed as follows: 
         τ 1 = Cf   1 /( gm   1 · A )= Cf   1 ·{ Rm +( Rh   1 /2)}/( R   2 · gm   1 )  (4) 
         [0054]    wherein gm 1  is conductance of the amplifier AP 11 .  
         [0055]    As is obvious from this equation (4), this low-pass filter changes the time constant, with a change in the conductance gm 1  of the conductance amplifier Ap 11 . Therefore, if the conductance gm 1  is changed so that the time constant decreases from the OFF point of the switch SwA shown in FIG. 4 for a predetermined period of time, the feedback time of the bias current Is can be shortened. Moreover, if the conductance gm 1  is changed so that the time constant decreases from the ON point of the switch SwA shown in FIG. 5 for a predetermined period of time, the settling time of the bias current Is at the time of switching the heads can be shortened. As is obvious from the equation (4), if the resistance Rm is put in the flow channel of the bias current Is, an influence of the resistance Rh 1  of the MR head H 1  to the time constant can be suppressed.  
         [0056]    The current bias circuit according to the first and second embodiments respectively uses a differential input type read amplifier Ramp, but it is also possible to use a Single-end input type read amplifier Ramp′, as shown in FIG. 10.  
         [0057]    As is obvious from the comparison with FIG. 1, in this current bias circuit, the resistances Rg, the amplifier AP 2 , the low-pass filter LPF 2 , the switch Sw 12  and the current source CS 2  shown in FIG. 1 are not used. However, the same points as when the differential input type read amplifier Ramp is used are that the value of the bias current Is is determined by the output voltage Vo 1 ′ of the low-pass filter LPF 1  and that the above output voltage Vo 1 ′ is maintained to the voltage Voff at the time of cutting the bias current Is. Though not shown, also when the Single-end input type read amplifier Ramp is used, it can be constructed such that the bias current Is is sent to either one of a plurality of MR heads. Moreover, instead of the amplifier AP 1 , the low-pass filter LPF 1  and the current source CS 2 , the conductance amplifier Ap 11 , the capacitor Cf 1  and the transistor Tr 1  may be used.  
         [0058]    The current bias circuit according to this third embodiment creates a voltage Voff having substantially the same value as that of the output voltage Vo 1 ′ of the low-pass filter at the time when an appropriate bias current Is is flowing, by connecting in series a current source CS 3  for generating an electric current Isb of 1/B (B is a constant) of a predetermined bias current Is, a MOS-type transistor Tr having a gate width of 1/B of the gate width of the transistor Tr 1 , a resistance Rmb having a value of resistance B times as large as the resistance Rm, and a resistance Rhb having a value of resistance B/2 times as large as the average resistance Rh of the MR heads. Therefore, if the switch SwA is turned ON at the time of cutting the bias current Is, the output of the conductance amplifier AP 11  is maintained to the above voltage Voff.  
         [0059]    As described above, in the transient at the time of resetting the bias current Is, and in the transient at the time of switching the heads, the time constant of the low-pass filters LPF 1  and LPF 2  is decreased, respectively, to thereby speed up the follow up speed of the output voltages Vo 1 ′ and Vo 2 ′. However, when the values of the voltages Voff and Vo 1 ′ are largely different, the transient should be extended corresponding to the difference.  
         [0060]    According to the third embodiment, since the voltage Voff is set to substantially the same value as that of the output voltage Vo 1 ′ of the low-pass filter at the time when the appropriate bias current Is is flowing, it can be prevented that the current Is excessively flows immediately after the reset of the bias current Is. Also, by reducing the above transient (by setting the time constant shorter), the recovery period of the bias current can be further speeded up at the time of resetting the bias current Is and at the time of switching the heads. Also, there can be obtained an advantage that switching of an electric current is possible under the state that the bias current Is is cut. The technique according to this third embodiment is of course applicable to the current bias circuits shown in FIG. 1 and FIG. 2, which use the low-pass filters LPF 1 , LPF 2  having the construction shown in FIG. 3.  
         [0061]    [0061]FIG. 12 shows a current bias circuit according to the fourth embodiment. This current bias circuit is constructed such that a current mirror circuit is formed of transistors Tr 11 , Tr 12  and Tr 13 , and transistors Tr 14  and Tr 15 , and an electric current Is corresponding to the reference current ref is biased to the MR head H.  
         [0062]    That is to say, in this current bias circuit, an electric current corresponding to the reference current Iref is output from the transistors Tr 13  and Tr 12 , and these voltages drive respectively the transistors Tr 15  and Tr 14  via the low-pass filters LPF 1  and LPF 2 . In this current bias circuit, a current source CS 3  is put between the junction of the MR head H and the transistor Tr 14  and the ground, and by controlling this current source CS 3  by the output of the amplifier AP 2 , the midpoint of the MR head H can be maintained to the ground potential.  
         [0063]    The low-pass filters LPF 1  and LPF 2  have a construction corresponding to the construction shown in FIG. 3. That is, the low-pass filter LPF 1  is constituted of a capacitor Cf 1 , a resistance Rf 1  and a resistance Rf′ 1 ′ for changing the time constant, connected in parallel to the resistance Rf 1  via a switch Swf 1 , and the low-pass filter LPF 2  is constituted of a capacitor Cf 2 , a resistance Rf 2  and a resistance Rf 2 ′ for changing the time constant, connected in parallel to the resistance Rf 2  via a switch Swf 2 .  
         [0064]    With the current bias circuit according to this fourth embodiment, the MR head H is push-pull driven. In this current bias circuit, the output voltage Vo 1 ′ of the low-pass filter LPF 1  is set by an open loop. Needless to say, this current bias circuit is applicable to a case where the bias current is selectively sent to a plurality of MR heads.  
         [0065]    As described above, according to the present invention, it is possible to prevent a large electric current from flowing temporarily to the MR head. Furthermore, it is possible to obtain a bias current having no influence of the noise. Moreover, the settling time of the bias current can be speeded up, by changing the time constant at the time of cutting the bias current, at the time of switching the MR heads, or at the time of switching the set value of the bias current.  
         [0066]    Furthermore, influence of the value of resistance of the magnetic-signal detection head to the time constant of the low-pass filter can be suppressed. Moreover, when the cut bias current is reset to the original value, it is possible to prevent the bias current from flowing too much immediately after the reset. Also, it becomes possible to reduce the transient of the low-pass filter (to set the time constant shorter), to thereby speed up the recovery time of the bias current at the time of resetting the bias current or at the time of switching the heads. In addition, since the magnetic-signal detection head is push-pull driven by the control voltage generation unit, an output having no distortion can be obtained.  
         [0067]    Although the invention has been described with respect to a specific embodiment for a complete and clear disclosure, the appended claims are not to be thus limited but are to be construed as embodying all modifications and alternative constructions that may occur to one skilled in the art which fairly fall within the basic teaching herein set forth.