Abstract:
A DC boosting circuit includes switch connected to a first circuit and a second circuit. The first circuit includes first and second elements, and the second circuit includes the second element and a third element. The first and second elements store energy based on an input voltage when the switch is in a first state. The third element stores energy from the second element when the switch is in the second state. The second circuit outputs a voltage greater than the input voltage, and the first, second, and third elements are reactors or capacitors.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    Japanese Patent Application No. 2014-225521, filed on Nov. 5, 2014, and Korean Patent Application No. 10-2015-0110202, filed on Aug. 4, 2015, and entitled, “DC Boosting Circuit,” are incorporated by reference herein in its entirety. 
       BACKGROUND 
       [0002]    1. Field 
         [0003]    One or more embodiments described herein relate to a DC boosting circuit. 
         [0004]    2. Description of the Related Art 
         [0005]    One type of DC boosting circuit (called a boosting chopper circuit) includes a switching element, a diode, and a reactor. Presently, the switching element and diode are designed to have a high-voltage current capacity with a high boosting ratio. This may present problems in terms of size and cost for some applications. 
       SUMMARY 
       [0006]    In accordance with one or more embodiments, a DC boosting circuit includes a first switch having a first end connected to a first node; a first diode has a first end connected to the first node and a second end connected to a second node; a first reactor having a first end connected to the first node and a second end connected to a DC power supply; a first capacitor having a first end connected to the second end of the first switch and a second end connected to the second node; a second diode having a first end connected to the second node and a second end connected to a third node; a third diode having a first end connected to the third node; and a second capacitor having a first end connected to the first node and a second end connected to the third node. 
         [0007]    The boosting circuit may include a second switch connected in parallel to the first diode; a third switch connected in parallel to the second diode; and a fourth switch connected in parallel to the third diode. The boosting circuit may include a second reactor between the first end of the first reactor and the first end of the second capacitor. The first and second reactors may be wound around a same iron core. 
         [0008]    The boosting circuit may include a plurality of DC boosting circuits that share the first capacitor. The DC boosting circuits may be operated in an interleaving mode. The boosting circuit may include a plurality of DC boosting circuits that share the first capacitor and the second reactor. 
         [0009]    In accordance with one or more other embodiments, a boosting circuit includes a first circuit including first element and a second element; a second circuit including the second element and a third element; and a switch connected to the first circuit and the second circuit, wherein the first element and the second element are to store energy based on an input voltage when the switch is in a first state and the third element is to store energy from the second element when the switch is in the second state, wherein the second circuit is to output a voltage greater than the input voltage and wherein each of the first element, the second element, and the third element is a reactor or a capacitor. 
         [0010]    The boosting circuit may include a fourth element in the first and second circuits, wherein the fourth element is to store energy from the first element when the switch is in the second state and wherein the fourth element is a capacitor or reactor. The second element may store energy from the fourth element when the switch is in the first state and may store energy from the first element when the switch is in the second state. The second element may store energy from the first element and the fourth element when the switch is in the second state. The third element may store energy from the second element when the switch is in the second state. 
         [0011]    The voltage output from the second circuit may be based on a sum of the energy from the first element and the energy from the fourth element stored in the third element. The switch may be connected to the first element, the second element, the third element, and the fourth element. The boosting circuit may include a fifth element to store energy from the fourth element when the switch is in the first state, wherein the fifth element is a reactor or a capacitor. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0012]    Features will become apparent to those of skill in the art by describing in detail exemplary embodiments with reference to the attached drawings in which: 
           [0013]      FIG. 1  illustrates an embodiment of a DC boosting circuit; 
           [0014]      FIGS. 2A and 2B  illustrate an example of a boosting operation; 
           [0015]      FIG. 3  illustrates another embodiment of a DC boosting circuit; 
           [0016]      FIG. 4  illustrates another embodiment of a DC boosting circuit; 
           [0017]      FIG. 5  illustrates another embodiment of a DC boosting circuit; 
           [0018]      FIG. 6  illustrates another embodiment of a DC boosting circuit; 
           [0019]      FIGS. 7A and 7B  illustrate another example of a boosting operation; 
           [0020]      FIG. 8  illustrates another embodiment of a DC boosting circuit; 
           [0021]      FIGS. 9A and 9B  illustrate an example of a regeneration operation; 
           [0022]      FIG. 10  illustrates another embodiment of a DC boosting circuit; 
           [0023]      FIG. 11  illustrates another embodiment of a DC boosting circuit; 
           [0024]      FIG. 12  illustrates another embodiment of a DC boosting circuit; 
           [0025]      FIG. 13  illustrates another embodiment of a DC boosting circuit; 
           [0026]      FIG. 14  illustrates another embodiment of a DC boosting circuit; 
           [0027]      FIG. 15  illustrates another embodiment of a DC boosting circuit; and 
           [0028]      FIG. 16  illustrates another type of DC boosting circuit. 
       
    
    
     DETAILED DESCRIPTION 
       [0029]    Example embodiments will now be described more fully hereinafter with reference to the accompanying drawings; however, they may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey exemplary implementations to those skilled in the art. The embodiments may be combined to form additional embodiments. 
         [0030]    It will also be understood that when a layer or element is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Further, it will be understood that when a layer is referred to as being “under” another layer, it can be directly under, and one or more intervening layers may also be present. In addition, it will also be understood that when a layer is referred to as being “between” two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. Like reference numerals refer to like elements throughout. 
         [0031]    When an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the another element or be indirectly connected or coupled to the another element with one or more intervening elements interposed therebetween. In addition, when an element is referred to as “including” a component, this indicates that the element may further include another component instead of excluding another component unless there is different disclosure. 
         [0032]      FIG. 1  illustrates an embodiment of a DC boosting circuit  1  which is connected in parallel between a DC power supply  2  and a load  3 . The DC boosting circuit  1  includes a first arm pair  11 , a second arm pair  12 , a reactor  13 , and capacitors  14 ,  15 , and  16 . The first arm pair  11  includes a semiconductor switch element  112  (first semiconductor switch element) and a diode  111  (first diode). The semiconductor switch element  112  includes a switch element  112 _ 1  and a diode  112 _ 2 . For example, the switch element  112 _ 1  may be a bipolar transistor, a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), an Insulated Gate Bipolar Transistor (IGBT), or the like. 
         [0033]    The switch element  112 _ 1  is connected in parallel to the diode  112 _ 2 . The switch element  112 _ 1  has one end connected to an anode of the diode  111  and another end connected to a negative terminal of the DC power supply  2 . For example, the switch element  112 _ 1  has one end that serves as a drain, another end that serves as a source, and a control terminal that serves as a gate. 
         [0034]    The diode  111  has an anode connected to the switch element  112 _ 1  and a cathode connected to one end of the capacitor  14 . 
         [0035]    The second arm pair  12  includes a diode  121  (third diode) and a diode  122  (second diode). The diode  122  has an anode connected to the cathode of the diode  111  and a cathode connected to an anode of the diode  121 . Accordingly, the second arm pair  12  includes a series circuit of the diodes  121  and  122 . The diode  121  has a cathode connected to one end of the capacitor  16 . 
         [0036]    The reactor  13  (first reactor) has one end connected to a positive terminal of the DC power supply  2  and another end connected to a node of the first arm pair  11 . The node of the first arm pair  11  is a node of the anode of the diode  111  and one end of the semiconductor switch element  112  (diode  112 _ 2 ). 
         [0037]    The capacitor  14  (first capacitor) is connected in parallel to the first arm pair  11 . For example, the capacitor  14  has one end connected to the cathode of the diode  111  and another end connected to one end of the switch element  112 _ 1  and the negative terminal of the DC power supply  2 . 
         [0038]    The capacitor  15  (second capacitor) has one end connected to a node of the second arm pair  12  and another end connected to the node of the first arm pair  11 . The node of the second arm pair  12  is a node of the anode of the diode  121  and the cathode of the diode  122 . 
         [0039]    The capacitor  16  is connected in parallel to the load  3 . The capacitor  16  has one end connected to the cathode of the diode  121  and another end connected to the other end of the switch element  112 _ 1  and the negative terminal of the DC power supply  2 . 
         [0040]      FIGS. 2A and 2B  illustrate an example of a boosting operation of the DC boosting circuit  1 . In this example, an output voltage of the DC power supply  2  is represented by V i . 
         [0041]      FIG. 2A  illustrates a current path of the DC boosting circuit  1  when the switch element  112 _ 1  is in an ON state. As shown in  FIG. 2A , when the switch element  112 _ 1  is in the ON state, a current I i  supplied by the DC power supply  2  flows along a path  200  including the DC power supply  2 , the reactor  13 , the switch element  112 _ 1 , and the DC power supply  2 . In this case, energy is accumulated in the reactor  13 . 
         [0042]    When the switch element  112 _ 1  is turned on, energy accumulated in the capacitor  14  is partially released along a path  201  including the capacitor  14 , the diode  122 , the capacitor  15 , the switch element  112 _ 1 , and the capacitor  14 . Therefore, when the switch element  112 _ 1  is turned on, the capacitor  15  is charged by the energy accumulated in the capacitor  14  and has the same electrical potential as the capacitor  14 . 
         [0043]      FIG. 2B  illustrates a current path of the DC boosting circuit  1  when the switch element  112 _ 1  is in the OFF state. As shown in  FIG. 2B , when the switch element  112 _ 1  is turned off, a current I i  flowing in the reactor  13  flows along a path  202  including the reactor  13 , the diode  111 , the capacitor  14 , the DC power supply  2 , and reactor  13 . As a result, the capacitor  14  is charged to a voltage V 1  that is higher than the voltage V i  of the DC power supply  2 , by action of the voltage V i  of the DC power supply  2  and the energy accumulated in the reactor  13 . 
         [0044]    Also, when the switch element  112 _ 1  is in the OFF state, current flowing through the reactor  13  flows along a path  203  including the reactor  13 , the capacitor  15 , the diode  121 , the capacitor  16 , the DC power supply  2 , and the reactor  13 . Therefore, the capacitor  16  is charged to a voltage V 2  that is higher than the voltage V 1 , by action of the voltage V i  of the DC power supply  2 , the accumulated energy of the reactor  13 , and charged energy of the capacitor  15 . As such, the load  3  may be supplied with a stable high (boosted) voltage by repeating ON and OFF states of the switch element  112 _ 1  with a predetermined time ratio. The voltage V 2  of capacitor  16  will now be described. 
         [0045]    Voltages of the capacitor  14  and the capacitor  15  vary depending on the conductance (e.g., a duty ratio) of the switch element  112 _ 1 . In one embodiment, conductance of the switch element  112 _ 1  may correspond to a ratio of time in the ON state over one period of the ON and OFF states. 
         [0046]    When the conductance of the switch element  112 _ 1  is 0.5 (e.g., a PWM signal with a duty ratio of 50% is supplied to the control terminal (gate) of the switch element  112 _ 1 ), each voltage of the capacitor  14  and the capacitor  15  is about twice as much as the voltage V 1  of the DC power supply  2 . Accordingly, since the voltage V 2  of the capacitor  16  is a serially added voltage of the voltages of the capacitor  14  and the capacitor  15 , the voltage V 2  of the capacitor  16  is about 4 times higher than the voltage V i  of the DC power supply  2 . 
         [0047]    In this case, withstand voltages for the diode  111  and the semiconductor switch element  112  constituting the first arm pair  11  are the voltage V 1  of the capacitor  14  that is about half of the voltage V 2  of the capacitor  16 , e.g., the output voltage of the DC boosting circuit  1 . 
         [0048]    As described above, the DC boosting circuit  1  according to the present exemplary embodiment serves to boost the voltage of the DC power supply  2 , by switching of the switch element  112 _ 1 , in order to generate a boosted output voltage. 
         [0049]    The DC boosting circuit  1  includes the first arm pair  11 , the reactor  13 , the capacitor  14 , the second arm pair  12 , and the capacitor  15 . The first arm pair  11  includes the switch element  112 _ 1 , and the diode  111  connected at the anode thereof to one end of the switch element  112 _ 1  (hereinafter referred to as being de-serially connected). 
         [0050]    The reactor  13  has one end connected to the node of the first arm pair  11  and another end connected to the DC power supply  2 . The capacitor  14  is connected in parallel to the first arm pair  11 . The second arm pair  12  includes a series circuit of the diode  121  and the diode  122  connected in series to one end of the first arm pair  11 . The capacitor  15  is connected between the node of the first arm pair  11  and the node of the second arm pair  12 . Accordingly, a voltage applied to the first arm pair  11  and the second arm pair  12  may be determined as the voltage V 2  of the capacitor  16  that is lower than the output voltage of the DC boosting circuit  1 . 
         [0051]    Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0052]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of the FET increases exponentially as a withstand voltage thereof increases. Thus, power consumption of the FET increases as its withstand voltage increases. Accordingly, leakage current of the DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0053]      FIG. 3  illustrates another embodiment of a DC boosting circuit  1 A which includes a reactor  17 . As shown in  FIG. 3 , the DC boosting circuit  1 A is connected in parallel between the DC power supply  2  and the load  3 . The DC boosting circuit  1 A includes the first arm pair  11 , the second arm pair  12 , the reactor  13 , the capacitors  14 ,  15 , and  16 , and the reactor  17 . 
         [0054]    The reactor  17  (second reactor) has one end connected to the other end of the capacitor  15  and another end connected to the node of the first arm pair  11 . When the switch element  112 _ 1  is in an ON state, the reactor  17  suppresses an inrush current occurring when the capacitor  15  is charged by accumulated energy of the capacitor  14 . 
         [0055]    When the switch element  112 _ 1  is in the ON state, the reactor  17 , the capacitor  14 , and the capacitor  15  constitute an LC series resonance circuit, using a path  201 A (including the capacitor  14 , the diode  122 , the capacitor  15 , the reactor  17 , the switch element  112 _ 1 , and the capacitor  14 ) through which the accumulated energy of the capacitor  14  is released to charge the capacitor  15 . Therefore, by appropriately selecting the resonance frequency of the LC series resonance circuit, a reverse recovery operation of the diode  122  may be avoided. 
         [0056]    As described above, the DC boosting circuit  1 A according to the present exemplary embodiment serves to boost the voltage of the DC power supply  2 , by switching the switch element  112 _ 1 , in order to generate a boosted output voltage. 
         [0057]    The DC boosting circuit  1 A includes the first arm pair  11 , the reactor  13 , the capacitor  14 , the second arm pair  12 , the capacitor  15 , and the reactor  17 . The first arm pair  11  includes the switch element  112 _ 1  and the diode  111  de-serially connected to one end of the switch element  112 _ 1 . The reactor  13  has one end connected to the node of the first arm pair  11  and another end connected to the DC power supply  2 . The capacitor  14  is connected in parallel to the first arm pair  11 . 
         [0058]    The second arm pair  12  includes a series circuit of the diode  121  and the diode  122  connected in series to one end of the first arm pair  11 . The capacitor  15  is connected between the node of the first arm pair  11  and the node of the second arm pair  12 . The reactor  17  has one end connected to the other end of the capacitor  15  and another end connected to the node of the first arm pair  11 . 
         [0059]    Accordingly, a voltage applied to the first arm pair  11  and the second arm pair  12  may be determined as the voltage V 2  of the capacitor  16 , that is lower than an output voltage of the DC boosting circuit  1 A. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0060]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, as the withstand voltage increases, power consumption of the FET problematically increases. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0061]    Further, by action of the reactor  17 , the DC boosting circuit  1 A according to the present exemplary embodiment may suppress an inrush current that may occur when the capacitor  15  is charged by accumulated energy of the capacitor  14 , and may also prevent a reverse recovery operation of the diode  122 . 
         [0062]      FIG. 4  illustrates another embodiment a DC boosting circuit  1 B which has the reactor  17  at a different location. The DC boosting circuit  1 B includes the reactor  17  connected to the node of the cathode of the diode  111 , one end of the capacitor  14 , and the anode of the diode  122 . 
         [0063]    As shown in  FIG. 4 , the DC boosting circuit  1 B is connected in parallel between the DC power supply  2  and the load  3 . The DC boosting circuit  1 B includes the first arm pair  11 , the second arm pair  12 , the reactor  13 , the capacitors  14 ,  15 , and  16 , and the reactor  17 . The first arm pair  11  includes the semiconductor switch element  112  and the diode  111 . The diode  111  has anode connected to one end of the switch element  112 _ 1  and a cathode connected to one end of the capacitor  14  and the other end of reactor  17 . 
         [0064]    The second arm pair  12  includes the diodes  121  and  122 . The diode  122  has an anode connected to one end of the reactor  17  and a cathode connected to the anode of the diode  121 . Therefore, the second arm pair  12  includes a series circuit of the diodes  121  and  122 . 
         [0065]    The cathode of the diode  121  is connected to one end of the capacitor  16 . The reactor  17  has one end connected to the anode of the diode  122  and another end thereof connected to the cathode of the diode  111  and the capacitor  14 . 
         [0066]    When the switch element  112 _ 1  is in an ON state, the reactor  17  suppresses an inrush current occurring when the capacitor  15  is charged by accumulated energy of the capacitor  14 . Further, when the switch element  112 _ 1  is in the ON state, the reactor  17 , the capacitor  14 , and the capacitor  15  constitute an LC series resonance circuit using a path  201 B (including the capacitor  14 , the reactor  17 , the diode  122 , the capacitor  15 , the switch element  112 _ 1 , and the capacitor  14 ) through which the accumulated energy of the capacitor  14  is released to charge the capacitor  15 . 
         [0067]    Therefore, by appropriately selecting a resonance frequency of the LC series resonance circuit, a reverse recovery operation of the diode  122  may be avoided. 
         [0068]    As described above, the DC boosting circuit  1 B serves to boost the voltage of the DC power supply  2 , by a switching of the switch element  112 _ 1 , in order to generate a boosted output voltage. The DC boosting circuit  1 B includes the first arm pair  11 , the reactor  13 , the capacitor  14 , the second arm pair  12 , the capacitor  15 , and the reactor  17 . 
         [0069]    The first arm pair  11  includes the switch element  112 _ 1  and the diode  111  de-serially connected to one end of the switch element  112 _ 1 . The reactor  13  has one end connected to the node of the first arm pair  11  and another end connected to the DC power supply  2 . 
         [0070]    The capacitor  14  is connected in parallel to the first arm pair  11 . The second arm pair  12  includes a series circuit of the diode  121  and the diode  122  connected in series to one end of the first arm pair  11 . 
         [0071]    The capacitor  15  is connected between the node of the first arm pair  11  and the node of the second arm pair  12 . The reactor  17  has one end connected to the anode of the diode  122  and another end connected to the cathode of the diode  111  and capacitor  14 . 
         [0072]    Accordingly, a voltage applied to the first arm pair  11  and the second arm pair  12  may be determined as the voltage V 2  of the capacitor  16 , that is lower than an output voltage of the DC boosting circuit  1 B. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0073]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, power consumption of a FET itself increases as its withstand voltage increases. Accordingly, leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0074]    Further, by action of the reactor  17 , the DC boosting circuit  1 B according to the present exemplary embodiment may suppress an inrush current occurring when the capacitor  15  is charged by accumulated energy of the capacitor  14 , and may prevent a reverse recovery operation of the diode  122 . 
         [0075]      FIG. 5  illustrates another embodiment of a DC boosting circuit  1 C where the reactor  17  is in a different location. The DC boosting circuit  1 C includes the reactor  17  interposed between the cathode of the diode  111  and one end of the capacitor  14 . As shown in  FIG. 5 , the DC boosting circuit  1 C is connected in parallel between the DC power supply  2  and the load  3 . 
         [0076]    The DC boosting circuit  1 C includes the first arm pair  11 , the second arm pair  12 , the reactor  13 , the capacitors  14 ,  15 , and  16 , and the reactor  17 . The reactor  17  has one end connected to the cathode of the diode  111  and the anode of the diode  122  and another end connected to one end of the capacitor  14 . 
         [0077]    The capacitor  14  has one end connected to the other end of the switch element  112 _ 1  and the negative terminal of the DC power supply  2 . When the switch element  112 _ 1  is in an ON state, the reactor  17  suppresses an inrush current occurring when the capacitor  15  is charged by accumulated energy of the capacitor  14 . 
         [0078]    Further, when the switch element  112 _ 1  is in the ON state, the reactor  17 , the capacitor  14 , and the capacitor  15  constitute an LC series resonance circuit, using a path  201 C (including the capacitor  14 , the reactor  17 , the diode  122 , the capacitor  15 , the switch element  112 _ 1 , and the capacitor  14 ) through which the accumulated energy of the capacitor  14  is released to charge the capacitor  15 . 
         [0079]    Therefore, by appropriately selecting a resonance frequency of the LC series resonance circuit, a reverse recovery operation of the diode  122  may be avoided. 
         [0080]    As described above, the DC boosting circuit  1 C according to the present exemplary embodiment serves to boost the voltage of the DC power supply  2 , by a switching of the switch element  112 _ 1 , in order to generate a boosted output voltage. 
         [0081]    The DC boosting circuit  1 C includes the first arm pair  11 , the reactor  13 , the capacitor  14 , the second arm pair  12 , the capacitor  15 , and the reactor  17 . The first arm pair  11  includes the switch element  112 _ 1  and the diode  111  de-serially connected to one end of the switch element  112 _ 1 . 
         [0082]    The reactor  13  has one terminal connected to the node of the first arm pair  11  and another terminal connected to the DC power supply  2 . The capacitor  14  is connected in parallel to the first arm pair  11 . 
         [0083]    The second arm pair  12  includes a series circuit of the diode  121  and the diode  122  connected in series to one end of the first arm pair  11 . The capacitor  15  is connected between the node of the first arm pair  11  and the node of the second arm pair  12 . The reactor  17  has one end connected to the cathode of the diode  111  and the anode of the diode  122  and another end connected to one end of the capacitor  14 . 
         [0084]    Accordingly, a voltage applied to the first arm pair  11  and the second arm pair  12  may be determined as the voltage V 2  of the capacitor  16 , that is lower than an output voltage of the DC boosting circuit  1 C. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0085]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, power consumption of a FET itself increases as its withstand voltage increases. Accordingly, a leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0086]    Further, by action of the reactor  17 , the DC boosting circuit  1 C according to the present exemplary embodiment may suppress an inrush current occurring when the capacitor  15  is charged by accumulated energy of the capacitor  14 , and may prevent a reverse recovery operation of the diode  122 . 
         [0087]      FIG. 6  illustrates another embodiment of a DC boosting circuit  1 D which includes a reactor  13 D and a reactor  131 D, instead of the reactor  13  and the reactor  17 . As shown in  FIG. 6 , the DC boosting circuit  1 D is connected in parallel between the DC power supply  2  and the load  3 . 
         [0088]    The DC boosting circuit  1 D includes the first arm pair  11 , the second arm pair  12 , the reactor  13 D, and the capacitors  14 ,  15 , and  16 . As described above, the reactor  13 D includes the reactor  130 D and the reactor  131 D. The reactor  13 D includes the reactor  130 D and the reactor  131 D that share the same iron core therethrough. For example, the reactor  13 D may be configured by winding the reactor  130 D and the reactor  131 D around the same iron core, and magnetically coupling the reactors  130 D and  131 D to each other. 
         [0089]    The reactor  130 D has one end connected to the positive terminal of the DC power supply  2  and another end connected to one end of the reactor  131 D. The reactor  131 D is connected at its other end to the other end of the capacitor  15 . Further, a node of the reactor  130 D and the reactor  131 D is connected to the node of the first arm pair  11 . 
         [0090]      FIG. 7A  and  FIG. 7B  illustrate an example of a boosting operation of the DC boosting circuit  1 D. Herein, an output voltage of the DC power supply  2  is represented by V i . 
         [0091]      FIG. 7A  illustrates a current path of the DC boosting circuit  1 D when the switch element  112 _ 1  is in the ON state. As shown in  FIG. 7A , when the switch element  112 _ 1  is turned on, a current I i  supplied by the DC power supply  2  flows along a path  200 D including the DC power supply  2 , the reactor  130 D, the switch element  112 _ 1 , and the DC power supply  2 . 
         [0092]    In this case, the reactor  130 D is excited to accumulate the excited energy therein and to generate an induced voltage therein. By action of the induced voltage and the voltage of the capacitor  14 , a current flows along a path  201 D including the capacitor  14 , the diode  122 , the capacitor  15 , the reactor  131 D, the switch element  112 _ 1 , and the capacitor  14 . Further, the capacitor  15  is charged to an added voltage of the induced voltage and the voltage of the capacitor  14 . 
         [0093]    Accordingly, when the conductance of the switch element  112 _ 1  is the same as in one or more previous embodiments, the DC boosting circuit  1 D is charged to as high as a voltage depending on a ratio of the induced voltage of the reactor  131 D to the capacitor  15 . Next, a boosting operation of the DC boosting circuit  1 D, when the switch element  112 _ 1  is in an OFF state, will be described. 
         [0094]      FIG. 7B  illustrate a current path of the DC boosting circuit  1 D when the switch element  112 _ 1  is in the OFF state. As shown in  FIG. 7B , when the switch element  112 _ 1  is turned off, a current flowing in the reactor  130 D flows along a path  202 D including the reactor  130 D, the diode  111 , the capacitor  14 , the DC power supply  2 , and the reactor  130 D. 
         [0095]    In this case, by action of the voltage V i  of the DC power supply  2  and the excited energy accumulated in the reactor  130 D, the capacitor  14  is charged to a voltage V 1  that is higher than the voltage V i  of the DC power supply  2 . 
         [0096]    The excited energy of the reactor  130 D also flows along a path  203 D including the reactors  130 D and  131 D, the capacitor  15 , the diode  121 , the capacitor  16 , the DC power supply  2 , and the reactor  130 D. Accordingly, by action of the energies of the DC power supply  2 , the reactor  13 D, and the capacitor  15 , the capacitor  16  is charged to a voltage V 2  that is obtained by adding the voltage of the capacitor  14  and the voltage of the capacitor  15 . 
         [0097]    As such, by repeating ON and OFF states of the switch element  112 _ 1  with a predetermined time ratio, the load  3  may be supplied with a stable high voltage V 2 . The voltage V 2  of the capacitor  16  will now be described. 
         [0098]    Voltages of the capacitors  14  and  15  vary depending on the conductance (e.g., a duty ratio) of the switch element  112 _ 1 . Further, the voltage of the capacitor  15  varies depending on a winding ratio of the reactor  130 D and the reactor  131 D. For example, when the conductance is 0.5 and the winding ratio of the reactor  130 D and the reactor  131 D is 1:1, the voltage of the capacitor  14  is about 2 times higher than the voltage of the DC power supply  2 . Meanwhile, the voltage of the capacitor  15  is about 3 times higher than the voltage of the DC power supply  2 . Accordingly, since the voltage V 2  of the capacitor  16  is the same as a voltage obtained by serially adding the voltages of the capacitors  15  and  14 , the voltage V 2  of the capacitor  16  is obtained to be about 5 times higher than the voltage of the DC power supply  2 . 
         [0099]    In this case, withstand voltages for the diode  111  and the semiconductor switch element  112  constituting the first arm pair  11  are supplied from the capacitor  14  that is less than or equal to about a half of the voltage V 2  of the capacitor  16 , e.g., the output voltage of the DC boosting circuit  1 D. 
         [0100]    As described above, the DC boosting circuit  1 D according to the present exemplary embodiment serves to boost the voltage of the DC power supply  2 , by switching of the switch element  112 _ 1 , in order to generate a boosted output voltage. 
         [0101]    The DC boosting circuit  1 D includes the first arm pair  11 , the reactor  13 D, the capacitor  14 , the second arm pair  12 , and the capacitor  15 . The first arm pair  11  includes the switch element  112 _ 1  and the diode  111  de-serially connected to one end of the switch element  112 _ 1 . The reactor  13  has one end connected to the node of the first arm pair  11  and another end connected to the DC power supply  2 . 
         [0102]    The capacitor  14  is connected in parallel to the first arm pair  11 . The second arm pair  12  includes a series circuit of the diode  121  and the diode  122  connected in series to one end of the first arm pair  11 . The capacitor  15  is interposed between the node of the first arm pair  11  and the node of the second arm pair  12 . 
         [0103]    The reactor  13 D includes the reactor  130 D and the reactor  131 D. The reactor  13 D includes the reactor  130 D and the reactor  131 D that share the same iron core therethrough. Accordingly, a voltage applied to the first arm pair  11  and the second arm pair  12  may be determined as the voltage V 2  of the capacitor  16  that is lower than the output voltage of the DC boosting circuit  1 D. 
         [0104]    Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0105]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, power consumption of a FET itself increases as its withstand voltage increases. Accordingly, a leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having low ON resistance may be employed. 
         [0106]    Further, by action of the reactor  13 D, the DC boosting circuit  1 D according to the present exemplary embodiment may suppress an inrush current occurring when the capacitor  15  is charged by accumulated energy of the capacitor  14 , and may prevent a reverse recovery operation of the diode  122 . 
         [0107]    Further, since the DC boosting circuit  1 D according to the present exemplary embodiment employs the reactor  13 D including the reactor  130 D and the reactor  131 D that share the same iron core therethrough, more downsizing and weight saving, higher efficiency, and more cost reducing may be achieved compared to one or more previous exemplary embodiments. 
         [0108]      FIG. 8  illustrates another embodiment of a DC boosting circuit  1 E which includes switch elements individually connected in parallel to each of the diodes  111 ,  121 , and  122  of the one or more previous embodiments. As shown in  FIG. 8 , the DC boosting circuit  1 E is connected in parallel between the DC power supply  2  and load  3 . 
         [0109]    The DC boosting circuit  1 E includes the first arm pair  21 , the second arm pair  22 , the reactor  13 , and the capacitors  14 ,  15 , and  16 . The first arm pair  21  includes semiconductor switch elements  112  and  211 . The semiconductor switch element  211  includes a switch element  211 _ 1  and the diode  111 . The switch element  211 _ 1 , for example, may be a bipolar transistor, a MOSFET, an IGBT, or the like. 
         [0110]    The switch element  211 _ 1  is connected in parallel to the diode  111 . The switch element  211 _ 1  is connected at the other end thereof to one end of the switch element  112 _ 1  and the cathode of the diode  112 _ 2 . When the switch element  211 _ 1  is an n-type MOSFET, the other end of the switch element  211 _ 1  is a source-side terminal. In this case, one end of the switch element  211 _ 1  is a drain-side terminal. One end of the switch element  211 _ 1  is connected to a second arm pair  22 . 
         [0111]    The second arm pair  22  includes a semiconductor switch element  221  and a semiconductor switch element  222 . The semiconductor switch element  221  includes a switch element  221 _ 1  and the diode  121 . The semiconductor switch element  222  includes a switch element  222 _ 1  and the diode  122 . For example, the switch element  221 _ 1  and the switch element  222 _ 1  may each be a bipolar transistor, a MOSFET, an IGBT, or the like. The switch element  221 _ 1  is connected in parallel to the diode  121 . 
         [0112]    The switch element  221 _ 1  has one end connected to one end of the capacitor  16  and has another end connected to one end of the switch element  222 _ 1  and the cathode of the diode  122 . For example, one end may serve as a drain terminal, the other end may serve as a source terminal, and a control terminal may serve as a gate terminal. 
         [0113]    The switch element  222 _ 1  is connected in parallel to the diode  122 . The switch element  222 _ 1  has one end connected to the other end of the switch element  221 _ 1  and another end connected to one end of the switch element  211 _ 1  and the cathode of the diode  111 . For example, one end may serve as a drain terminal, the other end may serve as a source terminal, and a control terminal may serve as a gate terminal. 
         [0114]    The reactor  13  has one end connected to the positive terminal of the DC power supply  2  and another end connected to the node of the first arm pair  21 . The node of the first arm pair  21  is a node of the semiconductor switch elements  211  and  112 . 
         [0115]    The capacitor  15  has one end connected to the node of the second arm pair  22  and another end connected to the node of the first arm pair  21 . The node of the second arm pair  22  is a node of the semiconductor switch elements  221  and  222 . 
         [0116]    The capacitor  16  is connected in parallel to the load  3 . The capacitor  16  has one end connected to the cathode of the diode  121  and another end connected to the other end of the switch element  112 _ 1  and the negative terminal of the DC power supply  2 . A boosting operation of the DC boosting circuit  1 E may be substantially the same as the boosting operation of one or more of the previous exemplary embodiment. 
         [0117]      FIGS. 9A and 9B  illustrate an example of a regeneration operation of a DC boosting circuit.  FIG. 9A  illustrates a current path of the DC boosting circuit  1 E when the switch element  221 _ 1  and the switch element  211 _ 1  are in an ON state. 
         [0118]    First, when the switch element  221 _ 1  and the switch element  211 _ 1  are turned on, a regenerative current from the load  3  flows along a path  300 E including the capacitor  16 , the switch element  221 _ 1 , the capacitor  15 , the reactor  13 , the DC power supply  2 , and the capacitor  16 . 
         [0119]    Second, the regenerative current, except for a regenerated portion of the DC power supply  2 , is mainly accumulated in the capacitor  15  and the reactor  13 . In this case, since the switch element  211 _ 1  is also in the ON state, a current flows along a path  301 E including the capacitor  14 , the switch element  211 _ 1 , the reactor  13 , the DC power supply  2 , and the capacitor  14  by the action of energy of the capacitor  14 . Hence, the energy of the capacitor  14  is transferred to the reactor  13  and the DC power supply  2 , so the voltage of the capacitor  14  is reduced and the energy thereof also decreases. 
         [0120]      FIG. 9B  illustrates a current path of the DC boosting circuit  1 E when the switch element  211 _ 1  and the switch element  221 _ 1  are in OFF states. The switch element  211 _ 1  and the switch element  221 _ 1  are turned off, and the switch element  222 _ 1  and the switch element  112 _ 1  are turned on. Accordingly, by action of the accumulated energy of the capacitor  15 , a current flows along a path  302 E including switch element  222 _ 1 , the capacitor  14 , the switch element  112 _ 1 , and the capacitor  15 . Thus, the capacitor  14  is charged by the accumulated energy of the capacitor  15 , so the voltage thereof is recovered. 
         [0121]    Further, by action of the accumulated energy of the reactor  13 , a current flows along a path  303 E including the DC power supply  2 , the switch element  112 _ 1 , and the reactor  13 , and the accumulated energy of the reactor  13  is regenerated to the DC power supply  2 . 
         [0122]    A current may be regenerated, from the load  3  having a high voltage to the DC power supply  2  having a low voltage, by repeating ON and OFF states of the switch element  221 _ 1  and the switch element  211 _ 1 , and the switch element  222 _ 1  and the switch element  112 _ 1 , with a predetermined conductance. 
         [0123]    As described above, the DC boosting circuit  1 E according to the present exemplary embodiment serves to boost the voltage of the DC power supply  2 , by switching of the switch element  112 _ 1 , in order to generate a boosted output voltage. 
         [0124]    The DC boosting circuit  1 E includes the first arm pair  21 , the reactor  13 , the capacitor  14 , the second arm pair  22 , and the capacitor  15 . The first arm pair  21  includes the semiconductor switch elements  112  and  211 . The reactor  13  has one end connected to the node of the first arm pair  21  and another connected to the DC power supply  2 . The capacitor  14  is connected in parallel to the first arm pair  21 . 
         [0125]    The second arm pair  22  includes a series circuit of the semiconductor switch element  221  and the semiconductor switch element  222  connected in series to one end of the first arm pair  21 . The capacitor  15  is interposed between the node of the first arm pair  21  and the node of the second arm pair  22 . Accordingly, approved voltages of the first arm pair  21  and the second arm pair  22  may be determined as the voltage V 2  of the capacitor  16  that is lower than an output voltage of the DC boosting circuit  1 E. 
         [0126]    Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0127]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, power consumption of the FET increases as its withstand voltage increases. Accordingly, a leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0128]    Further, as described above, by repeating ON and OFF states of the switch element  221 _ 1  and the switch element  211 _ 1 , and the switch element  222 _ 1  and the switch element  112 _ 1 , with a predetermined conductance, the DC boosting circuit  1 E may regenerate a current from the load  3  having a high voltage to the DC power supply  2  having a low voltage. 
         [0129]      FIG. 10  illustrates another embodiment of a DC boosting circuit  1 F which includes the first arm pair  21 , the second arm pair  22 , the reactor  13 , the capacitors  14 ,  15 , and  16 , and the reactor  17 . The reactor  17  is interposed between the other end of the capacitor  15  and the node of the first arm pair  21 . For example, the reactor  17  has one end connected to one end of the reactor  13  and another end connected to the other end of the capacitor  15 . 
         [0130]    A boosting operation of the DC boosting circuit  1 F may be substantially the same as one or more previous embodiments, and a regenerative operation of the DC boosting circuit  1 F may be substantially the same as one or more of the previous embodiments. For example, as described above, the DC boosting circuit  1 F according to the present exemplary embodiment serves to boost the voltage of the DC power supply  2 , by switching of the switch element  112 _ 1 , in order to generate a boosted output voltage. 
         [0131]    The DC boosting circuit  1 F includes the first arm pair  21 , the reactor  13 , the capacitor  14 , the second arm pair  22 , the capacitor  15 , and the reactor  17 . The first arm pair  21  includes the semiconductor switch elements  112  and  211 . The reactor  13  has one end connected to the node of the first arm pair  21  and another end connected to the DC power supply  2 . The capacitor  14  is connected in parallel to the first arm pair  21 . 
         [0132]    The second arm pair  22  includes a series circuit of the semiconductor switch element  221  and the semiconductor switch element  222  connected in series to one end of the first arm pair  21 . The capacitor  15  is interposed between the node of the first arm pair  21  and the node of the second arm pair  22 . The reactor  17  has one end connected to the other end of the capacitor  15  and another end connected to the node of the first arm pair  21 . 
         [0133]    Hence, a voltage applied to the first arm pair  21  and the second arm pair  22  may be determined as the voltage V 2  of the capacitor  16  that is lower than an output voltage of the DC boosting circuit  1 F. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0134]    Further, when a FET is employed as a semiconductor switch element, ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, power consumption of the FET increases as its withstand voltage increases. Accordingly, a leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0135]    Further, by action of the reactor  17 , the DC boosting circuit  1 F according to the present exemplary embodiment may suppress an inrush current occurring when the capacitor  15  is charged by accumulated energy of the capacitor  14 , and may prevent a reverse recovery operation of the diode  122 . 
         [0136]    Further, by repeating ON and OFF states of the switch element  221 _ 1  and the switch element  211 _ 1 , and the switch element  222 _ 1  and the switch element  112 _ 1 , with a predetermined conductance, the DC boosting circuit  1 F according to the present exemplary embodiment may regenerate a current from the load  3  having a high voltage to the DC power supply  2  having a low voltage. 
         [0137]      FIG. 11  illustrates another embodiment of a DC boosting circuit  1 G which includes switch elements individually connected in parallel to each of the diodes  111 ,  121 , and  122  one or more previous embodiments. The DC boosting circuit  1 G includes the first arm pair  21 , the second arm pair  22 , the reactor  13 , the capacitors  14 ,  15 , and  16 , and the reactor  17 . The reactor  17  is interposed between the node of the semiconductor switch elements  222  and  211  and one end of the capacitor  14 . 
         [0138]    A boosting operation of the DC boosting circuit  1 G may be substantially the same as one or more previous embodiments. Further, a regenerative operation of the DC boosting circuit  1 G may be substantially the same as one or more previous embodiments. 
         [0139]    As described above, the DC boosting circuit  1 G according to the present exemplary embodiment serves to boost the voltage of the DC power supply  2 , by switching of the switch element  112 _ 1 , in order to generate a boosted output voltage. 
         [0140]    The DC boosting circuit  1 G includes the first arm pair  21 , the reactor  13 , the capacitor  14 , the second arm pair  22 , the capacitor  15 , and the reactor  17 . The first arm pair  21  includes the semiconductor switch elements  112  and  211 . The reactor  13  has one end connected to the node of the first arm pair  21  and another end connected to the DC power supply  2 . The capacitor  14  is connected in parallel to the first arm pair  21 . 
         [0141]    The second arm pair  22  includes a series circuit of the semiconductor switch element  221  and the semiconductor switch element  222  connected in series to one end of the first arm pair  21 . The capacitor  15  is interposed between the node of the first arm pair  21  and the node of the second arm pair  22 . The reactor  17  has one end connected to the anode of the diode  122  and at another end connected to the cathode of the diode  111  and the capacitor  14 . 
         [0142]    Accordingly, a voltage applied to the first arm pair  21  and the second arm pair  22  may be determined as the voltage V 2  of the capacitor  16 , that is lower than an output voltage of the DC boosting circuit  1 G. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0143]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, power consumption of the FET increases as its withstand voltage increases. Accordingly, a leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0144]    Further, by action of the reactor  17 , the DC boosting circuit  1 G according to the present exemplary embodiment may suppress an inrush current occurring when the capacitor  15  is charged by an accumulated energy of the capacitor  14 , and may prevent a reverse recovery operation of the diode  122 . 
         [0145]    Further, by repeating ON and OFF states of the switch element  221 _ 1  and the switch element  211 _ 1 , and the switch element  222 _ 1  and the switch element  112 _ 1 , with a predetermined conductance, the DC boosting circuit  1 G according to the present exemplary embodiment may regenerate a current from the load  3  having a high voltage to the DC power supply  2  having a low voltage. 
         [0146]      FIG. 12  illustrates another embodiment of a DC boosting circuit  1 H which includes two DC boosting circuits  1  and a capacitor  140 . As shown in  FIG. 12 , the DC boosting circuit  1 H is connected in parallel between the DC power supply  2  and the load  3 . The DC boosting circuit  1 H has a configuration employing an interleaving mode to reduce a ripple current of a voltage applied to the load  3  (e.g., the boosted voltage V 2 ) and ameliorate a corresponding loss. 
         [0147]    The DC boosting circuit  1 H includes boosting parts  10  and  10   a  and the capacitors  140  and  16 . The boosting part  10  is connected in parallel between the DC power supply  2  and the load  3 . The boosting part  10  includes the first arm pair  11 , the second arm pair  12 , the reactor  13 , and the capacitor  15 . 
         [0148]    The boosting part  10   a  is connected in parallel between the DC power supply  2  and the load  3 . Further, the boosting part  10   a  is connected in parallel to the boosting part  10 . The boosting part  10   a  includes a first arm pair  11   a , a second arm pair  12   a , a reactor  13   a , and a capacitor  15   a . The boosting part  10   a  may have the same configuration as the boosting part  10 . 
         [0149]    The capacitor  140  is connected in parallel between the boosting part  10  and the boosting part  10   a . For example, the capacitor  140  has one end connected to the cathodes of diodes  111  and  111   a  and another connected to the other ends of the switch elements  112 _ 1  and  112   a    1 . When a plurality of DC boosting circuits  1  are used, the DC boosting circuit  1 H may integrally employ one capacitor  140  to perform the roles of a plurality of the capacitors  14 . 
         [0150]    An example of the boosting operation of the DC boosting circuit  1 H will now be described. The boosting operation of the DC boosting circuit  1 H executes an interleaving operation for shifting a phase of an ON or OFF state of switch elements  112 _ 1  and  112   a _ 1 . Accordingly, during a switching period of the DC boosting circuit  1 H, the boosted voltage of the boosting part  10  and the boosted voltage of the boosting part  10   a  are alternately applied to the load  3 . For example, a frequency of the detected ripple current is doubled with respect to the switching frequency of the DC boosting circuit  1 H, and the ripple current decreases. The boosting operation of each of the boosting parts  10  and  10   a  of the DC boosting circuit  1 H may be substantially the same as one or more previous embodiments. 
         [0151]    As described above, the DC boosting circuit  1 H according to the present exemplary embodiment includes a plurality of DC boosting circuits and the capacitor  140  integrally serving as the respective capacitors  14  thereof. The DC boosting circuit  1 H executes each DC boosting circuit in the interleaving mode. Accordingly, a voltage applied to the first arm pair and the second arm pair may be determined as the voltage V 2  of the capacitor  16 , that is lower than an output voltage of the DC boosting circuit  1 H. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0152]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of the FET increases exponentially as its withstand voltage increases. Thus, power consumption of the FET increases as its withstand voltage increases. Accordingly, a leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0153]    Further, when executing the interleaving operation with a plurality of the DC boosting circuits, the DC boosting circuit  1 H according to the present exemplary embodiment employs the capacitor  140  integrally serving as the capacitors  14  of the respective DC boosting circuits. As a result, further downsizing and cost reducing may be achieved. 
         [0154]      FIG. 13  illustrates another embodiment of a DC boosting circuit  1 I which includes two DC boosting circuits  1 A according to a previous embodiment and one capacitor  140  integrating roles of each capacitor  14  of the two DC boosting circuits  1 A. 
         [0155]    As shown in  FIG. 13 , the DC boosting circuit  1 I is connected in parallel between the DC power supply  2  and the load  3 . The DC boosting circuit  1 I has a configuration employing an interleaving mode to reduce a ripple current of a voltage applied to the load  3 , i.e., the boosted voltage V 2 , and ameliorate a corresponding loss. 
         [0156]    The DC boosting circuit  1 I includes boosting parts  10 I and  10 Ia and the capacitors  140  and  16 . The boosting part  10 I is connected in parallel between the DC power supply  2  and the load  3 . The boosting part  10 I includes the first arm pair  11 , the second arm pair  12 , the reactor  13 , the capacitor  15 , and the reactor  17 . 
         [0157]    The boosting part  10 Ia is connected in parallel between the DC power supply  2  and the load  3 . Further, the boosting part  10 Ia is connected in parallel to the boosting part  10 I. The boosting part  10 Ia includes the first arm pair  11   a , the second arm pair  12   a , the reactor  13   a , the capacitor  15   a , and a reactor  17   a . The boosting part  10 Ia may have the same configuration as the boosting part  10 I. 
         [0158]    An example of a boosting operation of the DC boosting circuit  1 I according to the present exemplary embodiment will now be described. The boosting operation of the DC boosting circuit  1 I executes an interleaving operation for shifting a phase of ON or OFF states of the switch elements  112 _ 1  and  112   a _ 1 . Accordingly, during a switching period of the DC boosting circuit  1 I, the boosted voltage of the boosting part  10 I and the boosted voltage of the boosting part  10 Ia are alternately applied to the load  3 . For example, the frequency of the detected ripple current may be doubled with respect to the switching frequency of the DC boosting circuit  1 I, and the ripple current decreases. 
         [0159]    A boosting operation of each of the boosting parts  10 I and  10 Ia of the DC boosting circuit  1 I may be substantially the same as one or more previous embodiments. 
         [0160]    As described above, the DC boosting circuit  1 I according to the present exemplary embodiment includes a plurality of DC boosting circuits according to a previous embodiment and the capacitor  140  integrally serving as the respective capacitors  14  thereof. 
         [0161]    The DC boosting circuit  1 I according to the present exemplary embodiment executes each DC boosting circuit in the interleaving mode. Accordingly, voltages applied to the first arm pair and the second arm pair may be determined as the voltage V 2  of the capacitor  16 , that is lower than an output voltage of the DC boosting circuit  1 I. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. Therefore, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0162]    Further, when the FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, as the withstand voltage increases, power consumption of the FET problematically increases. Therefore, in the present exemplary embodiment, it is advantageous that a semiconductor switch element having a low ON resistance is employed. 
         [0163]    Further, when executing the interleaving operation with a plurality of the DC boosting circuits, the DC boosting circuit  1 I according to the present exemplary embodiment employs the capacitor  140  integrally serving as the respective capacitors  14  thereof. As a result, a further downsizing and cost reduction may be achieved. 
         [0164]      FIG. 14  illustrates an embodiment of a DC boosting circuit  1 J which includes two DC boosting circuits  1 B. The capacitors  14  of each DC boosting circuit  1 B are substituted for one capacitor  140 , and the reactors  17  of each DC boosting circuit  1 B are substituted for one reactor  170 . 
         [0165]    As shown in  FIG. 14 , the DC boosting circuit  1 J is connected in parallel between the DC power supply  2  and the load  3 . The DC boosting circuit IT has a configuration employing an interleaving mode to reduce a ripple current of a voltage applied to the load  3  (e.g., the boosted voltage V 2 ) and ameliorate a corresponding loss. 
         [0166]    The DC boosting circuit  1 J includes boosting parts  10 J and  10 Ja, the capacitor  140 , the reactor  170 , and the capacitor  16 . The boosting part  10 J is connected in parallel between the DC power supply  2  and the load  3 . The boosting part  10 J includes the first arm pair  11 , the second arm pair  12 , the reactor  13 , and the capacitor  15 . 
         [0167]    The boosting part  10 Ja is connected in parallel between the DC power supply  2  and the load  3 . Further, the boosting part  10 Ja is connected in parallel to the boosting part  10 J. The boosting part  10 Ja includes the first arm pair  11   a , the second arm pair  12   a , the reactor  13   a , and the capacitor  15   a . The boosting part  10 Ja may have the same configuration as that of the boosting part  10 J. 
         [0168]    The reactor  170  is connected in parallel between the boosting parts  10 J and  10 Ja. For example, the reactor  170  has one end connected to the anodes of diodes  122  and  122   a  and another end connected to the cathodes of the diodes  111  and  111   a.    
         [0169]    Hence, when a plurality of DC boosting circuits  1 B are used, the DC boosting circuit  1 J may use one capacitor  140  integrally for performing the roles of a plurality of the capacitors  14 . Further, roles of a plurality of the reactors  17  may be served integrally by one rector  170 . 
         [0170]    An example of a boosting operation of the DC boosting circuit  1 J according to the present exemplary embodiment will now be described. The boosting operation of the DC boosting circuit  1 J executes an interleaving operation for shifting a phase of an ON or OFF state of the switch elements  112 _ 1  and  112   a    1 . 
         [0171]    Accordingly, during a switching period of the DC boosting circuit  1 J, the boosted voltage of the boosting part  10 J and the boosted voltage of the boosting part  10 Ja are alternately applied to the load  3 . For example, the frequency of the detected ripple current is doubled with respect to the switching frequency of the DC boosting circuit  1 J, and the ripple current decreases. A boosting operation of each of the boosting parts  10 J and  10 Ja of the DC boosting circuit  1 J may be substantially the same as one or more previous embodiments. 
         [0172]    As described above, the DC boosting circuit  1 J according to the present exemplary embodiment includes a plurality of the DC boosting circuits and the capacitor  140  jointly serving as each capacitor  14  thereof. 
         [0173]    Further, the DC boosting circuit  1 J according to the present exemplary embodiment includes the reactor  170  integrally serving as the reactor  17  of the respective DC boosting circuits. 
         [0174]    The DC boosting circuit  1 J according to the present exemplary embodiment executes each DC boosting circuit in the interleaving mode. Accordingly, a voltage applied to the first arm pair and the second arm pair may be determined as the voltage V 2  of the capacitor  16 , that is lower than an output voltage of the DC boosting circuit  1 J. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0175]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, since power consumption of the FET increases as its withstand voltage increases, a leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having low ON resistance may be employed. 
         [0176]    Further, when executing the interleaving operation with a plurality of the DC boosting circuits, the DC boosting circuit  1 J according to the present exemplary embodiment employs the capacitor  140  and the reactor  140  integrally serving as the capacitor  14  and the reactor  17  of the respective DC boosting circuits. As a result, more downsizing and cost reduction may be achieved. 
         [0177]      FIG. 15  illustrates another embodiment of a DC boosting circuit  1 K which includes two DC boosting circuits  1 C according to a previous embodiment, one capacitor  140  integrating roles of each capacitor  14  of the two DC boosting circuits  1 C, and one reactor  170  integrating roles of each reactor  17  of the two DC boosting circuits  1 C. 
         [0178]    As shown in  FIG. 15 , the DC boosting circuit  1 K is connected in parallel between the DC power supply  2  and the load  3 . The DC boosting circuit  1 K has a configuration employing an interleaving mode to reduce a ripple current of a voltage applied to the load  3  (e.g., the boosted voltage V 2 ) and ameliorate a corresponding loss. 
         [0179]    The DC boosting circuit  1 K includes boosting parts  10 K and  10 Ka, the capacitor  140 , the reactor  170 , and the capacitor  16 . The boosting part  10 K is connected in parallel between the DC power supply  2  and the load  3 . The boosting part  10 K includes the first arm pair  11 , the second arm pair  12 , the reactor  13 , and the capacitor  15 . 
         [0180]    The boosting part  10 Ka is connected in parallel between the DC power supply  2  and the load  3 . Further, the boosting part  10 Ka is connected in parallel to the boosting part  10 K. The boosting part  10 Ka includes the first arm pair  11   a , the second arm pair  12   a , the reactor  13   a , and the capacitor  15   a . The boosting part  10 Ka may have the same configuration as the boosting part  10 K. 
         [0181]    The reactor  170  is connected in parallel between the boosting parts  10 K and  10 Ka. For example, the reactor  170  has one end connected to the anodes of the diodes  122  and  122   a  and another end connected to one end of the capacitor  140 . 
         [0182]    Hence, when a plurality of DC boosting circuits  1 C are used, the DC boosting circuit  1 K may use one capacitor  140  integrally for roles of a plurality of the capacitors  14 . Further, roles of a plurality of the reactors  17  are served jointly by one reactor  170 . 
         [0183]    An example of a boosting operation of the DC boosting circuit  1 K according to the present exemplary embodiment will now be described. The boosting operation of the DC boosting circuit  1 K executes an interleaving operation for shifting a phase of an ON or OFF state of the switch elements  112 _ 1  and  112   a _ 1 . Accordingly, during a switching period of the DC boosting circuit  1 K, the boosted voltage of the boosting part  10 K and the boosted voltage of the boosting part  10 Ka are alternately applied to the load  3 . For example, the frequency of the detected ripple current may be doubled with respect to the switching frequency of the DC boosting circuit  1 K and the ripple current decreases. A boosting operation of each of the boosting parts  10 K and  10 Ka of the DC boosting circuit  1 K may be substantially the same as a previous embodiment. 
         [0184]    As described above, the DC boosting circuit  1 K according to the present exemplary embodiment includes a plurality of the DC boosting circuits according to a previous embodiment and the capacitor  140  jointly serving as each capacitor  14  thereof. 
         [0185]    Further, the DC boosting circuit  1 K according to the present exemplary embodiment includes the reactor  170  integrally serving as the reactor  17  of the respective DC boosting circuits. Then, the DC boosting circuit  1 K according to the present exemplary embodiment executes each DC boosting circuit in the interleaving mode. Accordingly, a voltage applied to the first arm pair and the second arm pair may be determined as the voltage V 2  of the capacitor  16 , that is lower than an output voltage of the DC boosting circuit  1 K. Therefore, it may be advantageous that the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced, and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0186]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of a FET increases exponentially as its withstand voltage increases. Thus, since power consumption of the FET increases as its withstand voltage increases, a leakage current of a DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0187]    Further, when executing the interleaving operation with a plurality of the DC boosting circuits, the DC boosting circuit  1 K according to the present exemplary embodiment employs the capacitor  140  and the reactor  140  integrally serving as the capacitor  14  and the reactor  17  of the respective DC boosting circuits. As a result, more downsizing and cost reduction may be achieved. 
         [0188]    By way of summation and review, one type of DC boosting circuit (called a boosting chopper circuit) includes a switching element, a diode, and a reactor. An example of such a circuit is illustrated in  FIG. 16 . 
         [0189]    Referring to  FIG. 16 , the DC boosting circuit  900  includes a DC power supply  910 , a reactor  920 , an arm pair  930 , a capacitor  940 , and a load  950 . The arm pair  930  includes a diode D 2  and a semiconductor switch element (e.g., MOSFET) T 2 . The reactor  920  is connected between a node of the diode D 2  and the semiconductor switch element T 2 , and a positive terminal of the DC power supply  910 . A negative terminal of the DC power supply  910  is connected to an outer terminal (source of MOSFET) of the arm pair  930 . Further, the capacitor  940  and the load  950  are connected in parallel to opposite ends of the arm pair  930 . 
         [0190]    When the switch element T 2  is in an ON state, the DC boosting circuit  900  has a current path including the DC power supply  910 , the reactor  920 , the switch element T 2 , and the DC power supply  910 , and energy is accumulated in the reactor  920 . 
         [0191]    When the switch element T 2  is turned off, a current flowing in the switch element T 2  flows along a path including the diode D 2  and the capacitor  940 . Due to the accumulated energy of the reactor  920 , the capacitor  940  is charged to a voltage that is higher than the voltage of the DC power supply  910 . 
         [0192]    Accordingly, by repeating ON and OFF states of the switch element T 2 , the DC boosting circuit  900  boosts a voltage and supplies the boosted voltage that is higher than the voltage of the DC power supply  910  to the load  950 . 
         [0193]    A relationship between a voltage V i  and a current I i  of the DC power supply  910 , and a voltage V 0  and a current I 0  supplied to the load  950 , assuming that the DC boosting circuit  900  is ideal, satisfies a relationship of V i *I i =V 0 *I 0  (=transformed electric power). Alternatively, the relationship may be presented by V i :V 0 =I 0 :I i . Therefore, in the case of a high boosting ratio V 0 /V i , the voltage V 0  and the current I i  are high, the transformed electric power remains constant. 
         [0194]    As a result, the switch element T 2  and the diode D 2  need to be designed to correspond to a high-voltage current capacity (electric power) with a high boosting ratio. Therefore, when physically implementing the device, problems of increasing size and raising cost are inevitable. 
         [0195]    In accordance with one or more of the aforementioned embodiments, the load of a semiconductor (e.g., a switch element, a diode, or the like) is reduced and an element having a low current capacity and a low withstand voltage may be employed. As a result, downsizing, weight saving, and cost reducing of a device having a high boosting ratio may be achieved. 
         [0196]    Further, when a FET is employed as a semiconductor switch element, the ON resistance of the FET increases exponentially as its withstand voltage increases. Thus, power consumption of the FET increases as its withstand voltage increases. Accordingly, leakage current of the DC boosting circuit is limited. Therefore, in the present exemplary embodiment, a semiconductor switch element having a low ON resistance may be employed. 
         [0197]    Example embodiments have been disclosed herein, and although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation. In some instances, as would be apparent to one of skill in the art as of the filing of the present application, features, characteristics, and/or elements described in connection with a particular embodiment may be used singly or in combination with features, characteristics, and/or elements described in connection with other embodiments unless otherwise indicated. Accordingly, it will be understood by those of skill in the art that various changes in form and details may be made without departing from the spirit and scope of the invention as set forth in the following claims.