Abstract:
A wafer level chip scale package (WLCSP) structure and a manufacturing method are disclosed. The WLCSP structure comprises a semiconductor die and a stack. The stack comprises a protective tape and a molding compound. A portion of a first interface surface between the molding compound and the protective tape is curved. The manufacturing method comprises the steps of forming a semiconductor structure; attaching the semiconductor structure on a dummy wafer; performing a first dicing process using a first cutting tool; depositing a molding compound; removing the dummy wafer; performing a second dicing process with a second cutting tool. A first aperture of the first cutting tool is larger than a second aperture of the second cutting tool. The portion of the first interface surface being curved reduces the possibility of generation of cracks in the WLCSP structure.

Description:
FIELD OF THE INVENTION 
       [0001]    This invention relates generally to a semiconductor packaging technology. More particularly, the present invention relates to a wafer level chip scale package (WLCSP) structure and the method of manufacturing the WLCSP structures. 
       BACKGROUND OF THE INVENTION 
       [0002]    Wafer level chip scale packaging (WLCSP) is a packaging technology of molding flip chips at a wafer level without using lead frames. WLCSP forms package structures having thinner body sizes. WLCSP is widely used in semiconductor packaging inductry. 
         [0003]    During packaging process and subsequent reliability test, cracks are frequently generated between layers of package structures. Minor cracks between a protective tape and a molding compound are often observed. Having the presence of minor cracks, it is more challenging to conduct subsequent backside treatment of semiconductor chips formed on the silicon wafer. Moisture, oxygen and other impurities may come into the package structures through the cracks; may erode components inside the package structures; and may affect the performance of the package structures. 
       SUMMARY OF THE INVENTION 
       [0004]    A wafer level chip scale package (WLCSP) structure and a manufacturing method are disclosed. The WLCSP structure comprises a semiconductor die and a stack. The stack comprises a protective tape and a molding compound. A portion of a first interface surface between the molding compound and the protective tape is curved. The manufacturing method comprises the steps of forming a semiconductor structure; attaching the semiconductor structure on a dummy wafer; performing a first dicing process using a first cutting tool; depositing a molding compound; removing the dummy wafer; performing a second dicing process with a second cutting tool. A first aperture of the first cutting tool is larger than a second aperture of the second cutting tool. The portion of the first interface surface being curved reduces the possibility of generation of cracks in the WLCSP structure. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0005]      FIG. 1  is a cross-sectional schematic diagram of a wafer level chip scale package (WLCSP) structure in examples of the present disclosure. 
           [0006]      FIG. 2  is a top view of the WLCSP structure shown in  FIG. 1 . 
           [0007]      FIG. 3-12  are cross-sectional schematic diagrams illustrating a method for manufacturing a wafer level chip scale package structure in examples of the present disclosure. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0008]      FIG. 1  is a cross-sectional schematic diagram of a wafer level chip scale package (WLCSP) structure in examples of the present disclosure. The WLCSP structure includes a protective tape  11 , a first metal layer (for example, a back metal)  12 , a substrate (for example, a silicon substrate)  13 , a second metal layer (for example, an aluminum layer)  14  and a passivation layer (PV)  15 . The protective tape  11 , the first metal layer  12 , the substrate  13 , the second metal layer  14  and the passivation layer  15  are arranged in the given order in a vertical direction. In examples of the present disclosure, the vertical direction is parallel to a thickness direction of the substrate  13 . In examples of the present disclosure, the vertical direction is perpendicular to a bottom surface of the protective tape  11 . 
         [0009]    In examples of the present disclosure, the protective tape  11  has a raised center part and arc-shaped side edges. In examples of the present disclosure, an arc-shaped side edge is a curved interface surface (for example, a portion of an interface between the protective tape  11  and molding compound  17 ). In one example, an arc-shaped side edge has a constant radius of curvature. In another example, an arc-shaped side edge has a progressive changing of the radii of curvatures from a first end to a second end of the side edges. The first metal layer  12  is attached to a top surface of the raised center part of the protective tape  11 . The silicon substrate  13  is attached to a top surface of the first metal layer  12 . The second metal layer  14  is attached to a top surface of the substrate  13 . The passivation layer  15  is attached to a top surface of the second metal layer  14 . 
         [0010]    In examples of the present disclosure, the WLCSP structure further comprises a plurality of connection members. Each connection member includes a metal pillar  16  (for example, a copper pillar) and a solder bump  18 . Each connection member is electrically connected to the second metal layer  14  through an opening on the passivation layer  15 . In one example, the metal pillar  16  goes through an opening formed on the passivation layer  15 . A top surface of the metal pillar  16  is higher than a top surface of the passivation layer  15 . A bottom surface of the metal pillar  16  is coplanar with a bottom surface of the passivation layer  15 . In examples of the present disclosure, the second metal layer  14  has recesses to receive the metal pillars  16 . The solder bump  18  is formed on the top surface of the metal pillar  16  for electrical connection with other components. 
         [0011]    Molding compound  17  covers side walls of the metal pillar  16  and the top surface of the passivation layer  15 . The molding compound  17  extends to cover side walls of the passivation layer  15 , side walls of the second metal layer  14 , side walls of the silicon substrate  13  and side walls of the first metal layer  12 . The molding compound  17  covers the side edges of the protective tape  11 . The arc-shaped surfaces at the side edges of the protective tape  11  increase the interface area between the molding compound  17  and the protective tape  11 . Therefore, it strengthens mutual adhesion between the molding compound  17  and the protective tape  11 . In examples of the present disclosure, without affecting the performance of the package structure, a respective interface surface between each of the first metal layer  12  and the molding compound  17 , the substrate  13  and the molding compound  17 , the second metal layer  14  and the molding compound  17 , and the passivation layer  15  and the molding compound  17  has arc-shaped interface surface (similar to the arc-shaped surface between the molding compound  17  and the protective tape  11  as shown in  FIG. 1 ). Therefore, it strengthens the mutual adhesion between the molding compound  17  and each of these layers. In examples of the present disclosure, the material for the first metal layer  12  is titanium (Ti), nickel (Ni) or silver (Ag). 
         [0012]      FIG. 2  is a top view of the WLCSP structure shown in  FIG. 1 . In examples of the present disclosure, in  FIGS. 1-2 , a height A of the WLCSP structure ranges from 0.175 mm to 0.250 mm (preferably, 0.175 mm, 0.200 mm or 0.250 mm). A length D ranges from 0.585 mm to 0.615 mm (preferably, 0.585 mm, 0.600 mm or 0.615 mm). A width E ranges from 0.28500 to 0.315 mm (preferably, 0.285 mm, 0.300 mm or 0.315 mm). A length D 1  of the connection member (including metal pillar  16  and solder bump  18 ) along the length direction D of the WLCSP structure (i.e., the lateral direction shown in  FIG. 2 ) ranges from 0.090 mm to 0.190 mm (preferably, 0.090 mm, 0.140 mm or 0.190 mm). A width E 1  of the connection member along the width direction E of the WLCSP structure ranges from 0.190 mm to 0.290 mm (preferably, 0.190 mm, 0.240 mm or 0.290 mm). A length D 2  between adjacent connection members within the same WLCSP structure ranges from 0.210 mm to 0.310 mm (preferably, 0.210 mm, 0.260 mm or 0.310 mm). 
         [0013]    The interface surface between the molding compound  17  and other layers is increased. It effectively increases the adhesion between the layers. The arc-shaped interface surfaces enhance the adhesion between the layers in the WLCSP structure. It effectively reduces the possibility of generating cracks between the layers in subsequent back treatment of the WLCSP structure, storage of the WLCSP structure and use of the WLCSP structure. It improves the performance of the package structure. The arc-shaped interface surface of two different materials suppresses the risk of product cracks, increase product yield, and improves quality and reliability. The arc-shaped interface surface arranged near the edge of the WLCSP structure improves the electrical conductivity and heat dissipation of the WLCSP structure. 
         [0014]      FIGS. 3-12  are cross-sectional schematic diagrams showing a method for manufacturing the WLCSP structure of  FIGS. 1-2 . A plurality of WLCSP structures are fabricated from a wafer. For illustration purpose,  FIGS. 3-12  only show fabrication of two WLCSP structures of the plurality of WLCSP structures. Each WLCSP structure has a plurality of metal pillars  24 . For illustration purpose,  FIGS. 3-12  show that each WLCSP structure has only two metal pillars  24  of the plurality of metal pillars  24 . 
         [0015]    The method may start from the step shown in  FIG. 3 . A second metal layer  22  (for example, an aluminum, Al) is deposited by sputtering (or other processes) on a top surface of a substrate  21  (for example, as silicon, Si). The top surface of the substrate  21  is an active area. A plurality of package units (two package units for illustration purpose, but not shown in  FIG. 3 ) are associated with the top surface of the substrate  21 . Each package unit is illustrated to associated with two metal pillars  24 . A cutting space is arranged between two adjacent package units. The second metal layer  22  is used as a conducting layer for electric connection between the package units and the subsequently formed solder bumps  25  of  FIG. 4 . A passivation layer  23  is deposited on a top surface of the second metal layer  22 . The passivation layer  23  is etched to form a plurality of openings. Portions of the top surface of the second metal layer  22  are exposed from the plurality of openings of the passivation layer  23 . A plurality of metal pillars  24  (for example, copper pillars) are deposited on the exposed portions of the top surface of the second metal layer  22  The openings of the passivation layer  23  are entirely filled with the plurality of metal pillars  24 . The plurality of metal pillars  24  connects to the top surface of the second metal layer  22 . A top surface of the metal pillar  24  is higher than the top surface of the passivation layer  23 . 
         [0016]    As shown in  FIG. 4 , a respective solder bump  25  is deposited on the top surface of each metal pillar  24  so as to form a respective connection member. Two adjacent connection members within the same package unit are electrically connected via the second metal layer  22 . 
         [0017]    The substrate  21  is thinned from a backside. For example, a portion of the substrate  21  below the dotted line in  FIG. 4  is removed so as to form a thinned substrate structure  21  shown in  FIG. 5 . As shown in  FIG. 6 , a first metal layer  26  (for example, a back metal) is formed, by sputtering or vapor deposition, on the back surface of the thinned substrate  21 . In one example, the first metal layer  26  is a single-layer structure. In another example, the first metal layer  26  is a multi-layer structure. For example, the first metal layer  26  comprises materials selected from the group consisting of titanium (Ti), nickel (Ni) and silver (Ag). In examples of the present disclosure, the thickness of the first metal layer ranges from 8 μm to 10 μm. 
         [0018]    As shown in  FIG. 7 , a protective tape  27  is attached to a back surface of the first metal layer  26 . As shown in  FIG. 8 , the structure as shown in  FIG. 7  is then attached to a dummy wafer  29  by a double side tape  28 . 
         [0019]    In  FIG. 9 , a pre-cut process is performed in the cutting space between two adjacent package units. The pre-cut depth is determined according to actual process requirements. In one example, the pre-cut does not cut through the protective tape  27  as shown in  FIG. 9 . In one example, the pre-cut cuts through the passivation layer  23 , the second metal layer  22 , the substrate  21 , and the first metal layer  26 . The pre-cut stops within the protective tape  27 . A notch  30  formed by the pre-cut process has an arc-shaped bottom end. In one example, the arc-shaped bottom end has a constant radius of curvature (the area circled by the dotted line in  FIG. 9 ) determined by a shape of the cutting tool. 
         [0020]    As shown in  FIG. 10 , a molding compound  31  is filled in the notch  30  and in the space formed between the adjacent connection members. The molding compound  31  covers the side walls of the metal pillar  24  and the top surface of the passivation layer  23 . The molding compound  31  extends to cover side walls of the passivation layer  23 , side walls of the second metal layer  22 , side walls of the substrate  21  and side walls of the first metal layer  26 . The molding compound  31  covers the arc-shaped side edges of the protective tape  27  (the area at the bottom of the notch  30 ). In one example, the material of the protective tape  27  is different from the material of the molding compound  31 . In another example, the material of the protective tape  27  is the same as the material of the molding compound  31   
         [0021]    As shown in  FIG. 11 , the dummy wafer  29  and the double side tape  28  of the package structure of  FIG. 10  are removed. A dicing process is applied by cutting along the direction indicated by an arrow  32  so as to form the individual WLCSP structures as shown in  FIG. 12 . The dicing process cut through the molding compound  31  filled over and in the notch and through the protective tape  27 . 
         [0022]    As shown in  FIG. 11  and  FIG. 12 , the arc-shaped bottom end of the notch  30  results in the arc-shaped interface surface between the protective tape  27  and the molding compound  31 . It effectively prevents the generation of cracks between the protective tape  27  and the molding compound  31  during the dicing process. In examples of the present disclosure, the pre-cut process and the dicing process are by laser cutting. The aperture of the cutting tool used in the dicing process is smaller than that used in the pre-cut process so that the final WLCSP structure comprises the arc-shaped interface surfaces. The arc-shaped interface surfaces increase the adhesion between the layers of the WLCSP structure, particularly between the protective tape  27  and the molding compound  31 . It effectively reduces the possibility of generation of cracks between the layers of the WLCSP structure during back treatment, storage and use of the WLCSP structure. It improves the performance of WLCSP structure. 
         [0023]    In addition to the arc-shaped interface surface between the protective tape  27  and the molding compound  31 , the interface surfaces between the molding compound  31  and other layers (for example, the first metal layer  26 , and the substrate  21 ) may be arc-shaped to increase inter-layer adhesion. 
         [0024]    Those of ordinary skill in the art may recognize that modifications of the embodiments disclosed herein are possible. For example, the radius of curvature of the curved interface surface may vary. Other modifications may occur to those of ordinary skill in this art, and all such modifications are deemed to fall within the purview of the present invention, as defined by the claims.