Abstract:
Apparatus, system, and method is disclosed for digitally processing a signal for reduced distortion and frequency deviation. The digital processor involves increasing the sampling frequency of a digital signal prior to a non-linear operating stage. The processed signal is then passed through a low pass filter prior to being down-converted to the initial sampling frequency. Thus, a signal can be digitally processed for reduced distortion as well as reduced frequency deviation.

Description:
FIELD OF THE INVENTION 
     This invention relates to the field of signal processing techniques and in particular, digital processing techniques for reduced distortion and frequency deviation. 
     BACKGROUND OF THE INVENTION 
     In communication systems, it is advantageous to transmit and receive signals with little or no distortion so that all of the information in the signal can be preserved and processed. It is not desirable to introduce spurious signals that can mask or distort the original signal. Additionally, large signal peaks or spikes that can create excessive frequency deviation when the signal is modulated or that can saturate a system and produce harmonic distortion are not beneficial. Thus, the ability to perform non-linear operations, such as limiting the magnitude of the signal, is desirable, providing the non-linear operation does not introduce spurious signals. 
     The prior art, as shown in FIG. 1 in conjunction with FIG. 2, illustrates some inherent problems when processing signals. In FIG. 1, the signal 100 contains all of its information in the carrier frequency 102. In FIG. 2, the nonlinear operation of limiting is performed on the signal 100, introducing undesirable harmonics 206, 208, and 210 along with higher order harmonics. In the analog domain, the harmonics 206, 208, and 210 are removed with a low pass filter 212, which passes the primary frequency band, including the carrier frequency 102, but filters out the higher order harmonics. However, analog implementations are generally larger, more costly, and consume more power than their digital counterparts. 
     In portable communication systems, size, cost, power, flexibility, and repeatability are paramount concerns; consequently, digital implementations are desirable. 
     In the digital domain, all harmonics whose frequency is greater than half the sampling rate alias, or &#34;fold over&#34;, into the primary frequency band, leading to severe distortion. If the initial signal is band limited to  -W, W!, then digital processing can be performed at a rate, 2W. If a digital signal has an initial frequency, f, then the non-linear operation of limiting the signal produces harmonics at frequencies mf, m being an odd integer. Certain harmonics, as determined in equation 1, fold-over or produce an alias of that harmonic in the primary frequency band  -W, W!. 
     (1) Alias =|mf+2kW|&lt;W 
     m=odd integer 
     f=initial frequency 
     k=any positive or negative integer 
     W=primary frequency band  -W, W! 
     2W=sampling frequency or rate 
     In FIG. 3, the prior art illustrates the effects of non-linear operations on an input signal 310 with a frequency of 3 kHz. With a bandwidth of ±4 kHz and a sampling rate of 8 kHz, the third harmonic 312 folds over into the primary frequency band at 1 kHz; consequently, the third harmonic cannot be removed with a low pass filter. Because the third harmonic is only 15 dB down, it leads to significant and undesirable distortion. 
     Accordingly, there is a need to provide a low cost, small size, and low power digital processor for reduced distortion and frequency deviation. 
     SUMMARY OF THE INVENTION 
     The present invention leaches a device which can digitally process a signal for reduced distortion and frequency deviation. The disclosed technique increases the effective sampling rate of the digital signal prior to the application of a non-linear operation. This results in lower amplitude aliased harmonics in the band of interest. Importantly, by performing the operation in the digital domain, there are significant reductions in size, cost, and power requirements. 
     In an exemplary embodiment of the present invention, an up-sampling means increases the initial sampling frequency of a digital input signal by a given ratio to form an up-sampled digital signal. A non-linear operation is performed on the up-sampled digital signal and the resulting signal is fed to a low pass filter. A converter then down-samples and restores the output of the low pass filter to the initial sampling frequency. By increasing the initial sampling rate, the effects of aliasing or fold-over due to the non-linear operation are reduced. Thus, an analog voice signal can be digitally processed without degradation in the final transmitted signal. 
     Advantageously, the present invention can be used with any application in which distortion due to aliasing effects must be reduced. By solving the problem digitally, the present invention can be incorporated into the digital chip design. As such, it is useful in portable communication systems where size, cost, power, flexibility, and repeatability are primary concerns. The present invention is a versatile and simple solution to a digital processing problem. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     A more complete understanding of the present invention may be obtained from consideration of the following description in conjunction with the drawings in which: 
     FIG. 1 is a time-frequency diagram in the prior art which illustrates a signal prior to processing. 
     FIG. 2 is a time-frequency diagram in the prior art which illustrates the effects of a non-linear operation on an input signal. 
     FIG. 3 is a frequency spectrum plot in the prior art which illustrates the effects of a non-linear operation on a digital input signal. 
     FIG. 4 is a block diagram of an exemplary digital processor for reduced distortion and frequency deviation. 
     FIG. 5 is a block diagram of an exemplary digital processor for reduced distortion and frequency deviation which provides analog transmission. 
     FIG. 6 is a block diagram of an exemplary digital input source which provides an input for an analog signal. 
    
    
     DETAILED DESCRIPTION 
     In accordance with the present invention, an exemplary digital processor for reduced distortion and frequency deviation is responsive to increases in the sampling frequency of a digital signal. In the present invention, a digital signal has its initial sampling rate increased. The up-sampled signal is processed by a non-linear operator. The processed signal is then fed to a low-pass filter. The combination of the up-sampling and the low-pass filtering reduces the harmonic distortion of the digital signal. It is because of this reduction in distortion that non-linear operations can be implemented in the digital domain for, among other purposes, reduced frequency deviation. 
     An exemplary digital processor can be seen in FIG. 4. A digital input signal source 400 generates a digital input signal to be received by the up-sampling means 402. The digital input signal has an initial sampling frequency. The up-sampling means inserts additional data samples to effectively increase the initial sampling frequency of the digital input signal. The additional data samples are normally generated by interpolating between existing data samples in the digital input signal. Thus, inserting one additional sample between existing samples doubles the sampling rate while adding three samples quadruples the sampling rate. 
     In FIG. 4 of the present invention, the up-sampling means 402 passes the signal to a non-linear operating means 404. A problem with non-linear operators is the introduction of harmonic distortion in the digital signal. Certain harmonics, as shown in equation 1, fold-over or produce an alias of that harmonic in the primary frequency band. 
     A low-pass filter 406, coupled to the output of the non-linear operator 404 can be seen in the block diagram of the exemplary digital processor in FIG. 4. Low-pass 406 is, for example, a digital low-pass filter. The low-pass filter is designed to pass the frequency of the digital input signal while rejecting the higher frequency harmonics. In audio applications where the information in the input signal has a frequency below or near 3 kHz, the low-pass filter can be tuned to pass frequencies ranging from 0-3.2 kHz up to 0-4 kHz. Of course, if the signal contains information at higher frequencies, then the low-pass filter would be tuned accordingly to pass that information. 
     The converting means 408 decreases the sampling frequency of the digital signal. The resulting sampling frequency at the output of the converting means is equal to the initial sampling frequency, where the decrease in the sampling frequency is equal to the increase found in the up-sampling means. The decrease in sampling rate is accomplished by dropping samples in the digital signal. If every other sample in the signal is dropped, then the sampling rate is decreased by two. The ratio by which the sampling frequency is decreased or increased can be an integer or fractional number. 
     In the exemplary digital processor, the up-sampling means 402 is utilized to increase the sampling frequency and thereby decrease the number as well as the amplitude of the harmonics which can fold-over into the primary frequency band. Equation 2 shows equation 1 modified to reflect the increased sampling frequency. 
     (2) Alias=|mf+2kjW|&lt;W 
     m=odd integer 
     f=initial frequency 
     k=any positive or negative integer 
     W=primary frequency band  -W, W! 
     j=ratio by which the sampling frequency was increased 
     2jW=up-sampled sampling frequency 
     In FIG. 3, the undesirable harmonic is eliminated with the increased sampling frequency. If the sampling frequency is doubled, j=2, then the third harmonic, which aliased at 1 kHz without up-sampling, does not alias in the primary frequency band and is removed by the low-pass filter. Additional increases in the sampling ratio further reduce the number of lower order harmonics which alias and create harmonic distortion. In an embodiment of the present invention, the ratio in the up-sampling means is a multiple equal to two or more. 
     In one embodiment of the invention, the non-linear operating means 404 is a soft limiter. The soft limiting operation is represented by equations 3, 4, and 5. 
     (3) y(t)=x(t), if|x(t)|&lt;T 
     (4) y(t)=T, if x(t)&gt;T 
     (5) y(t)=-T, if x(t)&lt;-T 
     x(t)=signal prior to soft limiting 
     y(t)=limited signal 
     T=magnitude of limited signal 
     Alternatively, the non-linear operating means can be the dynamic range of the system. A signal exceeding the dynamic range of the system is effectively limited. The output no longer responds to increases in the amplitude of the input signal. Thus, if the signal&#39;s amplitude exceeds the dynamic range of the system, the amplitude is limited to the extent of the dynamic range. An output signal which is limited includes harmonics in the higher frequencies, some of which fold over into the primary frequency band. 
     In FIG. 5, a D/A converter 514 and an FM modulator 516 are depicted. In this embodiment of the invention, an output of the converting means 512 is received by a digital-to-analog converter 514 which converts the processed digital signal to an analog signal. The analog signal is received by an FM modulator 516 for transmission as an FM signal. Large amplitudes in the signal cause excessive frequency deviation during FM modulation. By including a non-linear operating means 508 to process the digital signal, the present invention can digitally limit the amplitude of the signal and the associated frequency deviation and thereby insure high quality transmissions. 
     The exemplary digital processor for reduced distortion and frequency deviation initially receives a digital input signal. In many applications, the provided signal may initially be in an analog form. This analog signal could be a voice signal or any other audio signal. 
     In FIG. 6, the digital input signal source is depicted to include an analog input signal. In this embodiment of the invention, the analog input signal 600 is received by a first low-pass filter 602. The first low-pass filter eliminates the higher frequencies in the analog signal which can introduce harmful aliasing during the analog-to-digital conversion. The output of the first low-pass filter is received by the A/D converter 604. The A/D converter samples the signal at an initial sampling frequency. To further avoid aliasing during the A/D conversion, the initial sampling frequency is at least twice the highest frequency of the signal. This is known as the Nyquist rate and represents a lower bound on the initial sampling frequency of the signal. 
     The exemplary digital processor digitally solves the problem of reducing distortion and frequency deviation. As such, it has many potential applications where size, cost, and power are driving design issues. One envisioned use is in the field of portable communications. Previously, limiting voice signals to reduce frequency deviation was done in the analog domain due to the distortion introduced with digital limiting. As such, analog mobile phone system designs were penalized by requiring analog processing of the signal. With the present invention, all signal processing of the analog voice signal can be accomplished digitally without reduction in the quality of the final transmitted signal. Thus, all processing can be incorporated onto a single chip design with resulting benefits in terms of size, cost, and power in addition to repeatability of the processing. Benefits of the present invention are not just limited to communications. Indeed, any application where harmonic distortion needs to be reduced can benefit from the present invention. 
     It will be understood that the embodiment of the present invention specifically shown and described is merely exemplary and that a person skilled in the art can make alternate embodiments using different configurations and functionally equivalent components. All such alternate embodiments are intended to be included in the scope of this invention as set forth in the following claims.