Abstract:
In an internet protocol switch including a controller and a switch section controlled by the controller, the switch section includes an input cell buffer for receiving cells input to the switch section. The output of the input cell buffer is closed during a transition time from a selected flow connection linked to the input cell buffer and the controller, to a cut through connection linked to the input cell buffer without linking to the controller. Then, after the cut through connection is established, the output of the input cell buffer is opened.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an internet protocol (IP) switch using an asynchronous transfer mode (ATM) switch in a switch section. 
     2. Description of the Related Art 
     A prior art IP switch is constructed by a controller and a switch section. 
     The operation of the prior art IP switch is as follows. 
     Initially, a connection from a first node via the IP switch to a second node is established by an initial path controlled under the controller. Then, after a predetermined time has passed, the initial path is replaced by a selected flow connection. In the selected flow connection, a logical IP connection from the first node via the switch section to the controller and a logical IP connection from the controller via the switch section to the second node are established. 
     Further, after another predetermined time has passed, the selected flow connection is replaced by a cut through connection, thus releasing the load of the controller. Note that the cut through connection is connected directly between the two nodes and without passing through the controller. This will be explained later in detail. 
     In the above-described prior art IP switch when the selected flow connection is replaced by the cut through connection, the connection between the two nodes may be disconnected for some time. As a result, if there are cells input to the IP switch during that time, such cells are discarded. 
     SUMMARY OF THE INVENTION 
     It is an object of the present invention to provide an IP switch capable of avoiding the scrapping of cells during a transition time from a selected flow connection to a cut through connection. 
     According to the present invention, in an IP switch including a controller and a switch section controlled by the controller, the switch section includes an input cell buffer for receiving cells input to the switch section. The output of the input cell buffer is closed during a transition time from a selected flow connection linked to the input cell buffer and the controller, to a cut through connection linked to the input cell buffer without linking to the controller. Then, after the cut through connection is established, the output of the input cell buffer is opened. 
     Since cells that reached the IP switch during the above-mentioned transition time are stored in the input cell buffer, such cells are never discarded. Therefore, it is unnecessary to retransmit cells between the nodes using an upper layer. As a result, the traffic efficiency can be enhanced. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will be more clearly understood from the description as set below, as compared with the prior art, with reference to the accompanying drawings, wherein: 
     FIG. 1 is a block circuit diagram illustrating a prior art IP switch and its neighbor nodes; 
     FIGS. 2A and 2B are diagrams for explaining the operation of the IP switch of FIG. 1; 
     FIG. 3 is a block circuit diagram illustrating an embodiment of the IP switch according to the present invention; and 
     FIGS. 4A through 4F are diagrams for explaining the operation of the IP switch of FIG.  3 . 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Before the description of the preferred embodiment, a prior art IP switch will be explained with reference to FIGS. 1,  2 A and  2 B. 
     In FIG. 1, which illustrates a prior art IP switch and its neighbor nodes, an IP switch  1  is connected to nodes  2 ,  3 ,  4  and  5 . Note that each of the nodes  2 ,  3 ,  4  and  5  may be a unit for terminating a flow in accordance with “RFC 1953, Ipsilon Flow Management Protocol” and “RFC 1954, The Transmission of Flow Labelled IP v4  on ATM Data Links”. Also, each of the nodes  2 ,  3 ,  4  and  5  may be another IP switch or an IP switch gateway. 
     Also, the IP switch  1  is constructed by a controller  11  and a switch section  12 . 
     Further, lines  21 ,  31 ,  41  and  51  are provided for transmission from the nodes  2 ,  3 ,  4  and  5 , respectively, to the IP switch  1 , and lines  22 ,  32 ,  42  and  52  are provided for transmission from the IP switch  1  to the nodes  2 ,  3 ,  4  and  5 , respectively. 
     Communication between the IP switch  1  and the nodes  2 ,  3 ,  4  and  5  is carried out in accordance with “RFC 1953, Ipsilon Flow Management Protocol” and “RFC 1954, The Transmission of Flow Labelled IP v4  on ATM Data Links”. 
     The operation of the IP switch  1  of FIG. 1 is explained next with reference to FIGS. 2A and 2B. In FIGS. 2A and 2B, only traffic from the node  2  to the node  3  is considered. 
     Initially, a connection from the node  2  to the node  3  is established by an initial path (not shown) controlled under the controller  11 . Then, after a predetermined time has passed, the initial path from the node  2  to the node  3  is replaced by a selected flow connection as shown in FIG.  2 A. 
     In FIG. 2A, a logic connection  211  from the node  2  via the switch section  12  to the controller  11  and a logic connection  321  from the controller  11  via the switch section  12  to the node  3  are established. 
     Further, after another predetermined time has passed, the selected flow connection as shown in FIG. 2A is replaced by a cut through connection as shown in FIG. 2B, thus releasing the load of the controller  11 . 
     In FIG. 2B, a cut through connection  212  is connected directly between the nodes  2  and  3  without passing through the controller  11 . 
     In the IP switch  1  of FIG. 1, however, when the selected flow connection ( 211 ,  321 ) is replaced by the cut through connection  212 , the connection between the nodes  2  and  3  may be disconnected for some time. As a result, if there are cells input to the IP switch  1  during that time, such cells are discarded. 
     In FIG. 3, which illustrates an embodiment of the IP switch according to the present invention, the switch section  12  of FIG. 1 is modified into a switch circuit  12 ′ that includes a switch control circuit  120 , a switch core  121  and input cell buffers  122  to  125 . 
     Note that the controller  11  is constructed by a computer which includes a central processing unit (CPU), a read-only memory (ROM), random access memory (RAM) and the like. The switch core  121  is constructed by an ATM switch. Each of the input cell buffers  122  to  125  is constructed by a first-in first-out (FIFO) memory. 
     The operation of the IP switch  1  of FIG. 3 is explained next with reference to FIGS. 4A through 4F. In FIGS. 4 through 4F, only traffic from the node  2  to the node  3  is considered. 
     Initially, a connection from the node  2  to the node  3  is established by an initial path (not shown) controlled under the controller  11 . Then, after a predetermined time has passed, the initial path from the node  2  to the node  3  is replaced by a selected flow connection as shown in FIG.  4 A. 
     In FIG. 4A, a logic connection  211  from the node  2  via the switch section  12 ′ to the controller  11  and a logic connection  321  from the controller  11  via the switch section  12 ′ to the node  3  are established. 
     Further, after another predetermined time has passed, the selected flow connection as shown in FIG. 4A is disconnected as shown in FIG.  4 B. That is, the controller  11  closes the output of the input cell buffer  122  by way of the switch control section  120  (see FIG.  3 ). As a result, all the cells having the node  2  as an origination and the node  3  as a destination are stored in the input cell buffer  122 . Note that the closing of the output of the input cell buffer  122  is carried out simultaneously with the selection of the logic connection  211  which is also carried out by the controller  11  by way of the switch control section  120  (see FIG. 3) in accordance with an instruction based on “RFC 1987, Ipsilon General Switch Management Protocol”. Hereinafter, note that the IP switch  1  of FIG. 3 will be operated in this protocol. 
     Next, as shown in FIG. 4C, the logic connection  211  within the switch core  121  is deleted by the controller  11  by way of the switch control section  120  (see FIG.  3 ). 
     Next, as shown in FIG. 4D, the logic connection  321  within the switch core  121  is deleted by the controller  11  by way of the switch control section  120  (see FIG.  3 ). 
     Note that the operation as shown in FIG. 4D can be carried out in advance of the operation as shown in FIG.  4 C. 
     Next, as shown in FIG. 4E, a logic connection  212  is established by the controller  11  by way of the switch control section  120  (see FIG.  3 ). 
     Finally, as shown in FIG. 4F, the controller  11  opens the output of the input cell buffer  122  by way of the switch control section  120  (see FIG.  3 ). As a result, a cut through connection  212  from the node  2  to the node  3  is established. In this case, the cells stored in the input cell buffer  122  are supplied by the cut through connection  212  to the node  3 , and thus, these cells are never discarded. 
     According to the present invention, the loss of cells during a transition time from a selected flow connection to a cut through connection can be avoided.