Abstract:
The invention relates to a still picture recording apparatus for selecting and recording a desired screen of analog video signal as a still picture. The apparatus of the invention includes a still picture memory for storing digital signals for at least one screen, a delay memory for delaying a screen stored in the still picture memory by a time of a portion of one or plural screens, a change detecting circuit for detecting change in the screen by comparing the stored contents of the still picture memory and the delay memory and for detecting a large change in the screen, and a recording apparatus for recording the stored content of the still picture memory onto a recording medium, such as magnetic tape, when the screen is changed by a large amount, in response to the output of the screen change detecting circuit.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a still picture recording apparatus for recording a desired picture from video signals as a still picture. 
     2. Description of the Background Art 
     The recent advancement in digital technology is remarkable also in the video field, and it is now possible to record and process a video signal, which is an analog quantity, without lowering its quality by digitizing it. 
     One of such examples is the so-called digital still video tape recorder, which is a still picture recording apparatus for recording the video data of one screen of a television receiver as a still picture, in a magnetic tape which is a recording medium differing in transmission rate. 
     In the case that the recording frequency of the recording medium used in the still picture recording apparatus is lower than the carrier frequency of the video signal, the video signal is analog-to-digital converted (A/D converted), and the signal is once stored in means for storing, such as a memory, and then it is transmitted and recorded in this apparatus at a lower transmission rate. 
     Let us then suppose to record NTSC video signals (hereinafter referred to merely as video signals) in a magnetic tape by using a digital audio tape recorder (DAT apparatus). The time per screen of a video signal is 1/60 second, and assuming the number of quantitized bits for A/D converting the video signal to be 8, and the sampling frequency to be four times the video subcarrier frequency (fsc=3.58 MHz), that is, 4 fsc=14.32 MHz, the number of data bits per screen is calculated as follows. 
     
         1/60×8×14.32×10.sup.6 =1.911 megabits    (1) 
    
     On the other hand, the DAT apparatus deals with ordinary audio signals, and supposing the number of quantitized bits to be 16, the sampling frequency to be 48 kHz, and the number of channels to be 2, the number of bits that can be recorded in one second is obtained as follows. 
     
         16×48×10.sup.3 ×2=1.536 megabits/second  (2) 
    
     Therefore, the time required for recording one still picture on a magnetic tape by using the DAT apparatus is 
     
         1.911/1.536=1.244 seconds                                  (3) 
    
     Hence, to record one still picture by DAT, the video data cannot be taken in unless an interval of 1.244 seconds or more is provided. 
     FIG. 1 is a block diagram of a conventional still picture recording apparatus 21. The still picture recording apparatus 21 is intended to record the video information for one screen from video signal V onto a magnetic recording paper (hereinafter called tape) 26, and it comprises, among others, an A/D converter 22 for converting video signal V into a digital signal, a still picture memory 23 for storing digital data for the portion of one screen, and a recording signal processing circuit 24 for reading out the stored data at the transmission rate of DAT, processing it by parity addition, modulation or the like, and recording it onto the tape 26 through a recording head 25. 
     A gate pulse generator 27 individually generates, when an operation switch 28 is pressed, a first gate pulse signal d21 and a second gate pulse signal d22 to a video system clock signal generator 30 and a tape system clock signal generator 31 at the timing of the vertical synchronizing signal Sv obtained from the video signal V through a synchronous separating circuit 29. 
     The video system clock signal generator 30 generates a control clock signal cka used at the time of writing into the A/D converter 22 and still picture memory 23. The tape system clock signal generator 31 generates a control clock signal ckb at the time of writing into the still picture memory 23 and recording signal processing circuit 24. 
     FIG. 2 is a time chart showing the operation of the conventional still picture recording apparatus 21 shown in FIG. 1. In FIG. 2, the parts corresponding to those in FIG. 1 are identified with the same reference codes. 
     When the operation switch 28 is pressed, the potential of a trigger terminal g of the gate pulse generator 27 becomes zero at time T0 as shown in FIG. 2 (1), and at the immediately succeeding timing of vertical synchronizing signal Sv, a first gate pulse signal d21 with time width t21 corresponding to the portion of one screen from time T1 is delivered as shown in FIG. 2 (2). This time width t21 is 1/60 second, and for this period, the video system clock signal generator 27 operates, and the video data for one screen converted digitally is taken into the still picture memory 23. 
     At time T2 when the level of the first gate pulse signal d21 becomes zero, a second gate pulse signal d22 shown in FIG. 2 (3) is delivered for the period of 1.244 seconds as shown in formula (3), and the tape system clock signal generator 28 is actuated, and the data of one screen portion stored in the still picture memory 23 is read out and recorded in the tape 26. That is, at the time of pressing of an operation switch 28, a still picture is selected from the video signal V, and is recorded in the tape 26. 
     However, in the still picture recording apparatus of the prior art, since pressing of the operation switch 28 is needed for recording, a person (an operator) must always monitor the screen, and press the operation switch 28 every time the desired picture appears. To be liberated from such obligation, it has been proposed to record the still picture automatically by applying a pulse signal of a specific period instead of as a result of operation of switch 30. However, this results in the problem of failure to record a picture truly desired to be recorded while recording the still picture. 
     SUMMARY OF THE INVENTION 
     It is hence a primary object of the invention to solve the above technical problems, and to present a still picture recording apparatus capable of recording a desired picture from a video signal without requiring manual operation. 
     To achieve the above object, the invention presents a still picture recording apparatus which comprises: 
     an analog/digital converter circuit for converting a video signal into a digital signal, 
     a still picture memory responsive to the output from the analog/digital converter circuit for storing digital signals for at least one screen, 
     a delay memory for receiving and storing the same output from the analog/digital converter stored in the still picture memory, and for delaying the stored digital signals by the time of one or plural screens than the screen stored in the still picture memory, 
     a detecting circuit for detecting change in a screen by comparing the outputs of every corresponding bit of digital signals of a still picture stored in the still picture memory and delayed stored digital signals of the delay memory, and for detecting a large change of the screen, and 
     a recorder, having a recording medium, which in response to the screen change detecting circuit, records the stored content in the still picture memory onto the recording medium. 
     In a preferred embodiment, the screen change detecting circuit comprises: 
     a subtraction circuit for determining the difference by subtracting the corresponding bits of the digital signals of the still picture stored in the still picture memory and the delayed stored digital signals, of the delay memory, 
     an absolute value circuit for determining the absolute value of the difference obtained by the subtraction circuit, and 
     an accumulator for accumulating the outputs from the absolute value circuit for determining the absolute value at every bit, for discriminating the level of the cumulative value of one screen at a predetermined value, and for leading out stored digital signals expressing a large change in the screen when the cumulative value of one screen is over the predetermined value. 
     In another preferred embodiment, the digital signal of one screen is the digital signal of a pair of fields. 
     In a different preferred embodiment, the digital signal of one screen is the digital signal of a single field. 
     In a further different preferred embodiment, the storing operation of the still picture memory and the storing operation of the delay memory are achieved by using a vertical synchronizing signal contained in the video signal. 
     In a still different preferred embodiment, the recorder records onto a recording medium which comprises a magnetic tape, and is designed to record the stored content of the still picture memory onto the magnetic tape by a digital audio tape system. 
     The invention also presents a still picture recording apparatus capable of selecting a desired screen out of video signals being fed continuously, storing the video data of the screen as still picture data, and leading out the video data as video signals onto a recording medium to be recorded, which comprises: 
     an analog/digital converter for converting the video signal into digital data, 
     a memory for storing the digital data as still picture data, 
     a detector for detecting change in still picture data of a screen and which detects a large change over plural screens of the continuously fed video signals, 
     a controller responsive to the output from the screen change detector for controlling the timing for controlling writing/reading into the memory at a predetermined timing, and 
     a processor for processing the still picture data read out from the memory, and for treating and leading out the stored video data as video signals. 
     The still picture recording apparatus of the invention is capable of detecting a large change in the video data of a screen using the screen change detector before and after continuously fed video signals are delivered. 
     By this detection output, the action of the analog/ digital converter for converting the video data of the portion of one screen of the video signals into digital data, and the timing of writing/reading of the memory for storing the digital data are controlled. 
     Accordingly, the desired picture is selected from the moving video signals, and the still picture data of the screen is obtained, and is led out onto the recording medium or the like. 
     Thus, the still picture recording apparatus of the invention detects a large change in the image, and stores the video data for the portion of one screen of the video signals as still picture data in accordance with this detection. The apparatus thereafter reads out and records, at a predetermined timing corresponding to the transmission rate of the recording medium, the video data of the one screen. As a result, manual operation is not needed, and only important and desired screens can be automatically #recorded. 
     Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     These and other objects of the invention, as well as the features and advantages thereof, will be better understood and appreciated from the following detailed description taken in conjunction with the accompanying drawings, which are given by way of illustration only, and thus are not limitative of the present invention and wherein: 
     FIG. 1 is a block diagram showing an electrical construction of a conventional still picture recording apparatus, 
     FIG. 2 (1) to (3) are timing charts for explaining the operation of the conventional still picture recording apparatus, 
     FIG. 3 is a block diagram showing an electrical construction of a still picture recording apparatus according to one of the embodiments of the invention, and 
     FIG. 4 (1) to (3) are timing charts showing the operation of the same embodiment. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring now to the drawings, one of the preferred embodiments of the invention is described in detail below. 
     Generally, the screen desired to be recorded as a still picture is mostly a picture different from the previous scene, such as a so-called cut scene. Taking notice of this point, the invention is intended to create first video data without time delay, as corresponding to the video data after digital conversion, and second video data with a time delay corresponding to, for example, one screen. The apparatus detects a large change in the screen by comparing these two, selects the screen at this changing timing for recording, and records the still picture efficiently. 
     FIG. 3 is a block diagram showing construction of a still picture recording apparatus 1 of one of the embodiments of the invention. The video signal V, which is a continuously fed picture signal, is fed into an analog/digital (A/D) converter 3 for converting video signal V into digital data, and is also fed to a synchronizing signal separating circuit 4a, from an input terminal 2 by way of line l1. The synchronizing signal separating circuit 4a separates a vertical synchronizing signal corresponding to the time corresponding to the portion of one screen from the video signal V, and feeds it into a gate pulse generator 11 which is described later. 
     The A/D converter 3 converts the video signal V into digital data, and creates first video data D1, and feeds it into a still picture memory 4 which stores the video data, and a screen change detecting circuit 5, through a line l2. The still picture memory 4 is realized by a high speed access memory, for example, a dynamic RAM, which processes a memory capacity corresponding to 1.911 megabits expressed in equation (1). 
     The screen change detecting circuit 5 has a delay memory 6, a comparator 7, an accumulator 8 and a timer circuit 9, and the first digital signal D1 led out into the line l2 is fed into the delay memory 6 and a first input of the comparator 7. The delay memory 6 holds the first video data for the time corresponding to one picture, and delivers second video data D2 delayed for the portion of one screen from the first video data D1. The delay memory 6 realized by, similar to the still picture memory 4, a high speed access memory such as a dynamic RAM. 
     The second video data D2 delayed for the portion of one screen by the delay memory 6 is fed into the other input of the comparator 7 through line l3. The comparator 7 is composed of a subtraction circuit and a circuit for determining the absolute value of the output from the subtraction circuit, both of which are not shown, and compares the magnitude of the values of the first video data D1 and the second digital signal D2 delayed by one screen, at every bit, and when the difference is larger, a larger value (that is, the absolute value of the difference) is fed into the accumulator 8 as the comparison data signal D3, or 0 is fed likewise when both signals are equal. 
     The accumulator 8 sums up sequentially the comparison data signal D3 by portions of every screen, and when the sum exceeds a predetermined value, it delivers a trigger pulse signal P0 of level 0 to line l4. At the same time, the timer 9 is actuated to hold the time width t1 of the trigger pulse signal P0 for the maximum time of 1.277 seconds. This time of 1.277 seconds is, as described later, the sum of the time of 1.244 seconds expressed in equation (2) and the time of 0.033 (=1/30) second corresponding to the portion of two fields. By the trigger pulse signal P0, which is the output of the screen change detecting circuit 5, the timing control apparatus 10 for controlling the timing of writing/reading into the still picture memory 4 is actuated. 
     The timing control apparatus 10 is composed of gate pulse generator 11, video system clock signal generator 12, and tape system clock signal generator 13. The video system clock signal generator 12 activates the A/D converter 3 and still picture memory 4, which then takes in the video signal for the portion of one screen from the video signal V, converts it digitally and delivers it to the still picture memory 4 in synchronism with a first control clock signal ck1 for storing the video signal as still picture data. 
     The tape system clock signal generator 13 directs read out of the still picture data for the portion of one screen stored in the still picture memory 4. The recording signal processing circuit then processes and treats the still picture data. The tape system clock generator 13 delivers a second control clock signal ck2 for activating the signal processing means 14 to direct leading out of the video signals. Referring to FIG. 4, the operation of this embodiment is described hereinafter. 
     FIG. 4 (1)-(3) are timing charts for explaining the operation of this embodiment, and the same reference codes are attached to the parts corresponding to those in FIG. 3. Referring simultaneously to FIG. 3, when a large change in sequential screens of a specific video signal V is detected by the screen change detecting means 5, the trigger pulse signal P0 with time width t1 shown in FIG. 4 (1) is delivered from the accumulator 8, and is applied to the gate pulse generator 11. On the other hand, since a vertical synchronizing signal Sv is applied to the gate pulse generator 11, the gate pulse generator 11 calculates the AND of the trigger pulse signal P0 and the vertical synchronizing signal Sv, and delivers a first gate pulse signal P1 with time width t3 as shown in FIG. 4 (2), corresponding to the first one screen portion after the trigger pulse signal P0 becomes 0. The time width t3 of the first gate pulse signal P1 is 1/60 second. 
     The time t2 between the fall of the trigger pulse signal P0 in FIG. 4 (1) and the rise of the first gate pulse signal P1 in FIG. 4 (1) is the time corresponding to the portion of one field of the screen at maximum, produced at the timing of the vertical synchronizing signal Sv, being expressed as follows. 
     
         t2+t3≦0.033 (=1/30) second                          (4) 
    
     It is because of this reason that the time width t1 of the trigger pulse signal P0 is set at the maximum of 1.277 seconds by adding 0.033 second to 1.244 seconds. 
     During the time t3 of output of the first gate pulse signal P1, the video system clock signal generator 12 is actuated, and the image data corresponding to 1/60 second, that is, one screen is written into the still picture memory 4, and is stored as still picture data. 
     After time t3, when the first gate pulse signal P1 becomes zero, a second gate pulse signal P2 corresponding to the tape system clock signal generator 13, of time width t4 shown in FIG. 4 (3) which is 1.244 seconds, is delivered and the tape system clock signal generator 13 is actuated for this period, and by the second control clock signal ck2 delivered correspondingly, the still picture data stored in the still picture memory 4 is read out, for example, at the transmission rate of DAT, and is fed into recording signal processing means 14. The picture data is then subjected to signal processing necessary for recording, such as parity addition and modulation, and is recorded on the magnetic recording tape 16 through the recording head 15 for the time width of 1.244 seconds. 
     Thus, in this embodiment, a specific change of a picture over a specified value is detected, and the specific picture is automatically recorded at that timing, and therefore manual operation is not needed. Accordingly, and only the important and desired picture can be recorded. 
     In this embodiment, the still picture is recorded on the magnetic tape 16, but the recording medium is not limited to the magnetic tape alone, but, for example, a compact disc, floppy disc or other disc recording medium may be equally used. Furthermore, the still picture after signal processing by the recording signal processing circuit 14 in FIG. 3, may be led out and transmitted through, for example, a public telephone line. 
     In the foregoing embodiment, the delay memory 6 and still picture memory 4 are shown to have identical capacities, but the delay memory 6 does not require a capacity as that of much as the still picture memory 4 because it is used for detecting the change in the screen, and therefore the delay memory 6 may be designed to store every predetermined number of pixels or picture elements by thinning out the bits or pixels for composing one screen. At this time, the difference of the information of pixels stored in the delay memory 6 and the information of pixels in the still picture memory 4 corresponding to each pixel may be obtained by comparing. As a result, the cost of component parts may be reduced. 
     In this embodiment, meanwhile, digital data comprising two fields as one screen is stored in the still picture memory 4, but as another embodiment of the invention, it may be desired to store digital data for the portion of one frame in the still picture memory 4. Moreover, the delay memory 6 may be designed to delay the time for the portion of one screen or plural screens than the screen stored in the still picture memory 4, for example, by the time for the portion of one field or two fields. 
     The invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description and all changes which come within the meaning and the range of equivalency of the claims are therefore intended to be embraced therein.