Abstract:
A three-pin integrated synchronous rectifier is the synchronous rectifier chip where the quantity of connection pins is the smallest possible quantity. The three-pin integrated synchronous rectifier uses a control pin to receive a control signal used as a power bias voltage and a synchronous pulse to make the synchronous rectifier chip operate normally. The control signal is obtained from the output pin of an auxiliary winding via a diode. The other pins are respectively the drain pin and the source pin of an internal power transistor and are connected with the output winding and the voltage output terminal for transmitting the power of the transformer to supply current for the loading.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a three-pin integrated synchronous rectifier and a flyback synchronous rectifying circuit that utilize a control pin to provide a control signal, whereby the control signal is used as a power bias voltage and a synchronizing signal, and a power transistor is built in a single package so that the connection pins are reduced. The structure is simplified so that the required area on the print circuit board is reduced and the cost of the power supply is decreased. 
         [0003]    2. Description of the Related Art 
         [0004]    The switching power supply traditionally is implemented by a diode rectifier. In order to meet the requirements, such as environmental protection, cooling and power efficiency, the diode rectifier gradually is replaced by the synchronous rectifier. However, the synchronous rectifying circuit of the prior art has a structure in which the control circuit and the power transistor are separated. In practical application, the less is the number of connection pins, the lower are the costs of the circuit. Therefore, the cost of the synchronous rectifier with three pins will be the lowest. One pin is controlled by power bias voltage and a synchronous pulse. The other two pins are the drain terminal and the source terminal of the power transistor. Due to the package limitation, the synchronous rectifying circuit of the prior art is implemented by an expensive synchronous rectifying control method that includes an eight pin synchronous rectifying controller, some discrete elements and an external power transistor. 
         [0005]      FIG. 1  shows a synchronous rectifying circuit of the prior art. The synchronous rectifying circuit includes a DC power VIN, an input filtering capacitor C 1 , a turn-on resistor R 1 , a bias voltage power filtering capacitor C 2 , a primary pulse width modulation (PWM) controller  11 , a transformer T 1  having a primary main winding  12 , an primary auxiliary winding  13  and a secondary output winding  20 , a rectifying diode D 1  providing a DC bias voltage power VCC, a primary side power transistor Q 1  for controlling the power transmission of the transformer, a primary current detection resistor R 2  for limiting the maximum output power, a secondary side power transistor Q 1  for rectifying the secondary side, a synchronous rectifying control circuit  23  for controlling the turn-on and turn-off of the secondary side power transistor Q 2 , a feedback error-compensation amplifier  24 , and a photo coupler  25 . When the power is turned on, the DC power VIN charges the bias voltage power filtering capacitor C 2  via the turn-on resistor R 1 . When the charged voltage reaches the turn-on voltage of the primary PWM controller  11 , the primary PWM controller  11  outputs a turn-on signal to control the primary side power transistor Q 1  to be operated so that the current flows into the primary main winding  12 . When transformer T 1  begins to operate, the bias voltage power is gradually provided by the rectifying diode D 1  and the bias voltage power filtering capacitor C 2 , via the primary auxiliary winding  13 . A primary side voltage feedback signal that is representative of the secondary side output voltage VO is transmitted to the primary side via the feedback error-compensation amplifier  24  and the photo coupler  25  and is inputted to the primary PWM controller  11 . The synchronous rectifying control circuit  23  is supplied with power by output voltage VO, via the bias voltage power VDD and has two detection pins D, S respectively connected with a drain and a source of the secondary side power transistor Q 2 , and an output pin G connected with the gate of the secondary side power transistor Q 2  to control the secondary side power transistor Q 2  to be exactly turn-on or turn-off. 
         [0006]    The synchronous rectifying circuit of the prior art needs to be packaged by at least four pin package. The low cost three pin industry standard packages, such as TO-220, DPAK, and TO-3P, are excluded. Furthermore, the power bias voltage VDD of the synchronous rectifying circuit of the prior art has to be a DC power. If the output voltage VO of the power supply is too high, the voltage needs to be reduced by a linear regulator. If the output voltage of the power supply is too low, a secondary auxiliary winding, rectifying and filtering elements and a linear regulator are required. Costs increase and the power efficiency decreases. 
       SUMMARY OF THE INVENTION 
       [0007]    One particular aspect of the present invention is to provide a three-pin integrated synchronous rectifier. In one embodiment, the three-pin integrated synchronous rectifier has a control pin for receiving a control signal to be a power bias voltage and synchronous pulse, and two pins respectively being the drain connection pin and the source connection pin of the internal power transistor that are connected between the output winding and the output terminal for transmitting the power of the transformer to provide the required current to the loading. 
         [0008]    The characteristic of the present invention is that the quantity of the connection pins of the package and the external components is the least. The dimension of the print circuit board is reduced, and the costs are reduced. 
         [0009]    The three-pin integrated synchronous rectifier has a first electric connection point, a second electric connection point and a third electric connection point. The three-pin integrated synchronous rectifier includes a power transistor, and a synchronous rectifying control circuit. The power transistor has a first output/input terminal, a second output/input terminal and a control terminal. The first output/input terminal is coupled with the first electric connection point. The second output/input terminal is coupled with the second electric connection point. The synchronous rectifying control circuit is used for controlling the electric status of the power transistor, and includes an input control terminal, two detection terminals, and an output terminal. The input control terminal is coupled with the third electric connection point. The two detection terminals respectively are coupled with the first output/input terminal and the second output/input terminal of the power transistor. The output terminal is coupled with the control terminal of the power transistor. When the synchronous rectifying control circuit receives a synchronous signal at the input control terminal, the synchronous rectifying control circuit turns the power transistor on. When the synchronous rectifying control circuit detects that a current flowing through the power transistor is smaller than a pre-determined current by the two detection terminals, the synchronous rectifying control circuit turns the power transistor off. 
         [0010]    The present invention also provides a flyback synchronous rectifying circuit. The flyback synchronous rectifying circuit includes a flyback converter, an output capacitor, a three-pin integrated synchronous rectifier, an output detection unit, an electric isolation unit, and a primary PWM controller. The flyback converter includes a first power transistor and a transformer having a primary side and a secondary side. The first power transistor is coupled with the primary side. The output capacitor is coupled with the secondary side of the transformer. The three-pin integrated synchronous rectifier has a first electric connection point, a second electric connection point and a third electric connection point. The first electric connection point and the second electric connection point respectively are coupled with the secondary side of the transformer and the output capacitor. The third electric connection point is used for receiving a synchronous signal. The output detection unit is coupled with the secondary side of the transformer for detecting the electric status of the secondary side to generate an output detection signal. The electric isolation unit is coupled with the output detection unit for outputting the output detection signal with electric isolation. The primary PWM controller is coupled with the flyback converter and the electric isolation unit for turning on or turning off the first power transistor according to the output detection signal. When the three-pin integrated synchronous rectifier receives the synchronous signal, the three-pin integrated synchronous rectifier is changed to the turn-on status for conducting an output current. When the output current is smaller than a pre-determined value, the three-pin integrated synchronous rectifier is changed to the turn-off status. 
         [0011]    For further understanding of the invention, reference is made to the following detailed description illustrating the embodiments and examples of the invention. The description is only for illustrating the invention and is not intended to limit of the scope of the claim. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0012]    The drawings included herein provide a further understanding of the invention. A brief introduction of the drawings is as follows: 
           [0013]      FIG. 1  is a circuit diagram of the synchronous rectifying circuit of the prior art; 
           [0014]      FIG. 2  is a circuit diagram of the three-pin integrated synchronous rectifier of the present invention applied to the flyback synchronous rectifying circuit; 
           [0015]      FIG. 3  is a circuit diagram of the three-pin integrated synchronous rectifier of the second embodiment of the present invention applied to the flyback synchronous rectifying circuit; 
           [0016]      FIG. 4  is a block diagram of the synchronous rectifying control circuit of the present invention; 
           [0017]      FIG. 5  is a circuit diagram of the three-pin integrated synchronous rectifier of the present invention; 
           [0018]      FIG. 6  is a waveform diagram of the operation of the three-pin integrated synchronous rectifier of the present invention; and 
           [0019]      FIG. 7  is another waveform diagram of the operation of the three-pin integrated synchronous rectifier of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0020]    Reference is made to  FIG. 2 , which shows a circuit diagram of the three-pin integrated synchronous rectifier of the present invention applied to the flyback synchronous rectifying circuit. The circuit includes a DC power VIN, an input filtering capacitor C 1 , a turn-on resistor R 1 , a bias voltage power filtering capacitor C 2 , an output filtering capacitor C 3 , a primary PWM controller  11 , a transformer T 1  having a primary main winding  12 , an primary auxiliary winding  13 , a secondary output winding  20  and a secondary auxiliary winding  21 , a rectifying diode D 1  for providing a DC bias voltage power VCC, a primary side power transistor Q 1  for controlling the power transmission of the transformer T 1 , a three-pin integrated synchronous rectifier  22 , an output detection unit  24  (a feedback error-compensation amplifier in this embodiment), and an electrical isolation unit  25  (a photo coupler in this embodiment). When the power is turned on, the DC power VIN charges the bias voltage power filtering capacitor C 2  via the turn-on resistor R 1 . When the charged voltage reaches the turn-on voltage of the primary PWM controller  11 , the primary PWM controller  11  outputs a turn-on signal to control the primary side power transistor Q 1  to be operated so that the current flows into the primary main winding  12 . Therefore, the transformer T 1  operates and the bias voltage power VCC is gradually provided by the rectifying diode D 1  and the bias voltage power filtering capacitor C 2  via the primary auxiliary winding  13 . The primary side voltage feedback signal that is representative of the secondary side output voltage VO is transmitted to the primary side via the feedback error-compensation amplifier  24  and the photo coupler  25  and is inputted to the primary PWM controller  11 . The three-pin integrated synchronous rectifier  22  includes a power transistor Q 2  and a synchronous rectifying control circuit  23 . The synchronous rectifying control circuit  23  includes an input control terminal C, a detection terminal D, a detection terminal S and an output terminal G. The input control terminal C is connected with the secondary auxiliary winding  21  via the rectifying diode D 2  and obtains the positive voltage pulse to provide the power bias voltage and the synchronous signal. The D detection terminal and the S detection terminal are respectively connected with the drain and the source of the power transistor Q 2 , and the output terminal G is connected with the gate of the power transistor Q 2 . The first pin of the three-pin integrated synchronous rectifier  22  is coupled with the source of the power transistor Q 2 , the second pin of the three-pin integrated synchronous rectifier  22  is coupled with the drain of the power transistor Q 2 , and the third pin of the three-pin integrated synchronous rectifier  22  is coupled with the input control pin C of the synchronous rectifying control circuit  23 . 
         [0021]      FIG. 3  shows a circuit diagram of the three-pin integrated synchronous rectifier of the second embodiment of the present invention applied to the flyback synchronous rectifying circuit. The secondary auxiliary winding  21  and the three-pin integrated synchronous rectifier  22  are located at the output terminal of the secondary output winding  20 . The three-pin integrated synchronous rectifier  22  still can operate normally. The reference voltage of the synchronous rectifying control circuit  23  is the source of the power transistor Q 2  that is different from the reference voltage in  FIG. 2  that uses the grounding as the reference voltage. However, both the synchronous rectifying operations are the same as each other. 
         [0022]      FIG. 4  shows a block diagram of the synchronous rectifying control circuit of the present invention. The synchronous rectifying control circuit includes a driver  231 , a delay circuit  232 , a detection circuit  233 , and a power transistor Q 2 . When the driver  231  receives a synchronous signal via the input control pin C, the power transistor Q 2  is turned on, and uses the delay circuit  232  to prevent a ringing signal from generating at the input control pin C due to the polarity transition of the secondary auxiliary winding  21  and the harmonics after the power stored in the transformer T 1  is fully released. The detection circuit  233  detects the current flowing through the power transistor Q 2 . When the current flowing through the power transistor Q 2  approaches zero, the detection circuit  233  outputs a signal to the delay circuit  232 , and the delay circuit  232  causes the output of the driver  231  to change to a low level to turn off the power transistor Q 2  to prevent the power stored in the output filtering capacitor C 3  from flowing back to the transformer T 1 . When the primary side power transistor Q 1  is changed to the turn-on status and the polarity of the secondary auxiliary winding  21  is changed to the negative polarity, the input control pin C stops supplying power bias voltage and the three-pin integrated synchronous rectifier  22  gradually recovers to the initial status. When the polarity of the secondary auxiliary winding  21  is changed to the positive polarity again, the input control pin C obtains the positive polarity voltage and supplies power to the driver  231  to make the power transistor Q 2  is changed to the turn-on status again. The above procedures are repeated to achieve the synchronous rectifying operation. 
         [0023]      FIG. 5  shows a circuit diagram of the three-pin integrated synchronous rectifier of the present invention. The driver  231  includes four transistors Q 7 , Q 8 , Q 9 , Q 10 , a diode D 5 , and resistors R 7 , R 8 . The delaying circuit  232  could be a debouncing circuit, and includes two transistors Q 5 , Q 6 , two diodes D 3 , D 4 , resistors R 4 , R 5 , R 6 , R 9  and capacitors C 4 , C 5 . The detection circuit  233  includes two transistors Q 3 , Q 4  and resistor R 3 . The bases of the transistors Q 3 , Q 4  are connected with each other. The collector of the transistor Q 3  and the emitter of the transistor Q 4  respectively are coupled with the D detection pin and the S detection pin. The base and the emitter of the transistor Q 3  are connected together and are coupled with the input control pin C via the resistor R 3 . The collector of the transistor Q 4  is coupled to the delay circuit  232 . Because the inverse voltage between the base and the collector of the bipolar junction transistor is quite larger than the inverse voltage between the base and the emitter thereof, the inverse voltage of the transistor Q 3  is increased due to the base and the emitter of the transistor Q 3  are connected together. 
         [0024]      FIG. 6  and  FIG. 2  (or  FIG. 3 ) are used for illustrated the operation of the three-pin integrated synchronous rectifier  22 . Waveform A is the voltage waveform of two terminals of the secondary auxiliary winding  21  under heavy loading. Waveform B is the waveform of the control pin C of the three-pin integrated synchronous rectifier  22 . Waveform C is the waveform of the gate of the transistor Q 2  of the three-pin integrated synchronous rectifier  22 . At time t 1 , the primary side power transistor Q 1  is changed to a turn-off status, and the power stored in the transformer T 1  is released to the secondary side, as the waveform A in  FIG. 6 . At this time, the voltage of the secondary auxiliary winding  21  is changed to a positive voltage and the ring occurs due to the status transition, as the waveform B in  FIG. 6 . Moreover, because the voltage at the input control pin C rises, the transistors Q 7 , Q 8  in the Darlington circuit in the driver  231  are transferred to be in the turn-on status, and the transistors Q 9 , Q 10  are transferred to be in the turn-off status so that the voltage of the gate of the transistor Q 2  is risen and in the turn-on status, as the waveform C in  FIG. 6 . Before the voltage of the gate of the transistor Q 2  is not raised enough to make the transistor Q 2  be in the turn-on status, the current of the secondary output winding  20  flows through the body diode D 6  of the power transistor Q 2 . When the power transistor Q 2  is in the turn-on status, the current flows through the transistor Q 2 . Therefore, the current of the secondary output winding  20  makes the voltage difference between the source S and the drain D of the power transistor Q 2  be equal to the forward bias voltage of the diode D 6  (before the power transistor Q 2  is in the turn-on status), or equal to I*RDSon (after the power transistor Q 2  is in the turn-on status), whereby I is the current of the secondary output winding  20 , and RDSon is the turn-on impedance of the power transistor Q 2 ). In the detection circuit  233 , the transistor Q 3  is transferred to be in the turn-on status when the voltage at the input control pin C rises. Due to the voltage difference of the source S and the drain D of the power transistor Q 2 , the voltage of the emitter of the transistor Q 4  is higher than the voltage of the collector of the transistor Q 3  so that the transistor Q 4  of the detection circuit  233  is in the turn-off status. When the transistor Q 4  is in the turn-off status, the transistors Q 5 , Q 6  of the delay circuit  232  are respectively in the turn-on status and the turn-off status. The secondary auxiliary winding  21  may produce a ringing symptom due to voltage transition so that the detection circuit  233  or the driver  231  may abnormally operate. By utilizing the capacitors C 4 , C 5  of the delay circuit  232  to absorb the power of the ringing, the driver  231  can normally operates. 
         [0025]    When the power stored in the transformer T 1  is released, the current flowing through the power transistor Q 2  also is decreased so that the voltage difference between the source S and the drain D of the power transistor Q 2  descends to a pre-determined value. At this moment, the transistor Q 4  is transferred to be in the turn-on status. The transistor Q 5  of the delay circuit  232  is transferred to be in the turn-off status, and the input control pin C charges the capacitors C 4 , C 5  via the resistor R 5  and the diode D 3 . The diode D 3  is used for speeding up the charging process for the capacitor C 5 . After a pre-determined period passes, the transistor Q 5  is still in the turn-off status to be charged enough to turn on the transistor Q 6 , the transistor Q 6  is turned on at time t 2  and so the transistors Q 9 , Q 10  of the driver  231  are also turned on. Therefore, the voltage of the gate of the power transistor Q 2  descends rapidly and the power transistor Q 2  is transferred to be in the turn-off status. When the transistors Q 7 , Q 8  of the driver  231  are transferred to the turn-off status, the electric charge stored in the parasitic capacitor is rapidly released via the diode D 5  so that the transistors Q 7 , Q 8  are rapidly transferred to the turn-off status. Next, the voltage of the two terminals of the secondary auxiliary winding  21  begins to descend. At time t 3 , the primary side power transistor Q 1  is transferred to be in the turn-on status, the transformer T 1  changes its status again, and the DC power source VIN delivers power to the transformer T 1 . The electric charge stored in the capacitor C 5  is gradually released via the resistor R 9 . The charge stored in the capacitor C 4  is released via the resistor R 6 , the diode D 3  and the resistor R 9 . The three-pin integrated synchronous rectifier  22  gradually recovers to its original status. 
         [0026]    Reference is made to waveforms D˜F shown in  FIG. 7 . The waveforms D˜F are respectively the waveform of the two terminals of the secondary auxiliary winding  21 , the waveform of the control pin C of the three-pin integrated synchronous rectifier  22  and the waveform of the gate of the power transistor Q 2  of the three-pin integrated synchronous rectifier  22  when the loading is light. At time t 4 , when the primary side power transistor Q 1  is transferred to be in the turn-off status, the power stored in the transformer T 1  is released to the secondary side, as the waveform D shown in  FIG. 7 . When the power stored in the transformer T 1  is almost released, the detection circuit  233  detects that the current flowing through the power transistor Q 2  descends below a pre-determined value and outputs a turn-off signal. When the turn-off signal is delayed a pre-determined period by the delay circuit  232  and is confirmed, the turn-off signal is transmitted to the driver  231  to pull down the voltage of the gate of the power transistor Q 2  so that the power transistor Q 2  is transferred to be in the turn-off status at time t 5 , as the waveform F shown in  FIG. 7 . Because the loading is light, the power stored in the transformer T 1  is less than the power needed for a heavy loading. Therefore, the period between t 4  and t 5  is shorter than the period between t 1  and t 2 . 
         [0027]    During the period between the power transistor Q 2  being turned off and the primary side power transistor Q 1  being turned on (period between time t 5  and time t 6 ), a harmonic symptom occurs at the secondary side of the transformer T 1 , as waveforms D, E shown in  FIG. 7 . In order to prevent the synchronous rectifying control circuit  23  from abnormally operating due to the harmonic symptom, the voltage for turning on the transistor Q 6  is maintained by the capacitors C 4 , C 5 . Therefore, the driver  231  keeps the voltage of the gate of the power transistor Q 2  in a low level. Furthermore, if the clamp transistor Q 5  is abnormally turned on due to the harmonic symptom, the capacitors C 4 , C 5  will abnormally discharge. Therefore, the diode D 4  is used for clamping the voltage of the base of the transistor Q 5  so that the clamped transistor Q 5  will not be turned on when the transistor Q 6  is turned on. At time t 6 , the primary side power transistor Q 1  is turned on and so the secondary auxiliary winding  21  is transferred to a negative polarity. The input control pin C stops supplying the bias power so that the three-pin integrated synchronous rectifier  22  gradually recovers to its original status. Because the loading is light, the turn-on period of the power transistor Q 1  (the period between time t 6  and the time t 4 ) is shorter than the period (the period between time t 3  and time t 1 ) for a heavy loading. 
         [0028]    The description above only illustrates specific embodiments and examples of the invention. The invention should therefore cover various modifications and variations made to the herein-described structure and operations of the invention, provided they fall within the scope of the invention as defined in the following appended claims.