Abstract:
A low acoustic noise solution for snubber circuits is utilized for relieving spike noise under a low-load mode of a snubber circuit, and for avoiding electromagnetic interference under a high-load mode of said snubber circuit. A power transform device utilizing the low acoustic solution includes a power source node, a switch node, a ground node, a transformer, a third switching unit, a first spike noise snubber circuit, a first switch unit, a second spike noise snubber circuit, and a second switch unit. When the power transform device is under the low-load mode, the first spike noise snubber circuit is used to absorb power discharged from the transformer so that spike noise is relived. When the power transform device is under the high-load mode, both the first and the second spike noise snubber circuits are used to absorb power so that electromagnetic interference is relieved.

Description:
BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention provides a power transform device and an electronic device, and more particularly, to a power transform device and an electronic device for reaching low acoustic noise. 
   2. Description of the Prior Art 
   There are various elements in an electronic device, and each of said elements requires a specific operating voltage. Therefore, in an electronic device, a power transform device is utilized for transforming voltage levels in a raising manner or in a reductive manner, and for stabilizing said transformed voltage levels. In the prior art, a conventional power transform device is manipulated by utilizing a pulse width modulation technique or a pulse frequency modulation technique for supplying transformed power. 
   Please refer to  FIG. 1 , which is a diagram of a conventional power transform device  100 . The power transform device  100  comprises a capacitor C 11 , resistors R 11  and R 21 , a first switch unit D 11 , a second switch unit Q 11 , a switch node A 1 , a power source node B 1 +, a ground node F 1 , and a transform element TF 1 . The first switch unit D 11  is a diode for being activated when a voltage level at an input terminal of the first switch element D 11  is higher than a voltage level at an output terminal of the first switch element D 11 . The second switch unit Q 11  is a metal-oxide semiconductor transistor for adjusting a resistance of a resistor between the drain and the source of the second switch unit Q 11  according to a voltage level at the gate of the second switch unit Q 11  for enabling or disabling an electrical connection between said drain and said source of the second switch unit Q 11 . The transform element TF 1  is a coupling element of double winding, for performing power transformation on received current and for outputting power at a specific voltage level. When the second switch unit Q 11  is short-circuited, a received current of the power source node B 1 + flows through the transform element TF 1 , the second switch unit Q 11 , the resistor R 21 , and the ground node F 1  in order. At the same time, since an input voltage level of the first switch unit D 11  is not higher than an output voltage level of the first switch unit D 11 , the first switch unit D 11  remains open-circuited. When the second switch unit Q 11  is open-circuited, a current flow from the drain to the source of the second switch unit  11  dissipates, and then the transform element TF 1  resists said dissipating current flow for releasing power. Therefore, a current flow leads to the first switch unit D 11  for activating the first switch D 11 , and then heads back to the power source node B 1 + through a parallel connection of both the capacitor C 11  and the resistor R 11 . Moreover, when the second switch unit Q 11  becomes open-circuited instead of short-circuited, a counter-electromotive force generated from the transform element TF 1  charges the capacitor C 11  with a spike voltage. After the capacitor C 11  absorbs power from the spike voltage, said power is discharged from the resistor R 11 , and additional power consumption is thus generated. 
   According to variant voltages received by the power source node B 1 +, the conventional power transform device  100  may be operated under two different modes including a high-load mode and a low-load mode. For meeting regulations of power, power consumption of the conventional transform device  100  under the low-load mode has to be less than 1 watt. Therefore, a capacitance of the capacitor C 11  has to be decreased whereas a resistance of the resistor R 11  has to be increased. Similarly, for reducing additional power consumption, an operating frequency of the conventional power transform device  100  has to be lowered for operating under a burst mode. However, when the operating frequency of the conventional power transform device  100  is lowered to an audio frequency domain, harsh noise is generated. The harsh noise may be relieved by reducing power absorbed with the series connection formed from both the capacitor C 11  and the resistor R 11 . However, when the conventional power transform device  100  operates under the high-load mode, since power absorbed by the series connection of the capacitor C 11  and the resistor R 11  is getting lower, the spike voltage cannot be absorbed completely, and related electromagnetic interference (EMI) is getting heavier also. On the contrary, when the spike voltage is effectively absorbed with higher power absorbed by the series connection of the capacitor C 11  and the resistor R 11 , related noise cannot be relieved. 
   SUMMARY OF THE INVENTION 
   Therefore, a power transform device and an electronic device for reaching low acoustic noise is provided in the present invention for relieving noise and electromagnetic interference of a conventional power transform device. 
   The claimed invention provides a power transform device with a snubber circuit for reaching low acoustic noise. The power transform device comprises a power source node, a switch node, a ground node, a transform element, a first spike noise snubber, a second spike noise snubber, a second switch unit, and a third switch unit. The transform element is electrically coupled between the power source node and the switch node. The first spike noise snubber has a first terminal, which is electrically coupled to the power source node, and a second terminal. The first switch unit is electrically coupled between the second terminal of the first spike noise snubber and the switch node. The second spike noise snubber has a first terminal, which is electrically coupled to the power source node, and a second terminal. The second switch unit is electrically coupled between the second terminal of the first spike noise snubber and the second terminal of the second spike noise snubber. The third switch unit is electrically coupled between the ground node and the switch node for selectively conducting or cutting off a current flowing between the ground node and the switch node. Spike noise is generated when the third switch unit is switched from conduction to cut off. The first switch unit is conducted when a voltage difference between the second terminal of the first spike noise snubber. The switch node is larger than a first predetermined voltage. The second switch unit is conducted when a voltage difference between the second terminal of the first spike noise snubber. The second terminal of the second spike noise snubber is larger than a second predetermined voltage, which is larger than the first predetermined voltage. Spike noise is generated when the third switch unit is cutting off instead of being conducted. The first switch unit is conducted for snubbing the generated spike noise with the first spike noise snubber when the generated spike noise is higher than the first predetermined voltage but lower than the second predetermined voltage. Both the first switch unit and the second switch unit are conducted for snubbing the generated spike noise with both the first spike noise snubber and the second spike noise snubber simultaneously when the generated spike noise is higher than the second predetermined voltage. 
   The claimed invention also provides an electronic device selectively operating under a normal mode or a stand-by mode for reaching low acoustic noise. The electronic device comprises a power source node, a switch node, a ground node, a transform element, a first spike noise snubber, a first switch unit, a second spike noise snubber, a second switch unit, and a third switch unit. The transform element is electrically coupled between the power source node and the switch node. The first spike noise snubber has a first terminal, which is electrically coupled to the power source node, and a second terminal. The first switch unit is electrically coupled between the second terminal of the first spike noise snubber and the switch node. The second spike noise snubber has a first terminal, which is electrically coupled to the power source node, and a second terminal. The second switch unit is electrically coupled between the second terminal of the first spike noise snubber and the second terminal of the second spike noise snubber. The third switch unit is electrically coupled between the ground node and the switch node for selectively conducting or cutting off a current flowing between the ground node and the switch node. Spike noise is generated when the third switch unit is switched from conduction to cut off. The first switch unit is conducted when a voltage difference across the first switch unit is larger than a first predetermined voltage. The second switch unit is conducted when a voltage difference across the second switch unit is larger than a second predetermined voltage, which is larger than the first predetermined voltage. The first switch is conducted for snubbing the generated spike noise with the first spike noise snubber when (a) the electronic device operates under the stand-by mode; (b) the third switch unit is switched from conduction to cut off; and (c) the spike noise is higher than the first predetermined voltage but lower than the second predetermined voltage. Both the first switch unit and the second switch unit are conducted for snubbing the spike noise with the first spike noise snubber and the second spike noise snubber when (d) the electronic device operates under the normal mode; (e) the third switch unit is switched from conduction to cut off; and (f) the spike noise is higher than the second predetermined voltage. 
   These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  is a diagram of a conventional power transform device. 
       FIG. 2  is a diagram of a power transform device according to a first embodiment of the present invention. 
       FIG. 3  illustrates a pulse plot at a switch node of the power transform device shown in  FIG. 2  under the high-load mode. 
       FIG. 4  illustrates a current flow under the high-load mode of the power transform device shown in  FIG. 2  during duration between the times T 0  and T 1  shown in  FIG. 3 . 
       FIG. 5  illustrates a current flow under the high-load mode of the power transform device shown in  FIG. 2  during duration from the times T 1  and T 2  shown in  FIG. 3 . 
       FIG. 6  illustrates a current flow under the high-load mode of the power transform device shown in  FIG. 2  during duration from the times T 2  and T 3  shown in  FIG. 3 . 
       FIG. 7  illustrates a current flow under the high-load mode of the power transform device shown in  FIG. 2  during duration from the times T 3  and T 4  shown in  FIG. 3 . 
       FIG. 8  is a diagram of a pulse plot of a switch node A 2  under the low-load mode of the power transform device shown in  FIG. 2 . 
       FIG. 9  is a diagram illustrating a current flow during the duration between the times T 0 ′ and T 1 ′ shown in  FIG. 8  under the low-load mode of the power transform device shown in  FIG. 2 . 
       FIG. 10  is a diagram of a current flow during the duration between the times T 1 ′ and T 2 ′ shown in  FIG. 8  under the low-load mode of the power transform device shown in  FIG. 2 . 
       FIG. 11  is a diagram of a current flow during the duration between the times T 2 ′ and T 3 ′ shown in  FIG. 8  under the low-load mode of the power transform device shown in  FIG. 2 . 
       FIG. 12  is a diagram of a current flow during the duration between the times T 3 ′ and T 4 ′ shown in  FIG. 8  under the low-load mode of the power transform device shown in  FIG. 2 . 
       FIG. 13  is a diagram of the power transform device according to a second embodiment of the present invention. 
   

   DETAILED DESCRIPTION 
   Please refer to  FIG. 2 , which is a diagram of a power transform device  200  of the present invention. The power transform device  200  includes a capacitor C 21 , which has a capacitance of about 680-1000 pF in a preferred embodiment of the present invention, a capacitor C 22 , which has a capacitance of 10 KpF in a preferred embodiment of the present invention, a resistor R 21 , which has a resistance of 68 Kohm in a preferred embodiment of the present invention, a resistor R 22 , which has a resistance of 68 Kohm in a preferred embodiment of the present invention, a resistor R 23 , a first switch unit D 21 , a second switch unit TVS 2 , which may be a diode in a preferred embodiment of the present invention with an avalanche voltage of about 160-180 volts, a third switch unit Q 21 , a switch node A 2 , a power source node B 2 +, a ground node F 2 , and a transform element TF 2 . A first spike noise snubber  210  is formed from a series connection formed from both the capacitor C 21  and the resistor R 21 . A second spike noise snubber  220  is formed from a series connection formed from both the capacitor C 22  and the resistor R 22 . The third switch unit Q 21  is also a metal-oxide semiconductor transistor the same as the switch unit Q 11 , for adjusting a resistance between the drain and the source of the third switch unit Q 21  according to a voltage level at the gate of the third switch unit Q 21  so that a connection between the drain and the source of the third switch unit Q 21  may thus be switched to be open-circuited or short-circuited. Therefore, when the power transform device  200  is under the normal mode, besides power being required to be supplied with the power source node B 2 +, a voltage level at the gate of the third switch unit Q 21  is periodically switched to high for periodically activating the third switch unit Q 21 . In a preferred embodiment of the present invention, the third switch unit Q 21  may be periodically switched to be short-circuited or open-circuited according to the voltage level at the gate of the third switch unit Q 21  with a pulse width modulation control technique or a pulse frequency modulation control technique so that a magnitude of power outputted by the transform element TF 2  is well manipulated. The transform element TF 2 , which is the same as the transform element TF 1 , is a coupling element of double winding for transforming received currents to output power of a specific magnitude. 
   The power transform device  200  may be equipped for electronic devices such as a notebook or a monitor, where each of said electronic devices has a normal mode and a power-saving mode. For example, the notebook or the monitor remains in the normal mode, which indicates a high-load mode of the power transform device  200 , when a user keeps on inputting characters with a keyboard. The notebook or the monitor also enters the power-saving mode, which indicates the low-load mode of the power transform device  200 , after the user leaves said notebook or said monitor to be idle for a while. 
   In the present invention, the first spike noise snubber  210  is utilized for relieving spike noise when the power transform device  200  is under the low-load mode, where said spike noise is generated under the power-saving mode of the notebook or the monitor. And the second spike noise snubber  220  is utilized for relieving spike noise of the power transform device  200  under the high-load mode, which indicates the normal mode of the notebook or the monitor. 
   As mentioned above, the power transform device  200  may be operated under various modes according to various magnitudes of supplied voltages. Under the high-load mode of the power transform device  200  that indicates the normal mode of an electronic device, a cycle of the third switch unit Q 21 , where the cycle includes switching of the power transform device  200  through a short-circuited state, an open-circuited state, and the short-circuited state at last, is first described. Please refer to  FIG. 3 ,  FIG. 4 ,  FIG. 5 ,  FIG. 6 , and  FIG. 7 .  FIG. 3  illustrates a pulse plot at the switch node A 2  of the power transform device  200  shown in  FIG. 2  under the high-load mode.  FIG. 4  illustrates a current flow L 4  under the high-load mode of the power transform device  200  shown in  FIG. 2  during duration between the times T 0  and T 1  shown in  FIG. 3 .  FIG. 5  illustrates a current flow L 5  under the high-load mode of the power transform device  200  shown in  FIG. 2  during duration between the times T 1  and T 2  shown in  FIG. 3 .  FIG. 6  illustrates a current flow L 6  under the high-load mode of the power transform device  200  shown in  FIG. 2  during duration between the times T 2  and T 3  shown in  FIG. 3 .  FIG. 7  illustrates a current flow L 7  under the high-load mode of the power transform device  200  shown in  FIG. 2  during duration between the times T 3  and T 4  shown in  FIG. 3 . 
   As shown in  FIG. 4 , during the duration between the times T 0  and T 1 , the power source node B 2 + outputs power, and the third switch unit Q 21  is short-circuited. At this time, the power outputted from the power source node B 2 + is consumed by the transform element TF 2 , and therefore, a voltage level at the switch node A 2  is not high enough for activating the first switch unit D 21 . For the abovementioned factors, the current flow L 4  shown in  FIG. 4  flows through the power source node B 2 +, the transform element TF 2 , the third switch unit Q 21 , the resistor R 23 , and the ground node F 2  in order, without flowing through the first switch unit D 21 , the first spike snubber unit  210 , and the second spike snubber unit  220 . 
   As shown in  FIG. 5 , during the duration between the times T 1  and T 2  under the high-load mode of the power transform device  200 , with the third switch unit Q 21  being switched from a short-circuited state to an open-circuited state, a counter-electromotive force is generated from the transform element TF 2 , and then a higher spike voltage is generated at the switch node A 2  so that a voltage level at the switch node A 2  is increased to a magnitude capable of activating the first switch unit D 21  before said higher spike voltage dissipates. In a preferred embodiment of the present invention, the higher spike voltage is about 200 volts so that the voltage level at the switch node A 2  is increased from 250 volts to 450 volts. Moreover, since the power transform device  200  is under the high-load mode, the generated spikes may be up to 200 volts. Refer to the current flow L 5  shown in  FIG. 5 , the higher spike voltage activates the second switch unit TVS 2 , which has an avalanche voltage of about 160 volts to 180 volts. Therefore, after the higher spike voltage is transmitted through the first switch unit D 21 , said higher spike voltage is then transmitted through the first spike noise snubber  210  and the second spike noise snubber  220  simultaneously. The capacitors C 21  and C 22  are thus charged by the higher spike voltage, and the capacitors C 21  and C 22  also absorb power from said higher spike voltage for reaching an aim of relieving spike noise under the high-load mode. 
   As shown in  FIG. 3 , a spike voltage merely appear in an instant duration, and as shown in  FIG. 6 , during the duration between the times T 2  and T 3  and after the spike voltage dissipates, the voltage level at the switch node A 2  is lower than the voltage level at the node K 2  so that the first switch unit D 21  is open-circuited. At this time, refer to the current flow L 6  shown in  FIG. 6 , the resistor R 21  consumes power stored in the capacitor C 21  whereas the resistor R 22  consumes power stored in the capacitor C 22 , though the abovementioned powers are not required to be discharged within the duration between the times T 2  and T 3 . 
   As shown in  FIG. 7 , during duration between the times T 3  and T 4 , the power transform device  200  enters a next cycle. Then the third switch unit Q 21  is short-circuited again so that the current flow L 7  shown in  FIG. 7  is partially overlapped with the current flow L 4 . At this time, the first switch unit D 21  remains open-circuited, and each of the resistors R 21  and R 22  discharges the spike voltage stored in the capacitors C 21  and C 22  respectively until said spike voltage is completely discharged. 
   The low-load mode of the power transform device  200 , which is corresponding to the stand by mode of a related electronic device, is detailed described as follows. Please refer to  FIG. 8 ,  FIG. 9 ,  FIG. 10 ,  FIG. 11 , and  FIG. 12 .  FIG. 8  is a diagram of a pulse plot of the switch node A 2  of the power transform device  200  under the low-load mode.  FIG. 9  is a diagram illustrating a current flow L 9  during the duration between the times T 0 ′ and T 1 ′ shown in  FIG. 8  under the low-load mode of the power transform device  200  shown in FIG.  2 .  FIG. 10  is a diagram of a current flow L 10  during the duration between the times T 1 ′ and T 2 ′ shown in  FIG. 8  under the low-load mode of the power transform device  200  shown in  FIG. 2 .  FIG. 11  is a diagram of a current flow L 11  during the duration between the times T 2 ′ and T 3 ′ shown in  FIG. 8  under the low-load mode of the power transform device  200  shown in  FIG. 2 .  FIG. 12  is a diagram of a current flow L 12  during the duration between the times T 3 ′ and T 4 ′ shown in  FIG. 8  under the low-load mode of the power transform device  200  shown in  FIG. 2 . 
   As shown in  FIG. 9 , between the times T 0 ′ and T 1 ′, both of the power source node B 2 + and the third switch unit Q 21  are activated. Moreover, since a voltage level at the switch node A 2  is not high enough to activate the first switch unit D 21 , the current flow L 9  shown in  FIG. 9  flows through the power source node B 2 +, the transform element TF 2 , the third switch unit Q 21 , the resistor R 23 , and the ground F 2  in order, instead of flowing through the first switch unit D 21 , the first spike noise snubber unit  210 , and the second spike noise snubber unit  220 . 
   As shown in  FIG. 10 , between the times T 1 ′ and T 2 ′, both the power source node B 2 + and the third switch unit Q 21  are shut down. Therefore, a counter electromotive force is generated on the transform unit TF 2 , and a spike voltage is generated on the switch node A 2  so that a voltage level of the switch node A 2  is increased to a magnitude capable of activating the first switch unit D 21  before the spike voltage dissipates. Moreover, since the power transform device  200  is under the low-load mode, after the current flow L 10  shown in  FIG. 10  flows through the first switch unit D 21 , the second switch unit TVS 2  having an avalanche voltage of between 160 volts and 180 volts is not activated, and the current flow L 10  does not flow through the second spike noise snubber unit  220  either. At this time, the current flow L 10 , which flows through the first spike noise snubber  210 , merely charges the capacitor C 21  for reaching an aim of relieving spike noise under the low-load mode by the capacitor C 21 , which absorbs power from the spike voltage. 
   As shown in  FIG. 11 , between the times T 2 ′ and T 3 ′, the spike voltage has been absorbed so that a voltage level at the switch node A 2  is lower than a voltage level at the node K 2 , and the first switch unit D 21  is thus shut down. At this time, as the current flow L 11  shown in  FIG. 11  continues to flow, the resistor R 21  consumes power stored by the capacitor C 21 , though, said power may not be consumed completely between the times T 2 ′ and T 3 ′. 
   As shown in  FIG. 12 , between the times T 3 ′ and T 4 ′, the power transform device  200  enters a next cycle. Therefore, both the power source node B 2 + and the third switch unit Q 21  are activated again so that the current flow L 12  shown in  FIG. 12  is partially overlapped with the current flow L 8  shown in  FIG. 8 . At the same time, the first switch unit D 21  remains open-circuited, and the resistor R 21  keeps discharging the stored spike voltage in the capacitor C 21  until said stored spike voltage dissipates completely. 
   Moreover, after the resistor R 22  of the power transform device  200  is removed to form an open-circuited state at the location where it was, another power transform device  300  of the present invention is thus generated. Note that the efficiency of absorbing and discharging a spike voltage of the power transform device  300  is close to said efficiency of the power transform device  200 . Please refer to  FIG. 13 , which is a diagram of the power transform device  300  of the present invention. The spike noise snubber unit  230  includes a resistor R 21 , capacitors C 21  and C 22 , and a second switch unit TVS 2 . Operations of the power transform device  300  are similar to the abovementioned operations of the power transform device  200 . However, the resistance of the resistor R 21  has to be more precisely chosen because of the absence of the resistor R 22  so that the power transform device  300  properly adjusts a magnitude of its current flow within a specific range for absorbing and discharging the spike voltage under both the low-load mode and the high-load mode. 
   Under the high-load mode of the power transform device  300 , when a spike voltage generated from a counter electromotive force of the transform element TF 2  activates the first switch unit D 21 , a high voltage level resulted from the high-load mode also activates the second switch unit TVS 2 . Therefore, both the capacitors C 21  and C 22  absorb power of said spike voltage until said spike voltage dissipates so that the first switch unit D 21  becomes open-circuited. After the first switch unit D 21  is shut down, since the capacitor C 22  stores most of the power from the spike voltage, a current flow through the second switch unit TVS 2  is reversed so that said stored power is discharged through the resistor R 21 . Note that the resistor R 21  also discharges power stored in the capacitor C 21 , therefore, with a properly chosen resistance of the resistor R 21 , the power transform device  300  may discharge the spike voltage completely through the resistor R 21  before both the power source node B 2 + and the third switch unit Q 21  are shut down. 
   Note that the second switch unit TVS 2  may be implemented with a zener diode, and the third switch unit Q 21  may be implemented with a N-type or a P-type metal oxide semiconductor transistor. 
   In summary, in the power transform device of the present invention, a plurality of spike noise snubber units is utilized, and capacitances of said plurality of spike noise snubber units are also adjusted according to various requirements for relieving electromagnetic disturbances and spike noise. When the power transform device of the present invention is under the high-load mode, a high spike voltage activates several spike noise snubber units so that power of said high spike voltage is absorbed, and electromagnetic disturbances are relieved thereby. When the power transform device of the present invention is under the low-load mode, a spike noise snubber unit having a smaller capacitance may be utilized for absorbing power for relieving spike noise. 
   Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.