Abstract:
In a system for the transmission of confidential data between a transmitter1) and a receiver (3), the transmitter (1) transmits a standard key E to the receiver (3). The standard key E preferably is a random number generated within the transmitter (1). An element at the location of the transmitter (1) calculates an intrinsic key R 1  for coding the data to be transmitted, and an element at the location of the receiver calculates an intrinsic key R 2  for decoding the data. The calculation of each of the intrinsic keys R 1  and R 2  is accomplished in each case by a microprocessor (4&#39; and 5&#39;) situated within a portable object (4 and 5) which also includes a memory (4&#34; and 5&#34;) storing a program, a secret code S, and an identification code I n . The intrinsic keys R 1  and R 2  are each calculated as a function of the secret code S, the identification code I n , and the standard key E. The portable objects at the transmitter and receiver ends of the system must be matched.

Description:
This is a continuation of application Ser. No. 657,470, filed Oct. 4, 1984, now abandoned, which is a continuation of Ser. No. 235,505, filed Feb. 18, 1981, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     The present invention relates to a method and system for transmission of confidential data. The present invention is related to the invention to which commonly-assigned copending application Ser. No. 200,785, filed Oct. 27, 1980, by Robert J. L. Herve, and entitled &#34;SYSTEM AND PROCESS FOR IDENTIFICATION OF PERSONS REQUESTING ACCESS TO PARTICULAR FACILITIES&#34; is directed, the entire disclosure of which is hereby expressly incorporated by reference. 
     More particularly, the invention relates to systems in which data are transmitted in the form of messages represented in a binary code, as well as in other forms. These messages are coded by means of a coding key upon transmission, and then decoded for restoration to their original clear form upon being received. These systems have at least two disadvantages. The first is the mathematical function enabling decoding of the coded message must be strictly the inverse of the function enabling the message to be encoded. The safety of these systems resides mainly in the fact that the functions applied are complex. 
     The second disadvantage is the credibility of these systems is assured only if the keys may be easily altered in the course of time, which implies organizing confidential message transmission services for dispatching the keys to the users of the transmission system. 
     SUMMARY OF THE INVENTION 
     The present invention seeks to eliminate these and other disadvantages by providing for utilization of two separate coding keys. The first is a standard key E transmitted directly in clear from the transmitter to the receiver. The second is an intrinsic key R calculated simultaneously at the transmitter and the receiver locations. The intrinsic key R is a function of the standard key E, of an identification code I n  linked with the message which is transmitted, and of a secret code S stored in two devices situated at the transmitter and receiver respectively, or at the transmitter and receiver locations. The intrinsic key R 1  calculated at the transmitter location is used for encoding the message transmitted, and the intrinsic key R 2  calculated at the receiver location is used to decode the coded message transmitted. 
     If the calculating function employed at the transmitter and receiver locations is the same and if the secret code S stored at these locations is the same, the intrinsic keys R calculated are identical. Under these conditions, all that is needed is to utilize, at the transmitter and receiver locations, an operator which allows of simultaneous encoding of the message by means of the intrinsic key R 1  calculated upon transmission and decoding by means of the intrinsic key R 2  calculated upon reception. These coding and decoding operations may easily be performed by means of logic circuits of the combinatory type, for example EXCLUSIVE-OR circuits. 
     The system of the invention makes it possible to perform constant modification of the intrinsic keys R calculated at the transmitter and receiver locations by random alteration in the course of time of the value of the standard key E. 
     According to another feature of the invention, the calculation of each of the intrinsic keys R at the transmitter and receiver locations is accomplished in each case by a processor situated within a portable object which also comprises a memory wherein is stored a program p for calculation of the function for determining the intrinsic key R as a function of the secret code S also stored in the memory, of the standard key E, and of the identification code I n  linked with the message. These portable objects are each placed at the disposal of the persons entrusted with transmitting and receiving the messages. 
     The system may then operate only if both persons have strictly matched portable objects, which amounts to saying, for example, that the processing units must be actuated by the same program p and that the memories must contain the same secret code S. It is obvious that a fraudulent person lacking both the program p and the secret code S will be unable to calculate the intrinsic key R enabling him to decode the message transmitted. His task becomes ever more difficult since the system alters the standard key E in a random manner with each clock pulse. 
     According to another feature of the invention, and for the purpose of increasing the security of the system in a practically absolute manner, each portable object of the system contains within its memory a table of the identification codes I n  related to the messages which each person will be authorized to transmit and receive. 
     The identification code related to the message contained in the memories of the portable objects are located or &#34;pointed&#34; to by address generators at the transmitter and receiver locations. These address generators establish correspondence between the identification code I n  linked with the message and the address of the identification code I n  contained in the memory of the portable object. The message transmission may then only occur correctly if the address generator and the portable objects have been able to establish the identity of the identification code I n  related to the message. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention will now be further described by way of example, with reference to the accompanying drawings, in which: 
     FIG. 1 illustrates the arrangement of one embodiment of a data processing system in accordance with the invention; 
     FIG. 2 is an illustration of one of the address generators of FIG. 1; 
     FIG. 3 is an illustration of one of the sequencers of FIG. 1; and 
     FIG. 4 illustrates the combinatory circuit utilized in the coding and decoding operations. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The system illustrated in FIG. 1. comprises a transmitter 1 and a receiver 3 interconnected by a transmission line system 2. The transmitter 1 and receiver 3 are adapted to be coupled temporarily to portable objects 4 and5 comprising, respectively, processing means in the form of microprocessors4&#39; and 5&#39;, as well as memories or storage devices 4&#34; and 5&#34;. Portable objects of this kind are described in commonly-assigned Ugon U.S. Pat. No.4,211,919, issued July 8, 1980, and entitled &#34;PORTABLE DATA CARRIER INCLUDING A MICROPROCESSOR&#34;, the entire disclosure of which is hereby expressly incorporated by reference. 
     The storage devices 4&#34; and 5&#34; of the portable objects 4 and 5 are divided into at least three sections. The first is a secret section containing a secret code S which is written when the portable object 4 or 5 is initialized. The secret code S may thereafter be read only by the processor 4&#39; or 5&#39; of the portable object 4 or 5 itself, and cannot in anyevent be read from the outside. 
     The second section contains the identification codes I n  related to themessages which the bearer of the object is authorized to transmit or receive. The writing of the identification codes I n  in the second memory section may be protected for reasons of security by a key code unknown to the bearer of the portable object. 
     The third section contains a program p whose task is to calculate an intrinsic key R from the codes S, I n  and from a standard key E. This is summarized by the formula R=p(S,I n ,E). Once written, the program pcannot be altered and may advantageously be contained in a read-only memory(ROM). 
     While in no way intended to limit the scope of the invention, the information stored in the memories 4&#34; and 5&#34; and operated on by the processors 4&#39; and 5&#39; may be that which is disclosed in the above-identified commonly-assigned Herve application Ser. No. 200,785, filed Oct. 27, 1980, as is repeated below in the following specific example. 
     First, the data words have the following lengths in this specific example: The identification code I n  is 32 bits long; the standard key E is also 32 bits long; and the secret code S is 64 bits long. The result of the computation, the intrinsic key R, is 64 bits long. 
     The computation effected by the instructions comprising the stored program p executed in the microprocessors 4&#39; and 5&#39; has the following three overall steps: 
     (1) First, an intermediate result, R 1 , is calculated by concatenating E with I n  ·R 1  =(E, I n ). 
     (2) Second, another intermediate result, S 1 , is calculated by an EXCLUSIVE-OR operation of R 1  with S. S 1  =R 1  ⊕S. 
     (3) Third, the result, R, is calculated by multiplying S with S 1  with R 1 , modulo 2 64  -1. R=S×S 1  ×R 1 , modulo 2 64  -1. 
     This computation can be performed in a microprocessor carried on a card such as is disclosed in the above-referenced Ugon U.S. Pat. No. 4,211,919.By way of example, a suitable commercially-available memory device which may be employed as the memories 4&#34; and 5&#34; is a Mostek Type No. MK4022. Similarly, the microprocessors 4&#39; and 5&#39; may each comprise an Intel Type No. 8080 or an Intel Type No. 8085. 
     The following lists one form of machine-language program which may be employed as the programs p. This program listing assumes that registers denoted A, B, C, D and T (not shown) are available: 
     EXAMPLE PROGRAM LISTING 
     
         ______________________________________Instructions    Comments______________________________________001 Load I.sub.n →A           Load registers A, B and C with           the parameters I.sub.n, E, S002 Load E→B003 Load S→C004 MOV B→A           Concatenate E with I.sub.n to           generate R.sub.1, and leave in           register A005 MOV A, T    Also store R.sub.1 in register T006 X CT        S.sub.1 = R.sub.1 ⊕ S, to T007 MUL (T C)   S × S.sub.1 to T008 MUL (T A)   R = S × S.sub.1 × R.sub.1 to T009 Load 2.sup.64 - 1→D           Load value 2.sup.64 - 1 into           register D010 COMP (T, D) if R ≧ 2.sup.64 - 1011 IF (1)      return to 1012 END______________________________________ 
    
     The particular transmission line system 2 employed is not important insofaras the present invention is concerned, and may be selected as desired from among available forms of transmission line systems such as those using an electric cable, or an optical, acoustic, magnetic or radio wave connection. 
     The FIG. 1 transmitter 1 comprises a coding device 7, a first address generator 8, a random number generator 9, and a sequencer S 0  10. 
     The FIG. 1 receiver 2 comprises a decoding device 11, a second address generator 12, and a sequencer S 1  13. 
     The address generators 8 and 12 are described in detail hereinbelow with reference to FIG. 2. The sequencers S 0  10 and S 1  13 are described in detail hereinbelow with reference to FIG. 3. 
     The portable objects 4 and 5 may be coupled temporarily to the transmitter 1 and to the receiver 3 by respective coupling means C 1  and C 2 . 
     The coding device 7 receives, at its input 1, the message in clear 6 which is to be coded and, at its input 2, the intrinsic coding key R 1 . A message g(M,R) is coded by the device 7 and transmitted from the device 7 output 3 via the transmission line 2 to the decoding device 11 input 1. The message g(M,R) is then decoded by the device 11 by virtue of receptionat its input 2 of the intrinsic decoding key R 2 . The message then appears in clear at device 11 output 3 and is displayed at 14. (The codingdevice 7, the decoding device 11, and the form of encoded message g(M,R) are described in detail hereinbelow with reference to FIG. 4.) 
     The intrinsic coding key R 1  is calculated and supplied by the processor 4&#39; of the portable object 4. Similarly, the intrinsic decoding key R 2  is calculated and supplied by the processor 5&#39; of the portableobject 5. 
     The first address generator 8 calculates the address (Adv) of the identification code I n  of the message situated in the memory 4&#34; of the portable object 4 from the identification code I n  linked to the message in clear 6 and transmits this address via its output 2 to the dataand address bus of the portable object 4 (see commonly-assigned Ugon U.S. Pat. No. 4,211,919), via the coupling means C 1 . The first address generator 8 is reset to an initial state by the signal RAZ transmitted to its input 3 via the output 2 of the sequencer S 0  10, and is activatedby clock signals H 0  transmitted to its input 4 via the output 1 of thesequencer S 0  10. The sequencer S 0  10 is energized by a START signal as soon as a message is transmitted to the input E 2  (identification code I n  with message in clear 6) of the transmitter 1. 
     The system of the invention makes it possible to perform constant modification of the intrinsic keys R calculated in the processors 4&#39; and 5&#39; associated respectively with the transmitter 1 and receiver 3 by randomalteration of the standard key E as a function of time. Specifically, the standard key E is generated by a random number generator 9 which may comprise a simple ring counter. The generator 9 supplies a random number forming the standard key E in bit serial form as clock signals H 0  transmitted by the sequencer S 0  10 are input to the random number generator 9. This random number forming the standard key E is transmitted from the output 2 of the generator 9 to the respective inputs of the portable objects 4 and 5 via their coupling devices C 1  and C 2 . 
     In the same way as for the first address generator 8 in the transmitter 1, the second address generator 12 in the receiver 3 is supplied at its input1 with the identification code I n  (transmitted to it via the transmission line system 2) so that it may calculate and deliver at its output 2 the address of the corresponding identification code I n  in the memory 5&#34; of the portable object 5. This address generator 12 is resetto an initial state by the signal RAZ applied to its input 3 by the sequencer S 1  13, and is activated by a clock signal H 1  fed to its input 4 by the sequencer S 1  13. The sequencer S 1  13 is energized via its input 3 as soon as a message is transmitted via the transmission line 2. 
     With reference now to FIG. 2, there is shown one embodiment of an address generator suitable for use as the address generators 8 and 12 of FIG. 1. The FIG. 2 address generator comprises a memory 15 which may for example be either a Random Access Memory (RAM), a Programmable Read Only Memory (PROM), or an Erasable Programmable Read Only Memory (EPROM). This memory 15 contains a table of all identification codes I 0  through I n  ofthe messages which the system is authorized to transmit. 
     The memory 15 is addressed by means of an address counter 16. This address counter 16 is stepped by means of the clock signal H applied at the input 4 of the address generator, and is reset to zero by the signal RAZ appliedat the input 3 of the address generator. 
     The address counter 16 determines the address of the identification code I n  contained in the memory 4&#34; or 5&#34; of the portable object 4 or 5 andcorresponding to the message 6 which is to be transmitted. This determination is performed by an identification code register 18 and a comparator 19. The identification code I n  accompanying the message 6 which is to be transmitted is fed into the identification register 18, after which the address counter 16 progresses at the rate of the clock H so as to address and read the identification codes I n  contained in the memory 15. The identification codes I n  are thus presented successively at an input of the comparator 19 which compares them to the identification code contained in the identification code register 18. 
     If correspondence is established by the comparision, progression of the address counter 16 is stopped by application of the signal HIT to address counter 16 input 4, the signal HIT being supplied by output 3 of the comparator 19. At the same time, the contents of the address counter 16 (representing the address of the location within the portable object 4 or 5 of the identification code I n  of the message which is to be transmitted) is transmitted via an AND gate 20 (activated at its input 1 by the signal HIT) as a signal ADV to the output 2 of the address generator. 
     Similarly, with reference now to FIG. 3, an embodiment of a sequencer suitable for use as the sequencers S 0  10 and S 1  13 of FIG. 1 is shown. The FIG. 3 sequencer comprises a clock 21, an RS flip-flop 22, an AND gate 23, a ring counter 24, and a decoder 25. An input of the AND gate23 receives the clock signals coming from the clock 21, these signals beingretransmitted at the AND gate 23 output towards the output 1 of the sequencer when the other input of the gate 23 is activated via the Q output of the flip-flop 22. The Q output of the flip-flop 22 assumes a logic high state (binary &#34;1&#34;) when it is triggered at its Set input (S) bythe START signal applied to the input 3 of the sequencer. This START signalmay comprise a particular bit of the identification code I n  accompanying the message 6 which is to be transmitted. The signal H is transmitted to the input of the ring counter 24 of which a particular state is decoded by the decoder 25 to reset the flip-flop 22 to the zero state and to deliver the RAZ signal at the output 2 of the sequencer. 
     With reference now to FIG. 4, there is shown a combinatory circuit such as may comprise both the FIG. 1 coding device 7 and the FIG. 1 decoding device 11. As shown, the FIG. 4 circuit comprises EXCLUSIVE-OR logic gates. In operation, upon transmission, a bit M i  of the message to betransmitted and a bit R i  of the intrinsic key are applied, respectively, to an input of an EXCLUSIVE-OR circuit in such manner that the resulting combination satisfies the Boolean logic equation S i  =M i  ⊕R i . Upon reception, decoding is performed by also employing an EXCLUSIVE-OR circuit. The signals S i  and R i  are applied to two of its inputs in such manner as to restore the bits M i . The equation for the restored M i  is M i  =S i  ⊕R i . 
     The example of FIG. 4 shows an embodiment of a coding circuit for a messageM and an intrinsic key word R each of three bits. The EXCLUSIVE-OR gates 26, 27 and 28 deliver the signals S 1  to S 3  as follows: 
     
         S.sub.1 =M.sub.1 ⊕R.sub.1 
    
     
         S.sub.2 =M.sub.2 ⊕R.sub.2 
    
     
         S.sub.3 =M.sub.3 ⊕R.sub.3 
    
     Similarly, for decoding, EXCLUSIVE-OR gates deliver the signals M 1  to M 3  of the restored message M as follows: 
     
         M.sub.1 =S.sub.1 ⊕R.sub.1 
    
     
         M.sub.2 =S.sub.2 ⊕R.sub.2 
    
     
         M.sub.3 =S.sub.3 ⊕R.sub.3 
    
     The restored message is thus identical to the original message, regardless of the specific message and the specific intrinsic key R, so long as the same intrinsic key R is used for both coding and decoding. 
     In summary, the operation of the system for transmission of coded data in accordance with the invention is as follows: 
     The appearance of the message in clear 6 at the inputs E 1  and E 2  of the transmitter 1 causes the triggering of the respective address generators 8 and 12 of the transmitter 1 and the receiver 3, as well as ofthe random number or standard key E generator 9. The identity of the message is recognized by the respective address generators 8 and 12 which then transmit to the portable objects 4 and 5 the address (ADV) of the corresponding identity code I n  in the portable objects 4 and 5. The intrinsic keys R 1  and R 2  are then calculated by the processors 4&#39; and 5&#39; of each of the portable objects 4 and 5 by means of a function R x  =p(E,S,I n ), one example of which is given hereinabove. If theportable objects 4 and 5 are of the same nature, that is if each contains the same program p, the same code S and the same identification code I n , the calculated intrinsic standard keys R 1  and R 2  are then the same. The instrinsic key R 1  is applied to the coding device 7 in the transmitter 1, and the intrinsic key R 2  is applied to the decoding device 11 in the receiver 3. The restored message received at 14 is then identical to the transmitted message in clear 6. 
     The example which has been given of a perferred embodiment of the inventionis not in any way intended to limit the scope of the invention, as it is understood that any one skilled in the art well acquanted with data transmission techniques will be able to envisage other embodiments of the invention without thereby exceeding its scope.