Abstract:
A voltage-to-current conversion circuit is disclosed which includes a MOS transistor of a source-grounded type having a gate connected to an input terminal, an output circuit producing an output current at an output terminal in response to a drain current of the transistor, and a control circuit maintaining the drain voltage of the transistor to such a value that has the transistor operates in a non-saturation (triode) region.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates to a voltage-to-current conversion circuit and, more particularly, to such a circuit as utilizing an insulated gate field effect (MOS) transistors. 
     A voltage-to-current conversion circuit is essential to a signal processing circuit handling an analog signal and thus widely employed therein. This circuit fundamentally uses a current mirror circuit composed of transistors there are two types in such a circuit, a bipolar type and a MOS type. 
     The voltage-to-current conversion circuit of the bipolar type is typically disclosed in Japanese. Laid-open patent No. Sho 59-221014. The basic circuit construction thereof is shown in FIG. 3 attached herewith (and corresponds to FIG. 5 of the above patent No.). Specifically, this circuit includes a current mirror circuit composed of PNP bipolar transistors 20 and 22, an input resistor 60, a constant current source composed of an NPN bipolar transistor 21, a resistor 61 and a constant voltage source 80, and an operational amplifier 40 which are connected as shown. The amplifier 40 cooperates with the transistor 20 to form a strong negative feedback loop. Accordingly, the current flowing through the resistor 60 in response to an input signal voltage supplied to an input terminal 90 is determined by the resistance value of the resistor 60 and the voltage amplitude of the input signal voltage. This current is supplied to the transistor 20 and thus derived from an output terminal 91 through the transistor 22 as the mirror current. The voltage-to-current conversion is thus attained. This circuit can handle a relatively large input voltage and further operate under a relatively low power voltage (1.8 V). 
     The conversion circuit of the MOS type shown in FIG. 4 is well in the art, on the other hand. This circuit also includes a current mirror circuit composed of P-channel MOS transistors 30 and 32 and an operational amplifier 41. However, this circuit converts the input signal voltage into the current by an N-channel MOS transistor 31, a resistor 62 and the amplifier 41 and then produces the converted current through the current mirror circuit. Specifically, the negative feedback loop composed of the transistor 31 and the amplifier 41 causes the input signal voltage to appear across the resistor 62. The current determined by the resistance value of the resistor 62 and the voltage amplitude is thereby derived from the output terminal 92 through the transistor 31 and the current mirror circuit. The present circuit is advantageous to have a high input impedance due to the operational amplifier 41 receiving the input voltage. 
     Referring again to FIG. 3, the bipolar transistors constituting this circuit can be replaced by MOS transistors. However, the circuit thus replaced requires a power supply voltage larger than that applied to the circuit of FIG. 3. This is because the threshold voltage and the saturated voltage of the MOS transistor are higher than those of the bipolar transistor. Therefore, the conversion circuit of FIG. 3 is preferable in use in a low power voltage system. However, the input impedance is determined by the resistor 60 and thus cannot be enhanced. A source follower circuit is, for example, required to enhance the input impedance, so that the amplitude of the input voltage is restricted. 
     On the other hand, the circuit shown in FIG. 4 has a high input impedance, as described hereinbefore. However, the source voltage of the transistor 31 is increased in accordance with increase in voltage of the input signal. For this reason, a relatively high drain voltage is needed. The power supply voltage is required to be high accordingly, or the input signal voltage is restricted. 
     SUMMARY OF THE INVENTION 
     It is therefore an object of the present invention to provide an improved voltage-to-current conversion circuit utilizing MOS transistors. 
     It is another object of the present invention to provide a voltage-to-current conversion circuit of a MOS type which can handle a relatively large input signal voltage with a low power supply voltage. 
     A conversion circuit according to the present invention comprises a MOS transistor of a source-grounded type having a gate connected to an input terminal, a current circuit leading a drain current of the transistor to an output terminal, and a control circuit for maintaining the drain voltage of the transistor to such a value that makes the transistor operate in a non-saturation region or a triode region. 
     Thus, the transistor operates in the source-grounded manner and in the non-saturation region. Accordingly, the transistor can handle large input voltage with a low power supply voltage. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, wherein: 
     FIG. 1 is a circuit diagram illustrative of a first embodiment according to the present invention; 
     FIG. 2 is a circuit diagram illustrative of a second embodiment according to the present invention; 
     FIG. 3 is a circuit diagram illustrative of a prior art; and 
     FIG. 4 is a circuit diagram illustrative of another prior art. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Referring to FIG. 1, a voltage-to-current conversion circuit according to the first embodiment of the present invention includes seven P-channel MOS transistors 1, 2, 4, 6, 7, 11 and 12, five N-channel MOS transistors 3, 5, 8, 9 and 10, three resistors 50, 51 and 52 and a current source 70 which are connected as shown. Each of the transistors 3, 5 and 8 has its threshold voltage of about 0 V, each of the remaining transistors has its threshold voltage of 0.6 to 0.8 V. The transistors 1, 4 and 6 cooperate with one another to constitute a current mirror circuit and hence the constant current form the current source 70 is derived from the transistors 4 and 6. The current from the transistor 6 produces a constant voltage drop across the resistor 51, which voltage drop biases the transistor 5. It should be noted that although the transistor 5 intends to flow the current corresponding to the biased voltage by the resistor 51, the current actually flowing through the transistor 5 is the same as the current from the transistor 4. 
     Representing the resistance value of the resistor 51, each of the drain current of the transistors 4 and 6, and the gatesource voltage of the transistor 5 as R 0 , R O , I B , and V GS5 , respectively, the following equation (1) is obtained: 
     
         v.sub.GS5 =R.sub.0 ×I.sub.B                          (1). 
    
     That is, the transistor 5 intends to flow the current corresponds to the bias voltage indicative of (1), but the current I B  flows in fact therethrough. Therefore, it becomes possible to make the transistor 5 operate in the non-saturation or triode region by designing the current I B  to a value as follows: ##EQU1## wherein W and L represents the gate width and length of the transistor 5, V To  represents the threshold voltage thereof, μn represents the surface mobility of electrons and C ox  represents the gate capacitance per unit. 
     The drain voltage V x  of the transistor 5 operating in the non-saturation region is represented as follows and takes a value of 0.1 to 0.2 V which is very close to zero: ##EQU2## 
     As described hereinbefore, the threshold voltage V To  is about zero voltage and the drain voltage V x  thereof is very close to zero, and therefore the equation (3) can be rewritten as follows: ##EQU3## 
     The drain voltage of the transistor 5 operating in the non-saturation (triode) region is converted into a current by the transistor 3 and the resistor 50, and the current thus converted is supplied to the transistor 2 and thus appears as a drain current of the transistor 7. This is because the transistors 2 and 7 form a current mirror circuit. The drain of the transistor 7 is connected to a circuit composed of the transistor 8 and the resistor 52. The transistor 10 is connected to the transistor 8 to form a negative feedback loop. Accordingly, the same current flows through the transistors 3 and 8 when the sizes of the transistors are identical with each other, the resistors 50 and 52 have the same values as each other and the current gain of the current mirror circuit composed of the transistors 2 and 7 is 1. In other words, the gate of the transistor 8 is applied with and fixed to such a voltage that makes the current flowing through the transistor 3 equal to the current flowing through the transistor 8. The gate voltage of the transistor 8 is equivalent to the drain voltage V X  of the transistor 5. Since the drain of the transistor 9 is connected to the gate of the transistor 8, the drain voltage of the transistor 9 becomes to be equal to and maintained to the voltage V X . That is, the transistors 8 and 10 and the resistor 52 converts the current, which is obtained by converting the drain voltage of the transistor 5 operating in the non-saturation region, again into the voltage corresponding thereto. Thus, the transistor 9 also operates in the nonsaturation (triode) region similarly to the transistor 5, and the drain current thereof is represented as follows: ##EQU4## 
     From the equations (4) and (5), we obtain the following: 
     
         I.sub.D9 =(1/R.sub.0)×V.sub.GS9.                     (6) 
    
     Since the current gain of the current mirror circuit composed of the transistors 11 and 12 is one, the output current I out  derived from the input terminal 90 is equal to the current I D9 , and represented as follows: 
     
         I.sub.OUT =(.sub.1 /R.sub.0)×V.sub.in,               (7) 
    
     wherein the input signal voltage V in  is equal to the gate-source voltage V GS9  of the transistor 9. 
     Thus, the present circuit performs the voltage-to-current conversion operation on the input signal voltage. Moreover, the conversion operation is being performed so long as the transistor 9 operates in the non-saturation region, and therefore the amplitude of the input signal is not limited. On the other hand, the minimum power supply voltage allowing the present circuit to operate is determined by the gate-source voltage of the transistor 10 and the sum of the drain-source voltages of the transistor 7 and 9 and takes a value of about 2 V. 
     The resistors 50 and 52 are provided for the purpose of reducing the power consumption and therefore may be omitted. 
     Turning to FIG. 2, there is shown a circuit according to a second embodiment of the present invention, wherein the same constituents as those shown in FIG. 1 are denoted by the same reference numerals to omit the further description thereof in this circuit, all the transistors are designed to have the conventional threshold voltage, 0.6 to 0.8 V. Therefore, a diode-connected N-channel MOS transistor 13 is added in series with the resistor 51 to bias the transistor 5. 
     Since the circuit operation of this circuit is identical with that of the circuit of FIG. 1 and thus will be omitted. Since the transistor 9 is designed to have the above threshold voltage, the present circuit converts the input signal having an amplitude from the threshold voltage to the power supply voltage, whereas the circuit of FIG. 1 handles the input signal having an amplitude from about zero to the power supply voltage. However the present circuit is derived at low cost than the circuit of FIG. 1 because of all the transistor having the same threshold voltage. 
     It is apparent that the present invention is not limited to the above embodiments but may be modified and changed without departing from the scope and spirit of the invention. For example, the current gain of each current mirror circuit can set to a desired value other one. The channel types of the respective transistors are changeable.