Abstract:
The present invention provides apparatuses, methods, and computer readable media for updating memory containing representations of computer-executable instructions in a processing system. A primary processor receives original sets of computer-readable instructions and updated sets of computer-readable instructions for the processors in processor system from a host system. The sets of computer-readable instructions are stored in memory (e.g., flash memory), where each processor in the system may utilize different sets. The primary processor then initiates updating its firmware with the corresponding updated set. If the update is unsuccessful, the primary processor reverts to the original set and the update process is terminated. Otherwise, the firmware update proceeds to the secondary processor. If the firmware update succeeds, the next secondary processor is updated. Otherwise, all of the updated processors revert to the corresponding original set of computer-readable instructions and the updating process is terminated.

Description:
BACKGROUND 
       [0001]    The complexity of processing systems, which are often deployed remotely, are increasing. Consequently, firmware often needs to be updated to provide enhanced functionality and to correct problems (“bugs”) when executing the computer-executable instructions in the firmware. Wireless technology (e.g., RF wireless communications or wireless networking technology) is often used to update the firmware, in which a small portion of the firmware (typically referred as a boot loader) updates the firmware by communicating with another system. Under ideal conditions, the updating process may be straight-forward. However, communications over the wireless communications channel may incur transmission errors, thus resulting in an unsuccessful update. 
         [0002]    Many types of devices include non-volatile memory that stores program instructions that are executed after power is applied or upon reset. These program instructions typically perform various initialization functions and then initiate loading and execution of other software. Typically, the initialization program instructions are referred to as firmware and are often stored in either ROM (read-only memory) or EPROM (electrically programmable read-only memory). However, using ROM or EPROM devices to store the firmware had several drawbacks. One such drawback is that to install new or different versions of firmware, there is the need for physical replacement of a ROM device or manipulation such as irradiating an EPROM device with ultraviolet light and then using an EPROM programmer to store new firmware on the EPROM device. 
         [0003]    Electrically erasable programmable read only memory (EEPROM) devices are often used instead of ROM or EPROM devices to store firmware because of the drawbacks discussed above. New firmware may be installed without the need for physical replacement or manipulation. There may be drawbacks with this approach. First, the entire storage of an EEPROM may need to be rewritten to update the firmware. In other words, a portion of the EEPROM may not be written to specifically. Consequently, the firmware updating procedure may be vulnerable to power failures or other errors (e.g., software bugs) in the firmware itself. If the firmware has an error, it may render the device or computer system non-operational. Consequently, a physical replacement of the EEPROM device may be required if an error occurs in the firmware. Versions of EEPROM&#39;s are available where it is possible to update a portion of the EEPROM without updating the entire EEPROM. This type of EEPROM can be found in flash memory cards for digital cameras, among other devices, and is also used to store firmware for devices and computer systems. 
         [0004]    When updating firmware in a processing system, the entire firmware is often replaced. Prior art methods for updating firmware in non-volatile memory may still include the drawbacks related to errors in the firmware (e.g., power failures, software bugs) interrupting the upgrade process and thus rendering the device inoperable. 
         [0005]    Consequently, there is a real market need for the processing system to be able to recover from errors when updating firmware in order to maintain functionality of a processing system. 
       SUMMARY 
       [0006]    The present invention provides apparatuses, methods, and computer readable media for updating memory containing representations of computer-executable instructions in a processing system. 
         [0007]    With another aspect of the invention, a first processor (designated as a primary processor in a processor system) receives original sets of computer-readable instructions and updated sets of computer-readable instructions for a plurality of processors in processor system. The sets of computer-readable instructions are stored in memory (e.g., flash memory), where each processor in the system may utilize different sets. The primary processor then initiates updating its firmware with the corresponding updated set. If the update is unsuccessful, the primary processor reverts to the original set and the update process is terminated. Otherwise, the firmware update proceeds to the next processor (designated as a secondary processor). If the firmware update succeeds, the next secondary processor is updated. Otherwise, all of the updated processors revert to the corresponding original set of computer-readable instructions and the updating process is terminated. 
         [0008]    With another aspect of the invention, the primary processor of a processor system receives an initiation request to update computer-readable instructions for the processor system from a host system. The primary processor consequently notifies the host system about original computer versions associated with the plurality of processors. 
         [0009]    With another aspect of the invention, the primary processor communicates with the secondary processors when updating the firmware over an internal communications bus. 
         [0010]    With another aspect of the invention, the host system communicates with the processor system over a wireless communications channel when providing the original sets and updated sets of computer-executable instructions. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0011]    The foregoing summary of the invention, as well as the following detailed description of exemplary embodiments of the invention, is better understood when read in conjunction with the accompanying drawings, which are included by way of example, and not by way of limitation with regard to the claimed invention. 
           [0012]      FIG. 1  shows a microprocessor system for updating firmware in accordance with an embodiment of the invention. 
           [0013]      FIG. 2  shows a flow diagram for updating computer-readable instructions in a processor system in accordance with an embodiment of the invention. 
           [0014]      FIG. 3  shows a block diagram of a processor in accordance with an embodiment of the invention. 
           [0015]      FIG. 4  shows a scenario for a host system obtaining the current firmware versions of the processors in a processor system in accordance with an embodiment of the invention. 
           [0016]      FIG. 5  shows a scenario for a host system providing old and new firmware versions to the processor system in accordance with an embodiment of the invention. 
           [0017]      FIG. 6  shows a scenario for the primary processor updating its firmware in accordance with an embodiment of the invention. 
           [0018]      FIG. 7  shows a scenario when the primary processor unsuccessfully updates its firmware in accordance with an embodiment of the invention. 
           [0019]      FIG. 8  shows a scenario when the primary processor successfully updates its firmware and initiates updating the firmware of a secondary processor in accordance with an embodiment of the invention. 
           [0020]      FIG. 9  shows a scenario when the secondary processor unsuccessfully updates its firmware in accordance with an embodiment of the invention. 
           [0021]      FIG. 10  shows a scenario when the secondary processor successfully updates its firmware in accordance with an embodiment of the invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0022]      FIG. 1  shows microprocessor system  100  for updating firmware in accordance with an embodiment of the invention. For example, microprocessor system  100  may support a ZigBee-based thermostat or load switches that use more than one processor. 
         [0023]    Microprocessor system  100  includes microcontroller (MCU)  101 , microcontroller  103 , and microcontroller  105 . Embodiments support either updating the firmware of all processors or a subset of the processors in system  100 . Microcontroller  101 ,  103 , or  105  may be a functional computer system-on-a-chip containing a processor core (central processing unit), memory (e.g., a small amount of random access memory (RAM), program memory having computer-readable instructions, or both), and programmable input/output peripherals. However, microcontroller  101 ,  103 , or  105  may include a separate processor (microprocessor), memory, and peripheral interfaces. 
         [0024]    With an embodiment of the invention, MCU  101  functions as the primary processor while MCU  103  and MCU  105  function as secondary processors. Consequently, MCU  101  coordinates activities over internal communications bus  111  among the plurality of microcontrollers, including updating firmware versions for the plurality of microcontrollers. For example, different microcontrollers may support different functions for microprocessor system  100  and consequently each microcontroller may execute different sets of computer-readable instructions. 
         [0025]    In computing, firmware is a computer program that is embedded in a hardware device, for example a microcontroller. It may also be provided on flash memory or as a binary image file that can be uploaded onto existing hardware by a user. 
         [0026]    Firmware typically denotes the programmable content of a hardware device, which may consist of machine language for a microprocessor or configuration settings for a fixed-function device or programmable logic device. Firmware may often be updated after manufacturing. Reprogramming (updating) is usually done electronically in modern systems. 
         [0027]    Firmware is traditionally stored on ROM; however, cost and performance requirements have driven component vendors to adopt various replacements, including non-volatile media such as electrically erasable programmable read-only memory (EEPROM)/flash memory or static random access memory (SRAM) solutions. 
         [0028]    Firmware may expose an externally accessible interface. For example, in some modem implementations the firmware is not directly accessible but is part of a combination of hardware and firmware that responds to commands from the host system. 
         [0029]    Flash memory  107  is used to temporarily store the temporary updated program. One of the MCU typically communicates to the host system through communications interface  109 . For example, MCU  1  is the primary (master) microprocessor that mainly communicates with host system and also communicates with other microprocessor during the updating process. With an embodiment, communications interface  109  includes a RF networking transceiver in order to support a wireless communications channel between the host system and processor system  100 . 
         [0030]    Flash memory  107  is typically non-volatile computer memory that can be electrically erased and reprogrammed. In addition, flash memory  107  often offers fast read access times and better kinetic shock resistance than hard disks. These characteristics are some of the reasons for the popularity of flash memory in portable devices. Flash memory  107  may be classified into NOR and NAND types. 
         [0031]    In order to update the firmware of MCU&#39;s  101 ,  103 , and  105  by the host system, system  100  performs the following.
       1. When a host system (not shown) needs to update all the firmware of the MCU&#39;s of the processor  100 , the host system, through communications interface  109 , initiates a request.   2. MCU  101  (primary MCU) initiates the same request to the secondary MCU&#39;s (MCU  103  and MCU  105 ) through internal communication bus  111 .   3. Secondary MCU&#39;s  103  and  105  respond, over internal communications bus  111 , to primary MCU  101  about their existing firmware version.   4. Primary MCU  101  notifies the host system about the different versions of the firmware of MCU&#39;s  101 ,  103 , and  105 .   5. Host system sends the firmware of the current (original) versions of MCU&#39;s  101 ,  103 , and  105  together with the updated versions through communications interface  109 .   6. When primary MCU  101  has received the firmware images, all the programs (computer-executable instructions) are stored in flash memory  107 .   7. All programs are verified with checksum or any other data security mechanism by primary MCU  101 .   8. Primary MCU  101  internal communication bus  111  to determine whether secondary MCU&#39;s  103  and  105  have stopped operation so that primary MCU  101  can start the firmware update.   9. If primary MCU  101  fails to successfully update, primary MCU  101  reverts back to the original version from flash memory  107  since the host system also sent the original version.   10. If primary MCU  101  successfully updates, primary MCU  101  informs the secondary MCU  103  to start its firmware update. If secondary MCU  103  unsuccessfully updates, both MCU&#39;s  101  and  103  revert back to their original firmware. (In such a case, MCU  105  did not update so it does not need to revert back.)   11. Step  10  is applied to the remaining secondary MCU&#39;s (e.g., MCU  105 ) until all secondary MCU&#39;s have successfully updated.       
 
         [0043]      FIG. 2  shows flow diagram  200  for updating computer-readable instructions (e.g., firmware) in a processor system (e.g., system  100 ) in accordance with an embodiment of the invention. With embodiments, flow diagram  200  is executed by the primary processor (e.g., primary processor  101 ) of the processor system. In step  201 , the processor system determines whether the host system has requested a firmware update. If not, process  200  is terminated. Otherwise, the processor system identifies the firmware versions for the processors (e.g., MCU&#39;s  101 ,  103 , and  105 ) in the processor system. In response, the host system sends both the updated firmware version and the original (current) firmware version of each processor over a communications channel to the processor system. With embodiments of the invention, if firmware for a processor has not changed, that processor is not updated. The original firmware versions and the updated firmware versions are subsequently stored in memory, e.g., flash memory  107 . 
         [0044]    In step  209 , the primary processor updates its firmware with the updated firmware version. If the firmware update of the primary processor is not successful, then the primary processor reverts to the original firmware version in step  213 , and the processor system terminates process  200 . (A firmware update may fail for different reasons, typically because of a hardware problem. For example, a memory bit may be stuck to “1” while the corresponding bit of the updated firmware is “0.” In such a case, the old firmware may still be executed.) If the firmware update is successful in step  211 , then the processor system continues to update the remaining secondary processors (e.g., processors  103  and  105 ) with the updated firmware versions in steps  217 ,  219 ,  221 , and  225 . When all of the secondary processors have been updated, process  200  is terminated. Different secondary processors may have different firmware versions to execute different functions with in the processor system. If the firmware update fails for any of the secondary processors, the secondary processor, as well as any secondary processor and the primary processor that were previously updated, reverts to the original firmware version in step  221 ,  213  and process  200  terminates in step  215 . 
         [0045]      FIG. 3  shows block diagram  300  of a processor (e.g., processor  101 ,  103 , or  105 ) in accordance with an embodiment of the invention. Processing circuit  301  executes computer-executable instructions (corresponding to a bootstrap loader) accessed from internal memory  303  in order update its firmware. With embodiments of the invention, the firmware may include both computer-executable instructions for bootstrap loading and for performing intended functions (e.g., controlling an HVAC system). After the firmware has been updated, processing circuit  301  may execute computer-executable instructions to perform its intended functions. 
         [0046]    The bootstrap loader loads firmware for processor. With embodiments, internal memory  303  stores both the bootstrap loader and the operational computer-executable instructions, where the updated firmware includes both loader firmware and operational firmware. The loader firmware is typically unchanged in the updated firmware version. (With embodiments of the invention, the bootstrap loader is not updated.) However, embodiments also support configurations in which the bootstrap loader is accessed from a separate memory device (not shown) and may not be updated with the operational firmware that is stored in memory  303 . Once the firmware has been loaded (updated), processing circuit  301  executes the operational firmware in order to perform its intended functions. 
         [0047]    Updated firmware is obtained through external memory interface  305 , which interfaces to external memory, e.g., flash memory  107 . The firmware image may be transferred directly to internal memory  303  from external memory interface  305  (direct memory access) or may be transferred through processing circuit  301 . 
         [0048]    Processing circuit  301  communicates over internal communications bus  111  through internal communications interface  309  in order to communicate with other processors in the processor system. 
         [0049]    Processing circuit  300  accesses peripheral devices through peripheral interface  307 . Processing circuit  300  may perform intended functions by controlling external peripheral devices (e.g., a thermostat or a motor controller). For example, processing circuit  300  may support communication and protocol processing, where a LCD display and keypad are accessed through peripheral interface  307 . Also, when processor  300  operates as the primary processor, processor  300  may communicate with a host system through peripheral interface  307 . 
         [0050]      FIGS. 4-10  show scenarios that may be supported by system  100  in order to update firmware. As shown in  FIG. 4 , host system  401  asks primary processor  404  about the firmware versions of processors  403 ,  405 , and  407  in step  451 . Primary processor  403  obtains the current firmware versions of secondary processors  405  and  407  in steps  453 - 459 . Primary processor  403  subsequently reports the current firmware versions of the processors (including itself) to host system  401  in step  461 . In the scenarios shown in  FIGS. 4-10 , it is assumed that only processors  403  and  405  are updated. 
         [0051]    As shown in  FIG. 5 , host  401  sends current and updated firmware versions for processors  403  and  405  to primary processor  403  in step  551 . The firmware images are saved into flash memory  409  in step  553 . As shown in  FIG. 6 , primary processor  403  accesses its updated firmware image from flash memory  409  in step  651  and updates its firmware in step  653 . 
         [0052]    Firmware update  653  will either fail or succeed as shown in  FIG. 7  and  FIG. 8 , respectively. If the update fails, primary processor  403  reads the old firmware image from flash memory  409  in step  751  and reverts to the old firmware in step  753 . Primary processor  403  reports the results of the firmware update in step  755 . If the update succeeds, primary processor  403  instructs secondary processor  405  to update its firmware in step  851 . Consequently, processor  405  reads its updated firmware image from flash memory  409  in step  853  and updates its firmware in step  855 . 
         [0053]    Firmware update  855  will either fail or succeed as shown in  FIG. 9  and  FIG. 10 , respectively. If the update fails, secondary processor  405  informs primary processor  403  of the failure in step  951 . In steps  953 - 963  processors  403  and  405  revert back to the old version of the firmware, Primary processor  403  subsequently reports the results of the firmware update in step  965 . If the update succeeds, primary processor  403  informs host system  401  about the firmware update in step  1051 . 
         [0054]    Embodiments of the invention may include forms of computer-readable media. Computer-readable media include any available media that can be accessed by a computing device  101 . Computer-readable media may comprise storage media and communication media. Storage media include volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer-readable instructions, object code, data structures, program modules, or other data. Communication media include any information delivery media and typically embody data in a modulated data signal such as a carrier wave or other transport mechanism. 
         [0055]    Although not required, one of ordinary skill in the art will appreciate that various aspects described herein may be embodied as a method, a data processing system, or as a computer-readable medium storing computer-executable instructions. For example, a computer-readable medium storing instructions to cause a processor to perform steps of a method in accordance with aspects of the invention is contemplated. For example, aspects of the method steps disclosed herein may be executed on a processor on a computing device  101 . Such a processor may execute computer-executable instructions stored on a computer-readable medium. 
         [0056]    As can be appreciated by one skilled in the art, a computer system with an associated computer-readable medium containing instructions for controlling the computer system can be utilized to implement the exemplary embodiments that are disclosed herein. The computer system may include at least one computer such as a microprocessor, digital signal processor, and associated peripheral electronic circuitry. 
         [0057]    Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.