Abstract:
A bit-stream converter capable of converting a first synchronous compressed bit-stream of data at a first sampling rate to second synchronous compressed bit-stream frame of data at a second sampling rate is disclosed. The bit-stream converter architecture may include a payload length detector and a zero stuffing unit in signal communication with the payload length detector. The zero stuffing unit is capable of zero stuffing section responsive to the payload length detector detecting the payload length.

Description:
FIELD OF THE INVENTION  
         [0001]    This invention relates generally to the field of data communications. In particular, the invention relates to data communication systems that utilize compressed bit-streams.  
         RELATED ART  
         [0002]    The complexity of consumer video and audio electronics component systems is increasing at rapid pace. Systems such as compact disk (“CD”), laserdisc, digital video disc or digital versatile disc (“DVD”), mini-disk, and others are now common. As a result, a modern trend is to integrate all these systems into home theater and automotive entertainment systems.  
           [0003]    Generally, current CD and DVD chipsets provide a Sony/Philips Digital Interface (“S/PDIF”) that outputs audio in bit-streams of data according to the ISO/IEC 60958 (i.e., linear pulse code modulation (“PCM”)) and ISO/IEC 61937 (i.e., non-linear PCM) standards. Typically, compressed multi-channel audio bit-streams, such as Dolby Digital® (AC-3), DTS®, MLP®, MP3®, MPEG II®, MPEG II-AAC® etc. are formatted according to ISO/IEC 61937 and are conveyed over S/PDIF to an external audio decoder. The bit-streams of data are bi-phased coded with a symbol frequency of 64 times (for very low bit-rates 128 times) the original sampling-rate (“f sample ”). A S/PDIF receiver typically locks on the bit-stream and synchronously generates the f sample  for decoding the bit-stream of data. The sampling frequency of the original bit-stream may cover the range of 8-192 kHz (e.g., CD are typically 44.1 kHz, DVD-V typically 48 kHz, DVD-A typically 96 kHz, etc.).  
           [0004]    Multimedia networks may be utilized to integrate CD and DVD type components into modern home theater and automotive entertainment systems. Unfortunately, many multimedia networks operate in a synchronous manner at a constant rate of e.g. 44.1kHz that is different than the encoded audio source. In order to transport digital audio from a digital source (such as a CD or DVD) to a destination (such as a decoding amplifier) over the synchronous channels, the audio sampling rate (e.g. 48 kHz for a DVD) needs to be adapted to the multimedia network sampling rate (44.1 kHz). A previous approach to adapt the two sampling rates includes sample rate converting the audio. However, since compressed multi-channel audio is a bit-stream rather than pulse code modulation (“PCM”) samples, this approach cannot be applied immediately. The audio needs to be decoded first into typically 5.1 PCM channels and then sample rate conversion may be applied prior to sending it over multimedia network. Decoded audio, however, occupies much more bandwidth than the compressed bit-stream. Therefore, there is a need for a system that is capable of adapting the two sampling rates.  
         SUMMARY  
         [0005]    This invention provides a bit-stream converter capable of converting a first synchronous compressed bit-stream frame of data at a first sampling rate to a second synchronous compressed bit-stream frame of data at a second sampling rate. Such a bit-stream converter may utilize a system architecture that performs a process for converting a first synchronous compressed bit-stream frame of data at a first sampling rate to a second synchronous compressed bit-stream frame of data at a second sampling rate. The process may include determining a format for the first compressed bit-stream frame. The first compressed bit-stream frame may have a frame length and may include a data-burst section and a stuffing section. The data-burst section may have a payload section including a preamble section and a payload length, while the stuffing section may have a stuffing length. The process may also include zero stuffing the stuffing section in response to a particular format.  
           [0006]    The bit-stream converter architecture may include a payload length detector and a zero stuffing unit in signal communication with the payload length detector. The zero stuffing unit is capable of zero stuffing the stuffing section responsive to the payload length detector detecting the payload length.  
           [0007]    This invention also provides an inverse bit-stream converter for converting a first synchronous compressed bit-stream frame of data at a first sampling rate having zero stuffing to a second synchronous compressed bit-stream frame of data at a second sampling rate. The bit-stream converter may include a synchronization unit, a format detector in signal communication with the synchronization unit and a zero stuffing removal unit in signal communication with format detector. The format detector may be capable of determining a format for the first synchronous compressed bit-stream frame of data.  
           [0008]    Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims. 
       
    
    
     BRIEF DESCRIPTION OF THE FIGURES  
       [0009]    The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. In the figures, like reference numerals designate corresponding parts throughout the different views.  
         [0010]    [0010]FIG. 1 is a block diagram illustrating an example implementation of bit-stream conversion system.  
         [0011]    [0011]FIG. 2 is a block diagram illustrating an example format of a bit-stream.  
         [0012]    [0012]FIG. 3 is a block diagram illustrating an example implementation of the bit-stream converter element of FIG. 1.  
         [0013]    [0013]FIG. 4 is a block diagram illustrating an example implementation of the inverse bit-stream converter element of FIG. 1.  
         [0014]    [0014]FIG. 5 is a flowchart illustrating an example process preformed by the bit-stream converter of FIG. 3.  
         [0015]    [0015]FIG. 6 is a flowchart illustrating an example process preformed by the inverse bit-stream converter of FIG. 4.  
     
    
     DETAILED DESCRIPTION  
       [0016]    [0016]FIG. 1 shows a multimedia data communication system  100  including the bit-stream conversion system  102 . The bit-stream conversion system  102  may include a bit-stream converter  104  in signal communication with a source  106  and a network  108 . The inverse bit-stream converter  110  may be in signal communication with the network  108  (such as a multimedia network) and a decoder  112 .  
         [0017]    The source  106  may be a compact disk (“CD”) or derivative product, a mini-disc or derivative product, a digital video disc or digital versatile disc (“DVD”) or derivative product, or other equivalent type sources. The network  108  may be any link or network (wireless or physical link) that provides a clock (i.e. being clock master) that is different from the S/PDIF source.  
         [0018]    The bit-stream conversion system  102  converts compressed bit-streams of data from the source  106  to match the network  108  sampling rate (also known as the transport rate) without altering the audio information in the bit-stream converter  104 . The inverse bit-stream converter  110  then receives converted compressed bit-streams of data from the network  108  and determines the original sampling frequency f sample    114  and outputs new bit-stream of data  116  that is a reproduction of the bit-stream of data produced by the source  106 . The new bit-stream of data  116  is input into the decoder  112  and the decoder  112  decodes the new bit-stream of data  116  producing separate pulse coded modulation (“PCM”) channels that may be transmitted to a receiver via signal path  120 .  
         [0019]    [0019]FIG. 2 is a block diagram illustrating an example format of a bit-stream  200 . The bit-stream  200  may include numerous frames  202 . Each frame  202  may include sub-frames such as a data-burst section  204  and stuffing section  206 . The data-burst section may include a preamble and payload section  208 . The preamble may include header information such as Pa  210 , Pb  212 , Pc  214  and Pd  216 . Pa may equal 0×F872 and Pb may equal 0x4E1F. Both Pa and Pb represent a synchronization word that indicates the start of the data burst and may be utilized to obtain the sampling rate f sample . Pc represents the burst information and indicates the type of data in the bit-stream and some information and/or control for the receiver (not shown). Pd represents the length of the burst-payload in bits. The frame  202  has a period T period    218 .  
         [0020]    As an example, if the network  108  is designed to transmit CD audio signals, the network  108  may operate with a sampling frequency f sample  of approximately 44.1 kHz and may be designed to transmit two channel linear PCM signals at 44.1 kHz. If the source  106  is a DVD, instead of a CD, the source  106  may transmit bit-streams of data that include multi-channel audio signals. These multi-channel audio signals may be compressed such that their transmission rate is lower than their equivalent 2-channel PCM version. In this methodology, multi-channel audio can be transmitted utilizing less than or equal to the same channel bandwidth of linear stereo PCM. As a result, the data length of the payload section of the DVD signal will be shorter than the equivalent data length of the payload section of a CD signal. Therefore, in order to maintain the same transmission signal period T period    218  between the DVD and CD signals, zero stuffing may be utilized to expand the length of the stuffing section  206  in order to compensate for the shorter payload section  208 .  
         [0021]    For example, IEC 61937 specifies how non-linear PCM (compressed audio) is transferred over S/PDIF. S/PDIF is a unidirectional bi-phased coded link and there is no handshake between source  106  and the destination. The compressed audio frame always represents a constant number of samples, (1536 for Dolby Digital® AC-3). According to the compression rate, the actual data burst may be shorter (i.e., a high compression rate) or longer (i.e., a low compression rate). However, since there is no handshaking in S/PDIF, the process clocks out the data frame, which in this example is 1536×(64× sampling frequency) clock periods, before the next data burst is sent. Since the payload is lower than 1536×(64×f sample ), the rest is filled with zero bits (“zero stuffing”).  
         [0022]    By reducing and/or stretching the zero-stuffing, the burst-payloads may be transported at a different data rate without affecting the payload. In a typical Dolby Digital® bit-stream the sampling frequency is 48 kHz and the compression rate is 448 kbps. One compressed Dolby Digital® frame always represents 1536 samples. The original repetition rate between 2 data bursts is, therefore, 1536/48 kHz=32 ms. If the network is operating at 44.1 kHz, the repetition rate equivalently needs to be reduced to 1411.2 in order not to loose any information (1411.2/44.1 kHz=32 ms). Consequently, the amount of zero-stuffing should be reduced by 124.8 IEC 60958/61937 frames. Because 1411.2 is a rational number, the goal is to reduce the stuffing of 4 consecutive burst-payloads by 125 frames (1411) and the 5 th  burst-payload by 124 IEC 60958/61937 frames (1412), such that the average data rate of 1411.2 is respected.  
         [0023]    In this example, the original frame repetition rate is 32 ms (burst-payload and stuffing). However, for a network clock (e.g. 44.1 kHz) that is lower than the source clock (e.g. 48 kHz), less bits need to be transported before starting the next frame. Therefore, the amount of zeros should be reduced because it does not affect the payload. The amount of reduction is represented by the relation of 48/44.1. Because this relation is not an integer, an approach is applied that is similar to a leap-year correction. Here, every fifth frames is slightly longer so that the average frame rate remains 32 ms. If the source is at a lower f sample  (say 32 kHz) than the network, then the amount of zeros has to be increased (stretched) correspondingly.  
         [0024]    For other formats, the compression may be relatively low. For example, the DTS format has 6 IEC 60958/61937 zero-frames available between 2 burst-payloads. This is less than required for bit-stream conversion from 48 kHz to 44.1 kHz. Therefore, in this example, a 2 nd  stereo transport channel may be utilized to transport all information at 44.1 kHz (assume DTS 48 kHz, bit-rate=1509.75 kbps). The following table summarizes some typical examples:  
                                                                                     IEC 61937                       Repetition       Network           Preamble   Period   Bit-rate (kbps)/   Repetiton Period       Format   Pc   Frames (bytes)   Payload (bytes)   for 44.1 kHz                                AC-3   (48 kHz)   1   1536 (6144)   (32-640)/   1411.2   (4x1411 + 1x1412)                       (128-2560)       MP3   (32 kHz)   5   1152 (4608)       1587.6   (4x1588 + 1x1586)       MP3   (44.1 kHz)   5   1152 (4608)       1152       MP3   (48 kHz)   5   1152 (4608)       1058.4   (4x1058 + 1x1060)       AAC   (48 kHz)   7   1024 (4096)       940.8   (4x941 + 1x940       DTS I   (48 kHz)   11    512 (2048)    754.50/1006   470.4   (4x470 + 1x472)       DTS II   (44.1 kHz)   12   1024 (4096)   1234.00/4096   1024       DTS I   (48 kHz)   11    512 (2048)   1509.75/2013   470.4   (4x470 + 1x472)       DTS III   (24/96)   13   2048 (8192)       940.8   (4x941 + 1x940)                  
 
         [0025]    [0025]FIG. 3 is a block diagram illustrating an example implementation of the bit-stream converter  104 . The bit-stream converter  104  may include a synchronization unit  300 , a frequency detector  302 , a payload length detector  304 , a zero stuffing unit  306  and a counter  308 . The synchronization unit  300  is in signal communication with the source  106  via a signal path  310 . The synchronization unit  300  is also in signal communication with frequency detector  302  and counter  308 . Frequency detector  302  is in signal communication with both the synchronization unit  300  and the payload length detector  304 . The zero stuffing unit  306  is in signal communication with the payload length detector  304 , the counter  308  and the network  108  via signal path  312 . The counter  308  may be a modulo-N counter (in this case N=5).  
         [0026]    In operation, the synchronization unit  300  (also known as “SYNC”) identifies the preamble Pa, Pb, Pc and Pd of a new burst-payload. The SYNC compares the bit-stream to the preamble Pa and Pb, and if a match is found, the SYNC triggers the modulo-N (here N=5) counter for correct zero stuffing modification at the zero stuffing unit  306 . Pc may act to identify the type of encoding. The SYNC reads the Pc, the frequency detector  302  detects the sampling frequency and the length of the payload is determined by the payload length detector (from reading Pd) in order to modify the zero stuffing by the zero stuffing unit  306 . This methodology also may determine how many network channels need to be allocated in parallel.  
         [0027]    [0027]FIG. 4 is a block diagram illustrating an example implementation of the inverse bit-stream converter  110 . The inverse bit-stream converter  110  may include a synchronization unit  400 , a format detector  402 , a frequency detector  404  and a phase lock loop (“PLL”)  406 . The synchronization unit  400  is in signal communication with the network  108 , the format detector  402  and the frequency detector  404 . The frequency detector  404  is in signal communication with the PLL  406  and the decoder  112 .  
         [0028]    In operation, the inverse bit-stream converter  110  extracts the original bit-stream information and triggers the PLL  406  to generate synchronously the original sampling frequency  114 . For example, if the network clock  420  is operating at 44.1 kHz but the frequency detector  404  detects that the original bit-stream is at 48 kHz, the PLL  406  is driven by the network clock  420  and the frequency detector  404  to recover the  48  kHz required by the decoder  112 . The decoder  112  uses the parameters from  402  and  404  to properly decode the audio in order to produce and output a signal via signal path  120 .  
         [0029]    A controller (not shown) may be utilized to control the operation of the bit-stream converter  104  and inverse bit-stream converter  110 . The controller may be any type of control device that may be selectively implemented in software, hardware (such as a computer, processor, micro controller or the equivalent), or a combination of hardware and software. The controller may utilize optional software (not shown).  
         [0030]    The software, includes an ordered listing of executable instructions for implementing logical functions, may selectively be embodied in any computer-readable (or signal-bearing) medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that may selectively fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. In the context of this document, a “computer-readable medium” and/or “signal-bearing medium” is any means that may contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer readable medium may selectively be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. More specific examples “a non-exhaustive list” of the computer-readable medium would include the following: an electrical connection “electronic” having one or more wires, a portable computer diskette (magnetic), a RAM (electronic), a read-only memory “ROM” (electronic), an erasable programmable read-only memory (EPROM or Flash memory) (electronic), a Magnetic Random Access Memory (“RAM”), a Ferro Random Access Memory (“FRAM”), a chalcogenide memory or Ovonic Universal Memory (“OUM”), a polymer memory, a MicroElectroMechanical ( MEMS”) memory and a write once 3D memory, an optical fiber (optical), and a portable compact disc read-only memory “CDROM” (optical). Note that the computer-readable medium may even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.  
         [0031]    [0031]FIG. 5 is a flowchart  500  illustrating an example process performed by the bit-stream converter  104 . This process may be performed by hardware, software or combination of both. The process starts  502  with the input reception  504  of information such as a bit-stream of data by bit-stream converter  104 . The synchronization unit  300  determines the preamble values Pa, Pb, Pc and Pd  506 . In decision  508 , a comparator unit (not shown) within the synchronization unit  300  compares the bit-stream to the preamble parameters Pa and Pb  508 . If the result in the decision  508  is not an approximate match between the bit-stream and preamble values Pa and Pb, the process returns  509  to step  504  and repeats.  
         [0032]    If instead the result of decision  508  is an approximate match between the bit-stream and preamble values Pa and Pb, the counter is started  510  and the sampling frequency of the bit-stream is determined  512 . Next, the payload length detector  304  determines the payload length  514 . Next, the zero stuffing unit stuffs the stuffing section with the appropriate number of zeros  516  and the process ends at step  518 .  
         [0033]    [0033]FIG. 6 is a flowchart  600  illustrating an example process performed by the inverse bit-stream converter  110 . The example process may be performed by hardware, software or combination of both. The process starts at step  602  with the input and reception of the bit-stream data  604  by the inverse bit-stream converter  110 . The synchronization unit  400  determines the preamble values Pa, Pb, Pc and Pd  606 . In decision  608 , a comparator unit (not shown) within the synchronization unit  400  compares the bit-stream to the preamble parameters Pa and Pb. If the result in decision step  608  is not an approximate match between the bit-stream and preamble values Pa and Pb, the process returns  610  to step  604  and repeats.  
         [0034]    If instead the result of decision  608  is an approximate match between the bit-stream and preamble values Pa and Pb, the format detector determines the format type Pc of the bit-stream  612 . The frequency detector then determines the original sampling frequency of the compressed audio  614 . Next, the decoder  112  decodes the bit-stream  616  and produces an output signal that is transmitted to a receiver, e.g. a digital to analog converter (not shown). The PLL locks on to the sampling frequency of the bit-stream  618  and produces the original frequency rate  114  of the original bit-stream. The process then ends in step  620 .  
         [0035]    While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible that are within the scope of this invention.