Abstract:
A method for recovering a content of a basic input output system (BIOS) of a computing system, includes the steps of: providing an externally electrical connection to said BIOS and said computing system; providing an operable recovery source for said BIOS and connectable with said computing system via said externally electrical connection; recording recovery information from said recovery source via said externally electrical connection; and switching said externally electrical connection of said recovery source to another electrical connection between said BIOS and said computing system so as to replace said content of said BIOS by said recovery information.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a divisional of U.S. patent application Ser. No. 11/025,156, filed on Dec. 29, 2004, now U.S. Pat. No. 7,354,278 titled “RECOVERY APPARATUS FOR BIOS CHIP IN A COMPUTER SYSTEM”. 
    
    
     BACKGROUND 
     1. Field of the Invention 
     The present invention relates to a recovery method, and more particularly to a BIOS recovery method for recovering a basic input output system (BIOS) chip of a motherboard in a computer system. 
     2. Description of Related Art 
     The use of computers, especially personal computers (PCs) is widespread. The computing power of the PC, whether coupled to a network or operating as a stand-alone device, has increased significantly as new computer designs move into production. In view of the fact that many computer users are relatively unfamiliar with the technical aspects of computer operation, computer manufacturers have made a concerted effort to simplify operation of the computer. For example, many computer systems are pre-loaded with computer software so that a purchaser simply plugs the computer in and turns it on. In addition, software manufacturers have attempted to simplify the operating system itself. 
     However, there are still certain aspects of computer operation that baffle the typical user, and can cause significant difficulties even for the more experienced user. For example, when the computer is first powered up or reset, a software program, typically designated as a “basic input-output system” (BIOS) initializes the computer and permits the startup of an operating system, such as Microsoft MS-DOS. The BIOS program typically resides in a nonvolatile memory such as a read-only memory (ROM), an electrically programmable read only memory (EPROM), electrically erasable programmable nonvolatile memory (EEPROM) and flash memory devices (e.g., flash EEPROM). If the BIOS chip is defective for any reason, the computer will not function properly. Therefore, the BIOS chip is firstly needed to be detached from a motherboard. Then it is reattached to the motherboard after being reprogrammed with a recovery disc. This operation is inconvenient and time-consuming and likely to damage the motherboard in attachment and/or detachment of the BIOS chip. 
     What is needed, therefore, is a BIOS recovery method to recover from a BIOS ROM failure that does not require BIOS ROM detached from the motherboard. 
     SUMMARY 
     A method for recovering a content of a basic input output system (BIOS) of a computing system, includes the steps of: providing an externally electrical connection to said BIOS and said computing system; providing an operable recovery source for said BIOS and connectable with said computing system via said externally electrical connection; recording recovery information from said recovery source via said externally electrical connection; and switching said externally electrical connection of said recovery source to another electrical connection between said BIOS and said computing system so as to replace said content of said BIOS by said recovery information. 
     Other advantages and novel features of the present invention will become more apparent from the following detailed description of a preferred embodiment when taken in conjunction with the accompanying drawings, in which: 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is an isometric view of a BIOS recovery apparatus in accordance with a preferred embodiment of the present invention; 
         FIG. 2  is a circuit diagram of the BIOS recovery apparatus of  FIG. 1 ; 
         FIG. 3  is an isometric view of a BIOS recovery apparatus in accordance with a second embodiment of the present invention; and 
         FIG. 4  is a circuit diagram of the BIOS recovery apparatus of  FIG. 3 . 
     
    
    
     DETAILED DESCRIPTION 
     Referring to  FIGS. 1 and 2 , a BIOS recovery apparatus in accordance with the preferred embodiment of the present invention comprises a button switch  100 , insulated flexible cords  101 ,  102 ,  103 , and a connecting socket  106 . 
     The connecting socket  106  comprises a top socket  50 , a bottom socket  51  and a printed circuit board  52 . The top socket  50  and the bottom socket  51  are both plastic leaded chip carriers and symmetrically attached to opposite sides of the printed circuit board  52  respectively. Except pins  12 , all the pins of the top socket  50  are soldered with corresponding pins of the bottom socket  51 . A pin  32  and a pin  8  of the top socket  50  are soldered together, and a pin  32  and a pin  8  of the bottom socket  51  are soldered together. The bottom socket  51  is used to receive a primary BIOS chip (not shown) of a motherboard in a computer system. The top socket  50  is used to receive a secondary BIOS chip (not shown) therein. 
     The recovery procedure will be described in detail below. The secondary BIOS chip is inserted into the top socket  50  and the primary BIOS chip on the motherboard is inserted into the bottom socket  51 . Thus, pins of the primary BIOS chip and pins of the secondary BIOS chip are electrically connected with each other except the corresponding pins that correspond to the pins  12  of the top socket  50  and the bottom socket  51  via the connecting socket  106 . First terminals of the insulated flexible cords  101 ,  102 ,  103  are connected to nodes  2 ,  3 ,  1  of the button switch  100 , respectively. Second terminals of the insulated flexible cords  101 ,  102 ,  103  are connected to the pin  32  and the pin  12  of the bottom socket  51 , and the pin  12  of the top socket  50 . This time, a corresponding pin of the primary BIOS chip that corresponds to the pin  12  of the bottom socket  51  is floating so that it is in a state of low voltage. And the primary BIOS chip can be designated to work only when the corresponding pin is in a low voltage state. A corresponding pin of the secondary BIOS chip that corresponds to the pin  32  of the top socket  50  is connected to a power-supply of 3.3V for being provided with a working voltage. Corresponding pins of the first and secondary BIOS chips that correspond to pins  8  of the top and bottom sockets are writing-protecting ports and are disabled in low voltage state. 
     The button switch  100  is firstly set in an initial state, that is, the node  2  is connected with the node  3  and this results in that the pin  12  and the pin  32  of the bottom socket  51  are connected together and the pin  12  of the top socket  50  is floating. So the corresponding pin of the primary BIOS chip that corresponds to the pin  12  of the bottom socket  51  is connected with the corresponding pin that corresponds to the pin  32  of the bottom socket  51 . The voltage of the corresponding pin of the primary BIOS chip that corresponds to the pin  12  of the bottom socket  51  is changed from low to high and a voltage of the corresponding pin of the secondary BIOS chip that corresponds to the pin  12  of the top socket  50  is low because of being floating. The motherboard is now started from the secondary BIOS chip. At the time, voltages of the corresponding pins that correspond to the pins  8  and the corresponding pins that correspond to the pins  32  of the top socket  50  and bottom socket  51  are high and they are permitted data to be written in. 
     In operation, the computer is firstly booted into a disk operation system (DOS) mode, and a burning software and a normal burning file of corresponding motherboard are copied to the DOS. The button switch  100  is then pressed to connect the node  2  and the node  1  together. Thus, the pin  12  of the top socket  50  is connected with the pin  32  of the bottom socket  51  and the pin  12  of the bottom socket  51  is floating. At the time, the corresponding pin of the secondary BIOS chip that corresponds to the pin  12  of the top socket  50  is connected to the corresponding pin of the primary BIOS chip that corresponds to the pin  32  of the bottom socket  51  and it is changed from low voltage to high voltage. The corresponding pin of the primary BIOS chip that corresponds to the pin  12  of the bottom socket  51  is floating and it is changed from high voltage to low voltage. As a result, the secondary BIOS chip does not work and the primary BIOS chip works. Then the BIOS burning software and the normal burning file are executed to reprogram the primary BIOS chip. The power of the motherboard is cut off and the BIOS recovery apparatus is taken out when the burning process is completed. 
     Referring to  FIGS. 3 and 4 , showing a BIOS recovery apparatus in accordance with a second embodiment of the invention. The difference between the two embodiments is that the button switch  100  is displaced with a parallel port controller  200 . A first terminal of the insulated flexible cord  101  is connected with the pin  32  of the bottom socket  51  and a first terminal of the insulated flexible cord  102  is connected with the pin  12  of the bottom socket  51 . A first terminal of the insulated flexible cord  103  is connected with the pin  12  of the top socket  50 . The parallel port controller  200  comprises a parallel port  201 , a resistor  202  and a photoelectric coupling  203 . The parallel port  201  is communicated with a parallel port of a motherboard. A second terminal of the insulated flexible  101  is connected with a first terminal of the resistor  202  and a second terminal of the insulated flexible  102  is connected to a pin D 0  of the parallel port  201 . A second terminal of the resistor  202  is connected to the insulated flexible  102 . Terminals a, b of the photoelectric coupling  203  are connected to the pins D 1 , D 2 , respectively. Terminal c of the photoelectric coupling  203  is connected with a second terminal of the insulated flexible cord  103  and terminal d of the photoelectric coupling  203  is connected to the insulated flexible cord  101 . 
     The operating process of the BIOS recovery apparatus will be described in detailed below. The secondary BIOS chip is inserted into the top socket  50  and the primary BIOS chip on the motherboard is inserted into the bottom socket  51 . Thus, pins of the primary BIOS chip and pins of the secondary BIOS chip are shunt-wounded respectively except the pins  12 . The motherboard is powered on and an initial value of the data register of the parallel  201  is 0XFFH. At the time, the photoelectric coupling  203  does not work. The pin  12  of the bottom socket  51  maintains a high voltage because of effect of the resistor  202 , and the pin  12  of the top socket  50  is in a low voltage state because of floating. As a result, the corresponding pin of the secondary BIOS chip that corresponds to the pin  12  of the top socket  50  is in a low voltage state and the corresponding pin of the primary BIOS chip that corresponds to the pin  12  of the bottom socket  51  is in a high voltage state. The motherboard is started from the secondary BIOS chip now. And corresponding pins of the primary and secondary BIOS chips that correspond to the pins  8  and the pins  32  of the top and bottom sockets  50 ,  51  are in high voltage states and they are permitted data written therein. The computer is booted into a DOS mode and the value of the data register of the parallel  201  is edited from 0XFFH to 0XFAH. The voltage of the pin  12  of the bottom socket  51  is changed from high to low and the photoelectric coupling  203  begins to work. The pin  12  of the top socket  50  is communicated with the pin  32  of the bottom socket  51  and voltage of the corresponding pin of the primary BIOS chip that corresponds to the pin  12  of the bottom socket  51  is changed from high to low. The corresponding pin of the secondary BIOS chip that corresponds to the pin  12  of the top socket  50  is communicated with the corresponding pin of the primary BIOS chip that corresponds to the pin  32  of the bottom socket  51  and its voltage is changed to high. So the secondary BIOS chip does not work and the primary BIOS chip works. The burning software and the normal burning file can be executed now to reload the primary BIOS chip. 
     It is to be understood, however, that even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and function of the invention, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.