Abstract:
A method for transferring data between a data source and a data sink which are controlled by a common clock provides a handshake-based streaming data protocol for intra-circuitry data transfer between and through functional units of a system built in an integrated circuit.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims priority of European Patent Application No. 09016149.8 filed on Dec. 30, 2009, the entire disclosure of this application being hereby incorporated herein by reference. 
       FIELD OF THE INVENTION 
       [0002]    The invention relates to a method for transferring data between a data source and a data sink which are controlled by a common clock. 
       BACKGROUND OF THE INVENTION 
       [0003]    Data streaming is known as a method for data transfer. 
         [0004]    A simple method to transfer streaming data is by a handshake-type protocol wherein the transmitting entity and the receiving entity synchronize via direct acknowledgment signals. A transmitting party or data source signalizes to be ready for transmission when data are to be sent, and a receiving party or data sink signalizes to be ready for reception when it can or want to process new data. Data transfer does not start unless both the source is ready to transmit and the sink is ready to receive. 
         [0005]    The object of the invention is to provide a handshake-based streaming data protocol for intra-circuitry data transfer between and through functional units of a system built in an integrated circuit. 
         [0006]    A particular object of the invention is to provide a data streaming method that can be used in a modem of a wireless communication device and that enables to realize a low power, low size communication device. 
       SUMMARY OF THE INVENTION 
       [0007]    According to the invention there is provided a method for transferring data between a data source and a data sink which are controlled by a common clock. The method is particularly useful for streaming data within a system on an integrated circuit. The method comprises sending a stream of data elements from said source to said sink; simultaneously sending a first binary signal from source to sink, said first signal being low if the data element is to be ignored by the sink and otherwise being high; simultaneously sending a second binary signal from sink to source, said second signal being low if the data element is not accepted by the sink and otherwise being high; and simultaneously sending a third binary signal which marks the beginning and the end of a logical group of data elements within the data stream. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0008]    Additional features and advantages of the present invention will be apparent from the following detailed description of specific embodiments which are given by way of example only and in which reference will be made to the accompanying drawings, wherein: 
           [0009]      FIG. 1  shows the signal flow between data source and sink according to the data streaming protocol of the invention; 
           [0010]      FIG. 2  illustrates one exemplary embodiment of the signal forms of the transfer protocol according to the invention; 
           [0011]      FIG. 3  illustrates an exemplary embodiment of data paths between functional units of a circuit device in which the protocol of the invention can be applied; and 
           [0012]      FIG. 4  shows an exemplary component architecture of any of the functional units of  FIG. 3 . 
       
    
    
     DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS 
       [0013]    The invention provides a protocol for high speed data streaming in communication devices which will be referred to as Simple Streaming Link (SSL) below. 
         [0014]    The origin of the data stream is called a ‘source’  1 , the destination is called a ‘sink’  2 , as shown in  FIG. 1 . Data source  1  and a data sink  2  are controlled by a common clock  3 . 
         [0015]    SSL comprises four signals: sdata, svalid, saccept, sframe, as illustrated in  FIG. 2 . ‘Clk’ is the clock signal from common clock  3 . 
         [0016]    A stream of data elements that is to be transmitted from source  1  to sink  2  may have a width of multiple bits, e.g. 7, 16, 24, 32 bits. 
         [0017]    A first binary signal, svalid, is sent from source to sink. It is low if the data element is to be ignored by the sink, and otherwise it is high. 
         [0018]    Simultaneously, a second signal, saccept, is sent from sink to source. This second signal is low if the data element is not accepted by the sink, and is otherwise high. 
         [0019]    The svalid and saccept signals thus realize a kind of handshake between source and sink. 
         [0020]    According to the invention, the streaming data protocol comprises a third signal, sframe. Source  1  and sink  2  must have the same understanding of what the sframe signal means. 
         [0021]    Some of the possible uses of the sframe signal are:
       (1) Data transfer only occurs if saccept, svalid and sframe signals are high. The sframe signal marks the beginning and end of a logical group of data elements within the data stream, or a data block transfer. The example of  FIG. 2  shows a data block or ‘frame’ composed of four data elements D 0 , D 1 , D 2 , and D 3 .   (2) Two streams are multiplexed over one link, and the sframe signal is used to distinguish between the first and the second stream.   (3) The sframe is used to distinguish between data transfer and control transfer.   (4) The sframe signal is not used in which case the sframe signal is always set to high.       
 
         [0026]    The source can set the svalid and sframe signals in advance. 
         [0027]    The sink can set the saccept signal in advance. 
         [0028]    A ‘frame’ in the sense of the invention is a logical group or sequence of data, such as e.g. an OFDM symbol, a block of control data, a block of information data, etc. 
         [0029]    The sframe signal can be used to/for:
       mark the beginning and the end of a logical group/sequence   Synchronization between functional components of a communication device on data level   Differentiate between control and data information.   Differentiate between two separate data streams transmitted over the same SSL; for example the third binary signal being high may signify the data belonging to a first logical data stream, and the third binary signal being low may signify the data belonging to a second logical data stream, or vice versa.   control purposes, e.g. for dynamic clock gating to decrease power consumption.       
 
         [0035]    A particular advantage of the invention is, that the sink does not need to count data to detect the end of a logical group or sequence. Also, the SSL protocol of the invention can be used for activity detection and power control. Another application that is contemplated is reconfiguration control of a switching matrix and the accelerators of functional subsystems in an IC modem architecture as described below in conjunction with  FIGS. 3 and 4 . 
         [0036]    In one application example the SSL protocol of the invention is advantageously used for streaming large amounts of data through subsystems of a communication device, e.g. functional units of an LTE modem. 
         [0037]    For example,  FIG. 3  illustrates datapaths of streaming data in an LTE layer  1  subsystem that comprises a plurality of functional units  10 - 90 , in particular digital front end (DFE) unit  10 , LTE Tx unit  20 , shared RAM unit  30 , forward error correction (FEC) data unit  40 , fast Fourier transform (FFT) unit  60 , parameter estimation unit  70 , equalizer unit  80 , searcher unit  50 , and FEC control unit  90 . Here, high rate data streams can be distributed using the Simple Streaming Link (SSL) protocol of the invention without any addressing. SSL data paths are illustrated in large hatched arrows. The low rate and control accesses (illustrated in thin arrows) can be done over a second protocol that comprises addressing, e.g. a AHB based protocol. Any of the functional units  10 - 90  may be regarded as a data source  1  or data sink  2  in the sense of the invention. 
         [0038]    The SSL protocol of the invention can also be used for streaming data through functional units of a system implemented in an IC. For example,  FIG. 4  illustrates an exemplary component architecture for any of the functional units  10 - 90  shown in  FIG. 3 . 
         [0039]    Each of the functional units  10 - 90  may comprises a plurality of sub-components including a local RISC or digital signal processor  440 , a plurality of hardware accelerators  421 - 423 , and, optionally, at least one memory module  430 . Also, each of the functional units may comprise a switching matrix  410  connected between a streaming data input of the respective functional unit and each of said sub-components. The switching matrix can be configured at run time. 
         [0040]    Local processor  440 , in this application example, is adapted to receive task instructions from a controller  6  of the modem device (shown in  FIG. 3 ) over a first bus system using a first protocol. The first protocol includes addressing and may be an AHB based protocol. The local processor, in response to the task instructions from the controller, configures the sub-components  421 - 423 ,  430  and switches switching matrix  410  to selectively produce connections between the data streaming input and said sub-components in a manner to perform the dedicated task. 
         [0041]    Details on the SSL Signals are summarized in the following table: 
         [0000]    
       
         
               
               
               
               
             
           
               
                   
               
               
                 Signal 
                 Source 
                 Sink 
                 Description 
               
               
                   
               
             
             
               
                 sdata 
                 output 1 . . . n 
                 input 1 . . . n 
                 Streaming data element.  
               
               
                   
                 bits 
                 bits 
                 Standard width is 32 bits. 
               
               
                   
                   
                   
                 The data width is the  
               
               
                   
                   
                   
                 minimum granularity the 
               
               
                   
                   
                   
                 SSL supports. 
               
               
                 svalid 
                 output 1 bit 
                 input 1 bit 
                 The valid/accept handshake  
               
               
                   
                   
                   
                 is used to drive and 
               
               
                   
                   
                   
                 stall the communication  
               
               
                   
                   
                   
                 from source to sink. 
               
               
                 saccept 
                 input 1 bit 
                 output 1 bit 
                 Source and sink can set or  
               
               
                   
                   
                   
                 reset these signals at 
               
               
                   
                   
                   
                 any time. Data is taken  
               
               
                   
                   
                   
                 over if both are ‘high’ on 
               
               
                   
                   
                   
                 the rising edge of the clock. 
               
               
                 sframe 
                 output 1 bit 
                 input 1 bit 
                 Set to ‘high’ during one 
               
               
                   
                   
                   
                 block transfer, e.g. 2048 
               
               
                   
                   
                   
                 words of data. The sink can 
               
               
                   
                   
                   
                 determine the start of the  
               
               
                   
                   
                   
                 transfer by looking for a 
               
               
                   
                   
                   
                 rising edge and the end by  
               
               
                   
                   
                   
                 looking for a falling edge. 
               
               
                   
                   
                   
                 The svalid signal might  
               
               
                   
                   
                   
                 not be active in the first  
               
               
                   
                   
                   
                 cycle. sframe is ‘low’ after 
               
               
                   
                   
                   
                 a block transfer. 
               
               
                   
               
             
          
         
       
     
         [0042]    In case the sframe signal is not used by a source, it can clamp the output to “high”. In case a sink does not know how to interpret an incoming sframe signal, it can be ignored.