Abstract:
Disclosed is an alignment method which includes measuring a deviation between a design position and a measurement position, with respect to some of plural alignment execution points upon an object, to be examined, which alignment execution points have predetermined design positions, respectively, applying design positions of some alignment execution points and measured positional deviations to an approximation formula which approximates the relation between design positions and corrected positional deviations, and determining, with respect to each alignment execution point, a correction formula for calculating a corrected positional deviation on the basis of its design position, and performing an alignment procedure to be done with respect to the alignment execution points in accordance with the determined correction formula, wherein the correction formula includes a second or higher order term of design position.

Description:
FIELD OF THE INVENTION AND RELATED ART 
     This invention relates to an alignment method and alignment system and, more particularly, an alignment method and alignment system suitably usable in an apparatus which requires use of precise alignment means, such as an exposure apparatus for manufacture of semiconductor devices, for example, for precisely aligning an original (mask or reticle) with a substrate (semiconductor wafer). 
     Recent further miniaturization in size of and increases in density of a semiconductor integrated circuit such as an IC or LSI has forced further improvements in precision of and addition of function a semiconductor exposure apparatus. Particularly, as regards alignment operation, a technology for enabling registration of an original and a substrate with an order of several tens of nanometers has been expected. 
     As for exposure apparatuses for use in such semiconductor manufacture, in many cases an apparatus called a stepper or a step-and-scan apparatus is used. In this type of apparatus, a pattern formed on an original (reticle, for example) is sequentially transferred onto different zones on a substrate (semiconductor wafer, for example) while moving the substrate stepwise. An apparatus in which the pattern transfer is executed at once is called a stepper, while an apparatus in which it is executed while scanningly moving a stage is called a step-and-scan exposure apparatus. The difference between them resides in the procedure at the time as the exposure is executed. They have the same operational feature in the point of basic operation (step-and-repeat operation) wherein pattern transfer is repeated while repeating stepwise motion. 
     As regards alignment procedure for an original and a substrate in a semiconductor exposure apparatus, there are a die-by-die alignment method and a global alignment method. In the former, for each exposure, measurement of an exposure position is executed. In the latter, position measurement is performed beforehand with respect to plural measurement points of a suitable number, and alignment operation is made in accordance with a correction formula prepared on the basis of the measurements. The global alignment method has an advantage of high throughput and high alignment precision, and the alignment procedure based on the same correction formula is performed over the whole area of the substrate. It is convenient in use since, for example, the state of alignment can be discriminated by analyzing measurements at a few points on the substrate. 
     Here, an alignment method based on global method will be briefly explained. In global alignment method, from a design exposure position (x, y) and in accordance with the following correction formula, a deviation (d x  &#39;, d y  &#39;) is determined, and alignment and exposure operation is performed: 
     
         d.sub.x &#39;=a.sub.00 +a.sub.10 x+a.sub.01 y 
    
     
         d.sub.y &#39;=b.sub.00 +b.sub.10 x+b.sub.01 y                  (2) 
    
     where a 00  and b 00  are parallel deviations in X and Y directions, respectively, of a wafer as a whole, a 10  and b 10  are elongations in X and Y directions, respectively, of the wafer, a 01  and b 01  are rotational deviations of X and Y axes, respectively, of shot layout. These coefficients (hereinafter &#34;correction parameters&#34;) may be determined by measuring positional deviations at suitable number of measurement points beforehand and by applying the results to an approximation equation like equation (2). It can be done, for example, by using a least square method and in the manner described below. 
     If the positions of design measurement points are denoted by (x i , y i ) and the measurement point positions after they are corrected are denoted by (d xi  &#39;, d yi  &#39;) (where i denotes each measurement point, wherein i=0, . . . , k (k≧6)), then the square sum of errors at the measurement points after being corrected is: ##EQU1## Determining those a 00 , a 10 , a 01 , b 00 , b 10  and b 01  that minimize E, in accordance with the following normal equations, the resultants are taken as values of a 00 , a 10 , a 01 , b 00 , b 10  and b 01 , respectively. 
     The normal equations are: 
     
         ∂E/∂a.sub.00 =0 
    
     
         ∂E/∂a.sub.10 =0 
    
     
         ∂E/∂a.sub.01 =0 
    
     
         ∂E/∂b.sub.00 =0 
    
     
         ∂E/∂b.sub.10 =0 
    
     
         ∂E/∂b.sub.01 =0                  (4) 
    
     Namely, ##EQU2## where Σ represents ##EQU3## (this applies to the rest). Solutions for these normal equations are: 
     
         a.sub.00 =(C.sub.14 C.sub.16 D.sub.11 -C.sup.2.sub.15 D.sub.11 +C.sub.13 C.sub.15 D.sub.12 - 
    
     
         C.sub.12 C.sub.16 D.sub.12 +C.sub.12 C.sub.15 D.sub.13 -C.sub.13 C.sub.14 D.sub.13)/H.sub.1 
    
     
         a.sub.10 =(C.sub.13 C.sub.15 D.sub.11 -C.sub.12 C.sub.16 D.sub.11 +C.sub.11 C.sub.16 D.sub.12 - 
    
     
         C.sup.2.sub.13 D.sub.12 +C.sub.12 C.sub.13 D.sub.13 -C.sub.11 C.sub.15 D.sub.13)/H.sub.1 
    
     
         a.sub.01 =(C.sub.12 C.sub.15 D.sub.11 -C.sub.13 C.sub.14 D.sub.11 +C.sub.12 C.sub.13 D.sub.12 - 
    
     
         C.sub.11 C.sub.15 D.sub.12 +C.sub.11 C.sub.14 D.sub.13 -C.sup.2.sub.12 D.sub.13)/H.sub.1 
    
     
         b.sub.00 =(C.sub.14 C.sub.16 G.sub.11 -C.sup.2.sub.15 G.sub.11 +C.sub.13 C.sub.15 G.sub.12 - 
    
     
         C.sub.12 C.sub.16 G.sub.12 +C.sub.12 C.sub.15 G.sub.13 -C.sub.13 C.sub.14 G.sub.13)/H.sub.1 
    
     
         b.sub.10 =(C.sub.13 C.sub.15 G.sub.11 -C.sub.12 C.sub.16 G.sub.11 +C.sub.11 C.sub.16 G.sub.12 - 
    
     
         C.sup.2.sub.13 G.sub.12 +C.sub.12 C.sub.13 G.sub.13 -C.sub.11 C.sub.15 G.sub.13)/H.sub.1 
    
     
         b.sub.01 =(C.sub.12 C.sub.15 G.sub.11 -C.sub.13 C.sub.14 G.sub.11 +C.sub.12 C.sub.13 G.sub.12 - 
    
     
         C.sub.11 C.sub.15 G.sub.12 +C.sub.11 C.sub.14 G.sub.13 -C.sup.2.sub.12 G.sub.13)/H.sub.1                                         (6) 
    
     wherein 
     
         C.sub.11 =Σ1 
    
     
         C.sub.12 =Σx.sub.i 
    
     
         C.sub.13 =Σy.sub.i 
    
     
         C.sub.14 =Σx.sub.i.sup.2 
    
     
         C.sub.15 =Σx.sub.i y.sub.i 
    
     
         C.sub.16 =Σy.sub.i.sup.2 
    
     
         D.sub.11 =Σd.sub.xi 
    
     
         D.sub.12 =Σx.sub.i d.sub.xi 
    
     
         D.sub.13 =Σy.sub.i d.sub.xi 
    
     
         G.sub.11 =Σd.sub.yi 
    
     
         G.sub.12 =Σx.sub.i d.sub.yi 
    
     
         G.sub.13 =Σy.sub.i d.sub.yi 
    
     
         H.sub.1 =C.sub.11 C.sub.14 C.sub.16 -C.sub.11 C.sub.15.sup.2 -C.sub.12.sup.2 C.sub.16 +2C.sub.12 C.sub.13 C.sub.15 -C.sub.13.sup.2 C.sub.14                                                  (7) 
    
     Here, the correction formula of equation (2) is a linear equation wherein translation, rotation and expansion/contraction of the wafer are taken as error factors. Conventionally, in a global alignment method, in many cases a correction formula of linear equation such as set forth above is used. This is because sufficient precision, as is in the past, is attainable with correction by linear equation. 
     SUMMARY OF THE INVENTION 
     As described above, global alignment method has an advantage of high throughput and high precision and, as is in the past, sufficient precision is attainable with a correction formula using linear equation. 
     However, with recent increases of alignment precision, an error component having been considered small becomes non-negligible. Typical examples of such error component are a third-order magnification component of a wafer and an arch component of stepwise motion. A semiconductor manufacturing process involves repetition of film formation upon a wafer and, during this procedure, there occurs elongation/contraction of the wafer due to thermal treatment of the same. Usually, first-order component is prevailing. However, there are cases where a third-order component which seems to be produced during flatness-correction to warping of the wafer is observed. 
     The arch component attributable to flatness of an interferometer mirror can also be a non-negligible error factor particularly when semiconductor exposure apparatuses of different types are used in combination. Such error factor which depends on n-th order (n≧2) of position could not be corrected by conventional first-order correction formulae. Thus, it is desirable to provide an alignment method which enables correction of such error factors, that is, to provide an alignment procedure based on a correction formula including high order terms. 
     However, it needs a long calculation time to determine a correction formula including a higher order term, in global alignment method. It may therefore not be practical in an embodiment where high throughput is required. Thus, reducing the amount of calculation in determination of a correction formula is also desired. 
     It is accordingly an object of the present invention to provide an alignment method and/or an alignment system which enables correction of an error factor which depends on a higher order of position. 
     It is another object of the present invention to provide a method which enables determination of such correction formula in a practical time. 
     Briefly, in accordance with an aspect of the present invention, measurements are made to deviation between a design position and a measurement position, with respect to some of plural alignment execution points upon an object, to be examined, which alignment execution points have predetermined design positions, respectively. Design positions of some alignment execution points and measured positional deviations are applied to an approximation formula which approximates the relation between design positions and corrected positional deviations, by which, with respect to each alignment execution point, a correction formula for calculating a corrected positional deviation on the basis of its design position is determined. For alignment procedure to be done with respect to the alignment execution points in accordance with a determined correction formula, a correction formula which includes a second or higher order term of design position is used. 
     Now, the manner how to determine a correction formula for correcting an error factor which depends on higher order of position, by using a higher order approximation formula, will be explained. 
     First, a case where there is an error factor in which the X direction of position depends on n-th order and the Y direction depends on m-th order, that is, a case where a correction formula is to be determined on the basis of an approximation formula of n-th order in the X direction and m-th order in the Y direction, will be explained. 
     From exposure position (x i , y i ) which is predetermined in design, correction amount (d x  &#39;, d y  &#39;) is determined in accordance with equation (8) which is a correction formula, as follows: 
     
         d&#39;.sub.x =a.sub.00 +a.sub.10 x+a.sub.01 y+a.sub.20 x.sup.2 +a.sub.11 xy 
    
     
         +a.sub.02 y.sup.2 + . . . +a.sub.nm x.sup.n y.sup.m + . . . 
    
     
         d&#39;.sub.y =b.sub.00 +b.sub.10 x+b.sub.01 y+b.sub.20 x.sup.2 +b.sub.11 xy 
    
     
         +b.sub.02 y.sup.2 + . . . +b.sub.nm x.sup.n y.sup.m + . . .(8) 
    
     The correction parameters of this correction formula can be determined by applying an approximation formula equivalent to equation (8) to a set of design values (x i , y i ) of a number k and measured deviations (d xi , d yi ). Specifically, values of coefficients a nm  and b nm  can be determined by solving normal equation (9), below, by using a least square method. ##EQU4## 
     As regards the method of solving a normal equation, it is general to use a method based on known LU solution or a sweeping method. 
     Next, alignment procedure in a semiconductor manufacturing apparatus will be considered. 
     Taking a semiconductor manufacturing apparatus into consideration, there may be correction parameters a nm  and b nm  wherein a 00  may denote X-direction translation component, a 10  may denote X scale, a 01  may denote Y-axis rotation, a 02  may denote Y-axis arch, a 30  denote third-order magnification, a 12  denote third-order magnification, b 00  denote Y-direction translation component, b 10  denote X-axis rotation, b 01  denote Y scale, b 20  denote X-axis arch, b 21  denote third-order magnification, and b 03  denote third-order magnification. In that occasion, a formula corresponding to equation (8) may be: 
     
         d&#39;.sub.xi =a.sub.00 +a.sub.10 x.sub.i +a.sub.01 y.sub.i +a.sub.02 y.sub.i.sup.2 +a.sub.30 x.sub.i.sup.3 +a.sub.12 x.sub.i y.sub.i.sup.2 
    
     
         d&#39;.sub.yi =b.sub.00 +b.sub.10 x.sub.i +b.sub.01 y.sub.i +b.sub.20 x.sub.i.sup.2 +b.sub.21 x.sub.i.sup.2 y.sub.i +b.sub.03 y.sub.i.sup.3(10) 
    
     A normal equation corresponding to equation (10) is such as equation (11), below. ##EQU5## Solving this normal equation in a similar manner as equation (5) or (6), it is possible to determine correction parameters a 02 , a 30 , a 12 , b 20 , b 21 , and b 03 , namely, equation (10) which defines a correction formula. 
     Now, the manner how to determine a correction formula with decreased calculation amount, will be explained. 
     As described hereinbefore, in a semiconductor manufacturing apparatus, among the correction parameters mentioned above, correction parameters a 00 , a 10 , a 01 , b 00 , b 10 , and b 01  of first-order component are dominant. For this reason, if approximation is made first to first-order components only to determine first-order component correction parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01 , and if high order component correction parameters are so determined as to minimize the remainder, it is possible to reduce calculation time while retaining precision. Namely, first the parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01  may be determined in accordance with equation (6). Then, by using parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01  determined by equation (6), normal equation such as equation (12) below, that minimizes the remainder of first-order component approximation, may be solved. In this manner, it is possible to determine high order component error factors a 02 , a 30 , a 12 , b 20 , b 21 , and b 03 . That is, ##EQU6## Solutions for this normal equation are: 
     
         a.sub.02 =(C.sub.24 C.sub.26 D.sub.21 -C.sup.2.sub.25 D.sub.21 +C.sub.23 C.sub.25 D.sub.22 - 
    
     
         C.sub.22 C.sub.26 D.sub.22 +C.sub.22 C.sub.25 D.sub.23 -C.sub.23 C.sub.24 D.sub.23)/H.sub.2 
    
     
         a.sub.30 =(C.sub.23 C.sub.25 D.sub.21 -C.sub.22 C.sub.26 D.sub.21 +C.sub.21 C.sub.26 D.sub.22 - 
    
     
         C.sup.2.sub.23 D.sub.22 +C.sub.22 C.sub.23 D.sub.23 -C.sub.21 C.sub.25 D.sub.23)/H.sub.2 
    
     
         a.sub.12 =(C.sub.22 C.sub.25 D.sub.21 -C.sub.23 C.sub.24 D.sub.21 +C.sub.22 C.sub.23 D.sub.22 - 
    
     
         C.sub.21 C.sub.25 D.sub.22 +C.sub.21 C.sub.24 D.sub.23 -C.sup.2.sub.22 D.sub.23)/H.sub.2 
    
     
         b.sub.20 =(F.sub.14 F.sub.16 G.sub.11 -F.sup.2.sub.15 G.sub.11 +F.sub.13 F.sub.15 G.sub.12 - 
    
     
         F.sub.12 F.sub.16 G.sub.12 +F.sub.12 F.sub.15 G.sub.13 -F.sub.13 F.sub.14 G.sub.13)/I.sub.2 
    
     
         b.sub.21 =(F.sub.13 F.sub.15 G.sub.11 -F.sub.12 F.sub.16 G.sub.11 +F.sub.11 F.sub.16 G.sub.12 - 
    
     
         F.sup.2.sub.13 G.sub.12 +F.sub.12 F.sub.13 G.sub.13 -F.sub.11 F.sub.15 G.sub.13)/I.sub.2 
    
     
         b.sub.03 =(F.sub.12 F.sub.15 G.sub.11 -F.sub.13 F.sub.14 G.sub.11 +F.sub.12 F.sub.13 G.sub.12 - 
    
     
         F.sub.11 F.sub.15 G.sub.12 +F.sub.11 F.sub.14 G.sub.13 -F.sup.2.sub.12 G.sub.13)/I.sub.2                                         (13) 
    
     wherein 
     
         C.sub.21 =Σy.sub.i.sup.4 
    
     
         C.sub.22 =Σx.sub.i.sup.3 y.sub.i.sup.2 
    
     
         C.sub.23 =Σx.sub.i y.sub.i.sup.4 
    
     
         C.sub.24 =Σx.sub.i.sup.6 
    
     
         C.sub.25 =Σx.sub.i.sup.4 y.sub.i.sup.2 
    
     
         C.sub.26 =Σx.sub.i.sup.2 y.sub.i.sup.4 
    
     
         D.sub.21 =Σd.sub.xi y.sub.i.sup.2 -a.sub.00 Σy.sub.i.sup.2 -a.sub.10 Σx.sub.i y.sub.i.sup.2 -a.sub.01 Σy.sub.i.sup.3 
    
     
         D.sub.22 =Σd.sub.xi x.sub.i.sup.3 -a.sub.00 Σx.sub.i.sup.3 -a.sub.10 Σx.sub.i.sup.4 -a.sub.01 Σx.sub.i.sup.3 y.sub.i 
    
     
         D.sub.23 =Σd.sub.xi x.sub.i y.sub.i.sup.2 -a.sub.00 Σx.sub.i y.sub.i.sup.2 -a.sub.10 Σx.sub.i.sup.2 y.sub.i.sup.2 -a.sub.01 Σx.sub.i y.sub.i.sup.3 
    
     
         F.sub.21 =Σx.sub.i.sup.4 
    
     
         F.sub.22 =Σx.sub.i.sup.4 y.sub.i 
    
     
         F.sub.23 =Σx.sub.i.sup.2 y.sub.i.sup.3 
    
     
         F.sub.24 =Σx.sub.i.sup.4 y.sub.i.sup.2 
    
     
         F.sub.25 =Σx.sub.i.sup.2 y.sub.i.sup.4 
    
     
         F.sub.26 =Σy.sub.i.sup.6 
    
     
         G.sub.21 =Σd.sub.yi x.sub.i.sup.2 -b.sub.00 Σx.sub.i.sup.2 -b.sub.10 Σx.sub.i.sup.3 -b.sub.01 Σx.sub.i.sup.2 y.sub.i 
    
     
         G.sub.22 =Σd.sub.yi x.sub.i.sup.2 y.sub.i -b.sub.00 Σx.sub.i.sup.2 y.sub.i -b.sub.10 Σx.sub.i.sup.3 y.sub.i -b.sub.01 Σx.sub.i.sup.2 y.sub.i.sup.2 
    
     
         G.sub.23 =Σd.sub.yi y.sub.i.sup.3 -b.sub.00 Σy.sub.i.sup.3 -b.sub.10 Σx.sub.i y.sub.i.sup.3 -b.sub.01 Σy.sub.i.sup.5 
    
     
         H.sub.2 =C.sub.21 C.sub.24 C.sub.26 -C.sub.21 C.sup.2.sub.25 -C.sup.2.sub.22 C.sub.26 +2C.sub.22 C.sub.23 C.sub.25 -C.sup.2.sub.23 C.sub.24 
    
     
         I.sub.2 =F.sub.21 F.sub.24 F.sub.26 -F.sub.21 F.sup.2.sub.25 -F.sup.2.sub.22 F.sub.26 +2F.sub.22 F.sub.23 F.sub.25 -F.sup.2.sub.23 F.sub.24                                                  (14) 
    
     Next, another example of determining a correction formula with reduced calculation amount will be explained. 
     In semiconductor device manufacturing apparatuses, it is considered that, if the same system or apparatus is used, variation in high order component error factor is small. For this reason, there may be a method of reducing calculation amount by using a value or values in already executed alignment procedure, for high order component error factors of alignment. More specifically, correction parameters a 02 , a 30 , a 12 , b 20 , b 21  and b 03  for high order component error factors may be taken as being those values having been determined in preceding alignment procedure, such as 
     
         a.sub.02 , a.sub.30 , a.sub.12 , b.sub.20 , b.sub.21 , b.sub.03 
    
     and, based on this, a correction formula may be determined. 
     For example, averages of correction parameters determined with respect to first several wafers, in accordance with equation (15), may be used as correction parameters of high order component error factors. ##EQU7## wherein j denotes a wafer with respect to which alignment procedure has been done. The correction parameters as determined with respect to a first wafer (j=1) may be used for a second wafer and wafers following it. Here, parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01  may be determined by solving a normal equation such as equation (16) below. ##EQU8## Solutions for this normal equation are: 
     
         a.sub.00 =(C.sub.34 C.sub.36 D.sub.31 -C.sup.2.sub.35 D.sub.31 +C.sub.33 C.sub.35 D.sub.32 - 
    
     
         C.sub.32 C.sub.36 D.sub.32 +C.sub.32 C.sub.35 D.sub.33 -C.sub.33 C.sub.34 D.sub.33)/H.sub.3 
    
     
         a.sub.10 =(C.sub.33 C.sub.35 D.sub.31 -C.sub.32 C.sub.36 D.sub.31 +C.sub.31 C.sub.36 D.sub.32 - 
    
     
         C.sup.2.sub.33 D.sub.32 +C.sub.32 C.sub.33 D.sub.33 -C.sub.31 C.sub.35 D.sub.33)/H.sub.3 
    
     
         a.sub.01 =(C.sub.32 C.sub.35 D.sub.31 -C.sub.33 C.sub.34 D.sub.31 +C.sub.32 C.sub.33 D.sub.32 - 
    
     
         C.sub.31 C.sub.35 D.sub.32 +C.sub.31 C.sub.34 D.sub.33 -C.sup.2.sub.32 D.sub.33)/H.sub.3 
    
     
         b.sub.00 =(C.sub.34 C.sub.36 G.sub.31 -C.sup.2.sub.35 G.sub.31 +C.sub.33 C.sub.35 G.sub.32 - 
    
     
         C.sub.32 C.sub.36 G.sub.32 +C.sub.32 C.sub.35 G.sub.33 -C.sub.33 C.sub.34 G.sub.33)/H.sub.3 
    
     
         b.sub.10 =(C.sub.33 C.sub.35 G.sub.31 -C.sub.32 C.sub.36 G.sub.31 +C.sub.31 C.sub.36 G.sub.32 - 
    
     
         C.sup.2.sub.33 G.sub.32 +C.sub.32 C.sub.33 G.sub.33 -C.sub.31 C.sub.35 G.sub.33)/H.sub.3 
    
     
         b.sub.01 =(C.sub.32 C.sub.35 G.sub.31 -C.sub.33 C.sub.34 G.sub.31 +C.sub.32 C.sub.33 G.sub.32 - 
    
     
         C.sub.31 C.sub.35 G.sub.32 +C.sub.31 C.sub.34 G.sub.33 -C.sup.2.sub.32 G.sub.33)/H.sub.3                                         (17) 
    
     wherein 
     
         C.sub.31 =Σ1 
    
     
         C.sub.32 =Σx.sub.i 
    
     
         C.sub.33 =Σy.sub.i 
    
     
         C.sub.34 =Σx.sub.i.sup.2 
    
     
         C.sub.35 =Σx.sub.i y.sub.i 
    
     
         C.sub.36 =Σy.sub.i.sup.2 
    
     
         D.sub.31 =Σd.sub.xi -a.sub.02 Σy.sub.i.sup.2 -a.sub.30 Σx.sub.i.sup.3 -a.sub.12 Σx.sub.i y.sub.i.sup.2 
    
     
         D.sub.32 =Σd.sub.xi x.sub.i -a.sub.02 Σx.sub.i y.sub.i.sup.2 -a.sub.30 Σx.sub.i.sup.4 -a.sub.12 Σx.sub.i.sup.2 y.sub.i.sup.2 
    
     
         D.sub.33 =Σd.sub.xi y.sub.i -a.sub.02 Σy.sub.i.sup.3 -a.sub.30 Σx.sub.i.sup.3 y.sub.i -a.sub.12 Σx.sub.i y.sub.i.sup.3 
    
     
         G.sub.31 =Σd.sub.yi -b.sub.20 Σx.sub.i.sup.2 -b.sub.21 Σx.sub.i.sup.2 -b.sub.03 Σy.sub.i.sup.3 
    
     
         G.sub.32 =Σd.sub.yi x.sub.i -b.sub.20 Σx.sub.i.sup.3 -b.sub.21 Σx.sub.i.sup.3 y.sub.i -b.sub.03 Σx.sub.i y.sub.i.sup.3 
    
     
         G.sub.33 =Σd.sub.yi y.sub.i -b.sub.20 Σx.sub.i.sup.2 y.sub.i -b.sub.21 Σx.sub.i.sup.2 y.sub.i.sup.2 -b.sub.03 Σy.sub.i.sup.4 
    
     
         H.sub.3 =C.sub.31 C.sub.34 C.sub.36 -C.sub.31 C.sup.2.sub.35 -C.sup.2.sub.32 C.sub.36 +2C.sub.32 C.sub.33 C.sub.35 -C.sup.2.sub.33 C.sub.34                                                  (18) 
    
     A further example of determining a correction formula with reduced calculation amount, will now be explained. 
     Without directly using values determined from correction parameters of an already performed alignment procedure, as being correction parameters for subsequent wafers, a ratio between correction parameters for first-order component error factor and for higher-order component error factor may be used as a value for subsequent wafers. This may assure higher precision as compared with the example described above. More specifically, among higher-order component error factors, a 12  and b 21  (third order magnification), a 02  (Y-axis arch component), and b 20  (X-axis arch component) may be fixed in a particular system, although a 30  and b 03  (third order magnification) may be variable in accordance with a 10  (X scale) and b 01  (Y scale). In consideration of this, ratios of the third order magnifications a 30  and b 03  to the X scale a 10  and Y scale b 01  are calculated as follows: 
     
         A=a.sub.30 /a.sub.10 
    
     
         B=b.sub.03 /b.sub.01 
    
     wherein ##EQU9## Then, parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01  are determined by solving a normal equation such as equation (20) below. ##EQU10## Solutions for this normal equation are: 
     
         a.sub.00 =(C.sub.44 C.sub.46 D.sub.41 -C.sup.2.sub.45 D.sub.41 +C.sub.43 C.sub.45 D.sub.42 - 
    
     
         C.sub.42 C.sub.46 D.sub.42 +C.sub.42 C.sub.45 D.sub.43 -C.sub.43 C.sub.44 D.sub.43)/H.sub.4 
    
     
         a.sub.10 =(C.sub.43 C.sub.45 D.sub.41 -C.sub.42 C.sub.46 D.sub.41 +C.sub.41 C.sub.46 D.sub.42 - 
    
     
         C.sup.2.sub.43 D.sub.42 +C.sub.42 C.sub.43 D.sub.43 -C.sub.41 C.sub.45 D.sub.43)/H.sub.4 
    
     
         a.sub.01 =(C.sub.42 C.sub.45 D.sub.41 -C.sub.43 C.sub.44 D.sub.41 +C.sub.42 C.sub.43 D.sub.42 - 
    
     
         C.sub.41 C.sub.45 D.sub.42 +C.sub.41 C.sub.44 D.sub.43 -C.sup.2.sub.42 D.sub.43)/H.sub.4 
    
     
         b.sub.00 =(F.sub.44 F.sub.46 G.sub.41 -F.sup.2.sub.45 G.sub.41 +F.sub.43 F.sub.45 G.sub.42 - 
    
     
         F.sub.42 F.sub.46 G.sub.42 +F.sub.42 F.sub.45 G.sub.43 -F.sub.43 F.sub.44 G.sub.43)/I.sub.4 
    
     
         b.sub.10 =(F.sub.43 F.sub.45 G.sub.41 -F.sub.42 F.sub.46 G.sub.41 +F.sub.41 F.sub.46 G.sub.42 - 
    
     
         F.sup.2.sub.43 G.sub.42 +F.sub.42 F.sub.43 G.sub.43 -F.sub.41 F.sub.45 G.sub.43)/I.sub.4 
    
     
         b.sub.01 =(F.sub.42 F.sub.45 G.sub.41 -F.sub.43 F.sub.44 G.sub.41 +F.sub.42 F.sub.43 G.sub.42 - 
    
     
         F.sub.41 F.sub.45 G.sub.42 +F.sub.41 F.sub.44 G.sub.43 -F.sup.2.sub.42 G.sub.43)/I.sub.4                                         (21) 
    
     wherein 
     
         C.sub.41 =Σ1 
    
     
         C.sub.42 =Σx.sub.i +A.sub.30 Σx.sub.i.sup.3 
    
     
         C.sub.43 =Σy.sub.i 
    
     
         C.sub.44 =Σx.sub.i.sup.2 +A.sub.30 Σx.sub.i.sup.4 
    
     
         C.sub.45 =Σx.sub.i y.sub.i 
    
     
         C.sub.46 =Σy.sub.i.sup.2 
    
     
         F.sub.41 =Σ1 
    
     
         F.sub.42 =Σx.sub.i 
    
     
         F.sub.43 =Σy.sub.i +B.sub.03 Σy.sub.i.sup.3 
    
     
         F.sub.44 =Σx.sub.i.sup.2 
    
     
         F.sub.45 =Σx.sub.i y.sub.i +B.sub.03 Σx.sub.i y.sub.i.sup.3 
    
     
         F.sub.46 =Σx.sub.i.sup.2 y.sub.i.sup.2 +B.sub.03 Σy.sub.i.sup.4 
    
     
         D.sub.41 =Σd.sub.xi -a.sub.12 Σx.sub.i y.sub.i.sup.2 -a.sub.02 Σy.sub.i.sup.2 
    
     
         D.sub.42 =Σx.sub.i d.sub.xi -a.sub.12 Σx.sub.i.sup.2 y.sub.i.sup.2 -a.sub.02 Σx.sub.i y.sub.i.sup.2 
    
     
         D.sub.43 =Σy.sub.i d.sub.xi -a.sub.12 Σx.sub.i y.sub.i.sup.3 -a.sub.02 Σy.sub.i.sup.3 
    
     
         G.sub.41 =Σd.sub.yi -b.sub.20 Σx.sub.i.sup.2 -b.sub.21 Σx.sub.i.sup.2 y.sub.i 
    
     
         G.sub.42 =Σx.sub.i d.sub.yi -b.sub.20 Σx.sub.i.sup.3 -b.sub.21 Σx.sub.i.sup.3 y.sub.i 
    
     
         G.sub.43 =Σy.sub.i d.sub.yi -b.sub.20 Σx.sub.i.sup.2 y.sub.i -b.sub.21 Σx.sub.i.sup.2 y.sub.i 
    
     
         H.sub.4 =C.sub.41 C.sub.44 C.sub.46 -C.sub.41 C.sup.2.sub.45 -C.sup.2.sub.42 C.sub.46 +2C.sub.42 C.sub.43 C.sub.45 -C.sup.2.sub.43 C.sub.44 
    
     
         I.sub.4 =F.sub.41 F.sub.44 F.sub.46 -F.sub.41 F.sup.2.sub.45 -F.sup.2.sub.42 F.sub.46 +2F.sub.42 F.sub.43 F.sub.45 -F.sup.2.sub.43 F.sub.44                                                  (22) 
    
     As described above, an alignment method according to an aspect of the present invention comprises a measuring step for measuring a deviation between a design position and a measurement position, with respect to some of plural alignment execution points upon an object, to be examined, which alignment execution points have predetermined design positions, respectively, a correction formula determining step for applying design positions of some alignment execution points and measured positional deviations to an approximation formula which approximates the relation between design positions and corrected positional deviations, and determining, with respect to each alignment execution point, a correction formula for calculating a corrected positional deviation on the basis of its design position, and an alignment procedure executing step for performing an alignment procedure to be done with respect to the alignment execution points in accordance with the determined correction formula, wherein the correction formula includes a second or higher order term of design position. 
     These and other objects, features and advantages of the present invention will become more apparent upon a consideration of the following description of the preferred embodiments of the present invention taken in conjunction with the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a schematic and diagrammatic view of general structure of a semiconductor exposure apparatus according to a first embodiment of the present invention. 
     FIG. 2 is a flow chart for explaining an example of alignment and exposure procedure in the apparatus of FIG. 1. 
     FIG. 3 is a schematic view for explaining an example of exposure regions defined on a wafer. 
     FIG. 4 is a schematic view for explaining an example of those exposure regions to be used in the measurement. 
     FIG. 5 is a schematic and diagrammatic view for explaining an example of procedure of correction formula determination, in the flow chart of FIG. 2. 
     FIG. 6 is a schematic view for explaining an example of measurement mark used in the FIG. 4 example . 
     FIG. 7 is a schematic and diagrammatic view of general structure of a semiconductor exposure apparatus according to a second embodiment of the present invention. 
     FIG. 8 is a schematic and diagrammatic view for explaining an example of procedure for correction formula determination, in the apparatus of FIG. 7. 
     FIG. 9 is a schematic and diagrammatic view of general structure of a semiconductor exposure apparatus according to a third embodiment of the present invention. 
     FIG. 10 is a flow chart for explaining an example of procedure of correction formula determination, in the apparatus of FIG. 9. 
     FIG. 11 is a schematic and diagrammatic view of general structure of a semiconductor exposure apparatus according to a fourth embodiment of the present invention. 
     FIG. 12 is a flow chart for explaining an example of procedure of correction formula determination, in the apparatus of FIG. 11. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 1 is a schematic view of a first embodiment of the present invention wherein the invention is applied to a step-and-repeat type semiconductor manufacturing exposure apparatus. 
     Denoted in FIG. 1 at R is a reticle which is an original. Denoted at W is a wafer, and denoted at 1 is a projection optical system. Denoted at S is an alignment optical system, and denoted at 2 is an alignment illumination means. Denoted at 3 is a beam splitter, and denoted at 4 is an imaging optical system. Denoted at 5 is an image pickup means, and denoted at 6 is an analog-to-digital (A/D) converting means. Denoted at 7 is an integrating means, and denoted at 8 is a position detecting means. Denoted at 9 is a control means, and denoted at 10 is a stage driving means. Denoted at 11 is an X-Y stage which is movable two-dimensionally, and denoted at H1 is a correction formula producing means. Denoted at 12 is a third-order approximation means. While in FIG. 1 there is only an alignment optical system S for detection of the position with respect to X direction, the apparatus is equipped with another alignment optical system of similar structure, for detection of the position with respect to Y direction. Also, the integrating means 7, the position detecting means 8, the control means 9 and the correction formula producing means H1 may be provided by functions of a board computer or a general purpose computer, and a common system may be used for them. Of course, separate electronic circuit devices may be used exclusively for them. 
     In the semiconductor exposure apparatus shown in FIG. 1, relative alignment between the reticle R and the wafer W is first performed and, thereafter, exposure light is projected from an exposure illumination source (not shown) by which an electronic circuit pattern formed on the reticle R is projected and transferred onto the wafer W, placed on the X-Y stage 11, through the projection optical system 1. FIG. 3 illustrates an example of exposure regions defined on a wafer, and FIG. 4 illustrates an example of those exposure regions to be used in the measurement. 
     Now, the procedure of relative alignment of the reticle R and the wafer W and exposure of them, in the apparatus of FIG. 1, will be described. FIG. 2 is a flow chart for explaining an example of alignment and exposure procedure to be performed in accordance with a global alignment method. In the following, while referring to FIG. 2, an embodiment of alignment and exposure method as well as the structure therefor will be explained. 
     First, at step S1, a wafer W is loaded onto the X-Y stage 11 by means of a wafer conveying system (not shown). 
     At step S2, the control means 9 applies a signal to the stage driving means 10 to move the X-Y stage 11 so that an alignment mark M 1x  formed in a first measurement shot S1 (FIG. 4) is placed within the view field of the alignment optical system S. 
     At step S3, the position of the mark M 1x  is measured in the following manner. 
     First, with the light as projected from the alignment illumination means 2 (which is non-sensitizing light) and through the reticle R and the projection optical system 1, the alignment mark M 1x  (hereinafter referred also to &#34;wafer mark&#34;) is irradiated. FIG. 6 illustrates this wafer mark M ix . As illustrated, it comprises arrayed rectangular patterns of the same configuration. Light reflected by the wafer mark M 1x  goes through the projection optical system 1 and the reticle R again, and it impinges on the beam splitter 3. The light is reflected by the beam splitter, and then it forms an image W M  of the wafer mark M 1x  upon an image pickup surface of the image pickup device 5. In this image pickup device 5, the image of the mark M 1x  is photoelectrically converted into a signal which in turn is transformed into a two-dimensional digital signal train by means of the A/D converting device 6. The integrating means 7 of FIG. 1 serves to define a processing window W P  to the wafer mark image W M  having been digitalized by the A/D converting means 6, and to perform movement averaging processing in Y direction (FIG. 6) in that window such that the two-dimensional imagewise signal is transformed into a one-dimensional digital signal train S(x). The position detecting means 8 of FIG. 1 functions to perform a pattern matching operation to the one-dimensional digital signal train S(x) outputted from the integrating means 7 by using a template pattern having been stored therein, and to apply to the control means 9 an output signal of such coordinate position of S(x) as having highest analogy to the template pattern. Since this output signal represents the position of the mark which is with reference to the image pickup surface of the image pickup device 5, the control means 9 calculates a deviation amount d x1  of the wafer mark M 1x  with respect to the reticle R on the basis of the relative position of the image pickup device 5 and the reticle R, which may be determined beforehand by any known method. 
     In the manner described above, the positional deviation of the first measurement shot with respect to X direction is measured. Subsequently, the control means 9 operates to move the X-Y stage 11 so that a Y-direction measurement mark M 1y  of the first measurement shot is placed within the view field of the Y-direction alignment optical system. Then, in a similar procedure as in the X-direction measurement, positional deviation d y1  of the mark in the Y direction is measured. With the above, measurement to the measurement shot S1 is completed. After this, the control means 9 operates to successively move the X-Y stage 11 to respective measurement positions and to perform measurements of positional deviations in X and Y directions in a similar manner. 
     The operations at steps S2 and S3 are repeated until completion of measurements to measurement shots of a predetermined number k (k&gt;6) is concluded at step S4. Measured positional deviations d xi  and d yi  (i=1, 2, . . . , k) at respective measurement shots are memorized. 
     At steps S5 and S6, relative alignment of the wafer W to the reticle R is performed on the basis of the positional deviations of the measurement shots, as measured at step S3, in accordance with the following procedure. 
     At step S5, as illustrated in FIG. 5, the third-order approximation means 12 operates to solve the normal equation (11) on the basis of mark design positions (x i , y i ) of measurement shots, specified beforehand, and of positional deviations (d xi , d yi ) of the measurement shots having been measured at step S3, to determine correction parameters a 00 , a 10 , a 01 , a 02 , a 30 , a 12 , b 00 , b 10 , b 01 , b 20 , b 21  and b 03  which in turn are applied to the control means 9. Normal equation can be solved in a known manner, such as by a method using LU solution or a sweeping method. 
     At step S6, the control means 9 operates to calculate correction amount (d xi  &#39;, d yi  &#39;) in accordance with equation (10) having coefficients of correction parameters a 00 , a 10 , a 01 , a 02 , a 30 , a 12 , b 00 , b 10 , b 01 , b 20 , b 21  and b 03 , and to move the X-Y stage 11 in accordance with that value, and exposures of all the shots defined on the wafer W are performed. 
     At step S7, the wafer W is unloaded from the X-Y stage 11 by means of a wafer conveying system (not shown). The operations from step S1 to step S7 are repeated until completion of exposures to all wafers is concluded at step S8. 
     By executing alignment procedure in accordance with a correction formula including error factors which depend on higher order of position, as described, enhanced alignment precision is attainable. Further, there is an advantage that the state of alignment can be discriminated from the correction parameters determined during the procedure: that is, X-direction translation component from a 00 , X-scale from a 10 , Y-axis rotation from a 01 , Y-axis arch from a 02 , third-order magnification from a 30  and a 12 , Y-direction translation component from b 00 , X-axis rotation from b 10 , Y scale from b 01 , X-axis arch from b 20 , and third-order magnification from b 21  and b 03 . 
     FIG. 7 is a schematic view of a second embodiment of the present invention, wherein the invention is applied to a step-and-repeat type semiconductor manufacturing exposure apparatus. In this embodiment, the alignment procedure is performed so that error factors are subjected to first-order approximation and any remainder is subject to third-order approximation. This ensures reduction of calculation amount while retaining high alignment precision. 
     Denoted in FIG. 7 at 13 is a first-order approximation means, and denoted at 14 is a remainder third-order approximation means. Denoted at H2 is a correction formula producing means which include these approximation means therein. The structure and function of the remaining portion of the system are substantially the same as those of the first embodiment. Also, the integrating means 7, the position detecting means 8, the control means 9 and the correction formula producing means H2 may be provided by functions of a board computer or a general purpose computer, and a common system may be used for them. Of course, separate electronic circuit devices may be used exclusively for them. 
     Now, the procedure of relative alignment of a reticle R and a wafer W and exposure of them, in the apparatus of FIG. 7, will be described. In the apparatus of FIG. 7, like the first embodiment, alignment and exposure procedure can be performed in accordance with a global alignment method, with the sequential processes shown in FIG. 2. However, as regards step S5 of FIG. 2, the operation in this embodiment is to be performed as illustrated in FIG. 8. Thus, referring first to FIG. 8, the process of step 5 in FIG. 2 will be explained. 
     At step S21 of FIG. 8, the first-order approximation means 13 functions to calculate correction parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01 , on the basis of mark design positions (x i , y i ) of measurement shots, being specified beforehand, and of positional deviations (d xi , d yi ) of the measurement shots having been measured at step S3, and in accordance with equation (6). These parameters as determined are applied to the control means 9 and the remainder third-order approximation means 14. 
     At step S22, the remainder third-order approximation means 14 operates to determine correction parameters a 02 , a 30 , a 12 , b 20 , b 21  and b 03 , in accordance with equation (13) and on the basis of design mark positions (x i , y i ) of measurement shots being specified beforehand, of positional deviations (d xi , d yi ) of the measurement shots having been measured at step S3, and of the correction parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01  having been determined at step S3. The thus calculated parameters are applied to the control means 9. 
     By executing the alignment procedure on the basis of first-order approximation to error factors and of subsequent third-order approximation to remainder, as described above, reduction of calculation amount is attainable while retaining high alignment precision. 
     FIG. 9 is a schematic view of a third embodiment of the present invention, in which the invention is applied to a step-and-repeat type semiconductor manufacturing exposure apparatus. In this embodiment, correction parameters as calculated with respect to the first few wafers are used for the remaining wafers, this being intended for further reduction of calculation amount while retaining high alignment precision. 
     Denoted in FIG. 9 at 15 is a correction formula producing means corresponding to the correction formula producing means H1 of the first embodiment or the correction formula producing means H2 of the second embodiment. Denoted at 16 is a correction parameter storing means, and denoted at 17 is a high-order correction parameter fixed first-order approximation means. Denoted at H3 is a correction formula producing means which includes the above-described components. The structure and operation of the remaining portion of this embodiment are essentially the same as those of the first embodiment. Also, the integrating means 7, the position detecting means 8, the control means 9 and the correction formula producing means H3 may be provided by functions of a board computer or a general purpose computer, and a common system may be used for them. Of course, separate electronic circuit devices may be used exclusively for them. 
     Now, the procedure of relative alignment of a reticle R and a wafer W and exposure of them, in the apparatus of FIG. 9, will be described. In the apparatus of FIG. 9, like the first embodiment, alignment and exposure procedure can be performed in accordance with a global alignment method, with the sequential processes shown in FIG. 2. However, as regards step S5 of FIG. 2, the operation in this embodiment is to be performed as illustrated in FIG. 10. Thus, referring first to FIG. 10, the process of step 5 in FIG. 2 will be explained. 
     At step S31 in FIG. 10, discrimination is made as to whether a current wafer just to be exposed is after a designated number of wafers (not less than 2). If not, the sequence goes to step S32. If it is after the designated number, the sequence goes to step S34. 
     At step S32 in FIG. 10, like step S5 of FIG. 2 with reference to the first embodiment or like step S5 with reference to the second embodiment, the correction formula producing means 15 calculates correction parameters a 00 , a 10 , a 01 , a 02 , a 30 , a 12 , b 00 , b 10 , b 01 , b 20 , b 21  and b 03 , on the basis of design mark positions (x i , y i ) of measurement shots, being specified beforehand, and of positional deviations (d xi , d yi ) of the measurement shots having been measured at step S3. The calculated parameters are applied to the control means 9. Additionally, the parameters a 02 , a 30 , a 12 , b 20 , b 21  and b 03  are applied to the correction parameter storing means 16. 
     At step S33 in FIG. 10, those parameters a 02 , a 30 , a 12 , b 20 , b 21  and b 03  as determined at step S32 are memorized into the correction parameter storing means 16. 
     At step S34 in FIG. 10, the parameters a 02 , a 30 , a 12 , b 20 , b 21  and b 03  are read out of the correction parameter storing means 16 and, if averages of high-order correction parameters, as below, are already detected by calculation, they are applied to the high-order correction parameter fixed first-order approximation means 17. 
     
         a.sub.02 , a.sub.30 , a.sub.12 , b.sub.20 , b.sub.21 , b.sub.03 
    
     If averages of high-order correction parameters are not yet calculated, they are calculated in accordance with equation (15) and memorized, and then they are applied to the high-order correction parameter fixed first-order approximation means 17. 
     At step S35 in FIG. 10, the high-order parameter fixed first-order approximation means 17 calculates correction parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01  in accordance with equation (17) and on the basis of design mark positions (x i , y i ) of measurement shots, specified beforehand, of positional deviations (d xi , d yi ) of the measurement shots having been measured at step S3, and of the averages a 02  , a 30  , a 12  , b 20  , b 21   and b 03   determined at step S34. The thus determined correction parameters are applied to the control means 9. 
     By using correction parameters having been calculated with respect to the first few wafers, to the remaining wafers, as described, further reduction of calculation amount is attainable while retaining high alignment precision. 
     FIG. 11 is a schematic view of a fourth embodiment of the present invention, in which the invention is applied to a step-and-repeat type semiconductor manufacturing exposure apparatus. In this embodiment, a correction parameter ratio having been calculated with respect to the first few wafers is used for the remaining wafers, this being intended for further reduction in calculation amount while holding high alignment precision. 
     Denoted in FIG. 11 at 18 is a correction formula producing means corresponding to the correction formula producing means H1 of the first embodiment or the correction formula producing means H2 of the second embodiment. Denoted at 19 is a correction parameter ratio storing means, and denoted at 20 is a high-order correction parameter ratio fixed first-order approximation means. Denoted at 21 is a high-order correction parameter approximation means, and denoted at H4 is a correction formula producing means which includes the above-described components. The structure and operation of the remaining portion of this embodiment are essentially the same as those of the first embodiment. Also, the integrating means 7, the position detecting means 8, the control means 9 and the correction formula producing means H3 may be provided by functions of a board computer or a general purpose computer, and a common system may be used for them. Of course, separate electronic circuit devices may be used exclusively for them. 
     Now, the procedure of relative alignment of a reticle R and a wafer W and exposure of them, in the apparatus of FIG. 11, will be described. In the apparatus of FIG. 11, like the first embodiment, alignment and exposure procedure can be performed in accordance with a global alignment method, with the sequential processes shown in FIG. 2. However, as regards step S5 of FIG. 2, the operation in this embodiment is to be performed as illustrated in FIG. 12. Thus, referring first to FIG. 12, the process of step 5 in FIG. 2 will be explained. 
     At step S41 in FIG. 12, discrimination is made as to whether a current wafer just to be exposed is after a designated number of wafers (not less than 2). If not, the sequence goes to step S42. If it is after the designated number, the sequence goes to step S44. 
     At step S42 in FIG. 12, like step S5 of FIG. 2 with reference to the first embodiment or like step S5 with reference to the second embodiment, the correction formula producing means 18 calculates correction parameters a 00 , a 10 , a 01 , a 02 , a 30 , a 12 , b 00 , b 10 , b 01 , b 20 , b 21  and b 03 , on the basis of design mark positions (x i , y i ) of measurement shots, being specified beforehand, and of positional deviations (d xi , d yi ) of the measurement shots having been measured at step S3. The calculated parameters are applied to the control means 9. Additionally, the parameters a 10 , a 01 , a 02 , a 30 , a 12 , b 10 , b 01 , b 20 , b 21  and b 03  are applied to the correction parameter ratio storing means 19. 
     At step S43 in FIG. 12, those parameters a 10 , a 01 , a 02 , a 30 , a 12 , b 10 , b 01 , b 20 , b 21  and b 03  as determined at step S42 are memorized into the correction parameter ratio storing means 19. 
     At step S44 in FIG. 12, correction parameters a 10i , a 01i , a 02i , a 30i , a 12i , b 10i , b 01i , b 20i , b 21i  and b 03i  are read out of the correction parameter ratio storing means 19 and, if averages of high-order correction parameters, as below, and high-order correction parameter ratios A 30  and B 03  are already determined by calculations, they are applied to the high-order correction parameter ratio fixed first-order approximation means 20. 
     
         a.sub.02 , a.sub.12 , b.sub.20 , b.sub.21 
    
     If averages of high-order correction parameters or parameter ratios are not yet calculated, they are calculated in accordance with equation (15) or (19) and memorized, and then they are applied to the high-order parameter ratio fixed first-order approximation means 20 and the high-order correction parameter calculating means 21. 
     At step S45 in FIG. 12, the high-order correction parameter ratio fixed first-order approximation means 20 calculates correction parameters a 00 , a 10 , a 01 , b 00 , b 10  and b 01  in accordance with equation (21) and on the basis of design mark positions (x i , y i ) of measurement shots, specified beforehand, of positional deviations (d xi , d yi ) of the measurement shots having been measured at step S3, and of the averages a 02  , a 12  , b 20  , and b 21   of high-order correction parameters determined at step S44. The thus determined correction parameters are applied to the control means 9 and the high-order correction parameter calculating means 21. 
     As step S46 in FIG. 12, the high-order parameter calculating means 21 operates to take the averages a 02  , a 12  , b 20  , and b 21   of high-order correction parameters as the values of parameters a 02 , a 12 , b 20 , and b 21 . Also, in accordance with equation (23) below and on the basis of the high-order correction parameter ratios A 30  and B 03 , the high-order parameter calculating means 21 calculates correction parameters a 30  and b 03  and applies them to the control means 9. 
     
         a.sub.30 =A.sub.30 a.sub.10 
    
     
         b.sub.03 =B.sub.03 b.sub.01                                (23) 
    
     By using correction parameter ratios having been calculated with respect to first few wafers, to the remaining wafers, as described, further reduction of calculation amount is attainable while retaining high alignment precision. 
     While the invention has been described with reference to the structures disclosed herein, it is not confined to the details set forth and this application is intended to cover such modifications or changes as may come within the purposes of the improvements or the scope of the following claims.