Abstract:
Disclosed is a system for controlling a power-up sequence applicable to a power controller of a lane departure warning system, including: one DC/DC converter unit configured to convert a first input voltage of input power and output the converted first input voltage as a first output voltage, and including four output terminals; and a comparator block unit including two comparators configured to monitor a state of the input power, and one or more comparators configured to generate a control signal for enabling a power output of a next sequence from the first output voltage.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This application claims priority to and the benefit of Korean Patent Application No. 10-2013-0132642 filed in the Korean Intellectual Property Office on Nov. 4, 2013, the entire contents of which are incorporated herein by reference. 
     
    
     TECHNICAL FIELD 
       [0002]    The present invention relates to a system for controlling a power-up sequence, and more particularly, to a system for controlling a power-up sequence applicable to a power controller of a lane departure warning system. 
       BACKGROUND OF THE INVENTION 
       [0003]    Most of the methods of controlling a power-up sequence of a semiconductor device are to control an output sequence of each DC converter through software while including a separate processor (micom) for controlling power. 
         [0004]    For example, the general method of controlling a power-up sequence includes a method of adjusting a power generation time by directly controlling an output of a DC converter as illustrated in  FIG. 1A , or a method of blocking or releasing a line of power supplied to a semiconductor device through a power switch (power MOSFET, and the like) as illustrated in  FIG. 1B . 
         [0005]    In the method of controlling a power-up sequence, a power control is implemented by software, so that an additional processor for controlling the software is demanded, and there is a problem in that an erroneous operation due to an error within a code or a problem during the processing of an operation is highly caused compared to a configuration of hardware. 
         [0006]    Semiconductor devices, such as a memory, a micom, and an LCD, based on a transistor have a power-up sequence condition, and when the semiconductor devices do not keep the power-up sequence, there is a problem in that a latch-up phenomenon may be generated. The latch-up is a phenomenon in which an overcurrent flows in a transistor circuit unit, so that an on-state of the circuit is continuously maintained due to an unintentional parasitic circuit. When the latch-up is generated, an operation of a corresponding component may be stopped, or the corresponding component may have an erroneous operation. 
       SUMMARY OF THE INVENTION 
       [0007]    The present invention has been made in an effort to provide a system for controlling a power-up sequence, which maintains an existing hardware control design concept and has a small size through one DC/DC converter in which four channel outputs are available. 
         [0008]    The present invention has also been made in an effort to provide a system for controlling a power-up sequence, which is capable of monitoring a state of input power through a comparator. 
         [0009]    An exemplary embodiment of the present invention provides a system for controlling a power-up sequence, including: one DC/DC converter unit configured to convert a first input voltage of input power and output the converted first input voltage as a first output voltage, and including four output terminals; and a comparator block unit including two comparators configured to monitor a state of the input power, and one or more comparators configured to generate a control signal for enabling a power output of a next sequence from the first output voltage. 
         [0010]    The generation of the signal of the comparator receiving the first output voltage among the one or more comparators may be performed by outputting an output value HIGH when the first output voltage is applied to a positive (+) terminal by setting a negative (−) terminal of the comparator to have a voltage smaller than a reference voltage range of the first output voltage, re-inputting the output value HIGH to the DC/DC converter unit, and generating a control signal for enabling a power output of a next sequence. 
         [0011]    When the first input voltage of the comparator is dropped to the reference voltage or lower, an under voltage signal may be LOW (0), so that it is determined that the state of the input power is abnormal through the comparator receiving the first input voltage among the two comparators which monitor the state of the input power. 
         [0012]    When an output signal of the comparator is HIGH (1), it may be determined that the input power is normally input, when an output signal of the comparator is LOW (0), it may be determined that the input power exceeds the reference voltage input range through the comparator receiving a first output voltage. 
         [0013]    According to the power-up sequence control system of the present invention, the number of components may be decreased through one DC/DC converter in which four channel outputs are available, thereby decreasing cost of a system and minimizing a size of the system. 
         [0014]    It is also possible to handle a change in the power-up sequence without a large change in a circuit or a configuration, thereby improving re-usability and design reliability of the circuit. 
         [0015]    A state of the input power may be monitored through the comparator, so that the monitored state may be utilized during a diagnosis of failure. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0016]      FIG. 1  is a circuit diagram illustrating a hardware control method of a lane departure warning system in the related art; 
           [0017]      FIG. 2  is a circuit diagram illustrating a power-up sequence control system according to an exemplary embodiment of the present invention; 
           [0018]      FIG. 3  is a block diagram illustrating a comparator of the power-up sequence control system; 
           [0019]      FIG. 4  is a diagram illustrating a flow of an operation of the power-up sequence control system; 
           [0020]      FIG. 5  is a block diagram illustrating the comparator for determining whether an input power is smaller than a reference voltage input range; and 
           [0021]      FIG. 6  is a block diagram illustrating the comparator for determining whether an input power is larger than the reference voltage input range. 
       
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
       [0022]    Hereinafter, a power-up sequence control system according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings. 
         [0023]    As illustrated in  FIG. 2 , a power-up sequence control system  100  according to the exemplary embodiment of the present invention includes a DC/DC converter unit  110  and a comparator block unit  200 . 
         [0024]    The DC/DC converter unit  110  is configured by changing respective DC/DC converters existing for generating a power-up sequence in the related art into one DC/DC converter in which four channel outputs are available. 
         [0025]    In order to use only one DC/DC converter, a processor for controlling a voltage output enable signal in accordance with a sequence is necessary, but in the present invention, an existing hardware control design concept is maintained by utilizing a comparator. 
         [0026]    In the present invention, a comparator  2  block unit  220 , a comparator  3  block unit  230 , and a comparator  4  block unit  240  are circuits for generating a signal for controlling a power-up sequence, and have the same signal generating method. 
         [0027]    The comparator  2  block unit  220  of  FIG. 3  serves to confirm whether a voltage V DC0  is output, and in this case, a negative (−) terminal of the comparator  2  is set to have a voltage smaller than a reference voltage range of V DC0 , so that when V DC0  is applied to a positive (+) terminal, an output value HIGH is output. The output value HIGH is re-input to the DC/DC converter unit  110  to be a control signal for enabling a power output of a next sequence. 
         [0028]    Here, a resistance value of the negative (−) terminal may be set by setting a reference of a minimum voltage of a voltage input to the positive (+) terminal to have a level appropriate for an environment of a device designed thereof. 
         [0029]    For example, V input  of a lane departure warning system is 12 V DC , and V DC0  is 5 V DC , but when the system is configured to be operated based on accurately 5 V, an erroneous operation may be generated due to an error in a voltage level or induction of a noise during actual driving. Accordingly, when a circuit is configured by a device guaranteeing about 4.7 V or more considering a design margin, resistance values of R 3  and R 4  are calculated as expressed in Equation 1. 
         [0000]      12 ×{R   3 /( R   3   +R   4 )}&lt;4.7   [Equation 1]
 
         [0030]    To organize Equation 1, (R 3 &lt;0.64×R 3 ), and when R 3  is 100 Ω, R 4 &lt;64. 
         [0031]    Accordingly, a value smaller than 64 Ω may be selected as a value of R4. The largest value among standard resistance values smaller than 64 Ω is 63.4 Ω, and as the resistance value is decreased, a determination reference voltage is decreased, so that resistance having the largest value while being close to the Equation needs to be selected if necessary. 
         [0032]    V DC1  and V DC2  make a voltage enable signal having a next sequence through the comparator by using the same method. 
         [0033]    That is, as illustrated in  FIG. 3 , in an operation flow of the power-up sequence control system, the power is controlled by repeating an operation in which when external power is applied, so that EN 0  becomes HIGH, V OUT0  outputs 5 V DC , and an output of comparator  2  is HIGH, and the output of comparator  2  is applied to EN 1 , and passes through the DC/DC converter and the comparator. 
         [0034]    It is possible to monitor a state of input power by utilizing the comparator block unit  200 , as well as to control the power-up sequence. 
         [0035]    A state where input power V INPUT  is equal to or smaller than a reference voltage (under voltage) or is larger than the reference voltage (over voltage) is monitored, and this function may be used for determining whether a power source has a problem during an analysis of failure, and may also be used as information for protecting the device from abnormal power. 
         [0036]    The input power state monitoring is determined through the comparator  1  block unit  210  of  FIG. 5  and the comparator  2  block unit  220  of  FIG. 6 . 
         [0037]    The comparator  1  block unit  210  is a circuit unit for determining whether the input power is equal to or smaller than a reference voltage input range, and the comparator  2  block unit  220  is a circuit unit for determining whether the input power is larger than the reference voltage input range. 
         [0038]    A rate voltage of the lane departure warning system is 12 V DC  and the range of the reference voltage is 9 to 16 V DC . 
         [0039]    First, when the input power is dropped to be 9 V or lower during the determination of whether the input is smaller than the reference voltage input range, an under voltage signal becomes low, so that it may be determined that the power state is abnormal. 
         [0040]    Here, a change in a voltage level is determined based on V DC0  (5 V CD ), so that a size of the input power is also adjusted with a voltage level in accordance with the input power to be input to the comparator. 
         [0041]    That is, as a condition for determining that the power state is abnormal, the system needs to be designed so that when the input power is equal to or larger than 9 V, a positive (+) terminal of comparator  1  is larger than 5 V DC  and when the input power is smaller than 9 V, a positive (+) terminal of comparator  1  is smaller than 5 V DC . 
         [0042]    When a state where the input power is smaller than 9 V is set to 8 V considering a design margin, Equation 2 is obtained, and values of R 1  and R 2  may be determined through Equation 2. 
         [0000]      8 ×{R   2 /( R   1   +R   2 )}&lt;5&lt;9 ×{R   2 /( R   1   +R   2 )}  [Equation 2]
 
         [0043]    To organize Equation 2, 5/9&lt;R 2 /(R 1 +R 2 )&lt;5/8. 
         [0044]    Next, when it is determined whether the input power is larger than the reference voltage input range, it is determined that when an output signal is HIGH, V DC0  is normally input, and when the output signal is LOW, the input power exceeds a normal range, and the first condition for the determination is that when V VDC0  is normally input, the output signal HIGH is output by setting a voltage of a negative (−) terminal of comparator  2  to be smaller than VDC 0 . 
         [0045]    The second condition for the determination is that when the input voltage is larger than 16 V, a voltage value of the negative (−) terminal is set to be a value larger than V DC0 , and when the input voltage is equal to or smaller than 16 V, a voltage value of the negative (−) terminal is set to be a value smaller than V DC0 . 
         [0046]    When the input voltage is within the reference voltage range (16V or smaller), the negative (−) terminal always has a smaller value than V DC0 , so that when the second condition is satisfied, the first condition is automatically satisfied. Accordingly, a resistance value is determined as expressed by Equation  3  considering only the second condition. 
         [0000]      16 ×{R   4 /( R   3   +R   4 )}&lt;5&lt;17 ×{R   4 /( R   3   +R   4 )}  [Equation 3]
 
         [0047]    To organize Equation 3, 5/17&lt;R 4 /(R 3 +R 4 )&lt;5/16. 
         [0048]    Accordingly, a resistance value is determined and the circuit is configured through aforementioned Equation 2 and Equation 3, so that it is possible to monitor a state of the input power. 
         [0049]    According to the power-up sequence control system of the present invention, the number of components may be decreased through one DC/DC converter in which four channel outputs are available, thereby decreasing cost of a system and minimizing a size of the system. 
         [0050]    It is also possible to handle a change in the power-up sequence without a large change in a circuit or a configuration, thereby improving re-usability and design reliability of the circuit. 
         [0051]    A state of the input power may be monitored through the comparator, so that the monitored state may be utilized during a diagnosis of failure. 
         [0052]    While the power-up sequence control system of the present invention has been described with reference to the exemplary embodiments of the present invention, but the scope of the present invention is not limited to the aforementioned exemplary embodiment, and it is apparent to those skilled in the art that modifications, changes, and various modified exemplary embodiments are available without departing from the scope of the spirit of the present invention.