Abstract:
In one embodiment, a high-resolution measurement apparatus and method determine the position and motion of an object such as a human hand relative to a sensor array. Capacitance transferred to the array by the object within a sensor field produces minute phase changes in a fixed-frequency reference signal applied to the several elements of the array. The phase changes are measured by first heterodyning the phase-shifted reference signal with a second reference signal to obtain a low frequency intermediate signal, and then employing a phaselocked loop to multiply the phase information in the intermediate signal by orders of magnitude, thereby permitting the use of conventional methods to measure the resulting greatly magnified phase changes. Other embodiments provide direct digital measurement of unknown electrical properties, such as capacitance, inductance, and resistance. In general, principles of the invention may be used to provide precise measurement of phenomena, properties, or conditions that produce phase shifts in a fixed-frequency reference signal.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application takes the benefit of provisional application No. 60/132,424 filed May 4, 1999, incorporated herein by reference. 
    
    
     FIELD OF THE INVENTION 
     The present invention is concerned with precise measurement of physical phenomena, properties or conditions, such as values of capacitance, inductance, or resistance, for example, and is more particularly concerned with apparatus and methods for determining position and movement of a hand or other object in a sensor field. 
     BACKGROUND 
     Douglas Engelbart&#39;s invention of the mouse, patented in 1970, and the parallel development of the graphical user interface, made it possible for persons unfamiliar with computers to quickly become comfortable with their use. These two developments have contributed greatly to the explosive growth of the personal computer industry. More recently, along with hypertext, these innovations have fostered the dynamic growth of the Internet. 
     Numerous other devices now exist which generally duplicate the functions performed by the mouse and its buttons. These include the touchpad, used to integrate mouse functions into laptop and notebook computers; the joystick and other input devices used primarily with video games; and touchscreen and pen-based techniques which allow direct physical interaction between a user and the objects displayed on a computer monitor screen. All of these are variants of the basic mouse concept; hence, none represents a major breakthrough in human-computer input technology. Meanwhile, three dimensional computer representations are becoming increasingly commonplace in computer-aided design, games, virtual reality and autostereoscopic (i.e., 3D without glasses) displays. Existing two-dimensional input devices are inadequate to function as a natural, user-friendly complement to these three-dimensional output systems. 
     Existing two-dimensional input devices are tactile, requiring physical contact and manipulation by the user. The mouse, for example, is subject to failures from wear, jamming from foreign materials, and slipping on smooth surfaces. Other mouse-like devices, due to their tactile nature, suffer similar problems from repeated use and physical abuse. 
     In many types of computer use, the user constantly moves back and forth between the keyboard and the mouse or touchpad. These actions waste motion, are time consuming and often result in keystroke errors when the user&#39;s hand returns to the keyboard. 
     More recently, three-dimensional computer input techniques have been proposed, using video cameras or an arrangement of active devices, including sonic, radio frequency or infra-red emitters and detectors. Such techniques are costly, complex and usually intrude on the user&#39;s freedom of movement. 
     BRIEF SUMMARY OF THE INVENTION 
     The present invention provides high-precision apparatus, systems, and methods that employ phase shifts in a fixed-frequency signal. For example, the invention can be used to determine the position and motion of a hand or other object in a sensor field using one or more conducting elements or probes. It can also be used, for example, in precise measurement of electrical properties, such as capacitance, inductance, or resistance. In its application to the measurement of the position and motion of a hand or other object, human body capacitance 1  is transferred to the apparatus by the presence of a hand or other object near a probe or probe array. A multi-dimensional computer input is achieved by means of an array or network of two or more probes. In a preferred embodiment, probes are arranged in opposing pairs to achieve improved sensitivity and to cancel sensor nonlinearity. 
       1  See “Human Body Capacitance: A Review” by Albert E. Seaver, Proceedings of the 25th Annual Meeting, Electrostatics Society of America, pp. 16-29, 1997.  
     In a preferred embodiment for the measurement of a hand or other object in a sensor field, a fixed-frequency signal is applied to a sensor network comprising one or more pairs of conducting elements connected to one or more passive components such as fixed resistors and/or inductors. Sensed capacitance changes result in phase changes in the applied signal relative to a reference signal. A novel method of phase measurement measures these phase changes with extremely high resolution and accuracy, producing an output that is inherently digital (i.e., incremental), and that can be readily converted into any desired computer input format. 
     Probe geometry can be varied to meet an unlimited number of specific applications. For example, multiple independent arrays can be employed to achieve a six-degree-of-freedom control input by using each hand to control a separate three-axis array, or by two persons competing simultaneously in the same 3D video game. Multiple planar arrays can be used to sense the proximity or actual location of a person or object for safety or intrusion detection purposes. 
     The present invention provides, inter alia: 
     1) A novel apparatus and method of measuring minute capacitance values with extreme precision, thereby to produce computer inputs representing the position and motion of a hand or other object in three dimensions, 
     2) A computer input device with no moving parts, which can be operated without physical contact, and is therefore inherently more reliable than existing tactile and force-feedback input devices, 
     3) A computer input device that permits a person using both a keyboard and the present invention to alternate between the two without moving their hands away from the immediate vicinity of the keyboard, thereby reducing fatigue and increasing the user&#39;s speed and accuracy, 
     4) A computer input device whereby human gestures can be compared to stored profiles that represent commands or data inputs to a computer or control system, 
     5) A low-cost computer input device, 
     6) A completely non-intrusive computer input device, 
     7) A computer input device which, in one embodiment, can be plugged into the mouse port of a desktop computer, obtaining its operating power directly from the host computer. 
     8) Apparatus and methods for precise measurement of unknown electrical properties, such as capacitance, inductance, and resistance. 
     9) Apparatus and methods for precise measurement of phenomena, properties or conditions that produce minute phase shifts in a fixed-frequency signal. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention will be further described in conjunction with the accompanying drawings, which illustrate preferred and exemplary embodiments, and wherein: 
     FIG. 1 is a block diagram of an apparatus for determining the position and motion of a hand in space in accordance with the invention. 
     FIG. 2 is a detailed block diagram of a FREQUENCY REFERENCE shown in FIG.  1 . 
     FIG. 3 is a schematic diagram of a PULSE DELETE shown in FIG. 2, in FIG.  9  and FIG.  18 . 
     FIG. 4 is a schematic diagram of a BANDPASS FILTER shown in FIG.  2 . 
     FIG. 5 is a diagram of a pairwise arrangement of sensor probes, which may be employed for measuring position and motion in one direction in the region between the probes. 
     FIG. 6 is a block diagram of an INPUT FILTER, MIXER &amp; LPF shown in FIG.  1 . 
     FIG. 7 is a schematic diagram of a 1 MHz BANDPASS FILTER &amp; LIMITER shown in FIG.  6 . 
     FIG. 8 is a schematic diagram of an EXCLUSIVE “OR” MIXER AND LOW PASS FILTER shown in FIG.  6 . 
     FIG. 9 is a block diagram of one of six identical PHASELOCKED LOOPS shown in FIG.  1  and of an individual PHASELOCKED LOOP shown in FIG.  17  and FIG.  18 . 
     FIG. 10 is a schematic diagram of a 74HC9046 PLL CIRCUIT shown in FIG.  9 . 
     FIG. 11 is a block diagram of INTERFACE ELECTRONICS shown in FIG.  1 . 
     FIG. 12 is a diagram, partly in block form and partly in schematic, of a VCO-TO-GRAY CODE CONVERTER shown in FIG.  11 . 
     FIG. 13 is a schematic diagram of an INTERFACE MICROCONTROLLER shown in FIG.  11 . 
     FIG. 14 is a diagram of a two-dimensional sensor array configuration incorporated in a desktop computer keyboard. 
     FIG. 15 is a diagram of a three-dimensional sensor array configuration incorporated in a desktop computer and monitor. 
     FIG. 16 is a diagram of a 3D sensor array configuration in the form of two panels at right angles. 
     FIG. 17 is a diagram, partly in block form and partly in schematic, of an apparatus for high-resolution measurement of an unknown capacitance or inductance in accordance with the invention. 
     FIG. 18 is a diagram, partly in block form and partly in schematic, of an apparatus for high-resolution measurement of an unknown resistance in accordance with the invention. 
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
     FIG. 1 is a block diagram of one embodiment of the invention. Five separate blocks are shown to facilitate the following description. In the physical implementation, logic functions performed within each of the five blocks are preferably combined in a single programmable logic device such as a field-programmable gate array (FPGA), application-specific integrated circuit (ASIC) or the like. 
     FIG. 2 is a detailed block diagram of Block  1 , Frequency Reference, in FIG.  1 . The square-wave output of a 10 MHz oscillator  6  is used to synthesize three derivative signals, which, together with the clock signal, comprise the four outputs of the Frequency Reference. These signals are used to implement the functions performed by the other blocks shown in FIG.  1 . 
     The 10 MHz clock oscillator  6  is a widely available commercial device. Its output is applied to a divide-by-501 circuit  7  of conventional design to produce Output #1 of approximately 19,960.08 Hz. 
     The 19,960.08 Hz signal is also applied to a divide-by-two circuit  8  to produce a signal at approximately 9,980.04 Hz. This signal is then applied to the Pulse Delete circuit  9  to delete pulses from the 10 MHz clock signal. 
     FIG. 3 is a schematic diagram of the Pulse Delete circuit  9 . The circuit removes exactly one pulse from the 10 MHz Clock signal for each negative-to-positive transition of the Delete Rate (9,980.04 Hz) signal. After each pulse delete occurs, the input D flip-flop (FF  1 ) is reset via NAND  3  to wait for the next positive transition of the Delete Rate signal. 
     The resulting pulse train is then applied to a divide-by-10 circuit  10  (FIG. 2) of conventional design. The Output #2 is a signal at approximately 999,002 Hz ([10,000,000-9,980.04]/10). This signal exhibits phase jitter of ±18 degrees at 9,980 Hz, introduced by the pulse-delete-and-divide process. 
     The 10 MHz clock signal is also applied to a divide-by-10 circuit  11 , the 1 MHz square wave output of which is applied to a bandpass filter  12  as indicated in FIG.  2 . FIG. 4 is a schematic diagram of a typical filter of this type. The filter output (Output #3 in FIG. 2) is a 1 MHz sine wave, which provides the excitation signal applied to each element of the Probe Array (Block  2  of FIG.  1 ). The 10 MHz clock, designated Output #4 in FIG. 2, is used to perform certain functions within the phaselocked loops (Block  4  of FIG.  1 ), as will be described in detail below. 
     FIG. 5 depicts a probe pair, representative of one axis of a Probe Array, (Block  2  of FIG.  1 ). Each probe in the preferred embodiment comprises parallel conducting elements, strips of foil or lengths of wire, interconnected with resistors as shown in the figure. Variations in body capacitance detected within the field (vicinity) of the probes cause corresponding shifts of the phase of the  1  MHz signal applied to each probe circuit. 
     A single probe can be used to establish a single sensing axis as will be described below. However, the opposing, pairwise arrangement described in the preferred embodiment provides optimum sensitivity and linearity within the sensing region between the two probes. 
     FIG. 6 is a block diagram of the Input Filter, Mixer and LPF (low-pass filter), six of which comprise Block  4  in FIG.  1 . Each sinusoidal probe signal is first applied to an active bandpass filter and limiter  13 , shown in schematic form in FIG. 7, with sufficient gain to assure rail-to-rail swing (clipping) of the filter output. The filter output and 999,002 Hz reference (Output #2 of the Frequency Reference) are then applied to an Exclusive OR/Low Pass Filter combination  14  (shown in detail in FIG. 8) to obtain the 998 Hz difference frequency between the two signals. The difference frequency (intermediate frequency) is orders of magnitude smaller than the frequency of either signal applied to the Exclusive OR/Low Pass Filter combination  14 . The Low-Pass Filter output is an approximate triangle wave as shown. 
     The mixing process described above preserves the phase shift in degrees of the 1 MHz probe signal with respect to the probe excitation signal. Hence, an 18 degree phase shift in the 1 MHz probe signal, equivalent to a 50 nanosecond shift in the zero crossing at 1 MHz, becomes a 50 microsecond shift in the zero crossing of the 998 Hz signal. [On the other hand, if a 1 MHz signal were converted to 1 kHz by applying it to a divide-by-1,000 circuit, an 18 degree phase variation would also be divided by-1,000, and the 50 nanosecond difference in zero crossings at 1 MHz would still be 50 nanoseconds at 1 kHz.] 
     FIG. 9 is a block diagram of a phaselocked loop circuit, six of which comprise Block  4  of FIG. 1, the Phaselocked Loops. Each of these tracking loops is used to track one of the six 998 Hz Mixer outputs and to provide VCO outputs at a nominal frequency of 20 kHz (more accurately, 19,960.08 Hz). 
     Referring to FIG. 10, the 998 Hz mixer output is applied to the “Signal” input (Pin  14 ) of a 74HC9046 Phaselocked Loop (PLL) integrated circuit. Phase Comparator #1 of the 9046 (Pin  2 ) provides an output voltage equal to Vcc/2 times the phase difference in radians between the signal and comparator inputs at Pins  14  and  3 , respectively. For Vcc =5 volts, the phase detector output is equal to 1.59 volts per radian (27.8 mv./degree). The Phase Comparator output (Pin  2 ) is then applied to a single-pole, passive (RC) loop compensation filter as shown in FIG. 10, the output of which is applied to Pin  9 , VCO control input, of the 9046. 
     The external resistor connected to Pin  11  and the capacitor connected between Pins  6  and  7  together determine the center frequency (20 kHz) and scale factor (approximately 8 kHz per volt) of the VCO. The external resistor connected to Pin  12  is used to provide an offset center frequency for the VCO. 
     The VCO output, at a nominal frequency of 20 kHz, is applied to the “delete rate” input of a Pulse Delete circuit  16  shown in FIG.  9 . This circuit is identical to the one described earlier and depicted in FIG.  3 . Pulses are deleted from the 10 MHz Reference input at the delete rate of 20 kHz. A divide-by-10,000 circuit  17  of conventional design follows the pulse delete circuit. Both the Pulse Delete and Divide-by-10,000 functions are implemented with logic contained within the previously mentioned programmable logic device. 
     The output of the Divide-by 10,000 is a 998 Hz [(10,000,000-20,000)/10,000] signal with a jitter of ±0.018° at a jitter frequency of 998 Hz. This signal is applied to the Comparator input (Pin  3 ) of the 74HC9046 PLL to complete the tracking loop. 
     Component values in the tracking loop are selected using conventional phaselocked loop design methods. In the preferred embodiment, the loop is designed to provide a critically damped response with roots at −16 radians/second. 
     As previously noted, since the 1 MHz probe signals are heterodyned with the 999,002 Hz reference signal (FIG. 6) to derive each of the 998 Hz inputs to the phaselocked loops, the phase shift in degrees of the 1 MHz probe inputs is preserved in the 998 Hz Mixer outputs. Each tracking loop VCO [with a nominal center frequency of 20 kHz] is phaselocked to one of the probe input signals. As a result of the Divide-by-10,000 in the loop, phase variations in the 998 Hz input to the tracking loop are multiplied by 10,000 in the VCO output signal, i.e., an increase of orders of magnitude. A phase shift of one cycle (360 degrees) in the VCO output represents 360/10,000=0.0360° of relative phase change between a pair of 1 MHz probe signals. At the 1 MHz probe frequency, this corresponds to an increment of 0.1 nanosecond. However at the 998 Hz phase detector input, the corresponding time increment is equal to 0.1 microsecond or 100 nanoseconds. At the 20 kHz VCO output, the same increment of phase change corresponds to one cycle at 20 kHz, or 50 microseconds (50,000 nanoseconds). 
     The 20 kHz outputs of the phaselocked loops are the primary or “primitive” outputs of the invention. Relative phase changes between signals derived from any pair of probes are obtained by counting cycle “slips” between the corresponding pair of VCO outputs. 
     The frequency of the “20 kHz” VCO signals, referenced to a clock oscillator frequency of 10 MHz, is exactly 10,000,000/501 Hz. This frequency is exactly equal to the frequency of Output #1 from the Frequency Reference. Hence, the position and motion of a hand or other object relative to a single probe can be measured by counting cycle slips of the probe-derived 20 kHz VCO with respect to Output #1 from the Frequency Reference. Examples of applications requiring the measurement of position relative to a single sensor would include intrusion detection and protection of an operator using a dangerous machine. 
     FIG. 11 is a block diagram of a typical embodiment of the Interface Electronics, Block  5  in FIG.  1 . In the preferred embodiment, pairs of 20 kHz signals are converted to Gray Code format by converters  18  to interface directly with a commercial mouse controller IC  19 . 
     FIG. 12 shows the detailed logic design of the VCO-to-Gray Code Converter  18 . The two 20 kHz signals comprising a single axis UP/DOWN pair are applied to a D flip-flop. The Q output of the D flip-flop will change state for each 180 degrees of relative phase shift between the two input signals. The two 20 kHz signals are also applied to a two-input Exclusive OR (XOR) gate. A low-pass filter follows the XOR. Either a two-pole passive RC filter or digital filter of known design can serve this purpose. The sign of the filtered output of the XOR determines the direction (UP or DOWN) of the desired count. 
     Both positive-going and negative-going transitions of the Q output of the D flip-flop produce counts. This provides a resolution of one count for each 180 degrees of phase shift between the two VCO inputs, corresponding to phase changes in the 1 MHz probe signals of 0.018 degrees. The remaining logic shown in FIG. 12 is used to convert the Q and filtered XOR outputs to gray code format. 
     FIG. 13 is a schematic representation of the Interface Microcontroller  19  used to convert the outputs of the gray code converter  18  to PS/2 or serial mouse format. 
     The embodiment of Block  5 , Interface Electronics, described above, illustrates just one possible circuit arrangement for converting pairwise combinations of 20 kHz signals into a format suitable for a specific application of the invention. Alternative circuits for counting the cycle slip between two signals are well known to those skilled in the art. 
     Three examples of probe geometry are illustrated in FIG. 14, FIG.  15  and FIG.  16 . The probes will typically comprise lengths of wire or narrow strips of metallic foil mounted, in the case of FIG. 14, on the under side of a computer keyboard. 
     FIG. 14 depicts a two-dimensional probe geometry useful for emulating the functions of a conventional mouse. The pairwise arrangement of the probes provides symmetry within the region of sensitivity. A similar arrangement can serve the same purpose on a laptop computer. 
     FIG. 15 shows a probe configuration that can be used to provide three-dimensional inputs to a desktop computer. In this example, the pairwise arrangement is retained in the X and Y axes, and a single probe, mounted at the top of the monitor, is compared with one of the Y-axis probes to establish the Z axis. 
     FIG. 16 shows a probe arrangement on two panels at right angles to each other. This produces a three-dimensional control region which, for example, can be used to control the motion of a wheelchair. 
     Clearly, an unlimited number of probe arrangements are possible, including helmet-mounted probes, multiple panels employed to detect the presence of a person in dangerous proximity to a piece of machinery, and an endless variety of other applications. 
     FIG. 17 shows an embodiment for direct measurement of an unknown capacitance or inductance. In this case, the 1 MHz Excitation [Output #3] is applied to the series combination of the unknown reactance (capacitance or inductance) and a fixed resistor of known value. The phase of the signal at the junction between the two components is measured as in the earlier described embodiment of the invention. Calibration is achieved by substituting one or more known reactance in the circuit as shown in the figure. 
     FIG. 18 shows an embodiment of the invention providing a high-resolution, direct digital measurement of resistance, and thereby providing accurate digital measurement of any physical phenomenon that can be related to resistance, as in the use of thermistors for temperature measurement or strain gages, for example. 
     Referring to FIG. 18, Output #1 (19,960.08 Hz) is applied to the delete rate input of a pulse delete circuit (shown in FIG.  3 ), together with the 10 MHz Clock Signal. The output of the pulse delete is applied to a divide-by-2500 to obtain a signal at 3,992.016 Hz. This signal is then applied to a divide-by-2, providing an output at 1,996.008 Hz with a precise 50:50 duty cycle. This signal is then applied directly to a divide-by-2 circuit  29 , and, via inverter  28 , to a second divide by 2. This produces two 998.004 Hz outputs in exact phase quadrature (90° out of phase). 
     The two 998.004 Hz signals are applied across a series combination comprising the resistance to be measured and a reference resistor of known value. The junction of the two resistors is connected to the input terminal of the op amp input of the phaselocked loop  30 . The resulting signal at the input to the phaselocked loop will exhibit a phase shift relative to the in-phase 998.004 Hz signal equal to the arctangent of the ratio of the unknown resistor to the known reference resistor. This nonlinearly can be readily compensated within the using computer. 
     Output #1 and the VCO output of the phaselocked loop (nominally 20 kHz) are applied to Interface Electronics  32 , which includes a counter of conventional design that accumulates cycle slips between the two signals and circuitry that formats the resulting measurement data for input to a PC or dedicated microcomputer. 
     The embodiment described above can be employed to measure resistance values with an accuracy of 0.1 percent or better. As in the earlier described embodiments, phase changes in an output signal correspond to substantially smaller phase changes in an input signal, and the phase changes in the output signal are preferably at least an order of magnitude greater than the corresponding phase changes in the input signal. 
     While preferred embodiments of the invention have been shown and described, the embodiments are to be considered exemplary rather than restrictive, and various modifications can be made without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims.