Abstract:
An array substrate for a liquid crystal display device includes a flexible substrate, a buffer layer on the flexible substrate, a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, and a pixel electrode on the thin film transistor.

Description:
[0001]     This application is a Divisional of Copending U.S. patent application Ser. No. 09/984,027 and claims the benefit of Korean Patent Application No. P2000-63745, filed on Oct. 28, 2000 in Korea, both of which are hereby incorporated by reference in their entirety. 
     
    
     BACKGROUND OF THE INVENTION  
       [0002]     1. Field of the Invention  
         [0003]     The present invention relates to a liquid crystal display (LCD) device and a method for fabricating the same, and more particularly, to an array substrate having thin film transistors for a liquid crystal display (LCD) device and a method for fabricating the array substrate using flexible materials.  
         [0004]     2. Discussion of the Related Art  
         [0005]     A liquid crystal display (LCD) device uses optical anisotropy characteristics of liquid crystal molecules to display images. Typical LCD devices include upper and lower substrates with a liquid crystal material interposed therebetween.  
         [0006]      FIG. 1  is an exploded perspective view illustrating a typical LCD device. The LCD device includes an upper substrate  9  and a lower substrate  11  opposing each other and a liquid crystal layer  14  interposed therebetween. The upper substrate  9  and the lower substrate  11  are commonly referred to as a color filter substrate and an array substrate, respectively. A substrate  5 , a black matrix  6  and a color filter layer  7  that includes a plurality of sub-color-filters red (R), green (G), and blue (B) are formed on the upper substrate  9 . The black matrix  6  surrounds each of the sub-color-filters to SUBSTITUTE SPECIFICATION form an array matrix. Additionally, a common electrode  18  is formed to cover the color filter layer  7  and the black matrix  6  on the upper substrate  9 .  
         [0007]     The lower substrate  11  includes a plurality of thin film transistors (TFTs) “T” arranged in an array matrix on a substrate  22  corresponding to the color filter layer  7 . Each of the TFTs “T” function as switching elements. In addition, a plurality of crossing gate lines  13  and data lines  15  are orthogonally disposed on the lower substrate  11  such that each of the TFTs “T” are located near a corresponding crossing portion of the gate lines  13  and the data lines  15 , thereby defining a pixel region “P.” In the pixel region “P,” a pixel electrode  17  is disposed and is made of a transparent conductive material such as indium tin oxide (ITO), for example.  
         [0008]     Liquid crystal molecules of the liquid crystal layer  14  are aligned according to electric signals applied by the TFTs “T,” thereby controlling incident rays of light to display an image. Specifically, electrical signals applied to the gate line  13  and the data line  15  are transmitted to a gate electrode and a source electrode of each the TFTs “T,” respectively. The signal applied to the drain electrode is transmitted to the pixel electrode  17 , thereby aligning the liquid crystal molecules of the liquid crystal layer  14  in a first direction. Then, light generated from a backlight (not shown in the figure) selectively passes through the liquid crystal layer  14  to display an image.  
         [0009]     A fabricating process for the above-described array substrate requires repeated steps of deposition and patterning of various layers. The patterning steps implement photolithographic processing steps, i.e., a masking step, including selective light exposure using a mask, i.e., a photomask. Since one cycle of the photolithographic processing step is facilitated with a single mask, the total number of masks used in the fabrication process is a critical factor in determining the necessary total number of patterning steps. Furthermore, as fabricating processes for the array substrate become more simplified, fabrication errors associated with the fabricating processes may decrease. Moreover, other processing steps such as etching and striping, for example, are also repeated during fabrication of the array substrate.  
         [0010]      FIG. 2  is an enlarged plan view illustrating a pixel of a related art array substrate  11  for a liquid crystal display. In the  FIG. 2 , the array substrate  11  includes a pixel “P” defined by crossing gate and data lines  13  and  15 , respectively. The pixel “P” includes a TFT “T” as a switching element, the pixel electrode  17 , and a storage capacitor “C.” The TFT “T” includes a gate electrode  26 , a source electrode  28 , a drain electrode  30 , and an active layer  55 . The source electrode  28  is electrically connected to the data line  15 , and the gate electrode  26  is electrically connected to the gate line  13 .  
         [0011]      FIG. 3  is a cross sectional view along II-II of  FIG. 2 , showing a related art array structure resulting from a conventional fabricating sequence. In  FIG. 3 , a transparent glass substrate  22  is used to form a switching element thereon. The thin film transistor “T” including the gate electrode  26 , the source electrode  28  and the drain electrode  30  is formed on the substrate  22 . A passivation layer  29  is subsequently formed on the thin film transistor “T” and the pixel electrode  17  that contacts the drain electrode  30  is formed thereon.  
         [0012]     In the conventional process described above, mechanical characteristics of the material for the substrate  22 , such as that of glass or quartz, are rigid so that the fabrication processes can be done easily due to minimize deformation of the substrate. However, any concentrated point loading, such as an external impact, can fracture the material.  
       SUMMARY OF THE INVENTION  
       [0013]     Accordingly, the present invention is directed to an array substrate for a liquid crystal display device and a method for fabricating the same that substantially obviates one or more of problems due to limitations and disadvantages of the related art.  
         [0014]     An object of the present invention is to provide an array substrate which is made of a flexible material and a method for fabricating the same that is flexible and can dampen external impacts.  
         [0015]     Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.  
         [0016]     To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, an array substrate for a liquid crystal display device includes a flexible substrate, a buffer layer on the substrate, a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, and a pixel electrode on the thin film transistor.  
         [0017]     In another aspect, a method for fabricating an array substrate includes the steps of forming a buffer layer on a metal substrate, forming a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, forming a pixel electrode contacting the drain electrode, removing the metal substrate, and forming a plastic material beneath the buffer layer.  
         [0018]     In another aspect, a liquid crystal display device includes an elastic substrate, a buffer layer on the substrate, a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, a passivation layer on the thin film transistor, and a pixel electrode on the passivation layer.  
         [0019]     It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0020]     The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. In the drawings:  
         [0021]      FIG. 1  is an exploded perspective view showing a color liquid crystal display device of the related art;  
         [0022]      FIG. 2  is an enlarged plan view showing a pixel of an array substrate for a liquid crystal display device of the related art;  
         [0023]      FIG. 3  is a cross-sectional view taken along II-II of  FIG. 2 ; and  
         [0024]      FIGS. 4A  to  4 F are cross-sectional views showing an exemplary fabricating sequence according to the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0025]     Reference will now be made in detail to the preferred embodiments of the present invention, which are illustrated in the accompanying drawings.  
         [0026]      FIGS. 4A-4F  show an exemplary process for forming an inverse staggered type thin film transistor of a back channel etch structure according to the present invention. In  FIG. 4A , a buffer layer  113  may be formed on a substrate  111  by deposition, for example. The buffer layer  113  may include an insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), for example, and the substrate  111  may include a metal material that can be easily etched away. The buffer layer  113  improves deposition quality of conductive lines subsequently formed thereon, and protects metal ions of the substrate from migrating into the conductive lines. Next, a conductive metal material selected from a group of aluminum (Al), aluminum alloy, molybdenum (Mo), and tungsten (W), for example, may be deposited on the buffer layer  113 . The conductive metal material is subsequently patterned to form a gate line (not shown in figure) and a gate electrode  126 . In addition, an anodized film (not shown) may be formed on the gate electrode  126 .  
         [0027]     In  FIG. 4B , a gate insulating layer  128  may be formed on the gate electrode  126  by deposition or coating of an inorganic insulating material selected from a group including silicon oxide (SiO 2 ) and silicon nitride (SiN x ), for example, or an organic insulating material selected from a group including benzocyclobutene and an acrylic resin, for example. Subsequently, an intrinsic semiconductor layer  130  and an extrinsic doped semiconductor layer  132  may be formed on the gate insulating layer  128  by deposition of intrinsic amorphous silicon and doped amorphous silicon, respectively.  
         [0028]     In  FIG. 4C , an active layer  155  and an ohmic contact layer  156  may be formed to overlap over the gate electrode  126  by patterning the intrinsic semiconductor layer  130  and the doped semiconductor layer  132 .  
         [0029]     In  FIG. 4D , a source electrode  159  and a drain electrode  161  may be formed by deposition of a conductive metal material selected from a group including molybdenum (Mo), tungsten (W), chromium (Cr), and an aluminum alloy, for example, on the ohmic contact layer  156 . Subsequently, the conductive metal material is patterned to form the source and drain electrodes  159  and  161 , and a data line  115  extending perpendicularly from the source electrode  159 , which, in combination with the crossing gate line (not shown), defines a pixel region.  
         [0030]     After forming the source and drain electrodes  159  and  161 , a passivation layer  165  may be formed by deposition or coating of an insulating material on the substrate. Then, a drain contact hole  167  may be formed over the drain electrode  161 . The passivation layer  165  may include benzocyclobutene and an acrylic resin, for example, and the passivation layer may be formed flat as shown in the  FIG. 4D . Then a pixel electrode  171  may be formed by deposition of a transparent conductive metal material including indium-tin-oxide (ITO) and indium-zinc-oxide (IZO), for example, on the passivation layer  165 . Subsequently, the transparent conductive metal material may be patterned, thereby forming the pixel electrode  171 . The pixel electrode  171  may contact the drain electrode  161  through the drain contact hole  167 . In addition, although not shown in the figures, an orientation film may be formed on the pixel electrode  171 .  
         [0031]     In  FIG. 4E , the metal substrate  111  is removed by etching, for example, thereby exposing the buffer layer  113  to ambient conditions.  
         [0032]     In  FIG. 4F , an elastic material  173 , i.e., plastic, may be applied beneath the buffer layer  113  using a roller  175 , for example, to give the elastic material a support force and flatness. Accordingly, the applied elastic material may function as a lower substrate. The elastic material for coating may be selected from a group including polycarbonate (PC) and polystyrene, for example.  
         [0033]     Alternatively, instead of using the roller for applying the elastic material to the buffer layer  113 , the entire array substrate may be dipped into a melted elastic solution after the metal substrate is etched away. Then, a portion of the elastic material coated on an upper part of the array substrate may be removed, and a portion of the elastic material coated beneath the buffer layer  113  is shaped flat. By using either method, the flexible array substrate may be fabricated and damage to the array substrate can be prevented during subsequent assembling processes.  
         [0034]     It will be apparent to those skilled in the art that various modifications and variations can be made in the method of manufacturing an array substrate of the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.