Abstract:
A method for detecting an internal failure in a capacitor bank connected to a power system, wherein the capacitor bank includes a plurality of capacitor units that are divided into two Y sections. Each phase in each of the Y sections define a leg and each leg includes series and/or parallel-connected capacitor units. The internal failure may occur in one or more capacitor elements or units or involve one or more legs. The method includes measuring the phase current in one of the phases, calculating the root mean square value, denoted by RMS, of the measured phase currents, measuring the unbalance current between the two sections, calculating the RMS value of the measured unbalance currents, and detecting the phase angle between the measured phase current and the measured unbalance current.

Description:
FIELD OF THE INVENTION 
       [0001]    The present invention relates to the field of detecting an internal failure in a capacitor bank connected to a power system. It relates in particular to detect an internal failure in Y-Y connected capacitor bank. The capacitor bank is further divided into two Y-connected sections. Each of the Y sections is, at the one end, connected to each individual phase of the multi-phase power system and, at the other end, Y-connected to form a neutral point. Therefore, a leg including series- and parallel-connected capacitor units is formed for each of the phases. This means that for a three-phase system, each of the Y sections has three legs. Furthermore, each of the capacitor units comprises a plurality of capacitor elements connected in parallel and/or series. The internal failure may be in one or more capacitor elements or units and involves one or more legs in the capacitor bank. 
       BACKGROUND OF THE INVENTION 
       [0002]    Capacitor banks are installed to improve the quality of an electrical supply by providing reactive power compensation and power factor correction in a power system. The use of capacitor banks has increased because they are relatively inexpensive, easy and quick to be installed, and can be deployed almost anywhere in a power system grid. Capacitor bank installations have other beneficial effects on the system such as improvement of the voltage profile, better voltage regulation, reduction of losses, and reduction or postponement of investments in the transmission and generation capacity. 
         [0003]    A capacitor bank is assembled by a plurality of individual capacitor units. Each individual capacitor unit is a basic building block of the capacitor bank and includes a plurality of individual capacitor elements, arranged in parallel/series connected groups, within a metal enclosure. The units can be externally or internally fused, fuseless or unfused depending on the application of the bank. The elements can be connected to fuses and a group of elements is normally shunted by an internal discharge resistor in order to reduce the unit residual voltage after being disconnected from the power system. Each of the capacitor elements is constructed by winding two electrodes of aluminum foil separated by several layers of paper, or plastic film-insulated or a mixed dielectric of paper and plastic film. 
         [0004]    Capacitor banks are normally further constructed using individual capacitor units connected in series and/or parallel to obtain a required voltage rating. 
         [0005]    However, an internal failure in terms of operated fuses, failed elements and/or failed units in one or more quadrants may occur due to, for example the improper selection of the designed voltage rating that may result in continuous high voltage stress for the selected capacitor bank and eventually may lead to a dielectric failure of capacitor elements. Other causes for internal failure can be overcurrent, overvoltage, short-circuit, thermal failure and internal stress. It may also include maloperation of fuses due to bad fuse coordination. 
         [0006]    The existing unbalance protection schemes are typically available to detect such an internal failure. For example, unbalance protection can be utilized in a variety of capacitor bank connections: grounded Y, ungrounded Y, delta, and single-phase. For example, Y-Y arrangement is a preferable configuration for unbalance protection of a large capacitor bank that is split into two Y sections. This scheme is based on a current measurement, for example a current transformer, arranged between the two neutrals. Any change in the capacitance of any capacitor will cause a change in the current measurement. 
         [0007]    However, the existing unbalance protections based on a double Y scheme are liable to detect the number of element and/or unit failures incorrectly. For example, in a three-phase capacitor bank, an internal failure in one leg may cancel the unbalance signal produced by another internal failure in another leg sharing the same phase but in the other section of the bank, while failures involving three legs in the same Y section may results in no unbalance signal. Consequently, neither alarm nor trip signal would be sent when it is supposed to be. Undetected failures inside a capacitor bank may lead to a risk of fire or explosion accompanied by a severe damage of the whole capacitor bank before taking an early preventive action. 
         [0008]    Furthermore, failures in two phases of one Y section may be seen as a failure in the third phase of the other Y section, which may result in an over-accumulation effect as if there is already a failure in this third phase. This over-accumulation effect may further result in a false alarm or trip signal. 
         [0009]    In “Principles of shunt capacitor bank application and protection”, by SATISH SAMINENI ET AL published in PROTECTIVE RELAY ENGINEERS, 2010 63RD ANNUAL CONFERENCE FOR, IEEE, PISCATAWAY, N.J., USA, 29 Mar. 2010 (2010-03-29), pages 1-14, XP03f679144, ISBN: 978-1-4244-6073-1.(D1) some methods of fault detection of capacitor banks are disclosed. 
         [0010]    D1 especially describes a method for detecting a fault in an ungrounded “double wye” capacitor bank. D1 discusses determining the phase of the capacitor bank where a fault occurs and the number of faulty units in the phase. The method of D1 uses a positive sequence current as a reference for identifying in which phase a fault occurs. The angle of the measured unbalance current of the neutral interconnection between the two parallel “WYEs” are determined in relation to the symmetrical positive sequence current. 0 degrees indicates a fault in phase A, 60 degrees indicates phase B, 120 degrees phase C, 180 degrees phase A, 240 degrees phase B and 300 degrees indicates phase C. However, after a first fault has occurred, the currents will no longer be symmetrical, and the method does not discuss how to find subsequent faults following the first fault. The method of D1 is limited to finding the faulty phase of one fault event and leaves no clue how to identify subsequent faults. 
         [0011]    Therefore, a more sensitive and accurate internal failure detection and protection scheme is highly desired. 
       SUMMARY OF THE INVENTION 
       [0012]    One object of the present invention is to provide an improved method for detecting an internal failure in a double Y-connected capacitor bank with better reliability and sensitivity. 
         [0013]    This object is achieved by an unbalance current detection method, characterized in that the method further comprises calculating the per unit value of the unbalance current based on the calculated RMS value of the measured phase current and the calculated RMS value of the measured unbalance current, tracking and detecting a change of the unbalance current between the present calculated per unit value of the unbalance current and the previous calculated per unit value of the unbalance current, determining the vectorial step change of the unbalance current, normalizing the phase angle of the determined vectorial step change to be one of 0°, 60°, 120°, 180°, 240° and 300°, identifying the number of internal failures and their corresponding locations based on the determined vectorial step change of the unbalance current and the normalized phase angle, and initiating an alarm or a trip signal when the determined total number of internal failures exceeds a first or a second threshold value respectively. 
         [0014]    When a failure occurs in the capacitor bank, it will result in a change of the unbalance current. This failure may involve one or more internal failures in terms of operated fuses, failed elements and/or failed units in one or more legs. The failure can be distinguished by detecting an unbalance current peak occurrence as a failure event, which occurred during the arcing over the defective capacitor. However, when two internal failures involve two legs sharing the same phase, the unbalance signals corresponding to these failures may cancel each other. Moreover, failures involving three legs in the same Y section in a three-phase capacitor bank may result in no unbalance signal detected. Furthermore, failures in two phases of one Y section may be seen as a failure in the third phase of the other Y section, which may result in an over-accumulation effect as if there is already a failure in this third phase. This over-accumulation effect may further result in a false alarm or trip signal. 
         [0015]    According to the invention, such a cancellation or over-accumulation effect is prevented by determining the exact number of the internal failures based on the information of the determined vectorial step change of the unbalance current and the phase angle between the phase current and unbalance current. Therefore, the invention makes it possible to determine the exact number of the internal failures. 
         [0016]    Because the invention makes it possible to determine the exact number of the internal failures, the invention makes it possible to take a correct action by sending the proper alarm and/or trip signal based on this more accurate information, which increases the sensitivity and reliability of an unbalance Y-Y protection scheme and solution. 
         [0017]    Furthermore, based on the normalized phase angle of the determined vectorial step change of the unbalance current, the location of an internal failure is identified. It is advantageous that the location of the internal failures is identified in a more clear way, because this consequently makes maintenance of the capacitor bank more effectively. The location is identified at the leg experienced the failure event. 
         [0018]    A further advantage of the invention is that a scheduled maintenance can be avoided in case that there is no internal failures detected or the number of internal failures per phase is less than a certain limit. 
         [0019]    It is advantageous to use a per unit value of the unbalance current because it is independent of system transients and less dependent of the temperature and frequencies variation of the capacitor bank. Therefore, there is no need to compensate the unbalance signal due to such variations or to consider delay time to avoid transients. This per unit value may be further scaled to a pre-defined value so that the number of internal failures corresponding to this particular unbalance current can be determined. 
         [0020]    Yet another advantage of the invention is that it is not needed to compensate the natural unbalance current in order to obtain an accurate unbalance signal. This is because the detection is based on the vectorial step change of the unbalance current. 
         [0021]    According to one embodiment of the invention, the vectorial step change of the unbalance current is determined by calculating the difference between two measured unbalance currents, including both magnitude and angle, tracking the change of the unbalance current. This may be done by starting tracking the change of the unbalance current after a short delay to avoid the effect of the abrupt change during arcing followed by a decay of the unbalance current and ending tracking when the unbalance current reaches its marginal steady state. 
         [0022]    According to one embodiment of the invention, the alarm signal is determined when the number of the internal failures in any of the legs of the capacitor bank exceeds the first threshold. 
         [0023]    According to one embodiment of the invention, the trip signal is determined when the number of the internal failures in one of the legs exceeds the second threshold. 
         [0024]    According to one embodiment of the invention, the first and second threshold values are corresponding to an alarm and trip levels respectively. The alarm level is equivalent to the number of faulted elements, units or the number of operated fuses depending on the configuration in any of the legs exceeds a predefined overvoltage limit across the healthy ones, this limit may be set above the natural errors to operate reliably after internal failures. The trip level is the maximum number of faulted elements, operated fuses or shorted units depending on the configuration that results in an extra voltage on the healthy capacitors, which does not exceed the contingency overvoltage capability of these capacitors. However, new threshold values may be also introduced. 
         [0025]    The object of the invention is also achieved by an arrangement for detecting a number of internal failures in a capacitor bank. Such an arrangement comprises a first current transformer, a second transformer, a computing unit and a protective unit. The first transformer is arranged to measure the phase current in one of the phases. The second current transformer is arranged at the neutral points of the two Y-sections for measuring an unbalance current. The computing unit is configured to calculate the root mean square value, denoted by RMS, of the measured phase current, calculate the RMS value of the measured unbalance current, calculating a per unit value of the unbalance current based on the calculated RMS value of the measured phase current and the calculated RMS value of the measured unbalance current, and calculate the phase angle between the measured phase current and the measured unbalance current. The protective unit is configured to detect the phase angle between the measured phase current and its corresponding measured unbalance current, track and detect a change of unbalance current between the present calculated per unit value of the unbalance current and the previous calculated per unit value of the unbalance current, determine the vectorial step change of the unbalance current, normalize the phase angle of the determined vectorial step change to be one of 0°, 60°, 120°, 180°, 240° and 300°, identify the number of internal failures and their corresponding locations based on the determined vectorial step change of the unbalance current and the normalized phase angle, and initiate an alarm or a trip signal if the determined number of internal failures exceeds a first or a second threshold value. 
         [0026]    According to an embodiment of the invention, the present method may be implemented by a computer program product. 
         [0027]    Such a computer program product comprises receiving measured phase currents, calculating the RMS values of the measured phase currents, receiving measured unbalance currents between the two Y sections, calculating the RMS values of the measured unbalance currents, calculating the phase angle between the measured phase current and the measured unbalance current, calculating a per unit value of the unbalance current based on the calculated RMS value of the measured phase current and the calculated RMS value of the measured unbalance current, tracking and detecting a change of the unbalance current between the present calculated per unit value of the unbalance current and the previous calculated per unit value of the unbalance current, determining the vectorial step change of the unbalance current, normalizing the phase angle of the determined vectorial step change to be one of 0°, 60°, 120°, 180°, 240° and 300°, determining the number of internal failures and their corresponding locations based on the determined vectorial step change of the unbalance current and the normalized phase angle, and initiating an alarm or a trip signal when the determined total number of internal elements failures exceeds a first or a second threshold value. 
         [0028]    Such a computer program can be loaded from a readable medium into the memory of a computing processor, for example, the computing processor of an electrical device to provide this improved unbalance current protection for a double Y connected capacitor bank. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0029]    The invention is now explained more closely by the description of different embodiments of the invention and with reference to the accompanying drawings in which: 
           [0030]      FIG. 1  is a flow chart illustration of the invented method for detecting an internal failure in a Y-Y connected capacitor bank, according to one embodiment of the invention. 
           [0031]      FIGS. 2   a - c  illustrate respectively instantaneous unbalance current waveform, the corresponding unbalance current per unit and the phase angle between the unbalance current and the phase current in a simulation test in an example where eleven failure events are detected. 
           [0032]      FIGS. 3   a - b  show the number of internal failures in both of Y sections corresponding to the instantaneous failure events shown in  FIG. 2   a.    
           [0033]      FIG. 4  shows an example of how information for each of instantaneous failure events is kept and recorded in a table for decision of sending an alarm or a trip signal. 
           [0034]      FIGS. 5   a - c  illustrate three scenarios, in each of which, an ambiguous detection may appear. 
           [0035]      FIG. 6  illustrates schematically an arrangement for detecting an internal failure in a capacitor bank where the capacitor bank is connected to a three-phase system and includes a double Y protection scheme, according to an embodiment of the invention. 
           [0036]      FIGS. 6   a - b  illustrate respectively an example of a schematic configuration of the capacitor units in each of the legs and a schematic configuration of capacitor elements in each of capacitor units of the capacitor bank shown in  FIG. 6 . 
           [0037]      FIG. 7  shows an example of a look up table listing the number of internal failures corresponding to the step change of the per unit value of the unbalance current based on the arrangement shown in  FIGS. 6   a - b.    
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0038]    With reference to  FIG. 6  and  FIG. 1 , an arrangement  1  for detecting an internal failure of a capacitor bank  2  comprises a first current transformer CT 1 , a second current transformer CT 2 , a computing unit  4  and a protective unit  6 . The capacitor bank  2  is connected to an electrical power system having three-phase A, B, C and includes two Y connected sections Y1 and Y2, each section Y1/Y2 including three legs A1, B1, C1/A2, B2, C2. Each of the legs is, at one end, connected to its corresponding phase and is at the other end star connected to the neutral of the capacitor bank. The first current transformer CT 1  is arranged in one of the phases, in this example in phase A, for measuring the phase current at step  100 . The second current transformer is arranged between the neutral points of the two Y sections for measuring the unbalance current between the sections at step  120 . 
         [0039]    In this example, each leg has 28 capacitor units distributed over three strings, wherein a first and a second string has respectively four series groups of two parallel connected capacitor units, while the third string has four series groups of three parallel connected capacitor units as shown in  FIG. 6   a . Each capacitor unit has two series groups of 19 parallel-connected capacitor elements as shown in  FIG. 6   b . However, it should be understood that the invention is not limited to this specific configuration. 
         [0040]    It should be understood that the invention is applicable to any type of fused, fuseless or unfused capacitor banks. In this particular example, the capacitor bank has an internal fused configuration. Furthermore, it should be understood that the invention is applicable to any of multi-phase power systems, wherein the capacitor bank has Y-Y arrangement. 
         [0041]    The computing unit  4  is connected to the first current transformer CT 1  and second current transformers CT 2 . The computing unit  4  is configured to receive the measurements from the current transformers and to calculate respectively the RMS values of the measured phase current and unbalance current at steps  110  and  130 . All measurements are based on sampling the instantaneous currents. The samples may be kept in a buffer in a memory for providing a moving snapshot of the input signal and applying recursive RMS current calculations. 
         [0042]    Furthermore, the unbalance current per unit I unpa  can be calculated based on the ratio between the calculated RMS value of the measured unbalance current I unrms  and the calculated RMS value of the phase current I phma  as follows in step  145 , 
         [0000]    
       
         
           
             
               I 
               unpu 
             
             = 
             
               
                 I 
                 unrms 
               
               
                 I 
                 phrms 
               
             
           
         
       
     
         [0043]    Additionally, this per unit value may be further scaled to a pre-specified value contained in a look-up table, see  FIG. 7  as an example, wherein, for each of unbalance current values, the number of internal failures corresponding to this value is provided. In this example, the number of internal failures is presented as the number of blown fuses or failed elements. 
         [0044]    The protective unit  6  is configured to communicate with the computing unit  4  and its main function is to determine the number of internal failures and the location of these failures and to send an alarm signal and/or a trip signal based on the number of the internal failures. The alarm or trip signals may be sent to an operator&#39;s supervision display in an automation substation and the trip signal may be sent further to a circuit breaker in order to disconnect the electrical connection to the power system. In this embodiment, the computing unit  4  and the protective unit  6  are configured as two separate modules. However, they can be integrated as one unit as intelligent electronic device (IED). The computing unit  4  and the protective unit  6  can be for example a micro-computing processor, a digital signal processor, a field-programmable gate array, or a standard computer. 
         [0045]    Based on the calculated RMS values of the measured phase current and the measured unbalance current, the protective unit is further configured to detect the phase angle at step  140 . 
         [0046]    With reference to  FIG. 2   a - c , the invention is further explained in an example, wherein, the capacitor bank  2  has experienced 11 failure events, starting from the instant 1.15 second, the failure events are distinguished by 11 current peak occurrences as shown in  FIGS. 2   a  and  2   b . These peaks occurred during the arcing over the capacitor elements before their corresponding fusing links rupture. Each failure event is recognized by tracking the change in the unbalance current measurements and detecting these current peaks, step  150 . 
         [0047]    The vectorial step change of the unbalance current is calculated based on the difference between the present calculated per unit value of the unbalance current and the previous one. This calculation is vectorial, which means that it is based on complex form, in which both current magnitudes, i.e. RMS values and phase angles are taken into consideration. The magnitude and the phase angle of the vectorial step change are then determined, step  160 .  FIG. 2   b  illustrates the corresponding unbalance current waveform in per unit of the phase current, while  FIG. 2   c  shows the phase angles between the unbalance current and the phase current corresponding to the failure events. 
         [0048]    The determined phase angle is further normalized to be one of 0°, 60°, 120°, 180°, 240° and 300°, step  170 , in order to detect which of the legs A1, B1, C1, A2, B2, C2 has experienced the failure event. In this arrangement, the normalized phase angle 0°, 60°, 120°, 180°, 240° or 300° is corresponding to leg A1, B1, C1, A2, B2 or C2. 
         [0049]    Based on the vectorial step change of the unbalance current and the normalized phase angle of the unbalance current, the number of internal failures and the location of each of these failures can be determined at step  200 . 
         [0050]      FIG. 5   a  illustrates the first scenario of a cancellation effect, wherein the operation of fuses or failure of elements in one leg may cancel the unbalance current produced by another failure in another leg sharing the same phase but on the other side of the bank. An example is shown in the right side (b) of  FIG. 5   a . In this example, 3 fuse operations have occurred in one phase in the left Y section, meanwhile 2 fuse operations have occurred in the same phase but in right Y section within the same capacitor bank. This will result in an unbalance current with the same magnitude and angle as the one obtained by having one fuse operation in the left Y of the same phase as shown in the left side (a) of  FIG. 5   a.    
         [0051]    In general, element failures in the same phases but in different sides of the bank will lead to false detection on both the location and the number of failed elements. The detected location will be the location of the leg with the higher number of failed elements. 
         [0052]      FIG. 5   b  illustrates the second scenario of the cancellation effect, wherein the operation of fuses in the three legs/phases within the same Y may result in no unbalance signal detected. More precisely, this figure shows that a combination of fuse operation in all three legs of the same Y would result in either no or false unbalance signal detected. 
         [0053]      FIG. 5   c  illustrates a scenario of the over-accumulation effect, wherein failure of elements or operation of fuses in two legs/phases of one Y will be seen as a failure in the third phase of the other Y. This wrong detection gives an incorrect accumulation effect as if there is already failure in this third phase of the other Y. This over-accumulation effect may result in a false trip or alarm. 
         [0054]    When there is a vectorial step change of the unbalance current, the number of internal failures can be obtained based on a look-up table as exemplified in  FIG. 7 . The location of the internal failures can be identified by the normalized phase angle of the vectorial step change of the unbalance current. Then, a total number of internal failures in each of legs/phases is updated accordingly, as shown in  FIG. 4 . 
         [0055]    With the updated information of the internal failures, the protective unit can make decision by sending an alarm and/or a trip signal, at step  210  in  FIG. 1 . 
         [0056]      FIGS. 3   a  and  3   b  show the number of internal failures in each of the two Y sections corresponding to each of the instantaneous failure events, wherein new alarm and trip limits are introduced. The new limits are set based on the maximum allowable number of internal failures before having the voltage on the remaining healthy capacitors exceed the contingency overvoltage capability of these capacitors. In this example, the alarm limit is set after two internal failures and the trip signal is set after five internal failures. 
         [0057]    As shown in this example, the problem with the existing unbalance protection systems applied to the same case is the incorrect detection of the number of faulted elements that results in two main problems. Firstly, no trip signal is sent after exceeding the trip limit. This problem originates from the cancellation effect resulting from a combination of element failures in the same phase but in both Y sections. For example in  FIG. 2   b , Instant of a failure event number 9 at 1.87 second brings out this problem. After this failure event the number of element failures in B1 and in C1 is 6 and 5 respectively, while in B2 and in C2, it is 4 and 2 respectively. This is equivalent to having a current component equivalent to 2 element failures in B1 and 3 element failures in C1 which will cause a lower current than the trip limit, which was set for 5 element failures, and no trip signal will be sent. 
         [0058]    The second problem is the false trip due to over-accumulation effect, which is introduced when internal failures occur in two different phases are then summed to the failures in the third phase of the opposite Y section and vice versa, Instant of a failure event number 5 at 1.40 second accentuates this problem. After this failure event, the number of element failures in C1 is 5 and in A2 and B2 is 1 and 4 respectively. This is equivalent to having a current component equivalent to 6 element failures in A2 and 9 element failures in B2 which results in an unbalance current higher than the trip limit, which was set for 5 element failures, leading to sending a false trip signal. 
         [0059]    These problems of the false tripping due to the over-accumulation effect and the cancellation effect caused by experiencing internal failures in different phases have been overcome by the present invention. Additionally, it gives a correct indication of the exact number of element failures and their corresponding locations.