Abstract:
The present invention provides an electronic switching device for a universal serial bus (USB) interface, which can connect several different electronic devices each having a universal serial bus (USB) interface when needed. By manually enabling a switch of the electronic switching device for a universal serial bus (USB) interface, a trigger signal generated from a trigger signal generator will be outputted to a control signal generator to generate a control signal for connecting related electronic devices. A delay signal generator can be added to avoid the intermediate devices being operated unintentionally.

Description:
FIELD OF THE INVENTION 
     The present invention relates to a switching device for a universal serial bus interface, and more particularly to an electronic switching device that can connect a plurality of device each having a universal serial bus interface, so as to share related resources. 
     BACKGROUND OF THE INVENTION 
     All of the conventional switching devices for a universal serial bus (USB) interface are mechanical switching devices. The switching action of the mechanical switching device is a kind of sequential switching, therefore, when the switch passes the intermediate unrelated connection points, the related electronic signal will cause unrelated devices to operate, even though the connection time is very short. When the switching between related devices is very fast, the related devices may not operate accurately. 
     Furthermore, a mechanical switching device is apt to form the disconnection problem, and sometimes is not very easy to twist/turn. 
     OBJECTS OF THE INVENTION 
     It is therefore an object of the present invention to provide an electronic switching device for a universal serial bus interface, such that when enabling the switch sequentially to select a related device, due to a delay signal generator design the intermediate devices will not operate. 
     It is another object of the present invention to provide an electronic switching device for a universal serial bus interface, so as to replace the conventional mechanical switching device to avoid the disconnection problem, and the twist/turn problem. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention can be better understood with the following drawings, in which: 
     FIG. 1 is a schematic block diagram according to a first embodiment of the present invention. 
     FIG. 2 is the circuit diagram of the first embodiment of the present invention. 
     FIG. 3 is the circuit diagram of a second embodiment according to the present invention. 
     FIG. 4 is the circuit diagram of a third embodiment according to the present invention. 
     FIG. 5 is a schematic block diagram of the first embodiment of the present invention showing that a delay signal generator is added. 
     FIG. 6 is a schematic circuit diagram of the first embodiment of the present invention showing that a delay signal generator is added. 
     FIG. 7 is a schematic block diagram of the first embodiment of the present invention showing that a display is added. 
     FIG. 8 is a schematic circuit diagram of the first embodiment of the present invention showing that a display is added. 
     FIG. 9 is a schematic block diagram of the first embodiment of the present invention showing that an enable signal generator is added. 
     FIG. 10 is a schematic circuit diagram of the first embodiment of the present invention showing that an enable signal generator is added. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring to FIG. 1, which is a schematic block diagram according to a first embodiment of the present invention. As shown in the figure, a trigger signal generator  11 , a control signal generator  12 , and a connector  13  are included, in which: 
     the trigger signal generator  11  having an output to be connected with an input of the control signal generator  12 , and having a switch SW 1  (please see FIG. 2) to output a trigger signal to control signal generator  12  when a user pushes the switch SW 1  down; 
     the control signal generator  12  having an input to be connected with an output of the trigger signal generator  11 , and having an ouput to be connected with an input of the connector  13 , for receiving the trigger signal outputted from the trigger signal generator  11 , and processing the trigger signal, then outputting a control signal to the connector  13 ; 
     the connector  13  having an input to be connected with a first universal serial bus (USB) interface  14  and a second universal serial bus (USB) interface  15 , and having an output to be connected with a third universal serial bus (USB) interface  16 . When the connector  13  receives the control signal outputted from the the control signal generator  12 , the connector  13  will connect the third USB interface  16  with the first USB interface  14  or the second USB interface  15 . 
     Next referring to FIG. 2, a detailed circuit of the first embodiment according to the present invention will be described. A trigger signal generator  11 , a control signal generator  12 , and a connector  13  are included, in which: 
     the trigger signal generator  11  comprising a resistor R 1 , a capacitor C 1 , and a switch SW 1 . The resistor R 1  and the capacitor C 1  are serially connected between VCC and ground (GND). One end of the resistor R 1  is connected with VCC, the other end of the resistor R 1  is connected with one end of the capacitor C 1 , the other end of the capacitor C 1  is connected with GND. One end of the switch SW 1  is connected to GND, the other end of the switch SW 1  is connected to where the resistor R 1  is connected with the capacitor C 1 , having a voltage V 1 . Before the switch SW 1  is enabled, the switch SW 1  does not conduct, and voltage V 1  will be maintained at a HIGH voltage; when the switch SW 1  is enabled, it will conduct, voltage V 1  will be connected to GND, so as to change the HIGH voltage to LOW voltage. When SW 1  is opened again, voltage V 1  will return to HIGH voltage due to the charging of the capacitor C 1 . Therefore, open/short actions of SW 1  will cause the capacitor C 1  charging/discharging, and make the voltage V 1  HIGH/LOW so as to generate a pulse signal to be used as a trigger signal to control the control signal generator  12 ; 
     the control signal generator  12  comprising a first D FLIP-FLOP (or an equivalent circuit) U 2 . The clock signal input terminal CP of the first D FLIP-FLOP U 2  is connected with the output of the trigger signal generator  11 , while the reverse data output terminal QN is connected with the data input terminal D, and the output signal from the positive data output terminal Q is used as the control signal of the connector  13 . When the clock signal input terminal CP receives a pulse signal, the voltage of terminal D will be moved to terminal Q, while a reverse voltage of the original voltage of the terminal D will be formed at terminal QN, and the voltage of the terminal QN will then be sent back to terminal D. When the terminal CP receives the next pulse signal, the first D FLIP-FLOP U 2  will repeat the above procedures. Therefore, when the terminal CP receives pulse signals continuously, the HIGH voltage and the LOW voltage will be outputted alternately, and used as the control signals for the connector  13 ; 
     the connector  13  comprising a first multiplexor U 3  (or an equivalent circuit), the first set of signal input terminal X 1  and Y 1  is connected with the first USB interface  14 , the second set of signal input terminal X 2  and Y 2  is connected with the second USB interface  15 , the third set of signal input terminal X 3  and Y 3  is connected with the third USB interface  16 , while a selecting signal input terminal SEL is connected with the output of the control signal generator  12 , and the alternating signals outputted from the control signal generator  12  are used as the selecting signal of the first multiplexor U 3 . When a LOW voltage signal is inputted into the selecting signal input terminal SEL, the inputted signals to the first set of signal input terminal X 1  and Y 1  are outputted from the signal output terminal X 3  and Y 3 . When a HIGH voltage signal is inputted into the selecting signal input terminal SEL, the inputted signals to the second set of signal input terminal X 2  and Y 2  are outputted from the signal output terminal X 3  and Y 3 . In other words, the LOW voltage and the HIGH voltage of the selecting signal input terminal SEL will make the first USB interface  14  and the second USB interface  15  to be connected with the third USB interface  16  respectively. 
     Referring to FIG. 3, which is the circuit diagram of a second embodiment according to the present invention. As shown in the figure, wherein the control signal generator  12  comprises two D FLIP-FLOPs (or equivalent circuits). The clock signal input terminal CP of the first D FLIP-FLOP U 2  is connected with the output of the trigger signal generator  11 , while the reverse data output terminal QN is connected with its data input terminal D. The clock signal input terminal CP of the second D FLIP-FLOP U 4  is connected with the reverse data output terminal QN of the first D FLIP-FLOP U 2 , while the reverse data output terminal QN of the second D FLI P-FLOP U 4  is connected with its data input terminal D, and the positive data output terminals Q of the first D FLIP-FLOP U 2  and the second D FLIP-FLOP U 4  are used as the control signals for the connector  13 . When the clock signal input terminal CP of the first D FLIP-FLOP U 2  receives a pulse signal, the voltage of its data input terminal D will be moved the positive data output terminal Q, while a reverse voltage of the original data input terminal D will be formed at the reverse data output terminal QN, and the voltage of the reverse data output terminal QN will then be sent back to the data input terminal D. When the next pulse signal is inputted to the control signal generator  12 , the voltage of the data input terminal D will be moved to the positive data output terminal Q of the first D FLIP-FLOP U 2 , and now the voltage of the positive data output terminal Q is opposite to the voltage generated by the previous pulse signal inputted to the control signal generator  12 . Thus a HIGH voltage and a LOW voltage wi be generated alternately. The voltage of the reverse data output terminal QN of the first D FLIP-FLOP U 2  is used as a trigger signal to be inputted to the clock signal output terminal CP of the second D FLIP-FLOP U 4 , thus the positive data output terminal Q of the second D FLIP-FLOP U 4  also generates HIGH and LOW voltages alternately, having a frequency just a half of the first D FLIP-FLOP U 2 &#39;s. Therefore, four patterns of LOW and LOW voltages, HIGH and LOW voltages, LOW and HIGH voltages, HIGH and HIGH voltages are obtained at the positive data output terminals Q of the first D FLIP-FLOP U 2  and the second D FLIP-FLOP U 4 , and are outputted alternately as the control signals to let the connector  13  connect different USB interfaces. 
     Referring to FIG. 4, which is the circuit diagram of a third embodiment according to the present invention. The difference between the circuit in FIG.  4  and the aforementioned electronic switching device for USB interface is the internal resistance in the connector  13 . As shown in the figure, a first multiplexor U 3  and a second multuplexor U 3 ′ are parallelly connected in the connector  13 , so as to decerase the internal resistance in connector  13 , therefore, the quality of the signal transmmision between USB interfaces are enhanced, and the distance between USB interfaces can be increased. 
     Referring to FIGS. 5 and 6, which are the schematic block diagram and the circuit diagram of the first embodiment of the present invention showing that a delay signal generator  17  is added. As shown in the figures, the delay signal generator  17  comprises a resistor R 2 , a capacitor C 2  and a diode D 1  (see FIG.  6 ), having its input to be connected with the output of the trigger signal generator  11 , and its output to be connected with the enable terminal OE of the connector  13 . The resistor R 2  and the capacitor C 2  are serially connected between VCC and GND, one end of the resistor R 2  is connected with VCC, while the other end thereof is connected with one end of the capacitor C 2 , having a voltage V 2 , the other end of the capacitor C 2  is connected to GND, the positive terminal of the diode D 1  is connected with the voltage V 2 , while the negative terminal thereof is connected with one end of the resistor R 3 , the other end of the resistor R 3  is the input terminal for the delay signal generator  17 , and V 1  (the output of the trigger signal generator  11 ) is used as the input of the delay signal generator  17 , V 2  is the output of the delay signal generator  17 . 
     When the switch SW 1  of the trigger signal generator  11  is conducting, the voltage V 1  will be changed from HIGH voltage to LOW voltage, so the voltage V 2  will also be changed from HIGH voltage to LOW voltage. When the switch SW 1  of the trigger signal generator  11  is opened, the voltage V 1  will be changed from LOW voltage to HIGH voltage, so the voltage V 2  will also be changed from LOW voltage to HIGH voltage. In order to delay the time of V 2  from LOW voltage to HIGH voltage, the present invention selects a capacitor having a longer time constant as the second capacitor C 2 . When the switch SW 1  of the trigger signal generator  11  is conducting, the enable terminal OE of the connector  13  will be LOW voltage, thus the USB interfaces are all disconnected. After a while, the voltage V 2  will be changed from LOW voltage to HIGH voltage, and the related USB interfaces are connected according to the control signals outputted from the control signal generator  12 . The design of the present invention is to let the user turn the switch sequentially to select the required USB interface connection (e.g. push the switch button once to select the first device, and push the switch button twice to select the second device). However, if a user pushes the switch several times quickly, the unrelated intermediate USB interfaces might be conducting to cause signal confusing and disable the whole system, therefore, a delay signal generator  17  is needed to avoid unrelated device to react due to the delay saturation of the voltage V 2 . 
     Referring to FIGS. 7 and 8, which are the schematic circuit block diagram and the circuit diagram of the first embodiment of the present invention showing that a display  18  is added. As shown in the figures, the input of the display  18  is connected with the output of the control signal generator  12 , the different signals outputted from the control signal generator  12  will make LED  1 , LED  2  conducting respectively, so as to show the connections between different USB interfaces. 
     Referring to FIGS. 9 and 10, which are the schematic circuit block diagram and the circuit diagram of the first embodiment of the present invention showing that an enable signal generator  19  is added. As shown in the figure, the output of the enable signal generator  19  is connected with the control signal generator  12 . The enable signal generator comprises a resistor R 4  and a capacitor C 4 , wherein the resistor R 4  and the capacitor C 4  are serially connected between VCC and GND. One end of the resistor R 4  is connected to GND, while the other end thereof is connected with one end of the capacitor C 4 , having a voltage V 3 . The other end of the capacitor C 4  is connected with VCC. When VCC is conducting, V 3  will be changed from LOW voltage to HIGH voltage immediately, and sent to the reset terminal R of the first D FLIP FLOP U 2  of the control signal generator  12  to clear the output of the first D FLIP FLOP U 2  to LOW voltage. After a while, since the capacitor C 4  is charged, V 3  will be changed from HIGH voltage to LOW voltage, and maintained at LOW voltage, and the control signal generator  12  will not be influenced by the enable signal generator  19 . Thus the connections between different USB interfaces are the same whenever the VCC begins conducting. 
     Furthermore, VCC will be used as the HIGH voltage of the present invention, no other power supply is needed, and a diode can be connected between VCC and each USB interface to avoid the reverse current flowing from USB interface to VCC. 
     In addition, the pulse signal outputted from the trigger signal generator  11  can be a positive or a negative pulse signal, and the number of the control signal outputted from the control signal generator is not limited. The numbers of the display, multuplexors and USB interfaces are also not limited. 
     The above embodiments are only used for description, and can not be treated as a limitation. The spirit and scope of the present invention will only be limited by the appended claims.