Abstract:
A light emitting display. A first capacitor is coupled between a gate of a first transistor and a power supply voltage. The gate thereof is coupled to a gate of a second transistor, and a data current from a data line is transmitted to the second transistor to set the gate voltages of the first and second transistors as a first voltage. A second capacitor is formed between the gates of the first and second transistors, and the data current from the data line is intercepted. Here, the first capacitor stores a second voltage by coupling of the first and second capacitors. A driving current output from the first transistor is transmitted to a light emitting element, corresponding to the second voltage.

Description:
CROSS REFERENCE TO RELATED APPLICATION 
   This application claims priority to and the benefit of Korea Patent Application No. 2003-20434 filed on Apr. 1, 2003 in the Korean Intellectual Property Office, the content of which is incorporated herein by reference. 
   BACKGROUND OF THE INVENTION 
   (a) Field of the Invention 
   The present invention relates to a light emitting display, a display panel, and a driving method thereof. More specifically, the present invention relates to an organic electroluminescent (EL) display. 
   (b) Description of the Related Art 
   In general, an organic EL display electrically excites a phosphorous organic compound to emit light, and it voltage- or current-drives N×M organic emitting cells to display images. As shown in  FIG. 1 , an organic emitting cell includes an anode of indium tin oxide (ITO), an organic thin film, and a cathode layer of metal. The organic thin film has a multi-layer structure including an emitting layer (EML), an electron transport layer (ETL), and a hole transport layer (HTL) for maintaining balance between electrons and holes and improving emitting efficiencies, and it further includes an electron injecting layer (EIL) and a hole injecting layer (HIL). 
   Methods for driving the organic emitting cells include the passive matrix method, and the active matrix method using thin film transistors (TFTs) or metal oxide semiconductor field effect transistors (MOSFETs). The passive matrix method forms cathodes and anodes to cross with each other, and selectively drives lines. The active matrix method connects a TFT and a capacitor with each ITO pixel electrode to thereby maintain a predetermined voltage according to capacitance. The active matrix method is classified as a voltage programming method or a current programming method according to signal forms supplied for maintaining a voltage at a capacitor. 
   Referring to  FIGS. 2 and 3 , conventional organic EL displays of the voltage programming and current programming methods will be described. 
     FIG. 2  shows a conventional voltage programming type pixel circuit for driving an organic EL element, representing one of N×M pixels. Referring to  FIG. 2 , transistor M 1  is coupled to an organic EL element (referred to as an OLED hereinafter) to thus supply current for light emission. The current of transistor M 1  is controlled by a data voltage applied through switching transistor M 2 . In this instance, capacitor C 1  for maintaining the applied voltage for a predetermined period is coupled between a source and a gate of transistor M 1 . Scan line S n  is coupled to a gate of transistor M 2 , and data line Dm is coupled to a source thereof. 
   As to an operation of the above-configured pixel, when transistor M 2  is turned on according to a select signal applied to the gate of switching transistor M 2 , a data voltage from data line Dm is applied to the gate of the transistor M 1 . Accordingly, current I OLED  flows to transistor M 2  in correspondence to a voltage V GS  charged between the gate and the source by C 1 , and the OLED emits light in correspondence to current I OLED . 
   In this instance, the current that flows to the OLED is given in Equation 1. 
   
     
       
         
           
             
               
                 
                   I 
                   OLED 
                 
                 = 
                 
                   
                     
                       β 
                       2 
                     
                     ⁢ 
                     
                       
                         ( 
                         
                           
                             V 
                             GS 
                           
                           - 
                           
                             V 
                             TH 
                           
                         
                         ) 
                       
                       2 
                     
                   
                   = 
                   
                     
                       β 
                       2 
                     
                     ⁢ 
                     
                       
                         ( 
                         
                           
                             V 
                             DD 
                           
                           - 
                           
                             V 
                             DATA 
                           
                           - 
                           
                              
                             
                               V 
                               TH 
                             
                              
                           
                         
                         ) 
                       
                       2 
                     
                   
                 
               
             
             
               
                 Equation 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 1 
               
             
           
         
       
     
   
   where I OLED  is the current flowing to the OLED, V GS  is a voltage between the source and the gate of the transistor M 1 , V TH  is a threshold voltage at transistor M 1 , and β is a constant. 
   As given in Equation 1, the current corresponding to the applied data voltage is supplied to the OLED, and the OLED gives light in correspondence to the supplied current, according to the pixel circuit of  FIG. 2 . In this instance, the applied data voltage has multi-stage values within a predetermined range so as to represent gray. 
   However, the conventional pixel circuit following the voltage programming method has a problem in that it is difficult to obtain high gray because of deviation of a threshold voltage V TH  of a TFT and deviations of electron mobility caused by non-uniformity of an assembly process. For example, in the case of driving a TFT of a pixel with 3 volts (3V), voltages are to be supplied to the gate of the TFT for each interval of 12 mV (=3V/256) so as to represent 8-bit (256) grays, and if the threshold voltage of the TFT caused by the non-uniformity of the assembly process deviates, it is difficult to represent high gray. Also, since the value β in Equation 1 changes because of the deviations of the electron mobility, it becomes even more difficult to represent the high gray. 
   On assuming that the current source for supplying the current to the pixel circuit is uniform over the whole panel, the pixel circuit of the current programming method can achieve uniform display features even though a driving transistor in each pixel has non-uniform voltage-current characteristics. 
     FIG. 3  shows a pixel circuit of a conventional current programming method for driving the OLED, representing one of N×M pixels. Referring to  FIG. 3 , transistor M 1  is coupled to the OLED to supply the current for light emission, and the current of transistor M 1  is controlled by the data current applied through transistor M 2 . 
   First, when transistors M 2  and M 3  are turned on because of the select signal from scan line S n , transistor M 1  becomes diode-connected, and the voltage matched with data current I DATA  from data line Dm is stored in capacitor C 1 . Next, the select signal from scan line S n  becomes high-level to turn on transistor M 4 . Then, the power is supplied from power supply voltage VDD, and the current matched with the voltage stored in capacitor C 1  flows to the OLED to emit light. In this instance, the current flowing to the OLED is as follows. 
   
     
       
         
           
             
               
                 
                   I 
                   OLED 
                 
                 = 
                 
                   
                     
                       β 
                       2 
                     
                     ⁢ 
                     
                       
                         ( 
                         
                           
                             V 
                             GS 
                           
                           - 
                           
                             V 
                             TH 
                           
                         
                         ) 
                       
                       2 
                     
                   
                   = 
                   
                     I 
                     DATA 
                   
                 
               
             
             
               
                 Equation 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 2 
               
             
           
         
       
     
   
   where V GS  is a voltage between the source and the gate of transistor M 1 , V TH  is a threshold voltage at transistor M 1 , and β is a constant. 
   As given in Equation 2, since current I OLED  flowing to the OLED is the same as data current I DATA  in the conventional current pixel circuit, uniform characteristics can be obtained when the programming current source is set to be uniform over the whole panel. However, since current I OLED  flowing to the OLED is a fine current, control over the pixel circuit by fine current I DATA  problematically requires much time to charge the data line. For example, assuming that the load capacitance of the data line is 30 pF, it requires several milliseconds of time to charge the load of the data line with the data current of several tens to hundreds of nA. This causes a problem that the charging time is not sufficient in consideration of the line time of several tens of microseconds. 
   SUMMARY OF THE INVENTION 
   In accordance with the present invention a light emitting display is provided for compensating for the threshold voltage of transistors or for electron mobility, and sufficiently charging the data line. 
   In one aspect of the present invention, a light emitting display is provided on which a plurality of data lines for transmitting data current that displays video signals, a plurality of scan lines for transmitting a select signal, and a plurality of pixel circuits formed at a plurality of pixels defined by the data lines and the scan lines are formed. The pixel circuit includes: a light emitting element for emitting light corresponding to the applied current; a first transistor, having first and second main electrodes and a control electrode, for supplying a driving current for the light emitting element a second transistor being diode-connected; a first switch for transmitting a data current from the data line to the second transistor in response to a select signal from the scan line; a first storage element having a first end coupled to the first main electrode of the first transistor and a first main electrode of the second transistor, and a second end thereof coupled to the control electrode of the first transistor, the second end being coupled to a gate of the second transistor in response to a first level of a first control signal; a second storage element coupled between the second end of the first storage element and a control electrode of the second transistor in response to a second level of the first control signal; and a second switch for coupling the first transistor and the light emitting element in response to a second control signal. The light emitting display operates in the order of a first interval for selecting the first level of the first control signal and the select signal, a second interval for selecting the second level of the first control signal, and a third interval for selecting the second control signal. The voltage of the control electrode of the second transistor is determined as a first voltage in correspondence with the data current in the first interval. A control electrode voltage of the second transistor is changed to a second voltage from the first voltage by the interception of the data current. A control electrode voltage of the first transistor is determined as a third voltage by coupling of the first and second storage elements to store a fourth voltage in the first storage element in the second interval. A driving current corresponding to the fourth voltage is transmitted to the light emitting element from the first transistor in the third interval. The pixel circuit further includes a third switch coupled between the control electrodes of the first and second transistors. The third switch is turned on by the first level of the first control signal. The first control signal is the select signal. The first control signal is supplied from an additional signal line other than the scan line, and the first control signal has faster timing than the select signal. A channel width of the first transistor is equal to or shorter than the channel width of the second transistor. A channel length of the first transistor is equal to or longer than the channel width of the second transistor. The first storage element is a first capacitor formed between the first main electrode and the control electrode of the first transistor. The second storage element is a second capacitor formed between the control electrodes of the first and second transistors. Capacitance of the first capacitor and capacitance of the second capacitor is determined by one of a screen size and resolution. Uniformity between the threshold voltages of the first and second transistors is high. 
   In another aspect of the present invention, a method is provided for driving a light emitting display having a pixel circuit including a first switch for transmitting a data current from a data line in response to a select signal from a scan line, a first transistor including first and second main electrodes and a control electrode for outputting a driving current corresponding to the data current, a first storage element formed between the first main electrode and the control electrode of the first transistor, and a light emitting element for emitting light corresponding to the driving current from the first transistor. The control electrode of the diode-connected second transistor is coupled to the control electrode of the first transistor. The data current is transmitted from the first switch to the second transistor to establish the control electrode voltage of the second transistor as a first voltage. A second storage element is formed between the control electrodes of the first and second transistors. Data current is intercepted to modify the first voltage into a second voltage to which a threshold voltage of the second transistor is reflected. Coupling of the second voltage and the first and second storage elements is used to modify the control electrode voltage of the first transistor into a third voltage from the first voltage. A driving current output is transmitted by the first transistor to the light emitting element corresponding to the third voltage. 
   In still another aspect of the present invention, a display panel of a light emitting display is provided, on which are formed a plurality of data lines for transmitting the data current that displays video signals, a plurality of scan lines for transmitting a select signal, and a plurality of pixel circuits formed at a plurality of pixels defined by the data lines and the scan lines. The pixel circuit includes: a light emitting element for emitting light corresponding to the applied current; a first transistor having first and second main electrodes and a control electrode, for supplying a driving current for emitting light from the light emitting element; a second transistor being diode-connected; a first switch for transmitting a data current from the data line to the second transistor in response to a select signal from the scan line; a first storage element coupled to the control electrode of the first transistor; and a second storage element. The display panel operates in the order of: a first interval for coupling control electrodes of the first and second transistors, and storing voltage in the first storage element corresponding to a data current from the first switch; a second interval for forming a second storage element between the control electrodes of the first and second transistors, and intercepting the data current to divide a voltage corresponding to a threshold voltage of the second transistor into the first and second storage elements; and a third interval for transmitting a driving current output by the first transistor to the light emitting element corresponding to the voltage stored in the first storage element. The control electrodes of the first and second transistors are coupled in response to a first-level first control signal. The data current is transmitted to the second transistor in response to the select signal in the first interval. The second storage element is coupled between the control electrodes of the first and second transistors in response to a second-level first control signal. The select signal becomes a disable level to intercept the data current in the second interval. The driving current is transmitted to the light emitting element in response to a second control signal in the third interval. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  shows a concept diagram of an OLED. 
       FIG. 2  shows an equivalent circuit of a conventional pixel circuit following the voltage programming method. 
       FIG. 3  shows an equivalent circuit of a conventional pixel circuit following the current programming method. 
       FIG. 4  shows a brief plane diagram of an organic EL display according to an embodiment of the present invention. 
       FIGS. 5 and 7  respectively show an equivalent circuit of a pixel circuit according to first and second embodiments of the present invention; and 
       FIGS. 6 and 8  respectively show a driving waveform for driving the pixel circuit of  FIGS. 5 and 7 . 
   

   DETAILED DESCRIPTION 
   An organic EL display, a corresponding pixel circuit, and a driving method thereof will be described in detail with reference to drawings. 
   First, referring to  FIG. 4 , the organic EL display will be described.  FIG. 4  shows a brief ground plan of the OLED. 
   As shown, the organic EL display includes organic EL display panel  10 , scan driver  20 , and data driver  30 . 
   Organic EL display panel  10  includes a plurality of data lines D 1  through D m  in the row direction, a plurality of scan lines S 1  through S n  and E 1  through E n , and a plurality of pixel circuits  11 . Data lines D 1  through D m  transmit data signals that represent video signals to pixel circuit  11 , and scan lines S 1  through S n  transmit select signals to pixel circuit  11 . Pixel circuit  11  is formed at a pixel region defined by two adjacent data lines D 1  through D m  and two adjacent scan lines S 1  through S n . Also, scan lines E 1  through E n  transmit emit signals for controlling emission of the pixel circuits  11 . 
   Scan driver  20  sequentially applies respective select signals and emit signals to the scan lines S 1  through S n  and E 1  through E n . Data driver  30  applies the data current that represents video signals to the data lines D 1  through D m . 
   Scan driver  20  and/or data driver  30  can be coupled to display panel  10 , or can be installed, in a chip format, in a tape carrier package (TCP) coupled to display panel  10 . The same can be attached to display panel  10 , and installed, in a chip format, on a flexible printed circuit (FPC) or a film coupled to the display panel  10 , which is referred to as a chip on flexible board, or chip on film (CoF) method. Differing from this, scan driver  20  and/or data driver  30  can be installed on the glass substrate of the display panel, and further, the same can be substituted for the driving circuit formed in the same layers of the scan lines, the data lines, and TFTs on the glass substrate, or directly installed on the glass substrate, which is referred to as a chip on glass (CoG) method. 
   Referring to  FIGS. 5 and 6 , pixel circuit  11  of the organic EL display according to the first embodiment of the present invention will now be described.  FIG. 5  shows an equivalent circuit diagram of the pixel circuit according to the first embodiment, and  FIG. 6  shows a driving waveform diagram for driving the pixel circuit of  FIG. 5 . In this instance, for ease of description,  FIG. 5  shows a pixel circuit coupled to an m-th data line D m  and an n-th scan line S n . 
   As shown in  FIG. 5 , pixel circuit  11  includes an OLED, PMOS transistors M 1  through M 5 , and capacitors C 1  and C 2 . The transistor is preferably a transistor having a gate electrode, a drain electrode, and a source electrode formed on the glass substrate as a control electrode and two main electrodes. 
   Transistor M 1  has a source coupled to power supply voltage VDD, and a gate coupled to capacitor C 2 , and capacitor C 1  is coupled between the gate and the source of transistor M 1 . A gate and a drain of transistor M 2  are coupled, that is, diode-connected, and a source of transistor M 2  is coupled to power supply voltage VDD. Transistor M 5  and capacitor C 2  are coupled in parallel between the gate of transistor M 2  and the gate of transistor M 1 . 
   Transistor M 3  transmits data current I DATA  from data line D m  to transistor M 2  in response to select signal SE n  from scan line S n . Transistor M 5  couples the gate of transistor M 2  to the gate of transistor M 1  in response to select signal SE n  from scan line S n . Transistor M 4  is coupled between the drain of transistor M 1  and the OLED, and transmits current I OLED  of transistor M 1  to the OLED in response to emit signal EM n  from scan line E n . The OLED is coupled between transistor M 4  and the reference voltage, and emits light corresponding to applied I OLED . 
   Next, referring to  FIG. 6 , an operation of the pixel circuit according to the first embodiment of the present invention will be described in detail. 
   As shown, in interval T 1 , transistor M 5  is turned on by low-level select signal SE n  to couple the gate of transistor M 1  and the gate of transistor M 2 . Transistor M 3  is turned on by select signal SE n  to have data current I DATA  from data line D m  flow to transistor M 2 . Data current I DATA  can be given as Equation 3, and the gate voltage V G3 (T 1 ) at transistor M 2  in interval T 1  is determined from Equation 3. Since the gate of transistor M 1  and the gate of transistor M 2  are coupled, the gate voltage V G1 (T 1 ) at transistor M 1  corresponds to the gate voltage V G3 (T 1 ) at transistor M 2 . 
   
     
       
         
           
             
               
                 
                   I 
                   DATA 
                 
                 = 
                 
                   
                     
                       1 
                       2 
                     
                     ⁢ 
                     
                       μ 
                       2 
                     
                     ⁢ 
                     
                       C 
                       ox2 
                     
                     ⁢ 
                     
                       
                         W 
                         2 
                       
                       
                         L 
                         2 
                       
                     
                     ⁢ 
                     
                       
                         ( 
                         
                           
                             V 
                             GS 
                           
                           - 
                           
                             V 
                             TH2 
                           
                         
                         ) 
                       
                       2 
                     
                   
                   = 
                   
                     
                       1 
                       2 
                     
                     ⁢ 
                     
                       μ 
                       2 
                     
                     ⁢ 
                     
                       C 
                       ox2 
                     
                     ⁢ 
                     
                       
                         W 
                         2 
                       
                       
                         L 
                         2 
                       
                     
                     ⁢ 
                     
                       ( 
                       
                         
                           V 
                           DD 
                         
                         - 
                         
                           
                             V 
                             G2 
                           
                           ⁡ 
                           
                             ( 
                             T1 
                             ) 
                           
                         
                         - 
                         
                            
                           
                             V 
                             TH2 
                           
                            
                         
                       
                       ) 
                     
                   
                 
               
             
             
               
                 Equation 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 3 
               
             
           
         
       
     
   
   where μ 2  is electron mobility, C ox2  is oxide capacitance, W 2  is a channel width, L 2  is a channel length, V TH2  is a threshold voltage of transistor M 2 , and V DD  is a voltage supplied to transistor M 2  by power supply voltage VDD. 
   In interval T 2 , select signal SE n  becomes high-level to turn off transistors M 3  and M 5 . Data current I DATA  is intercepted by turned-off transistor M 3 , and since transistor M 2  is diode-connected, the gate voltage V G2 (T 2 ) of transistor M 2  becomes V DD −|V TH2 |. Therefore, the variation ΔV G2  of the gate voltage of transistor M 2  between intervals T 1  and T 2  is given as Equation 4. Since the gate voltage V G1 (T 2 ) of transistor M 1  corresponds to a node voltage of capacitors C 1  and C 2  coupled in series, the variation ΔV G1  of the gate voltage of transistor M 1  is given as Equation 5. That is, the gate voltage V G1 (T 2 ) of transistor M 1  becomes V G1 (T 1 )+ΔV G1. 
 
Δ V   G2   V   G2 ( T 2)− V   G2 ( T 1)= V   DD   −|V   TH2   −|V   G2 ( T 1)  Equation 4.
 
   
     
       
         
           
             
               
                 
                   Δ 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   
                     V 
                     G1 
                   
                 
                 = 
                 
                   
                     
                       
                         C 
                         1 
                       
                       
                         
                           C 
                           1 
                         
                         + 
                         
                           C 
                           2 
                         
                       
                     
                     ⁢ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       V 
                       G2 
                     
                   
                   = 
                   
                     
                       
                         C 
                         1 
                       
                       
                         
                           C 
                           1 
                         
                         + 
                         
                           C 
                           2 
                         
                       
                     
                     ⁢ 
                     
                       ( 
                       
                         
                           V 
                           DD 
                         
                         - 
                         
                            
                           
                             V 
                             TH2 
                           
                            
                         
                         - 
                         
                           
                             V 
                             G2 
                           
                           ⁡ 
                           
                             ( 
                             T1 
                             ) 
                           
                         
                       
                       ) 
                     
                   
                 
               
             
             
               
                 Equation 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 5 
               
             
           
         
       
     
   
   where C 1  and C 2  are capacitances of capacitors C 1  and C 2 . 
   In interval T 3 , transistor M 4  is turned on in response to low-level emit signal EM n . Current I OLED  flowing to transistor M 1  flows to the OLED by turned-on transistor M 4  to emit light, and current I OLED  in this instance is given as Equation 6. 
   
     
       
         
           
             
               
                 
                   
                     
                       
                         I 
                         OLED 
                       
                       = 
                         
                       ⁢ 
                       
                         
                           1 
                           2 
                         
                         ⁢ 
                         
                           μ 
                           1 
                         
                         ⁢ 
                         
                           C 
                           ox1 
                         
                         ⁢ 
                         
                           
                             W 
                             1 
                           
                           
                             L 
                             1 
                           
                         
                         ⁢ 
                         
                           
                             ( 
                             
                               
                                 V 
                                 DD 
                               
                               - 
                               
                                 
                                   V 
                                   G1 
                                 
                                 ⁡ 
                                 
                                   ( 
                                   T2 
                                   ) 
                                 
                               
                               - 
                               
                                  
                                 
                                   V 
                                   TH1 
                                 
                                  
                               
                             
                             ) 
                           
                           2 
                         
                       
                     
                   
                 
                 
                   
                     
                       = 
                         
                       ⁢ 
                       
                         
                           1 
                           2 
                         
                         ⁢ 
                         
                           μ 
                           1 
                         
                         ⁢ 
                         
                           C 
                           ox1 
                         
                         ⁢ 
                         
                           
                             W 
                             1 
                           
                           
                             L 
                             1 
                           
                         
                         ⁢ 
                         
                           { 
                           
                             
                               V 
                               DD 
                             
                             - 
                             
                               
                                 
                                   C 
                                   1 
                                 
                                 
                                   
                                     C 
                                     1 
                                   
                                   + 
                                   
                                     C 
                                     2 
                                   
                                 
                               
                               ⁢ 
                               
                                 ( 
                                 
                                   
                                     V 
                                     DD 
                                   
                                   - 
                                   
                                      
                                     
                                       V 
                                       TH2 
                                     
                                      
                                   
                                   - 
                                 
                               
                             
                           
                         
                       
                     
                   
                 
                 
                   
                     
                       
                         
                           
                               
                             ⁢ 
                             
                               
                                 V 
                                 G2 
                               
                               ⁡ 
                               
                                 ( 
                                 T1 
                                 ) 
                               
                             
                             ) 
                           
                           - 
                           
                             
                               V 
                               G2 
                             
                             ⁡ 
                             
                               ( 
                               T1 
                               ) 
                             
                           
                           - 
                           
                              
                             
                               V 
                               TH1 
                             
                              
                           
                         
                         } 
                       
                       2 
                     
                   
                 
               
             
             
               
                 Equation 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 6 
               
             
           
         
       
     
   
   where μ 1  is electron mobility, C ox1  is oxide capacitance, W 1  is a channel width, L 1  is a channel length, and V TH1  is a threshold voltage of transistor M 1 . 
   Since transistors M 1  and M 2  are adjacently formed in a small pixel, uniformity between the electron mobility μ 1  and μ 2 , the threshold voltages V TH1  and V TH2 , and the oxide capacitances C ox1  and C ox2  improves, and hence they are substantially identical with each other (i.e., μ 1 =μ 2 , V TH1=V   TH2 , and C ox1 =C ox2 ). Therefore, Equation 6 can also be expressed as Equation 7, and Equation 7 can be given as Equation 8 using Equation 3. 
   
     
       
         
           
             
               
                 
                   I 
                   OLED 
                 
                 = 
                 
                   
                     1 
                     2 
                   
                   ⁢ 
                   
                     μ 
                     1 
                   
                   ⁢ 
                   
                     C 
                     ox1 
                   
                   ⁢ 
                   
                     
                       
                         W 
                         1 
                       
                       
                         L 
                         1 
                       
                     
                     · 
                     
                       
                         C 
                         2 
                       
                       
                         
                           C 
                           1 
                         
                         + 
                         
                           C 
                           2 
                         
                       
                     
                   
                   ⁢ 
                   
                     
                       ( 
                       
                         
                           V 
                           DD 
                         
                         - 
                         
                           
                             V 
                             G2 
                           
                           ⁡ 
                           
                             ( 
                             T1 
                             ) 
                           
                         
                         - 
                         
                            
                           
                             V 
                             TH2 
                           
                            
                         
                       
                       ) 
                     
                     2 
                   
                 
               
             
             
               
                 Equation 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 7 
               
             
           
           
             
               
                 
                     
                 
                 ⁢ 
                 
                   
                     I 
                     OLED 
                   
                   = 
                   
                     
                       
                         
                           W 
                           1 
                         
                         
                           L 
                           1 
                         
                       
                       · 
                       
                         
                           L 
                           2 
                         
                         
                           W 
                           2 
                         
                       
                     
                     ⁢ 
                     
                       ( 
                       
                         
                           C 
                           2 
                         
                         
                           
                             C 
                             1 
                           
                           + 
                           
                             C 
                             2 
                           
                         
                       
                       ) 
                     
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     
                       I 
                       DATA 
                     
                   
                 
                 ⁢ 
                 
                     
                 
               
             
             
               
                 Equation 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 8 
               
             
           
         
       
     
   
   In this instance, if the capacitance C 1  of capacitor C 1  is n times the capacitance C 2  of capacitor C 2  (i.e., C 1 =n C 2 ), and the ratio W 2b /L 2  of the channel width and the channel length of transistor M 2  is M times the ratio W 1 /L 1  of the channel width and the channel length of transistor M 1 , Equation 8 is given as Equation 9. In particular, it is preferable that the channel width W 2  of transistor M 2  is equal to or longer than the channel width W 1  of transistor M 1 , and the channel length L 2  of transistor M 2  is equal to or shorter than the channel length L 1  of transistor M 1 . It is also preferable to optimize the ratio of the capacitance C 1  of capacitor C 1  and the capacitance C 2  of capacitor C 2  according to the size and resolution of a screen. 
   
     
       
         
           
             
               
                 
                   I 
                   OLED 
                 
                 = 
                 
                   
                     1 
                     
                       M 
                       ⁡ 
                       
                         ( 
                         
                           n 
                           + 
                           1 
                         
                         ) 
                       
                     
                   
                   ⁢ 
                   
                     I 
                     DATA 
                   
                 
               
             
             
               
                 Equation 
                 ⁢ 
                 
                     
                 
                 ⁢ 
                 9 
               
             
           
         
       
     
   
   As given in Equation 9, since current I OLED  supplied to the OLED is determined with no relation to the threshold voltage V TH1  or the electron mobility μ 1  of transistor M 1 , the deviation of the threshold voltage or the mobility can be corrected. Also, since current I OLED  is controlled by current I DATA  which is M(n+1) times greater than current I OLED  supplied to the OLED, high gray can be represented. Further, since large data current I DATA  is supplied to data lines D 1  through D m , the time for charging the data lines can be sufficiently obtained, and a wide OLED can be realized. In addition, since transistors M 1  through M 5  are the same type, the process for forming the TFTs on the glass substrate can be easily executed. 
   In the first embodiment, PMOS transistors are used to realize transistors M 1  through M 5 , and NMOS transistors can also be applied. In the case of realizing transistors M 1  through M 5  through the PMOS transistors, the sources of transistors M 1  and M 2  are coupled not to power supply voltage VDD but to the reference voltage, a cathode of the OLED is coupled to transistor M 4 , and an anode thereof is coupled to power supply voltage VDD in the pixel circuit of  FIG. 5 . The waveforms of select signal SE n  and emit signal EM n  have inverted formats of those in  FIG. 6 . Since realization of transistors M 1  through M 5  using the NMOS transistors can be easily known from the description according to the first embodiment, no further description will be provided. Also, transistors M 1  through M 5  can be realized by combination of PMOS and NMOS transistors or switches having similar functions. 
   In the first embodiment, transistor M 5  is controlled using select signal SE n  from scan line S n , but it can be controlled using a control signal from an additional scan line, which will now be described referring to  FIGS. 7 and 8 . 
     FIG. 7  shows an equivalent circuit of a pixel circuit according to a second embodiment of the present invention, and  FIG. 8  shows a driving waveform for driving the pixel circuit of  FIG. 7 . 
   As shown in  FIG. 7 , the pixel circuit according to the second embodiment further includes scan line C n  in the pixel circuit of  FIG. 5 . Transistor M 5  has a gate coupled to scan line C n , and couples the gate of transistor M 1  to the gate of transistor M 2  in response to control signal CS n  from scan line C n . 
   Referring to  FIG. 8 , since turn-on and turn-off timing problem of transistors M 3  and M 5  can occur in the first embodiment, control signal CS n  is set to be low-level prior to select signal SE n . In this instance, a delayed signal of control signal CS n  can be used as a select signal SE n . 
   In detail, transistor M 5  is previously turned on by control signal CS n  to couple the gate of transistor M 1  and the gate of transistor M 2 , and transistor M 3  is turned on by select signal SE n  to transmit data current I DATA . Transistor M 5  is turned off by high-level control signal CS n  to charge capacitors C 1  and C 2  with voltage, and transistor M 3  is turned off by high-level select signal SE n  to intercept data current I DATA . Since the operation of the pixel circuit according to the second embodiment is similar to that of the first embodiment, no detailed description thereof will be provided. 
   According to the present invention, since the current flowing to the OLED can be controlled by a large data current, the data line can be sufficiently charged for a single line time, the deviation of the threshold voltage or the mobility is corrected, and a light emitting display with high resolution and wide screen can be realized. 
   While this invention has been described in connection with what is presently considered to be practical embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.