Abstract:
A display substrate and a display device applying the same are provided. The display substrate includes a base plate and a display structure. The display structure is disposed on the base plate and includes first region. The first region includes a first sub-pixel, a second sub-pixel and two third sub-pixels. One of the two third sub-pixels has a first light emitting region having a first end point and a second end point. The other one of the two third sub-pixels has a second light emitting region having a third end point and a fourth end point. The first sub-pixel has a third light emitting region and the second sub-pixel has a fourth light emitting region. The third light emitting region and the fourth light emitting region are inside a quadrilateral region enclosed by the first, second, third and fourth end points.

Description:
This application is a continuation application of co-pending application Ser. No. 14/634,975, filed on Mar. 2, 2015, which claims the benefits of Taiwan application serial no. 103114670, filed on Apr. 23, 2014, and Taiwan application serial no. 103143662, filed Dec. 15, 2014, the contents of which are incorporated herein by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     Field of the Invention 
     The invention relates in general to a display substrate and a display device applying the same, and more particularly to an organic light emitting diode (OLED) display substrate having excellent display quality and an OLED display device applying the same. 
     Description of the Related Art 
     An organic light emitting diode (OLED) display is advantageous in thin, active light (without backlight source) and viewing angle free. As expecting higher and higher display quality of electronic products, the image resolution of the OLED display goes higher. 
     During the process of evaporating the emission layer, a fine metal mask is used for coating individual colors of light emitting films on the pixels. Due to the restrictions of the evaporating process, without considering of suitable tolerance, different colors of emission layers may overlap, making non-uniform, abnormal or color cast of display performance. Therefore, tolerance design of the evaporating process is a crucial factor of producing higher resolution OLED device. 
     SUMMARY OF THE INVENTION 
     The invention is directed to a display substrate and a display device applying the same. 
     According to one embodiment of the present invention, a display substrate is provided. The display substrate includes a base plate and a display structure. The display structure is disposed on the base plate and includes a first region. The first region includes a first sub-pixel, a second sub-pixel and two third sub-pixels. The first sub-pixel and the second sub-pixel are disposed between the two third sub-pixels, the first sub-pixel and the second sub-pixel respectively correspond to two different colors, and the two third sub-pixels correspond to the same color. One of the two third sub-pixels has a first light emitting region, the first light emitting region has a first end point and a second end point, and a first length is a distance between the first end point and the second end point, and the first length is a longest length of the first light emitting region. The other one of the two third sub-pixels has a second light emitting region, and the second light emitting region has a third end point and a fourth end point, a second length is a distance between the third end point and the fourth end point, and the second length is a longest length of the second light emitting region. The first sub-pixel has a third light emitting region and the second sub-pixel has a fourth light emitting region. The third light emitting region and the fourth light emitting region are inside a quadrilateral region enclosed by the first end point, the second end point, the third end point and the fourth end point. 
     According to another embodiment of the present invention, a display substrate is provided. The display substrate includes a base plate and a display structure. The display structure is disposed on the base plate and includes a first region. The first region includes a first sub-pixel, wherein the first sub-pixel has a first light emitting region; a second sub-pixel, wherein the second sub-pixel has a second light emitting region; and two third sub-pixels, wherein one of the two third sub-pixels has a third light emitting region and the other one of the two third sub-pixels has a fourth light emitting region. The first light emitting region and the second light emitting region are disposed between the third light emitting region and the fourth light emitting region, the first light emitting region and the second light emitting region respectively correspond to two different colors, and the third light emitting region and the fourth light emitting region correspond to the same color. The third light emitting region has a first end point and a second end point, a first length is a distance between the first end point and the second end point, and the first length is a longest length of the third light emitting region. The fourth light emitting region has a third end point and a fourth end point, a second length is a distance between the third end point and the fourth end point, and the second length is a longest length of the fourth light emitting region. The first light emitting region and the second light emitting region are inside a quadrilateral region enclosed by the first end point, the second end point, the third end point and the fourth end point. 
     According to a further embodiment of the present invention, a display device is provided. The display device includes a display substrate and a cover substrate, and the display substrate is assembled to the cover substrate. The display substrate includes a base plate and a display structure. The display structure is disposed on the base plate and includes a first region. The first region includes a first sub-pixel, wherein the first sub-pixel has a first light emitting region; a second sub-pixel, wherein the second sub-pixel has a second light emitting region; and two third sub-pixels, wherein one of the two third sub-pixels has a third light emitting region and the other one of the two third sub-pixels has a fourth light emitting region. The first light emitting region and the second light emitting region are disposed between the third light emitting region and the fourth light emitting region, the first light emitting region and the second light emitting region respectively correspond to two different colors, and the third light emitting region and the fourth light emitting region correspond to the same color. The third light emitting region has a first end point and a second end point, a first length is a distance between the first end point and the second end point, and the first length is a longest length of the third light emitting region. The fourth light emitting region has a third end point and a fourth end point, a second length is a distance between the third end point and the fourth end point, and the second length is a longest length of the fourth light emitting region. The first light emitting region and the second light emitting region are inside a quadrilateral region enclosed by the first end point, the second end point, the third end point and the fourth end point. 
     The above and other aspects of the invention will become better understood with regard to the following detailed description of the preferred but non-limiting embodiment(s). The following description is made with reference to the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1A  is a top view of a display unit of a display device according to of the disclosure an embodiment. 
         FIG. 1B  is a partial enlargement of  FIG. 1A . 
         FIG. 1C  is a cross-sectional view of a sub-pixel of the display unit  FIG. 1A . 
         FIGS. 1D ˜ 1 I are top views of a display unit of a display device according to other embodiments of the disclosure. 
         FIG. 2  is a top view of a display unit matrix of a display structure according to another embodiment of the disclosure. 
         FIG. 3  is a top view of a display unit matrix of a display structure according to an alternate embodiment of the disclosure. 
         FIGS. 4A ˜ 4 C are steps of a flowchart of an evaporating process of a light emitting material according to an embodiment. 
         FIGS. 5 ˜ 8  are schematic diagrams of a metal mask used for manufacturing a display unit according to an embodiment of the disclosure. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     According to the display unit of the display substrate disclosed in an embodiment, the peripheral region is formed from the third sub-pixels and the peripheral region surrounds the core region formed from the first sub-pixel and the second pixel, and the sides of the third sub-pixels are adjacent to two sides of the first sub-pixels or the second sub-pixels, such that display defects caused by the non-equidistance in the vertical or the horizontal portion of pixels can be compensated, and the display quality of image can thus be improved. Detailed descriptions of the embodiments of the disclosure are disclosed below with accompanying drawings. In the accompanying diagrams, the same numeric designations indicate the same or similar components. It should be noted that accompanying drawings are simplified so as to provide clear descriptions of the embodiments of the disclosure, and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments as claimed. Anyone who is skilled in the technology field of the disclosure can make necessary modifications or variations to the structures according to the needs in actual implementations. 
       FIG. 1A  is a top view of a display unit S of a display device  1  according to of the disclosure an embodiment.  FIG. 1B  is a partial enlargement of  FIG. 1A .  FIG. 1C  is a cross-sectional view of a sub-pixel of the display unit S of  FIG. 1A . As indicated in  FIG. 1C , the display device  1  includes a display substrate  10  and a cover substrate  20 . The cover substrate  20  is jointed to the display substrate  10  to form a display module. The display module is an element of the display device. The display device  1  may further include a drive module (not illustrated) having functions of power supply, signal generation and signal transmission, an optical aided module having optical modulation function or a touch module having touch detection function. 
     As indicated in  FIGS. 1A ˜ 1 C, the display substrate  10  includes a base plate  100  and a display structure  200 . The display structure  200  is disposed on the base plate  100  and includes a substrate and a circuit element layout including such as a thin film transistor, a capacitor, an electrode or a transmission line. The display structure  200  is driven by the base plate  100  and provides signals. The display structure  200  includes a plurality of display units S arranged in an array, and the display units S have a core region C and a peripheral region P. The peripheral region P is located outside the core region C; for example, the peripheral region P may surround the core region C. The core region C includes a pair of first sub-pixels  211  and a pair of second sub-pixels  213 . The first sub-pixels  211  and the second sub-pixels  213  are interlaced. Both the first sub-pixels  211  and the second sub-pixels  213  are arranged in a diagonal manner. The overall sub-pixels of the core region C form a Damier shape. The peripheral region P includes at least one third sub-pixel  215 . In the present embodiment, the number of third sub-pixels  215  located in the peripheral region P is 8. However, in other embodiments, the number of third sub-pixels  215  located in the peripheral region P can be 1, 2 or 4. The number of third sub-pixels  215  is the same as the number of regions which can be driven and operated independently. One side of the third sub-pixel  215  is adjacent (connected to or contacted with) one side of the first sub-pixel  211  or the second sub-pixel  213 . In the present embodiment, one side of the third sub-pixel  215  is adjacent to one side of one of the first sub-pixel  211  or the second sub-pixel  213 . The shape of the sub-pixel can be a rectangle, a circle or a polygonal of other shape. 
     As indicated in  FIG. 1B , a first sub-pixel  211  and two third sub-pixels  215  form a pixel U. Similarly, a second sub-pixel  213  and two third sub-pixels  215  also form a pixel U, and four pixels U also form a display unit S. The resolution of the display device  1  is equivalent to the number of pixels U. In the present embodiment, the L-shape formed of two third sub-pixels  215  has a vertical portion and a horizontal portion. The horizontal portion is inserted into the distribution space of the first sub-pixels  211  and the second sub-pixels  213  for compensating the differences in the horizontal intervals and the vertical intervals so as to increase display quality. 
     Refer to  FIG. 1C . In the present embodiment, the base plate  100  includes a substrate  110  and a switch unit  120 , or an assembly of active/passive elements and transmission circuit traces. The substrate  110  can be formed of a material such as glass, and plastic, or metal. The switch unit  120  can be realized by a thin-film transistor which controls the ON/OFF of the pixel to display a frame. The structure of the switch unit  120  can be top gate, bottom gate, dual gate or coplanar. The active layer of the switch unit  120  can be formed of amorphous silicon, low temperature poly silicon or a metal oxide semiconductor. The surface of the base plate  100  is covered with a passivation layer, and has a plurality of vias  135  correspondingly exposing one of the source or drain of the switch unit  120  for the purpose of signal transmission. 
     In the present embodiment, the emission layer  210  emits different primary colors the first sub-pixels  211 , the second sub-pixels  213  and the third sub-pixels  215 . For instance, the emission layer  210  emits red color R for the first sub-pixels  211 , blue color B for the second sub-pixels  213  and green color G for the third sub-pixels  215 . However, the colors that the emission layer  210  emits for the first sub-pixels  211 , the second sub-pixels  213  and the third sub-pixels  215  can be selected to fit actual needs, and are not limited to the above exemplifications. In the present embodiment, the emission layer  210  of the first sub-pixels  211 , the second sub-pixels  213  and the third sub-pixels  215  can be formed of such as an organic light emitting material. 
     As indicated in  FIG. 1C , the display structure  200  ( 300 ) includes a first electrode layer  220 , a pixel definition layer  240 , an emission layer  210 , and a second electrode layer  230 . The first electrode layer  220  and the second electrode layer  230  clamp the emission layer  210  to form a light-emitting diode sandwich structure. The first electrode layer  220  is formed on the base plate  100  and electrically connected to the switch unit through the vias  135  and can be used as an anode. The first electrode layer  220  is a single-layer or multi-layer structure such as ITO/Ag/ITO and can be formed of metal, alloy or a metal oxide conductor. After the first electrode layer  220  was formed, the pixel definition layer  240  is disposed thereon and has an opening portion  245  correspondingly exposing a portion of the first electrode layer  220 . The area of the opening portion  245  is smaller than that of the first electrode layer  220 . The emission layer  210  can be formed of an organic light emitting material. The coverage area of the emission layer  210  is smaller than or equivalent to that of the sub-pixel but larger than that of the opening portion  245  or the first electrode layer  220 . The actual light emitting area of the emission layer  210  is equivalent to the area of the opening portion  245 . The second electrode layer  230  is disposed on the emission layer  210  and can be used as a cathode. The second electrode layer  230  is a single-layer or multi-layer structure such as Mg:Ag alloy and can be formed of metal, alloy or a metal oxide conductor. The display substrate  10  may further include a capping layer  400 , which covers the display structure  200 . 
     As indicated in  FIG. 1B , sub-pixels  211 ,  213 ,  215  has an actual light emitting region, and the area of the light emitting region is defined as the area of the opening portion  245  of the pixel definition layer  240  of a sub-pixel, and the area of the opening portion  245  is the corresponding light emitting areas  211 L,  213 L and  215 L of the light emitting region. Let the pixel U which is formed from the first sub-pixels  211  and the third sub-pixels  215  be taken for example. The emission layer  210  is formed by using the evaporating process. Due to the restrictions of the evaporating process, the actual area of the emission layer  210  is smaller than the area occupied by sub-pixels. In the evaporating process, due to the errors in the aligning precision of the evaporating machine and the accuracy and positioning precision of the opening of the metal mask, part of the area occupied by sub-pixels is reserved as tolerance area of the manufacturing process to avoid the light emitting material of different colors of sub-pixels being erroneously mixed in the manufacturing process and affecting light emitting effect. For instance, in the pixel U, the first sub-pixel  211  has a light emitting region  211 L and a tolerance region  211 E; the L-shaped third sub-pixel  215  has a light emitting region  215 L and a tolerance region  215 E. The light emitting region  215 L is the sum of the light emitting region  215 L 1  and the light emitting region  215 L 2 , and the tolerance region  215 E is the sum of the tolerance region  215 E 1  and the tolerance region  215 E 2 . In different manufacturing process, the ratio of the area of the tolerance region to the area of the light emitting region may vary accordingly. 
     In the present embodiment, the evaporating process is used for exemplary purpose. If two adjacent sub-pixels have the same luminous color, the error width or the error length at the junction is about 5 micrometers (μm). If two adjacent sub-pixels have different luminous colors, the error width or the error length at the junction is about 12 μm. The minimal dimension of the opening allowed by the manufacturing process is about 6 μm. In other words, the error distance between the sub-pixels having the same luminous color can be smaller, but the error distance between the sub-pixels having different luminous colors is larger. According to the embodiment of the disclosure, if the display units S are jointed to each other through the third sub-pixels  215  having the same luminous color, the error distance between sub-pixels can be decreased (for example, from 12 μm to 5 μm), the colors of the sub-pixels in adjacent regions will not be mixed, and the display unit S or the pixel U can be downsized, such that the design of high resolution (High PPI) product can be achieved. 
     As indicated in  FIG. 1B , both the opening width W 1  and the opening length L 1  of the light emitting region are about 6 μm, both the error width W 2  and the error length L 2  are about 12 μm, both the error width W 3  and the error length L 3  are about 5 μm, the opening width W 4  of the light emitting region  215 L 1  is about 13 μm, and the opening length L 4  of the light emitting region  215 L 2  is about 43 μm. Particularly, the third sub-pixels  215  adjacent to the display unit S are jointed to each other, the error width W 3  and the error length L 3  do not have to be 12 μm and can be decreased to 5 μm, such that the error distance between the display units S can be effectively reduced, and the pixel U can be downsized. Under such circumstance, the pixel U measures 53 μm. If the pixel U is used as a calculation unit of resolution, the number of pixels per inch (actual PPI) is 369. By using specific algorithm allowing adjacent pixels U to share sub-pixels, high resolution effect can be simulated by pixels having low resolution, such that the number of virtual pixels per inch (virtual PPI) of the pixel U can reach as high as 479. The light emitting region  211 L of the first sub-pixel  211  occupies 2.6% of total area (the dimension of the opening), and the light emitting region  215 L of the third sub-pixel  215  occupies 23.9% of total area (the dimension of the opening). In other words, it is defined that the light emitting region of the first sub-pixel has the first light emitting area, and the light emitting region of the third sub-pixel has the third light emitting area. Under such circumstance, in the present embodiment, the ratio of the first light emitting area to the third light emitting area is about 2.6%:23.9% which approximates 1:10. 
     In the present embodiment, the pixel U as shown in  FIG. 1B  has a size of 93 μm with ppi of 273. Compared to a pixel structure having RGB strips with a size of 93 μm with ppi of 273, the aperture ratio of the pixel structure having RGB strips is calculated to be merely 10.6%; in the pixel U of the present embodiment as shown in  FIG. 1B , the aperture ratio of the first sub-pixel  211  and the second sub-pixel  213  is calculated to be 48.93%, and the aperture ratio of the third sub-pixel  215  is calculated to be 18.87%, which are both larger than the aperture ratio of the conventional pixel structure having RGB strips. 
     Likewise, in the present embodiment, since the percentage of total area occupied by the light emitting region  213 L of the second sub-pixels  213  is about the same as that occupied by the light emitting region  211 L of the first sub-pixels  211 , it is defined that the light emitting region of the second sub-pixel has a second light emitting area. Therefore, in the present embodiment, the ratio of the second light emitting area to the third light emitting area is about 2.6%:23.9% which approximates 1:10. 
     In another embodiment, suppose both the opening width W 1  and the opening length L 1  of the light emitting region are about 6 μm, both the error width W 2  and the error length L 2  are about 12 μm, both the error width W 3  and the error length L 3  are about 6 μm, the opening width W 4  of the light emitting region  215 L 1  is about 12 μm, and the opening length L 4  of the light emitting region  215 L 2  is about 36 μm. Under such circumstance, the pixel U measures 60 μm. By using specific algorithm allowing adjacent pixels U to share sub-pixels, high resolution effect can be simulated by pixels having low resolution, such that the number of virtual pixels per inch (virtual PPI) of the pixel U can reach as high as 416. The light emitting region  211 L of the first sub-pixel  211  occupies of 10.53% of total area (the dimension of the opening), and the light emitting region  215 L of the third sub-pixel  215  occupies 23.22% of total area (the dimension of the opening). In other words, it is defined that the light emitting region of the first sub-pixel has a first light emitting area, and the light emitting region of the third sub-pixels has a third light emitting area. Under such circumstance, the present embodiment, the ratio of the first light emitting area to the third light emitting area is about 10.53%:23.22% which approximates 1:2. 
     Likewise, in the present embodiment, since the percentage of total area occupied by the light emitting region  213 L of the second sub-pixel  213  is about the same as that occupied by the light emitting region  211 L of the first sub-pixel  211 , it is defined that the light emitting region of the second sub-pixel has a second light emitting area. Therefore, in the present embodiment, the ratio of the second light emitting area to the third light emitting area is about 10.53%:23.22% which approximates 1:2. 
     To summarize, according to the above embodiments of the disclosure, the ratio of the first light emitting area to the third light emitting area is about 1:2˜1:10, and the ratio of the second light emitting area to the third light emitting area is about 1:2˜1:10. 
       FIGS. 1D ˜ 1 I are top views of a display unit of a display device according to other embodiments of the disclosure. For elements common to the present embodiment and above embodiments, the same numeric designations are used, and relevant descriptions can be obtained with reference to above disclosure and are not repeated here. 
     As indicated in  FIG. 1D , the peripheral region P 1  of the display unit S 1  surrounds the core region C, and the number of third sub-pixels  215 - 1  of the peripheral region P 1  is 1. As indicated in  FIG. 1E , the peripheral region P 2  of the display unit S 2  surrounds the core region C, and the number of third sub-pixels  215 - 2  of the peripheral region P 2  is 4. As indicated in  FIG. 1F , the peripheral region P 3  of the display unit S 3  surrounds the core region C, the number of third sub-pixels  215 - 3  of the peripheral region P 3  is 4, and the shape of the third sub-pixels  215 - 3  is not rectangular. 
     As shown in  FIG. 1G , in the present embodiment, in the display unit S 4 , the core region C includes a plurality of the first sub-pixels  211 , a plurality of the second sub-pixels  213 , and a plurality of fourth sub-pixels  217 . The first sub-pixels  211  and the second sub-pixels  213  are interlacedly arranged. The fourth sub-pixels  217  are respectively located between the one of the first sub-pixels  211  and one of the second sub-pixels  213 . The peripheral region P 4  includes a plurality of the third sub-pixels  215 , and a light emitted by the fourth sub-pixels  217  and a light emitted by the third sub-pixels  215  have the same primary color. For example, as shown in  FIG. 1G , one display unit S 4  includes two of the first sub-pixels  211 , two of the second sub-pixels  213 , four of the third sub-pixels  215 , and two of the fourth sub-pixels  217 , wherein the third sub-pixels  215  of the peripheral region S 4  are disposed on three sides of the core region C, and the fourth sub-pixels  217  in the core region C are arranged adjacent to each other. In the embodiment, as shown in  FIG. 1G , the display units S 4  are arranged repeatedly and regularly in an array on the base plate  100 . 
     As shown in  FIG. 1H , in the present embodiment, in the display unit S 5 , the core region C includes a plurality of the first sub-pixels  211 , a plurality of the second sub-pixels  213 , and a plurality of the fourth sub-pixels  217 . The first sub-pixels  211  and the second sub-pixels  213  are interlacedly arranged. The fourth sub-pixels  217  are respectively located between the one of the first sub-pixels  211  and one of the second sub-pixels  213 . The peripheral region P 5  includes a plurality of the third sub-pixels  215 , and a light emitted by the fourth sub-pixels  217  and a light emitted by the third sub-pixels  215  have the same primary color. In the display unit S 5 , as shown in  FIG. 1H , the third sub-pixels  215  of the peripheral region P 5  are disposed on two opposite sides of the core region C. In one display unit S 5 , one of the fourth sub-pixels  217 , one of the first sub-pixels  211 , one of the second sub-pixels  213 , and one of the fourth sub-pixels  217  are arranged in order on one of the two opposite sides of the core region C, and one of the first sub-pixels  211 , one of the fourth sub-pixels  217 , one of the fourth sub-pixels  217 , and one of the second sub-pixels  213  are arranged in order on the other one of the two opposite sides of the core region C. In the embodiment, as shown in  FIG. 1H , the display units S 5  are arranged repeatedly and regularly in an array on the base plate  100 . 
     As shown in  FIG. 1I , in the present embodiment, in the display unit S 6 , the core region C includes a plurality of the first sub-pixels  211 , a plurality of the second sub-pixels  213 , and a plurality of the fourth sub-pixels  217 . The first sub-pixels  211  and the second sub-pixels  213  are interlacedly arranged. The fourth sub-pixels  217  are respectively located between the one of the first sub-pixels  211  and one of the second sub-pixels  213 . The peripheral region P 6  includes a plurality of the third sub-pixels  215 , and a light emitted by the fourth sub-pixels  217  and a light emitted by the third sub-pixels  215  have the same primary color. In a display unit S 6 , as shown in  FIG. 1I , the third sub-pixels  215  of the peripheral region P 6  are disposed on two opposite sides of the core region C. In one display unit S 6 , one of the fourth sub-pixels  217 , one of the first sub-pixels  211 , one of the second sub-pixels  213 , and one of the fourth sub-pixels  217  are arranged in order on one of the two opposite sides of the core region C, and one of the first sub-pixels  211 , one of the fourth sub-pixels  217 , one of the fourth sub-pixels  217 , and one of the second sub-pixels  213  are arranged in order on the other one of the two opposite sides of the core region C. In the embodiment, as shown in  FIG. 1I , the display units S 6  are arranged repeatedly and regularly in an array on the base plate  100 . In the array arranged by the display units S 6 , two of the adjacent display units S 6  in two adjacent columns are bilateral symmetric to each other. 
     The followings are further description of the embodiments. Calculation results of the aperture ratios of the display devices having display units S, S 4 , S 5 , and S 6  are shown for describing the properties of the display substrates and display devices according to the present disclosure. However, the following embodiments are for illustration only and are not for limiting the scope of the present invention. 
     Table 1 shows the calculation results of aperture ratios from display devices having sizes of 72.5 μm*72.5 μm and ppi of 350. The aperture ratios of the first sub-pixels  211  and of the second sub-pixels  213  are the same. 
     
       
         
               
               
               
             
               
               
               
               
               
             
               
               
               
             
               
               
               
               
               
             
           
               
                 TABLE 1 
               
               
                   
               
             
             
               
                   
                 Display unit S 
                 Display unit S4 
               
             
          
           
               
                   
                 First sub-pixel/ 
                 Third 
                 First sub-pixel/ 
                 Third 
               
               
                   
                 Second sub-pixel 
                 sub-pixel 
                 Second sub-pixel 
                 sub-pixel 
               
               
                   
               
               
                 Aperture 
                 14.45 
                 15.92 
                  9.31 
                 15.92 
               
               
                 ratio (%) 
               
               
                   
               
             
          
           
               
                   
                 Display unit S5 
                 Display unit S6 
               
             
          
           
               
                   
                 First sub-pixel/ 
                 Third 
                 First sub-pixel/ 
                 Third 
               
               
                   
                 Second sub-pixel 
                 sub-pixel 
                 Second sub-pixel 
                 sub-pixel 
               
               
                   
               
               
                 Aperture 
                 14.55 
                 14.45 
                 14.55 
                 14.45 
               
               
                 ratio (%) 
               
               
                   
               
             
          
         
       
     
       FIG. 2  is a top view of a display unit matrix of a display structure  200  according to another embodiment of the disclosure. In the present embodiment, the display structure  200  may include a plurality of pixels U, and the display units S are repetitively and regularly arranged on the base plate  100  in the form of arrays. As indicated in  FIG. 2 , the display units S are jointed to each other through the third sub-pixels  215 . 
       FIG. 3  is a top view of a display unit matrix of a display structure  300  according to an alternate embodiment of the disclosure. For elements common to the present embodiment and above embodiments, the same numeric designations are used, and relevant descriptions can be obtained with reference to above disclosure and are not repeated here. 
     In an embodiment, the display structure  300  is disposed on the base plate  100  and includes at least one display unit S. As indicated in  FIG. 3 , the display structure  300  may include a plurality of display units S, which are repeatedly and regularly arranged on the base plate  100 . In the display structure  300 , the display units S are jointed to each other through the third sub-pixels  215 . A display unit S includes, for example, two first sub-pixels  211 , two second sub-pixels  213  and four third sub-pixels  215 . The first sub-pixels  211  and the second sub-pixels  213  are located in the core region C, and the third sub-pixels  215  are located in the peripheral region. 
     In the present embodiment, the first sub-pixels  211  are jointed to each other, and so are the second sub-pixels  213  jointed to each other. As indicated in  FIG. 3 , the first sub-pixels  211  located in the top left part of the pixel structure  310  are jointed to a second sub-pixel  213  and a first sub-pixel  211  through adjacent sides  211   s   3  and  211   s   4  respectively. 
     As indicated in  FIG. 1C , the cover substrate  20  can be realized by a glass substrate or a plastic substrate. In an embodiment, the cover substrate  20  may include a plurality of color filters, spacers, electrodes or touch circuits. The color filter enhances the quality of different luminous colors of the sub-pixels of the light emitting unit. In some embodiments, the display substrate  200  and the cover substrate  20  can swap their positions, and in the sub-pixel of the display unit S, the region of the color of emission layer defined by sub-pixels can be replaced by the color filter. 
     Referring to  FIGS. 4A-4C , steps of a flowchart of an evaporating process of a light emitting material according to an embodiment are shown. The process of evaporating several sub-pixels having three luminous colors is exemplified below. As indicated in  FIG. 4A , a metal mask M 1  having a plurality of openings M 10  corresponding to predetermined regions of the first sub-pixels  521   p  is provided. During the evaporating process, the first light emitting material  521  is evaporated on the predetermined regions through the openings M 10 . These regions are defined and separated by the pixel definition layer  240 . Next, the process proceeds to  FIG. 4B , another metal mask M 20  having a plurality of openings M 20  corresponding to predetermined regions of the second sub-pixel  523   p  is provided. During the evaporating process, the second light emitting material  523  is evaporated on the predetermined regions through the openings M 20 . Lastly, as indicated in  FIG. 4C , an alternate metal mask M 3  having a plurality of openings M 30  corresponding to predetermined regions of the third sub-pixels  525   p  is provided. During the evaporating process, the third light emitting material  525  is evaporated on the predetermined regions through the openings M 20 . 
     According to an embodiment of the disclosure, the display units S can be made from a suitable metal mask by using the evaporating process. Referring to  FIGS. 5-8 , schematic diagrams of a metal mask used for manufacturing a display unit S according to an embodiment of the disclosure are shown. 
     In the present embodiment, the display unit S can be formed by evaporating the metal mask of  FIGS. 5-7 . For instance, the metal mask M 5  of  FIG. 5  has a plurality of openings M 50 , the metal mask M 6  of  FIG. 6  has a plurality of openings M 60 , and the metal mask M 7  of  FIG. 7  has a plurality of openings M 70 . Two first sub-pixels  211  and two second sub-pixels  213  can be manufactured by performing four times of evaporating process on the metal mask M 5 . The vertical portion of the L-shaped third sub-pixels  215  can be manufactured by performing one time of evaporating process on the metal mask M 6 . The horizontal portion of the L-shaped third sub-pixels  215  can be manufactured by performing one time of evaporating process on the metal mask M 7 . In the present embodiment, the dimension of an opening is equivalent to the sum of the actual light emitting region of a sub-pixel and the tolerance region. Therefore, the dimension of opening of the metal mask can determine sub-pixel dimension, which further determines the dimensions of both the display unit S and the pixel U and affect the resolution level of the display device  1 . 
     Particularly, as indicated in  FIG. 6 ˜ 7 , the opening M 60 /M 70  of the metal mask M 6 /M 7  can concurrently be used for manufacturing sub-pixels  215  having the same luminous color of different display units S. Therefore, without increasing the precision condition of the evaporating process, the error distance between the display units S can be decreased, tolerance requirement of the manufacturing process can be effectively reduced, tolerance regions can be shrunk, color mixing of sub-pixels in adjacent regions can be avoided, the problem that the light emitting material is incapable of completely covering corresponding regions of the openings can be resolved, such that the design of high resolution (High PPI) product can be achieved. 
     Likewise, the metal mask M 8  of  FIG. 8  has a plurality of openings M 80 . Since two first sub-pixels  211  of the display unit S are jointed to each other and so are two second sub-pixels  213  jointed to each other, the required number of evaporating process can be reduced. For instance, two first sub-pixels  211  and two second sub-pixels  213  can be manufactured by performing two times of evaporating process on the metal mask M 8 . The vertical portion of the L-shaped third sub-pixels  215  can be manufactured by performing one time of evaporating process on the metal mask M 6 . The horizontal portion of the L-shaped third sub-pixels  215  can be manufactured by performing one time of evaporating process on the metal mask M 7 . In other words, in the display unit S, the sub-pixel arrangement of jointing two first sub-pixels  211  to each other and jointing two second sub-pixels  213  to each other effectively simplifies the evaporating process. 
     While the invention has been described by way of example and in terms of the preferred embodiment(s), it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.