Abstract:
A temperature measurement circuit has a current excitation circuit, a temperature calculation circuit, a calibration factor generator, and an analog-to-digital conversion circuit. The current excitation circuit supplies in sequence at least two currents to a thermal sensor. At least two output signals are correspondingly generated from the thermal sensor. In response to the at least two output signals, the temperature calculation circuit calculates an analog temperature signal representative of a temperature detected by the thermal sensor. The analog-to-digital conversion circuit converts the analog temperature signal into a digital signal based on a conversion reference level. The conversion reference level is shifted in accordance with a calibration value generated from the calibration factor generator.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to a temperature measurement circuit and, more particularly, to a temperature measurement circuit capable of performing a calibration function through shifting a conversion reference level of an analog-to-digital conversion circuit.  
         [0003]      2 . Description of the Related Art  
         [0004]     Because the potential difference across the semiconductor pn junction of diodes or transistors is related to the current flowing through the junction itself and further depends on the temperature of the junction, this kind of semiconductor pn junction is widely employed in the integrated circuits to perform the task of temperature measurement.  FIG. 1  is a schematic diagram showing a circuit configuration of a conventional temperature measurement circuit  10 . Typically, the temperature measurement circuit  10  is installed to monitor a temperature of an external system  20 . The external system  20  may, for example, refer to a computer, an electronic device, or a certain circuitry region, which has a thermal sensor  21  built inside to provide a semiconductor pn junction for trying to detect the temperature of the external system  20 . As shown in the figure, the thermal sensor  21  may be implemented by a pnp bipolar transistor that provides the semiconductor pn junction between the base and emitter electrodes.  
         [0005]     In the temperature measurement circuit  10 , two switches S 1  and S 2  of a current source circuit  11  are turned ON and OFF by a control circuit  1   2  to therefore allow different currents I 1  and I 2  to be applied to the thermal sensor  21 , respectively. Assumed that the current I 1  is applied to the thermal sensor  21  to cause a potential difference V BE1  across the base and emitter electrodes and the current I 2  is applied to the thermal sensor  21  to cause a potential difference V BE2  across the base and emitter electrodes, a temperature calculation circuit  13  subtracts V BE2  from V BE1  and then generates a difference ΔV BE  expressed in the following equation (1):  
               Δ   ⁢           ⁢     V   BE       =         V     BE   ⁢           ⁢   1       -     V     BE   ⁢           ⁢   2         =         KT   q     ⁢     ln   ⁡     (       I   1       I   2       )         +       (       I   1     -     I   2       )     ⁢     (       R   e     +       R   b     β       )                   (   1   )             
 
         [0006]     wherein K is Boltzmann&#39;s constant, T is the absolute temperature, q is the electron charge, R e  is the series parasitic resistance of the base electrode, R b  is the series parasitic resistance of the emitter electrode, and β is the gain of the transistor. As a result, the potential difference ΔV BE  generated by the temperature calculation circuit  13  is an analog signal that changes along with the temperature and therefore provides the information about the temperature. Afterwards, an analog-to-digital conversion circuit (ADC)  14  converts such analog signal into a digital temperature signal.  
         [0007]     As seen in equation (1), the series parasitic resistances R e  and R b  of the thermal sensor  21  causes a constant-term offset, (I 1 −I 2 )(R e +R b /β), which is independent of the temperature. Hoping to get an accurate result on the temperature measurement, the prior art employs three or more different currents to sequentially excite the same thermal sensor  21  in order to eliminate the constant-term offset caused by such series parasitic resistances R e  and R b . However, the prior art three or more current excitation method not only requires a much higher frequency in operation but also causes some disadvantages like power inefficiency and temperature fluctuation. Even if the operational frequency is intentionally kept constant, the excitations by more and more currents will inevitably make each cycle of temperature measurement much longer and therefore reduce the speed of response, to the temperature variation, of the temperature measurement circuit  10 .  
         [0008]     On the other hand, what the temperature measurement circuit  10  actually monitors is the temperature of the semiconductor substrate on which the thermal sensor  21  is formed, and such actually monitored temperature may not necessary be equal to the real representative temperature of the external system  20 . Especially in the case where the external system  20  is a computer, the temperature of interest would usually be the temperature of a thermal sinking plate  22  attached in the external system  20  instead of the temperature of the semiconductor substrate on which the thermal sensor  21  is formed. As for such case, the manufacturer of the external system  20  provides a temperature offset data ΔT, which indicates a temperature difference existing between the thermal sinking plate  22  and the substrate of the thermal sensor  21 , to be stored in a register  15  of the temperature measurement circuit  10 . Afterwards, the digital output of the analog-to-digital conversion circuit  14  are calibrated in accordance with the temperature offset data ΔT through an adder  16  so as to eventually generate an accurate temperature signal Tmp.  
       SUMMARY OF THE INVENTION  
       [0009]     In view of the above-mentioned problems, an object of the present invention is to provide a temperature measurement circuit capable of performing a calibration function through shifting a conversion reference level of an analog-to-digital conversion circuit.  
         [0010]     According to one aspect of the present invention, a temperature measurement circuit includes a current excitation circuit, a calculation circuit, a calibration factor generator, and an analog-to-digital conversion circuit. The current excitation circuit sequentially applies at least two currents to a thermal sensor. At least two output signals are correspondingly generated from the thermal sensor. In response to the at least two output signals, the calculation circuit calculates an analog temperature signal representative of a temperature detected by the thermal sensor. The calibration factor generator generates a calibration factor. The analog-to-digital conversion circuit converts the analog temperature signal into a digital temperature signal in accordance with a reference level for conversion. The reference level for conversion is shifted in accordance with the calibration factor.  
         [0011]     The thermal sensor has a semiconductor pn junction such that the at least two currents sequentially flows through the semiconductor pn junction to generate at least two potential differences across the semiconductor pn junction for serving as the at least two output signals. The calibration factor is calculated when the current excitation circuit sequentially applies at least three currents to the thermal sensor, and is used for calibrating a constant-term offset of the analog temperature signal. The thermal sensor is formed in a substrate of an external system. The calibration factor is provided by the external system to calibrate a temperature offset between the temperature detected by the thermal sensor and a representative temperature of the external system.  
         [0012]     According to another aspect of the present invention, a method of measuring a temperature is provided. The first step is sequentially applying at least two currents to a thermal sensor. At least two output signals are correspondingly generated from the thermal sensor. The second step is calculating an analog temperature signal in response to the at least two output signals. The analog temperature signal is representative of a temperature detected by the thermal sensor. The third step is generating a calibration factor. The fourth step is converting the analog temperature signal into a digital temperature signal in accordance with a reference level for conversion. The reference level for conversion is shifted in accordance with the calibration factor.  
         [0013]     According to still another aspect of the present invention, a current excitation circuit for exciting a thermal sensor includes a measurement current source circuit, a calibration current source circuit, a calibration control circuit, and a measurement control circuit. The measurement current source circuit provides a first measurement current and a second measurement current. The calibration current source circuit provides a calibration current. The calibration control circuit allows the first measurement current, the second measurement current, and the calibration current to be sequentially applied to the thermal sensor, thereby determining a constant-term offset associated with the thermal sensor. The measurement control circuit allows the first measurement current and the second measurement current to be sequentially applied to the thermal sensor, thereby measuring a temperature of the thermal sensor. The calibration control circuit is activated earlier than the measurement control circuit in order to determine the constant-term offset before the temperature of the thermal sensor is measured. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0014]     The above-mentioned and other objects, features, and advantages of the present invention will become apparent with reference to the following descriptions and accompanying drawings, wherein:  
         [0015]      FIG. 1  is a schematic diagram showing a circuit configuration of a conventional temperature measurement circuit;  
         [0016]      FIG. 2  is a schematic diagram showing a circuit configuration of a temperature measurement circuit according to the present invention;  
         [0017]     FIGS.  3 (A) to  3 (C) are configuration diagrams showing an operation of the temperature measurement circuit according to the present invention;  
         [0018]      FIG. 4  is a conceptual diagram showing a level-shifting principle employed in an analog-to-digital conversion circuit according to the present invention; and  
         [0019]      FIG. 5  is a detailed circuit diagram showing an example of an analog-to-digital conversion circuit according to the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0020]     The preferred embodiments according to the present invention will be described in detail with reference to the drawings.  
         [0021]      FIG. 2  is a schematic diagram showing a circuit configuration of a temperature measurement circuit  30  according to the present invention. In the temperature measurement circuit  30 , a measurement current source circuit  31 , a calibration current source circuit  32 , a measurement control circuit  33 , and a calibration control circuit  34  all come together to form a current excitation circuit. The measurement current source circuit  31  provides a first measurement current I 1  and a second measurement current I 2  to the emitter electrode of the thermal sensor  21  respectively through two switches S 1  and S 2 . The calibration current source circuit  32  provides a calibration current  13  to the emitter electrode of the thermal sensor  21  through a switches S 3 . Before the temperature measurement circuit  30  is ready to start measuring the temperature of the thermal sensor  21 , the calibration control circuit  34  must be activated to determine a constant-term offset associated with the series parasitic resistances R e  and R b  by controlling and applying the first and second measurement currents I 1  and I 2  and the calibration current I 3  in sequence to the thermal sensor  21 . Assumed that the currents I 1 , I 2 , and I 3  are applied to the thermal sensor  21  to cause three potential differences V BE1 , V BE2 , and V BE3  across the base and emitter electrodes, respectively, a calculation circuit  35  generates an equation (2) as expressed in the following:  
                 Δ   ⁢           ⁢     V     BE   ⁢           ⁢   1         =         V     BE   ⁢           ⁢   1       -     V     BE   ⁢           ⁢   2         =         KT   q     ⁢     ln   ⁡     (       I   1       I   2       )         +       (       I   1     -     I   2       )     ⁢     (       R   e     +       R   b     β       )             ⁢     
     ⁢       Δ   ⁢           ⁢     V     BE   ⁢           ⁢   2         =         V     BE   ⁢           ⁢   2       -     V     BE   ⁢           ⁢   3         =         KT   q     ⁢     ln   ⁡     (       I   2       I   3       )         +       (       I   2     -     I   3       )     ⁢     (       R   e     +       R   b     β       )             ⁢     
     ⁢       d   ⁢           ⁢   Δ   ⁢           ⁢     V   BE       =         Δ   ⁢           ⁢     V     BE   ⁢           ⁢   1         -     Δ   ⁢           ⁢     V     BE   ⁢           ⁢   2           =         KT   q     ⁢     ln   ⁡     (         I   1     *     I   3           I   2     *     I   3         )         +       (       I   1     -     2   ⁢     I   2       -     I   3       )     ⁢     (       R   e     +       R   b     β       )                     (   2   )               
         [0022]     Assumed again that the currents I 1 , I 2 , and I 3  satisfy a proportional condition (3) as follows: 
 
I 1 :I 2 :I 3 =A 2 :A:1   (3) 
 
         [0023]     That is, when the first measurement current I 1  is set equal to A times the second measurement current I 2 , and the second measurement current I 2  is set equal to A times the calibration current I 3 , where A is larger than zero, the equation (2) may further be reduced to the following equation (4):  
               d   ⁢           ⁢   Δ   ⁢           ⁢     V   BE       =         (     A   -   1     )     2     *     I   3     *     (       R   e     +       R   b     β       )               (   4   )             
 
         [0024]     Therefore, with the help of the calibration current I 3 , the calculation circuit  35  effectively determines a constant-term offset dΔV BE  associated with the series parasitic resistances R e  and R b . Afterwards, such constant-term offset dΔV BE  is delivered to a calibration factor generator  36  for generating a calibration factor CF that is determined before any temperature measurement cycle is actually performed.  
         [0025]     FIGS.  3 (A) to  3 (C) are configuration diagrams showing an operation of the calculation circuit  35  when determining a constant-term offset dΔV BE  in according to the present invention. In  FIG. 3 (A), the switch S a  is turned ON, the switch S b  is turned ON, the switch S c  couples the capacitor C c  to the non-inverting input terminal (+) of the differential amplifier AM, and the switch S d  couples the capacitor C d  to the inverting input terminal (−) of the differential amplifier AM. Moreover, the switch S 1  is turned ON and the switches S 2  and S 3  are both turned OFF for allowing only the first measurement current I 1  to be applied to the thermal sensor  21  and generate a first potential difference V BE1  across the base and emitter electrodes. During such first phase, the output voltage V out(1)  of the differential amplifier AM is zero because the non-inverting (+) and inverting (−) input terminals of the differential amplifier AM are both at a voltage of zero. In  FIG. 3 (B), the switches S a  and S b  are both turned OFF. Moreover, the switch S 2  is turned ON and the switches S 1  and S 3  are both turned OFF for allowing only the second measurement current I 2  to be applied to the thermal sensor  21  and generate the second potential difference V BE2  across the base and emitter electrodes. During such second phase, the output voltage V out(2)  of the differential amplifier AM is (V BE1 -V BE2 ) because the non-inverting (+) and inverting (−) input terminals of the differential amplifier AM are both at a voltage of (V BE1 -V BE2 )/ 2 . In  FIG. 3 (C), the switch S c  couples the capacitor C c  to the inverting input terminal (−) of the differential amplifier AM while the switch S d  couples the capacitor C d  to the non-inverting input terminal (+) of the differential amplifier AM. Moreover, the switch S 3  is turned ON and the switches S 1  and S 2  are both turned OFF for allowing only the calibration current I 3  to be applied to the thermal sensor  21  and generate the third potential difference V BE3  across the base and emitter electrodes. During such third phase, the output voltage V out(3)  of the differential amplifier AM becomes (V BE1 -V BE2 )−(V BE2 -V BE3 ), which is just the constant-term offset dΔV BE  expressed in the equations (2) and (4).  
         [0026]     It should be noted that in the present invention the calibration current source circuit  32  and the calibration control circuit  34  are disabled for any further operation after the constant-term offset dΔV BE  has been determined and output to the calibration factor generator  36 . In other words, when actually measuring the temperature of the thermal sensor  21 , the temperature measurement circuit  30  employs only the measurement control circuit  33  to control the measurement current source circuit  31  such that the first and second measurement currents I 1  and I 2  are applied in sequence to the thermal sensor  21 . Therefore, the calculation circuit  35  during each temperature measurement cycle is restricted to alternately operate only between the first and second phases shown in FIGS.  3 (A) and  3 (B). Under the assumption that the proportional condition (3) is satisfied and the constant-term offset dΔV BE  of the equation (4) has been determined, the potential difference ΔV BE  across the base and emitter electrodes generated from the calculation circuit  35  may be expressed as follows:  
               Δ   ⁢           ⁢     V   BE       =         V     BE   ⁢           ⁢   1       -     V     BE   ⁢           ⁢   2         =         KT   q     ⁢     ln   ⁡     (   A   )         +       (     A     A   -   1       )     ⁢   d   ⁢           ⁢   Δ   ⁢           ⁢     V   BE                   (   5   )             
 
         [0027]     Therefore in the present invention an accurate temperature measurement result is effectively obtained by level-shifting the potential difference ΔV BE , which is measured only through the first and second measurement currents I 1  and I 2 , with the predetermined constant-term offset dΔV BE  multiplied by a factor of A/(A−1). Since the constant-term offset dΔV BE  has been determined at the beginning through the help of the calibration current  13  and stored in the calibration factor generator  36 , it is possible to reduce the number of the necessary excitation currents down to only two during each temperature measurement cycle.  
         [0028]     In addition to the constant-term offset dΔV BE , the calibration factor generator  36  also receives from the external system  20  the temperature offset data ΔT between the thermal sensor  21  and the thermal sinking plate  22 . Since the constant-term offset dΔV BE  and the temperature offset data ΔT both belong to this type of error that can be corrected by level-shifting, the calibration factor generator  36  may integrate them into a compound calibration factor CF. On the basis of the calibration factor CF, a level-shifting analog-to-digital conversion circuit (ADC)  37  determines an appropriate reference level REF for conversion.  FIG. 4  is a conceptual diagram showing a level-shifting principle employed in an analog-to-digital conversion circuit  37  according to the present invention. Generally speaking, the analog-to-digital conversion circuit  37  samples the received analog signal Alg in accordance with a predetermined frequency. Afterwards, the analog sample result is converted into a digital signal. Viewing in terms of mathematics, this conversion process may be considered as done through a digital mapping axis Dx and therefore the actual digital value after converted depends on the relative position of the conversion reference level REF. For example, as shown in  FIG. 4 , the original reference level REF for conversion is shifted downward by the calibration factor CF so as to become a shifted reference level REF_S for conversion. With respect to the original reference level REF for conversion, the analog sample AS is converted to a first digital signal Dgt 1 . However, with respect to the shifted reference level REF_S for conversion, the analog sample AS is converted to the second digital signal Dgt 2 . Therefore, through shifting the reference level REF for conversion instead of performing the prior art adding process for calibration, the level-shifting analog-to-digital conversion circuit  37  effectively eliminates the constant-term offset dΔV BE  and the temperature offset data ΔT from the temperature measurement result.  
         [0029]      FIG. 5  is a detailed circuit diagram showing an example of an analog-to-digital conversion circuit  37  according to the present invention. A sample/modulate circuit  51  is used for sampling the potential difference ΔV BE  from the calculation circuit  35  in accordance with a clock signal CLK provided by a clock generator  52 , and for modulating the sample result into a pulse train signal. For example, the sample/modulate circuit  51  may be implemented by a Delta-Sigma analog-to-digital modulator such that the pulse train signal is a digital version of the analog sample. The pulse train from the sample/modulate circuit  51  is applied to a counter  53 . Within a predetermined period of time, the counter  53  counts the number of the pulses in the pulse train signal. Because the counting step performed in the counter  53  increments the counting result from a ground value, shifting the ground value has the same effect as changing the counting result of the counter  53 , which is therefore applied by the present inventor to the calibration for the temperature measurement result Tmp.  
         [0030]     More specifically, the ground value of the counter  53  is determined by the calibration factor CF provided from the calibration factor generator  36 . In the calibration factor generator  36 , the constant-term offset dΔV BE  from the calculation circuit  53  is multiplied by A/(A−1) through a multiplier  41  and then added with the temperature offset data ΔT from the external system  20  through an adder  42 , thereby generating a compound calibration factor CF to be stored in a calibration register  43 . In other words, the embodiment shown in  FIG. 5  carries out the principle of shifting the reference level REF for calibration shown in  FIG. 4  through shifting the ground value of the counter  53 . On the other hand, a frequency divider  54  generates a reset signal RST with a lower frequency by dividing the frequency of the clock signal CLK of the clock generator  52 . In one embodiment, the frequency divider  54  divides the frequency of the clock signal CLK by  1024  in order to generate the reset signal RST. As a result, every  1024  periods of the clock signal CLK the counter  53  is reset to the ground value for a new cycle of counting. As always, the ground value is determined by the calibration factor CF provide by the calibration factor generator  36 . Furthermore, the counter  53  outputs the counting result to the register  55  every  1024  periods of the clock signal CLK. The temperature measurement result Tmp is refreshed in accordance with the frequency of the reset signal RST.  
         [0031]     While the invention has been described by way of examples and in terms of preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications.