Abstract:
The invention relates to a method and an arrangement for regenerating a timing signal in digital data communication where two network elements operate in a master/slave loop timing mode. In a solution according to the invention two different frequency difference indicators are formed. Values or changes of the values of both of them in relation to time indicate a frequency difference between a reference timing signal present in a master device and a regenerated timing signal present in a slave device. One frequency difference indicator is formed on the basis of reception taking place in the master device, and the other one on the basis of reception taking place in the slave device. The frequency of the regenerated timing signal is adjusted utilizing information contained by both frequency difference indicators. The probability of incorrect frequency adjustment measures can be thereby reduced.

Description:
FIELD OF THE INVENTION 
     The invention relates to a method for regenerating a timing signal in digital data communication using a master/slave loop timing mode. 
     The invention also relates to a method to be used in a master network element for participating in the regeneration of a timing signal in digital data communication using a master/slave loop timing mode. 
     The invention also relates to a method to be used in a slave network element for regenerating a timing signal in digital data communication using a master/slave loop timing mode. 
     The invention also relates to an arrangement for regenerating a timing signal in digital data communication using a master/slave loop timing mode. 
     The invention also relates to a master network element for participating in regeneration of a timing signal in digital data communication using a master/slave loop timing mode. 
     The invention also relates to a slave network element for regenerating a timing signal in digital data communication using a master/slave loop timing mode. 
     BACKGROUND 
     The following acronyms will be used in the description of both the prior art and the invention: 
     PI: Proportional and Integrating controller 
     PID: Proportional, Integrating and Derivating controller 
     SDH: Synchronous Digital Hierarchy, a digital data transmission technology 
     Transmission of digital data between two different data network elements is performed so that a certain amount of bit data is sent to the transmission channel in the sending network element in consecutive cycles of the timing signal. The number of bits sent during the cycle, and the frequency of the timing signal determine the data transfer rate. For example, when 8 bits/cycle are transmitted at the frequency of 1 MHz of the timing signal, the data transfer rate is 8 Mbit/s. 
     Typically, in a digital data transmission network there are consecutive subareas in the propagation direction of the transmission, in which the nominal data transfer rates are different, or in which the nominal data transfer rates are the same but the phases of their timing signals shift in relation to each other. These subareas of the data transmission network are thus asynchronous in relation to each other. The fact that the phases of the timing signals can shift in relation to each other means that the instantaneous data transfer rates of different subareas can differ from each other, even if the average data transfer rates were equal. When moving across the border between two such subareas, it is necessary to perform speed adjustment, which takes into account the different data transfer rates. If the average data transfer rates differ from each other, speed adjustment is performed by increasing or decreasing the number of bits transmitted in a certain time window. Increasing is carried out by using additional bits, which can be mere stuffing bits, or they can, for example, represent the heading, control, separator and other such information of frame and/or packet structures related to the transmission protocol. Decreasing is carried out by removing said additional bits, which is done when moving from a faster subarea to a slower one. If the average data transfer rates are equal, speed adjustment can be carried out by buffering. 
       FIG. 1  shows an exemplary data communication network, which is used for describing the prior art. The data communication network shown in  FIG. 1  has three subareas A  101 , A  102  and A  103 . The nominal data transfer rates of subareas A  102  and A 103  are the same, but the system has no timing signal common to subareas A 101  and A 102 . In order to make the situation sensible, the temporal average of the data transfer rate of subarea A  102  must be at least equal to the temporal average of the data transfer rate of subarea A 101 . 
     In the situation being examined as an example, the operation is as follows:
         The digital data stream D 101  produced by the user K 101  of the data transmission service arrives at the network element VE 101  located at the border of subareas A 101  and A 102  as synchronized by the timing signal CLK 101 .   Speed adjustment SA 101  is performed in the network element VE 101 , resulting in a data stream D 102 .   A data stream D 102  is received in the network element VE 102  located at the border of subareas A 102  and A 103 , and speed adjustment SA 102  is performed on it, resulting in the original data stream D 101 .   A timing signal CLK 102  is generated in the network element VE 102  on the basis of the speed of arrival of the portion of the data stream D 102  being received, which represents the data stream D 101 . In other words, the timing signal CLK 102  is regenerated. The data stream D 101  is sent to another user K 102  of the data communication network as synchronized by the timing signal CLK 102 .   The digital data stream U 101  produced by the user K 102  arrives at the network element VE 102  as synchronized by the timing signal CLK 102 .   Speed adjustment SA  103  is performed in the network element VE 102 , resulting in a data stream U 102 .   The data stream U 102  is received in the network element VE 101 , speed adjustment SA 104  is performed on it, and the result is the original data stream U 101 . The data stream U 101  is sent to the user K 101  of the data communication network as synchronized by the timing signal CLK 101 .       

     The objective is thus to generate the timing signal CLK 102  in the network element VE 102  so that the momentary frequency of the timing signal is as close to the momentary frequency of the timing signal CLK 101  as possible. If the timing signal CLK 102  could be formed such that its momentary frequency were continuously the same as the momentary frequency of the timing signal CLK 101 , the users K 101  and K 102  of the data communication network would not be able to notice that there are subareas in the network in which the average and/or momentary data transfer rates differ from each other. With regard to the quality of the data transmission service, it is essential that the momentary frequency of the regenerated timing signal CLK 102  does not differ too much from the momentary frequency of the timing signal CLK 101 . For this reason, international standardization organizations, such as ITU (International Telecommunication Union), have set limits on frequency deviations of different frequencies. 
     In the mode of operation described above, the network element VE 101  functions as the master with regard to mutual synchronization of subareas A  101  and A  103  of the network, and the network element VE 102  functions as the slave. Duplex data transmission functions in a master/slave loop timing mode, in which the timing signal CLK 102  regenerated in the slave VE 102  is used in the slave for synchronizing the data transmission of both transmission directions. 
     The method by which the timing signal is generated for receiving the data stream D 102  in the network element VE 102  is not significant with regard to the present invention. Said timing signal can be generated e.g. by means of the data stream D 102  being received, using conventional synchronization methods, or a reference clock signal can be spread in the subarea A 102  of the network, like in SDH (Synchronous Digital Hierarchy) networks. The same applies to the reception of the data stream U 102  in the network element VE 101 . 
     The regeneration of the timing signal CLK 102  is made more difficult by the fact that the data transmission delay between the network elements VE 101  and VE 102  is a variable quantity. Packet-switched data networks, in particular, tend to cause a strong variation in the transmission delay, but the conventional time slot switched data transmission networks also cause variation in the delay. Another phenomenon, which makes it more difficult to regenerate the timing signal, is the loss of data being transferred at times as a result of congestion of the network or other interference. 
     A prior art method for generating a timing signal in a slave in the master-slave timing modes of the type described above is presented in  FIG. 2 . The speed adjustment block SA 102  includes means P 201 , by which the bits that are unnecessary and would actually be harmful in the resulting data stream D 101 , are removed from the arriving data stream D 102 . The removal of the bits is not required if the data streams D 101  and D 102  have the same average data transfer rate. The data stream D 101  is directed to the buffer memory BM 201 , from which the data stream is read out as synchronized by the timing signal CLK 102 . The state of fullness F 201  of the buffer memory BM 201  is measured/monitored. The state of fullness has been given the reference value Fref 201 . After this, the difference between the actual value and the reference value of the state of fullness is filtered by the low-pass filter LPF 201 . The momentary frequency of the timing signal CLK 102  is controlled on the basis of the output of the low-pass filtering. Low-pass filtering LPF 201  is used in order to prevent the frequency variation of the regenerated timing signal CLK 102  from exceeding the limits permitted. 
     The problems entailed by the prior art solution presented above can be studied from  FIG. 1 . This method is not able to determine whether the reduction in the fullness of the buffer memory is caused by the fact that the frequency of the regenerated timing signal CLK 102  is higher than the frequency of the timing signal CLK 101 , or that data transmission is momentarily prevented and/or the data transmission delay is momentarily higher than normal. Also, the system is not able to tell whether the frequency of the timing signal CLK 102  is too low or whether the transmission delay is momentarily lower than normal. For this reason, various disturbances in the network significantly increase the risk that incorrect adjustment is performed on the frequency of the timing signal CLK 102 . This naturally increases the risk that the momentary frequency of the timing signal CLK 102  differs considerably from the momentary frequency of the timing signal CLK 101 . 
     Another prior art method for regenerating the timing signal CLK 102  is based on time stamps. In this method, time stamp information, which indicates the amount of time measured by the timing signal CLK 101  between the transmission of consecutive time stamps, is added to the data stream D 102  in the network element VE 101 . In the network element VE 102 , the difference between the arrival times of the time stamps is measured by means of the timing signal CLK 102 . By comparing the time difference indicated by the timing signal CLK 101  and included in the time stamps with the time difference measured by the timing signal CLK 102 , a quantity indicating the frequency difference between those timing signals is obtained. The data communication network between the network elements VE 101  and VE 102  may cause a difference between the transmission delays of different time stamps. Therefore, an interference component with a zero average is generated in the quantity indicating the frequency difference, and low-pass filtering is applied in order to remove it. The momentary frequency of the timing signal CLK 102  is adjusted on the basis of the output of the low-pass filtering. The problem caused by the fact that data being transferred is lost at times can be eliminated by marking consecutive time stamps in such a way that a possible loss of a time stamp is noticed. In this way, incorrect frequency adjustment measures caused by the loss of data being transferred can be avoided. 
     Let us assume that the time between the moments of reception of consecutive time stamps measured as the number of cycles of the timing signal CLK 102  is higher than its reference value. This may be due to the fact that the frequency of the timing signal CLK 102  is higher than the frequency of the timing signal CLK 101  and the cycle length of the CLK 102  signal is thus too small, or the fact that the data transmission delay is increasing. The problem with the second prior art method presented is the fact that the phenomena caused by the variation of the transmission delay look the same as the phenomena caused by the frequency difference. This causes the risk that incorrect frequency adjustment is carried out. Correspondingly, the system is not able to tell whether the frequency of the timing signal CLK 102  is too low or whether the transmission delay is decreasing. 
     SUMMARY 
     It is an objective of the invention to provide a method and arrangement of a new type for regenerating a timing signal in digital data transmission, by means of which invention the drawbacks related to the prior art presented above can be eliminated or reduced. 
     The invention is based on the fact that in the master/slave loop timing mode described above, the timing situation is as follows:
     1) A data stream is received in the slave, its speed of arrival being dependent on the timing signal present in the master, and a timing signal is present in the slave, the frequency of which timing signal is wanted to be kept as close to the frequency of the timing signal in the master as possible.   2) A data stream is received in the master, its speed of arrival depending on the timing signal present in the slave.   

     In a general case, the data stream received at points 1) and 2) above can be part of such a data stream which also carries such payload and/or control, supervision, stuffing or other such information which is not significant with regard to the timing operation meant in this document. The fact mentioned at point 1) is used in the prior art methods for regenerating a timing signal. The facts mentioned both at point 1) and point 2) are utilized in the method and arrangement according to the invention for regenerating a timing signal. In the method according to the invention, by means of the data stream received in the master, a quantity is formed for the purpose of indicating whether the frequency of the timing signal present in the master is higher or lower than the frequency of the timing signal present in the slave. Said quantity indicating the frequency deviation can be formed in the master by the same method as the corresponding quantity indicating the frequency deviation is formed in the slave, on the basis of the state of fullness of the buffer memory, for example. The quantity indicating the frequency deviation and formed in the master is not used for adjusting the timing signal being present, because from the point of view of this invention, the timing signal is externally determined reference timing. Instead, the information contained by the quantity formed in the master and indicating the frequency deviation is sent to the slave. This information is utilized for adjusting the frequency of the timing signal present in the slave in such a way that the adjustment measures are controlled on the basis of both the quantity formed in the slave and indicating the frequency difference and the quantity formed in the master and indicating the frequency difference. 
     As a first aspect of the invention a method for regenerating a timing signal in digital data communication using a master/slave loop timing mode is provided. The method comprises:
         transmitting a digital data stream from a master network element functioning as a master to a slave network element functioning as a slave, speed of arrival of the data stream arriving at the slave network element depending on frequency of a reference timing signal present in the master network element,   transmitting a digital data stream having an opposite direction from said slave network element to said master network element, speed of arrival of the data stream arriving at the master network element depending on frequency of a regenerated timing signal present in the slave network element,   forming, on the basis of the speed of arrival of the data stream arriving at the master network element, a master end indicator a value or a change of the value of which in relation to time indicates a frequency difference between the reference timing signal and the regenerated timing signal,   forming, on the basis of the speed of arrival of the data stream arriving at the slave network element, a slave end indicator a value or a change of the value of which in relation to time indicates the frequency difference between the reference timing signal and the regenerated timing signal, and   adjusting the frequency of the regenerated timing signal on the basis of a combined effect of information contained by said master end indicator and information contained by said slave end indicator.       

     As a second aspect of the invention a method to be used in a master network element for participating in regeneration of a timing signal in digital data transmission operating in a master/slave loop timing mode is provided. The method comprises:
         transmitting a digital data stream to a slave network element functioning as a slave, transmission speed depending on frequency of a reference timing signal present in the master network element,   receiving a digital data stream transmitted from the slave network element, speed of arrival of the received data stream depending on frequency of a regenerated timing signal present in the slave network element,   forming, on the basis of the speed of arrival of the received data stream, a master end indicator a value or a change of the value of which in relation to time indicates a frequency difference between the reference timing signal and the regenerated timing signal, and
           transmitting the formed master end indicator to the slave network element.   
               

     As a third aspect of the invention a method to be used in a slave network element for regenerating a timing signal in digital data communication using a master/slave loop timing mode is provided. The method comprises:
         transmitting a digital data stream to a master network element functioning as a master, transmission speed depending on frequency of a regenerated timing signal present in the slave network element,   receiving a digital data stream transmitted from the master network element, speed of arrival of the received data stream depending on frequency of a reference timing signal present in the master network element,   receiving from the master network element a master end indicator a value or a change of the value of which in relation to time indicates a frequency difference between the reference timing signal and the regenerated timing signal, and   forming, on the basis of the speed of arrival of the received data stream, a slave end indicator a value or the change of the value of which in relation to time indicates the frequency difference between the reference timing signal and the regenerated timing signal, and   adjusting the frequency of the regenerated timing signal on the basis of a combined effect of information contained by the received master end indicator and information contained by the formed slave end indicator.       

     As a fourth aspect of the invention an arrangement for regenerating a timing signal in digital data communication using a master/slave loop timing mode is provided. The arrangement comprises:
         a master network element arranged to receive digital data transmitted from a slave network element operating as a slave and to transmit digital data to the slave network element,   a slave network element arranged to receive digital data transmitted from the master network element and to transmit digital data to the master network element,   in the master network element, means for sending a digital data stream to the slave network element in such a way that speed of arrival of the data stream arriving at the slave network element depends on frequency of a reference timing signal present in the master network element,   in the slave network element, means for sending a digital data stream to the master network element in such a way that speed of arrival of the data stream arriving at the master network element depends on frequency of a regenerated timing signal present in the slave network element,   means for forming a master end indicator on the basis of the speed of arrival of the data stream arriving at the master network element, a value or a change of the value of the master end indicator in relation to time indicating a frequency difference between the reference timing signal and the regenerated timing signal,   means for forming a slave end indicator on the basis of the speed of arrival of the data stream arriving at the slave network element, a value or a change of the value of the slave end indicator in relation to time indicating the frequency difference between the reference timing signal and the regenerated timing signal, and   means for adjusting the frequency of the regenerated timing signal on the basis of a combined effect of information contained by said master end indicator and information contained by said slave end indicator.       

     As a fifth aspect of the invention a master network element for contributing to regeneration of a timing signal in digital data transmission operating in a master/slave loop timing mode is provided. The master network element comprises:
         means for sending a digital data stream to a slave network element functioning as the slave, speed of transmission of the data stream to be transmitted depending on frequency of a reference timing signal present in the master network element,   means for receiving a digital data stream transmitted from the slave network element,   means for forming a master end indicator on the basis of speed of arrival of the received data stream, a value or a change of the value of the master end indicator in relation to time indicating a frequency difference between the reference timing signal and a regenerated timing signal present in the slave network element, and   means for sending said master end indicator to the slave network element.       

     As a sixth aspect of the invention a slave network element for regenerating a timing signal in digital data communication using a master/slave loop timing mode is provided. The slave network element comprises:
         means for sending a digital data stream to a master network element functioning as a master, speed of transmission of the data stream to be transmitted depending on frequency of a regenerated timing signal present in the slave network element,   means for receiving a digital data stream transmitted from the master network element,   means for receiving a master end indicator transmitted from the master network element, a value or a change of the value of the master end indicator in relation to time indicating a frequency difference between a reference timing signal present in the master network element and the regenerated timing signal present in the slave network element,   means for forming a slave end indicator on the basis of speed of arrival of the data stream arriving at the slave network element, a value or a change of the value of the slave end indicator in relation to time indicating the frequency difference between the reference timing signal and the regenerated timing signal, and   means for adjusting the frequency of the regenerated timing signal on the basis of a combined effect of information contained by the received master end indicator and information contained by the formed slave end indicator.       

     Some embodiments of the invention are presented in the dependent claims. 
     Compared to the prior art solutions, the invention provides the advantage that the probability of incorrect frequency adjustment measures caused by network interference and transmission delay is reduced. It is unlikely that network interference would cause a situation in which the quantities indicating a frequency difference and formed in both the master and the slave would both incorrectly indicate a need to decrease or increase the frequency of the regenerated timing signal. 
    
    
     
       BRIEF DESCRIPTION OF FIGURES 
       In the following, the invention and its other advantages will be described in more detail with reference to the accompanying figures, in which: 
         FIG. 1  illustrates the principle of an exemplary data transmission network, which is used to describe the prior art. 
         FIG. 2  is a block diagram of a prior art method for generating a timing signal on the basis of the arriving data stream. 
         FIG. 3  is a diagram illustrating the principle of the arrangement according to the invention for generating a timing signal. 
         FIGS. 4   a  and  4   b  show arrangements which can be used in the systems according to the invention for generating quantities indicating the frequency difference between the timing signal present in the master and the timing signal present in the slave. 
         FIG. 5  is a flow chart of the method according to an embodiment of the invention. 
         FIG. 6  is a flow chart of the method used in the network element operating as the master according to an embodiment of the invention. 
         FIG. 7  is a flow chart of the method used in the network element operating as the slave according to an embodiment of the invention. 
     
    
    
     DETAILED DESCRIPTION OF EMBODIMENTS 
       FIGS. 1 and 2  were already dealt with above in connection with the description of the prior art. 
       FIG. 3  shows the subareas A 301 , A 302  and A 303  of the data transmission network. At the border between the subareas A 301  and A 302  there is a master network element VE 301  functioning as the master with regard to timing, and at the border of the subareas A 302  and A 303  there is a slave network element VE 302  functioning as the slave with regard to timing. The master network element VE 301  is also connected to the system K 301 , which can be a terminal device utilizing a data transmission service, for example. Correspondingly, the slave network element VE 302  is connected to the system K 302 . The subarea A 302  is to be understood in a broad sense so that it can be the world-wide Internet, for example. 
     Data transmission in both directions between the master network element VE 301  and the system K 301  is synchronized by the timing signal CLK 301 , which is, from the point of view of this invention, the given reference timing signal, but the method by which it is generated does not fall within the scope of this invention. Data transmission between the slave network element VE 302  and the system K 302  is synchronized by a timing signal CLK 302 , which is adjusted with the purpose of keeping the frequency of the timing signal as close to the frequency of the timing signal CLK 301  as possible. 
     Speed adjustment SA 301 , in which the required number of bits is added to the data stream D 301 , is performed in data transmission from subarea A 301  to subarea A 302  of the data communication network. If bits have to be added, they may be bits related to the frame or packet structures or mere stuffing bits. The result of speed adjustment SA 301  is the data stream D 302 . A speed adjustment SA 302 , in which the bits added in the speed adjustment SA 301  are removed from the data stream D 302  and the original data stream D 301  is obtained as the result, is performed in data transmission from subarea A 302  to subarea A 303  of the data transmission network. Corresponding speed adjustments SA 303  and SA 304  are performed on the data streams U 301  and U 302  when moving from subarea A 303  to subarea A 302  and further to subarea A 301 . 
     A part of the data stream U 302  arriving at the master network element VE 301  represents the data stream U 301 . On the basis of the speed of arrival of the portion representing the data stream U 301 , a master end indicator V 301  is formed in the master network element, and the value or the change of the value in relation to time of the master end indicator tends to indicate whether the frequency of the regenerated timing signal CLK 302  is lower or higher than the frequency of the reference timing signal CLK 301 . The truthfulness of this indication depends on the strength of various disturbing factors, such as the variation of the transmission delay. The information contained by the master end indicator V 301  is transmitted at suitable intervals either with the data stream D 302  or using some other data transmission channel to the slave network element VE 302 . Said data transmission may also be included in the portion of data stream D 302  representing data stream D 301 . 
     A part of data stream D 302  arriving at the slave network element VE 302  represents data stream D 301 . On the basis of the speed of arrival of the portion representing data stream D 301 , a slave end indicator V 302  is formed in the master network element, and the value or the change of the value in relation to time of the slave end indicator tends to indicate whether the frequency of the regenerated timing signal CLK 302  is lower or higher than the frequency of the reference timing signal CLK 301 . 
     The regenerated timing signal CLK 302  is generated by a controllable timing signal generator CG 301 , which can be a VCO (voltage controlled oscillator) or NCO (numerically controlled oscillator), for example. The frequency of the timing signal CLK 302  being generated is controlled by a controller value V 303 , which is formed from the master and slave end indicators V 301  and V 302  by a logical-mathematical signal processing operation L 301 . In addition, the controller value V 303  can be used as the input signal to a controller R 301  of the PI, PID or some other type, the output of which influences the timing signal generator CG 301 . 
     In an embodiment of the invention, the master end indicator V 301  is formed by the procedure described in  FIG. 4   a  on the basis of the fullness of the buffer memory, and the slave end indicator V 302  is formed similarly by the procedure described in  FIG. 4   b . The procedures presented in  FIGS. 4   a  and  4   b  result in that the values of the master and slave end indicators V 301  and V 302  tend to indicate the frequency difference between the regenerated timing signal CLK 302  and the reference timing signal CLK 301 . 
     In  FIG. 4   a , bits that are unnecessary and that would be actually harmful in the resulting data stream U 301 , are removed from the arriving data stream U 302 , block P 401 . The removal of the bits is not required if the data streams U 301  and U 302  have the same average data transfer rate. The data stream U 301  is directed to the buffer memory BM 401 , from which the data stream is read out as synchronized by the reference timing signal CLK 301 . The fullness F 401  of the buffer memory BM 401  is measured/monitored. The fullness has been given the reference value Fref 401 . After this, the difference between the actual value and the reference value of the fullness is filtered by the low-pass filter LPF 401 . The master end indicator V 301  is the output of the low-pass filter. The operation of the arrangement shown in  FIG. 4   b  is similar. As the logical-mathematical signal processing means L 301  it is possible to use a simple arithmetic element, for example, so that the control value V 303  is the sum of the master and slave end indicators multiplied by suitable constants: C 1 *V 301 +C 2 *V 302 . Furthermore, in the logical-mathematical signal processing L 301  it is possible to implement an arrangement in which the frequency control of the regenerated timing signal CLK 302  is prevented, if the master and slave end indicators V 301  and V 302  do not agree on the direction of the frequency control required. 
     In another embodiment of the invention, the master end indicator V 301  is the fullness F 401  of the buffer memory BM 401  located in the master network device, and the slave end indicator V 302  is formed according to  FIG. 4   b  like in the embodiment of the invention presented above. In this embodiment of the invention, the change of the value of the master end indicator V 301  in relation to time tends to indicate the frequency difference between the regenerated timing signal CLK 302  and the reference timing signal CLK 301 . As the logical-mathematical signal processing means L 301 , it is possible to use e.g. an arrangement in which the reference value Fref 401  of the fullness of the buffer memory BM 401  is subtracted from the master end indicator V 301 , and the obtained difference is filtered by the low-pass filter. The adjusting value V 303  can be formed in such a way, for example, that the result of the low-pass filtering is multiplied by a suitable constant and added to the slave en indicator V 302 , which has been multiplied by a suitable constant. 
     For illustrating the operation, let us consider an exemplary situation in which the frequency of the regenerated timing signal CLK 302  is lower than the frequency of the reference timing signal CLK 301 , and data transmission functions in both directions without interference. Then the fullness of the buffer memory of the slave network element NE 302  increases and the fullness of the buffer memory of the master network element NE 301  decreases. In other words, the directions of the change of the fullness of both buffer memories indicate that the frequency of the regenerated timing signal CLK 302  is lower than the frequency of the reference timing signal CLK 301 . Then it is advantageous to increase the frequency of the regenerated timing signal CLK 302 . 
     Let us next consider a situation in which the frequency of the regenerated timing signal CLK 302  is the same as the frequency of the reference timing signal CLK 301 , but data transmission from the master network element VE 301  to the slave network element VE 302  is prevented. Let us also assume that data transmission in the other direction operates normally. Then the fullness of the buffer memory of the slave network element NE 302  decreases, but the fullness of the buffer memory of the master network element does not show a clear tendency to increase or decrease. In that case, the perceptions of frequency differences made in different network elements do not support each other, and thus it is advantageous to prevent the frequency adjustment of the timing signal CLK 302 , or at least it is advantageous to reduce the extent of the adjustment. 
     An embodiment of the invention is an arrangement in which the master end indicator V 301  and/or the slave end indicator V 302  is formed by the time stamp principle, which has been described in this document in connection with the prior art. The kind of close examination used to illustrate the operation above can also be applied to this embodiment. 
     The method according to the invention forms a closed control loop. The operation is presented as a flow chart in  FIG. 5 . In step V 501 , a data stream is sent from the master network element to the slave network element as synchronized by the reference timing signal, and a data stream is sent from the slave network element to the master network element as synchronized by the regenerated timing signal. In step V 502 , a master end indicator is formed by means of the data stream arriving at the master network element, and correspondingly a slave end indicator is formed by means of the data stream arriving at the slave network element. In step V 503 , the frequency of the regenerated timing signal is adjusted on the basis of the combined effect of the information contained by the master end indicator and the information contained by the slave end indicator. 
     A method according to the invention, used in the master network element, which assists in the frequency adjustment of the regenerated timing signal, is presented as a flow chart in  FIG. 6 . In steps V 601 , V 602  and V 603 , data streams are transmitted and received with the slave network element, a master end indicator is formed by means of the received data stream, and the formed master end indicator is sent to the slave network element. 
     A method according to the invention used in a slave network element for adjusting the frequency of the regenerated timing signal is presented as a flow chart in  FIG. 7 . In steps V 701 , V 702 , V 703  and V 704 , data streams are transmitted and received with the master network element, a master end indicator sent from the master network element is received, a slave end indicator is formed by means of the received data stream, and the frequency of the regenerated timing signal is adjusted on the basis of the combined effect of the master end indicator and the slave end indicator. 
     The invention provides a remarkable advantage especially if the subarea A 302  is a packet-switched network, which causes significant variation in the transmission delay and/or loss of the packets being transmitted. The invention also helps to reduce the risk of incorrect frequency adjustment measures of the regenerated timing signal also in such a situation typical of packet-switched networks in which packets going in different directions are routed to use different paths. 
     The invention is not limited merely to the above example of application, but many modifications thereof are possible within the scope of the inventive idea defined by the independent claims. The embodiments presented in the independent claims are freely combinable with the features presented in any other claim, if not otherwise stated.