Abstract:
A scheme for enhancement of the power-supply ripple rejection for operational amplifiers (op-amps) and low-dropout (LDO) voltage regulators is described. The scheme adds calculated amounts of current derived from the power-supply ripple with the input differential pair current to cancel off the output ripple, improving the high-frequency power-supply ripple rejection without requiring a substantial redesign of the circuitry involved.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a scheme for enhancement of power supply ripple rejection, and in particular, to a circuit for enhancing the power supply ripple rejection for operational amplifiers (op-amps) and low-dropout (LDO) voltage regulators. 
     2. Description of the Prior Art 
     Power Supply Rejection Ratio (PSRR), a measure of power-supply ripple rejection, is an important parameter for op-amps and op-amp based LDOs. With many types of circuits running off the same power supply line V DD , the DC voltage at V DD  becomes corrupted with ripple voltage. The ripple voltage usually has a complex waveform having a frequency content from DC to several hundred kilohertz. For op-amp circuits to function properly, the op-amps concerned must be able to reject this unwanted ripple at the outputs up to as high frequency as possible. Alternatively, if an LDO regulator is used to clean-up this ripple, it must also be able to provide the same type of rejection. Ability to provide good rejection to power-supply ripple is indicated by a high PSRR figure (80 dB to 100 dB) for the circuit. 
     As it turns out, it is more convenient to work with the inverse of PSRR instead and this inverse will be referred to as the Power Supply Gain Ratio (PSGR). Thus, PSGR in dB=negative of PSRR in dB. Usually, the PSGR for an op-amp or LDO is good (typically −80 dB) at low frequencies: from DC to a few kilohertz. After that, the PSGR degrades with frequency at a rate of 20 dB/decade. Thus, the high frequency PSGR figures are poor. Please refer to  FIG. 1 .  FIG. 1  is a frequency response diagram  10  showing PSGR figures for op-amps and LDOs with and without enhancement. The poor high frequency PSGR figures of the related art are shown by the solid line curve  12  in  FIG. 1 . Thus, the objective is to use enhancement in order to have better PSGR figures at higher frequencies as shown by the dashed line curve  14  in  FIG. 1 . 
     The most appropriate related art is authored by Mohamed El-Nozahi, Ahmed Amer, Joselyn Torres, Kamran Entesari and Edgar Sanchez-Sinencio, entitled “A 25 mA 0.13 μm CMOS LDO Regulator with Power-Supply Rejection Better Than −56 dB up to 10 MHz Using a Feedforward Ripple-Cancellation Technique,” and published in the ISSCC Digest of Technical Papers, pp. 330-331, on February 2009. 
     Please refer to  FIG. 2 .  FIG. 2  shows a block-level representation of an LDO regulator  20  employing a feedforward cancellation technique according to the related art. The LDO regulator  20  utilizes a feedforward amplifier  22  together with a summing amplifier  24  for producing a cancellation path leading into the gate of a pass transistor M P . The output of error amplifier  26  is also input into the summing amplifier  24 . Therefore, the technique described in the paper modifies the gate voltage of the pass transistor M P  with power-supply ripple to achieve ripple cancellation at output V OUT  for high frequencies. This related art circuit thus needs the LDO regulator  20  to be modified to include the summing amplifier  24  in order to perform addition of the error amplifier  26  output voltage with the power-supply ripple voltage to drive the gate of the pass transistor M P . However, considerable effort is required to redesign the circuit in order to employ the summing amplifier  24 , which limits the appeal of the related art LDO regulator  20 . In addition, the circuit redesign may be different for different circuits, requiring a custom redesign to be performed in many cases. 
     SUMMARY OF THE INVENTION 
     According to one embodiment, an electronic circuit with enhanced power supply rejection includes a cancellation circuit having an input terminal receiving a reference signal and an output terminal generating a cancellation current. The electronic circuit also includes a regulator circuit having a differential pair of transistors outputting a differential current and a load coupled to the differential pair of transistors. The load has an input for receiving both the cancellation current and the differential current and an output outputting the sum of the cancellation current and the differential current. A pass transistor has an input terminal coupled to the output of the load and also includes an output terminal for generating an output current based on the sum of the cancellation current and the differential current. 
     According to another embodiment, an electronic circuit with enhanced power supply rejection includes a cancellation circuit having an input terminal receiving a reference signal and an output terminal generating a cancellation current comprising a first cancellation current and a second cancellation current. The electronic circuit also includes a regulator circuit having a load and a differential pair of transistors outputting a differential current comprising a first differential current and a second differential current. The load is coupled to the differential pair of transistors and has a first input for receiving the sum of the first cancellation current and the first differential current, a second input for receiving the sum of the second cancellation current and the second differential current, and a single output outputting the sum of currents received through the first and second inputs of the load, and the load adds the currents received through the first and second inputs of the load before outputting the sum of currents as a load output current. A pass transistor has an input terminal coupled to the output of the load and an output terminal for generating an output current based on the load output current. 
     These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a frequency response diagram showing PSGR figures for op-amps and LDOs with and without enhancement. 
         FIG. 2  shows a block-level representation of an LDO regulator employing a feedforward cancellation technique according to the related art. 
         FIG. 3  shows a block-level implementation of a circuit for achieving PSRR Enhancement for op-amps and LDOs according to a first embodiment. 
         FIG. 4  shows a transistor-level implementation for the circuit shown in  FIG. 3 . 
         FIG. 5  shows the block-level implementation of a circuit for achieving PSRR Enhancement for op-amps and LDOs according to a second embodiment. 
         FIG. 6  shows the transistor-level implementation for the circuit shown in  FIG. 5 . 
         FIG. 7  is a frequency response diagram showing PSGR figures calculated in simulation results for the circuit in  FIG. 4  using Miller compensation as compared with related art simulation results. 
         FIG. 8  is a frequency response diagram showing PSGR figures calculated in simulation results for the circuit in  FIG. 4  using Ahuja compensation as compared with related art simulation results. 
         FIG. 9  shows a block diagram illustrating how to determine C X  so that the ripple cancellation is process, temperature and load current independent. 
         FIG. 10  is a circuit showing one implementation of the block diagram shown in  FIG. 9  for achieving PSRR Enhancement for op-amps and LDOs according to a third embodiment which provides accurate ripple cancellation without the need of continuous calibration for Miller compensation. 
     
    
    
     DETAILED DESCRIPTION 
     The circuitry described below achieves the same results of the related art disclosed in  FIG. 2  above by adding a current derived from the power-supply ripple (using a capacitor) with the error amplifier differential pair output current. Since current addition requires no extra circuitry, essentially no modification of the op-amp or LDO is needed and the overall circuit is simpler. In other words, this invention can be applied to any op-amp or LDO design. 
     The principle underlying the proposed technique begins with a definition of the terms involved. 
     The PSGR of an op-amp or LDO is defined as: 
     
       
         
           
             
               
                 
                   
                     PSGR 
                     ⁡ 
                     
                       ( 
                       s 
                       ) 
                     
                   
                   = 
                   
                     
                       P 
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                     
                       A 
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   1 
                   ) 
                 
               
             
           
         
       
     
     Where, P(s) is the power supply gain which again defined as: 
     
       
         
           
             
               
                 
                   
                     P 
                     ⁡ 
                     
                       ( 
                       s 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         V 
                         O 
                       
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                     
                       
                         V 
                         P 
                       
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   2 
                   ) 
                 
               
             
           
         
       
     
     Where, V O (s) is the ripple voltage appearing at the output of the circuit when ripple voltage V P (s) is fed to the power supply terminal V DD . The circuit is kept under open-loop condition without input signal. 
     Again, A(s) in (1) is the signal gain which defined as usual as: 
     
       
         
           
             
               
                 
                   
                     A 
                     ⁡ 
                     
                       ( 
                       s 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         V 
                         O 
                       
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                     
                       
                         V 
                         I 
                       
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   3 
                   ) 
                 
               
             
           
         
       
     
     Where, V O (s) is the signal voltage appearing at the output of the circuit when signal voltage V I (s) is applied at the inputs. The circuit again is kept under open-loop condition without ripple at V DD . 
     In (1) to (3) above, ‘s’ is the Laplace Transform frequency variable indicating that all the quantities are functions of frequency. 
     We will now take help of small signal analysis assuming the op-amp or LDO is a two-stage design. The small signal parameters are: g m1 =first-stage transconductance, g m2 =second-stage transconductance, g m3 =transconductance of compensating transistor in Ahuja compensation, C 1 =parasitic capacitance loading first stage, C 2 =total capacitance loading second stage, r 1 =output resistance of first stage, r 2 =output resistance of second stage or the net load resistance, C C =compensation capacitance, R C =compensation resistance in Miller compensation. 
     Case 1: Miller Compensation: 
     We can find by small-signal analysis and setting R C =1/g m2 : 
     
       
         
           
             
               
                 
                   
                     
                       P 
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                     = 
                     
                       
                         
                           
                             s 
                             2 
                           
                           ⁢ 
                           
                             C 
                             1 
                           
                           ⁢ 
                           
                             C 
                             2 
                           
                           ⁢ 
                           
                             r 
                             1 
                           
                           ⁢ 
                           
                             r 
                             2 
                           
                         
                         + 
                         
                           
                             sC 
                             C 
                           
                           ⁢ 
                           
                             g 
                             
                               m 
                               ⁢ 
                               
                                   
                               
                               ⁢ 
                               2 
                             
                           
                           ⁢ 
                           
                             r 
                             1 
                           
                           ⁢ 
                           
                             r 
                             2 
                           
                         
                         + 
                         1 
                       
                       
                         D 
                         ⁡ 
                         
                           ( 
                           s 
                           ) 
                         
                       
                     
                   
                   ⁢ 
                   
                     
 
                   
                   ⁢ 
                   and 
                 
               
               
                 
                   ( 
                   4 
                   ) 
                 
               
             
             
               
                 
                   
                     A 
                     ⁡ 
                     
                       ( 
                       s 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           1 
                         
                       
                       ⁢ 
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           2 
                         
                       
                       ⁢ 
                       
                         r 
                         1 
                       
                       ⁢ 
                       
                         r 
                         2 
                       
                     
                     
                       D 
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   5 
                   ) 
                 
               
             
           
         
       
     
     where D(s) is a degree 3 polynomial in ‘s’ with the coefficients determined by C 1 , C 2 , C C , R 1 , R 2 , R C  and g m2  but not g m1 . 
     The PSGR is now given according to (1) (4) and (5) by: 
     
       
         
           
             
               
                 
                   
                     PSGR 
                     ⁡ 
                     
                       ( 
                       s 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         
                           s 
                           2 
                         
                         ⁢ 
                         
                           C 
                           1 
                         
                         ⁢ 
                         
                           C 
                           2 
                         
                         ⁢ 
                         
                           r 
                           1 
                         
                         ⁢ 
                         
                           r 
                           2 
                         
                       
                       + 
                       
                         
                           sC 
                           C 
                         
                         ⁢ 
                         
                           g 
                           m 
                         
                         ⁢ 
                         
                           r 
                           1 
                         
                         ⁢ 
                         
                           r 
                           2 
                         
                       
                       + 
                       1 
                     
                     
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           1 
                         
                       
                       ⁢ 
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           2 
                         
                       
                       ⁢ 
                       
                         r 
                         1 
                       
                       ⁢ 
                       
                         r 
                         2 
                       
                     
                   
                 
               
               
                 
                   ( 
                   6 
                   ) 
                 
               
             
           
         
       
     
     It can be seen from (6), neglecting the degree 2 term in ‘s’, that the PSGR has a zero at f a =1/2πC C g m2 r 1 r 2  which happens to be the same as the dominant pole for the compensated frequency response and, therefore, is at a very low frequency. To improve the PRGR response, this zero needs to be shifted to a frequency as high as possible. 
     Now if a ripple cancellation current is obtained by dropping the ripple voltage V P (s) across a capacitor C X  and is added with the input differential pair (transconductance g m1 ) current, then (5) can be used to find the contribution of this cancellation current at the output of the circuit by replacing g m1  by sC X , the transconductance of C X . The cancellation current is added in such a manner that it opposes the power-supply ripple normally appearing at the output and thus (4) modifies to: 
     
       
         
           
             
               
                 
                   
                     
                       
                         
                           P 
                           ⁢ 
                           
                             ( 
                             s 
                             ) 
                           
                         
                         = 
                           
                         ⁢ 
                         
                           
                             
                               
                                 
                                   s 
                                   2 
                                 
                                 ⁢ 
                                 
                                   C 
                                   1 
                                 
                                 ⁢ 
                                 
                                   C 
                                   2 
                                 
                                 ⁢ 
                                 
                                   r 
                                   1 
                                 
                                 ⁢ 
                                 
                                   r 
                                   2 
                                 
                               
                               + 
                               
                                 
                                   sC 
                                   C 
                                 
                                 ⁢ 
                                 
                                   g 
                                   
                                     m 
                                     ⁢ 
                                     
                                         
                                     
                                     ⁢ 
                                     2 
                                   
                                 
                                 ⁢ 
                                 
                                   r 
                                   1 
                                 
                                 ⁢ 
                                 
                                   r 
                                   2 
                                 
                               
                               + 
                               1 
                             
                             
                               D 
                               ⁡ 
                               
                                 ( 
                                 s 
                                 ) 
                               
                             
                           
                           - 
                           
                             
                               
                                 sC 
                                 X 
                               
                               ⁢ 
                               
                                 g 
                                 
                                   m 
                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   2 
                                 
                               
                               ⁢ 
                               
                                 r 
                                 1 
                               
                               ⁢ 
                               
                                 r 
                                 2 
                               
                             
                             
                               D 
                               ⁡ 
                               
                                 ( 
                                 s 
                                 ) 
                               
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                         ⁢ 
                         
                           
                             
                               
                                 s 
                                 2 
                               
                               ⁢ 
                               
                                 C 
                                 1 
                               
                               ⁢ 
                               
                                 C 
                                 2 
                               
                               ⁢ 
                               
                                 r 
                                 1 
                               
                               ⁢ 
                               
                                 r 
                                 2 
                               
                             
                             + 
                             
                               
                                 s 
                                 ⁡ 
                                 
                                   ( 
                                   
                                     
                                       C 
                                       C 
                                     
                                     - 
                                     
                                       C 
                                       X 
                                     
                                   
                                   ) 
                                 
                               
                               ⁢ 
                               
                                 g 
                                 
                                   m 
                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   2 
                                 
                               
                               ⁢ 
                               
                                 r 
                                 1 
                               
                               ⁢ 
                               
                                 r 
                                 2 
                               
                             
                             + 
                             1 
                           
                           
                             D 
                             ⁡ 
                             
                               ( 
                               s 
                               ) 
                             
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   
                     4 
                     ⁢ 
                     a 
                   
                   ) 
                 
               
             
           
         
       
     
     Using (4a), (5) and (1), and choosing C X =C C , the PSGR now is given by: 
     
       
         
           
             
               
                 
                   
                     PSGR 
                     ⁡ 
                     
                       ( 
                       s 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         
                           s 
                           2 
                         
                         ⁢ 
                         
                           C 
                           1 
                         
                         ⁢ 
                         
                           C 
                           2 
                         
                         ⁢ 
                         
                           r 
                           1 
                         
                         ⁢ 
                         
                           r 
                           2 
                         
                       
                       + 
                       1 
                     
                     
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           1 
                         
                       
                       ⁢ 
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           2 
                         
                       
                       ⁢ 
                       
                         r 
                         1 
                       
                       ⁢ 
                       
                         r 
                         2 
                       
                     
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
           
         
       
     
     Comparing (7) with (6), it is seen that we have been able to totally eliminate that low-frequency zero f a  by shifting it to infinity. This improves the high-frequency PSGR. However the degree 2 term in ‘s’ remains, forming transmission zero, and this will result in the PSGR dipping before rising at a frequency f b =1/2π√{square root over (C 1 C 2 r 1 r 2 )} as shown by the dashed curve in  FIG. 1 . Normally, f b  is a high enough frequency—several decades higher than f a . The rise in PSGR beyond f b  is due to terms with higher degree in ‘s’ in the numerator of (7) resulting from parasitic capacitances which this theory fails to account for. 
     Case 2: Ahuja Compensation: 
     As before, it can be found through small-signal analysis: 
     
       
         
           
             
               
                 
                   
                     
                       P 
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                     = 
                     
                       
                         
                           ( 
                           
                             
                               s 
                               ⁢ 
                               
                                   
                               
                               ⁢ 
                               
                                 
                                   C 
                                   C 
                                 
                                 
                                   g 
                                   
                                     m 
                                     ⁢ 
                                     
                                         
                                     
                                     ⁢ 
                                     3 
                                   
                                 
                               
                             
                             + 
                             1 
                           
                           ) 
                         
                         ⁢ 
                         
                           ( 
                           
                             
                               
                                 sC 
                                 1 
                               
                               ⁢ 
                               
                                 r 
                                 1 
                               
                             
                             + 
                             1 
                           
                           ) 
                         
                       
                       
                         D 
                         ⁡ 
                         
                           ( 
                           s 
                           ) 
                         
                       
                     
                   
                   ⁢ 
                   
                     
 
                   
                   ⁢ 
                   and 
                 
               
               
                 
                   ( 
                   8 
                   ) 
                 
               
             
             
               
                 
                   
                     
                       A 
                       ⁡ 
                       
                         ( 
                         s 
                         ) 
                       
                     
                     = 
                     
                       
                         
                           g 
                           
                             m 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             1 
                           
                         
                         ⁢ 
                         
                           g 
                           
                             m 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                         
                         ⁢ 
                         
                           r 
                           1 
                         
                         ⁢ 
                         
                           
                             r 
                             2 
                           
                           ⁡ 
                           
                             ( 
                             
                               
                                 s 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 
                                   
                                     C 
                                     c 
                                   
                                   
                                     g 
                                     
                                       m 
                                       ⁢ 
                                       
                                           
                                       
                                       ⁢ 
                                       3 
                                     
                                   
                                 
                               
                               + 
                               1 
                             
                             ) 
                           
                         
                       
                       
                         D 
                         ⁡ 
                         
                           ( 
                           s 
                           ) 
                         
                       
                     
                   
                   ⁢ 
                   
                     
 
                   
                   ⁢ 
                   and 
                 
               
               
                 
                   ( 
                   9 
                   ) 
                 
               
             
             
               
                 
                   
                     PSGR 
                     ⁡ 
                     
                       ( 
                       s 
                       ) 
                     
                   
                   = 
                   
                     
                       ( 
                       
                         
                           
                             sC 
                             1 
                           
                           ⁢ 
                           
                             r 
                             1 
                           
                         
                         + 
                         1 
                       
                       ) 
                     
                     
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           1 
                         
                       
                       ⁢ 
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           2 
                         
                       
                       ⁢ 
                       
                         r 
                         1 
                       
                       ⁢ 
                       
                         r 
                         2 
                       
                     
                   
                 
               
               
                 
                   ( 
                   10 
                   ) 
                 
               
             
           
         
       
     
     In this case the zero of PSGR at f a =1/2πC 1 r 1  is higher than the dominant pole frequency but is not sufficiently high. Here too, D(s) is independent of g m1 . Therefore (8) can be modified as before by using a cancellation current generated by dropping the ripple voltage across a capacitor C X  to: 
     
       
         
           
             
               
                 
                   
                     
                       
                         
                           P 
                           ⁡ 
                           
                             ( 
                             s 
                             ) 
                           
                         
                         = 
                           
                         ⁢ 
                         
                           
                             
                               
                                 ( 
                                 
                                   
                                     s 
                                     ⁢ 
                                     
                                         
                                     
                                     ⁢ 
                                     
                                       
                                         C 
                                         C 
                                       
                                       
                                         g 
                                         
                                           m 
                                           ⁢ 
                                           
                                               
                                           
                                           ⁢ 
                                           3 
                                         
                                       
                                     
                                   
                                   + 
                                   1 
                                 
                                 ) 
                               
                               ⁢ 
                               
                                 ( 
                                 
                                   
                                     
                                       sC 
                                       1 
                                     
                                     ⁢ 
                                     
                                       r 
                                       1 
                                     
                                   
                                   + 
                                   1 
                                 
                                 ) 
                               
                             
                             
                               D 
                               ⁡ 
                               
                                 ( 
                                 s 
                                 ) 
                               
                             
                           
                           - 
                           
                             
                               
                                 sC 
                                 X 
                               
                               ⁢ 
                               
                                 g 
                                 
                                   m 
                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   2 
                                 
                               
                               ⁢ 
                               
                                 r 
                                 1 
                               
                               ⁢ 
                               
                                 
                                   r 
                                   2 
                                 
                                 ⁡ 
                                 
                                   ( 
                                   
                                     
                                       s 
                                       ⁢ 
                                       
                                           
                                       
                                       ⁢ 
                                       
                                         
                                           C 
                                           C 
                                         
                                         
                                           g 
                                           
                                             m 
                                             ⁢ 
                                             
                                                 
                                             
                                             ⁢ 
                                             3 
                                           
                                         
                                       
                                     
                                     + 
                                     1 
                                   
                                   ) 
                                 
                               
                             
                             
                               D 
                               ⁡ 
                               
                                 ( 
                                 s 
                                 ) 
                               
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                         ⁢ 
                         
                           
                             
                               [ 
                               
                                 
                                   
                                     s 
                                     ⁡ 
                                     
                                       ( 
                                       
                                         
                                           C 
                                           1 
                                         
                                         - 
                                         
                                           
                                             g 
                                             
                                               m 
                                               ⁢ 
                                               
                                                   
                                               
                                               ⁢ 
                                               2 
                                             
                                           
                                           ⁢ 
                                           
                                             r 
                                             2 
                                           
                                           ⁢ 
                                           
                                             C 
                                             X 
                                           
                                         
                                       
                                       ) 
                                     
                                   
                                   ⁢ 
                                   
                                     r 
                                     1 
                                   
                                 
                                 + 
                                 1 
                               
                               ] 
                             
                             ⁢ 
                             
                               ( 
                               
                                 
                                   s 
                                   ⁢ 
                                   
                                       
                                   
                                   ⁢ 
                                   
                                     
                                       C 
                                       C 
                                     
                                     
                                       g 
                                       
                                         m 
                                         ⁢ 
                                         
                                             
                                         
                                         ⁢ 
                                         3 
                                       
                                     
                                   
                                 
                                 + 
                                 1 
                               
                               ) 
                             
                           
                           
                             D 
                             ⁡ 
                             
                               ( 
                               s 
                               ) 
                             
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   
                     8 
                     ⁢ 
                     a 
                   
                   ) 
                 
               
             
           
         
       
     
     Choosing C 1 =g m2 r 2 C X , we can arrive at the new PSGR expression using (8a), (9) and (1): 
     
       
         
           
             
               
                 
                   
                     PSGR 
                     ⁡ 
                     
                       ( 
                       s 
                       ) 
                     
                   
                   = 
                   
                     1 
                     
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           1 
                         
                       
                       ⁢ 
                       
                         g 
                         
                           m 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           2 
                         
                       
                       ⁢ 
                       
                         r 
                         1 
                       
                       ⁢ 
                       
                         r 
                         2 
                       
                     
                   
                 
               
               
                 
                   ( 
                   11 
                   ) 
                 
               
             
           
         
       
     
     As can be seen in (11) the zero f a  for the PSGR has been totally eliminated. However, f b  as in  FIG. 1  (dashed curve) in this case will be given by any degree 2 term in ‘s’ due to parasitic capacitances missed out by the theory, and not represented in any of the above equations. 
     It can be noted that g m2 r 2  is the DC gain of the second stage. We need to have C X =C 1 /g m2 r 2  for ripple cancellation. Thus, it will be more convenient to use Ahuja compensation where the DC gain of the second stage is fixed. However, Miller compensation needs C X =C C  and there is no such restriction. However, f b  most likely will be higher for Ahuja compensation compared to Miller. 
     Please refer to  FIG. 3  and  FIG. 4 .  FIG. 3  shows a block-level implementation of a circuit  50  for achieving PSRR Enhancement for op-amps and LDOs according to a first embodiment, and  FIG. 4  shows the transistor-level implementation for the same. In  FIG. 3 , a differential pair  62 , a load  64 , an output driving pass transistor MPD, and a current source I L  constitute a 2-stage op-amp  60 . V SUP  for the tail current source I 0  is V DD  for P-type differential pair transistors and GND for N-type. In  FIG. 4 , this op-amp  60  is shown configured as a LDO regulator. The differential pair  62  is formed by MP 1 , MP 2  and the load  64  is formed by MP 4  to MP 7  and MN 11  to MN 14 . If Miller compensation is desired, node X is connected to node Z and if Ahuja compensation is desired, node X is connected to node Y with a resistance of R C =0. V REF  is a reference voltage for the regulator which is compared with a fraction of the regulated voltage OUT generated by R A  and R B . I L  is the load current. 
       FIG. 3  also shows a cancellation circuit  52  having a differential current amplifier  54  with gain control for producing cancellation current. The differential current amplifier  54  is a current input/current output inverting amplifier with its gain k variable (0&lt;k&lt;1) by a digital control word. In other embodiments, the differential current amplifier  54  having gain control could instead be replaced with a differential current amplifier having a fixed gain. Capacitors C A  and C B  are connected to the two inputs of this differential current amplifier  54 . The other ends of C A  and C B  are returned to power-supply terminal V DD . In other embodiments, capacitors with variable capacitances may be substituted for capacitors C A  or C B . Thus, it may be possible to substitute capacitors with fixed or variable capacitance and/or current amplifiers with fixed or adjustable gain, as one skilled in the art will readily appreciate. 
     Regulated cascode stages MN 5 , MN 7 , MN 9 , MP 8  and MN 6 , MN 8 , MN 10 , MP 9  form the input circuitry for the differential current amplifier  54 , as shown in  FIG. 4 . They offer a very low input impedance to C A  and C B  and, therefore, the ripple voltage v rip  on V DD  is converted to currents i c1 =sC A v rip  and i c2 =sC B v rip  by the transconductances of the capacitors. These currents are scaled by a factor k using a pair of identical Current Segmenting digital-to-analog converters (DAC)  56  shown in  FIG. 4 . This is equivalent to scaling the capacitors C A  and C B  by a factor k. The value of k is determined by the control word input to the differential current amplifier  54 . The output currents −ki c1  and −ki c2  are then added to signal currents +/−i s  from the differential pair  62  at the load  64 . The two pairs of currents are applied at different nodes of the load  64 , but eventually they add up at the single-ended output of the load  64 . 
       FIG. 3  shows with what polarity the currents −ki c1  and −ki c2  are to be applied to the load  64 . The +/− signs on the load  64  indicate that with increasing current in the ‘+’ node the output of the load  64 , connected to the gate of MPD, goes high. The effect will be the same with decreasing current in the “−” node. Therefore, it is easy to see that as the ripple voltage v rip  makes V DD  as well as the source of MPD go high, the currents i c1 , i c2  increase whereas, −ki c1  and −ki c2  reduce. Consequently, if ki c1 &gt;ki c2  or, in other words, C A &gt;C B , the gate of MPD also goes high. Furthermore, according to the theory above, if we have
 
 k ( C   A   −C   B )= C   X ,  (12)
         where C X =C C  for Miller compensation (13)   and C X =C 1 /g m2 r 2  for Ahuja compensation (14)
 
the change in V GS  for MPD with v rip  will be zero and the desired ripple cancellation will be obtained.
       

     The scaling k provides means for accurate adjustment of (C A −C B ) to obtain maximum ripple rejection in practice. It is to be noted that it is also possible to have C B =0 with C A =C X . When using Ahuja compensation, an additional capacitance C D  may be used between gate and source of MPD to obtain a realizable value of C X  if the second stage gain g m2 r 2  is large. This can be understood from (14) as C 1 , essentially the gate-source capacitance of MPD, is now added to C D . 
     Please refer to  FIG. 5  and  FIG. 6 .  FIG. 5  shows the block-level implementation of a circuit  80  for achieving PSRR Enhancement for op-amps and LDOs according to a second embodiment, and  FIG. 6  shows the transistor-level implementation of the same. The gain of a current amplifier  84  in cancellation circuit  82  is fixed (to unity here) and capacitance of capacitor C A  is adjusted digitally using a digital control word. This gives the same effect as changing the gain of the current amplifier  84 . In other embodiments, the current amplifier  84  having a fixed gain could be replaced with a differential current amplifier with gain control, similar to the differential current amplifier  54  shown in  FIG. 3 . It may be possible to substitute capacitors with fixed or variable capacitance and/or current amplifiers with fixed or adjustable gain, as one skilled in the art will readily appreciate. 
     The outputs from the current amplifier  84  −i c1  and −i c2  are now added directly with the output current +/−i s  of a differential pair  102  of op-amp  80 , where op-amp  80  operates in buffer mode. The sum of the currents −i c1  and −i c2  and +/−i s  is received by load  104 , and the sum of the resulting differential signal is converted to a single-ended one by the load  104  to drive the gate of the output pass transistor MPD. Requirements for applying −i c1 , −i c2  to the load  104  with the correct polarity remain the same as before. The compensation shown in  FIG. 6  is Miller compensation. 
     Several other embodiments may be possible by combining the features of the first embodiment illustrated in  FIG. 3  and  FIG. 4  and the second embodiment illustrated in  FIG. 5  and  FIG. 6 . 
     Please refer to  FIG. 7 .  FIG. 7  is a frequency response diagram  120  showing PSGR figures calculated in simulation results for the circuit in  FIG. 4  using Miller compensation as compared with related art simulation results. Curve  124  shows simulation results of the circuit shown in  FIG. 4 , which uses cancellation by adding the currents together at the load  64 . Curve  122  shows simulation results of circuitry that does not use cancellation. 
     Please refer to  FIG. 8 .  FIG. 8  is a frequency response diagram  130  showing PSGR figures calculated in simulation results for the circuit in  FIG. 4  using Ahuja compensation as compared with related art simulation results. Curve  134  shows simulation results of the circuit shown in  FIG. 4 , which uses cancellation by adding the currents together at the load  64 . Curve  132  shows simulation results of circuitry that does not use cancellation. 
     The schemes for power-supply ripple cancellation described above in  FIG. 4  and  FIG. 6  assume that any deviation from accurate cancellation due to process, temperature and load current changes will be checked by continuous calibration using a digital control word. However, a simpler way to maintain reasonably good cancellation is to track and take into account all the root causes of the deviations. Therefore, the paragraphs below will discuss this idea as applied to an LDO design. Firstly, we need to look into the expression for C X  more closely. 
     For Miller compensation, a more accurate expression for C X  is: 
     
       
         
           
             
               
                 
                   
                     C 
                     X 
                   
                   = 
                   
                     
                       C 
                       C 
                     
                     + 
                     
                       
                         C 
                         C 
                       
                       
                         
                           g 
                           
                             m 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                         
                         ⁢ 
                         
                           r 
                           2 
                         
                       
                     
                     + 
                     
                       
                         C 
                         1 
                       
                       
                         
                           g 
                           
                             m 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                         
                         ⁢ 
                         
                           r 
                           2 
                         
                       
                     
                     + 
                     
                       
                         C 
                         C 
                       
                       
                         
                           g 
                           
                             m 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                         
                         ⁢ 
                         
                           r 
                           1 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   15 
                   ) 
                 
               
             
           
         
       
     
     For an op-amp driving capacitive load, g m2 r 2  and g m2 r 1  are very large, so (13) is valid. But for an LDO, the second stage gain g m2 r 2  may be quite small, while g m2 r 1  very large, therefore (15) can be written as: 
     
       
         
           
             
               
                 
                   
                     C 
                     X 
                   
                   = 
                   
                     
                       C 
                       C 
                     
                     + 
                     
                       
                         
                           C 
                           1 
                         
                         + 
                         
                           C 
                           C 
                         
                       
                       
                         
                           g 
                           
                             m 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                           
                         
                         ⁢ 
                         
                           r 
                           2 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   16 
                   ) 
                 
               
             
           
         
       
     
     Whereas, for Ahuja compensation, (14) is already a reasonably accurate expression for an LDO. 
     Now, the second stage gain g m2 r 2  is process, temperature and load current dependent. Therefore, according to (14) and (16), we need to track changes in g m2 r 2  and adjust C X  accordingly. 
     Miller Compensation: 
     Firstly, we&#39;ll modify (16) for the purpose of easier tracking of the second-stage gain changes. We know that for any transistor including the pass transistor MPD (with transconductance g m2 ) for an LDO with load resistance r 2 , load current I L  and output voltage V O :
 
g m2 C Dsat =2I L   (17)
 
and V O =I L r 2   (18)
 
     Where, V Dsat  is the overdrive voltage for the pass-transistor. Using (17) and (18) we can modify (16) to: 
     
       
         
           
             
               
                 
                   
                     C 
                     X 
                   
                   = 
                   
                     
                       C 
                       C 
                     
                     + 
                     
                       
                         
                           V 
                           Dsat 
                         
                         
                           2 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           
                             V 
                             O 
                           
                         
                       
                       ⁢ 
                       
                         ( 
                         
                           
                             C 
                             1 
                           
                           + 
                           
                             C 
                             C 
                           
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   19 
                   ) 
                 
               
             
           
         
       
     
     If V GS  is the magnitude of gate-source voltage and V TH  the threshold voltage of MPD, then:
 
 V   Dsat   =V   GS   −V   TH   (20)
 
     Using (20) in (19) we have the final expression as: 
     
       
         
           
             
               
                 
                   
                     C 
                     X 
                   
                   = 
                   
                     
                       C 
                       C 
                     
                     + 
                     
                       
                         
                           
                             V 
                             GS 
                           
                           - 
                           
                             V 
                             TH 
                           
                         
                         
                           2 
                           ⁢ 
                           
                             V 
                             O 
                           
                         
                       
                       ⁢ 
                       
                         ( 
                         
                           
                             C 
                             1 
                           
                           + 
                           
                             C 
                             C 
                           
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   21 
                   ) 
                 
               
             
           
         
       
     
     Now, (21) is the version of (16) with easily measurable quantities. 
     Ahuja Compensation: 
     In a similar way, (14) can be re-written as: 
     
       
         
           
             
               
                 
                   
                     C 
                     X 
                   
                   = 
                   
                     
                       
                         
                           V 
                           GS 
                         
                         - 
                         
                           V 
                           TH 
                         
                       
                       
                         2 
                         ⁢ 
                         
                           V 
                           O 
                         
                       
                     
                     ⁢ 
                     
                       C 
                       1 
                     
                   
                 
               
               
                 
                   ( 
                   22 
                   ) 
                 
               
             
           
         
       
     
     Thus (22) is the equivalent of (21) for Ahuja compensation. 
     Please refer to  FIG. 9 .  FIG. 9  shows a block diagram  140  illustrating how C X  has to be determined according to (21) or (22) so that the ripple cancellation is process, temperature and load current independent. Note that a different equation is needed for calculating C X , depending on whether Miller compensation or Ahuja compensation is used. In block diagram  140 , an LDO  142  provides LDO output voltage V O  and gate-source voltage V GS  of the pass transistor. A threshold voltage generator  144  provides the threshold voltage V TH  of the pass transistor. All of these values are used for generating the quantity 
                 V   GS     -     V   TH         2   ⁢     V   O             
in block  146 , and this quantity is used in block  148  for determining the value of C X  according to the appropriate formula (A).
 
     Please refer to  FIG. 10 .  FIG. 10  is a circuit  150  showing one implementation of the block diagram shown in  FIG. 9  for achieving PSRR Enhancement for op-amps and LDOs according to a third embodiment which provides accurate ripple cancellation without the need of continuous calibration for Miller compensation. In  FIG. 10 , when Miller compensation is used, node X is connected to node Z in a main LDO  152 . Here reference input V REF , main error amplifier EA, MPD, R A , R B , R C  and C C  constitute the main LDO  152 . R L  is the load resistance and R C , C C  the compensation components. Again, reference input V O , auxiliary error amplifier EA 1 , MPR, R C1  and C C1  constitute an auxiliary LDO  154  carrying a small current I O . MPD is constructed out of several units of MPR and so they are unit-matched. According to the connectivity shown, both the main LDO  152  and the auxiliary LDO  154  have the same output voltage of V O . Since MPD and MPR are unit-matched and they have the same drain-source voltage |V DS |=V DD −V O , their threshold voltages V TH  must be the same. Now I o  and the aspect ratio of MPR is chosen such that MPR is just on the verge of weak inversion so that the gate-source voltage of MPR is |V GS     —     MPR |=V TH . Also let us denote |V GS     —     MPD =V GS . Then the difference of the gate voltages of MPD and MPR=V G2 −V G1 =(V DD −|V GS     —     MPR |)−(V DD −|V GS     —     MPD |)=|V GS     —     MPD |−|V GS     —     MPR |=V GS −V TH . 
     An A/D converter  160  is used to convert V G2 −V G1 =V GS −V TH  with a voltage reference 2pV O . The scale factor ‘p’ is chosen such that 2pV O =max. value of V GS −V TH . Then we can say an A/D output of the A/D converter  160  is a number proportional to (V GS −V TH )/2V O . The A/D converter  160  can be any Nyquist type converter accepting differential inputs. The output bus of the A/D converter  160  is used to connect/disconnect capacitors in a capacitor bank  156  with the help of switches S W0  to S Wn−1 . 
     Equation (23) below is derived from (21) and shows how C X  is expressed after n-bit A/D conversion 
     
       
         
           
             
               
                 
                   
                     
                       
                         
                           C 
                           X 
                         
                         = 
                           
                         ⁢ 
                         
                           
                             C 
                             C 
                           
                           + 
                           
                             
                               
                                 
                                   V 
                                   GS 
                                 
                                 - 
                                 
                                   V 
                                   TH 
                                 
                               
                               
                                 2 
                                 ⁢ 
                                 
                                   V 
                                   O 
                                 
                               
                             
                             ⁢ 
                             
                               ( 
                               
                                 
                                   C 
                                   1 
                                 
                                 + 
                                 
                                   C 
                                   C 
                                 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                         ⁢ 
                         
                           
                             C 
                             C 
                           
                           + 
                           
                             
                               
                                 
                                   V 
                                   GS 
                                 
                                 - 
                                 
                                   V 
                                   TH 
                                 
                               
                               
                                 2 
                                 ⁢ 
                                 
                                   pV 
                                   O 
                                 
                               
                             
                             ⁢ 
                             
                               ( 
                               
                                 
                                   pC 
                                   1 
                                 
                                 + 
                                 
                                   pC 
                                   C 
                                 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         ≅ 
                           
                         ⁢ 
                         
                           
                             C 
                             C 
                           
                           + 
                           
                             ( 
                             
                               
                                 
                                   b 
                                   
                                     n 
                                     - 
                                     1 
                                   
                                 
                                 ⁢ 
                                 
                                   2 
                                   
                                     - 
                                     1 
                                   
                                 
                               
                               + 
                               
                                 
                                   b 
                                   
                                     n 
                                     - 
                                     2 
                                   
                                 
                                 ⁢ 
                                 
                                   2 
                                   
                                     - 
                                     2 
                                   
                                 
                               
                               + 
                               
                                 
                                   b 
                                   
                                     n 
                                     - 
                                     3 
                                   
                                 
                                 ⁢ 
                                 
                                   2 
                                   
                                     - 
                                     3 
                                   
                                 
                               
                               + 
                               … 
                               + 
                               
                                 
                                   b 
                                   0 
                                 
                                 ⁢ 
                                 
                                   2 
                                   
                                     - 
                                     n 
                                   
                                 
                               
                             
                             ) 
                           
                         
                       
                     
                   
                   
                     
                       
                           
                         ⁢ 
                         
                           ( 
                           
                             
                               pC 
                               1 
                             
                             + 
                             
                               pC 
                               C 
                             
                           
                           ) 
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                         ⁢ 
                         
                           
                             C 
                             C 
                           
                           + 
                           
                             ( 
                             
                               
                                 
                                   b 
                                   
                                     n 
                                     - 
                                     1 
                                   
                                 
                                 ⁢ 
                                 
                                   a 
                                   
                                     n 
                                     - 
                                     1 
                                   
                                 
                               
                               + 
                               
                                 
                                   b 
                                   
                                     n 
                                     - 
                                     2 
                                   
                                 
                                 ⁢ 
                                 
                                   a 
                                   
                                     n 
                                     - 
                                     2 
                                   
                                 
                               
                               + 
                               
                                 
                                   b 
                                   
                                     n 
                                     - 
                                     3 
                                   
                                 
                                 ⁢ 
                                 
                                   a 
                                   
                                     n 
                                     - 
                                     3 
                                   
                                 
                               
                               + 
                               … 
                               + 
                               
                                 
                                   b 
                                   0 
                                 
                                 ⁢ 
                                 
                                   a 
                                   0 
                                 
                               
                             
                             ) 
                           
                         
                       
                     
                   
                   
                     
                       
                           
                         ⁢ 
                         
                           ( 
                           
                             
                               C 
                               1 
                             
                             + 
                             
                               C 
                               C 
                             
                           
                           ) 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   23 
                   ) 
                 
               
             
             
               
                 
                   
                     
                       where 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       
                         a 
                         i 
                       
                     
                     = 
                     
                       
                         p 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           2 
                           
                             i 
                             - 
                             n 
                           
                         
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         and 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         
                           b 
                           i 
                         
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         are 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         bit 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         values 
                       
                       = 
                       
                         0 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         or 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         1 
                       
                     
                   
                   , 
                   
                     
 
                   
                   ⁢ 
                   
                     i 
                     = 
                     0 
                   
                   , 
                   1 
                   , 
                   2 
                   , 
                   … 
                   ⁢ 
                   
                       
                   
                   , 
                   
                     n 
                     - 
                     1 
                   
                 
               
               
                 
                     
                 
               
             
           
         
       
     
     The capacitor bank  156  is designed to implement C X  as in (23). There is one fixed capacitor equal to the compensation capacitor C C  and the rest, implementing the variable part of C X , are switched in and out with S W0  to S Wn−1 . If b i =1, S Wi  is closed otherwise open. We know that C C  is a MOM/PIP capacitor whereas C 1  is essentially the gate-source capacitor of MPD. Thus the switched capacitor C vi , i=0, 1, 2, . . . , n−1 is implemented with a parallel combination of a MOM/PIP capacitor a i C C  matching C C  and a PMOS capacitor a i C 1  matching MPD. 
     A current amplifier  158  feeding the load of EA with ripple cancellation current is a unity gain current amplifier and the capacitor bank is connected to only one of its input terminals. The other input terminal is not used. 
     When Ahuja compensation is used, node X is connected to node Y and R C =0 in the main LDO  152 . Using the implementation in  FIG. 10 , we can show in a similar manner that (22) converts to:
 
C X ≅(b n−1 a n−1 +b n−2 a n−2 +b n−3 a n−3 + . . . +b 0 a 0 )C 1   (24)
         where a i =p2 i−n  and b i  are bit values=0 or 1, i=0, 1, 2, . . . , n−1       

     Therefore, according to (24), we just need to set C C =0 in the capacitor bank  156  of  FIG. 10 . 
     In summary, the embodiments above all sum differential current output from a differential pair of transistors with cancellation current and output this summed current from the load. The summed current from the load is fed into a pass transistor for generating an output current. A substantial advantage is realized in no significant circuit redesign is required for implementing this change. No modification of the LDO or the op-amp is required, and no extra summing amplifier is needed either. Thus, the benefits of ripple cancellation can be realized with minimal cost and time needed. 
     Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.