Abstract:
A method of simultaneously bonding components, comprising the following steps. At least first, second and third components are provided and comprise: at least one glass component; and at least one conductive or semiconductive material component. The order of stacking of the components is determined to establish interfaces between the adjacent components. A hydrogen-free amorphous film is applied to one of the component surfaces at each interface comprising an adjacent: glass component; and conductive or semiconductive component. A sol gel with or without alkaline ions film is applied to one of the component surfaces at each interface comprising an adjacent: conductive or semiconductive component; and conductive or semiconductive component. The components are simultaneously anodically bonded in the determined order of stacking.

Description:
SUMMARY OF THE INVENTION  
       [0001]     Accordingly, it is an object of one or more embodiments of the present invention to provide a method of anodically bonding multiple wafers and/or substrates simultaneously at temperatures less than about 300° C.  
         [0002]     Other objects will appear hereinafter.  
         [0003]     It has now been discovered that the above and other objects of one or more embodiments of the present invention may be accomplished in the following manner. Specifically, at least first, second and third components are provided with at least one of the first, second and third components being comprised of a glass substrate and at least one of the first, second and third components being comprised of a conductive or semiconductive material. Each of the at least first, second and third components having an upper and lower surface. The order of stacking of the at least first, second and third components is determined to establish interfaces between adjacent at least first, second and third components. A hydrogen-free amorphous film is applied to one of the component surfaces at each interface comprising an adjacent: glass component; and conductive or semiconductive component. A sol gel with or without alkaline ions film is applied to one of the component surfaces at each interface comprising an adjacent: conductive or semiconductive component; and conductive or semiconductive component. The least first, second and third components are simultaneously anodically bonding in the determined order of stacking.  
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0004]     The present invention will be more clearly understood from the following description taken in conjunction with the accompanying drawings in which like reference numerals designate similar or corresponding elements, regions and portions and in which:  
         [0005]     FIGS.  1  to  8  schematically illustrate a first preferred embodiment of the present invention.  
         [0006]     FIGS.  9  to  16  schematically illustrate a second preferred embodiment of the present invention.  
         [0007]     FIGS.  17  to  26  schematically illustrate a third preferred embodiment of the present invention.  
         [0008]     FIGS.  27  to  29  schematically illustrate a summarization of the invention.  
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0000]     Information Known to the Inventors—Not to be Considered as Prior Art  
         [0009]     The following information is known to the inventors and is not to be considered as prior art for the purposes of this invention.  
         [0010]     Three commercially available technologies which will be discussed in turn are: 
        a) silicon fusion bonding;     b) intermediate layer bonding, including eutectic, glass frit, solder and adhesive bonding; and     c) anodic bonding. 
 
 Silicon Fusion Bonding 
       
 
         [0014]     In silicon fusion bonding, high temperatures ranging between 700° C. and 1100° C. are required to achieve sufficient bond strength. Bonding of III-V compound semiconductors has been achieved at temperatures around 500° C. Wafer bonding at lower temperatures has also been reported, the bonding quality, such as bond strength and bubbles in the interface, is however not satisfactory for actual applications.  
         [0000]     Intermediate Layer Bonding  
         [0015]     In intermediate layer bonding, Au—Si eutectic bonding occurs at a process temperature of 500° C. which is higher than the Au—Si eutectic temperature of 363° C.  
         [0016]     Screen printed frit bonding techniques have been used for bonding silicon-based devices. However, the bonding temperature is above 400° C. In addition, glass frits normally contain lead, which is not desirable for environmentally friendly applications.  
         [0017]     Another current method for bonding substrates utilizes soldering and adhesive. Soldering and adhesive bonding can reduce the bonding temperature and have been employed for several applications. However, these technologies are limited by outgassing, low positioning accuracy, long-term reliability, bonding quality and other problems.  
         [0000]     Anodic Bonding  
         [0018]     Anodic bonding provides a hermetic and mechanically solid connection between glass and metal substrates or between glass and semiconductor substrates. Conventionally, the substrates are heated to a temperature of 400-450° C. with applied voltages of 400 volts to 1200 volts. Electrostatic forces and the migration of ions lead to an irreversible chemical bond at the boundary layer between the individual substrates.  
         [0019]     For anodic bonding of silicon wafers or substrates, borosilicate glass intermediate layers can be used. The glass intermediate layers are conventionally produced by several coating techniques such as sputtering, vapor deposition, or coating with appropriate colloidal solutions. Sputtering and vapor deposition always involves the formation of thick coatings inside the apparatus, which must be removed from time to time, leading to frequent servicing and cleaning operations.  
         [0000]     Problems Known to the Inventors—Not to be Considered Prior Art  
         [0020]     The following are problems known to the inventors and are not to be considered as prior art for the purposes of the present invention.  
         [0021]     For current bonding techniques, the wafers/substrates are bonded at high temperatures which lead to residual stresses due to the differences in the thermal expansion coefficients of the substrates, damage of the metal electrodes on the substrates, as well as limited materials in the bonding stack. However, high temperature normally yields high bonding strength.  
         [0022]     For low temperature bonding, the work reported so far is limited to only bonding two elements, either glass to conductor anodic bonding or conductor to conductor bonding. When multilayer bonding is required, the bonding process is often done sequentially.  
         [0000]     Present Invention  
         [0023]     The thrust of one or more embodiments of the present invention is to provide a process of anodically bonding multiple wafers and/or substrates simultaneously at low temperatures, i.e. preferably from about 400 to 200° C. and more preferably less than about 300° C., and ensuring good bonding quality. Each individual process step is simple and easy to apply with the current processing principles. The invented process can be carried out at low cost.  
         [0000]     Bonding Processing Steps Applicable to Each Embodiment  
         [0024]     The bonding processing steps of the invention are described below which may be related to the embodiments described hereafter.  
         [0025]     Prior to deposition, the wafer surface is pre-treated in organic or inorganic solutions to achieve clean and hydrophilic surface property.  
         [0026]     That is the wafers/substrates are pre-treated in the chemical cleaning/hydrophilic solutions, such as sulphuric- or hydrogen-peroxide-based RCA solutions or an organic solution at a temperature preferably between about 50 to 80° C. for preferably from about 5 to 10 minutes.  
         [0027]     The chemical cleaning/hydrophilic solutions are then flushed employing deionized water, for example.  
         [0028]     An amorphous and non-hydrogenated thin film is applied on the surface of a conductor or glass wafer/substrate.  
         [0029]     The existence of hydrogen in the film is undesirable as it has a high affinity with oxygen. The chemical bond between oxygen and hydrogen will reduce the bonding quality between the conductors and/or glass wafers/substrates.  
         [0030]     The amorphous film is preferably deposited by physical vapor deposition as will be used hereafter for purposes of illustration. Applicable amorphous films preferably include silicon, silicon oxide or silicon nitride.  
         [0031]     The physical vapor deposition is achieved preferably by laser ablation, evaporation, ion beam deposition or sputtering. Prior to deposition, the wafer surface is ultrasonically cleaned.  
         [0032]     The sol gel coating/film with or without alkaline ions is preferably achieved by spin-on, immersion or spraying.  
         [0033]     The solution for the sol gel coating/film includes alkanol, organosol (methyltrimethoxysilane (MTMS), methyltrimethoxysilane (MTMS), methyltriethoxysilane (MTEOS), tetraethylorthosilicate (TEOS), phenyltrimethoxysilane (PhTMS), methacryloxypropyltrimethoxysilane (MEMO), (3-glycidoxypropyl)trimethoxysilane (GLYMO), 3-methoxypropyltrimethoxysilane (MeOPrTMS) and/or their mixtures), acid (such as acetic acid, hydrochloric acid or sulphuric acid), water and alkali salts (such as sodium, potassium or lithium).  
         [0034]     The weight percentage for the solution for the sol gel coating/film are:  
         [0035]     alkanol: preferably from about 20 to 80 wt. % and more preferably from about 30 to 50 wt. %;  
         [0036]     organosol: preferably from about 20 to 80 wt. % and more preferably from about 30 to 50 wt. %;  
         [0037]     acid: preferably from about 0.00001 to 0.1 wt. % and more preferably from about 0.0001 to 0.01 wt. %;  
         [0038]     water: preferably from about 10 to 80 wt. % and more preferably from about 20 to 50 wt. %; and  
         [0039]     alkali salts: preferably from about 0 to 5 wt. % and more preferably from about 0 to 2 wt. %.  
         [0040]     The thickness of the sol gel coating/film can be controlled by the deposition process or by using multiple depositions. Sol gel films used include methyltrimethoxysilane (MTMS), methyl triethoxysilane (MTEOS) or other sol solution with or without alkaline ions. The thickness of the films ranges from nanometers to micrometers, that is preferably from about 10 nm to 10 μm. and more preferably from about 10 to 100 nm.  
         [0041]     The coated wafers/substrates with sol gel coating/film are then dried or tempered at temperatures ranging from room temperature to temperatures below or equal to the bonding temperature, i.e. preferably from about 25 to 400° C.  
         [0042]     Prior to bonding, the wafer surface is pre-treated in organic or inorganic solutions to achieve hydrophilic surface property.  
         [0043]     That is the wafers/substrates are pre-treated in the chemical cleaning/hydrophilic solutions, such as sulphuric- or hydrogen-peroxide-based RCA solutions or an organic solution at a temperature preferably between about 50 to 80° C. for preferably from about 5 to 10 minutes.  
         [0044]     The chemical cleaning/hydrophilic solutions are then flushed employing deionized water, for example.  
         [0045]     The multiple wafers are then stacked horizontally on top of each other with the to-be bonded surfaces facing each other with high alignment accuracy. In order to avoid wafer contact during vacuuming, the wafers are separated by spacers placed at the wafer edges. The spacers have a thickness of preferably from about 20 to 50 μm.  
         [0046]     After stacking and alignment, the wafers are heated to temperatures preferably between 200° C. and 400° C. and more preferably less than about 300° C. in a vacuum chamber. When the desired temperature is reached, the spacers are pulled out radially so that the whole surfaces of the wafers come into contact. Anodic bonding process among the multiple wafers is then carried out at an applied voltage of preferably from 100 to 1000 volts.  
         [0047]     The bond achieved in this manner is characterized with both high mechanical strength and good mechanical and chemical durability.  
         [0048]     The reliable bonding at the low temperatures of this invention avoids degradation or damage of pre-fabricated devices and integrated circuitry. It also minimizes or eliminates bonding-induced residual stress after cooling and can also reduce the process cost.  
       First Embodiment—FIGS.  1  to  8   
       [0049]     FIGS.  1  to  8  illustrate a first preferred embodiment of the present invention.  
         [0000]     Conditioning of First Wafer  10 — FIG. 1   
         [0050]     As shown in  FIG. 1 , a first wafer  10 , which may be a semiconductive wafer or a conductive wafer, is conditioned in a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes. This causes the upper and lower surfaces  12 ,  14  of first wafer  10  to become hydrophilic.  
         [0000]     Conditioning of Second Wafer  16 — FIG. 2   
         [0051]     As shown in  FIG. 2 , a second wafer  16 , such as a semiconductor wafer or a conductor wafer, is polished on both its upper  18  and lower  20  surfaces so as to have mirror finishes.  
         [0052]     Second wafer  16  is then cleaned with a cleaning solvent that is preferably a sulphuric- or hydrogen-peroxide-based RCA solution.  
         [0000]     Formation of Amorphous Film  22  on Second Wafer  16 — FIG. 3   
         [0053]     As shown in  FIG. 3 , a hydrogen-free amorphous film  22  is formed on one polished surface  18  of second wafer  16  by physical vapor deposition (PVD) to a thickness of preferably from about 10 nm to 2 μm and more preferably from about 10 to 20 nm. During the PVD of amorphous film  22 , neither hydrogen nor any hydrogen-containing gas is introduced.  
         [0054]     The physical vapor deposition (PVD) of amorphous film  22  is achieved preferably by laser ablation, evaporation, ion beam deposition or sputtering.  
         [0055]     Amorphous film  22  is preferably comprised of silicon, silicon oxide or silicon nitride.  
         [0000]     Formation of Sol Gel Film  24  on Second Wafer  16 — FIG. 4   
         [0056]     As shown in  FIG. 4 , the opposite surface  20  of second wafer  16  is cleaned using a cleansing solvent such as, preferably sulphuric- or hydrogen-peroxide-based RCA solutions.  
         [0057]     A sol gel film  24  is then formed on the opposite side  20  of second wafer  16  to a thickness of preferably from about 10 nm to 10 μm and more preferably from about 10 to 100 nm.  
         [0058]     Sol gel film  24  is applied preferably by spin-on, immersion or spraying.  
         [0059]     The solution for the sol gel coating/film  24  includes alkanol, organosol (methyltrimethoxysilane (MTMS), methyltrimethoxysilane (MTMS), methyltriethoxysilane (MTEOS), tetraethylorthosilicate (TEOS), phenyltrimethoxysilane (PhTMS), methacryloxypropyltrimethoxysilane (MEMO), (3-glycidoxypropyl)trimethoxysilane (GLYMO), 3-methoxypropyltrimethoxysilane (MeOPrTMS) and/or their mixtures), acid (such as acetic acid, hydrochloric acid or sulphuric acid), water and alkali salts (such as sodium, potassium or lithium).  
         [0060]     The weight percentage for the solution for the sol gel coating/film are:  
         [0061]     alkanol: preferably from about 20 to 80 wt. % and more preferably from about 30 to 50 wt. %;  
         [0062]     organosol: preferably from about 20 to 80 wt.(?) % and more preferably from about 30 to 50 wt. %;  
         [0063]     acid: preferably from about 0.00001 to 0.1 wt. % and more preferably from about 0.0001 to 0.01 wt. %;  
         [0064]     water: preferably from about 10 to 80 wt. % and more preferably from about 20 to 50 wt. %; and  
         [0065]     alkali salts: preferably from about 0 to 5 wt. % and more preferably from about 0 to 2 wt. %.  
         [0066]     The sol gel coating/film  24  on second wafer  16  is then dried or tempered at temperatures ranging from room temperature to temperatures below or equal to the bonding temperature, i.e. preferably from about 25 to 400° C.  
         [0067]     The amorphous film  22  and sol gel coating/film  24  on second wafer  16  are then conditioned using a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes. This causes the upper and lower surfaces of second wafer  16  to become hydrophilic.  
         [0000]     Conditioning of Third (Glass) Wafer  26 — FIG. 5   
         [0068]     As shown in  FIG. 5 , third wafer  26 , that is preferably glass or glass with alkaline ions, is conditioned using a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes.  
         [0000]     Stacking of First, Second and Third Wafers  10 ,  16 ,  26  With Spacers  28 ,  30 — FIG. 6   
         [0069]     As shown in  FIG. 6 , second wafer  16  is positioned on top of, and spaced apart from, first wafer  10  using spacers  28  with the sol gel film  24  coated surface  20  facing first wafer  10 .  
         [0070]     Third wafer  26  is positioned on top of, and spaced apart from, second wafer  16  using spacers  30  with the PVD hydrogen-free amorphous film  22  coated surface  18  facing third wafer  26 .  
         [0071]     Spacers  28 ,  30  are placed at the edges of first, second and third wafers  10 ,  16 ,  26 , respectively, once the first, second and third wafers  10 ,  16 ,  26  are properly aligned. Spacers  28 ,  30  have a thickness of preferably from about 20 to 50 μm.  
         [0072]     After stacking and alignment, the wafers are heated to temperatures preferably between 200° C. and 400° C. and more preferably less than about 300° C. in a vacuum chamber.  
         [0000]     Bringing First, Second and Third Wafers  10 ,  16 ,  26  into Point Contact— FIG. 7   
         [0073]     As shown in  FIG. 7 , the first, second and third wafers  10 ,  16 ,  26  are brought into contact in their respective central areas under pressure  32  of preferably from about 0.001 to 100 N/m 2 .  
         [0074]     The spacers  28 ,  30  are then removed (see  FIG. 8 ).  
         [0000]     Simultaneous Anodic Bonding of First, Second and Third Wafers  10 ,  16 ,  26 — FIG. 8   
         [0075]     As shown in  FIG. 8 , with the spacers  28 ,  30  removed, the first, second and third wafers  10 ,  16 ,  26  are simultaneously anodically bonded at a temperature of preferably from about 200 to 400° C. and more preferably less than about 300° C. at voltages of preferably from about 100 to 1000 volts.  
       Second Embodiment—FIGS.  9  to  16   
       [0076]     FIGS.  9  to  16  illustrate a second preferred embodiment of the present invention.  
         [0000]     Conditioning of First Wafer  116 — FIG. 9   
         [0077]     As shown in  FIG. 9 , a first wafer  116 , such as a semiconductor wafer or a conductor wafer, is polished on both its upper  118  and lower  120  surfaces so as to have mirror finishes.  
         [0078]     First wafer  116  is then cleaned with a cleaning solvent that is preferably sulphuric- or hydrogen-peroxide-based RCA solutions.  
         [0000]     Formation of Amorphous Film  122 ′ on First Wafer  116 — FIG. 10   
         [0079]     As shown in  FIG. 10 , a hydrogen-free amorphous film  122 ′ is formed on one polished surface  118  of first wafer  116  by physical vapor deposition (PVD) in plasma to a thickness of preferably from about 10 nm to 2 μm and more preferably from about 10 to 100 nm. During the PVD of amorphous film  122 ′, neither hydrogen nor any hydrogen-containing gas is introduced.  
         [0080]     The physical vapor deposition (PVD) of amorphous film  122 ′ is achieved preferably by laser ablation, evaporation, ion beam deposition or sputtering.  
         [0081]     Amorphous film  122 ′ is preferably comprised of silicon, silicon oxide or silicon nitride.  
         [0082]     First wafer  116  with amorphous film  122 ′ is then conditioned in a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes.  
         [0000]     Conditioning of Second (Glass) Wafer  110 — FIG. 11   
         [0083]     As shown in  FIG. 11 , a second wafer  110  is polished on both its upper  112  and lower  114  surfaces so as to have mirror finishes. Second wafer  110  is preferably glass or glass with alkaline ions  
         [0084]     Second wafer  110  is then cleaned with a cleaning solvent that is preferably a sulphuric- or hydrogen-peroxide-based RCA solution.  
         [0000]     Formation of Amorphous Film  122 ″ on Second Wafer  110 — FIG. 12   
         [0085]     As shown in  FIG. 12 , a hydrogen-free amorphous film  122 ″ is formed on one polished surface  112  of second wafer  110  by physical vapor deposition (PVD) in plasma to a thickness of preferably from about 10 nm to 2 μm and more preferably from about 10 to 100 nm. During the PVD of amorphous film  122 ″, neither hydrogen nor any hydrogen-containing gas is introduced.  
         [0086]     The physical vapor deposition (PVD) of amorphous film  122 ″ is achieved preferably by laser ablation, evaporation, ion beam deposition or sputtering.  
         [0087]     Amorphous film  122 ″ is preferably comprised of silicon, silicon oxide or silicon nitride.  
         [0088]     Second wafer  110  with amorphous film  122 ″ is then conditioned in a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes.  
         [0000]     Conditioning of Third (Glass) Wafer  130 — FIG. 13   
         [0089]     As shown in  FIG. 13 , a third wafer  130  is conditioned in a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes. This causes the upper and lower surfaces  132 ,  134  of third wafer  1 30 to become hydrophilic. Third wafer  130  is preferably glass or glass with alkaline ions.  
         [0000]     Stacking of First, Second and Third Wafers  116 ,  110 ,  130  With Spacers  146 ,  148 — FIG. 14   
         [0090]     As shown in  FIG. 14 , second wafer  110  is positioned on top of, and spaced apart from, first wafer  116  using spacers  146  with the PVD hydrogen-free amorphous film  122 ′ coated surface  118  facing second wafer  110 .  
         [0091]     Third wafer  130  is positioned on top of, and spaced apart from, second wafer  110  using spacers  148  with the PVD hydrogen-free amorphous film  122 ″ coated surface  112  facing third wafer  130 .  
         [0092]     Spacers  146 ,  148  are placed at the edges of first, second and third wafers  116 ,  110 ,  130 , respectively, once the first, second and third wafers  116 ,  110 ,  130  are properly aligned. Spacers  146 ,  148  have a thickness of preferably from about 20 to 50 μm.  
         [0093]     After stacking and alignment, the wafers are heated to temperatures preferably between 200° C. and 400° C. and more preferably less than about 300° C. in a vacuum chamber.  
         [0000]     Bringing First, Second and Third Wafers  116 ,  110 ,  130  into Point Contact— FIG. 15   
         [0094]     As shown in  FIG. 15 , the first, second and third wafers  116 ,  110 ,  130  are brought into contact in their respective central areas under pressure  152  of preferably from about 0.001 to 100 N/m 2 .  
         [0095]     The spacers  146 ,  148  are then removed (see  FIG. 16 ). Simultaneous Anodic Bonding of First, Second and Third Wafers  116 ,  110 ,  130 — FIG. 16   
         [0096]     As shown in  FIG. 16 , with the spacers  146 ,  148  removed, the first, second and third wafers  116 ,  110 ,  130  are simultaneously anodically bonded at a temperature of preferably from about 200 to 400° C. and more preferably less than about 300° C. at voltages of preferably from about 100 to 1000 volts.  
       Third Embodiment—FIGS.  17  to  26   
       [0097]     FIGS.  17  to  26  illustrate a third preferred embodiment of the present invention.  
         [0000]     Conditioning of First Wafer  210 — FIG. 17   
         [0098]     As shown in  FIG. 17 , a first wafer  210 , such as a semiconductor wafer or a conductor wafer, is conditioned in a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes. This causes the upper and lower surfaces  212 ,  214  of first wafer  210  to become hydrophilic.  
         [0000]     Conditioning of Second Wafer  216 — FIG. 18   
         [0099]     As shown in  FIG. 18 , a second wafer  216 , such as a semiconductor wafer or a conductor wafer, is polished on both its upper  218  and lower  220  surfaces so as to have mirror finishes.  
         [0100]     Second wafer  216  is then cleaned with a cleaning solvent that is preferably sulphuric- or hydrogen-peroxide-based RCA solutions.  
         [0000]     Formation of Amorphous Film  222 ′ on Second Wafer  216 — FIG. 19   
         [0101]     As shown in  FIG. 19 , a hydrogen-free amorphous film  222 ′ is formed on one polished surface  218  of second wafer  216  by physical vapor deposition (PVD) in plasma to a thickness of preferably from about 10 nm to 10 μm and more preferably from about 10 to 100 nm. During the PVD of amorphous film  222 ′, neither hydrogen nor any hydrogen-containing gas is introduced.  
         [0102]     The physical vapor deposition (PVD) of amorphous film  222 ′ is achieved preferably by laser ablation, evaporation, ion beam deposition or sputtering.  
         [0103]     Amorphous film  222 ′ is preferably comprised of silicon, silicon oxide or silicon nitride.  
         [0000]     Formation of Sol Gel Film  224  on Second Wafer  216 — FIG. 20   
         [0104]     As shown in  FIG. 20 , the opposite surface  220  of second wafer  216  is cleaned using a cleansing solvent such as, preferably sulphuric- or hydrogen-peroxide-based RCA solutions.  
         [0105]     A sol gel film  224  is then formed on the opposite side  220  of second wafer  216  to a thickness of preferably from about 10 nm to 10 μm and more preferably from about 10 to 100 nm.  
         [0106]     Sol gel film  224  is applied preferably by spin-on, immersion or spraying.  
         [0107]     The solution for the sol gel coating/film  224  includes alkanol, organosol (methyltrimethoxysilane (MTMS), methyltrimethoxysilane (MTMS), methyltriethoxysilane (MTEOS), tetraethylorthosilicate (TEOS), phenyltrimethoxysilane (PhTMS), methacryloxypropyltrimethoxysilane (MEMO), (3-glycidoxypropyl)trimethoxysilane (GLYMO), 3-methoxypropyltrimethoxysilane (MeOPrTMS) and/or their mixtures), acid (such as acetic acid, hydrochloric acid or sulphuric acid), water and alkali salts (sodium, potassium or lithium).  
         [0108]     The weight percentage for the solution for the sol gel coating/film are:  
         [0109]     alkanol: preferably from about 20 to 80 wt. % and more preferably from about 30 to 50 wt. %;  
         [0110]     organosol: preferably from about 20 to 80 wt. % and more preferably from about 30 to 50 wt. %;  
         [0111]     acid: preferably from about 0.00001 to 0.1 wt. % and more preferably from about 0.0001 to 0.01 wt. %;  
         [0112]     water: preferably from about 10 to 80 wt. % and more preferably from about 20 to 50 wt. %; and  
         [0113]     alkali salts: preferably from about 0 to 5 wt. % and more preferably from about 0 to 2 wt. %.  
         [0114]     The sol gel coating/film  224  on second wafer  216  is then dried or tempered at temperatures ranging from room temperature to temperatures below or equal to the bonding temperature, i.e. preferably from about 25 to 400° C.  
         [0115]     The amorphous film  222 ′ and sol gel coating/film  224  on second wafer  216  are then conditioned using a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes. This causes the upper and lower surfaces of second wafer  216  to become hydrophilic.  
         [0000]     Conditioning of Third (Glass) Wafer  226 — FIG. 21   
         [0116]     As shown in  FIG. 21 , a third wafer  226  is polished on both its upper  228  and lower  230  surfaces so as to have mirror finishes. Third wafer  226  is preferably glass or glass with alkaline ions.  
         [0117]     Third wafer  226  is then cleaned with a cleaning solvent that is preferably sulphuric- or hydrogen-peroxide-based RCA solutions.  
         [0000]     Formation of Amorphous Film  222 ″ on Third Wafer  226 — FIG. 22   
         [0118]     As shown in  FIG. 22 , a hydrogen-free amorphous film  222 ″ is formed on one polished surface  228  of third wafer  226  by physical vapor deposition (PVD) in plasma to a thickness of preferably from about 10 nm to 10 μm and more preferably from about 10 to 100 nm. During the PVD of amorphous film  222 ″, neither hydrogen nor any hydrogen-containing gas is introduced.  
         [0119]     The physical vapor deposition (PVD) of amorphous film  222 ″ is achieved preferably by laser ablation, evaporation, ion beam deposition or sputtering.  
         [0120]     Amorphous film  222 ″ is preferably comprised of silicon, silicon oxide or silicon nitride.  
         [0121]     Third wafer  226  with amorphous film  222 ″ is then conditioned in a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes.  
         [0000]     Conditioning of Fourth (Glass) Wafer  250 — FIG. 23   
         [0122]     As shown in  FIG. 23 , a fourth wafer  250  is conditioned in a chemical cleaning solution bath comprised of preferably sulphuric- or hydrogen-peroxide-based RCA solutions at a temperature of preferably from about 50 to 80° C. for preferably from about 2 to 20 minutes. This causes the upper and lower surfaces  252 ,  254  of third wafer  250  to become hydrophilic.  
         [0123]     Fourth wafer  250  is preferably glass or glass with alkaline ions.  
         [0000]     Stacking of First, Second, Third and Fourth Wafers  210 ,  216 ,  226 ,  250  With Spacers  260 ,  262 ,  264 — FIG. 24   
         [0124]     As shown in  FIG. 24 , second wafer  216  is positioned on top of, and spaced apart from, first wafer  210  using spacers  260  with the sol gel film  224  coated surface  220  facing first wafer  210 .  
         [0125]     Third wafer  226  is positioned on top of, and spaced apart from, second wafer  216  using spacers  262  with the PVD hydrogen-free amorphous film  222 ′ coated surface  218  facing lower surface  230  of third wafer  226 .  
         [0126]     Fourth wafer  250  is positioned on top of, and spaced apart from, third wafer  226  using spacers  264  with the PVD hydrogen-free amorphous film  222 ″ coated surface  228  of third wafer  226  facing fourth wafer  250 .  
         [0127]     Spacers  260 ,  262 ,  264  are placed at the edges of first, second, third and fourth wafers  210 ,  216 ,  226 ,  250 , respectively, once the first, second and third wafers  210 ,  216 ,  226 ,  250  are properly aligned. Spacers  260 ,  262 ,  264  have a thickness of preferably from about 20 to 50 μm.  
         [0128]     After stacking and alignment, the wafers are heated to temperatures preferably between 200° C. and 400° C. and more preferably less than about 300° C. in a vacuum chamber.  
         [0000]     Bringing First, Second, Third and Fourth Wafers  210 ,  216 ,  226 ,  250  into Point Contact— FIG. 25   
         [0129]     As shown in  FIG. 25 , the first, second, third and fourth wafers  210 ,  216 ,  226 ,  250  are brought into contact in their respective central areas under pressure  270  of preferably from about 0.001 to 100 N/m 2 .  
         [0130]     The spacers  260 ,  262 ,  264  are then removed (see  FIG. 26 ).  
         [0000]     Simultaneous Anodic Bonding of First, Second, Third and Fourth Wafers  210 ,  216 ,  226 ,  250 — FIG. 26   
         [0131]     As shown in  FIG. 26 , with the spacers  260 ,  262 ,  264  removed, the first, second, third and fourth wafers  210 ,  216 ,  226 ,  250  are simultaneously anodically bonded at a temperature of preferably from about  200  to 400° C. and more preferably less than about 300° C. at voltages of preferably from about 100 to 1000 volts.  
         [0000]     Summary—FIGS.  27  to  29   
         [0132]     FIGS.  27  to  29  summarize the present invention.  
         [0133]      FIG. 27  shows a first silicon wafer  302  bonded to a second glass substrate  304  using amorphous silicon  306  in accordance with the method of the present invention.  
         [0134]      FIG. 28  shows a first glass substrate  308  bonded to a second glass substrate  310  also using amorphous silicon  312  in accordance with the method of the present invention.  
         [0135]      FIG. 29  shows a first silicon wafer  314  bonded to a second silicon wafer  316  using sol gel  318  in accordance with the method of the present invention.  
         [0136]     As one skilled in the art would recognize, more than four components may be simultaneously anodically bonded in accordance with the teachings of the present invention.  
         [0137]     The method of the present invention may by used with/in the following applications/fields of use and market potential, for example: 
        micro electromechanical system (MEMS) packaging;     micro optoelectromechanical system (MOEMS) packaging;     microfluidic and Bio-MEMS;     semiconductors;     microelectronics;     3 1 D IC device fabrication;     optoelectronics;     substrate fabrication;     hermetic and vacuum sealing; and     encapsulation. 
 
 Advantages of the Present Invention 
       
 
         [0148]     The advantages of one or more embodiments of the present invention include: 
        1. reduction in the bonding temperature, i.e. less than about 300° C., resulting in lower strain and lower residual stress;     2. greater choice of materials for bonding;     3. may simultaneously bond multiple wafers/substrates;     4. pre-fabricated devices and integrated circuitry formed in accordance with the present invention are not easily degraded or damaged;     5. bonding-induced stress problems after cooling are minimized;     6. the bonding time is shortened and the production efficiency is increased;     7. the method of the present invention is applicable for hermetic and vacuum sealing at low temperature (less than about 300° C.);     8. the process costs are reduced;     9. good bonding quality such as high bonding strength and bubble-free interfaces; and     10. cost effective process.        
 
         [0159]     While particular embodiments of the present invention have been illustrated and described, it is not intended to limit the invention, except as defined by the following claims.