Abstract:
A voltage selection circuit is disclosed which comprises: a first through a fourth inverters; a first switch circuit including a first MOSFET of N type and a second MOSFET of N type, respective drains thereof being connected in common; and a second switch circuit including a third MOSFET of N type and a fourth MOSFET of N type, respective drains thereof being connected in common, a common drive voltage being input to the first through fourth inverters, a control signal being input to the first inverter and the third inverter, the output of the first inverter being input to the second inverter and the gate of the fourth MOSFET, the output of the second inverter being input to the gate of the first MOSFET, the output of the third inverter being input to the fourth inverter and the gate of the third MOSFET, the output of the fourth inverter being input to the gate of the second MOSFET, a first input voltage selected depending on the control signal being input to the source of the second MOSFET, a second input voltage selected depending on the control signal being input to the source of the fourth MOSFET, the values of the drive voltage, the first input voltage, and the second input voltage being set for the first MOSFET or the third MOSFET such that each gate-source voltage thereof becomes higher than a gate-source threshold voltage at the time of turning on.

Description:
CROSS-REFERENCE TO RELATED APPLICATION  
       [0001]     This application claims the benefit of priority to Japanese Patent Application No. 2005-369845, filed Dec. 22, 2005 of which full contents are incorporated herein by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     1. Technical Field  
         [0003]     The present invention relates generally to a voltage selection circuit that selects and outputs one of a plurality of input voltages depending on a control signal, and, more particularly, to technology for outputting a stable voltage.  
         [0004]     2. Description of the Related Art  
         [0005]     When an electronic circuit is developed, a circuit (hereinafter, a “voltage selection circuit”) may be needed to select and output one of a plurality of input voltages depending on a control signal. For example, as shown in  FIG. 5 , such a circuit can include MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).  
         [0006]     In  FIG. 5 , a P-MOSFET (P-type MOSFET, MOSFET of P type, M 1 ) and an N-MOSFET (N-type MOSFET, MOSFET of N type, M 2 ) configure a first inverter INV 1 . A P-MOSFET (M 3 ) and an N-MOSFET (M 4 ) configure a second inverter INV 2 . A P-MOSFET (M 5 ) and an N-MOSFET (M 6 ) configure a first transmission gate SW 1 . A P-MOSFET (M 7 ) and an N-MOSFET (M 8 ) configure a second transmission gate SW 2 . Diodes D 1  to D 4  are parasitic diodes of the MOSFETs (M 5  to M 8 ).  
         [0007]     IN (“H” or “L”) is a control signal input to the first inverter INV 1 . The output of the first inverter INV 1  is input to the second inverter INV 2 , the gate of the MOSFET (M 5 ), and the gate of the MOSFET (M 8 ). The output of the second inverter INV 2  is input to the gate of the MOSFET (M 6 ) and the gate of the MOSFET (M 7 )  
         [0008]     A first input voltage V 1  is selected depending on the control signal IN and is applied to the source of the MOSFET (M 5 ) and the source of the MOSFET (M 6 ). A second input voltage V 2  is selected depending on the control signal IN and is applied to the source of the MOSFET (M 7 ) and the source of the MOSFET (M 8 ).  
         [0009]     The drains of the MOSFETs (M 5  to M 8 ) are connected in common and, through this connection line, an output voltage V 3  is output based on either the first input voltage V 1  or the second input voltage V 2  selected depending on the control signal IN.  
         [0010]     It is assumed that “H” is input as the control signal IN for the voltage selection circuit shown in  FIG. 5 . In this case, “L” is input to the gate of the MOSFET (M 5 ) and the gate of the MOSFET (M 8 ) and “H” is input to the gate of the MOSFET (M 6 ) and the gate of the MOSFET (M 7 ). Therefore, the transmission gate SW 1  is turned on while the transmission gate SW 2  is turned off, and the output voltage V 3  is output as a voltage based on the first input voltage V 1  in this case.  
         [0011]     On the other hand, it is assumed that “L” is input as the control signal IN for the voltage selection circuit shown in  FIG. 5 . In this case, “H” is input to the gate of the MOSFET (M 5 ) and the gate of the MOSFET (M 8 ) and “L” is input to the gate of the MOSFET (M 6 ) and the gate of the MOSFET (M 7 ). Therefore, the transmission gate SW 1  is turned off while the transmission gate SW 2  is turned on, and the output voltage V 3  is output as a voltage based on the second input voltage V 2  in this case.  
         [0012]      FIG. 6  shows another example of the voltage selection circuit. In  FIG. 6 , a P-MOSFET (M 1 ) and an N-MOSFET (M 2 ) configure a first inverter INV 1 . A P-MOSFET (M 3 ) and an N-MOSFET (M 4 ) configure a second inverter INV 2 . The drain and gate of the N-MOSFET (M 5 ) are connected in common with the drain and gate of the N-MOSFET (M 6 ), respectively, to configure a first switch circuit SW 1 . The drain and gate of the N-MOSFET (M 5 ) are connected in common with the drain and gate of the N-MOSFET (M 6 ), respectively, to configure a first switch circuit SW 1 . The drain and gate of the N-MOSFET (M 7 ) are connected in common with the drain and gate of the N-MOSFET (M 8 ), respectively, to configure a second switch circuit SW 2 . Diodes D 1  to D 4  are parasitic diodes of the MOSFETs (M 5  to M 8 ).  
         [0013]     In the voltage selection circuit shown in  FIG. 6 , a control signal IN (“H” or “L”) is input to the first inverter INV 1 . The output of the first inverter INV 1  is input to the second inverter INV 2 , the gate of the MOSFET (M 7 ), and the gate of the MOSFET (M 8 ). The output of the second inverter INV 2  is input to the gate of the MOSFET (M 5 ) and the gate of the MOSFET (M 6 ).  
         [0014]     A first input voltage V 1  is selected depending on the control signal IN and is applied to the source of the MOSFET (M 6 ). A second input voltage V 2  is selected depending on the control signal IN and is applied to the source of the MOSFET (M 8 ). The source of the MOSFET (M 5 ) and the source of the MOSFET (M 7 ) are connected in common and, through this connection line, an output voltage V 3  is output based on either the first input voltage V 1  or the second input voltage V 2  selected depending on the control signal IN.  
         [0015]     It is assumed that “H” is input as the control signal IN for the voltage selection circuit shown in  FIG. 6 . In this case, “H” is input to the gate of the MOSFET (M 5 ) and the gate of the MOSFET (M 6 ) and “L” is input to the gate of the MOSFETs (M 7 , M 8 ). Therefore, the switch circuit SW 1  is turned on while the switch circuit SW 2  is turned off, and the output voltage V 3  is output as a voltage based on the first input voltage V 1  in this case.  
         [0016]     On the other hand, if “H” is input as the control signal IN, “L” is input to the gate of the MOSFET (M 5 ) and the gate of the MOSFET (M 6 ) and “H” is input to the gate of the MOSFET (M 7 ) and the gate of the MOSFET (M 8 ). Therefore, the switch circuit SW 1  is turned off while the switch circuit SW 2  is turned on, and the output voltage V 3  is output as a voltage based on the second input voltage V 2  in this case (see, Japanese Patent Application Laid-Open Publication Nos. 1998-84271 and 2003-32090).  
         [0017]     By the way, in the circuit shown in  FIG. 5 , for example, if the control signal IN is “H”, the MOSFET (M 5 ) and the MOSFET (M 6 ) are turned on, and the MOSFET (M 7 ) and the MOSFET (M 8 ) are turned off. If V 1 +Vd 1 &lt;V 2  is satisfied in this situation (Vd 1  is a forward voltage of the parasitic diodes D 3 , D 4 ), the parasitic diodes D 3 , D 4  become conductive and an electric current is applied through a route of the parasitic diodes D 3 , D 4 →the MOSFETs (M 5 , M 6 ). Similarly, when the control signal IN is “L”, if V 2 +Vd 2 &lt;V 1  is satisfied (Vd 2  is a forward voltage of the parasitic diodes D 1 , D 2 ), the parasitic diodes D 1 , D 2  become conductive and an electric current is applied through a route of the parasitic diodes D 1 , D 2 →the MOSFETs (M 7 , M 8 ).  
         [0018]     On the other hand, in the circuit shown in  FIG. 6 , for example, if the control signal IN is “H”, the MOSFET (M 5 ) and the MOSFET (M 6 ) are turned on, and the MOSFET (M 7 ) and the MOSFET (M 8 ) are turned off. If V 1 &lt;Vss−Vt (Vt is a voltage necessary for turning on the MOSFET (M 7 )) and V 1 +Vd 3 &lt;V 2  (Vd 3  is a forward voltage of the parasitic diode D 4 ) are satisfied in this situation, the gate voltage of the MOSFET (M 7 )=Vss is satisfied; the output voltage V 3 =the first input voltage V 1  is satisfied because the MOSFET (M 5 ) and the MOSFET (M 6 ) are turned on; the gate-source voltage Vos of the MOSFET (M 7 )&gt;Vt is satisfied; and the MOSFET (M 7 ) is turned on. Therefore, an electric current is applied through a route of the parasitic diode D 4  of the MOSFET (M 7 )→the parasitic diode D 1  of the MOSFET (M 5 )→the MOSFET (M 6 ).  
         [0019]     Similarly, in the case of the control signal IN of “L”, if the above voltage relationship is satisfied, the MOSFET (M 6 ) is turned on and an electric current is applied through a route of the MOSFET (M 8 )→the MOSFET (M 7 ) →the parasitic diode D 1  of the MOSFET (M 5 ) →the MOSFET (M 6 ).  
         [0020]     Since the current loss occurs in either circuit of  FIGS. 5 and 6 , the output voltage V 3  becomes unstable, and the same voltage as the input voltage V 1  and the second input voltage V 2  cannot necessarily be acquired as the output voltage V 3 .  
         [0021]     The present invention was conceived in view of the above problems and it is therefore the object of the present invention to provide a voltage selection circuit that can output a voltage equivalent to the input voltage.  
       SUMMARY OF THE INVENTION  
       [0022]     In order to achieve the above object, according to an aspect of the present invention there is provided a voltage selection circuit comprising a first through a fourth inverters; a first switch circuit including a first MOSFET of N type and a second MOSFET of N type, respective drains thereof being connected in common; and a second switch circuit including a third MOSFET of N type and a fourth MOSFET of N type, respective drains thereof being connected in common, a common drive voltage being input to the first through fourth inverters, a control signal being input to the first inverter and the third inverter, the output of the first inverter being input to the second inverter and the gate of the fourth MOSFET, the output of the second inverter being input to the gate of the first MOSFET, the output of the third inverter being input to the fourth inverter and the gate of the third MOSFET, the output of the fourth inverter being input to the gate of the second MOSFET, a first input voltage selected depending on the control signal being input to the source of the second MOSFET, a second input voltage selected depending on the control signal being input to the source of the fourth MOSFET, the values of the drive voltage, the first input voltage, and the second input voltage being set for the first MOSFET or the third MOSFET such that each gate-source voltage thereof becomes higher than a gate-source threshold voltage at the time of turning on.  
         [0023]     According to the present invention, when “H” is input as the control signal, since the second MOSFET is turned on, the drain voltage of the first MOSFET is the first input voltage. Since the fourth MOSFET is turned off, the drain voltage of the third MOSFET is OPEN (high-impedance). Since “H” is input to the gate of the first MOSFET, the gate voltage of the first MOSFET is the drive voltage. Since “L” is input to the gate of the third MOSFET, the gate voltage of the third MOSFET is the first input voltage.  
         [0024]     If the current increases between the drain and the source of the first MOSFET, the source voltage of the first MOSFET approaches the first input voltage. Therefore, the gate-source voltage of the first MOSFET increases and, as a result, the source voltage (which is the output voltage) of the first MOSFET approaches the first input voltage. This positive feedback automatically and sufficiently turns on the first MOSFET and, as a result, the voltage equivalent to the first input voltage is acquired as the output voltage.  
         [0025]     When “L” is input as the control signal IN, since the fourth MOSFET is turned on, the drain voltage of the third MOSFET is the second input voltage. Since the second MOSFET is turned off, the drain voltage of the first MOSFET is OPEN (high-impedance). Since “H” is input to the gate of the third MOSFET, the gate voltage of the third MOSFET is the drive voltage. Since “L” is input to the gate of the first MOSFET, the gate voltage of the first MOSFET is the second input voltage.  
         [0026]     If the current increases between the drain and the source of the third MOSFET, the source voltage of the third MOSFET approaches the second input voltage. Therefore, the gate-source voltage of the third MOSFET increases and, as a result, the source voltage (which is the output voltage) of the third MOSFET approaches the second input voltage. This positive feedback automatically and sufficiently turns on the third MOSFET and, as a result, the voltage equivalent to the second input voltage V 2  is acquired as the output voltage.  
         [0027]     In the voltage selection circuit of the present invention, when “H” is input as the control signal IN, the voltage equivalent to the first input voltage is output as the output voltage and, on the other hand, when “L” is input as the control signal IN, the voltage equivalent to the second input voltage is output as the output voltage. Therefore, the voltage selection circuit of the present invention can stably output the voltage equivalent to the first input voltage or the second input voltage as the output voltage.  
         [0028]     In order to achieve the above object, according to another aspect of the present invention there is provided a voltage selection circuit comprising a first through a fourth inverters; a first switch circuit including a first MOSFET of P type and a second MOSFET of P type, respective drains thereof being connected in common; and a second switch circuit including a third MOSFET of P type and a fourth MOSFET of P type, respective drains thereof being connected in common, a common drive voltage being input to the first through fourth inverters, a control signal being input to the first inverter and the third inverter, the output of the first inverter being input to the second inverter and the gate of the fourth MOSFET, the output of the second inverter being input to the gate of the first MOSFET, the output of the third inverter being input to the fourth inverter and the gate of the third MOSFET, the output of the fourth inverter being input to the gate of the second MOSFET, a first input voltage selected depending on the control signal being input to the source of the second MOSFET, a second input voltage selected depending on the control signal being input to the source of the fourth MOSFET, the values of the drive voltage, the first input voltage, and the second input voltage being set for the first MOSFET or the third MOSFET such that each gate-source voltage thereof becomes higher than a gate-source threshold voltage at the time of turning on.  
         [0029]     According to the present invention, when “L” is input as the control signal, since the second MOSFET is turned on, the drain voltage of the first MOSFET is the first input voltage. Since the fourth MOSFET is turned off, the drain voltage of the third MOSFET is OPEN (high-impedance). Since “L” is input to the gate of the first MOSFET, the gate voltage of the first MOSFET is the drive voltage. Since “H” is input to the gate of the third MOSFET, the gate voltage of the third MOSFET is the first input voltage.  
         [0030]     If the current increases between the drain and the source of the first MOSFET, the source voltage of the first MOSFET approaches the first input voltage. Therefore, the gate-source voltage of the first MOSFET increases and, as a result, the source voltage (which is the output voltage) of the first MOSFET approaches the first input voltage. This positive feedback automatically and sufficiently turns on the first MOSFET and, as a result, the voltage equivalent to the first input voltage is acquired as the output voltage.  
         [0031]     When “H” is input as the control signal IN, since the fourth MOSFET is turned on, the drain voltage of the third MOSFET is the second input voltage. Since the second MOSFET is turned off, the drain voltage of the first MOSFET is OPEN (high-impedance). Since “L” is input to the gate of the third MOSFET, the gate voltage of the third MOSFET is the drive voltage. Since “H” is input to the gate of the first MOSFET, the gate voltage of the first MOSFET is the second input voltage.  
         [0032]     If the current increases between the drain and the source of the third MOSFET, the source voltage of the third MOSFET approaches the second input voltage. Therefore, the gate-source voltage of the third MOSFET increases and, as a result, the source voltage (which is the output voltage) of the third MOSFET approaches the second input voltage. This positive feedback automatically and sufficiently turns on the third MOSFET and, as a result, the voltage equivalent to the second input voltage V 2  is acquired as the output voltage.  
         [0033]     In the voltage selection circuit of the present invention, when “L” is input as the control signal IN, the voltage equivalent to the first input voltage is output as the output voltage and, on the other hand, when “H” is input as the control signal IN, the voltage equivalent to the second input voltage is output as the output voltage. Therefore, the voltage selection circuit of the present invention can stably output the voltage equivalent to the first input voltage or the second input voltage as the output voltage.  
         [0034]     The present invention can provide a voltage selection circuit that can stably output a voltage equivalent to an input voltage.  
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0035]     To understand the present invention and the advantages thereof more thoroughly, the following description should be referenced in conjunction with the accompanying drawings.  
         [0036]      FIG. 1  is a circuit diagram of a voltage selection circuit including MOSFETs, which is described as one embodiment of the present invention;  
         [0037]      FIG. 2  is an equivalent circuit explaining a state of a voltage input to each terminal of MOSFET (M 9 ) and MOSFET (M 11 ) shown as one embodiment of the present invention;  
         [0038]      FIG. 3  is an equivalent circuit explaining a state of a voltage input to each terminal of MOSFET (M 10 ) and MOSFET (M 12 ) shown as one embodiment of the present invention;  
         [0039]      FIG. 4  is a circuit diagram of a voltage selection circuit including MOSFETs, which is described as one embodiment of the present invention;  
         [0040]      FIG. 5  depicts an example of a voltage selection circuit; and  
         [0041]      FIG. 6  depicts another example of a voltage selection circuit.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0042]     From the contents of the description and the accompanying drawings, at least the following details will become apparent.  
       FIRST EMBODIMENT  
       [0043]      FIG. 1  depicts a circuit diagram of a voltage selection circuit including MOSFETs, which is described as one embodiment of the present invention. In  FIG. 1 , a P-MOSFET (M 1 ) and an N-MOSFET (M 2 ) configure a first inverter INV 1 . A P-MOSFET (M 3 ) and an N-MOSFET (M 4 ) configure a second inverter INV 2 . A P-MOSFET (M 5 ) and an N-MOSFET (M 6 ) configure a third inverter INV 3 . A P-MOSFET (M 7 ) and an N-MOSFET (M 8 ) configure a fourth inverter INV 4 .  
         [0044]     A drain of an N-MOSFET (M 9 ) (first MOSFET) and a drain of an N-MOSFET (M 10 ) (second MOSFET) are connected in common to configure a first switch circuit SW 1 . A drain of an N-MOSFET (M 11 ) (third MOSFET) and a drain of an N-MOSFET (M 12 ) (fourth MOSFET) are connected in common to configure a second switch circuit SW 2 . In  FIG. 1 , diodes D 1  to D 4  depicted along with the MOSFETs (M 9  to M 12 ) are parasitic diodes of the MOSFETs (M 9  to M 12 ).  
         [0045]     In the voltage selection circuit shown in  FIG. 1 , a control signal IN (“H” or “L”) is input to the first inverter INV 1  and the third inverter INV 3  in common. The output of the first inverter INV 1  is input to the second inverter INV 2  and the gate of the MOSFET (M 12 ). The output of the second inverter INV 2  is input to the gate of the MOSFET (M 9 ). The output of the third inverter INV 3  is input to the fourth inverter INV 4  and the gate of the MOSFET (M 11 ). The output of the fourth inverter INV 4  is input to the gate of the MOSFET (M 10 ). A drive voltage VDD is applied to the sources of the MOSFETs (M 1 , M 3 , M 5 , M 7 ).  
         [0046]     A second input voltage V 2 , which is selected depending on the control signal IN, is applied to the source of the MOSFET (M 2 ) and the source of the MOSFET (M 4 ). A first input voltage V 1 , which is selected depending on the control signal IN, is applied to the source of the MOSFET (M 6 ) and the source of the MOSFET (M 8 ). The source of the MOSFET (M 9 ) and the source of the MOSFET (M 11 ) are connected in common and, through this connection line, an output voltage V 3  is output based on either the first input voltage V 1  or the second input voltage V 2  selected depending on the control signal IN.  
         [0047]     It is assumed that “H” is input as the control signal IN for the voltage selection circuit shown in  FIG. 1 . In this case, “H” is input to the gate of the MOSFET (M 9 ) and the gate of the MOSFET (M 10 ). “L” is input to the gate of the MOSFET (M 11 ) and the gate of the MOSFET (M 12 ). Therefore, the switch circuit SW 1  is turned on while the switch circuit SW 2  is turned off, and a voltage based on the first input voltage V 1  is output as the output voltage V 3 .  
         [0048]      FIG. 2  is an equivalent circuit explaining a state of the voltage applied to each terminal of the MOSFET (M 9 ) and MOSFET (M 11 ) at this point. In  FIG. 2 , Cgs 1  is a parasitic capacitance between the gate and the source of the MOSFET (M 9 ) and Cgs 2  is a parasitic capacitance between the gate and the source of the MOSFET (M 11 ).  
         [0049]     As shown in  FIG. 2 , since the MOSFET (M 10 ) is turned on at this point, the drain voltage of the MOSFET (M 9 ) is the first input voltage V 1 . Since the MOSFET (M 12 ) is turned off, the drain voltage of the MOSFET (M 11 ) is OPEN (high-impedance). Since the MOSFET (M 3 ) is turned on at this point, the gate voltage of the MOSFET (M 9 ) is VDD and, since the MOSFET (M 6 ) is turned on, the gate voltage of the MOSFET (M 11 ) is the first input voltage V 1 .  
         [0050]     If the current increases between the drain and the source of the MOSFET (M 9 ), the source voltage of the MOSFET (M 9 ) approaches the first input voltage V 1 . Therefore, the gate-source voltage of the MOSFET (M 9 ) increases and, as a result, the source voltage (voltage of the output voltage V 3 ) of the MOSFET (M 9 ) approaches the first input voltage V 1 . This positive feedback automatically and sufficiently turns on the MOSFET (M 9 ) and, as a result, the voltage equivalent to the first input voltage V 1  is acquired as the output voltage V 3 .  
         [0051]     To make the MOSFET (M 9 ) conductive between the drain and the source when the MOSFET (M 11 ) is turned on, if Vth is a threshold voltage between the gate and the source of the MOSFET (M 9 ), the gate-source voltage VGS of the MOSFET (M 9 ) must satisfy a condition that VGS is higher than Vth (VGS&gt;Vth) (e.g., if the degrees of the parasitic capacitances Cgs 1 , Cgs 2  are the same, the above condition is (VDD−V 1 )/2&gt;Vth).  
         [0052]     On the other hand, if “L” is input as the control signal IN for the voltage selection circuit shown in  FIG. 1 , “L” is input to the gate of the MOSFET (M 9 ) and the gate of the MOSFET (M 10 ). “H” is input to the gate of the MOSFET (M 11 ) and the gate of the MOSFET (M 12 ). Therefore, the switch circuit SW 1  is turned off while the switch circuit SW 2  is turned on, and the output voltage V 3  is output as a voltage based on the second input voltage V 2 .  
         [0053]      FIG. 3  is an equivalent circuit explaining a state of the voltage input to each terminal of the MOSFET (M 10 ) and MOSFET (M 12 ) in this case. As shown in  FIG. 3 , since the MOSFET (M 12 ) is turned on, the drain voltage of the MOSFET (M 11 ) is the second input voltage V 2 . Since the MOSFET (M 10 ) is turned off, the drain voltage of the MOSFET (M 9 ) is OPEN (high-impedance). Since “H” is input to the gate of the MOSFET (M 11 ), the gate voltage of the MOSFET (M 11 ) is VDD. Since “L” is input to the gate of the MOSFET (M 9 ), the gate voltage of the MOSFET (M 9 ) is the second input voltage V 2 .  
         [0054]     If the current increases between the drain and the source of the MOSFET (M 11 ), the source voltage of the MOSFET (M 11 ) approaches the second input voltage V 2 . Therefore, the gate-source voltage of the MOSFET (M 11 ) increases and, as a result, the source voltage (voltage of the output voltage V 3 ) of the MOSFET (M 11 ) approaches the second input voltage V 2 . This positive feedback automatically and sufficiently turns on the MOSFET (M 11 ) and, as a result, the voltage equivalent to the second input voltage V 2  is acquired as the output voltage V 3 .  
         [0055]     To make the MOSFET (M 11 ) conductive between the drain and the source when the MOSFET (M 11 ) is turned on, if Vth is a threshold voltage between the gate and the source of the MOSFET (M 11 ), the gate-source voltage VGS of the MOSFET (M 11 ) must satisfy a condition that VGS is higher than Vth (VGS&gt;Vth) (e.g., if the degrees of the parasitic capacitances Cgsl, Cgs 2  are the same, the above condition is (VDD−V 2 )/2&gt;Vth).  
         [0056]     As described above, in the voltage selection circuit of the embodiment, when “H” is input as the control signal IN, the voltage equivalent to the first input voltage is output as the output voltage V 3  and, on the other hand, when “L” is input as the control signal IN, the voltage equivalent to the second input voltage is output as the output voltage V 3 . Therefore, the voltage selection circuit of the embodiment can stably output the voltage equivalent to the first input voltage V 1  or the second input voltage V 2  as the output voltage V 3  almost without current loss.  
         [0057]     To operate the voltage selection circuit including the above configuration as described above, if either “H” or “L” is input as the control signal IN, each value of VDD, the first input value V 1 , and the second input value V 2  must be set such that the condition of VGS&gt;Vth is satisfied when the MOSFET (M 9 ) or the MOSFET (M 11 ) is turned on.  
       SECOND EMBODIMENT  
       [0058]     By the way, although the switch circuits SW 1 , SW 2  are configured by using the N-MOSFETs, P-MOSFETs can be used to configure the switch circuits SW 1 , SW 2 .  
         [0059]      FIG. 4  is an example of a voltage selection circuit configured including the switch circuits SW 1 , SW 2  configured by using P-MOSFETs. In  FIG. 4 , the configurations of the first to fourth inverters INV 1  to INV 4  are the same as  FIG. 1 .  
         [0060]     A drain of a P-MOSFET (M 9 ) (first MOSFET) and a drain of a P-MOSFET (M 10 ) (second MOSFET) are connected in common to configure a first switch circuit SW 1 . A drain of a P-MOSFET (M 11 ) (third MOSFET) and a drain of a P-MOSFET (M 12 ) (fourth MOSFET) are connected in common to configure a second switch circuit SW 2 . In  FIG. 4 , diodes D 1  to D 4  depicted along with the MOSFETs (M 9  to M 12 ) are parasitic diodes of the MOSFETs (M 9  to M 12 ).  
         [0061]     The control signal IN (“H” or “L”) is input to the first inverter INV 1  and the third inverter INV 3  in common. The output of the first inverter INV 1  is input to the second inverter INV 2  and the gate of the MOSFET (M 12 ). The output of the second inverter INV 2  is input to the gate of the MOSFET (M 9 ). The output of the third inverter INV 3  is input to the fourth inverter INV 4  and the gate of the MOSFET (M 11 ). The output of the fourth inverter INV 4  is input to the gate of the MOSFET (M 10 ). A voltage VSS is applied to the sources of the MOSFETs (M 2 , M 4 , M 6 , M 8 ).  
         [0062]     A second input voltage V 2 , which is selected depending on the control signal IN, is applied to the source of the MOSFET (M 2 ) and the source of the MOSFET (M 4 ). A first input voltage V 1 , which is selected depending on the control signal IN, is applied to the source of the MOSFET (M 6 ) and the source of the MOSFET (M 8 ). The source of the MOSFET (M 9 ) and the source of the MOSFET (M 11 ) are connected in common and, through this connection line, an output voltage V 3  is output based on either the first input voltage V 1  or the second input voltage V 2  selected depending on the control signal IN.  
         [0063]     It is assumed that “L” is input as the control signal IN for the voltage selection circuit shown in  FIG. 4 . In this case, “L” is input to the gate of the MOSFET (M 9 ) and the gate of the MOSFET (M 10 ). “H” is input to the gate of the MOSFET (M 11 ) and the gate of the MOSFET (M 12 ). Therefore, the switch circuit SW 1  is turned on while the switch circuit SW 2  is turned off, and a voltage based on the first input voltage V 1  is output as the output voltage V 3 .  
         [0064]     If the current increases between the drain and the source of the MOSFET (M 9 ), the source voltage of the MOSFET (M 9 ) approaches the first input voltage V 1 . Therefore, the gate-source voltage of the MOSFET (M 9 ) increases and, as a result, the source voltage (voltage of the output voltage V 3 ) of the MOSFET (M 9 ) approaches the first input voltage V 1 . This positive feedback automatically and sufficiently turns on the MOSFET (M 9 ) and, as a result, the voltage equivalent to the first input voltage V 1  is acquired as the output voltage V 3 .  
         [0065]     To make the MOSFET (M 9 ) conductive between the drain and the source when the MOSFET (M 11 ) is turned on, if Vth is a threshold voltage between the gate and the source of the MOSFET (M 9 ), the gate-source voltage VGS of the MOSFET (M 9 ) must satisfy a condition that VGS is higher than Vth (VGS&gt;Vth) (e.g., if the degree of the parasitic capacitance Cgs 1  between the gate and the source of the MOSFET (M 9 ) is equivalent to the degree of the parasitic capacitance Cgs 2  between the gate and the source of the MOSFET (M 11 ), the above condition is (V 1 −VSS)/2&gt;Vth).  
         [0066]     On the other hand, if “H” is input as the control signal IN for the voltage selection circuit shown in  FIG. 4 , “H” is input to the gate of the MOSFET (M 9 ) and the gate of the MOSFET (M 10 ). “L” is input to the gate of the MOSFET (M 11 ) and the gate of the MOSFET (M 12 ). Therefore, the switch circuit SW 1  is turned off while the switch circuit SW 2  is turned on, and the output voltage V 3  is output as a voltage based on the second input voltage V 2 .  
         [0067]     If the current increases between the drain and the source of the MOSFET (M 11 ), the source voltage of the MOSFET (M 11 ) approaches the second input voltage V 2 . Therefore, the gate-source voltage of the MOSFET (M 11 ) increases and, as a result, the source voltage (voltage of the output voltage V 3 ) of the MOSFET (M 11 ) approaches the second input voltage V 2 . This positive feedback automatically and sufficiently turns on the MOSFET (M 11 ) and, as a result, the voltage equivalent to the second input voltage V 2  is acquired as the output voltage V 3 .  
         [0068]     To make the MOSFET (M 11 ) conductive between the drain and the source when the MOSFET (M 11 ) is turned on, if Vth is a threshold voltage between the gate and the source of the MOSFET (M 11 ), the gate-source voltage VGS of the MOSFET (M 11 ) must satisfy a condition that VGS is higher than Vth (VGS&gt;Vth) (e.g., if the degree of the parasitic capacitance Cgs 1  between the gate and the source of the MOSFET (M 9 ) is equivalent to the degree of the parasitic capacitance Cgs 2  between the gate and the source of the MOSFET (M 11 ), the above condition is (V 2 −VSS)/ 2 &gt;Vth).  
         [0069]     The voltage selection circuit can be configured by using the P-MOSFETs for the switch circuits SW 1 , SW 2  as above. In the voltage selection circuit of the embodiment, when “L” is input as the control signal IN, the voltage equivalent to the first input voltage is output as the output voltage V 3  and, on the other hand, when “H” is input as the control signal IN, the voltage equivalent to the second input voltage is output as the output voltage V 3 . Therefore, the voltage selection circuit of the embodiment can stably output the voltage equivalent to the first input voltage V 1  or the second input voltage V 2  as the output voltage V 3  almost without current loss.  
         [0070]     To operate the voltage selection circuit including the above configuration as described above, if either “L” or “H” is input as the control signal IN, each value of VSS, the first input value V 1 , and the second input value V 2  must be set such that the condition of VGS&gt;Vth is satisfied when the MOSFET (M 9 ) or the MOSFET (M 11 ) is turned on.  
         [0071]     Although one embodiment of the present invention has been described in detail, the above embodiments are for the purpose of facilitating the understanding of the present invention and do not limit the present invention. The present invention may be changed/altered without departing from the spirit thereof and the present invention naturally encompasses the equivalents thereof.