Abstract:
A leadframe design (and method of forming the leadframe design), comprising: an inner die pad structure lying in a first plane; and an outer die pad structure supported by outer tie bars and connected to the inner die pad by inner tie bars. The outer die pad structure lying in a second plane spaced apart from the inner die pad structure first plane. An outer package surrounds at least the inner die pad structure and the inner tie bars. The outer die pad structure being supported by the outer tie bars. The outer package having outer walls. Lead fingers extend through the outer package outer walls and include respective inner portions extending into the outer package proximate the inner and outer die pad structures. The inner portions of the lead fingers lie in a third plane, wherein at least one of the inner die pad structure first plane and the outer die pad structure second plane lie outside of the lead finger inner portions third plane and wherein a first chip is affixed to the inner die pad structure and a second chip is affixed to the outer die pad structure.

Description:
FIELD OF THE INVENTION  
         [0001]    The present invention relates generally to electronic packaging and specifically to leadframe designs having electrically isolating stacked dies and methods of forming same.  
         BACKGROUND OF THE INVENTION  
         [0002]    Current practice involves electrical isolation of the two stacked dies from each other and the leadframe using an electrically insulating die attach material. However, several problems exist when using current practice methods/electrical isolation techniques such as: potential for resin bleeding (contamination of the bond pad near the bottom encapsulant material layer) and contamination of wire bond pads; potential for damage of the lead wires of the lower die during wirebonding of the upper die and during subsequent handling; potential for a lower moisture sensitive level (MSL) because of the larger die attachment interface areas for both the lower and upper dies; a third element is required to create a Z-axis spacing between the two stacked dies by using either a film or a silicon/ceramic spacer; and a leadframe having a large die pad down-set value is needed which may not be manufacturable in high volume.  
           [0003]    The moisture sensitive level (MSL) is an important factor to be considered during package design. The MSL determines how long an assembler can keep the parts “on the shelf” before they must be surface mounted on boards. MSL level  1  components are the most desirable and essentially would have an indefinite shelf life. MSL level  2  components have about a one year shelf life and MSL level  3  components only have a one week self life before moisture contamination would render the components unreliable/unusable. Moisture can cause delamination or voids, usually at the chip/die pad interface.  
           [0004]    U.S. Pat. No. 6,261,865 B1 to Akram describes a multi-chip semiconductor package using a lead-on-chip lead frame and method of construction.  
           [0005]    U.S. Pat. No. 6,087,722 to Lee et al. describes a multi-chip package that does not include a die pad.  
           [0006]    U.S. Pat. No. 6,118,176 to Tao et al. describes a stacked chip assembly generally includes a first chip, a second chip and a lead frame.  
           [0007]    U.S. Pat. No. 6,297,547 B1 to Akram describes a multiple die package in which a first and second die are mounted on a leadframe.  
           [0008]    U.S. Pat. No. 5,814,881 to Alagaratnam et al. describes a stacked integrated chip package and method of making same.  
           [0009]    U.S. Pat. No. Re. 36,613 to Ball describes a multiple stacked die device that contains up to four dies and permits close-tolerance stacking by a low-loop-profile wire-bonding operation and a thin-adhesive layer between the stacked dies.  
           [0010]    U.S. Pat. No. 6,080,264 to Ball describes an apparatus and method for increasing integrated circuit density comprising utilizing chips with both direct (flip chip type) chip to conductors connection technology and wire bonds and/or tape automated bonding (TAB).  
           [0011]    U.S. Pat. No. 6,087,718 to Cho describes a stacked-type semiconductor chip package of a lead-on chip structure which is modified for stacking chips in the package.  
           [0012]    U.S. Pat. No. 6,307,257 B1 to Huang et al. describes a dual-chip integrated circuit (IC) package with a chip-die pad formed form leadframe leads.  
           [0013]    U.S. Pat. No. 6,337,521 B1 to Masuda describes a semiconductor device and a method of manufacturing the same. The device comprising two semiconductor chips stacked on each other with their backs opposite to each other and sealed with a mold resin.  
         SUMMARY OF THE INVENTION  
         [0014]    Accordingly, it is an object of one or more embodiments of the present invention to provide electrically isolated stacked die leadframe design packages and methods of forming same.  
           [0015]    Additional objects of one or more embodiments of the present invention is to provide electrically isolated stacked die leadframe design packages: (a) having higher reliability; (b) providing more ways of die stacking such as one down-set, two down-sets and up-set combination; and (c) manufacturability in high volume and methods of forming same.  
           [0016]    Other objects will appear hereinafter.  
           [0017]    It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a leadframe design (and method of forming the leadframe design) is provided comprising: an inner die pad structure lying in a first plane; and an outer die pad structure supported by outer tie bar and connected to the inner die pad by inner tie bars. The outer die pad structure lying in a second plane spaced apart from the inner die pad structure first plane. An outer package surrounds at least the inner die pad structure and the inner tie bars. The outer die pad structure being supported by the outer tie bars. The outer package having outer walls. Lead fingers extend through the outer package outer walls and include respective inner portions extending into the outer package proximate the inner and outer die pad structures. The inner portions of the lead fingers lie in a third plane, wherein at least one of the inner die pad structure first plane and the outer die pad structure second plane lie outside of the lead finger inner portions third plane and wherein a first chip is affixed to the inner die pad structure and a second chip is affixed to the outer die pad structure.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]    The features and advantages of the method of the present invention will be more clearly understood from the following description taken in conjunction with the accompanying drawings in which like reference numerals designate similar or corresponding elements, regions and portions and in which:  
         [0019]    FIGS.  1  to  4  schematically illustrate the single down-set first embodiment of the present invention with FIG. 1 being the cross-sectional view of FIG. 4 at line  1 - 1 ; FIG. 2 being a plan view of a FIG. 1 quad package without the stacked dies/chips; FIG. 3 being a plan view of a FIG. 1 dual in-line package without the stacked dies/chips and FIG. 4 being a plan, partial cut-away view of a FIG. 1 quad package showing the stacked dies/chips.  
         [0020]    FIGS.  5  to  7  schematically illustrate the double down-set second embodiment of the present invention with FIG. 6 being a plan view of a FIG. 5 quad package without the stacked dies/chips and FIG. 7 being a plan view of a FIG. 5 dual in-line package without the stacked dies/chips.  
         [0021]    [0021]FIG. 8 schematically illustrates a cross-sectional view of the single upset heat sink third embodiment of the present invention.  
         [0022]    [0022]FIG. 9 schematically illustrates a cross-sectional view of the same size die/chip up &amp; down-set fourth embodiment of the present invention.  
         [0023]    [0023]FIG. 10 schematically illustrates a cross-sectional view of the same size die/chip up &amp; down-set fifth embodiment of the present invention using a mirror image die.  
         [0024]    [0024]FIG. 11 schematically illustrates a cross-sectional view of the same size die/chip up &amp; down-set sixth embodiment using a flipped die pad.  
         [0025]    [0025]FIGS. 12 and 13 schematically illustrates the up &amp; down-set seventh embodiment using a two pass process for the die attachment and wire bonding with an inner die pad lead finger attachment (grounding); FIG. 13 being a plan view of the seventh embodiment without a ring and without illustrating stacked dies/chips; FIG. 12 is a cross-sectional view of FIG. 13 along line  12 - 12  (plus the stacked dies/chips).  
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
     Characteristics Common to the First Through Sixth Embodiments (FIGS.  1  to  11 )  
       [0026]    The inventors have discovered the following semiconductor package for packaging stacked dies/chips. Specifically, the package has two die pads with differing elevations that consist of a window shape with an outer ring and a center die pad supported by tie bars.  
         [0027]    Using these features, it is possible to have various combinations of the die pads in relation to the lead fingers, including:  
         [0028]    a) only the inner die pad is down set (the first embodiment illustrated in FIGS.  1  to  4 );  
         [0029]    b) die pad with double set down, i.e. the inner die pad and the outer ring die pad are down set (the second embodiment illustrated in FIGS.  5  to  7 );  
         [0030]    c) only the outer ring die pad is up set (negative down set) (the third embodiment illustrated in FIG. 8);  
         [0031]    d) up set (negative down set) of the outer ring die pad and down set of the inner die pad (the fourth embodiment illustrated in FIG. 9, and the fifth embodiment illustrated in FIG. 10); and  
         [0032]    e) up set (negative down set) of the inner die pad and down set of the outer ring die pad (the sixth embodiment illustrated in FIG. 11).  
         [0033]    The generally benefits and advantages of the present invention include: the die attachment interface area is reduced; the packages are made more robust, i.e. there is less stress created at the die pads; there is lower stress in the die attachment interfaces; the packages are less sensitive to moisture adsorption, i.e. the MSL level is improved; and the double down-set leadframe embodiments are well suited for die stacking. Please see the individual descriptions of the individual embodiments for additional benefits and advantages.  
         [0034]    Alternatively, in the seventh embodiment, and as shown in FIGS. 12 and 13, the inventors have discovered a semiconductor package for packaging stacked dies/chips that consists of discrete outer die pads affixed to the tie bars and a center pad supported by tie bars. In this alternative, the outer ring shaped die pad is not needed.  
         [0035]    It is noted that the inner die pad can be of any shape as long as it is within the area of die encircled by the bond pads.  
       First Embodiment—Single Down-Set of the Inner/Center Die Pad  12 ; FIGS.  1  to  4   
       [0036]    As shown in FIGS.  1  to  4 , the first embodiment of the present invention illustrates a package  10  having a leadframe design where there is a single down-set of only the inner/center die pad  12  in relation to the inner portions  20  of lead fingers  16 .  
         [0037]    Lead fingers  16  include an outer portion  18  exterior of package  10 , and an inner portion  20  within package  10 .  
         [0038]    Inner/center die pad  12  is spaced downwardly (down-set) from inner portions  20  of lead fingers  16  as at  22  from preferably about 100 to 1000 μm and more preferably from about 200 to 500 μm.  
         [0039]    Outer ring die pad  14  is substantially in the same plane as the inner portions  20  of lead fingers  16  as shown in FIG. 1.  
         [0040]    As more clearly illustrated in FIGS. 2 and 3, inner/center die pad  12  is generally a solid structure connected to ring-shaped outer ring die pad  14  by inner tie bars  15 . Outer ring die pad  14  is positioned within package  10  using outer tie bars  24 . FIG. 2 illustrates a quad package  10  using the structure of FIG. 1 (without showing the dies/chips  26 ,  30 ) while FIG. 3. illustrates a dual in-line package  10  using the structure of FIG. 1 (without showing the dies/chips  26 ,  30 ).  
         [0041]    Lower die/chip  26  is affixed to inner/center die pad  12  using die attachment (D/A) resin  28  and upper die/chip  30  is affixed to outer ring die pad  14  using D/A resin  32 . Then, lower lead wires  34  are connected to the upper surface of inner portion  20  of lead fingers  16  and to the upper surface of lower die/chip  26  by wire bonding. Then, upper lead wires  36  are connected to the upper surface of finger leads  16  and to the upper surface of upper die/chip  30  by wire bonding.  
         [0042]    An encapsulant material  40  is then formed around the lower and upper die/chips  26 ,  30 , lead wires  34 ,  36 , inner/center die pad  12 , outer ring die pad  14 , etc. to complete package  10 .  
         [0043]    As shown in FIGS. 1 and 4, lower die/chip  26  is larger, i.e. wider and longer, than upper die/chip  30  to facilitate the wire bonding pattern.  
         [0044]    It is noted that the die attachment interfaces for the inner/center die pad  12  to the lower die/chip  26  using resin  28  and for the outer ring die pad  14  to the upper die/chip  30  using resin  32  are greatly reduced compared to conventional attachment interfaces.  
         [0045]    The benefits and advantages of the first embodiment include: no die attach resin bleeding issues for the bottom die; smaller die attachment interfaces for both dies which reduces the sensitivity to moisture adsorption and improves the MSL of the package; and less sensitivity to popcorning. Popcorning refers to package failure during solder reflow temperature excursion due to steam pressure created from the moisture absorbed where the failure is usually at the material interfaces which are the weak links.  
       Second Embodiment—Double Down-Set of Both the Inner/Center Die Pad  112  and the Outer Ring Die Pad  114 ; FIGS.  5  to  7   
       [0046]    As shown in FIGS.  5  to  7 , the second embodiment of the present invention is similar to the first embodiment (FIGS.  1  to  4 ) except that in this leadframe design, both the inner/center die pad  112  and the outer ring die pad  114  are down-set in relation to the inner portions  120  of lead fingers  116 , and the backside  125  of the lower die/chip  126  is exposed. (The reference numerals for the second embodiment correspond to the reference numbers in the description in the first embodiment plus one-hundred, e.g. the inner/center die pad  12  of the first embodiment is the inner/center die pad  112  of the second embodiment, etc.)  
         [0047]    Inner/center die pad  112  is spaced downwardly (down-set) from the inner portions  120  of lead fingers  116  as at  122  from preferably about 300 to 100 μm and more preferably from about 350 to 800 μm.  
         [0048]    Outer ring die pad  114  is spaced downwardly (down-set) from the inner portions  120  of lead fingers  116  as at  121  from preferably about 150 to 500 μm and more preferably from about 150 to 300 μm.  
         [0049]    Lower die/chip  126  is affixed to inner/center die pad  112  using die attachment (D/A) resin  128  and upper die/chip  130  is affixed to outer ring die pad  114  using D/A resin  132 . Then, lower lead wires  134  are connected to the upper surface of the inner portion  120  of the lead fingers  116  and to the upper surface of lower die/chip  126  by wire bonding. Then, upper lead wires  136  are connected to the upper surface of the inner portion of  120  of lead fingers  116  and to the upper surface of upper die/chip  130  by wire bonding.  
         [0050]    An encapsulant material  140  is then formed around the lower and upper die/chips  126 ,  130 , lead wires  134 ,  136 , inner/center die pad  112 , outer ring die pad  114 , etc. to complete package  110 . However, it is noted that in the second embodiment, encapsulant material  140  does not surround the backside  125  of lower die/chip  126  to complete package  110  and thus exposes the backside  125  of the lower semiconductor chip  126 . To improve the efficiency of heat dispation from package  110  to beneath printed circuit board (not shown), a heat conductive layer  142  may be interposed between the backside  125  of lower die/chip  126  when package  110  is attached to the motherboard (not shown).  
         [0051]    As shown in FIG. 5, lower die/chip  126  is larger, i.e. wider and longer, than upper die/chip  130  to facilitate the wire bonding pattern. FIG. 6 illustrates, inter alia, a quad package  110  using the structure of FIG. 5 (without showing the dies/chips  126 ,  130 ) while FIG. 7. illustrates, inter alia, a dual in-line package  110  using the structure of FIG. 5 (without showing the dies/chips  126 ,  130 ).  
         [0052]    It is noted that the die attachment interfaces for the inner/center die pad  112  to the lower die/chip  126  using resin  128  and for the outer ring die pad  114  to the upper die/chip  130  using resin  132  are greatly reduced compared to conventional attachment interfaces.  
         [0053]    The second embodiment is an extension of the concepts of the first embodiment, and the further benefits and advantages of the second embodiment include having an exposed backside  125  of the lower die/chip  126  which provide an option to connect it to beneath printed circuit board (not shown) using a thermally conductive material for thermal enhancement.  
       Third Embodiment—Single Up-Set of the Outer Ring Die Pad  214  With Heat Sink  
       [0054]    As shown in FIG. 8, the third embodiment of the present invention is again similar to the first embodiment (FIGS.  1  to  4 ) except that in this leadframe design, only the outer ring die pad  214  is up-set in relation to the inner portions  220  of the lead fingers  216 , and a heatspreader  250  is affixed to the backside  225 . (The reference numerals for the third embodiment correspond to the reference numbers in the description in the first embodiment plus two-hundred, e.g. the inner/center die pad  12  of the first embodiment is the inner/center die pad  212  of the third embodiment, etc.)  
         [0055]    Inner/center die pad  212  is substantially in the same plane as the inner portions  220  of lead fingers  16  as shown in FIG. 8. Inner/center die pad  212  may be down-set if necessary. But to make the leadframe design simpler/manufacturable, and to enable simpler leadframe clamping during assembly process, it is preferable to have die pad  212  in the same plane as lead fingers  220 . Note that for either case, the combined thickness of bottom die and heatspreader is critical to have the bottom side of heat sink exposed.  
         [0056]    Outer ring die pad  214  is spaced upwardly (up-set) from the inner portions  220  of lead fingers  216  as at  221  from preferably about 100 to 800 μm and more preferably from about 200 to 500 μm.  
         [0057]    A heatspreader  250  is affixed to the backside  225  of lower die/chip  226  and the encapsulant material  240  does not surround the backside  251  of heatspreader  250  to complete package  210 . Leaving the backside  225  of heatspreader  250  exposed increases the efficiency of heat dissipation from package  210 . Optionally, an additional heat conductive layer  242  may be interposed between the backside  225  of lower die/chip  226  when package  210  is attached to the motherboard (not shown).  
         [0058]    The heatspreader  250  can be pre-attached to the leadframe (i.e., heatspreader  250  can be attached to leadframe using adhesive tape or laser-welded to leadframe before die attach process) before the backside  225  of the lower die/chip  226  is attached to the heatspreader  250 . The lower die/chip  226  is then affixed to inner/center die pad  212  using die attachment (D/A) resin  228  and upper die/chip  230  is affixed to outer ring die pad  214  using D/A resin  232 . Then, lower lead wires  234  are connected to the upper surface of finger leads  216  and to the upper surface of lower die/chip  226  by wire bonding. Then, upper lead wires  236  connected to the upper surface of finger leads  16  and to the upper surface of upper die/chip  30  by wire bonding.  
         [0059]    Alternately, heatspreader  250  is affixed to the backside  225  of the lower die/chip  226  last instead of first. For instance, heatspreader  250  can be integrated into the package by dropping it into the cavity-up mold chase prior to molding process.  
         [0060]    An encapsulant material  240  is then formed around the lower and upper die/chips  226 ,  230 , lead wires  234 ,  236 , inner/center die pad  212 , outer ring die pad  214 , etc. to complete package  210 .  
         [0061]    As shown in FIG. 8, lower die/chip  226  is larger, i.e. wider and longer, than upper die/chip  230  to facilitate the wire bonding pattern.  
         [0062]    It is noted that the die attachment interfaces for the inner/center die pad  212  to the lower die/chip  226  using resin  228  and for the outer ring die pad  214  to the upper die/chip  230  using resin  232  are greatly reduced compared to conventional attachment interfaces.  
         [0063]    The third embodiment is an extension of the concepts of the second embodiment, and the further benefits and advantages of the third embodiment include having an exposed heatspreader  250  to provide improved thermal performance as compared to the second embodiment.  
       Fourth Embodiment—Up-Set of the Outer Ring Die Pad  314  and Down-Set of the Inner/Center Die Pad  312  Using Same Sized Lower and Upper Dies/Chips  326 ,  330   
       [0064]    As shown in FIG. 9, the fourth embodiment of the present invention is also similar to the first embodiment (FIGS.  1  to  4 ) except that in this leadframe design, the outer ring die pad  314  is up-set in relation to the inner portions  320  of the lead fingers  316  and the inner/center die pad  312  is down-set in relation to the inner portions  320  of the lead fingers  316  using same sized lower and upper dies/chips  326 ,  330 . (The reference numerals for the fourth embodiment correspond to the reference numbers in the description in the first embodiment plus three-hundred, e.g. the inner/center die pad  12  of the first embodiment is the inner/center die pad  312  of the fourth embodiment, etc.)  
         [0065]    Inner/center die pad  312  is spaced downwardly (down-set) from the inner portions  320  of lead fingers  316  as at  322  from preferably about 100 to 800 μm and more preferably from about 200 to 500 μm.  
         [0066]    Outer ring die pad  314  is spaced upwardly (up-set) from the inner portions  320  of lead fingers  316  as at  321  from preferably about 100 to 800 μm and more preferably from about 200 to 500 μm.  
         [0067]    In the fourth embodiment, a two pass process is used for the die  326 ,  330  attachments and wire bonding. First, lower die/chip  326  is affixed to inner/center die pad  312  using die attachment (D/A) resin  328  and lower lead wires  334  are then connected to the upper surface of lead fingers  316  and to the upper surface of lower die/chip  326  by wire bonding. Then, upper die/chip  330  is affixed to outer ring die pad  314  using D/A resin  332  and upper lead wires  336  are then connected to the upper surface of lead fingers  316  and to the upper surface of upper die/chip  330  by wire bonding.  
         [0068]    An encapsulant material  340  is then formed around the lower and upper die/chips  326 ,  330 , lead wires  334 ,  336 , inner/center die pad  312 , outer ring die pad  314 , etc. to complete package  310 .  
         [0069]    As noted, the lower and upper dies/chips  326 ,  330  are the same size. Both die  326 ,  330  need not be the same size. But the upper die  330  can be of the same size or even slightly larger than the lower die  326 , depending on the z height difference between down-set and up-set. So the separation of the die enables same size die stacking. Same size die  326 ,  330  stacking advantages: (a) allows combination of identical die into a single package and (b) allows more freedom in die combination as this configuration increases the maximum upper die size; helps designer to choose the upper die with an increased size range.  
         [0070]    It is noted that the die attachment interfaces for the inner/center die pad  312  to the lower die/chip  326  using resin  328  and for the outer ring die pad  314  to the upper die/chip  330  using resin  332  are greatly reduced compared to conventional attachment interfaces.  
         [0071]    The fourth embodiment is an extension of the concepts of the third embodiment, and the further benefits and advantages of the third embodiment include: not requiring a spacer between the lower and upper dies/chips  326 ,  330  (Prior art that allow combination of same size die stacking do have a spacer to create separation between them. This spacer is a ‘third element’ between the two die and increases cost and number of process steps.) and the combination of the down-set of the lower die/chip  326  and the up-set of the upper die/chip  330  achieve a separation between the dies/chips  326 ,  330  that is within high volume manufacturable limits.  
       Fifth Embodiment—Up-Set of the Outer Ring Die Pad  414  and Down-Set of the Inner/Center Die Pad  412  Using Same Sized Lower and Upper Dies/Chips  426 ,  430 ; Alternate Attachment of Lower Lead Wires  434   
       [0072]    As shown in FIG. 10, the fifth embodiment of the present invention is also similar to the first embodiment (FIGS.  1  to  4 ) except that in this leadframe design, the outer ring die pad  414  is up-set in relation to the inner portions  420  of the lead fingers  416  and the inner/center die pad  412  is down-set in relation to the inner portions  420  of the lead fingers  416  using same sized lower and upper dies/chips  426 ,  430 . (The reference numerals for the fifth embodiment correspond to the reference numbers in the description in the first embodiment plus four-hundred, e.g. the inner/center die pad  12  of the first embodiment is the inner/center die pad  412  of the fifth embodiment, etc.)  
         [0073]    Inner/center die pad  412  is spaced downwardly (down-set) from the inner portions  420  of lead fingers  416  as at  422  from preferably about 100 to 800 μm and more preferably from about 150 to 500 μm.  
         [0074]    Outer ring die pad  414  is spaced upwardly (up-set) from the inner portions  420  of lead fingers  416  as at  421  from preferably about 100 to 800 μm and more preferably from about 150 to 500 μm.  
         [0075]    As opposed to the fourth embodiment (FIG. 9), the lower lead wires  434  are connected to the lower surface of lead fingers  416  and to the lower surface of lower die/chip  426  by wire bonding.  
         [0076]    An encapsulant material  440  is then formed around the lower and upper die/chips  426 ,  430 , lead wires  434 ,  436 , inner/center die pad  412 , outer ring die pad  414 , etc. to complete package  410 .  
         [0077]    It is noted that the die attachment interfaces for the inner/center die pad  412  to the lower die/chip  426  using resin  428  and for the outer ring die pad  414  to the upper die/chip  430  using resin  432  are greatly reduced compared to conventional attachment interfaces.  
         [0078]    The fifth embodiment has the same further benefits and advantages of the fourth embodiment with the further additional benefit and advantage of having lower mechanical stress level in the smaller die attach interface areas for both lower and upper die during; assembly process.  
       Sixth Embodiment—Reverse Form Down-Set of the Outer Ring Die Pad  514  and Up-Set of the Inner/Center Die Pad  512  Using Same Sized Lower and Upper Dies/Chips  526 ,  530 ; Alternate Attachment of Lower Lead Wires  534   
       [0079]    As shown in FIG. 11, the sixth embodiment of the present invention is also similar to the first embodiment (FIGS.  1  to  4 ) except that in this leadframe design, the outer ring die pad  514  is down-set in relation to the inner portions  520  of the lead fingers  516  and the inner/center die pad  512  is up-set in relation to the inner portions  520  of the lead fingers  516  using same sized lower and upper dies/chips  526 ,  530 . (The reference numerals for the sixth embodiment correspond to the reference numbers in the description in the first embodiment plus four-hundred, e.g. the inner/center die pad  12  of the first embodiment is the inner/center die pad  512  of the sixth embodiment, etc.)  
         [0080]    The sixth embodiment is most similar to the fifth embodiment (FIG. 10) except for the reverse form of attaching: (1) the lower die/chip  526  to the down-set outer ring die pad  514  (instead of the inner/center die pad); and the upper die/chip  530  to the up-set inner/center die pad  512  (instead of to the outer ring die pad).  
         [0081]    Inner/center die pad  512  is spaced upwardly (up-set) from the inner portions  520  of lead fingers  516  as at  521  from preferably about 100 to 800 μm and more preferably from about 150 to 500 μm.  
         [0082]    Outer ring die pad  514  is spaced downwardly (down-set) from the inner portions  520  of lead fingers  516  as at  522  from preferably about 100 to 800 μm and more preferably from about 150 to 500 μm.  
         [0083]    As in the fifth embodiment, the lower lead wires  534  are connected to the lower surface of inner lead portion  520  of lead fingers  516  and to the lower surface of lower die/chip  526  by wire bonding.  
         [0084]    An encapsulant material  540  is then formed around the lower and upper die/chips  526 ,  530 , lead wires  534 ,  536 , inner/center die pad  512 , outer ring die pad  514 , etc. to complete package  510 .  
         [0085]    It is noted that the die attachment interfaces for the inner/center die pad  512  to the upper die/chip  530  using resin  528  and for the outer ring die pad  514  to the lower die/chip  526  using resin  532  are greatly reduced compared to conventional attachment interfaces.  
         [0086]    The sixth embodiment has the same further benefits and advantages of the fourth and fifth embodiments.  
       Seventh Embodiment—Up-Set of the Outer Non-Ring Die Pad  614  and Down-Set of the Inner/Center Die Pad  612   
       [0087]    As shown in FIGS. 12 and 13, the seventh embodiment of the present invention is also similar to the first embodiment (FIGS.  1  to  4 ) except that in this leadframe design, the outer die pads  614  are not in the shape of an outer ring and the outer die pads  614  are up-set in relation to the inner portions  620  of the lead fingers  616  and the inner/center die pad  612  is down-set in relation to the inner portions  320  of the lead fingers  316  using same sized lower and upper dies/chips  326 ,  330 . (The reference numerals for the seventh embodiment correspond to the reference numbers in the description in the first embodiment plus six-hundred, e.g. the inner/center die pad  12  of the first embodiment is the inner/center die pad  612  of the seventh embodiment, etc.)  
         [0088]    As noted, and as more clearly illustrated in FIG. 13, outer die pads  614  are separate die pads  614  interposed between respective outer tie bars  624  and inner tie bars  615 .  
         [0089]    Inner/center die pad  612  is spaced downwardly (down-set) from the inner portions  620  of lead fingers  616  as at  622  from preferably about 100 to 800 μm and more preferably from about 150 to 500 μm.  
         [0090]    Outer die pads  614  are spaced upwardly (up-set) from the inner portions  620  of lead fingers  616  as at  621  from preferably about 100 to 800 μm and more preferably from about 150 to 800 μm.  
         [0091]    As shown in FIGS. 12 and 13, lower die/chip  626  is larger, i.e. wider and longer, than upper die/chip  630  to facilitate the wire bonding pattern.  
         [0092]    It is noted that the die attachment interfaces for the inner/center die pad  612  to the lower die/chip  626  using resin  628  and for the outer die pads  614  to the upper die/chip  630  using resin  632  are greatly reduced compared to conventional attachment interfaces.  
         [0093]    In the seventh embodiment, a two pass process is used for the die  626 ,  3630  attachments and wire bonding. First, lower die/chip  626  is affixed to inner/center die pad  612  using die attachment (D/A) resin  628 ; lower lead wires  634  are then connected to the upper surface of inner portion  620  of lead fingers  616  and to the upper surface of lower die/chip  626  by wire bonding and grounding lead wires  662  are connected from the upper surface of lower die/chip  626  to the upper surface of inner/center die pad  612  by wire bonding. Then, upper die/chip  630  is affixed to the outer die pads  614  using D/A resin  632  and upper lead wires  636  are then connected to the upper surface of finger leads  616  and to the upper surface of upper die/chip  630  by wire bonding.  
         [0094]    An encapsulant material  640  is then formed around the lower and upper die/chips  626 ,  630 , lead wires  634 ,  636 , grounding lead wires  662 , inner/center die pad  612 , outer ring die pad  614 , etc. to complete package  610 .  
         [0095]    The further benefits and advantages of the seventh embodiment include: ground bonding can be made from the lower die/chip  626  to the inner/center die pad  612  and the ring-shaped outer ring die pad is replaced by discrete die pads  614  on the tie bars  615 ,  624  in that ‘ground bonding’ increases the electrical performance of the die in the package: higher operating speed with lesser interference between the leads.  
         [0096]    While particular embodiments of the present invention have been illustrated and described, it is not intended to limit the invention, except as defined by the following claims.