Abstract:
The present disclosure discloses a mask plate and processes for manufacturing an ultraviolet mask plate and an array substrate. The present disclosure relates to the field of display technology and can reduce costs for manufacturing ultraviolent mask plates. The mask plate comprises a transparent area, a semi-transparent area, and a non-transparent area, wherein the transparent area and the non-transparent area correspond to a frame glue area and a layer pattern area of a liquid crystal display panel, respectively, and other regions of the mask plate constitute said semi-transparent area. The present disclosure can be used in the manufacture of display devices of liquid crystal display televisions, liquid crystal displays, mobile phones, tablet computers, etc.

Description:
The present application claims benefit of Chinese Patent application CN 201410255565.4 entitled “Mask plate and processes for manufacturing ultraviolet mask plate and array substrate” and filed on Jun. 10, 2014, which is incorporated herein by reference. 
     FIELD OF THE INVENTION 
     The present disclosure relates to the field of display technology, in particular to a mask plate, a process for manufacturing an ultraviolet mask plate, and a process for manufacturing an array substrate. 
     BACKGROUND OF THE INVENTION 
     With development of display technology, liquid crystal displays have become most commonly used display devices. 
     In the process of manufacturing a liquid crystal display, the cell process, as an important procedure, comprises not only aligning and then assembling an array substrate and a color filter substrate, but also irradiating the frame glue filled between the array substrate and the color filter substrate by using ultraviolet light so as to solidify the glue. Since the electrical performance of the thin film transistor (TFT) provided on the array substrate will be affected after ultraviolet irradiation, those parts where the TFT and the like are located should be covered with an ultraviolet mask plate during the irradiation, but leaving the frame glue exposed. 
     An existing ultraviolet mask plate, comprising a glass substrate and a layer of shielding metal formed on the glass substrate, is also prepared by using a mask plate through a patterning process. Since the ultraviolet mask plate can be reused, the usage rate of the mask plate for manufacturing the ultraviolet mask plate is rather low. Hence, the cost of manufacturing the ultraviolet mask plate is relatively high in the prior art. 
     SUMMARY OF THE INVENTION 
     The present disclosure aims to provide a mask plate and processes for manufacturing an ultraviolet mask plate and an array substrate using the same, so as to reduce costs for manufacture of ultraviolet mask plates. 
     The present disclosure provides a mask plate, comprising a transparent area, a semi-transparent area, and a non-transparent area; the transparent area and the non-transparent area correspond to a frame glue area and a layer pattern area of a liquid crystal display panel, respectively, and other regions of the mask plate constitute said semi-transparent area. 
     Preferably, the transmittance of the semi-transparent area ranges from ½ to ⅔. 
     The layer pattern is in the form of a pattern of gate metal layer, and the source/drain metal layer pattern and a transparent electrode layer pattern of said liquid crystal panel are located in the semi-transparent area. 
     Alternatively, the layer pattern is in the form of a source/drain metal layer pattern, and the gate metal layer pattern and transparent electrode layer pattern of said liquid crystal panel are located in the semi-transparent area. 
     Alternatively, the layer pattern is in the form of a transparent electrode layer pattern, and the gate metal layer pattern and source/drain metal layer pattern of said liquid crystal panel are located in said semi-transparent area. 
     The present disclosure further provides a process for manufacturing an ultraviolet mask plate, comprising the steps of:
         forming a metal layer on a base substrate;   coating a photoresist layer on the metal layer;   exposing said photoresist layer with a first illumination intensity through the above mask plate;   removing the photoresist at the area corresponding to the transparent area of the mask plate;   etching said metal layer; and   removing the remaining photoresist.       

     The present disclosure further provides a process for manufacturing an array substrate, comprising:
         forming a material layer to be etched on a base substrate;   coating a photoresist layer on the material to be etched;   exposing said photoresist layer with a second illumination intensity through the above mask plate;   removing the photoresist corresponding to the transparent area and semi-transparent area of the mask plate;   etching said material to be etched to form a layer pattern; and   removing the remaining photoresist.       

     Preferably, the material layer to be etched is a metal layer, and the layer pattern is in the form of a gate metal layer pattern or a source/drain metal layer pattern. 
     Alternatively, the material layer to be etched is a transparent electrode layer, and the layer pattern is a transparent electrode layer pattern. 
     The present disclosure brings about the following advantageous effects. In the mask plate provided by the present disclosure, the transparent area corresponds to the frame glue area of the liquid crystal display pane, i.e., the areas other than a metal shielding layer on the ultraviolet mask plate, while the semi-transparent area and non-transparent area jointly correspond to the metal shielding layer on the ultraviolet mask plate. When the mask plate is used for manufacturing an ultraviolet mask plate, the photoresist can be exposed with a first illumination intensity which is relatively low, so as to be completely removed in the transparent area, partially removed in the semi-transparent area, and remain in the non-transparent area. The ultraviolet mask plate can be formed after an etching process. 
     On the other hand, in the mask plate provided by the present disclosure, the non-transparent area corresponds to the layer pattern area of the liquid crystal display panel. When the mask plate is used for manufacturing corresponding layer pattern (such as a gate metal layer pattern) on the array substrate, the photoresist can be exposed with a second illumination intensity which is relatively high, so as to be completely removed in the transparent area and the semi-transparent area, and remain in the non-transparent area. The corresponding layer pattern can be formed after an etching process. 
     Therefore, the mask plate provided in the present disclosure can be used for manufacturing both an ultraviolet mask plate and an array substrate, so that one single mask plate can be both used in the process of manufacturing the ultraviolet mask plate and in the process of manufacturing the array substrate. As such, no separate mask plate is required for manufacturing the ultraviolet mask plate, thus reducing costs thereof. 
     Other features and advantages of the present disclosure will be illustrated and become partially obvious in the following description, or can be understood through implementation of the present disclosure. The purposes and other advantages of the present disclosure will be achievable and obtainable through the structures as indicated in the following description, claims, and drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       In order to explicitly illustrate the technical solution of the embodiments of the present disclosure, the embodiments will be described in combination with drawings, in which: 
         FIG. 1  is a schematic diagram of a mask plate provided in Embodiment 1 of the present disclosure; 
         FIGS. 2 a  to 2 d    schematically show a process for manufacturing an ultraviolet mask plate as provided in Embodiment 2 of the present disclosure; and 
         FIGS. 3 a  to 3 d    schematically show a process for manufacturing an array substrate as provided in Embodiment 3 of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
     The present disclosure will be explained in details with reference to the embodiments and the accompanying drawings, whereby it can be fully understood how to solve the technical problem by the technical means according to the present disclosure and achieve the technical effects thereof, and thus the technical solution according to the present disclosure can be implemented. It is important to note that as long as there is no structural conflict, all the technical features mentioned in all the embodiments may be combined together in any manner, and the technical solutions obtained in this manner all fall within the scope of the present disclosure. 
     Embodiment 1 
     As illustrated in  FIG. 1 , this embodiment of the present disclosure provides a mask plate  1  comprising a transparent area  11 , a semi-transparent area  12 , and a non-transparent area  13 . The transparent area  11  and the non-transparent area  13  correspond to a frame glue area and a layer pattern area of a liquid crystal display panel, respectively, and other regions of the mask plate  1  constitute said semi-transparent area  12 . 
     The mask plate provided in this embodiment can be used for manufacturing both an ultraviolet mask plate and an array substrate, thus achieving sharing of one mask plate in the manufacturing processes of the ultraviolet mask plate and the array substrate. As such, no separate mask plate is required for manufacturing the ultraviolet mask plate, thus reducing costs thereof. 
     Embodiment 2 
     This embodiment of the present disclosure provides a process for manufacturing an ultraviolet mask plate, wherein the mask plate of Embodiment 1 is used. 
     As illustrated in  FIGS. 2 a  to 2 d   , the process comprises the following steps. 
     In step S 11 , a metal layer  3  is formed on a base substrate  2 . 
     Specifically, by using a conventional deposition process, the metal layer  3  can be deposited on the base substrate  2  made of glass. 
     In step S 12 , a photoresist layer  4  is coated on the metal layer  3 . 
     Specifically, by using a conventional coating process, the photoresist layer  4  can be coated on the metal layer  3 . 
     In step S 13 , as indicated in  FIG. 2 a   , the photoresist layer  4  is exposed with a first illumination intensity through the mask plate  1  of Embodiment 1. 
     As a preferred embodiment, the transmittance of the semi-transparent area of the mask plate  1  ranges from ½ to ⅔. The photoresist layer  4  is exposed with the first illumination intensity through the mask plate  1  of Embodiment 1, so that the photoresist layer  4  in the semi-transparent area  12  would not be completely removed in subsequent step S 14 . 
     In step S 14 , and as indicated in  FIG. 2 b   , the photoresist layer  4  on the area corresponding to the transparent area  11  of the mask plate  1  is removed. 
     Specifically, an ashing process can be used to remove the exposed photoresist layer  4 , wherein the photoresist layer  4  in the transparent area  11  is completely removed. Since the photoresist layer  4  is exposed with the first illumination intensity which is relatively low in S 13 , it could only be partially removed in the semi-transparent area  12 , while the photoresist  4  in the non-transparent area  13  completely remains. 
     In S 15 , as indicated in  FIG. 2 c   , the metal layer  3  is etched. 
     Specifically, a wet etching process can be performed to the metal layer  3 . Since the photoresist layer  4  still covers the metal layer  3  in the semi-transparent area  12  and the non-transparent area  13 , the metal layer  3  can only be etched away in the transparent layer  11  (corresponding to the frame glue area of the liquid crystal display panel), and remain in the semi-transparent area  12  and the non-transparent area  13 . As such, a metal barrier layer  30  is formed on the ultraviolet mask plate. 
     In S 16 , as indicated in  FIG. 2 d   , the remaining photoresist layer  4  is removed. 
     Through a wet striping process, the remaining photoresist layer  4  in the semi-transparent area  12  and the non-transparent area  13  is removed, and thus the ultraviolet mask plate can be made. 
     Embodiment 3 
     This embodiment of the present disclosure provides a process for manufacturing an array substrate using the mask plate of Embodiment 1. The non-transparent area of the mask plate corresponds to a layer pattern area of a liquid crystal display panel. The layer pattern can be in the form of a gate metal layer pattern, a source/drain metal layer pattern, or a transparent electrode layer pattern. In this embodiment, the layer pattern is in the form of a gate metal layer pattern, i.e., the gate metal layer pattern of the array substrate is formed by using the mask plate, while the source/drain metal layer pattern and the transparent electrode layer pattern of the liquid crystal display panel are located in the semi-transparent area of the mask plate. 
     As indicated in  FIGS. 3 a  to 3 d   , the process comprises the following steps. 
     In step S 21 , a material layer to be etched is formed on a base substrate  2 . 
     Since this embodiment employs the mask plate  1  of Embodiment 1 to form a gate metal layer pattern, the material layer to be etched in this embodiment is in the form of a gate metal layer  5 . A deposition process can be performed in this step to deposit the gate metal layer  5  on the base substrate  2 . 
     In step S 22 , a photoresist layer  4  is coated on the gate metal layer  5 . 
     Specifically, through a normal coating process, the photoresist layer  4  can be coated on the gate metal layer  5 . 
     In step S 23 , as indicated in  FIG. 3 a   , the photoresist layer  4  is exposed with a second illumination intensity through the mask plate  1  of Embodiment 1. 
     Specifically, the photoresist layer  4  is exposed with a relatively high second illumination intensity through the mask plate of Embodiment 1. In order to ensure complete removal of the photoresist layer  4  in the semi-transparent area  12  in subsequent step S 24 , the second illumination intensity should be at least a times the first illumination intensity, wherein a is the reciprocal of the transmittance of the semi-transparent area  12 . For example, if the transmittance of the semi-transparent area  12  is ½, then the second illumination intensity should be at least twice the first illumination intensity. For another example, if the transmittance of the semi-transparent area  12  is ⅔, then the second illumination intensity should be at least 1.5 times the first illumination intensity. 
     In step S 24 , as indicated in  FIG. 3 b   , the photoresist layer  4  corresponding to the transparent area  11  and semi-transparent area  12  of the mask plate  1  is removed. 
     Specifically, an ashing process can be performed to remove the exposed photoresist layer  4 . Since the photoresist layer  4  is exposed with the second illumination intensity in step S 23  which is relatively high, it can be completely removed in the transparent area  11  and semi-transparent area  12 , while the photoresist  4  in the non-transparent area  13  entirely remains. 
     In step S 25 , as indicated in  FIG. 3 c   , the gate metal layer  5  is etched to form a pattern of the gate metal layer. 
     Specifically, a wet etching process can be performed to the gate metal layer  5 . Since the photoresist layer  4  in the transparent area  11  and the semi-transparent area  12  is completely removed, and only the photoresist layer  4  in the non-transparent area  13  remains, the gate metal layer  5  in the non-transparent area  13  (corresponding to the gate metal layer pattern) can remain after the etching process. 
     In step S 26 , as indicated in  FIG. 3 d   , the remaining photoresist layer  4  is removed. 
     The photoresist layer  4  remaining in the non-transparent area  13  is removed by using a wet striping process, so that the gate metal layer pattern comprising a gate line  51  and a common electrode line  52  can be formed on the base substrate  2 . 
     In addition, the process for manufacturing the array substrate further comprises subsequent procedures such as forming a gate insulator, an active layer, a source/drain metal layer pattern, a pixel electrode, and a passivation layer, each of which can be performed by using any conventional means. The subsequent procedures generally will not use the mask plate of Embodiment 1 and therefore will not be explained in detail here. 
     In other embodiments of the present disclosure, the non-transparent area of the mask plate can also correspond to other layer patterns of the array substrate. For example, the non-transparent area can correspond to the source/drain metal layer pattern of the array substrate, while the gate metal layer pattern and transparent electrode layer pattern of the liquid crystal display panel (the array substrate) are located in the semi-transparent area. In this case, the material layer to be etched in step S 21  is a source/drain metal layer. Alternatively, the non-transparent area can also correspond to the transparent electrode layer pattern of the array substrate, while the gate metal layer pattern and source/drain metal layer pattern of the liquid crystal display panel (the array substrate) are located in the semi-transparent area. In this case, the material layer to be etched in step S 21  is a transparent electrode layer. 
     The above embodiments prove that the mask plate of the present disclosure can be used to manufacture both an ultraviolet mask plate and an array substrate, thus achieving sharing of one mask plate in the manufacturing processes of the ultraviolet mask plate and the array substrate. As such, no separate mask plate is required for manufacture of the ultraviolet mask plate, thus reducing costs thereof. 
     Although the embodiments disclosed by the present disclosure are discussed above, the embodiments are provided for better understanding of the present disclosure rather than to limit the present disclosure. Anyone skilled in the art, without departing from the spirit or scope of the present disclosure, can make amendments or modification to the implementing forms and details of the embodiments. Regarding the scope of the present disclosure, however, the scope of the claims shall prevail.