Abstract:
System for detecting pattern defects wherein images of corresponding portions of two originally identical patterns are detected and two image signals representing the images are registered with each other, a second image signal of the two registered signals is shifted by a predetermined number of pixels with respect to a first image signal, thus providing shifted second image signals. Differences in brightness between the first and second image signals as well as each of the shifted second image signals are calculated within intervals corresponding to pixels on one scanning line, thus providing a first group of difference image signals, preset values are added to and substracted from the first or second image signal to provide a sum image signal and a substraction image signal. Differences in brightness between the second or first image signal and each of the sum and substraction image signals are calculated within the intervals to provide a second group of at least two difference signals, normality of one of the two patterns is decided when the first group of difference signals and the second group of difference signals have coexistent positive and negative signs within one interval and a minimum of absolute values of the first group of difference signals and the second group of difference signals is calculated when the first and second group of difference signals have all either positive signs or negative signs within one interval, and the mimimum is detected as a true defect when the minimum exceeds a predetermined threshold.

Description:
BACKGROUND OF THE INVENTION 
     This invention generally relates to pattern defect detection and more particularly to a pattern defect detecting method and apparatus suitable for highly reliable checking of defects in a semiconductor device circuit pattern on an LSI wafer in the form of a resist pattern before etching. 
     Illustrated at sections (a) and (b) in FIG. 1 are enlarged views of a part of a circuit pattern on a semiconductor wafer, with a perfect pattern 1 of the part devoid of any defects illustrated at (a) in FIG. 1 and a defective pattern 3 of the same part inclusive of a projection 2a, a break in a wire 2b and an isolated defect 2c illustrated at (b) in FIG. 1. Conventionally, in order to check defects in the circuit pattern, a reference pattern on a wafer and a pattern to be checked which is formed on the same wafer are imaged, two images of these patterns are compared to each other, and any portion at which the two images differ from each other is determined to be a defect. 
     In the above method, however, even when the reference pattern and the pattern to be checked which are formed on the same wafer and picked up by means of image pickup devices are located in perfect register relationship with each other, mis-registration occurs as illustrated at (c) in FIG. 1 between the reference pattern 1 (dotted line) and the checked pattern 3 (solid line) at portions other than the defective portions 2a to 2c. Presumably, the above mis-registration is caused for the reasons described below. 
     (a) The two patterns are formed in delicately different configurations, though not leading to occurrence of defects, during wafer production processes such as exposure, development and etching. 
     (b) The pattern images are distorted owing to aberration of optical systems for imaging the two patterns to be compared with each other and to errors in travel of stages carrying the wafers. 
     Consequently, as illustrated at (d) in FIG. 1, mis-registration between the reference pattern 1 and the check pattern 3 occurs at portions other than defective portions 2a&#39; to 2c&#39;, especially, at the pattern contour, resulting in spurious defects 4. 
     A method for elimination of such spurious defects 4 has been proposed as disclosed in, for example, Japanese Patent Publication No. 54-37475. According to this proposal, mis-register portions between a reference pattern and a pattern to be checked are detected as candidates for defects and at the same time, only the pattern contour is extracted from either of the reference pattern and the check pattern. Then, portions common to the pattern contours of the respective reference and check patterns are extracted from the two pattern contours, and some of the candidates for defects sorted out as the common contour portions are recognized as spurious defects and excluded to thereby detect only true defects. 
     The second conventional method succeeds in detecting the break 2b and isolated defect 2c shown at (b) in FIG. 1 but this method can not satisfactorily detect the small projection 2a which occurs at the pattern contour and is likely to be covered by a common contour portion mentioned above. If the size of individual pixels used for pattern detection is decreased to meet the detection of such a small defect, then checking speeds will be decreased and throughput of the checking apparatus will disadvantageously be degraded. 
     A method disclosed in Japanese Patent Publication No. 59-42904 may be employed as a defect checking method which is not affected by the delicate size difference between the comparative patterns and the image distortion. In this conventional method, featuring points of the two comparative patterns, such as points of inflexion, are extracted from these patterns. Normality is recognized when the featuring points of both the patterns fall within a permissible range of a predetermined amount of mis-registration but the presence of a defect is determined when a featuring point of one pattern lies and a featuring point of the other pattern does not lie within the permissible range. 
     Accordingly, the last-mentioned method succeeds in accommodating the delicate size difference between the two patterns and the image distortion to the permissible mis-registration, thus preventing generation of spurious defects. But, disadvantageously, all defects of a variety of configurations are difficult to detect in terms of the featuring point and there is a possibility that a small defect is accidentally overlooked. Further, when the pattern is thick or thin as a whole, a size difference between the comparative patterns which is to be detected as a defect is disadvantageously accommodated to the permissible mis-registration and accepted. 
     Incidentally, in recent years, semiconductor integrated circuits have been realized with very highly integrated circuits of very high density and fine defects present in circuit patterns do harm to the operation of the circuits with high probabilities. In the prior art, however, the detection of small defects can not be accomplished without increasing the probability of detecting spurious defects. Under these circumstances, the advent of an expedient capable of detecting only true defects without detection of spurious defects is desired urgently. 
     SUMMARY OF THE INVENTION 
     An object of the invention is to eliminate the prior art drawbacks and provide a method and apparatus for detecting pattern defects capable of detecting small defects with high reliability and at high speeds, without generating spurious defects. 
     According to one aspect of the invention, there is provided a method of detecting pattern defects comprising the steps of : detecting images of corresponding portions of two patterns which are originally identical to each other and registering two image signals representative of the images; shifting a second image signal of the two registered image signals by a predetermined number of pixels with respect to a first image signal in X and Y directions defining scanning directions for the two registered image signals, thus providing shifted second image signals, and calculating differences in brightness between the first image signal and the second image signal, and between the first image signal and each of the shifted second image signals within intervals corresponding to pixels on the two-dimension local memory, thus providing a first group of difference image signals ; adding and subtracting preset values to and from the first image signal or the second image signal to provide a sum image signal and a subtraction image signal and calculating differences in brightness between the second image signal or the first image signal and each of the sum and subtraction image signals within the intervals to provide a second group of at least two difference image signals; deciding normality of one of the two patterns when the first group of difference image signals and the second group of difference image signals have coexistent positive and negative signs within one interval and calculating a minimum of absolute values of the first group of difference image signals and the second group of difference image signals when the first group of difference image signals and the second group of difference image signals have all either positive signs or negative signs within one interval; and detecting the minimum as a true defect when the minimum exceeds a predetermined threshold. 
     According to another aspect of the invention, there is provided an apparatus of detecting pattern defects comprising a plurality of image pickup devices for picking up patterns which are originally identical to each other and producing a signal representative of an image to be checked and a signal representative of a reference image; a mis-registration detector for detecting an amount of mis-registration between the check image signal and the reference image signal produced from the respective image pickup devices; a registration circuit for correcting the relation between the check image and reference image signals by an electrical delay which corresponds to the amount of mis-registration detected by the mis-registration detector and registering the check image and reference image signals with each other; an image windowing circuit for shifting a second image signal of the two registered image signals from the registration circuit by a predetermined number of pixels with respect to a first image signal in X and Y directions defining scanning for the registered image signals and establishing windowed image signals of the first and second image signals; a difference image signal extracting circuit for calculating differences in brightness between the first image signal and the second image signal as well as between each of the windowed image signals of the first image signal and each of the shifted windowed image signals of the second image signal within intervals corresponding to pixels on one scanning line, thus providing a first group of difference image signals, adding and subtracting preset values to and from the first image signal or the second image signal to provide a sum image signal and a subtraction image signal and calculating differences in brightness between the second image signal or the first image signal and each of the sum and subtraction image signals within the intervals, thus providing a second group of at least two difference image signals; a first defect deciding circuit for deciding normality of the check pattern when the first group of difference image signals and the second group of difference image signals have coexistent positive and negative signs within one interval and calculating and delivering a minimum of absolute values of the first group of difference image signals and the second group of difference image signals when the first group of difference image signals and the second group of difference image signals have all either positive signs or negative signs within one interval; and a second defect deciding circuit for erasing the minimum delivered out of the first defect deciding circuit when the minimum does not reach a predetermined threshold and detecting the minimum as a true defect when the minimum exceeds the predetermined threshold. 
     Thus, according to the invention, even when the two images can not be registered perfectly with each other because of their slightly irregular pattern contours and they have varying brightness, spurious defects will not be detected as defects and only true defects can be detected. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 illustrates at sections (a) through (d) diagrams useful to explain prior art pattern defect detecting methods; 
     FIG. 2 is a block diagram showing a defect detection circuit used for method and apparatus for detecting pattern defects according to an embodiment of the invention; 
     FIG. 3 is a block diagram of an image processing apparatus incorporating the defect detection circuit of FIG. 2; 
     FIG. 4a is a fragmentary sectional view showing overlapped two resist patterns which are examined in accordance with the invention; 
     FIG. 4b is a diagram showing a reference pattern image g(x,y) and a check pattern image f(x,y) obtained when image pickup devices pick up the resist patterns shown in FIG. 4a, wherein the pattern images are placed in register relationship with each other; 
     FIG. 4c illustrates a waveform of a check pattern image signal related to a waveform of a reference pattern image signal and to waveforms of ±1 pixel shifted reference pattern image signals, these image signals being obtained on the scanning line A--A&#39; of FIG. 4b; 
     FIG. 4d shows signs of difference image signals obtained within intervals on the scanning line A--A&#39; of FIG. 4b; 
     FIG. 4e illustrates waveforms similar to those of FIG. 4c but obtained on the scanning line B--B&#39; of FIG. 4b; and 
     FIG. 4f shows signs of difference image signals obtained within intervals on the scanning line B--B&#39; of FIG. 4b. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     A preferred embodiment of the invention will now be described with reference to FIGS. 2 through 4. 
     FIG. 2 illustrates, in block form, a defect detection circuit 30 used for practicing a method and apparatus for checking resist pattern defects before etching in accordance with teachings of the invention. Referring to FIG. 2, a reference image 11a represented by a digital signal is produced from an image pickup device and an image to be checked 11b also represented by a digital signal is produced from another image pickup device, both of the images being placed in register relationship with each other by the registration circuit shown in FIG. 3. The reference image 11a represented by the digital signal is a local image of 3×3 pixels which is windowed by means of shift registers 12a and 12b respectively adapted to store pixels per scanning line of a frame image and serial-in/parallel-out shift registers 13a, 13b and 13c. On the other hand, pixels per scanning line of a frame image for the image to be checked 11b, represented by the digital signal, are stored in a similar shift register 12c and then supplied to a serial-in/parallel-out shift register 13d so that an output signal from the second digit of the shift register 13d can be synchronized with a center pixel of the local image. Subsequently, the second digit output signal from the shift register 13d, designated by f(x,y), is subtracted from output signals representative of individual pixels, delivered out of the shift registers 13a to 13c and designated by g(x+i, y+j)i,j=-1, 0, +1, by means of subtracters 16a to 16i to provide difference images 
     
         Dn(x,y).sub.n=1˜9 =g(x+i,y+j).sub.i=-1,0,+1;j=-1,0,+1 -f(x,y) 
    
     between the image to be checked 11b and the reference image 11a as well as images obtained by ±1 pixel shifting the reference image 11a in X and Y directions defining scanning for the registered images, where x and y represent coordinates of the center pixel delivered out of the center digit of the shift register 13b. More specifically, the subtracter 16a produces a difference image signal D 1  (x,y)=g(x-1,y-1)-f(x,y), the subtracter 16b a difference image signal D 2  (x,y)=g(x,y-1)-f(x,y), the subtracter 16c a difference image signal D 3  (x,y)=g(x+1,y-1)-f(x,y), the subtracter 16d a difference image signal D 4  (x,y)=g(x-1,y)-f(x,y), the subtracter 16e a difference image signal D 5  (x,y)=g(x,y)-f(x,y), the subtracter 16f a difference image signal D 6  (x,y)=g(x+1,y)-f(x,y), the subtracter 16g a difference image signal D 7  (x,y)=g(x-1,y+1)-f(x,y), the subtracter 16h a difference image signal D 8  (x,y)=g(x,y+1)-f(x,y), and the subtracter 16i a difference image signal D 9  (x,y)= g(x+1,y+1)-f(x,y). In this manner, the nine subtracters 16a to 16i provide the nine difference image signals D 1  (x,y) to D 9  (x,y). On the other hand, the second digit output signal f(x,y)from the shift register 13d is added with a preset value α at an adder 14 which in turn produces an output signal f(x,y)+α and is subtracted by a preset value β at a subtracter 15 which in turn produces an output signal f(x,y)-β. A subtracter 16j subtracts the output signal f(x,y)+β of the adder 14 from the signal g(x,y) representative of the center pixel of the (3×3)- pixel local image to produce a difference image signal D 10  (x,y)=g(x,y)-{f(x,y)+}. A subtracter 16k subtracts the output signal f(x,y)-β of the subtracter 15 from the center pixel signal g(x,y) to produce a difference image signal D 11  (x,y)=g(x,y)-{f(x,y)-β}. Alternatively, the adder 14 may add the preset value α to the signal g(x,y) representative of the center pixel of the (3×3)-pixel local image, received via a dotted line in FIG. 2, so that the subtracter 16j may produce a difference image signal {g(x,y)+α}-f(x,y), and the subtracter 15 may subtract the preset value β from the center pixel signal g(x,y), received via a dotted line in FIG. 2, so that the subtracter 16k may produce a difference image signal {g(x,y)-β}-f(x,y). Obviously, the preset values α and β may be equal to each other. 
     Each of the output signals D 1  (x,y), D 2  (x,y) --D 9  (x,y), D 10  (x,y) and D 11  (x,y) from the subtracters 16a to 16k is supplied to a maximum detector 17 and a minimum detector 18. The maximum detector 17 detects a maximum value max{D n  (x,y)} n=1 ˜11 from the signals {D n  (x,y)} n=1 ˜11 and delivers the detected maximum value. An absolute value detector 19a delivers a signal 20a representative of a sign, positive or negative, of the maximum value max{D n  (x,y)} n=1 ˜11 and a signal 21a representative of an absolute value |max}D n  (x,y)} n=1 ˜11 | of the maximum. 
     The minimum detector 18 detects a minimum value min{D n  (x,y)} n=1 ˜11 from the signals {D n  (x,y)} n ˜11 and delivers the detected minimum. An absolute value detector 19b delivers a signal 20b representative of a sign, positive or negative, of the minimum value min{D n  (x,y)} n=1 ˜11 and a signal 21b representative of an absolute value |min{D n  (x,y)} n=1 ˜11 | of the minimum. A multiplexer 22 is applied with the signal 21a indicative of |max{D n  (x,y)} n=1 ˜11 | and the positive or negative sign signal 20a from the absolute value detector 19a, the signal 21b indicative of |min{D n  (x,y)} n=1 ˜11 | and the positive or negative sign signal 20b from the absolute value detector 19b, and a signal representative of &#34;0&#34;. The multiplexer 22 responds to the positive or negative sign signals 20a and 20b to select and deliver one of the three input signals 21a, 21b and &#34;0&#34;. More specifically, the multiplexer 22 connects to the signal &#34;0&#34; to deliver a signal h(x,y)=0 when one of the sign signals 20a and 20b is positive and the other is negative, connects to the signal 21b to deliver a signal h(x,y)=|min{D n  (x,y)} n=1 ˜11 | when both the sign signals are positive, and connects to the signal 21a to deliver a signal h(x,y)=|max{D n  (x,y)} n=1 ˜11 | when both the sign signals are negative. In other words, when both the sign signals are positive or negative, a signal h(x,y)=min{|{D n  (x,y)} n=1 ˜11 |} is delivered out of the multiplexer 22. This is because when both the sign signals are negative, all the {D n  (x,y)} n=1 ˜11 are negative and the max{D n  (x,y)} n=1 ˜11 exhibits the minimum absolute value of difference image. 
     A signal indicative of this minimum absolute value of difference image delivered out of the multiplexer 22 is erased by a threshold circuit 23 when it does not reach a predetermined threshold and a defect signal 24 indicative of a true defect can be delivered out of the threshold circuit 23 only when the minimum exceeds the predetermined threshold. 
     The above defect checking will be described in greater detail by referring to an example as illustrated in FIGS. 4a to 4f. FIG. 4a shows part of overlapped resist patterns formed on silicon wafers by light exposure. These resist patterns of FIG. 4a are imaged by the separate image pickup devices to provide an overlapped image as illustrated in FIG. 4b. Because of irregular reflection from stepped portions of the patterns, images are darkened at the stepped portions. Further because of light transmission and irregular reflection at the surface of the resist pattern, an image of the resist surface is slightly darkened as compared to an image of the wafer surface. When the overlapped image illustrated in FIG. 4b is scanned in the X direction along the line A--A&#39; of FIG. 4b, an image signal g(x,y) representative of the reference pattern and an image signal f(x,y) representative of the pattern to be checked are related to each other as indicated by waveforms in FIG. 4c. Actually, these image signals are of digital signals but for simplicity of explanation, analog signal waveforms are used herein. Image signals g(x-1,y) and g(x+1,y) representative of reference pattern images subject to ±1 pixel shifting are illustrated on slightly exaggerated pixel shift scale. With reference to FIGS. 4c and 4d, a signal representative of D 5  (x,y)=g(x,y)-f(x,y) as indicated at (c-1) in FIG. 4c is produced from the subtracter 16e, a signal representative of D 6  (x,y)=g(x+1,y)-f(x,y) as indicated at (c-2) in FIG. 4c is produced from the subtracter 16f, a signal representative of D 4  (x,y)=g(x-1,y)-f(x,y) as indicated at (c-3) in FIG. 4c is produced from the subtracter 16d, a signal representative of D 10  (x,y)={g(x,y)+α}-f(x,y) or D 11  (x,y)=g(x,y)-{f(x,y)+α} as indicated at (c-4) in FIG. 4c is produced from the subtracter 16j and a signal representative of D 11  (x,y)={g(x,y)-β}-f(x,y) or D 10  (x,y)=g(x,y)-{f(x,y)- β} as indicated at (c-5) in FIG. 4c is produced from the subtracter 16k, these difference image output signals respectively having signs within different intervals on the scanning line A--A&#39; which are indicated in FIG. 4d. For adjacent scanning lines, signals substantially identical to the output signal of the subtracter 16e are produced from the subtracters 16b and 16h, signals substantially identical to the output signal of the subtracter 16f are produced from the subtracters 16c and 16i, and signals substantially identical to the output signal of the subtracter 16d are produced from the subtracters 16a and 16g. In accordance with signs of these difference image signals, the multiplexer 22 connects to a signal 21b, within an interval b-c, to deliver a signal h(x,y) indicative of the presence of a defect, connects to a signal 21a, within an interval e-f, to deliver a signal h(x,y) indicative of the presence of a defect and connects to the &#34;0&#34; signal, within the other intervals, to deliver a signal h(x,y)=0 indicative of the absence of any defect. 
     When the image illustrated in FIG. 4b is scanned in the X direction along the line B--B&#39; of FIG. 4b, because of substantial register between the reference pattern g(x,y) and the pattern to be checked f(x,y), difference image signals as shown at (e-1) through (e-5) in FIG. 4e are produced from the corresponding subtracters, wherein signals representative of D 10  (x,y) and D 11  (x,y) as indicated at (e-4) and (e-5) in FIG. 4e have positive sign and negative sign, respectively, throughout the intervals, with the result that the multiplexer 22 constantly connects to the &#34;0&#34; signal to deliver a signal h(x,y) indicative of the absence of any defect. 
     As will be seen from the above, when the difference image signals due to small relative movement of ±1 pixel shift between reference pattern g(x,y) and pattern to be checked f(x,y) and the difference image signals due to small variations in brightness include both positive and negative signs among D 1  -D 11  within one interval on one scanning line, the multiplexer 22 connects to the &#34;0&#34; signal, within that interval, to deliver a signal h(x,y) indicative of the absence of any defect. If all the difference image signals D 1  -D 11  have positive (or negative) values within one interval, the multiplexer 22 connects to the signal 21a or 21b within that interval, to deliver a signal h(x,y) indicative of the presence of a defect. In case where the reference pattern g(x,y) is only slightly misregistered with the pattern to be checked f(x,y), there is a possibility that the difference image signals D 1  to D 11  have all positive signs or negative signs within one interval but in such an event, the minimum value h(x,y)=min{|{D n  (x,y)} n=1 ˜11 |} of a resulting difference image signal will be so small that h(x,y) &lt; Threshold is satisfied and hence the threshold circuit 23 will not produce any defect signal. 
     The above-described operation will be summarized as follows: 
     (1) A reference image represented by an image signal g(x,y) is ±1 pixel shifted by means of the shift registers 13a, 13b and 13c in the X and Y directions, with respect to an image to be checked, represented by an image signal f(x,y), and the differences in brightness between windowed reference images represented by image signals g(x+i,y+i) i=-1 ,0,+1;j=-1,0,+1 and the image signal f(x,y) are calculated by means of the subtracters 16a to 16i, providing nine difference images represented by image signals {D n  (x,y)} n=1 ˜9. 
     (2) A preset value α is added to and subtracted from the image signal g(x,y) representative of the reference image by means of the adder 14 and the subtracter 15 to provide images represented by image signals g(x,y)±α and the differences in brightness between each of the image signals g (x,y)±α and the image signal f(x,y) representative of the image to be checked are calculated by means of the subtracters 16j and 16k, providing two difference images represented by image signals D n  (x,y) n=10 ,11. 
     (3) The image signals D n  (x,y) n=1 ˜11 representative of the difference images, eleven in total, obtained through (1) and (2) as above are processed in accordance with (a) and (b) as below to provide a signal h(x,y). 
     (a) When max{D n  (x,y)} n=1 ˜11 X min{D n  (x,y)} n=1 ˜11 &lt;0, 
     
         h(x,y)=0 
    
     (b) For the other cases 
     
         h (x,y)=min{|D (x,y)|}.sub.n=1˜11. 
    
     (4) In the case of (b) above, the signal h(x,y) is referenced to a predetermined threshold TH so as to be delivered as a defect signal if h(x,y)≧TH. 
     Accordingly, in the procedure (1), the reference pattern g(x,y) is ±1 pixel shifted in the X and Y directions with respect to the pattern to be checked f(x,y) and the differences from the pattern to be checked f(x,y) are calculated. When difference image signals corresponding to individual pixels have coexistent positive and negative signs, an examined pattern is determined to be normal but when they all have signs of the same polarity, an examined pattern is treated as a candidate for a defect. This candidate pattern is represented by the signal h(x,y) as obtained in the above procedure (3) and is referenced to the threshold in the procedure (4) to ensure that only a true defect can be detected. 
     The above procedure (2) is employed for the following reasons. In the present invention, with the aim of detecting even a very small defect, two pattern images are compared in brightness before they are converted into binary form. Consequently, slight unevenness in thickness of materials forming the patterns tends to cause a difference in brightness between the images to be compared together and this difference can not be accepted when the registration as merely observed two-dimensionally is perfected, giving rise to erroneous recognition of a normal pattern as a defective pattern. 
     Thus, in the procedure (2), the preset value α is added to and subtracted from the reference image g(x,y) in order that the polarity of a difference signal obtained even at a portion where a difference in brightness prevails between the image to be checked f(x,y) and the reference image g(x,y) can be inverted, thereby preventing a normal pattern from being recognized as a defective pattern and ensuring detection of only true defects. 
     As described above, a very small dimensional difference, not evaluated as a defect, between the reference image 11a and the image to be checked 11b can be accepted and only true defects can be detected. 
     FIG. 3 illustrates, in block form, the overall construction of an image processing circuit including the defect detection circuit 30 shown in FIG. 2. Referring to FIG. 3, signals 31a and 31b representative of a reference image and an image to be checked which are picked up by photoelectric conversion devices are first fed to edge detectors 32a and 32b, respectively, in preparation for mutual registration at the succeeding stage. In the edge detectors 32a and 32b, the input image signals are subjected to differentiation of second order to provide edge image signals which emphasize pattern edges, these edge image signals being also digitized by the edge detectors 32a and 32b and produced therefrom as binary edge image signals 41a and 41b. A mis-registration detector 33 is responsive to the binary edge image signals to calculate mis-registration between the two patterns for mutual comparison and provides signals 36 and 37 representative of amounts of mis-registration in the X and Y directions. Delay circuits 34a and 34b are buffer memories adapted to store the signals 31 a and 31b until the mis-registration between the two patterns has been calculated. Output signals 38a and 38b of the delay circuits 34a and 34b are shifted by means of a registration circuit 35 by amounts indicated by the output signals 36 and 37 of the mis-registration detector 33, thus completing registration between the two patterns. The, thus mutually registered image signals are delivered, as image signals 11a and 11b representative of the reference image and the image to be checked, from the registration circuit 35 and fed to the defect detection circuit 30 constructed as illustrated in FIG. 2 so as to be used for defect detection. 
     As has been described, according to the present invention, highly reliable defect detection can be achieved without causing spurious defects to attain meritorious effects such as improvements in yield of semiconductor integrated circuits and the like, improvements in reliability of products and reduction in costs.