Abstract:
A method for measuring for generating a touch capacitance measurement is provided. Gain and offset control signals are generated, where the gain and offset control signals are adjusted to compensate for base capacitance of a touch sensor. The gain control signal is applied to a touch sensor during a first phase of a clock signal, and the offset control signal is applied to an output circuit during a second phase of the clock signal. The output circuit is coupled to the touch sensor during the second phase of the clock signal. The touch capacitance measurement is generated by compensating for the base capacitance with the gain and offset control signals, and a gain is applied to the touch capacitance measurement.

Description:
TECHNICAL FIELD 
     The invention relates generally to a capacitive touch sensors and, more particularly, to sensing small changes in capacitive touch sensors. 
     BACKGROUND 
     Capacitive touch sensors (such as touch buttons) are increasing used in human interface devices. These touch sensors usually have a base capacitance and function based on detection of an increase in the base capacitance due to the presence of a dielectric (i.e., finger) in proximity to the sensor. With some touch sensors, this change or variation in base capacitance (which can be referred to as the touch capacitance) can be as small as 0.5%. This means that, if a 10-bit successive approximation register (SAR) analog-to-digital converter (ADC) is employed to digitize the measurement, the touch capacitance measurement may be limited to approximately the 5 least significant bits. Thus, there is a high susceptibility to error due to noise. Additionally, the base capacitance can drift over time, which can create further errors. Therefore, there is a need for an improved touch controller that can accurately measure small touch capacitances. 
     Some examples of conventional systems are: U.S. Pat. No. 5,463,388; U.S. Pat. No. 7,764,274; U.S. Patent Pre-Grant Publ. No. 2007/0074913; U.S. Patent Pre-Grant Publ. No. 2008/0116904; U.S. Patent Pre-Grant Publ. No. 2009/0066674; U.S. Patent Pre-Grant Publ. No. 2009/0153152; U.S. Patent Pre-Grant Publ. No. 2010/0201382; and PCT Publ. No. WO2007044360. 
     SUMMARY 
     An embodiment of the present invention, accordingly, provides an apparatus. The apparatus comprises an interface that is configure to communicate with a touch sensor having a base capacitance; and an capacitance-to-voltage converter that receives a clock signal and that is coupled to the interface, wherein the capacitance-to-voltage converter generates gain control and offset signals, and wherein the capacitance-to-voltage converter is configured to apply the gain control signals to the touch sensor during a first phase of the clock signal, and the gain and offset control signals are adjusted to compensate for the base capacitance, and wherein the capacitance-to-voltage converter uses the gain and offset control signals during a second phase of the clock signal to compensate for the base capacitance and provide a touch capacitance measurement. 
     In accordance with an embodiment of the present invention, the output circuit includes a capacitor that is configured to be adjustable. 
     In accordance with an embodiment of the present invention, the capacitance-to-voltage converter further comprises: a gain control circuit that is coupled to the interface and that receives the clock signal; an output circuit that is coupled to the gain control circuit, wherein the output circuit includes the capacitor; and an offset control circuit that is coupled to the output circuit and that receives the clock signal. 
     In accordance with an embodiment of the present invention, the gain control circuit further comprises: a first transmission gate that is coupled between the interface and the output circuit and that is activated during the second phase of the clock signal; a second transmission gate that is coupled to the interface and that is activated during the first phase of the clock signal; and a digital-to-analog converter (DAC) that is coupled to the second transmission gate and that generates the gain control signal. 
     In accordance with an embodiment of the present invention, the DAC further comprises a first DAC, and wherein the gain control circuit further comprises: a second DAC that generates the offset control signal; a third transmission gate that is coupled between the second DAC and the output circuit and that is activated during the second phase of the clock signal; and a fourth transmission gate that is coupled to the output circuit and that is activated during the first phase of the clock signal. 
     In accordance with an embodiment of the present invention, the clock signal further comprises a first clock signal, and wherein the capacitor further comprises a first capacitor, and wherein the output circuit further comprises: a second capacitor that is coupled to the third and fourth transmission gates; an amplifier having a first input terminal, a second input terminal, and a output terminal, wherein the first input terminal of the amplifier is coupled to the second capacitor and the first transmission gate, and wherein the first capacitor is coupled between the first input terminal of the amplifier and the output terminal of the amplifier, and wherein the second input terminal of the amplifier receives a common mode voltage; and a fifth transmission gate that is controlled by the second clock signal and that is coupled between the first input terminal of the amplifier and the output terminal of the amplifier. 
     In accordance with an embodiment of the present invention, an apparatus is provided. The apparatus comprises a touch panel having a plurality of touch sensors, wherein each touch sensor has a base capacitance; a touch panel controller having: an interface that is coupled to each touch sensor; a capacitance-to-voltage converter having: a gain control circuit that is coupled to the interface and that receives a clock signal, wherein the gain control circuit generates a gain control signal, and wherein the gain control circuit is configured to apply the gain control signal to a selected touch sensor from the plurality of touch sensors during a first phase of the clock signal; an output circuit that is coupled to the gain control circuit, wherein the output circuit is configured to be coupled to the touch sensor during a second phase of the clock signal; and an offset control circuit that is coupled to the output circuit and that receives the clock signal, wherein the offset control circuit generates an offset control signal, and wherein the offset control circuit applies the offset control signal to the output circuit during the second phase of the clock signal, and wherein the gain and offset control signals are adjusted to compensate for the base capacitance of the selected touch sensor. 
     In accordance with an embodiment of the present invention, the capacitor further comprises a first capacitor, and wherein the output circuit further comprises: a second capacitor that is coupled to the offset control circuit; and an amplifier having a first input terminal, a second input terminal, and a output terminal, wherein the first input terminal of the amplifier is coupled to the second capacitor and the gain control circuit, and wherein the first capacitor is coupled between the first input terminal of the amplifier and the output terminal of the amplifier, and wherein the second input terminal of the amplifier receives a common mode voltage. 
     In accordance with an embodiment of the present invention, the clock signal further comprises a first clock signal, and wherein the output circuit further comprises a first transmission gate that is controlled by the second clock signal and that is coupled between the first input terminal of the amplifier and the output terminal of the amplifier. 
     In accordance with an embodiment of the present invention, the gain control circuit further comprises: a DAC that generates the offset control signal; a second transmission gate that is coupled between the DAC and the second capacitor and that is activated during the second phase of the clock signal; and a third transmission gate that is coupled to the second capacitor and that is activated during the first phase of the clock signal. 
     In accordance with an embodiment of the present invention, the DAC further comprises a first DAC, and wherein the gain control circuit further comprises: a fourth transmission gate that is coupled between the interface and the first input terminal of the amplifier and that is activated during the second phase of the clock signal; a fifth transmission gate that is coupled to the interface and that is activated during the first phase of the clock signal; and a second DAC that is coupled to the second transmission gate and that generates the gain control signal. 
     In accordance with an embodiment of the present invention, the touch panel controller further comprises: an analog-to-digital converter (ADC) that is coupled to the output terminal of the amplifier; a digital front end (DFE) that is coupled to the ADC; and control logic that is coupled to the DFE, the first and second DACs, and the first, second, third, fourth, and fifth transmission gates. 
     In accordance with an embodiment of the present invention, the ADC is a successive approximation register (SAR) ADC. 
     In accordance with an embodiment of the present invention, the DFE provides noise cancellation using correlated double sampling (CDS). 
     In accordance with an embodiment of the present invention, a method is provided. The method comprises generating gain and offset control signals, wherein the gain and offset control signals are adjusted to compensate for base capacitance of a touch sensor; applying the gain control signal to a touch sensor during a first phase of a clock signal; applying the offset control signal to an output circuit during a second phase of the clock signal; coupling the output circuit to the touch sensor during the second phase of the clock signal; compensating for the base capacitance with the gain and offset control signals to generate a touch capacitance measurement; and applying a gain to the touch capacitance measurement. 
     In accordance with an embodiment of the present invention, the step of applying the gain control signal further comprises coupling a DAC to the touch sensor during the first phase of the clock signal. 
     In accordance with an embodiment of the present invention, the method further comprises converting the touch measurement with the applied gain to a digital signal. 
     In accordance with an embodiment of the present invention, the method further comprises performing a CDS operation on the digital signal to compensate for noise. 
     The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and the specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which: 
         FIG. 1  is a diagram of an example of a system in accordance with an embodiment of the present invention; 
         FIG. 2  is a diagram of a detailed example of a portion of the analog front end (AFE) and a touch sensor for the system of  FIG. 1 ; and 
         FIG. 3  is a diagram of an example of the operation of the AFE and touch sensor of  FIG. 2 . 
     
    
    
     DETAILED DESCRIPTION 
     Refer now to the drawings wherein depicted elements are, for the sake of clarity, not necessarily shown to scale and wherein like or similar elements are designated by the same reference numeral through the several views. 
     Turning to  FIG. 1 , a system  100  in accordance with an embodiment of the present invention can be seen. As shown, the system  100  generally comprises a touch panel  102  and a touch panel controller  104 . The touch panel  102  generally comprises one or more touch sensors (such as touch buttons) arranged in a variety of ways (i.e., an array or line), and the touch panel controller  104  generally comprises an interface or I/F  106 , an AFE  108 , a digital front end (DFE)  110 , host controller  112 , and control logic  114 . 
     In operation, the touch panel controller  114  is able to detect touch events on the touch panel  106 . To accomplish this, the touch panel controller  104  is able to “scan through” or select various touch sensors on the touch panel  102 . The scanning or selection is normally accomplished with the interface  106  (which may include a multiplexer) so as to allow an appropriate or selected touch sensor to be coupled to the AFE  108 . Once coupled to the selected touch sensor through the interface  106 , the AFE  108  determines whether a touch event with the selected touch sensor has occurred with the use of control signals (i.e., clock signal) provided by the control logic  114 . The AFE  108  is able to digitize a measurement for the touch event (which should be a measurement of the touch capacitance) for the DFE  110 . The DFE  110  (which also can receive control signals from the control logic  114 ) can then perform error correction on the digitized measurement as well as other operations for the host controller  112 . 
     Performing the measurement of the touch capacitance, however, can be difficult, but the AFE  108  (which is shown in greater detail in  FIG. 2 ) is able to perform this measurement with relative ease. As shown in the example in  FIG. 2 , one of the touch sensors  202  from the touch panel  102  is coupled to the capacitance-to-voltage converter  203  of AFE  108  through interface  106 , and this touch sensor  202  is shown to formed of two capacitors C B  and ΔC B  (which represent the base capacitance and touch capacitance, respectively). The AFE  108  is generally comprised of a gain control circuit  205 , offset control circuit  207 , and output circuit  209 . The gain and offset control circuits  205  and  207  generally receive a clock signal CLK 1  and inverse clock signal  CLK 1    from control logic  114 , while output circuit  209  receives a clock signal CLK 2  and inverse clock signal  CLK 2    from control logic  114 . These signals CLK 1 ,  CLK 1   , CLK 2 , and  CLK 2    are used by the transmission gates  206 - 1  to  206 - 5  such that transmission gates  206 - 2  and  206 - 4  are open when clock signal CLK 1  is logic high (i.e., one phase of clock signal CLK 1 ), transmission gates  206 - 1  and  206 - 3  are open when clock signal CLK 1  is logic low (i.e., another phase of clock signal CLK 1 ), and transmission gate  206 - 5  is open when clock signal CLK 2  is logic high. With this configuration, digital-to-analog converter (DAC)  204 - 2  (which is controlled by the control logic  114 ) is able to provide a gain control signal V G  to the touch sensor  202  during one phase of clock signal CLK 1  (i.e., when CLK 1  is logic high), while reference voltage REF is applied to the capacitor C OS  during this same phase. This allows the capacitors C B , ΔC B , and C OS  to be charged. Then, during another phase of clock signal CLK 1  (i.e., when clock signal CLK 1  is logic low), the capacitors C B  and ΔC B  are coupled to the amplifier  208  (preferably at its inverting terminal), and the offset control signal V OS  is applied to capacitor C OS  from DAC  204 - 1 . Additionally, the amplifier  208  receives a common mode voltage V CM  (preferably at its non-inverting terminal). Amplifier  208 , with the use of capacitor C F  (which is adjustable) and transmission gate  206 - 5 , apply a gain and generate an output signal V our  (which corresponds to an amplified measurement of the touch capacitance or the capacitance for capacitor ΔC B ) for ADC  210  (which can, for example, be a 10-bit SAR ADC). 
     Typically, as shown in  FIG. 3 , the gain and offset control signals V G  and V OS  are modulated signals that are adjusted to compensate for the base capacitance. Typically, these signals V G  and V OS  can be represented as:
 
 V   G   =ΔV   G   ±V   CM   (1)
 
 V   OS   =ΔV   OS   ±V   CM   (2)
 
As shown in the pre-calibration phase (i.e., prior to the adjustment of the gain and offset control signals V G  and V OS ), the offset control signal V OS  is set to the common mode voltage V CM , which results in the output signal V OUT  being:
 
                     V   OUT     =           Δ   ⁢           ⁢     V   G         C   F       ⁢     C   B       +     V   CM               (   3   )               
Additionally, when the offset voltage V OS  is applied in the post-calibration phase, the output signal V OUT  is:
 
                     V   OUT     =           Δ   ⁢           ⁢     V   G         C   F       ⁢     C   B       -         Δ   ⁢           ⁢     V   OS         C   F       ⁢     C   OS       +     V   CM               (   4   )               
Since, the output voltage V OUT  for the pre-calibration phase (as shown in equation (3)) is a function of the capacitance of capacitor C B , system  100  (i.e., host controller  112  or control logic  114 ) can adjust the offset control signal V OS  such that:
 
                         Δ   ⁢           ⁢     V   G         C   F       ⁢     C   B       =             Δ   ⁢           ⁢     V   OS         C   F       ⁢     C   OS       ⇒     Δ   ⁢           ⁢     V   OS         =         C   B       C   OS       ⁢   Δ   ⁢           ⁢     V   G                 (   5   )               
This results in the output signal V OUT  being approximately equal to the common mode voltage V CM  when the capacitance of capacitor ΔC B  is approximately zero so as to, effectively, “cancel out” the capacitance of capacitor C B . When the capacitance of capacitor ΔC B  is non-zero (i.e., when a touch event occurs), the output signal V OUT  is:
 
                           V   OUT     =       ⁢           Δ   ⁢           ⁢     V   G         C   F       ⁢     (       C   B     +     Δ   ⁢           ⁢     C   B         )       -         Δ   ⁢           ⁢     V   OS         C   F       ⁢     C   OS       +     V   CM                   =       ⁢       [           Δ   ⁢           ⁢     V   G         C   F       ⁢     C   B       -         Δ   ⁢           ⁢     V   OS         C   F       ⁢     C   OS         ]     +         Δ   ⁢           ⁢     V   G         C   F       ⁢   Δ   ⁢           ⁢     C   B       +     V   CM                     =       ⁢           Δ   ⁢           ⁢     V   G         C   F       ⁢   Δ   ⁢           ⁢     C   B       +     V   CM         ,                 (   6   )               
which is a function of the capacitance of capacitor ΔC B . Thus, once calibrated, capacitance-to-voltage converter  203  is able to accurately measure the touch capacitance or capacitance of capacitor ΔC B . Additionally, as indicated by equation (6), the capacitor C F  can operate as a gain control element to boost sensitivity.
 
     With an accurate measurement of the touch capacitance, DFE  110  can perform a correlated double sampling (CDS) operation in the post-calibration phase to compensate for other noise (i.e., 60-cycle noise) in the system  100 . During the CDS period indicated in  FIG. 3 , a CDS output during a touch event in the presences of touch conducted noise coupling can be expressed as: 
                       V   OUT     ⁡     (     T   1     )       =             Δ   ⁢           ⁢     V   G       +       V   n     ⁡     (     T   1     )           C   F       ⁢   Δ   ⁢           ⁢     C   B       +     V   CM               (   7   )                     V   OUT     ⁡     (     T   2     )       =               -   Δ     ⁢           ⁢     V   G       +       V   n     ⁡     (     T   2     )           C   F       ⁢   Δ   ⁢           ⁢     C   B       +     V   CM         ⁢     
     ⁢     such   ⁢           ⁢   that             (   8   )                       V     OUT   ,   CDS       =       ⁢         V   OUT     ⁡     (     T   1     )       -       V   OUT     ⁡     (     T   2     )                     =       ⁢       2   ⁢       Δ   ⁢           ⁢     V   G         C   F       ⁢   Δ   ⁢           ⁢     C   B       +         Δ   ⁢           ⁢     C   B         C   F       ⁢     (         V   n     ⁡     (     T   1     )       -       V   n     ⁡     (     T   1     )         )                       (   9   )               
As can be seen from equation (9), the noise component is V n (T 1 )−V n (T 2 ), so, by increasing the sampling period (i.e., T S =T 1 −T 2 ), the noise can be made very small.
 
     Having thus described the present invention by reference to certain of its preferred embodiments, it is noted that the embodiments disclosed are illustrative rather than limiting in nature and that a wide range of variations, modifications, changes, and substitutions are contemplated in the foregoing disclosure and, in some instances, some features of the present invention may be employed without a corresponding use of the other features. Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the scope of the invention.