Abstract:
A ring counter composed of a plurality of stages connected in sequence and including electronic switches, holding circuits, and elements for feeding a timing pulse only to a stage connected after a stage which is switched on.

Description:
BACKGROUND OF THE INVENTION 
     The invention relates to a ring counter comprising a plurality of stages with electronic switches and holding circuits, which are linked to sequence switches, and which switch voltages on or off in equipment, particularly television and radio equipment. 
     In modern radio and television technology, as is well known, so-called sensor ICs are used, which make it possible for the equipment keys to switch over or switch the equipment and which are merely touched and no longer have to be pressed. A sensor IC is an integrated circuit which is built up of a plurality of stages. 
     In known circuits, as will be explained later, a plurality of capacitances are required and this is a disadvantage when constructing the ring counters as integrated circuits due to their required values. Thus the capacitances may be required to have a value of 20 to 30pF and be able to block voltages of up to 30V. This high blocking voltage requires a relatively large semiconductor surface if it is to be produced by integrated circuit techniques and this can make the unit excessively unwieldy and expensive. 
     SUMMARY OF THE INVENTION 
     It is an object of the invention to provide a ring counter in which no capacitances, or at least relatively few capacitances, are required. 
     According to the invention, there is provided a ring counter comprising a plurality of stages in sequence and including electronic switches and holding circuits and means for feeding a timing pulse to an input of a stage of said plurality of stages only when a stage immediately preceding said stage is switched on. 
     Further according to the invention, there is provided a ring counter, comprising a plurality of stages with electronic switches and holding circuits, which are linked to sequence switches and switch on or off voltages in equipment, particularly television or radio equipment, characterized in that the timing pulse is fed only to the input of that stage which is connected after the switched-on stage so that the timing pulse switches on only the stage connected thereafter and switches off the stage connected therebefore. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention will now be described in greater detail, by way of example, with reference to the drawings, in which: 
     FIG. 1 is a circuit diagram of an individual sensor stage of a known ring counter; 
     FIG. 2 is a circuit diagram of a part of a known integrated circuit showing sensor stages 1,2,(n-1) and n; 
     FIG. 3 is a circuit diagram similar to FIG. 2 but showing a different form of circuit; 
     FIG. 4 is a circuit diagram similar to FIG. 2 but showing a form of circuit according to the invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 1 illustrates the principal mode of operation of an individual sensor stage of a known circuit. If a voltage is fed at the input E to the sensor stage shown in FIG. 1, which voltage is smaller or more negative than the battery voltage U Batt , then the transistors 1 and 2 are made current-conducting. 
     In this case the collector current of the transistor 2 flows through the diode D as well as through the control path of the transistor 4, which also becomes conductive thereby. The result of this is that the output A is connected to the battery voltage U Batt . The voltage drop occurring at the transistor 4 and the diode D switches on the transistor 3 which sends a current through the resistance R 2  so that the output A remains switched on, even if the negative voltage is removed at the input E. A sensor stage thus simultaneously has the function of a holding circuit. 
     The current through the transistor 2 flows through the resistance R 1  common for all the stages and produces a voltage drop which is approximately the same as the voltage across R 2 . If a positive timing pulse, which is formed by means of C 1 , appears at R 1  then the voltage at the emitter of the transistor 2 becomes greater than its base voltage and the stage switches off. 
     FIG. 2 shows a known integrated circuit formed as sensor IC, with the sensor stages 1, 2 . . . n, which are connected by externally connected components to form a ring counter. In the case of this known sensor circuit, in each case, the output of the preceding stage is connected through a capacitance to the input of the following stage. In FIG. 2, of the n stages, merely the first stage, the second stage, the next to the last stage (n-1) and the last (n) stage are shown for the sake of clarity. According to FIG. 2 the output A 1  of the first stage is coupled by means of a capacitance C 12  to the input E 2  of the second stage, the output A 2  of the second stage by means of the capacitance C 2 (n -1 ) to the input E.sub.(n -1 ) of the (n-1)th stage, the output A.sub.(n -1 ) by means of C.sub.(n -1 )n to the input E n  of the nth stage and the output A n  of the nth stage by means of C n1  to the input E 1  of the first stage to form a ring counter. 
     As can be further seen from FIG. 2, a R E  C E  combination is connected in parallel to each input E of the sensor circuit, which combination serves for the formation of the forward switching pulses. If, for example, the first stage is switched on, then there is a positive voltage at the output A 1  of the first stage and the lamp La 1  is switched on. A positive timing pulse through C 1  at R 1  switches the first stage off as already stated. The voltage at A 1  in this case tends towards zero. This voltage is effective through the capacitance C 12  as a negative forward switching pulse at the input E 2  of the second stage and switches the second stage on. A further timing pulse at C 1  R 1  again switches the second stage off and switches the (n-1)th stage on through C 2 (n -1 ). Each further timing pulse at C 1  R 1  thus switches the sensor IC of FIG. 2 on by one stage as a ring counter. 
     The timing pulses are thus fed by means of C 1  R 1  to all sensor stages in common and the switched-on stage is switched off in each case, whereby the voltage of its ouput tends towards zero. This switch-off pulse edge is formed by the coupling capacitance C 12  or C 2 (n -1 ), C.sub.(n -1 )nI C n  &#39;  and formed by the R E  C E  combination connected parallel to the inputs and is used to switch on the stages connected thereafter. 
     The likewise known arrangement of FIG. 3 differs from the arrangement of FIG. 2 substantially in its greater degree of integration. As FIG. 3 shows, above all the coupling capacitances C 12 , C 2 (n -1 ) . . . C.sub.(n -1 )n and C n1  are concomitantly integrated, which of course requires an additional transistor 5 per sensor stage as well as an additional resistance R 3 , because the components of the ring counter are formed in the ICs. The arrangement of FIG. 3 has, as compared with the arrangement of FIG. 2, the advantage that the inputs and outputs of the sensor ICs are free from sequential pulses, because of the fact that the coupling capacitances are included in the integrated circuit and thus are deeply in the circuit. In this way the capacitances of the outer lines such as connecting lines to the sensor contacts, to the potentiometers or program indicator lamps have no influence on the operation of the ring counter. 
     The known solutions have the disadvantage that they require an integration of capacitances per stage, which must have a capacitance of 20 to 30 pF and blocking voltages of up to 30 V. Above all, this high blocking voltage requirement requires a relatively large semiconductor surface in the case of an integration. 
     One embodiment of the invention will now be described with reference to FIG. 4: 
     In the case of the ring counter according to the invention (FIG. 4) there is provided in the individual stages as compared to the known solutions instead of the diode D, a transistor 6, the collector of which is connected to a further transistor 7. The collector of the transistor 7 is connected to the base of the transistor 2 of the stage connected thereafter. The bases of the transistors 7 of all the stages of the ring counter are connected together and are led out of the integrated circuit. The resulting common connection 8 for the bases of all the transistors 7 forms the new input for the timing pulse. The timing pulse is fed to the input 8 through the capacitance C 1 . A resistance R 4  is connected between the timing input 8 and the connection for the positive pole of the battery (U Batt ). 
     The mode of operation of the ring counter of FIG. 4 is as follows: 
     If, for example, the sensor stage 1 is switched on, then the transistor 4, as already stated, conducts current through the base-emitter path of the transistor 6. The transistor 6 is thus switched on and its collector has a positive potential. The base of the transistor 7 is, like the bases of all the other transistors 7, connected to the outer resistance R 4  and thus to the positive pole (+U Batt ) and the transistors 7 are blocked. If a negative timing pulse is applied to C 1  then the bases of the transistors 7 are likewise negative. However only the transistor 7 of stage 1 can pass on a positive potential by means of its collector to the stage 2 and thus switch on the second sensor stage because a positive potential is applied only at its emitter, whereas the emitters of the transistors 7 of the further stages do not conduct a positive potential. Each further timing pulse switches the next following stage on like a ring counter. The electrical connection of the collector of the transistor 7 of the nth stage to the base of the transistor 2 of the first stage closes the ring. The timing pulses inverted by means of the transistor 7 are thus fed only to those sensor stages which have to be switched on according to the forwarding mechanism of a ring counter. This sensor stage is always the sensor stage next adjacent to the switched on stage in each case as seen in the counting direction. 
     The circuit of FIG. 4 has all the advantages of the known arrangement of FIG. 3, i.e. integration of as many elements as possible of the ring counter and keeping clear the inputs and outputs of sequential pulses, but has in addition, as compared to the known arrangement of FIG. 3, the further advantage that capacitances can be dispensed with so that no integration of capacitances is necessary. 
     It will be understood that the above description of the present invention is susceptible to various modifications, changes and adaptations.