Abstract:
A current supply circuit includes an input, a load terminal, a selectively activatable current regulator, a selectively activatable adjustable current source, and a comparator circuit. The input is configured to receive a first value signal. The load terminal is configured to provide a load current that is dependent on the first value signal. The current regulator is operable to, when activated, cause a first current to be provided through the load based on the first value signal. The adjustable current source is operable to, when activated, cause a second current to be provided through the load based on the first value signal. The comparator circuit is operable to generate a comparison of the first value signal and a second value signal, and is further operable to cause selective activation of one of the current regulator or the adjustable current source based on the comparison.

Description:
FIELD OF THE INVENTION 
   The present invention relates to a current supply circuit and a method for supplying current to a load. 
   BACKGROUND 
   Current supply circuits having current regulating arrangements which provide a load current depending on a desired value signal are sufficiently known. DE 37 41 765 A1 and DE 38 13 066 A1 in each case describe such current regulating arrangements formed as switching regulators. 
   For current regulating purposes, current regulating arrangements of this type require a detection of the load current flowing through the load. Particularly in the case of current regulating arrangements provided with a large operating range, a high resolution and a high accuracy, the need arises to accurately detect the load current actually flowing. This problem emerges particularly for the “lower” operating range where small currents are made available whose values amount to only a fraction of the largest possible currents at the “upper” end of the operating range. In this case, for exact detection of the load current, it is necessary to work with external, high-precision components since circuit elements in integrated circuits achieve the desired accuracy and resolution only with a considerable trimming outlay. However, these external components contribute to increasing the production costs. 
   In the case of current regulators formed as switching regulators in which a semiconductor switch is opened and closed in a clocked manner for the purpose of supplying current to the load, the current measurement is additionally made more difficult since a high-frequency signal resulting from the clocked driving of the switch is in this case superposed on the load current. The influence of this high-frequency signal on the measurement signal rises as the load current decreases, that is to say the influence increases in the lower operating range. 
   In the case of current regulating arrangements known heretofore, regulation in the lowermost current range has therefore been dispensed with, or the corresponding resolution and accuracy have been adapted to the measurement accuracy technically possible. 
   It is an aim of the present invention to provide a current supply circuit for a load and a method for supplying current to a load in which a supply of current to the load is ensured over a wide operating range, in particular even with small currents, with a precisely adjustable load current. 
   SUMMARY 
   This aim is achieved by a current supply circuit and a method for supplying current to a load in accordance embodiments of the invention. 
   The current supply circuit according to the invention comprises an input for feeding a desired value signal and a load terminal for connecting a load and providing a current through the load, said current being dependent on the desired value signal. The current supply circuit has an activatable and deactivatable current regulating arrangement, which is connected to the output terminal and to which the desired value signal and a current measurement signal dependent on the load current are fed and which, in the activated state, brings about a regulated load current through the load dependent on the desired value signal and the current measurement signal. Moreover, the current supply circuit comprises an activatable and deactivatable adjustable current source arrangement which is connected to the output terminal and, in the activated state, brings about a current through the load dependent on the desired value signal. For the activation and deactivation of the current regulating arrangement and the current source arrangement, provision is made of a comparator arrangement, to which the desired value signal and a limit value signal are fed and which activates either the current regulating arrangement or the current source arrangement depending on a comparison of the desired value signal with the limit value signal. 
   In this case, the comparator arrangement is preferably formed in such a way that it activates the current regulating arrangement if the desired value signal lies above the limit value signal, and that it activates the current source arrangement if the desired value signal lies below the limit value signal. During the comparison of the desired value signal with the limit value signal, a hysteresis is preferably taken into account in order, in the case of values of the desired value signal which lie in the region of the limit value signal, to avoid a frequent changeover between the current regulating arrangement and the current source arrangement, and vice versa. 
   The current source arrangement is preferably formed as a current mirror arrangement having a first current path and a second current path coupled to the first current path, an adjustable current source being arranged in the first current path, the desired value signal being fed to said current source as setting signal. The second current path is coupled to the output terminal in order to bring about, in the activated state of the current mirror arrangement, a current through the load which, by means of the current mirror ratio, is dependent on the current provided by the current source. A current mirror arrangement of this type has an increased power loss compared with a current regulating arrangement, so that, in the case of large load currents, such a current mirror arrangement is already problematic owing to the evolution of heat associated therewith. This evolution of heat is less significant, however, in the case of small load currents and thus a small power loss seen in absolute terms. 
   The advantage of the present current supply circuit is that an exactly adjustable load current is made available for the load over a large operating range. In the upper operating range, that is to say in the case of desired values above the limit value prescribed by the limit value signal, the current is provided by the current regulating arrangement that is optimized with regard to its effectiveness for load currents in the upper operating range. In the case of small load currents, that is to say in the case of desired values below the limit value, the load current is provided by the unregulated current source circuit that supplies a precisely adjustable load current. Since both the current regulating arrangement and the current source circuit provide a load current dependent on the desired value, it is the case that when changing over from the current regulating arrangement to the current source arrangement and vice versa, the monotone nature of the load current is ensured, that is to say that no jumps occur in the load current during the changeover. 
   In one embodiment, the current regulating arrangement is formed as a switchable current regulating arrangement comprising a semiconductor switch having a load path and a control terminal, the load path being connected to the output terminal. Such a current regulating arrangement furthermore comprises a drive circuit, to which the desired value signal and the current measurement signal are fed and which provides a clocked drive signal for the semiconductor switch, the duration of switch-on periods of the drive signal being dependent on the desired value signal and the current measurement signal. 
   A regulator is present for providing said drive signal, which regulator provides a regulating signal from the desired value signal and the current measurement signal. Said regulator has a proportional action, integral action or a proportional-integral action. The regulating signal of the regulator is fed to a pulse width modulator that provides a pulse-width-modulated signal for driving the semiconductor switch with a pulse duration dependent on the regulating signal. 
   There are various possibilities for the activation and deactivation of the current regulating arrangement. One embodiment provides for a supply voltage of the current regulating arrangement to be switched off. In the case of a switching regulator, by way of example, the drive circuit providing the drive signal is switched off as a result of this and the switch is thereby deactivated. 
   Moreover, in the case of a switching regulator, there is the possibility of connecting a switch between the drive circuit and the semiconductor switch in order, when the switch has been opened, to deactivate the semiconductor switch and thus the current regulating arrangement. 
   For the activation and deactivation of the current source circuit, there is the possibility of either interrupting the voltage supply of the current source circuit or switching off the adjustable current source. 
   The method according to the invention for supplying a load with a load current dependent on a desired value signal provides for the provision of an activatable and deactivatable current regulating arrangement which, in the activated state, brings about a load current through the load that is regulated in a manner dependent on a desired value signal and a current measurement signal dependent on the load current. Moreover, provision is made of an activatable and deactivatable current source circuit which, in the activated state, brings about a current through the load dependent on the desired value signal. The desired value signal is compared with a limit value signal, either the current regulating arrangement or the current source arrangement being activated depending on the comparison result. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention is explained in more detail below using exemplary embodiments with reference to figures. 
       FIG. 1  schematically shows a current supply circuit with an activatable and deactivatable current source arrangement and an activatable and deactivatable current regulating arrangement for supplying current to a load. 
       FIG. 2  shows an exemplary embodiment of a current supply circuit with a current regulating arrangement formed as a switching regulator and a current source arrangement formed as a current mirror arrangement. 
       FIG. 3  shows an example of the realization of a comparator arrangement that activates and deactivates the current regulating arrangement and the current source arrangement. 
       FIG. 4  shows an example of the realization of a drive circuit of a switching regulator with a regulator and a pulse width modulator in  FIG. 4   a , an example of the realization of the regulator in  FIG. 4   b , an example of the realization of the pulse width modulator in  FIG. 4   c , and selected signal profiles for elucidating the functioning of the pulse width modulator in  FIG. 4   d.    
       FIG. 5  illustrates a further possibility for deactivating the current regulating arrangement by switching off the drive circuit. 
       FIG. 6  illustrates a further possibility for deactivating the current mirror arrangement in accordance with  FIG. 2 . 
   

   DETAILED DESCRIPTION 
   In the figures, unless specified otherwise, identical reference symbols designate identical structural parts and signals with the same meaning. 
     FIG. 1  schematically shows a current supply circuit according to the invention having an input terminal IN for feeding a desired value signal S 1 , which prescribes the value of the current provided, and an output terminal N 1  for connecting a load Z, which is illustrated by dashed lines in  FIG. 1 . The current supply circuit comprises an activatable and deactivatable current regulating arrangement  10 , to which the desired value signal S 1  is fed and which is connected to the output terminal N 1  in order, in the activated state, to bring about a current I 11  through the load Z dependent on the desired value signal S 1 . In the example illustrated, the current regulating arrangement  10  is connected between the output terminal N 1  and reference-ground potential GND, while the load Z is connected between a positive supply potential V 1  and the output terminal N 1 . It goes without saying that these potential conditions can also be interchanged. 
   In order to regulate the load current IL flowing through the load Z, which load current, when the current regulating arrangement  10  is activated, corresponds to the current I 11  through the current regulating arrangement  10 , the current regulating arrangement  10  is fed a current measurement signal S 2  provided by a current measuring arrangement  40  connected into the load circuit. 
   The current supply circuit furthermore comprises an unregulated current source circuit  20  connected between the output terminal N 1  and reference-ground potential GND in a manner corresponding to the current regulating arrangement  10 . Said current source circuit  20  is likewise activatable and deactivatable and, in the activated state, brings about a current I 21  through the load dependent on the desired value signal S 1 . Said desired value signal is fed to the current source arrangement  20  as a setting signal for setting the current I 21  provided. 
   The current supply circuit additionally comprises a comparator arrangement  30 , to which the desired value signal S 1  and a limit value signal S 3  are fed and which provides activation/deactivation signals S 31 , S 32  for the current regulating arrangement  10  and the current source arrangement  20  depending on a comparison result between said two signals S 1 , S 3 , the comparator arrangement  30  being designed to activate only either the current regulating arrangement  10  or the current source arrangement  20  and to deactivate the respective other arrangement, depending on the comparison result. 
   The limit value signal S 3  is coordinated in particular with the properties of the current regulating arrangement  10  in such a way that, in the case of desired values S 1  that lie below the limit value signal S 3 , it is no longer possible to ensure a sufficiently accurate current supply by the current regulating arrangement  10 . Therefore, in the case of desired values below the limit value signal S 3 , a changeover is made to the current source arrangement  20 , which offers a high accuracy even in the case of small required load currents IL. 
     FIG. 2  shows an exemplary embodiment of a current supply circuit in which the current regulating arrangement  10  is formed as a switching regulator and the current source arrangement  20  is formed as a current mirror arrangement. Such current regulating arrangements  10  formed as switching regulators are suitable in particular as current regulators for inductive loads, such as solenoid valves, for example. In  FIG. 2 , the series circuit formed by a resistor R and an inductance L is illustrated as an equivalent circuit diagram for such a load. 
   The switching regulator  10  comprises a semiconductor switch T 11 , which is formed as an n-conducting MOSFET in the example and the load path or drain-source path of which is connected between the output terminal N 1  and reference-ground potential GND in order to regulate the current flow from supply potential V 1  through the load Z to reference-ground potential GND. 
   A drive circuit  12  is provided for driving said semiconductor switch T 11 , which drive circuit supplies a clocked drive signal S 11  at the drive terminal or gate terminal of the semiconductor switch T 11 . In order to generate said drive signal S 11 , the desired value signal S 1  and the current measurement signal S 2  are fed to the drive circuit  12 . The drive signal S 11  is a pulse-width-modulated signal whose duty cycle is dependent on the desired value signal S 1  and the current measurement signal S 2 . 
   A switch SW 1  is provided for activating or deactivating said switching regulator  10 . The switch SW 1  is connected between the drive circuit  12  an the drive terminal of the semiconductor switch T 11  and, according to the activation/deactivation signal S 31  supplied by the comparator arrangement  30 , is opened in order to deactivate the switching regulator  10  or is closed in order to activate the switching regulator  10 . 
   In the example in accordance with  FIG. 2 , the current source arrangement  20  is formed as a current mirror arrangement having a first current path and a second current path. The first current path comprises an adjustable current source  23  and a first current mirror transistors T 22 , which, in the example, is formed as an n-conducting MOSFET and is connected up as a diode. The second current path is formed by the load path of a second current mirror transistor T 21 , which is likewise formed as a n-conducting MOSFET, the gate terminals and the source terminals of the current mirror transistors T 21 , T 22  in each case being connected to one another for the purpose of coupling the first and second current paths. The second current path that is to say the load path of the second current mirror transistor T 21 , is connected between the output terminal N 1  and reference-ground potential GND in order, in the activated state of the current mirror arrangement, to bring about a current I 21  from supply potential V 1  through the load Z to reference-ground potential GND. This current I 21  in the second current path is proportional to the current I 22  supplied by the current source  23  in the first current path. The current I 11  brought about through the load Z by the current regulating arrangement  10  is proportional to the desired value signal S 2 , the proportionality factor depending on the internal construction of the drive circuit  12 . In order not to obtain any jump in the load current IL when changing over from the current regulating arrangement  10  to the current source arrangement  20 , the proportionality factor specifying the proportionality between the load current I 21  and the current source current I 22  is preferably chosen to be identical to the proportionality factor of the current regulating arrangement  10 . This proportionality factor of the current mirror can be set in a sufficiently known manner by means of the area ratio of the current mirror transistors T 21 , T 22 . If appropriate, it must be taken into account in this case that the current source current I 22  does not usually correspond to the desired value signal S 1 , but rather is proportional to said desired value signal. 
   The current source  23  present in the first current path supplies the current I 22  proportional to the desired value signal S 1  in the first current path, which is mapped onto the current I 21  flowing through the load by means of the current mirror transistors T 21 , T 22 . 
   In  figure 2 , a switch SW 2  is provided for activating and deactivating the current mirror arrangement  20 . The switch SW 2  is connected upstream of the setting terminal of the current source  23 , said switch being opened by the activation/deactivation signal S 32  in order to deactivate the current source  23 , and thus to set the current source current  122  to zero, and being closed in order to activate the current mirror arrangement  20  and thus to bring about a current  122  dependent on the desired value signal Si in the first current path. 
     FIG. 3  shows an exemplary embodiment of a comparator arrangement  30  having a comparator K 30 , to whose noninverting input the desired value signal S 1  is fed and to whose inverting input the limit value signal S 3  is fed. The comparator K 30  provides a comparator output signal S 31  corresponding to one of the two activation/deactivation signals, in the present case to the signal S 31  that activates/deactivates the current regulating arrangement  10 . The second activation/deactivation signal S 32  is provided from the first activation/deactivation signal and by means of an inverting INV. The two signals S 31 , S 32  are thus complementary to one another. As a result, only one of the two current supply arrangements, either the current regulating arrangement  10  or the current source arrangement  20 , is activated at any one time. 
   The comparator K 30  preferably has a hysteresis behavior in order, in the case of a desired value signal S 1  lying in the region of the limit value signal S 3 , to prevent frequent, briefly successive changes in the comparator output signal S 31 , in order thereby to avoid a frequent, briefly successive changeover between the arrangements  10  and  20 . This comparator circuit K 30  may be realized in particular as a digital circuit. 
   An example of the realization of a drive circuit  12  for the switching regulator  10  in accordance with  FIG. 2  is explained below with reference to  FIGS. 4   a  to  4   d.    
   With reference to  FIG. 4   a , the drive circuit  12  comprises a regulator  13 , to which the desired value signal S 1  and the current measurement signal S 2  are fed. 
   Said regulator has a proportional action, an integral action or a proportional-integral action and provides a regulating signal S 13  dependent on the difference between the desired value signal S 1  and the current measurement signal. Said regulating signal S 13  is fed to a pulse width modulator  14  that provides a pulse-width-modulated signal as drive signal S 11 , the duty cycle of said pulse-width-modulated signal being dependent on the regulating signal S 13 . 
     FIG. 4   b  shows an example of the realization of a regulator  13  with integral regulating action. This regulator comprises a differential element  131 , which forms the difference between the desired value signal S 1  and the current measurement signal S 2 , and an integrator  132 , which is connected downstream of the differential element and provides the regulating signal S 13 . 
   With reference to  FIG. 4   c,  the pulse width modulator  14  comprises a sawtooth generator  141 , which provides a sawtooth signal S 14  that is fed to first and second comparators  142 ,  143 . The first comparator  142  compares the sawtooth signal S 14  with the regulating signal S 13  and the second comparator  143  compares the sawtooth signal S 14  with a reference signal S 15 . Connected downstream of the comparators  142 ,  143  is an RS flip-flop  144 , at the output Q of which the pulse-width-modulated signal S 11  is available. In this case, the first comparator  142  serves for resetting and the second comparator  143  serves for setting the flip-flop  144 . 
   The functioning of this pulse width modulator in accordance with  FIG. 4   c  is explained below with reference to  FIG. 4   d.    
     FIG. 4   d  shows, in an illustration one below the other, the temporal profile of the sawtooth signal S 14  and also of a regulating signal S 13 , which rises over time in the example, and of the pulse-width-modulated signal S 11 . The flip-flop  144  is set in each case when the sawtooth signal S 14  reaches the reference signal S 15 , as a result of which the pulse-width-modulated signal S 11  rises to a high level. In this case, the flip-flop remains set until the sawtooth signal S 14  exceeds the regulating signal S 13 . As can be seen from  FIG. 4   d , the pulse duration increases as the regulating signal S 13  rises, in order in this way to increase the switch-on duration of the switch T 11  ( FIG. 2 ) and thereby to increase the current flow. 
   In this case, a gradient of the regulating signal S 13  may result both from an increase in the desired value signal S 1  and from a reduction of the load current, for example when the load is increased. 
   In order to deactivate the current regulating arrangement, a switch SW 1  is provided between the drive circuit  12  and the semiconductor switch T 11  in the exemplary embodiment in accordance with  FIG. 2 . 
   With reference to  FIG. 5 , for deactivating the current regulating arrangement  10 , there is also the possibility of interrupting a voltage supply of the drive circuit  12 , said voltage supply not being specifically illustrated in  FIG. 2 . For this purpose, the switch SW 1  is connected between a supply potential V 2  and the supply terminal of the drive circuit  12 , said switch being driven by the first activation/deactivation signal S 31  in the manner already explained. 
   For activating or deactivating the current mirror arrangement  20 , there is correspondingly the possibility of connecting the switch SW 2  between the current source  23  and the supply potential V 1 , as is illustrated in  FIG. 6 . This switch SW 2  is driven by the second activation/deactivation signal S 32  in the manner already explained. 
   It should be pointed out that, in addition to the switching regulator illustrated in  FIG. 2 , it is possible, of course, to use any desired further activatable and deactivatable current regulating arrangements in the current supply circuit according to the invention. Moreover, in addition to the current mirror arrangement explained in  FIG. 2 , it is possible to use any desired further activatable and deactivatable unregulated, but adjustable current source circuits in the current supply circuit. 
   It is possible, of course, to use any desired current measuring arrangements for providing the current measurement signal S 2 . With reference to  FIGS. 1 and 2 , it should be pointed out that this current measuring arrangement need not necessarily be connected into the load current path. Thus, there is also the possibility, in the case of a switching regulator, of detecting this current according to the so-called current sense principle, in the case of which, in addition to a load transistor (transistor T 11  in  FIG. 2 ), provision is made of an auxiliary transistor that is ideally operated at the same operating point as the load transistor and consequently has a current flowing through it that is proportional to the current through the load transistor. This current through the auxiliary transistor, which usually has a substantially smaller area than the load transistor, can be evaluated for the purpose of generating the current measurement signal. 
   LIST OF REFERENCE SYMBOLS 
   
       
         10  Current regulating arrangement 
         12  Drive circuit 
         13  Regulator 
         14  Pulse width modulator 
         20  Current source arrangement 
         23  Current source 
         40  Current measuring arrangement 
         131  Differential element 
         132  Integrator 
         141  Sawtooth generator 
         144  RS flip-flop 
         142 , 143  Comparators 
       GND Reference-ground potential 
       I 11  Regulated current 
       I 21  Current source current 
       I 22  Current source current 
       IL Load current 
       IN Input terminal 
       INV Inverter 
       K 30  Comparator 
       L Inductance 
       N 1  Output terminal 
       R Resistor 
       S 1  Desired value signal 
       S 11  Drive signal 
       S 13  Regulating signal 
       S 14  Sawtooth signal 
       S 15  Reference signal 
       S 2  Current measurement signal 
       S 3  Limit value signal 
       S 31 ,S 32  Activation/deactivation signal 
       SW 1  Switch 
       SW 2  Switch 
       T 11  Semiconductor switch, n-conducting MOSFET 
       T 21 ,T 22  Current mirror transistors, n-conducting MOS-FETs 
       V 1 ,V 2  supply potential 
       Z load