Abstract:
A small value current source circuit utilized in bipolar integrated circuits. A reference potential is level-shifted by a first level shift circuit and applied to one input of a differential amplifier. The reference potential is also level-shifted by a second level shift circuit and applied to the other input of the differential amplifier. A constant current source circuit supplies currents both proportional to the currents flowing in the differential amplifier and of mutually different values to the first and second level shift circuits. The differential amplifier amplifies the difference of the input voltages and produces an output current.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a current source circuit, in particular, to a minute current source circuit used by a bipolar IC (integrated circuit). 
     2. Description of Prior Art 
     A conventional and widely used minute current source is shown in FIG. 1. This is basically a current mirror and, as commonly known, the relationship between input and output is as follows. 
     
         I.sub.in =I.sub.out ·exp (I.sub.out R.sub.1 /V.sub.t) (1) 
    
     (V t  =kT/q) 
     V t  : Thermal voltage 
     k: Boltzmann&#39;s constant 
     T: Coupling temperature (°K.) 
     q: Electron quantum charge 
     For example, in order to obtain a 0.1 μA output current from a 10 μA input current, when coupling temperature T is a room temperature of appoximately 300° K., since the thermal voltage Vt is 26 mV, according to Formula 1, the value of resistance R1 becomes 1.2 MΩ. If this type of current mirror circuit is formed as part of an integrated circuit, as the resistance value increases, the space occupied by the resistance in the integrated circuit increases, while the resistance value accuracy declines. When these factors are considered, a resistance value of 1.2 MΩ is excessively high for forming part of an integrated circuit. 
     As can also be understood from Formula 1, the input/output relationship is not linear, and even when the temperature coefficient of resistance R 1  is taken as 0, a temperature factor exists. This condition is indicated in FIG. 2. 
     The circuit indicated in FIG. 3 is also well used. In this case, the input/output relationship is as follows. 
     
         I.sub.in =I.sub.out ·exp (-I.sub.out R.sub.2 /V.sub.t) (2) 
    
     Under the same temperature conditions as Formula 1, in order to obtain a 0.1 μA output current from a 10 μA input current, according to Formula 2, resistance R 2  is 12 KΩ. Although a high resistance, such as R 1  in FIG. 1, is not needed, as indicated in FIG. 4, the input/output relationship does not increase simply, but in the range of actual use as a minute current source, the relation is such that when the input current increases, the output current decreases. Also the resistance R 2  voltage drop increases, and when transistor Q1 enters saturation, the conditions of Formula 2 are no longer met and even when the temperature coefficient of resistance R 2  is taken as 0, a temperature factor exists. 
     As described above, in attempting to achieve a minute current source with the conventional circuit of FIG. 1, a high resistance is needed that is too large to incorporate into an IC, while the expanded chip size raises the cost. Resistance accuracy is also deficient. In the conventional circuit of FIG. 3, which seeks to avoid these problems, as the input current increases, the output current decreases. With respect to small input current variation, the output current variation is large, and there is risk of transistor saturation. 
     In addition, a common point of both the circuits of FIGS. 1 and 3 is that the input/output relationship is not linear, and an output current proportional to the input current cannot be obtained. As they also possess a temperature response, they have the disadvantage in that changes in temperature result in changes in output current. 
     SUMMARY OF THE INVENTION 
     An objective of the present invention is to provide a minute current source circuit that does not use the above mentioned resistance, possesses a linear input/output current relationship, and wherein this relationship does not have a temperature response. 
     A current source circuit in accordance with this invention comprises: 
     a differential amplifier that includes at least a first and a second transistor, for amplifying a difference in voltage applied to each transistor base, the voltage difference being output from a collector of said first transistor as an output current; 
     a first level shift circuit, including at least one first PN junction connected between a reference potential and said first transistor base, for level-shifting the reference potential to a first voltage drop produced across said first PN junction to apply the first voltage drop to said first transistor base; 
     a second level shift circuit, including second PN junction the number of which is equivalent to that of the first PN junction, connected between said reference potential and said second transistor base, for level-shifting the potential difference to a second voltage drop produced across said second PN junction to apply the second voltage drop to said second transistor base; 
     a first constant current circuit for supplying a first current proportional to the current flowing in said differential amplifier to said first level shift circuit; and 
     a second constant current circuit for supplying a second current proportional to the current flowing in said differential amplifier and different from said first current to said second level shift circuit. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 shows a conventional current source circuit, 
     FIG. 2 shows the current response of the conventional current source circuit shown in FIG. 1, 
     FIG. 3 shows another conventional current source circuit, 
     FIG. 4 shows the current response of the conventional current source circuit shown in FIG. 3, 
     FIG. 5 shows a circuit in accordance with a first embodiment of this invention, 
     FIG. 6 shows the current response of the first embodiment of this invention, 
     FIG. 7 shows a circuit in accordance with a second embodiment of this invention, 
     FIG. 8 shows a circuit in accordance with a third embodiment of this invention, 
     FIG. 9 shows a circuit in accordance with a fourth embodiment of this invention, 
     FIG. 10 shows a circuit in accordance with a fifth embodiment of this invention, and 
     FIG. 11 shows a circuit in accordance with a sixth embodiment of this invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 5 indicates a first embodiment of this invention as a current source circuit. In FIG. 5, the base of a transistor Q 1  is connected to a reference voltage source V bias , and the emitter of the transistor Q 1  is connected to the base of a transistor Q 3 . Likewise, the emitter of transistor Q 3  is connected to the base of transistor Q 5 . This configuration continues to a transistor Q 2M+1 , with quantity M (M is an integral number of 1 or more) transistors consist of a Darlington circuit. 
     The respective emitters of the transistors Q 1 , Q 3  . . . Q 2M-1  are connected to current sources I 1 , I 3 , . . . , I 2M-1 . These transistors and current sources consist of a first level shift circuit 1. 
     Likewise, the respective emitters of the transistors Q 2 , Q 4  . . . , Q 2M  are connected to current sources I 2 , I 4 , . . . , I 2M . These transistors and current sources consist of a second level shift circuit 2. 
     The base of a transistor Q 2M+1  is connected to the emitter of the transistor Q 2M-1 , while the base of a transistor Q 2M+2  is connected to the emitter of the transistor Q 2M . The emitter of the transistor Q 2M+1  is connected via quantity L (L is an integral number greater than 0) of diodes Q 2M+3  -Q 2M+2L+1  to a current source I in , while the emitter of the transistor Q 2M  is connected via quantity L of diodes Q 2M+4  -Q 2M+2L+2  to the current source I in . These transistors, diodes and current source consist of a differential amplifier 3. 
     The outputs of these current sources I 1 , I 2 , . . . , I 2M  are proportional to the output of the current source I in . The proportional constants of the current sources I 1 , I 2 , . . . , I 2M  with respect to the current source I in  are C 1 , C 2 , . . . , C 2M  respectively. 
     The emitter area ratios of the transistors Q 1 , Q 2 , Q 3 , Q 4 , . . . , Q M+1 , Q M+2  and diodes Q 2M+3 , Q 2M+4 , . . . , Q 2M+2L+1 , Q 2M+2L+2  are respectively N 1 , N 2 , N 3 , N 4 , . . . , N 2M+1 , N 2M+2  and N 2M+3 , N 2M+4 , . . . , N 2M+2L+1 , N 2M+2L+2 . 
     In accordance with the above mentioned circuit configuration, an output voltage of the reference voltage source V bias  is level-shifted by the first level shift circuit 1 and applied to the base of the bipolar transistor Q 2M+1  of the differential amplifier circuit 3. The output voltage of the reference voltage V bias  is also level-shifted by the second level shift circuit 2 and applied to the base of the bipolar transistor Q 2M+2  of the differential amplifier circuit 3. 
     A difference in current density arises according to each transistor emitter area ratio in the currents flowing through the first and second level shift circuits 1 and 2. This results in a difference in voltage applied to the bases of the two bipolar transistors Q 2M+1  and Q 2M+2  of the differential amplifier circuit 3, by which the collector currents of these bipolar transistors are controlled. A collector current I out  of the transistor Q 2M+1  thus controlled then appears at an output terminal 4. 
     Following is a description of the operation of the circuit shown in FIG. 5. 
     As commonly known, the voltage V be  between the base and emitter of a transistor can be expressed as V be  =V t  I n  (I c  /N I  s), wherein V t  is the thermal voltage, Ic is the collector current, N is the emitter area ratio, and I s  is the collector saturation current. 
     In FIG. 5, the following voltage formula can be composed for the base-to-emitter closed circuit comprising the transistors Q 1 , Q 3 , . . . , Q 2M+1 , diodes Q 2M+3 , Q 2M+5 , . . . , Q 2M+2L+1 , Q 2M+2L+2 , . . . , Q 2M+6 , Q 2M+4 , and transistors Q 2M+2 , Q 2M , . . . , Q 4 , Q 2 . ##EQU1## 
     A collector current I c  flowing in each transistor of the first and second level shift circuit 1 and 2 is, because the proportional constants of the current sources connected to these transistors and with respect to the current source I n  are respectively C 1 , . . . , C 2M , expressed as follows. 
     
         I.sub.c (Q.sub.1)=C.sub.1 I.sub.in, I.sub.c (Q.sub.2)=C.sub.2 I.sub.in, I.sub.c (Q.sub.3)=C.sub.3 I.sub.in, 
    
     
         I.sub.c (Q.sub.4)=C.sub.4 I.sub.in, . . . , I.sub.c (Q.sub.2M-1)=C.sub.2M-1 I.sub.in, 
    
     
         I.sub.c (Q.sub.2M)=C.sub.2M I.sub.in                       (4) 
    
     Furthermore, the following relationships exist. 
     
         I.sub.c (Q.sub.2M+1)=I.sub.c (Q.sub.2M+3)= 
    
     
         . . .=I.sub.c (Q.sub.2M+2L+1)=I.sub.out . . .              (5) 
    
     
         I.sub.c (Q.sub.2M+2)=I.sub.c (Q.sub.2M+4)= 
    
     
         . . .=I.sub.c (Q.sub.2M+2L+2)=I.sub.in -I.sub.out          (6) 
    
     Therefore, I out  can be derived from Formulas (3)-(6) as follows. ##EQU2## In the above, 
     
         N=(N.sub.2 ·N.sub.4 ·N.sub.6 . . . N.sub.2M+2L+2)/(N.sub.1 N.sub.3 N.sub.5 . . . N.sub.2M+2L+1) (8) 
    
     
         C=(C.sub.1 -C.sub.3 -C.sub.5 . . . C.sub.2M-1)/(C.sub.2 -C.sub.4 -C.sub.6 . . . C.sub.2M)                                             (9) 
    
     In a minute current source, although it is necessary to set the ##EQU3## of Formula (7) to a value sufficiently smaller than 1, from Formulas (8) and (9), it is fully possible to set N and C to values larger than 1, for example, to 100 or 1000. Also, since in an actual circuit, even a large value for L is less than 10, ##EQU4## the value is sufficiently less than 1. 
     As can be understood from Formula (7), the relationship between the input current I in  and the output current I out  is linear, and is completely independent of resistance and temperature. The input/output response of this circuit is as shown in FIG. 6. 
     Next is a description of a second embodiment of this invention as a current source circuit with reference to FIG. 7. 
     With respect to FIG. 5, in the current source circuit of FIG. 7, L=0, M=1 and current sources comprise a current mirror circuit. 
     In this circuit, when the emitter area ratios of transistors Q 1 , . . . , Q 4 , Q 50 , . . . , Q 80  are taken in sequence as N 1  -N 8  and N 6  =N 8 , since I c  (Q 60 )=I in , M=1 and L=0 can be substituted in Formulas (7) and (8) to yield the following relations. 
     
         I.sub.out ={1/(1+NC)}I.sub.in                              (7-1) 
    
     
         N=(N.sub.2 N.sub.4)/(N.sub.1 N.sub.3)                      (8-1) 
    
     
         C=C.sub.1 /C.sub.2                                         (9-1) 
    
     As N 6  =N 8  =1, and the relations of C 1  and C 2  are C 1  =N 5  and C 2  =N 7 , the following is derived from Formula 9-1. 
     
         C=N.sub.5 /N.sub.7                                         (9-1&#39;) 
    
     Consolidating these formulas yields the following. 
     
         I.sub.out =[1/{1+(N.sub.2 N.sub.4 N.sub.6)/(N.sub.1 N.sub.3 N.sub.7 }]I.sub.in                                                (10) 
    
     In the above, N 6  =N 8  =1. For example, when N 1  =N 3  =N 6  =N 7  =N 8  =1 and N 2  =N 4  =N 5  =10, I out  =(1/1001) I in . The output current I out  becomes 1/1001 the magnitude of the input current I in . This output current is directly proportional to the input current and is independent of resistance or temperature factors. 
     Following is a description of a third embodiment of this invention as a current source circuit with reference to FIG. 8. 
     Although M=1 and L=0 in the same manner as the FIG. 7 circuit, in the FIG. 8 circuit, transistors Q 1  and Q 2  are used as diodes. The basic operation is the same as the FIG. 5 circuit and in this case as well, with the Q 1  -Q 80  emitter area ratio at N 1  -N 8  as N 6  =N 8  =1, the conditions of Formula 10 are composed in the same manner as the FIG. 7 circuit. 
     Although in this case, both Q 1  and Q 2  are used as diodes, it is also possible to use only one of these as a diode. For example, if only Q 1  is a diode and Q 2  is a transistor, the emitter of the transistor Q 2  is connected to the base of the transistor Q 4 , and the base of the transistor Q 2  is connected to the anode of the diode Q 1 , and the collector of the transistor Q 4  is connected to the power source V cc . This configuration as well forms the conditions applicable to Formula 10. 
     Next is a description of a fourth embodiment of this invention as a current source circuit with reference to FIG. 9. 
     In the FIG. 9 circuit, the polarities of the diodes Q 1  and Q 2  are reversed with respect to the FIG. 8 circuit and a current mirror circuit is provided in place of the reference voltage source V bias . The emitter area ratio of diodes Q 1  and Q 2  and transistors Q 3 , . . . , Q 100  is taken in sequence as N 1  -N 10 . 
     In this case, the following voltage formula can be composed for the base-to-emitter closed circuit of diode Q 1 , transistors Q 3  and Q 4 , and diode Q 2 . 
     
         V.sub.t I.sub.n (I.sub.c (Q.sub.1)/N.sub.1 I.sub.s)-V.sub.t I.sub.n (I.sub.c (Q.sub.3)/N.sub.3 I.sub.s)+ 
    
     
         V.sub.t I.sub.n (I.sub.c (Q.sub.4)/N.sub.4 I.sub.s)-V.sub.t I.sub.n (I.sub.c (Q.sub.2)/N.sub.2 I.sub.s)=0                     (11) 
    
     The following formula also applies. 
     
         I.sub.c (Q.sub.1)=(N.sub.5 N.sub.10 /N.sub.8 N.sub.9)I.sub.in, I.sub.c (Q.sub.2)=(N.sub.7 N.sub.10 /N.sub.8 N.sub.9)I.sub.in, 
    
     
         I.sub.c (Q.sub.3)=I.sub.out, I.sub.c (Q.sub.4)=I.sub.c (Q.sub.6)-I.sub.out, 
    
     
         I.sub.c (Q.sub.6)=(N.sub.6 /N.sub.8)I.sub.in               (12) 
    
     When N 6  =N 8  =1, I out  can be derived from Formulas 11 and 12 as follows. 
     
         I.sub.out =[1/{1+(N.sub.1 N.sub.4 N.sub.7 /N.sub.2 N.sub.3 N.sub.5)}]I.sub.in                                        (13) 
    
     As can be understood from comparing Formulas (13) and (10), although they differ in form, they are the same and yield the same results. 
     A fifth embodiment of this invention is shown in FIG. 10. 
     FIG. 10 is a case where M=2 and L=0, and a diode Q 101  is provided in place of the reference voltage source V bias . 
     The diode Q 101  and transistor Q 1 , . . . , Q 100  area ratio is N 1  -N 10  and when N 8  =N 10  =1, since I c  (Q 80 )=I in , M=2 and L=0 can be substituted in Formulas (7) and (8) to yield the following. 
     
         I.sub.out ={1/(1+N.sub.k)}I.sub.in                         (7-2) 
    
     
         N=(N.sub.2 N.sub.4 N.sub.6)/(N.sub.1 N.sub.3 N.sub.5)      (8-2) 
    
     
         C=(C.sub.1 C.sub.3)/(C.sub.2 C.sub.4)                      (9-2) 
    
     Since N 8  =N 10  =1, the relationship to C 1  -C 6  is C 1  =C 3  =N 7 , and C 2  =C 4  =N 2 , the following is obtained from Formula 9-2. 
     
         C=(N.sub.7 /N.sub.2).sup.2                                 (9-2&#39;) 
    
     These formulas can be consolidated as follows. 
     
         I.sub.out =[1/{1+(N.sub.2 N.sub.4 N.sub.6 N.sub.7.sup.2)/N.sub.1 N.sub.3 N.sub.5 N.sub.9.sup.2)}]I.sub.in                          (14) 
    
     In the above, N 8  =N 10  =1. 
     For example, when N 1  =N 3  =N 5  =N 8  =N 9  =N 10  =1, and N 2  =N 4  =N 6  =N 7  =4, I out  =(1/1025) I in . The output current I out  becomes 1/1025 the magnitude of the input current I in , independently of resistance and temperature factors. 
     A sixth embodiment of this invention as a current source circuit is shown in FIG. 11. In the FIG. 11 example, M=3 and L=1, and the emitter area ratios of the diodes and transistors Q 1  -Q 14  are N 1  -N 14 . When N 13  =N 15  =1, since I c  (Q 13 )=I in , M=3 and L=1 can be substituted in Formulas (7) and (8) to yield the following. 
     
         I.sub.out ={1/(1+NC)}I.sub.in                              (7-3) 
    
     
         N=(N.sub.2 N.sub.4 N.sub.6 N.sub.8 N.sub.10)/(N.sub.1 N.sub.3 N.sub.5 N.sub.7 N.sub.9)                                          (8-3) 
    
     
         C=(C.sub.1 ·C.sub.3 ·C.sub.5)/(C.sub.2 ·C.sub.4 ·C.sub.6)                                        (9-3) 
    
     Since N 13  =N 15  =1, the relationship of C 1  -C 6  is C 1  =C 3  =N 11 , C 5  =N 12  and C 2  =C 4  =C 6  =N 14 . The following is obtained from Formula (7-3). 
     
         k=N.sub.11.sup.2 N.sub.12 /N.sub.14.sup.3                  (9-3&#39;) 
    
     By consolidating these formulas, the following relationship is obtained. 
     
         I.sub.out =[1/{1+(N.sub.2 N.sub.4 N.sub.6 N.sub.8 N.sub.10 N.sub.11.sup.2 N.sub.12)/(N.sub.1 N.sub.3 N.sub.5 N.sub.7 N.sub.9 N.sub.14.sup.3)}]I.sub.in                                 (15) 
    
     In the above, N 13  =N 15  =1. 
     The relationship between I out  and I in  is determined only by the emitter area ratio, independently of resistance and temperature. 
     As described in the foregoing, as a result of this invention, a current source circuit can be realized wherein the relationship between an input current and an output current is determined solely by the transistor area ratio and independently of the input/output current, resistance and temperature. Furthermore, since the input/output current relationship is linear, an output current proportional to the input current can be obtained. In addition, this advantage is realized even if the input current comprises a bias current and current variation component, thus enabling applications as a superbly linear current attenuator.