Abstract:
A dc voltage converter or dc-RF modulation converter includes an inverting {dot over (C)}uk converter circuit operating under hysteretic feedback control. In an exemplary embodiment, the converter further includes a damping circuit to ensure stability over the extended control frequency bandwidth afforded by the hysteretic control. The converter may further include a non pulse-skipping pulse width control circuit, such that the hysteretic controller&#39;s switching signal is limited to maximum and minimum pulse widths, which avoids potential saturation issues where transformer isolation is used for switching the {dot over (C)}uk circuit. In an exemplary application, the converter is used as part of a supply modulation amplifier circuit within a wireless base station, which application capitalizes on the extended bandwidth gained through hysteretic control and reduced circuit complexity by generating signal amplification power directly from the −48 VDC supply rail in the base station.

Description:
RELATED APPLICATIONS 
     This application is C-I-P of U.S. application Ser. No. 09/911,105, filed on Jul. 23, 2001 now U.S. Pat. No. 6,583,664 and a C-I-P of and from U.S. application Ser. No. 09/566,194, filed on May 5, 2000, now issued as U.S. Pat. No. 6,300,826. Both the issued U.S. patent and the co-pending application are expressly incorporated herein by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     The present invention generally relates to dc voltage converters and particularly relates to an inverting converter operating under hysteretic feedback control, such as used for dc-to-dc conversion or dc-to-RF modulation. 
     Switch-mode dc-to-dc converters offer potentially significant efficiency gains as compared to their linear converter counterparts, particularly for applications involving high load currents and/or large conversion voltage differentials. As with most things, however, the switch-mode converter&#39;s list of advantages has a corresponding list of disadvantages. Potential disadvantages include poor transient response, possible operational instability, significant radiated and conducted electromagnetic interference (EMI), and the need for high performance components, e.g., inductors with good core saturation properties and low dc losses, low equivalent series resistance (ESR) capacitors, etc. 
     Careful printed circuit board (PCB) layout, such as by minimizing switched current loop areas and using appropriate grounding layouts, and careful component selection, together go a long way toward addressing many of the potential disadvantages associated with switch-mode converters. More fundamentally, however, some converter topologies offer intrinsically superior performance, although it should be understood that a particular converter topology&#39;s “superiority” might apply only in the context of particular applications or uses. 
     The “{dot over (C)}uk converter” represents one such converter topology that offers superior switch-mode performance for an appreciable variety of applications. Developed by Dr. Slobodon {dot over (C)}uk, and described in exemplary fashion in U.S. Pat. No. 4,184,197 (now expired), the “{dot over (C)}uk topology” offers particular advantages with regard to EMI in that neither its input nor its output currents are truly “switched” on and off. Many other converter topologies electrically switch (connect/disconnect) one or both the input and output converter circuits, resulting in pulsed input or output currents, or both. For example, so-called “boost” and “buck-boost” converters have at least one side (input or output) with pulsed current. Pulsed input/output current increases the risk of EMI problems, among other things. 
     With the {dot over (C)}uk topology, an input inductor circuit is coupled to an output inductor circuit through a storage element, which typically is implemented as a charge storage capacitor. The opposing sides of that capacitor are alternately switched to reference ground, such that the desired output voltage is generated as a function of charge transfer through the switched capacitor. With the series placement of the input and output inductors, the input and output currents are naturally “smoothed” rather than pulsed, which yields greatly reduced EMI. 
     Because the {dot over (C)}uk topology is naturally inverting, although that behavior may be altered through modified capacitor switching, it stands as a natural candidate for use in environments with readily available negative voltage supplies, such as the −48 VDC “rail” commonly used in telecommunication circuits, e.g., in Central Office systems, and in wireless communication base stations. However, in many such circumstances, such as where the negative rail otherwise might be “tapped” for use in high-power radio frequency transmit signal generation, the performance of the general {dot over (C)}uk topology falls short in terms of bandwidth, as well as in other areas. 
     Ideally, then, one would modify the general {dot over (C)}uk topology to extend its performance in the context of telecommunication usage. With the required improvements, an appropriately modified {dot over (C)}uk converter would offer an advantageous means for using the reliable and ubiquitous negative supply rail(s) available in telecommunication and wireless network systems directly in transmit signal generation, or for other demanding, relatively high-bandwidth voltage conversion tasks. 
     SUMMARY OF THE INVENTION 
     The present invention comprises a method and apparatus to extend the operation of an inverting {dot over (C)}uk converter by applying closed-loop hysteretic control. Using such hysteretic control expands the range of advantages of the general {dot over (C)}uk converter topology to include significantly enhanced line and load regulation performance. That is, hysteretic feedback control is used to extend the control bandwidth of the {dot over (C)}uk converter topology in a dc voltage converter, enabling such converters to serve in dc-to-RF modulation applications and other radio amplifier applications, microprocessor supply controller applications and other higher-performance dc-to-dc voltage conversion applications. 
     In an exemplary embodiment, a dc voltage converter includes a hysteretically controlled {dot over (C)}uk converter circuit and an optional damping control circuit to ensure stability of operation over the extended converter bandwidth. Advantageously, the damping control circuit may be implemented at low component cost as a resistor-capacitor “snubber” circuit coupled across the energy transfer capacitor used to couple input and output inductive circuits that form part of the basic {dot over (C)}uk converter topology. Where the inventive converter is used in RF signal amplification, the damping circuit may be tuned for sub-harmonics of the RF signal. 
     Further, the feedback control loop of the converter may include, in addition to a hysteretic controller, a pulse controller that limits the maximum on/off pulse time. With inclusion of such pulse limiting, a transformer drive circuit may be used without the potential core saturation problems that might otherwise arise. Use of the transformer drive circuit may be particularly desirable where the input voltage to the converter has a fairly high magnitude, and thus would complicate the design of non-isolated drive circuits. One example of such circumstances is usage of the converter as a supply signal modulator for a power amplifier in a “polar modulation” radio transmitter circuit within a wireless communication base station. In such applications, the switching rate of the inventive converter may be configured based on known RF signal characteristics, such as the information symbol or chip rate of the signal. 
     Wireless base stations typically provide a high-reliability negative supply rail at −48 VDC or some other standard voltage, as do many other types of telecommunication equipment. A supply signal modulator for a polar modulation transmitter thus might comprise a linear amplifier in combination with a dc voltage converter configured according to the present invention. The linear amplifier advantageously would have a relatively high bandwidth and supply the higher frequency but lower power components of the modulated supply signal, while the converter of the present invention would supply the lower frequency but higher power components of that signal. With that configuration, much of the power for supply signal modulation would be taken directly from the highly reliable −48 VDC rail, thus simplifying the circuit design. 
     Most radio base station high power RF amplifier circuits first convert −48 VDC to +28 VDC, but the present invention eliminates the need for that step. That is, RF signal power may be taken directly and efficiently” from the −48 VDC rail using the dc voltage converter of the present invention. 
     Of course, those skilled in the art will appreciate that the present converter&#39;s extended bandwidth, stability of control, and convenient transformer drive capability make it an exemplary candidate for use in a wide range of applications. As such, it should be understood that the present invention is not limited by the following exemplary details. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a diagram of an exemplary embodiment of a dc voltage converter according to the present invention. 
     FIG. 2 is a diagram of another exemplary embodiment of a dc voltage converter. 
     FIG. 3 is a diagram of an exemplary radio frequency amplifier according to the present invention, which includes the dc voltage converter of FIG. 2, for example. 
     FIG. 4 is a diagram of exemplary schematic details for the converter of FIG.  2 . 
     FIG. 5 is a diagram of exemplary converter voltage and current waveforms. 
     FIGS. 6A-6D are diagrams of exemplary converter switching current flows. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1 illustrates an exemplary inverting dc voltage converter  10  according to the present invention. In this embodiment, converter  10  comprises an inverting {dot over (C)}uk converter circuit  12 , a switching control circuit (drive circuit)  14 , a hysteretic feedback controller  16 , and a feedback sensing circuit  18 . 
     As shown, converter  10  provides input terminals  20  and  22 , and output terminals  24  and  26 . The “sense” of input-to-output voltage naturally is inverted with the illustrated configuration, thus a negative input voltage applied to terminals  20  and  22  is converted to a positive voltage of a desired magnitude and output on terminals  24  and  26  for powering an attached load. The inverting {dot over (C)}uk converter circuit  12  provides such voltage inversion and, in this exemplary embodiment, comprises an input inductor circuit  30 , including inductor L 1 , which is coupled through a switched capacitor circuit  32  to an output inductor circuit  34 , including inductor L 2 . 
     In basic operation, assume that switch SW 1  of circuit  32  is open and switch SW 2  is closed, thus allowing capacitor C 1  of circuit  32  to charge up to the negative input voltage applied across terminals  20  and  22 , with charging current flowing through SW 2 , C 1 , and L 1  (note that during such charging D 1  holds the voltage across SW 2  to within a diode drop of reference ground (RTN)). If SW 1  is then closed in conjunction with opening SW 2 , the output side of capacitor C 1  is forced to a positive voltage according to the familiar capacitor current equation,            I   C     =     C             v          t           ,                          
     which illustrates that the voltage across a capacitor cannot change instantaneously. With this second switch configuration, capacitor C 1  discharges into the output load based on the current path through SW 1 , C 1 , L 2 , and the load. With repeated switching cycles, a positive output voltage is maintained at the load. 
     With the present invention, hysteretic control circuit  16  controls, directly or indirectly, such switching of the inverting {dot over (C)}uk converter circuit  12 . Incorporating such hysteretic feedback control extends the range of applications to which the basic {dot over (C)}uk converter topology may be applied by increasing the converter&#39;s feedback control bandwidth. Here, feedback sensor circuit  18  may be a direct connection from the output supply terminal  24  to provide the feedback signal as direct voltage feedback to the hysteretic controller&#39;s feedback signal input, or it may be a current sensor to generate the feedback signal as a function of load current. In any case, the feedback signal may be buffered and/or scaled as needed or desired by feedback sensor circuit  18 . 
     With exemplary hysteretic control, the feedback signal is compared to upper and lower reference levels, which generally Hie above and below a reference signal level, e.g., a reference voltage level at the desired output voltage level, or proportional to the desired output voltage. If the feedback signal falls below the lower reference level, the hysteretic switching signal generated by hysteretic control circuit  16  is “asserted” (e.g., pulsed high), which turns “on” the converter circuit  12 , i.e., discharges capacitor C 1  into the output load. Such action causes the output voltage to rise and thus causes the feedback signal to rise. 
     Once the feedback signal rises above the upper reference level, the hysteretic controller circuit  16  de-asserts its output signal, which turns the converter circuit “off.” Of course, those skilled in the art will recognize that negative logic (low assertion) may be used and the statements about high and low assertions should thus be understood as representing nothing more than exemplary logic levels for the illustrated circuit. The loop area of the hysteretic control can be tailored to the desired switching response of the RF modulation in CDMA2000, WCDMA, OFDM, or GSM/EDGE signals. For example, the hysteresis loop can be adjusted to cause the switching rate to be either faster or slower than the symbol rate in GSM/EDGE. 
     FIG. 2 illustrates another exemplary embodiment of a dc voltage converter  10  according to the present invention. Here, the dc voltage converter  10  further includes a pulse control circuit  40  and a damping circuit  42 . Further, the exemplary hysteretic switching controller  16  includes a high-speed comparator having a first input coupled to the feedback sensing circuit  18 , and a second input coupled to a reference signal that corresponds to a desired output voltage level, and thus provides a reference for setting the hysteretic switching levels. 
     Note, too, that the hysteretic controller  16  may include, or otherwise may be associated with, a reference generator  17  that provides the reference signal for input to the hysteretic controller&#39;s comparator. The reference generator  17  may comprise one or more voltage references, such as one or more resistive voltage dividers, band-gap references, etc. Indeed, reference generator  17  may be adjustable, or otherwise programmable, such that the reference signal can be adjusted as needed or desired. 
     The pulse control circuit  40  provides on and off time pulse width limiting for the hysteretic switching signal, such that the switching control circuit  14 , hereinafter “drive circuit  14 ,” may be configured as a transformer-coupled drive circuit. That is, transformer coupling of the switching control signals is desirable because of the voltage levels involved but the use of transformer coupling is not appropriate where the input drive signals may drive the transformer into saturation. 
     By using pulse-time limiting, then, the converter  10  according to the present invention ensures that the input drive signals to drive circuit  14  are limited to maximum on and off times, even if the hysteretic switching signal exceeds a 50% duty cycle. Note that such pulse-time control obviates the need for so-called “pulse skipping,” wherein drive pulses are suppressed rather than time-limited to avoid transformer saturation. 
     Providing further robustness, damping circuit  42  provides damping for a desired signal frequency range, which may be particularly useful in applications where the extended control bandwidth of converter  10  is used to advantage in radio frequency amplification applications, or where high-frequency load transients occur. FIG. 3 illustrates an exemplary amplifier application, wherein the converter  10  resides within a wireless communication base station  50  that includes a polar modulation transmitter circuit  52 . In this embodiment, the output signal of converter  10  is responsive to an RF modulation signal and converter  10  thus operates as a dc-to-RF modulation circuit having a variable frequency and variable pulse width switching characteristics as a result of hysteretically tracking the RF modulation signal, AM_IN. 
     Polar modulation transmitters, sometimes referred to as “VDD amplifiers,” “supply modulators,” “envelope tracking” or “Kahn” technique transmitters, split phase and amplitude information into separate signal paths so that a constant-envelope phase-modulated signal may be amplified by a saturated-mode power amplifier (PA). The supply signal, e.g., the input supply voltage, to the PA is modulated in accordance with desired amplitude modulation information such that the output signal from the PA includes both phase and amplitude modulation. Substantial information regarding exemplary polar modulation transmitters and corresponding VDD amplifiers may be found in the earlier incorporated application and U.S. patent, from which the instant application claims priority, and which are incorporated by reference herein. 
     In the illustrated polar modulation transmit amplifier  52 , a power amplifier  54  receives a constant-envelope phase-modulated signal as its input from a phase modulator  56 , that phase modulates a carrier frequency signal according to an input phase modulation information signal (φ_IN). In amplifier circuit  52 , converter  10  uses power from the negative voltage supply  58  and operates in combination with a linear amplifier circuit  60 , including feedback circuit  62 , to provide a modulated supply signal at a modulated supply signal output node  64 . Supply  58  advantageously is the −48 VDC supply rail available in base station  50 . 
     The feedback signal circuit  18  operates as a current sensor, and thus provides a feedback control signal to the hysteretic control circuit  16  as a function of the output current from the linear AB-class amplifier  60 , which preferably is a relatively wideband amplifier. Because that current varies responsive to the output signal from converter  10 , the feedback control signal is responsive to the RF modulation signal input to linear amplifier  60 . With this arrangement, linear amplifier  60  supplies the higher frequency signal components in the modulated supply signal, i.e., the combined output signal from the amplifier circuit  52 , while converter  10  supplies the lower frequency signal components in the modulated supply signal. 
     Such operation is advantageous because the linear, wideband amplifier  60  amplifies the higher frequency but lower power components in the input amplitude modulation information signal (AM_IN), and the more efficient converter  10  amplifies the lower frequency but higher power components in the AM_IN signal. With this approach, the exemplary amplifier circuit  52  offers good efficiency without loss of bandwidth. That is, converter  10  provides most of the modulated signal power from dc to some upper RF frequency, e.g., 1 MHz or greater, while the less efficient linear amplifier  60  provides the majority of modulated signal power for the higher frequency components of the modulated supply signal. Notably, the inherent efficiency of this arrangement is enhanced further inasmuch as the negative supply voltage is converted into a positive voltage modulated RF output signal by converter  10  without first having to convert it to a positive dc voltage. 
     FIG. 4 depicts amplifier circuit  52  according to exemplary circuit details. It should be understood that where specific component values and/or component models are illustrated, such details represent exemplary and not limiting design choices. Exemplary details regarding damping circuit  42  include the use of a series RC snubber circuit having a frequency response tuned to dampen sub-harmonics of the RF frequency of the AM_IN signal to avoid undesirable oscillations of the converter  10 . Properly tunned, the RC snubber circuit prevents sub-harmonic oscillation, and dissipates an insignificant amount of power. Of course, the frequency response of damping circuit  42  generally is set in dependence on the frequency range at which the overall feedback control loop experiences critical phase margin, which changes with design details. 
     In further illustration of exemplary details, the drive circuit  14  includes transformer T 1 , which has an exemplary primary-to-secondary turn ratio of 1:1. Note, too, the use of hysteretic buffer circuit U 5  to drive the inverting gates U 1  and U 2  and the non-inverting gates U 3  and U 4 , which collectively drive transformer T 1  responsive to the pulse-width limited hysteretic switching signal. The use of such an arrangement provides good noise immunity and reliable transformer winding drive. On that point, the use of capacitor C 8  in series with the transformer winding serves as a dc-blocking capacitor to prevent dc current from flowing from U 1 /U 2  to U 3 /U 4 , or vice versa. 
     FIG. 4 further illustrates exemplary control logic for the drive circuit  14 , in which the switching control signals generated by it for switches SW 1  and SW 2  of the {dot over (C)}uk converter circuit  12 , shown here as Field Effect Transistors (FETS) Q 1  and Q 2 , is based on comparing a feedback voltage taken from the output side of energy transfer capacitor C 1  to a reference voltage, which is formed using the R 5 /R 6  voltage divider on input terminal ( 3 ) of U 8 . 
     The state of the pulse-limited hysteretic switching signal output from pulse control circuit  40  in combination with the relative magnitudes of the voltages in input terminals ( 2 ) and ( 3 ) of U 8 , determine the logic input combination to NOR gate U 9 . Using the nomenclature of “A” and A “B” to represent the NOR gates inputs, A is high if the voltage taken from energy transfer capacitor C 1  of converter  12  exceeds a reference voltage formed by voltage divider R 5 /R 6 . Signal B simply is the pulse-limited hysteretic switching signal output from pulse control circuit  40 . 
     As mentioned earlier, when converter  10  is configured as a dc-to-RF modulator such as in the context of amplifier  52 , its operation may be tuned, or otherwise adjusted in respect of the desired operating frequencies. For example, as noted, the damping circuit  42  may be configured to have a frequency response that dampens subharmonics of RF signals of interest. More generally, the operating frequency, e.g., the switching rate, of converter  10  may be set or adjusted as a function of known signal characteristics, such as the symbol or chip rate of a particular signal modulation format. 
     For example, where amplifier  52  is used as a polar modulation transmitter in a wireless communication base station transmitter, one or more signal modulation formats may be of particular interest, e.g., CDMA2000, WCDMA, or GSM/EDGE modulation formats, and the switching rate of converter  10  may be adjusted as a function of the information symbol rate or chipping rate of the particular modulation format. Mechanisms for adjusting the switching rate include, but are not limited to, adjusting one or more reactive elements, such as the output inductor L 2 , adjusting the hysteretic controller&#39;s reference signal level, adjusting the hysteretic controller&#39;s hysteretic range, etc. 
     Any or all such parameters may be fixed for a desired modulation format, or may be adjustable for different modulation formats, such as might be desirable for a multi-mode transmitter intended for use with different modulation formats, such as a combined WCDMA and GSM/EDGE transmitter. Regardless, the average switching rate of converter  10  may be set based on the modulation symbol or chipping rate of the RF signal of interest. Further, that switching rate may be changed as a function of selecting another modulation format, such as might be done in a multi-mode (multi-format) transmitter. 
     Nominally, converter  10  would be configured, by properly setting the hysteretic controller&#39;s reference signal level for example, such that the current from linear amplifier  60  is zero. However, in practical terms, linear amplifier  60  supplies at least some of the supply current into power amplifier  56  because of its higher bandwidth as compared to converter  10 . Thus, amplifier  60  and converter  10  cooperatively work to generate the modulated supply signal based on their combined output signals. 
     This cooperative interaction influences the configured switching rate of converter  10 . For example, the switching rate of converter  10  ideally is set much higher than the Nyquist frequency of the RF signal&#39;s symbol or chip rate, e.g., 10 times higher. However, limitations on practical switching rates may prevent setting the switching rates that high. 
     In those instances, it may be preferable to set the converter&#39;s switching rate below the symbol or chip rate of the RF signal. In any case, the switching rate preferably is set to balance contributions of converter  10  with contributions of the linear amplifier  60  such that their combined signals form a low-distortion modulated supply signal. 
     FIGS.  5  and  6 A- 6 D illustrate exemplary switching details for converter  10 . In particular, FIG. 5 illustrates exemplary voltage and current waveforms for the voltages and currents within the {dot over (C)}uk converter circuit portion of converter  10 . In reviewing these exemplary diagrams, note that in FIG. 6A, the SW 1 /SW 2  pair is, for ease of visualization, symbolized as a single-pole-double-throw switch SW 3 , that may be “flipped” from input to output sides of C 1 . FIGS. 6B-6C illustrate the charging and discharging currents discussed earlier herein for the two positions of SW 3 . 
     While such details aid understanding exemplary operations of converter  10 , those skilled in the art should not construe them as limiting. Indeed, the use of converter  10  in RF amplifier circuit  52  illustrates an exemplary application, but it should not be understood as limiting the range of applications to which the inventive converter  10  might be applied. As noted, the incorporation of hysteretic feedback control into the basic {dot over (C)}uk converter topology yields significant performance improvements with regard to converter frequency response and, as such, converter  10  of the present invention finds use in a variety of applications, including, but not limited to, microprocessor power supplies, portable electronic device power supplies, etc. As such, the present invention is not limited by the foregoing details but rather is limited only by the scope of the following claims and their reasonable equivalents.