Abstract:
A transconductor circuit used in a mixer for canceling second-order inter-modulation distortion includes a first transistor and a second transistor, of which the base (gate) ends coupled to a first input end and a second input end, for receiving a differential input signal; and a negative feedback circuit, of which the input end coupled to the emitter (source) ends of the first transistor and the second transistor, of which the out end coupled to the base (gate) ends of the first transistor and the second transistor, for adjusting the voltage of the base (gate) of the first transistor and the second transistor according to the difference between a reference voltage and the detected voltage of the emitter (source) of the first transistor and the second transistor.

Description:
CROSS REFERENCE TO RELATED PATENT APPLICATION 
     This patent application is based on Taiwan, R.O.C. patent application No. 99124203 filed on 22 Jul. 2010. 
     FIELD OF THE INVENTION 
     The present invention relates to a mixer, and more particularly, to a mixer and associated transconductor circuit, used in a direct conversion receiver for canceling Second-order Inter-Modulation Distortion (IM2). 
     BACKGROUND OF THE INVENTION 
     In wireless transceiver, the mixer is widely used to be a frequency conversion element.  FIG. 1  shows a direct conversion receiver  10 , comprising an antenna  11 , a Low-Noise Amplifier (LNA)  12 , a mixer  13 , a Local Oscillator (LO)  14 , a Low Pass Filter (LPF)  15  and an amplifier  16 . A Radio Frequency (RF) signal is received by the antenna  11 , and amplified by the LNA  12 , then down-converted to a baseband signal directly by the mixer  13 . Thereafter, the baseband signal is filtered by LPF  15  and amplified by the amplifier  16 , then sent to the backend circuit for Analog-Digital Conversion (not shown). The LO  14  generates an oscillation signal, of which the frequency is f LO , and the frequency f LO  is a RF carrier frequency supplied to the mixer  13  for converting the RF signal to the baseband signal directly. The direct conversion receiver  10  need not convert the RF signal to an Intermediate Frequency (IF) signal and then convert the IF signal to the baseband signal, so it is also referred to as a “Zero-IF Receiver.” Because there is no IF conversion, the direct conversion receiver  10  has two important advantages besides saving a set of mixers. One advantage is that there is no image signal interference, and thus an Image-Rejection Filter is not needed. The other advantage is that the Low Pass Filter (LPF)  15  and the amplifier  16  may be integrated into a single IC and replace an external Surface Acoustic Wave filter (SAW filter) required by a traditional receiver. Therefore, the direct conversion receiver  10  has several advantages including higher integration, lower complexity and lower cost. 
     But the direct conversion receiver  10  also has some disadvantages, such as second-order inter-modulation distortion, DC offset, flick noise, etc. The second-order inter-modulation distortion is mainly caused by feedtrough, as shown in  FIG. 2A . Two strong interference signals are very close to the receiving channel, and they are all in the range of the band-pass filter. An interference signal around the DC is generated when the two interference signals pass through the low noise amplifier (LNA)  211 . Then, the interference signal around the DC passes through a mixer  212 . If the mixer  212  is an ideal mixer, the interference signal around the DC will be converted into a higher spectrum by the mixer  212 . But an actual mixer has feedtrough, so that the output of the mixer  212  includes an interference signal around the DC. As shown in  FIG. 2B , the LO leakage is inputted to the LNA  221  and the mixer  222  because isolation between the components is not perfect. Therefore, a DC offset will be generated and interfere with the baseband signal. In addition, the non-linear characteristic and low frequency conversion gain of the transconductor circuit in a mixer also strengthen the IM2 effect. Therefore, it is an important issue to cancel IM2 when designing a direct conversion receiver. The present disclosure provides a negative feedback circuit for adjusting the input signal of the transconductor circuit in a mixer to overcome this problem. 
       FIG. 3  shows a Gilbert mixer circuit in accordance with the prior art. The Gilbert mixer  30  comprises a transconductor circuit  31 , a switch quad circuit  32  and a load circuit  33 . The load circuit  33  includes two parallel connected resistors R C1 , R C2 . More specifically, the first ends of the resistor R C1  and the resistor R C2  are coupled to a voltage source Vcc, and the second ends of the resistor R C1  and the resistor R C2  are respectively coupled to the differential out ends of the switch quad circuit  32 . The switch quad circuit  32  includes NPN bipolar junction transistors (BJT) Q 3 , Q 4 , Q 5 , Q 6 . Specifically, the collector of the BJT Q 3  and the collector of the BJT Q 5  are coupled to the second end of the resistor R C1 , and the collector of the BJT Q 4  and the collector of the BJT Q 6  are coupled to the second end of the resistor R C2 . Furthermore, the base end of the BJT Q 3  is coupled to the base end of the BJT Q 6 , and the base end of the BJT Q 4  is coupled to the base end of the BJT Q 5 . Differential LO signals f LO  are respectively inputted to the base ends of the BJT Q 3  and the BJT Q 4 . Moreover, the emitter end of the BJT Q 3  is coupled to the emitter end of the BJT Q 4  to form a first current path, and the emitter end of the BJT Q 5  is coupled to the emitter end of the BJT Q 6  to form a second current path. 
     The transconductor circuit  31  includes NPN BJTs Q 1 , Q 2 . Specifically, the collector end of the BJT Q 1  is coupled to the first current path of the switch quad circuit  32 , and the collector end of the BJT Q 2  is coupled to the second current circuit of the switch quad circuit  32 . The base ends of the BJTs Q 1  and Q 2  respectively receive the voltage signal Vin +  and Vin − . Furthermore, the emitter ends of the BJTs Q 1  and Q 2  are respectively coupled to first ends of the resistors R E1  and R E2 . The second or other ends of the resistors R E1  and R E2  are coupled to ground. 
     The transconductor circuit  31  transforms the input voltage Vin (i.e., differential input signals Vin +  and Vin − ) to the current signal Ib. The current signal Ib is transformed to a frequency-converted current signal by the first current path and the second current path of the switch quad circuit  32  controlled by the local oscillation signal f LO . Then, the frequency-converted current signal is transformed to an output voltage at the out end of the circuit. 
     Because the transconductor circuit  31  consists of NPN BJTs Q 1 , Q 2 , the relationship curve between the voltage and the current is an exponential curve, and not a linear curve. Therefore, there will be IM2 current generated in the mixer, and external voltages will appear at the emitters of the BJTs Q 1  and Q 2 , which are expressed as follows:
 
 V   E1     —     IM2 =1/α 1   *I   C1     —     IM2   *R   E1  
 
 V   E2     —     IM2 =1/α 1   *I   C2     —     IM2   *R   E2  
 
     Wherein, α 1  represents the common-base current gain of the BJT Q 1 ; α 2  represents the common-base current gain of the BJT Q 2 . 
     IM2 distortion causes serious interference to the original signal in the mixer. Therefore, it is an important issue to cancel the IM2 in a direct conversion receiver, and the present disclosure provides a negative feedback circuit for adjusting the input signal of the transconductor circuit in a mixer to resolve this problem. 
     SUMMARY OF THE INVENTION 
     In accordance with one embodiment of the present invention, a transconductor circuit is used in a mixer for canceling second-order inter-modulation distortion. The transconductor comprises a first transistor and a second transistor, and a negative feedback circuit. The first transistor and second transistor are used for receiving differential input signals, wherein the base (gate) ends of the first transistor and the second transistor are respectively coupled to a first input end and a second input end. The negative feedback circuit comprises an input end and an output end, and is used for adjusting the voltage of the base (gate) ends of the first and second transistors according to a difference between a reference voltage and a detected voltage between the emitter (source) ends of the first and second transistors, wherein the input end is coupled to the emitter (source) ends of the first and second transistors, and the output end is coupled to the base (gate) ends of the first and second transistors. 
     A mixer is used for canceling second-order inter-modulation distortion according to another embodiment. The mixer comprises a load circuit, a switch circuit, a transconductor circuit, and a negative feedback circuit. The switch circuit, coupled to the load circuit, comprises a first current path and a second current path. The transconductor comprises a first transistor and a second transistor, and is used for receiving a differential input signal, wherein the collector (drain) ends of the first and second transistors are respectively coupled to the first current path and the second current path and the base (gate) ends of the first and second transistors are respectively coupled to a first input end and a second input end. The negative feedback circuit, comprises an input end and an output end, and is used for adjusting the voltage of the base (gate) ends of the first and second transistors according to a difference between a reference voltage and a detected voltage of the emitter (source) ends of the first and second transistors, wherein the input end is coupled to the emitter (source) ends of the first and second transistors and the output end is coupled to the base (gate) ends of the first and second transistors. 
     The advantages and spirit related to the present invention can be further understood via the following detailed description and drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a schematic diagram of a direct conversion receiver. 
         FIGS. 2A and 2B  are schematic diagrams of second-order inter-modulation distortion. 
         FIG. 3  is a circuit diagram of a mixer in accordance with the prior art. 
         FIG. 4  is a schematic diagram of a circuit of a mixer according to an embodiment of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       FIG. 4  is a circuit diagram of a mixer of the present disclosure. The mixer  40  comprises a transconductor circuit  41 , a switch circuit  42  and a load circuit  43 . The load circuit  43  includes resistors R C1  and R C2 . Specifically, the first ends of the two resistors R C1  and R C2  are coupled to a voltage source Vcc, and the second ends are coupled to the out end of the switch circuit  42 . The switch circuit  42  includes NPN BJTs Q 3 , Q 4 , Q 5  and Q 6 . The collector ends of the BJT Q 3  and BJT Q 5  are coupled to the second ends of the resistor R C1 , and the collector ends of the BJT Q 4  and BJT Q 6  are coupled to the second end of the resistor R C2 . Furthermore, the base end of BJT Q 3  is coupled to the base end of the BJT Q 6 , and the base end of the BJT Q 4  is coupled to the base end of the BJT Q 5 . Differential LO signals f LO  are respectively inputted to the base ends of the BJT Q 3  and the BJT Q 4 . Moreover, the emitter end of the BJT Q 3  is coupled to the emitter end of the BJT Q 4  to form a first current path, and the emitter end of the BJT Q 5  is coupled to the emitter end of the BJT Q 6  to form a second current path. 
     The transconductor circuit  41  includes NPN BJTs Q 1  and Q 2 , resistors R E1  and R E2 , capacitors C B1  and C B2 , and a negative feedback circuit  411 . The collector end of the BJT Q 1  is coupled to the first current path of the switch circuit  42 , and the collector end of the BJT Q 2  is coupled to the second current circuit of the switch circuit  42 . The base ends of the BJTs Q 1  and Q 2  are respectively coupled to first ends of the capacitors C B1  and C B2 , and second ends of the capacitor C B1  and C B2  are respectively coupled to a differential input signal Vin +  and Vin − . The capacitors C B1  and C B2  are used for DC isolation from the mixer. Furthermore, the emitter ends of the BJTs Q 1  and Q 2  are respectively coupled to one end of the resistor R E1  and R E2 , and the other ends of the resistors R E1  and R E2  are coupled to ground. 
     The negative feedback circuit includes an operational amplifier  4111 , a reference voltage generating circuit  4112 , a feedback voltage generating circuit  4113  and a bias circuit  4114 . More specifically, the positive input end of the operational amplifier  4111  is coupled to a reference voltage V REF  generated by the reference voltage generating circuit  4112 , the negative input end of the operational amplifier  4111  is coupled to the feedback voltage generating circuit  4113 , and the output end of the operational amplifier is coupled to the bias circuit  4114 . 
     The reference voltage generating circuit  4112  is used for generating a reference voltage V REF . If the components are matching, that is, the characteristic of the BJT Q 1  is identical to that of the BJT Q 2 , and the resistor R E1  is equal to the resistor R E1 , the reference voltage V REF  is equal to the voltage of the emitter ends of the transistor Q 1  and Q 2 , i.e. V REF =V E1 =V E2 . In the preferred embodiment, the reference voltage generating circuit  4112  comprises of a reference current source I REF  and a resistor R REF  in series. The other end of the reference current source I REF  is coupled to the voltage source Vcc, and the other end of the resistor R REF  is coupled to the ground. In this situation, the equation of the reference voltage V REF  is as V REF =I REF *R REF . Taking the power consumption into consideration, the preferred embodiment can reduce the preset current value of the reference current source (I REF =1/n*I E1 =1/n*I E2 ) by using the larger resistor R REF , such as R REF =nR E1 =n E2 . 
     The feedback voltage generating circuit  4113  is used for detecting the average voltage between the emitter end of the BJT Q 1  and the emitter end of the BJT Q 2 , and filtering out the RF signal and comprises resistors R CC1  and R CC2 , and a capacitor C CC . One end of the resistor R CC1  is coupled to the emitter end of the BJT Q 1 , and the other end is coupled to the feedback voltage end V EE . One end of the resistor R Cc2  is coupled to the emitter end of the BJT Q 2 , and the other end is also coupled to the feedback voltage end V EE . One end of the capacitor C CC  is coupled to ground, and the other end is coupled to the feedback voltage end V EE . Finally, the feedback voltage end V EE  is coupled to the operational amplifier  4111 . Assume R CC1 , R CC2 &gt;&gt;R E1 , R E2 , the feedback voltage V EE  is expressed as follows:
 
 V   EE =½*( V   E1     —     IM2   +V   E2     —     IM2 )
 
     Wherein, 
     V E1     —     IM2 =1/α 1 *I C1     —     IM2 *R E1    
     V E2     —     IM2 =1/α 2 *I C2     —     IM2 *R E2    
     The bias circuit  4114  is used for adjusting the input signal of the mixer to cancel the IM2. The bias circuit  4114  comprises resistors R B1  and R B2 . One end of the resistor R B1  is coupled to the base end of the BJT Q 1 , the other end is coupled to the output end of the operational amplifier  4111 ; and one end of the resistor R B2  is coupled to the base end of the BJT Q 2 , the other end is coupled to the output end of the operational amplifier  4111 . According to the adjusting signal from the operational amplifier, the bias circuit  4114  adjusts the differential input signals. 
     Therefore, assuming that the gain of the operational amplifier  4111  is A v  in the IM2 frequency band, the common-emitter current gain β of the BJT Q 1  is equal to that of the BJT Q 2 , R E1 =R E2 =R E , and R B =R B2 =R B , the change of the collector current of the BJTs Q 1  and Q 2  caused by the operational amplifier  4111  can be expressed as follows:
 
 I   C1     —     IM2     —     Cancellation =(− A   v β fb /(1 +A   v β fb ))* I   C1     —     IM2  
 
 I   C2     —     IM2     —     Cancellation =(− A   v β fb /(1 +A   v β fb ))* I   C2     —     IM2  
 
     Wherein,
 
 B   fb =((β+1) R   E )/( R   B +(β+1)( R   E   +r   e ))
 
     β: the common-emitter current gain 
     r e : the small-signal equivalent resistor of the emitter ends of the BJTs Q 1  and Q 2 . 
     According to the above equations, we can know that the mixer  40  of the present disclosure can cancel the IM2 by using the feedback voltage generating circuit  4113  to eliminate the additional input current resulted from the IM2. 
     The transistors in the embodiment are NPN BJTs. However, The transistors need not be limited to NPN BJTs. Those skilled in the art will appreciate that other components such as PNP BJTs, N-type FETs or P-type FETs may employed instead. 
     While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not to be limited to the above embodiments. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.