Abstract:
An amplifier system comprises an amplifier, a comparator connectable to the amplifier to compare an incoming signal with a number of reference potentials. A switching stage is controlled by the output of the comparator and arranged to select a voltage level to be applied to one side of a load, such as a loudspeaker system. A subtractor is included to subtract from the incoming signal a percentage of the selected voltage level to be applied to the load. The amplifier receives the output signal of the subtractor, amplifies that signal and applies it to a second side of the load. There is also disclosed a method for amplifying a signal.

Description:
FIELD OF THE INVENTION  
       [0001]     The present invention relates generally to an amplifier system and method for amplifying a signal, for use, for example in an audio amplifier circuit.  
       BACKGROUND OF THE INVENTION  
       [0002]     Environmental considerations are becoming an increasingly important design parameter for product developments. For amplifier designs, considerable research has been directed towards high efficiency amplifiers which have less energy loss and various topologies exist that perform at a higher efficiency than conventional Class B amplifiers. Examples of such amplifiers are Class D, Class G and Class H amplifiers. Such amplifiers require smaller heat sinks than conventional Class B amplifiers, resulting in lighter and more compact products.  
         [0003]     For a Class B amplifier having a fixed primary power supply, the theoretical maximum efficiency is 78.5% when it is driven to saturation by a sine wave, but in actual practice the efficiency does not exceed 70%.  
         [0004]     The basic concept of conventional Class D amplifiers is to convert the input signal into a Pulse Width Modulated (PWM) signal and to recover the analog output signal through a low pass filter before delivering the signal to the load. A theoretical efficiency of 100% may be achievable with conventional Class D amplifiers and, in practice, over 90% efficiencies have been achieved using Class D Digital Amplifiers. Disadvantages of Class D amplifiers are the EMI issues which arise from the high level switching of the PWM signal. Furthermore, the typical requirement of the output low pass filter adds costs to the implementation of Class D amplifiers. At the same time, this output low pass filter also affects the output characteristics of the amplifier as a fixed load impedance of, for example, 6 ohms has to be assumed during its design.  
         [0005]     This is not, however, the case for typical loudspeaker loads. In typical loudspeaker systems, when connected to a load which may range from 2 ohms to some tens of ohms for typical loudspeakers, the output characteristics will deviate from the target design.  
         [0006]     Conventional Class G amplifiers generally achieve higher efficiencies than conventional Class B amplifiers by switching the power supply level at different fixed levels to have the power supply closer to the output signal. In theory, 100% efficiency may be achieved by increasing the number of fixed power supply levels indefinitely. However, as several devices have to be used to switch among the different supply voltages, this will create losses in practice.  
         [0007]     Conventional Class H amplifiers use the input signal to control the power supply and vary the power supply by Pulse Width Modulation (PWM) to form an envelope over the output signal. Although a very high efficiency may be achieved in such amplifiers, such as theoretically up to 100%, the transient response of conventional Class H amplifiers may be poor and the bandwidth may be extremely limited due to the slow response of the power supply. Moreover, EMI issues will be a major concern in such amplifiers.  
       SUMMARY OF THE INVENTION  
       [0008]     In general terms, the invention provides an amplifier system and method in which the voltage signal level in an amplifier is reduced by applying a voltage at various fixed levels to a first side of a load, obtaining a difference signal derived by subtracting a proportion of the voltage applied to the load from the input signal and applying the difference signal to the other side of the load through the amplifier. This results in the reconstruction of the signal across the load. The voltage swing obtainable across the load is greater than the output voltage swing obtainable from the amplifier alone, thus the efficiency of the amplifier system and power handling capacity of the system are improved.  
         [0009]     According to a first aspect of the invention there is provided an amplifier system comprising: 
        an amplifier;     a comparator connectable to said amplifier to compare an incoming signal with a number of reference potentials, said comparator having an output;     a switching stage controllable by said output of said comparator to select a voltage level to be applied to one side of a load;     a subtractor for subtracting from said incoming signal a percentage of said selected voltage level to be applied to said load to provide an output signal of said subtractor;     said amplifier being arranged to receive said output signal of said subtractor and to amplify said output signal to be applied to a second side of said load.        
 
         [0015]     According to a second aspect of the invention there is provided an audio system comprising the amplifier system defined above.  
         [0016]     According to a third aspect of the invention there is provided a method for amplifying a signal in an amplifier system comprising: 
        comparing in a comparator an incoming signal with a number of reference potentials, said comparator having an output;     selecting in a switching stage a voltage level to be applied to one side of a load, said switching stage being controllable by said output of said comparator;     subtracting from said incoming signal a percentage of said selected voltage level to be applied to said load to provide an output signal of a subtractor;     receiving in an amplifier said output signal of said subtractor;     amplifying said output signal of said subtractor; and     applying said amplified signal to a second side of said load.       
 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0023]     Preferred features of the invention will now be described, for the sake of illustration only, with reference to the following Figures in which:  
         [0024]      FIG. 1  is a schematic circuit diagram of a conventional Class B amplifier;  
         [0025]      FIG. 2  is a schematic circuit diagram of an amplifier according to a preferred embodiment of the invention;  
         [0026]      FIG. 3  is a waveform of an input signal in the form of a sine wave;  
         [0027]      FIG. 4  is a waveform of a signal at node  1  in the circuit of  FIG. 2  for a sine wave input signal of the type shown in  FIG. 3 ;  
         [0028]      FIG. 5  is a waveform of a signal at node  3  in the circuit of  FIG. 2  for a sine wave input signal of the type shown in  FIG. 3 ;  
         [0029]      FIG. 6  is a graph of the efficiency against normalised power for the amplifier of  FIG. 2  compared with a conventional Class B amplifier;  
         [0030]      FIG. 7  is a graph of power loss against normalised output power for the amplifier of  FIG. 2  compared with a conventional Class B amplifier;  
         [0031]      FIG. 8  is a schematic circuit diagram according to a further preferred embodiment of the invention;  
         [0032]      FIG. 9  is a waveform of a signal at node  1  in the circuit of  FIG. 8  for a sine wave input signal;  
         [0033]      FIG. 10  is a waveform of a signal at node  3  in the circuit of  FIG. 8  for a sine wave input signal;  
         [0034]      FIG. 11  is a graph of the efficiency against normalised power for the amplifier of  FIG. 8  compared with a conventional Class B amplifier;  
         [0035]      FIG. 12  is a graph of power loss against normalised output power for the amplifier of  FIG. 8  compared with a conventional Class B amplifier;  
         [0036]      FIG. 13  is a graph of the efficiency against normalised power for the amplifiers of  FIGS. 2 and 8  compared with a conventional Class B amplifier; and  
         [0037]      FIG. 14  is a graph of power loss against normalised output power for the amplifiers of  FIGS. 2 and 8  compared with a conventional Class B amplifier. 
     
    
     DESCRIPTION OF PREFERRED EMBODIMENTS  
       [0038]      FIG. 1  shows a circuit diagram of a conventional Class B amplifier. An input signal  10  is applied between ground and the positive input terminal of an amplifier  12  which has a gain of Gv. Negative feedback is applied to the amplifier  12  by dividing the output signal therefrom in a potential divider comprising two resistors  14 ,  15  connected in series from the output of the amplifier  12  to ground. The junction  16  of the two resistors  14 ,  15  is connected to the negative terminal of the amplifier  12 , the two resistors  14 ,  15  defining the gain of the amplifier  12 . The amplifier  12  is powered by twin power supplies having power supply voltages which are fixed at V cc  and −V cc  respectively. Thus, the output signal from the amplifier  12  will vary within the range −V cc  to +V cc .  
         [0039]     Assuming that there is no clipping, if the peak amplitude of the input signal  10  is V ref , giving a corresponding peak output of V cc , the gain of the amplifier  12  may be denoted by  
         G   v     =       V   cc         V   ref     .           
 
 The theoretical efficiency of such an amplifier  12  based on a sinusoidal input of amplitude V 0  may be denoted as  
         π   ⁢           ⁢     V   0         4   ⁢     V   cc           
 
 and the power loss as  
             2   ⁢     V   cc     ⁢     V   0         π   ⁢           ⁢   R       -       V   0       2   ⁢   R         ,       
 
 where R is a resistive load. 
 
         [0040]     An amplifier circuit  18  according to a first preferred embodiment of the present invention is shown in  FIG. 2 . In this embodiment, the amplifier circuit  18  comprises an input signal  19 , a comparator  20 , a control circuit  21 , a multi-way switch  22  and a differential amplifier  23 . The input signal  19  is applied via a resistor R 7  to the negative input of the differential amplifier  23 . A resistor R 8  is connected between the output of the differential amplifier  23  at node  3  and the negative input of the differential amplifier  23 . The input signal  19  is also applied to the input of the comparator  20 . The output terminals of the comparator  20  are connected to the multi-way switch  22  and the output of the multi-way switch is connected at a node  1  to the positive terminal of a loudspeaker  24  and also to a potential divider comprising two resistors R 9  and R 10  connected in series between node  1  and ground. The junction (node  2 ) of the resistors R 9  and R 10  is connected to the positive input of the differential amplifier  23 .  
         [0041]     The comparator  20  compares the input signal  19  with the reference voltages −2/3V ref , −1/3V ref , +1/3 V ref  and +2/3 V ref, which are fixed by resistors R1, R2, R3, R4, R5 and R6 within the comparator 20. Preferably,  
 
R 1 =R 2 =R 3 =R 4 =R 5 =R 6  
 
 V   cc1   =V   cc /3 
 
V cc2 =2× V   cc1  
 
 R   8 / R   7 = Gv  
 
 R   10 /( R   9 + R   10 )=1 /Gv  
 
         [0042]     Also, |V ref | corresponds to the peak amplitude of the input signal  19 .  
         [0043]     When the amplitude of the input signal  19  is below |V ref /3|, the ground potential is applied to node  1  at the positive terminal of the load  24 . When the input signal  19  amplitude exceeds the reference voltages, a corresponding signal is sent to the control circuit  21  to indicate the level of the input signal  19 . Via the multi-way switch  22 , the control circuit  20  then switches on the appropriate DC voltage, at −V cc2 , −V cc1 , V cc1  or V cc2  respectively, to the positive terminal of the load  24 , where  
                V   cc1          =            V   cc     3            ,            V   cc2          =            2   ⁢     V   cc       3                
 
 and V cc  refers to the peak output voltage, which is also the power supply voltage of a conventional Class B amplifier delivering the same output power as the embodiment of the present invention illustrated in  FIG. 2 . 
 
         [0044]      FIG. 3  shows an input waveform  19  comprising a sinusoidal waveform, the peak amplitude of which is equal to the maximum voltage present in the comparator  20 .  
         [0045]     When the waveform of  FIG. 3 , namely a sinusoidal input of amplitude V ref , is applied to the comparator  20 , a stepped waveform resembling the sinusoidal waveform will appear at the positive terminal of the load, as shown in  FIG. 4 .  
         [0046]     The gain of the differential amplifier  23  is chosen such that |Gv|=|V cc |/|V ref | and its power supply voltages are +V cc1  and −V cc1 . A proportion of the DC voltage applied to the load from node  2 , the amplitude of which may be fixed by selecting appropriate values for the resistors R 9  and R 10 , is fed to the positive input of the differential amplifier  23 . This amplitude may be selected to be 1/Gv of the supplied DC voltage to the load. As the DC voltages are fixed at −Vcc 2 , −Vcc 1 , GND, Vcc 1  and Vcc 2 , the signal to the positive input of the differential amplifier  23  will be correspondingly −2/3 Vref, −1/3 Vref, GND, +1/3 Vref and +2/3 Vref.  
         [0047]     The input signal  19  is fed to the negative input of the differential amplifier  23  through resistor R 7 . The difference between the positive input and the negative input of the differential amplifier  23  is amplified and fed to the negative terminal, Node  3 , of the load, as shown in  FIG. 5 . The differential amplifier  23  essentially compensates for the difference between the signal fed to the positive terminal of the load and the desired signal. Thus, the overall signal as seen by the load will be equivalent to the input signal amplified by a gain of Gv.  
         [0048]     On the positive side of the load  24 , which is essentially switching among several DC voltage levels, the efficiency is theoretically 100%. On the negative side of the load, a conventional Class B amplifier design may be used for the differential amplifier  23 . The efficiency of such a differential amplifier will be the same as a conventional Class B amplifier. However, since the supplied voltage is +V cc /3 and −V cc /3, the overall efficiency of the amplifier circuit of  FIG. 2  as compared to a conventional Class B amplifier delivering the same output power, may be seen to be significantly higher. The efficiency and power loss calculations are described as follows.  
         [0049]     It is proposed that amplifiers embodying the present invention are to be named the Class μ Amplifier because of the resultant shape of the curve when the graph of Efficiency against Output Power is plotted (as shown in  FIG. 6  described below).  
       SYMBOL DEFINITIONS  
       [0050]     ε Efficiency  
         [0051]     ε B  Efficiency of normal (conventional) Class B Amplifier  
         [0052]     ε 1  Efficiency of Stage  1  of Class μ Amplifier  
         [0053]     ε 2  Efficiency of Stage  2  of Class μ Amplifier  
         [0054]     ε 3  Efficiency of Stage  3  of Class μ Amplifier  
         [0055]     f Frequency  
         [0056]     I Current  
         [0057]     P in  Input power  
         [0058]     P out  Output power  
         [0059]     P total-in-2+  Total input power for positive side of Stage  2  of Class μ Amplifier  
         [0060]     P total-in-2−  Total input power for negative side of Stage  2  of Class μ Amplifier  
         [0061]     P total-in-3+  Total input power for positive side of Stage  3  of Class μ Amplifier  
         [0062]     P total-in-3−  Total input power for negative side of Stage  3  of Class μ Amplifier  
         [0063]     P ave-in Average input power    
         [0064]     P ave-out Average output power (same for both Class B and μ in this application)    
         [0065]     P ave-in-B  Average input power of normal Class B Amplifier  
         [0066]     P ave-in-1  Average input power of Stage  1  of Class μ Amplifier  
         [0067]     P ave-loss-1  Average power loss of Stage I of Class μ Amplifier  
         [0068]     P ave-in-2  Average input power of Stage  2  of Class μ Amplifier  
         [0069]     P ave-loss-2  Average power loss of Stage  2  of Class μ Amplifier  
         [0070]     P ave-in-3  Average input power of Stage  3  of Class μ Amplifier  
         [0071]     P ave-loss-3  Average power loss of Stage  3  of Class μ Amplifier  
         [0072]     R Impedance, assumed resistive for this case  
         [0073]     t time  
         [0074]     t 1  Moment (or the time) that V cc1  is switched on  
         [0075]     t 2  Moment (or the time) that V cc2  is switched on  
         [0076]     T Period  
         [0077]     V out  Output voltage  
         [0078]     V 0  Amplitude of output voltage (=|V out |)  
         [0079]     V cc  Peak output voltage, which is also the supply voltage for a normal Class B Amplifier  
         [0080]     V cc1  First stage output voltage to positive side of load for Class μ Amplifier  
         [0081]     V cc2  Second stage output voltage to positive side of load for Class μ Amplifier  
         [0082]     V ref  Reference voltage, which corresponds to the peak input voltage to give the peak output voltage at V cc    
         [0083]     ω Angular frequency (=2πf)  
         [0084]     In the calculations below, the positive side of the load  24  refers to the side with the DC voltage switching between −V cc1 , −V cc2 , GND, +V cc1  and +V cc2  and the negative side of the load  24  is connected to the differential amplifier  23  with a supply voltage of +V cc1  and −V cc1 . The load R is taken to be resistive.  
         [0085]     The following calculations are based on sinusoidal inputs.  
             Output   ⁢           ⁢   voltage             V   out     =       V   0     ⁢   sin   ⁢           ⁢   ϖ   ⁢           ⁢   t                 Current   ,           I   =       V   out     R                   Input   ⁢           ⁢   power     ,             P     i   ⁢           ⁢   n       =         V   cc     ⁢   I     =         V   cc     ⁢     V   out       R                     Output   ⁢           ⁢   power     ,             P   out     =         V   out     ⁢   I     =         V   out     2     R                     Average   ⁢           ⁢   input   ⁢           ⁢   power   ⁢           ⁢   for   ⁢           ⁢   1   ⁢           ⁢   period     ,             P     ave   -     i   ⁢           ⁢   n         =       1   T     ⁢       ∫   0   T     ⁢       P     i   ⁢           ⁢   n       ⁢           ⁢     ⅆ   t                         Average   ⁢           ⁢   output   ⁢           ⁢   power   ⁢           ⁢   for   ⁢           ⁢   1   ⁢           ⁢   period     ,             P     ave   -   out       =       1   T     ⁢       ∫   0   T     ⁢       P   out     ⁢           ⁢     ⅆ   t                       Efficiency   ,           ɛ   =       P     ave   -   out         P     ave   -     i   ⁢           ⁢   n                     
 
         [0086]     For both an amplifier of the type illustrated in  FIG. 2  (hereinafter referred to as a Class μ amplifier) and a conventional Class B Amplifier:  
               Average   ⁢           ⁢   output   ⁢           ⁢   power     ,               P     ave   -   out       =       1   T     ⁢       ∫   0   T     ⁢           V   out     2     R     ⁢     ⅆ   t             ⁢                                           ⁢     =       1   TR     ⁢       ∫   0   T     ⁢       V   0   2     ⁢     sin   2     ⁢   ω   ⁢           ⁢   t   ⁢     ⅆ   t             ⁢                                           ⁢     =         V   o`   2     TR     ⁢       ∫   0   T     ⁢       (     1   -     cos   ⁢           ⁢   2   ⁢   ω   ⁢           ⁢   t       )     ⁢     ⅆ   t                                             ⁢     =           V   0   2       2   ⁢   TR       ⁡     [     t   -       1     2   ⁢   ω       ⁢   sin   ⁢           ⁢   2   ⁢   ω   ⁢           ⁢   t       ]       0   T                                       ⁢     =           V   0   2       2   ⁢   TR       ⁡     [     t   -       1     2   ⁢   ω       ⁢   sin   ⁢           ⁢       4   ⁢   π   ⁢           ⁢   t     T         ]       0   T                                 =       V   0   2       2   ⁢   R         ⁢                     
 
         [0087]     For a conventional Class B Amplifier:  
                     Average   ⁢           ⁢   output   ⁢           ⁢   power     ,               (       for   ⁢           ⁢   1   ⁢     /     ⁢   2   ⁢           ⁢   period     ,     T   ⁢     /     ⁢   2       )                         P     ave   -   out   -   B       =       ⁢       2   T     ⁢       ∫   0     T   2       ⁢           V   out     ⁢     V   cc       R     ⁢     ⅆ   t                       =       ⁢         2   ⁢     V   cc       TR     ⁢       ∫   0     T   2       ⁢       V   0     ⁢   sin   ⁢           ⁢       2   ⁢           ⁢   π   ⁢           ⁢   t     T     ⁢     ⅆ   t                       =       ⁢         2   ⁢     V   cc     ⁢     V   0       TR     ⁢         (     T     2   ⁢           ⁢   π       )     ⁡     [       -   cos     ⁢           ⁢       2   ⁢           ⁢   π   ⁢           ⁢   t     T       ]       0     T   2                     =       ⁢     -         2   ⁢     V   cc     ⁢     V   0         2   ⁢   π   ⁢           ⁢   R       ⁡     [       cos   ⁢           ⁢     π   2       -   1     ]                     =       ⁢       2   ⁢     V   cc     ⁢     V   0         π   ⁢           ⁢   R                           Average   ⁢           ⁢   efficiency     ,                   ɛ   B     =       ⁢       P     ave   -   out         P     ave   -     i   ⁢           ⁢   n                       =       ⁢         V   0   2       2   ⁢   R       ×       π   ⁢           ⁢   R       2   ⁢     V   cc     ⁢     V   0                       =       ⁢       π   ⁢           ⁢     V   0         4   ⁢     V   cc                             Average   ⁢           ⁢   power   ⁢           ⁢   loss     ,                   P     ave   -   loss   -   1       =       ⁢       P     ave   -     i   ⁢           ⁢   n     -   1       -     P     ave   -   out                     =       ⁢         2   ⁢     V   cc     ⁢     V   0         π   ⁢           ⁢   R       -       V   0   2       2   ⁢   R                         
 
         [0088]     For a Class μ Amplifier—Stage  1 : For sinusoidal output voltage |V 0 |&lt;V cc1 |:  
         [0089]     For this stage of operation, the ground potential will be supplied to the positive side of the load  24 . Thus, only the differential amplifier  23  is supplying the signal to the load  24  at the negative side thereof.  
             Thus   ,     average   ⁢           ⁢   input   ⁢           ⁢   power     ,                   P     ave   -     i   ⁢           ⁢   n     -   1       =       ⁢       2   ⁢     V   cc1     ⁢     V   0         π   ⁢           ⁢   R                   =       ⁢           2   ⁢     V   cc     ⁢     V   0         3   ⁢   π   ⁢           ⁢   R       ⁢           ∵     V   cc1       =       V   cc     3                         Efficiency   ,                   ɛ   1     =       ⁢       π   ⁢           ⁢     V   0         4   ⁢     V   cc1                     =       ⁢       3   ⁢           ⁢   π   ⁢           ⁢     V   0         4   ⁢     V   cc                         
 
         [0090]     Comparing the above with a conventional Class B Amplifier, during this stage of operation,  
           ɛ   1       ɛ   B       =           3   ⁢           ⁢   π   ⁢           ⁢     V   0         4   ⁢     V   cc         ×       4   ⁢     V   cc         π   ⁢           ⁢     V   0           =       3   ⁢     
     ⇒     ɛ   1       =     3   ⁢     ɛ   B               
               Average   ⁢           ⁢   power   ⁢           ⁢   loss     ,                   P     ave   -   loss   -   1       =       ⁢       P     ave   -     i   ⁢           ⁢   n     -   1       -     P     ave   -   out                     =       ⁢         2   ⁢     V   cc     ⁢     V   0         3   ⁢   π   ⁢           ⁢   R       -       V   0   2       2   ⁢   R                         
 
         [0091]     Class μ Amplifier Stage  2 : For sinusoidal output voltage |V cc1 |&lt;V 0 |&lt;|V cc2 |:  
         [0092]     For this stage, it is necessary to determine the time t 1 , when V out =V cc1 , which is the moment that V cc1  is switched on.  
                     Output   ⁢           ⁢   voltage     ,               V   out     =       V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t       ⁢                         At   ⁢           ⁢     t   1       ,       V   out     =     V   cc1       ,                   ⁢     ⇒             V   cc1     =       ⁢       V   0     ⁢   sin   ⁢           ⁢       2   ⁢   π     T     ⁢     t   1                         2   ⁢   π     T     ⁢     t   1       =       ⁢       sin     -   1       ⁢       V   cc1       V   0                       t   1     =       ⁢       T     2   ⁢   π       ⁢     sin     -   1       ⁢       V   cc       3   ⁢     V   0                                   (   1   )             
 
         [0093]     For positive side, total input power for ¼ period,  
               P     total   -     i   ⁢           ⁢   n     -   2   +       =       ∫     t   1       T   4       ⁢           V   cc1     ⁢     V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t     R     ⁢           ⁢     ⅆ   t                     =           V   cc1     ⁢     V   0       R     ⁢       ∫     t   1       T   4       ⁢     sin   ⁢           ⁢       2   ⁢   π     T     ⁢   t   ⁢     ⅆ   t                       =           V   cc     ⁢     V   0         3   ⁢   R       ⁢         T     2   ⁢   π       ⁡     [       -   cos     ⁢       2   ⁢   π     T     ⁢   t     ]         t   1       T   4                     =           V   cc     ⁢     V   0     ⁢   T       6   ⁢      ⁢           ⁢   R       ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1                 
 
         [0094]     For the negative side, total input power for ¼ period,  
                                       P     total   -     i   ⁢           ⁢   n     -   2   -       =       ⁢       ∫   0     T   4       ⁢           V   cc1     ⁢     V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t     R     ⁢           ⁢     ⅆ   t                     =       ⁢           V   cc1     ⁢     V   0       R     ⁢       ∫   0     T   4       ⁢     sin   ⁢           ⁢       2   ⁢   π     T     ⁢   t   ⁢     ⅆ   t                       =       ⁢           V   cc     ⁢     V   0         3   ⁢   R       ⁢         T     2   ⁢   π       ⁡     [       -   cos     ⁢       2   ⁢   π     T     ⁢   t     ]       0     T   4                     =       ⁢         V   cc     ⁢     V   0     ⁢   T       6   ⁢   π   ⁢           ⁢   R                           Average   ⁢           ⁢   input   ⁢           ⁢   power     ,                   P     ave   -     i   ⁢           ⁢   n     -   2       =         P     total   -     i   ⁢           ⁢   n     -   2   +       +     P     total   -     i   ⁢           ⁢   n     -   2   +           T   4                   =         2   ⁢     V   cc     ⁢     V   0         3   ⁢   π   ⁢           ⁢   R       ⁢     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1         )                         Efficiency   ,                   ɛ   2     =       ⁢         V   0   2       2   ⁢   R       ×       3   ⁢   π   ⁢           ⁢   R       2   ⁢     V   cc     ⁢       V   0     ⁡     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1         )                         =       ⁢       3   ⁢   π   ⁢           ⁢     V   0         4   ⁢       V   cc     ⁡     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1         )                               (   2   )             
 
         [0095]     Comparing the above with a conventional Class B Amplifier,  
                             ɛ   2       ɛ   B       =         3   ⁢   π   ⁢           ⁢     V   0         4   ⁢       V   cc     ⁡     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1         )           ×       4   ⁢     V   cc         π   ⁢           ⁢     V   0                                       ɛ   2       ɛ   B       =     3     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1         )                     Average   ⁢           ⁢   power   ⁢           ⁢   loss     ,                   P     ave   -   loss   -   2       =       ⁢       P     ave   -     i   ⁢           ⁢   n     -   2       -     P     ave   -   out                     =       ⁢           2   ⁢     V   cc     ⁢     V   0         3   ⁢   π   ⁢           ⁢   R       ⁢     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1         )       -       V   0   2       2   ⁢   R                         
 
         [0096]     Class μ Amplifier Stage  3 : For sinusoidal output voltage |V cc2 |&lt;|V 0 |&lt;|V cc |:  
         [0097]     From Equation (1) above,  
         t   1     =       T     2   ⁢   π       ⁢     sin     -   1       ⁢       V   cc       3   ⁢     V   0               
 
         [0098]     At the time t 2 , when V out =V cc2 , the moment that V cc2  is switched on, is given as follows:  
               V   out     =       V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t                   ⇒     V   cc2       =       V   0     ⁢   sin   ⁢       2   ⁢   π     T     ⁢     t   2                         2   ⁢   π     T     ⁢     t   2       =       sin     -   1       ⁢       V   cc2       V   0                       t   2     =       T     2   ⁢   π       ⁢     sin     -   1       ⁢       2   ⁢     V   cc         3   ⁢     V   0                     
 
         [0099]     For the positive side of the load  24 , the total input power for ¼ period may be denoted as follows:  
               P     total   -     i   ⁢           ⁢   n     -   3   +       =       ⁢         ∫     t   1       t   2       ⁢           V   cc1     ⁢     V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t     R     ⁢           ⁢     ⅆ   t         +       ∫     t   2       T   4       ⁢           V   cc2     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t     R     ⁢           ⁢     ⅆ   t                       =       ⁢             V   cc1     ⁢     V   0       R     ⁢       ∫     t   1       t   2       ⁢     sin   ⁢       2   ⁢   π     T     ⁢   t   ⁢           ⁢     ⅆ   t           +           V   cc2     ⁢     V   0       R     ⁢       ∫     t   2       T   4       ⁢     sin   ⁢       2   ⁢   π     T     ⁢   t   ⁢           ⁢     ⅆ   t                         =       ⁢             V   cc1     ⁢     V   0       R     ⁢         T     2   ⁢   π       ⁡     [       -   cos     ⁢       2   ⁢   π     T     ⁢   t     ]         t   1       t   2         +           V   cc2     ⁢     V   0       R     ⁢         T     2   ⁢   π       ⁡     [       -   cos     ⁢       2   ⁢   π     T     ⁢   t     ]         t   2       T   4                       =       ⁢           V   0     ⁢   T       2   ⁢           ⁢   π   ⁢           ⁢   R       ⁢     {         V   cc1     ⁡     (       cos   ⁢       2   ⁢   π     T     ⁢     t   1       -     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )       +       V   cc2     ⁡     (     cos   ⁢       2   ⁢   π     T     ⁢     t   2       )         }                 
           But   ⁢           ∵     V   cc2       =     2   ⁢     V   cc1         ,     
     ⁢     ∴             P     total   -     i   ⁢           ⁢   n     -   3   +       =       ⁢           V   0     ⁢   T       2   ⁢           ⁢   π   ⁢           ⁢   R       ⁢       V   cc1     ⁡     (       cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                     =       ⁢           V   0     ⁢     V   cc     ⁢   T       6   ⁢           ⁢   π   ⁢           ⁢   R       ⁢     (       cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                     
 
         [0100]     For the negative side of the load  24 , from equation (2),  
         P     total   -     i   ⁢           ⁢   n     -   3   -       =         V   cc     ⁢     V   0     ⁢   T       6   ⁢           ⁢   π   ⁢           ⁢   R           
                     Average   ⁢           ⁢   total               input   ⁢           ⁢   power           ,                   P     total   -     i   ⁢           ⁢   n     -   3       =       ⁢         P     total   -     i   ⁢           ⁢   n     -   3   +       +     P     total   -     i   ⁢           ⁢   n     -   3   -           T   4                   =       ⁢             4   T     ⁢     {             V   0     ⁢     V   cc     ⁢   T       6   ⁢           ⁢   π   ⁢           ⁢   R       ⁡     [     (       cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )     ]       +                       ⁢         V   cc     ⁢     V   0     ⁢   T       6   ⁢           ⁢   π   ⁢           ⁢   R       }                       =       ⁢         2   ⁢     V   0     ⁢     V   cc         3   ⁢   π   ⁢           ⁢   R       ⁢     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                         Efficiency   ,                   ɛ   3     =       ⁢         V   0   2       2   ⁢   R       ×       3   ⁢   π   ⁢           ⁢   R       2   ⁢     V   cc     ⁢       V   0     ⁡     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                         =       ⁢       3   ⁢   π   ⁢           ⁢     V   0         4   ⁢       V   cc     ⁡     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                           
 
         [0101]     Comparing the above with a conventional Class B Amplifier,  
                             ɛ   3       ɛ   B       =         3   ⁢   π   ⁢           ⁢     V   0         4   ⁢       V   cc     ⁡     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )           ×       4   ⁢     V   cc         π   ⁢           ⁢     V   0                                       ɛ   2       ɛ   B       =     3     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                         Average             power   ⁢           ⁢   loss           ,                   P     ave   -   loss   -   3       =       ⁢       P     ave   -     i   ⁢           ⁢   n     -   3       -     P     ave   -   out                     =       ⁢           2   ⁢     V   cc     ⁢     V   0         3   ⁢   π   ⁢           ⁢   R       ⁢     (     1   +     cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )       -       V   0   2       2   ⁢   R                         
 
         [0102]      FIG. 6  shows a graph of Efficiency against Normalized Output Power for the amplifier circuit of  FIG. 2 , and, for comparison, a graph of Efficiency against Normalized Output Power for a conventional Class B amplifier. The graphs shown are for amplifiers operating at maximum output power with a sinusoidal input, without clipping, normalized to 1.  
         [0103]      FIG. 7  shows a graph of Power Loss in the amplifier of  FIG. 2  against Normalized Output Power and, for comparison, a graph of Power Loss in a conventional Class B amplifier against Normalized Output Power. As with  FIG. 6 , the graphs shown are for amplifiers operating at maximum output power with a sinusoidal input, without clipping, normalized to 1.  
         [0104]      FIG. 8  shows an alternative preferred embodiment of a Class μ Amplifier according to the present invention. The same reference numerals as those used in respect of the embodiment of  FIG. 2  have been used to denote identical components.  
         [0105]     The circuit shown in  FIG. 8  is identical to that shown in  FIG. 2 , the difference being that V cc1 , which is the voltage step between inputs on the switching unit  22 , is V cc /5 in the circuit of  FIG. 8  and the DC voltages output to the positive terminal at node  1  of the load  24  will therefore be −4V cc1 , −2V cc1 , GND, 2V cc1  and 4V cc1  accordingly.  
         [0106]     The resistor values in the circuit of  FIG. 8  are chosen as follows: 
 
 R   3 /( R   1   +R   2   +R   3 )= R   4 /( R   4   +R   5   +R   6 )=1/5 
 
( R   2   +R   3 )/( R   1   +R   2   +R   3 )=( R   4   +R   5 )/( R   4   +R   5   +R   6 )=3/5 
 
 V   cc1   =V   cc /5 
 
R 8 /R 7 =G V  
 
 R   10 /( R   9 + R   10 )=1/ G   V  
 
         [0107]      FIG. 9  shows the waveform at the positive terminal (node  1 ) of the load  24  of the circuit of  FIG. 8 .  
         [0108]      FIG. 10  shows the signal at node  3  of the negative terminal of the circuit of  FIG. 8 .  
         [0109]     In the embodiment of  FIG. 8 , on the negative side of the load  24 , the differential amplifier, instead of giving a half swing (as shown in  FIG. 5 ), gives a full swing as shown in  FIG. 10 .  
         [0110]      FIG. 11  shows a graph of Efficiency against Normalized Output Power for the amplifier of  FIG. 8 , and, for comparison, a graph of Efficiency against  
         [0111]     Normalized Output Power for a conventional Class B amplifier. The graphs shown are for the amplifiers operating at maximum output power with a sinusoidal input, without clipping normalized to 1.  
         [0112]      FIG. 12  shows a graph Power Loss in the amplifier of  FIG. 8  against Normalized Output Power and, for comparison, a graph of Power Loss in a conventional Class B amplifier against Normalized Output Power. As with  FIG. 11 , the graphs shown are for amplifiers operating at maximum output power with a sinusoidal input, without clipping normalized to 1.  
         [0113]      FIG. 13  shows a graph of Efficiency against Normalized Output Power for each of the amplifiers of  FIGS. 2 and 8  and, for comparison, a graph of Efficiency against Normalized Output Power for a conventional Class B amplifier. The graphs shown are for amplifiers operating at maximum output power with a sinusoidal input, without clipping normalized to 1.  
         [0114]      FIG. 14  shows a graph Power Loss in the amplifiers of  FIGS. 2 and 8  against Normalized Output Power and, for comparison, a graph of Power Loss in a conventional Class B amplifier against Normalized Output Power. As with  FIG. 13 , the graphs shown are for the amplifiers operating at maximum output power with a sinusoidal input, without clipping normalized to 1.  
         [0115]     Although in terms of efficiency and power loss, the performance of the embodiment of  FIG. 8  is not as good as that of  FIG. 2 , an advantage of the embodiment of  FIG. 8  is that a differential amplifier having lower output voltage and also a lower output power may be used. If the maximum output voltage of the differential amplifier  23  is 12V, then the overall output voltage to the load  24  will be 60V.  
         [0116]     The efficiency and power loss calculations for the embodiment of  FIG. 8  are described as follows.  
         [0117]     As before, a conventional Class B amplifier with a supply voltage of V cc  and capable of delivering a maximum output voltage of amplitude V cc  is used as comparison. The symbols used have been kept the same, except for V cc1 , which is changed to V cc /5.  
         [0118]     Output voltage, V out =V 0  sin ωt  
         [0119]     Average output power,  
         P     ave   -   out       =         V   out     2       2   ⁢   R           
 
         [0120]     Class μ Amplifier Stage  1 : For sinusoidal output voltage |V 0 |&lt;|V cc1|:    
         [0121]     For this stage of operation, the ground potential will be supplied to the positive side of the load  24 . Thus, only the differential amplifier  23  is supplying the signal to the load  24  at the negative side thereof.  
               Average   ⁢           ⁢   input   ⁢           ⁢   power     ,                   P     ave   -     i   ⁢           ⁢   n     -   1       =       ⁢       2   ⁢     V   cc1     ⁢     V   0         π   ⁢           ⁢   R                   =       ⁢           2   ⁢     V   cc     ⁢     V   0         5   ⁢   π   ⁢           ⁢   R       ⁢           ∵     V   cc1       =       V   cc     5                         Efficiency   ,                   ɛ   1     =       ⁢       π   ⁢           ⁢     V   0         4   ⁢     V   cc1                     =       ⁢       5   ⁢   π   ⁢           ⁢     V   0         4   ⁢     V   cc                         
 
         [0122]     Comparing the above with a conventional Class B Amplifier, during this stage of operation,  
                                   ɛ   1       ɛ   B       =           5   ⁢   π   ⁢           ⁢     V   0         4   ⁢     V   cc         ×       4   ⁢     V   cc         π   ⁢           ⁢     V   0           =   5                   ⇒     ɛ   1       =     5   ⁢     ɛ   B                           Average   ⁢           ⁢   power   ⁢           ⁢   loss     ,                   P     ave   -   loss   -   1       =       ⁢       P     ave   -     i   ⁢           ⁢   n     -   1       -     P     ave   -   out                     =       ⁢         2   ⁢     V   cc     ⁢     V   0         5   ⁢   π   ⁢           ⁢   R       -       V   0   2       2   ⁢   R                         
 
         [0123]     Class μ Amplifier Stage  2 : For sinusoidal output voltage |V cc1 |&lt;|V 0 |&lt;|3V cc1 | 
         [0124]     For this stage, it is necessary to determine the time t 1  when V out =V cc1 , which is the moment that V cc1  is switched on.  
               Output   ⁢           ⁢   voltage     ,               V   out     =       V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t       ⁢                         At   ⁢           ⁢     t   1       ,       V   out     =     V   cc1       ,                   ⇒     V   cc1       =       V   0     ⁢   sin   ⁢           ⁢       2   ⁢   π     T     ⁢     t   1                         2   ⁢   π     T     ⁢     t   1       =       sin     -   1       ⁢       V   cc1       V   0                       t   1     =       T     2   ⁢   π       ⁢     sin     -   1       ⁢       V   cc       5   ⁢     V   0         ⁢           ⁢     (   3   )                       
 
         [0125]     For the positive side of the load  24 , the total input power for ¼ period is:  
               P     total   -     i   ⁢           ⁢   n     -   2   +       =       ⁢       ∫     t   1       T   4       ⁢         2   ⁢     V   cc1     ⁢     V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t     R     ⁢           ⁢     ⅆ   t                     =       ⁢         2   ⁢     V   cc1     ⁢     V   0       R     ⁢       ∫     t   1       T   4       ⁢     sin   ⁢           ⁢       2   ⁢   π     T     ⁢   t   ⁢     ⅆ   t                       =       ⁢         2   ⁢     V   cc     ⁢     V   0         5   ⁢   R       ⁢         T     2   ⁢   π       ⁡     [       -   cos     ⁢       2   ⁢   π     T     ⁢   t     ]         t   1       T   4                     =       ⁢           V   cc     ⁢     V   0     ⁢   T       5   ⁢   π   ⁢           ⁢   R       ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1                 
 
         [0126]     For the negative side of the load  24 , the total input power for ¼ period is:  
                                       P     total   -     i   ⁢           ⁢   n     -   2   -       =       ⁢       ∫   0     T   4       ⁢           V   cc1     ⁢     V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t     R     ⁢           ⁢     ⅆ   t                     =       ⁢           V   cc1     ⁢     V   0       R     ⁢       ∫   0     T   4       ⁢     sin   ⁢           ⁢       2   ⁢   π     T     ⁢   t   ⁢     ⅆ   t                       =       ⁢           V   cc     ⁢     V   0         5   ⁢   R       ⁢         T     2   ⁢   π       ⁡     [       -   cos     ⁢       2   ⁢   π     T     ⁢   t     ]       0     T   4                     =       ⁢         V   cc     ⁢     V   0     ⁢   T       10   ⁢   π   ⁢           ⁢   R                           Average   ⁢           ⁢   input   ⁢           ⁢   power     ,                   P     ave   -     i   ⁢           ⁢   n     -   2       =         P     total   -     i   ⁢           ⁢   n     -   2   +       +     P     total   -     i   ⁢           ⁢   n     -   2   +           T   4                   =         2   ⁢     V   cc     ⁢     V   0         5   ⁢   π   ⁢           ⁢   R       ⁢     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1         )                         Efficiency   ,                   ɛ   2     =       ⁢         V   0   2       2   ⁢   R       ×       5   ⁢   π   ⁢           ⁢   R       2   ⁢     V   cc     ⁢       V   0     ⁡     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1         )                         =       ⁢       5   ⁢   π   ⁢           ⁢     V   0         4   ⁢       V   cc     ⁡     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1         )                               (   4   )             
 
         [0127]     Comparing the above with a conventional Class B Amplifier,  
                             ɛ   2       ɛ   B       =         5   ⁢   π   ⁢           ⁢     V   0         4   ⁢       V   cc     ⁡     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1         )           ×       4   ⁢     V   cc         π   ⁢           ⁢     V   0                                       ɛ   2       ɛ   B       =     5     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1         )                     Average   ⁢           ⁢   power   ⁢           ⁢   loss     ,                   P     ave   -   loss   -   2       =       ⁢       P     ave   -     i   ⁢           ⁢   n     -   2       -     P     ave   -   out                     =       ⁢           2   ⁢     V   cc     ⁢     V   0         5   ⁢   π   ⁢           ⁢   R       ⁢     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1         )       -       V   0   2       2   ⁢   R                         
 
         [0128]     Class μ Amplifier Stage  3 : For sinusoidal output voltage |3V cc1 |&lt;|V 0 |V cc1 | 
         From   ⁢           ⁢     (   3   )       ,       t   1     =       T     2   ⁢   π       ⁢     sin     -   1       ⁢       V   cc       5   ⁢     V   0                 
 
         [0129]     The time t 2 , when V out =V cc2 , the moment that 3V cc1  is switched on, is given as follows.  
               V   out     =       V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t                   ⇒     3   ⁢     V   cc1         =       V   0     ⁢   sin   ⁢       2   ⁢   π     T     ⁢     t   2                         2   ⁢   π     T     ⁢     t   2       =       sin     -   1       ⁢       3   ⁢     V   cc1         V   0                       t   2     =       T     2   ⁢   π       ⁢     sin     -   1       ⁢       3   ⁢     V   cc         5   ⁢     V   0                     
 
         [0130]     For the positive side of the load  24 , the total input power for ¼ period is:  
               P     total   -     i   ⁢           ⁢   n     -   3   +       =       ⁢         ∫     t   1       t   2       ⁢         2   ⁢     V   cc1     ⁢     V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t     R     ⁢           ⁢     ⅆ   t         +       ∫     t   2       T   4       ⁢         4   ⁢     V   cc1     ⁢     V   0     ⁢   sin   ⁢           ⁢   ω   ⁢           ⁢   t     R     ⁢           ⁢     ⅆ   t                       =       ⁢           2   ⁢     V   cc1     ⁢     V   0       R     ⁢       ∫     t   1       t   2       ⁢     sin   ⁢       2   ⁢   π     T     ⁢   t   ⁢           ⁢     ⅆ   t           +         4   ⁢     V   cc1     ⁢     V   0       R     ⁢       ∫     t   2       T   4       ⁢     sin   ⁢       2   ⁢   π     T     ⁢   t   ⁢           ⁢     ⅆ   t                         =       ⁢           2   ⁢     V   cc1     ⁢     V   0       R     ⁢         T     2   ⁢   π       ⁡     [       -   cos     ⁢       2   ⁢   π     T     ⁢   t     ]         t   1       t   2         +         4   ⁢     V   cc1     ⁢     V   0       R     ⁢         T     2   ⁢   π       ⁡     [       -   cos     ⁢       2   ⁢   π     T     ⁢   t     ]         t   2       T   4                       =       ⁢             V   cc1     ⁢     V   0     ⁢   T       π   ⁢           ⁢   R       ⁢     {       cos   ⁢       2   ⁢   π     T     ⁢     t   1       -     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )       +                     ⁢         2   ⁢     V   cc1     ⁢     V   0     ⁢   T       π   ⁢           ⁢   R       ⁢     (     cos   ⁢       2   ⁢   π     T     ⁢     t   2       }                 
           But   ⁢           ∵     V   cc1       =       V   cc     5       ,     
     ⁢       ∴     P     total   -     i   ⁢           ⁢   n     -   3   +         =           V   cc     ⁢     V   0     ⁢   T       25   ⁢   π   ⁢           ⁢   R       ⁢     (       cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )             
 
         [0131]     For the negative side of the load  24 , from equation (4),  
         P     total   -     i   ⁢           ⁢   n     -   3   -       =         V   cc     ⁢     V   0     ⁢   T       10   ⁢           ⁢   π   ⁢           ⁢   R           
                     Average   ⁢           ⁢   total               input   ⁢           ⁢   power           ,                   P     total   -     i   ⁢           ⁢   n     -   3       =       ⁢         P     total   -     i   ⁢           ⁢   n     -   3   +       +     P     total   -     i   ⁢           ⁢   n     -   3   -           T   4                   =       ⁢             4   T     ⁢     {             V   0     ⁢     V   cc     ⁢   T       5   ⁢           ⁢   π   ⁢           ⁢   R       ⁢     (       cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     cos   ⁢       2   ⁢   π     T     ⁢     t   2         )       +                       ⁢         V   cc     ⁢     V   0     ⁢   T       10   ⁢   π   ⁢           ⁢   R       }                       =       ⁢         2   ⁢     V   0     ⁢     V   cc         5   ⁢   π   ⁢           ⁢   R       ⁢     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                         Efficiency   ,                   ɛ   3     =       ⁢         V   0   2       2   ⁢   R       ×       5   ⁢   π   ⁢           ⁢   R       2   ⁢     V   cc     ⁢       V   0     ⁡     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                         =       ⁢       5   ⁢   π   ⁢           ⁢     V   0         4   ⁢       V   cc     ⁡     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                           
 
         [0132]     Comparing the above with a conventional Class B Amplifier,  
                             ɛ   3       ɛ   B       =         5   ⁢   π   ⁢           ⁢     V   0         4   ⁢       V   cc     ⁡     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   2         )           ×       4   ⁢     V   cc         π   ⁢           ⁢     V   0                                       ɛ   2       ɛ   B       =     5     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   2         )                         Average             power   ⁢           ⁢   loss           ,                   P     ave   -   loss   -   3       =       ⁢       P     ave   -     i   ⁢           ⁢   n     -   3       -     P     ave   -   out                     =       ⁢           2   ⁢     V   cc     ⁢     V   0         5   ⁢   π   ⁢           ⁢   R       ⁢     (     1   +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   1       +     2   ⁢   cos   ⁢       2   ⁢   π     T     ⁢     t   2         )       -                     ⁢       V   0   2       2   ⁢   R                       
 
         [0133]     As mentioned above, it is proposed that amplifiers embodying the present invention are to be named the Class μ Amplifier because of the resultant shape of the curve when the graph of Efficiency against Output Power is plotted (as shown in  FIG. 6 ). From the graph of  FIG. 6 , it will be seen that for a Class μ amplifier implementing  3  stages of operation, during a proposed typical operation at ⅛ to ⅓ of the maximum output power, an efficiency of about 62% to 75% may be achieved. This is typically 1.5 times more efficient than conventional Class B amplifiers.  
         [0134]     The difference in the actual power loss between the Class μ amplifier and the conventional Class B amplifier is evident from the graph of Power Loss against Output Power shown in  FIG. 7 . During an operation at ⅛ to ⅓ of maximum output power, the power loss of the Class μ amplifier may be seen to be less than ⅓ of that of a conventional Class B Amplifier. For the whole range of output power, the maximum power loss of the Class μ Amplifier may be seen to be less than half of that of a conventional Class B Amplifier.  
         [0135]     If more stages of operation are used for the Class μ amplifier, higher efficiencies may be achieved.  
         [0136]     In summary, one or more preferred embodiments of the invention may provide an amplifier circuit that achieves considerably greater efficiency than a conventional Class B amplifier. Another advantage of one or more preferred embodiments of the invention is that errors generated in the switching circuit may be substantially eliminated as the differential amplifier will apply the errors to the opposite side of the load  24 , thereby canceling them out.