Abstract:
An ULSI MOSFET formed using silicon on insulator (SOI) principles includes masking regions of an amorphous silicon film on a substrate and exposing intended active regions. Laser energy is directed against the intended active regions to anneal these regions without annealing the masked regions, thereby increasing production throughput and decreasing defect density.

Description:
RELATED APPLICATION(S) 
     This application is a divisional patent application of co-pending U.S. patent application Ser. No. 09/406,169, now U.S. Pat. No. 6,265,250, entitled METHOD FOR FORMING SOI FILM BY LASER ANNEALING, filed Sep. 23, 1999, by the same applicant. 
    
    
     TECHNICAL FIELD 
     The present invention relates generally to semiconductor fabrication, and more particularly to methods for fabricating improved ultra-large scale integration (ULSI) semiconductor devices such as ULSI metal oxide silicon field effect transistors (MOSFETs). 
     BACKGROUND OF THE INVENTION 
     Semiconductor chips are used in many applications, including as processor chips for computers, and as integrated circuits and as flash memory for hand held computing devices, wireless telephones, and digital cameras. Regardless of the application, it is desirable that a semiconductor chip hold as many circuits or memory cells as possible per unit area. In this way, the size, weight, and energy consumption of devices that use semiconductor chips advantageously is minimized, while nevertheless improving the memory capacity and computing power of the devices. 
     One general method for making semiconductor chips is referred to as the “bulk” CMOS method, wherein well implants are formed in a bulk silicon substrate to promote subsequent proper functioning of the chip, and then transistor stacks are formed on the substrate. A newer chip making method referred to as “silicon on insulator” or “SOI” has also been introduced which does not require the formation of wells in the substrate, and which provides for faster transistor switching speed, improved resistance to soft error and latch-up, and higher transistor density. Moreover, SOI chips advantageously consume less power when inactive compared to bulk CMOS chips. 
     As recognized by the present invention, however, the SOI process implicates complications, including the implantation of high doses of oxygen into the substrate. As understood herein, the high dose of oxygen that is required can lead to a relatively high defect rate in the SOI film, consequently requiring high temperature annealing for prolonged periods to alleviate the defects. Unfortunately, this in turn makes it difficult to precisely control the SOI film thickness, which is undesirable because a uniform SOI film thickness promotes optimal chip functioning. Also, because of the prolonged annealing, manufacturing throughput is lower than might be desired. Fortunately, the present invention has recognized the above problems and has provided the solutions herein. 
     BRIEF SUMMARY OF THE INVENTION 
     A method is disclosed for forming a silicon on insulator (SOI) device. The method includes depositing an amorphous silicon film on a substrate, and establishing protective stacks in the film. Active region windows are established over first regions of the film between protective stacks. Laser energy is then directed through the active region windows against the first regions to anneal the first regions. As disclosed further below, the first regions establish active SOI regions after annealing and cooling. 
     In one preferred embodiment, the protective stacks are made of an oxide. On the other hand, the substrate is made of a material selected from a group consisting essentially of: sapphire, silicon oxide, and silicon nitride. 
     The preferred method of establishing the active region windows includes masking the first regions of the film to establish stack windows over second regions of the film. The second regions of the film are then removed, and an oxide material is deposited to fill the stack windows. Next, the first regions are unmasked to establish the active region windows, prior to laser annealing. 
     In another aspect, an SOI semiconductor device includes a substrate and active regions of recrystallized silicon on the substrate disposed between inactive regions of oxide. 
     In yet another aspect, a method for making an SOI device includes providing a substrate, and depositing an amorphous silicon film on the substrate. Moreover, the method includes masking intended active regions of the film. Also, the method contemplates removing unmasked regions of the film to establish stack windows, and then depositing an oxide in the stack windows. The intended active regions are unmasked and activated using laser annealing followed by cooling. 
     In a preferred embodiment, the method includes heating the intended active regions to at least nine hundred degrees Celsius (900° C.). Indeed, the intended active regions can be heated to at least nine hundred fifty degrees Celsius (950° C.). Preferably, the activating act is accomplished by pulsing a laser beam against the intended active regions to melt the regions. 
     Other features of the present invention are disclosed or apparent in the section entitled “DETAILED DESCRIPTION OF THE INVENTION.” 
    
    
     BRIEF DESCRIPTION OF DRAWINGS 
     For a better understanding of the present invention, reference is made to the below-referenced accompanying drawing(s) which is/are for illustrative purposes and where like reference numbers denote like elements. 
     FIG. 1 is a schematic diagram of a semiconductor device made according to the present invention, shown in combination with a digital processing apparatus; 
     FIG. 2 is a flow chart showing the steps of the present invention; 
     FIG. 3 is a schematic side view of the device after the SOI film and nitride cap layer have been deposited on the substrate; 
     FIG. 4 is a schematic side view of the device after the photoresist layer has been deposited and patterned; 
     FIG. 5 is a schematic side view of the device after the photoresist layer has been stripped away and the nitride cap layer has been removed from the portions of the film intended to become the active portions; 
     FIG. 6 is a schematic side view of the device after the TEOS layer has been deposited; 
     FIG. 7 is a schematic side view of the device after TEOS polishing; 
     FIG. 8 is a schematic side view of the device during laser annealing; and 
     FIG. 9 is a schematic side view of the device after laser annealing. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring initially to FIG. 1, a semiconductor device embodied as a chip  10  is shown incorporated into a digital processing apparatus such as a computer  12 . The chip  10  is made in accordance with the below disclosure. 
     Now referring to FIGS. 2 and 3, as indicated at block  14  in FIG.  2  and as shown in FIG. 3, to make the device  10  an amorphous silicon (“α-silicon”) film  16  is deposited on a substrate  18  using appropriate deposition principles, e.g., low pressure chemical vapor deposition (LPCVD). The thickness “t” of the film  16  can be from one hundred Angstroms to five hundred Angstroms (100 Å-500 Å) or more. In any case, the substrate  18  has a melting temperature that is higher than the melting temperature of the α-silicon film  16 . In one preferred embodiment, the substrate  18  can be made of sapphire, silicon oxide, or silicon nitride, or other appropriate, relatively high melting point substance. 
     Moving to block  20  of FIG.  2  and referring to FIGS. 3 and 4, a protective cap layer  22  is deposited onto the α-silicon film  16 . The cap layer  22  can be made of silicon nitride and can have a thickness “tt” of, e.g., three hundred Angstroms to five hundred Angstroms (300 Å-500 Å). As also indicated at block  20 , a photoresist layer  24  is deposited over the cap layer  22 , and then as indicated at block  26  the photoresist layer  24  is patterned as shown in FIG. 4 by, e.g., exposing the photoresist layer  24  to ultraviolet light to expose regions of the cap layer  22 . These exposed regions of the cap layer  22  are removed at block  28  in FIG. 2 by, e.g., anisotropical plasma etching to define stack windows  30  over unmasked regions  32  of the α-silicon film  16 . It is to be understood that the unmasked regions  32  of the α-silicon film  16  overlay intended field regions  34  of the substrate  18 , as shown best in FIG.  4 . 
     After establishing the stack windows  30 , the process moves to block  36  in FIG. 2 to remove the photoresist layer  24 . Next, at block  38 , the unmasked regions  32  (FIG. 4) of the α-silicon film  16  that overlay the intended field regions  34  of the substrate  18  are removed to render the configuration shown in FIG.  5 . The unmasked regions  32  (FIG. 4) of the α-silicon film  16  can be removed by, e.g., wet or dry etching. 
     Proceeding to block  40  of FIG.  2  and now referring to FIG. 6, a layer  42  preferably made of TEOS oxide is deposited over the substrate  18  as shown and polished down to the nitride cap layer  22  as shown in FIG. 7 to establish protective stacks  44  over the intended field regions  34 . The layer  42  of TEOS can be polished down to the cap layer  22 , which acts as a polish stop, using chemical mechanical polishing (CMP) principles. 
     Next moving to block  46  and referring to FIG. 8, the remaining areas of the cap layer  22  are removed to form active region windows  47  that expose intended active regions  48  of the α-silicon film  16 . As shown, the intended active regions  48  alternate with the protective oxide stacks  44 . 
     In accordance with the present invention, the intended active regions  48  are annealed at block  50  of FIG.  2 . In one intended embodiment, the regions  48  are annealed by directing laser energy, represented by arrows  52  in FIG. 8, through the active region windows  47 , against the regions  48 . Thus, only the intended active regions  48  are annealed by the laser energy, with the intended field regions  34  of the substrate  18  being effectively shielded by the oxide stacks  44 . 
     The laser energy preferably is an excimer laser beam that is pulsed at a period of a few nanoseconds to achieve a temperature in the exposed intended active regions  48  of at least nine hundred degrees Celsius, and as high as nine hundred fifty degrees Celsius or more. In this way, the α-silicon of the intended active regions  48  is melted, with the oxide stacks  44  masking the intended field regions  34  of the substrate  18  from the laser energy. The regions  48  are then cooled to room temperature to permit the silicon to recrystallize, establishing active regions of the device  10 . During recrystallization, defects in the silicon are effectively removed. 
     While the particular METHOD FOR FORMING SOI FILM BY LASER ANNEALING as herein shown and described in detail is fully capable of attaining the above-described objects of the invention, it is to be understood that it is the presently preferred embodiment of the present invention and is thus representative of the subject matter which is broadly contemplated by the present invention, that the scope of the present invention fully encompasses other embodiments which may become obvious to those skilled in the art, and that the scope of the present invention is accordingly to be limited by nothing other than the appended claims, in which reference to an element in the singular is not intended to mean “one and only one” unless explicitly so stated, but rather “one or more.” All structural and functional equivalents to the elements of the above-described preferred embodiment that are known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the present claims. Moreover, it is not necessary for a device or method to address each and every problem sought to be solved by the present invention, for it to be encompassed by the present claims.