Abstract:
Noise-reduced semiconductor devices operating at a high frequency band greater than several GHz are disclosed. Also disclosed is a method for manufacturing such semiconductor devices. A trench penetrating through a semiconductor substrate is configured to surround a noise-generating circuit block and/or a noise-susceptible circuit block, in order to reduce noise propagation through the substrate. Noise-reduced semiconductor device are fabricated with a conventional silicon wafer instead of an SOI (Silicon on Insulator) wafer, which is manufactured in a complicated process sequence.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    Generally, the present invention relates to a semiconductor device, and more particularly to an inexpensive semiconductor device which is improved so that noise propagation can be reduced.  
           [0003]    The present invention also relates to a manufacturing method of such a semiconductor device.  
           [0004]    2. Description of the Background Art  
           [0005]    [0005]FIG. 12 is a sectional view of a conventional high frequency silicon semiconductor device. An oxide film layer  5  is formed in a silicon substrate  1 . A trench isolation  6  is formed on oxide film layer  5 . A gate electrode  2  of a transistor is formed on silicon substrate  1 . Wires  3  are connected to the transistor. An interlayer insulating film  4  is formed on silicon substrate  1  in order to insulate the transistor or between the wires.  
           [0006]    Thus, the conventional high frequency silicon semiconductor device is fabricated with an SOI (Silicon on Insulator) wafer utilizing a silicon substrate as a base, and is also combined with an isolation technique such as a trench isolation, thereby attempting to reduce crosstalk noise. That is, there has a configuration that trench isolation  6  separates a circuit block which generates noise from a circuit block which is desired to suppress a noise level to reduce noise propagating silicon substrate  1 .  
         SUMMARY OF THE INVENTION  
         [0007]    Such a high frequency silicon semiconductor device is operated at a frequency band greater than several GHz for transmission and reception and is utilized in a cellular phone, a wireless local area network, other high rate communication equipment and the like.  
           [0008]    The conventional high frequency silicon semiconductor device is configured as described above. Since the SOI substrate is manufactured through a complicated process sequence such as ion implantation, wafer bonding and wafer splitting, there is a demerit that the price is high in comparison with a conventional silicon substrate.  
           [0009]    The present invention is made to solve the above described problem and an object thereof is to provide a high frequency silicon semiconductor device which is improved so as to be capable of manufacturing inexpensively.  
           [0010]    Another object of the present invention is to provide a semiconductor device which is improved such that noise propagating in the silicon substrate can be reduced by means of an inexpensive method.  
           [0011]    Still another object of the present invention is to provide a manufacturing method of such a semiconductor device.  
           [0012]    A semiconductor device according to a first aspect of the present invention is provided with: a semiconductor substrate; a trench vertically penetrating through the semiconductor substrate; and a semiconductor element formed on the semiconductor substrate.  
           [0013]    According to the present invention, a trench penetrating through the semiconductor substrate is provided, so that noise propagation via the semiconductor substrate can be reduced.  
           [0014]    A method according to a second aspect of the present invention relates to a manufacturing method of a semiconductor device which has a semiconductor substrate through which a trench vertically penetrates is formed. First, a portion for forming the trench of the semiconductor substrate is downwardly excavated up to the middle of the substrate. An insulator is fully or partially embedded into the downwardly excavated portion. The portion for forming the trench of the semiconductor substrate is excavated from an opposite side of the substrate until the insulator appears.  
           [0015]    The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0016]    [0016]FIG. 1 is a sectional view of a high frequency silicon semiconductor device according to a first embodiment;  
         [0017]    [0017]FIG. 2 is a plan view of a high frequency silicon semiconductor device according to a third embodiment;  
         [0018]    [0018]FIG. 3 is a plan view of a high frequency silicon semiconductor device according to a fourth embodiment;  
         [0019]    [0019]FIG. 4 is a sectional view of a high frequency silicon semiconductor device according to a fifth embodiment;  
         [0020]    [0020]FIG. 5 is a plan view of the device shown in FIG. 4;  
         [0021]    FIGS.  6  to  9  are sectional views of a semiconductor device in the order of from first to fourth steps of a manufacturing method of a semiconductor device according to a sixth embodiment;  
         [0022]    [0022]FIG. 10 is a sectional view of a semiconductor device in order from the first step of a manufacturing method of a high frequency silicon semiconductor device according to a seventh embodiment;  
         [0023]    [0023]FIG. 11 is a sectional view of the semiconductor device in order from the second step of the manufacturing method of the high frequency silicon semiconductor device according to the seventh embodiment; and  
         [0024]    [0024]FIG. 12 is a sectional view of a conventional high frequency silicon semiconductor device. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0025]    In the following, embodiments of the present invention will be described with reference to the drawings.  
         [0026]    First Embodiment  
         [0027]    [0027]FIG. 1 is a sectional view of a high frequency silicon semiconductor device according to a first embodiment.  
         [0028]    With reference to FIG. 1, a trench  10  penetrating through a silicon substrate  1  is provided in the substrate. An insulator  11  is embedded into trench  10 . It is preferable that a thickness of silicon substrate  1  is adjusted from 30 μm to 50 μm. A gate electrode  2  of a transistor is formed on silicon substrate  1 . Wires  3  are connected to the transistor. An insulating layer  4  is provided on silicon substrate  1  in order to insulate the transistor or between the wires. Trench  10  is provided so as to surround a circuit module which generates noise or a circuit module of which a noise level is desired to be lowered.  
         [0029]    Trench  10  separates semiconductive silicon substrate  1  into two parts, so that noise propagation is suppressed. According to the present embodiment, the substrate may be a general silicon substrate and it is not necessary to use an expensive SOI substrate. Accordingly, a high frequency silicon semiconductor device which is improved so as to reduce noise propagation can be inexpensively obtained.  
         [0030]    Note that a manufacturing method of such a semiconductor device will be described below.  
         [0031]    Second Embodiment  
         [0032]    With reference to FIG. 1, although trench  10  penetrating through silicon substrate  1  is embedded with insulator  11 , the existence of such a solid insulator is not necessary and, in place of that, a hollow area may be provided. In this case, a step of embedding an insulator into trench  11  can be omitted, so that there is an advantage that the manufacturing process can be further simplified.  
         [0033]    Third Embodiment  
         [0034]    When a portion which generates noise and a portion of which the noise level is desired to be lowered exist at the same time within one semiconductor device, it is considered that noise should not be went out of noise generation source as a method of suppressing noise propagation.  
         [0035]    [0035]FIG. 2 shows a plan view of a semiconductor device according to the present embodiment. A circuit block  20  which generates noise is surrounded by a trench  10  to reduce noise propagation to a circuit block  21  which is outside thereof and of which the noise level is desired to be lowered. A sectional view along line  1 - 1  in FIG. 2 is represented, for example, as the sectional view shown in FIG. 1.  
         [0036]    Fourth Embodiment  
         [0037]    [0037]FIG. 3 is a plan view of a high frequency silicon semiconductor device according to a fourth embodiment. A configuration that a circuit block  20  which is a noise generation source is surrounded by a trench  10  is adopted in the semiconductor device in FIG. 2. However, the present invention is not limited thereto, and noise reduction can be achieved, as shown in FIG. 3, by adopting a configuration that circuit block  21  of which the noise level is desired to be lowered is surrounded by trench  10 .  
         [0038]    Fifth Embodiment  
         [0039]    In a case where an amount of generated noise is great or in a case where a low noise tolerance level setting is desired, a single trench, only, may be insufficient in some cases. In such a case, for example, plural trenches such as trenches  10   a  and  10   b  are aligned as shown in FIG. 4 (sectional view) and FIG. 5 (plan view) and, thereby further reducing the noise level.  
         [0040]    Note that a case of two trenches is shown in the device of FIGS. 4 and 5 and a greater effect can be obtained in the case that the number of trenches is increased.  
         [0041]    Sixth Embodiment  
         [0042]    FIGS.  6  to  9  are views showing a manufacturing method of a high frequency silicon semiconductor device according to a sixth embodiment.  
         [0043]    With reference to FIG. 6, a portion for forming a trench of a silicon substrate  1  is downwardly excavated up to the middle of the substrate to form a trench  13 .  
         [0044]    With reference to FIG. 7, an insulator  11  is embedded into trench  13 .  
         [0045]    In reference to FIG. 8, the portion for forming the trench of silicon substrate  1  is excavated from an opposite side of the substrate until insulator  11  appears. With reference to FIG. 9, insulator  11  is further embedded into the excavated portion. With reference to FIG. 1, a transistor including a gate electrode  2 , wires  3  and an insulating layer  4  are formed thereon, so that a high frequency silicon semiconductor device is completed.  
         [0046]    Seventh Embodiment  
         [0047]    [0047]FIGS. 10 and 11 are views for describing a manufacturing method of a high frequency silicon semiconductor device according to a seventh embodiment. With reference to FIG. 10, an insulator layer or a grounded metal layer  14  is formed on a back face of a silicon substrate  1 .  
         [0048]    With reference to FIG. 11, a portion for forming a trench of silicon substrate  1  is excavated from a surface of the substrate up to the back face of the substrate to form a penetrating trench  10 . After that, an insulator is partially or fully embedded into penetrating trench  10  and a transistor and wires are formed, thereby obtaining the high frequency silicon semiconductor device shown in FIG. 1.  
         [0049]    As described above, according to the present invention, an effect is realized that a high frequency silicon semiconductor device of which noise propagation is reduced is obtained at a price similar to that of the conventional silicon substrate.  
         [0050]    Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims.