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shailja
/
fine-tuned-codegen-6B-Verilog
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Text Generation
Transformers
PyTorch
shailja/Verilog_GitHub
codegen
code
Eval Results
Inference Endpoints
arxiv:
2212.11140
License:
bigcode-openrail-m
Model card
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fine-tuned-codegen-6B-Verilog
/
tokenizer_config.json
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Upload 3 files
a0106f3
shailja
commited on
Nov 7, 2022