PM / Sleep: Clean up remnants of workqueue-based sync

When legacy wakelock code was removed in commit
f85607a715a74c65db812cd3901022888257f966, some of the code
for moving calls to sys_sync() from suspend paths into a
workqueue item had not been properly removed. Specifically,
one of the call sites to suspend_sys_sync_wait() has been
mistakenly replaced with a call to sys_sync(), which is not
necessary because the corresponding instance of
suspend_sys_sync_queue() was already replaced with
sys_sync(). Clean up the remnants of the legacy wakelock
code by removing the extraneous call to sys_sync() and
restoring some of the surrounding printk statements that
had been moved to suspend_sys_sync_queue() and subsequently
lost.

CRs-Fixed: 498669
Change-Id: Ifb2ede7808560f456c824d3d6359a4541c51b73f
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
(cherry picked from commit 6aae9f5b5c58ff8d009831812344e69b12f93008)
arm/dt: msm: Add bus bandwidth support to PRNG

Add device tree entries to support bus bandwidth
for PRNG driver on MSM8974, MSM8226, MSM8610.

Change-Id: Ic93a7b6e4d42f839293946d10d532a56acc94ed1
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
(cherry picked from commit ef48c4ad64f3f2b816e4e4ac5fe8c367a5b18bb1)
mms: rng: Add bus bandwidth support to PRNG

PRNG has to use pnoc clock, but pnoc is a bus clock & clients cannot
directly call pnoc apis, so prng calls bus bandwidth api to get the
clock cycles.

Change-Id: Ib3cd075097b4b70f82ec6325535e6e39808c6408
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
(cherry picked from commit 08f1e2e079683633df98d9df9053641e02a2acb2)
spi_qsd: Add vote for clock path

Currently the spi driver votes for its core clock. However, it is
possible that the core-clock's source will be off. When the source
is off, the spi core is not clocked. This patch adds voting for
the entire clock path, thus guarantee clocking to the spi core.
Voting for the path cost a few msecs. A client may choose when
to pay this overhead. By default the votes takes place in the
runtime-pm callbacks which tie to transaction requests. A client
may choose to invoke these callbacks itself whenever it likes
by directly calling the driver's runtime-pm. A third option is
to set the active_only flag in platform data which results in the
callbacks being called when the application processor power state
changes.

CRs-Fixed: 478465
Change-Id: Ib866399c0e84a875a19a0d1506d77bbe77d5fe61
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
(cherry picked from commit 23350551cb9a3b0701e46431113cc82d6bb7fb96)
arm/dt: msm8974: spi_qsd: Add support for clock path voting

Voting for the entire clock path (using the bus-scaling driver)
requires information about the master endpoint number. A second
new field signals the driver if vote should follow the runtime-pm
state or the application processor power state. These values
are configured in the device tree. In addition, the device-tree
binding document is updated to reflect the new fields.

Change-Id: Ie97cfd209c77fbee01a0ea4f44fa1a34377af519
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
(cherry picked from commit c66eb953a601bc54e6d4924e9608051085c501db)
mdss: Display: Add bus clocks to be part of DSI clock control

Move the bus clock Enable/Disable calls to be part
of the clock control logic so that they can be disabled
when they are not used.

Change-Id: I1a498db5ff132108134d356239fdc03721cac67b
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
(cherry picked from commit c11e2a6edf35f5d54c0966dded80db41baa33a7b)
Revert "msm: pm-8x60: Add PNOC request to prevent PNOC clk gating"

This reverts commit 9b186afca6c206ef1e74c138a10b75bdab4ba422.

Change-Id: Ifb0e0af69f6e63cae74ba2c50cb5d126257bc43d
Signed-off-by: Badhri Jagan Sridharan <badhris@codeaurora.org>
(cherry picked from commit 3a6a780f63c94155ce7c428024f94e38fca2e501)
arm/dt: 8974: Add enabled interrupts to bypass list

The following interrupts were added to Bypass list
to enable XO shutdown for smart panel during static
display

hwirq: 56 ->  modem_wdog
hwirq: 70 ->  msm_iommu_pmon_nonsecure_irq
hwirq: 97 ->  msm_iommu_nonsecure_irq
hwirq: 105 -> msm_iommu_pmon_nonsecure_irq
hwirq: 181 -> wcnss_wdog
hwirq: 211 -> dwc3_otg

Signed-off-by: Badhri Jagan Sridharan <badhris@codeaurora.org>
Change-Id: I554e8090bcc8168f0f7e60f6962e55871ea44b1b
(cherry picked from commit e47903e408da4d427517ca3473f0d526df6f283c)
msm: clock-8974: Add PNOC request to prevent PNOC clk gating

Keep a request of 19.2Mhz for PNOC bus when APSS is not
in idle-pc.

Signed-off-by: Badhri Jagan Sridharan <badhris@codeaurora.org>
Change-Id: Ib08b92949c970bc353cca1d5a5e3155a65c02dbb
(cherry picked from commit 4866f4aae17453c78cd02bc0655a0044459df153)
msm: wfd: Flush encoder after stopping VSG

VSG_STOP's completion is dependent on all buffers being returned back
to VSG. Hence, flush encoder earlier so that the core returns all input
buffers back.

Change-Id: I0cdef7e638f265b7bb9edc20623e608913823998
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
(cherry picked from commit 2239f95e39edcdd2721bbe8703469189709fe401)
msm: ipc: Handle the Resume_Tx events from remote endpoints

To prevent the QMI clients from flooding the remote services, IPC Router
transport supports a flow control mechanism. When the IPC Router
transport returns -EAGAIN during message transmission, queue the packet
into client's pending transaction queue for transmission during later
time. In addition, handle RESUME_TX events from the remote services and
use that event to transmit the packets in pending transaction queue.

CRs-Fixed: 508386
Change-Id: Ib24256fd0dbeecb9d96ea03ffd86afe2b4cc1483
Signed-off-by: Zaheerulla Meer <zmeer@codeaurora.org>
Signed-off-by: FNU Ramendra <rramendr@codeaurora.org>
(cherry picked from commit 21d7ac6099cba82490d8fd3bf3f9b03be37d4bc7)
msm: qmi: Update the wait-for-response to UNINTERRUPTIBLE

Currently once a QMI request is sent, the wait for the response is
interruptible. Sometimes the wait returns -ERESTARTSYS due to signals or
for reasons other than response reception. Since the interface to send
a QMI request is restricted completely within the kernel-space, the
kernel QMI client is not able to handle -ERESTARTSYS gracefully.

Update the wait-for-response in the interface API to uninterruptible.

CRs-Fixed: 504771
Change-Id: I91262e6a7057b5387adfd4728ba9a6ea7002e5d9
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
Signed-off-by: FNU Ramendra <rramendr@codeaurora.org>
(cherry picked from commit 55b710ac740b9f935e2a3b8800700750a172858a)
msm: ipc: Make the kernel-space read operation as non-blocking

Update the read operations of kernel space to be non-blocking and
return -ENOMSG when there is no message to read.

CRs-Fixed: 508370
Change-Id: I92f55d8829755078f34ff3cbe2dc9b16ed7988df
Signed-off-by: Zaheerulla Meer <zmeer@codeaurora.org>
Signed-off-by: FNU Ramendra <rramendr@codeaurora.org>
(cherry picked from commit f94879798b44c9816ac93bfe932570a1bc11b4f4)
msm: krait-regulator: correct krait rail settling delay calculation

set_pmic_gang_voltage() updates pmic_vmax_uV to be equal to vmax
prior returning.  Because of this, the settling delay calculation
will always yield 0us. Fix this.

Change-Id: I670a0bdecfe72e9ddf663e9a35ef8a6354946224
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
(cherry picked from commit b0fbb580e90059c59bdeee110b22981b12c22dc8)
msm: krait-regulator: Update SLEW_RATE constant

The Krait regulators are clocked from an RC oscillator circuit
that could vary in frequency by as much as 25% in extreme
conditions, causing the voltage ramp to be either faster or slower
than the nominal rate. To ensure we wait long enough for the rail
to settle in all conditions, lower SLEW_RATE by 25%.

Change-Id: I11cc4e7d57eced2f8f984153d48b4298ee71ec9e
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
(cherry picked from commit c5cd6ddd34f8025175376ad90a294a5e50b99e85)
msm: clock-8974: Add BCR registers for GDSC-collapsible cores

The GDSC driver allows collapse of cores to be disabled
via device tree. Client drivers may still expect the core
to be reset to a clean state after calls to the GDSC APIs,
however.

Specify .bcr_reg addresses for GDSC-collapsible cores so
that the GDSC driver can assert resets to these cores in
lieu of collapsing them. This is similar to what's already
been done for venus0_vcodec0_clk for the same reason.

Change-Id: I1dfdf9562dd49eee7b38a204a063d6787fc4ce85
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
(cherry picked from commit b119fa6630ec933b78c435b94099cf3f6f8c030a)
Merge "PM / Sleep: Clean up remnants of workqueue-based sync"
Merge "arm/dt: msm: Add bus bandwidth support to PRNG"
Merge "mms: rng: Add bus bandwidth support to PRNG"
Merge "spi_qsd: Add vote for clock path"