renamed examples/kc705 to examples/pcie-axi-scratchpad
Move Kintex7 boilerplate out of TopKC705
added pcie-echo example
was sending portal TLPs to the wrong fifo
added portal_mmap
added bluenoc mmap
fixed Makefile
removed generated echo code from pcie-axi-scratchpad
use 12 bit request ID to match zynq
updated echo with code generated by current version of bsvgen.py
Top of Echo PCIe design
bsvgen now adds descending_urgency attributes and uses a pulse wire to reduce bsc scheduler warnings
constraints file that defines the needed pcie clocks
script to decode the pcie tlp log
Added XbsvReadyQueue.bsv to reduce contention signally indication readiness

This can be used to replace the readOutstanding FIFO in the IndicationWrapper.
Use XbsvReadyQueue instead of readOutstanding FIFO to reduce scheduler warnings

The ready queue eliminates contention in the indication method delivery implementation
and therefore reduces bsc scheduler warnings.
bsv testbench for PcieToAxiBridge
disabled ddr and added trace interface from PcieToAxiBridge
added trailing newline
used the trace interface. some change made this stable for reads via PCIe