Id
stringlengths 1
6
| Tags
stringlengths 3
101
| Answer
stringlengths 38
37.2k
⌀ | Body
stringlengths 26
26.8k
| Title
stringlengths 15
150
| CreationDate
stringlengths 23
23
|
|---|---|---|---|---|---|
699263 | |pcb|ac|identification|triac|vacuum-tube| | <p>It's a gas breakdown tube, part of a safety circuit.</p>
<p>There are several patents showing this, such as:</p>
<p><a href="https://patents.justia.com/patent/4436986" rel="noreferrer">US Patent 44369886</a> Electric blanket safety circuit.</p>
<p><a href="https://patents.google.com/patent/US5451747A/en" rel="noreferrer">US Patent 5451747A</a> Flexible self-regulating heating pad combination and associated method.</p>
<p>The first one uses two separate tubes, the second has a 3 wire tube as in your photo and is possibly what yours is based on.</p>
<p>As far as I understand it from a quick browse of the patents it appears that the circuit is balanced and if one leg of the heating coil open circuits the tube breaks down, drawing enough current to blow the fuse.</p>
| <p>I'm trying to figure out what the glass component on the PCB is. Maybe some sort of vacuum tube? Maybe a triac? It's got three leads, and appears to have three parallel electrodes inside the glass bulb.</p>
<p>This is from a 70s/80s heated blanket. One outer leg is connected directly to +120VAC, the other leg is connected to huge (inch-long) resistor that is in turn connected to the other -120VAC. The center leg connects to resistors that in turn connect to the heating elements of the heated blanket. The other end of those heating elements are directly connected to +V and -V.</p>
<p>Pictures of the front, back, and annotated PCB.</p>
<p>Long story short, this blanket used to pull 100W from the wall and now only pulls 25W. This is the only part of the blanket with any electronics so I'm curious what's worn out.</p>
<p>Any advice is welcome!</p>
<p><a href="https://i.stack.imgur.com/SlFOT.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SlFOT.jpg" alt="front" /></a></p>
<p><a href="https://i.stack.imgur.com/yNlkw.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yNlkw.jpg" alt="back" /></a></p>
<p><a href="https://i.stack.imgur.com/LeBU3.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/LeBU3.jpg" alt="annotated" /></a></p>
| What is this glass bulb containing three parallel electrodes? | 2024-01-28T22:05:50.073 |
699287 | |microcontroller|audio| | <p>You have a power distribution problem. Example 5V source reference is ground but all devices using 5V are referred to DGND. Using a single point ground (I can't find it on the diagram) in this way places trace inductance between the 5V source GND and DGND causing considerable ground bounce. The same is true for the analog ground. You should use a pristine ground plane connecting all grounds to the plane. I'm guessing that the individual current loops are very large thus enhancing interference.</p>
<p>Solving this problem with the information provided cannot be definitive.</p>
<p>Number one rule for board layout is,"Keep the area of all current loops as small as possible."</p>
| <p>My circuit has a digital and an audio part. The audio part is quiet when the uC is connected via USB to a PC, and a bit noisier when they're disconnected. What is the PC doing to reduce the noise, and can I replicate the effect when disconnected? (I've tried using the black (GND) USB wire to ground the uC - that's not it.)</p>
<p>The noise sounds similar to a 12" wooden ruler being twanged on a wooden desk, when about 2" of the ruler is being held onto the desk. It's a rumbley kind of sound. Not sharp.</p>
<p>Here's a photo of the noise when not connected to the PC - each pass across the screen is about half a second.</p>
<p><a href="https://i.stack.imgur.com/HVW3v.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HVW3v.jpg" alt="noisy scope trace" /></a></p>
<p>Here's what it looks like when the PC is connected.</p>
<p><a href="https://i.stack.imgur.com/bqFF0.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bqFF0.jpg" alt="quiet scope trace" /></a></p>
<p>The digital part has these components:</p>
<ul>
<li>Microcontroller with two true analog outs, which drive</li>
<li>Two voltage follower op amps, driving</li>
<li>LEDs in two NSL32 photocells, the LDRs of which are part of the audio circuit</li>
</ul>
<p>The analog circuit has these components:</p>
<ul>
<li>Op amp input buffer</li>
<li>Volume attenuation using NSL32s' LDRs to form a potentiometer</li>
<li>Op amp output buffer</li>
</ul>
<p>The Whole thing is supplied by a single-ended 9V supply, smoothed with a 470uF electrolytic capacitor. The supply for the uC is derived using 5V regulator.</p>
<p>The first thing the supply sees is a reverse-voltage protection circuit, then the 470uF.</p>
<p>There's a bit of redundancy built in in case parts aren't available. Also, DGND and GND meet at a single point on the PCB right next to where the 9V supply reaches the board, the idea being that digital ground currents flow directly into the power supply, and don't take a detour around the audio circuit. I'm a complete noob, though, so this measure might only make sense in my imagination.</p>
<p>The power supply is a switched-mode supply (1-Spot CS7), designed for guitar effects, such as my circuit. I don't know the inner workings, but I used my multimeter to establish that there is high resistance between the mains plug's earth pin and the negative of the 9V, which connects directly to GND and DGND.</p>
<p>Things I've tried:</p>
<ul>
<li>Using a power-only USB cable to connect uC to PC. This reduces the noise to the same extent as a data+power USB cable.</li>
<li>Using a powerbank instead of the PC. This gives no noise reduction.</li>
<li>Placing an extra 470uF across the power terminals of the uC. This gives no noise reduction.</li>
<li>Connecting either the black (GND) wire or the shield (I used the metal casing of the USB plug) from a USB cable connected to the PC to the ground plane of the circuit. This made no difference to the noise level.</li>
<li>Connecting the uC to the PC using a USB cable that has only two conductors, and is broken in the middle so that I can reconnect the conductors using crocodile clips. When both conductors are connected, the noise is reduced. When only one conductor is connected, the noise level is not reduced.</li>
<li>Disconnecting the mains power supply from my PC (it's a laptop) and running it on battery power. This makes no difference to the behaviours above, so I deduce that the earthing of the PC has nothing to do with the noise reduction.</li>
</ul>
<p>Here's what the two conductor arrangement looks like:</p>
<p><a href="https://i.stack.imgur.com/nLwEX.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/nLwEX.jpg" alt="two conductor arrangement" /></a></p>
<p>The white USB cable is plugged into a black extension cable which runs inside the enclosure to the uC.</p>
<p><a href="https://i.stack.imgur.com/IBH2v.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/IBH2v.png" alt="complete circuit diagram" /></a></p>
<p>Here's the board layout of the ground planes (blue is copper). The highlighted one is GND, the other being DGND. They are connected at the extreme left end of the GND area, via two header pins which straddle the gap, or via an oval shaped solder bridge just to the right of that. The two audio op amp bits are over on the right hand side where the cluster of vias is.</p>
<p><a href="https://i.stack.imgur.com/V4RDl.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/V4RDl.png" alt="ground plane layout" /></a></p>
| Likely source of noise, given circuit is quieter connected to a PC? | 2024-01-29T06:21:09.330 |
699307 | |circuit-analysis|circuit-design|comparator| | <p>There are three common output configurations for comparators:</p>
<p><img src="https://i.stack.imgur.com/0uM0k.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f0uM0k.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="noreferrer">CircuitLab</a></sup></p>
<p>The "push-pull" style output (used by the <a href="https://eu.mouser.com/datasheet/2/609/MAX900_MAX903-3131333.pdf" rel="noreferrer">MAX903</a>, for example), shown left, uses two transistors to connect the output pin either to <span class="math-container">\$V_{CC}\$</span> or <span class="math-container">\$V_{EE}\$</span>, and the user has no choice over what potentials can appear there, except in their choice of supply voltages.</p>
<p>The third style, on the right, is called "open collector", and uses a single transistor. Many comparators, such as the <a href="https://www.ti.com/lit/ds/symlink/lm393.pdf" rel="noreferrer">LM393</a>, employ this technique. That transistor's emitter is tied to the negative supply, and when the transistor is switched on, the output is effectively connected directly to <span class="math-container">\$V_{EE}\$</span>, and adopts that potential.</p>
<p>When the transistor is switched off, though, the output is completely isolated from anything inside the IC, including <span class="math-container">\$V_{CC}\$</span>. That means the IC's positive supply cannot influence output potential. It's up to you to decide, in that condition, how the potential of that output should be set, and most commonly a resistance between OUT and <span class="math-container">\$V_{CC}\$</span> is used to gently coerce output potential to <span class="math-container">\$V_{CC}\$</span>. The "pull-up" resistor in your design is doing something similar; setting output potential to +3.3V (instead of +18V) in the absence of the IC's internal transistor tying it to ground.</p>
<p>The LM311 output is actually pictured above in the middle. Like the open-collector design, there's a single transistor, but that transistor's emitter is also unconnected. In your design, that emitter (IC pin 1) is tied to ground, making it behave exactly like the open collector design. However, you could configure the transistor as an emitter follower, if you wished. The LM311 is a little more flexible in this respect, but your design is employing the usual grounded emitter, open-collector setup.</p>
| <p>This is the circuit of a GND detection probe that is a part of a PCB under production so it's supposed to be tested and it works:</p>
<p><a href="https://i.stack.imgur.com/hn5j9.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hn5j9.png" alt="ground/voltage detector scheme" /></a></p>
<p>The PINPROBE line is a track connected to the pin of a STM32F103xx microcontroller, configured as a digital input, reading binary values. The comparator is an <a href="https://www.st.com/content/ccc/resource/technical/document/datasheet/2d/22/50/0e/7e/39/43/64/CD00001072.pdf/files/CD00001072.pdf/jcr:content/translations/en.CD00001072.pdf" rel="nofollow noreferrer">LM311D device</a>.</p>
<p>What I see on this circuit is:</p>
<ul>
<li>Non-inverted input is a voltage divider node, in a way that Vref = 14.8V.</li>
<li>The non-inverted input is viewing 18V from source supply, when Vx input is an open circuit (high impedance.) Actually there will be a little current due the BAT54 leakage current, but the non-inverted will still viewing values very close to 18V.</li>
<li>The non-inverted input is connected to any load, it will see a voltage divider that will depend on the load connected (resistor and voltage values.)</li>
<li>If values close to GND are connected to the pin probe (Vx node) the voltage divider will result in 9V at non-inverted input.</li>
<li>The comparator output has a resistor connected to 3.3V to pull this line up as a kind of "conversion" configuration (I don't know if it is the real intention but I guess this.)</li>
</ul>
<p>When the comparison between reference and input makes the comparator output be 0V, PINPROBE line will also put 0V on microcontroller GPIO pin. What happens when the comparaison makes thecomparator output be 18V on this line? I don't see how Rpull up is helping to convert 18V to 3.3V.</p>
| How does the resistor on the LM311 comparator output work? | 2024-01-29T13:10:24.283 |
699308 | |transistors|mosfet|dac|conversion|scaling| | <blockquote>
<p>I need to scale a DAC voltage which is ranging from 0-5V to a voltage ranging from 3.8-4.2V to control the gate of a mosfet in its linear region.</p>
</blockquote>
<p>For a given MOSFET design (i.e. unique part number), different individual MOSFETs may easily have threshold voltages that vary by a factor of 2 to 1 or more. That is, one MOSFET may have a threshold voltage of 2 V, while another MOSFET of the same type has a threshold voltage of 4 V. The threshold voltage of a MOSFET is a key parameter in determining the MOSFET <span class="math-container">\$V_{GS}\$</span> vs <span class="math-container">\$I_D\$</span> characteristics.</p>
<p>Therefore, designing your circuit to under the assumption that you want to operate the MOSFET with the gate voltage to be between 3.8 and 4.2 V seems risky at best. Unless there is more to the story that I am unfamiliar with, this would not be a good design decision.</p>
<blockquote>
<p>I want the 0-5V range from the DAC to linearly correspond to a voltage from 3.8-4.2V to reduce the needed resolution in regards of the DAC.</p>
</blockquote>
<p>Despite my recommendation against a designing for a range of 3.8 to 4.2 V, the question remains how would one implement such a linear transformation of voltages.</p>
<p>(TI has an appnote <a href="https://www.ti.com/lit/an/sloa097/sloa097.pdf" rel="nofollow noreferrer">Designing Gain and Offset in Thirty Seconds</a> which sometimes gives designs requiring negative resistors. The method I show here does not do that. The method in this answer is for circuits with positive gain less than 1, and positive level shift).</p>
<p>The change in input is 5 V, and the change in output is 0.4 volts. So the slope of the line relating input to output voltages is 0.4/5 = 0.08. This is a positive gain, but a gain of less than 1, i.e. an attenuation. If you have an appropriate reference voltage, <strong>AND</strong> the overall circuit is such that you can ignore loading effects, then you can implement a circuit that provides the specified transformation with 2 or 3 resistors. You can ignore loading effects if the output of the resistor network is connected to a high impedance load, and the input of the resistor network is connected to a low impedance source.</p>
<p>Since you intend to drive the gate of a MOSFET, the load will have a high enough impedance at low frequencies. If you wish it to have rapid responsiveness, loading may be an issue. Similarly, since a DAC is driving the resistor network, it may not be powerful enough to prevent loading effects especially at high frequencies. It might be prudent to use an amplifier even if the voltage transformation itself does not necessarily require it.</p>
<p>To determine the topology you need, you must first calculate several parameters</p>
<p><span class="math-container">$$m = \frac{\Delta V_{out}}{\Delta V_{in}}$$</span></p>
<p>is the gain of the transformation</p>
<p><span class="math-container">$$b = V_{out} |_{V_{in}=0}$$</span></p>
<p>is the value <span class="math-container">\$V_{out}\$</span> should have when <span class="math-container">\$V_{in}=0\$</span></p>
<p>The equation for the transformation is given by</p>
<p><span class="math-container">$$V_{out} = mV_{in} + b$$</span></p>
<p>The input-output cross-over voltage <span class="math-container">\$V_x\$</span> is the voltage which if applied to the input, gives the same voltage at the output. That is, <span class="math-container">\$V_x\$</span> satisfies</p>
<p><span class="math-container">$$V_x = mV_x + b$$</span></p>
<p>or</p>
<p><span class="math-container">$$V_x = \frac{b}{1-m}$$</span></p>
<p>In your particular case, the linear transformation that you wish to implement is</p>
<p><span class="math-container">$$V_{out} = 0.08V_{in} +3.8$$</span></p>
<p>So,</p>
<p><span class="math-container">$$V_x = \frac{3.8}{1-0.08} = \frac{95}{23} \approx 4.13 \text{V}$$</span></p>
<p>Note that for the transformation we are trying to implement, both <span class="math-container">\$m\$</span> and <span class="math-container">\$b\$</span> are positive, and <span class="math-container">\$m\lt 1\$</span> This will determine the choices we have available to implement this transformation.</p>
<hr />
<h2>Using <span class="math-container">\$\mathbf{V_x}\$</span> as a reference voltage</h2>
<p>If <span class="math-container">\$V_x\$</span> is available as a reference voltage, you can implement the transformation using two resistors plus optional unity gain buffers before and/or after the resistor network to mitigate loading effects.</p>
<p><img src="https://i.stack.imgur.com/De4p5.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fDe4p5.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The ratio of the resistors are</p>
<p><span class="math-container">$$R1 : R2 = (1-m) : m$$</span></p>
<p>Using a gain m of 0.08 and <span class="math-container">\$V_x = V_{ref} = 4.13\$</span> we arrive at the following resistor ratios:</p>
<p><span class="math-container">$$R1 : R2 = (1 - 0.08): 0.08 = 0.92 : 0.08 = 11.5 : 1$$</span></p>
<p><img src="https://i.stack.imgur.com/Pf5KR.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fPf5KR.png">simulate this circuit</a></sup></p>
<hr />
<h2>Using a reference voltage greater than <span class="math-container">\$\mathbf{V_x}\$</span></h2>
<p>If a reference voltage greater than <span class="math-container">\$V_x\$</span> is available, you can implement the transformation using a circuit similar to the previous one, only this time using three resistors plus optional unity gain buffers before and/or after the resistor network to mitigate loading effects.</p>
<p><img src="https://i.stack.imgur.com/PCu6J.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fPCu6J.png">simulate this circuit</a></sup></p>
<p>The ratio of the resistors are</p>
<p><span class="math-container">$$R1 : R2 : R3 = \left(\left(\frac{1}{m}-1\right)\frac{V_x}{V_{ref}}\right) : 1 : \frac{V_x}{V_{ref}-V_x}$$</span></p>
<p>Using a gain m = 0.08, <span class="math-container">\$V_{ref} =\$</span> 5 V and <span class="math-container">\$V_x =95/23\$</span> V, we calculate the following resistor ratios</p>
<p><span class="math-container">$$R1 : R2 : R3 = 11.5\times\frac{95}{23}\frac{1}{5}:1:\frac{\frac{95}{23}}{\frac{20}{23}}$$</span></p>
<p><span class="math-container">$$R1 : R2 : R3 = \frac{19}{2}:1:\frac{19}{4}$$</span></p>
<p><span class="math-container">$$R1 : R2 : R3 = 38 : 4 : 19$$</span></p>
<p><img src="https://i.stack.imgur.com/Qnesv.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fQnesv.png">simulate this circuit</a></sup></p>
<hr />
<h2>Using a reference voltage less than <span class="math-container">\$\mathbf{V_x}\$</span></h2>
<p>If you want to use a reference voltage of, say 1.25 V or 2.5 V, which is less than the <span class="math-container">\$V_x\$</span> of 4.13 V, then you may use a circuit with the following topology.</p>
<p><img src="https://i.stack.imgur.com/8TkuN.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f8TkuN.png">simulate this circuit</a></sup></p>
<p><strong>In this case, the resistor ratios are given by</strong></p>
<p><strong><span class="math-container">$$\mathbf{R1:R2 = b: mV_{ref}}$$</span></strong></p>
<p><strong><span class="math-container">$$\mathbf{R3:R4 = 1:mk-1}$$</span></strong></p>
<p><strong>where</strong></p>
<p><strong><span class="math-container">$$\mathbf{k = 1 + \frac{R1}{R2}}$$</span></strong></p>
<p>For a gain m of 0.08, a b value of 3.8 V, and a <span class="math-container">\$V_{ref} = \$</span>2.5 V, resistor ratios are calculated as follows:</p>
<p><span class="math-container">$$R1:R2 = 3.8:(2.5)(0.08) = 3.8:0.4 = 19:1$$</span></p>
<p><span class="math-container">$$k = \frac{R1}{R2} +1 = 20$$</span></p>
<p><span class="math-container">$$R3:R4 = 1: mk-1 = 5:3 $$</span></p>
<p>Here is a completed circuit.</p>
<p><img src="https://i.stack.imgur.com/zkNgT.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fzkNgT.png">simulate this circuit</a></sup></p>
| <p>I need to scale a DAC voltage which is ranging from 0-5V to a voltage ranging from 3.8-4.2V to control the gate of a mosfet in its linear region. I want the 0-5V range from the DAC to linearly correspond to a voltage from 3.8-4.2V to reduce the needed resolution in regards of the DAC.</p>
<p>Which circuit can be used to do so?</p>
<p>EDIT:</p>
<p>I've found the following which can be helpful for other meeting similar problems.</p>
<p><a href="https://e2e.ti.com/blogs_/archives/b/thesignal/posts/handy-gadgets" rel="nofollow noreferrer">https://e2e.ti.com/blogs_/archives/b/thesignal/posts/handy-gadgets</a></p>
| Scaling DAC voltage to smaller range for controlling gate of transistor | 2024-01-29T13:19:29.340 |
699318 | |raspberry-pi|c|atmega328p| | <p>Thanks to the other answer that pastes the data sheet, the problem is now clear why clearing or setting bits individually to TWCR register did not work.</p>
<p>The TWINT bit will be set to logic 1 when TWI hardware has finished the current job and is waiting for software response.</p>
<p>The TWINT bit is used to start the next operation by clearing the bit to logic 0, but it is cleared by writing a logic 1 to this bit in the TWCR register.</p>
<p>So when you tried to set or clear any of the other bits, the TWCR register sees a read-modify-write sequence.</p>
<p>And it means that since the TWINT bit is high when reading, and you did not modify it, it is written back as high, telling the TWI hardware to continue with the next operation.</p>
<p>But since not all control bits were properly set before TWI hardware was told to start, and control bits are set after during the operation, the outcome of the operation will be wrong.</p>
| <p>I am communicating with I2C/TWI between a MCU (<a href="https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-7810-Automotive-Microcontrollers-ATmega328P_Datasheet.pdf" rel="nofollow noreferrer">Atmega328p</a>) as Slave receiver and the raspberry pi 5 as master transmitter. I2C is at 100kHz configuration (the slower the Rpi5 can go).</p>
<p>I have an issue when, if my MCU after it receives the transmitted byte and replies with ACK , it looks like it shifts the whole received byte by 1 bit to the left. Example: 0xFF (11111111) is sent, the MCU receives 0xFE (11111110).</p>
<p>If, after the MCU receives a byte, responds with NACK, the MCU reads the byte as normal, I do not face any issue using NACK. And I cannot understand why is that.</p>
<p>I looked at it on the oscilloscope. 0xFF is sent from the PI, and the two plots are:</p>
<p>When NACK returned from the MCU:<br />
<a href="https://i.stack.imgur.com/ekf7H.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ekf7H.jpg" alt="Nack Returned" /></a></p>
<p>When ACK returned from the MCU:<br />
<a href="https://i.stack.imgur.com/KwYVq.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KwYVq.jpg" alt="ACK returned" /></a></p>
<p>Plots look fine and since this is the only issue with the I2C bus, makes me believe that the MCU's firmware is not correct.</p>
<p>Raspberry pi's software: (writes the data, shows error only when MCU replies with NACK, but data are send correctly as shown in the oscilloscope):</p>
<pre class="lang-c prettyprint-override"><code>#include <stdio.h>
#include <fcntl.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <linux/i2c-dev.h>
#include <stdint.h>
int main()
{
printf("make file\n\r");
int file;
printf("Make filename\n\r");
char filename[] = "/dev/i2c-1";
printf("Pick address\n\r");
int addr = 0x08; // Replace with your I2C device address
uint8_t buffer[1];
buffer[0]=0xFF;
printf("Open the I2C device file\n\r");
// Open the I2C device file
if ((file = open(filename, O_RDWR)) < 0) {
perror("Failed to open the I2C bus");
return 1;
}
printf("Set the I2C device address\n\r");
// Set the I2C device address
if (ioctl(file, I2C_SLAVE, addr) < 0) {
perror("Failed to acquire bus access and/or talk to slave");
return 1;
}
printf("Write data\n\r");
// Write data
// Example: Writing a single byte
if (write(file, buffer, 1) != 1) {
perror("Failed to write to the I2C bus");
return 1;
}
return 0;
}
</code></pre>
<p>MCU's I2C setup:</p>
<pre class="lang-c prettyprint-override"><code> BIT_SET(SREG, BIT(7));//Interrupt bit in SREG set
//slave
TWAR = 0B00010001;//Device’s Own Slave Address is 0x08 (0001000X), responds to general call(XXXXXX1)
BIT_CLEAR(TWCR, BIT(TWIE));//I2C Interrupt disable
BIT_CLEAR(TWCR, BIT(TWSTA));//Clear TWSTA to become slave
BIT_CLEAR(TWCR, BIT(TWSTO));//Stop condition disabled
BIT_SET(TWCR, BIT(TWEA));//acknowledge own address
BIT_SET(TWCR, BIT(TWEN));//TWI Enable
</code></pre>
<p>MCU's Main Loop (the "sw" function is serialWrite to the COM port of the MCU):</p>
<pre class="lang-c prettyprint-override"><code> /*After its own slave address and the write bit have been received, the TWINT Flag is set and a valid
status code can be read from TWSR*/
if (BIT_GET(TWCR, BIT(TWINT)))//if TWI interrupt flag is set
{
static uint8_t twStatus,receivedData;
twStatus = TWSR;//read the status
BIT_CLEAR(twStatus, BIT(0));//clear prescaler values
BIT_CLEAR(twStatus, BIT(1));
sw("TWSR status code is ",1);
swn(twStatus,16,0,1); //serialWrite the current status
sw(":->",1); //serialWrite
//Slave receiver
if (twStatus == 0x60)
{
sw("Own SLA+W received, ACK returned\n\r",1);
BIT_CLEAR(TWCR, BIT(TWSTA));
BIT_CLEAR(TWCR, BIT(TWSTO));
//Data byte will be received and ACK will be returned.
BIT_SET(TWCR, BIT(TWEA));
}
else if (twStatus == 0x80)
{
sw("Prev addressed with SLA+W, data received, ACK returned\n\r",1);
BIT_CLEAR(TWCR, BIT(TWSTA));
BIT_CLEAR(TWCR, BIT(TWSTO));
//Data byte will be received and ACK will be returned.
BIT_SET(TWCR, BIT(TWEA));
sw("Data: ",1);
receivedData = TWDR;
swn(receivedData,16,1,1);
sw("\n\r",1);
}
else if (twStatus == 0x88)
{
sw("Prev addressed with own SLA+W, data received, ACK returned\n\r",1);
//Switch to non addressed slave, Own SLA recognized.
BIT_CLEAR(TWCR, BIT(TWSTA));
BIT_CLEAR(TWCR, BIT(TWSTO));
BIT_SET(TWCR, BIT(TWEA));
//sw("Data: ",1);
receivedData = TWDR;
swn(receivedData,16,1,1);
sw("\n\r",1);
}
else if (twStatus == 0xA0)
{
sw("Stop or repeated start received while being slave.\n\r",1);
//Switch to non addressed slave, Own SLA recognized.
BIT_CLEAR(TWCR, BIT(TWSTA));
BIT_CLEAR(TWCR, BIT(TWSTO));
BIT_SET(TWCR, BIT(TWEA));
sw("Data: ",1);
receivedData = TWDR;
swn(receivedData,16,1,1);
sw("\n\r",1);
}
/*clearing this flag starts the operation of the TWI, so all accesses to the TWI Address Register (TWAR), TWI
Status Register (TWSR), and TWI Data Register (TWDR) must be complete before clearing this flag.*/
BIT_SET(TWCR, BIT(TWINT));//WRITE 1 to TWINT to clear it
</code></pre>
<p>And the serial output of the MCU is:</p>
<p>TWSR status code is 60:->Own SLA+W received, ACK returned</p>
<p>TWSR status code is 80:->Prev addressed with SLA+W, data received, ACK returned</p>
<p>Data: fe</p>
<p>Side note: Because my MCU uses 5V logic while the Pi uses 3.3V logic, I use <a href="https://www.ti.com/lit/ds/symlink/lsf0102.pdf?ts=1706517689166&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLSF0102" rel="nofollow noreferrer">LSF0102DCUR</a> to convert the 5V to 3.3V and vise versa. I was probing the side where the RPI is looking at on the above plots. The MCU's side is the same (no jittering or any funny business on the bus so I thought its not worth mentioning, I probe and leave the MCU's side (using ACK) below:</p>
<p><a href="https://i.stack.imgur.com/DKMxZ.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DKMxZ.jpg" alt="MCU's side, with ACK" /></a></p>
<p>Schematic/3D:</p>
<p><a href="https://i.stack.imgur.com/Q2Xmv.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Q2Xmv.jpg" alt="3.3V to 5V I2C" /></a></p>
<p>Layout (I tried to put all the components as close as possible):<br />
<a href="https://i.stack.imgur.com/1igHW.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1igHW.png" alt="I2C level shifter layout" /></a></p>
<p>Wiring:<br />
<a href="https://i.stack.imgur.com/KGhiF.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KGhiF.jpg" alt="I2C wiring" /></a></p>
| MCU slave receiver I2C shifts incoming data by one bit when replying with ACK | 2024-01-29T14:42:17.733 |
699328 | |current|nodal-analysis|mesh-analysis|superposition| | <p>The relationship between the dependent voltage source and the current must be maintained.</p>
<p>If you swap the arrow direction for the current <span class="math-container">\$i_x\$</span> you also have to swap the sign on the dependent voltage source, and then you'll get the same answer with the opposite sign. For example, the first result (open current source) will be -2A rather than +10A.</p>
<p>When the relationship of the dependent voltage source to current is changed, it's a different circuit, not just an arbitrary choice of arrow direction.</p>
| <p>Here is Example 5.3 from Hayt "Engineering Circuit Analysis" p 129. <a href="https://i.stack.imgur.com/ABi1I.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ABi1I.png" alt="enter image description here" /></a></p>
<p>I am supposed to solve it using superposition principle. While doing it I incorrectly assumed direction of <span class="math-container">\$i_x\$</span>. I assumed that arrow points from the right to the left. As far as I understand, my omission should not matter much. I am supposed to end up with answer of different sign, but the same magnitude. However, it did not happen, my solution below has completely different answer. I am staring at it for quite some time already, but cannot understand, why I obtained completely different solution.</p>
<p><strong>My solution:</strong></p>
<p>Since we use superposition principle, we do it in two steps. First step is to eliminate (open circuit) 3A current source. Everything related to this has <span class="math-container">\$'\$</span> sign to it. Second step is to short circuit 10 V voltage source. Everything related to the second step has <span class="math-container">\$''\$</span> sign to it.</p>
<p>Eliminating 3A source (open circuit). I ended up with the following equation (mesh approach):</p>
<p><span class="math-container">\$ 10 + 2 i^{'}_x + i^{'}_x - 2 i^{'}_x\$</span> = 0</p>
<p><span class="math-container">\$i^{'}_x = -10\$</span></p>
<p>Next we short circuit 10V source. Here I used node approach. First node is <span class="math-container">\$v^{''}_1\$</span> is at intersection of <span class="math-container">\$2 \Omega\$</span>, <span class="math-container">\$1 \Omega\$</span> resistors and 3A current source. Second node <span class="math-container">\$v^{''}_2\$</span> is at intersection of <span class="math-container">\$1 \Omega\$</span> and <span class="math-container">\$2 i^{''}_x\$</span>. Finally reference node is at the very bottom. Here are my equations:</p>
<p><span class="math-container">\$3 - \frac{v^{''}_1}{2}-\frac{v^{''}_1 - v^{''}_2}{1} = 0 \$</span></p>
<p>one can notice that <span class="math-container">\$ v^{''}_2 = 2 i^{''}_x\$</span> and <span class="math-container">\$\frac{v^{''}_{1}}{2} =i^{''}_{x}\$</span></p>
<p>Hence:</p>
<p><span class="math-container">\$i^{''}_{x} = 3\$</span></p>
<p>Adding two solutions we end up with <span class="math-container">\$i_x = -7A\$</span> as the answer</p>
<p><strong>Correct solution from Hayt.</strong></p>
<p>Elimination (open circuit) gives the following equation</p>
<p><span class="math-container">\$ -10 + 2 i^{'}_x + i^{'}_x + 2 i^{'}_x\$</span> = 0</p>
<p><span class="math-container">\$i^{'}_x = 2A\$</span></p>
<p>Short circuiting 10V voltage source gives the following equation</p>
<p><span class="math-container">\$\frac{v^{''}_1}{2}+\frac{v^{''}_1 - v^{''}_2}{1} = 3 \$</span></p>
<p><span class="math-container">\$v^{''}_2 = 2i^{''}_x\$</span></p>
<p><span class="math-container">\$v^{''}_1 = -2i^{''}_x\$</span></p>
<p>Solving gives <span class="math-container">\$i^{''}_x = -0.6A\$</span></p>
<p>Adding two solutions we end up with <span class="math-container">\$i^{}_x=1.4A\$</span></p>
| Incorrect current assumed in Hayt Ex 5.3 | 2024-01-29T17:26:17.723 |
699338 | |voltage|operational-amplifier|amplifier|circuit-design|photodiode| | <blockquote>
<p>I'd have to measure the <em>difference</em> in light intensity with 0.005% accuracy with both sensors [emphasis mine]</p>
</blockquote>
<p>The 0.005% accuracy sought generally requires thermostatic control of the photodiodes and the PCB, component selection and burn-in, cleanliness in PCB assembly, and lots of attention to detail in general. This is not a circuit that a beginner will have any chance at to the level you claim you need.</p>
<p>But I don't know whether you need this accuracy at all. 0.1% would be plenty already for many applications, and is more realistic. Don't assume you'll get any better than that without some significant R&D effort. To start with, you'll need to have UV light sources with intensity calibrated to this accuracy, or a calibrated measurement setup to measure each source's output. 0.005%-level changes can come from stuff so "innocent" as optical coatings changing their properties with temperature changes. It's <em>not</em> an easy problem, and requires metrology skills - whether pre-existing, or acquired on the job the hard way.</p>
<p>We're talking <strong>expensive</strong> equipment here. Anyone without a lab doing that as a consulting job would have to rent many $10k worth of equipment to pull it off to 0.005% absolute accuracy. Do you have access to all that? How will you quantify the performance of your circuit? Remember: you need to quantify sensor aging, temperature- and humidity-induced drift, and so on. Without an environmental chamber, or very well characterized parts, there's no way to claim that this will retain any better than a couple % absolute accuracy over say 5-50C temperature and 10%-90% humidity range.</p>
<hr />
<p>I usually try to avoid such problems by not having to deal with amplifying differential pair signals to begin with - if possible. What you're looking for is a differential photodiode circuit. It will inherently take a photocurrent difference, so you won't have to amplify the common mode signal, and the difference will be inherent in the design.</p>
<p>Something like below would be a reasonable starting point.</p>
<p><img src="https://i.stack.imgur.com/s6wP6.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fs6wP6.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="noreferrer">CircuitLab</a></sup></p>
<p>A circuit similar to the above is about what you can get while keeping things cheap and uncomplicated, using general purpose components.</p>
<p>Photodiodes D1 and D2 are in a differential connection. Op-amp OA1, through resistor R1, provides the differential current to balance the photodiode common point at 1/2 of the input common mode range. The output of OA1 is scaled 1V/μA of differential photodiode current.</p>
<p>Additional gain is provided by OA2, with the output being scaled 1V/100nA of differential photodiode current.</p>
<p>LMV358's input common mode range is from 0V to VCC-1V, so up to about 2.3V with 3.3V supply. The common mode voltage reference COM is at half of the input common mode range, so about 1.1V.</p>
<p>RV1 is used to null the offset current errors to bring the output within range.</p>
<p>If the circuit were to be powered from +5V, R3 would have to be adjusted so that there would be about 1.1V across it.</p>
<p>And no, you definitely do not want to use the circuit that "came with" the sensors. It just doesn't fit the application you have in mind.</p>
<p>The layout of this circuit is fairly critical, and a continuous ground plane is recommended on the bottom layer, with a cutout around the inverting OA1 node, as well as guard traces around the inverting node of OA1, on both sides of the board (and any internal layers). The guard should be around the common point of R1, C1, D1, D2, and R6. To make this easier, R6, R1, C1 should be at least 0805-sized parts, or even 1206, so that the guard trace will easily fit between the terminals.</p>
<p>Also remember that this is essentially a DC circuit. It will react to slow changes in differential photocurrent, and that's that. I'm not sure what your exact measurement setup is. It is certainly a good idea to have a differential measurement. But for that to work, D1 and D2 have to be very well thermally coupled. I'd install them perhaps in a line, and make the common node (OA1:-) a large chunk of copper to thermally bond the photodiodes as much as practical.</p>
<p>A large chunk of this circuit will have to be shielded, as indicated by the dashed line. Otherwise, it'll measure you waving a hand close to it in low humidity conditions about as well as it will measure minute changes in differential light levels.</p>
<p>The 2nd, unused op-amp from OA1 package should be connected as a voltage follower for the COM signal, its output otherwise unused.</p>
<p>OA2 should be a separate op-amp chip, otherwise you may get oscillation. Since LMV358 is a rather low-current part, the power supply for it can be well decoupled with an RC low-pass filter.</p>
| <p>I have 2 UV light sensors for detecting ozone gas with the circuitry uploaded in the picture. I don't fully understand how it works, but the signal output is the current going through the photodiode in µA multiplied by 4.3.</p>
<p><img src="https://i.stack.imgur.com/L0PME.png" alt="https://www.hestore.hu/prod_10039317.html" /></p>
<p><a href="https://www.hestore.hu/prod_10039317.html" rel="nofollow noreferrer">https://www.hestore.hu/prod_10039317.html</a></p>
<p>The base output will be somwhere around 0.5V.
Effectively I'd have to measure the difference in light intensity with 0.005% accuracy with both sensors. Their outputs are unfortunately not related to each other.</p>
<p>Is there any way I could relatively easily amplify that signal so that the 0.005% of the 0.5V (25µV) is at least in the mV range? That way my Teensy 4.0 microcontroller can process the data. (Note the signal is not a waveform.)</p>
<p>I am new to electronics and the most complicated thing I've made so far was an LED driver circuit with a MOSFET as a switch.</p>
| Amplifying microvolt difference between 2 constant analog signals (0-1V) | 2024-01-29T18:19:09.683 |
699348 | |power-electronics|induction-motor|gate-driving|thyristor|scr| | <blockquote>
<p>how do you keep the SCRs from turning off when you do not want them to?</p>
</blockquote>
<p>You don't. Once it is triggered, each SCR stays on for the remainder of its half-cycle. It turns itself off at the zero-crossing.</p>
<blockquote>
<p>Do controllers for these circuits typically send gate current pulses every single half-cycle to turn the SCRs back on?</p>
</blockquote>
<p>Yes.</p>
<blockquote>
<p>I was under the impression you send one "on signal" to both SCRs and they will stay on</p>
</blockquote>
<p>If you mean "stay on" as in remain conducting for multiple AC cycles - No.</p>
<blockquote>
<p>From what I understand the requirements to turn off the SCRS are fulfilled every half-cycle where the AC signal being passed is reverse biasing one of the SCRs. 1. The SCR will be reverse biased for 1/2 the period. 2. The current will drop below the holding current for the appropriate turn off time.</p>
</blockquote>
<p>Correct.</p>
<blockquote>
<p>before the next forward biased cycle you would have to send another gate pulse to turn on the SCR. So in order to keep both SCRs ON for when they need to conduct a pulse train of turn on signals would have to be applied to both SCRs at the frequency of the signal you are trying to pass and not just one signal at the start of operations.</p>
</blockquote>
<p>Correct.</p>
<blockquote>
<p>Can I just keep a constant gate turn on current going into the SCR from the gatedriver if I dont want to have to time pulses?</p>
</blockquote>
<p>Yes. Things change if you are using the SCRs in a dimmer or motor speed controller, where the gate turn-on voltage or pulse is delayed for a portion of the half-cycle to limit the energy to the device. For a simple on-off system such as a solid state relay, the gate voltage is derived from the AC waveform powering the load. Coming up from a zero-crossing, the SCR is turned on as soon as the input AC reaches the trigger voltage level, usually 2-3 V. Don't quote me on that number; check the datasheet for your device.</p>
| <p>If you are trying to pass an AC signal through antiparallel SCRs (there to isolate the signal when required) where the AC frequency is low enough to satisfy the turn-off time requirements during the reverse biased half-cycle for each SCR, how do you keep the SCRs from turning off when you do not want them to?</p>
<p>Do controllers for these circuits typically send gate current pulses every single half-cycle to turn the SCRs back on? For some reason I was under the impression you send one "on signal" to both SCRs and they will stay on until you power off the AC or use a turn-off commutation method, but I think I have been incorrect and was hoping if someone can clarify if I am on the correct track now on how this setup is operated.</p>
<p>From what I understand the requirements to turn off the SCRS are fulfilled every half-cycle where the AC signal being passed is reverse biasing one of the SCRs.</p>
<ol>
<li>The SCR will be reverse biased for 1/2 the period</li>
<li>The current will drop below the holding current for the appropriate turn off time.</li>
</ol>
<p>Due to the above I assume before the next forward biased cycle you would have to send another gate pulse to turn on the SCR. So in order to keep both SCRs ON for when they need to conduct a pulse train of turn on signals would have to be applied to both SCRs at the frequency of the signal you are trying to pass and not just one signal at the start of operations.</p>
<p>Follow up question: Can I just keep a constant gate turn on current going into the SCR from the gatedriver if I dont want to have to time pulses? Or will not letting the SCR turn off during the half-cycles it isn't used cause issues?</p>
| Turn on control of antiparallel SCRs to pass AC | 2024-01-29T19:47:05.813 |
699351 | |pcb-design|layout|flyback|snubber|current-sensing| | <p>The general rule for routing switching converters is to keep short connections and reduce areas in which high current circulates. The sense resistance will be inserted in a loop comprising the input capacitor, the transformer, the power switch and the sense resistance which is returning to the input capacitor. That loop has to be kept as short and compact as possible. See the illustration below which I drew a while ago while designing integrated controllers:</p>
<p><a href="https://i.stack.imgur.com/Q0Ei2.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Q0Ei2.png" alt="enter image description here" /></a></p>
<p>The sense signal, in essence, is of low-impedance but adding an <span class="math-container">\$RC\$</span> filter - which is recommended anyway - like <span class="math-container">\$R_{47}C_{34}\$</span>, can deteriorate the path. These elements must be routed very close to the controller with <span class="math-container">\$C_{34}\$</span> between the CS and GND pins of the controller. <span class="math-container">\$R_{47}\$</span> is next to it. The adopted values are wrong, usually <span class="math-container">\$R_{47}\$</span> should around 470 Ohms for instance and <span class="math-container">\$C_{34}\$</span> 100-220 pF, especially if the IC includes a leading-edge blanking (LEB) circuit. On the other hand, <span class="math-container">\$R_{43}\$</span> must be wired close to the MOSFET gate and I recommend you add a 22-kOhm resistance between the gate and source of the MOSFET. This is for safety in case there is a bad solder joint on the driver, you don't want to have the gate left floating.</p>
<p>Regarding the feedback, I can see they use an operational transconductance amplifier (OTA) but you can't really disable it because if you ground the FB pin, some comparator may trip a protection. You thus going to inject current across the 4.2-kOhm resistance as shown below:</p>
<p><a href="https://i.stack.imgur.com/OXPp0.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OXPp0.png" alt="enter image description here" /></a></p>
<p>This is quite an uncommon scheme as they seem to close the OTA loop as with an op-amp to make it a simple inverting follower: when the emitter of the optocoupler goes high, the OTA output will go down, reducing the duty ratio. Given the low current at play here, you see rather high-value resistances. Make sure to keep connections around these components short and place them close to the control circuit.</p>
<p>As a final remark, since it is your first flyback circuit, why not trying a good old UC384x that everybody knows and which is a robust controller. If you want to read more about the flyback converter, you can read my <a href="http://powersimtof.com/Downloads/PPTs/Chris%20Basso%20APEC%20seminar%202011.pdf" rel="nofollow noreferrer">APEC 2011</a> seminar that you can download from my <a href="http://powersimtof.com/Spice.htm" rel="nofollow noreferrer">webpage</a>. Good luck with your experiments!</p>
| <p>I am designing my first ever Flyback converter. The Fsw = 100kHz. Peak primary current = 3.26A.
The converter has to fit in a very small space, so I'm making a lot of compromises. For example, I could place the 'sense' resistor relatively far away from the IC.
How much of a problem is this? I used the 'kelvin' method for the wiring.
And I could place the snubber network on the bottom side.
My biggest problem is with the sense wiring, I'm afraid of malfunction.
What are your suggestions?</p>
<p>Here some pictures of the design:</p>
<p><a href="https://i.stack.imgur.com/aJsry.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/aJsry.png" alt="enter image description here" /></a></p>
<p>TOP:
<a href="https://i.stack.imgur.com/L4UOV.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/L4UOV.png" alt="enter image description here" /></a></p>
<p>BOTTOM:
<a href="https://i.stack.imgur.com/1vp6E.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1vp6E.png" alt="enter image description here" /></a>
TOP:
<a href="https://i.stack.imgur.com/ncldP.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ncldP.png" alt="enter image description here" /></a>
BOTTOM:
<a href="https://i.stack.imgur.com/PvA9q.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/PvA9q.png" alt="enter image description here" /></a></p>
<p>EDIT:</p>
<p>I redesigned the layout. The N-FET is on the bottom side, close to the IC, and i added a gate pull down resistor to it.The sense line has become shorter.</p>
<p><a href="https://i.stack.imgur.com/g4K98.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/g4K98.png" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/E5Qak.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/E5Qak.png" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/SFnRX.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SFnRX.png" alt="enter image description here" /></a></p>
| Flyback converter sense resistor placement and wiring | 2024-01-29T20:18:29.397 |
699366 | |pcb|diodes| | <p>Diodes uses these numbers/letters to designate product packing:</p>
<p><a href="https://www.diodes.com/design/support/frequently-asked-questions/#faq-679" rel="nofollow noreferrer">https://www.diodes.com/design/support/frequently-asked-questions/#faq-679</a></p>
<blockquote>
<blockquote>
<p>When suffixes are appended to part numbers, what do they signify?</p>
</blockquote>
<p>At Diodes Incorporated, dash numbers / letters are appended to our product part numbers (example: ZMM5250B-7) to indicate package type and reel size, as listed below.</p>
<p>A = Ammo Pack <br />
B = Bulk Packaging <br />
T = Tape & Reel <br />
U = Tube Packaging <br />
7 = 7-inch Reel <br />
13 = 13-inch Reel <br />
F = Pb Free or Pb Free Lead Finish (as noted on associated data sheets) <br />
L = (Analog) Pb Free <br />
G = (Analog) Pb Free and Green <br />
TA, TC = Refers to the tape and reel option of the part. Note: These suffixes are not shown on our Data Sheets and other marketing materials. They are not needed for part number searches on our website.</p>
</blockquote>
<p>The base part number is just that, the base; it isn't orderable directly from Diodes, Inc. that way. Whether distributors or CMs (contract manufacturers) use the same terminology in their catalogs, or honor it for sake of consistency, or ignore it for sake of universality, is up to them. (CMs generally shy away from substituting inexact part numbers, as manufacturers use all manner of codes (and sometimes none at all!) to denote revisions both major and minor, as well as more mundane differences like packing.)</p>
<p>Other manufacturers have other numbering schemes, of course.</p>
| <p>I have a BOM that I am supposed to model, but I don't see any available footprint for these diodes that I am coming across. Funny thing is they all are available with the xxx-13-F after the manufacturer identifier.</p>
<p>The component listed is the <a href="https://www.diodes.com/part/view/SMAJ58A" rel="nofollow noreferrer">SMAJ58A</a>, the component I found is the <a href="https://www.digikey.com/en/products/detail/diodes-incorporated/smaj58a-13-f/1934273" rel="nofollow noreferrer">SMAJ58A-13-F</a>.</p>
<p>The components on their site list this as well. I am just confused.</p>
<p>Why not list SMAJ58A-13-F in the BOM? Would that mean use any variation?</p>
| Difference (if any) between SMAJ58A and SMAJ58A-13-F | 2024-01-29T22:12:58.610 |
699395 | |fpga|verilog|clock|hdl| | <p>First, apart from your basic question about calling a module repeatedly in Verilog, there are alot of mistakes in your code:</p>
<ol>
<li><code>address</code> is not being driven by any logic.</li>
<li><code>value1</code> is not declared anywhere in timing module.</li>
<li>lut_new module has <code>address</code> input but it is only 1-bit. you need to change it to 8-bit.</li>
<li>In lut_new module, you cannot define float points value as you have defined.</li>
</ol>
<p>Updated lut_new module:</p>
<pre><code>module lut_new(
input clk, rst,
input [7:0] address,
output reg [15:0] data
);
always @(posedge clk or negedge rst) begin
if (rst) begin
data <= 16'b0;
end
else begin
case(address)
8'b00000000: data <= 16'b0000000000000000;
8'b00000001: data <= 16'b0010100000000000; // Replace 0.4125 with its fixed-point representation
8'b00000010: data <= 16'b0101000000000000; // Replace 0.825 with its fixed-point representation
// Add other cases for each address
// ...
default: data <= 16'b0; // Default case if address is not matched
endcase
end
end
endmodule
</code></pre>
<p>Secondly, Yes, this is correct that a module cannot be called within an always block.
The solution is pretty simple. Just instantiate the module once (as you have already done) and periodically (as per requirement) keep changing the <code>address</code> register and, as a result, the corresponding <code>value</code> will be automatically updated after one clock cycle. Here is the updated code for the <code>timing</code> module:</p>
<pre><code>module timing(
input clk, rst,
output reg data,
output reg sync,
output reg oclk
);
reg [7:0] address = 8'b0;
reg [15:0] value;
lut_new ff1 (.clk(clk), .rst(rst), .address(address), .data(value));
reg [6:0] f = 7'b0;
reg x = 1'b0;
reg [6:0] count = 7'b0;
always @(posedge clk or negedge rst) begin
if (rst) begin
count <= 1'b0; sync <= 1'b0; data <= 1'b0; oclk <= 1'b0; f <= 7'b0;
end
else begin
case(count)
7'b0000000: begin
oclk <= 1;
count <= count + 1;
sync <= 1;
f <= count + 4;
data <= 0;
end
7'b0000001: begin
oclk <= 1;
count <= count + 1;
sync <= 1;
f <= f/4;
data <= 0;
end
7'b0000010: begin
oclk <= 0;
count <= count + 1;
sync <= 1;
f <= f - 1;
end
7'b0000011: begin
oclk <= 0;
count <= count + 1;
sync <= 1;
end
7'b0000100: begin
oclk <= 1;
count <= count + 1;
sync <= 0;
data <= x ? value[f] : value1[f];
f <= count + 4;
end
7'b0000101: begin
oclk <= 1;
count <= count + 1;
sync <= 0;
f <= f/4;
end
// Other cases...
7'b1000100: begin
oclk <= 1;
count <= 7'b0000001;
sync <= 1;
data <= 0;
x <= ~x;
address <= address + 1; // Increment address for the next cycle
end
endcase
end
end
endmodule
</code></pre>
| <p>What I intend to do is basically cycle through a LUT created in a second module, by instantiating it in the first. Additionally, I need to call the instantiation in sync with the clock.</p>
<p>The basic idea is this following LUT:</p>
<pre><code>module lut_new(
input clk, rst, address,
output reg [15:0] data
);
always @(posedge clk or negedge rst) begin
if(rst) begin data<=0; end
else begin
case(address)
8'b00000000: data<=16'b0000000000000000;
8'b00000001: data<=0.4125;
8'b00000010: data<=0.825;
8'b00000011: data<=1.2375;
8'b00000100: data<=1.65;
8'b00000101: data<=2.0625;
8'b00000110: data<=2.475;
8'b00000111: data<=2.8875;
endcase
end
end
endmodule
</code></pre>
<p>I need to call it to get the data individually for each address. The top module is basically displaying this data into the output serially. Now what I can do is output it serially, not an issue.</p>
<p>My problem:
I want to cycle through the LUT with the help of clock, but I cannot call a module within the always block. How do I solve this issue?
More detail: The information is of 16 bits, so I need to send each value bit by bit, and then after each transmission is over, after a short span of time (predefined), I wish to move to the next address. Also, I am using a clock divider for output too.</p>
<p>Following is part of the top module:</p>
<pre><code>module timing(
input clk, rst,
output reg data,
output reg sync,
output reg oclk
);
reg [6:0]f =0;
reg x=0;
reg [6:0] count = 7'b0;
reg [15:0] value;
reg [7:0] address=8'b0;
lut_new ff1 (clk, rst, address, value); // How do I call this in sync with clock.
always @(posedge clk or negedge rst) begin
if(rst) begin
count <=1'b0;
sync<=1'b0;
data<=1'b0;
oclk<=1'b0;
f<=1'b0;
end
else begin
case(count)
7'b0000000: begin oclk<=1; count<=count+1; sync<=1; f<=count+4; data<=0; end
7'b0000001: begin oclk<=1; count<=count+1; sync<=1; f<=f/4; data<=0; end
7'b0000010: begin oclk<=0; count<=count+1; sync<=1; f<=f-1; end
7'b0000011: begin oclk<=0; count<=count+1; sync<=1; end
7'b0000100: begin oclk<=1; count<=count+1; sync<=0; data<= x? value[f]: value1[f]; f<=count+4; end
7'b0000101: begin oclk<=1; count<=count+1; sync<=0; f<=f/4; end
.
.
.
7'b1000100: begin oclk<=1; count<=7'b0000001; sync<=1; data<=0; x<=~x;end
endcase
end
end
endmodule
</code></pre>
| How do I call a module repeatedly in Verilog, in sync with a clock? | 2024-01-30T04:41:05.913 |
699397 | |mosfet|mosfet-driver|led-driver| | <p>All MOSFETs have a "zero gate voltage" drain current, meaning that they leak a little current between drain and source even when <span class="math-container">\$V_{GS}=0\ \text{V}\$</span>.</p>
<p>For the DMN601, that could be as much as 1 μA, quoted on page 2 of the <a href="https://www.diodes.com/assets/Datasheets/DMN601K.pdf" rel="nofollow noreferrer">datasheet</a>. That doesn't sound like much, but through a diode (especially an LED) it's easily enough for that diode to develop many hundreds of millivolts. It may even glow visibly.</p>
<p>I believe this is why you don't see zero volts across the LED, when it's supposed to be off.</p>
<p>Luckily, the solution is simple - a resistor in parallel with the LED, to divert current around the LED. Its value should be chosen to develop a small voltage (say 100 mV) with a few microamps (say 10 μA) flowing. By Ohm's law:</p>
<p><span class="math-container">$$ R = \frac{V}{I} = \frac{100\ \text{mV}}{10\ \mathrm{\mu A}} = 10\ \mathrm{k\Omega} $$</span></p>
<p><img src="https://i.stack.imgur.com/DfhN7.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fDfhN7.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
| <p>This is the circuit I'm using to control a white LED with the MOSFET's gate connected to an output pin on the STM32:</p>
<p><a href="https://i.stack.imgur.com/5CYH4.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5CYH4.jpg" alt="enter image description here" /></a></p>
<p>This is the 5V power source:</p>
<p><a href="https://i.stack.imgur.com/EkF2e.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/EkF2e.jpg" alt="enter image description here" /></a></p>
<p>VIN is a single cell li-ion battery. The enable pin EN_5V is always set high by the STM32. I verified there's a steady 5V at the LED anode.</p>
<p>This is a snippet from the datasheet of the DMN601DMK MOSFET:</p>
<p><a href="https://i.stack.imgur.com/o04pi.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/o04pi.jpg" alt="enter image description here" /></a></p>
<p>I'm applying a 250 Hz 2.5V square wave (2 ms on, 2 ms off) to the gate at PB0.</p>
<p>The waveform at the gate (G2) is as expected:</p>
<p><a href="https://i.stack.imgur.com/X5f2n.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/X5f2n.png" alt="enter image description here" /></a></p>
<p>I verified the source (S2) is at 0V. However, during the gate low pulse, the waveform at the drain (D2) is close to 3V instead of the expected 5V:</p>
<p><a href="https://i.stack.imgur.com/vJYoM.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/vJYoM.png" alt="enter image description here" /></a></p>
<p>This explains why the LED isn't fully turning off during the low pulse of the gate- it was slowly decaying to 0V.</p>
<p>What could be the explanation?</p>
<p><strong>Update:</strong> following advice below, I added a 10k across the LED, and now the voltage at the LED cathode is 5V (instead of 3V) during the off cycle, indicating there's no voltage drop. The problem was MOSFET current leakage (Zero Gate Voltage Drain Current in the datasheet). The yellow waveform is a different signal that just shows when the LED is off- when the yellow waveform is high, the LED is off, and when the yellow waveform is low, the LED is on. The blue waveform is the voltage measured from ground to the LED cathode.
<a href="https://i.stack.imgur.com/5iVCj.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5iVCj.jpg" alt="enter image description here" /></a></p>
| MOSFET not fully turning off | 2024-01-30T04:59:14.483 |
699445 | |pcb|soldering| | <p>It is difficult to solder a component by hand when it is as big as its pads. For future projects you could increase the pad size on your base PCB to be able to solder with just a regular soldering iron. Make the pads large enough for a big bevel tip for sufficient heat transfer:</p>
<p><a href="https://i.stack.imgur.com/tyHoL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tyHoL.png" alt="enter image description here" /></a></p>
| <p>I have designed and then manufactured a a PCB that is basically a WiFi thermometer with MQTT capability. The PCB hosts several components, plus an 18650-type battery holder capable of holding 2 batteries and it <em>should</em> also host a 2S battery management system (BMS) for managing the batteries. The BMS is actually a "prefab" PCB such as <img src="https://img.joomcdn.net/926e2d5b29ad52b890e583ade1895c4ea329fb13_original.jpeg" alt="this one" />.</p>
<p><a href="https://imgur.com/a/5IqMtlP" rel="nofollow noreferrer">Here is a picture</a> of my PCB (black) with the prefab 2S BMS PCB (blue).</p>
<p><strong>What do I need to do?</strong></p>
<p>I need to solder the blue PCB directly to the black one on the corresponding pads (B+ with B+, B- with B-, etc.,) but I am having some issues.</p>
<p><strong>What have I tried?</strong></p>
<p>Firstly, I have melted some soldering wire on the pads of the black PCB (B+, B-, BM, P+ and P-) then tried to solder the blue PCB to the black one with a "classic" soldering iron (bad idea.)
Secondly, I tried doing the same but used a hot-air gun for soldering (somewhat better results but very prone to damaging the components of the blue PCB or the tracks of the black PCB.)</p>
<p>In the end, I simply didn't install the prefab BMS.</p>
<ul>
<li>What would you recommend for successfully soldering the two PCBs together?</li>
<li>Do I need to resort to a SMD reflow oven or SMD hot plate?</li>
</ul>
<p>I have found a similar post (<a href="https://electronics.stackexchange.com/questions/35625/soldering-pcbs-directly-together">this one</a>), but it makes use of "castellated holes" (sort of) and thus it is of no use to me.</p>
<p>A couple of closing notes:</p>
<ul>
<li>Sorry for not posting the picture of my PCB directly on this post, I have received a server error from Stack Exchange side.</li>
<li>I know that the 2S-BMS PCB should be soldered with a spot-welder to nickel strips, but I didn't want to do so on my PCB.</li>
</ul>
| Soldering PCB to PCB - how | 2024-01-30T16:59:48.123 |
699454 | |power-supply|circuit-analysis|pic|icsp| | <p>The JDM PIC programmer by Jens D. Madsen is a "high voltage serial programmer" or HVPP. It is basically same as Ludipipo, Ludi's Pic Programmer, by Ludwig Catta.</p>
<p>It is intended to have a socket where you place the MCU to be programmed, it is not intended for having external connections for programming MCUs on PCBs, at least unless the PCB power supply is floating in respect to the PC so they don't share a ground.</p>
<p>The programmer uses the PC RS232 port which typically at the time used +/- 12V signaling for the data and handshake wires.</p>
<p>The PC GND is used as a positive MCU supply, as the RTS pin is set to negative to charge up C2 so the zener limits the MCU positive supply to about 5V. RTS will be clamped to about -6V by zener and diode. Toggling RTS between +/- 12V will pump up voltage to C1 which is the programming voltage reservoir cap, which will be limited to about 8V above MCU positive supply, or about 13V above MCU ground.</p>
<p>So the voltages are all relative. PC 0V is used as MCU positive 5.1V supply, to use PC negative -12V output as MCU 0V supply, which allows the PC positive +12V output to be used as the high voltage programming supply, about 13V above MCU 0V.</p>
<p>As the RS232 serial port outputs are not really intended to supply much power, the arrangement makes sure that the voltages are within the PIC requirements when load is applied and current is drawn from PC serial port data pins. The PC +12V will drop somewhat under load and which is why only +8V above PC 0V is needed because PC -12V is used to generate -5.1V as MCU ground.</p>
| <p>I am trying to build a JDM programmer for PIC. I looked at many circuit diagrams. During my analysis one thing I noted is that on most of the circuit diagrams the Vdd of PIC is connected to the GND of the serial port (pin 5). Can anyone clarify why it's connected like this?</p>
<p><a href="https://i.stack.imgur.com/cJUZH.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cJUZH.jpg" alt="enter image description here" /></a></p>
<p>This circuit is taken from: <a href="https://puranranablog.blogspot.com/2011/05/diy-pic-programmer.html" rel="nofollow noreferrer">Puran's Blog - [DIY]+[PIC Programmer]+[IC-Prog]</a>.</p>
| Why is Vdd connected to GND? | 2024-01-30T17:25:22.287 |
699458 | |current|transformer|dc-dc-converter|converter|winding| | <p>The forward converter belongs to the buck-derived family and it can be understood when looking at the below picture which is excerpted from my <a href="https://rads.stackoverflow.com/amzn/click/com/1949267512" rel="nofollow noreferrer" rel="nofollow noreferrer">book</a> on transfer functions:</p>
<p><a href="https://i.stack.imgur.com/hasRm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hasRm.png" alt="enter image description here" /></a></p>
<p>You can see that the transformer scales the input voltage by its turns ratio <span class="math-container">\$N\$</span> and drives a classic buck arrangement. Assuming a perfect transformer, when the power switch closes during the on-time or <span class="math-container">\$t_{on}\$</span>, the input voltage is applied across the primary side and appears at the secondary side, scaled by the turns ratio: <span class="math-container">\$D_1\$</span> conducts and <span class="math-container">\$L_1\$</span> is magnetizing with a slope equal to <span class="math-container">\$\frac{NV_{in}-V_{out}}{L_1}\$</span>. However, the transformer is not a perfect element. It can be represented in its very basic form as perfectly-coupled windings to which a primary or <em>magnetizing</em> inductance is added in the primary:</p>
<p><a href="https://i.stack.imgur.com/zLzj2.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zLzj2.png" alt="enter image description here" /></a></p>
<p>Therefore, when the power switch closes, you not only magnetize <span class="math-container">\$L_1\$</span> but also this magnetizing inductance <span class="math-container">\$L_m\$</span>. <span class="math-container">\$L_m\$</span> offers a way to model the core magnetization process and how the flux moves in the transformer magnetic material during the applied volt-seconds. During <span class="math-container">\$t_{on}\$</span>, the current in this inductance increases with a slope equal to <span class="math-container">\$S=\frac{V_{in}}{L_m}\$</span> and reaches a peak value when the switch turns off. In the transformer, the core flux density has reached also a peak value, well below the saturation level of course. Energy is stored in the magnetizing inductance but it does not participate to the power transfer.</p>
<p>When the switch opens, you will interrupt the current in the primary and secondary-side inductors, <span class="math-container">\$L_m\$</span> and <span class="math-container">\$L_1\$</span>. In the secondary side, <span class="math-container">\$D_1\$</span> will block and <span class="math-container">\$D_2\$</span> freewheels the current and ensures <span class="math-container">\$L_1\$</span> amp-turns continuity as in a buck. But in the primary side, if no precaution are taken, the primary-side voltage reverses and brings the drain to an extremely high value, limited in amplitude by the transistor breakdown voltage and the parasitic capacitance at the drain: destruction is almost guaranteed if no precaution are taken. You need to offer a path for this magnetizing current to circulate at the switch opening to that the magnetizing inductance is fully de-energized during this off-cycle. And this is important because energy stored in the magnetizing inductance implies a remanent flux in the core: at the next cycle, the flux density will no longer start from almost zero but from a pedestal, the remanent flux, and will go to a higher peak value. This process will continue cycle-by-cycle until saturation occurs:</p>
<p><a href="https://i.stack.imgur.com/uoRvw.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/uoRvw.png" alt="enter image description here" /></a></p>
<p>You thus must demagnetize the primary inductance before the next cycle takes place. This mandatory so-called <em>core reset</em> process has been the object of many structures to bring the most efficient and compact way to realize it (active clamp is one of them). The simplest approach is a tertiary winding, as shown in your circuit diagram. It is wired as in a flyback configuration: during the on-time, the diode <span class="math-container">\$D_3\$</span> is silent (reverse-biased) because of the dot arrangements between the primary and this extra winding. When the switch turns off, as the primary voltage reverses, this diode now conducts and clamps the voltage across the primary winding to <span class="math-container">\$-V_{in}\$</span> (there is usually a 1:1 turns ratio) and ensures demagnetization of <span class="math-container">\$L_m\$</span> down to 0 A.</p>
<p>This approach naturally limits the maximum duty ratio below 50%: if it takes say 4.5 µs to bring the magnetizing current to its peak by applying <span class="math-container">\$V_{in}\$</span> during <span class="math-container">\$t_{on}\$</span>, you realize that you will need the same 4.5 µs to bring the peak down to 0 A if you apply <span class="math-container">\$-V_{in}\$</span> across the inductance. If you push the duty ratio beyond this 50% limit - in practice designers or (PWM controllers) clamp the excursion to 45% for safety (insertion of a dead time DT) - then saturation can potentially occur with all bad consequences. This duty ratio limits restricts the usage of forward converters to narrow input voltage ranges. I mentioned the active-clamp forward and that is a way to extend the duty ratio dynamics beyond 50% allowing operations on a wider input range as in telecom applications. You could also change the tertiary winding ratio and allow more voltage on the drain at the switch opening. The below graph illustrates this phenomenon:</p>
<p><a href="https://i.stack.imgur.com/Oi4Ln.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Oi4Ln.png" alt="enter image description here" /></a></p>
<p>You can visualize these operating waveforms through simulations. If you download my free 120+ <a href="http://powersimtof.com/Downloads/Book/Christophe%20Basso%20SIMPLIS%20Collection.pdf" rel="nofollow noreferrer">ready-made templates</a>, you can check operations through the demo version of SIMPLIS and it is quick:</p>
<p><a href="https://i.stack.imgur.com/8Td2I.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8Td2I.png" alt="enter image description here" /></a></p>
<p>You see that during the off-time the drain voltage jumps to twice the input voltage (the primary is clamped to <span class="math-container">\$V_{in}\$</span> by the tertiary winding which now comes in series with the input rail when diode <span class="math-container">\$D_3\$</span> conducts). The primary current in the switch peaks to the output inductor current reflected to the primary side to which you add the peak magnetizing current:</p>
<p><a href="https://i.stack.imgur.com/bEFKH.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bEFKH.png" alt="enter image description here" /></a></p>
<p>In the above operating point, you see how the magnetizing current returns to zero during the off time. When it is zero, the diode from the tertiary winding blocks and the voltage at the drain returns to <span class="math-container">\$V_{in}\$</span>.</p>
<p>There are more things to say about the forward converter and I hope this small write-up will help you understand better how the forward operates.</p>
| <p>I'm trying to sketch the currents through each transformer winding of a forward converter. I also need to sketch the current through the source. I have a sketch of the current through the magnetizing inductor, Lm, and the inductor, Lx.</p>
<p>To sketch the currents through the primary, secondary, and tertiary windings, I need to determine the relationship between the windings.</p>
<p>As far as I can tell, the current in the primary winding is equal to the current in the secondary winding minus the current in the magnetizing inductor.</p>
<p>Additionally, I believe the current through the tertiary winding is equal to the negative current through the source.</p>
<p>I do have the ratio of coils, but I need instantaneous current, not average current.</p>
<p>I found these sketches in the book: <em>Power Electronics</em> (Hart, D. W. (2011), McGraw-Hill) but I don't know how to find the amplitude of the waveforms.</p>
<p><a href="https://i.stack.imgur.com/eCKLu.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/eCKLu.png" alt="unlabeled sketch of current in windings" /></a></p>
<p>A schematic of the forward converter:</p>
<p><a href="https://i.stack.imgur.com/NoFJp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/NoFJp.png" alt="schematic of forward converter" /></a></p>
<p>I'd appreciate any relevant formulas, or a break-down of the concepts behind the relationships between windings. I am new to the concepts, so I would appreciate basic terms.</p>
| What is the relationship between the windings in a forward converter? | 2024-01-30T18:05:43.357 |
699468 | |pcb-fabrication|aluminium| | <p>Sounds like they followed the standard fab steps according to your design.</p>
<p>The error, then, lies between the user and keyboard, as the saying goes. Not that blame does any good after the fact, but we can take a moment to understand what went wrong between expectation and reality.</p>
<p>I'm assuming you expected a board just like in FR-4, with insulated PTH (plated through hole), annular rings, and all that.</p>
<p>Basically, the catch is: FR-4 is an insulator, so it can simply be drilled, chemically activated, and plated. To do PTH on metal-core, additional hole-filling steps are required, and that adds process cost. It seems they do not do this in the process you ordered, and they substituted NPTH (simple drilled holes) instead.</p>
<p>Not so much that the holes are conductive inside, then; more that they were never intended to fit component leads. You would never be able to solder them in place, after all -- no plated 'barrel' to wick solder up the lead and support it.</p>
<p><strong>How could we figure this out beforehand?</strong></p>
<p>Look up the process and stackup at the manufacturer's website. If they don't document it, or you are left with questions: ask! Sales is generally responsive. If that's still not sufficient, keep shopping; there are hundreds of PCB manufacturers to choose from. Unfortunately, many don't document their process, or in enough detail to really design to on a first-time basis; maybe they make industry standards, but if one is not familiar with them, that isn't much help. (But, now you are familiar, with one example anyway!)</p>
<p>Mind, you may end up paying a premium for a well-defined fab process -- even if the result is fairly pedestrian, like the single-layer NPTH you received. Not that it's any help to a small-timer or hobbyist, but this is just the cost of business -- the reality is, a couple hundred bucks here or there is throw-away money when a corporation has multiple employees waiting around for parts to arrive. I've signed off on orders from $200 to $6000+ for PCBs and PCBAs -- and those are very much on the small, low-complexity end of things!</p>
<p><strong>What can you do with the fab?</strong></p>
<p>Well, now that you know what an example looks like -- and, the most common construction I've seen with these, is single-sided designs with surface-mount components. Typically for LEDs or power transistors, and few support components. Simple circuits/layouts that don't need a lot of (or any, hopefully) trace crossings -- with a single layer, you have to make do with jumper components ("zero ohm" resistors, usually), spending still more layout area and BOM cost. Very simple circuits like strings of LEDs avoid these costs.</p>
<p>And keep in mind, you can always split up the design. As long as you can get everything heat-dissipating on the metal-core board that needs it, and interface the rest elsewhere -- then you can always add headers or whatever, and attach a regular FR-4 board to it. This is a convenient way to handle the power, while still needing the complexity of, say, a microcontroller plus communications peripherals, something like that.</p>
<p><strong>What else is out there?</strong></p>
<p>Disclaimer, I've not surveyed the market, nor shopped or bought anything relevant here. I do see some hits, at least, for multilayer and PTH metal-core PCBs. How much cost these processes add, you'll have to get a quote to find out.</p>
<p>I wouldn't be shocked if such a build finds quotes from 10s to 1000s of USD, depending on where the manufacturer is, and what kind of process they're tooled up for -- costs come down rapidly with quantity, but if you aren't ordering at least hundreds at a time, to them you're basically doing a special one-off prototype order, and the setup time, masks and labor costs are dominant. Asian proto services can offer prices towards the low end of that scale, but might still hit the middle (or more) if it's more of a full-custom run for them.</p>
<p><strong>Designing</strong></p>
<p>As for how else to design what you've ordered -- offhand, it looks like some terminal blocks or other connectors, maybe a capacitor, polyfuse or MOV, transistors or headers, etc.</p>
<p>The connectors are the most ponderous to substitute: SMT is notorious for poor strength -- not that it's outright bad on typical materials, I would even say it's impressively good, considering it's resin-bonded foils and solder joints -- but connectors just expect <em>so much</em>, especially when a heavy cable has leverage against the poor connector (which is very likely the case for terminal blocks!). Possibly, you can find a similar type but which offers board-lock pins (plastic pins that lodge into NPTH (or PTH, doesn't matter) holes in the board), or that has ears which can be bolted down, etc. There are also types which panel-mount in the front, taking the bulk of connector stress off the board (but the board itself needs to be mounted well to the panel/enclosure to avoid stressing the solder joints!).</p>
<p>It's even an option to just tack-solder wires directly to the board, on wide SMT pads. This provides no strain relief whatsoever, of course, but it does invite the designer to find a solution to it: you might add holes or slots to snake wires or tie-wraps through; apply glue to anchor the wires; snap or screw the board into a bracket or enclosure that provides strain relief; etc.</p>
<p>If you are using transistors or other semiconductors, D(2)PAK, DFN-5x6 and other packages offer fantastic performance -- these are normally rather mediocre on fiberglass, with power dissipation ratings in the 1-10W being typical, but with the thin layer of insulation over a <em>freakin' solid chunk of metal</em> -- thermal performance can be quite excellent here, the board acting as a heat spreader, allowing heatsinks to be placed at some distance as well. I wouldn't want to be pushing multiple 10s of W from such devices anyway, but ~10W will be easy, and without any of the song-and-dance that you need on a fiberglass board (thermal vias, multilayer pours, etc.).</p>
<p>And for switching application, the board provides a dense ground plane, confining currents close to traces, minimizing stray inductance.</p>
<p>Other components can be substituted similarly. Of note, PTC fuses are <em>not</em> such an example, however: because they depend upon heating up to function, putting the generous heatsinking of an entire plate of metal underneath them will significantly raise trip current, and delay operation. (This is even a problem for fiberglass boards, where it can be desirable to avoid inner planes beneath PTCs.)</p>
<p>If you're inclined to object to SMT because of precision placement, or hard-to-see parts, I would say it's not as bad as you imagine it; just take it slow and feel out what you can do, what you can see, and where you need tools to help place things, or magnifiers or other vision assistance. (For my part, my eyes are still pretty good, but I regularly inspect things with a 10x loupe just because it's so much faster to look at things up close that way. I'll probably get one of those heads-up magnifier things one of these days; or maybe a desktop/overhead magnifier camera.)</p>
<p>Also, metal-core boards have the distinction of being nigh impossible to solder by iron. You will need preheating at least, and doing hot-air reflow soldering (whether with solder paste, or pre-tinning the pads and adding paste flux) just does everything in a single step. Be patient and wait for the board to come up to temperature; don't rush it or you'll burn components and flux.</p>
| <p>I've designed plenty of PCBs and had them manufactured using FR-4, but I had never worked with aluminum PCBs and I had been wanting to try it out. So in my latest order of some FR-4 boards, I added in a small design intended for high DC currents and possibly high temperature, so it seemed like a good opportunity to try out aluminum.</p>
<p>The board is a simple through-hole design with 4 separate nets.</p>
<p><a href="https://i.stack.imgur.com/F6jnv.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/F6jnv.png" alt="PCB layout" /></a></p>
<p>I received the bare boards and immediately tested conductivity between various points with a multimeter.</p>
<ul>
<li>Good: I found that the exposed pads of the copper do conduct within nets, and do not conduct to other nets.</li>
<li>Good: The back of the board visually appears to be bare aluminum, but it seems to be insulated and does not conduct.</li>
<li>Okay: The outer edges of the board do conduct across the entire board, but not to any of the exposed copper pads.</li>
<li>Okay: The inside of the NPTH through holes (turquoise color) do conduct across the entire board, but not to any of the exposed copper pads.</li>
<li>Bad: The inside of the PTH through holes (yellow color) are also conductive through the aluminum.</li>
</ul>
<p>Because the inside of each PTH is conductive across the entire aluminum board, it seems highly likely that the legs of components soldered to the board will brush up against the aluminum, therefore shorting across nets. This seems like it would be a problem.</p>
<p>Being new to aluminum PCBs, I'm not sure if the problem is with my design or with the manufacturing process. Any insight is welcome.</p>
| Aluminum PCB PTH conducts across the entire board | 2024-01-30T20:05:32.357 |
699476 | |mosfet|pcb| | <p>Yes, there are benefits. Whether you need to connect all of them for your specific application, no one excepted you can know (at least if you don't explain what you mean to do with this MOSFET).</p>
<p>What comes to mind right now :</p>
<ul>
<li>lower resistance in the pins. Your MOSFET has a quite low Rdson (ie low "on" resistance) : <100 mohms. It's low enough the resistance of individual pins (ie the metal part + solder joints) might start to matter</li>
<li>lower thermal resistance to the rest of the PCB (it's easier to transfer heat through 8 pins than through 3)</li>
<li>better mechanical resistance (ie better resistance to vibrations, shocks, ...)</li>
</ul>
| <p>On an N-channel MOSFET <a href="https://www.vishay.com/docs/71356/si4848dy.pdf" rel="nofollow noreferrer">(SI4848,)</a> is there any benefit or downside to connecting all relative pins together, like in the image, connect all drain together, all source together, etc.?</p>
<p><a href="https://i.stack.imgur.com/QAVEZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QAVEZ.png" alt="enter image description here" /></a></p>
| Beginner N-channel MOSFET question. Is there a benefit to connecting or floating extra pins? | 2024-01-30T20:43:31.070 |
699487 | |operational-amplifier|circuit-design|analog|laser| | <p>The whole circuit is a voltage-controlled current sink. Let's start by simplifying this circuit down:</p>
<p><img src="https://i.stack.imgur.com/fCYxQ.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2ffCYxQ.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>I believe this to be the bare minimum to perform the DC analysis. But first, let me justify why I eliminated components and why they're not important (for now):</p>
<ul>
<li>D1 just a dual protection diode to keep the input between the power rails</li>
<li>R7 and C1 form a low-pass filter for the soft-start. Presumably this is to supress laser output during turn-on transients. Not needed for analysis and the circuit functions without it.</li>
<li>R11 and C2 are actually needed in reality to stabilize the op-amp by adding a pole to compensate for the MOSFET gate capacitance. They also reduce the bandwidth to eliminate any overshoot that might damage the laser by setpoint step changes (the intent is an overdamped response as to not "spike" the laser). Again, R11 and C2 have nothing to do with the dc operating points.</li>
<li>C3 and C4 are just filtering caps to stabilize the power supply for the laser.</li>
<li>D2 - Protection diodes for protecting the actual laser diode.</li>
<li>R10 - voltage sample point to monitor current. This is likely for initial setup where a dummy load is placed where the real laser would go to set the gain resistors so the real laser doesn't get destroyed by careless gain setting.</li>
<li>R4, R5, and R8 change the overall gain, specifically, it will set a nominal transconductance range (A/V) based on a spreadsheet reference. R4 represents just one of the settings.</li>
</ul>
<p>So without going through every design detail (or the math unless requested by popular demand), the methodology is as follows:</p>
<p>The sense resistor first gets sized based on the largest current that the circuit will be assumed to handle. 1 ohm is used in this design implies absolute max current could be 5A (5V/1ohm). The reality is it's even less than that because the MOSFET drops negligible voltage (while saturated) and the forward voltage drop of the diode has to be considered. But 5 volts will be the upper limit anyway. So a MOSFET has to be chosen to handle this 5A current. Since we only have 5V rails the MOSFET will need a relatively low Vgs threshold voltage. This in contrast to SMPS where its common to slam the transistors back and forth between cutoff and saturation with gate voltages of 10-15V.</p>
<p>R9 is not that important. It helps isolate the capacitive loading of the MOSFET gate to the opamp output (op-amps don't like capacitive loads so R9 "tricks" the op-amp into thinking it's driving a resistive load (kind of). It adds stability at the expense of response time.</p>
<p>At this point, the power stage is understood. The transfer function is going to be 1V/A. In other words, the opamp is going to modulate the gate voltage in such a way that 1A will flow through the laser for every volt seen on the non-inverting input (pin 3).</p>
<p>With that information known, the front-end resistor network has to be tailored for the input signal range and to match the desired electrical laser characteristics of the laser knowing you are going to give the laser 1A/V of juice.</p>
<p>This procedure is as follows. The gain shall be set to zero. This results in R6 and R4, in parallel, pulling the non-inverting input to ground. So at gain zero, that's 2.13k.</p>
<p><img src="https://i.stack.imgur.com/sbnWD.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fsbnWD.png">simulate this circuit</a></sup></p>
<p>The offset pot does just that - it provides an offset that is "summed" with the input pot. The reason for this pot is bias some current through the laser to get it to operate within its linear operating regime so that modulating the input signal doesn't cause abrupt changes in laser output do this "crossover" region where the intensity is highly non-linear.</p>
<p>This "crossover" point is called the lasing threshold and it is defined as the minimum current need to stabilize the laser (strictly speaking, it's the point in which the gains equal the losses inside the laser resonator). What that means is any current below this current, no laser light is produced (maybe some dim pump energy).</p>
<p>So, you can set the offset pot to be either right below this point (if you need "no output" when your signal is zero) or, you can set it right above this point so that you can keep the laser operating in it's linear region the whole time. This will depend on what you are really trying to do.</p>
<p>The final thing to do, is apply the maximum input voltage that your upstream controller is expected to produce and turn the gain pot up until the laser is at it's max operating point (maybe a little less to be safe). If you "run out" of gain and the gain pot maxes out, your range setting resistor is too low of value. Repeat the setup from the offset pot using a high value "range setting" resistor.</p>
<p>The resistor array that you inquire about is just a fancy summing amplifier - it has selectable resistors instead of just one that you will typically see in "summing amplifier circuits". They just add flexibility for the user to use multiple lasers with different current requirements.</p>
<p>After all that is understood, you can put back the option soft start (R7 and C1), and the origin-pole R11 and C2 for stability. And of course the protection and filtering components.</p>
| <p>I'm working on an RGB show laser and currently am figuring out what to do for the laser drivers, as they need to be modulated with a 0-5 V analog signal. There are ones for purchase but are pretty expensive relative to the somewhat simple an inexpensive parts. <a href="http://www.die4laser.com/dvd-rec/Die4Drive_files/Die4DriveRev1-2.pdf" rel="nofollow noreferrer">Here</a> is a link to a pdf schematic of one of these.</p>
<p><a href="https://i.stack.imgur.com/P2eQ3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/P2eQ3.png" alt="enter image description here" /></a></p>
<p>I understand for the most part how it works. It uses a MOSFET in the linear region to control the output current, and uses an opamp and a sense resistor to control the gate voltage of the MOSFET. It has two potentiometers, one to control the maximum current limit and one to control the threshold current for the laser diode, so you can have 0 V input be just below laser emission, and 5 V at your maximum current.</p>
<p>I want to recreate this but I don't have the same exact MOSFET and opamp. I have similar ones on hand. I wanted to ask specifically how the opamp configuration works, and what the range setting resistors do. How can I use this to design my own version that suits my needs?</p>
| Replicating this analog laser diode driver | 2024-01-30T21:58:45.073 |
699489 | |switches|multiplexer|gpio|shift-register|keypad| | <p>Use an ADC with an R-2R ladder, which is also known as a "121 circuit". Click <a href="https://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgoqoQFMBaMMAKACdxiVwNDwxuYXlBBo47TtxQI%20YLjz5UxkCZkHC56xcnEdsCLaIyGqYeKuOiZRk6PMcALNkP7bZ3SFdW%20XoduUSTlLWQQoiAQAOIKF%20FAJh2CIqAOZxhgjxmkksqcyGeZLZAMqF0rLyuA4iEABmAIYANgDOdOE5dniekFVonc5UAywA7gndCYSdKiNlXT3W2BNQ7Sh4fWMrfWjFNt47ldUg9c2tSsOeC7PnPospnov7C5sDSyVeM177z0ctbSMOYD4xv9rpN2g4HGsquCnttQjNQp8RN8TqIWAAlcadMDgu6TEQOUzaAbQBBnWKPXYUqaU%204XKlnbB0xbA3FLAAe4EwojwECEPTwUNEVQAQgBLAAuKg5KCERmIokI-O4PRFEtY0uIfBW3GwTm5SBVIDF4pQLA52Cw3KoDhQ-MShuNDhYQA" rel="nofollow noreferrer">here for the simulation</a> (and live-toggle the switches); the schematic is below.</p>
<p>Add more bits as you see fit. With a 16V input and bit 0 and 1 are on, so 3V output. If your ADC is "ideal" then its binary measurement using its analog Vref (instead of 16V in this example) will equal the bits that are on. In reality there will be noise, so adjust as necessary. Maybe shift off the lower "noise" bits.</p>
<p><a href="https://i.stack.imgur.com/Knez7.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Knez7.png" alt="4-bit ADC" /></a></p>
<p>FYI, these are called "R/2R" ladders and parts like the <a href="https://www.bourns.com/pdfs/r2r.pdf" rel="nofollow noreferrer">Bournes
4610X-R2R-103LF</a> can be found at your favorite distributor. This is what the datasheet shows for the R2R version (which is an exact mirror of the "121" schematic above):</p>
<p><a href="https://i.stack.imgur.com/lxDRc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/lxDRc.png" alt="Bournes R2R Ladder" /></a></p>
<p>Just ground pin 10, measure pin 1, and switch the other pins on-and-off for your bits. <strong>Important:</strong> the "off" state must pull hard to ground or your analog measurement will be wrong...so SPDT's or some other mechanism is required.</p>
<p><a href="https://i.stack.imgur.com/3pPPj.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3pPPj.png" alt="Bournes R2R SIP" /></a></p>
| <p><a href="https://raspberrypi.stackexchange.com/a/62439/160235">This answer</a> gives a good explanation of how to use a keypad matrix to minimize GPIO usage by scanning rows and columns to find a button press when an interrupt triggers. This scales very nicely for large arrays of buttons---but what about when the button count is small? For example, a 4-button matrix still requires 4 GPIOs (2x2), so you might as well wire each button to its own GPIO.</p>
<p>In our case, we would like to wire up a 5-button (up/down/left/right/ok) keypad.</p>
<p><strong>Question:</strong></p>
<ul>
<li>What is the minimum number of GPIOs that are required to wire up 5 push-buttons, and what would the circuit look like?
<ul>
<li>Ideally without an add-on chip, but see below.</li>
<li>Detecting simultaneous button presses is not necessary.</li>
</ul>
</li>
</ul>
<p>(A clever circuit <strong>without</strong> an addon-chip is preferred, as we are trying to minimize BOM cost. However, some kind of multiplexer chip shift-latch-thing or whatever would be acceptable as part of an answer if it's inexpensive (<$0.50 in qty >=100). I would like to avoid more expensive (but otherwise perfect) i2c scanning chips <a href="https://www.ti.com/lit/gpn/tca8418e" rel="nofollow noreferrer">like this one</a>, but I'm open to an i2c solution if the cost is low.)</p>
<p>FYI: We're using an <a href="https://www.espressif.com/sites/default/files/documentation/esp32-c6-wroom-1_wroom-1u_datasheet_en.pdf" rel="nofollow noreferrer">ESP32-C6</a>.</p>
| What is the fewest number of GPIOs to read 5 push-buttons? | 2024-01-30T22:04:56.207 |
699508 | |audio| | <p>Passive filters are designed for certain signal source output series impedance and for certain load. Your 2nd filter is not a good load and it gets its input from a wrong kind of source. Get a single input 3 output crossover filter which is designed properly for your actual speaker elements AND your speaker cabinet.</p>
<p>The cabinet affects much what's the right filter design, because the electric behaviour of the speaker is not independent from the acoustics. Maybe you cannot see any relation, but also the current intake of rotating electric machines depends on the mechanical load. Linear motion machines like speaker elements do the same.</p>
<p>Today high end speaker manufacturers have separate amps for the elements which allows low power filters which can be made as analog opamp circuits or DSP programs. The filter can be as complex as needed without dissipating the audio power between the amp and the speaker element.</p>
<p>Making such designs is far from trivial. To make it successfully by yourself you need electroacoustic detail data of the speaker elements (not available for cheap webshop stuff), acoustics & electronics engineering (including math) knowledge and a bunch of good acoustics and electronics measuring instruments.</p>
<p>As already said by others: Pleasant sound for certain purposes is different thing than accurate sound reproduction. I have put together for a band some vocal reinforcement speaker cabinets which were based on guesses with no proper design. But they created just the wanted bright and loud sound, no matter they were total rubbish as hi-fi equipment.</p>
| <p>If you feed the high-frequency output of a passive audio crossover to another passive crossover, will the crossovers interfere with each other poorly in some way and produce unexpected results, or will it 'just work'?</p>
<p>For instance, if i have a 2-way passive crossover that separates the input around 80hz. If i feed its high-frequency output into another crossover that splits into tweeter/midrange frequencies, is that reasonable? Or is this only feasible if using a single 3-way crossover.</p>
| Connecting multiple audio crossovers | 2024-01-30T23:39:45.110 |
699530 | |switches|dpdt| | <p>The parentheses indicate a momentary position - if you move the switch to that position it will automatically return to the OFF position when you release it.</p>
<p>I would say that the handle of an ON-OFF-ON switch has three positions, while an ON-NONE/NULL-ON switch handle only has the two end positions - it has no center position.</p>
| <p>While shopping for momentary switches for a DIY project I'm working on, I've come across some descriptions I don't fully understand. These are all related to DPDT switches.</p>
<p>Examples:<br />
ON-OFF-(ON),<br />
(ON)-OFF-(ON),<br />
ON-OFF-ON,<br />
ON-NONE-ON,<br />
ON-NULL-ON</p>
<p>Can anyone explain the significance of the parentheses around "on" in the first two examples? Also, what is the difference between "off", "none", and "null" in the last three examples?</p>
<p>Thanks in advance for any information.</p>
| Deciphering descriptions for momentary switches | 2024-01-31T03:31:36.930 |
699540 | |stm32|ethernet|emc|emi-filtering|phy| | <p>32nd pin is the MII/RMII selector and RX_DV (Receive - Data Valid) pin.</p>
<p>The pin has a pull-down to make the default setting 0 (MII mode). If you tie the pin to VDD with a pull-up the mode will RMII. So first you should decide if you need to go for MII or RMII. I haven't checked the entire ethernet functionality of the MCU if it has both MII (25 MHz) and RMII (50 MHz) support, or MII by default. But it appears to be MII by default.</p>
<p>The corresponding pin on STM32F407 is <code>PA7</code> which has the <code>ETH_MII_RX_DV</code> alternate pin function. So the 32nd pin of the PHY goes to PA7 of the MCU.</p>
<p>Some other things that my eyes have caught:</p>
<ul>
<li>I don't see any clock connection. The PHY provides RX and TX clocks so those should be connected to the MCU's <code>PA1</code> and <code>PC3</code> pins, respectively. These pins appear to have the <code>MII_RX_CLK</code> and <code>MII_TX_CLK</code> alternate functions. Check the datasheet for details.</li>
<li>MII and RMII require synchronisation with either 25 MHz (MII) or 50 MHz (RMII). The clock can be generated by the MCU and supplied to the PHY's oscillator input pin(s). Check the MCU's MCO1 and MCO2 functionalities.</li>
<li>I see ferrite beads on the supply lines of the PHY. Be careful with using them as <a href="https://electronics.stackexchange.com/questions/558423/unplugging-ethernet-cable-leads-an-abnormal-power-supply-fail">you may end up with broken PHYs</a>.</li>
</ul>
| <p>I'm relatively new to Ethernet PHY design and currently working on a project where I've chosen the <a href="https://www.ti.com/lit/ds/symlink/dp83848q-q1.pdf" rel="nofollow noreferrer">DP83848QSQ</a>/NOPB PHY and plan to connect it to the STM32F407VET6 microcontroller.</p>
<p>However, I've encountered an issue where pin number 32 on the PHY doesn't seem to have a corresponding pin configuration on the STM32F407VET6. I'm uncertain if my design is correct and whether it will effectively function as intended.</p>
<p>My primary objectives are to ensure the functionality of this design and to subsequently pass EMC and EMI tests.</p>
<p>Could someone experienced in Ethernet PHY design and STM32 microcontrollers provide guidance on how to improve my design and address the pin configuration discrepancy? Any insights or recommendations would be greatly appreciated.</p>
<p>Thank you.</p>
<p><a href="https://i.stack.imgur.com/pIeG4.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pIeG4.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/oHeW9.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oHeW9.jpg" alt="PCB Design " /></a></p>
<p><a href="https://i.stack.imgur.com/mLK88.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/mLK88.jpg" alt="STM32F407VET6" /></a></p>
<p><a href="https://i.stack.imgur.com/3fcfE.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3fcfE.jpg" alt="A829-1A1T-91B RJ45" /></a></p>
| Ethernet PHY design query: Compatibility of DP83848QSQ/NOPB with STM32F407VET6 and pin configuration concerns | 2024-01-31T06:20:33.383 |
699551 | |power-supply|noise|oled| | <blockquote>
<p>Is the issue just that breadboards suck? 28 AWG jumpers too thin?</p>
</blockquote>
<p>They usually have rather high contact resistance, so yeah. Besides, resistance will change if you wiggle the wire or connect/disconnect, which means it's non-repeatable: this does not help with the kind of comparisons you're making with low value filter resistors...</p>
<p><strong>However</strong> if you expect it to be USB powered, it should be able to work with all the resistance from the cable, connectors, plus the output impedance of the USB port it's plugged into. So it should be designed to work with noisy 5V, and 100mV noise is definitely not out of spec, it should tolerate more, otherwise it will be picky about what 5V source you use with it.</p>
<p>So you have ADC noise issues. Possible causes:</p>
<ul>
<li><p>Noise in the signal: for example the signal comes from a sensor that's powered from noisy +5V, and the sensor has low PSRR.</p>
</li>
<li><p>Noise coupling into the signal: for example due to the wires to the sensor being near wires to the display</p>
</li>
<li><p>ADC voltage reference noise: in your case, the ADC reference is +3V3 for the microcontroller, so it will have some ripple depending on mcu dynamic power consumption or other loads on +3V3.</p>
</li>
</ul>
<p>An ADC outputs the digital value of VIN divided by VREF, so it's only as accurate as its VREF.</p>
<p>In your case the 5V to 3V3 LDO on the board has decent PSRR, so I doubt it's transmitting enough noise from 5V to 3V3 to matter. Doesn't hurt to probe 3V3 with the scope. Make sure you take your scope ground on the mcu module, not the breadboard.</p>
<p>If you're using a ratiometric sensor (with output proportional to VCC, or if the output is centered on VCC/2), or dependent on VCC, then the "VCC" in question should be the micro's ADC VREF. For example if your sensor is a voltage divider fed from ADC VREF, its output voltage is DividerRatio * VREF, so the ADC measures DividerRatio * VREF / VREF... taking VREF out of the equation. In this case you can get good accuracy with an high drift/inaccurate VREF.</p>
<p>If your sensor outputs a voltage that is not related to VCC, and you want high accuracy or low drift, maybe you need a more accurate reference chip instead of a LDO. Can't say more without knowing what sensor you're using.</p>
<ul>
<li>Ground noise</li>
</ul>
<p>If the 100mV drop on +5V is due to contact resistance on your breadboard... there are the same contacts on the ground side of your breadboard, so there should be similar voltage drop.</p>
<p>While +5V does not influence your ADC readings directly, any voltage on GND between the mcu module and the sensor is directly added to the voltage you want to measure.</p>
<p>So if your sensor is independent, I'd recommend trying to connect its ground and VCC to the mcu module directly, not via breadboard. If there's no pins facing up you can always solder them on the Feather M4.</p>
<p>If you want to filter the power supply for the module, you can always use a LC filter with a ferrite bead. Three 0805 components don't use much space.</p>
<p><a href="https://i.stack.imgur.com/7V3sr.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/7V3sr.png" alt="enter image description here" /></a></p>
<blockquote>
<p>In the application I plan to use a 4 layer board with a 5 V power plane</p>
</blockquote>
<p>Unless you're using many other 5V components, you don't need a 5V power plane. A plane won't magically make your power rail noise free. It will provide very low impedance between everything on it, especially decoupling caps, so it works very well at the frequencies handled by the caps. But at lower frequency the supply impedance of the power rail is the output impedance of whatever power source feeds it, LDO or USB "charger".</p>
<p>Your mcu is 3V3, so maybe you need a 3V3 power pour.</p>
| <p>I am working on a circuit that will use the ADC on an Arduino (Adafruit Feather M4 Express) to measure a small signal, so I want a minimum of noise. Testing the Arduino on a breadboard with a DC test analog signal, and configuring it in oversampling mode to get 15 bit resolution, I see drift over a range of 6 counts in 32767 (0.18%) in a one second monitoring period, which is acceptable for the application.</p>
<p>When I also wire up a Newhaven 2x16 char OLED module, the ADC drift increases 10x, to 60-70 counts - not OK.</p>
<p>The Arduino pulls about 15 mA. The OLED module adds 25 mA load on the 5 V bus. When I probe the 5V bus I see a 100 mVpp noise signal at 228 kHz with the OLED plugged in, silence otherwise.</p>
<p>A 4R7 in series with the OLED power wire (it's connected via a set of 12" 28 AWG wires to the pin header; in the final application it will be panel mounted so this is a realistic test) does knock the spikes down a bunch, though it's also dimmer due to the 100 mV drop. A 100 uF electrolytic helps even more - but this would occupy board space that's in short supply near where I'll connect the OLED wiring harness to the board so I'd prefer to avoid it if I can. (An LRC filter makes it whisper quiet but uses up even more space and voltage headroom I don't have.)</p>
<p>The <em>weird</em> part however is that the OLED module drags down the voltage beyond what I can account for. If not plugged in, I measure 4.95 V on the breadboard rail. With the Vcc wire for the module plugged into the rail it drops to 4.75 V! The PSU is a Siglent linear supply. It is not in current limit, it's sourcing only 50mA and the cutoff is configured to 10x higher. With the OLED power passing thru the resistor the 5v bus is somewhere in between these voltage extremes, but wanders around unstable.</p>
<p>This leaves me confused and also doubting the utility of the filter tests. Is the issue just that breadboards suck? 28 AWG jumpers too thin? (I don't have any thicker DuPont header jumpers on hand to test with.) The PSU is connected to the breadboard through appropriately thick gauge cables.</p>
<p>In the application I plan to use a 4 layer board with a 5 V power plane, and a wiring harness with 24 AWG leads for the display. Should I just ignore all this as breadboard jankiness and trust it'll work out on the PCB? Or do I need a filter - or something even more drastic to combat this inexplicable supply undervoltage?</p>
<p>I plan to set a 0R jumper on the board near the pin for the Vcc lead that I can replace with 4R7 if needed, I've got space for that at least. The analog and digital domains on the board are also well separated with a solid inner ground plane.</p>
| How do I handle +5V noise and PSU undervoltage due to an OLED module in my circuit? | 2024-01-31T07:58:05.387 |
699560 | |microcontroller|power|emc|decoupling-capacitor|signal-integrity| | <p>I would do the following:</p>
<p>A 100nF 0402/0201 Capacitor per power pin and a 330nF 0402/0603 per "Pin-Group". A Pin-Group can be for example G7/G9/G10, H7/H9/H11.</p>
<p>You could as use a LC network with a ferrit bead to feed the AVDD.</p>
<p>The most important thing however is, that your <strong>MCU ground pins and the capacitor GND pins are connected with a solid layer</strong> and "many" vias and the <strong>distance between the 100n's and the MCU pins is short.</strong></p>
<p>The "feed line" into the 100n's+330n can be either a plane or routed tracks - doesnt really matter for an MCU.</p>
| <p>I am using <a href="https://www.microchip.com/en-us/product/PIC32CZ8110CA90208?_ga=2.228789209.452720271.1706684652-2052799221.1706684652" rel="nofollow noreferrer">PIC32CZ8110CA90208-I8MX-SL3</a> in my design.The power supply section is given below.</p>
<p>You can see that it has:</p>
<ul>
<li>AVDD 1 pin</li>
<li>VDDIO 15 pins</li>
<li>VDDREG 3 pins</li>
</ul>
<p>Do I need to provide a separate decoupling network for each pin or a single decoupling network for each rail?</p>
<p>What I mean is do I need to provide fifteen decoupling capacitors for VDDIO, three decoupling capacitors for VREG, etc.?</p>
<p><a href="https://i.stack.imgur.com/4P345.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4P345.png" alt="enter image description here" /></a></p>
| Do I need to provide a decoupling capacitor network for all the power pins of a microcontroller? | 2024-01-31T10:08:42.127 |
699564 | |connector|dimensions| | <p>The color usually indicates the cross section size of the wire crimp part. And does not reflect the spade dimensions.</p>
<p>Spade dimension vary per brand. There is no real standard for spade connectors.</p>
<p>0.8 x 6.35mm is a common size, the datasheet should mention the spade size or brand used on the battery.</p>
| <p>Does the blade thickness of Lucar/Faston-type connectors vary methodically with both blade width and "colour" i.e. wire rating?</p>
<p>I'm looking at some UPS cells with blades which appear to be 0.75mm thick, and am trying to work out whether these are standard 1/4" "yellows" before ordering anything.</p>
| Faston/Lucar blade thickness | 2024-01-31T10:37:35.073 |
699576 | |layout|ground-loop| | <p>I would do th following (Red is signal layer, blue is GND layer).</p>
<p>You can use a .2mm or so trace as its only a small power signal.</p>
<p><strong>To add an extra:</strong> If you need 2oz copper i would still go four layer 1oz. The traces requiring more current can be routed as polygons on two or more layers with good via stitching. This also improves your GND-Plane impedance as it can be spread across multiple layers.</p>
<p><a href="https://i.stack.imgur.com/91BFh.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/91BFh.png" alt="enter image description here" /></a></p>
| <p>Basically, my PCB has one side that will be facing an enclosure's panel with IO. This side has a slide switch that needs to power a 12V power relay that draws 37.5mA when turned ON, but is <strong>located in the opposite side of the PCB</strong>. If you worry that the sliding switch will power the relay, do not, I have used a power P-channel MOSFET close to the relay so the switch trace will draw virtually no current and a pull-up is placed to put the MOSFET in saturation. <strong>And the trace that pulls down the MOSFET is connected to ground near the switch.</strong></p>
<p>Since this sliding switch is in the exact middle of one edge of the PCB and my board is crammed with components, but I happened to have a direct connection through the middle of the PCB, I decided to do exactly this. <strong>The problem is that the trace cuts in half the top ground plane, but not the bottom.</strong></p>
<p>What should I do in this case? Should I route the trace back and forth between the two layers to reduce possible ground loops, or should I via stitch around the trace? Are there any better methods to this like maybe using a jumper wire that runs over the board?</p>
<p><a href="https://i.stack.imgur.com/3wdck.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3wdck.png" alt="Schematic and basic diagram" /></a></p>
<p><a href="https://i.stack.imgur.com/JtxCe.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JtxCe.png" alt="Layout with highlighted trace" /></a>
<a href="https://i.stack.imgur.com/b61DG.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/b61DG.png" alt="Top layer unfinished" /></a>
<a href="https://i.stack.imgur.com/hWxUe.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hWxUe.png" alt="Bottom layer unfinished" /></a></p>
| A 10cm long trace runs through the middle of a 2 layer PCB and cuts the ground plane in half one one layer. How to prevent this? | 2024-01-31T12:43:34.930 |
699580 | |basic|voltage-reference|over-voltage-protection| | <p>You said:</p>
<blockquote>
<p>we want to suppress all voltage spikes above 16V.</p>
</blockquote>
<p>Let me rewrite that in a way that's less ambiguous:</p>
<p>"We want to prevent a certain <em><strong>potential difference</strong></em> from exceeding 16V".</p>
<p>The way it's drawn, it isn't immediately obvious, but the two circled zener diodes are connected between the gate and source of a MOSFET, like this:</p>
<p><img src="https://i.stack.imgur.com/DoH2z.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fDoH2z.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>When potential <span class="math-container">\$V_G\$</span> at the gate exceeds source potential <span class="math-container">\$V_S\$</span>, so that <span class="math-container">\$V_G > V_S\$</span>, the diode is reversed biased, and normally doesn't conduct at all. But being a zener diode, when the difference <span class="math-container">\$V_G - V_S\$</span> approaches +16V, the diode begins to conduct heavily, which has the effect of preventing the two potentials <span class="math-container">\$V_G\$</span> and <span class="math-container">\$V_S\$</span> from separating any further.</p>
<p>Therefore gate potential cannot ever be more than 16V higher than source potential. In other words, the potential <em><strong>difference</strong></em> <span class="math-container">\$V_G - V_S\$</span> is constrained to a maximum of +16V:</p>
<p><span class="math-container">$$ V_G - V_S < +16V $$</span></p>
<p>A similar constraint is imposed when the diode is forward biased, which happens when <span class="math-container">\$V_G < V_S\$</span>. In that condition the diode behaves just like any regular diode, and begins conducting heavily as the potential difference <span class="math-container">\$V_G - V_S\$</span> approaches -0.7V. Therefore:</p>
<p><span class="math-container">$$ V_G - V_S > -0.7V $$</span></p>
<p>These two constraints together ensure that <span class="math-container">\$V_G - V_S\$</span> is always kept within the range −0.7V to +16V. If I define <span class="math-container">\$V_{GS} = V_G - V_S\$</span>, this could be written:</p>
<p><span class="math-container">$$ -0.7V < V_{GS} < +16V $$</span></p>
<p>Take a look at the <a href="https://www.vishay.com/docs/91021/irf540.pdf" rel="nofollow noreferrer">IRF540 datasheet</a>, or the datasheet of any typical MOSFET. You'll find something like this:</p>
<p><a href="https://i.stack.imgur.com/BdqdO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/BdqdO.png" alt="enter image description here" /></a></p>
<p>This table tells you the limits that the device can withstand. It says that "Gate-source voltage" <span class="math-container">\$V_{GS}\$</span> must never be outside the range <span class="math-container">\$-20V < V_{GS} < +20V\$</span>. That's the same <span class="math-container">\$V_{GS}\$</span> I was talking about above.</p>
<p>As we already established, in your circuit <span class="math-container">\$V_{GS}\$</span> is kept in the range <span class="math-container">\$ -0.7V < V_{GS} < +16V \$</span>, by the zener diode, meaning that the constraints on <span class="math-container">\$V_{GS}\$</span> as stated in the datasheet are always obeyed.</p>
<p>That's the purpose of those diodes; to keep <span class="math-container">\$V_{GS}\$</span> within acceptable limits.</p>
| <p>I understand that a zener diode uses its anode as a reference to limit the over-voltage levels that appear on its cathode. However, in the <a href="https://www.youtube.com/watch?v=Iu1HuxDV6GM" rel="nofollow noreferrer">circuit</a> shown below, I am confused about why the anode of the Zener diode is connected to the PACK+ pin when we want to suppress all voltage spikes above 16V.</p>
<p><a href="https://i.stack.imgur.com/hTBKN.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hTBKN.png" alt="enter image description here" /></a></p>
| Understanding reference levels in circuits | 2024-01-31T13:28:31.773 |
699588 | |audio|noise|mains| | <p>You have a charger which has a grounded plug.</p>
<p>But you are connecting it to wall socket that doesn't provide ground.</p>
<p>It needs to be connected to a wall socket that provides a ground.</p>
<p>Most likely it reads on the charger itself, so you are using it incorrectly.</p>
<p>And that is why you have 50 Hz ground loops.</p>
<p>The electrical engineering explanation is that the power brick has filter capacitors from Live and Neutral to Earth/Ground. When the ground is missing, the caps are actually making things worse. If you had a desktop PC with metal case, the metal case that should be grounded via mains plug will now be weakly connected to half mains AC voltage, like 115 VAC in a 230 VAC country.</p>
<p>That is enough to damage things when hot-plugged together and can feel like vibration and tingling when you touch metal parts of the PC.</p>
| <p>As soon as I plug in either my laptop or my speakers to the wall, I get an unbearable amount of noise in my guitar recording.</p>
<p>Signal chain: Guitar --(1/4 jack)-> Audio Interface --(USB)-> PC --(Power brick)-> Wall socket</p>
<p>In the above setup, the PC is the only thing that's plugged into the wall. That should mean there is no ground loop issue right?</p>
<p>There is nothing else plugged in to this socket.</p>
<p>If I unplug my laptop from the wall, but plug in the speakers which are connected to the audio interface with a 3.5mm->RCA cable, I also get noise.</p>
<p>Touching the guitar strings only slightly lowers the noise but not enough.</p>
<p>I tried various setups with varying results:</p>
<ul>
<li>both laptop and speakers plugged in = -43 db</li>
<li>unplug just speakers = -43 db</li>
<li>unplug just laptop = -45 db</li>
<li>unplug just laptop but disconnect the speaker from the audio interface = -56 db</li>
<li>unplug both = -63 db</li>
</ul>
<p>The noise is not only 50Hz but also every harmonic of it. See below image</p>
<p><a href="https://i.stack.imgur.com/AHxwb.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AHxwb.png" alt="enter image description here" /></a></p>
<p>How can I solve this?</p>
| USB Audio interface 50Hz + harmonics noise when either laptop or speakers are plugged in | 2024-01-31T14:23:02.450 |
699592 | |power-supply|analog|current-sensing|power-measurement| | <p>Here are two suggestions, one for current sensing, and one for voltage.</p>
<p>First the current:</p>
<p><img src="https://i.stack.imgur.com/HLZZf.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fHLZZf.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="noreferrer">CircuitLab</a></sup></p>
<p>This is a shunt regulator. The closed loop tries to keep voltage across current sense resistor R1 at 20mV. It can lower that voltage, but it can't raise it, because the MOSFETs can only sink current. Therefore the voltage across R1, which is the potential at node A, is capped to a maximum of 20mV, at which point the MOSFETS begin to shunt current around R1. Here's a plot of <span class="math-container">\$V_A\$</span> as <span class="math-container">\$I_1\$</span> is swept up to 100mA:</p>
<p><a href="https://i.stack.imgur.com/61gIH.png" rel="noreferrer"><img src="https://i.stack.imgur.com/61gIH.png" alt="enter image description here" /></a></p>
<p>R1 is never permitted to develop a voltage comparable to the 1V...150V supply, and yet for currents up to 20mA it will act like any regular current sense resistor.</p>
<p>The op-amp output goes high only when the threshold of 20mV (when <span class="math-container">\$I_1=20mA\$</span>) is reached, which switches on the MOSFETs. It can therefore be used to signal that 20mA or more is flowing. Since your application only needs to know if current is flowing or not, perhaps <span class="math-container">\$V_{OUT}\$</span> is your signal of choice:</p>
<p><a href="https://i.stack.imgur.com/jVH6u.png" rel="noreferrer"><img src="https://i.stack.imgur.com/jVH6u.png" alt="enter image description here" /></a></p>
<p>Now for the voltage sensing. This is a similar problem, in that we require accurate voltage sensing at low voltages, but we don't want to use a voltage divider which attenuates the signal so much that this becomes impossible.</p>
<p>We can use a similar technique, to cap the voltage across the lower divider resistor to some maximum, and somehow have the upper element take up the rest:</p>
<p><img src="https://i.stack.imgur.com/0phlU.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f0phlU.png">simulate this circuit</a></sup></p>
<p>This is a just a voltage regulator. It employs a MOSFET as the "pass element", and a closed loop to make it more resistive as the potential <span class="math-container">\$V_B\$</span> at node B exceeds 100mV. This allows <span class="math-container">\$V_B\$</span> to follow <span class="math-container">\$V_{IN}\$</span> for all inputs below 100mV, but that's where it stops rising. This is <span class="math-container">\$V_B\$</span>, as <span class="math-container">\$V_{IN}\$</span> is swept from 0V to 200mV:</p>
<p><a href="https://i.stack.imgur.com/idXqQ.png" rel="noreferrer"><img src="https://i.stack.imgur.com/idXqQ.png" alt="enter image description here" /></a></p>
<p>This arrangement will only draw a tiny current from the 1V..150V supply:</p>
<p><span class="math-container">$$ I = \frac{100mV}{R_1} = 100\mu A $$</span></p>
<p>For input voltages between 100mV and 150V, the MOSFET takes up all the remaining potential difference, so it needs to be able to handle that voltage. The maximum power it will dissipate is:</p>
<p><span class="math-container">$$ P = IV = 100\mu A \times 150V = 15mW $$</span></p>
<p>Just like the current sense circuit, the op-amp output is a good indicator of when input voltage has exceeded 100mv. This is <span class="math-container">\$V_{OUT}\$</span> for the same sweep of <span class="math-container">\$V_{IN}\$</span>:</p>
<p><a href="https://i.stack.imgur.com/8VPMZ.png" rel="noreferrer"><img src="https://i.stack.imgur.com/8VPMZ.png" alt="enter image description here" /></a></p>
<p>These circuits are just preliminary ideas. They need work to keep them stable, and to protect against problems I have yet to identify. They also need to be made fail-safe.</p>
| <p>I've been asked to build a circuit to switch a constant power (varying current & voltage) supply between two loads, for a research experiment the customer is carrying out. The loads are unknown to me, but apparently they can be approximated by a linear Varistor. As such, the supply varies from 1Vdc @ 10A, to 150Vdc @ 0.06A.</p>
<p>The switching will be initiated by a pulse from a computer, possibly as part of an automated routine. I already have the switching part of the circuit sorted.</p>
<p>The customer wants the switching to take place when the power supply is off, but I'd like to check the supply is definitely off before my circuit switches.</p>
<p>In the past, with CC or CV supplies and a fixed load, I've used a simple high or low-side current/voltage sense circuit. But I'm struggling here, tying myself in knots trying to figure out how to do this without affecting the varying load.</p>
<ul>
<li>I've made the assumption that my circuit needs to measure the supply all the time, so must work for all circuit conditions. In reality, it could be argued that the software requesting the switch means I only need to do a single measurement at the point of request, and that changing the load is not a problem at that point.</li>
</ul>
<p>I'd appreciate any suggestions, as the problem genuinely interests me. Thanks!</p>
| How to sense a varying current and voltage without affecting the load | 2024-01-31T15:08:49.263 |
699597 | |current|passive-networks| | <p>In general, an <em>n</em>-th order polynomial can be factored out into <em>n</em> factors:
<span class="math-container">$$
c_n z^n + c_{n-1}z^{n-1} + \dots
+ \overbrace{c_1z^1}^{c_1z} + \overbrace{c_0z^0}^{1}
= \overbrace{(z-z_n)}^{\text{n-th factor}}
\overbrace{(z-z_{n-1})}^{\text{(n-1)-th factor}}
\dots
\overbrace{(z-z_1)}^{\text{1st factor}}.
$$</span></p>
<p>2nd-order polynomials, called also quadratic formulas, can be converted to a product of 2 factors:
<span class="math-container">$$
as^2+bs+c =
\overbrace{(s-s_1)}^{\text{1st factor}} \cdot
\overbrace{(s-s_2)}^{\text{2nd factor}}
$$</span>
where <span class="math-container">\$s_1, s_2\$</span> are zeroes (solutions to) the quadratic equation <span class="math-container">\$(s-s_1)(s-s_2)=0\$</span>. It's just <em>s</em> instead of <em>x</em> or <em>z</em> as you may see in the literature for quadratic equation solving.</p>
<p>The roots <span class="math-container">\$s_{1,2}\$</span> are complex numbers. Don't forget that real numbers are a proper subset of complex numbers. The roots can be equal to each other, and then they are called a double root. That's not the case here.</p>
<p>Here, <span class="math-container">\$s^2+s+2\$</span> has zeroes <span class="math-container">\$s_{1,2}=-\frac{1}{2}\pm j\frac{\sqrt{7}}{2}\$</span>. The zeroes here are a complex conjugate pair. That's the case when the coefficients <em>a</em>,<em>b</em>,<em>c</em> are real.</p>
<p>You can check it:</p>
<p><span class="math-container">$$\begin{aligned}
(s-s_1)(s-s_2) &= \left( s+\frac{1}{2}+j\frac{\sqrt{7}}{2} \right) \cdot
\left( s+\frac{1}{2}-j\frac{\sqrt{7}}{2} \right) \\
&= \dots \text{carry out multiplications and additions} \\
&= s^2+s+2
\end{aligned}$$</span></p>
| <p><a href="https://i.stack.imgur.com/NKDn5.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/NKDn5.png" alt="enter image description here" /></a></p>
<p>I'm currently trying to calculate the answer for I<sub>o</sub>. However, I don't understand how the equation is converted from the highlighted value labelled (1) to the one labelled (2), as shown in the picture attached. How do I obtain the equation in (2) form? Any help is much appreciated.</p>
| How to convert the equation to its complex form? | 2024-01-31T15:32:01.207 |
699607 | |operational-amplifier|adc|potentiometer|buffer| | <blockquote>
<p>Simplest solution: don't use any buffers, just route the pots' wiper directly to the multiplexer input</p>
</blockquote>
<blockquote>
<p>Use a buffer between MXO and AINP</p>
</blockquote>
<p>Those are great solutions if you want to get scratchy pots eventually. Not a good thing in audio, I'd think.</p>
<blockquote>
<p>Buffer each input channel separately</p>
</blockquote>
<p>Yes. And buffer it close to the potentiometer - ideally with a single op-amp in a small package.</p>
<p>Potentiometer controls can be insensitive to grime if they are buffered by a high-impedance "electrometer"-style op-amp. The idea is that even if the wiper gets isolated by a thin layer of contamination, it's still within the electric field at a particular location on the trace. The lower the input current to the buffer, the less the voltage will change until the wiper regains contact. This can be improved with a holding capacitor.</p>
<p>In my experience, the following circuit will be scratch-free in all but worst contamination:</p>
<p><img src="https://i.stack.imgur.com/iUldR.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fiUldR.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The capacitor and the op-amp should be as close to the potentiometer as possible. OA1 can be a special ultra-low input current type, or just a garden variety CMOS-input type. The lower the input current, the better, in any case. C1 needs to have low leakage, and low dielectric absorption. In a pinch, a C0G 100V type will work, otherwise try with various foil caps.</p>
<p>The non-inverting node of the op-amp needs to have a guard trace around the pot wiper terminal, the upper terminal of the capacitor, and the non-inverting input itself. The guard trace shunts leakage currents due to inevitable board contamination etc. The guard trace should be on all layers. Ground- and power planes should be cut out within the guard trace.</p>
<p>Again, keep all of it very close together. Ideally you'd want the area enclosed by the guard trace to be a couple dozen mm^2 at most, ideally less.</p>
<hr />
<p>As you can see, an ADC wasn't even a concern yet! The buffering described above is needed just to get a clean DC control voltage out of a potentiometer. There will need to be a glitch-damping series resistance between the output of this buffer and any ADC MUX inputs. In your case, 1kΩ should do fine.</p>
| <p>I'm building a MIDI controller with a bunch of endless potentiometers. They can be either 10k or 20k. I'm planning to read the values with an <a href="https://www.ti.com/lit/ds/symlink/ads7953.pdf" rel="nofollow noreferrer">ADS7953</a>. This is a 16-channel ADC. It has one converter and an analog multiplexer in the case. The output of the multiplexer is available on the MXO pin as well as the input of the ADC on AINP so it's possible to connect them directly or implement buffering between the two if the source impedance is too high. The MIDI messages sent by the device will be 14-bit high resolution MIDI CCs, so I need accuracy and low noise. I do not need a high sample rate, but at least 300SPS. I have 3 of these ADCs sitting on the same SPI bus so can't use them in parallel, that will give me 100SPS for each of them.</p>
<p>I'm wondering what's the best way to connect the potentiometers to the ADC. The relevant section in the datasheet starting on page 46. Not sure I understand the calculations there with regards to input channel voltage disturbance, settling time, capacitances and impedances.</p>
<p>Considering the following options:</p>
<ul>
<li><p>A. Simplest solution: don't use any buffers, just route the pots' wiper directly to the multiplexer input and short the ADC's MXO to AINP. Not sure whether this is a good idea if I need the 300SPS conversion rate. Whether there would be crosstalk between the channels because of the long settling times resulting from high source impedance. The advantage is that I can use the full range of the ADC since there's no op-amp to limit the voltage swing between ground and VREF.</p>
</li>
<li><p>B. Use a buffer between MXO and AINP like in the datasheet on page 50. According to the curves on datasheet page 49 and 51, this would give a bit more headroom with regards to input source impedance. Still not sure about settling times on the multiplexer input potentially resulting in crosstalk. Even if I use a rail-to-rail op amp, there's at least few mV dead zone at the bottom and the top of the full range. If it's just 5mV, I'll lose the top and bottom 8-10LSB (2.5V VREF / 4096 = 0.6 mV per LSB). I can fix the top end by powering the op-amp from 3.3V or higher, but for the bottom I'll need a negative voltage which means additional headache (components, PCB real estate, cost, points of failure etc.).</p>
</li>
<li><p>C. Buffer each input channel separately. This would eliminate the entire crosstalk and settling time problem by providing a very low source impedance, but would still result in dead zones, and it's a lot of additional components.</p>
</li>
</ul>
<p>Not sure how far I need to go to achieve a reasonable result according to my goals. Any thoughts, advices, experience?</p>
| Reading potentiometer with analog multiplexer and ADC: how to buffer | 2024-01-31T16:06:54.307 |
699612 | |transistors|pcb|component-selection|pnp| | <p>You can sub a beefier transistor such as <a href="https://www.onsemi.com/pdf/datasheet/mmbt4403-d.pdf" rel="nofollow noreferrer">MMBT4403</a>, which is a 60V 600mA part and costs only slightly more than an inferior MMBT3906.</p>
| <p>In my circuit I have a discontinued transistor listed here:</p>
<p><a href="https://i.stack.imgur.com/Kq26W.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Kq26W.png" alt="enter image description here" /></a></p>
<p>If I can not select a transistor rated 350 mA, would a change to the collector current pose any issues that may need compensating in my circuit? I am assuming that is what the 350 mA represents in the BOM, as Fairchild does not exist anymore.</p>
<p>The same part name from <a href="https://www.onsemi.com/pdf/datasheet/pzt3906-d.pdf" rel="nofollow noreferrer">onsemi</a> is listed as Transistor PNP 40 V, 200 mA collector current.</p>
<p>The 5 V/5 A circuit:
<a href="https://i.stack.imgur.com/qtHJE.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qtHJE.png" alt="enter image description here" /></a></p>
| Selecting PNP transistor replacement | 2024-01-31T16:22:28.000 |
699615 | |transformer|dc-dc-converter|winding|model| | <p>Consider the diagram,</p>
<p><a href="https://i.stack.imgur.com/NoFJp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/NoFJp.png" alt="schematic of forward converter" /></a></p>
<p>(<em>Power Electronics</em>, Hart, D. W. (2011), McGraw-Hill)</p>
<p>The magnetizing inductance Lm can simply be placed anywhere, making suitable adjustments with respect to turns ratio and leakage inductance of course. It only needs to be accounted for once.</p>
<p>If we aren't accounting for leakage, k12 = k23 = 1, then no leakage adjustment is necessary and placing it on any winding (adjusted for turns ratio) shows the same current flows in branches outside of the transformer.</p>
<p>For nonideal transformers, the windings can be modeled as some self-inductance per winding, coupled through series (leakage) inductors, to an ideal transformer handling the turns ratio. Usually, k is high enough in practical cases that just one magnetizing inductor suffices, and series inductor(s) for leakage.</p>
| <p>In a forward converter, the current through the physical primary winding is the sum of the current through the magnetizing inductor and the current through the model primary winding.</p>
<p>However, the current through the physical secondary winding is equal to the current through the model secondary winding, and the current through the physical tertiary winding is equal to the current through the model tertiary winding.</p>
<p>Why is the physical primary winding different from the model primary winding, when the secondary and tertiary are the same?</p>
| Why is there a difference between the model primary and physical primary in a forward converter, but not between the secondary or tertiary windings? | 2024-01-31T16:36:40.800 |
699630 | |circuit-analysis|passive-networks|laplace-transform|linear| | <p>An alternative solution for this overdamped circuit:</p>
<p><a href="https://i.stack.imgur.com/52wfL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/52wfL.png" alt="enter image description here" /></a></p>
<p><span class="math-container">$$
\begin{cases}
v_c(t) = (30-10e^{-20t}+30e^{-10t})u(t)& \space V \qquad{[1]}\\
\\
i_L(t) = (0.04e^{-20t}- 0.06e^{-10t})u(t)& \space A \qquad{[2]}
\end{cases}
$$</span></p>
<p>Then:</p>
<p><span class="math-container">$$
\begin{cases}
v_c(0_-) = 50\space{V} \\
i_L(0_-) = -0.02\space{A} \\
v_c(\infty) = 30\space{V} \\
i_L(\infty ) = 0\space{A}
\end{cases}
$$</span></p>
<p><span class="math-container">$$\boxed{V_i = v_c(\infty) = 30\space{V}}$$</span></p>
<p><span class="math-container">$$
\begin{align}
&i_c(t)=i_L(t) = C\frac{dv_c(t)}{dt}= C(200e^{-20t}-300e^{-10t})u(t) \\
&i_c(0_+)=i_L(0_-) = -100C
\end{align}
$$</span></p>
<p>So</p>
<p><span class="math-container">$$\boxed{C=200 \space\mu F}$$</span></p>
<p>On the other hand</p>
<p><span class="math-container">$$
\begin{align}
v_L(t)= L\frac{di_L(t)}{dt}=L(-0.8e^{-20t}+0.6e^{-10t})u(t) &\qquad{[3]}\\
v_L(0_+)=-0.2L &\qquad{[4]}
\end{align}
$$</span></p>
<p>But, <span class="math-container">\$v_L(0_+)\$</span> can be also calculated applying KVL at <span class="math-container">\$t = 0\$</span>:</p>
<p><span class="math-container">$$
\begin{align}
v_L(0_+)&=-50+30-R(-0.02) \\
v_L(0_+)& = -20+0.02R \qquad{[5]}
\end{align}
$$</span></p>
<p>Equating <span class="math-container">\$[4]\$</span> and <span class="math-container">\$[5]\$</span>:</p>
<p><span class="math-container">$$ L+0.1R=100 \qquad[6] $$</span></p>
<p>Another equation relating <span class="math-container">\$R\$</span> and <span class="math-container">\$L\$</span> can be obtained choosing other point in time. For instance, doing <span class="math-container">\$t=0.1s\$</span> in <span class="math-container">\$[1]\$</span>, <span class="math-container">\$[2]\$</span> and <span class="math-container">\$[3]\$</span>, respectively:</p>
<p><span class="math-container">$$
\begin{align}
v_c(0.1)&=39.68 \space V \\
i_L(0.1)& = -0.0167 \space A \\
v_L(0.1)&=0.1125L \qquad{[7]}
\end{align}
$$</span></p>
<p>But, <span class="math-container">\$v_L(0.1)\$</span> can be also calculated applying KVL at <span class="math-container">\$t=0.1s\$</span>:</p>
<p><span class="math-container">$$
\begin{align}
v_L(0.1)&=-39.68+30-R(-0.0167) \\
v_L(0.1)&=0.0167R-9.68 \qquad{[8]}
\end{align}
$$</span></p>
<p>Equating <span class="math-container">\$[7]\$</span> and <span class="math-container">\$[8]\$</span>:</p>
<p><span class="math-container">$$ L-0.148R=-86.04\qquad[9] $$</span></p>
<p>Solving <span class="math-container">\$[6]\$</span> along <span class="math-container">\$[9]\$</span>:</p>
<p><span class="math-container">$$ \boxed{R=750 \space \Omega} $$</span></p>
<p><span class="math-container">$$ \boxed{L=25 \space H} $$</span></p>
<p>----------------------------- <strong>EDIT</strong> ---------------------------</p>
<p>Regarding your comment:</p>
<p>Yes. It seems to be fine. A differential equation describing the natural response for <span class="math-container">\$v_c(t)\$</span> is:</p>
<p><span class="math-container">$$\frac{d^2v_c(t)}{dt^2}+\frac{R}{L}\frac{dv_c(t)}{dt}+\frac{1}{LC}v_c(t)=0$$</span></p>
<p>The corresponding characteristic equation is:</p>
<p><span class="math-container">$$ s^2+\frac{R}{L}s+\frac{1}{LC}=0 $$</span></p>
<p>Or:</p>
<p><span class="math-container">$$ (s-s_1)(s-s_2) = 0 $$</span></p>
<p>Therefore, for an overdamped second order system with two real distintic roots (characteristic modes), <span class="math-container">\$s_1\$</span> and <span class="math-container">\$s_2\$</span>:</p>
<p><span class="math-container">$$
\begin{cases}
s_1&=-\frac{R}{2L}+\frac{1}{2}\sqrt{(\frac{R}{L})^2-\frac{4}{LC}}=-10 \\
\\
s_2&=-\frac{R}{2L}-\frac{1}{2}\sqrt{(\frac{R}{L})^2-\frac{4}{LC}}=-20
\end{cases}
$$</span></p>
<p><span class="math-container">$$ (s + 10)(s+20) = 0 $$</span></p>
<p>The complete response for a step input (<span class="math-container">\$V_iu(t)\$</span>) and a overdamped system (<span class="math-container">\$\xi>1\$</span>) has the form below:</p>
<p><span class="math-container">$$v_c(t)=(V_i+A_1e^{s_1t}+A_2e^{s_2t})u(t)$$</span></p>
<p>where the values of constants <span class="math-container">\$A_1\$</span> and <span class="math-container">\$A_2\$</span> are determined from the initial conditions.</p>
<p>From here, follow the reference you presented.</p>
| <p>I have a couple of exercises in my textbook (Fundamentals of Electric Circuits 6th edition) that look like the following:
<a href="https://i.stack.imgur.com/7iUZF.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/7iUZF.png" alt="exercise from ee book" /></a></p>
<p>To solve this problem, my first idea was to transform it into the laplace domain, and then use that <span class="math-container">\$i=C\tfrac{dv}{dt}\$</span> to solve for C. But that didn't give me an equation that simplified to a number and I assume it's also wrong because I'm not taking the initial conditions into account?</p>
<p>The solutions manual in my textbook does it with the following method.</p>
<ol>
<li>They setup the equation for a series RLC circuit, and they add the initial conditions.</li>
<li>They simplified it in a weird way which isn't correct as they are missing a factor of division by s.</li>
<li>They solve for the roots of s which is weird as some terms get divided by 0 and not all s terms are in one part of the equation?</li>
<li>Lastly they add another equation they get from the i=c*dv/dt which I understand how they arrive to.</li>
</ol>
<p>I'd like to have a little bit more explanation on steps 2 and 3 above as I'm not sure if it is a correct approach? Thanks!
<a href="https://i.stack.imgur.com/0976b.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0976b.png" alt="solution" /></a></p>
| Find R, L and C in RLC series circuit given voltage over capacitor and current through inductor | 2024-01-31T18:04:34.893 |
699639 | |integrated-circuit|identification|surface-mount| | <p>Fairchild 74VHC595MTC, which means in 16-pin TSSOP package.</p>
| <p><a href="https://i.stack.imgur.com/MFumM.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MFumM.jpg" alt="enter image description here" /></a></p>
<p>Can you help identify this 16-pin IC? There are several of them, and on the other side there are many LEDs.</p>
| Component identification needed (marking: fPAUBP V595) | 2024-01-31T19:15:42.610 |
699645 | |constant-current| | <p>If a power supply has been designed to have limited output current, as this one appears to, then the load determines whether it operates in limited voltage or limited current mode.</p>
<ul>
<li>If the load voltage is lower than the supply's Vmax limit, say a short-circuit or a low value resistor, then the supply is delivering a constant current at the Imax limit, and dropping its output voltage.</li>
<li>If the load current is lower than the supply's Imax limit, perhaps an open circuit or a high value resistor, then the supply is delivering a constant voltage at the Vmax limit, and supplying whatever low current the load is demanding.</li>
</ul>
| <p>There is a E3640A power supply need it to function as a current source.
In regular power supplies we set the maximum limit current and the regular voltage we want to output.
In the manual shown in the link there is just setting the maximal limit values. There is no option for setting the current we want to output.
How can I use it as a current source?
They say to go to the limit section and set the maximal voltage and current values.
So how does it makes it constant current device?
We just set the maximum for both of them.
Where am I going wrong with the logic?</p>
<p>Thanks.
<a href="https://i.stack.imgur.com/4lHPj.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4lHPj.png" alt="enter image description here" /></a></p>
| Using E3640A as current source | 2024-01-31T20:00:29.167 |
699672 | |power-supply|led|led-driver|led-strip|led-matrix| | <p>Your LEDs are drawing whatever current they draw at the voltage you are supplying. If you want them to draw more current, you will need to raise the voltage.</p>
<p>Every simple two-terminal component has an I-V curve, which gives the current it will draw for a given voltage, or the voltage that will appear across it for a given current. Your "3V" LEDs are no different -- they need approximately 3V to function, but they still have an I-V curve, it's just a very steep one. At slightly less than 3V, they won't draw enough current to light up; at slightly more than 3V, they will draw enough current to destroy themselves and stop working.</p>
<p>Your power supply can't give both a fixed voltage and a fixed current to the circuit; for a given voltage the circuit will draw some specific current, or for a given current it will develop some specific voltage across it. So when you set both knobs, one or both are functioning as upper limits, not exact values. Your power supply is providing 3V to the circuit, and at that voltage the circuit draws some amount of current. It doesn't matter how high you set the current limit on the power supply; the circuit won't draw more than that.</p>
<p>If your circuit is truly just made of LEDs with no other components, it's really just luck that you happen to have found a voltage where they light up but don't explode. It's not recommended (and not practical) to drive LEDs with a constant voltage source, because even small manufacturing variations (or temperature changes) can cause large changes in current, for a given voltage.</p>
<p>If you are lighting up an array of parallel LEDs with a constant voltage supply, and they are all the same brightness, I suspect what's actually happening is that your array <em>does</em> contain other components, probably at least resistors, which are helping to regulate the current to the LEDs. You could give us more information about the LEDs and it might confirm this.</p>
| <p>I have a 48 parallel matrix of 3v LEDs. I'm trying to overdrive it. I set my supply to 3v and 0.5amps and the display glows. Up the amperage to say 1amp it gets brighter. So far so good. I keep increasing the amperage, and it gets more-or-less linearly brighter, UNTIL I reach some sort of threshold where I just can't drive it any harder. I was sort of expecting the LEDs to burn out, but instead my supply mysteriously backs off to what I'm assuming to be the max power (amps) that the LEDs can "pull" (?) -- let's call it 2 amps for this example. I can set the supply as high as I like, and all it does it to back itself off to 2 amps. There's no fancy electronics in the LED array, so presumably some sort of current limiter in the supply is doing this, but why, and how does it "know" where to land, rather than just burning out my LEDs like I was hoping it would do? (My supply is a very stable and reliable Hyelec HY50-06A.) Thanks in advance for any guidance you can offer.</p>
| Trying to overdrive LEDs my power supply amperage mysteriously "backs off" | 2024-02-01T01:08:41.930 |
699698 | |mosfet|inverter| | <p>The MOSFET's body diode has a <strong>typical</strong> reverse recovery time of 60 ns at a temperature of 125° C whereas the external diode recovery is <strong>typically</strong> 77 ns hence, it doesn't look like the diode is bringing much to the party unless you have a special reason for keeping it that you haven't disclosed.</p>
<p><a href="https://i.stack.imgur.com/bAj1Y.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bAj1Y.png" alt="enter image description here" /></a></p>
<p>It's not even close when it comes to diode losses either: -</p>
<p><a href="https://i.stack.imgur.com/taKIu.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/taKIu.png" alt="enter image description here" /></a></p>
<p>At 20 amps, the MOSFET's diode drops around 0.6 volts whereas the external diode drops about 1.5 volts. There are no compelling reasons that I can see to use the external diode.</p>
| <p><a href="https://i.stack.imgur.com/qRXOe.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qRXOe.png" alt="enter image description here" /></a></p>
<p>The line current of the load will be maximum 20 A and the MODFET <a href="https://datasheet.lcsc.com/lcsc/1809192210_Infineon-Technologies-IRFB4110PBF_C2650.pdf" rel="nofollow noreferrer">IRFB4110</a> has body diode which can easily conduct this current. According to datasheet the body diode should carry 170 A (depending on the heat sink). I have also placed a fast recovery diode <a href="https://datasheet.lcsc.com/lcsc/1912192111_Vishay-Intertech-VS-30ETH06-M3_C468083.pdf" rel="nofollow noreferrer">(VS-30ETH06-M3)</a> in my design having 20 A average rectified current rating. The problem is that it is increasing the board size a lot (also increasing the Bill Of material). I need to know is it bad to get rid of the fast recovery diodes in this design? Circuit will drive a single motor.</p>
| Is it necessary to add fast recovery diode parallel to MOSFET in inverter that is designed for motor driving? | 2024-02-01T07:31:29.050 |
699703 | |pcb|pcb-fabrication|pcb-assembly| | <p>The amount of components on a reel is entirely up to the PCB manufacturer.</p>
<p>The issue is it takes them time to attach leader line to the reel so that the machine can 'spool' The tape up. Most PCB manufacturers don't want to take the time to do this so they'll either make you do it or they'll just specify that you have to have a minimum length.</p>
<p>Sometimes it goes beyond that and they don't even want to deal with that. With passives it's much cheaper to waste components than it is to spend the time to fix the reel in the PCB manufacturer's eyes.</p>
<p>In short: it's really up to the manufacturer. I've seen manufacturers that will take just about anything and attach leader line. I've seen some that specify a minimum amount. Usually with components that have a significant cost like tens of cents or a dollar they'll be understanding and not require a minimum amount, and attach leader line.</p>
<p>Lastly, you can find services to respool and attach leader line, it's usually the cost of an entire reel of passives</p>
| <p>What should be the minimum number of SMD components on a reel for a pick and place machine? Different scenarios are possible for each machine. In terms of professional machines, if everyone writes down the pick and place machine and brand model they work on, this may give an idea.</p>
<p>Euro Circuits</p>
<blockquote>
<p>Minimum tape length – extra components needed: The tape width should be at least 8 mm and we need a minimum 50 mm to push the tape into the feeder. For tube and tray components we do not have these limitations. For smaller components up to 1212, we require at least 10 extra parts in the tape, for other components we require 1 extra component.</p>
</blockquote>
<p><a href="https://i.stack.imgur.com/HReMu.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HReMu.png" alt="enter image description here" /></a></p>
<blockquote>
<p>Source: <a href="https://www.eurocircuits.com/assembly-manufacturing-technology/pick-place/" rel="nofollow noreferrer">eurocircuits</a></p>
</blockquote>
| What should be the minimum number of SMD components on a reel (minimum tape length) for a pick and place machine? | 2024-02-01T08:32:17.893 |
699706 | |can|modbus|motion|drive| | <p>Have a look at the <a href="https://www.can-cia.org/can-knowledge/canopen/cia402/" rel="nofollow noreferrer">CiA 402</a> specification. It's a widely adopted (at least in Europe) standard for drives and motion control.</p>
<p>We've implemented several CANopen and EtherCAT servo drives using the CiA 402 device profile. Depending on the CAN bus length (which is a limiting factor for the maximum baudrate) and number of nodes, you'd be able to achieve update rates between 100 Hz and 1 kHz.</p>
<p>Higher update rates are achievable when using <a href="https://www.ethercat.org" rel="nofollow noreferrer">EtherCAT</a>. It's a ethernet based real-time fieldbus. But quite a bit more complex. If CANopen suffices, I'd stick to that.</p>
<blockquote>
<p>Are there any PLC motion modules that implement motion control in this way (i.e. generate the setpoint on the PLC side, and transmit to drive)?</p>
</blockquote>
<p>Some of our customers use <a href="https://www.codesys.com/products/codesys-motion-cnc-robotics/softmotion.html" rel="nofollow noreferrer">CODESYS Softmotion</a> (CANopen and EtherCAT) or <a href="https://www.ethercat.org/en/products/EE89D3E40659427C8D3458706B14AC57.htm" rel="nofollow noreferrer">TwinCAT</a> (EtherCAT).</p>
| <p>I need to issue position setpoint commands to a servo drive 50 times/sec. The drive will be responsible for closing the PID loop, etc, while the motion controller I'm developing will handle generating the setpoints to follow a custom trajectory.</p>
<p>I have the option of using Modbus TCP to communicate with the drive but worry that latency issues may arise when sending setpoints so frequently. Is Modbus suitable for such an application or should I consider another protocol such as CANopen? Or do I need to rethink my approach all together?</p>
| Is Modbus suitable for motion control positioning? | 2024-02-01T09:14:43.790 |
699715 | |pcb|pcb-design|power-electronics|switch-mode-power-supply|via| | <blockquote>
<p>How to estimate the via pad diameter?</p>
</blockquote>
<p>The minimum via pad diameter is given by <a href="https://shop.ipc.org/ipc-2221/ipc-2221-standard-only/Revision-c/english" rel="nofollow noreferrer">IPC-2221</a> in sections 9.1.1 (land requirements) and 9.1.2 (annular ring requirements). For example, for level B class <strike>2</strike> 3 fabrication:</p>
<p><span class="math-container">$$\text{minimum via pad diameter} = \text{maximum finished hole diameter} + \text{0.35 mm (14 thou)}$$</span></p>
<p>For example, for a 0.25 mm (10 thou) diameter hole, use a 0.6 mm (24 thou) diameter pad. If you like, you can use a pad diameter larger than the minimum. For example our company uses the following in-house design rule for vias with large holes:</p>
<p><span class="math-container">$$\text{via pad diameter} = 1.9 \times \text{ hole diameter}$$</span></p>
<blockquote>
<p>How to decide the via hole diameter?</p>
</blockquote>
<p>There are three considerations:</p>
<ol>
<li>The PCB fabricators minimum and maximum via drill diameter, which are usually listed on their website.</li>
<li>The current carrying capacity of the via. The <a href="https://saturnpcb.com/saturn-pcb-toolkit/" rel="nofollow noreferrer">Saturn PCB Design toolkit</a> incorporates the design rules from <a href="https://shop.ipc.org/ipc-2152/ipc-2152-standard-only/Revision-0/english" rel="nofollow noreferrer">IPC-2152</a>, which is the correct standard to use.</li>
<li>For high speed signals you also care about via inductance and via resistance, which the Saturn PCB Design toolkit also gives you.</li>
</ol>
<p>Please note: According to <a href="https://shop.ipc.org/ipc-6012/ipc-6012-standard-only/Revision-f/english" rel="nofollow noreferrer">IPC-6012</a> Table 3.2, the minimum via plating thickness is 0.02 mm (0.79 thou), however the Saturn PCB Design toolkit uses a default via plating thickness of 0.0254 mm (1 thou). The IPC-6012 number is the correct one to use when calculating the via current carrying capability.</p>
<blockquote>
<p>If I am using parallel vias for high currents, will the current divide equally?</p>
</blockquote>
<p>In theory, if you have <strong>i</strong> current distributed over <strong>n</strong> vias then each via should be sized to handle <strong>i / n</strong> current. In actuality, more current will pass through the first via it encounters than the last via it encounters. There may be a rule in the IPC standards for this, but I've yet to see it. We use the in-house design rule that every via and trace should be sized with a maximum temperature rise of 10 °C. This gives a conservative number for via hole diameter. This gives use some headroom for cases like this.</p>
| <ol>
<li>How to estimate the via pad diameter? I am using pi*d = trace width I have decided but Saturn PCB Design calculator is giving very lower current value at that diameter.</li>
<li>How to decide the via hole diameter?</li>
<li>If I am using parallel vias for high currents, will the current divide equally?</li>
</ol>
| Via sizing and parallel vias | 2024-02-01T11:20:26.917 |
699719 | |pinout|hdmi| | <p>You cannot know before you buy the cable if it connects CEC or not. But it really should so either you have a damaged or non-compliant cable.</p>
<p>Yes, there is a specification for HDMI cables. And we cannot guess why your cable does not have CEC.</p>
<p>There are also cables that reportedly do not connect all ground pins, so depending if such non-compliant cables are used with non-compliant devices that also take liberties which ground pins they bother to connect, these may not work properly together.</p>
| <p>I have a question regarding HDMI cables. I recently purchased a cable that does not have the CEC pins connected with each other. However there are certain devices that use that pin and other cables also have that pin connected.</p>
<p>How do I know if an HDMI cable has all the pins connected to the plug, is there some kind of specification? Why does my cable not have that CEC pin connected, is it not compliant?</p>
| HDMI cable CEC not present | 2024-02-01T12:02:56.087 |
699724 | |rf|transmission-line|impedance-matching|microwave|smith-chart| | <p>You should read into quarter wave transformers and reflection coefficients. But it may be more intuitive to draw the circuit like first principles.</p>
<p><a href="https://i.stack.imgur.com/8QvFY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8QvFY.png" alt="Equivalent circuit for circuit 2 and 3" /></a>
RF doesn't work like DC. Imagine the transmission lines as coaxial cables. A short to GND is a 0 ohm resistor connecting inner/outer conductors. The power has to travel back to the source before it's really "gone".</p>
<p>First things first:</p>
<ul>
<li>Open circuits reflect back in phase - the reflection stays on the center conductor.</li>
<li>Short circuits reflect back 180 degrees out of phase. The signal travels from the short onto your outer conductor and then back to the source. This is equivalent to a <em>negative</em> signal traveling backwards on the center conductor.</li>
<li>Quarter wave transmission lines turn opens into shorts and shorts into opens (explained below).</li>
</ul>
<p><strong>Circuit 2 (Open stub):</strong>
<a href="https://i.stack.imgur.com/DE2M3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DE2M3.png" alt="Circuit 2" /></a></p>
<ul>
<li>The open at TL6 causes a reflection to come back in phase.</li>
<li>TL6 is 90 degrees, therefore the reflection sees a 180 degree phase shift before getting back to Node A.</li>
<li>The reflection add destructively at Node A which then looks like a virtual short. <strong>TL6 transformed an open into a short.</strong></li>
<li>The virtual short is then transformed into an open circuit by TL5 (same logic as above but explained more later).</li>
<li>Your Smith Chart shows an open circuit at 1 GHz for S33.</li>
</ul>
<p><strong>Circuit 3 (Short stub):</strong>
<a href="https://i.stack.imgur.com/WdVsU.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/WdVsU.png" alt="Circuit 3" /></a></p>
<ul>
<li>The short at TL9 causes signal to go into the return path. Or, said differently, a signal reflects back 180 degrees out of phase.</li>
<li>TL9 is 90 degrees, therefore the reflection sees another 180 degree phase shift before getting back to Node A.</li>
<li>The reflection adds constructively at Node A which looks like a virtual open. <strong>TL9 transformed a short into an open.</strong></li>
<li>An open at Node A is similar to if TL9 didn't exist and power is transferred to the load.</li>
<li>Your Smith Chart shows perfect 50 ohms at 1 GHz for S55.</li>
</ul>
<p>This repeats at integer multiples of 1 GHz.</p>
<p>Note: I've ignored impedance for simplicity. This is just for an intuitive explanation - no math :).</p>
| <p>Can someone please give me an intuitive explanation of shorted stub behaviour?</p>
<p><strong>NOTE:</strong> This is <strong>not</strong> a duplicate of <a href="https://electronics.stackexchange.com/questions/699657/intuitive-explanation-of-open-stub-behaviour">Intuitive explanation of open stub behaviour</a> which has been narrowed to focus on open stubs.</p>
<p><a href="https://i.stack.imgur.com/H7kmH.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/H7kmH.png" alt="enter image description here" /></a></p>
<p>I have the length-based mathematical derivation and explanation from my textbook, but I am looking for an intuitive one.</p>
<p>For example, for an open stub (circuit 2), I think of it as an open ended transmission line through which the wave travels and gets reflected due to the open end, hence travelling double the distance. The reflected wave (from the open stub) will come back, get evenly distributed to both sides (term 3 and term 4), hence adding to the total reflection and transmission. Hence, S33 should be greater than S11 (which it is as shown below) at every frequency.</p>
<p>But:</p>
<p><strong>How does shunt stub work? (I am not able to explain its behavior as to me it is a transmission line taking the signal straight to Ground)</strong></p>
<p><a href="https://i.stack.imgur.com/Jd05B.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Jd05B.png" alt="enter image description here" /></a></p>
| Intuitive explanation of shorted stub behaviour | 2024-02-01T12:50:25.210 |
699725 | |current-measurement|current-sensor| | <p>From the <a href="https://www.lem.com/sites/default/files/products_datasheets/la_25-p.pdf" rel="nofollow noreferrer">datasheet</a>, the sensor requires a supply of +/12V to +/-15V rather than +30V. In other words Rm must be returned to a voltage in the middle of Uc and -Uc.</p>
<p>The internal amplifier has to be able to drive the end of resistor far enough to cause enough current to flow through the feedback coil to null the field from Ip.</p>
<p>It certainly can't swing <em>beyond</em> the supply rails. It can't even quite get <em>to</em> the rails and it may not even be able to get <em>close</em> to the supply rails, depending on the design choices they made.</p>
<p>So, for example, if you have the resistor returned to -15V and you happen to have a negative current, the circuit will certainly not be able to balance. Returning it to 0V when you have 0 and +30 is the same thing.</p>
| <p>I am working on a project that requires non-contact current measurement. I found the LEM <a href="https://www.lem.com/sites/default/files/products_datasheets/la_25-p.pdf" rel="nofollow noreferrer">LA 25-P</a> active current transducer. I've put the connection diagram from the datasheet here.</p>
<p>My understanding is that putting a current Ip through the sensor results in a proportional current (in this case 1:1000) being generated at pin M. If pin M is put to ground across a known resistance Rm, a voltage difference is produced across Rm.</p>
<p>I've set it up with 30 V across the U+/U- pins (as per the datasheet) and have been able to put ~1 A through the sensor as a test current. The power supply I'm using across the sensor draws ~1 mA extra under this condition, but I can't get a voltage measured across Rm.</p>
<p>I have tried three different Rm values at, below, and above the specified resistance, but have not read any voltage. I also tried putting a multimeter in current mode in series directly between M pin and ground, but nothing measured.</p>
<p>Is there anything I might be missing, or is my understanding of the transducer incorrect? Where might the additional current draw be going other than through the M pin to ground?</p>
<p><a href="https://i.stack.imgur.com/AHADs.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AHADs.png" alt="enter image description here" /></a></p>
| Current transducer: no voltage | 2024-02-01T12:53:13.653 |
699726 | |operational-amplifier|circuit-analysis|oscillator|impedance|phase-shift| | <p>The key here is that the inverting input of the OpAmp is a "virtual ground". When the circuit is in regulation (closed-loop), the OpAmp regulates the voltage at the inverting input to be equal to that on the non-inverting input, which is connected to ground.</p>
<p>With that, your input impedance turns into this circuit:</p>
<p><img src="https://i.stack.imgur.com/Tv3Ki.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fTv3Ki.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>From there on, it's just a simple series / parallel configuration.</p>
<p>Note that you'll have to compute the current through C3, not the overall input impedance, because some of the current drawn from point X drains to ground before it reaches the OpAmp (and therefore contributes to lowering the input impedance while not contributing to the gain). The equivalent circuit remains the same, though.</p>
| <p>If I have a circuit like this, how can I obtain the loop gain, since the capacitors and resistors are not either in series or parallel? If the feedback resistance is <span class="math-container">\$R_f\$</span>, then I have something similar to the inverting configuration:</p>
<p><span class="math-container">$$
V_o = \cfrac{R_f}{Z_{eq}}V_I
$$</span></p>
<p>Where <span class="math-container">\$Z_{eq}\$</span> is the equivalent impedance in the input. But how can I get the expression for that input impedance for this configuration?</p>
<p>I know that the result should be:</p>
<p><span class="math-container">$$G(s) = \cfrac{s^3R^2C^3R_f}{3s^2R^2C^2+4sRC+1}$$</span></p>
<p><a href="https://i.stack.imgur.com/JMxnY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JMxnY.png" alt="enter image description here" /></a></p>
| Equivalent impedance for R-C configuration in op-amp input | 2024-02-01T12:59:13.480 |
699746 | |i2c|tvs| | <p>If the bus is kept on one PCB, without exiting it, then the combined ESD input protection of the MCU and the slave devices will do the protection job. How have you determined that you even need the clamp?</p>
<p>The clamp will be somewhere along the I2C bus, so if the bus is long, the clamp will mostly protect itself, and the trace inductances will make it "invisible" at the chips that are connected to the bus.</p>
<p>If somehow you've figured out that you need this protection, then you'll need a clamp very near to each IC connected to the bus. And you'll want an ESD gun and a proper wideband, high-voltage scope probing setup to measure what's going on - otherwise it'll be merely a "feel good" measure without practical impact.</p>
<p>The clamp has parasitic capacitance lower than a x10 scope probe input. Probing the I2C lines with a scope probe will affect them more than the clamp's capacitance will. In other words: the clamp is transparent to I2C signals, at any frequency supported by typical I2C systems.</p>
| <p>I'm dealing with an application where our microcontroller is communicating with a slave device over I2C at 100 kHz fairly close to the MCU (less than 10 cm).</p>
<p>Everything works fine, but once we include TVS diodes on the lines communication with our slave fails with no acknowledge.</p>
<p>Vdd = 3.3 V, f = 100 kHz</p>
<p>These are the TVSs we've tried that have caused issues:</p>
<ul>
<li><a href="https://www.digikey.com/en/products/detail/semtech-corporation/rclamp0582bqtct/4626645" rel="nofollow noreferrer">RCLAMP0582BQTCT</a></li>
<li><a href="https://www.digikey.com/en/products/detail/semtech-corporation/SR05-TCT/1000938" rel="nofollow noreferrer">SR05.TCT</a></li>
</ul>
<p>My thinking is that these are meant to protect high speed data lines and since we're only at 100 kHz, this causes problems. Am I correct in this?</p>
<p><strong>UPDATE</strong>: Turns out it had nothing to do with the RCclamp. The slave device had an address change and we had no idea. Still very useful answers here.</p>
<p><img src="https://i.stack.imgur.com/aHqvX.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2faHqvX.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
| Can TVS diodes interfere with I2C communication? | 2024-02-01T16:53:07.750 |
699752 | |analog|signal|thermocouple| | <blockquote>
<p>Why was such a connection made instead of using a single opamp as a differential amplifier?</p>
</blockquote>
<p>Discrete differential amplifier configurations are inherently more noisy, have worse CMRR, and have higher DC errors, than non-differential amplifiers. If you can set up an op-amp to do the amplification without taking the difference, and then follow it by a subtractor, that often yields better results. And that's what was done here.</p>
<p>In the circuit you refer to, LTC2057 is a regular inverting 250x amplifier, with the input and output referenced to the (-) thermocouple terminal instead of ground.</p>
<p>LT1991A has differential inputs, and takes the difference between the LTC2057 output and the (-) thermocouple terminal. The difference is then amplified.</p>
<p>If a circuit is easily amenable to <em>not</em> using a differential amplifier as the first stage, then it's worth considering not using the differential first-stage.</p>
<p>The so-called "standard" differential amplifier connection using 1, 2 or 3 discrete op-amps is hard to get to perform well. Yes, it is commonly shown in textbooks and teaching materials, but that doesn't mean it should be used without a proper error analysis. The error analysis usually shows that even a basic integrated instrumentation amplifier beats the pants off a textbook discrete solution in terms of DC errors and CMRR.</p>
<p>Yes, there are situations where differential first-stage amplification yields best results - it may be in a discrete form, or using an integrated instrumentation or differential input amplifier. As always: one has to understand the performance of various architectures, and choose one that fits the bill best for the level of performance needed.</p>
<p>Today there's plenty of cheap CMOS instrumentation amplifiers that have "jellybean" prices and those can be considered general purpose parts anytime you want to take DC or AC differences and amplify them. That was not the case 20 years ago. So, today, jellybean in-amps are worth using if the performance is sufficient, since they are easy to apply.</p>
<p>Analog CMOS facilitates in-amp architectures that perform very well given how cheap they are to manufacture, and don't even require tight resistor matching. For example, the input differential voltage can be converted to a current, and then that current goes through a transimpedance stage that provides voltage amplification. That can work from quite low voltages that would not have been feasible in bipolar technology without costing a whole lot and being finicky to apply. The "pinnacle" of low voltage bipolar is the LM10 op-amp - a rather complex part for being "just an op amp with a voltage reference".</p>
| <p>I am trying to design a thermocouple signal conditioner. I came across this structure on the Analog Devices LTC2057 typical application page.</p>
<p>Why was such a connection made instead of using a single op-amp as a differential amplifier? What is the purpose of the op-amps connected back to back in a thermocouple signal conditioner?</p>
<p>(LTC2057 High Voltage, Low Noise Zero-Drift Operational Amplifier)</p>
<p><a href="https://i.stack.imgur.com/AoZpL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AoZpL.png" alt="enter image description here" /></a>
Source: <a href="https://www.analog.com/media/en/technical-documentation/data-sheets/2057f.pdf" rel="nofollow noreferrer">LTC 2057 datasheet, page 26</a></p>
| What is the purpose of the op-amps connected back to back in a thermocouple signal conditioner? | 2024-02-01T17:22:38.227 |
699758 | |pic|input-impedance| | <blockquote>
<p>Would 100k Ohm resistor in series prevent such damage?</p>
</blockquote>
<p>3V AC is 4.2Vpp. 4.2V through 100kΩ to ground is 42μA - well below recommended or maximum input current ratings of pretty much any MCU's input pin.</p>
<p>So, yes, it will prevent damage from overcurrent and will prevent latchup.</p>
<p>If anything, you'll need to check if the RC time constant of the 100kΩ resistor in series with the input pin capacitance won't filter the signal out too much.</p>
<p>Suppose the input capacitance is 20pF - a ballpark value. <span class="math-container">\$20{\rm\,pF}\cdot100{\rm\,k\Omega}=2{\rm\,\mu s}\$</span>. The low-pass cutoff frequency is <span class="math-container">\$1/(2{\rm\,\mu s})=500{\rm\,kHz}\$</span>. If the AC signal is higher than that in frequency, it may end up too small to go past the input threshold and register as a logic 1 level.</p>
| <p>For example I'd like to apply AC voltage ~3V. Could I not detect, but simply connect to MCU? I'd measure positive side as regular ADC, but I simply do not want negative side of amplitude to damage it. Would 100k Ohm resistor in series prevent such damage?</p>
<p>Below is analog input model from datasheet of MCU:</p>
<p><a href="https://i.stack.imgur.com/unt4z.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/unt4z.png" alt="enter image description here" /></a></p>
| May I safely apply negative voltage to PIC's analog input? | 2024-02-01T17:58:07.757 |
699761 | |esp32| | <p>To make it easier to understand, redraw the circuit as follows and include two pull-up resistors from the right corner of the picture.</p>
<p><img src="https://i.stack.imgur.com/VXSa9.png" alt="schematic" /></p>
<p>Now you can see, that when DTR is high, EN pin will be the same as RTS signal (passing through Q1), while IO0 pin will be high (due to R7 pull-up) regardless of RTS.</p>
<p>When DTR is low, EN pin will be high (due to R11 pull-up) regardless of RTS, while IO0 will have inverted RTS signal (inverted by Q2).</p>
| <p>Can someone please explain how the marked part of the circuit works.</p>
<p><a href="https://i.stack.imgur.com/poeHd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/poeHd.png" alt="enter image description here" /></a></p>
<p>This is the original schematic from Espressif for the ESP32 dev. board.</p>
<p>source: <a href="https://dl.espressif.com/dl/schematics/ESP32-Core-Board-V2_sch.pdf" rel="nofollow noreferrer">https://dl.espressif.com/dl/schematics/ESP32-Core-Board-V2_sch.pdf</a></p>
| ESP32 Dev board NPN Circuit | 2024-02-01T18:37:44.823 |
699791 | |ldo| | <p>There are a few challenges in using a BJT as a switch in this way, one of which is that the base-emitter junction is basically a diode and the base current has to come out of the emitter alongside the collector current. A better configuration grounds the emitter instead so that this doesn't matter:</p>
<p><a href="https://i.stack.imgur.com/22ch8.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/22ch8.jpg" alt="enter image description here" /></a></p>
<p>Obviously this means that the function of the BYPASS input is now inverted compared to the original design as the switched resistor is now in the bottom half of the divider.</p>
<p>As noted in the comments, a BJT doesn't produce a Vce of zero in saturation, although you could calculate the switched resistance to compensate for this to some degree as you know that the ADJ pin will sit around 1.2V for proper regulation.</p>
<p>Alternatively, replace Q1 with an N-channel MOSFET which can produce a lower Vds. Ensure that it will be turned on sufficiently at the value of Vgs you'll be using to produce a low enough Vds for your needs (i.e. don't just look at the threshold voltage which is typically defined for a drain current of 100uA).</p>
| <p>I'm designing an LDO power supply that is adjustable, I want to be able to switch between two output voltages using a MCU.
I've designed the following circuit but can't test it as the parts are on order, do you think this circuit will work?</p>
<p>R1 and R2A+R2B form the feedback resistor divider for the LDO. The initial output voltage is set with both R2A and R2B values added up, and the output voltage is adjusted by turning on Q1 to short R2B.</p>
<p><a href="https://i.stack.imgur.com/Eip1G.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Eip1G.jpg" alt="LT1965 Transistor Adjustable" /></a></p>
<p>I've searched and could not find similar circuits.</p>
<p>LDO LT1965:
<a href="https://www.analog.com/media/en/technical-documentation/data-sheets/1965fb.pdf" rel="nofollow noreferrer">https://www.analog.com/media/en/technical-documentation/data-sheets/1965fb.pdf</a></p>
<p>Thanks</p>
| Adjusting LDO voltage with a transistor | 2024-02-01T21:29:37.160 |
699792 | |operational-amplifier|circuit-analysis|differential-amplifier| | <p>Start by examining each half in isolation, as voltage dividers:</p>
<p><span class="math-container">$$\begin{align*}
v_-&=\frac{v_n\,\cdot\, Z_{rn}\,+\,v_s\,\cdot\,Z_n}{Z_n\,+\,Z_{rn}}
\\\\
v_+&=\frac{v_p\,\cdot\, Z_{rp}\,+\,v_s\,\cdot\,Z_p}{Z_p\,+\,Z_{rp}}
\end{align*}$$</span></p>
<p>Then, since the opamp attempts to keep this equal to each other, simply set them equal:</p>
<p><span class="math-container">$$\frac{v_n\,\cdot\, Z_{rn}\,+\,v_s\,\cdot\,Z_n}{Z_n\,+\,Z_{rn}}=\frac{v_p\,\cdot\, Z_{rp}\,+\,v_s\,\cdot\,Z_p}{Z_p\,+\,Z_{rp}}$$</span></p>
<p>And then solve for <span class="math-container">\$v_s\$</span>:</p>
<p><span class="math-container">$$v_s=\frac{v_p\cdot\left(1+\frac{Z_n}{Z_{rn}}\right)-v_n\cdot\left(1+\frac{Z_p}{Z_{rp}}\right)}{\frac{Z_n}{Z_{rn}}-\frac{Z_p}{Z_{rp}}}$$</span></p>
<p>However, this only works when <span class="math-container">\$\frac{Z_n}{Z_{rn}}\gt\frac{Z_p}{Z_{rp}}\$</span>. Otherwise, with the denominator negative, a positive change in <span class="math-container">\$v_p\$</span> would be met by a negative change in <span class="math-container">\$v_s\$</span> (wrong direction) or a positive change in <span class="math-container">\$v_n\$</span> would be met by a positive change in <span class="math-container">\$v_s\$</span> (also the wrong direction.) And, of course, <span class="math-container">\$\frac{Z_n}{Z_{rn}}=\frac{Z_p}{Z_{rp}}\$</span> is forbidden as well since that would be division-by-zero.</p>
<p>Here's an example run where <span class="math-container">\$v_s=3.5\times di\!f\!f\$</span> where <span class="math-container">\$-3\:\text{V}\le di\!f\!f\le 3\:\text{V}\$</span>:</p>
<p><a href="https://i.stack.imgur.com/RcfCL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RcfCL.png" alt="enter image description here" /></a></p>
| <p>I was (re)doing some electronic learning, and tried to come with a "general solution" for all op-amp circuits.</p>
<p>I thought I could do so by having an op-amp with both negative and positive feedback, and both voltage accross + and -.</p>
<p>But, when I combine both equations V+ - Vs and V- - Vs, I end up with a solution where Vs cancel out. Am I missing something? In this general case, is V+ - V- still equal to zero?</p>
<p><a href="https://i.stack.imgur.com/RwR5t.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RwR5t.jpg" alt="enter image description here" /></a></p>
| Op-amp question: Is this circuit possible? | 2024-02-01T21:31:54.937 |
699811 | |pwm|mosfet-driver|emc|ringing| | <blockquote>
<p>I want to transmit three 5V 32kHz PWM signals, with fast rise and fall times (approx. 10ns)</p>
</blockquote>
<p>That's a bit of a "doctor, it hurts when I do that" situation. There's no good reason to send this stuff with such fast edges. The slew rates have to be controlled, otherwise it won't work. You'd need a slew-rate controlled cable driver.</p>
<p>EMI will also be a problem, and the receiving end will be susceptible to noise pickup. Not good. You'd want the mosfets to be shut down when the cable is unplugged. So you really need an off-the-shelf solution that provides that.</p>
<blockquote>
<p>with one of the middle two wires as common ground</p>
</blockquote>
<p>There will be crosstalk between those signals because of that, and it'll be hard to manage unless the edge rates are controlled.</p>
<blockquote>
<p>On the receiving end, there will be a high input impedance mosfet driver</p>
</blockquote>
<p>That's not going to work well, as you have noticed.</p>
<p>Telephone cable is a bit weird, since it really complicates things, and it's on its way out. It'll be cheaper to use Cat-5 cable. At least when it breaks in the field, they'll have decent replacements available.</p>
<p>With a telephone cable, most likely it'd get unplugged out of some crusty old phone (in industrial settings - I've seen that happen).</p>
<p>With Cat-5, three RS-485 transceivers will do the job very well, one channel per twisted pair. Moreover, there is a variety of fail-safe transceivers that output idle state (logic high) when either conductor of the differential pair is disconnected, or when the differential pair is shorted together. That way the gate drivers will be in a deterministic state with cable unplugged or faulty. You may need an inverter between the receiver and the gate driver - depending on what's the "gate off" input level of the driver.</p>
<p>The fourth pair can be ground+power. Ensure termination on the receiving end, just in case someone was to use a cable longer than 2m. Then, with termination, the cable could be 1000ft long and the signal fidelity would be still usable on the receiving end.</p>
<p>The transceivers are specified for various data rates, and you'll do just fine with those that are rated for 0.5..1Mbit/s.</p>
<p>You could also use LVDS transceivers, but in an industrial/power application, RS-422 levels are more reasonable, and the transceivers are available in various levels of ESD hardening.</p>
<p>If you go for LVDS, then Cat-5(and higher), HDMI and USB-C 3.1 or better cables will all work well, since they have impedance-controlled differential pairs. I have no idea to what extent LVDS receivers deal with cable failures. LVDS is used for clocked data, often with error protection, so a "stuck low" or "stuck high" failure would be inconsequential, but when used for power device control, this would be bad news.</p>
| <p>I want to transmit three 5V 32kHz PWM signals, with fast rise and fall times (approx. 10ns), over a 2m long, 4 wire telephone cable (RJ11), with one of the middle two wires as common ground. The signals will be generated by an ATmega328P.</p>
<p>On the receiving end, there will be a high input impedance mosfet driver for each of the three signals (UCC27517A).</p>
<p>Should I be worried about the reflections and subsequent ringing that may occur?
If so, how to combat them?</p>
<p>While researching this, I came across two different solutions:</p>
<ol>
<li><p>An RC snubber network (taken from <a href="https://electronics.stackexchange.com/questions/592378/can-i-send-pwm-through-1-meter-cable">Can I send PWM through 1 meter cable?</a>):
<img src="https://i.stack.imgur.com/Fskg6.png" alt="RC snubber" /></p>
</li>
<li><p>An RC low pass filter (taken from <a href="https://www.ti.com/lit/ds/symlink/ucc5390.pdf" rel="nofollow noreferrer">https://www.ti.com/lit/ds/symlink/ucc5390.pdf</a>, section 9.2.2.1):
<img src="https://i.stack.imgur.com/sgGtP.png" alt="RC low pass filter" /></p>
</li>
</ol>
<p>From my understanding, both solutions will limit the ringing, but which one should I use and why?</p>
| Transmitting PWM over a long cable, how to prevent ringing? | 2024-02-02T00:56:03.587 |
699824 | |microcontroller|oscillator|crystal|microprocessor| | <p>This is an ARM MCU and like most of them, it is no different.</p>
<p>The IO pins which are used for crystal are standard GPIO pins unless software decides to configure them for crystal use. The GPIO pins used by crystal are not even labeled "5V tolerant" so they can only handle same logic levels as VDDIO.</p>
<p>Feeding in a 3.3V clock may damage the MCU.</p>
<p>Yes, the clock should use VDDIO as supply.</p>
| <p>I am using a <a href="https://www.microchip.com/en-us/product/PIC32CZ8110CA90208?_ga=2.228789209.452720271.1706684652-2052799221.1706684652" rel="nofollow noreferrer">PIC32CZ8110CA90208-I8MX-SL3</a> in my design. I am providing a supply of 1.8 V to VDDIO.</p>
<p>The oscillator used is a <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/DSC60xxB-Ultra-Small-Ultra-Low-Power-MEMS-Oscillator-DS20006133A.pdf" rel="nofollow noreferrer">DSC6011JI2B-012.0000</a>.</p>
<p>Can I supply 3.3 V to oscillator VDD and 1.8 V to microcontroller VDDIO?</p>
<p>Will this cause any issues?</p>
<p>Is it necessary that oscillator supply should be equal to IO supply?</p>
| Do we need to provide same voltage for microcontroller I/O and oscillator? | 2024-02-02T04:45:32.573 |
699826 | |power-supply|switches|power-electronics|switch-mode-power-supply|circuit-protection| | <p>Apart from current draw surges another problem is that damage may occur if inputs to chips on the inserted board are powered up before the chips themselves are powered up. Typically chips can tolerate only 0.3 to 0.7 V above V<sub>CC</sub> or below ground.</p>
<p>When the recommended procedure is followed the power will rise on all boards simultaneously and so any signal from one board to another would always be within the power-rail voltages.</p>
| <p>I fail to understand the difference/challenges between the two situations.</p>
<p>Plugging a unit (or circuit card) to a live backplane.</p>
<p>Vs</p>
<p>Plugging it to a dead bus (or inactive power supply) and then turning ON.</p>
<p>I can imagine a contact debounce/glitches while inserting to a live source. Is that all?
I see many hot swap controllers specifically designed for the former case.</p>
| How is live-plug in (hot-swap) different from regular powering ON of a module? | 2024-02-02T05:32:15.420 |
699827 | |transistors|amplifier|substitution| | <p>That design from Hood looks a little off, to me. Partly because I think the 2N3906 may <em>run out of gas</em> given certain drive cases. It also seems to be running very hot (a bit high on the quiescent current side of things) than is strictly necessary. But these are just quick mental sanity checks and I can't be sure without building one and/or running Spice on it. And I won't bother because I'd rather just offer something that I have tested.</p>
<p>As far as using the 2SC5200, I don't imagine problems in the following design I'll offer, as I've included a Miller cap to roll off circuit response. Using them below should be just fine. Just keep in mind that these devices are in a class-A amplifier and will be dissipating maybe <span class="math-container">\$15\:\text{W}\$</span> each. So give them some serious heat-sinking capacity.</p>
<p>Here's what I'd suggest trying:</p>
<p><a href="https://i.stack.imgur.com/nibhF.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/nibhF.png" alt="enter image description here" /></a></p>
<p>I've bootstrapped the <span class="math-container">\$8\:\Omega\$</span> speaker as this turns <span class="math-container">\$R_1\$</span> into a semi-decent (and very cheaply used) current source. <em>(If you understand that <span class="math-container">\$C_{_\text{BOOT}}\$</span> will acquire a relatively stable voltage difference across it and accept that the <span class="math-container">\$V_{_\text{BE}}\$</span> of <span class="math-container">\$Q_1\$</span> is also relatively stable, you can see that the voltage across <span class="math-container">\$R_1\$</span> should be similarly relatively stable.)</em></p>
<p><span class="math-container">\$R_1\$</span> will set the quiescent state of <span class="math-container">\$Q_1\$</span> and <span class="math-container">\$Q_2\$</span>. If you increase its value, those two BJTs will run cooler. But depending on the voltage gain and signal input, that also could mean running out of drive current for the speaker and the resulting distortion. Lowering its value will run things hotter and provide more <em>steam</em> needed to avoid distortion. It's your call here. But feel free to make small adjustments to <span class="math-container">\$R_1\$</span>, one way or another, per your needs. I've set <span class="math-container">\$R_1\$</span> to run things a little on the cooler end. But if you are driving the speaker hard, you may need to lower its value a little. Just FYI.</p>
<p>The voltage gain can also be changed by adjusting <span class="math-container">\$R_4\$</span>. <em>(I've get the voltage gain to about <span class="math-container">\$16\times\$</span> or about <span class="math-container">\$24\:\text{dB}\$</span> as <span class="math-container">\$R_4\$</span> and <span class="math-container">\$R_3\$</span> form up a voltage divider that reduces the output signal by that much.)</em></p>
<p>Per the instructions you see for Dr. Hood's design, you should adjust <span class="math-container">\$R_6\$</span> in the above schematic to get the collector node shared by <span class="math-container">\$Q_1\$</span> and <span class="math-container">\$Q_2\$</span> to about half the supplied <span class="math-container">\$V_{_\text{CC}}\$</span>. This allows near the maximum output swing without running against the rails.</p>
| <p>Can I substitute a 2SC5200 for the 2N3055, without any other modifications to the following amplifier circuit? Input voltage is 24 V and biased to run at 1.2 A.</p>
<p><a href="https://i.stack.imgur.com/nZmKu.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/nZmKu.png" alt="enter image description here" /></a></p>
<p>schematic source : <a href="https://sound-au.com/jll_hood.htm" rel="nofollow noreferrer">https://sound-au.com/jll_hood.htm</a></p>
| Substitute 2N3055 with 2SC5200 in the John Linsley Hood 1969 amplifier circuit | 2024-02-02T05:44:27.210 |
699852 | |voltage-divider| | <p>I can think of two possible reasons-</p>
<ol>
<li><p>the capacitors could be damaged and leaky.</p>
</li>
<li><p>the ESP32 ADC input (like most unbuffered SAR converters, though this is not a particularly impressive one) draws a certain amount of current every time you make a measurement. There's a small capacitor that needs to be charged through a resistor (14pF and 1kΩ if memory serves). You have a relatively high impedance divider (16kΩ+), so depending on how you are using the ADC (measuring rate etc.) you can have effects like this.</p>
</li>
</ol>
| <p>Ran into a bit of a strange issue with a voltage divider. I take the voltage of a single cell li-ion and divide it down to a 0 - 3V range so it can be read by an ESP32, I then multiply this voltage by a fixed constant to know what the battery voltage is.</p>
<p>This same circuit has been built on 50+ PCB's but I'm only seeing the issue on 2 specific boards. There is a parallel capacitor for some filtering, but on these 2 specific boards, with this capacitor fitted the voltage reported by the ESP32 is incorrect. Not by a huge amount, in the region of ~200mV.</p>
<p>If I remove the capacitor the voltage is reported correctly.</p>
<p>What I'm struggling to understand is how a parallel capacitor which should in theory be open circuit at DC, is affecting the voltage divider circuit.</p>
<p>Is anyone able to shed any light on why this is happening?</p>
<p>EDIT: Capacitor used is an 0402 X5R 10uF 6.3V MLCC - Kemet C0402C106M9PACTU <a href="https://www.mouser.co.uk/datasheet/2/447/KEM_C1006_X5R_SMD-3316465.pdf" rel="nofollow noreferrer">(Datasheet)</a> <a href="https://search.kemet.com/component-documentation/download/specsheet/C0402C106M9PACTU" rel="nofollow noreferrer">(Spec sheet)</a></p>
<p><a href="https://i.stack.imgur.com/1B405.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1B405.png" alt="enter image description here" /></a></p>
| Parallel capacitor affecting voltage divider circuit | 2024-02-02T10:59:47.657 |
699865 | |transformer|mains|protection| | <p>This is just barely an answer, but it seems too much for a comment:</p>
<p>You might consider an automatic 120/240V switching device.</p>
<p>There used to be, I think, components of this description... I only know of one, in my TDS460 oscilloscope: the power supply is a forward converter, in the style familiar from PC power supplies, with the optional voltage doubler style full-wave rectifier. What they did is, there is a TRIAC-based switching module, that, depending on input voltage, automatically shorts out what would otherwise be the 120/240 switch.</p>
<p>Afraid I don't remember the part number, and I'm not going to take apart the equipment right this instant just to find it... but perhaps this jogs someones' memory.</p>
<p>I haven't seen such a component in catalogs, not to say they don't exist, but they are certainly in low demand these days, with the prevalence of APFC input SMPS. Perhaps you would need to make your own anyway, as many more TRIACs are needed to switch a dual-primary transformer; or perhaps to prefer a relay or other switching means. And at that point, perhaps the BOM count goes too high to bother. Or perhaps the single module is too expensive anyway (it is odd that you only mention BOM count, not cost at all, but perhaps both are indeed a concern).</p>
<p>I would simply recommend an SMPS: they are widely available, highly effective, and are available with, or can be filtered to, low noise levels. It's not clear what, if anything, you're ultimately doing with the AC output, maybe this isn't feasible or effective, but as it's a common use-case, I will leave it for completeness.</p>
| <p>You have a mains transformer with switchable inputs, 120V and 230V.</p>
<p>In case somebody switches the input to 120V and applies 230V (which cannot be mechanically prevented, reasonably), the whole assembly should not go up in flames. I want something well-defined to happen that protects the circuit. Blowing the fuse is acceptable.</p>
<p>I think there must be a simple, low BOM-count solution, but I cannot think of it.</p>
| Mains transformer input overvoltage protection | 2024-02-02T13:23:28.513 |
699881 | |mosfet|negative-voltage|isolated| | <p>Yes, the MOSFET will be definitively on, at least for any reasonable load currents.</p>
<p>The given transistor has extremely low Rds(on), so unless the load current is very large, Vds will be quickly pulled to zero, thus setting Vgs to a well-defined 10V, putting the transistor in the resistive "on" region.</p>
<p>I suppose a faulted load might deliver enough current to raise questions, but notice in that case, Vgs merely increases in step with Vds, saturating* it harder, at least until Vgs(max) is exceeded and destruction occurs (at which point, the transistor will simply remain on forever).</p>
<p>Also, a fault current might not be considered "reasonable", so there is that. :)</p>
<p>There's also the case where <code>VCC</code> could be negative, and the load current [magnitude] large; here, the body diode limits voltage to -- well, we're talking hundreds of amperes now, and a volt or two drop will similarly lead to destruction within a few seconds, perhaps. But I don't see how the transistor would be anything but "very on" in the scenario (-2V D-S is still +8V G-S).</p>
<p>*I've had enough "FET saturation" nonsense; let "saturation" mean drain voltage saturation, in the consistent way it should've always meant.</p>
<p>As for how it gets there, that's a different problem.</p>
<p>Assuming the transistor, VCC and load are physical objects somewhere, and the "isolated power supply" is a typical mains-powered SMPS, and assuming a typical wiring condition:</p>
<p>The transistor probably blows up, or at least has a good chance to.</p>
<p>We can draw an equivalent circuit like so. To take stock of all effects, we must model the common mode capacitance between the power supply and <code>VCC</code>/<code>GND</code>, and the switching order of both drain and gate connections -- in general, one will mate before the other, and probably multiple times at that (contact bounce).</p>
<p><img src="https://i.stack.imgur.com/Kjdcy.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fKjdcy.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The inductors are typical of about a half-meter of wiring, and C1, L3 and R2 represents the common-mode, ground-return, or impedance through space between the two power supplies. V3 represents the random common mode voltage between circuits, generally about half the local mains voltage, but it can be more or less -- particularly if the supply has gained an electrostatic charge, or if it's actually common-ground with the other circuit (perhaps through a high resistance, so as not to short it out).</p>
<p>Important variables are the phasing of V3, and the relative timing of SW1 and SW2. I suggest playing around in the simulation. Here is a typical result:</p>
<p><a href="https://i.stack.imgur.com/FUaar.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/FUaar.png" alt="enter image description here" /></a></p>
<p>Notice Vgs goes sharply negative, roughly as a divider between C1 (and its initial charge) and M1's Ciss. Depending on which wire connects first, initial Vds, V(C3), etc., this voltage may or may not appear. In general, the transients due to real wiring can be much worse than this, so I would expect the transistor has a good chance of being damaged in practice.</p>
<p>The experiment can be carried out safely if a simple gate protection circuit is added: say, a series 100 ohm resistor, a shunt zener diode from source to gate (say 12V), and another series resistor (at least an ohm) to the gate. (The resistor between zener and MOSFET dampens the LC loop that would otherwise be created, liable to oscillate at 100s of MHz during turn-on.) With a suitable rated zener (zener-type TVS), and a tight layout, this can be done even in the presence of ESD (say the supply is a battery held in hand, carried on top of carpet during a low-humidity winter..).</p>
| <p>This is probably crazy, but: What would happen if I apply a negative voltage between the drain and the gate of a MOSFET (or positive from gate to drain), assuming that this voltage comes from an isolated power supply?</p>
<p>Does the source act as connected to the 0 V plus the "MOSFET diode forward voltage" (let's say 1 V), meaning that Vgs would be around 9 V? And in consequence the MOSFET would be on?</p>
<p><a href="https://i.stack.imgur.com/DOLGj.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DOLGj.png" alt="enter image description here" /></a></p>
<p><a href="http://www.hymexa.com/uploadfile/202101/76b96ec6c827d.pdf" rel="nofollow noreferrer">HY4008B6 datasheet</a></p>
| Isolated negative Vdg on MOSFET | 2024-02-02T15:31:04.077 |
699888 | |power|rf|radio|mixer|ham-radio| | <p>RSRP is short for Reference Signal Received Power, used when measuring 4G LTE networks. A cellular phone or another LTE-equipped device would display signal strength in RSRP, measured 0dBm (best signal) to -110dBm (weakest/no signal). An RSRP of -95dBm would be a strong signal whereas -115dBm would be very weak.</p>
<p>Maybe I should follow this for my design on 180MHz.</p>
| <p>In conventional electrical signal chain design, we now exactly what is the amplitude of signal in any node, from source to load. In radio frequency circuits which contains antenna. We don't know the exact amplitude (though instead of amplitude they engage power amplitude).</p>
<p>Then, how we should set our required gain in radio frequency circuit stages?</p>
<p>In other word:
Someone asked me to design RF receiver. And I don't know what the power after antenna would be? I am not subjected to that hypothetical transmitter, where the employer having in his mind. And Have you any estimate of that power in mind, as a rule of thumb. For example in horrible conditions the power should be ...dBm and in excellent condition it can be ...dBm?</p>
<h2>Update</h2>
<p>I've found my Android phone receiving power called rsrp is about -80 to -90 dBm. Maybe thats my answer.</p>
| RF signal chain gain | 2024-02-02T16:36:47.427 |
699898 | |mosfet|diodes|power-electronics|identification|buck| | <ul>
<li>The MOSFET is a <a href="https://www.vishay.com/docs/67030/si2318cds.pdf" rel="nofollow noreferrer">Si2318CDS</a> from Vishay Siliconix (P9 is the significant code here).</li>
</ul>
<p>picture from <a href="https://jlcpcb.com/partdetail/VishayIntertech-Si2318CDS_T1GE3/C14498" rel="nofollow noreferrer">LCSC</a>:
<a href="https://i.stack.imgur.com/qp8kn.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qp8kn.png" alt="enter image description here" /></a></p>
<ul>
<li>The diode is a <a href="https://www.onsemi.com/pdf/datasheet/nsr0340h-d.pdf" rel="nofollow noreferrer">NSR0340HT1G</a> from ONSEMI. (AD is the significant code here, the last character contains assembly location or date code information).</li>
</ul>
<p>Note: Please verifiy that the package is a SOD-323.</p>
<p>picture from <a href="https://jlcpcb.com/partdetail/Onsemi-NSR0340HT1G/C90392" rel="nofollow noreferrer">LCSC</a>:
<a href="https://i.stack.imgur.com/QBBR1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QBBR1.png" alt="enter image description here" /></a></p>
| <p>I need help identifying a MOSFET and a diode in a circuit, specifically on the Pololu board <a href="https://www.pololu.com/product/2850" rel="nofollow noreferrer">D24V25F5</a>.</p>
<p>While researching, I came across information about a diode (NSVR0340) with the AD4 marking. However, the diode in my circuit is marked as AD6, and I'm uncertain if this difference is significant.</p>
<p>Additionally, I've encountered difficulty in finding any markings on the MOSFET used in the circuit.</p>
<p>Any assistance in correctly identifying these components and understanding the significance of the marking differences would be greatly appreciated.</p>
<p><a href="https://i.stack.imgur.com/dQVg5.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/dQVg5.jpg" alt="enter image description here" /></a></p>
| Identifying MOSFET (P9DVA) and diode (AD6) Markings | 2024-02-02T17:27:03.537 |
699903 | |voltage|power|capacitor|transformer|spark| | <p>I didn't work directly in MV/HV applications but was responsible for organising maintenance of half a dozen 10 kV, 1 MVA - 2 MVA transformers on an industrial site.</p>
<blockquote>
<p>What is the actual purpose of a capacitor coupled voltage transformer in a substation.</p>
</blockquote>
<p>They offer a means of measuring voltage or phase indication without the power dissipation of a resistor and without the high-voltage problems with connecting a signal transformer to the MV/HV supply. (Think of how you would insulate the primary windings on a 5 VA instrumentation transformer!)</p>
<blockquote>
<p>What I do know is they offer low impedance to the very high frequency signal, so it does not get into the substation and damage any equipment. What happens to this signal after it takes the path of the CCVT? Does it just dissipate?</p>
</blockquote>
<p>I'm not sure what this knowledge is related to. Certainly a capacitor across the lines will offer a low impedance to noise / HF on the line but they'd need to be huge to handle transients. I was shown capacitor couplers used to inject and receive data communication over the HV transmission network. Capacitors are generally designed to have low internal resistance so power dissipation is not (usually) a problem.</p>
<blockquote>
<p>Secondly, the system voltage is stepped down to a more usable voltage of 115/69V through the means of capacitor stacks and windings. What I don't know is, what is this secondary voltage used for?
Does this secondary voltage power equipment, or is the voltage used as a signal for metering/relaying?</p>
</blockquote>
<p>It's used for metering and monitoring (over / under-voltage, earth faults, etc.).</p>
<blockquote>
<p>Lastly, I know CCVT's have a spark gap device that fires when a transient occurs usually due to a fault. My questions are, why does the spark gap fire during an overvoltage, and what is the purpose of it firing?</p>
</blockquote>
<p>The gap is set at a distance calculated to break down at a certain voltage. This will be set at a voltage higher than the normal operating voltage but lower than the maximum withstand voltage of any devices that it is protecting. This includes transformers, switchgear, overhead line insulation, underground cable installation, customer supply, etc.</p>
<blockquote>
<p>I know that a spark gap misfiring or not firing when it should creates carrier holes in the communication system,</p>
</blockquote>
<p>"Carrier holes"? Interruptions, maybe, but I'd expect it to interruptions to be worse when the spark gap is breaking down as the corona will introduce a lot of noise.</p>
<blockquote>
<p>... but I don't know how or why the spark gap is firing to begin with,</p>
</blockquote>
<p>Overvoltage due to lightning or network faults.</p>
<blockquote>
<p>... and what information is being relayed to what when it does fire?</p>
</blockquote>
<p>The spark gaps do not relay information. They protect the line and the equipment.</p>
| <p>What is the actual purpose of a capacitor coupled voltage transformer in a substation?</p>
<p>What I do know is that they offer low impedance to the very high frequency signal, so it does not get into the substation and damage any equipment. What happens to this signal after it takes the path of the CCVT? Does it just dissipate?</p>
<p>Secondly, the system voltage is stepped down to a more usable voltage of 115/69V through the means of capacitor stacks and windings. What is this secondary voltage used for? Does this secondary voltage power equipment or is the voltage used as a signal for metering/relaying?</p>
<p>Lastly, I know CCVTs have a spark gap device that fires when a transient occurs usually due to a fault. Why does the spark gap fire during an overvoltage? What is the purpose of it firing? I know that a spark gap misfiring or not firing when it should creates carrier holes in the communication system, but I don't know how or why the spark gap is firing to begin with, and what information is being relayed to what when it does fire.</p>
| How does a capacitor coupled voltage transformer (CCVT) and spark gap work? | 2024-02-02T17:52:08.683 |
699910 | |operational-amplifier|headphones|ne5532| | <p>The problem is that your power rails are 12V and GND, and your inputs are biased to GND. As such, your inputs will typically be either outside of, or occasionally just within, their limits. Your op amp isn't rail to rail input range; at +/-15V power, it could have as little as +/-12V dynamic range. I wouldn't count on more than 3-9V at 12V. (A rail to rail op amp would help a lot here.)</p>
<p>The bottom line is, add a negative supply or bias the inputs to 6V. There's multiple options for that:</p>
<ol>
<li>You can add a 3rd op amp, direct negative feedback and a divider on the + input at 6V. R1, R2, R5, and R6 can then be connected to 6V instead of GND.</li>
<li>You can replace each of R1, R2, R5, and R6 with dividers of resistors double their current value (200K for R1/2 and 2K for R5/6). Each divider should have a resistor going to 12V and a second going to GND.</li>
</ol>
<p>You might also consider an op amp designed for a lower operating voltage, and think about one with rail-to-rail performance if you want more than 6VP-P out.</p>
| <p>I've built this little amp around the classic CMOY design, but don't seem to be getting any output except for a tiny distorted signal, in both unity and with 10 kΩ resistor position on the relay.</p>
<p>If I bypass the input caps the signal does seem better, but possibly still a little distorted. The caps are definitely fine.</p>
<p>I've used this basic design before with the only difference being the single sided PSU and the relay to vary the feedback.</p>
<p>Any help solving the issue would be much appreciated.</p>
<p><a href="https://i.stack.imgur.com/64pvR.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/64pvR.jpg" alt="enter image description here" /></a></p>
| Tiny/no output from CMOY headphone amp | 2024-02-02T18:28:53.040 |
699925 | |stm32|uart|communication|rs232|register| | <p>Blocking transmit using the UART register interface works something like this (after everything like baud rate is configured):</p>
<ol>
<li>Loop reading the UART status byte, until the "transmit empty" flag is set.</li>
<li>Write one character to the data holding register</li>
<li>Repeat steps 1 and 2 until the end of the message is reached.</li>
</ol>
<p>Code example</p>
<pre><code>for( const char* p = msg; *p; ++p ) {
while ((USARTn->SR & USART_SR_TXE) == 0) {}
USARTn->DR = *p;
}
</code></pre>
<p>A more complete solution would limit the time spent waiting for the UART to become ready, in case it wasn't correctly configured or was stopped by flow control.</p>
| <p>I am writing register level code for STM32F4 & in my code there is a timer for calculation of the frequency of an input signal.<br />
I am trying to implement a UART for sending calculated data to another MCU.<br />
The other MCU is an Arduino and it has the desired program in it for receiving a value (in code there is a start and finish bits for every taken value, for example Frequency is 10kHz, sending value should be like that "/10000*".<br />
The Arduino program is written with libraries. There is just serial.read, serial.being stuff in here. I want to write my STM code in register level and without libraries.<br />
I know details of UART and I set the required bits for config of the UART. I am stuck with the part of how STM convert the data to bits of the UART, like using ASCII or something I can't find.<br />
For example sending "hello world" since there is no parallel communication in here, sending everything singularly like sending 'h' after that 'e' goes like this? Thank you for reading.<br />
NOTE: I am not using interrupt or DMA. sending a data in loop for now.<br />
NOTE2: I am planning to use RS232 between MCUs.</p>
| STM32 UART without HAL library | 2024-02-02T21:04:17.310 |
699944 | |contact|spike|edge-detection| | <blockquote>
<p>I want to be sure the 24 contacts will never ever create a slight
contact <strong>that could be interpreted by the MCU as an input signal</strong></p>
</blockquote>
<p>From your question, what you are trying to detect during environmental testing is:</p>
<ul>
<li>Are there false switch presses long enough for MCU will respond to (a system test)</li>
</ul>
<p>Rather than "Will the switches ever produce a false press even as a fast glitch" (just a test of the switch component).</p>
<hr />
<p>You describe the switch inputs as going into an MCU. It is unlikely that the MCU will use the switch levels directly without first debouncing the switch levels. (To see it another way, if your MCU doesn't debounce input switch levels then it almost always should.)</p>
<p>A typical debouncing method is to repeatedly read a switch level and only accept it as pressed/released when seen as steady for a period on many milliseconds. So the MCU would not respond to microseconds-long glitches from switches. There's then no point detecting such events as they would not be fault conditions, they would be switch noise rejected by the debouncing filter. Reporting them as faults would instead be a failure of the test process.</p>
<p>The first thing to establish is how your MCU's switch input debouncing works. You can do this several ways:</p>
<ul>
<li>Inspection. The MCU spec' or software source files will tell you.</li>
<li>Empirical testing. Connect a pulse generator to a switch input and deliver increasingly long pulses until the switch input is recognised. With debouncing, it is likely that 10 us would be ignored while 50 ms will be recognised.</li>
</ul>
<p>From that, you can specify and make a circuit that only responds to switch pulses that your MCU would respond to.</p>
<p>Having noise in a system is not a fault or test failure. There's noise on the supply rails, noise on inputs and outputs. The faults and failures are from having noise that (a) interferes with system behaviour or (b) reduces the quality of the system function to an unacceptable level.</p>
| <p>I have a mechanical assembly with 24 switches, limit switches, selectors, etc. and this assembly along with a box filled with electronics will go and suffer a very long shock and vibration test.</p>
<p>I want to be sure the 24 contacts will never ever create a slight contact that could be interpreted by the MCU as an input signal so I will detour all harnesses to a..</p>
<p>I was going to use 2 Saleae logic analyzers on 2 laptops and monitor the signals and confirm it’s all dead in the log after. But the app crashes sometimes so it’s not reliable.</p>
<p>What super simple circuit could monitor this, maybe with 24 latched LEDs to watch for a super quick spike? It's 24x 110 V with 1 ground, but I will put all signals on optocouplers at 5 V.</p>
| Simplest circuit to detect 5 V pulse | 2024-02-03T03:13:24.827 |
699952 | |solar-cell|pnp| | <p>Some circuits should be redrawn to de-clutter: -</p>
<p><a href="https://i.stack.imgur.com/6gu2p.png" rel="noreferrer"><img src="https://i.stack.imgur.com/6gu2p.png" alt="enter image description here" /></a></p>
<blockquote>
<p><em>How does this garden solar light work?</em></p>
</blockquote>
<ul>
<li>When the solar panel illuminates and produces up to 4.5 volts, the 1N914 is in the charge path to the battery and reduces the battery voltage to no more than 3.8 volts</li>
<li>In fact the battery will limit this to around 3 volts so, in fact the solar cell probably never generates more than 3.7 volts in full brightness</li>
<li>The PNP transistor's base-emitter region is reverse biased and the yellow LED is not illuminated</li>
<li>At night, the solar panel voltage is minimal and this activates the PNP transistor and current flows in the LED. In effect the circuit becomes: -</li>
</ul>
<p><a href="https://i.stack.imgur.com/HeQOj.png" rel="noreferrer"><img src="https://i.stack.imgur.com/HeQOj.png" alt="enter image description here" /></a></p>
| <p><a href="https://i.stack.imgur.com/9IAPL.png" rel="noreferrer"><img src="https://i.stack.imgur.com/9IAPL.png" alt="Solar Garden Light" /></a></p>
<p>I do not understand how this circuit powers on the load (the LED light).</p>
<p>When the solar panel is inactive, i.e. it is dark, there will be a small current from emitter to base, and that will allow the larger current from battery to flow through the load, turning the LED on.</p>
<p>I do not understand how the small current from emitter to base makes it back to the negative terminal of the battery, how is it getting to ground?</p>
| How does this garden solar light work? | 2024-02-03T08:01:24.623 |
699965 | |identification|zener| | <p>The SMAJ5.0CA-TR is a TVS diode made by STMicroelectronics, and is marked "AA", see table 6 on page 10 of the <a href="https://www.st.com/resource/en/datasheet/smaj5-0ca.pdf" rel="nofollow noreferrer">datasheet</a>.</p>
| <p><a href="https://i.stack.imgur.com/74nhX.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/74nhX.jpg" alt="enter image description here" /></a></p>
<p>I am looking for the part number of this Zener.</p>
<p>I can't find the AA marking code on st.com.</p>
| Can you identify this Zener diode? | 2024-02-03T10:49:35.213 |
699966 | |voltage|operational-amplifier|amplifier|circuit-design|ltspice| | <p>I believe this is a question given as a homework by your professor. I don't want to spoil the fun. The text below is to give you some guidance.</p>
<p>The circuit is a <a href="https://toshiba.semicon-storage.com/ap-en/semiconductor/knowledge/e-learning/basics-of-op-amps/chap2/chap2-5.html" rel="nofollow noreferrer">non-inverting amplifier</a> and you can adjust its voltage gain <span class="math-container">\$A_V\$</span> using this formula</p>
<p><a href="https://i.stack.imgur.com/S3f7L.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/S3f7L.png" alt="enter image description here" /></a></p>
<p>i.e.,
<span class="math-container">$$ A_V = 40 = \frac{R1 + R2}{R1}$$</span>
since its gain of 40 is given in the question. Pick a value for, maybe <span class="math-container">\$R1\$</span>, and solve for <span class="math-container">\$R2\$</span>. The amplitude of the input sinewave has an amplitude of 0.2V. Since the output voltage gain is 40 (i.e., 40 times the input), so you can find the <span class="math-container">\$V_{\textrm{plus}}\$</span> and <span class="math-container">\$V_{\textrm{minus}}\$</span> using these formula
<span class="math-container">$$
\begin{align*}
V_{\textrm{plus}} &> A_V \times 0.2V \\
V_{\textrm{minus}} &< -V_{\textrm{plus}}
\end{align*}
$$</span></p>
<p>Note the amplitudes for <span class="math-container">\$V_{\textrm{plus}}\$</span> and <span class="math-container">\$V_{\textrm{minus}}\$</span> determine the output voltage range and must be large enough so that the amplified output voltage is within that range.</p>
<p><strong>Edit</strong></p>
<p>As pointed out by LvW, please choose reasonable resistance values for <span class="math-container">\$R1\$</span> and <span class="math-container">\$R2\$</span>; preferably in tens or hundreds of kΩ.</p>
| <p>I was asked to pick values for the resistors (I picked R2 = 78 Ω and R1 = 2 Ω) and for Vminus and Vplus.</p>
<p>Can someone please explain what these voltage sources are for and what values I should give them? The circuit for reference (Av = 40 [V/V]):</p>
<p><a href="https://i.stack.imgur.com/IouYS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/IouYS.png" alt="enter image description here" /></a></p>
| Operational amplifier question in LTspice | 2024-02-03T11:08:50.677 |
699975 | |operational-amplifier|rf|radio|ham-radio| | <p>TL084 has <em>gain bandwidth product</em> around 3 MHz,<br>
That makes available voltage gain at 10kHz a few hundred.<br></p>
<blockquote>
<p>If a circuit can amplify a 10mV injected signal to about 6V, why does
it not amplify the output of a L-C tank ciruit?</p>
</blockquote>
<p>Most problematic is how the injected signal is introduced to the tank. An 18cm antenna @ 10kHz can only inject much signal if the tank is <em>very, very high impedance</em>. That's because such an antenna has a tiny equivalent capacitance (to ground, or cat).<br></p>
<p>Tank impedance is limited by inductor equivalent resistance. Searching for <a href="https://www.mouser.ca/datasheet/2/54/RL181S_series-778111.pdf" rel="nofollow noreferrer">100mH chokes</a> suggests a Q of 100 might be achieved, with series resistance of 82 ohms. That makes parallel equivalent resistance 820kohms. A fraction of a picofarad antenna won't inject much voltage into that impedance.<br>
Furthermore, breadboard capacitance will seriously deteriorate performance at such high impedances as this.<br></p>
<p>This kind of antenna is often called <em>voltage-probe antenna</em>, and requires an extremely high-impedance preamp. Often, a J-FET common-drain buffer is used to transform the extremely-high antenna impedance down to a lower impedance that is easier to amplify.<br></p>
<p>For your TL084, you might try connecting antenna direct to "+" input. For safety, a very high bias resistor might help snub electrostatic spikes. On a breadboard, the "+" input and its bias resistor should be isolated. Nevertheless, package capacitance and TL084 input capacitance will likely seriously load that short antenna.</p>
<p><img src="https://i.stack.imgur.com/BrmQj.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fBrmQj.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
| <p>Specifically, if a circuit can amplify a 10mV (10kHz) injected sinusoidal signal to about 6V, why does it not amplify the 10kHz RF output of a L-C tank circuit?</p>
<p>The tank circuit below has a resonant frequency of 10kHz.</p>
<p><strong>Injected Signal.</strong> To check the amplifier works, I removed the tank circuit (ie C1 and L1) and used an oscilloscope to inject a sinusoid (20mV peak to peak, 10kHz) into C4. At the time this test was done, R1=R2=47k.</p>
<p>At A, I got 56mV peak-to-peak.
At B, I got 5.7V peak-to-peak (output saturated, so it looks like a square wave). (With no injected signal, A=14mV p2p, B=90mV p2p).</p>
<p><strong>Tank Circuit Signal.</strong> Using the tank circuit (C1 and L1), C1 is a variable capacitor to do fine tuning. The entire circuit was made on a breadboard.</p>
<p>The transmitter is an NE555 square wave generator module with its output connected to 30 feet of speaker wire which goes out the window in a straight horizontal line. The receiver (tank circuit) is about 1 foot away from the transmitter for the readings below.</p>
<p>With R1=R2=47k (ie the same values as for the injected signal), the outputs at A and B were very small (B=300mV p2p).</p>
<p>I then set the values of R1=R2=1M to increase gain. Point B then had an output of B=700mV p2p.</p>
<p>For comparison, with transmitter OFF, B=130mV p2p.</p>
<p><strong>So, here is my question (repeated)</strong>: If a circuit can amplify a 10mV injected signal to about 6V, why does it not amplify the output of a L-C tank ciruit?</p>
<p>If I isolate the tank circuit then its output is about 200mV p2p. I understand this 200mV is reduced if the circuit is loaded on its output by a low impedance sink, which is why I chose the high impedance TL084 IC as an amplifier.</p>
<p>I have tried many different amplifier circuits before this, and I get the same sort of result as above every time.</p>
<p>Please feel free to interrogate me and this circuit for any questions you may have.</p>
<p>Context: My cat was run over last year (he survived, but now has a metal bar through his hips). My objective is to get this cat-fence working before he dies of old age.</p>
<p>BTW R5=680k.</p>
<p>Note1: The TL084 has a voltage divider to set the non-inverting inputs to 3V.</p>
<p>Note2: The RF choke is used in place of a ferrite rod to reduce weight (see Note3).</p>
<p>Note3: The low RF frequency of 10kHz is used because the intention is for the transmitter to be part of a cat-fence (the transmitter antenna will be a long wire which goes around my garden). The cat will wear the receiver below on his collar (the 18cm aerial will be on his collar). When the signal strength is large, this will set off a buzzer on his collar, to discourage him fro leaving the garden. (If I can make the cat collar circuit + buzzer + battery large enough then just the weight of it should stop the cat from leaving the garden).</p>
<p>Note4: The voltage divider R6/R7 is implemented as a potentiometer, with the non-inverting inputs to TL084 connected to the middle pin of the potentiometer.</p>
<p>Note5: The diode D1 is not really relevant yet, but it is there to rectify the output so I can measure signal strength as a DC signal.</p>
<p>Note6: The power supply is a 9V battery.</p>
<p><a href="https://i.stack.imgur.com/Pp8jb.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Pp8jb.jpg" alt="TL084 RF amplifier circuit" /></a></p>
| Why won't the TL084 amplify the RF output of a tank circuit? | 2024-02-03T12:26:57.957 |
699988 | |verilog|system-verilog| | <p>In SystemVerilog, task and function arguments have the same semantics and are independent of a function returning a value or not. This was not the same in legacy Verilog where functions were required to have at least one input and return a value (there was no void return). A task never returns a value, may consume time, so it can't be used in an expression like a non-void function.</p>
<p>Most other programming language don't distinguish between tasks and functions; they are just routines. And all routines pass their arguments by values. If you need to modify an actual argument, you pass a pointer to the argument.</p>
<p>There are no pointers in SystemVerilog. You specify the direction you want values to pass argument values using <code>input</code>, <code>output</code>, or <code>inout</code> qualifiers. Input arguments get copied by value upon entry task/function and output arguments get copied upon exit. Inouts get copied both upon entry and exit.</p>
<p>There are only two main use cases where you would want to use a <code>ref</code> argument. One is where you have a very large array and only plan to access some of the elements. This saves the copying time. The other is in a time consuming task where you need the argument's actual value to keep syncing while the task is active. (e.g. passing a clock to a task and waiting for its posedge inside the task.</p>
| <p>I am reading Stuart Sutherland's <em>RTL Modelling with System Verilog</em> and up to this point have had no trouble understanding. However, unless I missed it, it seems he has gone way too quickly over functions and tasks in SystemVerilog. I am therefore left with (at least) two questions:</p>
<p>(1) My understanding is that (unless <code>ref</code> is used), SystemVerilog <em>functions</em> are pass-by-value. Is the same true of tasks?</p>
<p>(2) What do the <code>input</code> and <code>output</code> keywords do for function arguments? Consider the snippet below. There is no return (<code>void</code>), so shouldn't I conclude (given (1) regarding pass-by-value) that this function cannot affect things outside? I ask because in the flow of discussion about the snippet, no such comment is made, and so it seems like I should conclude that any formal argument marked with <code>output</code> will be such that it affects things "outside" the function. Is this right?</p>
<pre><code>parameter N = 32;
function automatic void sum_to_endpoint_f (output [N—1:0] result,
input [$clog2(N)-1:0] endpoint,
input [N—1:0] data_array [64] // look-up-table array
);
result = data_array[0];
if (endpoint == 0) return; // exit the function early
for (int i=1; i<=63; i++) begin
result = result + data_array[i];
if (i == endpoint) return; // exit the function early
end
endfunction
</code></pre>
| How do void functions get their results "out" in and more on functions and tasks? | 2024-02-03T15:14:57.260 |
699996 | |digital-logic|integrated-circuit|lcd|cob| | <p>These controllers are made by the company Sitronix. They have a line of similarly-numbered parts. It is possible that many of the parts use a similar protocol. I'd say, looking at your board, you may be able to determine which connections carry the protocol, and you could watch the signals to work out how it's being operated. Lower resolution displays almost always use a serial protocol like SPI or I2C.</p>
<p>I took another look at your photos and realized that the thing you circled was the part number marking you said that you saw on the die.</p>
<p><a href="https://i.stack.imgur.com/mHizu.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/mHizu.jpg" alt="enter image description here" /></a></p>
<p>Upon closer inspecion, it looks like the part may be ST7529, in which case your problem is essentially solved, as there are data sheets for that part.</p>
| <p>Edit: I wrote a mail to Sitronix asking for docs for this controller, and they said it is ST7522, with public avalible docs.</p>
<p>I'm currently trying to reverse engineer a device with an MCU, LCD, and an LCD controller in an epoxy blob. While trying to identify the LCD controller I removed some epoxy from the top and revealed a die with ST7523-08 marking.</p>
<p>Unfortunately searching for such controller in google didn't bring any results, so if someone could help me find docs or anything else about this controller it would be truly amazing, thank you!</p>
<p>P.S.: I'm also attaching the photos of the die.</p>
<p>Edit: To precise a bit more the device has an LCD with mostly characters and a grid of 55x7 pixels, so total of around 540 pixels(see the 1st photo).</p>
<p><img src="https://i.stack.imgur.com/iWAyq.jpg" alt="" />
<img src="https://i.stack.imgur.com/6tAD0.jpg" alt="" />
<img src="https://i.stack.imgur.com/UIuLi.jpg" alt="" />
<img src="https://i.stack.imgur.com/tIbA1.jpg" alt="" /></p>
| How do I identify an unknown LCD controller? | 2024-02-03T16:21:58.130 |
700004 | |transistors|identification| | <p>Looks like remnants of a Diodes, Inc. logo, something -1020-, and a common-cathode dual rectifier. Package is TO-220FP. Perusing likely suspects, this may be it:</p>
<p><a href="https://www.diodes.com/assets/Datasheets/SBR10200CT-SBR10200CTFP.pdf" rel="nofollow noreferrer">SBR10200CT–SBR10200CTFP Datasheet | Diodes, Inc.</a></p>
<p>Compare the photo here,</p>
<p><a href="https://i.stack.imgur.com/6uLB3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6uLB3.png" alt="enter image description here" /></a></p>
<p>From: <a href="https://www.ebay.com/itm/404222963832" rel="nofollow noreferrer">5PCS New (SBR10200CTFP TO-220F 10A220V) #A6-4 | eBay</a></p>
<p>Given the description and appearance, it seems likely this is a buck converter, and the only reason the diode should fail is due to overheating. The heatsink isn't very substantial, so that is a possibility; but the mode of failure (both dies blown to h*ck) can only be propelled by fault current. I can conclude the transistor is dead as well, and perhaps by extension, drive circuitry.</p>
<p>I would need a clear, square photo of both sides of the board (probably with major components removed besides) to conclude what the full circuit/layout is, but it looks like the two terminals beside the heatsink are power / battery, and the pair midway along the side are the motor terminals; two SPDT relays provide reversing function, and the buck converter is low-side common, bucking towards +V (which is fine as the motor is a floating load). Notably there is no bypass capacitor (or at least one large enough to handle switching an ATV's motor) near the battery terminals, so the switching cannot be too fast, or the battery cable too long; and I don't see any current sensing, and temperature sensing is highly unlikely, so the controller (U6 is probably a microcontroller, probably set up to run PWM into the transistor, with some input levels, switching or other communcations from the header connector, and no further controls or limits) cannot protect the circuit against over-current or over-temperature conditions.</p>
<p>I would recommend replacing the board with a new one. Possibly, the drive circuitry is okay and replacement diode and transistor will get it going again, but it looks so cheap, it's honestly not worth the effort.</p>
<p>Going up in ratings should be fine; anything 200V, 15-40A rated, schottky or fast-recovery, should do for the diode, and same or lower Rds(on), Qg(tot), and same or higher Vds(max) for the transistor. Voltage ratings must be at least the battery rating plus a safety margin (typically 20-50%), but it's possible they used the extra voltage rating to cheat around the bypass capacitor, and so additional rating is required as-is.</p>
| <p>I have a children's electronic ATV that I'm trying to repair. It shuts off whenever power is sent to the wheels (even if the motors are disconnected) and the troubleshooting led me to examine the circuit board that runs everything. When I opened it up, I found that one of the transistors had exploded and burnt out. I was hoping to replace it or the entire board, but I can't figure out what the transistor is exactly and the code printed on the board, RX-16CD-1d5, doesn't return anything useful. Can anyone else identify it?</p>
<p>The model code of the ATV is W442-A06-WH and a link to the manual is here: <a href="https://www.manualslib.com/manual/2628641/Rollplay-W442.html#manual" rel="nofollow noreferrer">ATV User Manual</a></p>
<p><a href="https://i.stack.imgur.com/klDyu.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/klDyu.jpg" alt="Exploded transistor." /></a></p>
<p><a href="https://i.stack.imgur.com/dqsnb.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/dqsnb.jpg" alt="Image of the circuit board from above." /></a></p>
<p><a href="https://i.stack.imgur.com/FsZ3W.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/FsZ3W.jpg" alt="Image of the circuit board from below." /></a></p>
| Identifying an exploded diode, TO-220FP, -1020- | 2024-02-03T17:24:28.640 |
700008 | |frequency|signal-processing|terminology| | <p>It depends on your definition of frequency.</p>
<ul>
<li>"How many times it happens per unit of time"</li>
</ul>
<p>In this case, it cannot happen a negative number of times, thus frequency is always positive.</p>
<ul>
<li>"<a href="https://en.wikipedia.org/wiki/Instantaneous_phase_and_frequency" rel="nofollow noreferrer">Instantaneous frequency</a>"</li>
</ul>
<p>If you have a signal <span class="math-container">\$ s=sin( \omega t + \theta )\$</span> you can define its phase as <span class="math-container">\$ \varphi(t) = \omega t + \theta \$</span> so your signal becomes <span class="math-container">\$ s=sin( \varphi(t) )\$</span>.</p>
<p>Now if you use complex notation, or if you have IQ modulation so both the real and imaginary part of the signal are transmitted, it becomes:</p>
<p><span class="math-container">\$ s=e ^ { \omega t + \theta } = e^{\varphi(t)}\$</span></p>
<p>So we have <span class="math-container">\$ \omega = \frac{d\varphi}{dt} \$</span> and <span class="math-container">\$ f = \frac{d\varphi}{\pi dt} \$</span></p>
<p>Basically, the instantaneous frequency is the derivative of phase <span class="math-container">\$/\pi\$</span>.</p>
<p>There is no reason the sign of this quantity should be constrained to positive. The real and imaginary components model a rotating vector, if what generates the signal decides to have it rotate in the other direction then <span class="math-container">\$ \frac{d\varphi}{\pi dt} \$</span> will change sign.</p>
<p>For example, consider three phase power.</p>
<p><span class="math-container">\$ L_1 = A cos( 2\pi f t + 0 ) \$</span></p>
<p><span class="math-container">\$ L_2 = A cos( 2\pi f t + 2\pi/3 ) \$</span></p>
<p><span class="math-container">\$ L_3 = A cos( 2\pi f t + 4\pi/3 ) \$</span></p>
<p>Just like complex signals, or IQ modulation, that's a vector, it rotates, it can rotate in both directions, and the sign of the frequency is the direction or rotation.</p>
<p>If you don't believe frequency can be negative,</p>
<ol>
<li><p>Write "rpm = frequency *60 *2 /number of poles" on a post-it.</p>
</li>
<li><p>Stick it on a three phase induction motor, for example a pump.</p>
</li>
<li><p>Swap two phases and start it.</p>
</li>
</ol>
<p>This only works if the sine signal is a vector (ie, you have at least two actual signals). If the sine signal is a scalar, then positive and negative instantaneous frequencies cannot be distinguished.</p>
| <p>While I was going through a digital signal processing course, I came to this problem where it says that "Frequencies are inherently positive physical quantity" - <em>Digital Signal Processing</em> by John G Proakis, Page 15. I didn't really get the intuitive idea. Can anyone explain this sentence a little bit or suggest some resources?</p>
| Frequencies are inherently positive physical quantity.... what does it mean? | 2024-02-03T17:40:48.853 |
700012 | |digital-logic| | <p>The bi-directional logic level shifter is not meant to drive load(s) on either or both sides. It is used for signaling or data communication between the low-side (LV) and the high-side (HV).</p>
<p>By connecting loads (each with a 4.7kΩ resistor and an LED) on both sides you get voltage dividers on LV and HV like the following <a href="http://tinyurl.com/2dztmlx9" rel="nofollow noreferrer">example</a></p>
<p><a href="https://i.stack.imgur.com/i3nSl.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/i3nSl.png" alt="enter image description here" /></a></p>
<p>Notice that LV is 2V and HV is 4.2V, which are calculable, and they are not floating. This is not how it is supposed to be used.</p>
<p>The voltage level shifter is only suitable for communicating devices that have open-drain output driver, meaning the connected devices should only pull (sink current) but not push (source current). Here is an <a href="http://tinyurl.com/27vyvrc3" rel="nofollow noreferrer">example</a></p>
<p><a href="https://i.stack.imgur.com/jtSvs.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jtSvs.png" alt="enter image description here" /></a></p>
<p>The circuit uses switches in place of open-drain output drivers. By closing the switch (imitating sinking current to GND) on the LV side only, you will see the LV voltage drops to 0V and the HV will drop very close to 0V too. Similar effect will happen if you close the switch on the HV side only or both sides. Otherwise both sides will be pulled up to their respective power supply voltages (3.3V and 10V in this case like the figure above).</p>
<blockquote>
<p>Internally the outputs are pulled high by 10k's, and I have seen many examples online of no pulldowns used.</p>
</blockquote>
<p>Of course you can't find one because it is not meant to be used that way.</p>
<p><strong>Edited Again</strong></p>
<p>If your purpose is to send data from HV to LV and the transmitter's output driver is a <strong>push-pull</strong> type, you can use the Bi-directional Logic Level Shifter, provided that it must be a <strong>unidirectional</strong> communication.</p>
<p>Here is the <a href="http://tinyurl.com/2xse5kdw" rel="nofollow noreferrer">circuit</a> where the receiver is on the LV side and the transmitter is on the HV side.</p>
<p><a href="https://i.stack.imgur.com/pnmG3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pnmG3.png" alt="enter image description here" /></a></p>
<p>You can push and pull by clicking on the SPDT switch on the HV side, imitating a push-pull output driver. I removed the pull-up resistor on the HV side because it is not needed (but no harm if it remains). I added a 100Ω resistor on the LV side to prevent voltage spikes from damaging the MCU's receiving pin when the transmitter switches between 0V and 10V. The transients are due to fast switching that get coupled from the HV side to the LV side through the MOSFET parasitic capacitance.</p>
<p>Here is the result</p>
<div class="s-table-container">
<table class="s-table">
<thead>
<tr>
<th>HV side (transmitter with push-pull output driver)</th>
<th>LV side (receiver)</th>
</tr>
</thead>
<tbody>
<tr>
<td>10V</td>
<td>3.3V</td>
</tr>
<tr>
<td>0V</td>
<td>~0V</td>
</tr>
</tbody>
</table>
</div>
<p>Here is the <a href="http://tinyurl.com/2bjfnbgh" rel="nofollow noreferrer">circuit</a> where the transmitter is on the LV side and the receiver is on the HV side.</p>
<p><a href="https://i.stack.imgur.com/pXXEd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pXXEd.png" alt="enter image description here" /></a></p>
<p>There is no need for the 100Ω transient suppressing resistor because it will not do any harm to the circuit on the HV side.</p>
<p>Here is the result</p>
<div class="s-table-container">
<table class="s-table">
<thead>
<tr>
<th>LV side (transmitter with push-pull output driver)</th>
<th>HV side (receiver)</th>
</tr>
</thead>
<tbody>
<tr>
<td>3.3V</td>
<td>10V</td>
</tr>
<tr>
<td>0V</td>
<td>~0V</td>
</tr>
</tbody>
</table>
</div> | <p>Link to Logic Level Shifter: <a href="https://www.sparkfun.com/products/12009" rel="nofollow noreferrer">https://www.sparkfun.com/products/12009</a></p>
<p>I noticed that the output of my logic level shifter was extremely noisy. It appears that every channel is floating. Internally the outputs are pulled high by 10k's, and I have seen many examples online of no pulldowns used. I added these 4.7k (+LED) pulldowns to observe their effect, but the outputs are still floating. The HV side will connect to a motor encoder, which takes [3.5-20V], and the LV side will connect to an ESP32-S3 DevkitC, which has a tolerance of 3v3 on its IO pins.</p>
<p>I also initialized the encoder inputs as INPUT_PULLUP, but that did not work (nor did INPUT_PULLDOWN).</p>
<p><a href="https://i.stack.imgur.com/XeOZf.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XeOZf.jpg" alt="figure2. Connecting HV1 to 5v. All LEDs should be off except HV1 and LV1" /></a></p>
<p><a href="https://i.stack.imgur.com/4rtrI.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4rtrI.jpg" alt="figure 1. 3v3 on the LV side, 5v on the HV side. All LED's should be off, as no logic signal is applied to any pin, and 4.7k pulldowns exist at each pin." /></a></p>
| Bi-directional Logic Level Shifter has floating outputs | 2024-02-03T18:31:57.913 |
700013 | |switches|audio|instrumentation-amplifier| | <p>A 4PDT switch should do it, assuming you want to switch both leads and not have a common between the amps.</p>
<p><img src="https://i.stack.imgur.com/OIT8f.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fOIT8f.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>In the position shown, AMP 1 is connected to the speaker and AMP 2 is connected to the dummy load, in the other position they would be swapped. If you can't find a suitable switch and you have a power source available you could use an SPST switch and one or more relays to get the number of contacts you need.</p>
<p>If you can make one lead common (this would depend on the amplifiers used) you could use a DPDT. Some amps might not take kindly to having their outputs connected to another amp like this, so due caution is advised.</p>
<p><img src="https://i.stack.imgur.com/fqd4r.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2ffqd4r.png">simulate this circuit</a></sup></p>
<p>If you can't find a suitable switch and you have a power source available you could use an SPST switch and one or more relays to get the number of contacts you need.</p>
| <p>What type of switch would you recommend for the diagram below?</p>
<p><a href="https://i.stack.imgur.com/Kc7x6.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Kc7x6.png" alt="enter image description here" /></a></p>
| Recommendation for type of switch | 2024-02-03T18:41:51.010 |
700018 | |operational-amplifier|noise|oscillator|schmitt-trigger| | <p>You need a capacitor from pin 4 to pin 7 near the chip and no capacitor on the output (also inverting and non-inverting are switched, but that was a transcription error you said).</p>
<p>In fact, put a 100Ω resistor in series with the output (between that and your probe).</p>
<p>The decoupling capacitor prevents inductance in your power supply leads from resulting in imperfect power to the chip when there are fast changes in demand from the chip. One way you can cause such a rapid demand is to add a capacitor to the output. If it's set up as an amplifier, that will likely cause oscillation unless the capacitor is tiny (100pF is usually safe, but not necessarily for micropower op-amps). As a comparator it will cause big surges from the supplies.</p>
<p>A small series resistor between the output and whatever it might be driving (but not in series with the feedback) that is capacitive (such as a x1 oscilloscope probe or a cable with significant capacitance) can help prevent that kind of problem.</p>
| <p>I want to make a 100~200 kHz square wave signal. I tried with a Schmitt trigger oscillator . The circuit below worked well with another op amp but the slew rate was too low so a tried with the LM318 which is faster. But I got this on oscilloscope :</p>
<p><a href="https://i.stack.imgur.com/cwInp.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cwInp.jpg" alt="oscillations" /></a>
Do you know what is happening and how to cure it?
Here is the schematic:
<a href="https://i.stack.imgur.com/CY8W0.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CY8W0.png" alt="enter image description here" /></a></p>
| LM318 strange oscillations | 2024-02-03T19:33:24.327 |
700021 | |microcontroller|pcb|circuit-design|kicad| | <p>I cannot really see much detail in your image. So I'm going to asusme some things.</p>
<p>First, you see that the design is golden. This is achieved by two things:</p>
<ol>
<li>You have to expose the copper (exclude it from the soldermask) toi allow it to be plated golden. This is used by applying the F.Mask Layer on the region you want to exclude from the solder mask. See the screenshot. It shows the layout of the front copper plus a rectangle of soldermask exclusion. and the results in the 3D viewer.</li>
<li><strong>You need to instruct your manufacturer to actually gold-plate your PCB</strong>. If it is "only" done in a HASL solder process, the area will not be golden but plated with tin. For most higher end manufacturers, gold is standard. But it might not be for most Chinese prototyping services and requires a small upgrade.
<a href="https://i.stack.imgur.com/QacvP.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QacvP.png" alt="Front Solder Mask Removed" /></a></li>
</ol>
<p>I don't see if there are solder dots on the end of the lines. I don't think this is what you meant. If not, ignore the following. If there are some, then the F.Paste Layer has to be placed there. See the screenshot.
<a href="https://i.stack.imgur.com/9ZNUB.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/9ZNUB.png" alt="Solder Paste Layer" /></a></p>
<p>This layer will make an opening in the paste stencil that is used to apply solder paste and the paste will be placed there before soldering. It will melt and make a solder blob during the reflow soldering.</p>
<p><strong>Keep in mind, that this only works, if you buy your PCBs with assembly. Otherwise you will only get the bare board and there will be no solderpaste applied obviously. If you don't get assembly, you can most certainly order a stencil to apply the paste yourself. Or place it by hand with some tweezers.</strong></p>
<p><strong>Also, keep in mind, that the solder will spread across any exposed (golden) area once it's melted. So your blobs will widen a bit.</strong></p>
<p>The lines you see can simply be generated with tracks in Kicad.
The round tips can either be placed by adding Round Pads from a foorprint, or by drawing a cricle with the circle tool in the toolbar and editing it to be filled:
You have several options to get something like in your image:</p>
<p><a href="https://i.stack.imgur.com/jTI4G.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jTI4G.png" alt="Filled Circle on copper layer." /></a></p>
<ol>
<li>You draw the image in copper and in the appropriate mask layer twice on top of each other.</li>
<li>You use a copper plane and only draw your desing in the Mask layer. That's what I mostly use for my logos.</li>
</ol>
<p><a href="https://i.stack.imgur.com/s8FDw.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/s8FDw.png" alt="Soldermask Artwork" /></a></p>
<hr />
<p>You can also use the Image Converter in kicad, see the main window. It can import images and turn them into footprints. Once your artwork becomes to complex to draw in KiCad, you can draw it in any tool. (It has to be black/white with sharp color edges) and import it to a specific layer. in your case, the F.Mask Layer.</p>
<p>Use the 3D viewer to check your results!
Good luck.</p>
<hr />
<p>As the other answer suggests, it is also possible to get this by routing a foorprint and placing testpoints at the end.
There are circular testpoints in the kicad library. But for anything smaller you would have to make your own footprint using a round pad.
(You can disable the white silkscreen of the footrpint to get the desired result).</p>
<p><a href="https://i.stack.imgur.com/bH4Vx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bH4Vx.png" alt="Testpoint" /></a></p>
<p>However, if the thing you want to do is not electrically relevant and an "artwork" I would import it as an image. If it is something electrically relevant, I would do it in Kicad with testpoints, footprints, etc...</p>
| <p>I want to make a nice visual on a PCB but I am not entirely sure how to get the ends of routes to have little tips like this or how to make the board look like this in all honesty. Does anyone have any tips? Sorry I have never really done this before so I am kind of in deep water currently. I am using KiCad.</p>
<p><a href="https://i.stack.imgur.com/hpIGq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hpIGq.png" alt="enter image description here" /></a></p>
| How would I get something like this? How do I get small solder points at the tips? | 2024-02-03T20:06:58.817 |
700038 | |gain|homework|negative-feedback| | <p>By your own statement, each FET stage will have voltage gain:</p>
<p><span class="math-container">$$ A_1 = A_2 = A_3 = -g_mR_L $$</span></p>
<p>Each stage multiplies the voltage output of the previous stage, so if the first stage FET has gate voltage <span class="math-container">\$V_{G1}\$</span>, the second gate is <span class="math-container">\$V_{G2}\$</span> etc., then you have:</p>
<p><span class="math-container">$$
\begin{aligned}
V_{G2} &= A_1V_{G1} \\ \\
V_{G3} &= A_2V_{G2} \\ \\
V_{O} &= A_3V_{G3} \\ \\
&= A_3(A_2V_{G2}) \\ \\
&= A_3(A_2(A_1V_{G1})) \\ \\
&= (-g_mR_L)^3V_{G1} \\ \\ \\
A &= \frac{V_O}{V_{G1}} \\ \\
&= (-g_mR_L)^3
\end{aligned}
$$</span></p>
<p>This number is negative (due to the odd number of stages), and is assumed to be huge. The circuit is functionally similar to the classic inverting amplifier employing an op-amp:</p>
<p><img src="https://i.stack.imgur.com/Nq9z4.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fNq9z4.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>No doubt you are familiar with the closed loop gain <span class="math-container">\$G\$</span> of such a system:</p>
<p><span class="math-container">$$ G = \frac{V_{OUT}}{V_{IN}} = -\frac{R_F}{R_S} $$</span></p>
<p>Interestingly, this is independent of <span class="math-container">\$A\$</span>, which I'll touch upon below.</p>
<p>In your second circuit, the system is represented as a modular block diagram, where feedback is shown to be <em>added</em> to the original input.</p>
<p><sub>Note: For feedback to be negative, one of the following conditions is necessary: gain <span class="math-container">\$A\$</span> should be negative, feedback factor <span class="math-container">\$F\$</span> should be negative, or the addition should actually be a subtraction. That diagram has none of those conditions, so feedback is positive, and the system is unstable. I have to assume this is an oversight on the author's part, somewhere there is a negation, and the author intended that feedback be negative.</sub></p>
<p>In my op-amp circuit above, feedback is negative because the op-amp performs a <em>subtraction</em> of some fraction of the output, as indicated by the '−' symbol at the input terminal where feedback is applied.</p>
<p>In your first circuit, with the cascaded FET stages, feedback is also negative, because there are an odd number of individual negative-gain stages. Total gain from <span class="math-container">\$V_{G1}\$</span> to <span class="math-container">\$V_O\$</span> is therefore negative.</p>
<p>Anyway, the behaviour of a negative feedback system such as the one (almost) depicted in your second diagram, is <a href="https://en.wikipedia.org/wiki/Negative_feedback" rel="nofollow noreferrer">well documented</a>, and has this closed-loop gain:</p>
<p><span class="math-container">$$ \frac{v_{OUT}}{v_{IN}} = \frac{A}{1+AF} $$</span></p>
<p>Note that I've used lower-case <span class="math-container">\$v\$</span>, suggesting that <span class="math-container">\$v\$</span> is referring to <em>amplitude</em> of some AC signal, rather than potential at any particular instant in time.</p>
<p>If gain <span class="math-container">\$A\$</span> is large enough, this becomes a very close approximation to:</p>
<p><span class="math-container">$$ \frac{v_{OUT}}{v_{IN}} = \lim_{A\rightarrow\infty}{\frac{A}{1+AF}} = \frac{1}{F} $$</span></p>
<p>I think that this exercise is designed to consolidate all these facts into a better understanding of:</p>
<ul>
<li><p>Many cascaded stages leads to very large open-loop gain <span class="math-container">\$A\$</span>, which in a closed loop will result in a lower but precisely controllable gain: <span class="math-container">$$ \frac{v_{OUT}}{v_{IN}} = \frac{1}{F} $$</span><br />
This is independent of open-loop gain <span class="math-container">\$A\$</span>, but does rely on <span class="math-container">\$A\$</span> being very large.</p>
</li>
<li><p>The circuit with FET stages, and feedback and input resistances, closely resembles, and is functionally equivalent to, the classic inverting amplifier employing an op-amp, and has the same gain equation: <span class="math-container">$$ \frac{V_{OUT}}{V_{IN}} = -\frac{R_F}{R_S} $$</span></p>
</li>
</ul>
| <p>I am asked to find the gain A for this negative feedback circuit below:</p>
<p><a href="https://i.stack.imgur.com/tULSi.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tULSi.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/6508o.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6508o.png" alt="enter image description here" /></a></p>
<p>(A: gain, G: all of the gain of the circuit, F: return ratio)</p>
<p>The simplified circuit above shows the gain A that I am trying to find.</p>
<p>I know that if this circuit had only one FET A = Vo/Vi=-gm*Rl. However, I just can't figure out how the gain A would change, if we were to add two additional FETs to the circuit. Any help would be appreciated.</p>
| Gain of a negative feedback circuit (problem) | 2024-02-04T01:06:38.950 |
700051 | |wireless|digital-communications|channel-coding| | <p>From Dr. Fuyun Ling:</p>
<p>QPSK needs twice of SNR, but it can transmit twice of bits in the same unit time. Thus, they have the same Eb/No, so in this respect they are equivalent. In the spectrum efficiency is not an issue, e.g., in the case of spread spectrum, BPSK could be preferable. Of course, if higher spectrum efficiency is needed, QPSK or higher modulation should be used.</p>
| <p>I wonder why there are still some modems using BPSK as their modulation.
Is there any benefit over QPSK (power, bandwidth, synchronization techniques, etc.)?</p>
<p>I have been searching and found these:</p>
<ol>
<li>BPSK has a bit more PAPR than QPSK</li>
<li>With the same power, BPSK has 3 dB more energy on its in-phase component (QPSK has 3 dB less energy on its in-phase and quadrature but uses quadrature to compensate)</li>
<li>They both have the same probability of error vs Eb/N0 performance</li>
</ol>
| Is BPSK better than QPSK in any way? | 2024-02-04T07:59:19.960 |
700066 | |fpga|artix-series-fpga| | <p>The reason you are unable to set the <code>test_mySWLED.v</code> module as top is because vivado is showing that it has some sort of syntax error.</p>
<p>Run the command <code>check_syntax</code> in vivado tcl console and it will describe the error.</p>
<p>It seems like you have not defined timescale properly.</p>
<p><code>timescale</code> is defined as <code>timescale <time unit>/<time precision> </code>. You are missing the precision part. It should be like this <code>timescale 1ns/1ps</code>.</p>
| <p>This is the first time I use Vivado.
<a href="https://i.stack.imgur.com/cRMrT.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cRMrT.png" alt="I can't set test_mySWLED.v as Top" /></a>
I can't set test_mySWLED.v as Top
<a href="https://i.stack.imgur.com/j86Xf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/j86Xf.png" alt="I Run Behavioral Simulation" /></a>
I Run Behavioral Simulation
<a href="https://i.stack.imgur.com/xaA1y.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xaA1y.png" alt="End up with mySWLED waveform instead of test_mySWLED waveform." /></a>
End up with mySWLED waveform instead of test_mySWLED waveform.<br />
Here is my project: <a href="https://hcmuteduvn-my.sharepoint.com/:f:/g/personal/nam_doanlqd_hcmut_edu_vn/ErPP0hArvftKhwEkHAG_6OQBoEStL0Emg8TZacZCJl6IuQ?e=tcYuo2" rel="nofollow noreferrer">https://hcmuteduvn-my.sharepoint.com/:f:/g/personal/nam_doanlqd_hcmut_edu_vn/ErPP0hArvftKhwEkHAG_6OQBoEStL0Emg8TZacZCJl6IuQ?e=tcYuo2</a><br />
Thank you.</p>
| How to set a testbench file as top level entity ? [Vivado, Basys3Artix7] | 2024-02-04T10:18:16.840 |
700067 | |coil|rfid| | <p>I found the actual albeit much simpler solution to this issue. As it turns out my initial capacitor values for the matching circuit would've actually worked ok with my coil.</p>
<p><strong>THE ACTUAL ISSUE</strong></p>
<p>Whilst assembling this board I was using a stereoscopic microscope the base of which is metal with a silicone mat over the top and I also did all my initial testing while the board was sitting on this base. The coil's magnetic field of course interacted with the base creating eddy currents which weaken the coil field. This is the received voltage with a single loop with the board on the microscope base:<a href="https://i.stack.imgur.com/gFIiH.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gFIiH.jpg" alt="enter image description here" /></a></p>
<p>And off the base:<a href="https://i.stack.imgur.com/Vb4HZ.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Vb4HZ.jpg" alt="enter image description here" /></a></p>
<p>Big difference! Stupid of me to not realise this sooner.</p>
| <p>I'm working on a PCB for RFID reading and writing however after assembling the PCB I have noticed the output field strength of the RFID coil is much lower than I anticipated.<a href="https://i.stack.imgur.com/nm4Wd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/nm4Wd.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/oqg2t.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oqg2t.png" alt="enter image description here" /></a></p>
<p>I was trying to copy the same coil design as used on the common Arduino RFID breakout board so the coil is four turns with 1mm trace width and 20mm radius. I did this as I don't have a network analyser which is needed to measure coil properties as stated in this application note from NXP <a href="https://www.nxp.com/docs/en/application-note/AN11564.pdf" rel="nofollow noreferrer">AN11564</a>. The best I have is an LCR meter but this can only measure up to 100kHz.</p>
<p>So the capacitor and inductor values for the filtering and matching stages are the same as on the breakout board. However, my PCB does not match the performance of the breakout board. I only get around 1.4V pk-pk across the coil compared to around 7V pk-pk on the breakout board. The majority of the MFRC output voltage is dropping across C27 and C20 (around 10V peak drop) but I'm not sure why. Is there anyway I can try to adjust the matching circuit systematically or do I need a network analyser?</p>
| RFID PCB coil output power much lower than expected | 2024-02-04T10:35:01.700 |
700068 | |transistors|npn| | <p>In theory the circuit with two batteries really shouldn't work if you're using six LEDs in an emitter follower circuit.</p>
<p>For the transistor to turn on you need the base to be around 0.6 V above the voltage at the emitter. The emitter voltage is going to be the voltage across the LEDs and with six of them that should be at least 6 V or more depending on the LED color, so a 5 V battery probably isn't going to get the base voltage high enough and a 3 V battery should be far below what's needed.</p>
<p>Simulating that circuit in LTspice I get less than 1 uA of LED current with six LEDs dropping 0.6 V each (which I think is being generous) and a 3.3 V battery on the base. With 5 V the voltage increased to just under 0.9 V per LED and the current was under 10 uA.</p>
<p>That is of course theory, and sometimes circuits don't do what theory says they should, so maybe it sort of works for some unknown reason, but I suspect there's something amiss here, perhaps the transistor is damaged and leaky, maybe you didn't actually use six LEDs when testing it.</p>
<p>Now that all said, the better way to do this kind of circuit is common emitter. Put the LEDs on the collector side with a current limiting resistor, ground the emitter and use a current limiting resistor on the base. This way you'll only need around 0.6 V to turn the transistor on.</p>
| <p><a href="https://i.stack.imgur.com/s4yfk.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/s4yfk.png" alt="enter image description here" /></a></p>
<p>I tried making a simple circuit as shown above. The battery BT1 is a 12V DC power adapter. D1 is actually about 6 LEDs in series. For R1, I tried 47 Ohm, 470 Ohm, 1K Ohm, etc., but D1 never turns on.</p>
<p>The circuit below works. BT2 is 12V, and battery BT3 is 5V, or even a 3V battery works, the D2 LEDs turn on.</p>
<p>The transistor I used was a D882 and a 2N2222.
(I did not try 2N2219, I apologize for the misleading diagram, that is all I could find in KiCad, I am new to all this.)</p>
<p>Shouldn't the first circuit work? Why does it not turn the LED on?</p>
<p><a href="https://i.stack.imgur.com/TTfaM.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/TTfaM.png" alt="enter image description here" /></a></p>
<p>============================</p>
<p>Update: I tried the following also after reading the answer. Still the LED's did not turn on.</p>
<p><a href="https://i.stack.imgur.com/HPZOf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HPZOf.png" alt="enter image description here" /></a></p>
<p>Next I am trying to figure out how to simulate this in Kicad to see what I am doing wrong. But if anyone has any tips, please let me know. Thanks!</p>
| Troubleshooting simple transistor circuit | 2024-02-04T10:48:23.783 |
700070 | |power-supply|power-electronics|rectifier|power-factor-correction|inrush-current| | <blockquote>
<p><em>My doubt is when I analyse the inrush current, should I be considering
the contribution due to all three capacitors?</em></p>
</blockquote>
<p>and</p>
<blockquote>
<p><em>In our existing design we are addressing only the inrush current due
to rectifier o/p caps. I am not sure why the inrush due to EMI filter
caps is omitted.</em></p>
</blockquote>
<p>Compared to the value of the bulk capacitor used in most power supplies I expect that the contribution to inrush from the EMI filter capacitors is negligible. However, if you wish to analyse inrush and include these capacitors then that's your call.</p>
<blockquote>
<p><em>Since these currents might not be in phase, the straightforward
addition may not be feasible. I am not sure how can the net effect be
calculated?</em></p>
</blockquote>
<p>I wouldn't hesitate to use a simulator.</p>
<blockquote>
<p><em>I guess, the 90 degree phase difference between AC voltage (across)
and current through a capacitor would not be applicable during inrush
duration (Since the 90 phase difference is a steady state phenomenon).
Please confirm.</em></p>
</blockquote>
<p>Correct.</p>
<blockquote>
<p><em>Also would I be getting different inrush values if I measure the phase
leg or neutral leg of AC supply - depending on the
additive/subtractive nature of common mode current?</em></p>
</blockquote>
<p>Yes you would because neutral is tied to earth at some point and that imbalances the capacitors on the load side of the filter. My best advice is this: use a simulator.</p>
| <p>Shown below is an EMI filter for an AC input. My doubt is <strong>when I analyse the inrush current, should I be considering the contribution due to all three capacitors?</strong></p>
<p>a) Differential mode capacitors</p>
<p>b) Common mode capacitors</p>
<p>c) Load capacitors ( In our case, the load is rectifier with bulk caps at the output)</p>
<p>Since these currents might not be in phase, the straightforward addition may not be feasible*. Iam not sure <strong>how can the net effect be calculated?</strong></p>
<p>(*I guess, the 90 degree phase difference between AC voltage (across) and current through a capacitor would not be applicable during inrush duration (Since the 90 phase difference is a steady state phenomenon). Please confirm.)</p>
<p>Also would I be getting different inrush values if I measure the phase leg or nuteral leg of AC supply - depending on the additive/subtractive nature of common mode current?</p>
<p><strong>PS:</strong> In our existing design we are addressing only the inrush current due to rectifier o/p caps. Iam not sure why the inrush due to EMI filter caps is omitted.</p>
<p><a href="https://i.stack.imgur.com/cBSsy.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cBSsy.png" alt="enter image description here" /></a></p>
| Would an AC EMI filter capacitors contribute to inrush current? | 2024-02-04T10:58:39.413 |
700101 | |ltspice| | <p>Found it. It lives under:</p>
<pre><code>C:\Users\YOUR_USER_NAME\AppData\Roaming\
</code></pre>
<p>I only skimmed the file, but its contents look identical to that of XVII - at least as far as theming goes. Therefore custom default setting and theme colours can still be configured within this file and you can also move it to wherever you please as long as you tell LTspice24 where to look for it, using the <code>-ini</code> command-line switch.</p>
<p>I've written <a href="https://electronics.stackexchange.com/a/665917/128715">detailed instructions</a> on how to do this for XVII, which works fine for v24 too.</p>
<p><strong>Excerpt:</strong></p>
<blockquote>
<p>Associating the start menu shortcut with a passed-in command line parameter (as above) will leave the <code>.asc</code> files unassociated, i.e. double-clicking on an <code>.asc</code> file will open LTspice with its default configuration without loading the custom <code>.ini</code> file that the shortcut references.</p>
<p>The solution is to <strong>create a <code>.bat</code> file and associate that with the <em>‘Open With…’</em></strong> Explorer menu option...</p>
</blockquote>
| <h3>Background</h3>
<p>LTspiceXVII had a well-defined location for its <code>.ini</code> file.</p>
<p>LTspice17 (i.e. the successor to XVII) <a href="https://ez.analog.com/design-tools-and-calculators/ltspice/w/faqs-docs/18474/ltspice-17-1-default-file-locations-windows" rel="nofollow noreferrer">stores</a> its <code>.ini</code> file at one of these two locations:</p>
<blockquote>
<ul>
<li>Only for me: <code>C:\users\[User]\AppData\Local\Programs\ADI\LTspice\</code></li>
<li>Everybody: <code>C:\Program Files\ADI\LTspice\</code></li>
</ul>
</blockquote>
<h3>Problem</h3>
<p>The current version of LTspice24 (as of February 2024) does not document the location for its <code>.ini</code> file, despite the fact that it is still mentioned as user-definable value under the <em>Command Line Switches</em> section of the help file that comes with it.</p>
<h3>Question</h3>
<p>Where does LTspice24 store its <code>.ini</code> configuration file?</p>
| LTspice 24 `.ini` file location | 2024-02-04T16:35:04.370 |
700121 | |avr|isp| | <blockquote>
<p>Is this simple MOSFET with these two resistors enough for controlling this load? (Note: load is real, I need to turn on this 180R exactly).</p>
</blockquote>
<p>Yes, simply select a MOSFET that will turn on with 5V Vgs. There are a lot of models to choose from.</p>
<p>However, your resistors are wrong: with R1=47k and R2=10k there will be less than 1V on the MOSFET gate. So you need a higher value pulldown, and a lower value gate resistor. For example R2=100k and R1=1k.</p>
<blockquote>
<p>Main concern! As only PB2 is free, I'm worried about reprogramming this AVR, as PB2 is happened to be SCK.</p>
</blockquote>
<p>While programming the micro, SCK will be active, so you can expect your MOSFET to turn on and off, and the 180 ohm resistor will also receive power every time SCK goes high. If that's not a problem, then it's fine. This also applies to the other pins used during programming.</p>
| <p>I have an ATTINY13, and almost all pins are used (only PB2 is free).</p>
<p>What I need to add is a controllable ohmic load, which I believe best way to add is with an N-channel MOSFET, similarly with this below circuit.</p>
<p><img src="https://i.stack.imgur.com/dS7E9.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fdS7E9.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>I don't need anything fancy, load will not need to oscillate, it will mostly be off, and once it turn on, it will stay on for minutes/hour(s).</p>
<p>I have 2 concerns here, which I wish to address before putting this together for PCB manufacturing:</p>
<ol>
<li>Is this simple MOSFET with these two resistors enough for controlling this load? (Note: load is real, I need to turn on this 180R exactly).</li>
<li>Main concern! As only PB2 is free, I'm worried about reprogramming this AVR, as PB2 is happened to be SCK.</li>
</ol>
<p>Will this ohmic load ruin the ISP programming (MISO, MOSI, SCK, NRES), if the power supply is quite-well buffered with 100uF, 10uf and also 100nF caps right next to the AVR, so is this MOSFET <em>enough</em> for buffering the SCK line?</p>
| Ohmic load on AVR's SCK? | 2024-02-04T19:44:03.880 |
700144 | |adc|differential|common-mode| | <blockquote>
<p><em>I don't get why should we put common mode capacitor(C1). Does it work
without CM capacitor?</em></p>
</blockquote>
<p>The <a href="https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-4-ad7384-4.pdf" rel="nofollow noreferrer">data sheet</a> is quite explicit about this: -</p>
<p><a href="https://i.stack.imgur.com/IQRwK.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/IQRwK.png" alt="enter image description here" /></a></p>
<p>So, if you want optimal performance, you fit the recommended components.</p>
<blockquote>
<p><em>Also the resistor of AinA+ side is located in buffer amplifier
circuit.</em></p>
</blockquote>
<p>That is a valid concern to me and I think the circuit may be in error. I believe it makes sense to have the local feedback around that op-amp come directly from the op-amp output. Maybe take this up with AD.</p>
| <p>I'm trying to make a 3-phase inverter using AD7383-4 for converting analog current signal to digital.
<a href="https://i.stack.imgur.com/Nth1o.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Nth1o.png" alt="AD7383-4 applications info" /></a></p>
<p>Typical application of AD7383 which is given by datasheet. AD7383 gets pseudo-differential input for an analog signal. Negative input side is practically an offset voltage constant.
Here, the question is I don't get why should we put common mode capacitor(C1). Does it work without CM capacitor?
Also the resistor of AinA+ side is located in buffer amplifier circuit.</p>
| CM filter of differential input(AD7383-4) | 2024-02-05T04:10:17.120 |
700151 | |operational-amplifier|output|single-supply-op-amp|rail-to-rail| | <p>Insert a resistor with a value of 10kohms on the inverting input and then connect signal to the 10kohms resistor.</p>
<p>Also, since the output stage of LM358 has a double high and low side driver, I don't think you need to pull up R8 resistor.</p>
| <p>I have a problem when using LM358 in compare mode.</p>
<p>I'm trying supply LM358 with 5V (V+ = 5V, V- = GND).<br />
The non-inverting input is 0.6V and the inverting input is 0V and 1.2V, respectively. When the inverting input is 0V the output is around 4.2V (this is okay) but when it is 1.2V the output is between 0.75V and 0.9V.</p>
<p>Is there any way to decrease the output to nearly 0V (in the datasheet they said the negative rail is about 100mV when I_out is around 10uA)? Or do I just change to other rail-to-rail opamps?</p>
<p><a href="https://i.stack.imgur.com/GaYhs.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GaYhs.png" alt="https://www.ti.com/lit/gpn/lm2904ba" /></a></p>
<p>This is my circuit:
<a href="https://i.stack.imgur.com/J5Wa5.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/J5Wa5.png" alt="enter image description here" /></a></p>
<p><code>TRIP_1</code> is a wire connected to STM32</p>
| LM358 output problem | 2024-02-05T05:19:36.800 |
700164 | |oscillator|high-frequency| | <p>Let's break down you problem a little bit:</p>
<p>We start at 50 GHz. 50 GHz is already an extreme frequency to work at. However, it is possible and there is measurement equipment commercially available to work with frequencies < 64 GHz. Searching for components at manufacturers like AD will give you actually buyable results. So in that frequency range a pure oscillator is mainly a challenge of finding the right IC. Semiconductor technologies in both bipolar and today even CMOS technologies are available in that frequency range.</p>
<p>Making a PCB for that IC, however, is another question. You need a very low loss high frequency PCB substrate (like rogers or other Teflon based PCB materials.) This is expensive but doable. A 90° phase shift can be achieved by building a 90° hybrid on the PCB or searching for a ready built one. Note, tat every millimeter of trace and every connector will create noticeable power loss of you signal. And good components like connectors for ~64 GHz are very expensive. In that frequency range it already makes sense to use hollow waveguides as conductors as they show lower losses than coax connectors. However, cables and connectors are still available at this frequency.</p>
<p>Now we look at you other extreme. 1THz. Terahertz is tricky as this approaches the so called “terahertz-gap”. This is the frequency gap at low terahertz frequencies 1-10 THz in which electronics stop working and optics are not yet working very well. I used to develop microwave ASICs at ~300 GHz in an GaAs mHEMT technology. See the image (taken from: <a href="https://web.archive.org/web/20180710095445/https://www.terapan.de/" rel="nofollow noreferrer">https://web.archive.org/web/20180710095445/https://www.terapan.de/</a>)
At 300 GHz waveguides become the only viable solution to wiring these signals. In the image you can see an asic in the middle. It is fed a low frequency )several GHz) over the thick waveguide. The energy is received by a patch antenna and fed to the ASIC. The ASIC now multiplies the frequency to 300 GHz. On the other side, you see a thinner waveguide. This is used for a 300 GHz signal.
<a href="https://i.stack.imgur.com/RGiOp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RGiOp.png" alt="300 GHz communication ASIC" /></a>
For 1 THz the design would look very similar but is even trickier. You would have to take a semiconductor technology capable of a fmax > 1THz (there are only a few) and build a frequency multiplier in it. Which is usually only a few trasnsistros in a non-linear operating point and some filters made of transmission lines. After multiplying the frequency for e.g. 64 Ghz to ~1THz you can couple it to a waveguide. Power levels at these frequencies are usually very low and losses are huge. Furthermore, yields at these frequencies are low. You will basically produce 1 or more whole wafers of chips to get even 1 working chip off of them.</p>
| <p>I would like to make a "good" (doesn't need to be perfect) sine wave oscillator from 50 GHz to 1 THz, if possible with two outputs: one is <span class="math-container">\$\sin(2 \pi f t)\$</span>, the other one would be <span class="math-container">\$\cos(2 \pi f t)\$</span>.</p>
<p>Maybe I already asked for a lot, but if possible, the system would reach 2 V where the output impedance is basically a capacitance around 100 pF, which at 50 GHz is around 30 mΩ (but if required the capacitance could be lowered to ~ 1 pF).</p>
<p>As far as I understand, working at these frequencies is extremely difficult where even the wire distance is extremely important, specially to get the cosine.</p>
<p>I thought about using an SDR and just generate a perfect sine wave, but most SDR only go up to ~ 6 GHz. The cosine maybe could be reached with just using a cable and the length alone would be sufficient to generate the phase difference.</p>
<p>I tried at ~100 MHz and it did a reasonable job (checked with an oscilloscope). But at 50+ GHz it's a completely different matter.</p>
<p><strong>Edit</strong>:
I realize now that my question lead many people in a different direction than intended: when I said from 50 GHz to 1 THz what I <strong>actually</strong> mean is that my expectation is for a single circuit should work at a specific frequency. That is, I do not expect that the same circuit can work at 50 GHz and that (e.g. by changing a resistor) it could work at 1 THz.</p>
<p>Given the (understandable) limitations at 1 THz, could you please consider relaxing the frequency to the interval [5 GHz ; 50 GHz] - again, I only expect a circuit to work at one specific frequency and not in the whole range. But please still consider the 2 V and ~100 pF load.</p>
<p><strong>Edit 2</strong>
I understand now that my question is foolish. In order not to edit anymore, I posted a new question (<a href="https://electronics.stackexchange.com/questions/700406/oscillator-at-5ghz-to-50ghz">https://electronics.stackexchange.com/questions/700406/oscillator-at-5ghz-to-50ghz</a>) with refined parameters so as to try and make it feasible. Thank you for all your help</p>
<p><strong>Edit 3</strong>
Apologies but my lack of knowledge on this subject seems to have requested the impossible (high freq/V/F) and I don't know how to pose the question (or pose 100s of questions with different combinations of freq/V/F to try to find some that is feasible) in order to not offend people. It seems the exact parameters of my experiment are required but I don't know them. So again, apologies for wasting your time and thank you for your effort. I will try to look at the waveguides to understand how an oscillator could be made from them, thank you for the suggestion.</p>
| Sine oscillator at extremely high frequencies | 2024-02-05T07:58:23.980 |
700185 | |stm32|embedded|interrupts|flash|firmware| | <p>So it turns out that the programming manual is simply wrong.</p>
<p>It's true for most STM32 chips the vector table is read from <code>0x00000000</code> and that address gets mapped to the start of flash (depending on the boot configuration) but this is not the case on the STM32H7A3 and some other chips like the STM32F769. Here the vector table still should be at the start of flash which is <code>0x08000000</code> (for normal boot config) but address <code>0x00000000</code> does NOT get mapped there and is instead used for TCM RAM.</p>
<p>And contrary to Ben's answer, the reset vector is fetched from the vector table at the start of flash(for normal boot config), just like on other STM32 arm mcus.</p>
| <p>According to the <a href="https://www.st.com/resource/en/programming_manual/pm0253-stm32f7-series-and-stm32h7-series-cortexm7-processor-programming-manual-stmicroelectronics.pdf" rel="nofollow noreferrer">STM32H7 programming manual</a> "On system reset, the vector table is at address 0x00000000."</p>
<p>But at the same time the <a href="https://www.st.com/resource/en/reference_manual/rm0455-stm32h7a37b3-and-stm32h7b0-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf" rel="nofollow noreferrer">STM32H7A3 reference manual</a> says in it's memory map description that ITCM RAM is mapped at address 0x00000000, not flash.</p>
<p>How can both of these be true at the same time? I can only write to the flash areas of the memory when installing my firmware since the ITCM ram is not persistent. So how can I ensure my interrupt vector table ends up at address 0 before any code runs?</p>
| Where should the interrupt vector table be placed in memory on STM32H7A3RGT6 chips? | 2024-02-05T12:21:36.677 |
700186 | |identification|components| | <p>It is a <a href="https://en.wikipedia.org/wiki/Varistor" rel="noreferrer">Metal Oxide Varistor</a> (MOV) that is used to absorb transient energy. Such devices have a decreasing resistance with voltage and are not polarity-sensitive. They do not have the negative resistance (avalanche) characteristic of the diac which would probably be destructive in this application. The modern symbol is this:</p>
<p><a href="https://i.stack.imgur.com/tjKOO.png" rel="noreferrer"><img src="https://i.stack.imgur.com/tjKOO.png" alt="enter image description here" /></a></p>
<p>However the diac-like symbol was used in past (from American National Standard,Graphic Symbols for Electrical and Electronics Diagrams, ANSI Y32.2-1975 p.27):</p>
<p><a href="https://i.stack.imgur.com/TjDcl.png" rel="noreferrer"><img src="https://i.stack.imgur.com/TjDcl.png" alt="enter image description here" /></a></p>
<p>The designator VR is more commonly used than RV for varistors in modern times.</p>
| <p>This is the initial part part of a 10 V power supply circuit from a 1970s (or perhaps early 1980s) chain printer. What is RV1 and what does it do?</p>
<p><a href="https://i.stack.imgur.com/D3K4f.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/D3K4f.png" alt="RV1" /></a></p>
| What is this device RV1 that looks like antiparallel diodes across the input of a bridge rectifier? | 2024-02-05T12:28:42.880 |
700193 | |operational-amplifier|circuit-analysis|schematics|voltage-reference| | <p>It looks like this is a precision current source for measuring resistance as in the <a href="https://www.ti.com/lit/ds/symlink/ref102.pdf?ts=1707132774070&ref_url=https%253A%252F%252Fwww.mouser.es%252F" rel="nofollow noreferrer">diagram from the dataheet</a>, shown below.</p>
<p>The OUT pin provides a stable voltage for the current. The voltage across R125 (454k) is exactly the voltage from OUT to COM (10V). thus setting the load current to about 22μA.</p>
<p>The load voltage is set by the resistance under test. It is the load voltage that the op-amp transfers to the COM pin allowing the REF102 to "float" on the load voltage.</p>
<p>Knowing the current, and measuring the voltage allows the load resistance to be calculated with Ohm's law.</p>
<p>The relay connects the current source to the load. Leaving the relay contacts open when the current source is not used may not be a good idea, might be unstable. Better to connect the current source output to ground or V- as suggested in the image, when not in use.</p>
<blockquote>
<p>The most strange for me is:</p>
</blockquote>
<blockquote>
<ol>
<li>the input of this op-amp depending on the REF device output, and</li>
</ol>
</blockquote>
<p>It doesn't. The configuration places 10V across R125, creating a constant current. The input voltage is determined by the load voltage responding to this current.</p>
<blockquote>
<ol start="2">
<li>the output of the op-amp is also the reference of the REF device.</li>
</ol>
</blockquote>
<p>Yes, in a way. The voltage on the op-amp output is the load voltage, thus allowing the 10V of the REF102 to "float" above the load voltage in order to maintain the constant current.</p>
<blockquote>
<ol start="3">
<li>Furthermore, the stablized output is the positive voltage rail of the op-amp.</li>
</ol>
</blockquote>
<p>No. The REF102 and the op-amp have a common 15V supply.</p>
<p><a href="https://i.stack.imgur.com/0ho00.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0ho00.png" alt="enter image description here" /></a></p>
| <p>I'm looking at the circuit schemes in which a precision voltage is used. I have never worked with them before.</p>
<p>I have read some literature and, obviously, its datasheet: <a href="https://www.ti.com/lit/ds/symlink/ref102.pdf?ts=1707132774070&ref_url=https%253A%252F%252Fwww.mouser.es%252F" rel="nofollow noreferrer">REF102U datasheet</a></p>
<p>I didn't find information about pinout function but I've read something like:</p>
<ul>
<li>v+ is an input voltage: voltage that is desired to stabilize</li>
<li>COM is a kind of ground of the circuit.</li>
<li>OUT is the voltage stabilized at 10V</li>
<li>Single-supply operation from 11.4V to 36V (I don't understand this spec)</li>
</ul>
<p>As you can see this circuit doesn't use TRIM.</p>
<p>I would like to find some sense to the complet circuit, but first I think I need to know how the precision device works with COM, V+ and OUT with this configuration.</p>
<p>With the inverted input connection, op-amp is trying to strongly keep the FORCE+ at the op-amp output side. But I felt really strange with the op-amp there. I have not usually worked with voltage reference devices before, so I wasn't sure of anything.</p>
<p>The most strange for me is:</p>
<ol>
<li>the input of this op-amp depending on the REF device output, and</li>
<li>the output of the op-amp is also the reference (ground) of the REF device.</li>
<li>Furthermore, the stablized output is the positive voltage rail of the op-amp. (mistake correction below)</li>
</ol>
<p>NOTE1: FORCE+ is a line that comes from a connector. It is supposed to be one of the 4 wires used for resistor measure. I'm not completely sure, but I would say that Force+ and Force- have too many votes to be the current source to connect the load.</p>
<p><a href="https://i.stack.imgur.com/enphY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/enphY.png" alt="FORCE- is connected to the GND" /></a></p>
<p>NOTE2: Circuit should be sawn with the relay under ON state.</p>
<p>Feel free to tell if I'm wrong.</p>
<ol start="3">
<li>So the op-amp output depends on an input voltage in the non inverter line. This input voltage comes from REF device and it depends on the op-amp output that connects to the ground device. (correction)</li>
</ol>
<p><a href="https://i.stack.imgur.com/i9nKV.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/i9nKV.png" alt="voltage referent circuit" /></a></p>
| How a REF102U precision voltage reference works? | 2024-02-05T13:18:25.483 |
700251 | |power-supply|mosfet|power-electronics|integrated-circuit|semiconductors| | <p>Relevant documents:</p>
<p><a href="https://docs.toradex.com/109463-verdin_development_board_datasheet_v1.1.pdf" rel="nofollow noreferrer">https://docs.toradex.com/109463-verdin_development_board_datasheet_v1.1.pdf</a> - looks like power input is on X57/X58, 6.3-26.4V input.</p>
<p><a href="https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4368.pdf" rel="nofollow noreferrer">https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4368.pdf</a> - under/over voltage, overcurrent protection device. Fancy, but then why would...</p>
<p><a href="https://www.vishay.com/docs/96396/vs-mbrb735-m3.pdf" rel="nofollow noreferrer">https://www.vishay.com/docs/96396/vs-mbrb735-m3.pdf</a> - it's a 35V 7A diode, nothing special.</p>
<p><a href="https://developer.toradex.com/hardware/verdin-som-family/carrier-boards/verdin-development-board/#design-resources" rel="nofollow noreferrer">https://developer.toradex.com/hardware/verdin-som-family/carrier-boards/verdin-development-board/#design-resources</a> - schematic download, Altium or PDF of interest here.</p>
<p>Looking at the PDFs, X57 and X58 are indeed on the sheet (p.3), cropped just outside of the image given. <em>D21 and D30 are shown X'd out</em>, indicating a do-not-populate directive via the Assembly Variants mechanism.</p>
<p>There is also a text box missing from the given image:</p>
<blockquote>
<p>WARNING: Hot-plugging a 26.4V power supply to the carrier board may trigger the protection IC (IC25) and prevent the product from powering up. This behaviour can be fixed by populating a 4.7nF 50V 0805 capacitor on the D30 footprint. (see Errata #13: HAR-9004 in the related errata
document).</p>
</blockquote>
<p>I think there are two root causes here:</p>
<ol>
<li><p>When loading an Altium design, always compile the project, check for SCH/PCB differences, check the Variants, and check the BomDoc and other supporting files, if used. It also doesn't hurt to check Project Options (particularly if parameters are in use), and the OutJob (if used) (to see if any parameters or variants in particular are being selected for output).</p>
<p>After these steps, with a variant selected, you can select compile view (tab at the bottom of SCH viewing area) to visually see what components are DNP or otherwise varied.</p>
<p>You can also check the BOM output (if provided), to see what has been omitted (admittedly, a nontrivial task on a BOM of this length), or if they are listed as 0 quantity / DNP.</p>
</li>
<li><p>They are probably doing an exclusive placement option, between D21 (reverse protection only, modest forward voltage drop), and all the OV/UV support components (T19, T33, IC25, etc.). I haven't loaded the schematic to confirm, but this should be sufficient information for you to do so.</p>
</li>
</ol>
| <p>I have come across the power supply management section used in the <a href="https://developer.toradex.com/hardware/verdin-som-family/carrier-boards/verdin-development-board/" rel="nofollow noreferrer">Verdin Development Board</a>, addressing overvoltage, undervoltage, overcurrent, and reverse voltage protection.</p>
<p>While I understand how the circuit is functioning, I am unsure about the necessity of the Schottky diode MBRB735PBF connected in parallel across the current path. It seems to be in a constant conducting state. Can you clarify the purpose of the lower circuitry when the diode already provides a parallel current path? How will it cut off the supply in the event of any occurring fault?</p>
<p><a href="https://i.stack.imgur.com/1szsi.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1szsi.png" alt="enter image description here" /></a></p>
| Purpose of Schottky diode in this schematic | 2024-02-05T18:59:45.590 |
700256 | |cables|probe|coax| | <p>The triaxial cables are for low-current, high-precision measurements in the nanoamp range. From the 2450 <a href="https://download.tek.com/datasheet/2450-Datasheet_1KW-60904-0.pdf" rel="noreferrer">datasheet</a>:</p>
<p><a href="https://i.stack.imgur.com/ElbHg.png" rel="noreferrer"><img src="https://i.stack.imgur.com/ElbHg.png" alt="Current specs showing a "triax-only" footnote for the lowest current values" /></a></p>
<p>The real-panel diagram shows how the conductors are connected. The second (middle) conductor is not merely another ground:</p>
<p><a href="https://i.stack.imgur.com/cC16W.png" rel="noreferrer"><img src="https://i.stack.imgur.com/cC16W.png" alt="Rear panel shot of the 2450 showing the triax connections" /></a></p>
<p>Cinch Connectivity has an <a href="https://www.belfuse.com/resources/whitepaper/cinchconnectivityolutions/trompeter/wp-CCS-TROM-using-triaxial-cables-for-low-current-measurements.pdf" rel="noreferrer">app note</a> that describes what's going on. The goal is to prevent leakage current through the cable insulation. This is done by applying a buffered copy of the force voltage to the middle conductors. This ensures that there's (almost) no voltage across the insulator surrounding the center conductors, which carry the real force and sense signals. Here's a diagram from the app note:</p>
<p><a href="https://i.stack.imgur.com/43z3H.png" rel="noreferrer"><img src="https://i.stack.imgur.com/43z3H.png" alt="Force-measure block diagram showing triaxial guard conductors" /></a></p>
| <p>The Keithley 2450 sourcemeter has two ways you can do a 4-probe measurement: in the front there are four banana connection ports labeled SENSE HI, SENSE LO,FORCE HI, and FORCE LO. In the back, there are four tri-ax connections with similar labels.</p>
<p>My confusion is that co-ax and tri-ax cables usually carry the signal line in their inner conductor and the return line in the outer conductor, as I understand it, so I would think these cables would carry the FORCE/SENSE HI and LO, and you would only need two triax cables to do a four probe measurement. What am I not understanding?</p>
| My sourcemeter lets me do a four probe connection using banana connectors or tri-ax. What do the extra lines on the tri-ax do? | 2024-02-05T19:31:18.383 |
700268 | |ohms-law|calculation| | <p>I'm going to make a huge guessing leap about this lab work and imagine that you are dealing with a tungsten lamp and that your lab <em>trainer</em> made a resistance measurement of the lamp, when cold; but you then made voltage and current measurements with the lamp active and hot.</p>
<p>From your numbers, I find <span class="math-container">\$\frac{5.795\:\text{V}}{36.2\:\text{mA}}= 160.082873\:\Omega\$</span>. That is also what you got when you arrived at the <em>calculated section</em> (of your workbook?)</p>
<p>The issue then is that the resistance measurement was taken under different conditions. The trainer resistance measurement was made with a cold filament, as the trainer resistance measurement uses a very small current. The trainer voltage and current measurements were taken after the filament had enough time to heat up and glow, and was at the time quite hot.</p>
<p>The specific resistance of tungsten varies from, for example, <span class="math-container">\$5.00\times 10^{−6}\:\Omega\cdot\text{cm}\$</span> at <span class="math-container">\$273.15^\circ\text{K}\$</span> to <span class="math-container">\$117.1\times 10^{−6}\:\Omega\cdot\text{cm}\$</span> at <span class="math-container">\$3655^\circ\text{K}\$</span>. A more detailed table can be found <a href="https://hypertextbook.com/facts/2004/DeannaStewart.shtml" rel="nofollow noreferrer">at this hypertextbook page</a>:</p>
<p><a href="https://i.stack.imgur.com/CCa3U.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CCa3U.png" alt="enter image description here" /></a></p>
<p>Assume for now that your resistance measurement of <span class="math-container">\$29.3\:\Omega\$</span> was made at about <span class="math-container">\$300^\circ\text{K}\$</span>. The ratio of resistance (cold vs hot) is <span class="math-container">\$\frac{160.1\:\Omega}{29.3\:\Omega} \approx 5.464\$</span>. If you look up that ratio on the above table then I think you will find that the likely temperature of the filament, when active and hot, is <span class="math-container">\$1200^\circ\text{K}\$</span>.</p>
<p>This is likely all you need to explain the results you have provided in your question. Both measurements were correct. They just weren't made under the same experimental conditions.</p>
| <p>This is definitely a very simple question for those in this community but I’m in a bit of a jam here. I did a lab where we simply measured the current, voltage and resistance on a low voltage trainer. I would upload the chart but apparently the file is too large. So for example I had measured 29.3ohms, 5.795V & 36.2mA in the lab for light 1. My problem is currently that when I calculate the resistance for the calculated section using the basic Ohms law of course, I get a far greater number (EG 160.1ohms for lamp 1). I understand that there should be a variance just due to natural occurrences (which is obviously supposed to be the point of the lab) but not this great, correct? Can someone please tell me where I am going wrong. Thank you in advance.</p>
| Parallel circuit calculations | 2024-02-05T20:45:48.213 |
700269 | |arduino|mosfet|led|mosfet-driver|led-driver| | <p>This isn't going to work. With the schematic you posted, only the yellow LEDs will light, all others will remain dark. The yellow LEDs will also get horribly overloaded and burn out.</p>
<p>What matters isn't just the forward voltage of the individual LEDs, but rather the forward voltage of an entire series string.</p>
<p>As an additional problem, no two LEDs are equal - they all have slightly different forward voltage, even if they're the same color and from the same batch. As a result, you can't connect them in parallel without some kind of balancing scheme. You could, for example, add small dropper resistors in series with each LED string to address this. The resistors should drop about 10% of the overall string's forward voltage as a rough guideline.</p>
<p>To address the problem with the individual colors, you will have to give each color its own programmable constant-current buck converter. The problem here is that even if you get proper current balance, that balance gets messed up as soon as you turn off one of the colors via your PWM MOSFETs. That's because the constant current will redistribute "around" the LEDs that have been turned off, making all the other LEDs brighter. In the extreme case, if you turn off all LED colors except for one, that one LED color will be hit with the full 12A from your buck converter and burn out.</p>
| <p>I am a complete beginner at designing circuits.</p>
<p>I was thinking of building an aquarium light. As plants need a full spectrum of light to grow properly, this is the selection of colours I came up with by watching many YouTube videos about this topic. I also wanted to adjust each colour separately with an Arduino or esp8266.</p>
<p>The first problem was to control these LEDs based on colour. Which I think I have solved with help from the internet. Please check if there are any problems with the Mosfet driver section.</p>
<p>I am planning on powering these LEDs with a voltage and current-controllable buck converter. (The LEDs are 1W each. They are bead-type LEDs commonly used in horticulture)
Now the problem is the red and the yellow LEDs have a lower forward voltage than the rest and there is also a smaller number of yellow LEDs. So, my questions are:</p>
<ol>
<li><p>Won't there be a lower resistance path through the red and yellow LEDs for the current to flow? Which in turn will make them brighter than the rest or possibly even damage them.</p>
</li>
<li><p>Is it ok to power LEDs with a higher voltage than the sum of forward voltages as long as the current is constant?</p>
</li>
<li><p>Is it ok to connect LEDs in parallel like in the schematic?</p>
</li>
<li><p>If this won't work, what are the other options I have to accomplish the goals I have?</p>
</li>
<li><p>And if this works (which I don't think it would) is the voltage and current (20.4V 12.6A) I'm planning on providing correspond with the need of the circuit?</p>
</li>
</ol>
<p><a href="https://i.stack.imgur.com/bXcI5.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bXcI5.png" alt="The schematic I was talking about" /></a></p>
<p>** Edit:</p>
<p>Is it possible to use something like this:</p>
<p><a href="https://i.stack.imgur.com/jR4bP.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jR4bP.jpg" alt="enter image description here" /></a></p>
<p>These are readily available in my country. There is an output voltage range of DC180-240V written on the device does that mean I can use a string of LEDs with a forward voltage within that range? Are these devices safe? Are they efficient? And most importantly will I be able to use the existing PWM dimming system I have? (Of course with a MOSFET of greater voltage rating)</p>
| Can I power LEDs of different forward voltages connected in parallel with a single constant current source? | 2024-02-05T21:15:27.473 |
700272 | |keypad| | <p>I thought I'd just suggest something for you to consider in the future. It has just enough features to be generally useful.</p>
<h3>keypad and scan driver</h3>
<p>Here's what I'd start with, with respect to the input pad:</p>
<p><a href="https://i.stack.imgur.com/RQnAb.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RQnAb.png" alt="enter image description here" /></a></p>
<p>The columns and rows have pull-ups. I'd probably use <span class="math-container">\$2.2\:\text{k}\Omega\$</span> resistors for this. The <a href="https://www.ti.com/lit/ds/symlink/sn5445.pdf?ts=1707294008210&ref_url=https%253A%252F%252Fwww.google.com%252F" rel="nofollow noreferrer">7445 BCD decoder</a> shown above is designed with outputs sporting high-breakdown transistors (<span class="math-container">\$30\:\text{V}\$</span>) that are able to sink <span class="math-container">\$80\:\text{mA}\$</span>. (Keeping in mind that with the right set of simultaneous key-presses it is technically possible for <strong>five</strong> of the pull-ups to be active at once.)</p>
<p>The above schematic block accepts a binary input at <span class="math-container">\$G_0\$</span> and <span class="math-container">\$G_1\$</span>. I have wired it above to scan the columns sequentially when provided with the output from a 2-bit twisted-ring Johnson counter.</p>
<h3>column scanning</h3>
<p>I tend to prefer a twisted ring Johnson counter (only one bit changes per state change), other things being equal.</p>
<p>I also like the 7476 over the 7474, perhaps in part because I've used a lot of them over the years and perhaps also in part because they sport async clear and set inputs. In this case, I've added a POR (power-on reset) feeding these JK FFs so that they come up in a known state. It's not necessary (who cares?), but I'm just being pedantic here.</p>
<p><a href="https://i.stack.imgur.com/w45k1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/w45k1.png" alt="enter image description here" /></a></p>
<p>A 555 timer (CMOS or otherwise) is shown providing the clock for scanning.</p>
<p>At this point, there are three ICs so far: 555 timer, 7445, and 7476. And these together will scan the columns and generate outputs <span class="math-container">\$C_1\dots C_4\$</span> and <span class="math-container">\$R_1\dots R_4\$</span>, which can be captured if any of <span class="math-container">\$R_1\dots R_4\$</span> goes <strong>LOW</strong>.</p>
<h3>recognizing a keypress</h3>
<p>Speaking of which, the following circuit uses Schmitt trigger 4-in NAND gates to provide a latch enable output (and its complement) whenever any of <span class="math-container">\$R_1\dots R_4\$</span> goes <strong>LOW</strong>.</p>
<p><a href="https://i.stack.imgur.com/KTupO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KTupO.png" alt="enter image description here" /></a></p>
<p><span class="math-container">\$LE\$</span> will be used by the 8-bit latch (coming up.) <span class="math-container">\$\overline{LE}\$</span> will be used by a <code>data avail</code> FF (also coming up.)</p>
<h3>data available signal</h3>
<p>It helps to provide a signal to indicate when a keypress has been captured. I'd use this:</p>
<p><a href="https://i.stack.imgur.com/uvjse.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/uvjse.png" alt="enter image description here" /></a></p>
<p>It's simple enough. However, depending upon how things power up (I'm not feeding this the POR signal) it may falsely signal a data available output. When first starting up, it's a good idea to just toggle the <span class="math-container">\$CLR\$</span> (which should normally be kept <strong>HIGH</strong> and toggled <strong>LOW</strong> to clear the data available signal.)</p>
<h3>row and column data latch</h3>
<p>This is pretty easy and accepts a rising edge on <span class="math-container">\$LE\$</span> to trigger the latching event. This will capture both the row and the column. (The active row and active column will be read as <strong>LOW</strong>, with the remaining bits hopefully <strong>HIGH</strong>.)</p>
<p><a href="https://i.stack.imgur.com/KLKPf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KLKPf.png" alt="enter image description here" /></a></p>
<h3>completed system</h3>
<p>All put together, it's this:</p>
<p><a href="https://i.stack.imgur.com/xzT1U.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xzT1U.png" alt="enter image description here" /></a></p>
<p>It's been some time since I've built one of these (decades and decades ago), back when using an MCU wasn't really an option and things had to be done this way. (And the above isn't what I built, then.)</p>
<p>Today, of course, an MCU would wipe the floor of something like what I've presented above. You should definitely considering using an MCU, instead. But perhaps you need the above to convince yourself of that. So there it is.</p>
<p>Best wishes.</p>
<p>P.S. Feel free to add those optos. I left that part for you.</p>
| <p>I am trying to implement a keypad decoder: it has 8 digital outputs, 4 that indicate the row of the pressed button, and the other 4 associated with columns. There are green LEDs that serve as a visual indicator.
I have worked with the scanning algorithm before, but wanted to go for something different this time. Here is the design I made in circuitjs and Proteus, with a 10mA current for each LED in mind, it works perfectly:
<a href="https://i.stack.imgur.com/t0FHB.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/t0FHB.jpg" alt="enter image description here" /></a></p>
<p>Each optoisolator has a pull-up resistor output, that gives 0 when the associated row is pressed; the same idea is used on the 2n2222a transistors, they give 0 at the output when its column is pressed, There is a group of capacitors for debouncing, and I intend to use a schmitt trigger to smoothen the signal.</p>
<p>In circuitjs, this is my representation of the keypad with my circuit (15k base resistor works fine, like 10k in Proteus):
<a href="https://i.stack.imgur.com/0UjxD.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0UjxD.jpg" alt="enter image description here" /></a></p>
<p>The keypad I am using is:
<a href="https://i.stack.imgur.com/Foe22.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Foe22.jpg" alt="enter image description here" /></a></p>
<p>I have implemented my circuit in a protoboard, following the same wiring, due to lack of components I am scanning one button at a time, alternating row and column pins; for the buttons that belong to the first row, the LEDs turn on as expected, however for the other rows, I see a voltage drop between the column and row pin (between 1V and 1.8V, depending on the LED color used), this drop causes the 2n2222a to not "turn on", not allowing its column LED to activate.</p>
<p>Any ideas on why this happens? Simulation works as intended.</p>
<p>EDIT: This is my circuit:
<a href="https://i.stack.imgur.com/r2SbX.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/r2SbX.jpg" alt="enter image description here" /></a></p>
<p>The black jumper wire is connected to C1 pin from keypad, the yellow one to Row1. Opto is a 4N25.</p>
| Rigid 4x4 keypad decoder - voltage drop | 2024-02-05T21:53:46.780 |
700275 | |usb|audio|adc| | <p>What you're asking for is not a simple wiring hack.</p>
<p>The Kraken USB headset, from the USB point of view, is a <em>digital</em> device. In fact the Kraken has a DAC in it. For it to work, it needs a digital stream from the upstream device (e.g. a PC or a phone). A direct analog connection won't work.</p>
<p>The thing you're asking for, 3.5mm phono to USB, would need to digitize the phono jack signal, then format it for USB to send on to the Kraken USB DAC. There's a lot involved in making that happen.</p>
<p>The headphone 'extender' you're talking about seems like it's a USB DAC with a 3.5mm jack port. That's the opposite of what you need, which would be an ADC, plus a USB-to-USB middleman of some sort.</p>
<p>Not exactly the cheap-and-cheerful solution you were thinking, yes? Seems like it would be less hassle to just get a set of analog phones to work with your amp.</p>
| <p>I have a Fender mustang GT40 which has a 3.5mm female audio jack connector so that the audio from the amp goes only to the headphones (crucial for me since I live in an apartment). It works wonders but I would really love to be able to connect my main headset to it.<br />
My main headset is a Razer Kraken Ultimate, it's connected via USB, it has a couple of extra features but I don't care for those to be available when I'm connected to the amp.</p>
<p>Is it possible to make a Female-USB to Male-3.5mm Audio Jack connector out of some disposable headphones and a USB F-M extender?<br />
I'm guessing so since there are a couple of those available in the market but most come around €5+ and that's a bit much for something so "simple".</p>
| DIY project - Listen to Guitar Amp on a USB headset | 2024-02-05T22:42:09.663 |
700286 | |bjt|current-sensing|high-side| | <p>The wildar or wilson current mirrors though more complex are probably a better fit. I have used both. Here is a good presentation. <a href="https://slideplayer.com/slide/2315840/" rel="nofollow noreferrer">https://slideplayer.com/slide/2315840/</a></p>
| <p>I have the following three states:<br />
State 1: When system is active with transducers, current through the load is approximately 350 mA.<br />
State 2: When system is activated without transducers, current through the load is approximately 100 mA.<br />
State 3: When in stand-by mode, current through the load is approximately 70 mA.</p>
<p>I am trying to sense current through the load to differentiate between states using a high-side current sense resistor. Supply voltage: 24 VDC.</p>
<p>I have the schematics as below, which would work if I increased the sense resistor to 3 Ω. This is not ideal, as I would like to keep the voltage drop across R1 under 2 V.</p>
<p>I understand I can use a high-side differential amplifier or current sense amplifier and easily solve this problem, but I would like to learn if there is a way to simplify the solution without an op-amp, since there is no precision required here.</p>
<p>Mainly, I need to verify either in State 1 or in State 2/3. Is there a way to differentiate between all 3 states without an op-amp?</p>
<p><a href="https://i.stack.imgur.com/hX7xV.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hX7xV.png" alt="enter image description here" /></a></p>
| High-side current sensing using PNP | 2024-02-06T01:14:17.757 |
700291 | |transfer-function|matlab|laplace-transform| | <p>The function has a pole at the origin which is also an infinite branch point.</p>
<p><a href="https://i.stack.imgur.com/IrLGd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/IrLGd.png" alt="enter image description here" /></a></p>
| <p>How do I find poles and zeroes from this complex transfer function?</p>
<p><span class="math-container">$$
H(s)
= \frac{2959}{100\,s}
- \frac{ 171\, \Gamma\left( \frac{7447}{10000} \right)}
{200\, s^{7447/10000}}
$$</span></p>
<p>I used the Laplace transform function in MATLAB and am trying to create a Bode plot using other functions. I believe if the order of a pole is not integer (1, 2, 3, ...) then I can't plot this with MATLAB's built-in functions, but can use another integrated toolbox like FOMCON available in MATLAB.</p>
<p>I searched online and I found that I could use the FOMCON toolbox, but I need to properly convert this into a form where I can find poles and zeroes; then I can provide input to the tool to create the Bode plot. Can anyone advise?</p>
<p><a href="https://i.stack.imgur.com/tDUOp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tDUOp.png" alt="enter image description here" /></a></p>
| How to find poles and zeroes in this kind of transfer function? | 2024-02-06T01:36:02.980 |
700294 | |identification|cmos| | <p>As you've discovered, TC160G is a family of gate arrays by Toshiba.</p>
<p>A gate array is a silicon chip pre-loaded with transistors, gates, etc., and no interconnects. A customer provides specifications for what gates, pins, etc. shall be interconnected, and the foundry builds that (metallization layers on top of the gate layers).</p>
<p>In short, it's a totally custom chip. You would have to ask the customer who ordered it.</p>
<p>The logo appears to be <a href="https://www.nsdcorp.com/" rel="nofollow noreferrer">NSD Corporation</a>.</p>
| <p><a href="https://i.stack.imgur.com/TuWXD.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/TuWXD.jpg" alt="enter image description here" /></a></p>
<p>I'm finding the pin numbers for this Toshiba IC. Google search results shows this <a href="https://pdf.dzsc.com/88888/2007926936450.pdf" rel="nofollow noreferrer">Datasheet</a>, but it doesn't have the pin numbers written. Thank you.</p>
<p>Bonus: What does this logo represents? They're all over the places in this PCB. <a href="https://i.stack.imgur.com/N1hbS.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/N1hbS.jpg" alt="enter image description here" /></a></p>
| TC160G IC pin numbers | 2024-02-06T01:51:15.370 |
700311 | |antenna|water|lightning|static| | <p>The voltages generated by RF transmission are not significant when compared to the 10-100 million volts of a lightning strike so the use of the radio will not be an increased risk. Using the radio in a thunderstorm however is unwise due to the risk of personal injury and equipment damage if you do get a strike.</p>
<p>By far the biggest risk is the presence of the antenna particularly if it is a vertical whip. Raising a vertical conductor over a flat surface is asking for a strike.</p>
<p>To mitigate equipment and structure damage it is common practice to provide an antenna switch which connects the antenna to the sea through a low impedance path and can be used when the radio is not in use or if lightning is likely.</p>
| <p>Because of my poor understanding of the interaction between static and flowing electrical charge, I don't trust my intuition about the answer to this question.</p>
<p>Essentially I'm asking if there could be a potential increase of a static charge imbalance on the antenna's surface due to current running to/through it, one that would significantly increase the potential difference between it and the thundercloud(s).</p>
<p>I don't recall ever getting "zapped" when I touched a ham radio antenna while it was in use, but that doesn't necessarily mean anything.</p>
| If a shipboard antenna isn't "grounded" to the water on a fiberglass-hulled boat, would using the radio (TX or RX) attract more lightning? | 2024-02-06T05:32:05.840 |