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697519 | |vlsi|synchronous|synchronization|asynchronous| | <blockquote>
<p>How does the second flip-flop in a naive synchronizer "prevent a metastable state from propagating"?</p>
</blockquote>
<p>It doesn't. It just makes it more unlikely, usually much more unlikely.</p>
<p>If you have the potential for metastability (ie you can't meet your setup and hold times, or your input logic levels), then the only thing you can do is wait long enough so that the probability of metastability propagating into your system is low enough to be ignored. You might set your acceptability threshold at one event per the age of the universe.</p>
<p>One flip-flop by itself is not really worthy of the name synchroniser. The badly timed edge could appear at any time before the clock pulse. On average, it will appear half way between clock pulses. In the worst case, it will appear right at the clock edge, resulting in zero time to allow the situation to resolve. One flip-flop by itself offers no minimum guarranteed waiting time.</p>
<p>If you add a second flip-flop after the first, then you have guarranteed a whole clock cycle to reduce the probability of a metastability event propagating.</p>
<p>It turns out that most flip flops families are fast enough internally that they can reduce the probability of metastability propagation by many, many orders of magnitude in one cycle of their fastest usable clock. Often a single extra flip-flop is enough to satisfy a casual designer that they have 'fixed the problem'.</p>
<p>If you now go looking for metastable events, you should be able to find them at measurable rates if you stress the system. Rather than having edges arrive randomly, control them using delay feedback to the tiny fraction of time around the clock edge where they will cause trouble. This will increase the probability of seeing an event by orders of magnitude. Secondly, increase the clock rate of the system to reduce the resolution time. Plot the rate of bad events versus the system clock frequency to quantify how quickly metastability is resolving in your system. This will allow you to extrapolate a measurable rate down to a ridiculously low target such as once in the age of the universe.</p>
<p>If after adding a second flip-flop, you find that some problem events are getting through, add a third, or a fourth. It only costs you latency.</p>
| <p>In <a href="https://electronics.stackexchange.com/questions/237725/how-does-2-ff-synchronizer-ensure-proper-synchonization">this</a> very nice answer it's explained that, fundamentally, a two flip-flop synchronizer's basic operation is to prevent the propagation of a metastable state (effectively, an invalid logic level) from propagating down a system. I still don't totally follow how this actually works though.</p>
<p>Suppose the worst happens and FF1 enters a metastable state. Its output is floating somewhere near mid-rail but (slowly) moving one way or the other. Now based on the required MTBF we arrange for some <span class="math-container">\$T_c\$</span> in the receiving system such that it is very likely that the output has settled before launching the FF1 output to the FF2 output.</p>
<p>I have two questions:</p>
<p><strong>Q1)</strong> If we didn't have FF2, what would go wrong? Is the issue that driving combinational logic with a potentially invalid input burns power? That is, I just want to be clear that the role of a synchronizer is not (necessarily) to ensure that the <em>correct</em> value is captured so much as that <em>some</em> valid logic value is captured.</p>
<p><strong>Q2)</strong> Since the argument above is probabilistic, it's possible that FF1's output will not have settled when FF2 launches and we thus get an invalid D2 input when FF2 launches. Does this basically mean FF2's Q2 output will be (potentially) metastable/mid-rail and thus we're led to whatever problem answers Q1? If this is correct, is the precise statement to be made that FF2 "prevent[s] a metastable state from propagating [with a high degree of probability]", whereas a single-flip-flop solution would be guaranteed to have a metastable state propagate?</p>
| How does the second flip-flop in a naive synchronizer "prevent a metastable state from propagating"? | 2024-01-13T22:24:54.613 |
697523 | |uart|switching|esp32|multiplexer|analog-switch| | <p>With your circuit, you need to add pull-ups to your TXD1 and TXD2 lines so that they are not floating when they are not connected to the common TX line. Other than that, I don't see anything wrong logic-wise, and the switching speed of your device seems fast enough for typical UART baud rates. If you're using controlled impedance traces, the ON resistance of the analog switches may complicate things.</p>
<p>Instead of an analog switch, you can use a digital 2-line to 1-line data selector such as the <a href="https://www.ti.com/lit/gpn/sn74lvc157a" rel="nofollow noreferrer">74LVC157</a>, which incorporates 4 selector circuits controlled by the same A/B and enable pins.</p>
<p><a href="https://i.stack.imgur.com/suBQe.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/suBQe.png" alt="Logic Diagram" /></a></p>
<p>The 74LVC157 could be wired as follows for your application (DOUBLE-CHECK, NOT TESTED):</p>
<div class="s-table-container">
<table class="s-table">
<thead>
<tr>
<th>IC Pin</th>
<th>Connection</th>
</tr>
</thead>
<tbody>
<tr>
<td>1A</td>
<td>MCU TX</td>
</tr>
<tr>
<td>1B</td>
<td>VCC</td>
</tr>
<tr>
<td>1Y</td>
<td>TXD1</td>
</tr>
<tr>
<td>2A</td>
<td>VCC</td>
</tr>
<tr>
<td>2B</td>
<td>MCU TX</td>
</tr>
<tr>
<td>2Y</td>
<td>TXD2</td>
</tr>
<tr>
<td>3A</td>
<td>RXD1</td>
</tr>
<tr>
<td>3B</td>
<td>RXD2</td>
</tr>
<tr>
<td>3Y</td>
<td>MCU RX</td>
</tr>
<tr>
<td>4A</td>
<td>GND or VCC</td>
</tr>
<tr>
<td>4B</td>
<td>GND or VCC</td>
</tr>
<tr>
<td>4Y</td>
<td>Not connected</td>
</tr>
<tr>
<td>nG</td>
<td>GND</td>
</tr>
<tr>
<td>nA/B</td>
<td>MCU A/B select output</td>
</tr>
</tbody>
</table>
</div>
<p>The truth table would be:</p>
<div class="s-table-container">
<table class="s-table">
<thead>
<tr>
<th>nA/B</th>
<th>MCU RX</th>
<th>TXDA</th>
<th>TXDB</th>
</tr>
</thead>
<tbody>
<tr>
<td>L</td>
<td>RXDA</td>
<td>MCU TX</td>
<td>H</td>
</tr>
<tr>
<td>H</td>
<td>RXDB</td>
<td>H</td>
<td>MCU TX</td>
</tr>
</tbody>
</table>
</div>
<p>If supply current is important for your application, the supply current of a TI SN74LVC157A is only 1µA @ 25°C, compared to 20µA for the SN74LV4052A.</p>
| <p>I am using SN74LV4052APW as UART switch with ESP32-S2 SoC Design. I have 3X UART in the design but since ESP32-S2 supports only two UART channels so I had to use this electronic switch to switch between 2 UARTs. One UART is for Firmware upload via USB and 2nd UART is connected to a dispenser. I am attaching my schematic and Channel select diagram from datasheet.
Will it work fine?
<a href="https://i.stack.imgur.com/inEuP.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/inEuP.png" alt="UART Switch" /></a>
<a href="https://i.stack.imgur.com/xPIw6.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xPIw6.png" alt="Logic Diagram" /></a></p>
| SN74LV4052APW as UART Switch | 2024-01-13T23:00:53.117 |
697529 | |led|resistors|breadboard|ohms-law|arduino-uno| | <p>You should get a data sheet from the chip manufacturer for a current output spec. Then buy LEDs accordingly. Then you can limit the current calculating the resister value. Or, put a potentiometer in the test circuit and measure the resistance at the desired brightness across the pot and use that value for fixed resistor.</p>
| <p>I am currently working on a school project for my work-study. The project is super simple: light up 4 LEDs, in various patterns, using a push button to cycle through the modes. I'm using 4 colored LEDs, a breadboard, resistors, jumpers, and an Arduino UNO.</p>
<p>I am brand new to electrical engineering, and have spent the night learning about resistors. I have 5 band resistors, cheap blue ones, and I have been trying to use Ohm's Law to figure out the right resistor to use.</p>
<p>By my calculations @ 5V power, ~2V for the LED (taking voltage drop into consideration), and ~10-20mA current you end up with something like a 150ohm resistor.</p>
<p>My professor used 1000ohm resistors when he helped me start building my setup, so now I am confused as to why he would have chosen 1000 if Ohm's Law states you ought to need closer to 150? I have all sorts of resistor values, including 100, 220, and 1000. I am using a separate resistor for every LED, since they must be separately controlled.</p>
<p>My setup, with 1000ohm resistors used:</p>
<p><a href="https://i.stack.imgur.com/2vddK.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2vddK.jpg" alt="Arduino/breadboard/LED setup" /></a></p>
| What resistors for a 4 LED Arduino/breadboard project? | 2024-01-14T00:02:21.137 |
697554 | |amplifier|power-amplifier|darlington|class-ab|class-a| | <p>I just noticed that I made a miscalculation for R5, so the Q-point is way off the middle of the DC loadline, potentially cutting off some of the signal in the negative cycle.</p>
<p>However, as user <a href="https://electronics.stackexchange.com/users/361832/unawriter">unawriter</a> has pointed out, the speaker can only pull as much as the emitter DC current, so regardless of where the Q-point is, there will always be cutoff in the negative cycle should the signal's current surpasses the emitter DC current.</p>
<p>I write this answer also to say thank you to <a href="https://electronics.stackexchange.com/users/347817/franc">Franc</a>, <a href="https://electronics.stackexchange.com/users/361832/unawriter">unawriter</a>, and <a href="https://electronics.stackexchange.com/users/330261/periblepsis">periblepsis</a> for pointing me to the right direction in terms of what the problem is and what to do.</p>
<p>I wish I could mark all of your answers as correct but that doesn't work in StackExchange, so I hope this should do.</p>
| <p>I'm trying to design an audio amplifier. The preamp stage is a voltage divider CE, while the power stage is a Darlington Class A:</p>
<p><a href="https://i.stack.imgur.com/8CcwZ.png" rel="noreferrer"><img src="https://i.stack.imgur.com/8CcwZ.png" alt="enter image description here" /></a></p>
<p>My goal is to amplify a <span class="math-container">\$48.7\ \mathrm{mV},\ 1.07\ \mathrm{mA}\$</span> (RMS) signal from my phone to have a power of <span class="math-container">\$1\ \mathrm{W}\$</span>.</p>
<p>Therefore, I'm choosing <span class="math-container">\$A_v = 20\$</span> and <span class="math-container">\$A_i = 1000\$</span>.</p>
<p>The design works well for the aforementioned signal. I would also want the amplifier to work when the volume is maximum (RMS voltage is almost <span class="math-container">\$500\ \mathrm{mV}\$</span>). However, the signal gets cut off quite badly for the maximum volume signal:</p>
<p><a href="https://i.stack.imgur.com/ju8An.png" rel="noreferrer"><img src="https://i.stack.imgur.com/ju8An.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/r4IcO.png" rel="noreferrer"><img src="https://i.stack.imgur.com/r4IcO.png" alt="enter image description here" /></a></p>
<p>I have tried and considered the followings:</p>
<ul>
<li><strong>Reducing <span class="math-container">\$A_v\$</span> and move the Q-point of Q1 to a higher <span class="math-container">\$I_c\$</span> and lower <span class="math-container">\$V_{CE}\ \$</span>value</strong> : I tried <span class="math-container">\$A_v=6\$</span> and Q-point to <span class="math-container">\$I_C = \frac{2}{3}I_{Cmax}\$</span> but there is still some cutoff:</li>
</ul>
<p><a href="https://i.stack.imgur.com/Q9yPs.png" rel="noreferrer"><img src="https://i.stack.imgur.com/Q9yPs.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/xt25f.png" rel="noreferrer"><img src="https://i.stack.imgur.com/xt25f.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/cySij.png" rel="noreferrer"><img src="https://i.stack.imgur.com/cySij.png" alt="enter image description here" /></a></p>
<p>I'm not really sure about if going further for the values is a good thing. I'm already violating the "<em>Q-point in the middle of DC loadline</em>" rule.</p>
<ul>
<li><strong>Getting a higher DC voltage:</strong> I'm thinking <span class="math-container">\$24\ \mathrm{V}\$</span> would help, but I'm already having a <span class="math-container">\$15\ \mathrm{V}\$</span> rectifier circuit. Increasing it to <span class="math-container">\$24\ \mathrm{V}\$</span> would require a bulkier and more expensive transformer (my current one is sending <span class="math-container">\$21\ \mathrm{V}\$</span> ripple voltage into a LM7815).</li>
<li><strong>Switching to a class AB amplifier:</strong> Each Darlington pair of the class AB amplifier would only need to work with more than half of the signal cycle, so almost double the headroom for the amplified signal. However, I don't have much experience on designing this so please explain to me in details if you think this is a good idea.</li>
</ul>
<p>Other than the main problem mentioned, I would greatly appreciate any other comment on the design of my amplifier.</p>
| Need help with audio amplifier design for loud volume | 2024-01-14T05:31:05.580 |
697561 | |transformer|inductor|skin-effect|wire-size| | <p>The product photo shown in your question is an 800W (400V in, 12V out) ZVS full bridge converter. The inductor you marked is the output choke. The answer below applies to DC-DC converters in general and buck-derived topologies specifically.</p>
<blockquote>
<p>Why skin effect is respected when it comes to transformers but not to filters, even when they are dealing with same high frequencies?</p>
</blockquote>
<p>The current flowing through the output choke has two components:</p>
<ul>
<li>The DC component, which is the output current that flows to the load</li>
<li>The AC component, which is the ripple current that flows through the output capacitor(s)</li>
</ul>
<p>For DC-DC converter applications, the amplitude of this ripple is generally much lower than the DC component (usually between 10% and 40% of the DC current but depends on the application). Therefore, the copper loss component due to the AC current and the skin effect is generally much lower compared to the core loss or the DC copper loss (If the operation mode is DCM the amplitude drops further therefore the loss becomes much less).</p>
<p><a href="https://i.stack.imgur.com/JH9U3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JH9U3.png" alt="enter image description here" /></a></p>
<p><sup><a href="https://electronics.stackexchange.com/questions/463590/bad-waveform-on-output-of-buck-converter">Img Src</a></sup></p>
<p>The inductor shown in the product photo has a DC resistance of 1 mOhm. Since the output current is 67 ADC, the copper loss due to the DC current will be 4.5 W. If we assume the ripple current is 5 App (peak-to-peak), the RMS current of the ripple will be ~1.5 A. Even if we assume the AC resistance peaks up to 100 mOhm which is a very pessimistic guess, the AC copper loss becomes approx 0.23 W.</p>
<p>But for the main transformer, especially for the primary winding, the entire copper loss comes from the AC current and the skin effect. So the designer should be more careful when designing the transformer windings.</p>
| <p>Why skin effect is respected when it comes to transformers but not to filters, even when they are dealing with same high frequencies?
For example, in full bridge SMPS, with more than 100 kHz, we found that the wire thickness is too small in transformer and too thick in the output filter.</p>
<p><a href="https://i.stack.imgur.com/OpYvp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OpYvp.png" alt="enter image description here" /></a></p>
<p><a href="https://www.farnell.com/datasheets/2711972.pdf" rel="nofollow noreferrer">Image source</a></p>
| Confused about skin effect | 2024-01-14T07:33:16.777 |
697562 | |inductor|oscillator|switching|pulse|resonance| | <blockquote>
<p>However, no matter what I do, I can never get the voltage within the LC circuit to go above the supply voltage...</p>
</blockquote>
<p>I have been able to observe damping and non-damping oscillations in an LC tank using the conceptual arrangement below. A programmable CSV voltage source produces narrow pulses that control the low-side switch SW.</p>
<h2>Damped oscillation</h2>
<p>At 10ms, a single pulse excites damped oscillations in the LC tank. The voltage at its lower end periodically rises above and falls below Vcc.</p>
<p><img src="https://i.stack.imgur.com/c1dfo.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fc1dfo.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p><a href="https://i.stack.imgur.com/imlm1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/imlm1.png" alt="STEP 1a" /></a></p>
<p><a href="https://i.stack.imgur.com/gctZW.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gctZW.png" alt="STEP 1b" /></a></p>
<h2>Undamped oscillation</h2>
<p>Now a series of pulses excites undamped oscillations in the LC tank at a frequency of 50 Hz. At the moment when the voltage at the lower end of the LC tank is at its lowest (close to ground), the switch closes briefly and "pulls" that end to ground; a small step is obtained in this moment. As above, the LC voltage periodically rises above and falls below Vcc.</p>
<p><img src="https://i.stack.imgur.com/Jr7B4.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fJr7B4.png">simulate this circuit</a></sup></p>
<p><a href="https://i.stack.imgur.com/cvFLx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cvFLx.png" alt="STEP 2a" /></a></p>
<p><a href="https://i.stack.imgur.com/I4B6o.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/I4B6o.png" alt="STEP 2b" /></a></p>
| <p>I've been exploring the idea of making an induction heater.<br />
Mostly I see people using the ZVS circuit to do it, but I would like to get an understanding as to how you would do it if you had an ADC and a microcontroller (where you could switch the transistor/s at any given point in the wave).</p>
<p>I've read <a href="https://electronics.stackexchange.com/questions/627863/can-a-pwm-source-be-used-to-drive-an-lc-circuit-to-get-it-to-resonate">Can a PWM source be used to drive an LC circuit to get it to resonate?</a> and <a href="https://electronics.stackexchange.com/questions/628249/question-lc-tank-resonance-duty-cycle-back-emf">Question - LC Tank - Resonance , Duty Cycle , Back EMF</a>.</p>
<p>In both questions there's user <a href="https://electronics.stackexchange.com/users/20218/andy-aka">Andy aka</a> showing a circuit with a transistor driving the LC tank on the low side. I recreated it in falstad:<br />
<a href="https://i.stack.imgur.com/VPO3e.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VPO3e.png" alt="enter image description here" /></a><br />
The 2.5μH and ~1μF do resonate at 100kHz.</p>
<p>However, no matter what I do, I can never get the voltage within the LC circuit to go above the supply voltage. The swing across the inductor is ±5v which means that there is at most 10V at the collector. It always looks like this (green is voltage across inductor/capacitor, yellow is current through the inductor, red is the pulses):<br />
<a href="https://i.stack.imgur.com/KhqK8.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KhqK8.png" alt="enter image description here" /></a><br />
(voltage and current are not 1:1 in terms of scale due to some automatic scaling falstad does)</p>
<p>It seems the oscillation always 'synchronizes' with the pulses, such that the transistor only conducts when the voltage across the capacitor is the same as the supply voltage. This ultimately makes it have no effect on the current, because the inductor is still getting the same voltage across it that it would get from the capacitor alone.</p>
<p>Seems to me like the more opportune time to turn on the transistor is the point where the capacitor voltage is equal to the supply (so the capacitor isn't disturbed), and the current is increasing:<br />
<a href="https://i.stack.imgur.com/9acIhm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/9acIhm.png" alt="enter image description here" /></a><br />
Here the current should also keep it's slope as the voltage across the inductor doesn't change.</p>
<p>I tried this manually by just manually switching a switch, and it seems to work:
<a href="https://i.stack.imgur.com/e876Zl.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/e876Zl.png" alt="enter image description here" /></a><br />
The resistor is to simulate losses.</p>
<p>In the aforementioned scenario where an ADC is used (or I suppose a comparator could achieve the same goal) with a microcontroller, this could be the point at which to do the switching. The only issue I see with doing so is that it would reduce frequency based on how long it was switched on.</p>
<p>Am I doing something wrong that my simulation doesn't work like Andy aka's?<br />
Is the above switching 'moment' the appropriate one if the goal is to get as much amplitude as possible? Or for an induction heater application?</p>
| How can I drive an LC tank with a transistor? | 2024-01-14T08:12:30.400 |
697572 | |inductor|electromagnetism|inductance|energy|storage| | <p>No. The energy stored in an inductor is 0.5LI^2.
So it depends mainly on current. Voltage is irrelevant</p>
| <p>A very low current with very high voltage can travel through high resistant wires without much loss. Could this type of current be used on magnetic energy storage without superconducting materials?</p>
<p>Superconducting magnetic energy storage systems work by making an electromagnetic field on a superconducting coil, which in turn self-induces a current that produces an electromagnetic field.
Since the superconducting material have almost no resistance at all, it has almost no losses and keeps self-inducing the current until discharge.</p>
<p>The logic goes that since very high voltages can travel through wires with very high resistance without many losses, then an induction of such current on an electromagnet could produce a very low loss inductance.</p>
<p>Or I'm incorrect also?</p>
| Could a very high voltage and very low current allow a non-superconducting magnetic energy storage system? | 2024-01-14T10:01:03.763 |
697573 | |arduino|operational-amplifier|capacitor|voltage-divider| | <p>The output of the 741 can't get closer to the rails than about 2 V, so with a single supply of, say, 0 and 12 V, the output would be limited to between about 2 and 10 V.</p>
<p>You could use a split supply, but it would be easier to use a rail-to-rail op-amp, and avoid the obsolete 741.</p>
<p>You could also try smaller voltage divider resistors.</p>
<p>BTW: The recommendation for the ADC is what it is, but the standard Arduino library for the ADC allows a <em>very</em> long time for the ADC to settle (which is why it is slow when you use the default settings), so you can get away with a higher impedance than the recommendation.</p>
| <p>I am currently working on a project that requires me to measure a capacitor voltage that can reach up to 250 V.</p>
<p>To measure such a high voltage I first created a voltage divider with very high resistor values so the capacitor doesn't discharge very fast (resistor1 = 10 MΩ, resistor2 = 200 kΩ). The problem is that with such high resistor values the Arduino doesn't measure the voltage exactly, since the max. resistor recommendation for the Arduino ADC is 10 kΩ.</p>
<p>I decided to wire an op-amp as a voltage follower to have lower impedance on the output, but the voltage follower doesn't measure capacitor voltages lower than 100 V (or 1.96 V after the divider) and what happens is that, when the voltage falls below that, the follower produces a small voltage by itself (around 1.9 V), thus tricking the Arduino into calculating the wrong voltage of the capacitor. The op-amp I'm using is the UA741 and I'm powering it with single rail supply.</p>
<p>Does anyone know why the voltage follower doesn't work?</p>
| Voltage follower generates voltage by itself | 2024-01-14T10:23:58.700 |
697596 | |arduino|interrupts|beaglebone-black|lora|sx1276| | <p>The issue turned out to be a faulty powerline the board was connected to; it was not connected properly, resulting in the board resetting itself into FSK/OOK mode and thus the register containing the IRQ flags took on a different meaning and value.</p>
| <p>I am using an SX1276 chip from Paradisetronic. I adapted the Arduino RadioLib library to my board (Beaglebone Black Rev C). I noticed that the IRQ flags will not be cleared. According to the <a href="https://www.mouser.com/datasheet/2/761/sx1276-1278113.pdf" rel="nofollow noreferrer">manual</a> (page 111) writing a 1 to these bits clears the interrupt, but this does not happen for me for some reason (see attached image captured by logic analyzer). The lower 7 bits remain set no matter what.</p>
<p>Furthermore, the chip allows for hardware interrupt signals to be sent, but no matter what happens no signals occur, even though I do set the modes appropriately (<a href="https://www.mouser.com/datasheet/2/761/sx1276-1278113.pdf" rel="nofollow noreferrer">manual</a> page 46). I would assume that if an interrupt happens, the appropriate interrupt signal would be triggered, but nothing happens. Does anyone have any ideas or suggestions?</p>
<p>PS. I did not post my code because its a few 100 lines, but I have cross-referenced with the <a href="https://github.com/jgromes/RadioLib/blob/master/src/modules/SX127x/SX127x.cpp" rel="nofollow noreferrer">RadioLib Implementation</a> and it is all identical, with the main difference being that I only converted the LoRa code as I am not planning on using FSK/OOK.</p>
<p>The SPI signals all look fine and the setup I do is identical to that in RadioLib</p>
<p><a href="https://i.stack.imgur.com/Wek4Z.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Wek4Z.png" alt="enter image description here" /></a></p>
<p>EDIT: I tried writing 0's instead of 1's to clear the IRQs and now the IRQs remain 0. It seems like this contradicts the manual?</p>
| SX1276 Interrupt Flags never clear, and digital IO lines never rise/fall | 2024-01-14T15:39:13.290 |
697597 | |arduino|switches|power-electronics|esp32| | <p>There are a couple of things you can do:</p>
<ul>
<li>Use a semiconductor switch (BJT or MOSFET) with a direct connection</li>
</ul>
<p><img src="https://i.stack.imgur.com/x1LjV.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fx1LjV.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p><code>INTERCONNECTION</code> above represents the connection between the nodes. It can be a wire-to-wire connector or simply a wire that connects both sides. Choose whatever you want, up to you. Also, I used M1 MOSFET (2N7002 which can be driven easily with 3.3V from ESP/Arduino) but can be a BJT such as BC547 or a similar one.</p>
<hr />
<ul>
<li>Use an optoisolator (a.k.a. optocoupler) to keep both sides isolated</li>
</ul>
<p>This would work better if you could know the pull-up resistor on <code>FOB_INPUT</code> lane but should work:</p>
<p><img src="https://i.stack.imgur.com/msQao.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fmsQao.png">simulate this circuit</a></sup></p>
<hr />
<ul>
<li>Use a miniature relay - again, to keep both sides isolated</li>
</ul>
<p><img src="https://i.stack.imgur.com/DcpfE.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fDcpfE.png">simulate this circuit</a></sup></p>
<p>This one is a bit more complex. Although I marked the relay supply as <code>ESP_VCC</code>, it can be any external voltage. But the relay should be one that can work with that level.</p>
| <p>Trying to figure out how to use an Arduino or ESP32F board (3.3V) to activate a button on a remote control fob.</p>
<p>The fob is powered by two coin-cell batteries (CR2016 3V) in series. It measures ~ 6.5V and <a href="https://data.energizer.com/pdfs/cr2016.pdf" rel="nofollow noreferrer">data sheet</a> says each battery is 100 mAh.</p>
<p>When I look at the voltage as the button is pressed, it looks like it brings it down to 0, from ~ 6.5V.</p>
<p>Can I use my Arduino board to activate the switch by adding a resistor between the button and the Arduino board and having the related pin bring the signal down?</p>
<p>Not sure how to approach solving this problem</p>
| Using Arduino to activate a switch on a separate device with a different voltage | 2024-01-14T15:39:19.183 |
697606 | |amplifier|audio|active-filter| | <p>Yes, this will work. It is essentially equivalent if the crossover (filter) is before or after the amplifier.</p>
<p>Basically the crossover is a filter. However the common implementations do have dependency on the source and load impedance driving it, so the same component values used in the load end won't work equivalently when placed in the source (e.g. amplifier input) end of the signal chain.</p>
| <p>I want to use a <a href="https://www.st.com/web/en/resource/technical/document/datasheet/CD00171346.pdf" rel="nofollow noreferrer">STA540</a> amplifier IC in Stereo plus bridge configuration (page 11, figure 6).</p>
<p>The idea is to have the chip drive two 4 Ohm tweeters and one 8 ohm Mid/Woofer.</p>
<p>Since passive crossover are quite expensive, I thought of using an active one before amplification. Could this work? Are there any fall backs?</p>
<p>The input signal comes from a Baxandall active volume control (not shown) and is biased at VCC/2.</p>
<p>VCC is 16V to aim to:
1x16W into 8 Ohm and
2x8W into 4 Ohm<br />
<a href="https://i.stack.imgur.com/JR3Bo.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JR3Bo.png" alt="enter image description here" /></a></p>
| Active crossover filter for AB AMP | 2024-01-14T17:31:04.683 |
697618 | |thermal|heatsink|scr|to220| | <p>Yes, this is fine. Note that you should leave a fairly large hole in the PCB to provide access for the screw and screwdriver, which may make routing more challenging. Alternately, position the device near the board edge, so the screw can be accessed freely (almost as shown).</p>
<p>If insulation is required, the usual route is a thermal pad, with shoulder washer for the screw. With isolated tab an option, the shoulder washer could be omitted, and insulation used just for clearance around the leads if needed (or if thermal pad is more convenient for manufacturing than grease).</p>
<p>Another option is to use spring retention, like these, <br />
<a href="https://www.digikey.com/en/products/detail/aavid-thermal-division-of-boyd-corporation/MAX07NG/1625383" rel="noreferrer">MAX07NG Aavid, Thermal Division of Boyd Corporation | Digikey</a> <br />
combined with a thermal pad (plain, no hole). You might prefer the non-isolated version SCR for slightly lower RthJC, which helps make up for the higher resistance of the thermal pad.</p>
<p>The PCB itself can also be used as mounting clamp, though it's a bit sketchy because of straining the board (makes putting ceramic capacitors nearby problematic, for example), plus board material isn't great at retaining stress (FR-4 cold-flows a bit). A typical build might flank the component with two screws into the heatsink. On the upside, this scales well when a row of devices needs to be clamped down, since a screw can sit inbetween pairs.</p>
<p>If the problem is clearance around the leads, partial potting might be considered. It could be gooped around just the base of the part; probably an approved application and inspection process will be needed.</p>
<p>As for SMTs, I wouldn't recommend it for this power level. You need thermal vias and enough pour area to spread out the heat, until it can get into a thermal pad and the bulk heatsink. It's good up to 5W or so, but 10 would be pushing it. Potential improvements include: thinner PCB (shorter vias, lower Rth from board material itself), heavier plating (e.g. 1oz foil plated 2oz+, thus leaving heavy walls in the vias), heavier copper in general (spread heat out further in the first place), heat spreader components around the tab (whether bits of SMT metal, or those AlN chips -- the latter are probably too expensive, but interesting especially where isolation is required), etc. Enough such improvements should get you there, but maybe that starts to drive the fab cost up as well, and you'll want to compare quotes versus other assembly methods.</p>
<p>There's also metal-core PCB. Limitations are few layers (preferably just one!), and possibly poor insulation between conductor and core (I haven't checked offhand what typical ratings are; enough for nominal voltage, but safety I'm not sure?). If nothing else, it could be useful as a heat spreader -- treat the core as live, and use a thermal pad between it and the heatsink.</p>
<p>Also, to avoid clamping forces and hardware, you might consider a bonding TIM like this, <br />
<a href="https://www.mouser.com/datasheet/2/48/BERGQUIST_BOND_PLY_TBP_1400LMS_HD_EN-1534629.pdf" rel="noreferrer">BERGQUIST BOND PLY TBP 1400LMS-HD Technical Data Sheet</a> <br />
parts can be clamped in place (perhaps with a jig for accurate positioning) and is self-adhesive to start, then can be cured for a permanent bond.</p>
| <p>I have two SCRs in my design that will be switching up to 15A at 120-240VAC. The two devices will split the power, with each one conducting a half cycle. I'm considering using the <a href="https://www.littelfuse.com/media?resourcetype=datasheets&itemid=7ccaa6cd-4318-4c16-b5ce-306d14d88055&filename=littelfuse-thyristor-sxx20x-sxx25x-datasheet" rel="noreferrer">S6025 by Littelfuse</a>.</p>
<p>The power through each device works out to...</p>
<p>(15A * 1.5V) / 2 = 11.25W per device</p>
<p>I'd like a flatter profile for my PCB so it can fit in a slim enclosure. I'm considering a few options...</p>
<ol>
<li><p>Using a D2Pak. I'm skeptical of a D2Pak carrying so much power because the metal tab is connected to the PCB, not a heat sink. Can this be done?</p>
</li>
<li><p>Mounting a TO220 like a D2Pak but with with the metal tab upwards and attached to a heat sink (see diagram). The leads of the TO220 don't seem to have enough clearance to get past an NRTL. They're only ~1.44mm apart in the worst case.</p>
</li>
</ol>
<p>Edit: Just to clarify, I believe both the clearances from leads to heatsink and leads to other leads aren't enough.</p>
<p><a href="https://i.stack.imgur.com/G0AYF.png" rel="noreferrer"><img src="https://i.stack.imgur.com/G0AYF.png" alt="TO220 Mounted Flat on PCB" /></a></p>
<ol start="3">
<li>Using an alternative, wider-pitched package like TOP-3 or TO-247. These cost ~3-10x as much as the TO220 alternatives.</li>
</ol>
<p>Is there a cost-effective way to dissipate 11.25W from an SCR without a TO220 standing 2cm tall?</p>
| Mounting an 11W SCR with a Flat Profile | 2024-01-14T19:17:26.477 |
697638 | |amplifier|bjt| | <p>Answer to your question: Yes and no.</p>
<p>Let me explain: Sometimes - in particular for linear(ized) small-circuit circuit simulations - we are using an ac input signal of 1V. This is convenient because in this case the output signal is identical to the gain of the circuit.</p>
<p>Question: Is this OK for such a small-signal analysis?</p>
<p>Answer: Yes - because "small signal" does not mean that the input sgnal must be as small as possible. In fact, the input signal can be as large as you want - but from the simulator it is treated as if it were a small signal (due to the linearized model).</p>
<p>But the user should know that - in the real world - the result applies to "small-signals" only. And in this respect "small" means: So small that the errors (non-linearities) are within acceptable limits (application dependent).</p>
| <p>According to the small signal model, a CE amplifier amplifies only the signal component of the input voltage that causes small perturbations around the operating point. My question is if we put say a > 1 V sinusoidal signal on the base terminal, then wouldn't the perturbations around the Q point be much larger than the mV range the small signal model requires? How does the transistor amplify this if this is the case?</p>
| Is the small signal model of a BJT amplifier valid for any sinusoidal signal? | 2024-01-15T01:52:45.827 |
697641 | |power-supply| | <p>Looks like it's a diode-OR function. I would assume the connection is in case there's already a 12V standby present in the system.</p>
<p>Assuming there are no new connections on the backside, of course.</p>
<p>But the real answer is: read the manual. If there's no manual, guide, spec sheet... then it's anyone's guess how it's supposed to work.</p>
| <p>Just bought an adapter to use an ATX psu as replacement to an HP proprietary one. It has a step-up module which converts the ATX 5vsb to 12vsb. I just want to know what the extra 12v input is for and if it can be removed. It seems like it passes the 12v rail together with the step-up output by a diode. Thank you<img src="https://i.stack.imgur.com/tHtGT.jpg" alt="5vsb to 12vsb step-up converter" /></p>
| How does this step up converter work? | 2024-01-15T02:22:23.553 |
697653 | |pcb|reflow| | <p>The bottom picture has sputtering on the solder, this happens when the flux has issues. Incorrect solder masking or using solder that is past its shelf life.</p>
<p>It's not great to have solder like this as sometimes the components don't solder, war with fine pitch components like a 402s or below you can get solder balls creating solder bridges.</p>
<p>It really depends on how much we work you want to do to get these boards back up to spec and how much inspection you want to do to make sure that they work.</p>
<p>I probably would not send these into a production environment but if you're just testing it would probably be acceptable if you rework the boards I've reworked boards before like this so I didn't have to make new ones, but that takes time.</p>
| <p>I've just baked some boards. The first two looked normal, but upon closer inspection I noticed that paste did not melt under one chip with exposed pad package. I used a slightly different profile with 30s longer preheat and 10s longer peak (both are leaded profiles) for the rest of the boards. Now there were no issues with paste, but two capacitors from different manufacturers received a faint tint on their pads, one pink, another blue. Below are photos from first and last board.</p>
<p><a href="https://i.stack.imgur.com/u3NCl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/u3NCl.jpg" alt="first board" /></a></p>
<p><a href="https://i.stack.imgur.com/FGRO4.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/FGRO4.jpg" alt="last board" /></a></p>
<p>Should I just throw these boards out as over-cooked? Should I replace the capacitors and see if they work? Should I just ignore the capacitors and try powering the boards?</p>
<p>UPDATE: for the reference, the paste was <a href="https://www.chipquik.com/datasheets/TS391AX50.pdf" rel="nofollow noreferrer">TS391AX50</a>, about a month left on shelf life.</p>
| Should I throw these boards with soldering issues out? | 2024-01-15T06:47:35.200 |
697687 | |simulation|oscillation|wien-bridge| | <p>You are asking for the function of R7 and R8?</p>
<ul>
<li><p>The resistor R7 determines the voltage which allows the diode to open and to charge the capacitor C3 (which provides the desired base voltage for the FET). It is, therefore, the resistor R7 which allows to finally adjust the oscillation amplitude .</p>
</li>
<li><p>The resistor R8 is necessary to discharge the capacitor C3 a little (!) when it is not charged. This is because the gate voltage (determined by C3) must be able to increase and decrease.</p>
</li>
<li><p><strong>Explanation</strong>: When I say "charge" and "discharge" I mean that - during continuous oscillation - there is only a very small modification of the total charge (resp. of the voltage) of the capacitor. The charge (resp. voltage) swings around the bias point. But the period of this "swing" (which amplitude-modulates the oscillation signal) is dermined by the RC- time constant T=R8C3 and should be at least 10 times larger than the oscillation period.</p>
</li>
</ul>
| <p>I am trying to design a Wien-bridge oscillator and understood the basic working principle of it. Now I got to the point where I want to add a system which would make the gain >3 during startup and <3 when exceeding the target amplitude range.</p>
<p>Apart from inaccessible textbooks, I could not find a proper explanation of the JFET variant. I understand the incandescent bulb one, but I feel it is not practical enough and it is difficult for me to simulate it. Can anyone provide a simple circuit with adjustable output amplitude (and possibly an explanation)?</p>
<p>EDIT:</p>
<p>This is a working schematics of what I found online:
<a href="https://i.stack.imgur.com/t9CF3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/t9CF3.png" alt="enter image description here" /></a></p>
<p>from what I understand, the JFET stays open initially (really small resistance), then once the output voltage starts swinging below -0.7 V (or the treshold voltage of the diode), capacitor C3 starts being negatively charged due to the diode conducting. At that point the Jfet starts turning off (increasing its resistance), thus reducing the overall gain, until a stable point is reached.</p>
<p>What I don't get still is:</p>
<ol>
<li>The function of R8</li>
<li>The function of R7</li>
<li>Is there any way to calculate the values of the components for a required amplitude? Or is it trial and error?</li>
</ol>
| How to control the amplitude of a Wien-bridge oscillator? | 2024-01-15T13:20:38.637 |
697697 | |power-electronics|mains|safety|switching|computers| | <p>To me there are several concerns with having hazardous voltages exposed on a PCIe card.</p>
<ol>
<li>It violates the "principle of least surprise". People don't expect the inside of a PC to be an electrically dangerous environment. Some PCs don't even need any tools to open the case.</li>
<li>You don't know what will be in the next slot over or how rigid the case will be, or what other equipment will be installed in the case, so it's basically impossible to be sure what the creepage and clearance distances will be between circuitry on your card and circuitry on the next card over.</li>
<li>What connectors to use, Ok so a figure 8 inlet fits, but a figure 8 inlet has no provision for a protective earth connection and is only suitable for use as an Inlet connector, it's definitely not suitable for use as an outlet connector. Most other mains connectors have no hope of fitting on a PC back plate.</li>
</ol>
<p>That said, I think with enough effort an approach similar to that used by some dial-up modems could be taken where a rigid insulating shell is screwed to the card, covering up any exposed connections that may carry hazardous voltages.</p>
<p>That advantek card is ringing alarm bells for me. It feels like someone has copied the voltage ratings from the datasheet for the relays to the datasheet for the product containing the relays, without thinking through the overall safety implications.</p>
| <p>I'm not sure if its been done before but how feasible is the idea of building an computer expansion card (PCI/PCIe) that carries mains power on some areas of the expansion card being switched by relays, TRIACs or IGBTs mounted on the board that talks to a controller on the board and/or the PCI bus to the computer for power, command, control and data acquisition? The closest thing I have found is the <a href="https://www.advantech.com/en-sg/products/1-2mlkb0/pcie-1765/mod_5aca90a8-7696-4ceb-9d94-b16ceeb111cb" rel="nofollow noreferrer">PCIE-1765</a> by Advantech.</p>
<p><a href="https://i.stack.imgur.com/ydNqV.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ydNqV.jpg" alt="enter image description here" /></a></p>
<p>It has a few relays and tantalum capacitors which seems geared towards interfacing with power systems and electronics. But however what I want is the metal slot at the back serve as connectors for the mains power. Mains power to the board would be carried in using power connectors such as a female IEC C7 connector which is compact enough not to exceed the slot height, and I envision a power input and output connector for source and destination <a href="https://i.stack.imgur.com/0ZsCq.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0ZsCq.jpg" alt="enter image description here" /></a></p>
<p>Apart from the obvious electrical safety issues (assuming certain precautions like mains power isolation and proper earthing will be undertaken, to make matters worse, IEC C7 does not have an earth connector), is there a reason why such power electronics switching devices cannot be or would have challenges implemented on a computer expansion board?</p>
| Power electronics on a PCI/PCIe expansion card | 2024-01-15T14:42:01.387 |
697699 | |diodes|infrared| | <p>Following the answer of @Kevin White, I simulated the circuit as shown:</p>
<p><img src="https://i.stack.imgur.com/Nw6NA.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fNw6NA.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The dotted rectangles simulate the TSOP4838 IR sensors. The pin numbers as they would appear on the packages are shown. Points A and B are used to control the outputs at pin 1 of each sensor. If A or B is connected to Vs then this simulates the presence of an IR burst of 38kHz and the corresponding output(s) are pulled low. If A or B is connected to 0V then it simulates the absence of IR and the pullup resistors within the sensors pulls the corresponding output(s) to logic high. The multiplexed voltage at OUT behaves as required.</p>
<p>The 600μs on/600μs off test pattern signal output:</p>
<p><a href="https://i.stack.imgur.com/OYjpZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OYjpZ.png" alt="enter image description here" /></a></p>
<p>In the present application OUT is connected to the input pin of a PIC microcontroller. The particular MCU has the option of a weak pull-up internally. However, this is not strictly necessary because as @Kevin White says, the internal pull-ups of the TSOP4838 devices are sufficient.</p>
| <p>I have connected the outputs of two TSOP4838 IR receiver modules using diodes to prevent reverse current. The idea is to mount them on a moving model vehicle at 180 degree orientation to one another so that the field of reception is closer to 360 degrees. If this is a poor idea and there is a better solution I would be interested to know.</p>
<p>The schematic is shown.</p>
<p><img src="https://i.stack.imgur.com/aTpU8.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2faTpU8.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The output at both points A, shown on the scope capture is very clean as expected:</p>
<p><a href="https://i.stack.imgur.com/XJl0U.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XJl0U.jpg" alt="Output at points A" /></a></p>
<p>However at point B the output signal is "dirtied" somewhat:</p>
<p><a href="https://i.stack.imgur.com/1b6V6.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1b6V6.jpg" alt="enter image description here" /></a></p>
<p>Can anyone explain to me why this is, and if there is a method of "cleaning-up" the output signal so that it closer matches the output at points A?</p>
<p>Note: I did not necessarily press the same button on the IR transmitter to generate the signals at points A and B - it's the "shape" of the output waveform that is of interest.</p>
<p>Datasheet: <a href="https://www.vishay.com/docs/82459/tsop48.pdf" rel="nofollow noreferrer">Vishay TSOP4838</a></p>
| "Dirty" response from paired TSOP4838 IR receivers | 2024-01-15T15:03:49.450 |
697706 | |operational-amplifier|circuit-analysis|signal|simulation| | <p>The problem is different models:
<a href="https://i.stack.imgur.com/47H4g.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/47H4g.png" alt="enter image description here" /></a></p>
| <p>Why do some circuits work in LTspice, but not in Proteus?</p>
<p>I was playing with my amplifier circuits in LTspice by changing the values forth and back, I had calculated. I was thinking about a special amplifier circuit and decided to omit the input signal and let the circuit work with only one DC source. The result was so, as I had configured an AC signal from DC signal.</p>
<p>Then I was curious, if this would work in Proteus, too. I gave a try with that and ended in ruin. It was not running in Proteus. Proteus gave me a permanent straight line of DC voltage. I was researching why this problem occurred. Some say, that LTspice had implemented a noise in DC source, therefore it should work in LTspice.</p>
<p>I begin mistrusting LTspice and Proteus. Can you tell me which simulation of these software is more reliable for amplification of signal processing than the other one?</p>
<p>Below is the circuit. The picture is from LTspice.</p>
<p><a href="https://i.stack.imgur.com/kxZVf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kxZVf.png" alt="circuit" /></a></p>
<pre><code>Version 4
SHEET 1 916 1288
WIRE 368 -64 112 -64
WIRE 112 -48 112 -64
WIRE 112 -48 -208 -48
WIRE 112 0 112 -48
WIRE 112 0 64 0
WIRE 160 0 112 0
WIRE 64 80 64 0
WIRE 160 80 160 0
WIRE 368 160 368 -64
WIRE 64 192 64 160
WIRE 128 192 64 192
WIRE 160 192 160 144
WIRE 160 192 128 192
WIRE -208 208 -208 -48
WIRE 128 384 128 192
WIRE 528 384 128 384
WIRE 544 384 528 384
WIRE 128 448 128 384
WIRE 240 448 128 448
WIRE 128 480 128 448
WIRE 240 496 240 448
WIRE -208 528 -208 288
WIRE 64 528 -208 528
WIRE 128 608 128 576
WIRE 240 608 240 560
WIRE 240 608 128 608
WIRE -208 656 -208 528
WIRE 128 656 128 608
WIRE -208 864 -208 736
WIRE 128 864 128 736
WIRE 128 864 -208 864
WIRE 128 912 128 864
WIRE 208 912 128 912
WIRE 368 912 368 240
WIRE 368 912 208 912
WIRE 208 944 208 912
FLAG 208 944 0
FLAG 528 384 antenna
IOPIN 528 384 Out
DATAFLAG 128 288 ""
SYMBOL cap 144 80 R0
SYMATTR InstName C1
SYMATTR Value 2.2p
SYMBOL ind 48 64 R0
SYMATTR InstName L1
SYMATTR Value 1µ
SYMBOL voltage 368 144 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL npn 64 480 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res -224 192 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res -224 640 R0
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL res 112 640 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL cap 224 496 R0
SYMATTR InstName C3
SYMATTR Value 3.3p
TEXT 56 968 Left 2 !.tran 20us
TEXT -432 992 Left 2 !;ac lin 500 100Meg 130Meg
</code></pre>
| Why do some circuits work in LTspice, but not in Proteus? | 2024-01-15T15:53:25.507 |
697746 | |pcb|noise|ground|impedance|transmission-line| | <p>From an electromagnetic point of view, what the bypass capacitor does is reflect RF energy. RF energy generated within the IC is reflected back to be absorbed by the IC. RF energy from outside is denied entry.</p>
<p>It is often useful to use decoupling resistors in the power distribution net to absorb unwanted energy. It's similar to using black material inside a camera to absorb unwanted light.</p>
| <p>From my understanding, for signals to propagate without reflection the impedance of the path must be constant and can be shown via the telegraph equation.</p>
<p>When it comes to noise on the line, for example the power to an IC, you're told for high frequency noise to have a solid, nearby path for the capacitors to shunt the noise.</p>
<p>I'm assuming the high frequencies in this case see a low impedance to ground through these capacitors.</p>
<p>How does this apply with the idea of matching impedance? If an IC or whatever is generating the noise, and it sees this low impedance path, why does it not just get reflected back?</p>
| If RF signals require matched impedance to remove reflections, why do approaches to shunt noise need only a “good path to ground?” | 2024-01-15T22:05:13.470 |
697757 | |current|shunt|current-sensing| | <p>Pay attention to the application section of the datasheet: <a href="https://www.ti.com/lit/ds/symlink/ina180.pdf" rel="nofollow noreferrer">INAx180</a> (p.28)</p>
<p><a href="https://i.stack.imgur.com/xZcAP.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xZcAP.png" alt="enter image description here" /></a></p>
<p>A Kelvin connection is common practice for low-value shunt resistors, both to get a more accurate value of the resistor itself (four-terminal parts are also available for high accuracy purposes), and to avoid trace resistance effects as you have discovered.</p>
<p>Changing the layout as so is a straightforward fix:</p>
<p><a href="https://i.stack.imgur.com/2lyQf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2lyQf.png" alt="enter image description here" /></a></p>
<p>You may want to adjust placement and pour geometry a bit to maintain ground fill around the components, and obviously the via under the INA180 has to move.</p>
<p>Note that your circuit may still be susceptible to EMC considerations, especially due to contact switching noise in the relays. A bypass capacitor on <code>+12V</code> and an RC snubber to GND on each output may be desirable for this reason.</p>
<p>Also, don't forget to stitch top and bottom ground fill with plenty of vias, particularly around trace crossings, inside corners, peninsulas, etc.</p>
| <p>I've designed a two-channel current sensing circuit integrated into a board that outputs two separate signals. However, I'm encountering an issue where one channel seems to influence the other, which, to my understanding, should not happen.</p>
<p>Each channel in this circuit has its own current sensing component, but it appears that the operation of one channel is affecting the other. Additionally, I've observed that when there is no load connected to either channel, the circuit functions correctly. However, under load, the behavior changes.</p>
<p>Specifically, when a 5 A load is applied to only one channel, the voltage readings are as expected, but when one channel has a 5 A load and the other has a 1 A load, the voltage readings across the channels are not as expected. This discrepancy in voltage readings under different load conditions is puzzling.</p>
<p>I'm trying to figure out the root cause of this problem and understand why the voltage readings are affected in this way. Could this be a result of some form of interference, a design flaw in the circuit, or something else?</p>
<p>Furthermore, if there is a consistent relationship between the interactions of these two channels, I would like to know what formulas or calculations can be applied to predict or compensate for this influence.</p>
<p>Any insights or suggestions on how to diagnose and resolve this issue would be greatly appreciated.</p>
<p><a href="https://i.stack.imgur.com/W3zu1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/W3zu1.png" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/JPZgk.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JPZgk.png" alt="enter image description here" /></a></p>
| Issue with influence between channels in a dual-channel high-side current sensing circuit | 2024-01-16T00:06:56.690 |
697773 | |noise|gain|differential-amplifier| | <p>Once you understand the way that the differential input "removes" noise from the input, the answer to this is clear.</p>
<p>If we call the two input nodes (which are together considered to be a single "input" and I will stay with that convention here) A and B, the differential amp (and a mic amp is a very good example) has a high gain to the input difference (A - B). At the same time, it has low gain (maybe even attenuates) the "common mode" input (A + B).</p>
<p>So if the output is C:</p>
<p><strong>C = G(A - B) + R(A + B)</strong></p>
<p>where G is the "differential gain" and R is the "common mode gain" (or rejection)</p>
<p>What matters here is the <strong>difference between G and R</strong>, the "common mode rejection ratio".</p>
<p>Let's work through take some typical numbers for a mic amp with a "standard" mic connected (if there is such a thing, but that is another topic):</p>
<p>K might well be 40dB (a voltage gain of 100). R might be 0dB (a voltage gain of 1). So the rejection ratio is 40dB.</p>
<p>Let's say that our mic signal is 5mV differential, but 1mV of common mode noise gets in to our 10 metre microphone cable (which will be a balanced twisted pair with an overall screen connected to 0V at the mic amp end). This means that the noise is 20% of the signal at the input to the amp.</p>
<p>At the output of the mic amp we still have 1mV of noise, but we amplified the differential audio signal by 100, so we have 500mV. At the output of the amp the noise is now only 2% of the signal. We have effected a massive improvement in signal to noise because of our rejection ratio.</p>
<p>Now to answer your question : <strong>this improvement relies on keeping the induced noise equal on the two legs of the differential input</strong>.</p>
<p>If we connect the B input to 0V for example, so that it no longer receives the same common mode noise as the A input, the noise will be amplified by 100 (as it is on the A input but not the B) and we will not achieve the improvement in signal to noise ratio.</p>
<p>So from this, we can deduce the important factors in amplifying a microphone signal with best signal to noise:</p>
<ol>
<li>a mic amp with excellent common mode rejection ratio (high differential gain, low common mode).</li>
<li>a mic amp with well matched impedance to ground on A and B inputs (if this is not the case, the induced voltages from the external noise will differ).</li>
<li>a microphone signal which is differential (it does not really matter that much that the A and B legs are equal and opposite, but there must be a difference signal between A and B).</li>
<li>the induced external noise should be equal on A and B inputs. (That is why we use a twisted paid - to try to ensure that each leg has the same induced voltage. Screening helps reduce the overall magnitude of noise, but in fact using a twisted pair may be just as important. Older analog professional audio systems often used multiple unscreened twisted pairs to carry multiple line level signals between equipment for this reason.)</li>
</ol>
| <p>It is known that the purpose of using a differential amplifier is to remove noise from the input signal, apart from giving some small amplification. To my knowledge, there are two inputs and two outputs in a differential amplifier. Usually, two inputs are given to the circuit, one is the original signal, and the other is the "flipped" version of the same, this is the case in the dual input differential amplifier. But we also have single input differential amplifiers, where one input node is grounded, and the other input is the original signal. Does such a configuration remove the noise from the original signal. If yes, I have another confusion. There are two outputs in a diff-amp circuit. If we measure each output individually (with ground as the reference), does it have noise removed or not? Or is it only when I take the difference of both the outputs when I will see a output without noise? I am very confused.</p>
<p>The context is that I have to construct an Audio Amplifier with a mic input. My stages of the circuit are Diff-amp --> CS Amplifier --> Filter --> Power Amplifier --> Speaker. The issue with taking the difference of the outputs of the differential amplifier is that the input to my CS Amplifier is just one Vin and not the difference of two signals, which makes it hard to design the circuit. Am I missing something or how do I go about designing this?</p>
| Does a single input differential amplifier remove noise? | 2024-01-16T06:36:10.417 |
697781 | |pcb|pcb-design|esp32| | <p>I fixed this problem after making two changes. The first, which I suspect might be the biggest fix, is that I decreased the soft-start delay of my voltage regulator to almost nothing. Secondly, like @Andyaka mentioned, I connected VDD3P3_RTC to 3.3V. Not only did I measure 3.3V on the EN and IO0 pins, but I can now successfully communicate with my ESP32 as well.</p>
| <p>I am designing a PCB for the first time with the ESP32-PICO-V3 chip, but the chip doesn't boot. The chip is connected to the rest of the PCB as seen in the simplified diagram below, where I measured the voltages at EN and IO0 during my troubleshooting.</p>
<p>When I give my PCB power (external 5 V input that is regulated to a stable 3.4 V with a voltage regulator), I measure 2.37 V at the EN-pin and 1.8 V at IO0. From my understanding, these pins should have values closer to 3.3 V, but at least above 2.45 V to be considered "high" and boot properly.</p>
<p>So far I have taken out the capacitor in the RC circuit at the EN-pin to check if that corrects the voltage drop, but it doesn't. I also measured my MTDI and MTDO pins, which are 0 V (indicating that the internal regulator operates at 3.3 V) and 1.8 V (not sure why) respectively.</p>
<p>Does anyone have advice on how I can further troubleshoot and fix this problem?</p>
<p>For further clarification, I say that the chip doesn't boot because I can't communicate with it over UART. The IDE fails to connect to the board.</p>
<p><a href="https://i.stack.imgur.com/81aS0.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/81aS0.png" alt="enter image description here" /></a></p>
| ESP32: unexpected voltage readings on EN and IO0 | 2024-01-16T09:18:28.673 |
697789 | |circuit-analysis|kirchhoffs-laws| | <p>The current source makes a loop, too. Think there's the 3rd loop current I3 through it and the 5 ohm resistor. Fortunately I3 is known to be = 2A, the 3rd loop does not generate new unknown. Write the equations for loop currents I1 and I2 as you wanted. The equation for loop abcda has voltage (I1-2A) * 5 ohm over section da.</p>
<p>The result, of course, is finally the same as what's got by converting the current source to equivalent voltage source, but the basic idea is very different. I didn't suggest a network transformation. I said: Let the 3rd loop be and calculate with the KVL method as you planned.</p>
| <p>I want to apply KVL to loops <strong>abcda</strong> and <strong>befcb</strong> in the circuit given below. Is there any role of the 2A current source in those two loops, that I need to consider before applying KVL?</p>
<p><a href="https://i.stack.imgur.com/3G1zc.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3G1zc.jpg" alt="enter image description here" /></a></p>
| Doubt in applying KVL | 2024-01-16T10:24:12.117 |
697791 | |power-supply| | <p><strong>PRESUMING</strong> the -12V "ground" or 0V connection is common with the others as per the comment from <strong>Rohat Kılıç</strong> then you have a lot more voltage options.</p>
<p>Assuming that you only require low currents below 1A, the -12V line gives you:</p>
<ul>
<li>~15V when combined with the +3.3V line and the 0V/negative terminal is not used)</li>
<li>17V when combined with the +5V line</li>
<li>24V when combined with the +12V line (handy for dealing with 24V diesel car lights and components)</li>
</ul>
<p>Likewise you can get other voltage differences with combinations:</p>
<ul>
<li>~1.5V between +3.3V and +5V (good for bench-powering a single alkaline battery device)</li>
<li>7V between +5V and +12V (this one was popular for running a 12V fan on slow speed)</li>
<li>~8V between +3.3V and +12V</li>
</ul>
<p>The fancier a PSU is, the more likely it will object to this abuse and shut down. So in some respects a cheaper PSU is better.</p>
<p>Also do be aware of the maximum current on each rail. The +12V line can produce a lot more than others, so the lowest current rating is your cap.</p>
| <p><a href="https://i.stack.imgur.com/wbADU.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wbADU.jpg" alt="PC power supply breakout board" /></a></p>
<p>I bought a useful PC power supply breakout board, fused. It has the following outputs:</p>
<ul>
<li>-12V</li>
<li>+12V</li>
<li>+5V</li>
<li>+3.3</li>
</ul>
<p>What is -12V and how would I use it? The -12V has its own negative.</p>
| PC power supply bench breakout board. What is -12V used for? | 2024-01-16T10:34:40.220 |
697816 | |mosfet|relay|bjt|triac|solid-state-devices| | <p>MOSFET-output SSRs, even relatively high resistance ones, are very pokey because the photovoltaic method produces very little current, and the MOSFETs have gate charge to overcome. They typically have a circuit that snaps them 'off' but the response time is more like a mechanical relay than a MOSFET.</p>
<p>There's nothing stopping you from designing a circuit with back-to-back MOSFETs, a suitable isolated DC-DC converter and a fast isolated gate driver. Such an 'SSR' could (once the DC-DC fires up, which could take some time) switch in well under a microsecond rather than a millisecond or so. You could also use really beefy MOSFETs.</p>
<p>The downsides are that it would need three pins for control and would necessarily draw some power continuously in the 'ready' state.</p>
<p>But even with huge and expensive MOSFETs it still would not be as electrically robust as a mechanical relay in some ways.</p>
| <p>Relays are very handy components. Relays allow current to both directions on the controlled load circuit so they can be used for both AC and DC. However, relays have a finite lifetime if connected/disconnected often, produce a loud audible click and consume power in the controlling circuit because of the electromagnet.</p>
<p>Now, when replacing a relay with a solid-state component, you might want to:</p>
<ol>
<li>Use a BJT. However, BJTs despite their name are unipolar devices, they conduct current in only one direction.</li>
<li>Use a MOSFET. However, MOSFETs have a body diode which means current in the wrong direction is passed always despite the switch state.</li>
<li>Use a gate-turn-off thyristor. However, it conducts current in one direction only.</li>
<li>Use a TRIAC. It conducts current in both directions. However, it <i>requires</i> AC, because the only way to turn it off is to wait for the commutation of the power line signal.</li>
</ol>
<p>Is there such a thing as a solid-state relay that could replace a relay in practical applications? Requirements would be that it conducts current to both directions and can be turned on and off electronically, and ideally control would be as simple as it is for a relay.</p>
<p>I know that in most cases, you know if you have AC or DC so you can choose between (1)-(3) and (4): if it's DC, use (1)-(3), if it's AC, use (4).</p>
<p>A gate-turn-off TRIAC might be close to meeting the requirements but might require more tricky control than MOSFET/BJT. Is such a component as a gate-turn-off TRIAC even theoretically possible?</p>
<p>Or can a practical solid-state replacement for a relay be constructed as a circuit from simpler components?</p>
<p>The <a href="https://en.wikipedia.org/wiki/Solid-state_relay" rel="nofollow noreferrer">Wikipedia page</a> of solid-state relays does in fact mention TRIAC types that work only for AC (so it doesn't satisfy the generality requirement), failing entirely to mention the existence of a gate-turn-off TRIAC. It also mentions two back-to-back MOSFETs with source pins connected together but I have some trouble understanding whether such a component can actually replace a relay, as the control mechanism might indeed be very tricky and might not work in some applications where relays satisfy an isolation requirement.</p>
<p>None of the top Google search results mention how a useful solid-state relay might be constructed, apart from the Wikipedia page which I have trouble understanding (how on Earth are two back-to-back MOSFETs controlled in practical applications?), and quick search of this Electronics StackExchange forum doesn't give any useful indications on how a useful, practical solid-state relay working for both AC and DC might work.</p>
| How on Earth can a solid state relay be constructed? | 2024-01-16T16:43:37.377 |
697821 | |fpga|ethernet|xilinx|vivado| | <p>I have had this issue a while ago. Generating the output product also did not worked for me. I have multiple licenses from Xilinx/AMD and all licenses were valid and equivalent (same privilege). When I got the error on one vivado, I tried the bitstream on the other vivado and it worked.</p>
<p>I contacted the xilinx to ask for assistance, they told me to remove the license and install it again. But it did not work for me either. Lastly they had to give ma a new license.</p>
<p>May be installing the license again will work for you. If not, you need to contact the xilinx to get a new one. That's my experince.</p>
| <p>I have a PL design in which I included a 10G/25G Ethernet Subsystem IP core from Xilinx configured with BASE-KR, AN/LT logic and FEC logic for Clause 74. When I try to generate the bitstream, I am getting this error:</p>
<pre><code>[Common 17-69] Command failed: This design contains one or more cells for which bitstream generation is not permitted:
<encrypted cell> (<encrypted cellview>)
system_i/xxv_ethernet_0/inst/i_system_xxv_ethernet_0_0_top_1/i_system_xxv_ethernet_0_0_ANLT_WRAPPER/i_AN_PCONTROL (<encrypted cellview>)
<encrypted cell> (<encrypted cellview>)
system_i/xxv_ethernet_0/inst/i_system_xxv_ethernet_0_0_top_0/i_system_xxv_ethernet_0_0_ANLT_WRAPPER/i_AN_PCONTROL (<encrypted cellview>)
If a new IP Core license was added, in order for the new license to be picked up, the current netlist needs to be updated by resetting and re-generating the IP output products before bitstream generation.
</code></pre>
<p>I already tried to Reset Output Products, but it did not help. I only get this error when I enable BASE-KR, AN/LT logic and FEC logic. When I only enable BASE-R, it builds successfully. I am using the trial licenses. I have checked the 10G/25G Ethernet Subsystem documentation, and I have included all licenses which are mentioned. I have attached a picture which shows all my licenses.</p>
<p>What should I do to make it generate the bitstream successfully?</p>
<p><a href="https://i.stack.imgur.com/sOv2J.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sOv2J.png" alt="All licenses in my Vivado installation" /></a></p>
| Vivado Ethernet IP core licensing issue | 2024-01-16T16:59:39.547 |
697823 | |ground|grounding|mains|earth| | <blockquote>
<p>The reason for this is primarily "safety", is said, because if the live wire accidentally touches the chassis of a household appliance (like a refrigerator), this low impedance connection allows passing ground fault current through its own and RCD device triggered.</p>
</blockquote>
<p>Correct</p>
<blockquote>
<p>if this earth connection did not exist, we would not be shocked when the live cable touches any chassis</p>
</blockquote>
<p>For the same reason as above: simply replace the appliance in your home with the utility transformer, and replace the breakers in your home with the breakers in the power station.</p>
<p>If the utility transformer is damaged and gets a short between primary and secondary, or via the chassis, then high voltage from the primary (2-35kV) will end up on the secondary side.</p>
<p>If the secondary side is Earthed, then the same thing happens as you described: an abnormal current flows between primary and ground, and breakers trip on the primary side.</p>
<p>Neutral on the power station transformer is also Earthed for the same reason: if the high voltage power lines touch the ground, or a crane, or if a tree falls on them, then abnormal current will flow and breakers in the power station will trip.</p>
<p>Without this, a faulty transformer could potentially send kilovolts into your home without it being detected. At this voltage, it's pretty much instant death.</p>
| <p>I have some misunderstandings with the grounding of a transformer. As far as I know, the utility transformer's (the last transformer before my mains plug) neutral point (star-connected point of 3 phases, this image is probably from the US) connects to the earth with some rods. After that a green-yellow protected earth wire pulls through the mains plug. The reason for this is primarily "safety", is said, because if the live wire accidentally touches the chassis of a household appliance (like a refrigerator), this low impedance connection allows passing ground fault current through its own and RCD device triggered.</p>
<p>I understand the PE cable that is through the main plug to the transformer is critical from a safety perspective. But, why are we earthing the neutral point of the transformer? Maybe for lightning protection? I question this because if this earth connection did not exist, we would not be shocked when the live cable touches any chassis (someone argues we are shocked in any case because of capacitive coupling between earth and other phases, please tell me if that is right).</p>
<p>The fundamental rule of circuit theory is "current must return the source", hence the discourses like "the earth is a global charge pool and can sink/supply all current and supply global 0 V reference" must be wrong (the potential difference that causes lightning is already between the earth and the clouds).</p>
<p>To sum up: why are we earthing the neutral point of the transformer? Please, let me know if there's anything I missed or don't know.</p>
<p><a href="https://i.stack.imgur.com/SmRwq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SmRwq.png" alt="enter image description here" /></a></p>
| What is the exact reason for grounding (earthing) of a transformer? | 2024-01-16T17:17:42.553 |
697827 | |transfer-function| | <p>If you check the book's derivation, you can see that the author ignores <span class="math-container">\$r_o\$</span> in their derivation of the driving point impedance. The exact <span class="math-container">\$Z_{in,0}\$</span> should be <span class="math-container">\$(1 + g_m \cdot R_s) \cdot (R_D \,||\, r_o) + R_s\$</span>.</p>
<p>Also, whether you can ignore <span class="math-container">\$r_o\$</span> or not depends on the relative values of <span class="math-container">\$R_D\$</span> and <span class="math-container">\$r_o\$</span>. As you can see, there is the term <span class="math-container">\$R_D \,||\, r_o\$</span>. If <span class="math-container">\$R_D\$</span> is much smaller than <span class="math-container">\$r_o\$</span>, you can ignore <span class="math-container">\$r_o\$</span>. In some cases, for example, if the load <span class="math-container">\$R_D\$</span> is a current source which is comparable in magnitude to <span class="math-container">\$r_o\$</span>, then you can't ignore <span class="math-container">\$r_o\$</span>. <br />
Hopefully, from this example, you can see the usefulness of the Extra Element Theorem (EET), which can provide more insight than the brute force method you used.</p>
| <p>The following is from the book <em><a href="https://electrovolt.ir/wp-content/uploads/2014/08/Design-of-Analog-CMOS-Integrated-Circuit-2nd-Edition-ElectroVolt.ir_.pdf" rel="nofollow noreferrer">Design of Analog CMOS Integrated Circuit</a></em>, page 207.</p>
<p>Find the transfer function of the circuit in Fig. 6.47(a):</p>
<p><a href="https://i.stack.imgur.com/To06q.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/To06q.png" alt="enter image description here" /></a></p>
<p>Suppose the voltage at node A is <span class="math-container">\$V_x\$</span>.</p>
<p>with the use of KCL at node B,</p>
<p><span class="math-container">$$V_x g_{m1} + \frac{V_{out}} {r_o} = (V_x - V_{out}) s C_F - \frac{V_{out}} {R_D}$$</span></p>
<p>For <span class="math-container">\$V_x\$</span>, with voltage divider (<span class="math-container">\$R_S\$</span> and <span class="math-container">\$C_F\$</span>).</p>
<p><span class="math-container">$$V_x = \frac{V_{in} - V_{out}} {R_S + 1/(s C_F)} \frac{1} {s C_F} + V_{out} $$</span></p>
<p><span class="math-container">$$\Rightarrow \frac{V_{out}} {V_{in}} = \frac{(s C_F - g_m)} {s C_F R_S (g_m + 1/r_o + 1/R_D) + (s C_F + 1/r_o + 1/R_D)}$$</span></p>
<p>However, the arthor gave this.</p>
<p><span class="math-container">$$G(S) = -g_m (R_D \parallel r_o) \frac{1- \frac{1} {g_m} C_F s} {1 + \biggr[(1 + g_m R_D) R_S + R_D \biggr] C_F s}$$</span></p>
<p>The zero is the same but the pole is different.</p>
| What's wrong with my FET transfer function? | 2024-01-16T17:41:46.627 |
697829 | |circuit-design|audio|plug|trrs| | <p>The thin rectangle between pins 4 and 6 is probably an insulator that provides a mechanical push to open pins 3 and 4.</p>
<p>When the plug is inserted, pins 3 and 4 open.</p>
<p>Connect one end of a resistor to pin 4 and the other end to 5V. Connect pin 3 to ground. When the plug is inserted the voltage on pin 4 will switch from 0V to 5V.</p>
<p>This will not affect the audio signal.</p>
<p>There are many other ways to use this switch.</p>
| <p>I am using the pictured TRRS connector and want to detect whether a plug is plugged in via the builtin switches (pins 2/3/4). However, the switches seem to be connected to the audio lines as well. Surely connecting a resistor divider/voltages/other sensing would affect the audio signal?</p>
<p>Preferably I don't want to use "overkill" ICs - I don't need any more amplification. I've seen the TI TPA6166A2 mentioned that can do this, but it only seems to be available in BGA (and is far more complex than I think I need). (However, I am willing to find a hand-solderable IC if it is the only way.)</p>
<p>Other answers have mentioned the switches but not specifically how to use them to detect a plug without affecting the audio signal. What sort of circuit would let me detect these switches opening in this way?</p>
<p><a href="https://i.stack.imgur.com/JDSTB.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JDSTB.png" alt="Schematic diagram of connector" /></a></p>
<p>(I have bridged together Left and Right channels because my audio source is Mono. I have designed this for "Apple"/AHJ pinout jacks.)</p>
| Sensing plugged in 3.5mm jack with the TRRS contacts | 2024-01-16T17:43:45.123 |
697831 | |mosfet|dc-motor| | <p>Not a direct answer to your question, but a solution to your problem: You're not driving the transistor hard enough. With 470 Ohms, you'll get about 5mA of base current with 3.3V from the ESP32's GPIO. Ideally, the base current should be at least 1/10th of the collector current. Your motor might need 200mA or so to actually spin up, so you'd aim for 20mA base current.</p>
<p>This means that it'll likely work fine if you decrease the base resistor to 100 Ohms. The ESP32 can handle this, too.</p>
<p>You might also want to consider using a higher voltage transistor, i.e. a BC337. The SS8050's collector-emitter breakdown voltage is uncomfortably close to your 24V supply rail.</p>
<p>If you want to use this circuit for PWM, you should also remove C2 and drastically lower the value of C3 (to i.e. 10nF). They will otherwise cause excessive power dissipation in the transistor.</p>
<p>Regarding a suitable MOSFET: I checked Digi-Key, and they do not currently have any MOSFET in stock that would work for your application. The big problem is that you only have 3.3V available to drive the FET, which means that you're looking for a high current logic-level FET in TO-92. Those are rare and very hard to obtain because it's all SMD now. A BJT is the better choice here.</p>
| <p>I have a mini 24 VDC motor (RH-370CC) with the following specs:</p>
<p><a href="https://i.stack.imgur.com/i608n.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/i608n.png" alt="![RH-370CC specs" /></a></p>
<p>It is controlled by an ESP32 (3.3 V output). My initial design was the following:</p>
<p><a href="https://i.stack.imgur.com/1vOft.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1vOft.png" alt="circuit diagram" /></a></p>
<p>I know, I made a poor choice with the SS8050 transistor.
It worked well in the early tests but it lasted a few seconds when the motor didn't have any load.</p>
<p>Is there any MOSFET in a TO-92 package that I can use to replace the SS8050 transistor?
Unfortunately I already made the PCB.</p>
| Replace BJT with a MOSFET for a mini 24 V motor | 2024-01-16T18:18:17.183 |
697846 | |rf|dc|radio| | <p>A DC component will not increase the range, as only the RF will be radiated.</p>
<p>Depending on the antenna type either no DC current will flow (antennas that measure as an open circuit with an ohmmeter) or the DC will be short circuited (antennas with DC continuity). Some antennas have a coil that causes a DC short, connecting a DC supply to those will possibly cause smoke.</p>
<p>One case where DC and RF are combined is in antenna systems with a remote amplifier. A receive, transmit, or rx/tx amplifier can be located right at the antenna and powered through the same feedline that carries the RF signal. This can improve performance by reducing the effects of feedline losses. In this system the RF and DC have to be separated at each end of the feedline using something like <a href="https://en.wikipedia.org/wiki/Bias_tee" rel="nofollow noreferrer">bias tees</a>. For example, you might see something like this where an amplifier is used at the antenna to boost the signal before it goes through a long feedline. If the amp were at the receiver end it would be amplifying the signal with the line losses, increasing noise. This is commonly done with over-the-air television antennas.</p>
<p><img src="https://i.stack.imgur.com/kXUC7.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fkXUC7.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The same principle can be used for transmitting, suppose you have a 100 W amplifier that takes a 1 W input. If you put it through a coax with 3 dB loss (half the power) you'll get 50 W at the antenna with 50 W lost in the coax, but if you put it at the antenna end you get the full 100 W at the antenna, and you only need to increase the drive to 2 W to make up for 1 W lost in the coax.</p>
| <p>Does adding DC offset to AC output signal affect the range of RF transmission?</p>
<p>Adding DC offset does not magnify the AC signal, it is just an offset with more power for the output.</p>
<p>I had once asked a similar question for some time ago.</p>
<p><a href="https://electronics.stackexchange.com/questions/683564/more-voltage-for-radio-carrier-frequency-is-that-all">More voltage for radio carrier frequency, is that all?</a></p>
<p>The answer is alright. The fact is, for more RF transmission range, I need more voltage for output RF signal going to antenna. I mean, even the signal will not change its original property, will it travel for a longer distance when I try to make a RF transmission?</p>
<p><a href="https://i.stack.imgur.com/ruIWn.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ruIWn.png" alt="picture" /></a></p>
| Does adding DC offset to RF output signal affect the range of RF transmission? | 2024-01-16T20:21:18.593 |
697848 | |circuit-analysis|current-source|short-circuit|linear|resistive| | <p>Almost. Circuit B can be analyzed as drawn. There is still a current source. I would draw it this way. The diagram demonstrates more completely.</p>
<p><img src="https://i.stack.imgur.com/pYY2V.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fpYY2V.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p><strong>Update</strong> Yes you are correct. The currrent <span class="math-container">\$i_x\$</span> depends only on on the elements inside the box and the short. The short makes <span class="math-container">\$R_2||R_3\$</span>.</p>
<p>All of <span class="math-container">\$I_S\$</span> flows through the short also, but has no effect inside the box.</p>
| <p>I'm studying circuit theory, with only linear elements and no capacitors or inductors or mutual inductances, so no differential equations. All the sources (current and voltages) are constant.</p>
<ul>
<li>To be even more precise, that means that resistors, ideal current/voltage sources, dependent current/voltage sources, op-amps, ideal transformers are all and the only elements allowed.</li>
</ul>
<p><strong>QUESTION</strong></p>
<p>My question is: is it always true that, if we have to find a current/voltage in B, which is a circuit with whatever inside it (but that must satisfy the premises said before), thanks to the short circuit we can solve the circuit as if there was no ideal current source (the one on the left)?
In other words, are the two circuits below equivalent, if my goal is to find a current/voltage in B?
<a href="https://i.stack.imgur.com/tiNZm.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tiNZm.jpg" alt="given circuit" /></a></p>
<p><strong>FURTHER CLARIFICATIONS/MORE CONTEXT</strong></p>
<p>The question originated from a exercise done by my professor: given the circuit on the left we need to find the voltage i_x and he did that by simply ignoring the current source, so it means that current source in parallel with short circuit is equivalent to the short circuit.</p>
<p><a href="https://i.stack.imgur.com/vFXcu.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/vFXcu.jpg" alt="enter image description here" /></a></p>
| Equivalence in circuits | 2024-01-16T20:32:46.663 |
697858 | |pcb|pcb-design|signal-integrity|via|stitching| | <p>This is not a direct answer to OP's question, but rather a counter example to what Tim Williams presented.</p>
<p>We had a high performance, multi-channel receive module that was experiencing coupling between some of the channels We were missing our isolation spec by ~25 dB.</p>
<p>The problem was traced to some missing stitching/ground vias between some of the layers. The picture below show the problem area. This is a RF coax connector to stripline feed.</p>
<p><a href="https://i.stack.imgur.com/Pz6Ye.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Pz6Ye.png" alt="enter image description here" /></a></p>
<p>The green dot is the via for the center conductor going down to the stripline layer. The white dots are the stitching vias; the pink is a ground trace on one layer, and the red is ground on another layer. The vias are placed 20 mil-30 mils apart (I forget the exact separation), and so we need two staggered rings of vias to meet the isolation requirement.</p>
<p>Looking at the top of the annular ring of vias, you can see that vias are missing. Adding the missing vias improved the isolation by ~35 dB.</p>
<p>We've had other instances were just a single or two missing vias caused us problems.</p>
<p>So the placement of stitching vias is highly dependent on your particular application.</p>
<p><strong>Providing Some More Details on the Design</strong></p>
<p>This was an RF module operating up to 20 GHz. It was implemented in an 18 layer LTCC hermetic package. And the isolation requirement between channels was greater than 35 dB. Note that we met the isolation requirement at lower frequencies, even with the missing vias, and only failed it at the top end.</p>
| <p>On a four-layer with the standard sig gnd pwr sig stackup, when flooding top and bottom layers with copper and stitching them to the ground plane, I know the standard rule is lambda/20 spacing for the vias. However, isn't there a risk of there being too many holes in the power plane and increasing its inductance/increasing the size of current loops? Is this typically negligible or is there a minimum spacing to follow?</p>
| How to space stitching vias to avoid affecting the power plane? | 2024-01-16T22:50:32.110 |
697860 | |integrated-circuit|dc|opto-isolator|measurement|voltage-measurement| | <p><strong>Software-assisted version of Simon Fitch's circuit:</strong></p>
<p>Three comparators compare instantaneous rectified mains voltage with three constant thresholds:</p>
<ul>
<li>Overvoltage threshold, which should be <strong>higher</strong> than the expected peak mains voltage</li>
</ul>
<p>Under normal circumstances, the output of this comparator never triggers. If it does, the micro knows instantly that mains voltage is over the limit, and turns on the UPS to protect the load from overvoltage.</p>
<ul>
<li>Undervoltage threshold, which should be <strong>lower</strong> than the lowest expected peak mains voltage. For 230V mains, which has a normal peak of 320V, maybe around 250V threshold should do the trick.</li>
</ul>
<p>Under normal circumstances, this comparator will trigger on every peak. So for 50Hz it will trigger every 10ms. This goes either to a MCU GPIO with a Pin Change Interrupt on it, or a MCU timer in capture mode. In both cases the MCU can measure the time interval between two consecutive pulses, and if it is higher than say 15ms, it decides there is an undervoltage.</p>
<ul>
<li>Mains presence threshold, maybe 100V or so.</li>
</ul>
<p>This is not strictly necessary, but by using the same logic as the previous one, it can allow the MCU to know that mains is present even in an undervoltage condition where the previous comparator is not triggering.</p>
<p><strong>Since you need isolation, you have to decide if you put the comparators:</strong></p>
<ul>
<li>On the mains side (non-isolated), and then you isolate the outputs with opto couplers.</li>
</ul>
<p>This makes voltage sensing very simple (a resistor divider) but it adds extra complication by requiring a separate power supply for the comparators, which must be isolated from the rest of the circuit's power supply. Otherwise the optocouplers would be useless.</p>
<ul>
<li>On the microcontroller side, isolated from mains</li>
</ul>
<p>This makes voltage sensing more complicated, because you need an isolated voltage sensor, otherwise known as <a href="https://www.reichelt.com/fr/fr/transformateur-gamme-gerth-150-xx-0-33-va-6-v-150-06-1-p1598.html?&trstct=pol_2&nbc=1" rel="nofollow noreferrer">the cheapest transformer you can get</a>. But the comparators can use the same power supply as the rest of the circuit.</p>
| <p>I am trying to make a UPS circuit. I need to have a high speed measurement for the input AC voltage (220 Vrms) (in order to know whether to turn on/off the inverter). I had tried using this circuit:</p>
<p><a href="https://i.stack.imgur.com/W2IWh.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/W2IWh.png" alt="enter image description here" /></a></p>
<p>It works, but it is very slow: it takes more than 500 ms just to detect any change in the voltage, which need to works simultaneously with the input AC sine wave.</p>
<p>Is there a better design than this (such as RMS to DC converters or voltage to frequency converter)?</p>
<p>NOTES:</p>
<p>Voltage needs to be measured for different processes too so using just optocouplers with some resistors won't be good (I don't need just a voltage detector).</p>
<p>Input voltage is from isolated DC-DC transformer 24 VDC.</p>
<p>"Sense GND" is the ground for this circuit.</p>
<p>Low voltage trigger is approx 8.5 VDC (180 Vrms) and high voltage trigger is approx 12.4 VDC (260 Vrms).</p>
| Which is the best method to measure AC voltage? | 2024-01-16T23:46:58.723 |
697887 | |mosfet|circuit-design|mosfet-driver|sic| | <p>Yes, you can use the 1EDIxx driver and you need to adjust the supply voltage to -4 V as per the device data sheet. The driver is good to handle -4 V as well.
Please check the below link of data sheet on page number 11 table 3, which clearly shows that the operating VCC2 to Gnd2 voltage can go up to 35 V. So, as per the MOSFET data sheet, the operating voltage is 15-(-4)= 19 V which is well under limit of 35 V.
<a href="https://i.stack.imgur.com/IBx1S.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/IBx1S.png" alt="Power supply range on output side" /></a>
<a href="https://www.infineon.com/dgdl/Infineon-1EDI60N12AF-DataSheet-v01_10-EN.pdf?fileId=db3a3043427ac3e201428e5da08f372a&?utm_source=electronicstackexchange&utm_medium=display&utm_campaign=external_community_engagement" rel="nofollow noreferrer">1EDIxx data sheet</a></p>
<p>Disclosure: I work as a support engineer with Infineon at the time of writing.</p>
| <p>Can I drive <a href="https://assets.wolfspeed.com/uploads/2024/01/Wolfspeed_C3M0045065K_data_sheet.pdf" rel="nofollow noreferrer">C3M0045065K</a> SiC MOSFET if I use Infineon-<a href="https://www.infineon.com/dgdl/Infineon-1EDI60N12AF-DataSheet-v01_10-EN.pdf?fileId=db3a3043427ac3e201428e5da08f372a" rel="nofollow noreferrer">1EDI20N12AF</a>?</p>
<p>I read in the specifications that the MOSFET turn-off voltage needs to be -4 V, but I only have a square wave signal of plus or minus 5V for driver input signal.</p>
<p>If I want to drive this transistor correctly，is there a more suitable driver?</p>
<p>Can we pursue faster frequencies if I use GaN MOSFETs?</p>
<p><a href="https://i.stack.imgur.com/AgXGl.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AgXGl.png" alt="enter image description here" /></a></p>
| How do I choose a suitable MOSFET driver? | 2024-01-17T07:13:24.383 |
697895 | |power-supply|power|protection|circuit-protection|fuses| | <p>The I<sup>2</sup>t rating actually represents the melting "energy" therefore it should have been I<sup>2</sup>Rt which comes from <span class="math-container">\$E = \int P \ dt\$</span>. R here is the internal resistance of the fuse which assumed to be "constant" so it makes sense to specify I<sup>2</sup>t.</p>
<p>But R doesn't have to be constant, although depends on a few factors such as environmental cooling. A fuse is basically a conductor and has a resistance which increases with temperature. When a current passes through it, it dissipates some power and this dissipation causes the temperature, therefore the resistance, to increase.</p>
<p>For 10 times the nominal current i.e. 50 Amps, the melting rating is given as 0.055.</p>
<p><span class="math-container">$$
E_{50}=(I^2 t)_{50} \ R_{50} = 0.055 \ R_{50}
$$</span></p>
<p>where <span class="math-container">\$R_{50}\$</span> is the fuse resistance for 50 Amps of current.</p>
<p>According to the average time-current curve given in the question, t is about 0.02 seconds for 10 Amps.</p>
<p><span class="math-container">$$
E_{10}=(I^2 t)_{10} \ R_{10} = 2 \ R_{10}
$$</span></p>
<p>where <span class="math-container">\$R_{10}\$</span> is the fuse resistance for 10 Amps of current.</p>
<p>If we assume the melting energy ratings equal i.e. <span class="math-container">\$E_{50}=E_{10}\$</span> then we'll obtain</p>
<p><span class="math-container">$$
R_{50}\approx 36 \ R_{10}
$$</span></p>
<p>which makes sense because the temperature rise (therefore the resistance change) can be higher at 50 Amps, compared to the one shown in Andy's answer which apparently has relatively lower (maybe negligible) resistance change.</p>
| <p>In the <a href="https://www.mouser.in/datasheet/2/643/ds_cp_c2q_series-1313118.pdf" rel="nofollow noreferrer">datasheet</a>, the I<sup>2</sup>t rating of a 5A fuse is 0.055 at 10 times In.</p>
<p><a href="https://i.stack.imgur.com/uSW4B.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/uSW4B.png" alt="enter image description here" /></a></p>
<p>Using the same value to estimate the trip time for the 10 A condition, I get 0.0022 seconds. In the graph below, it comes around 0.02 seconds.</p>
<p>Where am I going wrong?</p>
<p><a href="https://i.stack.imgur.com/DV2xI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DV2xI.png" alt="enter image description here" /></a></p>
| Not able to correlate the graph and table for the I2t rating in a fuse datasheet | 2024-01-17T08:22:56.177 |
697899 | |eaglecad| | <p>You are correct, there is no in software workaround beyond ULPs, text editors or scripts.</p>
<p>In the end I stopped using buses for things, and find it neater to just use labelled net stubs (short wire with a label on it).</p>
<p>For naming things in bulk, I made an excel file which generates scripts of name commands. This works well if things are on a regular grid (e.g. data pins of a symbol all equally spaced as you can quickly generate coordinates with a step and offset. A similar approach could be done by making a ULP that takes x/y/step and some name format.</p>
| <p>In Eagle 7, when I draw a Bus line I can quickly assign a number of nets to the bus by using the [N..M] format; for instance, say i want to add data lines D from 0 through 8, I can Name the bus D[0..8].
<br><br>
However, this fails if i add text after the last bracket: if I want to create a bus of differential pairs and i Name LVDS_[0..3]_P the command will fail, reporting " Unexpected '_' ", meaning subsequent characters are not allowed.
<br><br>
This is a very minor shortcoming, plus there are infinite ways of manipulating text outside of Eagle to automate text creation (Notepad++ is a favorite of mine), but i was wondering if anyone else came across this and perceived it as a limitation? Is there a way around it within Eagle?</p>
| Can't add text after automatically numbering nets on a bus (Eagle 7) | 2024-01-17T09:20:27.933 |
697905 | |power| | <p>The answer depends on which component the power rating is for.</p>
<p>To start, Alternating Current (AC) systems are usually considered fixed for a given region/city/state/country and are specified by their RMS value. 230V, 120V, 220V, 127V are some common values.</p>
<p>Ignoring smaller and transient changes to the component's characteristics, for resistive components like light bulbs and heaters the power is usually specified for a fixed input voltage, and the component will use all that power while on. The calculation for that is usually straightforward and you may usually consider the component as a resistor: if you lower the voltage input, the current draw and power will drop.</p>
<p>For capacitive and inductive loads, such as electric motors, it is more common to spec the peak power draw (for example, when the motor is starting). The same goes for dynamic systems, for which the power draw is variable (i.e. a TV set, which draws full power when on and with full brightness and audio power, but very little while off). This way, an electrician may easily calculate the maximum power of a whole system by adding up the components' powers, which will determine the specs for the wiring and breaker.</p>
<p>If you input more voltage, current or power than the component is spec'ed for, the usual result is that the component fails (either a fuse is blown, or some part is "fried", maybe even resulting in a fire). If you input less voltage than the spec, the result depends on the component's internals: a resistor-like load will draw less power, but an electronic switching PSU may still work, since the internal circuitry will compensate for the lower voltage by drawing more current. For those, the spec is actually a range of voltages which will draw the same total power.</p>
<p>For example, a phone charger may be specified as "INPUT 100-240V 0.5A, OUTPUT 5V 1A", which means that it will supply a 5V output with <em>up to</em> 1A if the phone supports it and only while charging, regardless of the input voltage, but only as long as it is between 100V and 240V. After charging, the output voltage will still be 5V, but the phone will draw much less current, usually just a trickle.</p>
<p>In a similar way, a resistor in a PCB may be specified as "1/2 W", which means that you can <em>usually</em> operate it for any combination of voltage and current that results in a power value lower than that. But beware that this is just a rule of thumb when using "normal" voltages and currents: the component also does have a <em>maximum</em> voltage and current specs, but it's harder to find the datasheet with those limits.</p>
| <p>How can we say that a bulb is a 100 watt bulb or a heater is a 1000 watt heater when when according to the relations</p>
<p>P=VI, V^2/R and I^2*R</p>
<p>the power depends upon the current and voltage applied to the component while its resistance is fixed?</p>
<p>What if I apply a much lower voltage to a 100 watt bulb? The resistance of the bulb is the same and much less current flows through it. Won't that make the power dissipation much less because of less current through and voltage across it?</p>
| How is the power of a component fixed? | 2024-01-17T10:34:30.507 |
697940 | |motor|amperage|step-up| | <p>Based on your description I assume there are 4 motors, 23W each. Although it would be logical to get the power supply to cover the maximum power needed, it's often unnecessary. The real power draw of the motor depends on the load it experiences, in periscope, it probably won't be much. If I had to guess probably around 12W or less.</p>
<p>If you plan on simultaneously using all of the motors take around 50-60W power supply, if only one motor at the time will be used then 20W will suffice.
It's a good practice to take power supply about 20-30% stronger then the typical power draw.</p>
<p>As to how does "amps and watts work?"
The simplified version is that:
Volts - How fast the motor will spin.
Amps - How much force it will apply on the shaft.
Watts - The power of the motor = product of force and speed (Volts x Amps).
More amps and watts id generally better, just bare in mind that the bigger the disproportion in maximum delivered vs used power, the lower the efficiency of the converter</p>
<p>A cheap option is to go with something like this, but there is risk that the output may vary from what is in datasheet.
<a href="https://rads.stackoverflow.com/amzn/click/com/B01EFUHFW6" rel="nofollow noreferrer" rel="nofollow noreferrer">https://www.amazon.com/Converter-Regulator-Adapter-Vehicle-DC9-20V/dp/B01EFUHFW6/ref=sr_1_19?keywords=12v%2Bto%2B24v%2Bconverter&qid=1705505615&sr=8-19&th=1</a></p>
| <p>I know very little about electricity. I am a private detective. I am converting on older surveillance periscope to modern IP cameras. The periscope has several motors that raise/lower turn 360% and on the tilts the periscope mirror up and down. These were all wired to a 16 pin cord that also included communication. I am removing everything back to the motors. One motor is a (Pittman 9234S006-R1 Servo motor, 24VDC, 6151rpm no load, 5.17oz/in tor const, .16/8.11A ) The van is 12 volt dc with a 12 volt panel and 120 volt ac inverter. I want to add a 24 volt step up power supply for this motor. I obviously want 24 volt dc power but I don't understand the amps or watts. Can anyone explain this to me? Is more watts and amps better?</p>
| Step-up power supply for motor | 2024-01-17T14:40:56.043 |
697966 | |transistors|ltspice| | <p>These spikes are called "glitches", which occur when signals propagate through combinatorial logic because the gates aren't infinitely fast. As a result, the circuit goes through intermediate states which might temporarily cause incorrect outputs.</p>
<p>This is completely expected and not an error in your circuit or the simulation. The circuit just needs a tiny bit of time until it has calculated the correct result.</p>
<p>Your circuit works perfectly fine.</p>
<p>If you really want the spikes to be gone, you need to make the circuit synchronous by adding input and output registers, as well as a clock signal to drive them. This is likely overkill for such a simple experiment.</p>
| <p>For the following full adder circuit:</p>
<p><a href="https://i.stack.imgur.com/oQA5d.png" rel="noreferrer"><img src="https://i.stack.imgur.com/oQA5d.png" alt="enter image description here" /></a></p>
<p>I get the following output for s (I have the same problem with COUT):</p>
<p><a href="https://i.stack.imgur.com/VCFbF.png" rel="noreferrer"><img src="https://i.stack.imgur.com/VCFbF.png" alt="enter image description here" /></a></p>
<p>The graph itself is correct, but those spikes should not be there. I know that I have to change the sine wave somehow but I can't figure it out. How do I avoid getting those spikes?</p>
| What causes these spikes in an LTspice circuit analysis of a full adder? | 2024-01-17T16:52:10.590 |
697986 | |grounding| | <blockquote>
<p>If a small part of the rod is kept outside the soil, wouldn't be that a low resistance point where a lightning can choose to go?</p>
</blockquote>
<p>If the ground rod were out in the middle of a field where it's the tallest thing around, then yeah, probably. If the ground rod were surrounded by trees, I would expect lightning to always hit the trees, not the rod. After all, if the rod is next to a living 20 foot tree, then the rod has 20 feet of air above it that the tree does not have, and it's much easier for the lightning to go through 20 feet of live tree than 20 feet of air.</p>
<blockquote>
<p>Does it need to be covered with something to increase its resistance to the outside or there always must be a lightning rod nearby with a slower resistance?</p>
</blockquote>
<p>I can't think of any reason why you would need either of those things. What's the hazard that you're worried about?</p>
<blockquote>
<p>I'm asking because I'll put the rod in a remote place surrounded by trees, so a lightning over there would be a sure fire.</p>
</blockquote>
<p>It's true that if a tree gets struck by lightning, that may cause a fire. What does that have to do with a ground rod? Are you concerned that the ground rod may somehow increase the chance that a tree would get struck by lightning? As far as I know, a ground rod would have no effect at all on the lightning risk.</p>
| <p>I have some questions about ground rod installation.</p>
<ul>
<li>If a small part of the rod is kept outside the soil, wouldn't be that a low resistance point where a lightning can choose to go?</li>
<li>Does it need to be covered with something to increase its resistance to the outside or there always must be a lightning rod nearby with a slower resistance?</li>
</ul>
<p>I'm asking because I'll put the rod in a remote place surrounded by trees, so a lightning over there would be a sure fire. Also not sure where to put a lightning rod in a place like that.</p>
| Ground rod in an area surrounded by trees | 2024-01-17T19:32:38.507 |
698004 | |fpga| | <p>Another consideration is efficiency. Consider a 4-input LUT - it uses 16 bits. Two 4-bit LUTs require 32 bits.
If your LUTs have a minimum size of 8 inputs, for example, you can produce the same logic functions as two smaller lUTs, but it will require 256 bits, and a waste of 87% of the chip area.
General purpose logic typically has a lot of small-scale logic variables, so small LUTs are the most efficient use of real estate.</p>
| <p>An FPGA can be seen (visually at least) as a matrix of cells. Each cell has a LUT (look-up table) inside, implemented with SRAM and MUX.</p>
<p>Why does the size of such a LUT (and hence of the SRAM) need to be kept small in FPGAs (usually less than 10 input bits)?</p>
<p>Please correct me if I am saying something wrong.</p>
| Why are the lookup tables in FPGAs small? | 2024-01-17T22:29:58.220 |
698011 | |oscillator|crystal|pinout| | <p>The package is called "TO-39" or "TO39". I'm sure you'll find a lot of matching products if you google "R433 TO-39" or "R433 TO39".</p>
<p>As for the pinout, <code>A</code> must be the ground connection (think of it like chassis ground), and <code>B</code> and <code>C</code> are the crystal element pins.</p>
| <p>What are the pins A, B, C of this 433 MHz crystal oscillator?</p>
<p><a href="https://i.stack.imgur.com/kd5mN.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kd5mN.png" alt="pinout" /></a></p>
<p><a href="https://nexelectronics.in/wp-content/uploads/2023/01/433-MHZ-CRYSTAL-OSCILLATOR-1.jpg" rel="nofollow noreferrer">https://nexelectronics.in/wp-content/uploads/2023/01/433-MHZ-CRYSTAL-OSCILLATOR-1.jpg</a></p>
<p>I suppose these are input, output, ground. Could you explain or give me a link to datasheet on internet? I researched, because I have just obtained this crystal and want to test on project, but could not find and figure out which pin serves for what.</p>
| 433 MHz crystal 3 feet pinout? | 2024-01-17T23:34:21.447 |
698019 | |arduino|usb-device|atmega32u4| | <p>I think the bootloader uses this module to initialize the USB hardware:
<a href="https://github.com/arduino/ArduinoCore-avr/blob/master/cores/arduino/USBCore.cpp" rel="nofollow noreferrer">USBCore.cpp</a></p>
<p>This is the relevant code fragment:</p>
<pre><code>// ATmega32U4
#if defined(PINDIV)
#if F_CPU == 16000000UL
PLLCSR |= (1<<PINDIV); // Need 16 MHz xtal
#elif F_CPU == 8000000UL
PLLCSR &= ~(1<<PINDIV); // Need 8 MHz xtal
#else
#error "Clock rate of F_CPU not supported"
#endif
</code></pre>
<p>I think you must recompile the bootloader with the option</p>
<p>F_CPU = 8000000</p>
<p>in the caterina Makefile or try to use the caterina-LilyPadUSB bootloader. That seems to be compatible to your design and expects an 8 MHz crystal.</p>
| <p>I have an already-designed board that uses an ATmega32U4 (a board of our own design). It is USB-powered at 5V and it has an external 16MHz crystal.</p>
<p>Below is a screencapture of the relevant portion of the schematic:</p>
<p><a href="https://i.stack.imgur.com/1fp5Z.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1fp5Z.png" alt="enter image description here" /></a></p>
<p>The firmware is built as an Arduino project (a single <code>.ino</code> file), based on the Pro Micro.</p>
<p>I have several reasons to move the design to 3.3V (still USB-powered, so I can simply add an LDO to generate the 3.3V); thus, the external crystal will have to be 8MHz. However, my doubt/question is about the 48MHz internally-generated USB clock signal: I don't see anywhere in the <code>.ino</code> file anything related to setting up the MCU's PLL; would that be part of the bootloader? Would I need to adjust the bootloader? Obtain and flash a bootloader image specifically for 8MHz clock?</p>
| USB on ATmega32U4 powered at 3.3V | 2024-01-18T01:30:53.910 |
698021 | |batteries|battery-charging|usb-c|laptop|usb-pd| | <p>All you need is to implement a Power-Delivery-compliant power source. Then your laptop will negotiate a proper power contract automatically.</p>
<p>To make the device you just need to implement a simple circuit similar to this one:
<a href="https://i.stack.imgur.com/0xlxD.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0xlxD.png" alt="enter image description here" /></a>
This particular circuit comes from <a href="https://www.st.com/resource/en/datasheet/stusb4710.pdf" rel="nofollow noreferrer">STM</a> portfolio of PD products. This circuit will convert a 20-24V source to variable output, so your laptop can find a matching proper power profile. Your 3.7V battery needs to have an upconverter to 20-24V, or the power-in circuitry (U2) needs to be a variable PDO-controlled upconverter itself.</p>
<p>There are may more producers of similar PD controller chips, TI, Infineon, Analog Devices, Diodes, etc.</p>
<p>A simple upconverter to +5V will not provide your laptop with charging, a 5V-based PD profile usually is not enough to charge a normal laptop.</p>
<p>It is a separate story to integrate an AC-DC charger to your battery pack.</p>
| <p>Is there a way that I can change my USB-C PD supported laptop with battery bank? I have 3.7V 25000 mAH batteries bank. 5X (3.7V, 5000 mAH) batteries are connected in parallel. What sort of circuit design will work for it? Is it even possible or not? Maybe a boost converter to increase batteries voltage? But still I am in doubt how USB-PD of laptop will respond to it.</p>
| Charging USB-C PD supported laptop from battery bank | 2024-01-18T03:25:57.457 |
698039 | |mosfet|pwm|varistor| | <p>What you describe sounds far too complicated and I doubt it will work well, if it works at all.</p>
<p>I recommend you simply use a digital potentiometer to manipulate the feedback network - cheap and simple.
There are several which come with an Arduino library.</p>
| <p>I am trying to replace R2 from this <a href="https://images.tuyacn.com/smart/A_TUYA/cropper/LM2596S.pdf" rel="nofollow noreferrer">LM2596-based</a> module for a MOSFET-based variable resistor:</p>
<p><a href="https://i.stack.imgur.com/ivcqY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ivcqY.png" alt="enter image description here" /></a></p>
<p>According to this answer (<a href="https://electronics.stackexchange.com/a/15273/148272">https://electronics.stackexchange.com/a/15273/148272</a>) it may be possible to use a low frequency PWM signal to vary resistance by varying the duty cycle.</p>
<p>My goal is to use an Arduino's relatively low PWM freq (~500 Hz) to achieve this and get rid of the pot.</p>
<p>Other than just removing the trimmer I think I also need to remove <span class="math-container">\$C_{FF}\$</span> as per the info from this other question (<a href="https://electronics.stackexchange.com/questions/129803/pwm-controlled-variable-resistance">PWM controlled variable resistance</a>):</p>
<p><a href="https://i.stack.imgur.com/HgeFzm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HgeFzm.png" alt="enter image description here" /></a></p>
<blockquote>
<p>As shown, the job of the capacitor is to destroy the MOSFET. ie it is incorrectly shown.</p>
</blockquote>
<p>Since the LM2596 works on the basis of very quickly (150 kHz) comparing the reference voltage (between R1 and R2) and adjusting the duty cycle so <span class="math-container">\$V_{OUT}\$</span> approaches the desired voltage, by switching R2 on and off the average resistance <span class="math-container">\$R_{AVG}=\frac{R}{D}\$</span> should do the trick, I think.</p>
<p>Would this work?</p>
<p>Other solutions I have explored include:</p>
<ul>
<li>Turning the MOSFET into a variable resistor <a href="https://electronics.stackexchange.com/a/4580/148272">by operating it in the Ohmic region</a>, by low-pass filtering the PWM signal to get a suitable DC for the gate. <a href="https://electronics.stackexchange.com/questions/154409/mosfet-as-variable-resistor-in-high-amp-circuit">This dissipates a lot of power</a> and might not even be that reliable, from other comments I keep reading around. Also JFETs are apparently more suited for this and I don't have any at hand to try.</li>
<li>Use an R-2R Resistive Ladder Network and use the Nano to select the desired R2. This works but is kinda wasteful.</li>
<li>Amplifying the PWM signal using a power MOSFET and low-pass filtering the output to DC. The problem with this is that for higher loads I will need to get a big (and costly) resistance (at least 6 W for my application) or putting a LOT (like 24) 0.25 W resistances in parallel to allow for a bigger load.</li>
</ul>
<p>The load is a BLDC fan rated at 12V 0.5A, btw.</p>
| Use MOSFET as low frequency PWM variable resistor for step down regulator | 2024-01-18T07:34:14.230 |
698048 | |antenna|phase-shift|antenna-array| | <p>Let's take this one step at a time. Consider first the behavior of one subarray.</p>
<p>The subarray can be considered as being composed of two elements (the two groups of three), separated by 1.5 lambda. Since half the subarray has a 2-bit phase shifter in its feed, you can steer the subarray beam to 4 different positions, corresponding to the 4 possible phase states of the phase shifter. The beam positions are 0 deg, 15 deg, 25 deg, & 35 deg, per you question.</p>
<blockquote>
<p>What happens to the signals un-phase-shifted, e.g., the top three
antenna elements in each subarray?</p>
</blockquote>
<p>In your case, the fact that the upper 3 elements in each subarray are not phase shifted doesn't really matter, The subarray's beam is steered by the relative phase difference between the upper 3 elements and the lower 3 elements.</p>
<p>Keep in mind that the overall pattern of the steered subarray beam is a function (product) of the 3-elements that make up half the subarray and the 2 super elements (for lack of a better term) that make up the subarray.</p>
<blockquote>
<p>If we want to direct the signals to a given direction, lets say, 15
degree (vertical), how do we do it?</p>
</blockquote>
<p>Well, I explained above how that works at the subarray level. At the array level - 4 subarrays - it all depends on the relative phase shift between the 4 subarrays. You have all 4 subarrays steering to the same place, so now you have to bring those 4 subarrays into phase alignment. The spacing between the subarrays is 6 element spacings, or 3 lambda. This is 2X the spacing between the upper 3 and lower 3 elements of a subarray, So the phase shift between subarrays should be 2X that of the phase shift between the upper & lower halves of each subarray.</p>
<p><strong>Added the Following</strong></p>
<p>You said in your comment:</p>
<blockquote>
<p>That means we can benefit from the array gain of total 24 antenna elements when we steer the beams (from all 4 subarrays) towards a given direction?</p>
</blockquote>
<p>No, that won't work with the architecture you have. The basic issue is that the phase value of the upper half of each subarray is always zero. The illustration below shows what happens.</p>
<p><a href="https://i.stack.imgur.com/oD7wa.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oD7wa.png" alt="enter image description here" /></a></p>
<p>In order to steer and form a beam at a direction other than broadside, you would need a phase gradient (taper) across the array that's shown in blue. What your architecture gives you is something like what's shown in red, where the lower half of each subarray is phase aligned (at least to the quantization allowed by the phase shifter), but the upper half of each subarray is steered to boresight (perpendicular to the face of the array).</p>
<p>This really gives you two separate beams, one steered in the desired direction amd the other fixed at boresight.</p>
| <p>I have a subarray-based antenna system as shown here:</p>
<p><a href="https://i.stack.imgur.com/pEkpv.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pEkpv.jpg" alt="enter image description here" /></a></p>
<p>The four subarrays are arranged vertically. In each subarray there are six antenna elements. Only the bottom three in each subarray have a common phase shifter.</p>
<p>The inputs to each subarray are distinct: i1 ≠ i2 ≠ i3 ≠ i4.</p>
<p>The operating frequency is 3.5 GHz. The antenna elements are vertically arranged with half a wavelength spacing.</p>
<p>The phase shifters can take 4 distinct values, i.e., 2-bit phase shifters, for directions 0°, 15°, 25°, and 35° (vertically).</p>
<p>Can someone please explain the behaviour of this antenna? What happens to the un-phase-shifted signals, e.g. the top three antenna elements in each subarray?</p>
<p>If we want to direct the signals to a given direction, lets say, 15° (vertical), how do we do it? Can we achieve the full array gain in this case, i.e., from these 24 antenna elements? Or is each signal only supported by its subarray in terms of array gain?</p>
| What is the behaviour of this antenna array? | 2024-01-18T09:02:04.273 |
698062 | |circuit-analysis|ltspice| | <blockquote>
<p>I could not check these using the simulator, as LTspice does not allow
parallel voltage sources or series current sources</p>
</blockquote>
<p>You can get around this by using very small series resistors for the parallel voltage sources (or <code>Rser</code> parameter). For series current sources (which you don't have in your specific example), you can do something similar by adding very large parallel resistors.</p>
<hr />
<blockquote>
<p>is tripling the value of I_s and removing these parallel voltage
sources is equivalent to the original circuit?</p>
</blockquote>
<p>Let's try it out. We'll use resistances which are small relative to the other resistors in the circuit. Since we're in the single to tens of ohms range, I picked 1µΩ. If you had resistors in the hundreds/thousands of ohms, I might've selected 1mΩ instead. Anyway, you don't want to put these on all the voltage sources, but just one per parallel branch like shown below. <em>Note: V6 was added as a way to measure the current in that branch.</em></p>
<p><a href="https://i.stack.imgur.com/sa1SE.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sa1SE.png" alt="enter image description here" /></a></p>
<p>Now, let's do your simplification and re-run the simulation.</p>
<p><a href="https://i.stack.imgur.com/bSARu.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bSARu.png" alt="enter image description here" /></a></p>
<p>2.654A is almost exactly 3x 885mA, so I say that checks out.</p>
<hr />
<blockquote>
<p>Also, is removing all these current sources, and putting 1 current
source with 5 A equivalent to the original circuit?</p>
</blockquote>
<p>Let's try this simplification and see if I(V1) and I(V6) stay the same.</p>
<p><a href="https://i.stack.imgur.com/M0rlI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/M0rlI.png" alt="enter image description here" /></a></p>
<p>Looks good to me!</p>
<p>One last thing to note is that LTspice measures current through voltage sources from the [+] side to the [-] side. So the answers here might be negated from what you got on your hand calculations.</p>
| <p><a href="https://i.stack.imgur.com/NbLuy.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/NbLuy.png" alt="enter image description here" /></a></p>
<p>The question asks to find <span class="math-container">$$I_s \space\space and \space\space I_x$$</span>
However, before doing so, I should simplify the circuit. Is my simplification correct?</p>
<p><a href="https://i.stack.imgur.com/SMbc3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SMbc3.png" alt="enter image description here" /></a></p>
<p>(I.e. is tripling the value of I_s and removing these parallel voltage sources is equivalent to the original circuit?)
Also, is removing all these current sources, and putting 1 current source with 5 A equivalent to the original circuit?</p>
<p>(I could not check these using the simulator, as LTspice does not allow parallel voltage sources or series current sources).</p>
<p>I can find I_s and I_x if the simplification is correct, so is it?</p>
| Circuit Simplification of (Series/parallel sources) | 2024-01-18T11:06:56.847 |
698064 | |ltspice|speakers| | <p>Its okay not to know what to do right away. But my advice is your darlington approach is okay however if you check LT spice your power is incredibly low from what your target 2W. I may <em>resuggest</em> <strong>unawriter</strong> advice to directly put push and pull amplifier. I would recommend a class AB <a href="https://www.electricaltechnology.org/2020/05/push-pull-amplifier-circuit.html" rel="nofollow noreferrer">see here for more info about this</a>.</p>
<p>I would suggest to put it directly on your output. And try to play around with your values use your knowledge about capacitor coupling and biasing for this.</p>
<p>May I also suggest to check this <a href="https://electronics.stackexchange.com/questions/697554/need-help-with-audio-amplifier-design-for-loud-volume">post</a> I have recently read it and it quite match your question.</p>
| <p><a href="https://i.stack.imgur.com/xHudZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xHudZ.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/1zzzx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1zzzx.png" alt="enter image description here" /></a></p>
<p>Goal of the circuit:</p>
<ul>
<li>Must be able to deliver 1.5 W to the speaker (8 Ω) at 1 kHz.</li>
</ul>
<p><strong>First Problem</strong></p>
<p>1.) how can we drive an 8 ohm speaker if it can only support around 1.5-2 watts? Because when we input 8ohms as the load the Vout decreases.</p>
<ul>
<li>Coupling capacitor formula we used is
1/2pi(lowest frequency)(resistance seen by capacitance)
20Hz was the lowest frequency I used.</li>
</ul>
<p><a href="https://i.stack.imgur.com/uSUxQ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/uSUxQ.png" alt="" /></a></p>
<p>Referencing to the image above. If we add a common emitter by our understanding it should increase the power but even with coupling capacitor, it won't shift down to AC.</p>
<p>The next step we did was thinking of adding a darlington pair, it did increase the gain, but it still doesn't want to make the AC waveform shift down to its negative half cycles for a safer speaker usage.</p>
<p><a href="https://i.stack.imgur.com/AF6RA.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AF6RA.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/2brAa.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2brAa.png" alt="" /></a></p>
<p>above is the darlington w/ ce and ef (1s)</p>
<p><a href="https://i.stack.imgur.com/cTcmm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cTcmm.png" alt="enter image description here" /></a></p>
<p>above is without the darlington.</p>
<p><strong>Summary</strong></p>
<p>Our goal is to get the output that is the same in the photo below. <strong>note</strong> The RL (R6) is 100K ohms but we want that output if our desired Load is an 8ohms 2W Speaker, that can ultimately support 1.5-2W power for the speaker. <strong>What changes can we implement in our design to achieve this?</strong></p>
<p><a href="https://i.stack.imgur.com/u5vYT.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/u5vYT.png" alt="enter image description here" /></a></p>
| How can we drive an 8 ohm speaker if it can only support around 1.5-2 watts for an Audio Amplifier Circuit? | 2024-01-18T11:13:44.967 |
698074 | |voltage|led|voltage-measurement| | <p>Your circuit was broken if the resistor was badly mounted and made no contact.</p>
<p>It means the LED anode was not connected anywhere, and LED cathode was connected to negative supply lead.</p>
<p>LEDs are light emitting diodes when power is applied, but they also work in reverse, acting as photodiodes or solar cells, only they are not very good at it as they are optimized for light emission.</p>
<p>So, in short, there was light shining on the LED, it was not connected anywhere, and the photovoltaic effect made voltage appear on LED termnals, which you were able to measure with a multimeter.</p>
<p>The polarity of the voltage was as expected for a diode junction acting as solar cell.</p>
| <p>I was changing the control board of my 3D printer. When testing the heatbed, I saw that the LED wasn't glowing (as with the old control board), when the heatbed was turned on. So I investigated with my multimeter.</p>
<p>The circuit is pretty simple (taken from the <a href="https://github.com/prusa3d/Heatbed_MK52_magnetic" rel="nofollow noreferrer">prusa3d GitHub</a>, the wire on the right stands for the heating loops on the PCB).</p>
<p><a href="https://i.stack.imgur.com/Jdw6E.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Jdw6E.png" alt="enter image description here" /></a></p>
<p>So more appropriately would be:</p>
<p><a href="https://i.stack.imgur.com/IDbwB.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/IDbwB.png" alt="enter image description here" /></a></p>
<p>Here my observations (during a long period, so there should be no PWM):</p>
<ol>
<li>The heatbed warms up in a timely manner</li>
<li>Measured the voltage drop between the contacts (VCC to GND: 11.36 V) <a href="https://i.stack.imgur.com/ZzwaU.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ZzwaU.jpg" alt="enter image description here" /></a></li>
<li>Measured the voltage drop across R1 (VCC 10.36 V to pad of R1 towards D1)</li>
<li>Measured the voltage drop across D1 (-2 V, both pads of the diode, however the value varies) <a href="https://i.stack.imgur.com/pZQ2e.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pZQ2e.jpg" alt="enter image description here" /></a></li>
<li>I checked the function of the diode with the diode setting on the multimeter</li>
</ol>
<p>I understand that the diode won't glow with a negative voltage, but why is the measured voltage negative?</p>
| Why is the voltage across the LED negative, when the entire drop is positive? | 2024-01-18T13:16:47.850 |
698082 | |rf|transformer|differential|transmission-line|balun| | <blockquote>
<p><em>in the RF world I would assume for the field between the shield and
center piece to propagate in coax or on a PCB, the line would sort of
induce current on the return path/shield meaning at each point the
shield wouldn't actually be 0 V</em></p>
</blockquote>
<p>From the question entitled <a href="https://electronics.stackexchange.com/a/458184/20218">how are unbalanced coaxial cables used for broadcasting TV signals without any problems?</a> I quote myself with a few sentences highlighted: -</p>
<blockquote>
<p>If you do the math on the external fields produced by a regular signal
sent down a coax and analysed the fields from send and return currents
individually, you find that at all points outside the shield, the
opposing magnetic fields exactly cancel to zero. <strong>There is no magnetic
field outside a coax from a regular coax signal</strong>.</p>
<p>The impact of this is that the signal’s magnetic field is only
produced in the gap between inner and outer shield. <strong>A repercussion of
this is that the shield therefore has to have zero inductance</strong>. This is
because the outer magnetic field is zero (aka zero induction) and the
signal’s internal magnetic field has no effect on a tubular conductor
(aka shield) hence, the shield behaves like an infinitely thick ground
casing surrounding the inner.</p>
<p>That may be a little hard to swallow but if you go back to the
theories of magnetic fields associated with a tubular flow of current,
an external field is produced but no inner field. <strong>The reverse is
entirely true; a magnetic field inside a tube induces no voltage along
the tube</strong> AND, given there is no external field, the shield has zero
inductance.</p>
</blockquote>
<p>So, theoretically, coax is fine but, you still sometimes need a balun (for instance when using a dipole antenna) because clearly, the coax is unbalanced.</p>
| <p>Excuse any blatant mistakes, I'm very <em>clearly</em> learning this new. Anyway from a purely transmission line perspective, it seems you can have a single ended line and a differential pair. I see the single ended (like coax line), where the return path is the shield/ground; at first looking as if this is DC, it would mean I would read 0 potential difference between the shield and the ground of <em>say the radio transmitter</em>. But in the RF world I would assume for the field between the shield and center piece to propagate in coax or on a PCB, the line would sort of induce current on the return path/shield meaning at each point the shield wouldn't actually be 0 V (if you pronged into where the skin effect is) between it and <em>say the radio transmitter</em> but in sort of opposite to the center feed / trace's voltage.</p>
<p>Now when I think of differential pairs, I don't actually see any difference in my mind. When I see images online of waveforms its pretty clear it is trying to get to the point that these opposing signals swing around a reference point but I don't see how that is any different.</p>
<p>I noticed on the an RF transceiver (<em>cant remember the name sorry</em>) had its transmit outputs as N and P requiring a balun for coax, so I'm clearly missing something. My only thought is say the N would instantaneously output +4V (wrt ground), whilst the P outputs -4V (wrt ground), but again I don't see how this changes thing along the transmission line.</p>
<p>Essentially I'd like to know the exact difference between the single end and differential pair, and if this is dependent of thinking in hf terms or simple dc cases.</p>
| Differential pairs / Single ended and the need for baluns | 2024-01-18T14:01:25.483 |
698084 | |power-dissipation|to220| | <p>TO3 package is obsolete. It was introduced in <a href="https://sites.google.com/site/transistorhistory/Home/us-semiconductor-manufacturers/raytheon-part-one-2" rel="noreferrer">1956</a> along with the first germanium power transistor. To its credit, it survived to this day, which is quite the achievement.</p>
<p>Pin spacing was chosen so it would fit in existing vacuum tube sockets.</p>
<p>Its distinguishing features compared to other packages of the day were good heat transfer to a heat sink, while being hermetic and preventing water ingress. It was a huge upgrade compared to this:</p>
<p><a href="https://i.stack.imgur.com/QHqHs.png" rel="noreferrer"><img src="https://i.stack.imgur.com/QHqHs.png" alt="enter image description here" /></a></p>
<p>But compared to modern packages it's terrible.</p>
<p>Even in high thermal conductivity materials like aluminium, in a sheet, heat diffusion works much better through the sheet (from one side to the other) than across (along the length of the sheet), because the former involves a much larger cross-section to conduct heat.</p>
<p>If you mount it on a L-bracket... the first drawback is you need a L-bracket and a bunch of extra screws, hardware, tapped holes and thermal grease, which adds cost. And heat has to travel along the wrong direction of the bracket to reach the heat sink. (<a href="https://www.fischerelektronik.de/web_fischer/en_GB/heatsinks/A08/Die-cast%20heatsinks/VA/WP40301003AL/index.xhtml" rel="noreferrer">pic source</a>)</p>
<p><a href="https://i.stack.imgur.com/REBKs.png" rel="noreferrer"><img src="https://i.stack.imgur.com/REBKs.png" alt="enter image description here" /></a></p>
<p>More modern packages like TO-247, TO-220, TO-3P are mounted directly on the heatsink, without the extra thermal resistance and cost of the L-bracket.</p>
<p>Now if you put the TO-3 on the heat sink <a href="https://fr.farnell.com/abl-heatsinks/520ab1000mb-t03/dissipateur-therm/dp/253728" rel="noreferrer">directly</a> then heat still has to travel a long way in the wrong direction in the flat aluminium piece behind the transistor.</p>
<p><a href="https://i.stack.imgur.com/hW2zM.png" rel="noreferrer"><img src="https://i.stack.imgur.com/hW2zM.png" alt="enter image description here" /></a></p>
<p>Besides that, it has many other drawbacks:</p>
<ul>
<li><strong>There is no third pin, it's the transistor package itself.</strong></li>
</ul>
<p>If it is exposed at the rear of the heat sink that's a short circuit or electrocution risk so you need a plastic cap. Even if you put a plastic cap, the screws are still live. If you see a heat sink at the back of an enclosure with a bunch of TO3s without plastic caps, chances are good every one of them is at a different voltage and any contact with a conductive object between the TO3s and the heat sink will result in something blowing up. If it's a high voltage device, keep your <a href="https://www.youtube.com/watch?v=hNRacVQRgBc" rel="noreferrer">fingers</a> away. It's just... bad.</p>
<p><a href="https://i.stack.imgur.com/i2Zhi.png" rel="noreferrer"><img src="https://i.stack.imgur.com/i2Zhi.png" alt="enter image description here" /></a></p>
<p>You also need to connect this "pin" to your PCB via another cumbersome and fiddly part, like an eyelet washer or copper standoff with nuts and washers. Assembly is time consuming. In the old days wires were used, but that only works at low frequency due to inductance.</p>
<p>This is a <a href="https://www.usaudiomart.com/details/649507284-marantz-250-power-amplifier/images/2201922/" rel="noreferrer">Marantz 250</a> amplifier from 1973. Notice the custom made metal enclosure to protect exposed TO3s from short circuits...</p>
<p><a href="https://i.stack.imgur.com/Ev4gJ.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/Ev4gJ.jpg" alt="enter image description here" /></a></p>
<ul>
<li><p>Depending on how the "third pin" (the package) is connected to the PCB, different thermal expansion versus the other two pins can create stress that will pop the pads off the board.</p>
</li>
<li><p>Thickness of the heat sink plate or L-bracket is limited by the length of the pins</p>
</li>
<li><p>It takes a ton of space on the PCB which can't be used for components</p>
</li>
<li><p>High inductance due to long traces and wide pin spacing, so it can't be used for high speed switching</p>
</li>
<li><p>Forces the board to be parallel to the TO3 mounting surface, which is inconvenient (most heat sinks are vertical for better convection, most boards are horizontal)</p>
</li>
<li><p>Can't separate board from heatsink without desoldering it, which makes maintenance problematic</p>
</li>
<li><p>More expensive than plastic packages, more expensive and labor intensive mounting.</p>
</li>
<li><p>etc.</p>
</li>
</ul>
<p>Overall, for high power, TO247 and TO3P are just better in pretty much every criteria. For low power, TO220 is much cheaper and easier to use. These packages have none of the drawbacks mentioned above.</p>
<p>Some advantages: TO3 being all metal can withstand higher temperatures and be hermetically sealed. It's also bigger, so it is still used to fit some hybrid circuits.</p>
| <p>Simple Question:</p>
<p>What are the advantages and disadvantages of TO-220 package vs TO-3 package in different applications/power requirements? Is there a best route?</p>
| TO-220 vs TO-3 advantages/disadvantages | 2024-01-18T14:12:33.940 |
698086 | |semiconductors|solid-state-devices| | <p>I can argue that diffusion (both sideways and down) decreases the resistance, because mobility increases as the doping decreases. Assuming the total number of dopants remains the same, which is roughly true.</p>
<p>In any case the change is probably not very big, and if you really care you should simulate it.</p>
| <p>Consider forming an integrated resistor by diffusion of n+ dopants down into some p- substrate (the corresponding pn junction is reverse biased during operation). Let <span class="math-container">\$W,L,t\$</span> be the width, length, and thickness of this resistor nominally (i.e. on the mask), and let us deliver flux of dopants <span class="math-container">\$Q_D\$</span> (dopants per unit area) to the mask area <span class="math-container">\$WL\$</span>. Nominally, we might then say that (if the implantation is done in a certain way and <span class="math-container">\$t\$</span> is not too large) that we have uniform doping of <span class="math-container">\$N_D = Q_D/t\$</span>. Let us further assume that the implantation and subsequent diffusion activation is such as to cause some side and down diffusion. Let's also assume that <span class="math-container">\$W,L\$</span> are relatively large so that the dominant component of resistance can be computed in a 1D approximation.</p>
<p>Given these assumptions, my textbook (see below) says essentially that "side diffusion was [need not be] taken into account because the ohmic resistance of the...layer is determined entirely by the number of impurity atoms actually diffused." I am trying to convince myself of this claim. How do we argue for it?</p>
<p>Do we roughly argue that the extra diffusion in the lengthwise direction is negligible, and then proceed as follows: the total resistance of the resistor can be computed as the resistance of imagined "wires" in parallel, where we integrate them along the y (width) and x (thickness) directions. I use the subscript <span class="math-container">\$d\$</span> to denote quantities which have changed from their nominal values after the diffusion activation.
<span class="math-container">$$R = \left(\frac{1}{L}\int_{0}^{W_d}\int_{0}^{t_d} q \mu_n N_{Dd}(x,y) \,dx \, dy \right)^{-1}.$$</span>
Does one now argue that, to the extent <span class="math-container">\$\mu_n\$</span> is independent of doping, one has that
<span class="math-container">$$\frac{1}{L}\int_{0}^{W_d}\int_{0}^{t_d} N_{Dd}(x,y) \,dx \, dy = (Q_DWL)/L^2 = N_DtW/L$$</span>
where the above basically comes from thinking about the total number of dopants in the "bathtub". Thus we get the same <span class="math-container">\$R\$</span> as if we had've just used the nominal <span class="math-container">\$R = \frac{L}{q\mu_nN_DWt}\$</span>. I am very unsure of this because assuming <span class="math-container">\$L\$</span> doesn't change much whereas <span class="math-container">\$W\$</span> does seems a bit absurd, but I couldn't stitch up an argument without doing that.</p>
<hr />
<p>As an aside (and for those who have access to a copy), this question is motivated by a comment made on page 102 of the 5th edition of <em>Analysis and Design of Analog Integrated Circuits</em> by Gray, Hurst, Lewis, and Meyer, where they calculate the collector resistance of an antiquated bipolar process. The specific motivation has to do with the component of this collector resistance associated with the buried layer. They write "Here the buried-layer side diffusion was not taken into account because the ohmic resistance of the buried layer is determined entirely by the number of impurity atoms actually diffused [see (2.15)] into the silicon, which is determined by the mask dimensions and the sheet resistance of the buried layer."</p>
| Why doesn't side diffusion raise resistance of an integrated resistor? | 2024-01-18T14:54:03.017 |
698092 | |semiconductors|physics|solid-state-devices| | <p>The minority carrier lifetime in modern digital CMOS devices is actually much <em>longer</em> than the cycle time of the digital circuits.</p>
<p>From <a href="https://www.scienceshot.com/post/the-minority-carrier-lifetime-in-silicon-wafer" rel="nofollow noreferrer">The Minority Carrier Lifetime in Silicon Wafer, on Science Shot</a>:</p>
<blockquote>
<p>The lifetime is quite unpredictable and difficult to control. It can vary by several orders of magnitude, from approximately 1 ns to 1 ms in common silicon solar cell materials. The highest value ever measured is 32ms, for undoped silicon, and the lowest is 1 ns, for heavily doped silicon.</p>
</blockquote>
<p>Given that CMOS devices can achieve gate propagation delay times on the order of 10 ps and lower, we can infer that carriers do <em>not</em> need to recombine for a MOSFET to stop conducting. Instead, it is sufficient for those carriers to be <em>swept out of the device's active area</em> by electrostatic forces. This process is only limited by the size of the channel and the velocity of the carriers.</p>
<p>From <a href="http://bitsavers.informatik.uni-stuttgart.de/components/national/_appNotes/AN-0558.pdf" rel="nofollow noreferrer">Introduction to Power MOSFETs and Their Applications by National Semiconductor</a>:</p>
<blockquote>
<p>A major advantage of the power MOSFET is its very fast switching speeds. The drain current is strictly proportional to gate voltage so that the theoretically perfect device could switch in 50 ps–200 ps, the time it takes the carriers to flow from source to drain.</p>
</blockquote>
<p>Note that this quote talks about power MOSFETs, which typically have much longer channels and lower carrier velocity than digital CMOS devices, hence the slow switching time of 50ps.</p>
<p>The same applies to PN junctions. A switching diode, for example, will conduct for some time after the forward voltage across it has been removed, which is called <em>reverse recovery</em>. During this time, a reverse current flows through the diode. The duration of reverse recovery isn't fixed, though, but rather depends on how fast the external circuitry attached to the diode can remove the <em>reverse recovery charge</em> from the junction. The higher the reverse current, the faster the carriers making up that charge are swept out of the junction, speeding up the turn-off process.</p>
<p>Similarly, if you want to turn a BJT off faster, you can short its base directly to ground (or otherwise inject a negative current into the base) to actively evacuate carriers from the base.</p>
<p>As a rough estimate, let's consider a 20nm long N-MOSFET channel in velocity saturation with electrons going through it at approximately 10^5 m/s (<a href="https://en.wikipedia.org/wiki/Saturation_velocity" rel="nofollow noreferrer">number from Wikipedia</a>). That means an electron travels through the channel in about 0.2 ps. Charging and discharging the MOSFET gate at a rate where this becomes significant will be quite a challenge. Additionally, even if you could change the potential on the gate fast enough for this carrier evacuation time to matter, you could still describe the process as a capacitor being charged and discharged by a constant current source due to velocity saturation.</p>
<p>In short: You don't need to wait for carriers to recombine and disappear to turn a semiconductor device off - instead, you can shove the carriers somewhere else where they don't cause any trouble. The electrostatics within the semiconductor can be considered "fixed" because the signals are much <em>faster</em> than the natural recombination of carriers.</p>
| <p>When analyzing the transitories associated with switching in semiconductor devices, in textbook treatments one often sees the time dependence considered by including (potentially nonlinear) capacitors in the device. My question here is about trying to understand what is tacit in this, and why we can do this rather than having to solve the <a href="https://core.ac.uk/reader/82732370" rel="nofollow noreferrer">full equation set</a> associated with carrier transport in the semiconductor in order to, eventually, determine <span class="math-container">\$i(t)\$</span> (defined as the relevant instantaneous current in the given device).</p>
<p>My suspicion is that this approximation works to the extent that the device "responds much more quickly" than the signal of interest driving the device changes. That is, if we are in a quasistatic limit such that at each point during the transition the semiconductor is in a new electrostatic situation, then we can use this picture of capacitors rather than going all the way back to the equations.</p>
<p>Is this suspicion correct? The reason I am unsure is that, in the treatments I have seen of devices there seems to be the suggestion that we can use this capacitor picture up to very high frequencies (in terms of the frequency content of the signal driving the device). For example, let's consider a modern digital system with a gate which is such that it is driven by a signal with an edge rate of 10 ps (I don't even think is that aggressive). We thus have the voltages throughout this structure changing on the order of ps which I suspect is on the order of the relevant recombination times (by recombination time I mean whatever is the fastest mechanism for getting carriers to where they need to be -- this might be e.g. a transit time to a source of carriers) of carriers. Why then is this quasistatic picture still appropriate?</p>
<hr />
<p>As a specific example of my general discussion above:
For pn junction, we consider the charge which must flow from the surrounding battery in order to satisfy the electrostatics at each instant. Thus, <span class="math-container">\$i_e(t) = dq(t)/dt\$</span> where <span class="math-container">\$q(t)\$</span> depends on <span class="math-container">\$v(t)\$</span> and this gives the contribution to the total current associated with the switching (the nonlinear capacitors in general) (it of course adds with what I’ll call <span class="math-container">\$i_o(t)\$</span> which is the pn junction current from the steady state case for that given value of <span class="math-container">\$v(t)\$</span>: <span class="math-container">\$i(t) = i_e + i_o\$</span>). This <span class="math-container">\$q(t)\$</span> is the aforementioned charge associated with the nonlinear capacitor used to model the device.</p>
<p>But it seems to me that we are tacitly saying that the rate of change of the driving <span class="math-container">\$v(t)\$</span> must be slow enough so that at each instant the electrostatics are indeed fixed. In a sense, the limit of our analysis is that the process is quasistatic with respect to our pn junction, but I am struggling to understand with respect to what semiconductor system time constant <span class="math-container">\$\tau_i\$</span> the characteristic time of the driving voltage <span class="math-container">\$T\$</span> must be large. As I wrote above, I suspect it's whatever the fastest recombination time is. That is, I imagine that for small enough <span class="math-container">\$T\$</span> (so that this <span class="math-container">\$T\$</span> gets to be on the order of the shortest recombination time), we eventually have to go back to the fully time-dependent equations governing carrier transport etc.</p>
| Limit of applicability of "quasistatic"/capacitive picture of devices | 2024-01-18T15:26:15.590 |
698102 | |pcb|pcb-design|schematics|ground|step-up| | <p>Your layout is exceptionally bad, particularly for such a high frequency (1.2MHz) SMPS chip.</p>
<p>The two loops (switch open and close) must be small area. The parts C4, C3 and L2 should be much closer to the chip and (in particular) the ground conductors should be very short. The capacitors should be connected to the ground plane very near the chip, not to some trace running away somewhere else on the board.</p>
<p>Always read and implement the suggestions such as "Layout Consideration" in the datasheet, and implement something very close to the recommended layout if one is provided (it is not in this case, but you might be able to find a similar chip where one is provided).</p>
<p>Here is a diagram showing the large loop areas in your layout, and the mystery part ‘?’ is outside this snippet. Your goal is to minimize the loop areas. Green loop is when the switch is ‘on’, blue when it is ‘off’. As well as affecting operation the loop areas affect EMI. The ‘?’ is the worst here, if the grounds were connected more directly with a jumper it might work, but would be unnecessarily noisy.</p>
<p><a href="https://i.stack.imgur.com/X5XvR.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/X5XvR.jpg" alt="enter image description here" /></a></p>
<p>As well as making the loops small, it would also be better to have the two loops on top of each other as much as possible, so avoid the unnecessary branch shown to the right in green above and take that trace right from the D1 pad.</p>
| <p>I designed a circuit to generate 5 V using a 3.7 V battery and an <a href="https://www.olimex.com/Products/Breadboarding/BB-PWR-3608/resources/MT3608.pdf" rel="nofollow noreferrer">MT3608</a>. The main problem is that I can't get 5 V but just 3.5-3.9 V, even after changing resistors.</p>
<p>I tried everything:</p>
<ul>
<li>Changing R1 and R2</li>
<li>Adding another ground connecting R2 and the GND of the MT3608</li>
<li>Changing the capacitor</li>
</ul>
<p>I used the formula to get resistances and my final number is 8.5 (Vout = Vref*(1+(R1/R2)) assuming Vref is 0.6 V). I used 750 kΩ for R1 and 100 kΩ for R2. I think the schematic is fine, and that the problem is in the PCB layout. Could you help me?</p>
<p><a href="https://i.stack.imgur.com/TqBm9.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/TqBm9.png" alt="Schematic" /></a></p>
<p><a href="https://i.stack.imgur.com/CDsAv.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CDsAv.png" alt="PCB" /></a></p>
| Trying to get 5 V using MT3608 (step-up boost) but without success | 2024-01-18T16:56:46.433 |
698105 | |radio|amplitude-modulation|ferrite| | <blockquote>
<p><em>why is the LC tank circuit grounded</em></p>
</blockquote>
<p>The symbol may well be local 0 volts for a battery powered piece of equipment and you are mistaking it for some earthy type connection. A ferrite rod antenna does not need to be grounded/earthed at all.</p>
<blockquote>
<p><em>what is C1, the fixed 1 microfarad capacitor, doing in the resonant circuit?</em></p>
</blockquote>
<p>If you analyse it carefully, it does not affect the primary resonant tank at all. It being effectively in series with the much smaller tuning capacitor makes the tuning still wholly determined by the tuning capacitor. This would work just as well: -</p>
<p><a href="https://i.stack.imgur.com/zBtLN.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zBtLN.png" alt="enter image description here" /></a></p>
<p>Now, C1 can be see what it is used for; a decoupling capacitor on the feed to the current passed through the secondary to a BJT base (input amplifier).</p>
| <p>I've built a simple tuned frequency radio based a description in Ronald Quan's book. I have two questions about the tuning part of the circuit. The radio has a ferrite core antenna with two separate coils. The primary (most turns) is connected to a variable capacitor and the secondary coil is connected amplification part of the circuit. I understand that variable capacitor and primary coil form a resonant "tank" circuit and that the ferrite bar acts as a transformer as well as an antenna inducing a signal with the resonant frequency in secondary coil.</p>
<p>My first question is why is the LC tank circuit grounded? I've seen this consistently in other AM circuit diagrams as well but I don't know reason for it. Wouldn't this resonant circuit work just as well if it was simply a variable cap connected to the primary coil with no other connections?</p>
<p>My second question is what is C1, the fixed 1 microfarad capacitor, doing in the resonant circuit? Connected as it is in series with the much smaller variable capacitor it doesn't seem to have much effect on the resonant frequency. Quan seems to include these fixed capacitors in other his radio designs as well, see this <a href="https://electronics.stackexchange.com/questions/223880/filtering-a-modulated-signal">this question</a> for example, but I haven't seen them otherwise.</p>
<p><a href="https://i.stack.imgur.com/kUtuk.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kUtuk.png" alt="Tuned Frequency Radio Circuit" /></a></p>
<p>The pictured circuit comes from <em>Build Your Own Transistor Radios: A Hobbyist's Guide to High-Performance and Low-Powered Radio Circuits</em> (2012) by Ronald Quan, p. 57.</p>
| Ferrite Loopstick Antenna Grounding | 2024-01-18T17:12:29.127 |
698128 | |verilog|simulation|system-verilog|testbench| | <p>This interview question looks like it was taken directly from the IEEE Std 1800-2017, section 4.8 <em>Race conditions</em></p>
<blockquote>
<p>Because the execution of expression evaluation and net update events
may be intermingled, race conditions are possible</p>
<p>The simulator is correct in displaying either a 1 or a 0. The
assignment of 0 to <code>q</code> enables an update event for <code>p</code>. The simulator may
either continue and execute the <code>$display</code> task or execute the update
for <code>p</code>, followed by the <code>$display</code> task.</p>
</blockquote>
<p>In your case, a simulator may display <code>00</code> or <code>01</code>.</p>
<p>One way to avoid the race is to delay the <code>$display</code>:</p>
<pre><code> initial begin
q=1;
#100
q=0;
#1;
$display("p = %b",p);
end
</code></pre>
<p>In writing Verilog code, always strive to avoid race conditions.</p>
<p>It does not matter if <code>p</code> is declared as a <code>reg</code> or a <code>wire</code>. Note that declaring as <code>reg</code> is only allowed in your code example if SystemVerilog features are enabled in your simulator.</p>
| <p>I have a small Verilog code example asked as an interview question. I am not sure why it prints "p=01" but not "00" since <code>assign</code> should update <code>p</code> as soon as the value of <code>q</code> changes. Or does it work differently in a testbench?</p>
<pre><code>module tb;
reg [1:0] p,q;
assign p=q;
initial begin
q=1;
#100
q=0;
$display("p = %b",p);
end
endmodule
</code></pre>
<p>I am using Mentor Questa in <a href="https://edaplayground.com/x/tRqA" rel="nofollow noreferrer">edaplayground</a>. Even if I make <code>p</code> a <code>wire</code>, the result is the same.</p>
| Assign statement in testbench doesn't seem to work as it should | 2024-01-18T20:17:27.357 |
698131 | |analog|semiconductors|solid-state-devices| | <p>Just an addendum to say that in another (now-deleted) answer, someone commented that this was a secondary effect and that they suspected that mobility effects were at play -- lightly doped samples are (I guess they are arguing) more susceptible to mobility effects as a function of temperature. Perhaps this is because lightly-doped materials are phonon-limited whereas heavily doped materials are limited by (ionized) dopant scattering sites.</p>
<hr />
<p>I've gone back into my device physics textbook (del Alamo's <em>Integrated Microelectronic Devices</em> Chapter 4, Figure 4.3) and, indeed, I just want to mention that in addition to your comment it is described there that lowly doped regions (where scattering is dominated by phonons) have a negative temperature coefficient to their mobilities whereas carriers heavily doped regions (where scattering is dominated by ionized impurity, either attractive or repulsive depending on whether or not the carrier is a majority or minority carrier) enjoy a positive temperature coefficient for their mobility (intuitively, since they are going faster they are less scattered by the screened Coulombic potentials of the impurities).</p>
| <p>In a discussion about how one can make integrated resistors in a given IC technology, Gray, Hurst, Lewis, and Meyer (<em>Analysis and Design of Analog Integrated Circuits</em>) remark that if we want to use a lightly-doped layer (e.g. a layer targeting the base region in a bipolar technology) then "because the material making up the resistor itself is relatively lightly doped, the resistance displays a relatively large variation with temperature."</p>
<p>I am racking my brain for why low doping implies a large variation with temperature. My first instinct was that there was some allusion to ionization of the dopants as a function of temperature, but as far as I know this ionization fraction is independent of dopant density (indeed, one multiplies this fraction by the nominal number of dopants to get the number of ionized dopants), but perhaps that is wrong. At any rate, what are they alluding to?</p>
| Why does light doping imply a large temperature coefficient? | 2024-01-18T20:25:09.067 |
698146 | |orcad| | <p>Those are voltage ports and its essentially like drawing a wire between two points. If you need another point, just add one with the same name or attach another set with a different name to the same node.</p>
| <p>how can I split signals like in the picture below in OrCAD? I was trying to find it, but unsuccessfully.
<a href="https://i.stack.imgur.com/TELHo.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/TELHo.png" alt="enter image description here" /></a></p>
| OrCAD - Splitting signals | 2024-01-18T23:09:09.550 |
698149 | |fet|finfet| | <p>I'd like to add that the body effect is much less prominent in FinFETs than in planar FETs. The entire fin is depleted, so a FinFET has significantly less depletion charge than a planar FET with the same effective gate area. The little additional depletion charge under the fin that can result from <span class="math-container">\$V_B < V_S\$</span> doesn't affect the threshold voltage much.</p>
<p>For some data on the threshold voltage variation of a FinFET and a planar FET with body voltage, see Fig. 10 of C. H. Lee <em>et al.</em>, <em>Symp. VLSI. Technol.</em>, 2004, pp. 130-131, doi: <a href="https://www.doi.org/10.1109/VLSIT.2004.1345434" rel="nofollow noreferrer">10.1109/VLSIT.2004.1345434</a>.</p>
| <p>What is the usual practice in industry regarding the body terminal of a FinFET?
Is it connected to the source to eliminate body effect?
Or is it connected either to the ground(nfet) or the supply(pfet)?
Is this matter handled differently in digital circuits and analog circuits?</p>
| Where is the body terminal of a FinFET connected usually in digital circuits and in analog circuits? | 2024-01-19T01:04:36.300 |
698155 | |switches|spring| | <p>These replies gave me enough information to look up the right thing. I'm holding one in my hand now! "Spring Electronic Vibration Sensor Switch".</p>
| <p>I had a transparent ball that lit up when you bounced it. Inside it had a tall thin stiff spring, and inside the spring was a metal rod. When the ball bounced, the spring moved to contact the rod and completed the circuit. I could probably create something like it but would rather buy a commercial version. Googling has not helped me even find a matching picture.</p>
| I need the name of an electrical spring switch with a thin rod inside that completes a circuit upon impact | 2024-01-19T03:40:11.703 |
698164 | |solar-cell|solar-energy| | <p>This is no different from ICs that may have a P-doped or N-doped bulk substrate. No matter which way the substrate is doped, you can add other layers of doping locally to create diodes, transistors, FET channels, and wires. The solar panels probably have a very different doling strength for the substrate than a typical bipolar IC, but someone who knows the process better could say more about that.</p>
| <p>I am very confused by these two videos.</p>
<p><a href="https://www.youtube.com/watch?v=xKxrkht7CpY" rel="nofollow noreferrer">This video mentions at 1 minute onwards</a> that a solar cell has a PN junction.</p>
<p><a href="https://www.youtube.com/watch?v=K6KQiFctHmQ" rel="nofollow noreferrer">This video mentions</a> N type solar panels and P type solar panels.</p>
<p>From that what I am able to understand, N type solar panels do not have a PN junction. It only has N type material while P type solar panels does not have a PN junction and it only has P type material.</p>
<p>From the first video, I understood that each and every solar panel has a PN junction.</p>
| Confusion regarding solar cells | 2024-01-19T07:02:04.740 |
698165 | |capacitor|markings| | <p>The short answer is "no".</p>
<p>Generally, electrolytic capacitors with non-solid (liquid) electrolytes (e.g. aluminium polymer) have their negative lead marked whilst ones with solid electrolytes have their positive lead marked <em>(That's a difference, but can be a long-time tradition, I' don't know)</em>. But note that marking has nothing to do with having solid or liquid electrolyte i.e. it's not a strict requirement or a physical limitation to put the mark on the negative just because the electrolyte is liquid.</p>
<p>Electrolytic capacitors with solid electrolytes (e.g. tantalum) are more sensitive to surges/spikes due to their electron conductivity <em>(aluminium electrolytic capacitors generally withstand twice the rated voltage for a few seconds but tantalums don't, for example)</em>. It might make some sense to differentiate these with a marked positive terminal instead of negative.</p>
| <p>What I am <em>not</em> asking is what capacitor polarization means, or how to apply it in circuits.</p>
<p>Is there any physical significance to whether a capacitor uses its positive or negative leads to mark its polarity? Prompted by Andy aka's comment on <a href="https://electronics.stackexchange.com/a/255596/362218">this answer</a>.</p>
| Capacitor polarity marker significance | 2024-01-19T07:48:26.433 |
698171 | |led-driver|voltage-measurement|constant-current| | <p><a href="https://i.stack.imgur.com/fRCdc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/fRCdc.png" alt="enter image description here" /></a></p>
<p>This means this driver will output 350mA constant current, within an output voltage range of 40-58V.</p>
<p>So you can use it for a series string of LEDs that has a total forward voltage of 40-58V at 350mA. For example 16 white LEDs in series.</p>
<p>When there is no load (or just a multimeter) it will hit its max output voltage.</p>
<blockquote>
<p>If I ... lower or raise the input voltage (100-230V), the output voltage remains constant at 56V.</p>
</blockquote>
<p>The driver is supposed to keep its output constant in spite of input voltage variations. That avoids light flickering.</p>
| <p>If I attach a voltmeter to the output of this constant current driver and lower or raise the input voltage (100-230V,) the output voltage remains constant at 56V. Should it not fluctuate between 40-58V?</p>
<p><a href="https://i.stack.imgur.com/93uTQ.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/93uTQ.jpg" alt="enter image description here" /></a></p>
| Output voltage not changing with a constant current driver | 2024-01-19T08:40:39.743 |
698175 | |control-system|transfer-function|heat|pid-controller|non-linear| | <p>There are several ways to handle the non-linearity implied by the power being proportional to V<sup>2</sup>.</p>
<ul>
<li>Linearise around an operating point. For small disturbances, power will be roughly proportional to voltage. However, this solves the problem only in the region of that particular point. This is a well used approach, often used to get a g<sub>m</sub> figure for bipolar transistors at a particular bias point. However, you still need to make sure the system is stable at all heating levels, you will be powering on with the system cold, see the next point.</li>
<li>Make the system stable at a range of gains. If you want the system to operate with the different gains you get from operating at high or low voltage, then you need to be very generous with your gain and phase margins, and tolerant of slower than ideal settling times over a range of settings. This can be very easy to do if you use Bode plots for design, you simply move the low-pass elements up, and the high-pass ones down in frequency, to give you an extended 6dB slope region in the middle. Aim for over-damping. With a heating system, depending on the tolerance of your load to an over-heat (for instance biological samples or soft plastics), you must have no possibility of an overshoot.</li>
<li>As you have a heater, lose the buck converter, use simpler PWM, and now you have a linear transfer function between PWM setting and heater output power (power = full_power * PWM_fraction). Take advantage of the fact that a heater time constant will be seconds to 10s of seconds, so the PWM can be very slow. My oven controller uses a 20 seconds PWM period. I had a precision lab hotplate that managed quite happily with a two seconds period.</li>
</ul>
| <p>I wanted to design a small temperature-regulated DC heater for the sake of educational purposes in the field of control theory.</p>
<p>The idea is to heat up a resistive element through a buck converter of some sorts and to regulate that with a control loop involving a PID controller for the controller and a linearized thermistor for the feedback, like pictured in the following block diagram:</p>
<p><a href="https://i.stack.imgur.com/5ECHM.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5ECHM.png" alt="enter image description here" /></a></p>
<p>I naturally wanted to first analytically find the transfer function of that heating system which incorporates both electrical and thermal equations, the schematic of the system I came up with looks like the following:</p>
<p><a href="https://i.stack.imgur.com/RoVgB.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RoVgB.png" alt="enter image description here" /></a></p>
<p>Please note that for the sake of simplicity:</p>
<ol>
<li>I am oversimplifying the electrical side, "ControlledVoltage" should eventually be driven by a buck converter but as this isn't related to my current issue I'll assume that it is directly proportional to the output voltage of the PID controller ("Vpid").</li>
<li>For the thermal side I'm using the thermal-electrical analogy to model the thermal behavior of the heating system through an electrical circuit</li>
</ol>
<p>So, it should be easy to find the transfer function of the thermal side as it's nothing more than an equivalent RC circuit with the thermal flux ϕ as an input and the temperature of the heating system as an output.</p>
<p><strong>However</strong>, when attempting to find the transfer function of the electrical side with the controlled voltage as an input and the dissipated power in the resistor as an output, I obviously find:</p>
<p><span class="math-container">$$P = \frac{V^2}{R}$$</span></p>
<p>Which is a non-linear equation, which is also a huge problem since transfer functions are by definition <strong>linear</strong> time-invariant systems, meaning that I cannot use this equation to model my transfer function or that I need to find some way around it.</p>
<p>So my question might appear obvious now, <strong>how can I find the transfer function of my system?</strong> I am obviously not the first person in the world to attempt to design a regulated DC heater and as such probably also not the first one to stumble across this issue, is there some tricks to linearize the system, some equations I missed, something I simply didn't understand about transfer functions, or maybe an entirely different design philosophy I missed?</p>
<p>Please note that I am aware that I could build the system, find the impulse response experimentally, curve-fit it and eventually find the transfer function. But again, I'm doing this little project for educational purposes and I would greatly appreciate finding the transfer function analytically.</p>
<p>Any help would be greatly appreciated.</p>
| Transfer function of a heating system | 2024-01-19T09:16:39.743 |
698177 | |integrated-circuit|components|manufacturing|replacement| | <p>Offhand, two reasons spring to mind.</p>
<p>Firstly, you certify that your circuit works with specific components. If components are EoL'd and replacements are developed, then you need to re-test and re-recertify.
The IC company faking the names to pretend to be the same when they are not, would cause a serious problem, because you would not know if the ICs you were using were the ones you had tested and certified against, or merely some "pin-for-pin replacement".</p>
<p>Secondly, fake ICs are a major problem nowadays.</p>
<p>A fake IC is often a pin-for-pin replacement, but manufactured with far poorer tolerances, and far more cheaply, to pretend to be the original. If there are two lines which make equivalent chips, and you went with the pricier one, odds are good you had a reason. You wouldn't want to be sold one of the cheaper line, with the badge of the pricier one.</p>
<p>So you want to be able to identify these potential failures before you have to put out a massive recall of all your devices.</p>
<p>Back around 20 years ago, I worked for the company which still (so far as I know) makes the leading counterfeit IC detector, which works by taking the V/I curves between each of the pins, and saving this as a pin signature.</p>
<p>The idea is that even some untrained grunt in your goods inwards dept can slap the chip on the tester, get a green or a red, and pass or fail it.</p>
<p>So if your grunt slaps the IC in, selects "TI 123456-A" in the IC dropdown, but what he's been given is actually a "pin-to-pin perfect replacement" by some other company, branded as the "TI 123456-A", then the detector will show up red. It's not the same chip. It has the same specs, but it's made on a different die, and it's got a different pin signature. It <em>might</em> perform the same, but it's a fake.</p>
<p>Another thing that can happen is that what you ordered was a TI 123456-A, and what you got was a TI 123456-C. Then if both signatures exist in its DB, the detector can pop up saying that's what you got with a high certainty, and you can decide to keep and use the part, or you can send it back to your supplier and say "we invested a lot of money testing and certifying this equipment with the -A, we ordered the -A, so don't screw us around and give us the -C."</p>
<p>You wouldn't have that ability if they were both called "TI 123456-A".</p>
| <p>I am not sure if this is the relevant place to ask this (I think it is.)</p>
<p>I am still relatively new to the electronic design world, but I notice that a series of parts (example - Torex XCLxxx) can feature ICs whose specifications can be 90% identical.</p>
<p>This is understandable, but I recently had to replace an IC which was discontinued. Apparently, a year or so later, the same manufacturer (not sure if I'm allowed to mention specifics,) releases a 'new' component, which conveniently can be a pin-to-pin perfect replacement for the discontinued one. After looking into the datasheet of this 'new' component and meticulously comparing it with the other one, the only differences I can find are an 0.04 mm increase in height and a slight difference of some internal resistances.</p>
<p>Now it seems to me that it would be much easier to just redefine the old datasheet and continue selling the 'new' component under the old name without announcing its discontinuing (and save clients the hassle of searching for replacements.) Is this a common ocurrence? Does it have some sort of strategic benefit?</p>
| Why do manufacturers label differently seemingly identical components? | 2024-01-19T09:22:41.523 |
698189 | |current|antenna|impedance|transmission-line|balun| | <blockquote>
<p>My question is if the above is true where does that reflected current on the shield now go?</p>
</blockquote>
<p>The outer surface of the outer conductor acts like an antenna. You will notice that in an antenna, for example a dipole, the current is not the same everywhere. This seemingly violates Kirchhoff's Current Law, which might be reworded to state that the current into a volume is the same the current out of that volume.</p>
<p>This conundrum was solved by Maxwell, who introduced the concept of displacement current. The current we are first made aware of when we learn electronics is conduction current -- i.e. the movement of charges. Maxwell realized that this current was not the whole story, and there was something else, that behaved like conduction current (for example it causes magnetic fields) but was not conduction current. He called this <em>displacement</em> current (although he used the same name for a slightly different concept earlier). The displacement current density at a point is equal to the rate of change in the electric field at that point. (May seem odd, but it solves what are otherwise problems).</p>
<p>In a (for example, dipole) antenna, charges flow down a conductor, but because the conductor does not form a complete circuit, the charges accumulate as they approach the end of the conductor. This accumulation of charges causes a change in electric field. The conduction current decreases from the center of a dipole antenna to the end, but at the same time, the displacement current increases. When the two types of current are added together, Kirchhoff's Current Law (KCL) is preserved. The algebraic sum of all the current (both kinds) flowing into a fixed volume is 0.</p>
<p>The same thing happens in the antenna formed by the outer surface of the outer conductor of a coaxial cable that connects a transmitter to a dipole without a balun. At the transmitter end of the coax, the conduction current on the inner conductor is equal but opposite to the conduction current on the outer conductor. However, at the connection to the antenna, the conduction current in the outer conductor has a different magnitude from conduction current in the inner conductor. Where did that current go?</p>
<p>The answer is that electrons accumulate and then rarify on the surface of the outer conductor. This constitutes displacement current. The conduction current on the outer surface of outer conductor "stalls" and becomes displacement current, exactly as the conduction current in a dipole antenna "stalls" and becomes displacement current.</p>
<p>Knowing of the existence of displacement current is essential to an understanding of antennas in a way that does not conflict with other known laws of electricity.</p>
<blockquote>
<p>I guess this [difference in currents] is only caused by imperfect dipole design or where there is a difference in a multitude of things that mean the two are not equally opposite</p>
</blockquote>
<p>No. The problem of currents on the outer surface of the outer conductor of a coaxial cable is not (necessarily) the result of imperfections in the balance of the dipole antenna. It is the result of connecting an unbalanced transmission line (the coaxial cable) to the (otherwise) balanced load.</p>
<p>The outer surface of the outer conductor of the coax acts like an independent conductor. It is as if one hung a wire physically parallel to the coax, but electrically parallel to one of the arms of the antenna.</p>
<p><img src="https://i.stack.imgur.com/liAbE.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fliAbE.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>In the diagram, since it is free to do so, the current splits between the right-hand arm of the antenna, and the outer surface of the outer conductor of the coax. Instead of a simple dipole, you essentially have an antenna with three arms, connected in an asymmetric fashion.</p>
| <p>My current understanding: The line in the center of the coax and the <em>inner</em> side of the shield are the current paths, as in the signal/field propagates between these two, <em>(i can't therefore imagine it matters if the outer shield connection is grounded or whatever since I would assume its sort of a faraday cage assuming the skin depth is not significant)</em>. Anyway for this I would strongly guess the currents must be the same and opposing in the shield and center piece so no fields escape, <em>image below shows my understanding</em>...</p>
<p><a href="https://i.stack.imgur.com/hrOAU.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hrOAU.jpg" alt="Coax field propagation" /></a></p>
<p>Now when attaching a dipole, if theoretically it was perfect, I would assume the voltage is just 180 out of phase of the other pole; now connecting one pole to the shield -in my eyes- doesn't cause any problems since its just equally opposed by the center fed pole in a way it can pass in the coax. I've looked online and despite many different answers, one said its the difference in the currents that end up flowing on the outer side of the shield, I guess this is only caused by imperfect dipole design or where there is a difference in a multitude of things that mean the two are not equally opposite, now if this is true I see a choke balun can be used to create a high impedance on the outer shield...</p>
<p>My question is <em>if the above is true</em> where does that reflected current on the shield now go? I can't see it been shoved in the inner shield because again there would be different current in the center and shield.</p>
| What actually causes the need for a balun on a dipole fed to coax | 2024-01-19T12:21:32.497 |
698191 | |power|pcb-design|emc|high-current|routing| | <p>When you say "strengthen the power" I assume you mean that you want to reduce losses/heating. Running parallel traces on other layers is a common method to achieve that. You should have no EMC/EMI trouble because of this as long as you are not routing signal traces between the high current traces on additional layers or cutting up a ground plane or something which it doesn't look like you are doing. As always, keep an eye on your spacings with high voltage.</p>
<p>Edit to answer specifics added to questions: This will be good/have a positive effect on inrush current handling capability. The parallel traces will reduce resistance so it can handle inrush current better. Actual inrush current might actually go up a negligible amount because of the reduced resistance but the other parts of the circuit that determine inrush current will have a much larger impact so don't worry about this. Inrush current handling will get better. Actual inrush current will effectively stay the same. If you want to reduce inrush current you will need to do that another way.</p>
| <p><a href="https://i.stack.imgur.com/vBnMQ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/vBnMQ.png" alt="enter image description here" /></a>I have a high-current 220-volt AC power trace on my PCB. for this inrush power of want to use this trace parallel to each other.</p>
<ol>
<li>I want to know this way have positive effect?</li>
<li>Do this parallel trace reduce to resistance?</li>
<li>Does the inrush current situation get better?</li>
</ol>
<p><a href="https://i.stack.imgur.com/6gVXM.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6gVXM.png" alt="both trace have one net" /></a></p>
<p>Is there any problem with using parallel traces in several layers to strengthen the power signal? They are relay contacts.</p>
| Is there any problem (EMC/EMI) with routing in parallel on several layer for better performance? | 2024-01-19T12:30:46.287 |
698199 | |stm32|usb|crystal|bootloader| | <p>The crystal used is 8 MHz, has load capacitance requirement of 18pF and it has a maximum of 140 ohms ESR.</p>
<p>The circuit is correct as drawn, with the exception of the capacitor values which you are already aware of.</p>
<p>The PCB design looks OK, it should just work, there might be some room for improvement at least if you look at crystal design appnotes, but on average, this design does not seem in any way alarming.</p>
<p>Using the crystal and the oscillator parameters in the data sheets, you can calculate that the gain margin for proper oscillation is barely above the minimum safe value of 5, so not a good choise for the crystal to begin with.</p>
<p>Also the original 15pF caps were too small provided only 7.5pF of load capacitance, and even by taking into account for some stray capacitances, that will be far less than the required rated load of 18pF. Without further crystal parameters like the motional capacitance, the pullability cannot be used to estimate how much capacitance there was based on frequency deviation from nominal.</p>
<p>The next problem is that STM32F4 datasheet suggests having the capacitors typically in the 5 to 25 pF range, so the selection of 27 pF caps exceeds the recommendations.</p>
<p>So that crystal is not a good choise because it has too large capacitance and too large ESR so it is barely above the margin of safety for oscillation and it takes longer to start up.</p>
<p>Crystals with lower load capacitance and lower ESR start up faster.</p>
<p>So due to the two STM32 factory bootloader versions having different crystal startup time requirements, the crystal does not start fast enough for both factory bootloaders.</p>
<p>As a final note, different size crystals have different ESR, so if you go to a slightly larger package, you may find more suitable crystals with lower ESR.</p>
<p>Another option could be to use higher frequency crystal, as they have lower ESR and higher frequency means thr crystal will start faster. Higher frequency does reduce gain margin but lower ESR compensates it. Looking at the data sheet, a 12 MHz 18pF crystal has 60 ohms ESR so gain marging is marginally larger. Anyway a crystal with less loading capacitance is better.</p>
<p>ESR has only 1st order effect, but frequency and load capacitance have a cubic effect.</p>
<p>ESR can also be too low and the crystal may be driven with too much power. It can be compensated with series resistor, which unfortunately the design does not have.</p>
| <p>I have a problem with a custom STM32F417 board. On some boards the DFU bootloader works fine, while on other ones it fails to connect by USB. In my custom firmware all boards connect fine by USB.</p>
<ul>
<li>Working boards have STM32F417ZET6, revision 2, date code week 11 / 2023</li>
<li>Not working boards have STM32F417ZET6, revision 4, date code week 4 / 2021</li>
</ul>
<p><a href="https://i.stack.imgur.com/xJRLH.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xJRLH.png" alt="STM32 chip codes" /></a></p>
<p>This seems weird, why is the later manufactured part of earlier revision?</p>
<p>The issue seems to be related to the clock crystal.
I have external 8 MHz 18 pF crystal <a href="https://abracon.com/Resonators/ABM3.pdf" rel="nofollow noreferrer">ABM3-8.000MHZ-B4Y-T</a>, Digikey part <a href="https://www.digikey.fi/en/products/detail/abracon-llc/ABM3-8-000MHZ-B4Y-T/6150906" rel="nofollow noreferrer">535-13567-1-ND</a>. Originally the board had 15 pF load capacitors, but that resulted in the clock running too fast. At this point, the bootloader was working unreliably. Switching to 27 pF load capacitors fixed the frequency but stopped bootloader from working at all.</p>
<p>Crystal schematic and layout is very basic. The PCB is four layers, with ground plane next to the top layer where the crystal is.</p>
<p><a href="https://i.stack.imgur.com/LkTd8.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/LkTd8.png" alt="Schematic and layout" /></a></p>
<p>On working board, the bootloader startup looks like this (blue = VDD, yellow = PH1/Xout):</p>
<p><a href="https://i.stack.imgur.com/yVw8g.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yVw8gm.png" alt="Working board bootloader start scope screenshot" /></a></p>
<p>On not-working board, same measurement of bootloader:</p>
<p><a href="https://i.stack.imgur.com/7oabF.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/7oabFm.png" alt="Not working board bootloader start scope screenshot" /></a></p>
<p>So the crystal is not starting. But in my own application firmware, HSE works fine:</p>
<p><a href="https://i.stack.imgur.com/bx40c.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bx40cm.png" alt="Not working board, own firmware start" /></a></p>
<p><strong>Why does the STM32 built-in ROM DFU bootloader fail to start the crystal?</strong></p>
| STM32F417 DFU bootloader fails to start HSE crystal | 2024-01-19T13:07:01.017 |
698212 | |verilog|system-verilog| | <p>The current 1800-2017 section 22.6 specifies <code> `ifdef</code> to work based on the existence of macro definition</p>
<blockquote>
<p>When an <code> `ifdef</code> is encountered, the <code> `ifdef</code> text_macro_identifier is tested to see whether it is defined as a text macro name using <code> `define</code> within the SystemVerilog source description.</p>
</blockquote>
<p>It does not look at the value of the definition, just its existence. The 1800-2023 LRM has an enhancement to create a Boolean expression of a combination of existences , like</p>
<pre><code>`ifdef (example_def0 && example_def1)
</code></pre>
<p>but that still does not look at the <em>contents</em> of the definitions, just their existence.</p>
<p>The LRM says that a newline character not preceded by a backslash shall end the macro text. There's nothing that says the macros text must contain at least one character. Perhaps it should call that "empty" text as it does for macro arguments.</p>
<p>BTW, these compiler guards around packages aren't necessary like they are in C/C++ if you have properly set up your compilation scripts. They are useful around other <code> `define</code> files which are global to the compilation unit.</p>
| <p>The text I am reading (Stuart Sutherland's text on SystemVerilog for Simulation and Synthesis) gives the following snippet which apparently should be used in order to avoid including the same package multiple times in the same compilation:</p>
<p><a href="https://i.stack.imgur.com/oW5p3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oW5p3.png" alt="enter image description here" /></a></p>
<p>I am a bit confused about the preprocessor statement:</p>
<p><code>`define DEFINITIONS_PKG_ALREADY_COMPILED</code></p>
<p>as, from other languages, I was expecting to see something more like:</p>
<p><code>`define DEFINITIONS_PKG_ALREADY_COMPILED 1</code></p>
<p>in order to actually "set" the flag. Is this an error in the text or just a shortcut based on the preprocessing inferring a true flag here?</p>
| How does this SystemVerilog compiler directive work? | 2024-01-19T15:14:30.333 |
698213 | |heat|thermal|heatsink|conductivity| | <p>The unqualified 1600 W/(m⋅K) number is a bit of advertising sleight of hand since that number is the in-plane (XY) value. Pyrolytic graphite is, on the microscopic level, sheets of carbon atoms that are weakly bonded to each other (sheet-to-sheet). The carbon bonds are very effective at transferring heat (see the thermal conductivity of diamond) but PGS is <em>highly</em> anisotropic and the Z-plane conductivity is probably an order of magnitude less, which makes it useful for heat spreader applications but not especially good for thermal interfacing. For example, in <a href="https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/1294/EYG_PGS_RevDec_2011.pdf" rel="noreferrer">this datasheet</a>, Panasonic does not even tell you the Z-plane (or C-plane, as they call it) conductivity because it's that's not why you pick PGS. This <a href="https://industrial.panasonic.com/cdbs/www-data/pdf/AYA0000/AYA0000C50.pdf" rel="noreferrer">other datasheet</a> for a PGS <em>interface material</em> gives Z-plane conductivities of 28 W/(m⋅K). At 50% compression, it's thicker than a good or even adequate thermal paste application so you're still choosing it mainly for heat spreading. We tried using PGS sheets for an application that had a small heat-generating area on a relatively enormous heatsink to try to spread the heat out a bit but any benefit was negated by the extra thermal interface it created.</p>
<p>Edit: the 1600 number is a lot of sleight of hand; note that the <a href="https://docs.rs-online.com/37e0/A700000009105340.pdf" rel="noreferrer">RS datasheet</a> makes no mention of anisotropy or Z-plane conductivity being less than that of the XY-plane and just gives a single number for thermal conductivity which is, in my opinion, extraordinarily negligent if not intentionally misleading.</p>
<p>Thermal paste, on the other hand, is made of a thermally conductive material - boron nitride is a common choice - in a carrier vehicle. The heat needs to go through both the particles and the relatively unconductive carrier so even though the particles themselves can be highly conductive the overall value is fairly low. The advantage being that the paste can squeeze into and fill the microscopic pits and scratches in the materials being joined and provide the greatest surface for heat transfer, something a PGS sheet cannot do well. Properly applied, the bond line should be a few dozen microns so even your 0.65 W/(m⋅K) paste (and, as others have mentioned, there are better products out there) is going to be a negligible contribution compared to your heatsink resistance to ambient.</p>
| <p>I am comparing different thermal conductivities in the market and found that the thermal conductivity goes up to 1600W/m·K for a thermal sheet, but a thermal paste is still 0.65 W/m·K.</p>
<p>Does it make a difference to use either? How are they calculated and tested?</p>
<p>Just out of curiosity, I purchased both products and used them between a CPU and heatsink. I compared the temperature difference between the CPU and heatsink using a thermal probe.</p>
<p>As you would probably guess, the graphite sheet performed terribly and caused the CPU to overheat.</p>
<p><a href="https://i.stack.imgur.com/LQXDc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/LQXDc.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/7zbq5.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/7zbq5.png" alt="enter image description here" /></a></p>
| Thermal conductivity of 1600W/m·K? | 2024-01-19T15:15:14.710 |
698225 | |mosfet| | <p>Your schematic shows a 0.7 V signal (across D5) amplified by 100 in a linear amplifier.</p>
<p>A 3.3 V opamp cannot produce a 70 V output signal. What is it you are trying to achieve? If the goal is a 3.3 V square wave, that can be done by replacing D5 with a simple 3.3 V zener diode, eliminating the opamp, all of its surrounding components, and D3.</p>
| <p>I have a PCB as shown in the schematic.</p>
<p>Looking at only one of the dual MOSFET ICs, I apply 3.3V to MOSFET2 and MOSFET1, which should turn off MOSFET1 (because P-channel) and turn on MOSFET2 (because N-channel.) What happens is that both MOSFETs are on, even though the P-channel one should be off, so there is a short circuit. My power supply starts limiting the current and the IC gets hot. This shouldn't happen in my opinion. The gate signal is from STM32 GPIO pins.</p>
<p>I don't really understand the Vgs voltage in the P-channel part of the datasheet. If I had -3.0V Vgs and the source is at 38V, I would need 35V at the gate, which defeats the purpose of driving high currents & voltages with low voltages at the gate. Please help me understand why the P-channel MOSFET is not going off.</p>
<p><a href="https://i.stack.imgur.com/c94ux.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/c94ux.png" alt="schematic" /></a></p>
| Dual MOSFET short circuit | 2024-01-19T16:17:14.040 |
698240 | |solid-state-relay| | <p>Try reading measuring it with a load connected and see what you get. SSR's don't isolate (disconnect) the output, rather, they are in "high-impedance" state when they are off. Your DMM has such a high input impedance that it will be able to measure the potential from the other load terminal. This is all in contrast to an electromechanical "clicky" relay where off truly means disconnected or "open".</p>
| <p>I have an SSR relay ( FOTEK SSR-25 DA ), it has load terminals marked (1) and (2).</p>
<p>In normal "open" position there's no connectivity between 1 and 2 - no current whatsoever.</p>
<p>The moment I apply 120VAC to the terminal 1 - I can immediately see that there's 120VAC on terminal 2, in the "open" position ( still no connectivity - I test with a multimeter ).</p>
<p>I reviewed a few manuals like <a href="https://www.ia.omron.com/data_pdf/guide/18/ssr_tg_e_9_2.pdf" rel="nofollow noreferrer">https://www.ia.omron.com/data_pdf/guide/18/ssr_tg_e_9_2.pdf</a> - yet I don't see how "2" can possibly get any voltage there from "1".</p>
<p>Is that relay defective or am I missing something?</p>
| Voltage detected on output SSR while in "OPEN" state | 2024-01-19T20:11:59.563 |
698244 | |clock|encoder|data| | <p>The host could be a microcontroller with SPI interface that works with 8-bit bytes, and therefore the transmission may not be continuous. Some 8-bit AVR MCUs had an SPI interface which basically needed one bit time between bytes so it was impossible to transfer with continuous clock on that MCU.</p>
<p>The gap between clocks is not long enough to trigger a timeout so the transmission continues after the pause. The gap needs to be about 20 microseconds for the timeout and these gaps are far below it.</p>
| <p>I measured the following clock and data sequence (time axis is in microseconds) between a Beckhoff KL5001 encoder module and a 19-bit SSI encoder. Apparently the clock is interrupted 3 times before stopping finally.</p>
<p>I was not able to find more detailed description of such clock interruptions than e.g. this one: "A running transmission can be interrupted at any time by just stopping the clock."</p>
<p>It is not clear for me whether the data transmission should continue or start over. Looking at the data, the signal does not seem to start over. Any thoughts?</p>
<p><a href="https://i.stack.imgur.com/x83D8.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/x83D8.png" alt="enter image description here" /></a></p>
| Interrupted SSI clock sequence | 2024-01-19T20:40:34.117 |
698249 | |circuit-analysis|resistors|voltage-measurement| | <p>First, take note of the oscilloscope's input impedance. It will be important later.</p>
<p><a href="https://i.stack.imgur.com/5sl0d.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5sl0d.jpg" alt="enter image description here" /></a></p>
<p><em>Figure 1. The 'scope's input impedance is 1 MΩ.</em></p>
<p>Now let's look at your circuit.</p>
<p><img src="https://i.stack.imgur.com/yTW5S.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fyTW5S.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p><em>Figure 2. The equivalent circuit showing loading by the oscilloscope probes.</em></p>
<p>The CH2 input won't cause any loading because the output impedance of the signal generator is very low in comparison and, as a result, the voltage won't be pulled down.</p>
<p>The CH1 input is in parallel with RM and since they are both 1 MΩ the effective resistance at that point in the circuit is 500 kΩ. Therefore you can expect the 'scope CH1 to read a little less than half of the CH2 reading.</p>
<hr />
<p>We can make analysis a little easier by using a 1 V DC source.</p>
<p><img src="https://i.stack.imgur.com/hK65G.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fhK65G.png">simulate this circuit</a></sup></p>
<p><em>Figure 3. Voltage measurement with a 1 GΩ voltmeter.</em></p>
<p>Note the voltmeters have negligible effect on the circuit so the voltages measured are those that would exist if the meters were removed. Note that the voltage at the junction of the resistors is about 2/3 of the supply, as expected.</p>
<p><img src="https://i.stack.imgur.com/sHvam.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fsHvam.png">simulate this circuit</a></sup></p>
<p><em>Figure 4. Voltage measurement with oscilloscope connected.</em></p>
<p>Here we can see that CH2 doesn't load the voltage source. It's reading 1 V.</p>
<p>Meanwhile the resistance at the lower part of the resistor divider has been halved by the addition of the 1 MΩ scope input in parallel with RM. Now we've got 510 kΩ on top and 500 kΩ on the bottom so the voltmeter reads a little less than half of the supply voltage.</p>
| <p>I recently measured some voltages across two resistors as you can see in the images below.</p>
<p>I used a triangle wave as voltage source and measured the voltages across the resistors with an oscilloscope.</p>
<p>The top one is the theoretical circuit and below the one I built as an experiment.</p>
<p><a href="https://i.stack.imgur.com/LKS65.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/LKS65.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/hgcFT.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hgcFT.jpg" alt="enter image description here" /></a></p>
<p>How do I get the proper voltage across and current flowing through my measuring resistor RM that is about 1 MΩ in the experiment?</p>
<p>In theory CH1 shows the voltage across RM and by measuring the voltage across my testing resistor RT on CH2 I can get the current via I = U/RT. Is this correct?</p>
<p>But when calculating the resistance of RM via RM = U/I, I don't get the indicated value.</p>
| How to extract voltage and current from this real-life circuit (with resistors) | 2024-01-19T21:43:40.357 |
698259 | |microcontroller|mosfet|transformer|mosfet-driver| | <p>Center tapped transformers (or any transformers (or any components)) don't care about single pins. What matters is the voltage across each coil (which has two pins) and the current through each coil. A center-tapped coil is the same as two coils connected together in the middle.</p>
<p>The way you're using the center-tapped coil makes an <a href="https://en.wikipedia.org/wiki/Autotransformer" rel="nofollow noreferrer">autotransformer</a> configuration. It saves wire compared to a two-coil transformer, but doesn't provide isolation. Image from Wikipedia:</p>
<p><img src="https://upload.wikimedia.org/wikipedia/commons/c/c5/Tapped_autotransformer.svg" alt="autotransformer schematic" /></p>
<p>It works just how you'd expect a transformer to work - the voltage ratio is the turns ratio. At least, it does for sine-wave AC. Passing a square wave through a transformer distorts the wave, but you probably already know that and don't care.</p>
<p>You're using the transformer for two transformations at once - the left side as an autotransformer and the right side as a normal transformer. If this works for you, then great. You found a trick to do something with less parts. Congratulations.</p>
| <p>I am trying to drive both a high-side and a low-side MOSFET as part of an H-Bridge circuit and had the idea to gang both MOSFETs with the same input. My idea was if I drive one side of a center-tapped transformer the other side being magnetically coupled to the first half of the primary would act like a step-up transformer and the other side would be in phase and have a magnitude of 2x the input single.</p>
<p><a href="https://i.stack.imgur.com/kCh8A.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kCh8A.png" alt="simulation" /></a></p>
<p>the signal represents a pulsed DC square wave generated by a digital pin of a microcontroller. Are center-tapped transformers supposed to work like this? Is this a valid method to drive a MOSFET H-Bridge? am I risking sending too much voltage into the gate pins? is this even a good idea?</p>
<p><a href="https://i.stack.imgur.com/B8q41.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/B8q41.png" alt="enter image description here" /></a></p>
| What happens when I drive a signal into the center tap of a center tapped transformer? | 2024-01-20T01:23:49.737 |
698264 | |microcontroller|circuit-design|analog|adc| | <p>Let's assume that the input voltage scales with the supply voltage, i.e. that the source of the input voltage is powered by the same 3.3V supply as the MCU is.</p>
<p>Since the useful input voltage range is close to the top rail, just amplify it with reference to that rail. The op-amp needs to have input common mode that includes the top rail, and "soft" rail-to-rail output range - within about 0.1V of either supply, so as not to split hairs. Most any "rail-to-rail output" op-amp will fit the bill here.</p>
<p><img src="https://i.stack.imgur.com/Ia8KJ.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fIa8KJ.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p><code>Vin</code> is the +/-200mV signal on top of the 3V DC baseline.</p>
<p>The Vin-to-out transfer function is:</p>
<p><a href="https://i.stack.imgur.com/hc41R.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hc41R.png" alt="A linear transfer function with endpoint coordinates of approximately (-0.22V,0.2V) and (0.22V,2.8V)." /></a></p>
<p>While the output doesn't occupy the whole 0..3.3V ADC range, in most cases it'd be unrealistic <em>anyway</em> since you're not using 0% tolerance resistors, the op-amp doesn't have zero offset voltage, and the sensor/input source isn't perfect either, the ADC may have poor linearity very close to the rails, and all of these nonidealities are temperature-dependent to varying extent.</p>
<p>So, if I was asked to design such a mapping circuit, I'd do it as above. If the slightly larger output range is needed to get sufficient resolution from the ADC, it's the wrong ADC for the job anyway. Note that <em>sufficient</em> resolution doesn't imply <em>full span of the ADC</em>.</p>
<p>You start with a resolution and accuracy specification driven by the application needs. That spec has nothing to do with implementation details. Only then you start looking at "what parts would fit the bill", and <em>nowhere</em> is there an implication that every last bit of the ADCs range has to be utilized.</p>
<p><sub>Note that mediocre textbooks have a tendency to oversimplify things without making it clear that nobody designs practical circuits the way the textbook implies. In this case, bothering with an "exact" mapping is not worth it, since the result you get is not practical and won't work exactly as the simplified textbook analysis would indicate. So, if your demand for "exact mapping" is textbook-driven, that textbook has failed at its job.</sub></p>
| <p>I want to measure a small positive analog voltage, 3v +/- 200mv with the ADC of a microcontroller.<br />
The ADC measures voltages between 0 and 3.3V, so ideally I would like the voltage I am measuring to be mapped to that range.</p>
<p>I was able to find this post, which basically contains the same question as mine, but the math in the accepted answer is badly formatted and I was not able to deduce what to calculate to work out the resistor values I need:</p>
<p><a href="https://electronics.stackexchange.com/questions/642578/how-do-i-scale-and-offset-an-input-to-an-adc">How do I scale and offset an input to an ADC?</a></p>
<p>So my question is basically: How do I calculate the R1, R2 and R3 values in the linked post?</p>
| Scale and shift small positive analog voltage range for ADC input | 2024-01-20T03:35:46.927 |
698268 | |power-electronics| | <p>This is an interesting approach.</p>
<p>I tried to implement a simplified square wave version in the simulator. For the demonstarion, a slow 1 kHz generator V2 controls the rectification direction of the secondary side of the main transformer XFMR3. To feed the grid, one would use 50 or 60 Hz here, sync to the grid.</p>
<p>In a real world circuit the primary voltage would be modulated with a sine wave amplitude of the same frequency and phase as V2 to avoid the large currents during polarity change, that we see here. The modulation would produce a proper output power factor.</p>
<p>C1 and C2 filter out the "high" switching frequency of V1, they are not DC bulk capacitors.</p>
<p>R1 is just an output load.</p>
<p>Please excuse the use of so many transformers and weird switches here, I just had no better idea at the moment.</p>
<p><img src="https://i.stack.imgur.com/wlOZX.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fwlOZX.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
| <p>Can anyone explain how this topology works and/or point me to any literature where it is discussed?</p>
<p><a href="https://i.stack.imgur.com/ZtqJ4.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ZtqJ4.png" alt="PV Microinverter Topology" /></a></p>
<p>I've found Microchip's application notes on single stage interleaved flybacks with <a href="https://ww1.microchip.com/downloads/en/AppNotes/01338B.pdf" rel="nofollow noreferrer">SCR</a> or <a href="https://ww1.microchip.com/downloads/en/DeviceDoc/01444b.pdf" rel="nofollow noreferrer">MOSFET</a> unfolding bridges and have a pretty good understanding of those. My best guess is this is also a single stage inverter (boost and dc to ac inversion is happening with the full bridge and transformer). I assume a full bridge is used for good transformer utilization while keeping device voltage ratings low. I'm having trouble though understanding how what I assume would be chopped up AC gets coupled to the grid through the dual MOSFET and capacitor bridge.</p>
<p><a href="https://www.researchgate.net/publication/253983571_Inverter_topologies_and_control_structure_in_photovoltaic_applications_A_review" rel="nofollow noreferrer">This</a> paper shows something similar (full dual switch bridge instead of caps on bottom) in section III C but I haven't tracked down the references where it is discussed (yet) to see if they could fill in the gaps for me.</p>
<p>Image created by me based off of a tear down of a broken unit. Note there are some x caps and common mode chokes between the output dual switch/cap circuit and ac connection not detailed here which I assume isn't meaningful for the topology and only for EMC.</p>
<p>Lots of assumptions.</p>
<p>Edit: Including annotated photo of PCB. No components on bottom side.</p>
<p><a href="https://i.stack.imgur.com/wrszg.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wrszg.jpg" alt="enter image description here" /></a></p>
| PV Microinverter Topology Explanation | 2024-01-20T05:38:06.140 |
698274 | |batteries|switch-mode-power-supply|buck|efficiency|ups| | <p>From a 24V to 12V DC-DC you can expect 85-90% efficiency if it's not synchronous, 90-95% if it is.</p>
<p>Going through the inverter, you can expect 80-85% efficiency if it uses a cheap push pull converter for the 12V to high voltage conversion, and more like 90% if it's resonant, but for a cheap 12V inverter it probably isn't. That's at high load ; at low load efficiency will be lower due to idle losses.</p>
<p>Then another 80-85% for the cheap flyback AC-DC converter in the wall wart.</p>
<p>So efficiency will be much higher with DC-DC converters, but since a significant part of the losses will be idle losses from the inverter, and these don't depend much on load, adding a few DC-DC converters is unlikely to help much.</p>
<p>LM2596 has terrible efficiency because it uses a NPN switch instead of a MOSFET. It's an obsolete chip. The <a href="https://k6jca.blogspot.com/2018/02/counterfeit-lm2596-regulator-boards.html" rel="nofollow noreferrer">fake LM2596 modules</a> you linked in the question are even worse, they do not honor the specs, the inductor saturates, and the high-ESR caps will die quickly.</p>
<p>If you want DC-DC converters, then you should get ones from <a href="https://www.mouser.fr/c/power/dc-dc-converters/non-isolated-dc-dc-converters/?input%20voltage%2C%20max=28%20V%7E%7E420%20V&output%20current-channel%201=2%20A&instock=y&rp=power%2Fdc-dc-converters%2Fnon-isolated-dc-dc-converters%7C%7EInput%20Voltage%2C%20Max" rel="nofollow noreferrer">good manufacturers</a>. They are not expensive.</p>
<p>There is another issue: isolation. Using the original AC-DC wall warts (or isolated DC-DC converters) will isolate all your devices from each other. Using non-isolated DC-DC converters will not.</p>
<p>So if there is any chance of ground loop issues, for example if this involves audio or analog of any kind, if you use non-isolated converters it's pretty much guaranteed you'll get noise problems.</p>
| <p>I am modifying an existing UPS to allow for a longer backup time. I plan on adding a cooling fan along with an external current controlled power supply to charge the larger batteries. There are some appliances in the my setup that run on 12v (monitor, desk light, ONU etc). I planned on using <a href="https://leetechbd.com/product/lm2596-dc-dc-adjustable-step-module/" rel="nofollow noreferrer">these</a> buck converters to have five or six 12V 2A ports. As I would be connecting these directly to the 24V battery, I was also planning on adding an over discharge protection for this, as well as an auto-switch circuit so that it switches to another SMPS when mains is available.</p>
<p>Now I am wondering if this will be worth it. Using the wall adapter the 12V appliances came with on the AC output of the UPS would keep things much simpler, but I am worried if there would be a lot of power loss in switching. My goal is to maximize battery life as much as possible. I am using two 12V 45Ah batteries in series. The maximum consumption of my current setup is 620W (going by ratings on the labels of devices.) The maximum load capacity of my UPS is 720W. It had two smaller 12v batteries in series.</p>
<p>Should I add the DC-DC ports or just use the AC output of the UPS?</p>
| Does DC-DC 24V-12V waste less power than AC-DC 220V-12V? | 2024-01-20T08:47:14.763 |
698280 | |arduino|stm32|adc| | <p>There was no common ground potential between boards.</p>
<p>You can define any point as 0V or ground level to which everything else is referenced. However, as an analogy, if you live in a valley and your friend lives on top of a hill, you both may be same height, but your heads will be at different level compared to sea level which is absolute, so you and your friend share a different ground level reference in absolute numbers.</p>
<p>So a board cannot measure or work with anything that is not referenced to ground of that board.</p>
<p>Same thing if you have two 9V batteries. They both have 9V over their terminals and you can name the negative terminals as 0V or ground or whatever, but they are completely unrelated to each other, until you connect a wire between them.</p>
<p>If you try to measure anything with a multimeter between the two otherwise unconnected batteries, you will get nothing, no voltage and no current, no resistance, nothing.</p>
<p>So in order to measure the voltage output of a potentiometer, the potentiometer and the measuring board must have the same ground, i.e. 0V reference, and the supply going into the potentiometer must be referenced to board and potentiometer ground.</p>
| <p>I wrote code using an STM32F407 to read the voltage of a potentiometer on the input pin of the ADC.</p>
<p><a href="https://i.stack.imgur.com/znvXp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/znvXp.png" alt="enter image description here" /></a></p>
<p>This is the circuit:</p>
<p><a href="https://i.stack.imgur.com/99tia.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/99tia.jpg" alt="enter image description here" /></a></p>
<p>I tried taking the power directly from the STM32 and then, as in the photo above, I tried taking the power from the Elegoo board. In the case of the STM32 I can read the correct values, but in the case of the Elegoo I get this:</p>
<p><a href="https://i.stack.imgur.com/0EffS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0EffS.png" alt="enter image description here" /></a></p>
<p>Why it doesn't work with the Elegoo's Vcc? Does the Elegoo have some problems with the power pins?</p>
<p>It is definitely a hardware problem, because the code is the same, but in the case of the STM32 it works.</p>
| STM32 and Elegoo supply voltage | 2024-01-20T10:50:18.760 |
698282 | |circuit-design|switches|comparator|binary| | <p>An approach I might take would be to take advantage of the existing 7-segment display and avoid the use of the binary LED outputs. It's not difficult to make the 7-segment display produce an <strong>E</strong> error out, instead.</p>
<p>To do this, I'd break up the input into two modules:</p>
<ul>
<li>A display module that emulates the 7447 except that it accepts an error indication input which will force the display to show <strong>E</strong> in those cases, regardless of the supplied binary input. It doesn't detect errors. But it accepts an error indication, which overrides the display segments. But it otherwise acts similarly to the 7447. (It also doesn't accept or deal with blanking, though.</li>
<li>A 4-bit BCD input module that can generate the error indication. The 4-bit input and the error indication is placed at its output.</li>
</ul>
<p>Let's start with the top-level:</p>
<p><a href="https://i.stack.imgur.com/NkVUW.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/NkVUW.png" alt="enter image description here" /></a></p>
<p>This just takes in the BCD input, feeds it both to the output as well as the <strong>BCDE</strong> module (see below) and to the modified <strong>7447E</strong> module (also see below.) The <em><strong>ERR</strong></em> indicator from the <strong>BCDE</strong> module is also passed along to the <strong>7447E</strong> module. The basic ideas here are very easy to understand and read.</p>
<p>Next, the <strong>BCDE</strong> module would be nothing more than the following:</p>
<p><a href="https://i.stack.imgur.com/Y179h.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Y179h.png" alt="enter image description here" /></a></p>
<p>And finally the <strong>7447E</strong> module would look like this:</p>
<p><a href="https://i.stack.imgur.com/fcW40.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/fcW40.png" alt="enter image description here" /></a></p>
<p>This last <strong>7447E</strong> module always outputs an <em><strong>E</strong></em> on the display if the <em><strong>ERR</strong></em> input is <strong>1</strong>. Otherwise, it processes the 4-bit input just like a 7447 would.</p>
<p>This breaks things up into useful sections that can be applied again and again.</p>
| <p>I made this circuit that reads the input of the DIP switches and detects if the input is an error or not a BCD value. The problem is I have 4 inputs for my circuit.</p>
<p>The LED indicate if the input is correct or wrong; if correct then allow input to pass, if not, output zero.</p>
<p><a href="https://i.stack.imgur.com/MQx5Y.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MQx5Y.png" alt="enter image description here" /></a></p>
<p>Im having trouble implementing this to the breadboard as it requires 2 breadboard just to make this and the expenses might not cater for it.</p>
<p>I am required to only use 74ls ic's</p>
<p>How can I reduce the component count of the overall circuit?</p>
| Reduce component count for BCD input error detection | 2024-01-20T12:11:20.290 |
698289 | |pcb|rf|antenna| | <p>No, the antenna is just the means to get from wired to wireless. Different frequencies calls for different antenna designs but it does not set the frequency in this case. The frequency is mainly controlled by one of the ICs on the board (ignoring tuning networks, amplifiers and similar).</p>
| <p>I have an Audi Tyre Pressure Monitoring System (TPMS) module from the USA, which therefore means it operates on 315 MHz. It was not available in Europe and hence there isn't a 433 MHz version available.</p>
<p>However, interestingly there is a very similar Hyundai module that operates at 433 MHz. I don't have one at hand and I also doubt it would be compatible with my car due to CANBUS protocols etc.</p>
<p>What I am wondering, and might be completely wrong, is if it is possible to change the frequency by swapping the antenna?</p>
<p>See attached the Audi 315 MHz module and Hyundai 433 MHz module. The angles are different but you can see that the Hyundai antenna is slightly shorter by 30 mm or so.</p>
<p><a href="https://i.stack.imgur.com/FSO7k.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/FSO7k.jpg" alt="Audi 315MHz" /></a></p>
<p><a href="https://i.stack.imgur.com/CWFGH.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CWFGH.jpg" alt="Hyundai 433MHz" /></a></p>
| Can you convert a radio receiver frequency from 315 to 433 MHz by changing the antenna? | 2024-01-20T13:01:26.977 |
698291 | |current|switches|light|heater| | <p>No, because the bulb has a much higher resistance than the heater, limiting the current to a few mA.</p>
| <p><a href="https://i.stack.imgur.com/SbyoE.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SbyoE.jpg" alt="Diagram" /></a></p>
<p>I have a heater with a neon bulb wired in parallel with a safety cutoff switch. The full current of the heater goes through the safety switch. If the switch trips, wouldn’t the full current just go through the bulb, very briefly, and burn the bulb out?</p>
| Error Indicator Light on Heater | 2024-01-20T13:28:30.550 |
698297 | |digital-logic|verilog|state-machines|frequency-divider| | <p>You currently change <code>r</code> on every <code>clk_in</code> positive edge. If you want to change <code>r</code> every time <code>clk_out</code> changes, you can wait for an event on <code>clk_out</code> (like the negative edge). I modified the testbench <code>initial</code> block to replace most of the <code>#</code> delays to demonstrate:</p>
<pre><code>initial begin
// Initialize Inputs
r = 2'b00;
rst = 1;
// Wait 100 us for global reset to finish
#91554;
rst = 0;
@(negedge clk_out);
r = 2'b00;
@(negedge clk_out);
r = 2'b01;
@(negedge clk_out);
r = 2'b10;
@(negedge clk_out);
r = 2'b00;
@(negedge clk_out);
r = 2'b10;
@(negedge clk_out);
r = 2'b01;
$finish;
end
</code></pre>
<p><a href="https://i.stack.imgur.com/rqYdR.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/rqYdR.png" alt="waves" /></a></p>
| <p>Ground, first and second floors and the inputs are r0 for ground, r1 for first floor, and r2 for second floor. The output will be d1, d2, up1, up2, and n (no action). Frequency is 2<sup>15</sup> Hz.</p>
<p>State diagram (Moore design) for a lift (elevator):</p>
<p><a href="https://i.stack.imgur.com/3POpm.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3POpm.jpg" alt="ground floor" /></a></p>
<p><a href="https://i.stack.imgur.com/nncvK.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/nncvK.jpg" alt="First floor" /></a></p>
<p><a href="https://i.stack.imgur.com/cPfyW.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cPfyW.jpg" alt="second floor" /></a></p>
<p>This is the code I tried:</p>
<pre><code>module lift(input clk_in,rst,input [1:0]r,output reg [2:0]out, output reg clk_out);
parameter g0 = 4'b0000; //ground floor with no action
parameter g1 = 4'b0001; //ground floor with d1 output
parameter g2 = 4'b0010; //ground floor with d2 output
parameter f0 = 4'b0011; //first floor
parameter f1 = 4'b0100; //first floor with up1
parameter f2 = 4'b0101; //first floor with d1
parameter s0 = 4'b0110; //second floor
parameter s1 = 4'b0111; //second floor with up1
parameter s2 = 4'b1000; //second floor with up2
//outputs
parameter n = 3'b000;
parameter d1 = 3'b001;
parameter d2 = 3'b010;
parameter up1 = 3'b011;
parameter up2 = 3'b100;
//inputs
parameter r0 = 2'b00;
parameter r1 = 2'b01;
parameter r2 = 2'b10;
//current and next state registers
reg [3:0] state, nxt_state;
//clockDivider
reg[15:0]counter=16'd0;
parameter DIVISOR = 16'd32768;
always @(posedge clk_in)
begin
counter<=counter+16'd1;
if(counter>=(DIVISOR-1))
begin
counter<=16'd0;
end
clk_out<=(counter<DIVISOR/2)?1'b1:1'b0;
end
always@(posedge clk_out,posedge rst) begin
if(rst == 1)
state <= g0;
else
state <= nxt_state;
end
always@(state ,r) begin
case(state)
g0 : begin
if(r == r0)
nxt_state <= g0;
else if(r==r1)
nxt_state <= f1;
else
nxt_state <= s2;
end
g1 : begin
if(r == r0)
nxt_state <= g0;
else if(r==r1)
nxt_state <= f1;
else
nxt_state <= s2;
end
g2 : begin
if(r == r0)
nxt_state <= g0;
else if(r==r1)
nxt_state <= f1;
else
nxt_state <= s2;
end
f0 : begin
if(r == r1)
nxt_state <= f0;
else if(r == r0)
nxt_state <= g1;
else
nxt_state <= s1;
end
f1 : begin
if(r == r1)
nxt_state <= f0;
else if(r == r0)
nxt_state <= g1;
else
nxt_state <= s1;
end
f2 : begin
if(r == r1)
nxt_state <= f0;
else if(r == r0)
nxt_state <= g1;
else
nxt_state <= s1;
end
s0 : begin
if(r == r2)
nxt_state <= s0;
else if(r == r0)
nxt_state <= g2;
else
nxt_state <= f2;
end
s1 : begin
if(r == r2)
nxt_state <= s0;
else if(r == r0)
nxt_state <= g2;
else
nxt_state <= f2;
end
s2 : begin
if(r == r2)
nxt_state <= s0;
else if(r == r0)
nxt_state <= g2;
else
nxt_state <= f2;
end
default : nxt_state <= g0;
endcase
end
always@(state) begin
case(state)
g0 : out <= n;
g1 : out <= d1;
g2 : out <= d2;
f0 : out <= n;
f1 : out <= up1;
f2 : out <= d1;
s0 : out <= n;
s1 : out <= up1;
s2 : out <= up2;
endcase
end
endmodule
</code></pre>
<p>Testbench:</p>
<pre><code>module tb();
reg clk_in;
reg rst;
reg [1:0] r;
wire [2:0] out;
wire clk_out;
lift uut (clk_in, rst, r, out, clk_out);
initial begin
clk_in = 0;
forever #15259 clk_in = ~clk_in;
end
initial begin
// Initialize Inputs
r = 2'b00;
rst = 1;
// Wait 100 us for global reset to finish
#91554;
rst = 0;
#61036;
r = 2'b00;
#30518;
r = 2'b01;
#30518;
r = 2'b10;
#30518;
r = 2'b00;
#30518;
r = 2'b10;
#30518;
r = 2'b01;
$stop;
end
endmodule
</code></pre>
<p>The input is not changing according to the divided <code>clk_out</code>:</p>
<p><a href="https://i.stack.imgur.com/8DjAQ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8DjAQ.png" alt="simulation" /></a></p>
| Verilog code for three-storey building | 2024-01-20T15:59:29.693 |
698310 | |voltage|amplifier|rf| | <p>These are basically an RF amplifier, often multistage, with the input and output impedance matched, often to 50<span class="math-container">\$\Omega\$</span> but 75<span class="math-container">\$\Omega\$</span> is also common. They’re typically on a ceramic substrate and use stripline as well as conventional solenoid inductors. I’ve seen them without the cover on them, they definitely have inductors.</p>
| <p>It must be something simple I am not getting in electronics, but this UHF RF amplifier (of which China has helpfully erased the part number on what I take is the transistor) produces 13 watts of output power while only takes 12-15 volts of supply power. Now 13 watts at 50 ohms corresponds to 25.5 Vrms or 72.1 V peak-to-peak. All this is apparently possible <strong>without an inductor</strong>, at least I don't see one. How can this be done?</p>
<p><a href="https://i.stack.imgur.com/lzImN.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/lzImN.jpg" alt="enter image description here" /></a></p>
| How can this RF amplifier increase the voltage above power supply level? | 2024-01-20T17:56:04.530 |
698319 | |transistors|guitar-pedal| | <p>The first stage is a high gain amplifier. I haven't worked through the bias calculations to see if the output would have symmetrical clipping. Because the emitter resistor is bypassed, the stage gain is high - probably high enough to have clipping distortion even with a low input signal. The clipping produces the fuzz effect. Note that the first stage has a bit of intentional high-frequency roll-off, cause by feedback capacitor C21.</p>
<p>In this circuit it looks like the fuzz effect is produced by a combination of two diodes in inverse parallel, and over-driven amplifier stages. The two inverse diodes are D7 and the Q9 base-emitter junction. Changing Q9 from Ge to Si will have a very noticeable effect on the sound.</p>
<p>The Fuzz control drives another gain stage, and this one definitely clips the signal. This one is biased by "catching" the negative peaks of the signal with D7. Working with C24, this holds the signal negative peaks at -0.7 V. Depending on the transistor type, Q9 will begin to amplify when the peak-to-peak signal amplitude out of the Fuzz pot is either 0.9 V or 1.3 V.</p>
<p>Thinking through the circuit, this part of it is a bit strange, and the previous description is not entirely correct. Because there is no DC path go GND from the right side of C23, exactly when Q9 goes from completely off - to a linear amplifier - to a clipping amplifier is not clearly defined for low-amplitude signals. I think this is the "gating" you are experiencing, but please update your question with a more detailed description of what you want and what you are getting.</p>
<p>Also -</p>
<p>Without C22, the Q8 stage tries to have a gain of over 300, which the transistor can barely do. With C22 in there, it tries for infinite gain above 480 Hz. I'm not a fuzz box guru, but this seems like a lot for a guitar preamp stage.</p>
<p>Is it your intent to have a circuit that produces a clean output signal at low Fuzz setting, with increasing fuzz as the pot is rotated? If so, some very minor tweaks to the circuit can do that.</p>
| <p>I built my first fuzz pedal based on the Tone Reaper but I can't handle with gated sound.</p>
<p><a href="https://i.stack.imgur.com/6YwJQ.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6YwJQ.jpg" alt="Schematic pcbguitarmania" /></a></p>
<p>Whatever the fuzz pot is set the sound is gated. At low position the signal is very weak and chopped, even with no compressor in the signal chain.</p>
<p>I verified all components and replaced the 2N2369 but nothing improved.</p>
<p>I guess there is a Bias problem. On Q9 the voltage on base is 0.2V, Emitter 0V and collector 8.36V so the base is not so high to work properly.</p>
<p>In another similar built one AC176 is used and rest of the board is still the same. I don't know why.</p>
| Struggle with gated sound - Fuzz stompbox | 2024-01-20T18:42:34.137 |
698331 | |capacitor|circuit-design|relay| | <p>Solve the standard RC discharge equation for the time constant RC.
<span class="math-container">$$
\tau=RC=\frac{-t_{\text{dropout}}}{ln\left(\frac{V_{\text{dropout}}}{V_\text{initial}}\right)}
$$</span></p>
<p>Use the initial coil voltage and the dropout voltage. The relay coil resistance is used for R. The relay inductance will not be significant enough to affect the result.</p>
<p>For the circuit in the diagram, and for the relay in the OP, a 2200μF capacitor should work. The capacitor will charge to 12V less one diode drop. When the capacitor discharges, the initial coil voltage will be 12V less two diode drops.</p>
<p>The relay datasheet will provide values for <span class="math-container">\$V_{\text{dropout}}\$</span> and coil resistance.
Choose R1 to limit inrush current.</p>
<p>If the relay drops out at a higher voltage you will need a higher capacitance. For example if the dropout is actually 50%, then a 6800μF capacitor is required.</p>
<p>To include Simon Fitch's comment:<br />
"...to have <span class="math-container">\$C_1\$</span> charge within 500ms: <span class="math-container">\$5R_1C_1≈0.5\$</span>, or <span class="math-container">\$R_1≈0.1C_1\$</span>. With <span class="math-container">\$C_1=2mF\$</span>, that makes <span class="math-container">\$R_1≈50Ω\$</span>, and inrush current will be <span class="math-container">\$I≈1250=0.24A\$</span>"</p>
<p><img src="https://i.stack.imgur.com/mJrfXm.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fmJrfXm.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
| <p>Building a simple prototype to keep the relay latched for a couple of seconds <em>after power is removed</em> - so essentially the power to relay acts as the Input signal. This means I have to store energy in a capacitor (to keep the relay latched) and possibly use resistor as well to control current in the circuit. Can you guys please help me figure out C and R values and how the components would link (C would be in parallel with the Relay but not sure about R)?</p>
<p>Important things for me are:</p>
<ol>
<li>Relay should latch as soon as 12V power is applied</li>
<li>Capacitor should charge within 500-700ms and be able to keep relay latched for 2-3 seconds.</li>
<li>Since I have to charge capacitor quickly, I need to factor in-rush current so as not to damage power supply.</li>
</ol>
<p>Would really appreciate if you can share the calculations as well, so I can try with different relays and capacitors etc.</p>
<p>The relay i have is Songle 12V (SRD-12VDC-SL-C), Datasheet: <a href="http://www.songlerelay.com/Public/Uploads/20161104/581c81ac16e36.pdf" rel="nofollow noreferrer">http://www.songlerelay.com/Public/Uploads/20161104/581c81ac16e36.pdf</a></p>
| Keep a relay latched for 2-3 seconds using capacitor | 2024-01-20T21:59:05.163 |
698337 | |analog|manufacturing-process| | <p>BiCMOS still finds uses in many analog/RF commercial applications, where CMOS scaling has not resulted in improved performance (designing analog blocks in bulk CMOS <28nm is quite difficult/not cost-effective). Many high-speed optical communication receivers and transmitters are based on BiCMOS technology. RF and mmWave front-end modules are also still using BiCMOS technology, especially in PA blocks where the higher breakdown voltages associated with BiCMOS technology allow for superior reliability and output power than CMOS counterparts.</p>
| <p>A Google search has not yielded much fruit when it comes to this question, but I'm wondering if BiCMOS is still a reasonably popular technology (relative, of course, to any other non-CMOS technology). Most of what I have read seems to come from the 90s, so I'm not sure if that points to BiCMOS no longer being used as CMOS improves so much that the old benefits of BiCMOS no longer accrue to justify its use over (advanced) CMOS.</p>
| Is BiCMOS still a popular technology? | 2024-01-20T23:14:19.870 |
698356 | |filter|oscillator|stability|resonance|band-pass| | <p>You are working in the domain of DSP (digital signal processing), where time is quantized, and usually value as well. The value quantization of a <code>double</code> is pretty modest, of course.</p>
<p>Typically, DSP equations are developed without having to apply value quantization, then adding it in later, as a normally-distributed noise due to rounding error. Rounding errors have the distinction of being consistent based on input plus state values, which can result in instability, whether dithering between adjacent values, or divergence outright, so this does still need to be accounted for. It's probably fine here.</p>
<p>Anyway, the domain of quantized-time systems, is the Z transform, analogous to the Fourier transform of continuous-time systems. In the Z domain, stability is expressed as poles laying within the unit circle; which indeed maps to the equivalent stability criterion in the Fourier domain, poles in the left half-plane.</p>
<p>Put most simply, your problem is most likely that, by pushing the resonant frequency too close to the sample rate (or rather the Nyquist rate Fs/2), poles are pushed outside of the unit circle and divergence ensues.</p>
<p>I say "simply", but analytical control theory is a rather high-level topic. I don't intend to go into an explanation or derivation of this here -- more to say, an explanation exists, and these are the keywords and topics you will find it in.</p>
<p>There is also, somewhat separately, the matter of numerical stability; we can model a physical system, having some (continuous-time) differential equations, as some (quantized-time) difference equations, basically substituting <span class="math-container">\$dt \mapsto \Delta t\$</span>; but the exact way in which we do that, affects the stability of the system, particularly as we vary the dynamics of the system with respect to its sample rate (or when the sample rate itself is variable). The trivial substitution is more-or-less Newton integration, but other rules can be applied: the trapezoidal rule; Adams-Bashforth; Runge-Kutta methods; etc. When <span class="math-container">\$\Delta t\$</span> is fixed, we can apply these back to DSP systems, and get a somewhat different mapping of differential to difference equations, and different stability based on the initial parameters; though the stability criterion of the final, actual, time-stepping equations is still necessarily present of course.</p>
<p>Numerical stability applies when doing general-purpose simulations of these systems; when we approximate an RLC circuit in SPICE, we're applying discrete-time approximations (specifically, SPICE uses a variable timestep, and trapezoidal or R-K methods), and we get consequences such as anomalous energy loss -- or gain -- in a high-Q LC resonator, for example, depending on integration method and tolerances.</p>
| <h1>Background</h1>
<p>I am using resonant bandpass filters as musical oscillators. One can excite an array of them at harmonic frequencies and given Q values for a note by, for example, running a burst of noise through them.</p>
<p>I thought intuitively that an array of damped mass-spring oscillators tuned to the same Q and frequencies should perform the same as the resonant bandpass array.</p>
<p>The result is they behave similarly but also differently in some ways.</p>
<h1>Damped Mass-Spring Oscillator</h1>
<p>I set up some with the following code, where instead of running the audio input through the bandpasses directly as input samples, I converted the input exciter audio into force and then used that to drive the mass-spring oscillators.</p>
<p>I thought this would be the Newtonian way to handle this in theory. (Correct?)</p>
<pre><code>double processNextSample(double sampleInput) {
//SOLVE DRIVING FORCE BEING PUT INTO IT FROM EXCITER SIGNAL
in_1 = in_0;
in_0 = sampleInput;
inVel_1 = inVel_0;
inVel_0 = (in_0 - in_1) * sampleRate;
inAcc_0 = (inVel_0 - inVel_1) * sampleRate;
F_input = inAcc_0 * oscMass; //use imaginary mass as 1 kg to keep amplitude the same
//PROTECT AGAINST HIGH FREQUENCIES DUE TO INSTABILITY
if (springFreq > 21000 || springFreq > 0.08 * sampleRate) {
return 0;
}
//SOLVE MOTION OF DAMPED MASS-SPRING OSCILLATOR
double F_dampedSpring = (springK * currentPos) + (dampCoeff * currentVel);
currentForce = F_input - F_dampedSpring;
currentVel += currentForce * deltaTime;
currentPos += currentVel * deltaTime;
return currentPos;
</code></pre>
<h1>Similarities/Differences</h1>
<p>This creates a similar effect in that I can get the expected resonances of frequencies and the musical note comes through the same at the same amplitude. There are two main differences:</p>
<h2>1) Stability</h2>
<p>It is far less stable. I have to limit the frequencies relative to the sample rate as at higher frequencies it is failing. I believe it is going into <code>NaN</code> and <code>inf</code> territory easily. I am not sure why.</p>
<p>Perhaps the input force or stepwise position/velocity solution is too crude and discontinuities are resulting in massive forces randomly? Whereas the filter (using <a href="https://github.com/michaeldonovan/VAStateVariableFilter/blob/master/VAStateVariableFilter.h" rel="nofollow noreferrer">this one</a>) handles this with better math somehow?</p>
<p>Or perhaps it is because as in point (2) below, it is letting high freqs through, and being forced into very rapid motion obviously then, the damping term is getting too big and becoming problematic at the sample rate with these high freqs as it is not parametized for this purpose, and pushing it into error.</p>
<h2>2) Frequency Response</h2>
<p>It sounds like it lets all the high frequencies from my exciter noise bursts through it completely, whereas the resonant bandpass filters these out. ie. If I have a single mode (bandpass or oscillator) at 80 hz, with the bandpass, I only hear ever sound around 80 hz (it filters above and below). With the oscillator, I hear the full high frequency spectrum of the burst of sound as it goes through. Not sure about the lows, but the highs are obviously passing through.</p>
<h1>Questions</h1>
<p>Based on this experiment, it seems the damped harmonic oscillator is not equivalent to the resonant bandpass.</p>
<p>What is the harmonic oscillator equivalent to then? Is it a resonant high pass filter?</p>
<p>What would be the mechanical/Newtonian equivalent to the resonant bandpass if one exists?</p>
<p>Why also (in layman's terms) is the harmonic oscillator so unstable compared to the filter?</p>
<p>Thanks for any thoughts or ideas.</p>
<h1>EDIT</h1>
<p>Based on replies and comments so far that the harmonic oscillator should either be certainly be identical to the bandpass or work as a resonant low pass filter (not sure which one for sure still), then I must presume the burst of noise I am getting out of the harmonic oscillator on excitation is not the exciter noise passing through (not a high pass filter), but rather a sample rate related quantization error in my force conversion code which is <em>creating</em> a new noise burst.</p>
<p>I didn't think of that possibility. Thanks for the feedback.</p>
| How is a resonant bandpass filter similar/different from a damped mass-spring oscillator? They seem to behave different in testing | 2024-01-21T08:00:04.180 |
698362 | |led|diodes|ohms-law|leakage-current|reverse-bias| | <p><strong>Use parallel resistor to fix the problem</strong></p>
<p>As other answers have detailed, the small leakage current is enough to light up the LED dimly.</p>
<p>Fortunately it is easy to fix by adding a resistor in parallel with the LED:</p>
<p><img src="https://i.stack.imgur.com/fIblTm.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2ffIblTm.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="noreferrer">CircuitLab</a></sup></p>
<p>Maximum resistance for <strong>R2</strong> can be calculated by <strong>V<sub>F</sub> / I<sub>R</sub></strong> where V<sub>F</sub> is the LED forward voltage and I<sub>R</sub> is the leakage current. The 100 kohm resistor shown is enough to sink up to 20 µA leakage current before the voltage will exceed the LED forward voltage.</p>
| <p>I have small issue with my circuit that I can't wrap my head around.</p>
<p>I have made a custom PCB powered both by USB and battery. I put a diode between them to block battery power from flowing into USB when both are connected.</p>
<p>This diode doesn't work as intended because when I plug in the battery without USB power, the USB_LED that I put with a 10k resistor in series still lights up (albeit dimmer.)</p>
<p>There's 1.8 V across the diode in reverse and 2.2V across the LED. (The sum equals 3.9V of my battery voltage.Can you confirm this?)</p>
<p>I was expecting to see 3.9V across the diode in reverse since I expected the diode to work as open circuit and certainly not for the LED to light up.</p>
<p>Can you tell me like I am 10 years old how this is possible, with Ohm's law and all that?</p>
<p>I don't get it. I specifically chose a B160 diode <a href="https://datasheet.lcsc.com/lcsc/1809192011_Diodes-Incorporated-B160-13-F_C24784.pdf" rel="nofollow noreferrer">datasheet</a> because it was supposed to have under 200na reverse current for my battery voltage according to the datasheet.</p>
<p><a href="https://i.stack.imgur.com/Nlnjy.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Nlnjy.jpg" alt="reverse leakage graph" /></a></p>
<p>I also tried a 1N5817 diode and got similar results. I noticed that when I solder the diode the LED light gets stronger, which is in line with the reverse current temperature behavior that's in the graph.</p>
<p>-How can I calculate the leakage current with Ohm's low with diode and LED voltage values?</p>
<ul>
<li>How does the LED light up with that small of a current?</li>
<li>What diode should I use to have nano amp level reverse current ?</li>
</ul>
<p>Here's the simplified power supply schematic with the 3.3V converter on the right:</p>
<p><a href="https://i.stack.imgur.com/S5Upf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/S5Upf.png" alt="enter image description here" /></a></p>
| Diode in reverse lights up LED | 2024-01-21T09:50:02.887 |
698369 | |photodiode|phototransistor|photosensor| | <p>From the question:</p>
<blockquote>
<p>But I have 850nm LEDs (powerful ones). Will it work the same, or will it perceive a weaker signal?</p>
</blockquote>
<p>The Vishay TSOP1130 is reported as obsolete, and can't find a datasheet for it on the Vishay site.</p>
<p>In the <a href="https://pdf1.alldatasheet.com/datasheet-pdf/view/26554/VISHAY/TSOP1130.html" rel="nofollow noreferrer">datasheet</a> found on a different site there is <em>Figure 12. Relative Spectral Sensitivity vs. Wavelength</em>:</p>
<p><a href="https://i.stack.imgur.com/HMvUV.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HMvUV.png" alt="enter image description here" /></a></p>
<p>So, with a 850 nm LED expect the TSOP1130 to perceive a weaker signal which is approx 30% of that compared to using the 950 nm wavelength used for the characterisation in the datashseet.</p>
| <p>In the sheet, they test it with a 940nm IR LED. There are no clear specifications for the wavelength (range) it works with.</p>
<p>But I have 850nm LEDs (powerful ones).
Will it work the same, or will it perceive a weaker signal?</p>
<hr />
<p><a href="https://i.stack.imgur.com/VJqzC.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VJqzC.png" alt="enter image description here" /></a></p>
| Can TSOP1130 work also at 850mn? | 2024-01-21T10:49:02.860 |
698376 | |current|copper|busbar| | <p>There are an amazing number of effects on what current, in practice, a given busbar can support. I recommend the extremely complete monograph:</p>
<ul>
<li><em>Copper for Busbars – Guidance for Design and Installation</em>, David Chapman and Prof. Toby Norris, The Copper Alliance Pub. 22, (2014 ed., 103 pp)</li>
</ul>
<p>You can find this online (free) at <a href="https://help.leonardo-energy.org/hc/en-us/articles/360021365560--Cu0201-Copper-for-Busbars-Guidance-for-Design-and-Installation" rel="nofollow noreferrer">Leonardo Energy</a>.</p>
<p>Also of interest are the tables and materials listed at the Copper Development Asasociation's <a href="https://copper.org/applications/electrical/busbar/" rel="nofollow noreferrer">busbar</a> page.</p>
| <p>To calculate the cross-sectional area of the copper busbar, it is necessary to calculate the permissible current of the busbar.
One of the correction coefficients that must be multiplied in this current is "the copper busbar surface temperature correction coefficient".
How should I find this coefficient? Is there a table for this purpose?</p>
<pre><code>Icont = Itable × k1 × k2 × k3 × k4 × k5
</code></pre>
<blockquote>
<p>Calculation of the cross-sectional area of the tire
The calculation ofthe permissible current that can pass through the busbar
is done using
the following formula and applying correction coefficients:</p>
<p>(1-6) Icont = Itable × k1 × k2 × k3 × k4 × k5</p>
<p>Icont: allowed continuous busbar current (final)</p>
<p>Itable: allowed continuous busbar current according to table (6-9) or
(6-10)</p>
<p>k1: the correction factor related to the conductivity of the busbar if
the conductivity of the copper busbar used is not 56 m/Ωmm2 or the
conductivity of the aluminum busbar is not 35.1 m/Ωmm2. Figure (6-11)</p>
<p>k2: correction factor related to ambient temperature other than 35
degrees Celsius and tire surface temperature other than 65 degrees
Celsius (Figure 12-6)</p>
<p>k3: correction factor related to the
installation of tires in a flat or vertical installation with a length
of more than 2 meters (Table 7-6)</p>
<p>k4: correction factor related to
skin effect in alternating current up to 60HZ according to the layout
of the busbars, if no branch is taken at a distance of more than 2
meters from the busbar (Figures 13-6 and 14-6)</p>
<p>k5: the correction
factor related to the reduction of the current capacity of the tire at
a height of more than 1000 meters above sea level (Table 8-6)</p>
</blockquote>
| Calculation of the cross section of the busbar in the switchgear | 2024-01-21T12:00:14.267 |
698381 | |sensor|rs485|rs232|modbus| | <p>Since both interfaces are bidirectional, <strong>yes</strong>.</p>
| <p>I want to convert RS485 to RS232 to connect it to a Moxa Nport 5610 - 16 port RS-232 Ethernet serial device server.</p>
<p>Can I use a TCC-100/100I Series Industrial RS-232 to RS-422/485 converter to convert RS-485 to RS-232?</p>
<p><a href="https://i.stack.imgur.com/sj3TDm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sj3TDm.png" alt="enter image description here" /></a></p>
| Can TCC-100/100I Series Industrial RS-232 to RS-422/485 converters with optional 2 kV isolation convert RS485 to RS232? | 2024-01-21T13:19:34.373 |
698387 | |antenna|emc|transmission-line|coax|balun| | <p>The antenna that you call a monopole may actually be a coaxial dipole</p>
<p><img src="https://i.stack.imgur.com/jE8qv.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fjE8qv.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="noreferrer">CircuitLab</a></sup></p>
<p>I apologize for the very crude drawing.</p>
<p>A coaxial dipole has two sections. One section is a single conductor arm. The other section has a central conductor with two coaxial conductors around it. Where the two sections meet, the two outer coaxial conductors are electrically bonded.</p>
<p>One might think of this as a regular dipole where the feedline is snaked through one of the dipole arms.</p>
<p>Current from the transmitter flows through both the inner conductor of the feedline and the outer conductor. When the junction of the two antenna sections is reached, current from the inner conductor continues into the simple conductor arm. Current from what was the coax outer conductor, and is now the "middle conductor" of the coaxial dipole antenna, turns around and flows on the outer coaxial conductor.</p>
<p>The coaxial section of the antenna is typically shorter than the simple conductor section because the phase velocity of the wave is affected by transmission line effects in the coaxial section.</p>
<blockquote>
<p>why, when using a monopole, does the current in the inner shield not travel entirely down the outer shield,</p>
</blockquote>
<p>If this is indeed your antenna, the answer is simple. The current can only flow so far back down the outer "shield", because it it only extends so far, and is not connected to anything at one end.</p>
<p>If you instead had a system like below, I believe current would flow further down the outside of the outer conductor.</p>
<p><img src="https://i.stack.imgur.com/Ovy42.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fOvy42.png">simulate this circuit</a></sup></p>
| <p>I've asked before regarding dipoles connected to unbalanced lines. From what I gathered, the current in the inner shield when reaching the dipole (in transmitting case) can either go into the pole connected to the shield and also the shields outer skin (I'm assuming this dependacy is related to the two impedances), the current that doesn't match the inner current gets radiated.</p>
<p>Now the question I specifically ask is, if this is correct, then why, when using a monopole, does the current in the inner shield not travel <em>entirely</em> down the outer shield, since none can travel to the pole since there is none in a monopole case.</p>
<p>I did a very crude test on a monopole and when I touched the feedline coax it didn't change the SWR at all across the frequencies. I'd guess this is proof the monopole doesn't cause outer shield currents - a very different story to my v dipole.</p>
| Why aren't baluns needed for a monopole to unbalanced coax connection? | 2024-01-21T14:39:26.963 |
698395 | |transistors|calculation|base| | <p>@G36 you are probably right about the saturation beta values, but if you plot the IV curve of the transistor, you will notice that a beta below 20 guarantees the transistor is saturated (please refer to the LTSpice charts below). I have added the 1.5R resistor to limit the collector current to its maximum allowed value.
In the chart, the saturation starts at base current of 10mA. By the time the time the base current reaches 50mA you can see the beta below 10 in the top chart Ic(Q1)/Ib(Q1)</p>
<p>Thanks.</p>
<p><a href="https://i.stack.imgur.com/4bDAO.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4bDAO.jpg" alt="enter image description here" /></a></p>
| <p>There are base resistor calculators and multiple questions are answered on the subject of base resistor calculation. However, the <a href="https://www.mccsemi.com/pdf/Products/BC817-16%7EBC817-40(SOT-23).pdf" rel="nofollow noreferrer">BC817-40</a> I am using from MCC is showing two different gains (HFE1 and HFE2). That is confusing me to do the calculation of the base resistor.</p>
<p>I have 3 IR LEDs (Vishay TSAL4400) with 100 mA forward current that I want to drive using the BC817-40. I plan give 80 mA to each LED, so I need a total of 240 mA collector current. A microcontroller's GPIO (3.3 V) will be used to drive the transistor's base.</p>
<p>Can you please help me find the right base resistor value for the BC817-40 to drive around 250 mA current? Voltage at the collector is 5 V; it will be used to drive the IR LED.</p>
| Base resistor on BC817-40 | 2024-01-21T18:46:58.193 |
698403 | |varistor| | <p>Right, mains is not an ideal source. There are two dominant components: resistance and inductance. A typical residential circuit might have an impedance of 50mΩ or thereabouts, which can be mostly resistance, or inductance, but probably a mixture of both applies.</p>
<p>Consider a long wired circuit: a standard US 120V 60Hz 15A circuit uses 14 AWG wire, and if it's 50 ft. from the panel, the run adds 250mΩ, and maybe 5-10 µH of stray inductance.</p>
<p>Inductance depends modestly on wire length alone, but compounds particularly when wound up into a coil. Most likely, significant inductance arises when a circuit passes through one or more transformers. 50mΩ reactance at 60Hz is 130µH, a typical leakage inductance for a 1kVA control transformer (commonly used in industrial equipment, where 120V is desirable for control circuitry, while the main supply is 240-480V).</p>
<p>If we take 100µH as a typical source inductance, then if we consider a 50µs surge of say 2kV peak, the flux under the curve is of the order (2kV)(50µs) = 100mWb, and the change in current, (100mWb)/(100µH) = 1kA.</p>
<p>Indeed, a typical combined-wave generator, used for testing surge immunity under regulations such as IEC 61000-4-5, emits a 8/20µs (that's a 10-90% risetime of 8µs, and a FWHM of 20µs) pulse into a near-short-circuit load, and a 1.2/50µs pulse into a near-open-circuit load (the time varies with load impedance, thus, "combined" wave). The effective impedance of this generator, the ratio between open-circuit peak voltage and short-circuit peak current, is apparently 2 ohms -- conveniently, we also found 2kV and 1kA peak based on rough assumptions, how about that?</p>
<p>As it happens, the CWG equivalent circuit uses typical values on the order of 8 µF, 3 µH and 2Ω, so we expect significant attenuation in a real circuit when values exceed these amounts. Such capacitors might be typical of passive power factor correction (capacitors balancing the inductive load of motors and transformers on site), stray wiring (again, adding up some 10s µH is easy enough across a building), and internal resistance of the equipment (small power supplies, with common-mode chokes of several ohms resistance, can use smaller MOVs, or potentially none at all).</p>
<p>As such, actual effects may vary. Perhaps the EUT (equipment under test) is near another SPD already. In that case, the Thevenin source impedance can be much smaller: less wiring distance between means less resistance and stray inductance, and the clamping impedance of the SPD itself is quite low during the pulse. But the pulse is a lower amplitude, maybe 800V, instead of the unlimited 1.5kV entering the system (say from distant induced lightning strike).</p>
<p>Induced or direct lightning strike itself, is handled by the mains distribution network, with SPDs installed periodically along distribution lines. Above-ground SPDs are easy to spot: the insulators are colored and shaped differently, and there is a noticeable ground wire/rod connected to the insulators' mounting bracket. These reduce the surge on e.g. 4.8kV AC lines to a peak of maybe 20kV, as measured some 100s of m away from the strike. (Closer to the strike, direct EMP is far stronger, and if you're in that zone... expect destruction regardless; EMC standards consider direct hits rare enough to not include them in commercial testing.) Eventually, the circuit routes to a distribution transformer ("pole pig" or pad type), some filtering occurs, rounding off the peak (transformers are also filter networks of a sort), and if the polarities work out, saturation may clip the pulse shorter as well. Most surge is therefore reduced under a kV by the time it reaches a customer, with worst-case figures in the low kV. 2.5kV line-to-ground and 1.5kV line-to-line are typical test levels.</p>
| <p>These common SPD devices are put in the main panel of residences: <a href="https://aptghana.com/wp-content/uploads/2020/11/SPD-2.jpg" rel="nofollow noreferrer">https://aptghana.com/wp-content/uploads/2020/11/SPD-2.jpg</a>.</p>
<p>This basic circuit showcases how they are installed:</p>
<p><img src="https://i.stack.imgur.com/IvQcX.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fIvQcX.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>They are put in parallel with the source and the installation, but somehow they are able to stabilize the the voltage seen by the installation in the cause of a transient source voltage peak.</p>
<p>I researched a lot and, in all sources that I have read, it is mentioned that the working principle is that: when the varistor experiences a big voltage peak in its terminals, its "resistance" is lowered, causing a (almost) "short circuit". This "short circuit" ensures that the varistor will receive a large current, which results in the installation being protected (?)</p>
<p>What I don't understand is: How exactly the fact that the resistance of the varistor is dropped has any effect on the voltage seen by the installation?</p>
<p>The varistor is in parallel with the installation, so, theoretically, even if we replaced the varistor by a 0.000001 ohm resistor, the installation would still see the same voltage. The only difference would be that the resistor would receive a giant current, without any impact on the installation.</p>
<p>In my mind, the only explanation that I can think of is: the parasitic resistance of the source/line is taken into consideration. When the resistance of the varistor is lowered, it is expected that it will become so low that it will be comparable with the parasitic resistances of the source/line, thus causing a voltage divider and, therefore, causing part of the voltage to be "absorbed" by the parasitic resistance of the source. In this scenario, the voltage experienced by the installation would indeed be reduced. However, I was not able to find this explanation anywhere, and relying on the parasitic resistences of the source/line seems weird to me.</p>
<p>Could anyone clarify it? Thanks!</p>
| Varistor-based SPD device - how does it protect the load? | 2024-01-21T19:45:44.443 |
698410 | |generator|power-generation| | <p>A genset has a significant rotating mass. The energy stored in rotating masses goes up with the square of the RPM.</p>
<p>In fact, if the genset runs at 3% higher speed it stocks 6.1 % extra mechanical energy. On a given load step the frequency drop will be smaller than that when running at nominal speed. However very short transient load changes are more likely to be served by the energy stored in the magnetic field. Without doing extensive calculations I think the inductivity will show a constant behaviour for these transient events i.e. independent from the genset speed.</p>
<p>However increasing frequency might have additional detrimental effects you should calculate carefully before considering a speed up as a measure.</p>
<p>Reactive power will most likely increase all over your network. At least all parasitic capacitors will show an increased current. As reactive power is eaten up partially by the ohmic resistance of the generator windings the benefit of the speed up might be eaten up partially by this effect.</p>
<p>I think eddy currents inside the generator might increase slightly as well. I have no idea how big that effect will be, most likely small, but there's some for sure.</p>
| <p>If I speed up my prime mover (500 kW CAT diesel generator) from 60 to 61 and 62 Hz 1800/1830/1860 rpm and hit it with 25/50/75/100 percent load steps, how much, if any kW/HP is gained?</p>
<p>I am simply trying to get more HP for a temporary transient about to hit the bus. How much will speeding up the gen set gain me? Anything?</p>
| Does speeding up a diesel generator result in a better load response? | 2024-01-21T21:37:16.913 |
698436 | |components|texas-instruments|industrial|naming-conventions| | <blockquote>
<p>How does one remember/navigate these part numbers while selecting the right part for your application if the naming convention is not standard or clear?</p>
</blockquote>
<p>By reading the datasheet, like for any other IC-specific property. In this case there is a very explicitly named "mechanical, packaging..." section in the table of contents, which contains detailed drawings.</p>
| <p><a href="https://www.ti.com/lit/ds/symlink/iso7830.pdf?ts=1705903125105&ref_url=https%253A%252F%252Fwww.google.com%252F" rel="nofollow noreferrer">TI datasheet</a> says:</p>
<blockquote>
<p>SOIC-16 Wide Body (DW) and Extra-Wide Body (DWW) Package Options</p>
</blockquote>
<p>It doesn't mention what DW stands for.</p>
<p>I am annoyed when manufacturers come up with their own naming conventions without explaining clearly the accronymns or the logic behind the naming. How does one remember/navigate these part numbers while selecting the right part for your application if the naming convention is not standard or clear?</p>
| What does (DW) mean in the TI equivalent of SOIC (16) package? | 2024-01-22T06:07:31.430 |
698438 | |pcb|altium|aluminium| | <blockquote>
<p>For aluminium based, is that bottom layer copper there with no connection naturally?</p>
</blockquote>
<p>You don't have to make anything on the bottom layer, even if it's there and non-removable.</p>
<p>All you need to do is to generate the necessary gerbers <em>(top layer i.e. copper, mask, paste, and silkscreen, and also the drills and board extents)</em>, define the PCB properties (thickness, type & material, copper weight, colours, tolerances etc) in a document, pack everything together and send to the manufacturer.</p>
| <p>I am needed to do a single layer PCB in Altium. I have no routing on the bottom layer but in the layer stack manager, I am not able to remove the bottom layer copper. Also, I can't choose or find any aluminium core.</p>
<p>This is my current stackup:
<a href="https://i.stack.imgur.com/1vpa8.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1vpa8.png" alt="enter image description here" /></a></p>
<p>For aluminium based, is that bottom layer copper there with no connection naturally?</p>
| Altium Layer Stackup for Aluminium (IMS) PCB | 2024-01-22T06:21:34.330 |