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// Copyright 2023 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.
$assert DATATYPE in ["F32", "QC8", "QC4"]
#include <xnnpack/assembly.h>
$DATATYPE_SPEC = {"F32": "f32", "QC8": "f32_qc8w", "QC4": "f32_qc4w"}[DATATYPE]
# void xnn_${DATATYPE_SPEC}_gemm${"inc" if INC else ""}_minmax_ukernel_4x2__asm_aarch64_neonfma_ld128(
# size_t mr, x0
# size_t nc, x1
# size_t kc, x2 / x0
# const float* a, x3
# size_t a_stride, x4
# const float* w, x5
# float* c, x6
# size_t cm_stride, x7
# size_t cn_stride, [sp] -> x14
$if INC:
# const float* acc, [sp + 8] -> x15
# const xnn_f32_minmax_params* params) [sp + 16] -> (x8)
$elif DATATYPE == "QC4":
# const xnn_f32_qc4w_minmax_params* params) [sp + 8] -> (x8)
$else:
# const xnn_f32_minmax_params* params) [sp + 8] -> (x8)
# d8-d15, x19-x30 need to be preserved if used. x18 is reserved by the OS.
# Register usage
# A0 x3 v0
# A1 x11 v1
# A2 x12 v2
# A3 x4 v3
# B x5 v20 v21
# C0 x6 v24 v25
# C1 x9 v26 v27
# C2 x10 v28 v29
# C3 x7 v30 v31
# Clamp v4 v5
$if DATATYPE == "QC4":
# zerop/mask v6 v7
BEGIN_FUNCTION xnn_${DATATYPE_SPEC}_gemm${"inc" if INC else ""}_minmax_ukernel_4x2__asm_aarch64_neonfma_ld128
$if INC:
# Load cn_stride, acc
LDP x14, x15, [sp]
# Load params pointer
LDR x8, [sp, 16]
$else:
# Load cn_stride, params pointer
LDP x14, x8, [sp]
# Clamp A and C pointers
CMP x0, 2 // if mr < 2
ADD x11, x3, x4 // a1 = a0 + a_stride
ADD x9, x6, x7 // c1 = c0 + cm_stride
CSEL x11, x3, x11, LO // a1 = a0
CSEL x9, x6, x9, LO // c1 = c0
$if DATATYPE == "QC4":
# Load min/max/zerop values
LD3R {v4.2s, v5.2s, v6.2s}, [x8]
MOVI v7.8b, 15
$else:
# Load min/max values
LD2R {v4.2s, v5.2s}, [x8]
ADD x12, x11, x4 // a2 = a1 + a_stride
ADD x10, x9, x7 // c2 = c1 + cm_stride
// if mr <= 2
CSEL x12, x11, x12, LS // a2 = a1
CSEL x10, x9, x10, LS // c2 = c1
CMP x0, 4 // if mr < 4
ADD x4, x12, x4 // a3 = a2 + a_stride
ADD x7, x10, x7 // c3 = c2 + cm_stride
CSEL x4, x12, x4, LO // a3 = a2
CSEL x7, x10, x7, LO // c3 = c2
0:
$if INC:
MOVI v24.4s, 0
MOVI v25.4s, 0
MOV v26.4s, 0
MOV v27.4s, 0
MOV v29.4s, 0
MOV v28.4s, 0
MOV v31.4s, 0
MOV v30.4s, 0
# Load initial accumulators
LD2 {v24.s, v25.s}[0], [x15], 8
LD2 {v26.s, v27.s}[0], [x15], 8
LD2 {v28.s, v29.s}[0], [x15], 8
LD2 {v30.s, v31.s}[0], [x15], 8
$else:
# Load initial bias from w into accumulators
MOVI v24.4s, 0
MOVI v25.4s, 0
LD2 {v24.s, v25.s}[0], [x5], 8
MOV v26.16b, v24.16b
MOV v27.16b, v25.16b
MOV v28.16b, v24.16b
MOV v29.16b, v25.16b
MOV v30.16b, v24.16b
MOV v31.16b, v25.16b
# Is there at least 4 floats (16 bytes)?
SUBS x0, x2, 16 // k = kc - 16
B.LO 3f
# Main loop - 4 floats of A (16 bytes)
1:
$if DATATYPE == "F32":
LDR q0, [x3], 16
LD2 {v20.4s, v21.4s}, [x5], 32
LDR q1, [x11], 16
LDR q2, [x12], 16
LDR q3, [x4], 16
$else:
LD2 {v20.8b, v21.8b}, [x5] // overreads by 8
ADD x5, x5, 8
LDR q0, [x3], 16
SXTL v20.8h, v20.8b
SXTL v21.8h, v21.8b
LDR q1, [x11], 16
SXTL v20.4s, v20.4h
SXTL v21.4s, v21.4h
LDR q2, [x12], 16
SCVTF v20.4s, v20.4s
SCVTF v21.4s, v21.4s
LDR q3, [x4], 16
SUBS x0, x0, 16
FMLA v24.4s, v20.4s, v0.4s
FMLA v25.4s, v21.4s, v0.4s
FMLA v26.4s, v20.4s, v1.4s
FMLA v27.4s, v21.4s, v1.4s
FMLA v28.4s, v20.4s, v2.4s
FMLA v29.4s, v21.4s, v2.4s
FMLA v30.4s, v20.4s, v3.4s
FMLA v31.4s, v21.4s, v3.4s
B.HS 1b
FADDP v24.4s, v24.4s, v25.4s
FADDP v26.4s, v26.4s, v27.4s
FADDP v28.4s, v28.4s, v29.4s
FADDP v30.4s, v30.4s, v31.4s
# Is there a remainder?- 1-3 floats of A (4-12 bytes)
ANDS x0, x0, 15
FADDP v24.4s, v24.4s, v24.4s
FADDP v26.4s, v26.4s, v26.4s
FADDP v28.4s, v28.4s, v28.4s
FADDP v30.4s, v30.4s, v30.4s
B.NE 4f
2:
$if DATATYPE in ["QC8", "QC4"]:
# Scale
LDR d20, [x5], 8
FMUL v24.2s, v24.2s, v20.2s
FMUL v26.2s, v26.2s, v20.2s
FMUL v28.2s, v28.2s, v20.2s
FMUL v30.2s, v30.2s, v20.2s
# Clamp
FMAX v24.2s, v24.2s, v4.2s
SUBS x1, x1, 2
FMAX v26.2s, v26.2s, v4.2s
FMAX v28.2s, v28.2s, v4.2s
FMAX v30.2s, v30.2s, v4.2s
FMIN v24.2s, v24.2s, v5.2s
FMIN v26.2s, v26.2s, v5.2s
FMIN v28.2s, v28.2s, v5.2s
FMIN v30.2s, v30.2s, v5.2s
# Store full 4 x 2
B.LO 5f
$if INC:
ST1 {v30.8b}, [x7], x14
SUB x3, x3, x2 // a0 -= kc
ST1 {v28.8b}, [x10], x14
SUB x11, x11, x2 // a1 -= kc
ST1 {v26.8b}, [x9], x14
SUB x12, x12, x2 // a2 -= kc
ST1 {v24.8b}, [x6], x14
SUB x4, x4, x2 // a3 -= kc
$else:
ST1 {v24.8b}, [x6], x14
SUB x3, x3, x2 // a0 -= kc
ST1 {v26.8b}, [x9], x14
SUB x11, x11, x2 // a1 -= kc
ST1 {v28.8b}, [x10], x14
SUB x12, x12, x2 // a2 -= kc
ST1 {v30.8b}, [x7], x14
SUB x4, x4, x2 // a3 -= kc
B.HI 0b
RET
3:
ADD x0, x0, 16
FADDP v24.4s, v24.4s, v25.4s
FADDP v26.4s, v26.4s, v27.4s
FADDP v28.4s, v28.4s, v29.4s
FADDP v30.4s, v30.4s, v31.4s
FADDP v24.4s, v24.4s, v24.4s
FADDP v26.4s, v26.4s, v26.4s
FADDP v28.4s, v28.4s, v28.4s
FADDP v30.4s, v30.4s, v30.4s
# Remainder- 1 float of A (4 bytes)
4:
$if DATATYPE == "F32":
LDR s0, [x3], 4
LDR d20, [x5], 8
LDR s1, [x11], 4
LDR s2, [x12], 4
LDR s3, [x4], 4
$else:
LDR h20, [x5], 2
LDR s0, [x3], 4
SXTL v20.8h, v20.8b
LDR s1, [x11], 4
SXTL v20.4s, v20.4h
LDR s2, [x12], 4
SCVTF v20.2s, v20.2s
LDR s3, [x4], 4
SUBS x0, x0, 4
FMLA v24.2s, v20.2s, v0.s[0]
FMLA v26.2s, v20.2s, v1.s[0]
FMLA v28.2s, v20.2s, v2.s[0]
FMLA v30.2s, v20.2s, v3.s[0]
B.HI 4b
B 2b
# Store odd width
5:
$if INC:
STR s30, [x7]
STR s28, [x10]
STR s26, [x9]
STR s24, [x6]
$else:
STR s24, [x6]
STR s26, [x9]
STR s28, [x10]
STR s30, [x7]
RET
END_FUNCTION xnn_${DATATYPE_SPEC}_gemm${"inc" if INC else ""}_minmax_ukernel_4x2__asm_aarch64_neonfma_ld128
#ifdef __ELF__
.section ".note.GNU-stack","",%progbits
#endif
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