Adder

The addition module or adder is a central circuit used by several functional blocks. It is, of course used in the ALU but the stack control and memory addressing circuits also require adders. In many designs, the ALU may be used to compute the addressing offsets. This design avoids the timing and switching issues that imposes by duplicating the circuitry needed. There are few negatives to this approach since there is no cost to simply duplicating circuits.

An adder module simply takes two numbers and adds them together. Subtraction (of 2's complement operands) may be performed by negating the subtrahend before adding it and such negation is done with an additional input stage. Each input includes this pre-processing stage which may be programmed with various functions.

## Status Bits

In addition to doing the basic addition calculation an adder module is expected to output several status code bits. This design includes the codes N (negative), C (carry-out), Z (zero result) and O (overflow). Computation of these result status bits requires additional time after the result is computed. They are integrated into the system in such a way that they may be determined for any value in the 'accumulator' (TOS) register. Overflow is not the same as carry-out. It serves a similar purpose but is meant for use in signed operand instructions only.

Carry-out is computed in parallel with the sum in each stage. The carry out of the final stage is simply fed to the input of a latch to await the latch activation.

??? The rest of the bits require the final result to be available and thus delay the availability of these status indicators. Up to 2 extra tics are needed before they can be latched. ???

Zero detect uses a ripple-through mechanism like carry does. The lowest two hexes are fed to a single detector while the top 2 are fed to another. The outputs of these stages are fed to a third detector which computed the state of the entire output sum. This final bank can be used to detect the negative state as well.

## Electric Design

This environment allows the use of a single wire to carry a 4-bit or Hex signal. This allows us to compute our sum on 4 bits at one time, rather than 1. See the block diagram below for an example of an 8 bit design.

This is a basic 2-stage adder without a carry input. It could be used in stack control or for offset addressing calculations. The low-order stage is comprised of the two blocks at the top and the next higher stage is enclosed by the dashed line box.

The memory bank is used for each of the processing blocks by simply programming it differently. The 'C' block calculates whether a carry out is generated by the addition function. It outputs an '1' if so. The '+' blocks output the numeric sum of its two inputs.

Because there are 4 status bits they will be combined into a single hex value at the latch. They may be read and used by appropriate machine instructions. Other instructions will clear or set them as needed.

# 16-bit adder

As you can see, the memory bank lets us compute a 16 bit sum in only 5 system tics (gate delays). This is a tremendous advantage over the usual method of a single bit per stage which can take up to 32 gate delays! The 'OR' gate on the carry signal is just there to represent the wired-OR of the two bank outputs.