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702094 | |operational-amplifier|bjt|frequency|sine| | <p>You should be able to get to 4.8V peak with minimal changes:</p>
<p><img src="https://i.stack.imgur.com/5qVOg.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f5qVOg.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>This approach is limited not by the B-E drop and the op amp achieving full scale, but only by the saturation voltage of the (PNP) BJT. A (P-channel) MOSFET may perform even better.</p>
| <p>I am working on creating a 10-20KHz 0-5V sine wave feeding a coil which would be around 450uH. At this stage I am stuck in that I can produce the sine wave using an STM32 or a DDS IC but that will not give me a high current. So my first thought was to use a power amplifier such as OPA564 from TI but since I will be making multiple test boards and the OPA564 is too costly so I left that aside.
Now I am doing some multisim simulations with a basic op amp such as TLV2371 so that I can follow the sine wave coming from STM32 or DDC IC. On the output of this op amp I use a BJT to increase the current required for the coil to operate.
<a href="https://i.stack.imgur.com/gSmdz.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gSmdz.png" alt="enter image description here" /></a></p>
<p>This works only if I increase the VCC and VCC1 to a higher Voltage say 7V. But I dont want to do that because I will have to include a circuit for boosting voltage. Here is a snapshot of the scope with 7V VCC the output follows the input sine wave.
<a href="https://i.stack.imgur.com/36Gsd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/36Gsd.png" alt="enter image description here" /></a></p>
<p>But when I reduce the voltage back to 5V the output is clipped to 0-3.89V. I would like to be able to get the same sine wave at the output but with a high current so that the coil can work properly. Here is the image of scope showing voltage clipped to 0-3.89V.</p>
<p><a href="https://i.stack.imgur.com/gdoiJ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gdoiJ.png" alt="enter image description here" /></a></p>
<p>Is there any method which can be used to achieve the 10-20Khz 0-5V sine wave and provide around 1 amps of current to the coil?</p>
| BJT as current buffer for op amp | 2024-02-19T18:34:10.560 |
702098 | |bms| | <p>Connecting battery cells with identical chemistry (Li-Ion in this case) in parallel is quite a common approach to get higher capacity. Electrically, you can treat the resulting parallel combination of cells as one single cell with larger capacity. As a result, <strong>you need only one BMS</strong>.</p>
<p>However, with cells as large as the ones you're using (8200mAh is no joke), you should <strong>add a fuse to each individual cell</strong>. This prevents the other cells from back-feeding current in case one of them becomes defective and shorts out. For 8200mAh cells, 10A slow-blow fuses should work okay (approximately 1C discharge rate). Make sure to charge every cell to exactly the same voltage before connecting them in parallel via the fuses.</p>
<p>Last but not least, use a proper spot welder to attach nickel strip to your battery cells. <strong>Do not, under any circumstances, solder directly to Li-Ion cells!</strong> Doing so will locally boil the solvent within the cells, which degrades them chemically and renders them unsafe to use. If you have already done this, please dispose of those cells properly.</p>
<p>It's also possible to buy cylindrical Li-Ion cells with pre-attached soldering tabs in case you can't spot-weld them yourself. That way you can solder to the tabs without risk of heating the cell itself.</p>
| <p>I intend to put 4 X 3.7V 32650 Rechargeable Battery 8200mAh in parallel to keep 3.7V but increase the amperage so the battery last longer.</p>
<p>Looking around is very confusing if for paralel I need or no a BMS or 4 each battery has one.</p>
| 4P 3.7V 32650 Rechargeable Battery 8200mAh needs 1 , 4 BMS or none? | 2024-02-19T19:42:36.207 |
702110 | |flyback|ac-dc|bridge-rectifier| | <blockquote>
<p><em>Will this create a short circuit that links NEUTRAL and LINE? It looks
like it shorts one of the diodes in the diode bridge.</em></p>
</blockquote>
<p>Correct; it is really terrible advice.</p>
<blockquote>
<p><em>Even if we did not short the diode bridge and only shorted across PRI
and SEC, will this cause the converter to become non-functional? I am
unsure on this; yes I know that it removes the isolation, but I'm
wondering whether even if we did this will it cause the converter to
not work at all.</em></p>
</blockquote>
<p>It will still work but, as you state, isolation is lost.</p>
<blockquote>
<p><em>Is the best course of action to connect a capacitor across PRI and
SEC?</em></p>
</blockquote>
<p>This is done a lot of the time to reduce conducted and radiated emissions from the isolated secondary winding circuits. It's usually in the region of 470 pF to 4.7 nF and, it has to be a properly rated capacitor for the job (with regards to safety).</p>
<blockquote>
<p><em>I think this is colossally dumb</em></p>
</blockquote>
<p>Sounds like that; now you can judge the skills of the person who told you this. This of course is a hidden benefit LOL.</p>
| <p>I am designing a flyback converter and I am being told to make the ground net connections as shown in the image below.</p>
<p><a href="https://i.stack.imgur.com/M80N5.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/M80N5.png" alt="enter image description here" /></a></p>
<p>I think this is colossally dumb because it eliminates PRI and SEC isolation. I have two questions about this that are safety and function related:</p>
<ol>
<li>Will this create a short circuit that links NEUTRAL and LINE? It looks like it shorts one of the diodes in the diode bridge.</li>
<li>Even if we did not short the diode bridge and only shorted across PRI and SEC, will this cause the converter to become non-functional? I am unsure on this; yes I know that it removes the isolation, but I'm wondering whether even if we did this will it cause the converter to not work at all.</li>
<li>Is the best course of action to connect a capacitor across PRI and SEC?</li>
</ol>
| Ground connections around bridge rectifier in flyback converter | 2024-02-19T21:59:27.523 |
702113 | |circuit-design|shift-register| | <p>Don't be silly. <strong>Use an MCU.</strong></p>
<p>Why don't you (I) want to use an MCU?</p>
<ul>
<li>I really, really want synchronous updates. Latching shift registers are about as synchronous as is physically possible, since all output bits get set in parallel.</li>
<li>Achieving something similar <em>without</em> shift registers requires something with at least N parallel outputs. An MCU with that many outputs is big, harder to work with, and unless it can do parallel updates on N pins at once, updates are only almost-synchronous.</li>
<li>I don't want to shove an MCU in between the MCU that's already upstream and feeding whatever <em>actually</em> drives the display. I also don't want to deal with the programming of something that's essentially acting as a bit relay.</li>
</ul>
<p>...but vir <a href="https://electronics.stackexchange.com/a/702115/232742">has the right idea</a>; don't stick it in <em>series</em>, stick it in <em>parallel</em>. (I'm going to give vir credit even though I came up with this independently and my take is slightly different.)</p>
<p>Now, I <em>could</em> do what vir suggested and count data bits. If N was terribly mismatched from the number of shift register bits (which must be a multiple of some power-of-two; in my case, given I'm probably going to use HC595s, it must be a multiple of 8), that might be worth the extra (programming) complexity.</p>
<p>Since we're sticking to my original plan of abusing the final carry bit, using an MCU is dead simple. One DIO pin connects to the final carry, one to LATCH CLOCK, and one to RESET. The logic is:</p>
<pre><code>flush:
write(P_LATCH, HIGH)
delay(T_LATCH)
write(P_LATCH, LOW)
write(P_RESET, LOW)
delay(T_RESET)
write(P_RESET, HIGH)
main:
// set pin modes
write(P_RESET, LOW)
delay(T_STARTUP)
write(P_RESET, HIGH)
set_interrupt(P_CARRY, RISING, flush)
</code></pre>
<p><strong>That's it.</strong> Dead simple MCU logic that's totally independent of the upstream MCU feeding the shift registers. (Note that <code>P_RESET</code> is the output pin connected to the <em>shift register</em> reset pins, not the MCU's own reset pin.)</p>
<p>This approach avoids all the reasons why I didn't want to use an MCU, and because it's very amenable to being implemented with something like an ATtiny4/5/9/10, the footprint (SOT-23-6!) is tiny. Realistically, the BOM cost for a small-run project is probably superior with this approach, the circuitry is dead simple, and the probability of any other approach needing <em>more</em> board space is extremely high.</p>
| <p>Say I have an N-bit display driven with a series of interlinked HC595-type shift registers.</p>
<p>I'd like to drive this using only two wires (Data/Clock; assume power and ground are otherwise present). In other words, I am looking for a design such that when a '1' "spills" from the Nth bit of the shift register bank, it trips the latch on the registers and resets all of their "working" bits to '0'. (Okay, realistically, this will probably only work with N being a multiple of 8, and padding my actual data accordingly. That's fine. Assume henceforth that N is a multiple of 8.)</p>
<p>The idea is that I push N+1 '0's into the setup (i.e. pulse the Clock line N times) to reset it to a known state, after which every N+1 bits (the first must be '1') will replace the data and trigger the outputs to update.</p>
<p>How might I accomplish this?</p>
<p>(Note that I have full control over the C/D lines, and can do 'tricksy' things with timing if it helps. The real goal is a) to avoid needing a third logic line and/or a full MCU on the receiving end, and b) to have fully synchronous display updates, i.e. why I'm not just using something like a TM1637.)</p>
| Driving N-bit display with two wires and ~N+1 bits? | 2024-02-19T22:32:54.827 |
702114 | |circuit-design|dc-motor|circuit-protection| | <p>Another approach is to use MOSFETs in the H-bridge. The body diodes function as commutation diodes.</p>
<p>The circuit below also gets rid of the comparator IC :) The MOSFETs should be small surface-mount parts rated at least 2A continuous drain current. D1-D3 are silicon diodes. D4 and D5 are yellow or green LEDs. They indicate motor direction as well as reduce shoot-through current in the H-bridge.</p>
<p><img src="https://i.stack.imgur.com/gqGbf.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fgqGbf.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
| <p>I'm attempting to make a circuit for controlling the direction of a DC motor by comparing two photo resistors, so far i managed to make the logic of swapping polarities, amplify the output and connect it to a motor, however when the polarities swap i noticed an insanely high voltage spike on the motor.
I tried to simply add a diode before realizing it only works for one flow direction. any way to remove this spike both ways?
<a href="https://i.stack.imgur.com/Efx5e.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Efx5e.png" alt="Circuit Schematic" /></a></p>
| Any way to remove the voltage impulse of DC motors, both ways? | 2024-02-19T22:39:51.740 |
702122 | |measurement|temperature|temperature-coefficient|temperature-drift|tempco| | <blockquote>
<p>if my application isn't rigorous enough to be relevant to this question, please throw out my idea of how to use it, and please tell me anyway about the metrology applications of these two resistors,</p>
</blockquote>
<p>These resistors arise in applications where analysis of system performance substantiates their specifications. They are used when you design the system and it turns out that unless the resistors are this good, it won't work. Not the other way round.</p>
<p>That's a <strong>whole lot</strong> of different applications. In fact, you could write an entire book about how such resistors are applied in practice. The question lacks focus.</p>
<blockquote>
<p>[please tell me] how much better the one is than the other</p>
</blockquote>
<p>One has TCR of 0.0ppm/K. Taking rounding into account, that reads 0.0±0.05ppm/K. The other has TCR of 0.2ppm/K, and that reads 0.2±0.05ppm/K.</p>
<p>Worst case, the "better resistor" has 0.15/0.05=3x lower TCR than the "worse" one. Best case, the "better" resistor has 0.25/0.01=25x lower TCR than the "worse" one. That's just from marketing figures. Once you look at the specs in the datasheet, you'll see that the actual ratio at 25°C is within that 3-25x range.</p>
<p>What puzzles me is that you're trying to presumably use such resistors, but lack the ability to understand their datasheets. I claim that until you can read the entire datasheet and explain it to a 6-year-old without missing any critical details, you don't know nearly enough to use those resistors for anything other than display pieces.</p>
<blockquote>
<p>It has a "high" price of about $81.93</p>
</blockquote>
<p>Given their performance level, that's dirt cheap. Try making one of those resistors yourself for less than say $10k in time, materials and equipment. You'll spend about as much just renting the test equipment needed to measure the performance of your homemade resistors.</p>
<blockquote>
<p>I ultimately want to measure the efficiency of small buck, boost, and inverting power converters, including the boost Joule Thief, and the buck joule thief I came up with, and somebody else invented as well, but also the other ones that I study.</p>
</blockquote>
<p>TCR of those resistors is about 2 orders of magnitude beyond what you reasonably need. You don't need to measure the efficiency of those converters with more than say 0.05% resolution, and 1% accuracy. You'll be comparing one to another, so absolute accuracy isn't of much concern, as long as it doesn't drift too much over time and temperature. I doubt you'll be moving your test rig from room temperature to a sauna, right?</p>
<p>If the rest of the circuit doesn't cost more than the resistors, then probably you don't need those resistors. If the circuit is cheap, then it will perform poorly enough that the resistors won't make a difference. Precision costs money, generally speaking. To benefit from these resistors' TCR, you need to do a lot of work elsewhere in the circuit so that it is accurate enough to benefit from low TCR resistors. Even just to measure the TCR ±5°C around room temperature, you'll need a multimeter that costs 2 orders of magnitude more than one of the resistors, never mind a decent thermometer, and metrology knowhow.</p>
<p>In other words: you're hung up on one catchy spec of just few parts in the circuit, where you should be looking at system performance, and specifying that. Without system specs (none appear in the question), it's pointless to talk about TCRs of just a few components.</p>
| <p>I found a resistor at Digikey, and the TCR was quoted as being 0.0ppm/°C, and I had to check the datasheet just to refute my suspicion that it was a data entry error, and it looks real, but just how real is it? Has anybody used one of these, and measured the TCR and so can confirm this specification, or at least that you have used one of these? Here's the resistor:</p>
<p>1K ±0.1% Non-Inductive Metal Foil Through Hole Resistor (Datasheet: <a href="https://foilresistors.com/docs/63003/vhp100.pdf" rel="nofollow noreferrer">VPG Foil Resistors # Y00781K00000B9L</a>, <a href="https://www.digikey.com/en/products/detail/vpg-foil-resistors/Y00781K00000B9L/4219965" rel="nofollow noreferrer">Digikey # 804-1061-ND</a>). It has a "high" price of about $81.93 as of Feb. 19, 2024.</p>
<p>Please contrast with (Datasheet: <a href="https://foilresistors.com/docs/63106/VFCP.pdf" rel="nofollow noreferrer">VPG Foil Resistors # Y16311K00000T9R</a>, <a href="https://www.digikey.com/en/products/detail/vpg-foil-resistors/Y16311K00000T9R/4231688" rel="nofollow noreferrer">Digikey # Y1631-1.00KACT-ND</a>) having a ±0.2ppm/°C TCR but similar specifications and a $10.84 price: 1 kOhms ±0.01% Chip Resistor Non-Inductive Metal Foil.</p>
<p>I ultimately want to measure the efficiency of small buck, boost, and inverting power converters, including the boost Joule Thief, and the buck joule thief I came up with, and somebody else invented as well, but also the other ones that I study.</p>
<p>But if my application isn't rigorous enough to be relevant to this question, please throw out my idea of how to use it, and <strong>please tell me anyway about the metrology applications of these two resistors, and how much better the one is</strong> than the other. <strong>I'm sorry if this is not specific enough for you</strong>, but I'm sure that I will want to measure resistors, or my own custom-made, non-inductive, wire-wrapped resistors, or something else yet to be invented.</p>
<hr />
<p>Edit 1:</p>
<p>Responding to a commenter, my question is regarding the advertised specification on the Digikey website as shown at the bottom of the screen shot below:</p>
<p><a href="https://i.stack.imgur.com/HR1NZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HR1NZ.png" alt="enter image description here" /></a></p>
<hr />
<p>See also the statement of essentially zero TCR on the data sheet:</p>
<p><a href="https://i.stack.imgur.com/h2Rli.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/h2Rli.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/jBBXq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jBBXq.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/RmNnI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RmNnI.png" alt="enter image description here" /></a></p>
<hr />
<p>Edit 2:</p>
<p>Mattman944 commented:</p>
<blockquote>
<p>Do you really need this precision? Realize that most engineers will go through their entire career without needing a resistor this precise.</p>
</blockquote>
<p>Here's my reply:</p>
<blockquote>
<p>I am insatiably curious, and really want to learn this stuff. If you could answer the question please that would be great, otherwise the specifics have already been given in the question, and that was to prevent an extended chat, which is what we'll get if you ignore my question. Please search for the word "sorry" in my question, and read that section again, thank you. Isn't this a good question? Shouldn't other engineers know the answer to this question? I'm not the sole audience. Avoid extended chat and answer the question, please!</p>
</blockquote>
<hr />
<p>Edit 3:</p>
<p>Nobody was able to see past the example application I gave of measurement of small power converters. Since I still want to understand this, I am adopting a new project for the sake of this question:</p>
<p>Please disregard my former project. Instead, I'm performing the <a href="https://www.google.com/search?q=jeff+dahn+dalhousie+microcalorimetry" rel="nofollow noreferrer">microcalorimetry measurement of real-time heat-related battery degradation</a> to certify batches of Li-ion cells in various capacities for customers according to important work that <a href="https://en.m.wikipedia.org/wiki/Jeff_Dahn" rel="nofollow noreferrer">Jeff Dahn</a>. pioneered... in order to start a company and pay several EE salaries. Both very high precision and accuracy are required. Metrology class components are now justified.</p>
<hr />
<p>Edit 4:</p>
<p>Spehro Pefhany commented:</p>
<blockquote>
<p>Batteries change capacity by perhaps 0.5%/°C (5000 ppm). I don't see how you could justify the need for sub-single digit ppm with that kind of temperature dependency. I've been involved in a couple projects where it was actually justified, mostly because the force involved was so weak (gravity).</p>
</blockquote>
<p>My reply:</p>
<blockquote>
<p>That is an outdated method of predicting cell lifetimes debunked in <a href="https://m.youtube.com/watch?v=pxP0Cu00sZs" rel="nofollow noreferrer">this video by Jeff Dahn</a>, an outdated method that failed Nissan in their Leaf EV, a tragic 37% capacity loss in 2 years, as stated in the class-action lawsuit filed in Southern California and Arizona about the "Thermal Management Defect". To predict cell lifetimes for an EV in hot Arizona, one must measure the heat of the parasitic chemical reactions going on inside the cell -- for instance, they consider 100uW to be very bad. To measure quality cells (additive soup effectiveness), they first used a microcalorimeter having a sensitivity of 10nW, and a baseline stability of 500nW per month, with which they now accurately predicts cell lifetimes in weeks vs years. All this in the linked video which IMHO every EE who deals with Li-ion should watch, and know.</p>
</blockquote>
| How "Zero" is this supposedly Zero-TCR resistor? And how much better is it than this other one? | 2024-02-19T23:33:37.943 |
702125 | |connector|testing|probe|header|plated-through-holes| | <p>This is the fourth time I have seen this question asked in a forum. In none of these cases has anyone been able to identify such a plug. Yet, I have seen them used in a lab. I looked and looked, and I have never found them for sale. Sorry to say.</p>
<p>In lack of that ideal solution, the next best solutions to connect to pads in a line spaced 2.54 mm I have seen in those forums are:</p>
<ul>
<li>Use a pin header and let the weight of the cable tilt the pins so that they contact the barrels inside the vias. This is good enough for a short test or for programming.</li>
<li>Use a pin header and bend every other pin slightly, staggering them, then shove the pin header in the line of pads. The pins with press against the barrels inside the vias due to their elasticity</li>
<li>Shove the square terminals for a power connector into the holes, deforming the vias and connecting through interference fit</li>
<li>Use a <a href="https://rads.stackoverflow.com/amzn/click/com/B0BR7Y72MH" rel="nofollow noreferrer" rel="nofollow noreferrer">programming clip with test fixture probes</a></li>
</ul>
<p>I know these solutions are not ideal, but that's the best workarounds that have been suggested.</p>
| <p>Are there probes that are designed to insert snugly into 40-mil holes (about the size of those needed by a DuPont connector)?</p>
<p>I am thinking of something that looks like a banana plug with springs on the side, but is very small so that it is easy to insert into a plated through hole without soldering a header in place, but I am not sure what to search for because I do not know what they are called.</p>
<p>Question:</p>
<ul>
<li>Do small sprung PTH probes exist?</li>
<li>What are they called?</li>
</ul>
| What type of probes are used to connect to plated-through-holes without soldering a pin into the socket? | 2024-02-20T01:03:15.450 |
702153 | |transformer| | <p>I would think that a transformer have certain Technical capeabilities. VxI as per ohms law must be applied. But it will depend on harmonics, Capacitance, reactance and resistance of the primary which have an effect also on the secondary (on a direct coupled inductor) like self inductance, back e. m. f. On switch-on, which alters the power in the circuit in the transformer t. i. with a resistance and before back E. M. F. is realized a higher Wattage will be read but once back E. M. F. is reached self inductance in the primary, secondary and inductive load will use less power than with a resistor. Hence if an inverter controlled inductor drive supply is used spikes will be eradicated. (Cos phi must be as close to unity as possible)</p>
| <p>Since the resistor is connected directly to the secondary, its voltage will all the time equal to the induced emf across the secondary. In addition, since this is an ideal transformer, the input power = the output power, but the output power is the same as the power dissipated by the resistor. Therefore, no matter how one alters the turns ratio, the resistor dissipates the same power nevertheless. Is what I am saying right?</p>
| A resistor connected directly to the secondary of an ideal transformer can't consume any less power whatever the turns ratio | 2024-02-20T07:23:07.527 |
702168 | |operational-amplifier| | <blockquote>
<p><em>how do I get the amp to output a range from 0 to 9v? is it just by
supplying it with 9v? I am using a ADA4522-1</em></p>
</blockquote>
<p>That op-amp is really good but, as with any rail-to-rail output op-amp, it can't quite reach an output voltage of 9 volts when the positive supply is fixed at 9 volts. You might get to within 30 mV of 9 volts so, I would recommend using a 10 volt supply to achieve a 9 volt output.</p>
<p>Remember also that this applies to the op-amp being able to reach 0 volts; there will be a limit to how low the output can go i.e. although the op-amp is described as output rail-to-rail, it's a small fib.</p>
<blockquote>
<p><em>how do I know what should be the resistance of one of the resisters
R1(Rf) and R2 to be able to calculate the resistance of the other?</em></p>
</blockquote>
<p>As with most op-amps of this type, it is usual to nominally choose a feedback resistor (Rf/R1) of around 10 kΩ. But this could be from 1 kΩ to 100 kΩ. From the you can calculate R2 using the gain equation.</p>
<blockquote>
<p><em>This other circuit diagram which I am a bit unsure about is the power
supply for the accelerometer, op-amp and PLC, does that look ok to
expert eyes? Any comment much appreciated.</em></p>
</blockquote>
<p>It doesn't have any obvious errors. It has omissions such as a localized power supply decoupling capacitor for the op-amp and maybe, you could add a series resistor of maybe 1 kΩ in the feed to the PLC. The accelerator IC might have some special requirements such as supply decoupling and output load resistor but, that cannot be determined by your information.</p>
<blockquote>
<p><em>what might be the meaning of the line from 0v to the unconnected arrow
up to Vout on the right?</em></p>
</blockquote>
<p>Does this help: -</p>
<p><a href="https://i.stack.imgur.com/76PaO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/76PaO.png" alt="enter image description here" /></a></p>
| <p>In this circuit diagram <a href="https://www.electronics-tutorials.ws/opamp/opamp_3.html" rel="nofollow noreferrer">from Electronics-tutorials.ws</a> what might be the meaning of the line from 0v to the unconnected arrow up to Vout on the right?</p>
<p><a href="https://i.stack.imgur.com/jA4Q9.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jA4Q9.png" alt="non-inverting operational amplifier" /></a></p>
<p>I have found lots of higher level explanations of how to use op-amps but the most basic stuff is left out. So I have to ask how do I get the amp to output a range from 0 to 9v? is it just by supplying it with 9v? I am using a ADA4522-1 <a href="https://www.farnell.com/datasheets/3757612.pdf" rel="nofollow noreferrer">Farnell</a>
In that case how do I know what should be the resistance of one of the resisters R1(Rf) and R2 to be able to calculate the resistance of the other?
This other circuit diagram which I am a bit unsure about is the power supply for the accelerometer, op-amp and PLC, does that look ok to expert eyes? Any comment much appreciated.</p>
<p><a href="https://i.stack.imgur.com/29bZg.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/29bZg.jpg" alt="enter image description here" /></a></p>
| Some basic non-inverting op-amp circuit questions | 2024-02-20T09:10:55.007 |
702186 | |operational-amplifier|analog|integrated-circuit| | <p>Two-stage (and also three- or more-stage) amplifiers have more phase shift and higher open-loop gain, which makes it more difficult to apply negative feedback in a stable manner.</p>
<p>And this feedback is usually required for reasons including - but not limited to - getting a well-determined gain level, a specific filter behavior, to reduce distortion, or to create the desired input and output impedances.</p>
<p>PS: also for obtaining the desired DC operating point. (As I said: not limited to what I already mentioned...)</p>
| <p>Razavi motivated the design of the Gain-Boosting configuration by stating that,</p>
<blockquote>
<p>The limited gain of the one-stage op-amps studied in Sec. 9.2 and the difficulties in using two-stage op-amps at high speeds have prompted extensive work on new topologies.</p>
</blockquote>
<p><a href="https://i.stack.imgur.com/yBkSd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yBkSd.png" alt="enter image description here" /></a>
I have tried to Google the reason why it is difficult to use two-stage op-amps at high speeds, but haven't found any explanation. For engineers with experience in designing high-speed amplifiers, could anyone provide an explanation or a reference related to this question?</p>
| Why it is difficult to use two-stage op-amps at high speeds? | 2024-02-20T12:15:23.020 |
702231 | |ethernet|pinout|rj45| | <p>The connection is not obvious, but as the pair used for pins 3&6 share a path between two transfoŕmer center taps via two 75 ohm resistors, there must be good enough signal for the link to work.</p>
| <p>I designed a board recently that accidentally had an incorrect pinout on the RJ45 jack for Ethernet. Instead of following TIA568, I instead routed it straight-through:</p>
<p><a href="https://i.stack.imgur.com/2hhqe.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2hhqe.png" alt="RJ45 routed straight-through" /></a></p>
<p>Oh well, simple mistake, resolvable with a custom patch cable. But just for fun, I tried using a normal patch cable and connected it to a switch... And got a link?? Only a 100BASE-TX link instead of the gigabit link that I eventually wanted, but still, I was expecting no link at all with this messed up pinout!</p>
<p>I've seen a few features that can resolve typical cabling issues, such as:</p>
<ul>
<li>Auto polarity inversion</li>
<li>Auto MDI/MDI-X
<ul>
<li>this can swap pairs A/B and C/D independently, but usually no other swaps.</li>
</ul>
</li>
<li>Autonegotiation (mostly for the PHYs though)</li>
</ul>
<p>However, my situation is that the pair on pins 1 and 2 is routed properly; that's one half of the 100BASE-TX connection. But then, the other half that should be on pins 3 and 6 is actually on pins 3 and 4. Since this results in the signal being split across pairs on the receiving side, I don't think that polarity inversion or auto-crossover could fix this.</p>
<p>And yet, despite this interface being clearly wrong, I still got a 100BASE-TX link! My question is, how? What mechanism allows for this incorrect pinout to wind up working somehow, albeit in a limited fashion? This has occurred across multiple models of PHY on my board and multiple test devices (switches, Ethernet cards, Ethernet adapters) so it doesn't seem to be an isolated event either.</p>
<p>Full schematic from the PHY (a TI DP83867) to the problem port via the transformer:
<a href="https://i.stack.imgur.com/e9Qyt.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/e9Qyt.png" alt="PHY schematic" /></a></p>
| Ethernet with incorrect pinout still makes link? | 2024-02-20T18:35:56.643 |
702233 | |pcb|diodes|multimeter|testing|component-failure| | <p>Maybe. Let's assume any capacitor is discharged fully, otherwise you can get odd effects such as negative resistance readings or smoke emissions from the DMM. Let's also assume that you know it's actually a diode and not something diode-like in appearance like a diac.</p>
<p>Even if you don't understand the circuit, if you get a higher than 0.6V-ish reading in <em>both</em> directions then the diode is bad. That's unlikely in practice without corresponding visual indication such as a cracked diode or diode with the leads blown off it.</p>
<p>If you are getting a dead short in both directions it may be worth unsoldering the diode to measure it out of circuit. This is the more likely case for a diode failure without corresponding visual and/or olfactory sequelae.</p>
<p>A reading of 0.6-ish in one direction and something rather higher in the other direction is <em>probably</em> an indication the diode is okay.</p>
| <p>I have tested a bunch of diodes in situ on a washing machine PCB. One comes back as expected with values of 0.6v and OL depending on testing direction. The rest show the same 0.6v in the expected direction while 1.4v where I would expect OL. The resources I have read suggest that failed diodes should either show the 0.6 OR OL in both directions and make no mention of a higher value.</p>
<p>Does this high value indicate a failure of the diode or an error in attempting to test in situ?</p>
| Can diodes be tested successfully in situ? | 2024-02-20T18:41:27.287 |
702253 | |brushless-dc-motor|motor-controller| | <p>In order todo that you need to make some assumption.
Give motor phase U,V,W which we give power through U and V as shown.
<a href="https://i.stack.imgur.com/gq8Ui.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gq8Ui.png" alt="enter image description here" /></a></p>
<p>In this case the real netral point will have voltage of <span class="math-container">\$V_M/2\$</span> by the voltage divider effect on winding resistant. we can simplify the circuit futhermore by
<a href="https://i.stack.imgur.com/0r7hS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0r7hS.png" alt="enter image description here" /></a></p>
<p>As the motor winding haver very small resitance campare to resistor in virtual ground, so we can ignore them.
<a href="https://i.stack.imgur.com/hZljA.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hZljA.png" alt="enter image description here" /></a>
From this simplified model you see the virtual nuetral voltage will equals to actual only if <span class="math-container">\$V_{EMF} = 0\$</span> and from voltage divider,
<span class="math-container">$$V_{VN} = \frac{1}{3} V_{EMF} + V_N$$</span>
Event it not equals but it suitable for zero crossing detection because when we measure <span class="math-container">\$V_{SENSE}\$</span> respect to <span class="math-container">\$V_{VN}\$</span> it will have same sign as <span class="math-container">\$V_{EMF}\$</span> and will equals to zero as <span class="math-container">\$V_{EMF} = 0\$</span></p>
<p>Note: The property I've used derive from equivalent of resistor circuit which I thought very useful for analyse this kind of problem.
<a href="https://i.stack.imgur.com/v42qO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/v42qO.png" alt="enter image description here" /></a></p>
| <p>I don't understand the concept of the "virtual neutral" point that's commonly used in BLDC motor controllers. I understand that it's a proxy for the back emf relative to the true neutral point of the motor, but I don't understand why it's accurate or why it works.</p>
<p>Consider the schematic shown below:</p>
<p><a href="https://i.stack.imgur.com/kFhQ1.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kFhQ1.jpg" alt="enter image description here" /></a></p>
<p>Here, the back emf of phase 1 is a trapezoidal function that's generated by sources V8 and V9.</p>
<p>The virtual neutral point is created by the resistor summing network of R2, R3 and R4.</p>
<p>If I perform the standard zero crossing checks of V(p1) > V(V_NEUTRAL_VIRT) and V(p1) < V(V_NEUTRAL_VIRT) then the switching does occur at the correct time for the motor RPM.</p>
<p>My confusion is coming from the fact that V_NEUTRAL_VIRT = V(p1) + V(p2) + V(p3) (or at least some factor of the 3 phase voltages) where V(p1) includes the back emf of the undriven phase. If that's compared to V(p1) then I don't follow how this correctly picks up the zero crossing points.</p>
<p>So my question is what is the justification for building the controller in such a way? I don't dispute that works, I just don't understand why it works.</p>
| Virtual Neutral in BLDC motor controller | 2024-02-20T22:03:30.663 |
702254 | |dac|component-selection|bandwidth|gain-bandwidth-product| | <blockquote>
<p><em>I'm struggling to understand what it means for a DAC to have a
Multiplying Bandwidth of 200kHz.</em></p>
</blockquote>
<p>Normally, most people use DACs with a fixed DC voltage on the reference pin. However, some DACs allow you to superimpose an AC signal on the reference pin(s). This allows the DAC to perform the function of a digital/analogue multiplier. In effect, the digital word is multiplied by the reference voltage. So, you get a multiplier. It can also be called a digitally controlled attenuator. It can also be called a modulator.</p>
<p>Topologically, it's also the basis of all digital potentiometers.</p>
<p>Hence "Multiplying Bandwidth" refers to the signal on the reference pin. The 3 dB bandwidth is 200 kHz for this particular model.</p>
| <p>I'm struggling to understand what it means for a DAC to have a Multiplying Bandwidth of 200kHz. Does it mean that the max frequency component in the DAC's output cannot exceed 200kHz for reliable operation?</p>
<p>Context: My project is to build a special arbitrary waveform signal generator, and currently I am planning on feeding a Parallel interface DAC with digital data to generate signals.</p>
<p>Also the relevant datasheet describes multiple DACs, I plan on using <a href="https://www.analog.com/en/products/ad5331.html" rel="nofollow noreferrer">AD5331</a> which has an unbuffered output (I guess that implies that they're not using an op amp at the DAC output) - if the definition of multiplying bandwidth only applies to DACs that contain amplifiers then would this spec be irrelevant to AD5331?</p>
<p>Following are relevant snippets from AD5331's (chosen DAC) datasheet:
<a href="https://i.stack.imgur.com/fhLkE.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/fhLkE.png" alt="Multiplying Bandwidth spec" /></a></p>
<p><a href="https://i.stack.imgur.com/pjcrT.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pjcrT.png" alt="Datasheet definition of Multiplying Bandwidth" /></a></p>
| How does the "Multiplying Bandwidth" specification relate to a DAC output's maximum bandwidth | 2024-02-20T22:04:21.337 |
702261 | |analog|integrated-circuit|maximum-ratings|common-source| | <p>I have just figured it out. <br />
First, my previous understanding is somehow swapped; I thought that Vdd is the minimum and <span class="math-container">\$V_{GS}-V_{TH}\$</span> is the maximum, which should be exactly the opposite. <br />
Secondly, for a CS stage like figure 4.3, the output voltage is exactly the Drain-Source voltage. The minimum requirement for the transistor to operate in the saturation region is when the Drain-Source voltage is equal to the overdrive voltage. That is to say:
<span class="math-container">$$V_{outmin}=V_{DS}=V_{OV}=V_{GS}-V_{TH}=V_{DD}-\frac{1}{2}K{V_{OV}}^2R_{d}$$</span>
And since the maximum voltage is just the supply voltage <span class="math-container">\$V_{dd}\$</span>,
we indeed have the maximum swing
<span class="math-container">$$V_{Omax}-V_{Omin}=V_{DD}-V_{OV}$$</span></p>
| <p>Razavi stated that</p>
<blockquote>
<p>the maximum output swing at X or Y is equal to <span class="math-container">\$V_{DD}−(V_{GS}−V_{TH})\$</span></p>
</blockquote>
<p>as shown in the following picture, the second picture is the Fig.4.3</p>
<p><a href="https://i.stack.imgur.com/7lu1v.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/7lu1v.png" alt="Razavi Chapter 4" /></a><br />
<a href="https://i.stack.imgur.com/jD7e2.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jD7e2.png" alt="Figure 9.4" /></a>
I don't understand why the equation for maximum output swing is written as..<br />
<span class="math-container">$$ V_{DD}-(V_{GS}-V_{TH}) \tag{1} $$</span>
?<br />
For a common source amplifier with a resistor load at drain, the output voltage should be
<span class="math-container">$$V_{out}=V_{DD}-I_{DS}R_{D} \tag{2}$$</span>
Due to equation 2, maximizing the output voltage swing entails maximizing the Drain-source current. I understand that the current maximizes when the drain-source voltage equals the overdrive voltage. If the above reasoning is correct, shouldn't the maximum output voltage be represent as<br />
<span class="math-container">$$V_{out}=V_{DD}-\frac{1}{2}K_n{V_{ov}}^2R_{D} \tag{3}$$</span>
instead of equation 1?</p>
<p>Reference: Razavi, Design of analog CMOS integrated circuits</p>
| For a MOS transistor, why is the maximum voltage of it be \$V_{dd}-V_{ov}\$? | 2024-02-20T23:13:24.730 |
702274 | |schematics| | <p>Y’all are overthinking this. Read as “What part of <em>bipolar</em> don’t you understand?”</p>
| <p>A t-shirt with this image showed up as a suggested purchase on one of the popular ecommerce sites. What does this circuit represent?</p>
<p><a href="https://i.stack.imgur.com/ENs0m.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/ENs0m.jpg" alt="enter image description here" /></a></p>
<p>Image source: <a href="https://www.aliexpress.us/item/3256804102990794.html" rel="noreferrer">AliExpress Electrical Engineer What Part of Don't You Understand T Shirt</a></p>
<p>Update: <a href="https://www.aliexpress.us/w/wholesale-what-part-of-dont-you-understand-tshirt.html" rel="noreferrer">Searching</a> on aliexpress.com for "What Part of Don't you Understand" reveals a variety of similar shirts with topics such as math, physics, hockey, etc., all with complicated and mostly implausible drawings related to the topic. So, it seems the humor is not based on the particular circuit (as I had thought), but on being a "complicated electronics drawing."
<a href="https://i.stack.imgur.com/hKx8w.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/hKx8w.jpg" alt="Several t-shirts" /></a></p>
| What does this circuit on a t-shirt do? | 2024-02-21T01:52:41.683 |
702289 | |pcb-design|transmission-line|termination| | <p>As previously answered, if the length is long relative to the rise time of the signal, then yes, you should treat the trace as a transmission line. A complication is that the trace will probably NOT be a 50 ohm transmission line.</p>
<p>I don't have the formulas for determining the impedance of a trace at my fingertips, but they are googleable. Trace width, spacing from ground plane(s), and the material of the PCB all come into play.</p>
<p>As for how to deal with it, assuming that 1) the trace is long enough that you have to deal with it, and 2) you know the trace impedance, there are two cases:</p>
<p>Case 1: trace impedance higher than 50 ohms. For this example, I'll assume the trace is 150 ohms. Terminate the trace with its own characteristic impedance, in this case a 150 ohm resistor. So now the trace is good. Moving back to the connector, you have a 150 ohm trace and you want 50 ohms. So you need to add a resistor in parallel with the trace (from connector to ground) to make the total impedance be 50 ohms. Standard parallel resistor math applies here: 1/(1/50-1/150)=75, so you need a 75 ohm resistor.</p>
<p>Case 2: trace impedance lower than 50 ohms. For example, suppose the trace impedance is 30 ohms. Terminate it with a 30 ohm resistor. At the connector, you have 30 ohms and you want 50, so you need to add a 20 ohm resistor in SERIES with the trace.</p>
<p>In both cases, both the cable and the trace will be properly terminated.</p>
| <p>Suppose I have a BNC in connector, terminated in parallel with a 50 ohm resistor. The PCB trace extends for about 5-7cm before the signal is 'read' by a power amplifier.</p>
<p>Should I treat this PCB trace as a transmission line, and terminate it before the amp input again?</p>
<p><a href="https://i.stack.imgur.com/lPOMu.png" rel="noreferrer"><img src="https://i.stack.imgur.com/lPOMu.png" alt="Schematic drawing" /></a></p>
| Should long PCB traces be treated as transmission lines? | 2024-02-21T04:45:43.253 |
702294 | |pcb|identification|connector|surface-mount|header| | <p>Thanks to Nedd for assisting me finding the specific connector. Due to his in-depth details for a connector. I have ultimately found one.</p>
<p>Basically this is a Chinese website that specifically categorize LED bulbs connector</p>
<p>You can view them here
<a href="https://www.jkuncn.com/products/led-series/led-bulb-connector" rel="nofollow noreferrer">https://www.jkuncn.com/products/led-series/led-bulb-connector</a></p>
| <p>I am reverse engineering a smart LED bulb. I have almost got the all of the components, but one thing I couldn't get is the connector highlighted below.</p>
<p>The LED bulb has 2 PCBs: the vertical PCB has a right angle male header that mates with the horizontal PCB's female SMD connector, which is what I am looking for.</p>
<p>Does anyone know what this female connector is called?</p>
<p>As shown in this <a href="https://www.ednasia.com/teardown-bluetooth-enhanced-led-bulb/" rel="noreferrer">LED bulb tear-down</a>.</p>
<p><a href="https://i.stack.imgur.com/rspOr.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/rspOr.jpg" alt="enter image description here" /></a></p>
| Which type of female connector is this? | 2024-02-21T05:31:42.347 |
702298 | |filter|frequency-response| | <p>Here is the result. The amplitude is 92% peak-to-peak, so periblepsis wasn't far off.</p>
<p><a href="https://i.stack.imgur.com/AFct1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AFct1.png" alt="enter image description here" /></a></p>
| <p>The square wave power is concentrated at the pole frequency with harmonics at integer multiples of this, so this main component would be phase shifted by -45 degrees and attenuated at .707*Vin and the lesser harmonics would be phased shifted by differing amounts but these higher frequency components would be attenuated more heavily from the output signal. Would the output approximately be another square wave phased shifted by -45 degrees?</p>
| Theoretically, if we send a square wave, of frequency equal to the pole frequency, through an RC lowpass filter is the output shifted by -45 degrees? | 2024-02-21T05:48:26.950 |
702301 | |circuit-design|battery-charging|solar-cell|mppt| | <p>Not a direct answer to your question here—see @hobbs for that—but,...</p>
<blockquote>
<p>From what I've read, the panels are supposed to match themselves to the voltage they are connected to, so even if they aren't at maximum efficiency they will be the correct voltage to the charge the battery.</p>
</blockquote>
<p>That might not mean what you think it means.</p>
<p>It does <em>not</em> mean that the panels know the safe voltage limits for the battery or, the recommended charging voltage. It does not mean that the voltage of the battery won't change when you make the connection. What it means is, any time you connect two or more two-terminal devices in parallel, you are <em>forcing</em> the voltage across all of the devices to be the same.</p>
<p>That's in accordance with <a href="https://en.wikipedia.org/wiki/Kirchhoff%27s_circuit_laws#Kirchhoff%27s_voltage_law" rel="nofollow noreferrer">Kirchoff's Voltage Law</a>.</p>
<p>Forcing a voltage across a device usually causes current and power to flow. How much current/power? Which way does it flow? What is the forced voltage?... Those answers can vary a lot depending on the kinds of devices that you're connecting together. At any given instant, it's something you can predict from the <a href="https://en.wikipedia.org/wiki/Current%E2%80%93voltage_characteristic" rel="nofollow noreferrer">Current-Voltage Characteristics</a> of the devices. But it can be complicated by the fact that the current-voltage characteristic of a device might not be constant. For a battery, the CV graph changes as the battery's state of charge changes. For a solar panel, it changes with the strength of the illumination.</p>
<p>@hobbs's answer speaks more to the specific case of a solar panel paralleled with a battery bank, but for whatever it's worth,...</p>
<p>A "smart" battery charger isolates it's input side from its output side. The voltages and currents on the two sides can be different from each other. On the output side, it tries to force a voltage and current that meet the needs of a known type and configuration of batteries. On the input side, an MPPT controller seeks the operating point on the solar panel's CV graph that gives the most power.</p>
| <p>I'm building a solar powered RC plane and need to design a power system to deliver power from the solar panels to the battery and motor.</p>
<p>I have an array of 38 C60 solar cells outputting 22.8V (0.6*38), and a 5S LiPo battery with a voltage of 18.5-21V. The problem is MPPT charge controllers are expensive and heavy, so I'm wondering if I can just hook them up directly with a diode to prevent reverse current through the solar cells.</p>
<p>From what I've read, the panels are supposed to match themselves to the voltage they are connected to, so even if they aren't at maximum efficiency they will be the correct voltage to the charge the battery. So if this is the case is there any risk of overcharging? And would this be detrimental to the battery health? There will also be times when the motor is drawing more power than the solar cells can provide; will the excess power be safely drawn from the battery in this situation?</p>
<p>Otherwise what other ways could I safely connect them together, preferably without using an MPPT charger?</p>
| Connecting solar cells directly to battery | 2024-02-21T06:18:10.507 |
702304 | |pcb|connector|surface-mount|footprint| | <p>The JST series was the clue I needed to find the GH line and compare the footprints and find the <a href="https://www.digikey.com/en/products/detail/jst-sales-america-inc/BM05B-GHS-TBT/807803" rel="nofollow noreferrer">header on Digikey</a></p>
<p>Will mark their answer as the solution once the parts arrive and I can confirm its an exact match!</p>
<p><a href="https://i.stack.imgur.com/MVbjv.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MVbjv.jpg" alt="seemingly matching jst gh footprint" /></a></p>
| <p>Doing some repair work on a <a href="https://usa.yamaha.com/products/musical_instruments/drums/finger-drum-pads/fgdp-30/index.html" rel="nofollow noreferrer">Yamaha FGDP-30</a> finger drumming instrument, and I came across this unpopulated footprint on the main PCB</p>
<p><a href="https://i.stack.imgur.com/1S8yV.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1S8yV.jpg" alt="pcb image with unpopulated footprint" /></a></p>
<p>The CN999 label and proximity to the main IC lead me to believe it may be some kind of debugging or programming port. It's a bit larger than the Micro USB footprint found elsewhere on the board, but I'm not discounting the possibility it is also a USB footprint of some kind. I'd just love to be able to toss a header on and see what it can be used for!</p>
<p><strong>Additional Info:</strong>
Per the comments/responses, here are a few more clues:</p>
<ul>
<li>The pin pitch seems to be 1.25/1.27mm</li>
<li>The IC its connected to isn't well documented, its a SWX03S from Yamaha, which seems to maybe be a Renesas platform</li>
</ul>
| What is this mystery footprint on my PCB? | 2024-02-21T06:57:00.867 |
702320 | |microcontroller|i2c| | <p>Clock stretching is part of <a href="https://en.wikipedia.org/wiki/I%C2%B2C#Clock_stretching_using_SCL" rel="nofollow noreferrer">the convention</a>.</p>
<p>In simple words is means that all devices on SCL are allowed to hold the line actively at LOW. Commonly a device holds the line (pun intended) to gain some time for internal processing. Only if all devices are fine to release SCL, it will rise to HIGH to designate the next data bit.</p>
<hr />
<p>Unfortunately, user manual and detailed documents for the MCU are behind a "pay wall," so this statement is the publicly visible source of conformance:</p>
<blockquote>
<p>The LPI2C implements logic support for standard-mode, fast-mode, fast-mode plus and ultra-fast modes of operation.</p>
</blockquote>
<p>(Chapter 2.2.11 of <a href="https://www.nxp.com/docs/en/data-sheet/K32L2Ax.pdf" rel="nofollow noreferrer">this data sheet</a>.)</p>
<p>This claim tells me that clock stretching is supported.</p>
<hr />
<p>Important hints are the minimum clock. The excerpts you show say "0 kHz," which means that it can be down to static.</p>
<p>The note you marked is also a hint that clock stretching is taken for granted.</p>
| <p>I need to select a microcontroller for an application. The specific requirement came from the firmware team is that the I2C present in the microcontroller should support clock stretching.</p>
<p>This microcontroller will be used in a TFT display so clock stretching is mandatory (from firmware team).</p>
<ol>
<li>How do I make sure that the I2C present in the microcontroller supports clock stretching?</li>
</ol>
<p>For example: I selected <a href="https://www.nxp.com/part/K32L2B31VFM0A#/" rel="nofollow noreferrer">this</a> microcontroller. In the I2C section I can see the word "stretch". I am sure that just by seeing the word "stretch" I can't confirm the controller supports I2C clock stretching.</p>
<p>Below is the information about I2C in the example microcontroller.</p>
<p><a href="https://i.stack.imgur.com/TE0XJ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/TE0XJ.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/neGkU.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/neGkU.png" alt="enter image description here" /></a></p>
| How to check if a microcontroller I2C supports clock stretching or not | 2024-02-21T08:36:37.083 |
702338 | |capacitor|dc-dc-converter|charging| | <p>I'm adding a second answer specifically for this circuit.</p>
<p>I thought about controlling a converter with an Attiny and the huge inductor that this implies, and felt a bit of nostalgia, so I designed an analog solution with a bit more "modern" performance.</p>
<p><a href="https://i.stack.imgur.com/HrHy5.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HrHy5.png" alt="enter image description here" /></a></p>
<p><strong>Bird's eye view:</strong></p>
<p>This is a hysteretic buck boost that regulates the inductor current and keeps it inside a specific range. The center of the range is the desired 5A average current, and the width of the range is the hysteresis. Basically, when the inductor current is too low, we turn on the MOSFET, and when current is too high, we turn it off. It's the simplest control algorithm possible, it's inherently stable, it doesn't need a clock, it has built-in overcurrent protection, etc.</p>
<ul>
<li><p>It's a 4 switch buck boost, with 2 FETs and 2 diodes.</p>
</li>
<li><p>Control signals at the bottom right (Buck and Boost) activate both phases.</p>
</li>
</ul>
<p><strong>Details:</strong></p>
<p>To make a hysteretic DC-DC converter we need to measure inductor current, feed it to a comparator with hysteresis, and drive the MOSFET.</p>
<p>"Measuring inductor current" is a bit more complicated than usual here, because both ends of the inductor are going to switch with large voltage swings: the left side in buck mode, the right side in boost mode.</p>
<p>It is much more convenient to sense the current in a place without too much voltage swing.</p>
<p>Thus, Q1,2,3,4,5 and associated passive components form a multitasking high and low side current sense amplifier.</p>
<p>On top we have a current mirror (Q1-Q3, suggest BCM857) so the emitters of both transistors are at the same potential. When a voltage drop appears on R5 due to the current we want to sense, current in R2 and R6 will thus be different, Q3 outputs this on its collector, which controls Q5, which applies feedback and zeros the voltage difference between the emitters of Q1 and Q3.</p>
<p>A side effect is that an image of the current we want to measure, which is IL, is output on the collector of Q5 and converted into a voltage by R8. Thus:</p>
<p><span class="math-container">\$ V_\text{R8} = I_L \cdot \frac{\text{R5}}{\text{R6}} \cdot \text{R8} \$</span>, i.e. we get about 1V/A on R8.</p>
<p>When MOSFET X1 is off, current flows through R11 instead. Now Q2 and Q4 stop pretending to be a current mirror for biasing the previous circuit, and instead take an active role and forward the voltage drop measured on R11 as current to the previous circuit, which outputs it. This mode will have higher offset voltage, which is not important because the boost phase is only a small part of the whole process.</p>
<p>Thus we have an image of the inductor current on R8.</p>
<p>The comparator does its job, with hysteresis, and generates the driving signals for the MOSFETs.</p>
<p>The "6.3V" source on the comparator input corresponds to the target current. By varying this voltage, average current can be adjusted.</p>
<p>The logic gates direct the signals to the appropriate MOSFET. The buck FET will need a bootstrapped driver, the boost FET is low-side so a simple low-side driver chip will do.</p>
<p>The OR gate ensures the buck FET stays on during the boost phase, otherwise the circuit would disconnect itself from the power supply.</p>
<p>The "Buck" signal works as global enable, and "Boost" is generated by a function source used as comparator, enabling the boost phase when output voltage is >12V and disabling it when the target voltage is reached.</p>
<p>Without inductor losses, estimated efficiency is around 93% so it's pretty neat for such a simple circuit.</p>
<p>With the part numbers shown, it will oscillate around 150kHz. This is pretty much as fast as the old LM393 can go. To shrink the inductor further, a faster comparator is needed. Most fast comparators run on 5V so a bit of scaling of resistor values would be needed.</p>
<p>It charges the 2200µF cap in 70ms. It should charge it a bit faster with a faster comparator, because excessive comparator delay from LM393 lets IL drop a little too much at high output voltage.</p>
<p>Most of the losses are in the MOSFETs, especially switching losses in the boost MOSFET which requires the most care. Using a larger inductor value reduces switching frequency and thus switching losses, but it increases inductor losses.</p>
<p>Here is a <a href="https://www.dropbox.com/scl/fi/aig9nc6fatuuvir9h2ywa/buckboost-2.cir?rlkey=lgi1bhjhy47nvuqamr7i649wi&dl=0" rel="nofollow noreferrer">link to the simulation file</a> which you can use with <a href="https://archive.org/details/mc12cd_202110" rel="nofollow noreferrer">Microcap</a>.</p>
| <p>I need to charge a 2200 µF capacitor to 59 V in around 100 ms from a 12 V battery. This converter needs to be at most 35 mm wide.</p>
<p>This requires the use of either a boost converter or a DC-DC flyback converter. Most commercial boost converters online are rated for up to around 40 V. Most 60 V flyback converters are too big to fit.</p>
<p>I initially wanted to design my own flyback DC-DC converter using an ATtiny85 (will this suffice or do I have to use a dedicated converter IC?) which takes 12 V, 5 A input and outputs 59 V, 1 A.</p>
<p>Are there any existing converters that already satisfy these conditions?</p>
<hr />
<p>Bobflux's solution:
<a href="https://i.stack.imgur.com/VHNlI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VHNlI.png" alt="enter image description here" /></a></p>
| How to charge a 2200 µF capacitor to 59 V in around 100 ms from a 12 V battery? | 2024-02-21T11:07:27.020 |
702339 | |microcontroller|stm32|esd|surge-protection| | <p>A general-purpose input circuit for industrial applications might look along the lines of this:</p>
<p><img src="https://i.stack.imgur.com/ZANHX.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fZANHX.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<ul>
<li>TVS rated according to what you expect, typically 24V nominal and if so maybe 36Vbr TVS. Or maybe 18Vbr for 12V nominal. Exact values are not critical, pick some standard one that's highly available. If rated at some 1500W "peak pulse", then that's good enough to handle most industry EMC requirements.</li>
<li>R2 is optional as a voltage divider together with R1 to take it down to MCU levels. If you don't need a voltage divider then remove R2 and put 10k or so at R1.</li>
<li>D1/D2 are plain old signal diodes to keep the voltage levels within limits. Assuming roughly 0.7Vfwd in D1, then a zener D3 of 0.7 + 2.6V will cap voltages at 3.3V, for a 3.3V MCU.</li>
<li>C1 is optional to filter misc radiated high frequency RF signals.</li>
<li>On top of it, the MCU is not older than 25 years back or so and therefore got half-decent protection diodes built-in.</li>
</ul>
<p>There's some sort of inflation of optocouplers on this site. When designing for tough environments, that should be far from the first tool you reach for.</p>
<p>That tool should rather be the <em>awesome</em> component known as a series resistor: they get rid of all manner of problems including ESD, accidental shorts, overcurrents, stray currents, circuit faults etc etc. Even EMI at some extent.</p>
<p>Optocouplers are generally to be avoided unless you are doing something specialized, like designing isolated power electronics or dealing with really bad grounds like in maritime applications, or perhaps when facing extreme EMI requirements (aerospace/military) that rule out inductance-based isolation.</p>
| <p>I'm working on a device which requires reading from a reed switch (slow, water meter) which should work in a bit noisy environment (a few relays switching back/forth on the same board, triacs and contactors for 3-phase motors distanced however electrically connected to the same STM32).
I would like to get rid of ringing/induced voltage spikes/ESDs. IN1 is connected to the reed switch, other terminal goes to a GND.</p>
<p><a href="https://i.stack.imgur.com/BpFax.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/BpFax.png" alt="STM32 input protection" /></a></p>
<p>STM32 is powered from a 3V3 rail, which is formed from a 12V rail by a DC-DC.
I've used optocoupler to avoid possible ESD voltage inducing directly to the STM32 pin, since IN1 ( +GND) terminals are supposed to be wired with a realtively long wires to a reed device.
D11 is for protecting optocoupler's diode from reverse voltage (6V max), and also there is a TVS (24Vbr rated, just because i have the one already in the scheme can be replaced with a more appropriate one).</p>
<p>Reed switch will be located near a 3-phase AC motor (>= 15kW, up to 55kW, just nearby, no connections).</p>
<ol>
<li>Does the circuit make any sense (in terms of ESD protection)?</li>
</ol>
<blockquote>
<p>have doubts since MCU still shares the same GND with a reed switch and
connected indirectly with a 12V via DC-DC</p>
</blockquote>
<ol start="2">
<li>Can the optocoupler be safely replaced with a transistor?</li>
</ol>
<p><strong>P.S.</strong> buck converter is additionaly filtered with a 1.6 kHz RC net (R16-C7) to avoid spikes propagation from a 12V rail (relay coils are 12V-controllable, at least 4 relays can be switched at once).</p>
<p><a href="https://i.stack.imgur.com/Fmt6x.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Fmt6x.png" alt="buck regulator input" /></a></p>
| MCU Input ESD Protection + debounce | 2024-02-21T11:11:34.190 |
702350 | |analog|comparator|latch| | <p>You could add a third reset input driven by an RC circuit to give a power on reset, something similar to the marked up schematic below.</p>
<p>A general critique? I’d consider using a dual comparator and a digital latch/FF IC. If you used a chip with active low set/reset, you could eliminate the Schottky diodes as well.</p>
<p><a href="https://i.stack.imgur.com/OK5vH.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OK5vH.jpg" alt="POR mod" /></a></p>
| <p>I am working on a latching current limiter circuit and as part of it I'm using multiple LM139 comparators to implement a simple SR latch. This specific comparator has an open-drain output.</p>
<p>A latching current limiter is like a time-delayed load-switch. When an overcurrent event happens the high-side FET is first driven into linear region to limit the current into the load, and after a delay it is shut-off completely (latched) to protect it thermally. The LATCH output of the circuit pulls the gate of the high-side FET high.</p>
<p>I've adapted a bistable multivibrator circuit I found in <a href="https://www.ti.com/lit/an/snoa654a/snoa654a.pdf?ts=1708521913599&ref_url=https%253A%252F%252Fwww.google.com%252F" rel="nofollow noreferrer">this application note</a> to achieve the SR latch functionality (CMP1).</p>
<p><img src="https://i.stack.imgur.com/XXE6L.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fXXE6L.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The latch is set by pulling high the <strong>SET</strong> node and reset by pulling high the <strong>RESET</strong> node which is driven by a diode OR (note that in the real circuit BAS40 diodes are used).
The diode OR is driven by LM139 comparators, which implement the current sensing of the actual circuit.</p>
<p>The problem I have is that the initial condition of the latch is SET, and I would like to instead have it off at the beginning.</p>
<p>Adding a 100nF capacitor from LATCH to GND works, but induces a too high-current into the comparator when the latch is reset (~500mA) in simulation.
I've then attempted to limit the current flow during reset by placing a series resistor between the capacitor and the LATCH node, but this again makes the latch be SET during startup.</p>
<p>How can I set the initial latch state?</p>
<p>I would appreciate general critique of this design before I implement it physically.</p>
| Comparator Latch Initial state | 2024-02-21T13:28:52.460 |
702363 | |esp8266| | <p>For future reference:</p>
<p>It turns out my ESP did not boot correctly (If only the red LED lights up, without any flicker of the blue LED, there is a problem).</p>
<p>In order to achieve that I needed to pull-up the CH_PD (EN) and IO0 (IOa) pin using two 10KOhm resistors.</p>
| <p>I have a couple 8Pin ESP-01 Modules with an ESP8266. I am planning to use them to read a DHT22 sensor with them and sent the information further via MQTT. On the developer board this works perfectly with the SDA pin D2. However, on my 8Pin ESP-01 a don't get any information.</p>
<p>The 8 Pins are labeled:</p>
<div class="s-table-container"><table class="s-table">
<thead>
<tr>
<th>1. Row</th>
<th>2. Row</th>
</tr>
</thead>
<tbody>
<tr>
<td>3V3</td>
<td>RX</td>
</tr>
<tr>
<td>RST</td>
<td>IOa (I think its an "a")</td>
</tr>
<tr>
<td>EN</td>
<td>IO2</td>
</tr>
<tr>
<td>TX</td>
<td>GND</td>
</tr>
</tbody>
</table></div>
<p>In order to confirm that I address the correct pin I thought I test the pin with a blinking LED and test all pins from 1-18 (see code below). However, no matter which Pin I checked the LED never blinked.</p>
<pre><code>void setup()
{
pinMode(#, OUTPUT);
}
void loop()
{
digitalWrite(#, HIGH);
delay(1000);
digitalWrite(#, LOW);
delay(1000);
}
</code></pre>
<p>The questions are:</p>
<ul>
<li>Do I need to use the SDA pin?</li>
<li>How to define this pin on the ESP-01 board?</li>
</ul>
| Accessing GPIO pins of ESP8266-01 | 2024-02-21T14:44:26.943 |
702365 | |transformer| | <blockquote>
<p><em>If I replace the DC source with an AC one, can I say now I have
constructed a transformer?</em></p>
</blockquote>
<ul>
<li>A transformer has at least two coupled coils. So does your picture.</li>
<li>Transformers try to make the coupling as good as possible. Yours will be a single digit percent of coupling (if not less).</li>
<li>This means that even if both coils were identical, the voltage induced at the secondary would be a tiny percentage of the primary voltage. Not so with a regular transformer.</li>
</ul>
<p>What you have got is two mutually coupled coils. I guess you can call it a bad transformer if you wanted but, if you did call it a transformer, who is going to mind?</p>
<p><sub> The whole point about a transformer is that it transforms the impedance on one side to a different impedance on the other side governed by the square of the turns ratio. Yours will be much more convoluted in that respect.</sub></p>
| <p><a href="https://i.stack.imgur.com/wDbGG.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wDbGG.jpg" alt="enter image description here" /></a></p>
<p>If I replace the DC source with an AC one, can I say now I have constructed a transformer?</p>
<p>Source of the picture:</p>
<p><a href="https://www.teachoo.com/10742/3114/NCERT-Question-14/category/NCERT-Questions/" rel="nofollow noreferrer">https://www.teachoo.com/10742/3114/NCERT-Question-14/category/NCERT-Questions/</a></p>
| Do any two coils seperated by some little distance form a transformer? | 2024-02-21T15:07:04.957 |
702373 | |inductor| | <p>When switch is closed in circuit A there will be a sudden change of electric field in circuit A. This will cause a sudden change in magnetic field and because of this sudden change in magnetic field there will a sudden voltage in circuit B as per Faraday law which states that a change in magnetic flux across the conductor induces volage in the conductor. If the number of turns in circuit B are more than the number of turns in circuit A then the induced voltage in circuit B will be more than the voltage in circuit A. Current in the circuit B will depends upon the load connected to the circuit B. As the change in current stops in circuit A the change in magnetic field will also stop and then there will be no voltage in circuit B. So in your case the voltage in circuit B will be induced right at the moment when the switch is is closed and after that there will be no voltage in circuit B as the current in circuit a becomes constant afterwards and because of this magnetic field will be constant.</p>
| <p><a href="https://i.stack.imgur.com/s0jbt.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/s0jbt.jpg" alt="enter image description here" /></a></p>
<p>In this figure, let's say there was a switch on the A side. At the moment of closing the switch, would the number of turns in coil B make any difference to the current? I am saying that It won't matter cause increasing the number of turns increases the induced emf which go along with increasing the resistance by the same N factor. I am right, aren't I?</p>
<p>Source of the picture:
<a href="https://www.teachoo.com/10742/3114/NCERT-Question-14/category/NCERT-Questions/" rel="nofollow noreferrer">https://www.teachoo.com/10742/3114/NCERT-Question-14/category/NCERT-Questions/</a></p>
| Would the induced current depend on the number of turns? | 2024-02-21T15:34:33.610 |
702375 | |led-driver|dac|current-limiting| | <p>If you can deal with the inverted signal, 28V input -> 0 current output, and 0V input -> 35mA output the circuit would be (k =64):</p>
<p><img src="https://i.stack.imgur.com/F6umh.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fF6umh.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>Your going to have to disable the "open ref resistor" faults to do it this way because the device needs a minimum of 10uA through the ref pin; there is no current through this pin when the voltage is set to 28V. If you need to leave the open resistor fault modes active, adjust the divider to guarantee a minimum 10uA when your input is 28V.</p>
| <p>I am aiming to use the <a href="https://www.ti.com/lit/ds/symlink/tps929160-q1.pdf?ts=1708354843269&ref_url=https%253A%252F%252Fwww.google.com%252F" rel="nofollow noreferrer">TPS929160-Q1</a> LED Driver for a project. Basically I need to drive LEDs with PWM signal from a MCU (which this component can do very well) but the project also requires to be able to control the current sent to each LED output. As you can see in the picture, the current can be set via Rref. What I would like to do is to drive this "REF" pin with a voltage instead of this resistance, or be able to change this resistance with a voltage. I have been looking everywhere for voltage controlled potentiometer but I only seem to find solutions involving the "ohmic zone" of JFET which is not very linear.</p>
<p>A solution I had in mind would be to use a DAC to control different switch (transistors or whatsoever) that would connect parallel resistances and creating a Rref, but I do not know how to implement it.
I know that the Iout can be programmed with the MCU but I need it to be analog as the MCU will then be disconnected.</p>
<p><strong>Here are my requirements and information regarding the answer I got</strong>
The analog signal to control this pin would range from 0 to 28 V
and I would need a output current of maximum 35 mA (LEDs If max).
From what I understood, the current output is directly equal to the current sent to the REF pin, multiplied by K (which is programmable, and equals 512 by default). So to have Iout range from 0 to 35 mA, I would need a current in the REF pin equal to 70 µA?</p>
<p><a href="https://i.stack.imgur.com/JFG8h.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JFG8h.png" alt="enter image description here" /></a></p>
<p>Thanks in advance for the help!</p>
| Drive the current control pin with a voltage | 2024-02-21T15:34:52.837 |
702376 | |integrated-circuit|identification| | <p>It's a <a href="https://datasheet.lcsc.com/lcsc/2303010930_3PEAK-TP181A1-CR_C2902349.pdf" rel="nofollow noreferrer">3PEAK TP181A1-CR</a> current-sensing amplifier.</p>
<p><a href="https://i.stack.imgur.com/j6HhG.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/j6HhG.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/9ORX5.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/9ORX5.jpg" alt="enter image description here" /></a></p>
<p>(Source: <a href="https://www.lcsc.com/product-detail/Current-Sensing-Amplifiers_3PEAK-TP181A1-CR_C2902349.html" rel="nofollow noreferrer">lcsc.com</a>)</p>
| <p>What are the IC with the marking "9A1Ky" in the photo?</p>
<p><a href="https://i.stack.imgur.com/Q2tUW.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Q2tUW.jpg" alt="9A1Ky" /></a></p>
| I can't find this IC marked 9A1Ky | 2024-02-21T15:38:54.810 |
702385 | |pcb|pcb-design|integrated-circuit|identification| | <p>The top one is a <a href="https://datasheet.lcsc.com/lcsc/1810121731_Richtek-Tech-RT9193-30GB_C50004.pdf" rel="nofollow noreferrer">Richtek RT9193-30GB</a> LDO regulator.</p>
<p><a href="https://i.stack.imgur.com/yMy4b.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yMy4b.jpg" alt="enter image description here" /></a></p>
<p>(Source: <a href="https://dokumen.tips/documents/richtek-marking-code.html?page=1" rel="nofollow noreferrer">dokumen.tips</a>)</p>
<hr />
<p>The bottom one is a <a href="https://datasheet.lcsc.com/lcsc/2304140030_Richtek-Tech-RT9161-50GV_C130825.pdf" rel="nofollow noreferrer">Richtek RT9161-50GV</a> LDO regulator.</p>
<p><a href="https://i.stack.imgur.com/YqtG4.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/YqtG4.jpg" alt="enter image description here" /></a></p>
<p>(Source: <a href="https://dokumen.tips/documents/richtek-marking-code.html?page=1" rel="nofollow noreferrer">dokumen.tips</a>)</p>
| <p>What are the ICs with the markings in the photos?</p>
<p><a href="https://i.stack.imgur.com/3HY3P.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3HY3P.jpg" alt="DK=H6G" /></a></p>
| I can't find these ICs marked DK=H6G, AW=JFM | 2024-02-21T16:57:03.393 |
702391 | |relay|can| | <p>To detect the presence of data on a CAN bus without compromising the data on the bus, you are going to need a circuit that has a high input impedance and can detect AC (data changing on the bus - 1's and 0's changing).</p>
<p><img src="https://i.stack.imgur.com/T9J6J.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fT9J6J.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The first comparator acts as a buffer to the CAN bus. 2.7V was chosen to give 200mV of headroom to prevent false triggering from noise while idle. C2, D1, and D2 act as an AC to DC convertor. D2 and C3 act as an AC filter and peak detector from the previous stage. R4 sets the rate C3 discharges when data isn't changing (the bus is idle). This voltage is compared against the reference voltage (2.7V) and provides and output while data is changing (broadcasting) on the CAN bus. Without doing the math, the output should be high on the order of 10ms from the last recessive to dominant transition. YMMV.</p>
<p>Notes:
You may have to tailor C3 and R4 to optimize your timing requirements. You might also want to add a low ohm resistor (10-100) in series with the output of Comp_1 to limit inrush (outrush?) current of Comp_1. To sample CAN_L instead of CAN_H, a few components can be flipped around. The inputs of Comp_2 can be flipped to change the output polarity.</p>
<p>In practice, you will also want to put a TVS across the comparator input, de-couple the IC, and possibly put a cap across the reference voltage. These parts were omitted for clarity. If using open-collector output comps, pullups will be required.</p>
| <p>We want to energize a relay when there is data on the canbus wire. When there is no data, the voltage of the line is 0, and when there is data, the voltage is more than 2V. The following diagram should work to energize the relay, but we are afraid that the circuit will affect the data communication, since it's connected to one of the two wire canbus system. Please advise if there is a good way to achieve this without affecting the data communication.</p>
<p><a href="https://i.stack.imgur.com/HWlpv.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HWlpv.png" alt="enter image description here" /></a></p>
| Use voltage of canbus wire to control relay | 2024-02-21T17:47:16.630 |
702392 | |pcb|pcb-design|integrated-circuit|identification| | <p>It's a <a href="https://datasheet.lcsc.com/lcsc/1809261814_TOPPOWER-Nanjing-Extension-Microelectronics-TP4054-42-SOT25R_C32574.pdf" rel="nofollow noreferrer">Top Power (拓微集成电) TP4054</a> Li-Ion charger.</p>
<p><a href="https://i.stack.imgur.com/Mxqko.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Mxqko.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/5DPvi.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5DPvi.jpg" alt="enter image description here" /></a></p>
<p>(Source: <a href="https://www.lcsc.com/product-detail/Battery-Management-ICs_TOPPOWER-Nanjing-Extension-Microelectronics-TP4054-42-SOT25R_C32574.html" rel="nofollow noreferrer">lcsc.com</a>)</p>
| <p>What are the IC with the marking "54b8" in the photo?</p>
<p><a href="https://i.stack.imgur.com/qVMsP.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qVMsP.jpg" alt="54b8" /></a></p>
| I can't find this IC marked 54b8 | 2024-02-21T17:54:41.930 |
702404 | |arduino|transistors|mosfet|load| | <p>So you have two types of <em>sinking inputs</em>. Since both tolerate up to 24V, you can put them in parallel.</p>
<p>Your setup had them activated by the high-side resistor, and de-activated with a low-side switch. You would then need the resistor beefy enough to supply the required current to all the camera inputs, and then eat all of that power when your output is low (which is most of the time??). I.e. when your 2N7000 is on, the high side resistor would drop the full 20V or 24V supply, and dissipate <span class="math-container">\$V^2/R\$</span>.</p>
<p>The conventional way to activate <em>sinking inputs</em>, is with a <em>high side switch</em> or transistor. As shown in your diagram 3.9.3.2.</p>
<p>However, we still face the max power dissipation scenario, in the event of accidental short circuit of the output.</p>
<p>Below is a transistor circuit with that in mind (clickable link). Noted in comments that this is a somewhat older style of solution, and you can get a <em>high side switch</em> IC that would reduce part count, and replace the current-limit with an overtemperature-shutdown function.</p>
<p><a href="https://falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3BWK0BsB2AnADgEwI5gMw6SFZYQKUgAshICApgLRhgBQA7iDjZCFn5g0KAf0hcQhSDTFSZ4MDnDsATvNltl0zSnHgE7AC48%204DNoVgLUEKx6FoGZ8-I0cYQhdJ2c0BITEzoQoCFghKOEsaOBwIAAmjABmAIYArgA2RpI64Hoa4CJQxgVg%20bxC%20fz2fgFBGCFhEVHMMcyOKGA0GAhoOP00AZBYvSxgQnGJqZnZ3BXmyvPCohJzZl2yS0rFa0Lb84I7pvyHuYerxwuFotbKF8tyD1rF6k-bTzb8gXA5CiRYBXmEnigLMIQB82UU3SWTUoK%20Cly-BI8HYhFkSU48VUAHsAA4AHQAjjBBDdwNA0F1CAgcBQLBR4DhorY-PB2Ry4FhNpp2AAvKSRArgy7KTHY-HE0mQFA5IXzGiHSFygGBUSKr4hI4itXCrUSV5FW7XS7I9klZ54G5FK22CDMHCOLAubChJQodEe5DjDleWlsDCQfCxfjQma-WS5KP6yQPXXRlaxoq6uMKe7JrXPXUGxSWTT7BArKTSe7bXJZmPcB44PompFwy2F2gQpuan5Vsv64uJgBKtl17W0Xf4Zn04n87D7yKbg54rZ4IeR0HotVsMEM3Gn6pbohwSdE5zkEinclnh5HyNkY4n3A1BTvKZVwqF2bhd4VpzTDB%20AA87F0kDwDA7E6HgUGUXQGAANQJABnDIcQAcwASwAYzgvFkIAO3YP9aR4NAYjQZFDk0WQew4P9uR4DBNEgRYCFocByL3P8uhiDx6DKQCyiYroQB7QhcOYmIuhuUJmOAsiBJoYSa00HBgMU5RPAg5iBMMP95J4LBdxsOkpPUntZT-QIlN4KReh4Gs%20NkAARSipCVXSpGwHTDP4uzWKkTB70RSAYmkwIoOEwg2HMVVpB4SAIGkgBFbywHIMDFgCsCkHixz%20kqRYvDyDL1LioTbyVMwEBoHlxEkB8tXKyMYzwpKHEoJtHVkSCABUewASQAcWExUYhpGJ8FVfJOp63q4J7ABRDqAFUewAOWEqgITQAEwkAig%20NEAAeZhmDggAZHEUniWDVryxSIE6JTaN2kAAApsIwlJVBSDIMkYDIAEp2CAA" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GdM92.png" alt="aaa" /></a></p>
<p>All your camera inputs hook up to TRIG (i.e., +) and TRIG RETURN (i.e., -)</p>
<p>The minimal functionality comes from R1-R4 and Q1,Q2.</p>
<ul>
<li>When the 5V MCU pin is high, Q1 turns on, which pulls current thru R4, turning on Q2. R2 and R4 determine how fast Q1 and Q2 turn off.</li>
<li>Note that this is non-inverting logic, whereas your example was inverting.</li>
<li>Q1 is a small NPN, like BC547</li>
<li>Q3 is a small PNP, like BC557</li>
<li>Q2 might be another small PNP (eg BC557) or a medium PNP (eg in a TO-220 package), depending on how many camera inputs you're turning on at the same time, and whether you want to survive accidental short circuits. You have to work that out.</li>
</ul>
<p>The rest are protective features. If you just want something that works as a one-off you could skip some or all of them</p>
<ul>
<li>Q3 and R5 enforces a current limit into Q2, to prevent Q2 burning out if the TRIG output is accidentally shorted to ground (TRIG RETURN).</li>
<li>R5 determines how much current it takes to turn on Q3, and when Q3 is on, it turns off Q2. So you must figure out what R5 should really be, i.e. high enough to satisfy on all the camera input circuits at the same time. In the circuit shown, all the loads combined are represented by a 500 ohm resistor, but that's just a dummy number.</li>
<li>R6 pulls the output down when it's inactive and there is no load. It's mainly for convenience, and to stop someone else getting confused when debugging the system. The sinking inputs in the cameras will already pull the output down when it's off.</li>
<li>D1 prevents our 24V circuit accidentally receiving power from the TRIG input, in oddball situations when different system components are partially connected or miswired</li>
<li>D2 stops overvoltages and ESD, something like a P4KE33 diode</li>
</ul>
<p>(note, all suggestions are thru hole, to follow the question's 2N7000)</p>
| <p>I'm making a circuit to trigger several machine-vision cameras. Simply splitting the digital output pin of a microcontroller, e.g. an Arduino, works fine for a small number (<5) of the newer cameras that I have that have opto-isolated inputs that need 5 V and ~3 mA per camera.</p>
<p>However, I have older cameras that are PLC/designed for >15 V at ~3 mA. The newer cameras are built to be backward compatible; that is, they can also take inputs up to 24 V.</p>
<p>Therefore, I would like to build an Arduino shield that uses the VIN (DC barrel jack) supply to drive the output, so that I could put a 20 V DC supply there (max. allowable for UNO) and drive >5 cameras irrespective of whether they are 5 V or 20 V.</p>
<p>I breadboarded the following circuit, and it works great for a 2 kΩ resistive dummy load and a 5 V or 12 V supply to the load and then the MOSFET.</p>
<p>The cameras have ~1-2 kΩ resistance internally as limiting resistance with their circuitry. For this load, my circuit goes nicely between VIN and ground or ~-100 mV.</p>
<p>I'm curious though, as I increase the resistance of the load, the voltage in what I believe to be the off state of the MOSFET drifts upwards from 0 V. At 5 kΩ it's 500 mV. At 47 kΩ it's way up at 6 to 7 V.</p>
<p>It also becomes less stable, more "wobbly". See pics below. The first pic is the voltage across the load for a 47 kΩ resistive load. The second is for 2 kΩ.</p>
<p>Do I need a diode/resistor/something to allow the bottom end of the load to float back up to VIN such that the voltage across the load is zero when the 2N7000 is off?</p>
<p>My understanding is that source drain impedance is extremely high when it is off. I don't see parameters that indicate a large enough leakage current to drop down to 5 or 6 V at the drain when it is off - at 47 kΩ this would mean a current of 127 μA.</p>
<p>Also, why would the leakage current vary with load resistance? Is the load resistance somehow in series with the gate to ground 10 kΩ resistance?</p>
<p>Why does the voltage across the load stop dropping to zero for higher resistance loads?</p>
<p><img src="https://i.stack.imgur.com/eYxDu.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2feYxDu.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p><a href="https://i.stack.imgur.com/GMVRI.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GMVRI.jpg" alt="Voltage across load with 47 kΩ resistive load" /></a></p>
<p><a href="https://i.stack.imgur.com/ylo9s.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ylo9s.jpg" alt="Voltage across load with 2 kΩ resistive load" /></a></p>
<p>Attached are the schematics of the internal camera trigger circuits for the "old" and "new" cameras. Old=24V/plc, new=5V. Thank you!</p>
<p>Old camera trigger expecting 24V/PLC:</p>
<p><a href="https://i.stack.imgur.com/km563.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/km563.png" alt="camoldpic1" /></a></p>
<p><a href="https://i.stack.imgur.com/yijPf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yijPf.png" alt="camoldpic2" /></a></p>
<p>New cameras - this is a constant current voltage regulator. EG takes varied voltage between 5-24V, outputs roughly constant 3-5mA into optoisolator. Allows new cameras to work with 5V or old 24V triggers.</p>
<p><a href="https://i.stack.imgur.com/9oNu8.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/9oNu8.png" alt="camnew" /></a></p>
| Camera trigger driver circuit using Arduino to 2N7000 N-channel MOSFET - off behavior with 47 kΩ resistive load | 2024-02-21T19:19:21.630 |
702410 | |microcontroller|opto-isolator|infrared|digital-isolator| | <p>For non-interferance design in an isolated supply (I drew a battery but you can use an isolated DC-to-DC module) to power the input side of the optocoupler and the amplifier that allows connection to the infrared receiver signal.</p>
<p><img src="https://i.stack.imgur.com/j4BD0.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fj4BD0.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>The output is inverted? Well that depends on how you wire up the output.</p>
<p>If you can find a point inside the device where you can connect the 5 V (or 3.3 Vetc) input then you don't need the dc-dc converter.</p>
<blockquote>
<p>I need both controllers to receive the exact same signals at all times.</p>
</blockquote>
<p>That's not going to happen. It will be very hard to predict which marginal signal the other controller will accept and which it will ignore.</p>
<p>If you want both to receive the same signal make the new controller receive the signal and then if it understands the signal generate a cleaned-up copy of the signal to send to the old circuit.</p>
| <p>I have got some PCB that has an IR receiver and processes that signal in a non-relevant way.</p>
<p>I would like to intercept or snoop in on that same signal with an ESP8266, without affecting the original PCB's functionality, but I'm somewhat stuck in finding the right parts. Also, using a second receiver is not an option, because I need both controllers to receive the exact same signals at all times.</p>
<p>What I've conceptualized is using an optocoupler with the IR receiver's data line as the input, and the output going into a microcontroller's pin. Unfortunately, I wasn't able to find an optocoupler that wouldn't invert the signal. I would prefer for the signal to not be inverted for less difficulty in setting up the code.</p>
<p>Another option I found, is using a different kind of digital isolator, e.g. Texas Instruments ISO7310, as it doesn't invert the signal and appears to support a high signaling rate. My only worry is that with this circuit, I need to provide both supply and input voltage on the unknown PCB side, meaning I would have to split the data line in parallel, rather than in series. I'm not exactly sure how to pull that off without disturbing the PCB's original functionality.</p>
<p>I'm yet to open up the device I'm looking to modify, so I couldn't take any measurements yet. However, I preferred to check with this forum, if my thought process is correct. What are my options, is using the linked IC a good idea, what to watch out for to not interfere with the original functionality?</p>
| Snooping on an IR receiver with a microcontroller | 2024-02-21T20:32:00.233 |
702417 | |voltage|led|usb| | <p>No it isn't safe. Do not use an USB port as a power supply.</p>
<p>The USB port tries to output 5V but your LEDs clamped the voltage down to 3.2V like you described because the current is not limited in any way.</p>
<p>There might be protection in the form of current limiting or some polyfuse, but it could have damaged the USB port. Good thing is you did not plug it into your expensive PC. Although the LED may now also be damaged.</p>
<p>And then there are standards that your device is violating.
An USB device must not draw more than 100mA current before negotiating how much current it needs and knowing if the requested amount is available.</p>
<p>So even if you do use a resistor, it is wrong to pull more than 100mA without asking for more than 100mA.</p>
<p>Imagine an USB port which can provide 500mA, and has a 4-port unpowered hub connected. The hub itself allocates 100mA, and maybe 3 ports take 100mA each, so only 100mA is available. If you plug in a 350mA LED, something either kicks in to protect from overcurrent, or blows a fuse permanently, or burns up a PCB track.</p>
| <p>I'm building a simple circuit connected via USB to a number of LEDs in parallel, but I've always heard that USB connections are 5 V so I put a 10 Ohm resistor in series with the LEDs as shown on the example.</p>
<p><a href="https://i.stack.imgur.com/Nxala.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Nxala.png" alt="enter image description here" /></a></p>
<p>The LEDs seemed dimmer than originally advertised so I tested one of them without the resistor to see what would happen, and it was way brighter and did not burn out. So I checked with the multimeter and, when going through the LED, it would register 3.0 - 3.2 V. When going through the resistor setup, about 2.8 V. <strong>But</strong> if I check the voltage of the USB connection with a multimeter it shows 5V...</p>
<p>The USB connection comes from a port on my monitor which is connected to my PC.</p>
<p>Would it be safe to run the LEDs via the USB connection, as in, it will always give me 3 - 3.2 V?</p>
| Is this circuit safe to be powered via USB for my 3 V 350 mA LEDs? | 2024-02-21T21:31:59.653 |
702421 | |pcb|pcb-design|schematics|altium| | <p>You will probably have to sort this out by hand. I'm not sure about your situation, but this is what I would do.</p>
<p>Import the schematics</p>
<p>Import the PCB</p>
<p>If the designators don't match, you will have to either use the component links
(Project-Component links) to match them up manually. When you do this and do a design update from the schematic side it will then find the assigned parts and port them over.</p>
<p>There may be an easier way to do this but I've never done a PCAD import so I don't know how the parts are imported.</p>
| <p>I have a project that was converted from PCAD to Altium. The PCB layout looks great in terms of component placement, tracks, polygons, etc. A colleague went through and created a bunch of schematic files, and replicated the imported PCAD schematics but using our Altium library parts. Vast majority of the designators now between the PCB and newly created schematic do not match. FYI, I still have access to the imported PCAD -> Altium schematics.</p>
<p>How can I bring the designators from the PCB to the schematic, and then when I do a design synchronization between schematic and PCB, not have all the parts move around on the PCB? Keep them exactly where they are. I've tried back annotating, but I get lost in the process, or, how to best do it. Never done back annotation before.</p>
<p>I'm interested to hear if there are other, better, approaches I should be taking, or, how to actually go through and complete the path I'm on.</p>
<p>Cheers,</p>
<p>Currently have Altium 24</p>
| Altium - Back Annotating (PCB -> Schematic) | 2024-02-21T22:24:36.847 |
702424 | |batteries|lithium-ion|parallel|bms| | <p>The risk of doing this is pairing two <em><strong>unbalanced</strong></em> batteries together in parallel.</p>
<p>Consider this, if one nominal 18V battery is fully charged it would now be ~21V (lets call this <em>Battery A</em>), if the second battery is not fully charged, or worst case fully discharged it's voltage might sit around the ~15V mark (lets call this <em>Battery B</em>).</p>
<p>When two unbalanced batteries are connected, they will try to balance themselves out, as voltage is equal in parallel. As such, the fully charged battery will dump its energy into the less charged battery. Tied together only by a wire, the resistance is a few milliohms. So using ohms law:</p>
<pre><code>V = I*R
I = V/R
I = Voltage of Battery / wire resistance + internal battery resistance + a few other factors
I = a large amount of current (could be 100s of Amps)
</code></pre>
<p>Now obviously it isn't safe to dump 100s of amps but you may be starting to see the point, when these batteries are unbalanced if you have nothing in between to stop the flow of current you will discharge an immense amount of energy in a finite time, which is a risk damage to your batteries and most <em>critically</em> a fire hazard.</p>
<p>So your follow up question will naturally be '<em>What if I fully charge them both?</em>", this is where the question of the battery age comes into play - if Battery B is vastly older that Battery A, it will not be able to hold the same amount of energy and thus discharge at different rates causing problems.</p>
<p>In summary, if you intend on doing this you need to know what you're doing, there <strong>needs to be protection</strong> such as a fuse to protect overcurrent situations, however this may already be internal to the Bosch battery, and even then it might still not be safe to do. Generally this isn't recommended.</p>
| <p>I have built a Bluetooth speaker, which is currently powered by a single 18V "drill battery" (Bosch BAT609 battery, to be exact - each pack has 5 lithium ion cells, and I assume, its own BMS to manage the individual cells).</p>
<p>My question is - <strong>Can I wire two of those in parallel to double the run time, without worry of damaging them?</strong></p>
<p>I'm asking as it has been said that if the two battery packs differ in any way in terms of prior usage, lifespan, etc. (which mine definitely do), then this may not be a good idea.</p>
<p><strong>Is there a proper approach to doing this (e.g. putting some kind of battery capacity balancer or other BMS component), or is it just a bad idea?</strong></p>
<p>There's no charging component so no worries there. They'll still be charged individually via their usual Bosch charger.</p>
| Using two "tool batteries" in parallel - Need a BMS? | 2024-02-21T23:16:07.847 |
702425 | |operational-amplifier|integrated-circuit|feedback|stability|bode-plot| | <p>Look at the resistances and capacitances at each node and the op amp model. If what you've found can't explain your Bode plot, keep looking.</p>
<p>I would also not make assumptions about the Rout of either FET - they are described as '1v' NMOS/PMOS. I don't know what process you are using in your design, but the analog behavior of deep submicron FETs are very dependent on the particular optimization choices of a given process. I've worked on a 130nm process where L vs Rout was far different and non-ideal, compared to a 180nm and a 90nm processes I used for similar designs - the latter processes were far more 'friendly' for a traditional analog design such as this one.</p>
<p>Again, make no assumptions about any node.</p>
| <p><a href="https://i.stack.imgur.com/veCSp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/veCSp.png" alt="enter image description here" /></a></p>
<p>I'm using the circuit above to control the common-mode voltage of the 2 resistors. M16 is a current source. The OpAmp controls common-mode voltage by adjusting the resistance of M20.</p>
<p>I need to adjust Vcm quite fast (I need a bandwidth of 5MHz) and the circuit tends to oscillate if I do so. So I tried to find the poles in the feedback loop and to place them properly. However, the only pole I could see is the one at the gate of M20 - <span class="math-container">\$ \frac{1}{2\pi R_{o} C_{gg}} \$</span> (but I didn't see this pole on the bode plot of the loop gain...) So where are the poles, and how can I compensate this circuit? (The GBW of the OpAmp is 1000M and DC gain is 100dB, Ro = 10 Ohm. Cgg of M20 is about 6fF)</p>
<p>I also attached the bode plot below, there are two poles according to the figure - one at 10kHz and another one at 10MHz.</p>
<p><a href="https://i.stack.imgur.com/K7AuM.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/K7AuM.jpg" alt="enter image description here" /></a></p>
| How to compensate this circuit? | 2024-02-21T23:34:55.037 |
702440 | |mosfet|switches|relay|high-side| | <p>I question the need for 12V or 0V at the relay module's input, to make it switch on or off. It seems likely to me that the module will accept 0V or 5V, and work perfectly fine.</p>
<p>You don't provide any information about that module, so I can't comment further on this. You will need to provide a link to the module's datasheet, or at least the module's model number and/or supplier.</p>
<p>In the unlikely case that you really do need a 12V signal to trigger the relay, then you would use an N-channel MOSFET like below left:</p>
<p><img src="https://i.stack.imgur.com/D9Czm.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fD9Czm.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>On the right is a solution using a BJT instead of a MOSFET.</p>
<p>These transistors invert the signal. That is, a high (3V or greater) input at IN will produce 0V at OUT, and 0V at IN will produce +12V at OUT.</p>
<p>R2 and R5 keep IN low while the MCU output is high-impedance, prior to being configured in software. You may wish have this state default to high (OUT low), in which case you'd do this:</p>
<p><img src="https://i.stack.imgur.com/NPymc.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fNPymc.png">simulate this circuit</a></sup></p>
<p>These modules claim to have opto-isolator inputs. If so, and these inputs are connected directly to an opto-isolator's LED, (perhaps through a resistor), then you need to alter your strategy a little. It's almost certainly possible to make this work, but the "right" way is highly dependent on the position of those jumpers; I suspect they control which side of the power supply (12V or 0V) the opto-isolator LEDs are connected to. Without more information, anything I suggest is risky, and could damage the transistor and/or relay module if I get it wrong. I prefer to remain silent until I have better information.</p>
| <p>I have a two channel relay module that takes 12 V to power. It also has two inputs, which take either 12 V or 0 V. On the other side of the module are the NC and NO and COM pins that I am connecting 12 V and my linear actuator.</p>
<p>When the relay module is provided with 12 V to both input pins, the motor does not move. When one or the other is low, it moves in the corresponding direction.</p>
<p>How would I use a MOSFET controlled by a microcontroller, to control whether the relay module inputs recieve a 12 V signal or a 0 V signal?</p>
<p>I used an N-channel MOSFET as a low side switch an attempt to make a switch, and while the relay module did operate, I know this is not correct (can’t say 100% why, something about the relationship of the voltage between the gate and drain I believe, but I also saw the voltage toggled between 12 and 7 rather than 12 and 0 which I need/expected.)</p>
<p>I am guessing that I need a P-channel MOSFET and that I could essentially just replace the N-channel without changing any of the other parts in the circuit, but I’m second guessing myself.</p>
<p>Components list:</p>
<ul>
<li>Relay module: <a href="https://rads.stackoverflow.com/amzn/click/com/B00LW15F42" rel="nofollow noreferrer" rel="nofollow noreferrer">B00LW15F42</a></li>
<li>Linear actuator: <a href="https://rads.stackoverflow.com/amzn/click/com/B07L7XCSDW" rel="nofollow noreferrer" rel="nofollow noreferrer">L11TGF1000NB300-T-1</a></li>
<li><a href="https://www.adafruit.com/product/355" rel="nofollow noreferrer">N-channel MOSFET</a></li>
<li><a href="https://www.adafruit.com/product/2590" rel="nofollow noreferrer">Microcontroller</a></li>
</ul>
<p>This setup sort of works, as I mentioned. I suspect it works due to the voltage threshold of the relay being something between the 7 and 12 V I see in this current setup, but I am at least reasonably confident that using an N-channel MOSFET in this manner is incorrect. I suspect I should be able to replace the N-channel MOSFET with a P-channel with 12 V to the drain, then source to the relay (exactly as it is with the N-channel)</p>
<p><a href="https://i.stack.imgur.com/xauHs.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xauHs.png" alt="enter image description here" /></a></p>
| How can I make a switch using a MOSFET to control an input signal? | 2024-02-22T04:29:42.337 |
702448 | |arm|jtag| | <p>Remember a JTAG chain in Shift-IR state is just a big shift register of all concatenated instruction registers where bits are inserted from TDI pin and output is on TDO pin of the board connector.</p>
<p>I don't know where you got your example from, but this would typically be used in a JTAG chain where another TAP with a 4-bit instruction register is connected after the JTAG-DP you are targetting, on its TDO pin. The loop shifting "1111" would then shift a Bypass instruction to this other TAP. This is typically the case with STM32s which have two TAPs internally, one for boundary scan, and one for Cortex debug.</p>
<p>Now for the questions: If you only have one TAP in the chain with only a 4-bit instruction register, then yes, only the four last bit shifted will be taken into account when you go through the Update-IR state. Any other reason would be to have more than one TAP in the chain.</p>
<p>[Update after the update in question]</p>
<p>Update confirms it: having R5 and CS400 just makes a JTAG chain of two JTAG-DPs, so the "1111" header is really there to bypass the CS400's TAP.</p>
| <p>I'm trying to understand the behaviour of JTAG with ARM.
In particular, there is a Shift-IR stage in the JTAG as shown below,</p>
<p><a href="https://i.stack.imgur.com/zneUr.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zneUr.png" alt="enter image description here" /></a></p>
<p>As far as I know, at this Shift-IR stage, we can push instructions like ABORT, DPACC, APACC, IDCODE, BYPASS.
These IR commands are only 4bits like 4'b0000, 4'b0001, 4'b0011, 4'b0111, 4'b1111..which means I have to push it with 4 times tck.
<a href="https://i.stack.imgur.com/h4BNZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/h4BNZ.png" alt="enter image description here" /></a></p>
<p>I came across that Shift-IR is implemented with 8bits not 4bits to read IDCODE.</p>
<pre><code>for (idx=0; idx<4; idx=idx+1) //DAP : Shift-IR
dap_1b_push(TMS(0), TDI(1));
dap_1b_push(TMS(0), TDI(0));
dap_1b_push(TMS(0), TDI(1));
dap_1b_push(TMS(0), TDI(1));
dap_1b_push(TMS(1), TDI(1)); //DAP : Exit IR
</code></pre>
<p>From above, the Shift-IR for the IDCODE is implemented with 8 pushes. Only the last 4 digits are entered, no matter how many times I push in Shift-IR?
Is there any reason? push 4bits before push IR command?</p>
<p>[Update question]</p>
<p>I have updated the question as I missed to add information.
Currently, there are 2 devices connected with JTAG(a.k.a Daisy Chain) ARM R5 and ARM CS400(Coresight-400). They have connected like TDI->R5->CS400->TDO.</p>
| Is there a limit to pushing to Shift-IR in JTAG? | 2024-02-22T05:27:15.363 |
702463 | |ltspice|simulation| | <p>The <code>SW</code> device requires a <code>.model</code> statement, even if you want all default parameter values. Therefore, you simply need to add a <code>.model SW SW</code> SPICE directive on the schematic if you want to use the default parameters along with the default symbol name.</p>
<p><a href="https://i.stack.imgur.com/6HyqL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6HyqL.png" alt="enter image description here" /></a></p>
<p>Diodes, BJTs, and MOSFETs require this too, but for those LTspice will automatically add SPICE directives <code>.model D D</code>, <code>.model NPN NPN</code>, <code>.model NMOS NMOS</code>, etc. into your netlist behind the scenes whenever one of those symbols are used. It does not do this for switches, so you have to explicitly do it as shown above.</p>
| <p>In the below example circuit, if I try to use the default model of voltage controlled switch, why does the simulation throw an error?</p>
<p><a href="https://i.stack.imgur.com/F5GOt.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/F5GOt.png" alt="enter image description here" /></a></p>
<p>If I customise the model parameters using .MODEL command, it works fine.</p>
<p>Why can't the tool take the default values? I defined Gmin just in case that is the only unknown to the tool!</p>
<p><a href="https://i.stack.imgur.com/KUdMX.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KUdMX.png" alt="enter image description here" /></a></p>
| Why doesn't LTspice take the default model parameters for voltage controlled switch? | 2024-02-22T08:44:00.897 |
702465 | |power|led|resistors| | <p>The resistor will probably not "burn out", but it will run hot and may eventually fail.</p>
<p>If you have a 24V source, and want to run 5mA through an LED, you can follow a fairly simple procedure:</p>
<ol>
<li><p>Calculate the voltage across the current limiting resistor. This is the supply voltage minus the LED voltage. You can get the LED voltage from its data sheet, but for this case you can also just estimate. White and blue LEDs typically run around 2.5-3.0 volts, red is about 1.8, green somewhere in between. Let's assume a blue LED at 3V. So 24V-3V = 21V across the current limiting resistor.</p>
</li>
<li><p>Calculate the resistance. I'm assuming that you want 5mA since you call it a 5mA LED. You can always use less than the maximum current if you don't need max brightness. So 21V/5mA = 4200 ohms. Your 4K is pretty close, but I'd be inclined to use something like 4.7K unless I was trying to get the absolute maximum possible brightness.</p>
</li>
<li><p>Calculate the resistor power dissipation. 21V * 5mA = 0.105 watts. A 1/10 watt resistor will survive at 0.105 watts in most situations, but as a general rule I like to run resistors at half or less of their rated dissipation. So I'd be looking for a resistor rated at 0.2W or more.</p>
</li>
</ol>
<p>The actual power handling of a resistor (especially a surface mount resistor) is determined by lots of things besides the resistor itself. How big are the traces connected to the resistor? They will conduct away heat. Are there other heat dissipating components nearby? What is your ambient temperature? There is a big difference between a 22 deg C office or medical application and a 60 dec C industrial controls cabinet. The 2:1 derate that I recommend as a general rule works in most cases; if you are dealing with extreme situations you need to be aware of that and adjust accordingly.</p>
| <p>Can I connect a 1/10W 0603 resistor (4 kΩ) and a 0603 LED (I = 5 mA) to a 24 VDC supply?</p>
<p>Will the resistor burn out in this connection?</p>
| LED and resistor in series on 24 V: resistor power rating | 2024-02-22T08:57:23.450 |
702468 | |circuit-analysis|resistors| | <p>Due to symmetry and all resistors being equal there are some immediate simplifications to be made: -</p>
<p><a href="https://i.stack.imgur.com/QBUBT.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QBUBT.png" alt="enter image description here" /></a></p>
<p>Node D can be reduced because you know there can be no current in the former connection I removed. This then reduces the circuit by two resistors to this: -</p>
<p><a href="https://i.stack.imgur.com/tQhVf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tQhVf.png" alt="enter image description here" /></a></p>
<p>Then, the three resistors at the top can be reduced to one resistor: -</p>
<p><a href="https://i.stack.imgur.com/XxBZY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XxBZY.png" alt="enter image description here" /></a></p>
<p>Can you take it from here? Hint: note that the voltage at E and C has to be identical.</p>
| <p>I was solving this problem:</p>
<p><a href="https://i.stack.imgur.com/pzuoz.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pzuoz.jpg" alt="enter image description here" /></a></p>
<p>As it appears, this is a collection of resistors put on the sides of trapezoidal pyramid. I have solved this problem and my answer is <span class="math-container">\$ \frac{12R}{35}\Omega\$</span>, but the answer in the book is <span class="math-container">\$ \frac{2R}{5} \Omega\$</span>, so I am wondering what went wrong in my calculation?</p>
<p>My attempt to solve this:-</p>
<p><a href="https://i.stack.imgur.com/aqQva.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/aqQva.jpg" alt="Between A and B I have figured the equivalent resistance to be R/2 so is between E and C " /></a></p>
| What is the equivalent resistance between A and B? | 2024-02-22T09:21:01.780 |
702475 | |waveform|integrator| | <p>You've named <span class="math-container">\$C_i\$</span> rather oddly. In the convention of such circuits, the subscript <span class="math-container">\$f\$</span> means feedback, and <span class="math-container">\$i\$</span> is used for inputs. Why not call that capacitor <span class="math-container">\$C_f\$</span>, as it's clearly feedback? From this point on, that's the name I shall give the capacitor, <span class="math-container">\$C_f\$</span>.</p>
<p>You've used the wrong resistance to calculate the cross-over (break, or cut-off) frequency. The formula is</p>
<p><span class="math-container">$$ f_c = \frac{1}{2\pi R_fC_f} $$</span></p>
<p>The actual cross-over frequency of your circuit is:</p>
<p><span class="math-container">$$ f_c = \frac{1}{2\pi R_fC_f} = \frac{1}{2\pi \times 90\rm{\ k\Omega} \times 1.77\rm{\ nF}} = 1\rm{\ kHz} $$</span></p>
<p>If the frequency of square wave input approaches the cross-over frequency, then the circuit behaves less like an integrator, and more like a regular low-pass filter, which is why you are seeing <strike>unstable</strike> curved sections in the output waveform, instead of straight slopes. If you want those nice straight "integrator" slopes, then:</p>
<p><span class="math-container">$$ f_{in} << f_c $$</span></p>
<p>Your input waveform does not satisfy this condition. Input frequency is 500Hz, which is way too close to 1kHz for you to see the expected straight slopes. 500Hz may be fine if the cross-over frequency were actually 10kHz, as required.</p>
<p>By the way, you also use the term "unstable" somewhat loosely. This circuit is not unstable, as you put it. The blue line is not "linear" or "straight", or is "curved" is probably what you meant.</p>
| <p>I am doing a school assignment that requires me to design a stable Integrator circuit.
But after I completed the design, I found that the peak value of the output waveform (blue line) was unstable. Is there any way to make the output waveform become a straight line, just like the input?
(Need to keep Crossover Frequency at 10KHz)</p>
<p><a href="https://i.stack.imgur.com/MGVCS.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MGVCS.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/2lZJp.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2lZJp.jpg" alt="enter image description here" /></a></p>
| Integrator waveform problem | 2024-02-22T10:53:37.883 |
702479 | |inductor|emc|emi-filtering|ferrite-bead| | <p>135.6dBµV is approx. 6.026V. It is not a factor, it is a unit.</p>
<p>It is surely not a typo: 135dB is a massively larger factor than the 5.91 impedance ratio in question.</p>
<p>They are not discussing any particular embedding, or application, and the number doesn't make any sense in relation to an intrinsic property such as thermal noise (which corresponds to element resistance so would decrease instead).</p>
<p>I don't understand what they were getting at, either. Chalk it up to poorly-written appnotes.</p>
<p>Understand that the ferrite bead acts as an element of an impedance divider, and so its attenuation depends on frequency and DC bias; how much, depends on how the divider or network is wired, and the relative values around it. In other words, the embedding, what circuit it is a part of.</p>
| <p>I was going through <a href="https://abracon.com/uploads/resources/Ferrite-Beads-White-Paper.pdf" rel="nofollow noreferrer">this document</a> to learn more about ferrite beads.</p>
<p>Regarding <strong>DC bias</strong> in page no 6 you can see the statement given below.</p>
<p>"<strong>Notice that when 300 mA DC bias is used, the impedance at 100 MHz drops from 650 Ω down to approximately 110 Ω.
This means that the noise at this frequency increases by a factor of 135.6 dBµV</strong>"</p>
<p>May I know how they obtained the value of 135.6 dBuV. Can someone please explain the math?</p>
| Ferrite bead parameters clarifications required | 2024-02-22T11:19:47.657 |
702484 | |circuit-analysis|rf|impedance-matching| | <p>Look at your formula here: -</p>
<p><span class="math-container">$$C_{MATCH}=\frac{1}{\omega\sqrt{R_{S}(R_{IN}-R_{S})}}$$</span></p>
<p>Then consider that <span class="math-container">\$R_S R_{IN}\$</span> is much more significant than <span class="math-container">\$R_S^2\$</span> on it's own hence, they have simplified the formula to this: -</p>
<p><span class="math-container">$$C_{MATCH}=\frac{1}{\omega\sqrt{R_{S} R_{IN}}}$$</span></p>
<p><strong>The simplification is allowed if transforming to a much higher impedance</strong></p>
<p>But, your formula is of course correct and preferable.</p>
<p><a href="http://stades.co.uk/Impedance%20TX/Zmatch%20Lpad%20HP%20.html" rel="nofollow noreferrer">Link to my derivation on high pass L matching networks</a>: -</p>
<p><a href="https://i.stack.imgur.com/IoyVQ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/IoyVQ.png" alt="enter image description here" /></a></p>
<p>It's worth noting that <span class="math-container">\$L_1\$</span> reduces to a simpler formula and that my "C" formula matches your (preferred) derivation.</p>
| <p>I'm currently reading trough an application note from Analog Devices <a href="https://www.analog.com/media/en/technical-documentation/application-notes/an-642.pdf" rel="nofollow noreferrer">2</a>, in particular the "A NARROW-BAND LC MATCHING EXAMPLE AT 100 MHz" section. I re-did the calculations by hand and got formulas for the matching capacitance and inductance that are slightly different than the ones reported in the AN.</p>
<p>The circuit is the one reported below, let's assume L2 resonates with Cin at the frequency of interest. One wants the load impedance Z_C1 plus Z_C2 and the parallel between Z_L1 and RIN to be equal to Rs, the 50Ω source impedance.</p>
<p><a href="https://i.stack.imgur.com/74FpV.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/74FpV.png" alt="Circuit details" /></a></p>
<p>What I get is:
<span class="math-container">$$L_1=\frac{R_{IN}\sqrt{R_{S}}}{\omega\sqrt{R_{IN}-R_{S}}}$$</span>
<span class="math-container">$$C_{MATCH}=\frac{1}{\omega\sqrt{R_{S}(R_{IN}-R_{S})}}$$</span></p>
<p>while the AN gives:</p>
<p><span class="math-container">$$L_1=\frac{\sqrt{R_{IN}R_{S}}}{\omega}$$</span>
<span class="math-container">$$C_{MATCH}=\frac{1}{\omega\sqrt{R_{S}R_{IN}}}$$</span></p>
<p>The latter equations are a particular case of the ones I've derived where the source impedance is much less than the input one, as it happens in the case analyzed in the AN.</p>
<p>Am I missing something?</p>
| Slight difference in equations for the design of resistive matching network | 2024-02-22T11:54:30.587 |
702487 | |power-supply|power|protection|spike|surge| | <p>In a perfectly coupled transformer, the emf induced in the secondary is proportional to the emf induced in the primary, and the ratio between the two is determined by the ratio of the secondary turns to the primary turns. If one neglects the resistance of the wire in the primary, the terminal voltage of the primary is the same as the emf induced in the primary. There can be a large primary current, a small primary current. It doesn't matter. As long as the transformer is perfectly coupled, the ratio between primary induced voltage and secondary induced voltage is fixed.</p>
<p>However, the tight coupling between a transformer's primary and secondary is largely the due to the core of the transformer. During a voltage surge, the current in the primary is increased. This results in an increase in the magnetic field strength (H) in the core. If the magnetic field strength is increased enough, the core will saturate (i.e. an increase in H no longer results in a correspondingly sized increase in B) and the coupling between the transformer's primary and secondary will drop. Dramatically.</p>
<p>How much may magnetic field strength in a transformer increase before saturation? That depends. Audio transformers are designed to handle a wide range of signal amplitudes. The magnetic field strength in the core, at the peak of a cycle, is often well below the level that would cause saturation. However, mains connected power supply transformers are usually chosen which will saturate at AC voltages not much higher than the mains AC voltage. It is simply a question of economics. Magnetic core and copper wire are expensive.</p>
<p>What does all this have to do with voltage surges? When a power supply transformer receives a voltage surge, some of the surge reaches the secondary. This voltage may be sufficient to damage electronic components. However, unless the surge is small enough, the transformer core will become saturated. At that point, the secondary voltage will actually <strong>fall</strong>. The core will have become saturated, and the coupling between primary and secondary will have become drastically reduced.</p>
<p>This of course assumes that the voltage surge is not so great as to cause arcing or insulation break down between the the primary and secondary coils. If lightning strikes, the transformer core may saturate, but a high voltage will nevertheless reach the secondary -- but not through transformer action, but through the insulation!</p>
<p>While the saturation of the transformer core protects the secondary circuit to some extent, it means that the emf induced in the primary is smaller as well. Since the terminal voltage in the primary is larger, but the induced emf is smaller, the current in the primary may increase catastrophically. The insulation in the primary may be damaged, or in extreme cases, the wire may become fused. Either of these will wreck the transformer.</p>
<p>If the voltage surge is short, i.e. a voltage <em>spike</em>, and the transformer has a load connected to the secondary, then another effect is also present. The leakage inductance on the secondary side of the transformer, together with the load and any smoothing capacitors form a low pass filter. Because a spike consists mostly of high frequency components, this low pass filter will attenuate the spike. Again, there is no guarantee that the spike, even as attenuated, won't cause damage.</p>
<p>The effect of the smoothing capacitor on a voltage surge is also not quite intuitive. As mentioned, a surge may initially causes the secondary voltage to rise, but then to go down. To the extent that the smoothing capacitor follows the voltage of the transformer secondary terminal voltage, <em>well</em> it follows that voltage. But in following that voltage rise, it must also draw extra current. This extra current will cause increased voltage drops in the transformer secondary coil, and also in the rectifier diodes. This extra voltage drop will mean that the capacitor's terminal voltage will NOT follow the induced emf of the transformer as closely, but will have a lower surge voltage. However, the capacitors will hold whatever surge voltage they do get until the charge in them drains (mainly through the load). Thus, large smoothing capacitors can actually have the effect of prolonging a voltage surge beyond what smaller capacitors might do.</p>
| <p><a href="https://i.stack.imgur.com/9dTc6.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/9dTc6.jpg" alt="enter image description here" /></a></p>
<p>In the photo, you can observe an old-style adjustable wall wart AC to DC power supply, typically composed of a primary winding, secondary winding, rectifier, and capacitor. If a voltage surge or spike penetrates the wall wart's primary winding, how does it impact the secondary winding and subsequently the device it is connected to? Will the voltage surge on the primary winding induce a surge in the secondary winding, potentially flowing toward the connected device, or will it be mitigated before reaching the device?</p>
| How does a voltage surge/spike affect the wall wart power supply's secondary side? | 2024-02-22T12:04:47.830 |
702510 | |transistors|bjt|saturation|ebers-moll| | <p>Straight from Ebers-Moll:</p>
<p><span class="math-container">$$ \frac{I_{C_2}}{I_{C_1}}=\exp\left(\frac{\Delta V_{_\text{BE}}}{V_T}\right)$$</span></p>
<p><em>(See derivation below.)</em></p>
<p>So, assuming about <span class="math-container">\$-2.1\:\text{mV}\$</span> change in <span class="math-container">\$V_{_\text{BE}}\$</span> per Kelvin rise (see citation below), one would expect to see a <span class="math-container">\$-16.8\:\text{mV}\$</span> change for an <span class="math-container">\$8^\circ\text{C}\$</span> rise. I believe that AofE also uses <span class="math-container">\$V_T=25\:\text{mV}\$</span> (see citation below), so this says I should expect to see <span class="math-container">\$ \frac{I_{C_2}}{I_{C_1}}\approx 1.96\$</span>.</p>
<p>As the starting assumption says <span class="math-container">\$I_{_\text{C}}=1\:\text{mA}\$</span>, you should then find the new <span class="math-container">\$I_{_\text{C}}\approx 1.96\:\text{mA}\$</span>. That will produce a drop across the <span class="math-container">\$10\:\text{k}\Omega\$</span> collector resistor of <span class="math-container">\$19.6\:\text{V}\$</span>. That will cause <span class="math-container">\$V_{_\text{CE}}=400\:\text{mV}\$</span>. And that is in <em>saturation</em>.</p>
<p>This is the direct use of Ebers-Moll by the authors used to make their statement.</p>
<h3>derivations</h3>
<p>Before I get to the derivations, AofE 3rd edition has this chart:</p>
<p><a href="https://i.stack.imgur.com/EGWOD.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/EGWOD.png" alt="enter image description here" /></a></p>
<p>I've put a horizontal red line at about <span class="math-container">\$16.8\:\text{mV}\$</span> and extended the <span class="math-container">\$25^\circ\text{C}\$</span> line a tiny bit. There's a green arrow pointing to where these intersect. I dropped another vertical red line from there. You can see that it is very close to <span class="math-container">\$2\$</span>. So you should expect about a doubling of current (or halving) based on this number of millivolts difference. (I said <span class="math-container">\$\frac{I_{C_2}}{I_{C_1}}\approx 1.96\$</span>. Close enough.)</p>
<p>I've also circled in blue the same equation I used at the outset. So I think this is what the authors of AofE expected their readers to both work out and to apply.</p>
<p>But let's derive it.</p>
<p>First, simplify Ebers-Moll slightly: <span class="math-container">\$I_{_\text{C}}=I_{_\text{SAT}}\cdot\left(\exp\left(\frac{V_{_\text{BE}}}{V_T}\right)-1\right)\approx I_{_\text{SAT}}\cdot\exp\left(\frac{V_{_\text{BE}}}{V_T}\right)\$</span>, as the -1 term is negligible. Then solve: <span class="math-container">\$V_{_\text{BE}}=V_T\cdot\ln\left(\frac{I_{_\text{C}}}{I_{_\text{SAT}}}\right)\$</span>. If you have two different collector currents then:</p>
<p><span class="math-container">$$\begin{align*}\Delta V_{_\text{BE}}&=V_{_{\text{BE}_2}}-V_{_{\text{BE}_1}}\\\\&=V_T\cdot\left(\ln\left(\frac{I_{_{\text{C}_2}}}{I_{_\text{SAT}}}\right)-\ln\left(\frac{I_{_{\text{C}_1}}}{I_{_\text{SAT}}}\right)\right)\\\\&=V_T\cdot\left(\ln\left(I_{_{\text{C}_2}}\right)-\ln\left(I_{_{\text{SAT}}}\right)-\ln\left(I_{_{\text{C}_1}}\right)+\ln\left(I_{_{\text{SAT}}}\right)\right)\\\\&=V_T\cdot\left(\ln\left(I_{_{\text{C}_2}}\right)-\ln\left(I_{_{\text{C}_1}}\right)\right)\\\\&=V_T\cdot\ln\left(\frac{I_{_{\text{C}_2}}}{I_{_{\text{C}_1}}}\right)\end{align*}$$</span></p>
<p>Given <span class="math-container">\$V_T=\frac{k\,T}{q}\$</span>, there's no difference. Same thinking, same process, same end result.</p>
<p>All of the above, though, starts and ends with the idea <em>that <span class="math-container">\$I_{_\text{SAT}}\$</span> is the same</em>. However, it's not. In fact, that's what is changing the most when the temperature changes. (Not <span class="math-container">\$V_T\$</span> which only changes about 0.3% per Kelvin at room temp.)</p>
<p>So, if you want to get nit-picky, you could fairly complain that all of the above isn't correctly derived for the situation where temperature is changing since it assumes it isn't changing.</p>
<p>So that's a different question, really. Let's ask it:</p>
<p><span class="math-container">$$\begin{align*}
\Delta V_{_\text{BE}}&=V_{_{\text{BE}_2}}-V_{_{\text{BE}_1}}
\\\\
&=V_{T_2}\cdot\ln\left(\frac{I_{_{\text{C}_2}}}{I_{_{\text{SAT}_2}}}\right) - V_{T_1}\cdot\ln\left(\frac{I_{_{\text{C}_1}}}{I_{_{\text{SAT}_1}}}\right)
\end{align*}$$</span></p>
<p>Now, we can start by saying <span class="math-container">\$V_{T_1}=25\:\text{mV}\$</span> because that's where the authors start. We can also work out that <span class="math-container">\$V_{T_2}=25.689386661\:\text{mV}\$</span>, because that's what happens when you add <span class="math-container">\$8^\circ\text{C}\$</span>. We've also been given that <span class="math-container">\$\Delta V_{_\text{BE}}=-16.8\:\text{mV}\$</span>.</p>
<p>So not all is buried in unknowns.</p>
<p>Also, we can ask <em>"What if we assume <span class="math-container">\$I_{_{\text{C}_1}}=I_{_{\text{C}_2}}=1\:\text{mA}\$</span>? Also assume some value for <span class="math-container">\$I_{_{\text{SAT}_1}}\$</span>, say <span class="math-container">\$I_{_{\text{SAT}_1}}=1\:\text{fA}\$</span>? Then how would <span class="math-container">\$I_{_{\text{SAT}_2}}\$</span> need to change in order to account for <span class="math-container">\$\Delta V_{_\text{BE}}=-16.8\:\text{mV}\$</span>?"</em></p>
<p>We are asking about how the saturation current must change if we observe a base-emitter voltage change while holding the collector current constant.</p>
<p>This is actually a fair question and it's a question we can answer, quickly. We'd find that <span class="math-container">\$I_{_{\text{SAT}_2}}\approx 2.1\:\text{fA}\$</span>.</p>
<p>In short, it means that <span class="math-container">\$I_{_{\text{SAT}}}\$</span> needs to about double. That's a lot and we still don't exactly understand <em><strong>why</strong></em> or if there is some equation that explains this change. But, using Ebers-Moll, this still suggests that we should expect to see <span class="math-container">\$I_{_\text{C}}\$</span> about double (since the Ebers-Moll saturation current multiplier just doubled due to some temperature change.)</p>
<p>So we can get to a similar place through different thinking.</p>
<p>Hopefully, this helps you realize that the AofE authors aren't just pulling stuff out of thin air.</p>
<p>It should also let you notice that you can just use the constant temperature Ebers-Moll slope to get a bead on what to expect, even if the assumption of constant temperature is wrong. This is because the slope is still about the same for small changes in temperature.</p>
<p>But you can turn things around and assume the authors are right about the change in the base-emitter voltage for that small temperature change and work backwards into what that must mean for the y-axis intercept (saturation current) and get to about the same place that way.</p>
<p>Just in case it still bothers you that we don't yet have a quantitative equation for temperature changes in the saturation current, here's an approximate equation from the literature:</p>
<p><span class="math-container">$$I_{\text{SAT}\left(T\right)}=I_{\text{SAT}\left(T_\text{nom}\right)}\cdot\left[\left(\frac{T}{T_\text{nom}}\right)^{3}\cdot e^{^{\frac{E_g}{k}\cdot\left(\frac{1}{T_\text{nom}}-\frac{1}{T}\right)}}\right]$$</span></p>
<p><em>(The power of 3 is actually another model parameter as it's not always exactly 3 for all devices.)</em></p>
<p>If you apply that equation, you'll find that by itself the saturation current rises by more than a factor of 2. Perhaps almost twice that much. But this is countered by the increase in <span class="math-container">\$V_T\$</span>. To make this point, note that <span class="math-container">\$\frac{\left(25\:\text{mV}+8^\circ\text{C}\,\cdot\, 86.173\:\frac{\mu\text{V}}{^\circ\text{C}}\right)\,\cdot\,\ln\left(\frac{1\:\text{mA}}{4\:\text{fA}}\right)-25\:\text{mV}\,\cdot\,\ln\left(\frac{1\:\text{mA}}{1\:\text{fA}}\right)}{8^\circ\text{C}}\approx -2.1\:\frac{\text{mV}}{^\circ\text{C}}\$</span>.</p>
<p><em>(Note the use of a factor of four increase.)</em></p>
<p>And that pulls in all the unknowns together, rather than assuming one or another thing is constant. But I think you can see why it's just not done that way in engineering. Too much detail that isn't needed. Simplifying ideas combine these physical factors into a conflated mush, true, but they are also sufficient for practical use.</p>
<p>You will find, elsewhere in various engineering literatures, that diode leakage about doubles every <span class="math-container">\$8^\circ\text{C}\$</span> or <span class="math-container">\$10^\circ\text{C}\$</span>. In broad strokes this is where that comes from. We saw just such a doubling. Here, it is forward biased. In leakage, reverse biased. But underlying Boltzmann thermodynamic statistical ideas remain.</p>
<h3>supporting notes from AofE, 3rd edition</h3>
<p><a href="https://i.stack.imgur.com/kgm54.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kgm54.png" alt="enter image description here" /></a></p>
<p>and,</p>
<p><a href="https://i.stack.imgur.com/Nj2v9.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Nj2v9.png" alt="enter image description here" /></a></p>
| <p>I have a question about this circuit from the Art Of Electronics by Paul Horowitz & Winfield Hill, 3rd Edition, Figure 2.44 below. For reference, we just learned about the Ebers-Moll equations and are trying to apply them:</p>
<p><a href="https://i.stack.imgur.com/aKa5V.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/aKa5V.png" alt="Art of Electronics, 3rd Ed - Figure 2.44. Common-emitter amplifier without emitter degeneration." /></a></p>
<p>Question:</p>
<blockquote>
<p>Exercise 2.13: Verify that a 8°C rise in ambient temperature will cause a base-voltage-biased grounded emitter stage to saturate, assuming that it was initially biased for Vc = 0.5Vcc.</p>
</blockquote>
<p>I'm having extreme difficulties working this problem out. There have been answers to this <a href="https://electronics.stackexchange.com/questions/182559/verify-that-an-increase-in-8%C2%BA-c-will-saturate-a-common-emitter">before</a>, which have left me even more confused than when I started. My biggest source of confusion is equations that seemingly pop up out nowhere with no explanations. Every other explanation uses <span class="math-container">\$I_S\$</span>, where my book says there is a <em>strong multiplying factor</em> of <span class="math-container">\$I_S(T)\$</span>. Why are we just leaving <span class="math-container">\$T\$</span> out, it sounds quite important? Additionally, I don't even know what <span class="math-container">\$I_S\$</span> is or how to find/calculate it.</p>
<p>Would someone be kind enough to work me through this problem step by step?</p>
<p>Thanks,</p>
| TAOE3, Exercise 2.13 -> Verify that a 8°C rise will cause grounded emitter BJT to saturate | 2024-02-22T14:20:51.330 |
702518 | |integrated-circuit|identification|surface-mount| | <p>It is a <a href="https://www.onsemi.com/pdf/datasheet/nc7wz14-d.pdf" rel="nofollow noreferrer">NC7WZ14P6X</a> from ONSEMI (SOT-363).</p>
<p>Unfortunately i couldn't find any picture with your marking.
If you look in internet you'll find old markings because originally it was a Fairchild product.
However with that <a href="https://www.mouser.com/PCN/On_Semiconductor_Final_PCN_Document_FPCN23285X.pdf" rel="nofollow noreferrer">PCN</a> you have the confirmation that the marking matches with the datasheet and your photo.</p>
| <p>Need help identifying the 6 pins SMD IC. This is a push button controller for servos with LEDs to identify position. Appears to say either <strong>Z14</strong> or <strong>214</strong>.</p>
<p><em>Close up:</em><br />
<a href="https://i.stack.imgur.com/Xr2mw.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Xr2mw.png" alt="enter image description here" /></a></p>
<p><em>Bottom:</em><br />
<a href="https://i.stack.imgur.com/nKAm7.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/nKAm7.jpg" alt="enter image description here" /></a></p>
<p><sup>Original image: <a href="https://i.stack.imgur.com/huC9D.jpg" rel="nofollow noreferrer">https://i.stack.imgur.com/huC9D.jpg</a></sup></p>
<p><em>Top:</em><br />
<a href="https://i.stack.imgur.com/SuB3M.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SuB3M.jpg" alt="enter image description here" /></a></p>
<p><sup>Original image: <a href="https://i.stack.imgur.com/eVT6c.jpg" rel="nofollow noreferrer">https://i.stack.imgur.com/eVT6c.jpg</a></sup></p>
| Identify part marked 'Z14' or '214' | 2024-02-22T14:55:08.027 |
702555 | |amplifier|feedback|switched-capacitor| | <p>The amplifier output is not shorted; it can be modeled as a unity-gain amplifier with an input of zero volts driving capacitor C1. Assume C2 starts at zero volts, and Vin is a constant. C1 is charged to VIN:</p>
<p><a href="https://i.stack.imgur.com/S3ugx.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/S3ugx.jpg" alt="enter image description here" /></a></p>
<p>When SW4 opens and SW3 closes, the right side of C1 is instantaneously at -VIN. But SW2 opens and SW1 closes and OA1-output is driven positive to until OA1-minus input is back to zero. This occurs when its output voltage is C1/C2:</p>
<p><a href="https://i.stack.imgur.com/PSp2s.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/PSp2s.jpg" alt="enter image description here" /></a></p>
<p>At the next interval, C1 is once again charged to VIN, but C2 retains its charge:</p>
<p><a href="https://i.stack.imgur.com/WuQDV.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/WuQDV.jpg" alt="enter image description here" /></a></p>
<p>As before, when SW4 opens and SW3 closes, the right side of C1 is instantaneously at -VIN. But this time when SW2 opens and SW1 closes OA1-output must drive more positive to get OA1-minus input back to zero, because C2 already has a voltage of -C1/C2. Therefore, OA1 output must reach 2(C1/C2):</p>
<p><a href="https://i.stack.imgur.com/QNJ4X.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QNJ4X.jpg" alt="enter image description here" /></a></p>
<p>So what you have is a variable integrator, whose time constant can be adjusted by varying the frequency of the switches.</p>
| <p>To consider the effect of loading in a shunt-shunt amplifier that is being analyzed with two port analysis, we short the feedback network at the input/output to calculate loading at the amplifier output/input.</p>
<p>Also, inverting amplifier topologies are often analyzed as shunt-shunt configurations after a Norton transformation is applied at the input.</p>
<p>Consider the following switched-capacitor (SC) integrator below. The input is sampled onto C1 during one clock phase (even-numbered switches closed) and integrated onto the feedback capacitor during the second clock phase (odd-numbered switches closed).</p>
<p>How would I model the open loop amplifier with feedback network loading during the sampling phase? If SW2 is closed, and I short the feedback network at the amplifier input to consider loading at the amplifier output, then the amplifier output is shorted. This would predict 0 loop gain for the circuit in the sampling phase, which I do not think is true.</p>
<p><img src="https://i.stack.imgur.com/iN6jf.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fiN6jf.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
| Two port feedback analysis of shunt-shunt amplifier with unity feedback | 2024-02-22T20:32:08.880 |
702564 | |transformer|ac|induction| | <blockquote>
<p><em>Would the secondary coil have an inductive reactance in this process?</em></p>
</blockquote>
<p>For a <strong>non-ideal inductance</strong> you will have leakage inductance. So, the secondary would have a small inductive reactance based on the coupling between primary and secondary not being 100%. If it's a 1:1 transformer and the magnetization inductance is 1 henry with coupling at 98%, the leakage inductance is 20 mH. If the transformer steps down by 10:1, the leakage inductance at the secondary would be 100 times smaller at 200 μH.</p>
<p>For an <strong>ideal</strong> inductance, there can be <strong>no</strong> leakage inductance and, if the primary source is a 100% voltage source then there is no inductance associated with the secondary. However, if the primary source is not ideal then, you will see a transformed impedance at the secondary and, if the source is inductive then, you will register an inductance at the secondary.</p>
| <p>In a setting like that in an ideal transformer. An AC source connected to the primary induces an AC voltage in the secondary. Would the secondary coil have an inductive reactance in this process?</p>
| Would the inductor have an inductive reactance due to mutual induction via an AC source? | 2024-02-22T22:37:27.670 |
702583 | |opto-isolator|gate-driving| | <p>Looks good, but you will have to connect your <code>-5V Iso</code> to the switch node of the first half-bridge leg. That way, the isolated power will be always 10 V above the source of the high-side MOSFET. You don't need a bipolar isolated supply. A single voltage isolated supply is enough.</p>
<p>And also take note of DKNguyen's comment. Using a half-bridge driver instead of the two optos, will make the signal translation much easier, faster and probably less skewed.</p>
| <p>First of all, it can be unnatural using a translator. I'm sorry.
I'm trying to drive the high side switch through gate driver that doesn't use bootstrap method. I think we can use optocoupler type gateriver. I think the high side can use isolated DC/DC converter to power it.
I thought it was possible by referring to the following data. Is it the right data?
Additionally, can I use this type of gate driver to get circuit diagram information that drives half or full bridges? Thank you.
<a href="https://i.stack.imgur.com/axJ25.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/axJ25.png" alt="enter image description here" /></a>
In addition, it's a circuit diagram that I'm thinking about.
<a href="https://i.stack.imgur.com/417u2.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/417u2.jpg" alt="enter image description here" /></a></p>
<p>I referred to the following link.
<a href="https://electronics.stackexchange.com/questions/498009/optocoupler-reference">Optocoupler Reference</a></p>
| I want to drive half bridge using gate driver that doesn't use bootstrap method | 2024-02-23T04:26:45.550 |
702602 | |motordriver| | <p>The purpose of bulk capacitor is like reservor for inrush current from driving load just like bypass capacitor.
The result of absent or too low capacitant is voltage ripple due to current draw .
<a href="https://i.stack.imgur.com/xGyjN.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xGyjN.png" alt="enter image description here" /></a></p>
<p>This effect came form inductance of power wire and ESR of power source and load's current behavior.</p>
<p>So it possible to reduce to buck capacitor value but you need to verify on the real system and do some work around like minimize the length of power line, use high current capabillity power source, etc.</p>
<p>Honestly just use the bulk capacitor that recommended. 47 uF is very reasonable value to use. The preblems that came after might need more money to fixed than a capacitor price.</p>
| <p>I am designing a HVAC control panel for 4 wheeler. In my design I am using 4 DRV8871-Q1.
The motor ratings are:</p>
<ul>
<li>Type = Brushed DC motor</li>
<li>Operating Voltage = 9-16V DC</li>
<li>Nominal Voltage = 12V DC</li>
<li>Nominal Load Current <= 150 mA</li>
<li>No Load Current = 50 mA</li>
<li>Stall Current <= 400 mA</li>
</ul>
<p><a href="https://i.stack.imgur.com/cFvDU.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cFvDU.png" alt="schematic" /></a></p>
<p><a href="https://i.stack.imgur.com/bUjLQ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bUjLQ.png" alt="PCB" /></a></p>
<p>I am using four 47uF 35V electrolytic bulk capacitors which increases the overall price of the product.</p>
<p>My question is that can I use smaller value of bulk capacitor maybe of 0.1uF or 0.47uF ceramic cap, as it is already in the circuit design and is much cheaper.</p>
| DRV8871 Motor driver bulk capacitance value | 2024-02-23T09:29:12.857 |
702606 | |circuit-analysis|filter|emc|emi-filtering|passive-filter| | <blockquote>
<p><em>For example lets us take L1, it's value is 10uH. Why 10uH? Why not 1uH
or 100uH?</em></p>
</blockquote>
<p>Data and DC power are superimposed and, what you don't want is the impedance of the applied DC voltage to be so inflexible that data gets badly distorted or highly attenuated. So, you need an inductor. It's called <a href="https://en.wikipedia.org/wiki/Phantom_power" rel="nofollow noreferrer">phantom powering</a> and, if you know anything about telephones, you'll know that to superimpose audio on top of the DC power you need a DC supply with high compliance.</p>
<p>It's the same with ethernet if you want to transmit power and data together; you need an interface that can combine both without corrupting the data and, without radically reducing the power.</p>
<p>So, if your lowest data rate is (say) 10 kbps, you need to ensure that the inductor that feeds power has an impedance at 5 kHz that is significantly higher that the data's source impedance. If the data impedance is 50 Ω, you want the inductor to have an impedance of 500 Ω (or more) at 5 kHz.</p>
<p>That's 16 mH (give or take)</p>
<ul>
<li>If the lowest data rate is 1 Mbps you choose an inductor to be no smaller than 160 μH.</li>
<li>If the lowest data rate is 10 Mbps you choose an inductor to be no smaller than 16 μH.</li>
</ul>
<p>These are rules of thumb but, in reality, if the data has long periods of idle then you have to ensure that the idle condition is removed by (typically) scrambling the data. You need to understand your data before making decisions on the inductor.</p>
<blockquote>
<p><em>How they arrived the spec for FB1, FB2 and FB3?</em></p>
</blockquote>
<p>The ferrite beads counteract the problem that all inductors have aka self-resonant frequency. Above the SRF the inductor starts to behave like a capacitor and that will corrupt data quite badly so, you ensure that FBs are added in series with the inductor so that they keep the impedance (looking into the power line) high for a wide range of frequencies.</p>
| <p>I need to design a PoC filter for one of my project. I am referring <a href="https://www.ti.com/lit/an/snla224a/snla224a.pdf?ts=1708644945684&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FDS90UB960-Q1&_ticdt=MTcwODY2MTg5M3wwMTg3NDY4MDk2NDgwMDE0MzkxYzRjZGY0YjZiMDUwNmYwMDM0MDY3MDA5Nzh8R0ExLjEuMTE3ODkxMzQ1LjE2ODA1MTUwNDV8bnVsbHxudWxsfEdTMS4xLjE3MDg2NjA5MDkuMjEzLjEuMTcwODY2MTg5My4wLjAuMHxudWxsfEdTMS4xLjE2OTgzODM4NjQuMS4xLjE2OTgzODM5NzEuMC4wLjB8bnVsbA" rel="nofollow noreferrer">this document</a> for the same. Below is the PoC filter given in page in 13. I am using only TI parts. This document is from TI.</p>
<p><a href="https://i.stack.imgur.com/B280P.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/B280P.png" alt="enter image description here" /></a></p>
<p>This document does not contain any mathematical calculations of how they arrived the component values.</p>
<p>For example lets us take L1,it's value is 10 uH. Why 10 uH? Why not 1 uH or 100 uH?</p>
<p>How they arrived the spec for FB1, FB2 and FB3?</p>
<p>Can someone please explain the math behind these?</p>
| Power over Coax (PoC) filter design calculations | 2024-02-23T09:50:46.123 |
702613 | |can|deserialiser| | <p>You can't pass a CAN bus through those chips. You can use a custom connector with both FPD-Link 3 and CAN bus. Or since the chips allow for I2C bus which is bi-directional, you could use a CAN bus controller with I2C bus. Or just use I2C if you can do without CAN.</p>
| <p>I am using below <a href="https://www.ti.com/lit/ds/symlink/ds90ub925q-q1.pdf?ts=1708684608445&ref_url=https%253A%252F%252Fwww.google.com%252F" rel="nofollow noreferrer">serializer</a> and <a href="https://www.ti.com/product/DS90UB926Q-Q1" rel="nofollow noreferrer">de serializer</a> in my design. The communication is happening via FPD LINK.</p>
<p>The block diagram is given below.</p>
<p><a href="https://i.stack.imgur.com/Nc1mI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Nc1mI.png" alt="enter image description here" /></a></p>
<p>I have a CAN bus connected between the these two boards.</p>
<p><strong>My question is it possible to send CAN BUS information using FPD link ?.</strong></p>
<p>If it is possible means I can reduce one connector in my board</p>
| Is it possible to send CAN BUS information using FPD link? | 2024-02-23T10:38:17.903 |
702616 | |connector|footprint|bga|solder-paste|solder-mask| | <p>The openings for the STENCIL to which solder paste is applied (also called the paste mask) is slightly smaller than the pad, whereas the openings for the SOLDER MASK itself, which becomes integral to the PCB, is slightly larger than the pad.</p>
<p>This is because tolerances aren't perfect and you really don't want the solder mask to cover the pad. It's main job is to stop bridges so as long as it exists between pads it should do it's job.</p>
<p>So did you actually mean solder mask? Or did you really mean the paste mask?</p>
<p>You say "much bigger though" but the solder mask is usually bigger than the pad by only 0.1mm/3-4 mils/3-4 thousandths larger in diameter.</p>
<p>Similarly, the paste max is usually something like 0.1mm/3-4 mils/3-4 smaller than the pad diameter.</p>
| <p>I'm designing a breakout (debug) card for the FPGA Evaluation Board VC707. For this I'm using two FMC connectors (<a href="https://shop.trenz-electronic.de/de/24998-ASP-134488-01-male-MC-HPC-10" rel="nofollow noreferrer">MC-HPC-10</a>), for footprint and design of the connector I got help from the website (<a href="https://www.fmchub.com/" rel="nofollow noreferrer">FMCHUB</a>).</p>
<p>It's an open-source HW project. It's a fairly accurate design and it helped a lot.</p>
<p>I'm soldering these connectors at home with a reflow oven. The connector has no balls on it. The footprint has an issue, that the solder paste openings are much bigger than the solder mask openings:</p>
<p><a href="https://i.stack.imgur.com/Puw3e.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Puw3e.png" alt="enter image description here" /></a></p>
<p>Is this common for a BGA grid? Should I rescale the solder paste (stencil opening) to the same size of the solder mask opening, or is this going to be fine?</p>
| Does a BGA connector usually have bigger solder paste than the solder mask opening? | 2024-02-23T10:45:02.850 |
702643 | |integrated-circuit|identification| | <p>It's a <a href="https://www.monolithicpower.com/en/documentview/productdocument/index/version/2/document_type/Datasheet/lang/en/sku/MP1540/document_id/11344/" rel="nofollow noreferrer">MPS MP1540</a> step-up converter. The actual marking is <code>D9MU</code>, the "I" is the pin 1 indicator.</p>
<p><a href="https://i.stack.imgur.com/h5bCB.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/h5bCB.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/vofrx.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/vofrx.jpg" alt="enter image description here" /></a></p>
<p>(Source: <a href="https://item.szlcsc.com/15709.html" rel="nofollow noreferrer">szlcsc.com</a>)</p>
| <p>I can't find this IC in the red box
<a href="https://i.stack.imgur.com/RQeG2.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RQeG2.jpg" alt="ID9MU" /></a></p>
| I need to find IC marked ID9MU | 2024-02-23T14:55:20.607 |
702671 | |buck|transfer-function|frequency-response| | <p>It is unclear to me why you did not use an averaged model such as the PWM switch to describe you buck converter? It would be so much easier and reliable. You can download simulation examples in LTspice from my <a href="http://powersimtof.com/Spice.htm" rel="nofollow noreferrer">web page</a>, there are buck circuits built by my readers.</p>
<p>For your compensation exercise, you could use my free <a href="http://powersimtof.com/Downloads/Book/Christophe%20Basso%20SIMPLIS%20Collection.pdf" rel="nofollow noreferrer">ready-made templates</a> running with the demo of SIMPLIS, Elements. This is fast and easy, load the example, press F9 and you'll have the operating and the compensated ac response, all automated with the macro in the right side:</p>
<p><a href="https://i.stack.imgur.com/RTJUX.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RTJUX.png" alt="enter image description here" /></a></p>
<p>In a fraction seconds, you have the bias point and the compensated ac response:</p>
<p><a href="https://i.stack.imgur.com/JU8Og.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JU8Og.jpg" alt="enter image description here" /></a></p>
<p>Then run a transient step and enjoy the stable response:</p>
<p><a href="https://i.stack.imgur.com/djj1W.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/djj1W.png" alt="enter image description here" /></a></p>
<p>With this type of configuration, the phase margin is read as the distance from the phase evaluated at the 0-dB crossover frequency and the 0° line. You can change the poles and zeroes position, the automated macro will calculate the new components values to check how they affect the ac response or the transient response. Kinda cool and fast!</p>
| <p>I've modeled the equivalent model for the <a href="https://www.ti.com/lit/ds/symlink/tps54350.pdf?ts=1708616248407&ref_url=https%253A%252F%252Fwww.google.com%252F" rel="nofollow noreferrer">TPS54350</a> shown on page 14, Figure 23, using component values from application circuit on page 15, Figure 24.</p>
<p>I'm feeling quite rusty on my controls knowledge so I've been playing around with this model and have only come out more confused than I was to begin with.</p>
<p>LTspice schematic of the control loop model:</p>
<p><a href="https://i.stack.imgur.com/PRvFo.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/PRvFo.jpg" alt="TPS54350 Control Loop Model" /></a></p>
<p>From page 14:</p>
<blockquote>
<p>Plotting b/c shows the small-signal response of the power stage. Plotting c/a shows the small-signal response of the frequency compensation. Plotting a/b shows the small-signal response of the overall loop.</p>
</blockquote>
<p>Frequency response of the control loop model:</p>
<p><a href="https://i.stack.imgur.com/wcQdZ.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wcQdZ.jpg" alt="Control loop model frequency response" /></a></p>
<p>Expected loop response from TPS54350 datasheet:</p>
<p><a href="https://i.stack.imgur.com/cF7Kx.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/cF7Kx.jpg" alt="enter image description here" /></a></p>
<p>For the sake of sanity checking myself on my definitions of crossover frequency and phase margin am I correct in saying that the overall loop response has a crossover frequency of 27 kHz and a phase margin of 215° (34 - (-180) = 215)? Which would mean the overall loop response is very stable as the PM is >45°?</p>
<p>I don't understand why the power stage and frequency compensation responses are increasing in gain. I was under the assumption that the overall loop gain would be the sum of the frequency comp gain and power stage gain which is clearly not the case here. Is that even a true statement?</p>
<p>In an effort to further understand the compensation circuitry I removed it all from the circuit and ran the simulation again.</p>
<p>SPICE schematic of the control loop model with compensation circuitry removed:</p>
<p><a href="https://i.stack.imgur.com/rbx3e.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/rbx3e.jpg" alt="Control loop model frequency response no compensation circuitry" /></a></p>
<p>Frequency response of the control loop with no compensation:</p>
<p><a href="https://i.stack.imgur.com/245kP.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/245kP.jpg" alt="Frequency response of the control loop with no compensation." /></a></p>
<p>If I am understanding it correctly, the phase margin is the distance from -180° at 0dB. This means that without compensation the overall loop still has a PM of 106° and is therefore considered stable? Also, how is it possible that the frequency compensation response didn't change at all? In my mind it makes more sense that c/b would be the frequency compensation response and a/c the power stage response, why isn't that the case?</p>
| Clarification of the loop response of a TPS54350 buck converter (LTspice) | 2024-02-23T18:02:50.877 |
702674 | |lithium-ion|safety|battery-storage| | <p>If the batteries won't thermally run away, they can be stored under your bed, but the point is that they <em>may</em> run away, and storing flammables under your bed is a bad idea in general, and they remain flammable even if they can't run away from stored electrochemical energy. The electrolyte itself is flammable even if the lithium were to disappear.</p>
<p>Once a cell runs away and gets hot, keeping other cells near to it in a box only aggravates things. A steel box is not much help if the hot gases will build up pressure, erode the seals, and turn the box into a little stationary rocket engine. They have a tendency to set stuff on fire :)</p>
<p>Make sure the batteries are fully and safely discharged, down to 0V. They are not meant for reuse, they are meant for material extraction. Keeping wonky cells for potential reuse by others is a whole another kettle of fish you don't want to get into - it's more involved that just storing junk cells for future recycling (not reuse!).</p>
<p>Make a point of them staying at 0V by soldering or clipping a jumper across terminals. Insulating the terminals is rather counterproductive: you want them at 0V, nothing else. Insulation will let charged cells slip surreptitiously into the junk pile.</p>
<p>When discharged to 0V, thermal runaway is not a viable outcome anymore AFAIK, so that's a basic precaution to take.</p>
<p>At that point, a basic 1/8" plate steel box kept outside, away from dry/flammable vegetation, should do fine. Make a 1/4" hole in the bottom of the box, and put it on a small pile of sand, so that if anything decides to go off inside the box, the hot gas will go into the sand. It's probably overkill, but I can't imagine it can be made any more inert than that, other than by dumping said box into a large drum full of water. Then you will have the unenviable task of having a drum of potentially contaminated water to dispose, but if you can manage to let it evaporate, the dry residue is just basic household hazardous waste.</p>
| <p>Is there a standard practice for storage of loose lithium ion battery cells that will be disposed of eventually? (in the timeframe of up to 1 year)</p>
<p>Currently, prior to disposal,
I have been storing unused lithium ion battery cells by taping up both ends in electrical tape, and then putting them into ESD bags, then putting ESD bags into a sealable metal container with rubber lining for insulation, with the container on concrete flooring. All in a dry room-temperature environment away from sunlight, as suggested from <a href="https://ehs.oregonstate.edu/sites/ehs.oregonstate.edu/files/pdf/si/lithium_fire_prevention_si093.pdf" rel="nofollow noreferrer">here</a>.</p>
<p>Even with all that, there is some concern still that all these measures aren't necessarily safe.</p>
<p>From <a href="https://www.gard.no/web/articles?documentId=35150780" rel="nofollow noreferrer">here</a>, there's some indication that lithium ion batteries can continue to burn without oxygen.
("<em>Li-ion battery fires can continue to burn without access to additional oxygen. They may also continue to generate high amounts of heat following fire-extinction and are at risk of re-ignition.</em>")</p>
<p>along with some concerns about the possible <a href="https://skeptics.stackexchange.com/questions/30615/can-lithium-ion-batteries-explode-or-self-ignite">self-ignition of batteries</a>.</p>
| Standard practice for storage of old / unused lithium ion battery cells prior to disposal | 2024-02-23T18:13:49.537 |
702677 | |audio|noise|preamp| | <p>Solved by using an Op Amp with EMIRR (EMI Rejection Rate).
I used TL071 and the clicks were almost completely gone.</p>
<p>P.S. OPA1641 didn't help at all, even though its EMIRR should be much higher. Probably I got the fake chips. I am a newbie in this, so finding out the chips can be fake was a big surprise to me...</p>
| <p>I have a 741-based audio amplifier PCB here from the 70s:</p>
<p><a href="https://i.stack.imgur.com/9RFG3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/9RFG3.png" alt="enter image description here" /></a></p>
<p>When I tried to test it, I powered it with a 24V battery (I tried 12V as well with no difference,) then I shorted pins 15-19, connected the output to my ADC (analog-to-digital converterm which is together with a laptop running off DC battery) (I tried Arturia Minifuse 4 and tried Zoom H1) and noticed that once every 10-30 minutes there is a sharp spike (pop/click) on a waveform. Sometimes that spike is 15 db louder than the noise floor, sometimes it is 60 db louder. Often these spikes came in pairs with ~2 min interval between them, but overall everything seemed random to me.</p>
<p>I disconnected my ADC and shorted its inputs (to rule out laptop/ADC problem) and there was <strong>no</strong> problem at all.</p>
<p>Then I tested this circuit on a breadboard (only one channel). I tested it and the problem was there. The same spikes roughly once every 15 minutes.</p>
<p>I tested other op amps (for example, different manufacturers of 741 and also tried LME49710NA) but there was no difference.</p>
<p>Then I decided to try a different circuit. I tried this one:</p>
<p><a href="https://i.stack.imgur.com/r2G96.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/r2G96.png" alt="enter image description here" /></a></p>
<p>The problem was still there.</p>
<p>So I ruled out a laptop, a ADC, cables between them, I ruled out a problem with a PCB, problems with op amp</p>
<p>What can I be possibly missing here?
As I am not using any input signal, it's not the "source".</p>
<p>Oh, right, and the power supply: I've tested and it's not related to the problem. Here, take a look yourself. The top channel is audio, the bottom channel is the battery voltage.</p>
<p><a href="https://i.stack.imgur.com/vLyug.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/vLyug.png" alt="enter image description here" /></a></p>
<p>A local repairmen told me such problem is not "repairable." Are they correct?</p>
<p>I am sure I did something wrong, but I am tunneling and can't see any alternatives.</p>
<p><strong>UPDATE 1a:</strong>
I've noticed a small peculiar thing. In my old fridge there is a lever which turns off an inner 15w bulb when you close the door. So when I press that lever sharply, there is a pop/click/spike in a waveform.
The distance between my "test setup" and my fridge is 3 meters.
The bulb is not 1000w, but just 15w.
It's just a bulb after all!!!</p>
<ol>
<li>I don't understand, what's the connection between the two. My test
setup is completely disconnected from the mains. How does that 15w turning on/off 3 meters apart change the processes on a PCB which has only 5.7 gain??? Turning on/off a 3000W IR heater doesn't do anything. That same fridge switching between its modes doesn't do anything to the waveform!!</li>
<li>Shouldn't a regular preamp PCB be prone to such things? I mean that Arturia Mini or Zoom H1 don't react at all to the bulb switching...</li>
<li>It could be some of my neighbours has a home-made xray apparatus or a portable atomic power station which causes these once every 30 (15?) minutes...</li>
</ol>
<p><strong>UPDATE 1b:</strong>
I was trying to figure out what's common between the battery, the 70s PCB and my breadboard version.
And I thought about... pins. Breadboard has poor pins contact by definition. While the 70s PCB may have something corroded (even though I can't really see this visually; although the pins are not brand-new-shiny).
So I've used some contact cleaner on those and maybe (just maybe, I may very well be lying to myself) there was an improvement.
And I thought to myself: what if corroded pins have become capacitors??? And that's why they became more prone to some specific EMI which is sometimes in the air?
Am I reading too much of science fiction?</p>
<p><strong>UPDATE 1c:</strong>
This is one of the pops zoomed in (top is left from PCB, bottom is right from PCB):
<a href="https://i.stack.imgur.com/48dWc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/48dWc.png" alt="enter image description here" /></a></p>
<p><strong>UPDATE 2a:</strong>
As you advised me to decouple/filter the power supply even more, I've added a pair of 100uF caps between + and - for each opamp. Unfortunately, there was absolutely no improvement. Here:
<a href="https://i.stack.imgur.com/enfIr.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/enfIr.png" alt="enter image description here" /></a></p>
<p><strong>UPDATE 2b:</strong>
My test setup. Just a plain PCB. All the electricity in my apartment was off at this moment.</p>
<ul>
<li>off battery is soldered to pin 13 (to ensure no contact problems).
All other pins are connected to the battery's - via a crocodile clip.
Please disregard the top part (unconnected) of the PCB as it is not electrically connected with the pre amp. The designers just made 2 different blocks on same PCB.
Thin yellow wire is sticked into left channel's output. And thick black crocodile peeking from underneath is soldered to the right channel's output.
On the left side of the image you can see Zoom H1 which acts as an ADC here. Zoom H1 is somehow <strong>completely</strong> ignorant to all these EMI/whatever things that causes the pops/clicks.
Laptop has its WIFI/Bluetooth off as well.
<a href="https://i.stack.imgur.com/Omsrm.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Omsrm.jpg" alt="enter image description here" /></a></li>
</ul>
| Trying to record from DIY op-amp results in seldom pops and clicks | 2024-02-23T18:45:17.640 |
702679 | |power-supply|switches|dc-dc-converter| | <blockquote>
<p>Is this a bad idea?</p>
</blockquote>
<p>It's fine.</p>
<p>It offers redundancy: if one of the 12V loads shorts out, the buck converter will go into a current limit mode, saving the main supply. So it's like using a smart protected load switch.</p>
<p>If you have substantial decoupling capacitance on your 12V loads, and you want to turn one of them on and off without affecting the others, a buck converter will do this easily. On the other hand, a switch sitting between a +12V supply and a bunch of discharged capacitors will have to turn on slowly and limit current, which means the internal MOSFET needs to operate in linear mode and dissipate power. Depending on the amount of capacitance this may get a bit complicated if the MOSFET is external to the switch, with the IC not being able to sense its temperature and protect it.</p>
<p>Also, conduction losses are RI² so two identical buck converters carrying half the current each will have lower conduction losses if you use the same chips.</p>
| <p>I'm working on the power distribution PCB of a battery powered robot with multiple loads at 24V, 12V and 5V. My idea is to use a big 24V converter, and then another two smaller converters to go from 24 to 12 and 5V. This PCB needs to be able to cut power to different groups of loads independently, so I was going to use power switch ICs or MOSFETs and drivers.</p>
<p>My problem is, that while looking for the components I realized that, for example, I only have two groups of 12V loads and the 12V converter is cheap and small enough that I could just put two of them, each of them powering a group independently, and use their on-off control input instead of adding two switches.</p>
<p>I think this idea can work, but I've been searching for similar implementations on the internet and found nothing. Is this a bad idea? Are there any disadvantages to using multiple regulators instead of one followed by switches that I´m not taking into account, apart from the increase in price?</p>
| Powering multiple loads at same voltage with separated DC-DC converters | 2024-02-23T18:59:24.893 |
702722 | |wireless|digital-communications|dsp| | <blockquote>
<p><em>What does limiter exactly do in FSK demodulators?</em></p>
</blockquote>
<p>It does the same job whether the transmission is FSK or regular broadcast FM. A normal <strong>FM</strong> radio receiver can use <strong>AM</strong> demodulation techniques such as an envelope detector but first, it has to ensure that the frequencies in the band of interest are all amplitude controlled: -</p>
<p><a href="https://i.stack.imgur.com/fiBWD.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/fiBWD.png" alt="enter image description here" /></a></p>
<p>Image from <a href="https://www.cdt21.com/design_guide/fm-capture-effect/" rel="nofollow noreferrer">FM capture effect</a>.</p>
<p>First it uses an amplitude limiter then, it uses a tuned circuit to convert the limiter's flat spectral amplitude into a spectrum with slope. Then it can use an AM detector. This overall is called an FM slope detector and it relies on the spectrum being "flattened" by the limiter.</p>
<p>The limiter also does other things like rejecting local AM carriers or weaker signals thus maintaining a high-degree of fidelity in the detected signal: -</p>
<p><a href="https://i.stack.imgur.com/UiFSz.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/UiFSz.png" alt="enter image description here" /></a></p>
<p>The limiter also acts "like an" AGC (call it automatic level control) in that anything received across the full spectrum is converted to the same amplitude thus making it easier to design the rest of the circuitry.</p>
| <p>I wonder what exactly the limiter does in FSK demodulators.</p>
<ol>
<li>What are the advantages?</li>
<li>Could it be just a saturation in ADC or fixed-pointing stages?</li>
</ol>
| What exactly does the limiter do in FSK demodulators? | 2024-02-24T09:51:44.780 |
702729 | |digital-logic|timer|delay|multivibrator|analog-switch| | <p>Keeping a timer circuit running while in series with the toy's battery and the toy itself, with a low enough voltage drop such that the toy functions normally, almost certainly is not possible with standard components. However, an external circuit that would run for over a year on a single 9 V battery is entirely doable.</p>
<p>The device you linked to has several functions. Which of these do you want? If it is just the simple button press extender, that is one CMOS gate package and a specialized optocoupler that is actually a small solid state relay (SSR). Unlike a normal optocoupler, the SSR output stage is two MOSFETs in series that pass current in both directions.</p>
<p>In operation, the button press powers up a monostable circuit, the monostable drives the SSR, and the SSR switches power to both the toy and its own monostable circuit. After the timer time, the monostable releases the SSR, which unpowers both the toy and itself.</p>
<p>There is no on/off switch on the timer box. The only battery current during the off times is the leakage current through a CMOS gate and two ceramic capacitors.</p>
<p>This can be done with just two MOSFETs instead of a logic gate package, but you will get more accurate and repeatable operation and snappier on/off to the toy with Schmitt trigger gates.</p>
<p>If all of this sounds ok, then one question is what to do if the button is pressed again during the timer cycle - ignore or restart the 2 minutes?</p>
<p>If this sounds like it is within your skill set, schematic to follow.</p>
<p>Two thoughts. First, a long R-C timer is not very accurate. For better performance, an oscillator-divider such as the CD4060 can be more accurate because it uses a 8000x smaller timing capacitor, always a good thing.</p>
<p>Second, the part about the circuit switching power to itself might not be necessary, The static current in a typical CMOS logic package is less than 1 uA. Over one year, that is less than 10 mA-h, approx. 20% of the battery's capacity. This reduces the circuit's complexity and body count.</p>
<p>UPDATE:</p>
<p>Here is a first pass at a complete circuit. It looks like a lot of parts, but it is very straightforward: Button - R-C Timer - Output (plus an additional blinker).</p>
<p><a href="https://i.stack.imgur.com/XePUX.gif" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XePUX.gif" alt="enter image description here" /></a></p>
<p>U1A and U1B form a classic, true monostable. Once the button is pressed, more presses during the timing cycle have no affect; the cycle does not restart. D1 protects the U1B inputs from a reverse-voltage spike at the end of the cycle. While most power MOSFETs can handle -20 V on the gate, CMOS input stages cannot.</p>
<p>R2-C2 are the timing components. The time period is a little less than 1 x R x C, depending on the U1B input threshold voltage. A Schmitt trigger input stage has two thresholds, one a bit above Vcc/2 and one a bit below. It is the upper one that matters in this circuit. These are not tightly-controlled parameters, so your results will vary.</p>
<p>U2 is a small solid state relay in a DIP package. It needs only 2 mA of LED current when operating, and is the only real current load on the battery.</p>
<p>U1D is a relaxation oscillator heartbeat display, just something to do with a spare gate. Note that this circuit uses the charge built up in its timing capacitor C3 to light D1, so the circuit consumes less than 9 uA when running. R3 and C3 can be adjusted for a different flash rate, but keep R3 at a high value to reduce the battery load. If you don't want this feature, delete R3, C3, and D1, and ground both gate inputs.</p>
<p>An alternative to the heartbeat display is to add a visible LED in series with the U2 input. This uses the U1 input current, so it is free in terms of battery life. To do this, reduce R4 to 2.4 K or 2.2 K.</p>
<p>C1 is a decoupling capacitor and should be as close as possible to the U1 power pins, with short leads.</p>
<p>There is virtually zero static current when the timer is not running. Both sides of C2 are at or very near GND so there is no leakage current. Both sides of R3 are at or near Vcc so there is no almost zero current dribbling through the U2 input LED. The worst offenders are C1 and C3. Both should be ceramic types to reduce their combined leakage current to less than 1 uA.</p>
| <p>I would like to design a circuit that adds a power off delay</p>
<ol>
<li>What would you suggest, is it possible to solve that basing only on the circuits batteries? Modifier from the market uses own 9V power supply but I am thinking if a new circuit could share a power supply with the batteries.</li>
<li>If yes the timing should not depend on the supply voltage.</li>
<li>Also it should not be dependant on the polarity of the loads voltage. And it should not draw the battery quickly.</li>
</ol>
<p>The setup could look like this:</p>
<p><a href="https://i.stack.imgur.com/k71TG.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/k71TG.png" alt="enter image description here" /></a></p>
| Timed momentary switch modifier | 2024-02-24T11:34:58.777 |
702732 | |analog|integrated-circuit|common-mode|differential-amplifier|maximum-ratings| | <p>About fig. 9.14 a) & b).</p>
<p>a)
<span class="math-container">$$
V_{g_1}-V_{s_1} - V_{th_1} \leq V_{d_1}-V_{s_1}
$$</span></p>
<p>Simplify:
<span class="math-container">$$
V_{g_1}-V_{th_1} \leq V_{d_1}
$$</span>
Mind you, <span class="math-container">\$V_{g_1}=V_{g_2}=V_{cm}\$</span> (same for picture b).</p>
<p>Then, we can write the drain voltage of M1 as:
<span class="math-container">$$
V_{d_1} = V_{s_3} = V_{b_1} - V_{gs_3}
$$</span>
In other words, we "walk" down from <span class="math-container">\$V_{b_1}\$</span> by a <span class="math-container">\$V_{gs}\$</span> term.</p>
<p>Then, replace <span class="math-container">\$V_{d_1}\$</span> by the last expression:
<span class="math-container">$$
V_{g_1}-V_{th_1} \leq V_{b_1}-V_{gs_3}
$$</span>
Re-arranging:
<span class="math-container">$$
V_{g_1} \leq V_{b_1}-V_{gs_3} +V_{th_1}
$$</span>
Done.</p>
<hr />
<p>Start the same way for picture b). I'll skip the 1st step (I started from the <span class="math-container">\$V_{sg}\$</span> because it's a PMOS.) :
<span class="math-container">$$
-V_{g_1} - |V_{th_1}| \leq -V_{d_1}
$$</span>
We know that <span class="math-container">\$V_{d_1} = V_{b_1} - V_{gs_3}\$</span> here as well.
First, get rid of the minus signs and isolate <span class="math-container">\$V_{g_1}\$</span>:
<span class="math-container">$$
V_{g_1} \geq V_{d_1} - |V_{th_1}|
$$</span></p>
<p>Replace the <span class="math-container">\$V_{d_1}\$</span> term with its equivalent as we did picture a) and we're done:
<span class="math-container">$$
V_{g_1} \geq V_{b_1} - V_{gs_3} - |V_{th_1}|
$$</span></p>
<p>Razavi wrote <span class="math-container">\$V_{thp}\$</span>, but that's to probably notate it's a PMOS, he's definitely referring to M1 in picture b.</p>
<hr />
<p>On to your <strong>Question 2).</strong></p>
<p>I believe, since he's using an actual transistor to implement the tail current of those diff. amps in picture 4.9 (unlike picture 9.14), then he can also write both top and bottom limits of the common-mode voltage at the input; you cannot go too high because M1 will be out of saturation, and you cannot go too low because M3 will stop behaving like a current source.</p>
<p>He probably didn't use the other limit in picture 9.14 because an ideal current source has no minimum compliance voltage at it's terminals; they can be negative and the current will still be flowing, it's ideal after all.</p>
<p><strong>Question 3)</strong></p>
<p>It's easy to see that going from <span class="math-container">\$V_{cm,in}\$</span> down to the drain of M3 requires us to drop by a <span class="math-container">\$V_{gs}\$</span> term, which is the drop across gate-to-source voltage of M1.</p>
| <p>I will briefly state my understanding of the following equation, and then pose three questions at the end.<br />
Equation (1) (2) refers to the circuit in the first picture, Equation (3)(4)(5) refers to the circuit in the second picture.</p>
<p>In Razavi’s book, chapter 9.2.4 Folded-cascode op amps, he stated that</p>
<blockquote>
<p>In Fig. 9.14(a), the CM input level, cannot exceed<br />
<span class="math-container">$$V_{b1} − V_{GS3} + V_{TH1} \tag{1}$$</span>
whereas in Fig. 9.14(b), it cannot be less than<br />
<span class="math-container">$$V_{b1} − V_{GS3} − |V_{THP}| \tag{2}$$</span>
(where <span class="math-container">\$V_{THP}\$</span> stands for the threshold voltage of PMOS transistor)</p>
</blockquote>
<p>Fig 9.14
<a href="https://i.stack.imgur.com/mIl4O.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/mIl4O.png" alt="Fig.9.14" /></a></p>
<p>I am wondering, how is these 2 equations come from?</p>
<p>I have searched other parts of the book related to the range of CM input level, trying to find the origin of these two equations. In chapter 4.2, he provides the following formula, as shown in the attached picture.</p>
<p>Fig 4.9
<a href="https://i.stack.imgur.com/oTxpa.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oTxpa.png" alt="4.9" /></a></p>
<p>I think that I understand the right half the inequality equation, that we need to make sure the</p>
<p><span class="math-container">\$ V_{DS} \geq V_{OV} \$</span>
so that those transistors not enter into triode region.</p>
<p>But I have confusion about the left half of the inequality equation, for the left half, he stated that</p>
<blockquote>
<p>For a sufficiently high <span class="math-container">\$V_{in,CM}\$</span> , the drain-source voltage of <span class="math-container">\$M_3\$</span> exceeds <span class="math-container">\$V_{GS3} − V_{TH3}\$</span>, allowing the device to operate in saturation. The total current through <span class="math-container">\$M_1\$</span> and <span class="math-container">\$M_2\$</span> then remains constant. We conclude that for proper operation, <span class="math-container">\$V_{in,CM} ≥ V_{GS1} + (V_{GS3} − V_{T H3})\$</span>.</p>
</blockquote>
<p>Quote
<a href="https://i.stack.imgur.com/xP2nZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xP2nZ.png" alt="enter image description here" /></a></p>
<p>If I understand his words, correctly, his inequality equation.</p>
<p><span class="math-container">$$V_{in,CM} - V_{GS1} ≥ + (V_{GS3} − V_{T H3}) \tag{3} $$</span></p>
<p>Comes from that</p>
<p><span class="math-container">$$V_{DS3} ≥ V_{OV3} \tag{4}$$</span></p>
<p>Then this suggests that</p>
<p><span class="math-container">$$V_{in,CM}-V_{GS1}=V_{DS3} \tag{5} $$</span></p>
<p>I am curious about 3 questions</p>
<p>1: How is the boundary of CM input level of folded cascode amplifier calculated, that is to say, how is equation (1) and equation (2) derived from?</p>
<p>2: Is there any relation between the inequality of Fig 9.14 and Fig 4.9?</p>
<p>3: How is the Drain source voltage of transistor 3 in Fig 4.9 equal to <span class="math-container">\$ V_{in,CM}-V_{GS1} \$</span>, that is, how is equation 5 derived from?</p>
| How is the boundary of input CM level calculated? | 2024-02-24T12:20:16.550 |
702736 | |mosfet|mosfet-driver|gate-driving| | <p>This is quite a common solution for half-bridges that can't use a normal bootstrap circuit (i.e. ones that need to reach 100% duty cycle). It'll work perfectly fine.</p>
<p>You can save a few components (and some money) by using 12V or 15V for the high-side supply directly. Gate drivers don't need a very precise supply voltage. Isolated 12V and 15V DC/DC modules are quite inexpensive. (One part that should work is the CUI PDSE1-S12-S12-S.)</p>
<p>Similarly, you can also use 12V for the low-side driver supply. That way, you need only one buck converter to go from your 20..30 Volt input rail to 12V, which you can then use to power both the isolated DC/DC converter and the low-side driver. That's just two converters in total to power everything.</p>
| <p>I'm making a circuit for study purposes.</p>
<p>I want to deliver gate signal without using bootstrap method, overall circuit configuration is as follows.<a href="https://i.stack.imgur.com/yDRWt.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yDRWt.jpg" alt="enter image description here" /></a></p>
<p>The problem is operating the secondary high side switch. My switch needs a floating power supply of 10V to receive a gate signal of 10V.</p>
<p>So, here's the diagram you thought of.
<a href="https://i.stack.imgur.com/oBJbQ.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oBJbQ.jpg" alt="enter image description here" /></a></p>
<p>Based on the diagram, the circuit diagram is as follows.
<a href="https://i.stack.imgur.com/K8TsT.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/K8TsT.jpg" alt="enter image description here" /></a></p>
<p>Please check if there is anything wrong with the diagram and circuit diagram, thank you.</p>
| I want to run the high side switch without using the bootstrap | 2024-02-24T14:49:14.867 |
702737 | |identification|learning| | <p>In this particular case, the problem is the bad picture. Identifying the markings correctly is very important, because otherwise you're searching for parts that don't exist. Get a decent macro camera or microscope to make your life easier.</p>
<p>In your question you claim the markings are <code>1141AN61 ST AK024</code>. Just by looking at your bad quality picture, I can tell that this is not correct. The first letter is not really readable, but I can tell that it's not a "1" because it's missing the little marker at the bottom that all the other 1s have. Also the "N" is very clearly a "M".</p>
<p>Next we have to identify the relevant information. <code>ST</code> is clearly the STM logo as you found yourself. This leaves us with <code>?141AM61</code> and <code>AK024</code>. One of these is probably a product code or number. The other something irrelevant like a date or lot code. To identify what is what I try to look at similar parts from the same manufacturer. The package is SO-8 or something similar, so I search for pictures of the package from STM. I find <a href="https://www.lcsc.com/" rel="noreferrer">lcsc.com</a> very helpful for this, because they have standardized pictures of a lot of parts. This is the first result under the "Power Supply Chip" category (I'm just guessing the type of chip here):</p>
<p><a href="https://i.stack.imgur.com/9xlM6.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/9xlM6.jpg" alt="enter image description here" /></a></p>
<p>We can see that the marking style is very similar. The upper characters <code>L6388ED</code> are identical to the part number. So it's very likely that for the part in question <code>?141AM61</code> is the relevant information. I also look at the datasheet to find out that STM calls the package "SO-8", not "SOIC-8" like lcsc.</p>
<p>With this information, my first google search is "STM SO-8 141AM61". This is unsuccessful in this case, so next I try to vary the search a bit and try again. I did this a few times until I searched "STM 141A M61". This was successful and I found this part:</p>
<p><a href="https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/411/STM8T141.pdf" rel="noreferrer">STM8T141</a> capacitive touch sensor for touch or proximity detection.</p>
<p><a href="https://i.stack.imgur.com/CuCwR.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/CuCwR.jpg" alt="enter image description here" /></a></p>
<p>(Source: taobao)</p>
<p>We can now see the actual marking is <code>T141AM61</code>. If we had had this information from the beginning, it would have been a lot easier to find the part.</p>
| <p>I would like to learn. What is the procedure/steps to identify a chip on a board.</p>
<ul>
<li>Are there recommended website to identify the component (manufacturer website finder, AI image recognition, ...) ?</li>
<li>What if the label is difficult to read, can we just try all possible thght combination ?</li>
<li>Is there any special recommendations other than just typing the chip label in google ?</li>
</ul>
<p>Example (but it can by any other one): I would like to find information about the chip (1) see picture.</p>
<ul>
<li>I'm not sure about the label, something like "1141AN61 ST AK024" (this is the best image I could take ...)</li>
<li>Google gives nothing (i tried different combination)</li>
<li>I tried STM website but it doesn't help.</li>
</ul>
<p>I tried to search the forum, but only found direct answers for chip identification, no real procedure.</p>
<p>Any hint is welcomed !!!</p>
<p><a href="https://i.stack.imgur.com/lSvV4.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/lSvV4.jpg" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/qlOa0.jpg" rel="noreferrer"><img src="https://i.stack.imgur.com/qlOa0.jpg" alt="enter image description here" /></a></p>
| Newbie: How to identify a chip on a board, what is the best strategy? | 2024-02-24T14:53:09.320 |
703733 | |impedance|attenuator| | <blockquote>
<p><em>how is the insertion loss kept the same when we use different load
resistance if the source impedance is equal to the characteristic
impedance of the attenuator.</em></p>
</blockquote>
<p>It can't. If the load resistance (<span class="math-container">\$R_L\$</span>) doesn't match the prescribed value used in the calculations for the attenuator, then impedance matching to the output isn't achieved and neither will the attenuation (insertion loss) remain the same.</p>
<p><a href="https://i.stack.imgur.com/S6jhN.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/S6jhN.jpg" alt="enter image description here" /></a></p>
<p>If you were to make the output (load impedance) unequal to the input impedance then the relationship between R1, R2 and R3 change dramatically: -</p>
<p><a href="https://i.stack.imgur.com/WZwJn.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/WZwJn.png" alt="enter image description here" /></a></p>
<p>Image from <a href="http://www.stades.co.uk/Impedance%20TX/Taper%20pad%20attenuator.html" rel="nofollow noreferrer">my basic website</a>.</p>
| <p>I am studying about attenuators and read from my lab sheet that if the source impedance equals the characteristic impedance of the attenuator, the insertion loss given by <span class="math-container">\$N = \frac{v_{1}}{v_{2}}\$</span> where v1 is the voltage across the load without the attenuator and v2 is the voltage across the load with the attenuator attached, will be the same regardless of the load resistance used. If the source impedance is zero, the output has to be terminated in its characteristic impedance, this is clear as we already assumed this in the derivation of the resistors value for the attenuation we desired.</p>
<p>How is the insertion loss kept the same when we use different load resistance if the source impedance is equal to the characteristic impedance of the attenuator?</p>
<p><a href="https://i.stack.imgur.com/QzcIa.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QzcIa.jpg" alt="enter image description here" /></a></p>
| Why is insertion loss independent of load resistance? | 2024-02-24T16:28:40.927 |
703742 | |power-supply|power|ac|power-electronics|ac-dc| | <p><a href="https://www.meanwell-web.com/en-gb/ac-dc-ultra-slim-din-rail-power-supply-input-range-hdr--30--24" rel="nofollow noreferrer">HDR-30-24</a> is the manufacturers web page.</p>
<p>It has a link to the <a href="https://www.meanwell-web.com/content/files/pdfs/productPdfs/MW/HDR-30/HDR-30-24-rpt.pdf" rel="nofollow noreferrer">test report</a> shows the input current (typical) from the specification as well as the measured input current (which is less than the specification value) for the maximum output load:</p>
<p><a href="https://i.stack.imgur.com/iU2Be.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/iU2Be.png" alt="enter image description here" /></a></p>
<p>The <a href="https://www.meanwell-web.com/content/files/pdfs/productPdfs/MW/HDR-30/HDR-30-spec.pdf" rel="nofollow noreferrer">datasheet</a> shows a <code>RECTIFIERS & FILTER</code> block on the input, but doesn't list a <em>power factor</em>. The <em>power factor</em> of the assumed combination of rectifiers and smoothing capacitor may explain why the result of:</p>
<ul>
<li>0.54 A * 125 VAC = 67.5 W input power</li>
<li>is greater than the 36 W output power / 90.9% efficiency = 39.6 W</li>
</ul>
| <p>I'm trying to calculate the input power draw of an ACDC power supply that we are using in a control chassis and am confused by what to me looks like conflicting information in the datasheet.</p>
<p>The power supply is an <a href="https://www.digikey.com/en/products/detail/mean-well-usa-inc/hdr-30-24/7703799" rel="nofollow noreferrer">HDR-30-24</a> with datasheet <a href="https://www.meanwellusa.com/upload/pdf/HDR-30/HDR-30-spec.pdf" rel="nofollow noreferrer">here</a>. I'm confused because I see two ways to calculate the input power to this power supply (assuming drawing the full rated output power for this example).</p>
<p>Method 1:
The power supply has an output power rated at 36 W. The input efficiency (Typ.) is listed as 89%. So 36 / 0.89 = 40 W of input power I would expect if the load is drawing the full 36 W rated output.</p>
<p>Method 2:
The datasheet also says that the input AC current (Typ.) is 0.88A at 115VAC. The 115VAC is rms, so I would expect the input power to be 0.88*115 = 101 W from this calculation.</p>
<p>Which one is correct? What am I misunderstanding here? Thanks!</p>
| Calculating input power of ACDC power supply | 2024-02-24T18:48:42.433 |
703744 | |switches|safety|vintage| | <p>Why have this? I have seen tilt-down record players, where a cabinet panel tilts down revealing a record player mounted on the back</p>
<p>so this feature is probably intended to facilitate the use of this mechanism in that application.
<a href="https://i.stack.imgur.com/i304p.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/i304p.png" alt="enter image description here" /></a></p>
<p>image from pintrest. <a href="https://www.pinterest.nz/pin/62487513556911863/" rel="nofollow noreferrer">https://www.pinterest.nz/pin/62487513556911863/</a></p>
| <p>I'm looking at a vintage wire recorder that won't even turn on. Examining it, the power leads (both of them) go through separate mercury switches and on to the main transformer, etc.</p>
<p>The switch vials are positioned so that the mercury will act as a "tilt switch" in case the thing (which is an entire piece of furniture) is falling over forwards.</p>
<p>Why have this, what function do they provide other than this peculiar tilt switch? Is it not better to take them out and dispose of them safely?</p>
<p>It turned out that the switches were thoroughly cold soldered and those connections had gotten very loose. I took the opportunity to re-route the incoming leads to the destination of the outgoing leads, thus preparing to remove the mercury components ... if that's all right to do.</p>
<p><a href="https://i.stack.imgur.com/wH2Yk.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wH2Yk.jpg" alt="collage of device" /></a></p>
<p><a href="https://i.stack.imgur.com/gdRLI.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gdRLI.jpg" alt="schematic" /></a></p>
| What is the purpose of these mercury switches? | 2024-02-24T19:12:05.067 |
703752 | |can|termination| | <p>These parts likely are too slow to be used, up to 6ms switching time.</p>
<p>Compare that to your baudrate and count how many error frames that may get sent during that time, enough to put the part in error passive mode (128 errors)?</p>
<p>Probably, if my calculations are correct - assuming standard baudrate of 250kbps and 6 bit error frames and 3 interframe spacing, then 1/250kps * (6+3) = 36us. 6ms / 36us = 166 error frames.</p>
<p>I've encountered problems with crappy switching of CAN bus signals before - someone was using plain old car relays to switch CAN bus signals and relays are far too slow - giving the bus plenty of time to die completely until the switch was done.</p>
<p>Consider using analog switches instead, if you insist of having a MCU GPIO pin solution like this.</p>
| <p>I have tried to design a circuit for controlling the CAN bus 120 Ohms termination resistance by using a 3.3V GPIO from a STM32 MCU.</p>
<p>In the <a href="https://toshiba.semicon-storage.com/info/TLP170AM_datasheet_en_20210524.pdf?did=69016&prodName=TLP170AM" rel="nofollow noreferrer">SSR datasheet</a>, it specifies that the LED voltage should typically be 1.27V. So by using a voltage divider with 3.3V input and R1 = 20k, R2 = 13k that would result in 1.3V. I understand the issues regarding timing of the bus resistance etc. but since the customer of the product should open the box with the PCB, using physical switch is not preferrable.</p>
<p>The ON-state resistance is specified as 0.3 Ohms max, so the bus resistance should not be an issue in my opinion. I have not used SSR like this before, so if anyone could verify if the design should work in theory, that would be very helpful.</p>
<p><a href="https://i.stack.imgur.com/qzMXs.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qzMXs.png" alt="enter image description here" /></a></p>
<p><strong>EDIT:</strong> This is what my current solution looks like.
<a href="https://i.stack.imgur.com/tjBQ1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tjBQ1.png" alt="enter image description here" /></a></p>
| GPIO controlled CAN bus termination technique | 2024-02-24T21:28:06.577 |
703757 | |computer-architecture| | <p>At some point the distinction becomes a bit shady. It is possible to construct quite a complex state machine with nothing more than a PROM, a latch (from a subset of the outputs to the address inputs), and a clock. This is a programmable device, you can radically alter behaviour by altering the PROM contents. Is this hardware or software? I'd say a bit of both, but what if you replace the PROM with something more old fashioned, like a diode matrix and some gates? And does it really matter?</p>
| <p>Describing a specific operation as being done "in hardware" versus "in software" in a given computer system is common. For example, simple computer systems (I am assuming) might not have hardware for division. What do we really mean by this distinction?</p>
<p>Is the distinction effectively based on whether or not the computer's architecture layer (the layer which defines the hardware-software contract) which defines the instruction set for the computer includes an instruction for said operation or not? Going to the division example, would we say that division is done "in hardware" on a given computer if there is an assembly instruction for division, while division is done "in software" (presumably by a compiler interpreting a division instruction and producing the relevant assembly to execute a division algorithm via some number of instructions which are supported by the given instruction set) if not?</p>
| What do we mean when we say something is done "in hardware" versus "in software"? | 2024-02-24T23:59:33.847 |
703763 | |gerber| | <p>For a single sided bare PCB made in a professional proto shop you would want:</p>
<ol>
<li>top silk screen (optional, but useful)</li>
<li>bottom copper</li>
<li>bottom solder mask (optional, but very useful)</li>
<li>board outline</li>
<li>drill file for non-PTHs only (see below)</li>
</ol>
<p>**6. top copper (see below)</p>
<p>**7. drill file for PTH (see below)</p>
<p>If you don't have any silk screen on the bottom you can leave that one out or send it with nothing on it.</p>
<p>That's three or four fewer than you'd have with a 2-layer board (top solder mask, top copper, bottom silk screen) and either all holes would be PTH or there might be two drill files, one for NPTH and one for PTH.</p>
<p>There's a bit of a twist with proto houses that use a 2-layer PTH work flow to make single layer boards in that they don't like copper to get too close to the NPTH edges. They can probably modify your gerber file silently (and without extra charge) to fix that, and I'd give that a try before mucking with it myself. The layout rules will be quite different for a good single-sided design anyway- pads for THT parts should be quite a bit larger, particularly if the components have much mass to them. Or they could make the board with pads on both sides and all (or most) holes PTH but you would then have to supply the top copper file (which would consist of only pads). Depending on <em>why</em> you are prototyping the single-sided board you might pick one or the other.</p>
<p>Note also that, unlike the old days with single-sided boards, it's now universally conventional to create boards looking down from the top through the board, so text on the bottom layer (perhaps in the copper on your board) will appear mirrored. If you're etching the board yourself you don't need to follow that convention, but it's not a bad idea to get used to it. (musing- I wonder if we could even have bought mirrored Letraset in the old days). You'll still find some footprints for components that have been unchanged over decades in particular (relays come to mind) documented in the opposite way (view from the bottom).</p>
| <p>I am designing a one-sided printed circuit board using Autodesk Eagle 9.6.2. In this design I put the components on the top of the board and the traces on the bottom of the board. All the components are through hole (TH). I am unsure about what Gerber files are needed or should be used for the manufacturing part. What Gerber files are needed in this case ? Are there Gerber files that are irrelevant in this case ?</p>
| autodesk eagle 9.6.2 and appropriate gerber files for one-sided printed circuit board | 2024-02-25T01:58:28.990 |
703771 | |pcb|eaglecad| | <p>In Eagle the word layer refers to Computer Aided Design layers. These can be copper layers but there are also layers for things like silk screen and outline.</p>
<p>Single sided PCBs refer to copper on one side only, components can be placed on both sides. It is common practice to have components on only one side.</p>
<p>Layer when talking about a pcb refers to a copper layer only. A multilayer board will consist of a top layer a bottom layer and a number of internal copper layers.</p>
| <p>I am having trouble understanding the definition of a "single-sided" printed circuit board (PCB). Here are the situations I am confused about.</p>
<ol>
<li><p>Through hole components on the top layer only and traces on the bottom layer only.</p>
</li>
<li><p>Both the through hole components and traces are on top layer only.</p>
</li>
<li><p>Traces on both the top layer and the bottom layers and the through hole components only on the top layer.</p>
</li>
</ol>
<p>I have been assuming that only numbers 1 and 2 above are considered "single-sided" because the traces are only on one side of the board. Am I mistaken?</p>
<p>Does the concept of "single-sided" or "double-sided" refer to the placement of the traces only?</p>
<p>In addition, does "single-sided" mean "one-layer"? Are these synonymous terms?</p>
<p>Lastly, could someone explain the distinction between the use of the word "layer" in the above context and in the context of the Eagle software in which there are many "layers" in the PCB layout editor?</p>
| Definition of a "single-sided" or "one-layer" printed circuit board in the context of Autodesk Eagle 9.6.2? | 2024-02-25T06:51:07.243 |
703772 | |thyristor| | <p>Turning to ON state doesn't happen uniformly inside the thyristor. It starts somewhere and spreads gradually to the whole area of the semiconductor. Current growth rate limit is specified to prevent too high local current density which could create a hot spot and kill the device.</p>
<p>How important it's to stay in limits? If you have too high rate amperes/second in your circuit a part of the semiconductor in the thyristor can melt. Does it melt if the rate limit is exceeded say 50% for a nanosecod? You can find it by making large scale tests or the same physics simulation analyses that semiconductor manufacturers must do to design their products.</p>
<p>Too high current growth rate is generally prevented by having an inductor in series.
In many cases the circuit can have enough inductance without adding it as a separate part (motor, transformer, wiring). But that is not generally true in high power circuits which are constructed to create pulses by discharging capacitors.</p>
<p>The series inductor or a part of it can have saturating core to prevent harms caused by too high magnetic energy which must be dissipated or redirected to somewhere when one wants to turn the thyristor off. In addition the reduction of the inductance (caused by the saturation) may be preferable because after a while the voltage in a capacitor (under discharging) can be low enough so that less inductance is enough to keep the current growth rate acceptable.</p>
<p>I must admit that designing such circuit and verifying it before building the prototype is tricky; far beyond the ordinary linear circuit analysis.</p>
<p>About your case:</p>
<p>Redesign. We cannot help without knowing anything of the goals, boundary conditions nor the existing design of your application. I guess it's not the finest idea to connect in parallel tens of smaller thyristors, each in series with a saturating ferrite core choke. We also do not have a slightest idea is it possible to apply some switch which does not have the max. amperes/second -limit, like spark gap, thyratron or saturating transformer.</p>
| <p>I'm looking at a number of thyristors (for example, this <a href="https://www.mouser.com/datasheet/2/240/media-3322269.pdf" rel="nofollow noreferrer">N2593MK160</a>). Each has a critical rate of rise of on-state current. This limitation surprised me; I don't understand why the derivative of current would matter. Isn't it the excess heat that damages parts? And isn't that strictly determined by the current, not the rate of change of current?</p>
<p>But that's really a side question. My real question is, how important is it that I stay in that limit? Is the 300 A/μs an instantaneous limit, or a limit on the average over any microsecond? In my application I'm expecting 12000 A/μs at it's peak (though I don't know how long that will last, whether less or more than a microsecond. I suppose if it's longer than a microsecond, my question is answered, since either way I'm way out of spec).</p>
<p>The highest on-state current thyristors on Mouser all have critical rate of rise of currents orders of magnitude lower than what I'm expecting in my application.</p>
<p>EDIT: I didn't expect this to have such relevance, but I see why it does now. I'm trying to build a linear motor. I want it to be "low voltage" (200v), because it freaks my wife out to have an 800v .1 farad capacitor. (to be honest it freaks me out too). Low voltage means I need low resistance to get the power I need. Low resistance means I need thick guage wires in the inductor surrounding the rails (I'm thinking a quarter inch). I'm hoping this thing isn't massive both in volume and weight, so I don't want more than at tops 10 turns. the 12500 A/μs was based on 4 turns around the rails. at 15 turns it's 3300 A/μs, so I don't think it's likely I can solve this problem by adding turns to the inductor.</p>
<p>FINAL EDIT:</p>
<p>Disregard the estimates of dI/dt above. I have found my ODE solver has a massive error in it (or rather, there was a massive error in the ODE I gave the sovler). The comments were correct, my inductor will easily limit dI/dt to within spec. But I learned a lot through this mistake, so thanks everyone!</p>
| How to interpret critical rate of rise of on-state current in a thyristor datasheet? | 2024-02-25T07:07:57.563 |
703773 | |display|ferrite-bead| | <ol>
<li></li>
</ol>
<p>The information why there are two supplies, what they do and why they are called analog and digital cannot be found in the data sheet you posted. And, it really does not matter if you intend to use the part. Simply connect both supply pins and it will work. If you then, find out there are problems, then you start to troubleshoot the problem, but sometimes, it is good to prepare for potential problems in advance, and draw extra components that could prevent problems, but each approach increases the cost of making the device.</p>
<p>However, if we start guessing, compare it to an MCU. It might be that the digital supply is used for powering digital logic and it can cause some voltage ripple/noise or tolerate voltage ripple/noise without loss of performance or function. The analog supply might be used to more sensitive parts that can be thought as analog, like oscillators, power-on reset circuits or maybe even internal ADCs and DACs, so this supply needs to have less ripple/noise and also does not cause much ripple/noise.</p>
<p>So that could be a reason why there two supply and ground pins on the connector, so that you can use separate wires for sensitive and noisy circuits, because if there was only one supply/ground wire pair, the noisy circuits could cause noise to the supply wire and disturb the analog performance. With separate wiring, you can use bypass caps and good power supply filtering on PCB so the noisy power wire cannot disturb the sensitive wire. If the analog supply is used in some way for driving the screen pixels, any noise on the analog supply could be seen as flickering picture on display.</p>
<p>2)</p>
<p>About the ferrite beads, there is no one true answer. Yes, ferrite beads are used to filter noise. Yes, it is a good practice to filter noise, if you need to. However, we only see the schematics, not the engineering desicions or measurements leading to the ferrite beads being in the schematics. So again, we cannot guess if they are really needed here. We cannot guess if the ferrite bead values and capacitor values have been properly chosen, or just put there because all the designer saw that it requires both a digital and an analog supply. The ferrite bead values and part types are not even shown in the schematics so we cannot see how much it filters and at what frequencies, so we cannot replicate the design. The ferrite bead between GNDA and GND is also weird, it can even be wrong, and cause more problems, but we don't know that. Usually you want the grounds to have low impedance and connect them directly together, but again, the designer might have made this based on display manufacturer support people suggestions, example schematics, or based on measurements, or just drawn whatever is the first thing that comes to mind in 5 minutes and decides the product is good enough and ready to be sold to hobbyists. So the ferrite beads might not be necessary and depending on their value they could also make the circuit worse.</p>
<p>Having said all this, there indeed are chips that have multiple supply and ground pins, that are not connected inside the chip, so that different submodules on the chip can be powered separately and have different supply and ground return paths that only connect on PCB, in a way that makes most sense. Some sensitive circuits need more filtering than others to guarantee good performance, and even if the chips are digital, the interfaces they have to outside world may be in fact analog, like a gigabit ethernet PHY interface chip, and these high-speed interfaces need noise-free supplies with good filtering in order to pass tests that the interface is within specification and that it also passes tests for radiated and conducted noise emission tests.</p>
| <p>I have no background in electronics.</p>
<p>I'm trying to understand Sharp Memory Display. I read the <a href="https://www.sharpsde.com/fileadmin/products/Displays/Specs/LS013B7DH05_15Jun15_Spec_LD-27503A.pdf" rel="nofollow noreferrer">device specification</a> to the best of my limited abilities, but still confused about a few things.</p>
<ol>
<li><p>Why does it have analog power pins (VDDA and VSSA)? From my understanding, it communicates only with SPI which is digital, so there's no need to have separate digital and analog power inputs. I randomly searched for some other lcd modules <a href="https://www.waveshare.com/wiki/0.96inch_LCD_Module" rel="nofollow noreferrer">like this one</a>, none of them seem to have it. What am I missing?</p>
</li>
<li><p><a href="https://www.adafruit.com/product/3502" rel="nofollow noreferrer">This</a> is Adafruit breakout board for Sharp Memory Display. In the schematic, it shows a ferrite bead between power and VDDA, also between ground and VSSA(AGND). These ferrite beads are also present in the design of <a href="https://nicekeyboards.com/docs/nice-view/pinout-schematic" rel="nofollow noreferrer">nice!view</a>, another breakout board. In the Sharp Memory Display specification there is recommendation about decoupling capacitors, but there is no mention of ferrite beads. I only vaguely understand ferrite beads are used to reduce noise. Are they needed here? Or is it just good practice to put a ferrite bead between VDD and VDDA?</p>
</li>
</ol>
<p><a href="https://i.stack.imgur.com/KhamE.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KhamE.png" alt="schematic for Adafruit breakout board" /></a></p>
| Confused about Sharp Memory Display's analog power and ferrite beads | 2024-02-25T07:31:25.603 |
703774 | |power-supply|usb|dc-motor|servo|microbit| | <p>I measured the motor with the speed and the maximum load I'd use and it showed 0.15A. I grabbed the shaft for 2 seconds to stall it and it showed 0.51A. So, I think my USB 3.0 port can handle the specific motor.</p>
| <p>I got my hands on a <a href="https://www.gigotoys.com/en/products/1269/" rel="nofollow noreferrer">Gigo microbit robotics set</a>.
It uses a control box to house the <a href="https://microbit.org/get-started/features/overview/" rel="nofollow noreferrer">microbit</a>. As you can see from the <a href="https://www.gigotoys.com/manuals/1269-EN_images/output-8.jpg" rel="nofollow noreferrer">control box specs</a>, it uses 6 AA batteries, but it can also use an external micro-usb power source of no more than DC 5V/2A.
I'm not sure how to power the 2 motors (<a href="https://www.gigotoys.com/manuals/1269-EN_images/output-16.jpg" rel="nofollow noreferrer">part 63 and 64</a>) that it contains, a dc motor named C-50X PLANETARY GEARBOX (DDM) and a servo motor named C-180 SERVO MOTOR (METAL GEAR). There are no specs for these motors. I'm assuming they work with 5V since that's what the external power interface is using.
I prefer not to use batteries, so I tried to use a USB 3.0 PC port with the external micro-usb interface and the motors are working. Do I risk damaging the port, microbit or the motors this way?</p>
| Powering a dc motor from a robotics set with a USB 3.0 PC port | 2024-02-25T08:07:49.720 |
703779 | |digital-logic|diodes|logic-gates|breadboard| | <blockquote>
<p>But when I trying to connect the diode to digital output of the chip it's not working</p>
</blockquote>
<ol>
<li><p>You've mixed up the pinout of the chip, and you're not connecting the supply voltage to pins 14 (+) and 7 (-). The way you've connected it, the chip's input protection diodes are active, and the chip shorts the VCC and GND, just as if you've connected a diode from VCC to GND.</p>
</li>
<li><p>All CMOS logic families require that <em>all</em> inputs are connected to a valid logic level. You've left all inputs disconnected (!).</p>
</li>
<li><p>A LED requires a series resistor. The LED is either getting hot, or the power supply is limiting current. Connect a 1kΩ resistor in series with the LED.</p>
</li>
</ol>
<p>The following corrections are needed:</p>
<ol>
<li><p>Connect (+) to pin 14, (-) to pin 7.</p>
</li>
<li><p>Connect all input pins - 2,3,5,6,8,9,11,12 to either (+) or (-). The outputs are on pins 1,4,10,13.</p>
</li>
<li><p>Add a series resistor in series with the LED.</p>
</li>
</ol>
<p>Below is the pinout of 74xx02, КР1554ЛЕ1, KR1554LE1 (from <a href="https://www.ti.com/lit/gpn/CD74AC02" rel="nofollow noreferrer">TI 74AC02 datasheet</a>). Inputs are denoted A and B. Outputs are Y. The digit signified which of the four gates in the chip the pins belong to.</p>
<p><a href="https://i.stack.imgur.com/xaBGq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xaBGq.png" alt="enter image description here" /></a></p>
| <p>I think I'm not understand something obvious when trying to implement the complex logic(half-adder) by NORs. Possible to simplify my question, why in this position the diod is emitting:<a href="https://i.stack.imgur.com/TRfcG.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/TRfcG.jpg" alt="first working example" /></a></p>
<p>In this state the Diode just connected to + and - ...</p>
<p>But when I trying to connect the diode to digital output of the chip it's not working:
<a href="https://i.stack.imgur.com/pTJZl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pTJZl.jpg" alt="first non-working example" /></a></p>
<p><a href="https://i.stack.imgur.com/XbpY5.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XbpY5.jpg" alt="second non-working example" /></a>
Here connected through VCC, and the diode connected to the NOR output.</p>
<p>In description written - it is analog, but not only in logic misunderstanding.
Even when I'm connecting the diode just near to chip(without VCC to chip) it is also not emit.
I also tried to connect through VCC - and with my understanding it must works, but not. What I don't understand?</p>
| Chip based logic, NOR by sn74hc02n analog | 2024-02-25T09:15:28.143 |
703814 | |fpga|flipflop|multiplexer| | <p>First let's consider a simple register-to-register transfer (ignoring the feedback path in your diagram).</p>
<p>Looking at the second flop, in order to be clocked correctly, the signal at the data input <code>FF2.D</code> must arrive at least one setup time <span class="math-container">\$(t_\mathrm{su[ff2]})\$</span> before the clock edge at <code>FF2.C</code>.</p>
<p>Including the logic cloud, that means the data must be visible on the output of <code>FF1.Q</code> at least <span class="math-container">\$(t_\mathrm{logic} + t_\mathrm{su[ff2]})\$</span> before the clock edge at <code>FF2.C</code>.</p>
<p>Now consider the first flop. The output <code>FF1.Q</code> does not update until one clock-to-output <span class="math-container">\$(t_\mathrm{co[ff1]})\$</span> time after the clock edge on <code>FF1.C</code>. If we assume that there is zero skew between the clocks of both registers, then that means from the launch clock edge to the latch clock edge, in order to meet timing requirements there must be at minimum:</p>
<p><span class="math-container">$$t_\mathrm{period} = (t_{\mathrm{co[ff1]}} + t_{\mathrm{logic}} + t_{\mathrm{su[ff2]}})$$</span></p>
<p>The maximum frequency <span class="math-container">\$(f_\mathrm{max})\$</span> is will be one over this period.</p>
<hr />
<p>Now consider your diagram itself. This is a little more complicated, because there are actually two timing paths because there is a feedback loop from the second flop output back to itself. However this doesn't actually change the analysis that much. You simply consider both paths, and then find the maximum.</p>
<p><a href="https://i.stack.imgur.com/Rh0cH.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Rh0cH.png" alt="Two timing paths, one for FF1 to FF2, one for FF2 to FF2" /></a></p>
<p>For the top path, we have, as before:
<span class="math-container">$$t_\mathrm{period[path1]} = (t_\mathrm{\mathrm{co[ff1]}} + t_\mathrm{\mathrm{logic}} + t_\mathrm{\mathrm{su[ff2]}})$$</span></p>
<p>For the bottom path, we have:</p>
<p><span class="math-container">$$t_\mathrm{period[path2]} = (t_\mathrm{\mathrm{co[ff2]}} + t_\mathrm{\mathrm{logic}} + t_\mathrm{\mathrm{su[ff2]}})$$</span></p>
<p>Then:</p>
<p><span class="math-container">$$t_\mathrm{period} = \max\left(t_\mathrm{period[path1]}, t_\mathrm{period[path2]}\right)$$</span></p>
<p>From your numbers, given both flops have the same <span class="math-container">\$t_\mathrm{co}\$</span>, and only one <span class="math-container">\$t_\mathrm{logic}\$</span> is given, both paths have the same timing requirements.</p>
| <p>So, according to my understanding, the max operating freq has the setup time hold time and logic delay and also the clock to output delay...</p>
<p>So my answer is <strong>tclk = (tsu+tco) + tlogic + (tsu+tco) = 2+5+3+2+5 = 17ns</strong></p>
<p>But, I am not sure if I have to consider the tco of the last flipflop please give me a clarification.</p>
<p>Given that both DFFs have clock-to-output tCO delay of 5ns and a setup time tSU of 2ns. and a propagation delay of 3ns for signals passing the multiplexer.</p>
<p><a href="https://i.stack.imgur.com/yrmjq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yrmjq.png" alt="enter image description here" /></a></p>
| I am confused with the maximum operating frequency calculation of the circuit | 2024-02-25T16:05:38.783 |
703819 | |batteries|resistors|multimeter| | <p>I've spent a career building a few instances of battery-powered equipment, with a lot of planned projects that didn't come to fruition. This means that I've scrutinized a lot of methods, done a lot of study, but only tried a very few.</p>
<p>So take this with a grain of salt.</p>
<p>For most rechargeable batteries, you can really only tell when a battery is coming close to a full charge or a full discharge. Anything in between is subject to the condition of the cells, the temperature, the way the cells were manufactured, the ways the manufacturer tweaked the cell chemistry, etc.</p>
<p>This means that <strong>there is no easy way to measure one or two point values and know what's what</strong>.</p>
<p>The current state of the art for laptops & cellphones is "Coulomb counting". Something in the battery management hardware measures the current going into or out of the battery; something in the battery management software integrates that current into charge (this is the "Coulomb counting" part). Finally, on better setups, the battery management software resets the state of charge any time the battery comes to full charge, and re-estimates the battery's capacity any time the battery comes to (or close to) a fully discharged state.</p>
<p>If you can't do Coulomb counting, usually the best you can do is charge the cells appropriately and let the user know when the fully discharged state is impending.</p>
<p>For most batteries what you can do is look at the discharge curve and note that there's a "knee" there (sometimes there's a knee but it's only present if you're pulling current -- e.g. dry cells and NiMH). Further, for most cell chemistries, this knee happens before there's any permanent damage to the cell. So you can monitor the cell voltage, and if it drops below some magic number you can let the user know that their battery is going to crap out.</p>
<p>If you want to accurately know how much charge is actually left in the battery, though, you need to do Coulomb counting with on-line capacity assessment.</p>
| <p>What I mean is that I might have 3.5 battery voltage, and I rarely use it.</p>
<p>Note:</p>
<p>If I measure the voltage it shows 3.5, but is not the internal resistance changed decreasing the current?</p>
<p>If that is correct, then measuring the voltage is not enough for diagnosing the issue. The power that the battery can supply must be measured.</p>
| Are measurements of battery voltage enough to test its state of health? | 2024-02-25T16:21:20.403 |
703820 | |flash| | <h2>Definition of SFDP tables from the point of view of the flash</h2>
<p>The following part of the answer addresses the question title of <em>Where are the SFDP tables stored?</em></p>
<p>From reading the <a href="https://www.jedec.org/standards-documents/docs/jesd216b" rel="nofollow noreferrer">SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP) JESD216F.02</a> Jedec standard the <em>Security</em> requirements include:</p>
<blockquote>
<ul>
<li>The SFDP and flash memory address must never overlap.</li>
<li>Writes to SFDP tables must be permanently disabled before the memory device is released to a customer by the memory vendor factory.</li>
</ul>
</blockquote>
<p>Which means potentially SFDP tables:</p>
<ol>
<li>Could be implemented as ROM in the SPI flash devices, since presumably the contents of the SFDP tables won't change unless the mask revision of the SPI flash device is updated.</li>
<li>Or some form of write-once memory programmed during device manufacture.</li>
<li>Or a special area of flash which can only be programmed during device manufacture</li>
</ol>
<p>Macronix provide reference designs for some of their memory devices. E.g. <a href="https://www.mxic.com.tw/Lists/TechDoc/Attachments/10369/MX25L128356,%20Verilog,%20v1.0b.zip" rel="nofollow noreferrer">MX25L128356, Verilog, v1.0b.zip</a> for the <a href="https://www.mxic.com.tw/Lists/Datasheet/Attachments/8923/MX25L128356,%203V,%20128Mb,%20v1.0.pdf" rel="nofollow noreferrer">128-Mibit CMOS Serial NOR Flash Memory</a>. The reference design contains:</p>
<ul>
<li>A Behavioral Verilog Model for the SPI flash device.</li>
<li>An input file for the Behavioral Verilog Model which defines the contents of the SFDP tables.</li>
</ul>
<p>Such reference designs can serve as an example of how the SFDP tables may be accessed, albeit the actual implementation may vary between devices / manufacturers.</p>
<h2>What the Intel CSME firmware uses the SFDP tables for</h2>
<p>The following part of the answer is in response the following in the question body:</p>
<blockquote>
<p>My question is : when a firmware makes a query to read the SFDP (<code>0x5A</code>), what does it mean? Where does the answer come from?</p>
</blockquote>
<p>The SFDP tables are a Jedec standard for firmware / software to be able for query an attached flash device to obtain information including:</p>
<ol>
<li>The manufacturer and device identity.</li>
<li>The size of the flash device.</li>
<li>Timing parameters for accessing the flash device. E.g. the number of <em>dummy cycles</em> required between the address being sent to the flash device and the flash device returning valid data.</li>
<li>Which access modes the flash device supports.</li>
<li>The number and size of sectors, which are needed when updating the flash contents.</li>
</ol>
<p>The Intel CSME firmware in on-die ROM can use the SFDP tables to query the connected flash device, and determine which is the fastest supported transfer rate supported by the combination of:</p>
<ul>
<li>The SPI controller in the Intel device</li>
<li>And the attached flash.</li>
</ul>
<p>Expect the power-up sequence of the Intel CSME firmware to be:</p>
<ol>
<li>Send a <em>RDSFDP (Read SFDP)</em> command <code>0x5A</code>, and read the SFDP pages which are specific to the type of attached flash device. This will use a low <code>SCLK</code> frequency and with the command and address sent on the <code>SI</code> pin and data returned on the <code>SO</code> pin.</li>
<li>Determine the highest transfer rate to read data from the flash. This may vary according to which specific flash device is connected.</li>
<li>Issue <em>Fast Read</em>, <em>Dual Output Fast Read</em>, <em>Quad Output Fast Read</em>, <em>Dual IO Fast Read</em> or <em>Quad IO Fast Read</em> commands to read the Intel ME firmware from the data contents of the flash. These read commands differ in how many pins of the SPI flash are used for the command, address and data. The read command used and the <code>SCLK</code> frequency will be selected by the Intel CSME firmware according to the contents of the SFDP pages read above.</li>
</ol>
<p>In response to the comment:</p>
<blockquote>
<p>Do you know which implementation Intel has chosen? –
<a href="https://electronics.stackexchange.com/users/366190/rand0mman">Rand0mMan</a></p>
</blockquote>
<p>Intel, from the point of view of the Intel CSME firmware, haven't chosen an implementation of where the SFDP tables are stored; that is down to the manufacturer of the attached SPI flash.</p>
<p>What Intel will have done is to write the Intel CSME firmware stored in the on-die ROM to query the SFDP tables of the attached SPI flash to allow multiple different types of SPI flash to be attached.</p>
<p>I haven't worked with designing boards with Intel processors to know exactly how the SFDP tables are processed by the on-die ROM. This answer is based upon writing some code to query the SFDP tables of attached SPI flashes for other devices.</p>
| <p>For context, I'm learning about the boot process of Intel devices.</p>
<blockquote>
<p>SFDP standard provides a consistent method of describing the functional and feature capabilities of Serial Flash devices in a standard set of internal parameter tables. These parameter tables can be interrogated by host system software to enable adjustments needed to accommodate divergent features from multiple vendors</p>
<p><a href="https://www.macronix.com/Lists/ApplicationNote/Attachments/1870/AN114v1-SFDP%20Introduction.pdf" rel="nofollow noreferrer">https://www.macronix.com/Lists/ApplicationNote/Attachments/1870/AN114v1-SFDP%20Introduction.pdf</a></p>
</blockquote>
<p>From what I know, the initial Intel CSME firmware loaded from the on-die ROM will read the SFDP to determine how to read the SPI flash so it can then read the <em>Intel Flash Descriptor</em> (IFD) from offset 0 to locate the Intel CSME region and load the Intel ME firmware in the on-die SRAM of the Intel CSME micro-controller.</p>
<p>My question is : when a firmware makes a query to read the SFDP (<code>0x5A</code>), what does it mean? Where does the answer come from? SFDP tables needs to be stored somewhere.</p>
<p>My guess would be that they are stored on a dedicated location of the SPI Flash but I can't find any documentation on this.</p>
| Where are the SFDP tables stored? | 2024-02-25T16:29:55.190 |
703822 | |batteries|connector|lithium-ion|laptop| | <blockquote>
<p>can a laptop lithium-ion battery be connected external through some sort of "extension cord type"</p>
</blockquote>
<p>Yes, if you have a pair of corresponding mating connectors (one from a dead battery, and another from dead mainboard), you can make an extender of nearly any length, it is just wires. I have seen these extenders made by OEMs for their reference platforms and evaluation boards.</p>
| <p>I have rebuilt an old laptop of mine that wasn't working and its chassis broken. In a nutshell after replacing the damaged components; I mounted the board and system on two acrylic sheets as shown in this picture:
<a href="https://i.stack.imgur.com/e7MgI.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/e7MgI.jpg" alt="Laptop rebuilt on acrylic" /></a></p>
<p>I am currently powering it using its power adapter connected to a UPS.<br>
The only issue is its battery has no space in there and cannot be mounted easily. I am no expert in electrical matters, my question is can a laptop lithium-ion battery be connected external through some sort of "extension cord type" of connector? what components/connectors (or soldering?) should I be looking into?</p>
<p>PS: the laptop is an <a href="https://www.acer.com/us-en/support/product-support/Aspire_V3-571G" rel="nofollow noreferrer">Acer V3 – 571G</a> , and the battery is its stock one that came with it.</p>
<p><strong><h1>Update</h1></strong> uploading connectors pictures and size in mm as requested
<br><br>
<strong>Battery with pins</strong>
<a href="https://i.stack.imgur.com/Zy8lH.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Zy8lH.jpg" alt="battery with pins" /></a><br></p>
<p><strong>Battery connector on board</strong>
<a href="https://i.stack.imgur.com/N1eWz.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/N1eWz.jpg" alt="battery connector on board" /></a><br></p>
<p><strong>Battery with pins and size in centimeters (using ruler)</strong>
<a href="https://i.stack.imgur.com/VtTDz.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VtTDz.jpg" alt="battery connector on board with size in cm" /></a></p>
<p><strong>Battery connector on board with size in centimeters (using ruler)</strong>
<a href="https://i.stack.imgur.com/a2TYz.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/a2TYz.jpg" alt="battery with pins and size in cm" /></a><br></p>
| Laptop battery "extension" / external connect? | 2024-02-25T16:40:02.737 |
703832 | |digital-logic|system-verilog|rtl| | <p>True random number generators are expensive and normally used for research.</p>
<p>You did not specify how random the set of numbers needed to be. However, you hinted that you already are satisfied with your current random number generator. Let us work with what you already have then.</p>
<p>Consider your random number generator which is already creating numbers in a specified range. Reconfigure your random number generator to create a set of numbers. First the in large range, then again for each of the smaller ranges. Use the logic outlined above to pick which range or ranges to use. If there is more then one range, create an additional random number to indicate which range is to be used for the final random number.</p>
| <p>I need to generate random number between 0 and 191. This will fit in 8 bits. Then depending on certain constants being defined or not, certain slices of this range shall be included or excluded. e.g pseudocode</p>
<pre><code>#if feature_1 == 1
range 7 to 31 included
#endif
#if feature_2 > 3
range 55 to 72 included
#else
range 60 to 79 included
#end if
</code></pre>
<p>This number is required for use in a part of a digital design. The module must be combinatorial so that it can do the stuff within a single clock cycle. I can see that the first part of getting a random number is solved using LFSR PRNG. Then, the result can be limited to 0 to 191 by causing the LFSR output to be wrapped around if it exceeds 191. Atleast, this is the trivial approach. But, how do I design the other part where only numbers in certain ranges can occur as the final output?</p>
<p>The numerical values correspond to certain commands. Therefore, for the module that is being designed, depending on the parameters used during compile (that #if part), certain features will be included or not in the design. Thus, if a feature is not present and the random number generates an output that invokes it in the final randomly generated command, the design will lock up.</p>
<p>Why do I need random number you might ask, well it has to do with a hardware based testbench. I cannot go into more details. The random number approach has worked well so far except here where I need to excluded certain values.</p>
| Generate random numbers in a range with some others excluded | 2024-02-25T17:21:47.440 |
703839 | |transformer| | <p>Strictly speaking it is IsVs*/IpVp* where the quantities are phasors, with a possible minus sign depending on reference directions. This accounts for the phase as mentioned above.</p>
<p>Beyond that relating efficiency to transformer parameters depends on the transformer model.</p>
| <p>The school book uses <span class="math-container">\$ \eta=\frac{V_{s}I_{s}}{V_{p}I_{p}}×100\$</span>% to calculate the efficiency of non-ideal transformer.</p>
<p>It also uses the relation <span class="math-container">\$ \frac{I_{s}}{I_{p}}=\frac{N_{p}}{N_{s}}\$</span> for non ideal transformers.</p>
<p>I think it was fine until it used <span class="math-container">\$
\frac{I_{s}}{I_{p}} =\frac{N_{p}}{N_{s}}\$</span> to substantiate for <span class="math-container">\$ \frac{I_{s}}{I_{p}} \$</span> in <span class="math-container">\$ \eta=\frac{V_{s}I_{s}}{V_{p}I_{p}}×100\$</span>%, because <span class="math-container">\$ \frac{I_{s}}{I_{p}} =\frac{N_{p}}{N_{s}}\$</span> is only true for ideal transformers.</p>
<p>What do you think?</p>
| A school book uses the relation \$ \eta=\frac{V_{s}I_{s}}{V_{p}I_{p}}×100\$% to calculate the efficiency of a transformer. Is that correct? | 2024-02-25T19:13:26.447 |
703845 | |microcontroller|opto-isolator|voltage-detector|capacitive-coupling| | <p>You need to reduce the sensitivity of the mains detection module. This can be done by attaching a resistor across C1.</p>
<p>If we assume that the zener is dropping the voltage to 5V and that the opto coupler is drawing 20ma a value of 1k will divert 5ma. Those assumptions may not be correct and you may need to experiment with the resistor value but it is a starting point.</p>
| <p>I'm a hobbyist, trying to instrument my heating system so that I can control a three position valve. I have an ESP8266 integrated with a DRV8825 stepper motor controller, and a no-name Chinese 220vac mains detection module with three independent channels. On the bench, everything works perfectly, and I can read the state of 220vac signals that I connect to the detection module, and drive the stepper motor appropriately. Unfortunately, when connected to the actual heating system, I find that the wires I wish to monitor (which run around my house before reaching the heating system) have capacitively coupled voltages on them (up to about 20vac) that cause the detection module to give false positive readings. Rerouting the wires to reduce the coupling voltages isn't possible (they're mostly buried in walls), so I'm looking for any suggestions on how to overcome those false positive readings in the detection module; I've reverse engineered the circuit of one channel in the detection module, see below, and would appreciate any help:
<a href="https://i.stack.imgur.com/VYUJ0.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VYUJ0.png" alt="220vac detection circuit to interface with a microcontroller via an optocoupler" /></a></p>
| Detecting 220vac with optocoupler and microcontroller on lines that have capacitive coupling voltages | 2024-02-25T19:52:51.170 |
703853 | |design|atmega328p|schematic|review| | <p>The digit power circuit will not work as drawn. You need to flip the transistors around and reduce the base resistor values by a factor of ~20.</p>
<p>Edit: since you're multiplexing, the power and thermal requirements are a lot more relaxed. However a linear regulator is not a great choice in this application as the dropout voltage precludes operation much below a Vin of 4V (3.3 Vout + 0.250 dropout + 0.4 D1 Vf) so you will need 4 cells to get any usable life out of the circuit. Your efficiency at 6V Vin is 55% which for a battery powered device is unnecessary, especially when alternatives exist. I would use a different regulator, either a switching buck or buck/boost (my choice). Preferably something with built-in reverse polarity protection so you can get rid of D1.</p>
<p>There is no current limiting on your LED segments and LED3. There is no local decoupling capacitor on U3.</p>
<p>The blink LED will never illuminate in the polarity you have placed it in.</p>
<p>Capacitor U4 (?) may be too big for the regulator.</p>
| <p><a href="https://i.stack.imgur.com/Ydcvz.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Ydcvz.png" alt="enter image description here" /></a></p>
<p>Hey guys, I'm a developer trying to learn PCB design and advanced hardware design and needed a place to start. I've designed a very basic clock with a Atmel Atmega328P-AU and from checking out some reference designs.</p>
<p>This design is my first ever design so not so great on rules and general design principles. I would like to be sure that this is a functional project rather than a pretty one. Are my connections correct? Is the 7 segment display wired correctly, is the DS1307 going to work? Can I connect MOSI, MISO and SCK to test pads on the PCB and use it to cleanly program the system effectively?</p>
<p>Please let me know of anything stupid I've done or any resources that can help me improve.</p>
<p>Thank you for your time everyone!</p>
| I'm trying to create a clock. Rate my first schematic design | 2024-02-25T21:31:37.223 |
703855 | |voltage|circuit-analysis|capacitor|charge| | <blockquote>
<p>I was under the impression that in parallel, voltages are equal, ...</p>
</blockquote>
<p>You actually took the first step to the solution already.</p>
<p>When the circuit is in equilibrium the current flowing is zero which basically means no drop at all across the resistor, as others have pointed out.</p>
<p>So, at equilibrium, you can think of the capacitors as connected in parallel. Therefore the voltage across them will be equal.</p>
<p><img src="https://i.stack.imgur.com/8ftoR.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f8ftoR.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p><sup>Note that this is not what physically happens, but I replaced the resistor with a short for simplicity. At equilibrium, the resistor has no "function" so any resistance can be used there.</sup></p>
<p>Alternatively, you can think of the entire circuit as an RC network excited by a voltage source but the main difference is that the source here is the 2-uF capacitor. Since in an RC circuit the voltage across the capacitor becomes equal to the supply voltage, same will happen in the circuit in your question. The main difference is that the source capacitor's voltage will decrease over time.</p>
| <p>The problem below is from the electrical circuits chapter of <em>Essential University Physics Volume 4.</em> I am having trouble understanding the essential idea behind the solution.</p>
<p>I initially tried solving this with the assumption that charges would balance between the capacitors since they are in series. The solutions manual tells me that equilibrium means the voltages balancing. This doesn't make sense to me, since this would imply the capacitors have different charges. I was under the impression that in parallel, voltages are equal, and in series, charges are equal. Why would voltages be inclined to find balance?</p>
<p><a href="https://i.stack.imgur.com/eNRMD.png" rel="noreferrer"><img src="https://i.stack.imgur.com/eNRMD.png" alt="enter image description here" /></a></p>
| Why is capacitor equilibrium based on balanced voltages and not balanced charges? | 2024-02-25T21:54:43.263 |
703857 | |kirchhoffs-laws| | <p>Perhaps a revision of some of your statements is in order. You said:</p>
<blockquote>
<p>My understanding of voltage is that it is the amount of energy needed to move an electrical charge across 2 points in the circuit.</p>
</blockquote>
<p>Correct, but easy to misinterpret. The truth is that <em>any</em> voltage will eventually move a charge from one place in a circuit to another. What changes is the <em>rate</em> at which charges complete that journey.</p>
<blockquote>
<p>the larger the resistor the more energy needed to move current through</p>
</blockquote>
<p>Very misleading. Voltage is a measure of energy that a charge would have to lose on a <em>complete</em> journey through the resistance. That doesn't mean that you can't have quadrillions of charges moving only <em>part way</em> through it, losing only a small chunk of their energy.</p>
<p>Current is a measure of how many charges are entering or leaving the resistor each second, and is not to be confused with how many charges are <em>completing</em> the entire journey through the resistor. Probably no single charge will make the complete journey, unless you leave that current flowing for a long time.</p>
<blockquote>
<p>With the two resistors on the right, I would think that the larger resistor would have a greater voltage across it, but it's the same as the other parallel resistor according to KVL</p>
</blockquote>
<p>The voltage across each resistor R2 and R3 is indeed the same according to KVL, but...</p>
<blockquote>
<p>If you have a larger resistor, wouldn't you need more energy to move a charge through it? How could it be the same as the smaller resistor?</p>
</blockquote>
<p>It is correct to say that with the same voltage across them, the <em>difference</em> between the potential energy of a charge found at one end of R2/R3, and the potential energy of a charge found at the other end, is the same. That is, in both cases, a charge that <em>completes</em> the journey via <em>either</em> resistor will have lost the same amount of energy after a complete journey through its respective resistor.</p>
<p>However, again it's not correct to say that any charge makes that complete journey. All else being equal (resistor dimensions, cross-section area, charge density etc), the average speed of individual charges through the 3Ω resistor will slightly greater than (by a factor of <span class="math-container">\$\frac{4}{3}\$</span>) than the average speed of charges in the 4Ω resistor.</p>
<p>Consequently, more charges are entering the top of R2 each second (and leaving at the bottom), than are entering (and leaving) R3 each second. This is the definition of current: quantity of charge passing some point in one second.</p>
<p>It would be correct to say that after a long, long time, <span class="math-container">\$\frac{4}{3}\$</span> as many charges will have <em>completed</em> the journey through R2 compared to charges travelling through R3.</p>
<p>Instantaneously, that picture doesn't work, because in a tiny fraction of a second, no single charge has time to complete the journey. Yet current is still flowing, and is non-zero. I repeat, that's because there are quadrillions of charges travelling part-way, rather that just a few making it all the way through.</p>
<p>Your interpretation of voltage is correct, though, just don't forget that a charge that moves only, say, half way between two points of potential difference (half way through the resistor) will only lose half of its potential energy, but it still moved, and it still contributed to current! There's always another charge that started half-way, and made it out of the resistor!</p>
<p>Just extend that description of behaviour to quadrillions of charges, each moving only a tiny distance in each second, and you'll get a better picture of what's going on.</p>
| <p>I'm completely new to electrical engineering. I came across KVL and my previous intuition about how voltage works broke down when coming across an example of KVL and parallel resistors.</p>
<p>Some background:
My understanding of voltage is that it is the amount of energy needed to move an electrical charge across 2 points in the circuit.</p>
<p>I use the water analogy for the basis of my intuition for resistors. If you have water flowing through a pipe, a resistor is basically a narrowing of the pipe making it harder to move current through. AKA the larger the resistor the more energy needed to move current through.</p>
<p>So if we take an example like this my understanding breaks down:</p>
<p><a href="https://i.stack.imgur.com/1V3hW.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1V3hW.png" alt="Example circuit with parallel resistor" /></a></p>
<p>With the two resistors on the right, I would think that the larger resistor would have a greater voltage across it, but it's the same as the other parallel resistor according to KVL.</p>
<p>If you have a larger resistor, wouldn't you need more energy to move a charge through it? How could it be the same as the smaller resistor?</p>
<p>Clearly I'm missing something, probably a few things...Can someone make this make sense and provide an analogy or some kind of intuitive understanding?</p>
| Looking for intuition for KVL regarding parallel resistors | 2024-02-25T22:01:49.100 |
703865 | |voltage|circuit-analysis|current|homework|matlab| | <h3>KCL</h3>
<p>Assigning <span class="math-container">\$v_1\$</span> to the node between <span class="math-container">\$R_1\$</span> and <span class="math-container">\$C_1\$</span> and assigning <span class="math-container">\$v_2\$</span> to the remaining node (with <span class="math-container">\$R_2\$</span> and <span class="math-container">\$C_2\$</span>) the KCL says:</p>
<p><span class="math-container">$$\begin{align*}
\frac1{R_1}v_1+C_1\frac{\text{d}}{\text{d}t}v_1 &= \frac1{R_1}v_{in}+C_1\frac{\text{d}}{\text{d}t}v_2
\\\\
\frac1{R_2}v_2+C_2\frac{\text{d}}{\text{d}t}v_2+C_1\frac{\text{d}}{\text{d}t}v_2&=C_1\frac{\text{d}}{\text{d}t}v_1
\end{align*}$$</span></p>
<p>You can solve that with Cramer's Rule., easy enough. Either for <span class="math-container">\$v_1\$</span> or <span class="math-container">\$v_2\$</span> (or both.) <em>If you need hand-holding on that process, say so.</em></p>
<p>Using Cramer's by hand (no computer), and for <span class="math-container">\$v_2\$</span>, I find:</p>
<p><span class="math-container">$$\begin{align*}
\left[\left(\frac{\text{d}}{\text{d}t}\right)^2+\left(\frac1{R_1\, C_1}+\frac1{R_1\, C_2}+\frac1{R_2\, C_2}\right)\frac{\text{d}}{\text{d}t}+\frac1{R_1\, R_2\, C_1\, C_2}\right]v_2&=\frac1{R_1\, C_2}\frac{\text{d}}{\text{d}t}15\:\text{V} \cdot u(t)
\\\\
&= 0
\end{align*}$$</span></p>
<p><em>(Obviously, the derivative on the right side goes to zero with constant voltage.)</em></p>
<p>That's homogeneous. And no Laplace required!</p>
<h3>general solution</h3>
<p>The above may be quickly seen as <span class="math-container">\$\frac{\text{d}^2}{\text{d}t^2}+a\frac{\text{d}}{\text{d}t}+b\$</span> where <span class="math-container">\$a=\frac1{R_1\, C_1}+\frac1{R_1\, C_2}+\frac1{R_2\, C_2}\$</span> and <span class="math-container">\$b=\frac1{R_1\, R_2\, C_1\, C_2}\$</span>.</p>
<p>We'd prefer it in better standard form of <span class="math-container">\$\left(\frac{\text{d}}{\text{d}t}-\alpha\right)^2+\beta^2\$</span>. So I find <span class="math-container">\$\alpha=-\frac12 a=-8750\$</span> and <span class="math-container">\$\beta=\frac12\sqrt{4b-a^2}= 7180.70330817254\:j\$</span>. <em>(Just using a hand-calculator. No need for a computer.)</em></p>
<p>Then, taking note that <span class="math-container">\$\beta\$</span> is imaginary, just use the standard corresponding solution form but here selecting <span class="math-container">\$\cosh\$</span> and <span class="math-container">\$\sinh\$</span> for the solution rather than <span class="math-container">\$\cos\$</span> and <span class="math-container">\$\sin\$</span>:</p>
<p><span class="math-container">$$\begin{align*}
v_2 &=\exp\left(\alpha\,t\right)\cdot\left[A_1\cdot \cosh\left(\frac{\beta}{j}\,t\right)+A_2\cdot \sinh\left(\frac{\beta}{j}\,t\right)\right]
\end{align*}$$</span></p>
<h3>specific solution</h3>
<p>From the above, we know that at <span class="math-container">\$t=0\$</span> it must be that <span class="math-container">\$A_1=0\$</span>. That simplifies things a lot. Then from the rate of change (derivative) we know that <span class="math-container">\$A_2=\frac{\frac{15\:\text{V}}{R_1\,C_2}\,j}{\beta}=10.4446593573419\$</span>.</p>
<p>So the final answer:</p>
<p><span class="math-container">$$v_2\approx 10.4446593573419\cdot\exp\left(-8750\,t\right)\cdot\sinh\left(7180.70330817254\,t\right)$$</span></p>
<p>You can expand the <span class="math-container">\$\sinh\$</span> and combine a few things, if you want. But that should get you there.</p>
<h3>verification</h3>
<p>Now, at this point, I'll finally invoke LTspice:</p>
<p><a href="https://i.stack.imgur.com/CBD8k.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CBD8k.png" alt="enter image description here" /></a></p>
<p>I've included a behavioral voltage source that uses the above equation so that the circuit simulation can be compared with the mathematical answer.</p>
<p>They are the same.</p>
| <p>So, i've been asked to get the differential equations (or model) for this circuit:</p>
<p><a href="https://i.stack.imgur.com/O35e3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/O35e3.png" alt="RC circuit" /></a></p>
<p>V1=15 u(t)V, R1=10 ohm, R2 = 20 ohm, C1=10uF, C2=20uF</p>
<p>I'm just a beginner, and don't know if the differential equations i made are actually ok (I think they are not). The model i came with is this one.
<a href="https://i.stack.imgur.com/1fNcR.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1fNcR.jpg" alt="What I came with" /></a>
<a href="https://i.stack.imgur.com/iLI6H.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/iLI6H.jpg" alt="D.E" /></a>
Then i would go with laplace, but it's very difficult to simplify and then come with the inverse laplace, so I guess it´s wrong.</p>
<p>I also tried simulating it on matlab, but i'm not sure if it is okay (again, just a beginner), and I got this:
<a href="https://i.stack.imgur.com/26gw0.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/26gw0.png" alt="Matlab results" /></a></p>
<p>it doesn't seem very convincing, but i think that's the solution. I'm being asked to graph the voltage in relation to time and the current in relation to time. If someone could help me telling me how would the equations look and if what I'm doing is ok, or the best way to approach this type of exercises to get with an easier model, i would appreciate it.</p>
| How to go with this RC circuit? | 2024-02-26T00:26:09.377 |
703870 | |oscillator|tuning|tuner| | <p>There are many antenna types, some broadband some narroband. A half-wave diopole receives best the frequency whose wavelength is <span class="math-container">\$\lambda=2\dfrac{c}{f}\$</span>. There is a narrow bandwidth around this value that can be received but decreasing the further away.</p>
<p>So only some range of frequencies will excite the primary. The transformer must be designed to operate at the frequencies of interest in order for the secondary circuitry to recive the band of signals.</p>
<p>So ALL the frequencies in the air are not available to the transformer. Only the ones admitted by the antenna.</p>
| <p><a href="https://i.stack.imgur.com/KEbes.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KEbes.jpg" alt="enter image description here" /></a></p>
<p>If many radio waves can generate currents in the antenna ground circuit <strong>simultaneously</strong>, I am wondering do they <strong>all</strong> get carried over to the tuner circuit?, <strong>but</strong> only the current whose frequency matches the tuned frequency dominates? or is it the case that even though many currents can be generated in the antenna ground circuit, <strong>only</strong> the meant one gets carried over to the other side?</p>
<p>source of the pic:</p>
<p><a href="https://industrial-electronics.com/measurement-testing-com/rf_design_5.html" rel="nofollow noreferrer">https://industrial-electronics.com/measurement-testing-com/rf_design_5.html</a></p>
| If many radio waves can generate currents in the antenna ground circuit **simultaneously** I am wondering do they all get carried over to the tuner? | 2024-02-26T01:24:57.117 |
703872 | |optical| | <p>There are various reasons IR is not a great choice, but chief among them is that IR links are line of sight since IR light does not pass through most objects without being absorbed, scattered or reflected. This is different than radio which (due to the much longer wavelength) can scatter through solid objects without too much loss.</p>
<p>IR-based communications might work if you were ok with having a drone directly above you, but especially for military applications usually the goal is to have the enemy under the drone, not the operator.</p>
| <p>Currently, in the war in Ukraine drones get jammed and the operator losses the ability to control the drone. The comm. signal is transmitted via radio waves even though much of the work these drones perform is looking for the enemy in the area (which should put the drone more or less in line of sight).</p>
<p>I'm curious to why IR Wireless links that are often used for high-speed LAN systems across buildings hasn't or can't be implemented to prevent jamming?</p>
<p>Based on a formular i found online an IR optical laser could send a signal multiple kilometers and be received. Why wouldn't this be a practical solution?</p>
| Why isn't Wireless IR Links used in drones for communication? | 2024-02-26T01:37:06.913 |
703879 | |arm|jtag| | <p>If you have two devices in a chain, in order to send something to the last device, you send the bits for the last device first, and then you must send more bits which you want the first device to ignore, so that the bits that are intended to last device actually are clocked through the first device and arrive at the last device.</p>
<p>So you need to know how many clocks the first device delays the data in order to know when the delayed data comes out and goes to last device.</p>
| <p>There is 2 JTAG TAP's R5's TAP and CS400's TAP.
the TDI is connected with R5 then CS400 is TDO Such as TDI->R5->CS400->TDO.</p>
<p>For example, IDCODE code is 1110 and the BYPASS command code is 11111.</p>
<p>If I want to read IDCODE of CS400 and BYPASS R5. then I need to push into TDI: 11111+1110, I thought.</p>
<p>But the reference example said that I need to push into TDI: 0111+11111.</p>
<p>I thought that the JTAG data path mechanism basically works with shift registers like FIFO. I'm confused why I need to push it into TDI in reverse order?</p>
<p><a href="https://i.stack.imgur.com/DI3jE.gif" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DI3jE.gif" alt="enter image description here" /></a></p>
| Why do I need to push into TDI in reverse order on the JTAG? | 2024-02-26T03:08:17.160 |
703882 | |thevenin| | <p>Below is the calculation for Rth using test source method.Vth you can try</p>
<p>yourself .Please let me know if you need any support for calculating Vth.</p>
<p><a href="https://i.stack.imgur.com/xfMNk.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xfMNk.jpg" alt="enter image description here" /></a></p>
| <p>I'm trying to find out how to solve for the Thevenin equivalent. I tried to use a 1A test source, but it didn't seem to work. Anyone can help please? Much appreciated.</p>
<p><a href="https://i.stack.imgur.com/JG1eF.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JG1eF.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/j7G2y.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/j7G2y.jpg" alt="enter image description here" /></a></p>
| I'm trying to find Vth, somehow my Vx gets cancelled out but my Vth is wrong | 2024-02-26T03:41:08.757 |
703900 | |power|current|inductor| | <p>"Saturation current" is defined as the DC current that causes the inductance to drop by some percentage X%. So for every value of X% there is a "saturation current" specification. It would make no sense to specify one without the other. For the inductor in your question, they give three values.</p>
<p><a href="https://i.stack.imgur.com/qfhNc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qfhNc.png" alt="enter image description here" /></a></p>
<p>These values correspond to points in the L(I) curve:</p>
<p><a href="https://i.stack.imgur.com/Y2Duu.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Y2Duu.png" alt="enter image description here" /></a></p>
<p>One of the important uses of saturation current is if you use it with DC-DC chip having cycle by cycle current limiting.</p>
<p>The worst case is maximum input voltage and minimum output voltage, ie output unexpectedly shorted while it is running. When this occurs there is a race between the chip's current limiting trying to turn off the MOSFET, and current increasing in the inductor according to:</p>
<p><span class="math-container">\$ \frac{di}{dt} = \frac{V}{L} \$</span></p>
<p>If the inductor saturates deep enough before the MOSFET turns off, then L decreases, and the rate of increase of current shoots up. When that happens, if you probe current in your MOSFET, you'll see something like this:</p>
<p><a href="https://i.stack.imgur.com/93xVt.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/93xVt.png" alt="enter image description here" /></a></p>
<p>So it's important to check at which maximum current the current limiting will trip and how long it will take to turn off the MOSFET, take into consideration that current keeps rising until the MOSFET turns off, and end up with an estimation of the final current value when it does turn off, in the worst case. Then ensure the inductor is not saturated at this point. A bit of inductance loss is OK, but if it has lost most of its inductance and become a wire, the MOSFET will smoke.</p>
<p>The other spec, RMS current, is about self heating due to coil winding resistance.</p>
<p>Suppose you make a LC filter. Under normal conditions it will pass 1A, but if there's a short on the output, the switching power supply may limit current to 2A.</p>
<p>In this case, for the filter to be effective, the inductor must not be saturated at the normal current. This doesn't need to apply at the fault current, because the filter becomes irrelevant if the output is shorted.</p>
<p>In case of a fault, inductor RMS current rating determines if the inductor overheats and burns or desolders itself from the board, or not.</p>
<p>Because copper costs money, it is possible to find inductors with lower RMS current rating than saturation current. You'd use these when trying to penny-pinch a DC-DC with hiccup protection where the inductor needs to not saturate for the current limiting to work, but this high value of current will only occur on peaks and will be followed by a turn-off period, so even if the RMS rating is exceeded during a few µs, it is not exceeded continuously.</p>
| <p>Looking at the specs for power inductors, there are two major ratings for consideration, saturation current and RMS current.</p>
<p>From my understanding, saturation current is when the magnetic flux of the core cannot hold any more energy(hence saturation). If saturation current is the point where the inductor cannot hold more energy, then why is the RMS current higher than I(sat)? Take the <a href="https://au.element14.com/coilcraft/rfs1317-473ke/inductor-47uh-4-5a-10-radial/dp/2526918?st=rfs1317" rel="nofollow noreferrer">RFS1317-473KL</a> for example, which has a RMS current of 4.5A but an I(sat) of 3.9A.</p>
| Inductor saturation vs RMS current | 2024-02-26T07:36:47.693 |
703911 | |battery-charging|lithium-ion|18650| | <p>As several have responded, this is a fake cell. The small print says 3.7V at 11.8Wh = 3200 mAh, which sounds reasonable. So @Ale..chenski estimate was right. He also confirmed my suspicion that a cutoff of 3.3V looked a bit odd to me, but that's the problem of the controller on the ESP-32 which is hard-wired.</p>
<p>(Added later: image)
<a href="https://i.stack.imgur.com/1LekZ.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1LekZ.jpg" alt="enter image description here" /></a></p>
| <p>My ESP32 device uses a new 18650 until it is down to 3.3 V.</p>
<p>My charger draws current until it is again at 4.2 V. Its indicator shows that 330 mAh has been loaded. This is surprisingly far off the 8800 mAh my cell has as nominal charge.</p>
<p>Is this the expected behavior? Does my device switch off too early?</p>
| 18650 Cell (8800 mAh) accepts only 300 mAh on recharge | 2024-02-26T09:09:09.413 |
703935 | |operational-amplifier|ltspice|schematics|fsr| | <p>You should read about the behaviour and shortcomings of the LM358 in <a href="https://www.ti.com/lit/ds/symlink/lm358.pdf" rel="nofollow noreferrer">its datasheet</a>. All op-amps have certain constraints and quirks that must be considered in designs that use them, all detailed in their datasheets. In that document you will be able to find out that:</p>
<ol>
<li><p>You have a 4V positive supply. This limits the LM358 output to about 3V maximum.</p>
</li>
<li><p>That same 4V supply limits the acceptable input range to well below 3V.</p>
</li>
</ol>
<p>You are connecting the FSR between a 4V source and the op-amp input. This applies a permanent 4V to the op-amp input, regardless of FSR resistance, violating (2). Even if that were OK, the op-amp still can't get its output up to 4V.</p>
<p>You need to use the FSR as a member of a resistor potential divider. Here's a circuit that will do better:</p>
<p><img src="https://i.stack.imgur.com/X78xy.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fX78xy.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>This will produce a potential at X between +0.36V to +3.3V as the FSR resistance goes from 100kΩ to 1Ω.</p>
<p>You can <a href="https://www.allaboutcircuits.com/tools/voltage-divider-calculator/" rel="nofollow noreferrer">learn about potential dividers here</a>. Changing R1 and R2 will alter the minimum and maximum potentials obtainable at X. You can even swap and change the positions of those three resistances, to obtain different behaviour and ranges.</p>
<p>Whether you need an op-amp at all depends entirely on what you intend to connect to X.</p>
| <p>I have done a SPICE simulation on LTSpice to double check before I order my custom PCB. I want to graph the voltage change after the op-amp to see how it is affected once I press on the force sensitive resistor.</p>
<p>In my head the voltage should go from 4V to 0V depending on how hard I press on the FSR, but in the simulation I get a constant 2.6V with no change... Am I doing something wrong in the simulation, or is there a logical flaw in my schematic?</p>
<p>In my simulation I have the resistor "FSR" go from 1 Ohm to 100k Ohm to simulate someone pressing the FSR.</p>
<p>The op-amp is LM358, which was advised by the FSR Datasheet.</p>
<p><a href="https://i.stack.imgur.com/sOpOJ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sOpOJ.png" alt="enter image description here" /></a></p>
| Force Sensitive Resistor SPICE Simulation does not show voltage change | 2024-02-26T11:55:56.197 |
703945 | |voltage|adc| | <p>The ADC operates with a differential input. But AINP and AINN must each ride on a common mode voltage such that the inputs never exceed maximum range.</p>
<p>For single ended measurements, AINN must be grounded, so negative voltages on AINP are not possible.</p>
| <p>I have a quick question because I don't fully understand the <a href="https://www.ti.com/lit/ds/symlink/ads1114.pdf" rel="nofollow noreferrer">ADS1115 datasheet</a>.</p>
<p>Do I need to put -0.2 V in the GND and 3 V in VDD to measure negative value in single-ended?</p>
<p><a href="https://i.stack.imgur.com/STYJX.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/STYJX.png" alt="enter image description here" /></a></p>
| ADS1115 need negative power supply for negative Vin? | 2024-02-26T13:15:55.600 |
703956 | |stm32|swd|production-testing| | <p>SWD is a standard defined by ARM, which means that it works identically on all ARM microcontrollers that conform to this standard. This means that you can do the exact same thing in the exact same way with STM's ARM MCUs.</p>
<p>Read the reference manual of your microcontroller, figure out what values you have to write to which addresses to get the desired outputs on the GPIOs, and then write those values via SWD. It'll work just fine.</p>
<p>Here's an <a href="https://markding.github.io/swd_programing_sram/" rel="nofollow noreferrer">article</a> that describes how to write data to arbitrary locations within the MCU's address space via SWD.</p>
| <p>I am working at test jig for low-volume production. The purpose is both flashing firmware and testing PCBA with STM32 MCU. I am considering few options for testing PCBA functionality:</p>
<ol>
<li>Testing on "production" firmware emulating "real-life" inputs (pressing buttons, emulating signals from analog sensors and digital interfaces etc.)</li>
<li>Uploading "testing" firmware to control & readback data from MCU via external serial interface</li>
<li>Controlling MCU GPIOs via SWD interface</li>
</ol>
<p>I am strongly interesed in 3rd option. I have found guidance from Nordic semiconductor <a href="https://infocenter.nordicsemi.com/index.jsp?topic=%2Fnwp_034%2FWP%2Fnwp_034%2Fnwp_034_gpio_test_out.html" rel="nofollow noreferrer">Controlling GPIO pins with SWD</a>, but have not found anything like this from STMicro. So my question is: is it possible to do the same with STM32? Are there any appnotes or guidance from STMicro? Could you share your experience or thoughts, please.</p>
| Controlling GPIO pins via SWD interface | 2024-02-26T15:07:15.710 |
703957 | |altium| | <p>To enable this feature, you must initially activate the cross-probe function as depicted below. Once activated, navigate to either the schematic or PCB environment. After that right-click your mouse, then select cross-probe after that holding down the control key and clicking on the desired component. Proceed to your schematic or PCB section.</p>
<p><a href="https://i.stack.imgur.com/pM5NA.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pM5NA.jpg" alt="Cross Select Mode" /></a></p>
<p>However, for optimal efficiency, it's preferable to initially divide your Altium screen into two vertical or horizontal sections.</p>
<p><a href="https://i.stack.imgur.com/l8eA9.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/l8eA9.jpg" alt="Split Option" /></a></p>
<p>and then click on the part you want in the schematic environment, then use this option [Reposition Selected component] in the PCB environment as the picture.</p>
<p><a href="https://i.stack.imgur.com/zxtAg.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zxtAg.jpg" alt="Reposition option" /></a></p>
| <p>Is there a way to highlight a component in the Altium PCB designer and then jump to its location in the schematic editor? I have a hierarchical schematic so it can be a pain to have to search through each schematic sheet to find where the component is located when using cross probing. I found that I can just search the designator and the schematic link will pop up but I was wondering if there is a better way to do this.</p>
| Altium jump from component in PCB editor to schematic | 2024-02-26T15:41:36.413 |
703959 | |operational-amplifier|amplifier| | <p>The uA741 does not function with a 5V supply. It requires at least +/-5V (10V between V+ and V-). The same applies to the OPA27, which is actually only specified to operate with +/-15V (derated down to +/-4V).</p>
<p>Use an OpAmp that's rated for operation at these voltages, for example the MCP6274. The OpAmp also needs to be a rail-to-rail type (which the MCP6274 is).</p>
| <p>I am trying to use a non-inverting amplifier to boost a 1kHz signal with a DC component of 130mV and a peak to peak swing of 52mV.</p>
<p>I am using a uA741 General Purpose OPamp, powered via 5V from USB (VCC- = 0V, VCC+ = 5V).
I have a 100kOhm resistor from Output to V- and a 10kOhm resistor from V- to GND. On paper, this should give me a gain of 11. The signal is being fed into V+. I have left the offsets unconnected for now. The whole system is implemented on a breadboard.</p>
<p>Here's a schematic of the circuit:
<a href="https://i.stack.imgur.com/UDk1f.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/UDk1f.png" alt="uA741 in supposed 11x non-inverting feedback condition" /></a></p>
<p>However, when I apply 5V to this circuit the output is just glued to 4V. Interestingly, this is also the case when I connect V+ to GND.</p>
<p>I have removed all connections and reconnected everything to make sure that it's wired up correctly. I believe it is. I tried replacing the uA741 with an OPA27GP (just grabbing what's nearby) but with the same effect.</p>
<p>At this point I realize that I am out of my depth. I ran this circuit (with an ideal op-amp) on <a href="https://www.falstad.com/circuit/" rel="nofollow noreferrer">https://www.falstad.com/circuit/</a> and it performed just as I would expect.</p>
<p>Does anyone know what might be the issue here?</p>
| Non-Inverting Amplifier stuck at max output voltage | 2024-02-26T16:08:27.247 |