glenn-jocher commited on
Commit
94a7f55
1 Parent(s): b2bef8f

FReLU bias=False bug fix (#1666)

Browse files
Files changed (1) hide show
  1. utils/activations.py +1 -1
utils/activations.py CHANGED
@@ -65,7 +65,7 @@ class MemoryEfficientMish(nn.Module):
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  class FReLU(nn.Module):
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  def __init__(self, c1, k=3): # ch_in, kernel
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  super().__init__()
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- self.conv = nn.Conv2d(c1, c1, k, 1, 1, groups=c1)
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  self.bn = nn.BatchNorm2d(c1)
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  def forward(self, x):
 
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  class FReLU(nn.Module):
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  def __init__(self, c1, k=3): # ch_in, kernel
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  super().__init__()
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+ self.conv = nn.Conv2d(c1, c1, k, 1, 1, groups=c1, bias=False)
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  self.bn = nn.BatchNorm2d(c1)
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  def forward(self, x):