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UCC28251: Queries about PSpice Average Model

Part Number: UCC28251 Hi Team, In UCC28251 average model (slum358.zip), the DC value of output keeps at 90.2V regardless of the change of Vin (200~800V). Is it as expected? Thanks Hongjia

Hi Hongjia, The circuit has a closed loop feedback circuit U7 and U5 that should maintain a constant output voltage over the full input voltage range so I think the circuit is behaving as expected. U7 is essentially the voltage loop error amplifier, the output voltage is divided down by R33 and R34 principally. If the voltage at the REF pin of the TL431 exceed 2.5V the TL431 will start to shunt current and pull current through the diode of the opto-coupler. This in turn will demand a lower duty cycle to maintain a constant output voltage. Regards Peter

Hi Peter, Actually, I am the designer of this half bridge power supply, the operation conditions are as below: Switching frequency:100 kHZ Input voltage: 200~800 Vdc Output voltage: 24 Vdc Output power: 180W Rated,216W Max, XFMR turn ratio: 3.714, Primary inductance:1000uH typical, Input voltage feedward used, voltage mode, Primary side control, use diodes as secondary side rectifier, Type III compensation network with TL431B and Zener. This power supply works fine in the steady state, but when I test the load transient capability(1A to 9A,1A/us max), I find the voltage at the pin ILIM will exceed 0.5V for a certain time, the higher slew rate of load transient, the longer overcurrent lasting time; the higher load transient, the longer overcurrent lasting time.(9Amps load is still below steady state OCP setpoint).Also, during the load transient, the waveform ILIM shows imbalanced primary current, but it will recover balanced in the end. 0A to 5A load transient 0A to 5A load transient2 if the overcurrent lasting time is longer than the OC delay time set by the cap at the pin HICC, UCC28251 will shut down the output and enter into hiccup protection mode, if I want to improve the load transient capability, I have to increase the OC delay time. when I test 2A to 7.5A load transient, the output voltage fluctuation seems acceptable. My question is: 1. why does the voltage at ILIM exceed 0.5V and the imbalanced primary current happen when load transient? is it due to loop instability (phase margin and gain margin are not enough) or is it the inherent characteristics of half bridge power supply or the issue of UCC28251 or something else? 2. Cancompany provide a unencrypted transient pspice model of UCC28251 so that I run the transient simulation in the LTSpice? Best regards, Chengjun Wang

Hi Chengiun, It looks like a control loop instability from looking at the ch 4 which i assume is the output voltage, have you tried reducing the gain by a factor of 10 in the control loop to see what effect it has? When you say primary side control do you mean that the controller is on the primary side and that the feedback signal is been fed back through an opto-coupler from the secondary side where the voltage error amplifier is located? Regards Peter

Hi Peter, The CH4 is the output voltage with measured by AC coupling, so it should be the ripple voltage. why do you think it is a control loop instability? How to reduce the gain by factor 10 in the control loop and why does it help? The controller is on the primary side, the feedback signal is fed back through an opto-coupler CNY17-3 from secondary side. Best regards, Chengjun Wang

Hi Chengjun, Sorry for the late response here, to decrease the gain I would increase the value of R5o from 1k to 4k7 or 10k. I would also DC couple the scope probe when measuring Vout during the load transient and offset the 0V level so the signal is still displayed on the screen. Regards Peter

Hi Peter, Thanks for your reply. I will try to increase R50 value in the real test, but it seems no big difference from the average model simulation. R50=1K R50=4.7K R50=10K also, the load transient waveform i shared in the previous reply was captured at the load side so that we see the DC level of voltage (AC coupled) is changing. here i attach the load transient waveform (AC coupled) which is close to the power supply output, i think it is good from the perspective of loop stability. 630Vin 2A to 7.5A_P24 ripple voltage The below is P24 voltage fluctuation (DC coupled) during load transient from 1A to 9A succefully, 630Vin_1A to 9A_P24 And the next chart show the failed load transient, you can see P24 doesn't drop too much during load transient, but due to the voltage of ILIM pin exceeds 0.5 more than 7.52ms, it shuts down the gating signals. 565Vin_1A to 9A_P24_failed Best regards, Chengjun

Hi Chengjun The load transient wave appears to be underdamped, reducing the gain will help reduce the overshoot when recovering but it will increase the initial dip or overshoot voltage. Have you tried to change the gain on the board? Thanks Peter

Hi Chengiun, I hope you have made some progress in the meantime. Since there has been no reply to my last post for nearly a week I am going to close this post. Please open a new post if you have more questions. Regards Peter

Hi Peter, Sorry for delay reply. i have tried to change R50 to 10k, and the test results showed that this power supply will still enter into hiccup mode when load transient from 1A to 9A with 12A/ms slew rate. Also I compared the load transient result with R50 =1k versus 10k, it seemed that the voltage overshoot and undershoot at R50 = 10k was worse. 630V_2 to 7.5A_ R50=1k （please ignore the first step since it is from 0A to 7.5A and UCC28251 enters into OCP mode） 630V_2 to 7.5A_ R50 = 10K Best regards, Chengjun

Hi Chengjun The change in the transient response with the larger value of resistance in series with the opto-coupler is as expected. The gain will be lower and the output voltage deviation during the load transient will be higher. I was hoping that the lower gain and slower response may help the imbalance during the load transient. The OUTA and OUTB PWM should be matched to ensure equal volts-seconds across the transformer so eliminate saturation. Can you check the COMP signal, and OUTA and OUTB pulse width during the load transient when the imbalance occurs. Maybe there is noise on the COMP pin signal that is causing and issue.You will need to use a timebase of 5us/div to capture the signals with good definition. Regards Peter