sample_embedding_folder2/0605559.txt

Ticket Name: Linux/DRA744: RGMII-ID ( Internal delay) setting....

Query Text:
Part Number: DRA744 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi , I use the RGMII interface connect with Marvell Ethernet SW (88E6390). I set RGMII delay setting enable ( rgmii-id ) but it seems not work. Below is my device setting... &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; fixed-link = <1 1000 0 0>; }; How to ensure the RGMII-ID enable setting is correct?

Responses:
Hi Shawn, which is the version of your SDK/Linux kernel? Regards, Yordan

GLSDK 7.04.03. Linux dra7xx-evm 3.14.63

Hi Shawn, I have forwarded your question to an ethernet expert. Regards, Yordan

Shawn, Till Linux Ethernet expert helps you, can you please refer to http://www.ti.com/lit/an/snla243/snla243.pdf for RGMII delay settings?

I find the RGMII features that only SR2.0 can enable or disable internal TXC delay. and I got the Chip Revision by dev2mem command 0x1B99002F --> SR 1.1 Is that mean i can not use RGMII-ID setting????

The RGMII-ID is not supported on SR1.1. The internal TXC delays are always enabled on this and remote side/PHY needs to take care of not reapplying the delay for Rx lines as TDA2 has already applied it.

TXC delay is always enable..but it still have no delay on by board Below image is J6 RGMII TXC and TXD0 and do not connect anything.

Could you check DRA7x Ethernet statistics registers? Is there any error bits set? Also check on PHY side too if any align/CRC issues.