wanyu/IteraTeR_v2 huggingface dataset:
Original:  One of the most important ways for aggregating preference that has been used in multiagent systems is election.
Revised:  One of the most important ways for aggregating preference that has been used in multi-agent systems is election.
Edit intent: fluency
Original:  Despite the importance of this subject, in real-world situations, under special circumstances, the result of the election does not respect the purpose of those who execute it and the election leads to the dissatisfaction of a large number of people and in some cases causes polarization in societies.
Revised:  Despite the importance of this subject, in some situations, the result of the election does not respect the purpose of those who execute it and the election leads to the dissatisfaction of a large number of people and in some cases causes polarization in societies.
Edit intent: clarity
Original:  Despite the importance of this subject, in real-world situations, under special circumstances, the result of the election does not respect the purpose of those who execute it and the election leads to the dissatisfaction of a large number of people and in some cases causes polarization in societies.
Revised:  Despite the importance of this subject, in real-world situations, under special circumstances, the result of the election does not respect the purpose of those who execute it and the election leads to dissatisfaction of a large number of people and in some cases causes polarization in societies.
Edit intent: fluency
Original:  Despite the importance of this subject, in real-world situations, under special circumstances, the result of the election does not respect the purpose of those who execute it and the election leads to the dissatisfaction of a large number of people and in some cases causes polarization in societies.
Revised:  Despite the importance of this subject, in real-world situations, under special circumstances, the result of the election does not respect the purpose of those who execute it and the election leads to the dissatisfaction of a large amount of people and in some cases causes polarization in societies.
Edit intent: clarity
Original:  To analyze these situations, we introduce notions called social frustration and social disappointment and show which voting rules can prevent them in elections.
Revised:  To analyze these situations, we introduce a new notion called social disappointment and we show which voting rules can prevent them in elections.
Edit intent: clarity
Original:  To analyze these situations, we introduce notions called social frustration and social disappointment and show which voting rules can prevent them in elections.
Revised:  To analyze these situations, we introduce notions called social frustration and social disappointment and show which voting rules can prevent it in elections.
Edit intent: clarity
Original:  We empirically compared our protocols with seven well-known  voting protocols and we observed that our protocols are capable of preventing social disappointment and are more robust against manipulations.
Revised:  We empirically compared our protocols with seven well-known voting protocols and observe that our protocols are capable of preventing social disappointment and are more robust against manipulations.
Edit intent: fluency
Original:  In this study, we establish the exact bound for existence of such representations by proving that 8542 is the largest integer with no such partition.
Revised:  In this study, we establish the exact bound for existence of such partitions by proving that 8542 is the largest integer with no such partition.
Edit intent: clarity
Original: To implement convolutional neural networks (CNN) in hardware, the state-of-the-art CNN accelerators pipeline computation and data transfer stages using an off-chip memory and simultaneously execute them on the same timeline .
Revised: Convolutional neural networks (CNN) in hardware, the state-of-the-art CNN accelerators pipeline computation and data transfer stages using an off-chip memory and simultaneously execute them on the same timeline .
Edit intent: clarity
Original:  Fusion architectures that can fuse multiple layers have been proposed to solve this problem, but applications such as super-resolution (SR) require a large amount of an on-chip memory because of the high resolution of the feature maps .
Revised:  Fusion architectures that can fuse multiple layers have been proposed to solve this problem, but applications such as super-resolution (SR) cannot be implemented in real-time with these accelerators because of the high resolution of the feature maps .
Edit intent: clarity
Original:  Fusion architectures that can fuse multiple layers have been proposed to solve this problem, but applications such as super-resolution (SR) require a large amount of an on-chip memory because of the high resolution of the feature maps .
Revised:  Fusion architectures that can fuse multiple layers have been proposed to solve this problem, but applications such as super-resolution (SR) require a large amount of an on-chip memory because of the long execution cycles required to generate high-resolution (HR) images such as 4K ultra-high-definition (UHD) .
Edit intent: clarity
Original:  In this paper, we propose a novel on-chip CNN accelerator for SR to optimize the CNN dataflow in the on-chip memory .
Revised:  In this paper, we propose a novel CNN accelerator with the efficient parallelization methods in SR application .
Edit intent: clarity
Original: Convolutional neural networks ( CNN) show the excellent performance compared to conventional machine learning algorithms in various computer vision applications.
Revised: Convolutional neural networks ( CNNs) demonstrate excellent performance as compared to conventional machine learning algorithms in various computer vision applications.
Edit intent: clarity
Original:  In recent years, FPGA-based CNN accelerators have been proposed to optimize the performance and power efficiency.
Revised:  In recent years, FPGA-based CNN accelerators have been proposed for optimizing performance and power efficiency.
Edit intent: fluency
Original:  Most accelerators are designed for object detection and recognition that perform on low-resolution (LR) images.
Revised:  Most accelerators are designed for object detection and recognition algorithms that are performed on low-resolution (LR) images.
Edit intent: clarity
Original:  However, image super-resolution (SR) cannot be implemented in real-time with these accelerators because of the long execution cycles required to generate high-resolution (HR) images such as 4K ultra-high-definition (UHD)  .
Revised:  However, image super-resolution (SR) cannot be implemented in real-time with these accelerators because of the long execution cycles required to generate high-resolution (HR) images , such as those used in ultra-high-definition (UHD) .
Edit intent: clarity
Original:  However, image super-resolution (SR) cannot be implemented in real-time with these accelerators because of the long execution cycles required to generate high-resolution (HR) images such as 4K ultra-high-definition (UHD)  .
Revised:  However, image super-resolution (SR) cannot be implemented in real-time with these accelerators because of the long execution cycles required to generate high-resolution (HR) images such as 4K ultra-high-definition (UHD) systems .
Edit intent: clarity
Original:  In this paper, we propose a novel CNN accelerator with the efficient parallelization methods in SR application .
Revised:  In this paper, we propose a novel CNN accelerator with efficient parallelization methods in SR application .
Edit intent: fluency
Original:  In this paper, we propose a novel CNN accelerator with the efficient parallelization methods in SR application .
Revised:  In this paper, we propose a novel CNN accelerator with the efficient parallelization methods for SR applications .
Edit intent: fluency
Original:  First, we propose a new methodology to optimize deconvolutional neural networks ( DCNN ) used for up-scaling the feature maps based on trained filters.
Revised:  First, we propose a new methodology for optimizing the deconvolutional neural networks ( DCNN ) used for up-scaling the feature maps based on trained filters.
Edit intent: fluency
Original:  First, we propose a new methodology to optimize deconvolutional neural networks ( DCNN ) used for up-scaling the feature maps based on trained filters.
Revised:  First, we propose a new methodology to optimize deconvolutional neural networks ( DCNNs ) used for up-scaling the feature maps based on trained filters.
Edit intent: clarity
Original:  First, we propose a new methodology to optimize deconvolutional neural networks ( DCNN ) used for up-scaling the feature maps based on trained filters.
Revised:  First, we propose a new methodology to optimize deconvolutional neural networks ( DCNN ) used for increasing feature maps, based on trained filters.
Edit intent: clarity
Original:  Second, we propose a  method to optimize  CNN dataflow using an on-chip memory so that CNN-based SR algorithm can be driven at low power in display applications.
Revised:  Second, we propose a novel method to optimize CNN dataflow using an on-chip memory so that CNN-based SR algorithm can be driven at low power in display applications.
Edit intent: clarity
Original:  Second, we propose a  method to optimize  CNN dataflow using an on-chip memory so that CNN-based SR algorithm can be driven at low power in display applications.
Revised:  Second, we propose a method to optimize the CNN dataflow using an on-chip memory so that CNN-based SR algorithm can be driven at low power in display applications.
Edit intent: coherence
Original:  Second, we propose a  method to optimize  CNN dataflow using an on-chip memory so that CNN-based SR algorithm can be driven at low power in display applications.
Revised:  Second, we propose a method to optimize CNN dataflow using on-chip memory so that CNN-based SR algorithm can be driven at low power in display applications.
Edit intent: coherence
Original:  Second, we propose a  method to optimize  CNN dataflow using an on-chip memory so that CNN-based SR algorithm can be driven at low power in display applications.
Revised:  Second, we propose a method to optimize CNN dataflow using an on-chip memory so that the SR algorithm can be driven at low power in display applications.
Edit intent: clarity
Original:  Third, we propose a two-stage quantization algorithm to select the optimized hardware size for the limited number of DSPs.
Revised:  Third, we propose a two-stage quantization algorithm to determine the optimized hardware size for the limited number of DSPs.
Edit intent: clarity
Original:  Third, we propose a two-stage quantization algorithm to select the optimized hardware size for the limited number of DSPs.
Revised:  Third, we propose a two-stage quantization algorithm to select the optimized hardware size for a limited number of DSPs.
Edit intent: fluency
Original:  Finally, we present the energy-efficient CNN architecture for SR and validate our architecture on a mobile panel with quad-high-definition (QHD) resolution.
Revised:  Finally, we present an energy-efficient CNN architecture for SR and validate our architecture on a mobile panel with quad-high-definition (QHD) resolution.
Edit intent: fluency
Original:  Finally, we present the energy-efficient CNN architecture for SR and validate our architecture on a mobile panel with quad-high-definition (QHD) resolution.
Revised:  Finally, we present the energy-efficient architecture for SR and validate our architecture on a mobile panel with quad-high-definition (QHD) resolution.
Edit intent: clarity
Original:  Experimental results show that the proposed DCNN accelerator achieves  up to 108 times higher throughput than the conventional DCNN accelerator with the same hardware resources .
Revised:  Our experimental results show that the proposed DCNN accelerator achieves up to 108 times higher throughput than the conventional DCNN accelerator with the same hardware resources .
Edit intent: clarity
Original:  Experimental results show that the proposed DCNN accelerator achieves  up to 108 times higher throughput than the conventional DCNN accelerator with the same hardware resources .
Revised:  Experimental results show that , with the same hardware resources, the proposed DCNN accelerator achieves up to 108 times higher throughput than the conventional DCNN accelerator with the same hardware resources .
Edit intent: fluency
Original:  Experimental results show that the proposed DCNN accelerator achieves  up to 108 times higher throughput than the conventional DCNN accelerator with the same hardware resources .
Revised:  Experimental results show that the proposed DCNN accelerator achieves a throughput up to 108 times higher throughput than the conventional DCNN accelerator with the same hardware resources .
Edit intent: fluency
Original:  Experimental results show that the proposed DCNN accelerator achieves  up to 108 times higher throughput than the conventional DCNN accelerator with the same hardware resources .
Revised:  Experimental results show that the proposed DCNN accelerator achieves up to 108 times greater than that of the conventional DCNN accelerator with the same hardware resources .
Edit intent: clarity
Original:  Experimental results show that the proposed DCNN accelerator achieves  up to 108 times higher throughput than the conventional DCNN accelerator with the same hardware resources .
Revised:  Experimental results show that the proposed DCNN accelerator achieves up to 108 times higher throughput than the conventional DCNN accelerator .
Edit intent: clarity
Original:  In addition, our CNN based SR system achieves  energy efficiency of 92.65 GOPS/W, 173.53 GOPS/W, and 286.76 GOPS/W when  scale factors for SR are 2, 3, and 4, respectively.
Revised:  In addition, our CNN based SR system achieves an energy efficiency of 92.65 GOPS/W, 173.53 GOPS/W, and 286.76 GOPS/W when scale factors for SR are 2, 3, and 4, respectively.
Edit intent: fluency
Original:  In addition, our CNN based SR system achieves  energy efficiency of 92.65 GOPS/W, 173.53 GOPS/W, and 286.76 GOPS/W when  scale factors for SR are 2, 3, and 4, respectively.
Revised:  In addition, our CNN based SR system achieves energy efficiency of 92.65 GOPS/W, 173.53 GOPS/W, and 286.76 GOPS/W when the scale factors for SR are 2, 3, and 4, respectively.
Edit intent: fluency
Original:  Furthermore, we demonstrate that our system can support more scale factors to create image of different sizes and restore HR images to higher peak signal-to-noise-ratio (PSNR) when compared to conventional SR systems.
Revised:  Furthermore, we demonstrate that our system can restore HR images to higher peak signal-to-noise-ratio (PSNR) when compared to conventional SR systems.
Edit intent: coherence
Original:  Furthermore, we demonstrate that our system can support more scale factors to create image of different sizes and restore HR images to higher peak signal-to-noise-ratio (PSNR) when compared to conventional SR systems.
Revised:  Furthermore, we demonstrate that our system can support more scale factors to create image of different sizes and restore HR images with a higher peak signal-to-noise-ratio (PSNR) when compared to conventional SR systems.
Edit intent: clarity
Original:  Furthermore, we demonstrate that our system can support more scale factors to create image of different sizes and restore HR images to higher peak signal-to-noise-ratio (PSNR) when compared to conventional SR systems.
Revised:  Furthermore, we demonstrate that our system can support more scale factors to create image of different sizes and restore HR images to higher peak signal-to-noise-ratio (PSNR) than conventional SR systems.
Edit intent: clarity
Original: Convolutional neural networks (CNNs) demonstrate excellent performance as compared to conventional machine learning algorithms in various computer vision applications.
Revised: Convolutional neural networks (CNNs) demonstrate excellent performance in various computer vision applications.
Edit intent: clarity
Original:  However,  image super-resolution (SR) cannot be implemented in real time based on the typical accelerator because of the long execution cycles required to generate high-resolution (HR) images, such as those used in ultra-high-definition (UHD) systems.
Revised:  However, image super-resolution (SR) cannot be implemented on a typical accelerator because of the long execution cycles required to generate high-resolution (HR) images, such as those used in ultra-high-definition (UHD) systems.
Edit intent: clarity
Original:  Second , we propose a novel method to optimize the CNN dataflow using on-chip memory so that the SR algorithm can be driven at low power in display applications.
Revised:  Second , we propose a novel method to optimize CNN dataflow so that the SR algorithm can be driven at low power in display applications.
Edit intent: clarity
Original:  Third, we propose a two-stage quantization algorithm to determine the optimized hardware size for a limited number of DSPs.
Edit intent: coherence
Original:  Our experimental results show that, with the same hardware resources, the proposed DCNN accelerator achieves a throughput up to 108 times greater than that of the conventional DCNN accelerator.
Revised:  Our experimental results show that, with the same hardware resources, the proposed DCNN accelerator achieves a throughput up to 108 times greater than that of a conventional DCNN accelerator.
Edit intent: fluency
Original:  In addition, our SR system achieves an energy efficiency of 92.7 GOPS/W, 173.5 GOPS/W, and 286.8 GOPS/W when the scale factors for SR are 2, 3, and 4, respectively.
Revised:  In addition, our SR system achieves an energy efficiency of 92.7 GOPS/W, 173.5 GOPS/W, and 286.8 GOPS/W at SR scale factors of 2, 3, and 4, respectively.
Edit intent: clarity
Original:  Although timely ,  there is a void of solutions that brings these disjoint directions together .
Revised:  Although timely , there is a void of solutions that enables hardware acceleration at the intersection of these disjoint fields .
Edit intent: clarity
Original:  DAnA empowers database users to leap beyond traditional data summarization techniques and seamlessly utilize hardware-accelerated machine learning.
Edit intent: coherence
Original:  Instead, DAnA automatically maps a high-level specification of in-database analytics queries to the FPGA accelerator.
Revised:  Instead, DAnA automatically maps a high-level specification of in-database analytics queries to an FPGA accelerator.
Edit intent: fluency
Original:  The accelerator implementation is generated from a User Defined Function (UDF), expressed as part of a SQL query in a Python-embedded Domain Specific Language (DSL).
Revised:  The accelerator implementation is generated for a User Defined Function (UDF), expressed as part of a SQL query in a Python-embedded Domain Specific Language (DSL).
Edit intent: clarity
Original:  The accelerator implementation is generated from a User Defined Function (UDF), expressed as part of a SQL query in a Python-embedded Domain Specific Language (DSL).
Revised:  The accelerator implementation is generated from a User Defined Function (UDF), expressed as a part of an SQL query using a Python-embedded Domain Specific Language (DSL).
Edit intent: clarity
Original:  The accelerator implementation is generated from a User Defined Function (UDF), expressed as part of a SQL query in a Python-embedded Domain Specific Language (DSL).
Revised:  The accelerator implementation is generated from a User Defined Function (UDF), expressed as part of a SQL query in a Python-embedded Domain-Specific Language (DSL).
Edit intent: fluency
Original:  To realize  efficient in-database integration, DAnA accelerators contain a novel hardware structure, Striders, that directly interface with the buffer pool of the database.
Revised:  To realize an efficient in-database integration, DAnA accelerators contain a novel hardware structure, Striders, that directly interface with the buffer pool of the database.
Edit intent: fluency
Original:  In turn, Striders extract, cleanse, and process the training data tuples , which are consumed by a multi-threaded FPGA engine that executes the analytics algorithm.
Revised:  In turn, Striders extract, cleanse, and process the training data tuples that are consumed by a multi-threaded FPGA engine that executes the analytics algorithm.
Edit intent: coherence
Original:  We integrated DAnA with PostgreSQL to generate hardware accelerators for a range of real-world and synthetic datasets running diverse ML algorithms.
Revised:  We integrate DAnA with PostgreSQL to generate hardware accelerators for a range of real-world and synthetic datasets running diverse ML algorithms.
Edit intent: fluency
Original:  DAnA provides these benefits while hiding the complexity of hardware design from data scientists and allowing them to express the algorithm in  30-60 lines of Python.
Revised:  DAnA provides these benefits while hiding the complexity of hardware design from data scientists and allowing them to express the algorithm in = 30-60 lines of Python.
Edit intent: fluency
Original: This paper introduces the notion of Constrained Locating Arrays (CLAs), mathematical objects which can be used for fault localization in a testingprocess for information systems . CLAs extend ordinary locating arrays to make them applicable to testing of systems that have constraints on test parameters.
Revised: This paper introduces the notion of Constrained Locating Arrays (CLAs), mathematical objects which can be used for fault localization in software testing . CLAs extend ordinary locating arrays to make them applicable to testing of systems that have constraints on test parameters.
Edit intent: clarity
Original:  For the neural-field model we  derive conditions for the existence of spatial and temporal oscillations and  periodic traveling waves using linear stability analysis .
Revised:  For the neural-field model we employ liner stability analysis to derive conditions for the existence of spatial and temporal oscillations and periodic traveling waves using linear stability analysis .
Edit intent: clarity
Original:  For the neural-field model we  derive conditions for the existence of spatial and temporal oscillations and  periodic traveling waves using linear stability analysis .
Revised:  For the neural-field model we derive conditions for the existence of spatial and temporal oscillations and periodic traveling waves .
Edit intent: clarity
Original:  We first prove that periodic traveling waves cannot occur in a single homogeneous population of neurons, irrespective of the form of distance dependence of the connection probability.
Revised:  We first prove that wave trains cannot occur in a single homogeneous population of neurons, irrespective of the form of distance dependence of the connection probability.
Edit intent: clarity
Original: Brains are spatially embedded networks whose architecture has been shaped by physical and biochemical constraints throughout evolution.
Revised: Brains are spatially embedded networks whose architecture has been shaped by physical constraints and communication needs throughout evolution.
Edit intent: clarity
Original: Training a task-completion dialogue agent with real users via reinforcement learning (RL) could be prohibitively expensive, because it requires many interactions with  users.
Revised: Training a task-completion dialogue agent via reinforcement learning (RL) could be prohibitively expensive, because it requires many interactions with users.
Edit intent: coherence
Original: Training a task-completion dialogue agent with real users via reinforcement learning (RL) could be prohibitively expensive, because it requires many interactions with  users.
Revised: Training a task-completion dialogue agent with real users via reinforcement learning (RL) is costly because it requires many interactions with users.
Edit intent: clarity