wanyu/IteraTeR_v2 huggingface dataset:
Original:  By the moment this paper was written, the number of diagnosed COVID-19 cases around the world reaches more than 14 million.
Revised:  At the time this paper was written, the number of diagnosed COVID-19 cases around the world reaches more than 14 million.
Edit intent: clarity
Original:  Since then there has been a rapid rise in the different research communities to combating this worldwide threat  and IoT technology is one of the pioneers in this area.
Revised:  Since then there has been a rapid effort in different research communities to combating this worldwide threat and IoT technology is one of the pioneers in this area.
Edit intent: clarity
Original:  Since then there has been a rapid rise in the different research communities to combating this worldwide threat  and IoT technology is one of the pioneers in this area.
Revised:  Since then there has been a rapid rise in the different research communities to combating this worldwide threat , and IoT technology is one of the pioneers in this area.
Edit intent: fluency
Original:  In the context of COVID-19, IoT enabled /linked devices/applications are utilized to lower the possible spread of COVID-19 to others by early diagnosis, monitoring patients, and practicing defined protocols after patients recovery.
Revised:  In the context of COVID-19, IoT enabled /linked devices/applications are utilized to lower the possible spread of COVID-19 to others by early diagnosis, monitoring patients, and practicing defined protocols after patient recovery.
Edit intent: fluency
Original:  This paper surveys the role of IoT-based technologies in facing with COVID-19 and reviews the state-of-the-art architectures, platforms, applications, and industrial IoT-based solutions combating COVID-19 in three main phases  including early diagnosis, quarantine time, and after recovery.
Revised:  This paper surveys the role of IoT-based technologies in COVID-19 and reviews the state-of-the-art architectures, platforms, applications, and industrial IoT-based solutions combating COVID-19 in three main phases including early diagnosis, quarantine time, and after recovery.
Edit intent: clarity
Original:  This paper surveys the role of IoT-based technologies in facing with COVID-19 and reviews the state-of-the-art architectures, platforms, applications, and industrial IoT-based solutions combating COVID-19 in three main phases  including early diagnosis, quarantine time, and after recovery.
Revised:  This paper surveys the role of IoT-based technologies in facing with COVID-19 and reviews the state-of-the-art architectures, platforms, applications, and industrial IoT-based solutions combating COVID-19 in three main phases , including early diagnosis, quarantine time, and after recovery.
Edit intent: fluency
Original:  However, presenting mean-modulated flicker on computer-controlled displays is problematic;
Revised:  However, presenting flicker on computer-controlled displays is problematic;
Edit intent: clarity
Original:  displays typically introduce luminance artifacts to flickering stimuli, especially at high flicker frequency or contrast, potentially interfering with the validity of findings.
Revised:  displays typically introduce luminance artifacts at high flicker frequency or contrast, potentially interfering with the validity of findings.
Edit intent: clarity
Original:  Here, we present a battery of tests that we used to judge the suitability of displays for presenting  mean-modulated flicker.
Revised:  Here, we present a battery of tests used to weigh the relative merits of two displays for presenting mean-modulated flicker.
Edit intent: clarity
Original:  EIZO ColorEdge CG247X) and a new consumer-grade LCD (Dell U2415b), despite the displays' vendor-supplied specifications being almost identical.
Revised:  EIZO ColorEdge CG247X) and a new consumer-grade LCD (Dell U2415b), despite displays' vendor-supplied specifications being almost identical.
Edit intent: fluency
Original:  We measured displayed luminance using a spot meter , and a linearized photodiode device to record displayed luminance waveforms .
Revised:  We measured displayed luminance using a spot meter and a linearized photodiode device to record displayed luminance waveforms .
Edit intent: fluency
Original:  We measured displayed luminance using a spot meter , and a linearized photodiode device to record displayed luminance waveforms .
Revised:  We measured displayed luminance using a spot meter , and a linearized photodiode .
Edit intent: clarity
Original:  We derived  spatial uniformity,  response times, Fourier amplitude spectra,  cycle-averaged luminance , and root-mean-squared luminance .
Revised:  We derived several measures, including spatial uniformity, response times, Fourier amplitude spectra, cycle-averaged luminance , and root-mean-squared luminance .
Edit intent: clarity
Original:  We derived  spatial uniformity,  response times, Fourier amplitude spectra,  cycle-averaged luminance , and root-mean-squared luminance .
Revised:  We derived spatial uniformity, response times, Fourier amplitude spectra, and cycle-averaged luminance , and root-mean-squared luminance .
Edit intent: coherence
Original:  We derived  spatial uniformity,  response times, Fourier amplitude spectra,  cycle-averaged luminance , and root-mean-squared luminance .
Revised:  We derived spatial uniformity, response times, Fourier amplitude spectra, cycle-averaged luminance .
Edit intent: coherence
Original:  Fourier transformation of nominally static test patches revealed spectra free of artifacts, with the exception of a frame response (artifactual flicker related to the display refresh) .
Revised:  Fourier transformation of nominally static test patches revealed spectra free of artifacts, with the exception of a frame response .
Edit intent: clarity
Original: To mitigate the ever worsening Power wall and Memory wall problems, multi-core architectures with multilevel cache hierarchies have been widely used in modern processors.
Revised: To mitigate the ever worsening "Power wall" and "Memory wall" problems, multi-core architectures with multilevel cache hierarchies have been widely used in modern processors.
Edit intent: fluency
Original: To mitigate the ever worsening Power wall and Memory wall problems, multi-core architectures with multilevel cache hierarchies have been widely used in modern processors.
Revised: To mitigate the ever worsening Power wall and Memory wall problems, multi-core architectures with multilevel cache hierarchies have been widely accepted in modern processors.
Edit intent: clarity
Original:  However, the complexity of the architectures makes the modeling of shared caches extremely complex.
Revised:  However, the complexity of the architectures makes modeling of shared caches extremely complex.
Edit intent: fluency
Original:  In this paper, we propose a data-sharing aware analytical model for estimating the miss rates of the downstream shared cache in a multi-core environment .
Revised:  In this paper, we propose a data-sharing aware analytical model for estimating the miss rates of the downstream shared cache under multi-core environment .
Edit intent: clarity
Original:  In this paper, we propose a data-sharing aware analytical model for estimating the miss rates of the downstream shared cache in a multi-core environment .
Revised:  In this paper, we propose a data-sharing aware analytical model for estimating the miss rates of the downstream shared cache in a multi-core scenarios .
Edit intent: clarity
Original:  The integration avoids time-consuming full simulations of the cache architecture , which are required by conventional approaches.
Revised:  This integration avoids time consuming full simulations of the cache architecture , which are required by conventional approaches.
Edit intent: fluency
Original:  The integration avoids time-consuming full simulations of the cache architecture , which are required by conventional approaches.
Revised:  The integration avoids time-consuming full simulations of the cache architecture that required by conventional approaches.
Edit intent: clarity
Original:  We compare the L2 cache miss rates with the results from gem5  under 8 hardware configurations including dual-core and quad-core architectures .
Revised:  Compared to the results from gem5 under 8 hardware configurations including dual-core and quad-core architectures .
Edit intent: clarity
Original:  We compare the L2 cache miss rates with the results from gem5  under 8 hardware configurations including dual-core and quad-core architectures .
Revised:  We compare the L2 cache miss rates with the results from gem5 simulations under 8 hardware configurations including dual-core and quad-core architectures .
Edit intent: clarity
Original:  After integrated with the upstream model , the overall average absolute error is 8.03\% in 4 hardware configurations .
Revised:  After integrated with the upstream model , the overall average absolute error in 4 hardware configurations .
Edit intent: clarity
Original:  As an application case of the integrated model, we also evaluate the miss rates of 57 different cache configurations in multi-core and multi-level cache scenarios .
Revised:  As an application case of the integrated model, we also evaluate the miss rates of 57 different multi-core and multi-level cache scenarios .
Edit intent: clarity
Original:  As an application case of the integrated model, we also evaluate the miss rates of 57 different cache configurations in multi-core and multi-level cache scenarios .
Revised:  As an application case of the integrated model, we also evaluate the miss rates of 57 different cache configurations in multi-core and multi-level cache configurations .
Edit intent: clarity
Original:  Contemporary polyhedral-based compilation techniques make it possible to optimize reductions, such as prefix sum , in which each component of the reduction's output potentially shares computation with another component in the reduction.
Revised:  Contemporary polyhedral-based compilation techniques make it possible to optimize reductions, such as prefix sums , in which each component of the reduction's output potentially shares computation with another component in the reduction.
Edit intent: fluency
Original:  In such cases, existing approaches can generate incorrect code that violates the data dependencies of the original, unoptimized program.
Revised:  In such cases, existing approaches can generate incorrect code that violates the data dependences of the original, unoptimized program.
Edit intent: fluency
Original:  Specifically, the complexities for 10 of the 11 programs improve siginifcantly by factors at least of the sizes of the input data, which are in the range of 10^4 to 10^6 for typical real application inputs.
Revised:  The complexities for 10 of the 11 programs improve siginifcantly by factors at least of the sizes of the input data, which are in the range of 10^4 to 10^6 for typical real application inputs.
Edit intent: coherence
Original:  We also confirm the significance of the improvement by showing that the speedups in wall-clock time  range from 1.1x to over 10 ^7 x.
Revised:  We also confirm the significance of the improvement by showing speedups in wall-clock time range from 1.1x to over 10 ^7 x.
Edit intent: clarity
Original: In this paper, we propose novel multi-scale DNNs (MscaleDNN ) using the idea of radial scaling in frequency domain and activation functions with compact support.
Revised: In this paper, we propose multi-scale DNNs (MscaleDNN ) using the idea of radial scaling in frequency domain and activation functions with compact support.
Edit intent: clarity
Original: In this paper, we propose novel multi-scale DNNs (MscaleDNN ) using the idea of radial scaling in frequency domain and activation functions with compact support.
Revised: In this paper, we propose novel multi-scale deep neural networks (MscaleDNNs ) using the idea of radial scaling in frequency domain and activation functions with compact support.
Edit intent: clarity
Original: Deductive verification techniques , based on program logics (i.e., the family of Floyd-Hoare logics) , are a powerful approach for program reasoning.
Revised: Deductive verification techniques based on program logics (i.e., the family of Floyd-Hoare logics) , are a powerful approach for program reasoning.
Edit intent: fluency
Original: Deductive verification techniques , based on program logics (i.e., the family of Floyd-Hoare logics) , are a powerful approach for program reasoning.
Revised: Deductive verification techniques , based on program logics (i.e., the family of Floyd-Hoare logics) are a powerful approach for program reasoning.
Edit intent: fluency
Original:  Recently, there has been a trend of increasing the expressive power of such logics by augmenting their rules with additional analyses .
Revised:  Recently, there has been a trend of increasing the expressive power of such logics by augmenting their rules with additional information to reason about program side-effects .
Edit intent: clarity
Original:  For example, general program logics have been augmented with cost analyses, logics for probabilistic programming have been augmented with estimate measures, and logics for differential privacy with sensitivity bounds.
Revised:  For example, general program logics have been augmented with cost analyses, logics for probabilistic computations have been augmented with estimate measures, and logics for differential privacy with sensitivity bounds.
Edit intent: clarity
Original:  In this work, we unify these various disparate approaches via the paradigm of grading, adapted from the world of functional calculi and semantics.
Revised:  In this work, we unify these various approaches via the paradigm of grading, adapted from the world of functional calculi and semantics.
Edit intent: clarity
Original:  We propose Graded Hoare Logic (GHL), a parametrisable framework for augmenting program logics with a pre-ordered monoidal analysis.
Revised:  We propose Graded Hoare Logic (GHL), a parameterisable framework for augmenting program logics with a pre-ordered monoidal analysis.
Edit intent: fluency
Original:  We propose Graded Hoare Logic (GHL), a parametrisable framework for augmenting program logics with a pre-ordered monoidal analysis.
Revised:  We propose Graded Hoare Logic (GHL), a parametrisable framework for augmenting program logics with a preordered monoidal analysis.
Edit intent: fluency
Original:  Central to our framework is the notion of  graded category which we extend here, introducing graded Freyd categories which provide a semantics that can interpret many examples of augmented program logics from the literature.
Revised:  Central to our framework is the notion of a graded category which we extend here, introducing graded Freyd categories which provide a semantics that can interpret many examples of augmented program logics from the literature.
Edit intent: fluency
Original: We consider a prospect for working with big data in an open and critical framework , focusing on a set of issues underlying the collection and analysis of big data.
Revised: In this paper we consider some of the issues of working with big data in an open and critical framework , focusing on a set of issues underlying the collection and analysis of big data.
Edit intent: clarity
Original: We consider a prospect for working with big data in an open and critical framework , focusing on a set of issues underlying the collection and analysis of big data.
Revised: We consider a prospect for working with big data in an open and critical framework . We focus on a set of issues underlying the collection and analysis of big data.
Edit intent: fluency
Original: We consider a prospect for working with big data in an open and critical framework , focusing on a set of issues underlying the collection and analysis of big data.
Revised: We consider a prospect for working with big data in an open and critical framework , focusing on a set of challenges underlying the collection and analysis of big data.
Edit intent: clarity
Original:  In particular we consider the issues of critical data analysis and placing individual data science studies in a wider social and economic context, the role of inferential theory in the presence of big data, and issues relating to messiness and complexity in big data.
Revised:  In particular we consider the issues of critical data analysis and placing individual data science studies in a wider social and economic contexts, along the the role of inferential theory in the presence of big data, and issues relating to messiness and complexity in big data.
Edit intent: clarity
Original: We give an algorithm that takes as input a graph G with weights on the vertices and outputs a maximum weight independent set of G . If G  does not contain any cycle on k or more vertices as an induced subgraph (G is a C _{ \geq k }-free graph ), the algorithm runs in time n^{O( k^3 \log ^5 n) %DIFDELCMD < \MBLOCKRIGHTBRACE%%% , and therefore for fixed k is a quasi-polynomial time algorithm.
Revised: For an integer t, a graph G with weights on the vertices and outputs a maximum weight independent set of G . If G does not contain any cycle on k or more vertices as an induced subgraph (G is a C _{ \geq k }-free graph ), the algorithm runs in time n^{O( k^3 \log ^5 n) %DIFDELCMD < \MBLOCKRIGHTBRACE%%% , and therefore for fixed k is a quasi-polynomial time algorithm.
Edit intent: clarity
Original: We give an algorithm that takes as input a graph G with weights on the vertices and outputs a maximum weight independent set of G . If G  does not contain any cycle on k or more vertices as an induced subgraph (G is a C _{ \geq k }-free graph ), the algorithm runs in time n^{O( k^3 \log ^5 n) %DIFDELCMD < \MBLOCKRIGHTBRACE%%% , and therefore for fixed k is a quasi-polynomial time algorithm.
Revised: We give an algorithm that takes as input a graph G is called does not contain any cycle on k or more vertices as an induced subgraph (G is a C _{ \geq k }-free graph ), the algorithm runs in time n^{O( k^3 \log ^5 n) %DIFDELCMD < \MBLOCKRIGHTBRACE%%% , and therefore for fixed k is a quasi-polynomial time algorithm.
Edit intent: clarity
Original: We give an algorithm that takes as input a graph G with weights on the vertices and outputs a maximum weight independent set of G . If G  does not contain any cycle on k or more vertices as an induced subgraph (G is a C _{ \geq k }-free graph ), the algorithm runs in time n^{O( k^3 \log ^5 n) %DIFDELCMD < \MBLOCKRIGHTBRACE%%% , and therefore for fixed k is a quasi-polynomial time algorithm.
Revised: We give an algorithm that takes as input a graph G with weights on the vertices and outputs a maximum weight independent set of G . If G does not contain any cycle on k or more vertices as an induced subgraph (G is a C _{ >t }-free graph ), the algorithm runs in time n^{O( k^3 \log ^5 n) %DIFDELCMD < \MBLOCKRIGHTBRACE%%% , and therefore for fixed k is a quasi-polynomial time algorithm.
Edit intent: clarity
Original: We give an algorithm that takes as input a graph G with weights on the vertices and outputs a maximum weight independent set of G . If G  does not contain any cycle on k or more vertices as an induced subgraph (G is a C _{ \geq k }-free graph ), the algorithm runs in time n^{O( k^3 \log ^5 n) %DIFDELCMD < \MBLOCKRIGHTBRACE%%% , and therefore for fixed k is a quasi-polynomial time algorithm.
Revised: We give an algorithm that takes as input a graph G with weights on the vertices and outputs a maximum weight independent set of G . If G does not contain any cycle on k or more vertices as an induced subgraph (G is a C _{ \geq k }-free graph G with weights on vertices, finds in time n^{O( k^3 \log ^5 n) %DIFDELCMD < \MBLOCKRIGHTBRACE%%% , and therefore for fixed k is a quasi-polynomial time algorithm.
Edit intent: clarity
Original: We prove three decomposition results for sparse positive ( semi- )definite polynomial matrices  .
Revised: We prove three decomposition results for sparse positive ( semi )definite polynomial matrices .
Edit intent: fluency
Original:  We also obtain new convergent hierarchies of sparsity-exploiting SOS reformulations to convex optimization problems with large and sparse polynomial matrix inequalities.
Revised:  We also obtain new convergent hierarchies of sparsity-exploiting SOS reformulations for convex optimization problems with large and sparse polynomial matrix inequalities.
Edit intent: fluency
Original:  Analytical examples illustrate all our decomposition results, while large-scale numerical examples demonstrate that the corresponding sparsity-exploiting SOS hierarchies have significantly lower computational complexity than traditional ones.
Revised:  Numerical examples demonstrate that these hierarchies can have a significantly lower computational complexity than traditional ones.
Edit intent: clarity
Original:  IETF is standardizing a key establishment protocol named EDHOC for constrained IoT devices.
Revised: The IETF is standardizing a key establishment protocol named EDHOC for constrained IoT devices.
Edit intent: fluency
Original:  In contrast to more powerful IoT devices , such as web cameras and cars, which receive most attention from media , constrained devices often have severe restrictions on energy consumption .
Revised:  In contrast to more powerful devices like web cameras and cars, which receive most attention from media , constrained devices often have severe restrictions on energy consumption .
Edit intent: clarity
Original:  Additionally, they often use specialized wireless communication links with demanding constraints on message sizes, which may also vary between messages . EDHOC was first formally analyzed  by Bruni et . al.
Revised:  Additionally, they often use specialized wireless communication links with demanding constraints on message sizes, which may also vary between messages . EDHOC was first formally analyzed by Bruni et al.
Edit intent: fluency
Original:  In this paper  we formally analyze all methods of EDHOC in a symbolic Dolev-Yao model, using the Tamarin verification tool.
Revised:  In this paper , we formally analyze all methods of EDHOC in a symbolic Dolev-Yao model, using the Tamarin verification tool.
Edit intent: fluency
Original:  We show that the different methods provide sensible, but also rather heterogeneous security properties, and discuss  consequences of this  .
Revised:  We show that the different methods provide sensible, but also rather heterogeneous security properties, and discuss various consequences of this .
Edit intent: clarity
Original: The IETF is standardizing an authenticated key establishment (AKE) protocol named EDHOC for constrained IoT devices .
Revised: Constrained IoT devices are becoming ubiquitous in society and there is a need for secure communication protocols that respect the constraints under which these devices operate. EDHOC is an authenticated key establishment (AKE) protocol named EDHOC for constrained IoT devices .
Edit intent: clarity
Original: The IETF is standardizing an authenticated key establishment (AKE) protocol named EDHOC for constrained IoT devices .
Revised: The IETF is standardizing an authenticated key establishment protocol for constrained IoT devices .
Edit intent: clarity
Original:  EDHOC was first formally analyzed in 2018 by Bruni et al.
Revised:  EDHOC was first formally analyzed in 2018.
Edit intent: clarity
Original:  Since then, the protocol has been significantly extended and now has three new key establishment methods  .
Revised:  Since then, the protocol has evolved significantly and several new key establishment methods .
Edit intent: clarity
Original:  Since then, the protocol has been significantly extended and now has three new key establishment methods  .
Revised:  Since then, the protocol has been significantly extended and now has three new key establishment methods have been added .
Edit intent: clarity
Original:  In this paper, we formally analyze all methods of EDHOC in a symbolic Dolev-Yao model , using the Tamarin verification tool.
Revised:  In this paper, we formally analyze all methods of EDHOC in a symbolic Dolev-Yao model using the Tamarin verification tool.
Edit intent: fluency