Upload 4-mgc_pci_bridge32_a-util_0.7.json with huggingface_hub
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4-mgc_pci_bridge32_a-util_0.7.json
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| 1 |
+
{
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| 2 |
+
"Design Information": {
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| 3 |
+
"design_name": "pci_bridge32",
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| 4 |
+
"design_version": "5.8",
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| 5 |
+
"eda_tool": "iEDA",
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| 6 |
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"eda_version": "V23.03-OS-01",
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| 7 |
+
"flow_memory": "0.000000 MB",
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| 8 |
+
"flow_runtime": "0.000000 s",
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| 9 |
+
"flow_stage": "iDB - iEDA Database"
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| 10 |
+
},
|
| 11 |
+
"Design Layout": {
|
| 12 |
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"core_area": 116212.0,
|
| 13 |
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"core_bounding_height": 340.0,
|
| 14 |
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"core_bounding_width": 341.8,
|
| 15 |
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"core_usage": 0.47821223735809326,
|
| 16 |
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"design_dbu": 1000,
|
| 17 |
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"die_area": 116212.0,
|
| 18 |
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"die_bounding_height": 340.0,
|
| 19 |
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"die_bounding_width": 341.8,
|
| 20 |
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"die_usage": 0.47821223735809326
|
| 21 |
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},
|
| 22 |
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"Design Statis": {
|
| 23 |
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"num_instances": 29521,
|
| 24 |
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"num_iopins": 361,
|
| 25 |
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"num_layers": 9,
|
| 26 |
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"num_layers_cut": 4,
|
| 27 |
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"num_layers_routing": 5,
|
| 28 |
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"num_nets": 29985,
|
| 29 |
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"num_pdn": 2
|
| 30 |
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},
|
| 31 |
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"Instances": {
|
| 32 |
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"clock": {
|
| 33 |
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"area": 0.0,
|
| 34 |
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"area_ratio": 0.0,
|
| 35 |
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"core_usage": 0.0,
|
| 36 |
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"die_usage": 0.0,
|
| 37 |
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"num": 0,
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| 38 |
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"num_ratio": 0.0,
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| 39 |
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"pin_num": 0,
|
| 40 |
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"pin_ratio": 0.0
|
| 41 |
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},
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| 42 |
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"iopads": {
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| 43 |
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"area": 0.0,
|
| 44 |
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"area_ratio": 0.0,
|
| 45 |
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"core_usage": 0.0,
|
| 46 |
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"die_usage": 0.0,
|
| 47 |
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"num": 0,
|
| 48 |
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"num_ratio": 0.0,
|
| 49 |
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"pin_num": 0,
|
| 50 |
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"pin_ratio": 0.0
|
| 51 |
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},
|
| 52 |
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"logic": {
|
| 53 |
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"area": 49020.0,
|
| 54 |
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"area_ratio": 0.8820671537049699,
|
| 55 |
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"core_usage": 0.4218153030668089,
|
| 56 |
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"die_usage": 0.4218153030668089,
|
| 57 |
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"num": 29517,
|
| 58 |
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"num_ratio": 0.9998645032349852,
|
| 59 |
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"pin_num": 84294,
|
| 60 |
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"pin_ratio": 0.990389134317135
|
| 61 |
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},
|
| 62 |
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"macros": {
|
| 63 |
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"area": 6554.996224,
|
| 64 |
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"area_ratio": 0.11795077237557132,
|
| 65 |
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"core_usage": 0.05640550222008055,
|
| 66 |
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"die_usage": 0.05640550222008055,
|
| 67 |
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"num": 4,
|
| 68 |
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"num_ratio": 0.00013549676501473527,
|
| 69 |
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"pin_num": 818,
|
| 70 |
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"pin_ratio": 0.009610865682864931
|
| 71 |
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},
|
| 72 |
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"total": {
|
| 73 |
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"area": 55574.0,
|
| 74 |
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"area_ratio": 1.0,
|
| 75 |
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"core_usage": 0.4782122328158882,
|
| 76 |
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"die_usage": 0.4782122328158882,
|
| 77 |
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"num": 29521,
|
| 78 |
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"num_ratio": 1.0,
|
| 79 |
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"pin_num": 85112,
|
| 80 |
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"pin_ratio": 1.0
|
| 81 |
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}
|
| 82 |
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},
|
| 83 |
+
"Layers": {
|
| 84 |
+
"cut_layers": [
|
| 85 |
+
{
|
| 86 |
+
"layer_name": "via1",
|
| 87 |
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"layer_order": 1,
|
| 88 |
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"via_num": 0,
|
| 89 |
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"via_ratio": 0.0
|
| 90 |
+
},
|
| 91 |
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{
|
| 92 |
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"layer_name": "via2",
|
| 93 |
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"layer_order": 3,
|
| 94 |
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"via_num": 0,
|
| 95 |
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"via_ratio": 0.0
|
| 96 |
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},
|
| 97 |
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{
|
| 98 |
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"layer_name": "via3",
|
| 99 |
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"layer_order": 5,
|
| 100 |
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"via_num": 0,
|
| 101 |
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"via_ratio": 0.0
|
| 102 |
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},
|
| 103 |
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{
|
| 104 |
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"layer_name": "via4",
|
| 105 |
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"layer_order": 7,
|
| 106 |
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"via_num": 0,
|
| 107 |
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"via_ratio": 0.0
|
| 108 |
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}
|
| 109 |
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],
|
| 110 |
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"num_layers": 9,
|
| 111 |
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"num_layers_cut": 4,
|
| 112 |
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"num_layers_routing": 5,
|
| 113 |
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"routing_layers": [
|
| 114 |
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{
|
| 115 |
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"layer_name": "metal1",
|
| 116 |
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"layer_order": 0,
|
| 117 |
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"patch_num": 0,
|
| 118 |
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"wire_len": 32002.109999999215,
|
| 119 |
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"wire_num": 95472,
|
| 120 |
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"wire_ratio": 0.7044889165333549
|
| 121 |
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},
|
| 122 |
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{
|
| 123 |
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"layer_name": "metal2",
|
| 124 |
+
"layer_order": 2,
|
| 125 |
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"patch_num": 0,
|
| 126 |
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"wire_len": 2235.4050000000084,
|
| 127 |
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"wire_num": 5078,
|
| 128 |
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"wire_ratio": 0.049209819179525625
|
| 129 |
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},
|
| 130 |
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{
|
| 131 |
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"layer_name": "metal3",
|
| 132 |
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"layer_order": 4,
|
| 133 |
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"patch_num": 0,
|
| 134 |
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"wire_len": 9766.329999999638,
|
| 135 |
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"wire_num": 12958,
|
| 136 |
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"wire_ratio": 0.21499430006981146
|
| 137 |
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},
|
| 138 |
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{
|
| 139 |
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"layer_name": "metal4",
|
| 140 |
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"layer_order": 6,
|
| 141 |
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"patch_num": 0,
|
| 142 |
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"wire_len": 972.5500000000022,
|
| 143 |
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"wire_num": 1164,
|
| 144 |
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"wire_ratio": 0.021409547550912508
|
| 145 |
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},
|
| 146 |
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{
|
| 147 |
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"layer_name": "metal5",
|
| 148 |
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"layer_order": 8,
|
| 149 |
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"patch_num": 0,
|
| 150 |
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"wire_len": 449.5999999999994,
|
| 151 |
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"wire_num": 557,
|
| 152 |
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"wire_ratio": 0.009897416666382426
|
| 153 |
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}
|
| 154 |
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]
|
| 155 |
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},
|
| 156 |
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"Macros": [
|
| 157 |
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{
|
| 158 |
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"#Pins": 100.0,
|
| 159 |
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"Area": 5286.39990234375,
|
| 160 |
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"Area Ratio": 0.04548927769064903,
|
| 161 |
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"Height": 64.0,
|
| 162 |
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"Lx": 110.80000305175781,
|
| 163 |
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"Ly": 0.0,
|
| 164 |
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"Orient": "N_R0",
|
| 165 |
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"Peri Bias": 0.0,
|
| 166 |
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"Type": "h4",
|
| 167 |
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"Width": 82.5999984741211
|
| 168 |
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},
|
| 169 |
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{
|
| 170 |
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"#Pins": 141.0,
|
| 171 |
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"Area": 13048.0009765625,
|
| 172 |
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"Area Ratio": 0.1122775673866272,
|
| 173 |
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"Height": 40.0,
|
| 174 |
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"Lx": 0.0,
|
| 175 |
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"Ly": 299.80499267578125,
|
| 176 |
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"Orient": "N_R0",
|
| 177 |
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"Peri Bias": 0.0,
|
| 178 |
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"Type": "h6",
|
| 179 |
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"Width": 326.20001220703125
|
| 180 |
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},
|
| 181 |
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{
|
| 182 |
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"#Pins": 392.0,
|
| 183 |
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"Area": 6048.0,
|
| 184 |
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"Area Ratio": 0.05204281955957413,
|
| 185 |
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"Height": 288.0,
|
| 186 |
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"Lx": 243.39999389648438,
|
| 187 |
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"Ly": 7.0,
|
| 188 |
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"Orient": "S_R180",
|
| 189 |
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"Peri Bias": 49.0,
|
| 190 |
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"Type": "h7",
|
| 191 |
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"Width": 21.0
|
| 192 |
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},
|
| 193 |
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{
|
| 194 |
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"#Pins": 185.0,
|
| 195 |
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"Area": 7942.39990234375,
|
| 196 |
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"Area Ratio": 0.06834406405687332,
|
| 197 |
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"Height": 292.0,
|
| 198 |
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"Lx": 314.3999938964844,
|
| 199 |
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"Ly": 3.0,
|
| 200 |
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"Orient": "N_R0",
|
| 201 |
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"Peri Bias": 0.03999999910593033,
|
| 202 |
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"Type": "h8",
|
| 203 |
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"Width": 27.200000762939453
|
| 204 |
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}
|
| 205 |
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],
|
| 206 |
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"Macros Statis": {
|
| 207 |
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"Channel Pin Util": 0.007308017670833725,
|
| 208 |
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"Channel Util": 0.14843561766426874,
|
| 209 |
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"Max Continuous White Space Ratio": 0.491546630859375
|
| 210 |
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},
|
| 211 |
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"Nets": {
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| 212 |
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"num_clock": 0,
|
| 213 |
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"num_patch": 0,
|
| 214 |
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"num_pins": 85473,
|
| 215 |
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"num_segment": 115229,
|
| 216 |
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