Datasets:

shailja
/

Verilog_GitHub

Modalities:

Text

Formats:

csv

Size:

100K - 1M

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Datasets

pandas

License:

Dataset card Viewer Files Files and versions Community

Verilog_GitHub

Commit History

Update duckdb index files

21cc5da

parquet-converter commited on Sep 4, 2023

Update parquet files

106c92e

parquet-converter commited on Sep 4, 2023

Update duckdb index files

9ad1f48

parquet-converter commited on Aug 30, 2023

Update parquet files

2aca461

parquet-converter commited on Aug 17, 2023

Update duckdb index files

f086582

parquet-converter commited on Aug 4, 2023

Update parquet files

0051bec

parquet-converter commited on Jun 6, 2023

Update parquet files

faea96c

parquet-converter commited on May 4, 2023

Update parquet files

78b80b4

parquet-converter commited on Apr 29, 2023

Update parquet files

9007d73

parquet-converter commited on Jan 20, 2023

initial commit

bbc7768

shailja commited on Dec 19, 2022

Commit History

Update duckdb index files 21cc5da

Update parquet files 106c92e

Update duckdb index files 9ad1f48

Update parquet files 2aca461

Update duckdb index files f086582

Update parquet files 0051bec

Update parquet files faea96c

Update parquet files 78b80b4

Update parquet files 9007d73

initial commit bbc7768