Talk:Verilog

message: I think the binary constant example is incorrect.  As I am not an expert, I have not changed the page, but I am asking the question.  
I believe 4'b1010 is binary 1010, 4 bits wide, decimal value 10.  
207.212.81.42 23:40, 7 February 2006 (UTC)
thread_title:  Is constant section correct? 

message: This page has too many god damn examples. We need a conscise summary, not a list of examples that give, by and large, an incomplete understanding of the language. Fresheneesz 07:04, 19 October 2006 (UTC)
thread_title: Too many examples

message: The Overview section states that HDLs differ from programming languages in part because
:HDLs add the concept of concurrency, which is parallel execution of multiple statements in explicitly specified threads...
That isn't really accurate, and seems to completely neglect programming languages like Ada, Java, occam, and Erlang that provide direct support for concurrency. --Allan McInnes (talk) 01:56, 28 June 2009 (UTC)
replies: text: It's been a couple of days with no response, so I've been bold and edited the problematic sentence to remove mention of concurrency. --Allan McInnes (talk) 22:29, 29 June 2009 (UTC)
thread_title:  Concurrency? 

message: PLI was never deprecated, the only deprecated stuff were its Access (ACC) and task/function (TF) components which are now supported withing VPI.
It is more accurate to state that PLI is now based entirely on VPI routines, but VPI still is considered a component of PLI.
This is what is said on IEEE-1364-2005  — Preceding unsigned comment added by Asuarez80 (talk • contribs) 17:55, 7 August 2012 (UTC)
thread_title:  VPI is still part of PLI. 

message: I noticed that the latest version displayed in the infobox is IEEE 1364-2005. In fact, IEEE 1800-2009 is a combination of both IEEE 1394-2005 (Verilog) and IEEE 1800-2005 (SystemVerilog). Should the information in the infobox updated? AlexHe34 (talk) 14:30, 15 August 2012 (UTC)
thread_title:  Latest version 

message: The use of the programming language infobox in this article is strange, since Verilog is obviously not a programming language. The characterization of Verilog as a structured programming language is quite inaccurate as to what Verilog is. While there are procedural constructs in Verilog that could be described as being "like" the structured programming paradigm (if one reduces and ignores the facts), the majority of Verilog cannot be distorted to fit that characterization. Should that infobox simply not be used, or is it sufficiently important that some sort of infobox be present? If the latter is the case, a new infobox template specifically for hardware description and verification languages should be created and used instead. AZ1199 (talk) 11:18, 3 February 2016 (UTC)
thread_title:  Use of the programming language infobox 

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thread_title:  External links modified 

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message: Either the first example is wrong, or it needs more explanation:
1. If you call the module with:
   reset = true [posedge] & clock = true [posedge] -> reset only
You'd expect this condition to result in a reset and a clock.
2. If the hardware precludes the possibility of both clock and reset being posedge, the text should explain this, or the programmer ought to have commented on this to indicate it is not an error.
197.99.45.157 (talk) 05:30, 10 January 2019 (UTC)
replies: text: A real piece of hardware would not give reset with clock at the same time. There is a setup/hold requirement between the two with a real flop.  In fact it is often a policy in a system to remove active reset prior to starting clocks. 73.71.182.25 (talk) 11:51, 5 April 2022 (UTC)
thread_title: Problems with first example