Talk:PDP-8

message: Sounds like a case of bad memory to me. But he did say "if i remember correctly" (or something like that). I guess he didn't... RTC 06:55 Nov 5, 2002 (UTC)
I have a problem with this article.  There's a lot of technical language that is not explained.  What is a "word of memory", for instance?
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I've now defined what a word of memory is, and will go back and re-read the entire article as time permits. In the best Wikipedia fashion, everyone else, of course, is also welcome to pitch in!
Atlant 13:14, 6 Dec 2004 (UTC)
thread_title:  Bad memory? 

message: Does anyone know the list price of the PDP-8 in 1965 dollars? How did the price change through the 1970's? (kradak (talk) 17:41, 13 May 2011 (UTC)
thread_title: Still operating?

message: I found this in Bell and Newell. Since I am an old guy I actually had to use a PDP-8 while in grad school (mid '70's). We were forced to use it in the same course that used Bell and Newell. All that is said in the article is true. You really did have to flip switches to input programs. And the little incandescent lights danced across the front panel; there you hoped to find your "output". A hundred students had to sign up in 15 minute slots to use the damn thing. It was a great day when we were allowed to use the tape reader.
 
MQ <0:11> is where to find/put the multiplier quotient
SC <0:4> is the Shift Counter
The instruction set of this beast:
: mqa ; put MQ register contents into accumulator
: sca ; put SC register contets into accumulator
: mql ; put accumulator into MQ, clear accumulator
: muy ; multiply
: dvi ; divide
: nmi ; normalize (without studying this more I can't tell exactly what this means)
: shl ; shift left
: shr ; shift right
: lsr ; logical shift right
There are a few more specifics around the registers, overflow, logic etc. in Bell and Newell. wvbaileyWvbailey 18:24, 23 October 2006 (UTC)
thread_title: Optional "Extended Arithmetic Element" EAE 

message: I removed the pair of sections debating the PDP-8's legacy in terms of accumulators. Accumulators have been around since the dawn of computing. See the 1947 quote in the accumulator article history section. ENIAC had 20 accumulators; the IBM 701 series had a single accumulator. The entire contents is unsourced WP:Original research (The one source given  is a mirror of the Wikipedia Digital Equipment Corporation article!). --agr (talk) 11:37, 14 April 2008 (UTC)
thread_title:  Removal of accumulator debate 

message: I have a question on the memory management unit (I forget its name ...) and interrupts. On the event of a interrupt, is the instruction field (is that what it's called? the x86 equivalent is the codesegment I suppose) set to zero so that the effective call is to location 0000 in field 0? Wilsonsamm (talk) 03:21, 22 November 2008 (UTC)
replies: text: When an interrupt occurs the contents of PC are placed into location 0 and execution then starts at location 0001. So the jump is to location 1 with the return location stuffed into location 0000. This is how subroutines are called in general. On a JSR the return address is stuffed into the subroutine address and execution starts at the next address. When the ISR is done the interrupt on instruction ION is immediately followed by an indirect jump through location 0000, which resumes the program. The ION instruction delays enabling of the interrupt for 1 instruction cycle so that an interrupt that occurs during interrupt processing does not interfere with correct return out of the interrupt. Note that the ISR is responsible for identifying the interrupt source since there are no vectored interrupts on the PDP-8. Kd4ttc (talk) 04:39, 13 November 2020 (UTC)

text: Well, we have a PDP-8/I here with 8K. So unless I'm dreaming, we have living proof sitting on the floor. :-) /bqt@softjar.se 178.83.31.218 (talk) 10:02, 31 October 2010 (UTC)
thread_title:  Memory 

message: The article is wrong in that it claims the new extended memory on the 8/A used the accumulator instead of instructions to address the memory fields. In reality, you still used the instructions. The CDF/CIF instructions were extended with two more bits, and slightly altered, in order to address up to 40(8) fields, instead of the 10(8) fields in the original design. /bqt@softjar.se 178.83.31.218 (talk) 10:02, 31 October 2010 (UTC)
thread_title:  8/A extended memory 

message: The BSW instruction needs to be corrected a little. BSW was first available on the 8/E, and is not available on earlier machines. The opcode is 7002 though (setting the rotate two bits, without setting any of the rotate direction bits, which previously was pointless). /bqt@softjar.se 178.83.31.218 (talk) 10:13, 31 October 2010 (UTC)
thread_title:  BSW 

message: Did all PDP-8's have those two registers, or were they only in some implementations?  Should the "register set" diagrams include non-architected, non-programmer-visible (even to the OS programmer) registers only present in some implementations? Guy Harris (talk) 05:52, 22 October 2013 (UTC)
replies: text: Discussion of internal aspects of the PDP-8 should be outside the scope of the article.  Certainly by the time of the microprogrammed/emulated PDP-8s, there were no such discrete registers and this argues against their inclusion in the diagram, which is not specific to models.  But in the text, the current revision lists those two registers to make the point that their re-use at different points in the instruction cycle was a cost-reducing innovation of the early models. Spike-from-NH (talk) 13:55, 22 October 2013 (UTC)
thread_title:  MBR and MAR in the register diagram? 

message: Enthusiasts have created entire PDP-8s using single FPGA devices. makes it sound surprising that the PDP-8 would fit in an FPGA, but today the Cray-1 fits in an FPGA that isn't even the high-end FPGA family. Specifically, it fits in the Xilinx Spartan 3E-1600.  (I have to actually try this out someday.) Gah4 (talk) 20:52, 19 September 2016 (UTC)
thread_title:  FPGA