Talk:Burroughs Medium Systems

message: I've a fair recollection of B3500/B3700 1973-1976, Assembler, COBOL, MCP4.2 and MCPV (at a debugging level) - if there's interest in trying to document those here then I'll happily lend a hand.
I note the manuals at http://www.bitsavers.org/pdf/burroughs/B2500_B3500/ --JohnHarris 23:24, 28 June 2006 (UTC)

message: Don't know whether this is of any interest, but I've just noticed that somebody's accumulating medium-system and V-series info at http://vseries.lurndal.org/doku.php, including a simulator. MarkMLl (talk) 10:49, 8 December 2013 (UTC)
replies: text: That would be Scott. He was one of the MCP programmers on the V series machines. He coded a fair part of the final MCP version of the final V-Series internal architecture. Loren.wilton (talk) 03:02, 17 October 2014 (UTC)
thread_title:  V-series emulator 

message: Reading this article, it seems to have been written by someone that had not much more than a cursory knowledge of the architecture, and was picking pieces out of a history book. Rather than try to rewrite the article I'll leave a few notes here. Perhaps someone will expand on them someday.
The history of Medium systems goes back to the history of computers at Burroughs Corporation. Originally Burroughs bout out Electrodata Corporation in 1956, forming Burroughs Electrodata Division, Or Burroughs EDD as it said on the furniture asset tags. The original machines were vacuum tube machines, which had a 10 digit word size and which had an optional floating point unit that would operate on a floating point number with a 2 digit exponent and an 8 digit mantissa. These were largely used for scientific processing originally, but also got into payment and accounting systems as their usefulness was recognized.
Around 1960 Burroughs brought out the B5000, which became the B5500 by the time it was released and working properly. This was a second-generation (discrete transistor) scientific machine, designed to implement the new Algol-60 language. It also had Fortran and COBOL-60 compilers and some others, but it was primarily an Algol machine, was quite large for the day, and was aimed at scientific processing. It was also too expensive for many people that would have wanted to use a computer for business applications, though some did use it.
Shortly thereafter Burroughs released the B300/B500 series of systems. These were small machines that were targeted for the same market as the contemporary IBM 1401 systems. These machines were arguably the start of Medium Systems, though at this time there was no such official split in the corporation. The B5500 continued to get larger and target scientific customers, the B200/300/500 systems (which had no operating system) targeted small business customers such as data processing service bureaus, utility companies (such as telephone and electric companies) and the like.
It was soon realized that an operating system would be beneficial for a business-oriented machine, but it also might be a very big step for many existing and prospective computer users. The B2000 system design started in the early 1960s with the goal of making a medium-sized business machine targeted directly at the then fairly new COBOL-1960 (also known as COBOL-60) language. To make it widely acceptable it would come with or without an operating system, at customer option. It would also have an easy to use assembler language, as many people were used to writing business applications in assembler, and could have been intimidated by the ideal of learning to use a compiler. (The 1960s were a very different world from today.) 
In due time the B2000 became the B2500/B3500 series before it was released. The B2500 was physically exactly the same processor as the B3500, but came with an additional clock divider card to slow it down. The B3500 system clock ran at 2 MHZ. The B2500 could be sold at any one of about 10 different slower clock speeds, but so far as I know only a few initial 500KC systems were sold, and all the rest ran at 1 MHz, half the speed of the B3500. The B2500 memory and I/O peripherals were also limited compared to the B3500, but this was simply due to different packaging and sales matrix constraints. 
The smallest B3500 system required three cabinets, whereas by combining the part of a memory cabinet with part of an I/O control cabinet, the B2500 could be produced in two cabinets. The single memory-I/O cabinet could hold one 30KB core memory module and five large-size I/O channels. As there could only be one of these combined cabinets, it set the maximum expansion size for the system. The B3500 on the other hand could have two memory cabinets with five memory modules in each cabinet, and two I/O cabinets with ten I/O channels (5 small and 5 large) in each cabinet, making a 5 cabinet system when fully expanded.
The B2500/B3500 systems could have many kinds of I/O peripherals connected, and you could have various numbers of any of the peripheral types, making them more flexible than many of the competing systems of the era. Available peripheral controls included paper tape reader, paper tape punch, card reader, card punch, console keyboard/printer (Teletype Model KSR-33), line printers (several kinds), multiple tape listers, check reader-sorters, several types of tape drives, and several types of disk drives. There were also I/O controls to handle serial data communication and telephone answering systems. You could have up to 40 different serial data communications lines on a B3500 system. Each datacomm line could handle 30 or more terminals simultaneously using a poll/select line control protocol.
A typical B3500 system of the era might have had 180KD of memory (90 KB), 4-10 tape drives, a card reader, a card punch, two printers, and several hundred megabytes of disk storage. Such a system in the 1960s would have filled about 2500 square feet - a 50 x 50 foot square room. This would have been a typical general-purpose system such as used by a school district. A banking system would have about the same peripheral complement as above, but in addition about 10 datacomm phone lines connecting the teller terminals at all of the branch banks, and a check reader-sorter.
Originally the B2500/B3500 was released with a choice of a basic program loader, known as the BCP or Basic Control Program, and the much more capable Master Control Program. It is not known if any BCP-equipped systems were actually installed. The BCP existed, but may never have been purchased. It is certain that by 1970 there were no users of the BCP, and the field support staff could not recall having ever received a trouble report on it. All users by then were using some version of the MCP.
It is a common but incorrect belief that there was only one MCP for Medium systems, and it evolved over time. While it is true that the MCPs evolved over time, there were actually quite a few completely different versions over the years. What might confuse people is that while there were different operating systems, they all appeared to be very similar to the users, and they would all run the same programs. For the most part, you could compile a program once on any Medium System machine, and then run that program on that or any other medium system machine. This is pretty much what people are used to these days with PCs; but in the 1960s you generally compiled and linked a program on a particular machine, and it would only run on that machine. If the OS was upgraded, you had to recompile your program. Burroughs was at the time almost unique in not requiring that.
The first MCP came with the first machines. It had about five different variations. These were all compiled from the same source code, but conditional compilation directives were used to drop out pieces of the code base to make the various versions. The different versions was not a marketing gimic, a user could run any version of the MCP he wanted to that would fit on his machine. But memory and disk were both very expensive in those days, so a user would run the physically smallest MCP version that would provide the features he needed. CP14 was the smallest version, and was intended for B2500 systems. It would happily run up to 4 programs at once on a 40KD (20KB) system with only 1 MB of disk. It only required 14KD (7KB) for its own use. Larger versions (CP40, CP56, MCP1, and MCP2) added features like support for the datacomm or reader-sorter hardware, and ability to run up to 20 programs at once.
In the early 1970s the B4700 system was released. Like many Burroughs systems, this had started out with a lower number when it was originally conceived; in this case it was originally intended to be the B4500. This machine ran at 4 MHz rather than 1 or 2, and could have up to 1MD (500KB) of memory. The peripheral capabilities were unchanged, but the faster processor and memory allowed up to 4 reader-sorters on a single machine, rather than the previous limit of one. This represented a huge cost and space savings for large banks and financial processing centers.
The B4700 also introduced the floating-point accumulator, and several new instructions in the basic instruction set. Previously floating-point arithmetic was a processor option, and it was done in memory, much like normal integer decimal arithmetic. The in-memory floating point format had a two-digit exponent (giving a range of +-99) and could have a mantissa size of anywhere from 1 to 100 digits. The Fortran compiler used an 8 digit mantissa for single precision and a 16 digit mantissa for double precision. Note that unlike most more modern systems, the exponent size did not get larger when going from single to double precision. Also note that the memory footprint for double precision was not exactly twice the size of single precision, 18 digits for double vs. 10 digits for single.
On the B4700, the accumulator was always present, and could hold a single or double precision floating point number, or an 8 digit plus sign integer. It had the usual four math floating-point instructions, the same for treating the value as an integer, and additionally had conversion instructions from integer to floating point and back. While the accumulator was faster than the floating point memory operations, there was only one accumulator and no other registers, limiting the speed that could be achieved, since one operand always had to be in memory.
Along with the B4700 came a completely new version of the MCP, written from scratch. This version was known as MCPV. Unlike its predecessors, it did not come in multiple compile versions. Instead, you could set options at run time that would make extra code modules memory-resident to handle additional features. It could run up to 80 programs at once, and could handle the full 1MD of available memory. 
The B4700, while being a huge improvement over the B3500, used the same logic family and had the same basic processor design. The next machine would use a completely new logic family, and be greatly redesigned internally, while still adhering to much of the same basic processor design. It would have a completely new and much larger I/O subsystem using new I/O controls, while still having an adapter that allowed the use of the older I/O subsystem. (The I/O subsystem represented a huge investment for a user, often many times the cost of the basic processor complex itself. Many users would upgrade to a new processor while keeping most or all of their existing I/O controls and peripheral devices.)
Shortly after the release of the B4700, the Medium Systems Software department undertook the design of a completely new MCP. This was to be the MS3 MCP. While intended for a new hardware platform, it would run on the B4700, would be written in a high-level language rather than an assembler, would take half the space, and be twice as fast. That was an aggressive set of goals that came to characterize the design goals for a number of Medium System projects over the years. After consuming several hundred man-years of development work, it got to the point where it could demonstrate basic capabilities that were about 1% of the speed of the current MCP, while requiring all of the memory on a full-sized 1MD B4700 system just for a small part of the MCP itself. After a management change, the project was quietly swept into the corner and forgotten.
The next machine was known internally in the Pasadena Plant as the MS2, or "Medium System 2". This machine was developed in the mid to late 1970s, and it is indicative of the thinking of the time that it was considered system design number 2, even though it was really the third generation of Medium Systems. Externally this machine came to be known as the B4800. Unique up to that time, the internal number of B4800 remained correct by the time of field release. 
The B4800 was implemented in BCML or Burroughs Current Mode Logic. This was similar to ECL, but lacking the emitter followers, so all chips had a fanout of 1. Because of this design feature, a very large amount of the processor space was allocated to "fanout cards" that had multiple-output AND and OR gates that would allow a single signal to be routed to multiple inputs.
The B4800 was originally intended to be used with the all-new MS3 version of the MCP, written from scratch, and for the first time coded in a high-level language rather than assembler. The MS2 was developed approximately in parallel with the MS3 MCP. However, due to slips in the MS3 project, the MS2 hardware was ready before the MCP. As a result, it was decided to make an interim MCP for the MS2 system, based off of the current MCP source code. The MS3 MCP had already been announced to the field, and was known externally as MCP6. The new MCP, which had to support a completely new I/O subsystem and redesigned memory management system, became known as MCP/V2. 
Because the MS3 MCP would not be available in time, some of the capabilities of the hardware were changed slightly to make it easier to make an interim MCP using the old technology. The maximum memory, which had been designed to be 4MD, and some small changes made to the I/O subsystem. The nee I/O subsystem could handle up to 80 channels; the previous systems had all been limited to 20 channels. The MS2 system also ran at 8 MHz, twice as fast as the B4700. Or rather it had been intended to run at 8 MHz. Because of the fanout problem mentioned above and the resulting wire lengths, the 8 MHz crystal had to be replaced with a 7.66 MHz crystal, slowing the machine down just enough that it would operate reliably.
After the B4800 came several different machines. These all used new hardware technology, often mixes of HCMOS, ECL, TTL, and Schottky TTL. The first machine was intended as an interim gap filler and nothing more. This was the B2800. It used a standard B4700 processor with a brand-new CMOS IOP (I/O Processor). Instead of the aging I/O controls the B4700 used, this used the new "DLP" (Data Link Processor(tm)) controls used on the B4800. It also had a memory made using DRAM chips, rather than the static RAM chips used in all previous machines (including the B4800). Because of the DRAM design, it was slightly slower than the 4MHz clock would have indicated; every so often a processor cycle had to be held off to complete a DRAM refresh cycle. The processor still believed it had static memory, so could not work around the refresh cycles.
Next came the B2900/B3900 processors. This was a completely new processor design for Medium Systems, using completely new design methods. The processor was made up of about five independent modules which operates in parallel, but ran on their own clocks, at different clock rates. One module would fetch an instruction from memory, decode it, and issue commands to the other modules. The memory fetch module would read the operands from memory. These would be routed across backplane busses to the logical processor or the arithmetic processor, which was waiting for the inputs to appear. The output data from these modules went over a third bus to the memory write module. The operation done and condition codes were sent back from the various processing modules to the manager module, which would then deal with branch instructions itself, and finally issue the next instruction to the other modules. If this sounds overly complex, it was. Intended to be faster than the MS2, it ended up being slower than the B4700. The B3900 was the first model released, a slowed-down version known as the B2900 was released the following year.
All machines up to the B2900/B3900 had had a 4-digit (16 bit) memory word size. Since memory was addressable on any 4 bit (digit) boundary, this word size was rarely of any importance. The main way it showed up was in the MVW (Move Words) instruction, which moved data in 4-digit chunks that were word aligned.
The B3900 family increased this word size to 8 digits. This happened to be the size of the index registers (which were actually memory locations) and several other control registers. Much of the internal processing was done in 8 digit chunks in this system, whereas they had been done one digit or one byte at a time in previous systems. Thus the B3900 had the potential to be considerably faster than previous systems, even at the same clock rate. If it had not been from the overhead costs of all of the modules synchronizing with each other to execute each instruction, the machine might have been faster.
After the B2900/B3900 design came the B4900 design. This was a rather more traditional processor design, without all of the asynchronous modules. However, the word size was increased to 10 digits (5 bytes) and the processor, which was largely microcoded, did a great deal of work a "word" at a time. This did end up making the B4900 about twice as fast as the B4800, which had been the high-end processor for some time up to that point.
While the B4900 was being designed, the Software group was again designing a completely new MCP. This one would also be written in a high-level language rather than assembler, would be capable of handling a multi-processor machine, and have many other new features. The B4900 had been designed with a number of capabilities to handle what people thought this new MCP would require.
The new MCP would work with a completely new machine architecture, at the operating system level. At the user program level, existing programs would still run, not aware that they were on a new machine. However new programs could be written and compiled to take advantage of new capabilities of the machine. The machine would dynamically switch the instruction set and addressing modes based on what code module was currently on the processor.
A machine that could run the new MCP would not be able to run the old MCP, and vice versa. But hardware could be made, since it had to switch operating modes anyway, such that the hardware, and some new microcode, could change how the machine worked.
And so it was with the B4900. The B4900 microcode was compatible with the same MCP that ran all of the other machines existing at the time: the B4800, B2800, B2900, and B3900. But by replacing the microcode (and adding a few wires to the backplane) the B4900 could  become a V340 -- the first of the new machines. By adding an additional board, the processor could become a dual processor, which was the V380.
About the time the B4900 was released, and knowing the V300 series was around the corner, Pasadena started work on the V500. This was a very large ECL machine that was inherently a dual processor, and was 4 to 5 times as fast as a V340. The original design called for a dual processor module that was about the size of a large table. You could add a second processor box to the end with a bus coupler between them, and have a 4 processor system. (This was known internally as the "freight train", since it was about 14 feet long.)  The V500 was released in several versions, but never as more than a 2 processor module. 
About this time the corporate politics were leaning very heavily against Medium Systems existence. Small Systems (which, like Large Systems, had all originated in the Burroughs Pasadena Plant, and then moved elsewhere) had just been killed by corporate edict, and the final machine, which was still in design, was moved to Pasadena for completion. Pasadena was a long way from Blue Bell, but Tredifferin (east coast home of Large Systems) was only two miles down the same road. The writing was on the wall and obvious to all. Pasadena had time to turn out one more system, the V400, before it was shut down. Support was then moved to the Mission Viejo (west coast Large Systems) plant. Support for V Systems machines ended on Feb 29, 2000, having been extended from the original support termination date of Jan 1, 2000, due to customer concerns that something might go wrong in the date routines due to the leap-year in 2000.
Loren.wilton (talk) 05:30, 17 October 2014 (UTC)
thread_title:  Some right, some wrong, much rather confused