Talk:IBM POWER

message: :The following discussion is an archived debate of the proposal. Please do not modify it. Subsequent comments should be made in a new section on the talk page. No further edits should be made to this section. 
The result of the debate was no consensus. -- tariqabjotu (joturner) 02:13, 6 August 2006 (UTC)
thread_title: Rename proposed to "IBM POWER architecture"

message: This article includes quite a lot of errors, is incomplete and badly structured. I think it needs some heavy lifting to get it right.
Things like:
* Belatrix was not the project name from which POWER, RSC, POWER2, P2SC and POWER3 sprung
>>>>POWER1 has been moved to {america project}, and RSC was not even listed yet
* PowerPC 620 and 970 was not a part of the Amazon project
>>>> PowerPC 620 {instruction set 64-bit PowerPC v0.x)
>>>>IBM's contract to APPLE/MOTOROLA was to supple three referance designs {601,603,604)
>>>>Amazon project was to design a 64-bit processor capable of being used in a multi-processor{64<amazon} workstation or server environment using (AS/400 and AIX) {instruction set 64-bit "PowerPC AS" v0.x}, PowerPC 620 was the working prototype for RS64
** PowerPC 970 is a part of the GigaProcessor project (its codname being GP-UL)
>>>>PowerPC 970 is derived from work done in the "amazon" project RS64 [970 notequal POWER4]
>>>>POWER4 is derived from work done in "amazon" RS64 [but they are not equal]
** PowerPC 620 is a part of the original PowerPC project. There's no reason for it to be mentioned in this article.
>>>i'll mention it again IBM was to supply APPLE/MOTOROLA with three designs (601,603,604) with those designs apple/motorola should have been capable of making future PowerPC compatible Processors.
** PowerPC 630 was also a part of the original PowerPC project, but was later renamed POWER3, hence relevant
>>>>six time three 18 divided by 6{the day power3 release) hence the relevance POWER3 
* PowerPC 970 is not a POWER-processor (but a part of GP project, hence relevant)
>>>>>yes 970 does not equal POWER4, but {POWER4,POWER5,POWER6,POWER7} are in th "GP-project",why speculate {and the relavance you talk about i have no clue}
>>>>PowerPC970 is part of the 5th generation of the {64bit powerpc instructions set) , hence the relevants to G5 (the project code name G5)
** 970 is derived from POWER4, it is not a single core implementation of POWER4.
>>>>PowerPC 970 is derived from work done in the "amazon" project "RS64"
* Revolution is most likely not derived from Gekko in any significant respect.
>>>>well maybe the significance of it being based on PowerPC needs to be pointed out to you. 
* The PPE in CELL is an original design, not similar to POWER3 in any relevant respect.
>>>>{your reading speculations from PS3 about the pre-release of the CELL prosessor)
>>>well i beg you pardon but the PPE{instruction set 64-bit PowerPC AS v2.x), POWER3(instruction set POWER-32bit v?.x,PowerPC64bit v1.x,support for OS/400)
** Xbox360/Xenon consists of tripple PPE cores
>>>yea so whats you point "PPE" stands for PowerPC Processing Element
** Revolution is most like to use PPE too.
>>>>onther statment lashing out at the obvious
* The IBM and Xilinx project is PowerPC based, not relevant to this article
>>>>The article is about IBM'S "POWER Architecture", which PowerPC-32bit is a subset of POWER, which later becomes a subset RS64
* CRS-1 is a PowerPC design, not relevant to this article (but the PowerPC article)
>>>>that (PowerPC article 98% wrong}
* POWER1 had a single chip implementation, the RSC.
>>>thank for pointing this out, but its called the RISC Single Chip, and this was the reason APPLE started talking to IBM about using RSC, because MOTO's new 88000 was not compatible with [68020,68030,68040,68060,and i think there was an 68080) so apple was going to be forced to rewrite there code one way or the other, and the performance of RSC were out-standing,  {(PowerPC was a modification/based on RSC}
** RAD6000 (manufactured by BAE Systems) is a radiation hardened variant of RSC which powered the computers onboard the Mars rovers (general interest)
>>>>>BEA is misspelled did you mean IBM, because IBM has been making extreme-condition microprocessors for military satalites for decades....
* PowerPC 630 came in a multi chip version 1995 and in a single chip package as POWER3 in 1997.
>>>>nice point but this is also the start of the transition to RS64, could be
developer-workstations
** POWER3-II was a copper chip
* POWER4 is more similar to RS64 than POWER3.
>>>>yea 
** POWER4+ reached 1.9 GHz
>>>ok
** There's no need to use subjective wording concerning the performance of POWER4
* POWER5 introduced eFUSEs.
** POWER5+ reached 2.1 GHz
** POWER5 is the reigning ruler of the TPC-C benchmark.
* POWER6 and beyond is most likely to be based on CELL
>>>here you seem to be confused CELL={PPE+SPE}
>>>POWER6 will most likly incorporate some {hopefully 12-per-core and 32-cores) SPE's
** The design goals for POWER6 will be massive multi core, very high frequency.
>>>these were the design goals of POWER4 and they were met.
** There's nothing other than very vague speculations of what POWER7 will be like. It's part of IBMs efforts to meet Darpa demands for a project due 2010.
>>>>that darpa project was started after POWER7
* Who licenses PowerPC is not relevant to this article
>>>then were is it relevent {pentium/opteron/mipps/huh?}
* The awards section needs to be completed and cleaned up
>>>>who are you? then complete it or wait for someone else too do it.
* There shoud be some explenation of the difference between POWER and Power (the latter is market speak for POWER, PowerPC and CELL).
>>>>because you make it so......
>>>>The "POWER Architecture"
>>consist of {POWER-32bit,PowerPC-32bit,PowerPC-64bit,PowerPC-64bit AS,IMAPI}and NOW plus (SPE)
>POWER1(POWER-32bit v1.x) AIX,BSD
>POWER2(POWER-32BIT v?.x,PowerPC-32bit v1.x) AIX,Linux
>POWER3(POWER-32bit v?.x,PowerPC-64bit v1.xx,SMP) AIX,Linux
>POWER4(POWER-32bit v?.x,PowerPC-32bit v1.xx,PowerPC-64bit AS v1.x,IMAPI v?.x,SMP,SMT) AIX,OS/400,Linux
>POWER5(POWER-32bit v?.x,PowerPC-64bit AS v2.x,IMAPI v?.x,SMP,SMT,field gate programable logic) AIX,Linux,OS/400
>CELL(PowerPC-64bit AS v2.0,SPE v1.x,SMP) Linux
>POWER6(POWER-32bit v?.x,PowerPC-64bit AS v?.x,IMAPI v?.x,SPE v?.x,SMP,SMT) AIX,OS/400,z/OS,Linux POWER6 meets the orginal goals of the Beltrix project....
>PowerPC601 (PowerPC-32bit v0.x)
>PowerPC603 (PowerPC-32bit v0.xx)
>PowerPC604 (PowerPC-32bit v1.x,SMP) AIX,WinNT4,Linux
>PowerPC620 (PowerPC-64bit v0.x,SMP) AIX,OS/400
>RSC OS/400
>RS64 (PowerPC-64bit AS v1.x,IMAPI v?.x,SMP) OS/400
>RS64II (PowerPC-64bit AS v?.x, IMAPI v?.x,SMP) OS/400
>RS64III (PowerPC-64bit AS v?.x,IMAPI v?.x,SMP,CGT) OS/400
>RS64IV (PowerPC-64bit AS v2.x,IMAPI v?.x,SMP,SMT) OS/400
>PowerPC970 (PowerPC-64bit AS v2.xx,SMP) Linux
>PowerPC970fx(PowerPC-64bit AS v2.01,SMP) Linux
Henriok 15:49, 21 December 2005 (UTC)
thread_title:  Clean up and correct 

message: Does IBM (or any other Power Architecture vendor) have any processors that still implement the POWER instructions not adopted into PowerPC, or still implement the quad-word load-and-store instructions that were the POWER2 instructions not later adopted into PowerPC, or otherwise maintain compatibility with POWER or POWER2, rather than PowerPC?  Or, to put it another way, is anybody implementing the original POWER instruction set, or the POWER2 instruction set, any more, or has it been completely replaced by PowerPC in modern processors?  (Does Amazon include any of the instructions from POWER or POWER2 not adopted into PowerPC?  Did any of the Amazon processors implement them?  Did POWER3, POWER4, or POWER5 implement them?) Is the "Power Architecture" now just another name for the PowerPC architecture? Guy Harris 11:19, 25 December 2005 (UTC)
replies: text: The way I've commonly seen the term "Power Architecture" used is to refer to various CPUs and cores derived from IBM's late PowerPC/POWER lineage.  Here, the term "architecture" is used for a family of similar IBM microprocessor designs, not necessarily as an indication of the ISA (though the ISAs are all similar as well).  In other words, IBM is using the phrase to refer to their implementations, not the PPC/POWER ISA.  Good job so far with the cleanups to this article, by the way. -- uberpenguin 23:08, 25 December 2005 (UTC)
thread_title:  Is "POWER" really just PowerPC in all modern processors? 

message: Why is POWER claimed to be a backronym? When the RS/6000s were announced, IBM was calling POWER by the Performance Optimized name. I just came across the announcement ad in the May 1990 issue of Scientific American.Wdonzelli 16:38, 26 October 2007 (UTC)
replies: text: Agreed.  The IBM RISC System/6000 processor: Hardware overview, IBM Journal of Research and Development, Volume 34, Number 1, Page 12 (1990)  This ref clearly defines: IBM POWER (Performance Optimization With Enhanced RISC)  It was published in January 1990.  --mikeu talk 13:48, 20 September 2009 (UTC)
thread_title:  Backronym? 

message: WACKYPEDIA'S growth is sloping off and it appears it is due to the bizarre antics of some of its editors.
For years, the INQ has been saying that within Wackypedia is a closed circle of editors with blinkered worldviews who are killing off real information.  —Preceding unsigned comment added by 205.127.250.153 (talk) 18:36, 6 August 2009 (UTC)
replies: text: I think Anonymous coward above is referring to us "closed circle editors" engaging an edit war to rid the article of unsourced, originally researched and off topic edits made by an anonymous and inexperienced contributor that's proven time and again unwilling and impossible to communicate with. Personally, I think that Above Complainer is the same person making these unlawful edits. -- Henriok (talk) 22:59, 6 August 2009 (UTC)
thread_title: wackypedia

message: Nowhere in the article does it state the endianess of the POWER architecture.  Is it simply always big-endian?  Are some versions bi-endian, although certain operating systems, e.g. AIX, always run them in a certain way, etc.  Even if the answer is simple, I'd expect it to be stated. -- Ralph Corderoy (talk) 09:55, 2 September 2010 (UTC)
replies: text: It is big. I can't find any source to back it up though, but it i recall correctly bi-endianess was an extetension to PowerPC and is not in any architecture. -- Henriok (talk) 15:49, 2 September 2010 (UTC)
thread_title:  Endianess 

message: In the subsection "The Bellatrix project" the page says:
:Sometime in the years of 1986-89, the Bellatrix project was started, with the premise of using the America architecture as the base for a common architecture that could host OS/390 for mainframe applications, OS/400 for multi-processor server transactional processing, and AIX for scientific applications.
:Sometime between the years of 1990-95, the project was considered overly ambitious and was canceled.
and in the subsection "The Amazon project" it says:
:In 1990 the Amazon project was started to create a common architecture that would host both AIX and OS/400. ... IBM management wanted them to use PowerPC, but they resisted, arguing that the existing 32/64-bit PowerPC instruction set would not enable a viable transition for OS/400 software and that the existing instruction set required extensions for the commercial applications on the AS/400.  Eventually, an extension to the PowerPC instruction set, called "Amazon", was developed.
:At the same time, the RS/6000 developers were broadly expanding their product line to include systems which spanned from low-end workstations, to mainframe competitor-large enterprise SMP systems, to clustered RS/6000-SP2 supercomputing systems. ... But mainframe and large clustered supercomputing systems required more performance and reliability, availability and serviceability features than processors designed for Apple Power Macs. ...
:The project to develop the first such processor was "Bellatrix" (the name of a star in the Orion constellation, also called the "Amazon Star").  The Bellatrix project was extremely ambitious in its pervasive use of self-timed & pulse based circuits and the EDA tools required to support this design strategy, and was eventually terminated.
The latter speaks of Bellatrix as the first processor planned for the Amazon project, speaks of the Amazon project as developing a common architecture for OS/400 and AIX but not for OS/390, and speaks of the entire Amazon project being started in 1990.  Either there were two Bellatrix projects or one or both of those statements is wrong.  I think Bellatrix was mentioned in Frank Soltis' "Inside the AS/400"; I'll dig my copy out of storage at some point (or, if the relevant pages are available on Google Books, check there) at some point and check. Guy Harris (talk) 07:33, 8 January 2012 (UTC)
thread_title:  Bellatrix project