Talk:DDR3 SDRAM

message: Wouldn't it be nice to add latency to the performance table?  —Preceding unsigned comment added by 203.206.169.155 (talk) 04:58, 9 October 2007 (UTC)
replies: text:  DDR4 better not come out for a while, because ddr2 came out not that long ago and now ddr3 is comming out, maybe intel is using the quick introduction to drive amd out of bussienes becuase they cant adopt a new memory that quickly.
Can we get a picture of this? Here's a nice shot but I don't know what the licensing is on it. I think this article would be much more effective with an image. --Anthony5429 18:25, 8 August 2006 (UTC)
thread_title:  Latency Table 

message: Please don't hide the important facts: instead of telling us that DDR3 "generally" costs "much" more than DDR2, either show us some price comparisons, or show us a range of percentages that relate DDR3 prices to DDR2 prices. SixSix (talk) 16:52, 25 December 2007 (UTC)
replies: text: I agree. Newer products always cost more than the old generations of its family. Saying it "generally costs more" isn't adding any material to the article.  —Preceding unsigned comment added by 24.87.7.27 (talk) 19:59, 4 January 2008 (UTC)
replies: text: "Newer products always cost more than the old generations of its family" <-- with ram in my experiance they do for a while, then they become about equal and finally the newer technology becomes cheaper (compare the price of DDR and DDR2 nowadays for an example of this last phase). Plugwash (talk) 22:12, 7 December 2009 (UTC)
thread_title:  Peacock terms in DDR3 vs. DDR2 pricing 

message: The overview section needs a rewrite to better accompany the excellent table underneath it. As you don't get a good sense of the sense of the functions of the internal sections of the device and their speeds and how they work together. Nothing too involved, but more educational!  MrESaulved! (talk) 04:33, 15 March 2008 (UTC)
thread_title:  re-write the Overview? 

message: If it is Quad data rate, instead of double, why isn't it called QDR? --WhiteDragon (talk) 16:51, 2 April 2008 (UTC)
thread_title:  Why not QDR 

message: Yes, this is correct.
If you compare DDR2-800MHz with DDR3-1600MHz, yes, the DDR3 one could get lower latency (MOst of time this is not true though).
However if you compare DDR2-800MHz with DDR3-800MHz, you will find DDR3 has much bigger latency. It has to be. Period.
Then go to the price point of view, DDR3 one is still much more expensive than DDR2 rigth now (Year of 2008)
NOTE: in Jedec spec, DDR3 CAS latency range from 5 to 11,  DDR2 Latency range from 2 to 6.
Please look at this article: 
The best available JEDEC standard DDR3 modules are DDR3-1333 at 9-9-9-24 timings... a far cry from the best low latency DDR2-1111 4-4-4-12 timings - not to mention the DDR2-1250 5-5-5-15 modules almost matching DDR3 in speeds with still much lower latencies and I think history will repeat itself. The DDR2 camp may currently be laughing at the feeble latency and performance of the low end DDR3-1066 9-9-9-24 modules, but then later realizing that DDR3-1333 may be the point of parity - and that DDR2's doom may well be sealed by DDR3-1600 and above.
----
Sorry, its wrong.
Example:
DDR2 with 800MHz at 5-5-5-15 means that one cycle (Memory Clock at 100MHz) need 1/100Mhz = 10ns. So multiplied by 5 you need to wait 50ns.
DDR3 with 1600MHz at 7-7-7-15 means that one cycle (Memory Clock at 200MHz) need 1/200MHz = 5ns. Multiplied by 7 equals 35ns.
Please think about [..] In order to increase the speeds of the memory modules with DDR3, it was also necessary to increase the latency of the modules. Latency is the amount of time that it takes for a memory module to process commands in a number of clock or command cycles. The higher the latency, the slower the memory will be at processing a command. [..]! Yeah, you're right, this statemant is totaly wrong. DDR3 has a lower latency than DDR2.
Yeah, it's the same story again as before with DDR/DDR2. All 3 (DDR, DDR2 and DDR3) have roughly the same latency, which is about 7 ns. (I'm not sure about the exact value). There was just recently a nice table in the german C't magazine, where this was clearly shown. (I can take a picture of it if anyone wants it).
--Xerces8 (talk) 11:42, 22 April 2008 (UTC)
thread_title:  Increased Latencies 

message: "The world record of 2580 MHz was reached at latency settings of 9-9-9-24 using a Corsair Dominator DDR3 memory module..." - as of July 31st, 2008Corsair Press Announcement.
Should speed records be in the article? And what about higher-than-standard products? (1800MHz, 200MHz sticks etc.) PluniAlmoni (talk) 15:59, 1 August 2008 (UTC)
thread_title:  Speed Record 

message: http://www.infoprix.ca/memoire-ram/tri.php?criteres=76-827&voirPlus=ok
have a looki here.  —Preceding unsigned comment added by 205.205.59.78 (talk) 18:41, 18 October 2008 (UTC)
replies: text: We only include official JEDEC specs... modules above this are considered OC and aren't standard. You may add it if you want, but there has to be a distinction.PluniAlmoni (talk) 23:15, 18 October 2008 (UTC)

text: Have you really read the article and especially the listed specifications? Then you would have read the information about the so-called "specs": "specs"inbetween or above the official ones are home-brewed ones that use the officialy specification only as orientation for naming. --Denniss (talk) 23:55, 22 November 2008 (UTC)
thread_title:  wtf ddr3-2000 exist and its not listed. 

message: Intro says latency is not improved over DDR2, but body says latencies have improved. If I've misphrased this and somehow this statement is true, it needs to be clarified because on its face it appears to be contradictory. Shadowjams (talk) 21:54, 17 February 2009 (UTC)
replies: text: I'll try to fix it.  CAS latency is still around 10 ns, although there are very small (few percent) incremental improvements.  The intro is pointing out that there has not been a latency improvement corresponding to the 2× bandwidth improvment.  71.41.210.146 (talk) 00:54, 2 March 2009 (UTC)
thread_title:  Contradict tag 

message: Why does Denniss continue to remove the faster DDR3 Ram table? This page does not belong to him, we all need to make compromises yet he won't. All the data in The table is accurate, real, and is labeled correctly, even as non-JEDEC standard ram. The table is very helpful, if Denniss wants it in another wiki he should make one and move it instead of deleting it completely.  —Preceding unsigned comment added by 121.79.14.175 (talk) 10:32, 10 March 2009 (UTC)
replies: text: I agree with removal of that table. The main reason is that the specification and ratings for non-standard modules are basically up to the manufacturer to decide (and essentially, they can print whatever they want). By definition, there is no standard to hold them against, and there is inevitably a variation from one manufacturer to the next for any given module. Since we aren't here to catalog products, completing this table is out of the question. The article already notes that non-standard modules exist; I think it is perfectly sufficient to leave it at that, though perhaps with an additional sentence to describe the highest purported speed reached. Ham Pastrami (talk) 05:13, 17 March 2009 (UTC)
thread_title:  DDR3 above JEDEC standard ram 

message: I found it humorous that the Extensions section was written by Olin Coles, who references a website discussing DDR3 written by...you guessed it, Olin Coles.  Not only that, but he uses the wrong acronym (It's called Extreme, not Extended).
I added a link to the XMP section under SPD timings, corrected the acronym, and replaced Olin's link with Intel's datasheet.  I think we can all agree that Intel is the better source here.  —Preceding unsigned comment added by 216.228.21.194 (talk) 23:16, 29 May 2009 (UTC)
thread_title:  Extensions section 

message: can anyone explain what exactly "rank" is? the DIMM population requirements of the intel xeon datasheet give the impression that lower rank is better but don't really explain what it is. Plugwash (talk) 00:25, 8 December 2009 (UTC)
replies: text: See DIMM#Ranking for a description. Coopman86 (talk) 09:15, 5 August 2010 (UTC)
thread_title:  rank 

message: Didn't most companies stop making DDR2 a while ago? fairly certain the lack of manufacturers has driven up the price a bit. 70.139.49.71 (talk) 21:49, 14 May 2010 (UTC)
thread_title:  Disadvantages compared with DDR2 

message: "Although DDR3 was launched in 2007, DDR3 sales are not expected to overtake DDR2 until the end of 2009, or possibly early 2010"  —Preceding unsigned comment added by Quelrod (talk • contribs) 06:22, 23 May 2010 (UTC)
thread_title:  it's not 2009 and it's not early 2010 anymore 

message: I feel this article is biased and authoritarian. For example "family of technologies" should be "group of devices" and the talk about damaging the DIMM or God forbid the motherboard too while trying to forcibly install DDR3 memories into old motherboads is annoying. Somebody fix it. Teemu Ruskeepää (talk) 16:29, 20 July 2010 (UTC)
replies: text: The tone of the two instances you have pointed out seem appropriate for an encyclopedic article. Also, the reference to the potential of damaging the equipment is accurate.  No changes should be required. Coopman86 (talk) 08:31, 2 August 2010 (UTC)
thread_title:  Inappropriate tone 

message: Essentially a technique where vendors drive consumers crazy.  —Preceding unsigned comment added by 96.26.126.7 (talk) 22:49, 25 December 2010 (UTC)
thread_title:  10600 vs. 10660 vs. 10666 

message: This article is out of date on DDR4. As best I can see, the new article is accurate so far, so this article's mention of DDR4 should probably be reviewed and brought into line with it. FT2 (Talk | email) 00:47, 26 April 2011 (UTC)
thread_title:  [[DDR4 SDRAM]] 

message: A user posted this same mistake else where that because of the lower voltage, ther eis less power consumed. This is simply not true: http://www.ocztechnology.com/drivers/DDR3_faq.pdf
I think an expert in the feild (not a nine year old in their mom's basement) should check these facts. In this pdf it explain vyer simply that it is running at a fast clock speed, which negates the benefitt of the lower voltage but overall uses more power. The chips are not resistors! It is not a basic p=v*i or any of the similiar relationships. For example, DDR3 has several power saving features DDR2 doesn't. Flipping the state of a bit is also not the same as power through a simple resitor, etc. I think the citation of an article from a maker of DDR3 is a better source than an OC mag article. Another Article: http://www.xbitlabs.com/articles/memory/display/ddr3_13.html 
Desktop memory:
According to kingston, 2Gb of DDR2 Pc8500 1066Mhz memory uses 1.584 watts per module
 http://www.valueram.com/datasheets/KHX8500D2_2G.pdf
Kingston has a 2Gb DDR3 1066MHz memory card which uses 1.890 watts.
 http://www.valueram.com/datasheets/KVR1066D3E7S_2G.pdf
:Please check your DDR3 module, that's actually an 18-chip ECC module. It's also very unreliable to compare rebrander-RAM due to the multiple chip and module types they use. --Denniss (talk) 22:45, 1 March 2012 (UTC)
thread_title:  Power Usage 

message: Can more info be added on memory damage and stability when using voltages above 1.575V? What kind of damage and instability is seen and how often? Wsmss (talk) 10:33, 10 January 2013 (UTC)
thread_title:  Damage 

message: I would like to verify that my understanding of this is correct. Taken at face value, the formula for calculating bandwidth (MT/s) implies that you can improve transfer rate merely by slowing the internal memory clock relative to the bus. So to understand how doing so actually results in improvement (e.g. over DDR2), is it correct to say this slowdown is inversely matched by an increase in parallelism? By my calculation, each DDR3 memory access would effectively (pre)fetch 64*8=512 bits, as opposed to DDR2 where only 64*4=256 bits would be fetched. Is this the case? Ham Pastrami (talk) 19:58, 19 July 2013 (UTC)
thread_title:  Burst implementation 

message: The section on "Power Consumption" should be deleted.  It is irrelevant and meaningless.  Let's look at the three sentences in the current version:
"Power consumption of individual SDRAM chips (or, by extension, DIMMs) varies based on many factors, including speed, type of usage, voltage, etc."  Well, yes, that is true of DD3 SDRAM, the topic of this page.  Or any memory.  Or any integrated circuit.  Or any semiconductor, for that matter.  I don't see why it needs to be mentioned specifically for DD3 SDRAM.
"Dell's Power Advisor calculates that 4 GB ECC DDR1333 RDIMMs use about 4 W each."  That tool tells you nothing about DD3 SDRAM.  It estimates power consumption depending on different system configurations, and you can't isolate the power used by memory.
"By contrast, a more modern mainstream desktop-oriented part 8 GB, DDR3/1600 DIMM, is rated at 2.58 W, despite being significantly faster."  I don't know why it is "a more modern mainstream desktop-oriented part," but it has no bearing on the discussion.  You cannot compare the estimate of the Dell tool with the datasheet of a DIMM.  — Preceding unsigned comment added by KZyGfthAK1bp (talk • contribs) 07:47, 13 November 2013 (UTC)
thread_title:  Power Consumption 

message: Currently, 8GB seems to be the maximum capacity available on the market, for both 240-pin DIMMs and 204-pin SO-DIMMs. Does anyone know whether higher density modules will be available in the future? Particularly I'm wondering whether a few years from now it will be possible to buy 16GB SO-DIMMs. Considering there aren't currently any 16GB DIMMs even though the DIMMs have twice the number of chips as the SO-DIMMs, I'm afraid the answer may be "no". The answer here says 256GB is the theoretical maximum. But that doesn't really say what the practical maximum will be. --Aij (talk) 05:51, 8 December 2013 (UTC)
replies: text: The maximum capacity of one standard-conform Dual Rank DDR3 LRDIMM is probably 128GB or 256GB? Use 16 2Gbx4=8Gb ICs as base (they are defined in the DDR3 JEDEC standard as 4096 columns (A0-A9, A11, A13) * 65536 rows * 8 internal banks), you get 16GB. Apply 'time four LRDIMM rank multiplication' (using CS2 and CS3 as additional address lines A16 and A17) and the CS0/CS1 as Dual Rank selector. By thus 3D stacking 8 of those ICs (x4 rank multiplication x2 Dual Rank), we have 128GB with room to spare on the module. If rank multiplication can be combined with the 'new' (addition to the standard) 3DS CID pin, 256 GB are possible for one Dual Rank DDR3 LRDIMM. Sebastian --188.195.196.160 (talk) 13:02, 25 July 2019 (UTC)
thread_title:  Maximum DIMM/SO-DIMM capacities? 

message: Could someone please mention on the article what the U stands for? DDR3L says its L is for low-voltage but its partner is not explained. --64.228.88.135 (talk) 22:45, 30 November 2014 (UTC)
thread_title: [[DDR3U]]

message: A part of the introduction reads "[...] with a high bandwidth ("double data rate") interface [...]". From my understanding, bandwidth and data rate are completely different things. High bandwidth describes the amount of wires next to each other, e.g. with 8 lines you can send a byte on every clock tick. In contrast, "double data rate" is a technique where you double the amount of ticks by using both the raising and the falling edge of the timer signal.
78.55.13.185 (talk) 12:11, 2 January 2015 (UTC)
thread_title:  Bandwidth and timing mixed up in the introduction 

message: Sorry if this question looks dumb, but i'm deeply intrigued by this: Why the notch is aligned to the right in DDR and DDR2, but to the left on DDR3?
As far as I know there's no easy way of distinguishing where pin 1 is, so why not align all notches to the same side?
I cannot find information about this issue elsewhere.
--LatinSuD (talk) 15:03, 7 April 2015 (UTC)
thread_title:  Notch on the left vs notch on the right 

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thread_title:  External links modified 

message: gibibits is not a real word at least in computers. it needs to be replaced by the correct word which i believe i gigabytes. please get it fixed.84.212.73.96 (talk) 23:19, 9 July 2016 (UTC)
thread_title:  this article needs work 

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thread_title:  External links modified 

message: One of the main technological advances of DDR memory is clock frequency multiplying and the use of both edges of a clock signal. Thus when we talk about clocks, it is imperative that we use consistent terms. Here is a sampling of inconsistent terminology in this article relating to clocks:
Within one paragraph with no definitions of these clocks:
* “memory clock speed (in MHz)”
* “memory clock rate”
* “bus clock”
* “memory clock frequency”
More later:
* “I/O clock” (Is this the memory clock or the bus clock mentioned earlier or a newly mentioned clock?)
* “units of clock cycles” (Which clock? Memory clock, bus clock, or I/O clock?)
* “I/O bus clock cycles” (Is the “I/O bus clock” the same thing as the I/O clock, or is it the “bus clock”? Or is this a fourth clock being introduced?)
* “÷ clock frequency” (Which clock frequency?)
* “DRAM cell array clock” (Which clock is this? A fifth clock?)
* “CL – CAS Latency clock cycles” (Is this a sixth CAS latency clock?)
* “tRCD – Clock cycles” (Which clock?)
If there are official JEDEC terms for these clocks, this article should use them consistently. As I understand it, there are two clocks: The reference clock on the clock pins of the memory device(s) and the internal clock of the memory device(s). The internal clock frequency is four times the reference clock and derived from the reference clock. Since there are only two clocks, there should be two terms used consistently for those clocks throughout the article.  — Preceding unsigned comment added by 209.145.84.194 (talk) 13:02, 2 November 2017 (UTC)
thread_title:  Consistent Clock Terms 

message: There is a move discussion in progress on Talk:Synchronous dynamic random-access memory which affects this page. Please participate on that page and not in this talk page section. Thank you.  —RMCD bot 19:15, 14 February 2019 (UTC)
thread_title:  Move discussion in progress 

message: "Because the hertz is a measure of cycles per second, and no signal cycles more often than every other transfer, describing the transfer rate in units of MHz is technically incorrect, although very common. It is also misleading because various memory timings are given in units of clock cycles, which are half the speed of data transfers."
hertz is not "a measure of cycles per second". Hz ("hertz") is the SI unit for frequency, e.g. "cycles per second". Also, "no signal cycles more often than every other transfer" makes no sense either. What does that mean? What is "no signal"? What is "every other transfer"? I would try to correct the paragraph, but I have no idea what the author is trying to say.  — Preceding unsigned comment added by 72.134.142.138 (talk) 22:58, 30 March 2024 (UTC)
thread_title:  This paragraph makes no sense