Talk:Intel 8086

message: I corrected the '1989' introduction year to 1978. It seems that somebody wrote wrong information.
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THERE IS MUCH MORE INFO INCORRECT HERE!
The 8086 CPU was NEVER used in the IBM XT. https://en.wikipedia.org/wiki/Intel_8088 the CP/M machines used the 8086 CPU. The IBM XT in fact always had the 8088 CPU, the 8086 CPU is MUCH faster, but IBM won from CP/M, due to having standard expansion slots (BUS), CP/M machines all had their own unique disk format, you had conversion programs but software working on one brand, often did not support other brands. The IBM and all the clones had compatible DISKS and COMPATIBLE expansion cards. While no perfect compatibility in the early IBM/CLONE days, this soon changed and all hard and software became fully interchangeable. 
8086 CPU can never work on a IBM XT machine since it had an 8 bit BUS and the 8086 has a 16 bit BUS interface. Those EARLY IBM clones that had compatibility issue's with IBM, sometimes used the 8086 CPU, often making them outperform IBM XT being 2x faster.
But 2x a little...+ compatibility issue's..... the compatibility between hard and software was more beneficial to users so the 8088 CPU won the market for years until the first 286 CPU's that had full compatibility with the 8088 CPU hit the market!
IBM should have adopted the 8086 CPU, gaining 2x performance and making them compatible with the 8086 clones, But IBM didn't care about the speed. They had the marked and the software, still if they would have done that.... the 8086 is almost as fast as the 286. And we would had have it 4 years earlier, but IBM did NEVER bother with the 8086.  — Preceding unsigned comment added by 217.103.36.185 (talk) 11:11, 25 August 2019 (UTC)
thread_title:  Incorrect information 

message: AMD created this processor type too. It has number P8086-1 has a AMD logo and also (C) Intel 1978. I can make a picture of the chip and add it to the article.
AMD did not create this processor but they did second-source it i.e. manufacture it under licence from Intel because Intel could not manufacture enough itself. Intel are the sole designers of the original 8086 processor. --ToaneeM (talk) 09:15, 15 November 2016 (UTC)
thread_title:  Also by AMD 

message: :The 8086 is a 16-bit microprocessor chip designed by Intel in 1978, which gave rise to the x86 architecture. Shortly after, the Intel 8088 was introduced with an external 8-bit bus, allowing the use of cheap chipsets. It was based on the design of the 8080 and 8085 (it was assembly language source-compatible with the 8080) with a similar register set
Does the final sentence refer to the 8088 or the 8086? At first glance, it continues the info on the 8088, but upon consideration, it seems more likely to refer to the 8086. Is this correct? It's not too clear.
Fourohfour 15:15, 9 October 2005 (UTC)
replies: text: It refers to both, 8086 and 8088 are almost the same processor, except that 8086 has 16 bit external data bus and the 8088 has 8 bit external data bus and some very very small diferences. both where based on 8080's design. --200.11.242.33 17:20, 18 October 2005 (UTC)

text: The 8086 was not "designed around 8 bit memory" (however 8088 was), but each byte has its own address (like in 8-bit processors). Therfore 220 bytes and/or 16-bit words can be directly addressed by both chips; the latter are partially overlapping however, as they can be "unaligned", i.e. stored at any byte-address. /HenkeB 20:11, 21 May 2007 (UTC)

text: But what's the confusing part of this? Andy Dingley (talk) 01:26, 30 May 2017 (UTC)
replies: text: The 8086 was designed for byte addressable 16 bit wide memory. That is, with the ability to separately write-enable upper and lower bytes of 1 6 bit words. Gah4 (talk) 23:15, 25 March 2020 (UTC)
thread_title:  Please clarify 

message: is this the first "pc" microprocessor?  I think so, in which case it should be noted, although I expected to find a mention to the first, whether it's this or a second one. —The preceding unsigned comment was added by  81.182.77.84 (talk • contribs) .
: The first IBM PC used an Intel 8088, which is (as far as I know) effectively a slightly cut-down 8086 with an 8-bit external data bus (although internally still 16-bit). So that fact should probably be noted in the article. Fourohfour 18:27, 10 March 2006 (UTC)
replies: text: You're confusing things here. When it talks about "memory" it means RAM. Hard drives are different, they are I/O devices and the processor communicates with them via programmed input/output (PIO) or DMA. The 20-bit / 1Mbyte limitation is only for RAM. Mystic Pixel 07:36, 8 June 2006 (UTC)
thread_title:  first pc? 

message: I don't think the two articles should be merged. After all, the one talks about the 8086 itself while the other about the general architecture
my_generation 20:06 UTC, 30 September 2006
I think merging the articles is a good idea.  The Intel 8086 set the standard for microprocessor architecture. Look at the Intel 8086 user manual (if you can find it on eBay or Amazon) and you'll see the information that's included in both of these articles.  It would be easier to have all that information in just one.  In answer to the above disagreement, you can't describe the 8086 without describing its architecture.
: There's nothing wrong with duplicating information that's already in the manual, but Microprocessor 8086 is poorly written and misnamed. An encyclopedia article isn't going to explain how to program a µP and theoretical details are out of place here. Is there anything in particular you think should be moved to Intel 8086? Or perhaps remove the duplicate information and give Microprocessor 8086 a name which is clearer (or at least grammatical)? I'd like to remove that page and just have it redirect. Potatoswatter 06:46, 21 November 2006 (UTC)
replies: text: I second what Potatoswatter said. (I thought the 8086 manual was available, but it doesn't seem to be. That's really weird, the 80186 manual is all over the place. Hmm.) Mystic Pixel 05:10, 22 November 2006 (UTC)
thread_title:  Disagree 

message: This comment was in the "bugs" section: Processors remaining with original 1979 markings are quite rare; some people consider them collector's items.
This didn't seem to be related to a bug, so I moved it here. - furrykef (Talk at me) 06:38, 25 November 2006 (UTC)
replies: text: It was referring to the previous statement that such processors were sold with a bug. I'm putting it back. Potatoswatter 15:04, 25 November 2006 (UTC)
replies: text:  What exactly was the bug that was in the processor? More information could be given than just a "Severe interrupt bug". --SteelersFan UK06 03:10, 8 February 2007 (UTC)
replies: text:  Think there are/were three(?) interrupt-related bugs: (1) updating `ss:sp` needs to be written in two consecutive cycles [with interrupts disabled], otherwise an interrupt could use the stack in an unpredictable location—therefore writing to `ss` should disable interrupts for the following instruction, except it didn't.   (2) interrupt with a restartable string instruction would cause a second prefix to be forgotten: eg. `ES REP STOSB`, would continue as `REP STOSB` or `REP ES STOSB` would continue as `ES STOSB`.  (3) interrupt-storm with `REP` + string instruction would continuously restart from the first micro-op, and therefore never make any progress (=apparent hang).  —Sladen (talk) 06:14, 28 March 2021 (UTC)
thread_title:  Not a bug? 

message: The Intel manuals (published 1986/87) I have use the name iAPX 86 for the 8086, iAPX 186 for the 80186 etc. Why was this? Amazon lists an example here http://www.amazon.com/iAPX-186-188-users-manual/dp/083593036X John a s (talk) 23:04, 6 February 2008 (UTC)
thread_title:  iAPX 86/88 

message: The article says:
:According to Morse et al., the designers of the 8086 considered using a shift of eight bits instead of four, which would have given the processor a 16-megabyte address space.
It seems some manufacturers of 80186-like processors for embedded systems have later done exactly this.
That could perhaps be mentioned in the "Subsequent expansion" section if reliable secondary sources can be found.
So far, I've found only manufacturer-controlled or unreliable material.
Paradigm Systems sells a C++ compiler for "24-bit extended mode address space (16MB)" and lists supported processors from several manufacturers:
* Genesis Microchip: I can't find any model number for a processor of theirs supporting this mode.  Later bought by STMicroelectronics.
* Lantronix: DSTni processors, spun off to Grid Connect.  DSTni-LX Data Book says the processor samples pin PIO31 on reset to select 20-bit or 24-bit addresses.  DSTni-EX User Guide calls the 4-bit shift "compatible mode" and the 8-bit shift "enhanced mode".
* Pixelworks: ImageProcessor system-on-a-chip, perhaps including the 80186-compatible microprocessor in PW164. Pixelworks licensed an 80C186 core from VAutomation but only 20-bit addressing is mentioned there.
* RDC Semiconductor: R2010, always 8-bit shift.
* ARC International: acquired VAutomation, whose Turbo186 core supported a 256-byte paragraph size.
85.23.32.64 (talk) 23:52, 11 July 2009 (UTC)
replies: text: Interesting, please feel free to add some of this to the article (at least for my part, I've written around 60-70 percent of it, as it stands). /HenkeB  —Preceding unsigned comment added by 83.255.36.148 (talk) 19:40, 3 November 2009 (UTC)

text: The RDC R2010 is RISC, not x86-compatible Лъчезар☭共产主义万岁★ 17:51, 14 August 2011 (UTC)
thread_title:  Embedded processors with 256-byte paragraphs 

message: Can anyone provide a reference to an official source from where these timings are taken? The datasheets given at the end of the article present only external bus timings (memory read/write is 5 clocks) but doesn't list any other information about the internal logic and ALUs. Thank you. bungalo (talk) 10:26, 26 April 2010 (UTC)
replies: text: One of these 5 cycles in the timing diagrams is a fully optional wait state, so the basic memory access cycle is 4 clock cycles in the 8086. 83.255.38.70 (talk) 09:42, 27 April 2010 (UTC)
thread_title:  Instruction timing 

message: Moved from user talk page...article discussions belong on article talk pages
May I ask you again
What is wrong with a data sheet or a masm manual as a ref? Can you get a better source?
I don't get it! What are you trying to say? "Only the web exist" or something? 83.255.38.96 (talk) 06:08, 3 November 2010 (UTC)
replies: text: The problem is that "You could look it up somewhere" isn't a valid reference style and tells the reader nothing about where to find a specific relevant description of the instruction timing cycles. Find a book with a publisher and an ISBN, and a page number for a table of instruction cycle times.  I'd cite my Intel data book if I could, but right now it's stored away and I won't have it unpacked for weeks.  Telling the reader to "look it up in some manual you've never heard of" is lazy and very nearly insulting to the reader, who probably is familiar with the idea of finding relevant literature anyway and doesn't need some patronizing Wikieditor to tell him the bleeding obvious. This is NOT a difficult fact to cite, there must have been at least 3 books printed in the  history of the world that actually list instruction cycle timing  for the 8086 and all we need is ONE ISBN/author/publisher/date/page number citation to validate this table.  --Wtshymanski (talk) 13:07, 3 November 2010 (UTC)
replies: text: Taken from the MASM 5.0 reference manual; numbers were also included in early 8086 and 8088 datasheets. That's a pretty poor citation. Does this golden manual have a publisher, a date, you know, stuff like that?  Perhaps even an ISBN? Any specific datasheets in mind? Publisher, date, etc. ? --Wtshymanski (talk) 16:10, 20 December 2010 (UTC)
replies: text:  Still not a citation. Go to the front page of whatever manual you're looking at, and copy down here the name of the editor or author, the full name of the manual, it's edition number if any, the copyright date, the publisher, the ISBN if it has one, and the pages on which these numbers allegedly appear.  Can you do that for us?  Hmm? --Wtshymanski (talk) 13:01, 21 December 2010 (UTC)
replies: text: There. Was that so hard?  Now when a vandal comes along and randomizes all those cycle timing numbers (if that hasn't happened already), someone can compare with *his* copy of the Microsoft MASM Manual 5th Edition and make the numbers consistent with the reference again. Page numbers are still needed. Its important to say *which* manufacturer's data sheets you're talknig about, too. Does an AMD part or Hitachi part have the same cycle count as the Intel part?  As long as we say *which* manufacturer we're talking about, we're ok. --Wtshymanski (talk) 15:29, 21 December 2010 (UTC)

text: If it was important enough for you to add it to the article, it was important enough to have a proper citation. Never say "of course" in an encyclopedia. How do we know the MASM manual is talking about the same part, stepping level, etc. ?  Call up your local public library and ask them for "the MASM reference manual, you know, like, 5.0 ? " and see how far you get with just that. Real encyclopedias don't need so many references because real encyclopedias have an editorial board and paid fact checkers.  Wikipedia relies on citations because we don't trust our editors to get anything right and so we rely on multiple persons to review any contributions. Wikipedia is sadly lacking in citations. Any numerical data should have a citation so that vandalism can be detected and reverted; you may have noticed once or twice an anon IP will change a single digit in a value and scurry off back under a rock, leaving a permanent error in the encyclopedia because no-one can find the original reference from whence the data came.    It's too bad you were inconvenienced with backing up a statement of fact...let's take all the references out of Wikipedia and rely on our anonymous editors to keep the tables right. --Wtshymanski (talk) 14:38, 22 December 2010 (UTC)
replies: text:  Any distance or perspective? Wikipedia is not supposed to be some kind of legal document, it's a free encyclopedia. Also, I find it peculiar how extremely concerned you seem to be with "vandals" when it was yourself that actually messed up the table – putting JMP and Jcc timings in N.A. columns. I corrected that (20 dec 11.01) and put that (damn) reference back. However, you kept on deleting that information, over and over. That style makes me sick and tired just by thinking of contributing any further to Wikipedia (and don't you call me "any slacker"). 83.255.43.80 (talk) 20:59, 22 December 2010 (UTC)

text: You don't get it, do you? I would never confuse this stunning display of erudite scholarship with that of a slacker. --Wtshymanski (talk) 22:49, 22 December 2010 (UTC)
replies: text: Looking at the Intel Component Data Catalog, 1980 edition, bearing Intel publication number AFN-01300A-1, which includes 8086/8086-2/8086-4 16-Bit HMOS Microprocessor data sheet, there's no listing of instruction cycle times for each opcode. Until a data sheet listing instruction cycle times can be found, I'm deleting the vague description since Intel itself doesn't seem to have published instruction cycles in their own data sheet. --Wtshymanski (talk) 06:07, 2 January 2011 (UTC)
replies: text:  The document we really want to cite is Intel 8086 family user's manual,October 1979, publication number 9800722-03. The bootleg copy on the Web gives instruction timing cycles in Table 2-21, pages 2-51 through 2-68 (starting in the non-OCR .pdf at page 66). The summary in this article leaves out a lot of details. --Wtshymanski (talk) 06:39, 2 January 2011 (UTC)
thread_title: What a valid citation looks like

message: The lowest rated clock speed was 5MHz for both the 8086 here and the 8088 (which is what most PCs used, the IBMs exclusively so).  Yes, the original IBM PC ran at 4.77MHz but that was a design choice: from memory it mapped quite well into the video timing signals although I admit I forget the details.  The chip itself was a 5MHz chip underclocked to the slower speed.  Datasheets for the two chips are available: 8086 and 8088: there are no chips slower than 5MHz described. Crispmuncher (talk) 04:05, 29 August 2012 (UTC)
replies: text: The IBM PC and many compatibles used a 14.31818 MHz clock source divided by 3 which is 4.77272 MHz. Even if 5 MHz was the slowest speed rated by Intel, many early PCs definitely ran at 4.77 MHz so listing that is correct. Asmpgmr (talk) 04:37, 29 August 2012 (UTC)
replies: text: The first PCs used 8088s, not 8086s, so that isn't relevant here in any case.  However, the template documentation at Template:Infobox CPU points out the "slowest" parameter refers to the lowest maximum clock, it does not address underclocking.  There probably is a minimum clock speed: I recall Intel making an explicit point about a fully static design for embedded 80186's but only much later, but that is probably on the order of 1MHz or less. Crispmuncher (talk) 04:55, 29 August 2012 (UTC)
replies: text: IBM PCs used the 8088. Many other companies used the 8086 and some ran their systems at 4.77 MHz just like companies did with 8088-based systems though many did not (8 MHz 8086 systems were common like the AT&T 6300 / Olivetti M24). Anyway I see no reason not to list 4.77 MHz as the minimum clock speed for both the 8086 and the 8088 since this usage was common because of PCs. Asmpgmr (talk) 15:48, 29 August 2012 (UTC)

text: The minimum clock rate for the HMOS 8086 is not quite as low as 1 MHz.  From the Intel 8086/8086-2/8086-1 datasheet, the maximum clock cycle time for all three speed grades (5 to 10 MHz max.) is 500 ns, which equals a minimum clock frequency of 2 MHz.  The fact that this is constant for all speed grades implies that it results from a stored-charge decay time which is independent of the factors that limit logic signal propagation time and thus maximum frequency.  As a CPU can often be overclocked a significant amount above its rated maximum frequency before it begins to actually malfunctions, it is probably also possible to "underclock" a CPU below the minimum frequency specified by the manufacturer before malfunctions actually occur, perhaps by a much larger percentage than it can be overclocked.  As far as I know, few people have tried this (outside the CPU design and engineering labs, where I'm sure it has been tried extensively).  108.16.203.38 (talk) 11:06, 9 October 2013 (UTC)
replies: text:  The point of this is not to list the minimum speed at which the chip would still work  (some development boards ran even slower, to make use of cheaper memory) but to cite the design speed of the first generation of the processor - 5MHz. This isn't the PC article, it's the 8086 article. Andy Dingley (talk) 15:59, 29 August 2012 (UTC)
replies: text:  Yes, good point, and the 8086 was used in lots of things besides PC and compatible desktop computers, including arcade game machines, space probes, and NASA STS (Space Shuttle) ground support equipment.  108.16.203.38 (talk) 11:06, 9 October 2013 (UTC)
thread_title:  Slowest clock speed 

message: :How to convert hexodecimal into decimal.
:Intel 8086 Memory Segmentation, page 8.
:Intel 8086 Datasheet.
:Intel 8086/8088 User Manual.
:1) 64KB of 2^20=1048576 RAM address is used for ES (Extra Data Segment), from address 70000(h) to address 7FFFF(h) (in hexodecimal). This is from 7 * 16^4 + 0 * 16^3 + 0 * 16^2 + 0 * 16^1 + 0 * 16^0 = 458752 to 7 * 16^4 + 15 * 16^3 + 15 * 16^2 + 15 * 16^1 + 15 * 16^0 = 458752+61440+3840+240+15=524287. 
:2) 64KB of 1MB RAM address is used for DS (Data Segment), from address 20000(h) to address 2FFFF(h). This is from 2*16^4=131072 to 2*16^4+15*16^3+15*16^2+15*16^1+15*16^0=131072+61440+3840+240+15=196607.
— Preceding unsigned comment added by Paraboloid01 (talk • contribs) 13:10, 1 November 2012 (UTC)
thread_title:  Something you should know or insert into article about memory segmentation 

message: Can someone provide information or reference to support this claim:
Compatible—and, in many cases, enhanced—versions were manufactured by Fujitsu, Harris/Intersil, OKI, Siemens AG, Texas Instruments, NEC, Mitsubishi, and AMD
What is an enhanced version? To me it is a version that has some additional software features. To best of my knowledge NEC was the only company that produced such enhanced 8086 version - its V30 processor. Harris and OKI (and later Intel) made a CMOS version - 80C86, it doesn't have any software enhancements. It appears to be a simple conversion from NMOS to CMOS logic technology.
Also I don't think Texas Instruments ever made 8086 clone (they were making 8080 though).
:I don't think "enhanced" means only software features must be improved.  That is thinking like a programmer, and a lot of people who work with CPUs aren't programmers, or aren't mainly programmers—including most of the engineers at Intel that design the CPUs!  Hardware enhancements could include lower power dissipation, more hardware interface flexibility (e.g. inbuilt 8288 bus controller logic), demultiplexed buses, higher output drive capability, and, as in the CMOS versions, more flexible clock rate (down to DC for CMOS).  If these aren't enhancements, what are they?  They aren't modifications, because they don't alter the basic capability, only extend it.
:Another hardware enhancement would be the addition of internal peripherals like an interrupt controller or DMA controller.  The interrupt controller might just be simple logic that connects a few separate interrupt pins each to specific interrupt levels, skipping the INTA cycle, or doing a dummy one, or doing a real one that uses a different interrupt vector table from the Intel-standard one used by main INTR interrupt pin.  Some added peripherals, such as a DMA controller or a programmable interrupt controller, would be visible to software, whereas the simple non-programmable interrupt controller described above would not be.
:Also, there could be hardware enhancements to the base CPU that could be visible to programmers.  Faster instruction execution would be one that would be visible to software, if it was timing-aware.  (If you program in a high-level language, then no, you can't see this, but you can if you programin assembly language.)  Caches and buffers, e.g. for data and instructions from memory, would also potentially have a software-visible effect on timing.  
108.16.203.38 (talk) 10:22, 9 October 2013 (UTC)
thread_title:  Enhanced clones 

message: There is no reason a computer designer could not equip an 8086/8088-based computer with a register port that would change the MN/MX pin, taking effect at the next reset.  (Changing the level of the pin while the CPU is running might have unpredictable and undocumented results.)  However, since other hardware needs to be coordinated to the MN/MX pin level, this would require other hardware to switch at the same time.  This would not normally be practical, and probably the only reasonable use for it would be hardware emulation of two or more different computer models based on the same CPU (such as the IBM PCjr, which uses the 8088 in minimum mode, and the IBM PC XT, which uses it in maximum mode).  It is even possible that the 8086/8088 does not respond to a change in the level of MN/MX after a hardware reset but only at power-up.  Even then, it is certainly possible to design hardware that will power down the CPU, switch MN/MX, wait an adequate amount of time, and power it back up.
108.16.203.38 (talk) 10:01, 9 October 2013 (UTC)
replies: text: There is a very good reason why it cannot be done - at least not easily.  Eight of the pins of the processor have different functions between MAX and MIN mode.  Since these are related to the bus control signals, it would be necessary to provide logic such that the 8288 bus controller was in circuit for the MAX mode and taken out of circuit for the MIN mode.  Since the purpose of the MIN mode is to save on that 8288 controller chip, there would be nothing to gain by having a switchable mode system as the 8288 would have to be present for the MAX mode of operation.  I B Wright (talk) 16:36, 7 March 2014 (UTC)

text: It's true that a system could change the MN/MX pin but it would require a lot of circuitry and effort. Not that I haunt the design offices of the world but I've never heard of a system that did want to do this. Were you thinking of including an observation about dynamically changing MN/MX? If so, I wouldn't. You could just as well build a system that changed the Vcc supply rail from 5V to 5.5V under software control or changed the clock from 4MHz to 5MHz but it's not a typical application or educational/insightful so it's not for the 8086 Wiki page. --ToaneeM (talk) 09:39, 15 November 2016 (UTC)
thread_title:  Variable MN/MX 

message: There is a recent edit regarding 7.16 MHz.  The 8086 and 8088 have unsymmetric clock requirements. At full speed, the clock should have a 33% duty cycle.  The 8284 generates this with a divide by three counter. One could run a 10MHz 8086 at 7.16MHz with a 50% clock.  Appropriate wait states would get the bus cycle down, if needed. Gah4 (talk) 03:26, 11 July 2018 (UTC)
thread_title:  7.16 MHz 

message: to my knowledge while you can't directly reference the memory locations at AX, CX or DX, BX is also used as an index register.  Should we have four leading zeros in front of it in the little register guide thing? Jethro 82 (talk) 00:35, 15 March 2019 (UTC)
replies: text: I was looking at BX today and implemented the four leading zeros. THEN I saw your wise comment. Obviously, I agree. AX, CX, and DX cannot be used as an index but BX can be used just like SI and DI. RastaKins (talk) 18:11, 25 December 2021 (UTC)
thread_title:  BX as index register 

message: The article says compact encoding inspired by 8-bit processors regarding one address and two address operations, I presume a reference to earlier 8 bit microprocessors. One address (accumulator), and two address (usually register based) processors go a long way back, many years before the earlier microprocessors, almost to the beginning of electronic computation. The 8-bit byte is commonly attributed to IBM S/360, a line of 32 bit (architecture) machines with byte addressable memory. In any case, optimal instruction coding has a long history that didn't start with 8 bit microprocessors. Gah4 (talk) 23:22, 7 December 2020 (UTC)
thread_title:  ''compact encoding inspired by 8-bit processors'' 

message: :Instructions were added to assist source code compilation of nested functions in the ALGOL-family of languages, including Pascal and PL/M. -- (in Intel_8086#The_first_x86_design)
This sentence doesn't say which instructions it is talking about. From my understanding, this could be about the enter and leave instructions (specifically the second argument of enter which is a direct way of referencing the lexical nesting level of the called function and helps with escaping variables), but these instructions were not in the first 8086 instruction set, they were introduced later according to X86_instruction_listings#Added_with_80186/80188. Is this a mistake? It is a very interesting information IMO but should it be moved to another section and rephrased to something like "Later x86 processors would add the enter/leave instructions to assist source code compilation of […]"? -- Dettorer (talk) 08:04, 15 May 2023 (UTC)
thread_title:  Instructions for nested functions 

message: The CVV of my debit card is 086. I love it! It reminds me of 8086 and my youth. Bretleduc (talk) 17:04, 24 November 2023 (UTC)
thread_title:  CVV 

message: The first, third, fifth, seventh and eighth paras of the history section, the first three and last L2 sections of the details section, are entirely devoid of references. The other parts are similarly scant with multiple unsourced paragraphs. Don’t remove the refimprove template until the referencing issues have been addressed. Cambial — foliar❧ 08:15, 4 June 2024 (UTC)
replies: text: Thank you for indicating what needs to be done. We usually see refimprove on articles that have sparse references. This article has 28 references and 37 links to those refs. Superficially, that seems adequate. With your posting above, we now know precisely where to improve the article. In the future, when placing a refimprove on an article with many refs, please add a comment describing what is lacking in the article so editors know what is needed and the criteria to remove the tag. RastaKins (talk) 14:03, 4 June 2024 (UTC)
replies: text: I agree that we usually see refimprove on articles that have sparse references, much like this one. In the future, don't remove maintenance categories until the issue is resolved, thanks. Cambial — foliar❧ 14:09, 4 June 2024 (UTC)
thread_title:  Refimprove