Talk:Microcode

message: ...because wrt one machine I know of, the Northern Telecom SL/1, microcode was supported by a deeper level of code called nanocode.
:Don't let the naming mislead you! Nanocode is just a special case of microcode - microcode in two levels - a similar approach was used in the 68000, for example. 83.255.43.76 (talk) 07:18, 24 September 2009 (UTC)
thread_title:  Changed "lowest" to "lower" 

message: Thanks this is a really good summery about microprogramming....if someone does not understand this and claims to be a computer engineer i recommend to switch your career.—The preceding unsigned comment was added by 142.150.27.42 (talk • contribs) 08:46, 31 October 2005  (UTC)
:If someone types in the above and can't even spell 'summary' or 'I' then I recommend you switch off your computer and immediately stop wasting the planet's ecological system.
:Note the above user was ostensibly accessing Wiki from the University of Toronto. Canada must therefore go back to the drawing boards if their students still can't spell or type. Sorry, Canada.] —The preceding unsigned comment was added by 62.1.163.85 (talk • contribs) .
::62.1.163.85, be sure to read WP:NPA.
::Atlant 22:30, 25 June 2006 (UTC)
thread_title:  Praise 

message: How does microprogram/microcode, specifically the VLIW/RISC section, compare to modern x86 CPU's? Like modern Pentium processors exposing a CISC instruction set but internally resembling more of a RISC processor? Fuzzbox, 29 June 2006
:The following discussion is an archived debate of the proposal. Please do not modify it. Subsequent comments should be made in a new section on the talk page. No further edits should be made to this section. 
The result of the debate was Move.  —Wknight94 (talk) 02:24, 5 August 2006 (UTC)
thread_title: Modern x86 processors

message: Needs more info on intel's recent advances in microarchitecture
:Do those advances in microarchitecture have anything to do with microcode?  (The fact that both words include the prefix "micro" does not indicate that microcode is involved in all aspects of microarchitecture.)  If not, perhaps this question should be asked on the Intel Core Microarchitecture talk page, not the talk page for the microcode page. Guy Harris 06:35, 28 August 2006 (UTC)
thread_title:  Intel Core Microarchitecture 

message: I was under the impression that all Intel and AMD processors, if they had microcode at all, had only read-only microcode.
So once the chip was made, it is impossible to "update" the microcode.
So what's this I hear about a "microcode update"
?
Do Intel processors have a writable microcode after all?
--75.37.227.177 04:36, 13 July 2007 (UTC)
replies: text: There are Intel x86 processors that have writable microcode  - the Intel P6 processors, for example, have it. Guy Harris 05:51, 13 July 2007 (UTC)
thread_title:  writable microcode 

message: The wording the microinstruction is often as wide as 50 or more bits is a bit awkward; both structurally and because the article later mentions a width of 108. I'd suggest the microinstruction is often as wide as 108 bits or the microinstruction is often wider than 50 bits. 
The microinstruction width on the 360/85, 370/165 and 370/168 was only 108 bits if there was no emulator feature installed; with a 7070, 7080 or 7090 emulator feature the width was larger. Shmuel (Seymour J.) Metz Username:Chatul (talk) 14:45, 13 July 2010 (UTC)
replies: text: Yes, you are right. Feel free to fix it. --Kubanczyk (talk) 09:35, 14 July 2010 (UTC)
replies: text: Done. Shmuel (Seymour J.) Metz Username:Chatul (talk) 20:59, 15 July 2010 (UTC)
thread_title:  Microinstruction width 

message: Would it be helpful to provide technical references for the micro instruction formats on some processors, or would that be TMI? I can probably track down the manual names and numbers for some of
 *IBM 360/40
 *IBM 360/50
 *IBM 360/65
 *IBM 370/145
 *IBM 370/155
 *IBM 370/165
 *RCA 601 Shmuel (Seymour J.) Metz Username:Chatul (talk) 14:51, 13 July 2010 (UTC)
thread_title:  Would references be helpful? 

message: "Microcode" and "RISC"  aren't, strictly speaking, complete opposites.  CISC and RISC are instruction set design philosophies; microcode and random logic/state machines are implementation techniques.  CISC processors have been implemented without microcode (IBM System/360 Model 75, GE-600 series and the Honeywell 6000 series) and largely in hardware with only some instructions implemented in microcode (later x86 processors) or in "millicode" (later IBM System/390 processors, z/Architecture processors).  RISC processors are largely implemented without microcode (please provide explicit references for claims to the contrary). Guy Harris (talk) 08:14, 25 August 2010 (UTC)
thread_title:  "Microcode vs. VLIW/RISC"? 

message: I'm surprised the 68K is not included in the discussion of horizontal and vertical microcode, as it uses a double layer microcode to map the possible control lines into a smaller index number into the much smaller number of unique control line patterns.
188.29.165.59 (talk) 20:29, 8 March 2015 (UTC)
thread_title:  68K 

message: I know of no IBM processor with horizontal microcode in which the micro-orders are not decoded.  Typically Read Only Storage (ROS) was expensive, and it was cost effective to have a minimal amount of encoding of, e.g., register selections, ALU function. Of course, vertical microcode has more extensive encoding. Note that the definition in practice does not match that coined by Wilkes. Shmuel (Seymour J.) Metz Username:Chatul (talk) 16:50, 28 May 2015 (UTC)
thread_title:  Decoding of horizontal micro-orders 

message: It looks like there's a conflict between one of the stated advantages and disadvantages of RISC:
* Advantage: Analysis shows complex instructions are rarely used, hence the machine resources devoted to them are largely wasted.
* Disadvantage: Non-RISC instructions inherently perform more work per instruction (on average), and are also normally highly encoded, so they enable smaller overall size of the same program, and thus better use of limited cache memories.
If complex instructions are rarely used in real-world code, then there shouldn't be much of a difference in the size of CISC code vs. RISC code.
One of these points needs to be altered, I think... They can't both, logically, be true...
Epitron (talk) 06:13, 19 April 2017 (UTC)
thread_title:  RISC vs. CISC inconsistency 

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thread_title:  External links modified (January 2018) 

message: When I click on the link in reference 2 (Fog, Agner), Malwarebytes reports "Website blocked due to a Trojan." Can anyone verify this?  — Preceding unsigned comment added by Paul C. Anagnostopoulos (talk • contribs) 01:10, 14 January 2020 (UTC)
replies: text: Is it still doing that?  It might just have been a false positive. Guy Harris (talk) 06:23, 24 May 2022 (UTC)
thread_title:  Possible malicious link in article 

message: There well be microcontrollers where the CPU is implemented using microcode, but if that's a sufficient reason to put this article into , that would also be sufficient reason to put this in , , and .
Or is the idea that, in some cases, a peripheral might have an embedded microcontroller, and the code in that microcontroller is referred to as microcode for the peripheral?  Guy Harris (talk) 06:21, 24 May 2022 (UTC)
thread_title:  Why is this in Category:Microcontrollers?