Talk:Magnetic-core memory

message: Does anyone know what type of ferrite material was used for the rings?  Common types are 43 material, 61 material, and 73 material.  75.164.242.189 (talk) 01:23, 13 April 2009 (UTC)
replies: text: I rather doubt that, given that ruby is not ferromagnetic let alone square-loop.  On the original question, those numbers you mentioned are ones commonly used for transformer type ferrite, which is linear (approximately) rather than square-loop.  Those ferrites have no memory properties and don't work in core memory at all. Paul Koning (talk) 15:21, 3 February 2023 (UTC)
thread_title: Type of Ferrite Material Used

message: Kudos to Sanders muc for contributing the core scans.  Would you be able to count the lines (and number of cores) in one direction so we could calculate the memory capacity in bits & bytes for the plane shown? It would give the article even more educational value if the readers were able to immediately compare core to semiconductor RAM chips in that parameter, I think. --Wernher 16:07, 2 May 2004 (UTC)
replies: text: Ok, I counted them. Its an array of 128x128 rings, totalling to 2 KiB. Is there, BTW, a way to get a caption under an image without the "thumb" option? Sanders muc 09:31, 3 May 2004 (UTC)
replies: text: Yes, I fixed it, at least temporarily. What I'd really like, for consistency, is a captioning scheme looking just like the thumb & caption scheme but without the thumb option. However, I haven't found this yet. --Wernher 20:17, 5 May 2004 (UTC)
replies: text:  "framed"? — Omegatron 13:54, 24 March 2007 (UTC)

text: I've recently been opening up and nondestructively measuring the core memories I have access to.  I've put the results on the web at http://www.cs.uiowa.edu/~jones/core/ if anyone's interested.  My oldest sample was from the early 1960s, with 1.96 square mm per bit and cores 1.96 mm outside diameter.  My newest is from a product designed in 1974 made in 1977, with 0.13 square mm per bit and cores 0.46 mm diameter.  If someone thinks I should upload any of the photos on that web site to Wikimedia Commons, just tell me which ones you think are worth it. Douglas W. Jones (talk) 19:26, 6 March 2019 (UTC)
thread_title: Core plane image

message: I would like to add this to Core Trivia:
*In Star Trek, computer memory devices are called Memory core, interestingly similar to Core memory.
But, it looks like a POV problem. Especially that I'd love to say how core and memory are being misused there... Now what do you think could be said here about the subject? And where could I criticize that misuse? :) --Arny 08:19, 23 October 2005 (UTC)
replies: text: I don't know if it belongs in trivia, but I've noticed - with the introduction of multiple processor Intel Core chips - that folks are starting to use the term "core" to refer to processors rather than memory.  E.g. webopedia entry.   Michael Daly 21:00, 14 January 2007 (UTC)
thread_title: Core in Star Trek

message: Could someone with the knowledge please explain the following section:
:Writing is similar in concept, but always consists of a "flip to 1" operation, relying on the memory already having been set to the 0 state in a previous read. If the core in question is to hold a 1, then the operation proceeds normally and the core flips to 1. However if the core is to instead hold a zero, a small amount of current is sent into the Inhibit line, enough to drop the combined field from the X, Y and Inhibit lines below the amount needed to make the flip. This leaves the core in the 0 state.
Is this section talking about normal writing or the "write-after-read cycle"? If it is normal writing, I makes no sense to me why you would just flip to 0 or 1. If it is the "write-after-read cycle" it makes much more sense, but I don't think that is clear from the text.
Bajsejohannes 18:45, 24 July 2007 (UTC)
replies: text: There is no "normal writing" as you refer to it. Core memory always operated on a "read/write cycle", where the write always followed a read - therefore the word was all 0 state when the write phase of the cycle began. If the data read was not needed, it was simply ignored. -- 205.175.225.22 (talk) 00:07, 30 January 2008 (UTC)
thread_title:  Writing to Core Memory 

message: * "Since modern semiconductor, random-access memories are usually volatile, older technology memories such as ferrite core continue to be used on spacecraft."  —Preceding unsigned comment added by Parallelized (talk • contribs) 23:07, 28 January 2008 (UTC)
thread_title:  Use of Ferrite Core Memory 

message: The memory speeds given in the article don't match the state of the art.  In 1964, CDC (in the 6600) has 1 microsecond cycle time core memory. Paul Koning (talk) 01:13, 24 March 2008 (UTC)
replies: text: Some other parameters differ, too.  Read/write current in that memory was 200 mA. Paul Koning (talk) 14:31, 10 April 2008 (UTC)
thread_title:  Speed 

message: I designed core memories from 1960 to the early 70s, and memories with early semiconductors, such as the Intel 1103.
Core sizes in my time went from 80mil (2mm) OD, down to 14mil. Various mixes of materials were used to get a good square loop and small amounts of Lithium were included in later cores. These Ferrites were very different from those used in transformers, but had commonality with mag-amp cores. In 1966 I designed a 16KB memory with 250nS access and 750nS cycle times, which was successfully manufactured for a number of years. In the UK these were known as "stores" rather than memories.
This memory used 22mil cores; X, Y, and Inhibit currents were about 400mA, and the sense output for a "1" was about 40mV peak. To establish the currents with 50nS rise times needed about 35V drive voltage, and the windings were treated as matched transmission lines to achieve clean waveshapes. Later smaller cores could use smaller currents, at the expense of a lower sense voltage.
Sensing was an art, as the signal was accompanied by a large common mode disturbance, and during a "0" write cycle a differential signal of at least a volt. It was necessary to sample the sense output at the right time to get the best signal to noise ratio.
Continual reading and writing a "1" caused the core to heat up due to hysteresis losses, reducing the operating tolerances.
A well designed memory with currents temperature compensated would work with currents varied over a range of +/-10%, although we would control them much tighter than this.
The cores did change shape very slightly when switched due to magnetostriction effects. Military memories were encapsulated to withstand shock and vibration, but the encapsulating medium had to be elastic to allow magnet-striction to happen, otherwise domain  reversal couldn't take place.(Epoxy was too rigid, silicones were preferred).
As semiconductors came in as a competing technology, the core memory exhibited "Sailing Ship Syndrome", as manufacturers managed to make them smaller, faster, and cheaper, with larger capacities. The Intel 1103 DRAM chip (1KBit) produced a system that was just inferior to the best core systems, but need a refresh system to update the volatile cells, requiring the memory to be interrupted for about 2% of the time.
4Kbit semiconductor memory chips sounded the deathknell of the ferrite core for most applications.Contributing factors were the complexity of the core memory drive and sense circuitry, and the size and complexity of the power supply systems.
CharlyGaul (talk) 19:25, 8 May 2009 (UTC)
thread_title:  A Core Memory Designer Tells it as it Was! 

message: It would be great to add a section on how the memory modules were made.   When I worked at ITL in the UK (formerly CTL), the story was that core memory was hand-woven by little old ladies in Wales who used to make lace before lacemaking became automated.  I think that's pretty fascinating... 76.195.252.202 (talk) 15:46, 24 July 2009 (UTC)
thread_title:  Manufacturing 

message: If I had forseen it, I would have saved so much of my old references for use on Wikipedia.  I have maintained machines that were amazing achievements at the time.  This article brings to mind one of them: a disk emulator device with a half a megabyte of core memory on a single card.  It was very large (I seem to remember about 2.5 feet by about a foot by nearly an inch thick), and was in fact two cards that sandwiched the cores.  One failed and we opened it, and the core area just looked like black cloth.  The card was 8 bit plus parity, so I was looking at an area with over 4.5 MILLION cores.  I wish I still had the documentation on that one.Murasaki66 (talk) 03:15, 4 September 2009 (UTC)
replies: text: The largest core memories I've run into are the ECS ("Extended Core Storage") on CDC 6000 series mainframes.  A max size ECS, such as was used on the University of Illinois PLATO system, was 2 million 60-bit words, so about 120 million cores.  Paul Koning (talk) 22:16, 21 January 2017 (UTC)
thread_title:  An old technician's lament 

message: It's odd to see those two images combined in the photo in the "Other forms of core memory" section.  While it is very attractive to combine an overview photo with a zoomed-in detail of a small piece, these are not the same core memory types.  The main photo is CDC 6000 memory, which has 5 (!) wires per core -- X, Y, two separate inhibit lines, and sense.  So while the close-up illustrates the "other forms" subject, the main image doesn't. Paul Koning (talk) 20:34, 8 May 2012 (UTC)
thread_title:  Strange combination of images 

message: In the developers sub-section of the History section of this article, it describes An Wang developing a core shift register of o(50) bits. ??? What does the o represent? Is this a typo or am I just misunderstanding the text? BlueScreen (talk) 09:47, 14 July 2013 (UTC)
replies: text: Perhaps "order of" -- an obscure way of saying "approximately". Paul Koning (talk) 22:23, 21 January 2017 (UTC)
thread_title:  An Wang's Core Shift Register 

message: This is an excellent article which doesn't require much technical knowledge to understand, apart from a basic knowledge of computers, and clearly explains everything until the end of the last paragraph in this section. 
"...For example, a value in memory could be read with post-increment almost as quickly as it could be read; the hardware simply incremented the value between the read phase and the write phase of a single memory cycle (perhaps signalling the memory controller to pause briefly in the middle of the cycle). This might be twice as fast as the process of obtaining the value with a read-write cycle, incrementing the value in some processor register, and then writing the new value with another read-write cycle."
Since the term "post-increment" is introduced without explanation and "incremented the value" doesn't state what "incrementing" means in this context, or what value is being incremented, I found this paragraph impenetrable. That also means I can't attempt to improve it myself. Chris.Bristol (talk) 07:29, 18 November 2016 (UTC)
thread_title: Reading and Writing

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thread_title:  External links modified 

message: I'm not a fan of the Feb 2, 2020 edits saying that core memory is part of magnetic logic which bridged the gap between vacuum tubes and semiconductors. Magnetic logic is considered distinct from core memory and magnetic logic "never achieved commercial importance"(ref: "Memories that Shaped an Industry", p41). IBM considered magnetic logic in 1957 but rejected it (p171). Looking at historical computers, there wasn't a gap between vacuum tubes and semiconductors that needed to be bridged; semiconductors (specifically diodes) were heavily used in vacuum tube computers (See 1961 1961 BRL report, for instance). Since the article's History section doesn't have any references and expresses a point of view I haven't seen expressed elsewhere, I'm going to call WP:OR on it.
KenShirriff (talk) 23:17, 20 April 2020 (UTC)
replies: text: I don't know much about electronics, but I think you are right.  Magnetic logic is also relevant.  It says that the Elliott 803 used magnetic core for some of its logic, but the 803 used transistors.  Magnetic logic was not a step between tubes and transistors.  Bubba73 You talkin' to me? 01:04, 21 April 2020 (UTC)
replies: text: Gordon Bell disagrees with you. Look above for comments by Bell concerning Viehe.  Stepho  talk  10:11, 21 April 2020 (UTC)
thread_title:  Not really related to magnetic logic 

message: This article is wrong when it states that Frederick Viehe patented magnetic core memory in 1947.  He merely applied for a patent at that time – as his patent shows: 
Viehe, Frederick W. "Memory transformer"
U.S. patent no. 2,992,414 (filed:  May 29, 1947 ; issued:  July 11, 1961)
https://pdfpiw.uspto.gov/.piw?docid=02992414
The distinction is important because – as the article correctly states – three other groups were working on the same form of memory at the same time.  And none of them were aware of Viehe's work … because patents are published whereas applications for patents are not published:
"Applications for patents, which are not published or issued as patents, are not generally open to the public, … "
https://www.uspto.gov/patents-getting-started/general-information-concerning-patents
Therefore the fact that Viehe had applied for a patent but had not yet received a patent is important because it explains how three teams of inventors could fail to know of Viehe's work.
VexorAbVikipædia (talk) 05:23, 11 September 2020 (UTC)
replies: text: The secondary source says "patented in 1947" and the article follows that. USPTO filings and documents are primary sources and almost impossible to be used as sources because of their frequent errors and the difficulty of interpreting them. Perhaps you can find some other secondary source that better explains the sequence of events. EEng 05:36, 11 September 2020 (UTC)
thread_title:  "Patented" vs. filing for a patent 

message: DRAM cost citation needed 
The cent per bit point is mentioned all over the place.
The best reference I can find is here in a piece by Gordon Moore, the founder of Intel.
https://www.jstor.org/stable/20013439?seq=12
2A00:23C6:CE0D:DD01:FC1C:D3C5:980A:335A (talk) 08:51, 13 November 2023 (UTC)
thread_title:  Cost of 1103