Talk:Register renaming

message: Initially I had thought that I could describe just the mechanics of renaming
without pipeline descriptions.  Didn't happen; those descriptions got large.
At some point I will move those two pipeline descriptions into their own pages,
like the Classic RISC Pipeline page.  Before I do that I'd like to find
better names for the renaming styles.
Better diagrams would be nice as well.  I haven't figured out how to make
them both compact and readable.
Finally, the introduction is a tough read.  It's easy to write something
short but it usually ends up either cryptic or wrong.  The current version
is cryptic.
Iain McClatchie
----
You removed the discussion of registers-for-speed and noted it (apparently) as a "factual error". I have to disagree. The growth in register count from ~3 in the 1970s to the hundreds in modern CPU's is specifically to take advantage of higher speed access, allowing one-cycle retiring. Perhaps I am misreading the check-in note, but if not I think it's reasonable to re-add the portion on performance.
Maury 23:55, 24 Feb 2004 (UTC)
thread_title: Renaming without pipeline descriptions

message: Wen-Mei Hwo, Yale Patt, Michael Shebanow, about 1985, describe R10k style renaming and checkpoint repair.
Jim Smith and Andrew Pleszkun, about 1986, describe ROB, history file, future file.
Add these paper references to this page.
Iain McClatchie 20:38, 2 May 2005 (UTC)
replies: text: Register renaming and instruction reordering are very intricately linked; without one, the other is entirely pointless. Kevin Baastalk 18:25, 23 February 2011 (UTC)

text: (though if you use transfer-triggered architecture, barrel processing, or just write the code right in the first place, both are entirely useless -- and a collosal waste of circuit area.) Kevin Baastalk 18:28, 23 February 2011 (UTC)

text: @Kevin_Baas said "Register renaming and instruction reordering are very intricately linked; without one, the other is entirely pointless."  This is a common misconception. Register renaming is useful even on microarchitectures that are in-order both wrt instruction start (issue) and completion (writeback). I will see if I can find a public non-trade-secret reference to such uarchs. A.Glew (talk) 01:04, 28 November 2018 (UTC)
thread_title:  Sources 

message: The description of a "history buffer" in this register renaming article sounds very different from the description of a "history buffer" in the branch predictor article.
Does one or the other of these articles need to be adjusted to give a correct description of a history buffer?
Or are there really two very different circuits (perhaps in different locations in the same CPU) that happen to have the name "history buffer"?
(Is there maybe some other phrase we could use for one or the other or both to distinguish them?)
--DavidCary (talk) 20:27, 10 December 2015 (UTC)
replies: text: Like any other discipline, computer architecture is full of terms that have multiple definitions that are disambiguated by context. The term "history buffer" is used both branch prediction and register renaming (among others). As such, there's no need to edit anything to give either topic exclusive use of the term. L9G45AT0 (talk) 03:39, 29 July 2016 (UTC)
thread_title:  history buffer 

message: It looks like some of this article is paraphrased from some of my comp.arch posts.  Sometimes just changing "I" to "Andy Glew". Thanks, but...
Probably there should be references to such material, either via the Internet Archive (which past experience shows wikipedia dislikes)
or possibly to publication in "Internet Nuggets" in Computer Architecture news.
The latter is more acceptable to pseudo-academics, although CAN is a non-refereed journal.  
Else wikipedia will inevitably remove such content.
--A.Glew (talk) 22:53, 27 November 2018 (UTC)
replies: text: If it's paraphrased, and a reference is made to a comp.arch post, that'll probably be acceptable to enough not to cause it to be Obviously Unreliable or whatever.  Using Template:Cite newsgroup, and pointing to Google Groups, would work; the fact that the template exists suggests that USENET isn't inherently an unreliable source. Guy Harris (talk) 00:57, 28 November 2018 (UTC)
thread_title:  comp.arch posts