Talk:Cray-1

message: The problem citing the 800 MFLOPS number for the X-MP (the Cray-1's lineage successor) is that this performance figure does NOT correspond to 1982 performance for a 2 processor (then available) X-MP; it more closely corresponds to 4 processor X-MPs on a "good" day which was not until a couple of years later.  The text has an impediance mismatch between machine performance and chronology.
--enm 26 Apr 2006 18:00 GMT
:The problem I see with this artical is that thier seems to be inconsistences in the speeds given for the cray-1 and apparently also thiers an accidental use of the acronym MIPS rather then MFLOPS (or megaflops). This article states that In 1975 Cray clammed that the speed was 80 MFLOPS and then give an un-named sorce credit for placed the speed of the Cray-1 at "138–250 MFLOPS". I visited Cray inc's web site and Cray inc claims today that the Cray-1's speed was 160 megaflops (not MIPS).[[ http://www.cray.com/about_cray/history.html]] 
:Now I have nrver read of seen any banchmarks for the Cray-1 giving speeds in MIPS and Cray inc. claims it's speed was 160 megaflops, and this artical says 160 MIPS so I think maybe the acronym MIPS was used by accident and ether MFLOPS or megaflops should of bin used instead. Using MIPS may confuse people in to thinking that MIPS and MFLOPS (or megaflops) mean the samething.
:But the article is quite clear on the difference: the theoretical performance was 2 instructions at 80 MHz which is 160 million instructions, or MIPS. Floating point operations were not one-cycle, nor could they be dispatched on any cycle, so the FP performance was slower, the 136 MFLOPs number. I don't know where the 80 MFLOPs number came from, it's wrong and I'm removing it. Maury 21:39, 28 November 2006 (UTC)
replies: text:  You say, "Floating point operations were not one-cycle, nor could they be dispatched on any cycle, so the FP performance was slower...."  Oh yeah???  That was the whole point of Cray's pipelined vector processors.  They yielded a result every clock cycle.  Why don't you stick to changing stuff you actually know about or understand!  Just because idiots designed the junk from the Intel 4004 family that is in your PC doesn't mean that all computer architects are idiots!!!  Doesn't anyone review changes that people make in Wikipedia anymore???  —Preceding unsigned comment added by 98.212.132.146 (talk) 15:48, 12 December 2010 (UTC)
replies: text:  I think you missed my point. The Cray had vector startup overhead, albeit much shorter than the STAR. That overhead means that single units could not retire one instruction per cycle, on average. But don't take my word for it, take Crays - look at Table III of their report on the machine. Note that a single FP multiply takes 60 clock cycles, and at 10,000 elements you're down to 3.7. That means overall performance will be significantly slower than the potential peak. Do you have a source from Cray that says otherwise? Maury Markowitz (talk) 02:57, 8 December 2017 (UTC)
thread_title:  speed 

message: Gjvo: That's really interesting. Can you provide more details? Mmernex 17:38, 22 May 2007 (UTC)
thread_title: comparison to 2006 ipod shuffle

message: http://www.tomshardware.com/2007/07/16/cpu_charts_2007/page36.html i think the second table shows relevant Mflops?--Teveten 07:07, 3 October 2007 (UTC)
thread_title: Comparison with modern pc prosessors

message: The first sentence of the history states:
:In the early 1974 Cray was working at Control Data on a new machine known as the CDC 8600, the logical successor to his earlier CDC 6600 and CDC 7600 designs.
I think that in [1974]] Cray was working at Cray Research and not at Control Data.
Later the history states:
:In 1972 the 8600 had reached a dead end.
and a little bit later (without stating a date):
:Cray left.
The article about the CDC 8600 states that:
:In 1972 Cray decided that he couldn't work under such conditions, and left CDC to form Cray Research.
The article about Cray Research states that:
:Cray Research, Inc. (CRI), was founded in 1972 by computer designer Seymour Cray.
So I guess the history should begin with:
:In the years 1968 to 1972 Cray was working at Control Data on a new machine known as the CDC 8600, the logical successor to his earlier CDC 6600 and CDC 7600 designs.
since the article about CDC 8600 states that:
:Development started in 1968
Therefore I will do the change. Glass Tomato 08:47, 2 November 2007 (UTC)
thread_title: History

message: I think the section on the Cray-1's circuitry, which always refers to the IC's and signals as "high power", should probably mostly be talking in terms of "ECL" or "differential" or "ECL differential" levels.
It is true that ECL and its differential signaling are a specific design point chosen to allow high speed, high noise immunity, and they happen to use comparatively high power and twisted pair wiring. And these are all important details the article currently brings out. But calling it "high power" logic throughout is not right. It should be called ECL and MECL logic, with references to the Wikipedia pages about ECL.  —Preceding unsigned comment added by N3QE (talk • contribs) 17:32, 1 November 2009 (UTC)
replies: text: Absolutely true that it was ECL.  Under the "Description" section, it says that the logic was constructed from 4/5 NAND gates.  I am fairly certain that it was constructed from all one part, which was a combination of two ECL NOR gates, one 4-input, and one 5-input made by Fairchild.  I believe I even have an audio tape of Seymour saying this at home.  In searching archives, I believe the chip may be Fairchild part number 11C01 ( refer to: http://doc.chipfind.ru/fairchild/11c01.htm ).  Yes, I know we could talk about majority functions, and DeMorgan's laws, etc., and even negative-true logic.  But this is not the 6600.  And the point is that this documentation is historically incorrect.  Please fix it.  There are many people you could ask:  Les Davis, Dave Cahlander, and all the other guys who were there. 98.212.138.123 (talk) 00:15, 20 December 2010 (UTC)
thread_title:  "High Power" should be "ECL" 

message: While it was being developed, there were people internally who called the Cray-1 the 9600, since it followed very much in the 6600-7600-8600 design path.  The main reason that name was not used was that nobody could agree on what to call the next machine after it, and Seymour was already looking toward the next machine. T-bonham (talk) 04:23, 28 March 2010 (UTC)
replies: text: Additionally, Steve Chen told me that the Cray-{1,2,3...N} numeric designations were reserved for machines for which Seymour was the Chief Architect, while the Cray-(X,Y,Z} designations were for projects led by others.  SJGooch (talk) 07:28, 24 December 2010 (UTC)
replies: text:  Yep. All the way up to N=7. Have never heard of 9600 used. 8600 bares a little resemblence to the 2. 198.123.49.48 (talk) 18:47, 20 January 2011 (UTC)
thread_title: naming -- 9600

message: "The CTO went..." Wow! That's incredible! I didn't know CTOs traveled! But apparently this one did! What the **** is a CTO? Hello! Spell out the acronyms! More exclamation points!!!!! 65.199.232.66 (talk) 15:35, 14 May 2011 (UTC)
thread_title:  After the CTO went to NYC for an IOU 

message: the 8600 was as different from the 7600 as that was from the 6600  — Preceding unsigned comment added by 72.193.24.148 (talk) 19:07, 27 April 2012 (UTC)
thread_title:  8600 

message: * The search for the lost Cray supercomputer OS, By Signe Brewster, Gigaom, Jan. 14, 2014, chrisfenton.com/cray-1-digital-archeology  — Preceding unsigned comment added by So-retro-it-hurts (talk • contribs) 05:09, 1 May 2015 (UTC)
thread_title:  Cray OS 

message: The box at the upper right says 160 MFLOPS whereas sub section "History" says 80 MFLOPS. What is correct?
--Mortense (talk) 21:13, 24 September 2016 (UTC)
thread_title:  80 MFLOPS or 160 MFLOPS? 

message: Hello fellow Wikipedians,
I have just modified one external link on Cray-1. Please take a moment to review my edit. If you have any questions, or need the bot to ignore the links, or the page altogether, please visit this simple FaQ for additional information. I made the following changes:
*Added archive https://web.archive.org/web/20121227164249/http://www.ucar.edu/educ_outreach/vtour/cray.html to http://www.ucar.edu/educ_outreach/vtour/cray.html
When you have finished reviewing my changes, you may follow the instructions on the template below to fix any issues with the URLs.
Cheers.—InternetArchiveBot (Report bug) 06:55, 14 August 2017 (UTC)
thread_title:  External links modified 

message: "The Data General minicomputers were optionally replaced with an in-house 16-bit design running at 80 MIPS"
The DG was about 0.25 MIPS, and a VAX 11/780 was 1. It is extremely unlikely that the front-end computer ran at 80, especially  16-bit one. Maury Markowitz (talk) 02:36, 8 December 2017 (UTC)
thread_title:  Umm, that seems wrong 

message: I can't find a reference.  I assume they aren't pouring 115KW into something this slow anywhere anymore? - Immigrant laborer (talk) 18:04, 7 July 2022 (UTC)
thread_title:  When was the last Cray 1 shut down? 

message: The background section appears to be confusing instruction pipeline with data prefetching/memory-memory architecture. I'm not familiar with the STAR and Cray-1 architectures to know if there's a reason to do so, but if there is, the current wording doesn't communicate this sufficiently.
I think most of the section can be shortened to a concise summary as it's ultimately not about the article's subject and duplicates content of the Vector_processor#Supercomputers and CDC_STAR-100#Real-world_performance,_users_and_impact sections, which seem to explain the background better. PaulT2022 (talk) 05:29, 19 April 2023 (UTC)
thread_title:  Shorten background section