Talk:TI MSP430

message: In TI's documentation, the MSP430 devices are all part of a common platform. Each of the MSP430X1XX, MSP430X2XX, etc are members of a generation, and there are families within each generation. I updated the "families" section to instead describe "generations" but the entire article needs to be updated. As is, family is used in multiple contexts. It is used to describe the entire MSP430 platform, and for generations. This should be rectified, but I don't have the time for it now. shoez 17:56, 20 April 2009 (UTC)
replies: text: Note for details see TI doc SLAB0340 page 3 --shoez 17:59, 20 April 2009 (UTC)

text: I agree, marked the article with advert template. --Alsh 22:58, 3 February 2007 (UTC)
replies: text:  How does it compare to the other microcontroller pages (Microchip's PIC, ATMEL, etc.)? --132.205.139.54 (talk) 15:56, 30 April 2008 (UTC)
replies: text:  From the looks of it, it seems far less detailed than other microcontroller pages.  I don't think it's anymore marketing than the PIC or AVR pages. 192.91.75.29 (talk) 21:32, 3 June 2009 (UTC)

text: Agree. I work for a competitor, and this page is full of useful information about the part. Can someone tell me which piece of information they think is useless? shoez 00:14, 17 April 2009 (UTC)
thread_title:  Platform, Generation, Family nomenclature 

message: Does anyone know how old the MSP430 is (when it was invented)?
Well, approximately I do: I was a student of electronics in Munich, Germany, when I heared of a micro power controller being developed by TI in Freising. This was in 1993 or 94 and it turned out to be the MSP430 family.  —Preceding unsigned comment added by 88.64.69.17 (talk) 12:58, 7 October 2008 (UTC)
thread_title:  Age? 

message: It's a full cisc design comming from pdp-11. It's not a load&store architecture. It's not a fixed size instruction set (2 16 bits adresse could be embedded at the end of each instructions). There is absolutly nothing "riscy" here.  —Preceding unsigned comment added by 213.30.139.86 (talk) 13:38, 4 September 2007 (UTC)
thread_title:  CISC ! 

message: Do we really need to compare it to the DEC PDP-11 in the first paragraph? The two processors have very different applications, and their use do not overlap in time.
--132.205.139.54 (talk) 15:54, 30 April 2008 (UTC)
thread_title:  PDP-11 

message: I've switched a cite tag to OR since it seems more appropriate.  That line seems to have a number of issues - it speculates on a possible source (because a older version is used).  This is OR and not particularly valid - It uses the GCC frontend but like all GCC compilers the backend is largely architecture-specific.  Added to that, even the suggestion that gcc is inferior in the first place is entirely unsourced.  Since that has been tagged since Feb 2007, if no reliable sources can be found for the assertions they are probably ready to be trimmed altogether. We are not in the business of pushing trade towards commerical companies based on unsourced speculation. CrispMuncher (talk) 16:06, 5 November 2009 (UTC)
replies: text: Well, I've taken it out in the absence of any information. CrispMuncher (talk) 21:02, 6 November 2009 (UTC)
thread_title:  MSPGCC - last chance for sourced criticism 

message: The current version of this article includes a pretty blatant marketing dump into the "generations" section.  Lots of WP:PEACOCK words.  E.g. all the adjectives in "a wide range of high-performance analog and intelligent digital peripherals".  It needs a major plucking, but I'd like to discuss here if anyone thinks any of the information there is too marketing-oriented, or it's just the phrasing.  (Yes, I'll do it, as soon as I accumulate more round tuits.) 71.41.210.146 (talk) 02:25, 20 January 2011 (UTC)
thread_title:  Plucking the peacock 

message: for the MSP430x1xx the article talks about 8 MIPS, but at what clock speed?  — Preceding unsigned comment added by Mihaigalos (talk • contribs) 12:32, 15 February 2011 (UTC)
replies: text: Presumably 8 MHz, the maximum clock speed of the '1xx family.  (1xx, 3xx and 4xx go to 8 MHz, '2xx to 16 MHz, and '5xx to 25 MHz, all reducing at supply voltages below 3.3V.)  Like the 6502, the processor is almost perfectly memory bound.  The number of cycles an instruction takes is the sum of the number of instruction fetches, data fetches, and data stores required to execute it.  For register-to-register operations, instructions are a single word and so can be executed 1/cycle.  71.41.210.146 (talk) 12:23, 19 February 2011 (UTC)
thread_title:  MIPS at how many Mhz? 

message: "FRAM is also capable of zero power state retention in all power modes, which means that writes are guaranteed..."
This does not follow.  FRAM maintains its contents with a loss of power but that does not mean that writes are necessarily guaranteed.  If power down occurs during a write the result is not guaranteed unless brown-out detection circuitry is used.  — Preceding unsigned comment added by ﬥ (talk • contribs) 13:30, 18 July 2012 (UTC)
thread_title:  "Guaranteed" writes to FRAM 

message: This processor was mentioned in podcast Security Now, episode 380, at 55 min 51 secs (MP3, 45 MB). Perhaps it can be used as a source? --Mortense (talk) 20:03, 30 November 2012 (UTC)
thread_title:  Featured in "Security Now", episode 380 

message: My understanding of naming conventions is that "Texas Instruments MSP430" should be written out in full, if we include the company name at all. Should the article be moved accordingly? --SoledadKabocha (talk) 03:29, 13 December 2013 (UTC)
thread_title:  Article title 

message: For the record, the 43oh URL is broken today, it gives 403 Forbidden.  So does the "Contact us" link on http://forum.43oh.com/.
Sd4dfg2 (talk) 23:35, 7 July 2014 (UTC)
thread_title:  43oh URL broken 

message: How many transistors do the MSP430 chip models have? What is the die area size? 84.140.192.133 (talk) 12:46, 10 April 2023 (UTC)
thread_title:  Number of transistors, die size?