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705784 | |identification| | <p>Possibly a version of the <a href="https://vikiwat.com/userfiles/productimages/10546/files/integralna-shema-mc6880-quad-three-state-bus-tranceiver-with-high-impedance-pnp-inputs-dip16-0.pdf" rel="nofollow noreferrer">MC6880</a> aka MC8T26A quad 3-state transceiver. The logo looks vaguely Eastern European to my eyes (could easily be wrong on that point).</p>
<p><a href="https://i.stack.imgur.com/oWTy3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oWTy3.png" alt="enter image description here" /></a></p>
| <p>Image:</p>
<p><a href="https://i.stack.imgur.com/OwKlP.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OwKlP.jpg" alt="enter image description here" /></a></p>
<p>Couldn't find anything on Google, reverse image search also didn't help.</p>
| Identifying DIP-16 chip labeled 6880 8621? | 2024-03-12T14:44:13.953 |
705791 | |diodes|esd|tvs| | <p>An unusually (for me) hand-wavy answer, but may be helpful supporting information, while stopping short of a more strict-engineering-practices answer.</p>
<p>Common type TVSs are simply avalanche (zener) diodes, of unusual size (compared to signal types), and rated for peak power handling.</p>
<p>Therefore, everything that is true of zener diodes, is true of these as well.</p>
<p>First, note the breakdown range. Take <a href="https://www.littelfuse.com/media?resourcetype=datasheets&itemid=13c2a823-03b8-4d1f-9ddc-9b44670aed9d&filename=littelfuse-tvs-diode-smaj-datasheet" rel="nofollow noreferrer">SMAJ28A</a> for instance: 31.1V min breakdown, 34.4 max, at 1mA. A random part may fall anywhere in this range, at this current. We are guaranteed that, if we operate precisely at 31.1V, at room temperature or above, no more than 1mA will flow.</p>
<p>We are recommended to operate (nominal continuous) up to only 28V of course, for which leakage current will be a nice reasonable 1µA (at room temperature). This also helps in that, real power sources have some tolerance on them, and we have a good 10% or so comfort range.</p>
<p>Avalanche varies with temperature. Looking up ye olde <a href="http://bitsavers.trailing-edge.com/components/motorola/_dataBooks/1991_Motorola_TVS_Zener_Device_Data.pdf" rel="nofollow noreferrer">Motorola databook</a> (p. 6-4-11 (324)) indicates about 2.5V range expected for a 30V diode from 25 to 125°C. Maybe call it 3V up to 150°C.</p>
<p>Finally, current increases exponentially with voltage above breakdown; expect around a decade increase every 60mV. If we have 1mA at 31.1V, 10mA at 31.16V or 100mA at 31.22V would be reasonable to expect.</p>
<p>What will happen is, if we wait for things to come to thermal equilibrium, the device draws enough power to reach a certain temperature, then current levels off. Say it takes 1W to raise it to 125°C; once stabilized, it will run at, say, 33.6V 29.8mA. Peak current can be almost arbitrarily high, until it stabilizes; ultimately peak current is limited by V(I) curve, which is more or less exponential plus some internal resistance, though we really only see that resistance manifest at very high currents (compare to the surge rating, 45.4V max. at 8.8A; we're surely not going to be drawing 8A at 31.7V, unless maybe at very low temperature).</p>
<p>Under transient conditions, you'll be somewhere along the transient thermal impedance curve. Unless it's a big diode (>3kW?), 100ms is probably on the order of quasi-thermal equilibrium, so the temperature and breakdown voltage will rise fairly quickly, and whatever the resulting current is, is what it will be.</p>
<p>Anyway, notice this isn't anything very hard and fast, because the breakdown voltage has a wider range. This is most relevant to min-spec parts, which -- if you don't mind the current draw or power dissipation, and don't have to worry about a power supply tolerance, this is the precise voltage you're applying -- you can indeed get away with applying voltage in the middle of the breakdown range, without component failure.</p>
| <p>This was a question asked to us by our client.The question is</p>
<p>'We have a TVS diode with a break down voltage of 31V.When a pulse of amplitude 31.7V and a duration of 100ms second is applied the diode will go break down.What will be the current flowing through this diode at this time'</p>
<p>May I know your thoughts about this.</p>
| TVS Diode current flow at breakdown | 2024-03-12T16:22:06.143 |
705803 | |microcontroller|testing| | <p>As MCUs and other ICs are not resistances, they have no defined resistance. And on a PCB, there are many components over the supply and ground nodes.</p>
<p>Only if you try measuring a board supply and ground with a multimeter resistance, you get <strong>some value</strong> what the multimeter has calculated for you based on how much current flows and at what voltage, but it clearly cannot be a resistance.</p>
<p>But, as you measure 0.1 ohms, that's a short circuit.</p>
<p>It can be an error of manufacturing the PCB, or error that makes a solder bridge, or damaged or incorrectly mounted component, or just a broken bypass capacitor you cannot visually determine to be shorting.</p>
<p>How to find the problem is interesting.</p>
<p>You can use a microscope to find PCB manufacturing errors, solder bridges, incorrectly mounted components, or cracked ceramic capacitors.</p>
<p>You could use a sensitive resistance meter and pin-point the place with least milliohms between supply and ground. Or apply very low voltage with safe current limiting and measure where voltage drops happen or where there is least voltage between supply and ground.</p>
<p>A thermal camera might help as the short circuit may heat up or the traces leading to it.</p>
<p>While shorting PCB tracks may happen, it may be a capacitor that is shorted as well.</p>
<p>If all else fails, try applying low voltage but with higher current limit, which may burn off a small short circuit, or at least heat up the shorting capacitor. It may not work, but if you only have a few prototypes and need all of them, this may work to revive it.</p>
| <p>I've assembled several identical boards and one of them does not work. Visual inspection does not show any bridges, but it is hard to tell with LQFP pitch. The voltage on power rail was zero. I've removed 3.3V DC-DC chip and measured the resistance between power rail and ground. 0.1 Ohm seems to indicate a short, so I am hesitant to apply external voltage to it. The board has one MCU, EEPROM, and couple of RS485 transceivers.</p>
<p>Any suggestions how I can find a problem other than de-soldering chips one by one?</p>
| What is expected resistance of MCU power supply pins? | 2024-03-12T17:22:52.483 |
705820 | |mosfet|p-channel| | <p>R4 in your design is a very weak way to assert potential at the gate, and what's happening is a sharp rise in drain potential, as the MOSFET switches on, is coupled back to the gate via parasitic gate-drain (miller) capacitance <span class="math-container">\$C_{GD}\$</span>, which causes the MOSFET to switch back off.</p>
<p>This can be a tricky problem to solve, and has plagued engineers since the dawn of the MOSFET. This is why you have been advised to use a gate driver IC. Its low output impedance would be able to hold gate potential low in spite of the drain's fast rise. But I'll presume that's not what you want to do.</p>
<p>You have two obvious approaches to mitigating this miller effect. Either you slow the rise of drain potential, or you provide a gate signal of such low source impedance that it can hold gate potential low in spite of miller current at power on.</p>
<p>Another issue that complicates things is the transistor's intolerance for gate-source voltages <span class="math-container">\$V_{GS}\$</span> exceeding ±20V. The use of a zener diode to clamp <span class="math-container">\$V_{GS}\$</span> necessarily requires the gate driver to have significant impedance, to prevent ridiculously high currents through the diode, which as I explained above, is not a good thing.</p>
<p>That's two issues to solve.</p>
<p><img src="https://i.stack.imgur.com/jS6Xf.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fjS6Xf.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>Here I've employed an emitter follower, Q2, with very low source impedance when sinking current, and it should be able to oppose any rise in gate potential due to miller current at power on.</p>
<p>I've moved <span class="math-container">\$V_{GS}\$</span> limitation away from the gate itself. D3 now constrains Q2's base potential to be above 35V, which imposes a similar limit to the lowest potential possible at Q2's emitter and Q3's gate.</p>
<p>Everything from Q1 to the left is to do with timing. Initially C1 is discharged, potential <span class="math-container">\$V_X\$</span> at X will be +48V (when power is applied), and will slowly fall as C1 charges, via R2. When <span class="math-container">\$V_X\$</span> has fallen to +35V or so, D2 conducts, switching on Q1, and raising Q2's base potential. Q2's emitter follows, and Q3 switches off.</p>
<p>R1 and D1 ensure that the capacitor quickly discharges when supply potential <span class="math-container">\$V_{IN}\$</span> falls to zero, but they aren't strictly necessary. They won't help much if there's nothing else to force <span class="math-container">\$V_{IN}\$</span> to zero.</p>
<p>I haven't tested this, but I think it's worth a shot.</p>
<p>Physical layout is important in this application, whichever solution you choose. The main concern is that long meandering wires from Q3's gate to Q2's emitter, or between Q2's collector and ground will have inductance and resistance that you must keep to an absolute minimum. Keep those paths short and very low resistance. Even just a couple of ohms of resistance, or a few nanohenries inductance, will allow miller current to have a significant effect. Whether you are building this on a breadboard, or designing the PCB, use heavier gauge wires/traces, and keep Q2 and Q3 as close as possible, with leads/traces as short as possible between them.</p>
| <p>I have the circuit below on a PCB. I am trying to provide 48V across R5 at power-on, then after a delay, disconnect R5 from the input power.</p>
<p><a href="https://i.stack.imgur.com/SHI8u.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SHI8u.png" alt="enter image description here" /></a></p>
<p>I have three questions regarding this circuit.</p>
<p>Question 1: At power-on, the load turns on as expected. However, it turns off for a brief moment and then turns back on. I probe the drain of Q2 and see this:
<a href="https://i.stack.imgur.com/4Ozdd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4Ozdd.png" alt="enter image description here" /></a></p>
<p>The voltage was rising and suddenly dropped almost to 0V then continued to rise. I suspect that this drop in voltage causes the issue I described above where the load loses power for a quick moment. What can I do to remove this voltage drop?</p>
<p>Question 2: How do I calculate the delay time? Is C1 charged through R2 and the delay time is five times the time constant? If so, it is 50 seconds; however, as a measure with an oscilloscope, R5 only sees 48V for about 170ms.</p>
<p>Question 3: How do I increase the turn-on time of Q2 so that the power is delivered to the load faster at power-on?</p>
| P-Channel MOSFET circuit | 2024-03-12T19:01:18.937 |
705823 | |operational-amplifier|bjt|protection|negative-feedback| | <p>An easy fix would be to allow the output to go negative by taking the 470 ohm output resistor to -12V instead of ground. This will have the effect that the output can go negative, but that may be a benefit in that it allows you to detect the anomalous condition where the input goes below zero.</p>
<p>If you just want to keep it out of saturation without affecting the circuit in any way, add a diode with its anode at U1:IN- and its cathode at U1:OUT. That will satisfy the op amp with going only 0.7V below ground and improve the recovery response as well as protecting the transistor base from serious negative voltages.</p>
| <p>I have the following circuit:</p>
<p>An input that can go negative (+/-5 V sine wave), and two inverting op-amps. The second op-amp is "current buffered" and is driving the base of a BJT.</p>
<p><a href="https://i.stack.imgur.com/OIa20.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OIa20.png" alt="enter image description here" /></a></p>
<p>Here is a SPICE simulation screenshot:</p>
<p><a href="https://i.stack.imgur.com/iiUEj.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/iiUEj.png" alt="enter image description here" /></a></p>
<p>In practice, for the real circuit, the input should not go negative, but it can if something goes wrong. This is why I am using a sine wave for the input here.</p>
<p>The output (V-output-opa2), has the desired form, it is always positive. This is what I want. However, a less desirable feature here is that the second op-amp goes to the negative rail whenever the input goes negative, because - as I understand it - of the feedback loop including the BJT: the op-amp can't drive its non-inverting input negative because it is tied to ground; it tries though, and therefore it goes to the negative rail!</p>
<p><strong>Q1:</strong> Is it a problem? I would like this circuit to work for a long time.</p>
<p><strong>Q2:</strong> If it is a problem, I do not see a solution except preventing the input itself from going negative; in that case, how would you do it? Is there any other solution?</p>
<p>For the record, I do not want to tie the emitter to the -12 V power supply, I do not want the output to ever go negative.</p>
| How to prevent this op-amp from railing | 2024-03-12T19:56:50.440 |
705827 | |microcontroller|power-electronics|brushless-dc-motor|opto-isolator|driver| | <p>If you share the same ground, an optoisolator serves no purpose: you don't need a functional separation of reference levels, nor do you get any galvanic isolation.</p>
<p>So, no, don't add a superfluous optocoupler.</p>
| <p>I am working on a brushless driver, which has 3 IR2110 as a mosfet driver and as a microcontroller I use a stm32f103c8t6 (blue pill board). Everything works correctly, but I have the following question:
Should I connect optocouplers to the output of my uC and to the input of the IR2110 to protect it from possible surges or electrical noise that may be generated in the power circuit?
I attach an image of a single phase, my idea is to put the optoisolators to transmit the HIGH_x and LOW_x signals.
<a href="https://i.stack.imgur.com/PTEk3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/PTEk3.png" alt="phase a " /></a></p>
| Optoisolator between uC y IR2110? | 2024-03-12T20:05:52.970 |
705831 | |wiring|amperage|awg| | <p>There are actually a great many variations on the WS2812, from WorldSemi and maybe there are other makers, I have not looked, but one common type is 12mA or 12.5mA (nominal) for each LED plus Iq so not so far off the number you are reading. The 20mA WS2812S, for example, is only one of many and might run too hot when mounted in a tight cluster. Some are more like 5mA per LED, plus Iq.</p>
<p>AWG 26 is fine for a couple A if the wire is rated for 75°C or 90°C insulation from an ampacity point of view, but you will lose a bit of voltage. If it works, then fine.</p>
<p>Yes, adding resistors is a good idea, especially with long and/or thin wires.</p>
| <p>I am building a small kitchen for my child. For the hot plate I bought eight ws2812 led pixel rings: four with 8 leds and four with 16 leds. I soldered each two rings together so I have four double rings with 24 leds in total.</p>
<p>I soldered three 26 awg cables on each double ring and a JST (3 pin) on the other end to connect it to the pcb.</p>
<p>An esp32 will do the controlling of each double ring. The power will be supplied by a 5v 10a adapter (to esp32 and the leds separately).</p>
<p>I measured the amps at the power adapter and it showed only 2.5 amps even though all leds were turned on 100%.</p>
<p>The specs state that each led can draw up to 0,06A which results in 24x0,06x4=5.76A.</p>
<p>The leds will only light red when I am finished with this project. I just wanted to check the worst case scenario. Then each double ring will draw up to 0.48A according to the specs.</p>
<p>My questions are</p>
<ol>
<li>Why do the leds draw only 2.5 when fully white?</li>
<li>Are 26 AWG cables (10cm each) a secure way in this setup? I really do not want the kitchen to catch fire.</li>
<li>Should I add a resistors between data in and esp32?</li>
</ol>
<p>Thank you very much for your help!</p>
| WS2812 LED Pixel Ring 26 AWG JST | 2024-03-12T20:50:19.430 |
705842 | |system-verilog| | <blockquote>
<p>I have a SystemVerilog module that calculates a constant.<br />
How can I make this constant available to an enclosing module?</p>
</blockquote>
<p>You are able to use a hierarchical name reference to a parameter, localparam (constants), or variables in a child module.<br />
Ref IEEE 1800 2017 SystemVerilog section 23.6 Hierarchical names</p>
<p>The ability to access objects using a hierarchical naming is not limited to just the testbench. Modules anywhere in the hierarchy can access other modules by using a hierarchical name.</p>
<p>The ability to access objects using a hierarchical naming is not limited to compile time/elaboration time. Objects that change at run time can be referenced also.</p>
<p>Here is a relevant quote from the spec section I referenced<br />
"Any named SystemVerilog object or hierarchical name reference can be referenced uniquely in its full form
by concatenating the names of the modules, module instance names, generate blocks, tasks, functions,
assertion labels, named assertion action blocks, or named blocks that contain it. The period character shall
be used to separate each of the names in the hierarchy, except for escaped identifiers embedded in the
hierarchical name reference, which are followed by separators composed of white space and a periodcharacter."</p>
<p><strong>Example</strong></p>
<pre><code>module tb ();
enclosing dut();
endmodule
</code></pre>
<p><strong>Enclosing</strong></p>
<pre><code>module enclosing();
sub u1();
// accessing a variable in the child module using a hierarchical name
initial
$display(u1.FOO);
endmodule
</code></pre>
<p><strong>Child module</strong></p>
<pre><code>module sub();
// calculate a constant
// the parent can't change this, its not passed in
localparam FOO = 7 * 7;
endmodule
</code></pre>
<p><strong>Produces</strong></p>
<pre><code>xcelium> run
49
</code></pre>
<p>The ability to access a child module is not limited to simulation.
Xilinx states that hierarchical names are supported for synthesis
<a href="https://docs.xilinx.com/viewer/book-attachment/VXDyposQ4vTSzkZQR83coQ/b6zTvHNSY07j1WdniHx%7Edw" rel="nofollow noreferrer">Vivado UG901 Synthesis Guide 2023 p288</a></p>
<p><a href="https://i.stack.imgur.com/yLpQL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yLpQL.png" alt="enter image description here" /></a></p>
<p>It seems reasonable that not all synthesis tools support hierarchical names (I don't know). Maybe check your vendor if its not Xilinx.</p>
<p>If you don't trust the idea of hierarchical names, then create a small design which uses hierarchical names to do what you want then run it thru synthesis and examine the synthesis results as a verification step in your process. Or, deploy it to the lab and verify the behavior on hardware.</p>
<hr />
<blockquote>
<p>Parameters are good for passing constants into a submodule, but they don't seem appropriate for passing constants out of a submodule, because the enclosing module is allowed to set the parameter to whatever it wants (which is what I'm trying to avoid).</p>
</blockquote>
<p>If you don't want to use a parameter, then use localparam in the child module.<br />
See <a href="https://stackoverflow.com/questions/30288783/difference-between-parameter-and-localparam">Difference between localparam and parameter</a></p>
<p>Or just use a parameter which is not part of the module header, so that the parent can't change it.<br />
Like this</p>
<pre><code>module sub();
parameter FOO = 7 * 7;
endmodule
</code></pre>
<hr />
<blockquote>
<p>...the enclosing module is allowed to set the parameter to whatever it wants</p>
</blockquote>
<p>There is no requirement for any parameter to be part of a module header. If you don't want the parent module to change them, then don't put the parameter in question on the child module header. This seems to be a point of confusion in the question.</p>
<hr />
<p>Hierarchical referencing works fine from a coding and tools perspective. However, some engineers prefer not to use it in RTL code. One reason is that when a module is blindly probed from somewhere else, the module itself is no longer completely specifies its own interface signals in its module header. It can be difficult to understand & maintaining a design, if its not clear how modules are connected. Consider the difficulty debugging a large design (hundreds of thousands of unique modules) that you don't know and many of the modules obtain their input not from the module ports but from sneak paths using hierarchal referencing.</p>
<p>Hierarchical referencing is often used for monitoring in testbenches.</p>
| <p>I have a SystemVerilog module that calculates a constant. How can I make this constant available to an enclosing module?</p>
<p>Parameters are good for passing constants into a submodule, but they don't seem appropriate for passing constants out of a submodule, because the enclosing module is allowed to set the parameter to whatever it wants (which is what I'm trying to avoid).</p>
<p>For example, suppose the submodule calculates a constant called LATENCY. The enclosing module needs to use this value to align its pipeline stages with the submodule's stages.</p>
<pre><code>module sub#( parameter LATENCY=3 )( input clock, input in, output out );
...
endmodule
module enclosing( input clock, input in, output out );
sub i1( .clock, .in, .out );
// can I access i1.LATENCY here at compile time?
sub#( .LATENCY(1) ) i2( .clock, .in, .out );
// but, can I prevent LATENCY from being changed?
endmodule
</code></pre>
<p>Does such a mechanism exist?</p>
<p>Or, if only parameters are available, is the submodule supposed to call $error() if the parameter is not correct?</p>
<p>Thanks</p>
| How to indicate a constant to a surrounding module | 2024-03-12T23:57:41.287 |
705844 | |verilog|simulation|system-verilog|testbench| | <p>You can create an associative array of events map strings to events</p>
<pre><code>event check1_e;
event check2_e;
...
event emap[string] = '{"check1_e":check1_e, "check2_e":check2_e, ...};
</code></pre>
<p>Then use this code to trigger</p>
<pre><code>string head_data;
head_data = "check1_e"
if (emap.exists(head_data))
->emap[head_data];
else
$error("%s event does not exist",head_data);
</code></pre>
| <p>In a Verilog testbench.v, there are commands that are used in a task.</p>
<pre><code>task cmd_script;
begin
...
event check1_e;
event check2_e;
..
integer cmd_file;
integer cmd_char;
reg [31:0] head_data;
reg [31:0] tail_data;
cmd_file = fopen("data.txt");
cmd_char = $fgetc(cmd_file);
while(cmd_char != EOF) begin
...
$fscanf(cmd_file, "%s\n", cmd);
case (cmd)
TEST1 : begin
end
TEST2 : begin
$fscan(cmd_file, "%h %h\n", head_data, tail_data);
->check1_e = head_data;
end
...
end
</code></pre>
<p>Can I pass variable name as a string to an event, or can an event name can be manipulated?</p>
| Can an event name be manipulated in Verilog/SystemVerilog? | 2024-03-13T00:17:45.233 |
705852 | |voltage|led|resistors| | <p>You've got a number of resonances by others on your question. But I'll dive directly in to demonstrate that it's not an assumption by Tinker.</p>
<p>The Shockley diode model can be simplified for these purposes to the following:</p>
<p><span class="math-container">$$I_\text{D}=I_\text{SAT}\cdot\left[\exp\left(\frac{V_\text{D}-R_\text{D}\cdot I_\text{D}}{\eta\,V_T}\right)-1\right]$$</span></p>
<p>Solving that for <span class="math-container">\$I_\text{D}\$</span> would take a page's worth of math steps, which I'll avoid. (Uses branch-0 of LambertW function, which gives <span class="math-container">\$u\$</span> for <span class="math-container">\$y=u\, e^u\$</span> when you know <span class="math-container">\$y\$</span>.)</p>
<p>But it can be rewritten in this more easily reckoned with equation:</p>
<p><span class="math-container">$$V_\text{D}=I_\text{D}\cdot R_\text{D}+\eta\, V_T\cdot \ln\left(1+\frac{I_\text{D}}{I_\text{SAT}}\right)$$</span></p>
<p>Apparently, Tinker uses <span class="math-container">\$\eta=1.75\$</span>, <span class="math-container">\$R_\text{D}=6\:\Omega\$</span>, and <span class="math-container">\$I_\text{SAT}=4\times 10^{-21}\$</span> for its RED LED diode model. And <span class="math-container">\$V_T=26\:\text{mV}\$</span> for its thermal voltage.</p>
<p>In your case, with <span class="math-container">\$1\:\text{k}\Omega\$</span>, you got <span class="math-container">\$7.04\:\text{mA}\$</span>. So:</p>
<pre><code>(6*x+1.75*.026*ln(1+x/4e-21)).subs(x,7.04e-3)
1.95377896947390
</code></pre>
<p>And yes, that matches what the voltmeter shows for the RED LED voltage.</p>
<p>Let's try with <span class="math-container">\$2\:\text{k}\Omega\$</span> and get <span class="math-container">\$3.55\:\text{mA}\$</span> and find:</p>
<pre><code>(6*x+1.75*.026*ln(1+x/4e-21)).subs(x,3.55e-3)
1.90168691368984
</code></pre>
<p>And yes again, that's what I got from Tinker for the LED voltage.</p>
<p>Let's up the current a bit so that <span class="math-container">\$R_\text{D}\$</span> matters more. Try with <span class="math-container">\$150\:\Omega\$</span> and get <span class="math-container">\$44.5\:\text{mA}\$</span>:</p>
<pre><code>(6*x+1.75*.026*ln(1+x/4e-21)).subs(x,44.5e-3)
2.26243555583850
</code></pre>
<p>And that's also what I get from Tinker for the LED voltage.</p>
<p>Tinker uses the Shockley diode equation to solve these problems. So it doesn't need to guess. It uses a model and the model behaves in a certain way.</p>
<p>But Spice programs are really fast and good at bookkeeping and numerical solving methods, where we humans are rather poor and slow at both of those. So Spice programs use what they are good at.</p>
<p>We humans find other ways.</p>
| <p>I'm talking about a simple circuit - source, resistor and LED in series. <br/>
I've seen many examples of how to calculate the resistor value based on source voltage and the desired current and voltage of the LED. <br/>
But if you only know the source voltage and the resistor value, how can you calculate the current through the circuit and the voltage across the LED?<br/>
I tried to simulate this on tinkercad by linking a 9V battery with a 1 kOhm resistor and a LED, and got these values:
<a href="https://i.stack.imgur.com/Xw6hH.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Xw6hH.png" alt="enter image description here" /></a>
However, I cannot figure out how the simulator came up with them. I guess it just <b>assumed</b> that the red LED will have the typical forward voltage of 1.95V, and then the rest of the values come naturally (resistor's voltage = 9 - 1.95 = 7.05, so current is 7.05/1000 = 7.05 mA). <br/>
But if so, my question is - how is that assumption justified? To me, it seems quite arbitrary.</p>
| How to calculate LED voltage and current based on resistor value and source voltage? | 2024-03-13T02:21:46.853 |
705854 | |circuit-analysis|resistors|parallel|series|ohms-law| | <p>The 3 kΩ and 2.2 kΩ resistors are in series; they have the same current going through them.</p>
<p>The 1 kΩ and 3 kΩ resistors don't; they have a node between them and some of the current "branches off", so they are not in series.</p>
<p>It may make it easier to see if you redraw the schematic without changing the nodes and branches:</p>
<p><a href="https://i.stack.imgur.com/vaAXJ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/vaAXJ.png" alt="enter image description here" /></a></p>
<p>So you have 1 kΩ in series with 2 kΩ || 5.2 kΩ.</p>
| <p>How to calculate the total resistance and identify which resistors are in series?</p>
<p><a href="https://i.stack.imgur.com/iw22q.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/iw22q.png" alt="enter image description here" /></a></p>
<p>I'm really lost with this one. How do I properly read this?</p>
| How to calculate total resistance and identify which resistors are in series? | 2024-03-13T02:41:11.367 |
705862 | |inverter|pmsm| | <p>Assuming the motor rotates at a speed which BEMF is higher than the DC supply, current flows through the diodes in parallel with the IGBT's. This current produces a braking torque in the motor, slowing it down. The current also flows backwards through the inverter, charging the inverter's capacitors, as well as the capacitor in the power supply. If the motor was spinning fast enough, this could overcharge the capacitors.</p>
<p>Assuming the capacitors can handle the resulting voltage, when the BEMF matches the voltage on the capacitors, current is not able to flow through the diodes. With zero current through the armature, there is no braking torque on the motor, which then starts spinning freely.</p>
| <p><a href="https://i.stack.imgur.com/01ANG.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/01ANG.png" alt="enter image description here" /></a></p>
<p>A PMSM motor is controlled by the inverter in the picture, which in turn is powered by a DC power supply that can not dissipate energy, only supply.</p>
<p>When the inverter trips, for example for over voltage protection, "the AC power stage is disabled (IGBTs are opened)". What happens then?</p>
| What happens with a rotating PMSM motor when its inverter trips? | 2024-03-13T04:47:07.627 |
705876 | |transistors|mosfet|identification| | <p>It's a <a href="https://datasheet.lcsc.com/lcsc/2304140030_Nexperia-74LVC1G19GW-125_C148208.pdf" rel="nofollow noreferrer">Nexperia 74LVC1G19</a> decoder/demultiplexer.</p>
<p><a href="https://i.stack.imgur.com/6sDG9.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6sDG9.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/wJLSd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wJLSd.png" alt="enter image description here" /></a></p>
<p>(Source: <a href="https://www.lcsc.com/product-detail/Signal-Switches-Encoders-Decoders-Multiplexers_Nexperia-74LVC1G19GW-125_C148208.html" rel="nofollow noreferrer">lcsc.com</a>)</p>
| <p>Can anyone help me identify IC "VY" as pictured?</p>
<p><a href="https://i.stack.imgur.com/XTO1A.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XTO1A.png" alt="Photo of IC" /></a></p>
| Identify IC "VY" | 2024-03-13T08:28:21.817 |
705879 | |digital-logic|uart|level-shifting|signal-integrity| | <p>You can't expect a logic level communication to work over 3m, with that level shifter, and at such high speed.</p>
<p>You should switch to something that is intended for 3m communication between devices, such as RS-232 transceivers. On the 1v8 side, there would be a level shifter with few cm on each side.</p>
| <p>What part of a level shifter datasheet indicates drive strength?</p>
<p>I have an MCU and sensor connected over UART (115200 baud). The MCU is 3.3V and the sensor is 1.8 V, so I'm using a level shifter in between. There is a 3 m cable between the two.</p>
<p>It appears the drive strength of my level shifter is insufficient, causing an SI problem. The signal from the sensor to the shifter looks nice, but the output from the level shifter suffers from low voltage and very rounded highs. This was also suggested by the sensor manufacturer.</p>
<p><a href="https://i.stack.imgur.com/I7Oie.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/I7Oie.png" alt="Digital interpretation above, actual analog signal below." /></a></p>
<p>I am currently using the <a href="https://www.digikey.gr/en/products/detail/runic-technology/RS0102YH8/14544630?s=N4IgTCBcDaIE4GcAMBGJEC6BfIA" rel="nofollow noreferrer">RS0102 shifter</a>. I also looked at other datasheets now that I am swapping the component, and they confuse me a bit...
Listing I_OH=-20 uA seems common. I interpret this as <20 uA flows into the pin when it is in its high state. I'm thinking current should flow OUT of the pin when it's high, at least on one side of the shifter. 10 kΩ internal pull-up also seems common. But at ~3 V with 10 kΩ I'd expect ~300 uA, so what does the -20 uA from the datasheet mean? Speed does not seem to be the issue either, as 115k baud is quite slow compared to the capabilities listed in the datasheets. It feels like I am missing something. Perhaps this is the wrong value to look at altogether? What are the important parameters to find a suitable shifter? What is likely my issue?</p>
<p>My current shifter has a note in the datasheet re. that round trip should be <30 ns. That means ~<4.5 m at 115200 baud, right? Perhaps the cable is still the issue. What should I look for in a level shifter in order to drive the signal over 3 m cable?</p>
<hr />
| Low drive strength of level shifter | 2024-03-13T09:08:02.357 |
705883 | |i2c|multiplexer|transistor-array| | <p>An I2C device only operates when it sees activity on both the clock and data lines. If it sees activity on only one or the other, the device will ignore the cycle.</p>
<p>So the obvious way to "matrix" a whole lot of I2C devices would be to connect SDA from the MCU to the COM input of your U3, and connect U3's outputs to the columns of your matrix. This goes directly to the SDA pins of the I2C devices in each column.</p>
<p>Similarly, connect the SCL from the MCU to the COM input of U4 and connect U4's outputs to the rows of your matrix. This goes directly to the SCL pins of the devices in each row.</p>
<p>In addition, each column and each row needs its own pullup resistor.</p>
<p>The one device in the matrix which receives both SDA and SCL will execute the current cycle. All other devices in the same column will see the SDA pin wiggling, but since their SCL pins are not moving, they just see a bunch of "start" and "stop" conditions that mean nothing to them. Similarly, all other devices in the same row see the SCL pin wiggling, but since they don't see the "start" and "stop" conditions on their SDA pins, they ignore the clock cycles too.</p>
| <p>I have a specific application where I need to interface 256 i2c busses arranged in array of 16x16.
I have used multiplexers to create LED arrays, but this problem seems different as there isn't part of the circuit to pull to ground as one would for LED's. If I had to only "write" to bus then it could be achieved with array of diodes, but I need to also read from the bus. I started to sketch something using transistors, but my hobby level knowledge was not enough to figure this one out. Best solution I could come up is adding currents from both muxers to trigger the transistor.</p>
<p><a href="https://i.stack.imgur.com/4n5Sw.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4n5Sw.png" alt="enter image description here" /></a></p>
<p>This is my best idea so far. Using a voltage divider thru both muxes to break thru mosfets threashold:</p>
<p><a href="https://i.stack.imgur.com/XCn7t.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XCn7t.png" alt="enter image description here" /></a></p>
| Multiplexing signal array | 2024-03-13T09:56:45.583 |
705885 | |analog|dc-dc-converter|flyback| | <p>You should read the <a href="https://www.ti.com/lit/ug/snva611b/snva611b.pdf?ts=1710338592987&ref_url=https%253A%252F%252Fwww.ti.com%252Flit%252Fds%252Fsymlink%252Flm5017.pdf%253Fts%253D1710332349999%2526ref_url%253Dhttps%25253A%25252F%25252Fwww.ti.com%25252Fproduct%25252FLM5017%25253Futm_source%25253Dgoogle%252526utm_medium%25253Dcpc%252526utm_campaign%25253Dapp-null-null-GPN_EN-cpc-pf-google-wwe%252526utm_content%25253DLM5017%252526ds_k%25253DLM5017%20Datasheet%252526DCM%25253Dyes%252526gad_source%25253D1%252526gclid%25253DEAIaIQobChMIz-alupzxhAMVEWFIAB2zRA1TEAAYASAAEgL-aPD_BwE%252526gclsrc%25253Daw.ds" rel="nofollow noreferrer">note</a> about <a href="https://www.ti.com/lit/ds/symlink/lm5017.pdf?ts=1710332349999&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLM5017%253Futm_source%253Dgoogle%2526utm_medium%253Dcpc%2526utm_campaign%253Dapp-null-null-GPN_EN-cpc-pf-google-wwe%2526utm_content%253DLM5017%2526ds_k%253DLM5017%20Datasheet%2526DCM%253Dyes%2526gad_source%253D1%2526gclid%253DEAIaIQobChMIz-alupzxhAMVEWFIAB2zRA1TEAAYASAAEgL-aPD_BwE%2526gclsrc%253Daw.ds" rel="nofollow noreferrer">LM5017</a> which does "explain" an example realization.<br />
Note that the current should not be more than 300 mA (Iout1+Iout2) ...</p>
<p>Note also that the "current" you are watching need "more" data of the "transformer" and its "isolation" from that circuit.</p>
| <p>I'm designing a "fly-buck" converter, as shown in the example picture below.</p>
<p>For coupled inductor I was planning to use one with 1 kV functional isolation voltage.</p>
<p>This converter needs to be isolated, so the power potential (common-mode) on the input VIN does not "travel" to the VOUT2/GND.</p>
<p>For DC it is obvious that this is the case, but how do I calculate or estimate the common-mode rejection for ac, say 50 Hz or more?</p>
<p>I was looking at the LPD5030V series from CoilCraft, but struggle to find the data needed.</p>
<p><a href="https://i.stack.imgur.com/iAzlk.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/iAzlk.png" alt="Flyback converter example" /></a></p>
<p><a href="https://www.digikey.it/it/articles/generating-isolated-outputs-using-fly-buck-converter-topology" rel="nofollow noreferrer">Generating Isolated Outputs Using Fly-Buck Converter Topology</a></p>
<p>EDIT: Sorry for the confusion. I need both VOUT1 and VOUT2. VOUT1 domain has some optocouplers with data input and output. VOUT2 has a sensor, that needs to be isolated from VOUT1 domain. So ideally no current should flow from VIN to VOUT2 domain, but how do I calculate the maximum current here?</p>
| Fly-buck converter common mode attenuation | 2024-03-13T10:01:18.490 |
705900 | |motor-controller|three-phase| | <p><a href="https://en.wikipedia.org/wiki/Symmetrical_components" rel="nofollow noreferrer">Tri-phase case</a>.</p>
<p>In a 3-phase system, homopolar "coordinate" = 0 shows that the 3 phases are exactly the same voltage ... (phased with +/- 120° and zero).<br />
If this is not the case, than the system has a "homopolar" voltage.<br />
This is a component of "<a href="https://fr.wikipedia.org/wiki/Transformation_de_Fortescue" rel="nofollow noreferrer">Fortescue</a>" transform.<br />
The other two components are "direct" and "inverse" coordinates system.</p>
| <p>I am reading a textbook about power electronic converters which describes that for a motor with poles connected in a wye configuration, that</p>
<p>If the homopolar component is zero,
<span class="math-container">$$
V_A+V_B+V_c=0
$$</span>
If we add the homopolar component,
<span class="math-container">$$
\frac{V_A+V_B+V_c}{3}=V_0
$$</span></p>
<p>What is this "homopolar component" it speaks off? Unfortunately it doesn't speak of it.</p>
| What is meant by homopolar coordinate? | 2024-03-13T13:08:10.403 |
705917 | |stm32|gpio| | <p>The problem was caused by the ADC DMA that was running in the background. I now call <code>HAL_ADC_Stop_DMA()</code> before I want to generate the square wave and it works great now!</p>
| <p>I'm outputting a square wave from a GPIO pin but the signal shows that the time it is low and the time it is high are changing even though they should be the same. How do I fix this?</p>
<p>Note that the period you see on the oscilloscope does not match the period set in the code. That additional delay is presumably from other things the MCU is doing, but I find it weird how as I was adjusting the period the additional delay was changing too. Now you see an additional delay of about 11 us, but when the period was 5 us the additional delay was also just 5 us. How does this make sense as the only thing that was changing in the code was the frequency of GPIO switching?
<a href="https://i.stack.imgur.com/QdUEI.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QdUEI.jpg" alt="oscilloscope" /></a></p>
<pre><code>while(1)
{
GPIOA->BSRR = GPIO_BSRR_BS2;
delay_us(7.5f);
GPIOA->BSRR = GPIO_BSRR_BR2;
delay_us(7.5f);
}
</code></pre>
<pre><code>void delay_us(float time)
{
__HAL_TIM_SET_COUNTER(&htim1, 0);
while(( (float)__HAL_TIM_GET_COUNTER(&htim1) / 2.0f) < time) {}
}
</code></pre>
<p>EDIT:</p>
<p>I tried using the timer with an interrupt via <code>HAL_TIM_PeriodElapsedCallback()</code>. Its main clock is running at 64MHz, the prescaler at 32 (=2MHz timer freq) and ARR at 25-1 so it could create a delay of 12.5 uS which I need for the 40kHz. When I run it it's producing a square wave of roughly 25.4kHz, which does not change when I change the prescaler to 16, even though it should double the frequency. When I decrease ARR to 10-1, the frequency increases slightly to a bit under 30kHz.</p>
<pre><code>int state = 0;
int count = 0;
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
if(htim == &htim1)
{
if(state)
{
GPIOA->BSRR = GPIO_BSRR_BR2;
state = 0;
} else {
GPIOA->BSRR = GPIO_BSRR_BS2;
state = 1;
}
count += 1;
}
}
</code></pre>
<p>Is the interrupt taking too much time so I couldn't toggle the GPIO in 12.5uS? If so, what is an alternate approach or how can I make it take less time?</p>
| STM32 square wave fluctuating | 2024-03-13T16:52:59.883 |
705939 | |opto-isolator|solid-state-relay| | <p>This kind of SSR uses a photovoltaic cell internally, which can only produce microamperes so it takes some time to charge the internal MOSFET gates. They are fast enough for many applications and have the advantage of not requiring any power supply on the switched side.</p>
<p>For faster action you probably have to separate the power and the isolation and switch functions.</p>
<p>If you power an analog switch V+/V- from the op-amp supplies and use an analog switch with level shifting you may only need to add an isolator. A 6N137 will switch in 10 or 15ns. The type of analog switch you would need depends on the supply voltages. +/-15V supplies will require a more expensive part than if they are +/-5 or +5/0.</p>
| <p>I am currently designing a circuit that includes a solid state relay, the <a href="https://www.mouser.com/datasheet/2/240/media-3320180.pdf" rel="noreferrer">CPC1125 </a>. I chose it because it is one of the faster normally closed solid state relays I found. I want it to be optical because I want to isolate the two parts of the circuits which are linked by the relay. The problem is that all the relays I found are slow, switching times are on the order of a few 100 us, which is weird to me because they use transistors and optical elements which should all be faster than that (?). I think I am missing some key word to find the right alternative, is there any?</p>
<p>For completeness, here is a schematic of the circuit. the relay is used to short the integrating part of an integrator circuit.</p>
<p><a href="https://i.stack.imgur.com/xUSwy.png" rel="noreferrer"><img src="https://i.stack.imgur.com/xUSwy.png" alt="enter image description here" /></a></p>
<p>The LED and the op-amp are different grounds.</p>
| Faster alternative to solid state relay | 2024-03-13T20:38:24.403 |
705941 | |operational-amplifier| | <p>Knowledge Seeker was asking:
"<em>I just wish if you could mathematically express what you want me to do to attain the point where i see that the positive feedback exceed the negative feedback</em>"</p>
<p>The answer is simple- just write down the closed-loop gain for Ve2=0 (your first diagram) using the <strong>feedback factor (two portions) Hfb=-R1/(R1+R2)+R3/(R3+R4).</strong>
(As you see, I have used another notation for the positive part of Hfb).</p>
<p>With <strong>input damping</strong> (forward factor) <strong>Hfw=-R2/(R1+R2)</strong> the closed-loop gain is</p>
<p><strong>Acl=(Hfw * Aol)/(1 - Hfb * Aol)</strong> and</p>
<p><strong>Acl=-Hfw/Hfb</strong> for Ao approaching infinity.</p>
<p>Therefore (after inserting Hfw and Hfb):</p>
<p><strong>Acl=+[R2/(R1+R2)]/{[R3/(R3+R4)]-[R1/(R1+R2)]}</strong></p>
<p>(For R3=0 the above equation reduces to the known gain of an inverting opamp Acl=-R2/R1).</p>
<p>As you can see, when the positive feedback portion R3/(R3+R4) in the denominator exceeds the negative portion, the resulting gain Acl would be positive. However, this is a <strong>contradiction</strong> to the expected negative closed-loop gain Acl.
Therfore, we always require <strong>R3/(R3+R4)<R1/(R1+R2)</strong></p>
| <p>Positive and negative feedback circuits : let the following circuit
<a href="https://i.stack.imgur.com/mYsdX.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/mYsdX.png" alt="enter image description here" /></a></p>
<p>I want to prove that this system is stable (meaning the op-amp isnt getting saturated) if and only if <span class="math-container">\$ k_+ = \frac{R_{1+}}{R_{1+}+R_{2+}} < k_- = \frac{R_{1-}}{R_{1-}+R_{2-}} \$</span>
Here is what i tried to do, since <span class="math-container">\$ V_s = A_0 \varepsilon , \varepsilon = V_+ - V_- = k_+ V_s - k_- V_s = V_s(k_+ - k_-)\$</span> but i dont know how can i relate the saturation to the difference between the two k-factors</p>
<p><strong>Response for Andy</strong>
For a standard inverting amplifier, we have <span class="math-container">\$i_- = -i_s \iff \frac{V_-}{R_1} = \frac{V_s}{R_2} \iff V_s = \frac{-R_2}{R_1}V_- \$</span></p>
| Proving formula for feedback for operational amplifiers | 2024-03-13T20:46:09.060 |
705954 | |transistors| | <p>The current through the base to the emitter also flows through the LED and activates it. As you can see in your images, despite the collector being disconnected, the LED is still bright but, a little dimmer than when the collector is properly connected.</p>
<p>If you made the base resistor a lot higher than 220 Ω this difference would be more obvious.</p>
| <p>I'm incredibly new to electronics and tried to make a simple circuit using a transistor. However, whether or not the collector is off while the base is on isn't changing the output except for slightly dimming the attached LED. The transistor is labeled pn2222a, does that mean anything is different about it? What exactly went wrong? Forgive me if I'm just making a silly mistake. The diagram is what I was trying to do, with the switch being me plugging in the wire or not. <a href="https://i.stack.imgur.com/yp6Mr.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yp6Mr.png" alt="enter image description here" /></a><a href="https://i.stack.imgur.com/qHZ3g.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qHZ3g.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/xL7I8.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xL7I8.jpg" alt="enter image description here" /></a></p>
| Confusion about transistors | 2024-03-13T22:56:48.360 |
705976 | |microcontroller|usb-device|programmer| | <p>A few paragraphs into the first page ("features") I find this:</p>
<blockquote>
<p>• 448-Byte Buffer to Handle Data Throughput at Any Supported UART Baud
Rate:</p>
<ul>
<li>64-byte transmit</li>
<li>384-byte receive</li>
</ul>
</blockquote>
<p>A few lines down from there:</p>
<blockquote>
<ul>
<li>Supports Baud Rates: 300-460800</li>
<li>UART UTx and URx Pins Only</li>
</ul>
</blockquote>
<p>Keep searching on "receive" and you will keep finding things like this.
Short of hooking one up to be sure, I'm pretty confident this will do what you want. The CDC class certainly handles send and receive, and the part has hardware for I/O, so the only way it wouldn't work is if the firmware left out that capability.</p>
| <p>I am using a MCP2221A to program an ATMEGA1284p through the USART/UART lines(converting USB signals from the computer into a programming signal the MCU can read). However, given that I can <em>send</em> serial data from the computer, to the USB/USART bridge, then to the MCU, can I do the opposite(sending data from the MCU to the computer)?</p>
<p>I have looked through the <a href="https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP2221A-Data-Sheet-20005565E.pdf" rel="nofollow noreferrer">datasheet</a> for the MCP2221A, and all that sticks out to me is the following passages:</p>
<blockquote>
<p>Implements USB Protocol Composite Device: - Communication Device Class (CDC) for USB-to-UART conversion</p>
</blockquote>
<p>from the first page, and:</p>
<blockquote>
<p>The MCP2221A enumerates as a composite USB device after POR. The device enumerates as both a Human Interface Device (HID) for I2C, GPIO control, and as CDC for the USB-to-UART converter.</p>
</blockquote>
<p>as well as</p>
<blockquote>
<p>The MCP2221A has a built-in USB 2.0 full-speed transceiver internally connected to the USB module.</p>
</blockquote>
<p>Since I am using USART communication, the datasheet states the chip identifies itself as a CDC(communication device class) USB device, also mentioning that it contains an internal USB <em>transceiver</em>. Does this mean that serial data can be sent back to the computer and read via a serial port(e.g. from the Arduino IDE)? The datasheet does not state much about sending data.</p>
| Can the MCP2221 send serial data through a USB serial link? | 2024-03-14T05:29:58.343 |
706014 | |voltage|power|current|circuit-design|resistance| | <p>Let's take two circuits equivalent to yours, building the resistive loads from smaller components. One is as you describe, 30 V into 1 Ω, the other is similar, 90 V into 9 Ω instead of your 100 V into 11 Ω, and compare them.</p>
<p><img src="https://i.stack.imgur.com/413vC.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f413vC.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>As you can see, each component resistor has 30 V across it, 10 A through it, and is dissipating 300 W. In the left hand circuit, they are connected in parallel, and you have a low impedance supply (low voltage high current). In the right hand circuit, they are in series, and the supply is higher impedance (high voltage low current). The first circuit will need much thicker cables to connect to it than the second.</p>
<p>This general idea of the same power, but different impedance, can be found cropping up everywhere we want to shift power over a distance. If you have several solar panels on your roof for instance, a series connection will mean you can use lighter gauge wire to conduct the power down to your inverters.</p>
<p>You can raise voltage and reduce current until the costs of insulating the high voltage becomes prohibitive in your particular application. In plastic insulated cable, anything up to 300 V or so is practically free, as if the insulation is physically strong enough to survive handling, it's good for a few hundred volts. Above that, you need to work on the insulation, the extreme being the 100 kV and higher on overhead high voltage lines, where the huge distances provide the incentive for working with very high voltages.</p>
| <p>I have 2 circuits with the same power (900W), could anyone please explain the big different between these two? Circuit one has 30V, 1 Ohm, 30A and 900W of power. Circuit 2 100V, 11 ohms, 9,09A, 900-909W. Thanks.</p>
| Same power in the circuit comparison | 2024-03-14T12:28:49.723 |
706028 | |pcb-design|temperature|thermal|pcb-assembly|conformal-coating| | <p>From the (inactive) <a href="https://www.simtalltd.com/wp-content/uploads/2019/11/MIL-I-46058C.pdf" rel="nofollow noreferrer">MIL spec</a>:</p>
<blockquote>
<p>6.1.6 Operating temperature. These coatings are normally useful at temperatures up to 125°C (200°C for type SR), but the useful life of
the deposited coating can be extended by reducing the operating
temperature. The effect of a humid environment is to reduce the useful
life.</p>
</blockquote>
<p>SR is silicone, and yours is acrylic.</p>
<p>Thermal shock (specified in <a href="https://nepp.nasa.gov/DocUploads/1F6AB74B-4517-4AD0-A34813268E75B8EB/MIL-STD-202.pdf" rel="nofollow noreferrer">another standard</a>) is a 50 cycle test with with exposure at temperature extremes long enough to guarantee it has stabilized (see the table, it depends on mass of the item, as low as 15 minutes), so not very representative of possible deterioration at high temperature:</p>
<p><a href="https://i.stack.imgur.com/wVOa9.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wVOa9.png" alt="enter image description here" /></a></p>
| <p>We are using this conformal coating on our design, <a href="https://chasecorp.com/humiseal1/wp-content/uploads/sites/12/2018/10/1B73-EPA-TDS-1-1.pdf" rel="nofollow noreferrer">HumiSeal 1B73EPA</a>.
However, it does not state in the datasheet the continuous operating temperature for the coating, only the thermal shock test temperature:
<a href="https://i.stack.imgur.com/VRFML.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VRFML.png" alt="enter image description here" /></a></p>
<p>From my understanding, the operating temperature of a product is determined in a similar fashion. Is it safe to treat the stated thermal shock temperature as its continuous operating temperature?</p>
| Can I treat the thermal shock test temperature as the continuous operating temperature of a conformal coating? | 2024-03-14T14:36:50.737 |
706029 | |stm32|adc|dac| | <p>Lot's of problems here show up in your edit.</p>
<p>The first is how you index into your array. You define the array to have 100 elements, and then you try to assign values to the 2048th element (max). Next, you lose a lot of precision in your phase value, which is defined to be an integer, so phase2= PI/2 = 1</p>
<p>Start by replacing i in indices with [i%100], use an additional modulo operator to make sure the addition of phase2 doesn't overflow your array size, and make phase2 a float or double.</p>
| <p>I generated according to <a href="https://www.st.com/resource/en/application_note/cd00259245-audio-and-waveform-generation-using-the-dac-in-stm32-microcontrollers-stmicroelectronics.pdf" rel="nofollow noreferrer">this document</a> two same sine waves (on two pins of the microcontroller DAC). I display them on the oscilloscope and obviously overlap.
Now I would like to offset the first one by 90 degrees from the second one. I tried doing this but nothing happens, they overlap on the oscilloscope:</p>
<p><em>outside the main</em>
<a href="https://i.stack.imgur.com/t1RB3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/t1RB3.png" alt="enter image description here" /></a></p>
<p><em>inside the main</em>
<a href="https://i.stack.imgur.com/pzUgZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pzUgZ.png" alt="enter image description here" /></a></p>
<p>The problem is that I can't relate the stm32 DAC formula used back to the <a href="https://www.bing.com/images/search?view=detailV2&ccid=ZJUDZDK4&id=69D4141BA2FBD34AA1A6FE88FE34912087D9CA09&thid=OIP.ZJUDZDK4WVPrKMrE9JrVGwHaEK&mediaurl=https%3A%2F%2Fi.ytimg.com%2Fvi%2FBXi4_bK7zTQ%2Fmaxresdefault.jpg&cdnurl=https%3A%2F%2Fth.bing.com%2Fth%2Fid%2FR.6495036432b85953eb28cac4f49ad51b%3Frik%3DCcrZhyCRNP6I%252fg%26pid%3DImgRaw%26r%3D0&exph=720&expw=1280&q=sinwave%20formula&simid=608039938111662389&FORM=IRPRST&ck=AD1133520EA7104F2315F91CA857A143&selectedIndex=1&itb=0&ajaxhist=0&ajaxserp=0" rel="nofollow noreferrer">classical sine wave formula</a> ... I don't understand where to add the phase shift.</p>
| STM32 DAC sinewave generation | 2024-03-14T14:40:36.130 |
706031 | |mosfet|switching|windturbine| | <p>I suggest investigating using a simple relay with an N.C. contact.</p>
<p>In any case if there is no voltage available to work with (which itself could be used to control a MOSFET or whatever) then the load resistor is not going to do anything. Maybe you need a circuit that uses that as a supply and your control signal turns it off.</p>
<p>If you insist on using depletion MOSFETs, the lowest value I see for an adequately rated for breakdown voltage and available part for Rds(on) with 0V is 1.5Ω (more than double that when hot!), so it's not a very good switch and your 12A current will be too high for a single part to handle. It's not a ridiculous approach but it would require some means of sharing current between a number of devices with the available parts I can see. The parts would also be single-sourced which may be a concern for non-technical reasons.</p>
<p>You drive an N-channel depletion mode MOSFET off by giving it a negative gate voltage wrt source. That's not hard to do if you have a power source. A charge pump or DC-DC module can generate the negative voltage.</p>
| <p>I recently asked a question to do with dump load resistors for wind turbines see link:
<a href="https://electronics.stackexchange.com/questions/704564/mosfet-driving-for-a-dump-load-resistor-within-a-wind-turbine/704956#704956">MOSFET Driving for a Dump Load Resistor within a wind turbine</a>
General Specs:
6kW Wind turbine
Dump load: 500 V
Dump load Resistor :42 Ohms
See circuitry and other link for more info:
<a href="https://i.stack.imgur.com/ixtYY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ixtYY.png" alt="switching circuit" /></a>
<a href="https://i.stack.imgur.com/S3ThR.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/S3ThR.png" alt="Full circuit" /></a></p>
<p>The dump will have two main functions the first is to manage overvoltage and divert the load when over 500V is seen.
There is now a secondary function that in the event of a grid outtage (and the MOSFETs can't be powered) the load will default to the dump load resistor and take all of the load protecting the inverter. Given this secondary function I am starting to lean towards the use of a depletion type MOSFET although I know this is not common within industry. Furthermore, this would also mean that the MOSFETs would have to be specced to handle higher voltages. I'm also unsure how a MOSFET driver works with a depletion type MOSFET?</p>
<p>I am not keen on powering the MOSFETs from the wild AC as this would add a lot more complexity.
Can i also just put a circuit breaker further up the system to protect the rectifier?</p>
<p>Any advice on how on earth I go about this would be greatly appreciated</p>
| Depletion type MOSFET for dump load resistors in wind turbines | 2024-03-14T14:46:17.397 |
706048 | |arduino|i2c|oled|ssd1306| | <p>You could try removing one of the resistors at a time to see if the address changes. The problem is that if one of those resistors does set the SA0 pin to low or high, removing the resistor leaves the SA0 pin floating, as there is no mention of the chip having internal pull-ups or pull-downs on it, so the SA0 pin has to be pulled to opposite state to what it was.</p>
<p>But if there is no documentation of what you bought, you cannot know if there even is a way to change the address.</p>
<p>The address pin of the chip could be fixed and unchangeable on the PCB.</p>
<p>However, it might be irrelevant to be able to change the address.</p>
<p>As there is only one address pin, you can have only two displays on same bus segment.</p>
<p>So you need a bus mux for three displays or more than one I2C bus for up to 4 displays.</p>
<p>However, if one of the pins is SA0, you can use MCU IO pins to control SA0 pin on each or one display, so just set which two displays are at same address and which one display is at unique address to access it.</p>
| <p>Hey all I've been looking for any information that would allow me to change the I2C address for the 0.91" OLED 128x32 module:</p>
<p><a href="https://i.stack.imgur.com/jNJsP.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jNJsP.jpg" alt="enter image description here" /></a></p>
<p>So far I have only found mention of the I2c address change <a href="https://www.reddit.com/r/AskElectronics/comments/19fg6sg/how_do_i_change_the_address_of_this_i2c_oled/" rel="nofollow noreferrer">here</a> but that does not seem to be a label on the back of my module (D/C#)?</p>
<p>Here is the <a href="https://www.digikey.com/htmldatasheets/production/2047793/0/0/1/ssd1306.html" rel="nofollow noreferrer">datasheet</a> and I can not seem to find anything on changing the address but that post above mentioned page 15 of the datasheet:</p>
<p><a href="https://i.stack.imgur.com/5KMd1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5KMd1.png" alt="enter image description here" /></a></p>
<p>But again, those label names do not match up with my module. I have 3 of these I need to hookup to my Arduino Pro Micro so I know for certain they will all be the same I2C address. Trying to accomplish this without the need to get a I2c multiplexer.</p>
| SSD1306 128x32 OLED change I2C address | 2024-03-14T17:07:23.640 |
706049 | |circuit-analysis|zener|solenoid|vintage| | <p>Check the <a href="https://www.ti.com/lit/ds/symlink/sn7407.pdf?ts=1710363143020" rel="nofollow noreferrer">7407 datasheet</a>: it is an open-collector buffer with high-voltage output, rated up to 30V.</p>
<p>The supply shown is 40V, however. This would violate the rating.</p>
<p>By connecting a >10V zener in series, the logic-high rating can be respected, while still driving the node solidly low. The logic output can saturate to <1V when low, here putting about 5.5mA through the resistor; in fact, V<sub>OL</sub> for 16mA is max. 0.4V so we can be sure it's at least this well saturated.</p>
<p>Note a discrepancy: a zener diode only has significant voltage drop when there's some current flowing; while this can be quite small currents (~µA), it's decidedly nonzero. Does this cause the transistor to turn on when it shouldn't? Fortunately, the <a href="https://www.mouser.com/datasheet/2/149/TIP127-890152.pdf" rel="nofollow noreferrer">TIP127</a> includes base-emitter resistors, ensuring that a small output-high leakage doesn't turn it on.</p>
<p>That said, the I<sub>OH</sub> maximum of 0.25mA well exceeds the TIP127's input sink capacity of, say, 0.6V / 8k = 75µA; I would rather see an external pull-up resistor here. Presumably, the real I<sub>OH</sub> doesn't actually get that high, or not at modest temperatures anyway, but that's the limit given in the datasheet and they are allowed to sell you a part with performance that bad; it would be annoying to say the least, to discover a shipment of such outliers in production.</p>
<p>They could've also implemented the level-shifting capability by adding a cascode transistor (right):</p>
<p><img src="https://i.stack.imgur.com/SvI5J.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fSvI5J.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>or as an inverting stage (left), both of which receive a logic-level input, no buffering required.</p>
<p>These options may've been overlooked, or ignored for various reasons -- perhaps transistors were more expensive (component plus assembly costs) at the time. They're pretty close in cost these days, and with SMTs being pervasive, either solution would be as compact as it would be effective.</p>
<p>Nowadays, we might also consider an IC for the task: high-side load switches are common for automotive use, with robust capabilities, and often handy features like current sensing. Not that these features would've been necessary for a printer, of course, but the electrical requirements of automotive fuel injectors for example are very similar to those of impact pin/hammer type printers back in the day.</p>
| <p>I am debugging an ancient little impact printer and in my probing have found an unexpected voltage level. I'd like to understand this part of the circuit, why it's constructed as it is, and whether what I'm looking at is part of what's wrong, or as expected:</p>
<p><a href="https://i.stack.imgur.com/iJDmI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/iJDmI.png" alt="enter image description here" /></a>
<em>(Detail from the schematic <a href="https://deramp.com/swtpc.com/PR_40/PR40_Schematic.pdf" rel="nofollow noreferrer">here</a>)</em></p>
<p>The printer has a number of little solenoids and one of these driver sections for each one, that switches on the 40VDC rail to the coil as shown. The input from the left is a TTL level signal indicating whether the solenoid should be switched on or off. The buffer shown is a 7407.</p>
<p>The transistor is a TIP127, and the diode is a 15V zener. (Resistor is 2.7K fwiw).</p>
<p>When the printer has power, the 40VDC rail is at about 41V (ok). But when I measure the voltage at the bottom of that resistor, it's about 16V. (If I pull the 7407 out it's still 16V, which I assume is because the '07 was in high-z state.)</p>
<p>My questions are:</p>
<ol>
<li>What is the purpose of the zener diode in this configuration? My first thought is that it's for some sort of back flow protection of the TTL circuit, but then I don't expect it to do anything (except drop .7V) in normal operation.</li>
<li>Why am I seeing 16V at the bottom of that resistor? I'm not assuming something is "wrong" here but I don't follow how the PNP transistor plus the zener is resulting in this voltage sitting there when the coil is doing nothing-- my sense would be that a TTL level voltage (only) should be turning the transistor on and off as a switch for the coil circuit. Since there are seven of these little compositions, and they all seem to show similar values, I'd be surprised if something's wrong with all of them, but I guess not impossible.</li>
</ol>
<p>I'm trying to understand here more than I'm trying to debug as such, so thank you for explanations of what this is trying to achieve!</p>
| Why is this zener in series at the base of transistor, and has something failed? | 2024-03-14T17:13:31.683 |
706056 | |current|datasheet| | <p>All this really means is that the switch isn't quite bidirectional. To have it act as a switch where currents on both sides of the closed switch are same:</p>
<p><strong>Z must be no lower than 0.4V below Y when the switch is <em>closed</em></strong>.</p>
<p>Or</p>
<p><strong>Current must flow into the Z terminal, and out of the Y terminal</strong>.</p>
<p>That is, when there's a load on the switch heavy enough to drop more than 0.4V across the switch, the current must be flowing into the Z terminal. If the current flows <em>out</em> of the Z terminal, then as soon as Z is 0.4V lower than Y terminal (or more), the Z current will be shared between Y and VCC. This breaks the assumption of "normal" behavior similar to that of a mechanical switch.</p>
<p>A mechanical switch would have no preference which way the current flows.</p>
| <p>From the <a href="https://assets.nexperia.com/documents/data-sheet/74HC_HCT4066.pdf" rel="noreferrer">Nexperia 74HC4066 datasheet</a>, page 4, table 4, footnote 1, what does it mean:</p>
<blockquote>
<p>To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V</p>
</blockquote>
<p><a href="https://i.stack.imgur.com/n7YVS.png" rel="noreferrer"><img src="https://i.stack.imgur.com/n7YVS.png" alt="table 4 and footnotes from Nexperia 74HC4066 datasheet" /></a></p>
<p>It is not clear to me.</p>
| I do not understand behavior of current in 74HC4066 | 2024-03-14T17:38:22.157 |
706069 | |operational-amplifier| | <p>I used this equivalent circuit to find open-loop gain.</p>
<p><img src="https://i.stack.imgur.com/u7DKC.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fu7DKC.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>Neglect <span class="math-container">\$r_{o1}\$</span> for this case.</p>
<p><span class="math-container">$$ A_{OL} = \frac{V_{OUT}}{V_{IN}}=\frac{r_{o3}}{(R_1||R_2)\: + \frac{1}{g_{m1}}}\times \frac{\left((R_1 + R_2)||r_{O2}||r_{O4} \right)}{\frac{1}{g_{m2}}}$$</span></p>
<p>Therefore, the closed-loop gain is</p>
<p><span class="math-container">$$A_{CL} = \frac{A_{OL}}{1 + A_{OL}\beta} = $$</span></p>
<p><span class="math-container">$$ \large A_{CL} = \frac{\frac{r_{o3}}{(R_1||R_2)\:\frac{1}{g_{m1}}}\times \frac{\left((R_1 + R_2)||r_{O2}||r_{O4} \right)}{\frac{1}{g_{m2}}}}{1 + \frac{r_{o3}}{(R_1||R_2)\:\frac{1}{g_{m1}}}\times \frac{\left((R_1 + R_2)||r_{O2}||r_{O4} \right)}{\frac{1}{g_{m2}}} \times \frac{R_1}{R_1 + R_2}}$$</span></p>
<p>The values matter because we can compare the results and also justify the simplifications we made during the AOL derivation.</p>
| <p>The following is a question from 8.18 in <em><a href="https://electrovolt.ir/wp-content/uploads/2014/08/Design-of-Analog-CMOS-Integrated-Circuit-2nd-Edition-ElectroVolt.ir_.pdf" rel="nofollow noreferrer">Design of Analog CMOS Integrated Circuit</a></em>, page 342.</p>
<p>Consider the circuit in this following figure. <span class="math-container">\$(\frac{W} {L})_{1-4} =\frac{50} {0.5} \$</span>, <span class="math-container">\$|{I_D}_{1-4}| = 0.5\ \mathrm{mA}\$</span>, <span class="math-container">\$R_2 = 3\ \mathrm{k\Omega}\$</span>.</p>
<p><a href="https://i.stack.imgur.com/tPbXx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tPbXx.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/Ffkc3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Ffkc3.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/zsN7u.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zsN7u.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/yqqGP.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yqqGP.png" alt="enter image description here" /></a></p>
<p>Between M1 and M3,</p>
<p><span class="math-container">$$(V_{in} - V_F) g_{m1} + \frac{V_x} {r_{o1}} = - \frac{V_x} {r_{o3}} $$</span></p>
<p><span class="math-container">$$\Rightarrow \frac{V_x} {V_{in} - V_F} = -g_{m1} (r_{o1} \parallel r_{o3})$$</span></p>
<p>Between M2 and M4,
<span class="math-container">$$V_x g_{m2} + \frac{V_{out}} {r_{o2}} = -\frac{V_{out}} {r_{o4}}$$</span>
<span class="math-container">$$\Rightarrow \frac{V_{out}} {V_x} = -g_{m2} (r_{o2} \parallel r_{o4})$$</span></p>
<p><span class="math-container">$$A_{v,open} = \frac{V_{out}} {V_{in} - V_F} =
\frac{V_{out}} {V_x} \frac{V_x} {V_{in} - V_F}
= g_{m1} g_{m2} (r_{o1} \parallel r_{o3}) (r_{o2} \parallel r_{o4})$$</span></p>
<p><span class="math-container">$$\beta = \frac{R_1} {R_1 + R_2}$$</span></p>
<p><span class="math-container">$$A_{v,close} = \frac{A_{v,open}} {1 + A_{v,open} \beta} =
\frac{g_{m1} g_{m2} (r_{o1} \parallel r_{o3}) (r_{o2} \parallel r_{o4})} {1 + g_{m1} g_{m2} (r_{o1} \parallel r_{o3}) (r_{o2} \parallel r_{o4}) \frac{R_1} {R_1 + R_2}}$$</span></p>
| Is my equivalent op-amp for this circuit correct? | 2024-03-14T19:06:57.990 |
706072 | |sensor|i2c|ti-ccstudio| | <p>It's particularly visible in the last osciloscope trace - you can see that the rising edges are very rounded, and don't actually reach their full height. This is generally because either the bus capacitance is too high, or more likely the pull-up resistor values are too weak. Bus capacitance will increase with each device you add.</p>
<p>You mentioned a few pull-up values, and the schematic shows 10kΩ... Try a lower value, the lower the better... 1.8kΩ should still be safe.</p>
<p>The open-drain nature of I2C means that the falling edges are good and sharp / fast, but the rising edges are entirely under the control of the pull-up resistor.</p>
<p>The following annotated version of your photo shows the "high" level (looks like ~3.3v, drawn in red)... <em>none</em> of the clock or data signals reach this level, and likely only briefly reach above the input threshold value for a "high" signal.</p>
<p>Additionally, you can see the significant delay in the signal (drawn in green).</p>
<p><img src="https://i.stack.imgur.com/QcTm4.jpg" alt="annotated version of OP's photo" /></p>
<p>The <a href="https://www.ti.com/lit/gpn/msp430fr2433" rel="nofollow noreferrer">MSP430FR2433 datasheet</a> outlines the characteristics of the part - see Section 5.11.4. This lists the positive going threshold for VCC=3v at somewhere in the range VCC×0.45 to VCC×0.75 (you're probably using 3.3v, but this should extrapolate apprixmately enough).</p>
<p>The SDA signal probably is crossing this threshold, but it's doing so <em>far</em> too late. Note how the working trace is much more "<em>square</em>".</p>
<p><img src="https://i.stack.imgur.com/mFDsa.png" alt="excerpt of the datasheet, showing the positive input threshold voltage at between VCC0.45 to VCC0.75" /></p>
<p>To further emphasise the point - as pointed out by @Jens in the comments, the "<em>working</em>" trace has a clock speed of ~350 kHz, but the "<em>not working</em>" has a clock speed of only ~225 kHz... if the code is indeed identical as you claim, then this is quite likely due to the controller percieving "<em>clock stretching</em>" due to these slow rising edges.</p>
<hr />
<p>Edit: You've mentioned that you have 16x devices on this bus, which may be accounting for the extra capacitance... It could be worth looking into a <a href="https://www.analog.com/en/resources/design-notes/risetime-accelerator-circuit-for-2wire-bus-applications.html" rel="nofollow noreferrer">"<em>rise time accelerator</em>"</a>, which will help to bring the lines back up more quickly, without making the pull-up resistors too stiff.</p>
<p><img src="https://i.stack.imgur.com/JIebr.png" alt="screenshot showing an accelerated rise time, vs an unaccelerated rise" /></p>
| <p>Part number: INA228 from Texas Instruments<br />
MCU: msp430fr2433</p>
<p>I initially brought a current sensor from Adafruit that used an INA228 chip. After some challenges, I managed to get the I2C communication going and was able to read data from the registers. I cleaned up my code and made a custom board that has 16 of these sensors.</p>
<p>I only soldered one of the INA 228 sensors on my custom board and am trying to see if I can read the registers using the same code.</p>
<p>For some reason, my code works on the Adafruit sensor but not on my custom board. Not sure why. I scoped the I2C lines using a logic analyzer. I have attached the captures to this message and also listed the data being transmitted below. Can anybody please explain what I missed on my custom board here?</p>
<p>Working data stream: Start -> 0x40 Write (slave address) -> ACK -> 0x06 (temp register) -> Stop || Start -> 0x40 Read -> ACK -> 0x0B -> ACK -> 0xC8 -> NAK -> Stop</p>
<p>Here clearly the data from the register is 0x0b, 0xC8. This translates roughly to 23.56°C. This works. No issues (I think).</p>
<p>Not-working data stream: Start -> 0x40 Write -> ACK -> Stop || Start -> 0x40 Read -> ACK -> 0x00 -> ACK -> 0x00 -> NACK -> Stop</p>
<p>|| represents a small pause.</p>
<p>Why is the master not writing 0x06 (register to read) in the custom board case when I am using the same code? Why is the SDA line always low? Is this a hardware or firmware issue?</p>
<p>Not-working logic analyzer capture:
<a href="https://i.stack.imgur.com/opLdL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/opLdL.png" alt="enter image description here" /></a></p>
<p>Working logic analyzer capture:
<a href="https://i.stack.imgur.com/WuYG1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/WuYG1.png" alt="enter image description here" /></a></p>
<p>Circuit:
<a href="https://i.stack.imgur.com/pghhV.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pghhV.png" alt="enter image description here" /></a></p>
<p>Adafruit sensor: <a href="https://www.adafruit.com/product/5832?gad_source=1&gclid=Cj0KCQjwwMqvBhCtARIsAIXsZpY1pI2T6KqKHZLo4Frs4fKL4nHCDFTCHBI77ZlCJFueQMTt8FbGWfUaAqABEALw_wcB" rel="nofollow noreferrer">Adafruit sensor</a></p>
<p>Working scope captures:
<a href="https://i.stack.imgur.com/DgzDm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DgzDm.png" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/UKOkB.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/UKOkB.jpg" alt="enter image description here" /></a></p>
<p>Not working scope captures:
<a href="https://i.stack.imgur.com/AQX8H.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AQX8H.png" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/00aRm.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/00aRm.jpg" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/V0Fgm.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/V0Fgm.jpg" alt="enter image description here" /></a></p>
<p>Note:
The working board had 4.7 kΩ pull-up resistors. I tried 4.7 kΩ, 24 kΩ, and 2.4 kΩ pull-up resistors, but none of them worked so far. I'm not sure if it's even a pull-up resistor thing.</p>
| INA228: My I2C code works on the dev board but doesn't on my custom board | 2024-03-14T19:31:37.763 |
706082 | |circuit-analysis|rf|frequency|radio|modulation| | <p>We can understand the circuit as a negative [incremental] resistance, i.e., as voltage changes by some small increment from quiescent, current varies in the opposite direction.</p>
<p>I have labeled the node of interest <code>VC</code>. My model may not be exactly the same as yours (I'm using the one published by onsemi <a href="https://www.onsemi.com/products/discrete-power-modules/general-purpose-and-low-vcesat-transistors/BC547B#technical-documentation" rel="nofollow noreferrer">here</a>, "BC547B Lib Model"), but to the extent I can adjust values to observe various behavior, anything will do, more or less.</p>
<p><a href="https://i.stack.imgur.com/MRtWt.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MRtWt.png" alt="enter image description here" /></a></p>
<p>Notable modifications:</p>
<ul>
<li>I have changed the bias network to a resistor divider. This allows more specificity on setting the bias. The values shown right now are equivalent (R3 approx. infinite), but I would recommend e.g. 10k and 4.7k. R4 is also rather small for a transistor of this rating.</li>
<li>C4 is added. Typically a common-base Colpitts oscillator like this needs a well-defined capacitor divider from collector to emitter to ground.</li>
<li>The resonant tank is removed, replaced with ideal bias tee L1-C1. This node is being probed with the AC source V2, of 50 ohm source impedance.</li>
</ul>
<p><a href="https://i.stack.imgur.com/8LFLc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8LFLc.png" alt="enter image description here" /></a></p>
<p>Here is the plot, showing the impedance looking into the <code>VC</code> node, from V2. We observe negative resistance from about 20MHz up, indicating instability, and ensuing oscillation, at least as long as the attached LC resonator has low enough losses not to swamp this negative resistance (the parallel combination must still be negative).</p>
<p>However, we also see reactance, which is dominant over much of the range, and negative indicating capacitance. Which we expect, given that C2 is mostly shunting the <code>VC</code> node, and the collector has capacitance (the model specifies about 4pF zero-bias, though it will be more like 1-2pF at this bias voltage).</p>
<p>In particular, at 500MHz, the resistance and reactance are -7.6 and -28.67j ohms, respectively. This is equivalent to a 1.11pF capacitor in series with -7.6Ω.</p>
<p>Thus, connecting an LC resonator in parallel with this node, is connecting an additional 1.11pF with it, shifting its resonant frequency lower than that given by the explicit L and C placed there.</p>
<p>If we change L1 to 91nH and switch to transient analysis, we find it does in fact oscillate, but that the frequency of oscillation is around 200MHz. It seems the Nyquist criteria are satisfied at a lower frequency, and this makes more sense, as C2 + Ccb dominates, and we would expect 11pF and 91nH to resonate at 160MHz; it seems neither simplified calculation is quite an adequate prediction here, but a yet more nuanced calculation would notice that Cbe is in series with C2.</p>
<p>As for better values, if we change R1 = 10k, R3 = 4.7k, R4 = 330Ω and C2 = 2.2pF, we get -17Ω of negative resistance at 500MHz, a clear improvement.</p>
<p>Mind, it's not clear that the real device will even oscillate at this frequency at all: there are real device effects not modeled by SPICE, not to mention package and layout strays, which affect operation at this frequency. A MMBTH10, MMBT5179, BF193, etc. would be vastly preferable to BC547.</p>
<p>Making some more adjustments, these values seem reasonable:</p>
<p><a href="https://i.stack.imgur.com/v0YUO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/v0YUO.png" alt="enter image description here" /></a></p>
<p>Note the addition of a step pulse to ensure oscillator startup.</p>
<p>Transient response:</p>
<p><a href="https://i.stack.imgur.com/idUWx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/idUWx.png" alt="enter image description here" /></a></p>
<p>Zoom:</p>
<p><a href="https://i.stack.imgur.com/XXvfx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XXvfx.png" alt="enter image description here" /></a></p>
<p>You will have a hard time constructing an accurate 23nH inductance; more likely a shorted-stub resonator will be more effective.</p>
<p>Note that supply voltage modulation varies device capacitance and bias current, varying frequency in turn. A stable oscillator cannot be direct modulated in this way. It's not clear what your aims are, but it won't work for precisely defined, narrowband UHF channels, at least.</p>
<p>These results are from a more-or-less normal XSPICE based engine, with settings:</p>
<pre><code>.OPTIONS ABSTOL=1E-9 CHGTOL=1E-9 GMIN=1E-8 ITL4=5000 PIVTOL=1E-9 RELTOL=0.0001
.OPTIONS RSHUNT=1E8 TRTOL=4 METHOD=GEAR MAXORD=2
.TRAN 1E-10 2E-7 0 1E-10
</code></pre>
<p>2nd order GEAR, and max timestep of 100ps, are probably the most influential settings here. Oscillation amplitude and stability are strongly affected by numerical resolution, and I wouldn't expect that these values are representative, even if the device model is accurate at this frequency. YMMV with default (or modified) LTSpice settings.</p>
| <p>I am developing an RF circuit for 503.3 MHz. It will be an AM RF transmitter. The LC circuit I built into this circuit consists of L = 0.1 μH and C = 1 pF.</p>
<p>The carrier frequency which carries the message is lower than the resonant frequency. I tested the circuit in LTspice and everything is as it should be, but FFT says the carrier frequency is lower.</p>
<p>Does it matter that the frequencies are not identical when transmitting a message using AM modulation? If the answer is positive, how can I avoid it?</p>
<p>Below is a picture of the circuit without carrying a message. The antenna is between C3 and the L1-C1 tank circuit.</p>
<p><a href="https://i.stack.imgur.com/06qUf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/06qUf.png" alt="circuit" /></a></p>
<p>LTspice .asc file</p>
<pre><code>Version 4
SHEET 1 880 680
WIRE 528 -96 224 -96
WIRE 224 -64 224 -96
WIRE 224 -64 112 -64
WIRE 320 -64 224 -64
WIRE 224 0 224 -64
WIRE 320 0 320 -64
WIRE 112 96 112 -64
WIRE 224 96 224 80
WIRE 304 96 224 96
WIRE 320 96 320 64
WIRE 320 96 304 96
WIRE 528 96 528 -96
WIRE 304 112 304 96
WIRE 384 112 304 112
WIRE 304 128 304 112
WIRE 384 144 384 112
WIRE 240 176 112 176
WIRE 304 256 304 224
WIRE 384 256 384 208
WIRE 384 256 304 256
WIRE 112 288 112 176
WIRE 304 288 304 256
WIRE 112 400 112 352
WIRE 224 400 112 400
WIRE 304 400 304 368
WIRE 304 400 224 400
WIRE 224 464 224 400
WIRE 528 464 528 176
WIRE 528 464 224 464
WIRE 224 496 224 464
FLAG 224 496 0
SYMBOL cap 304 0 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL ind 208 -16 R0
SYMATTR InstName L1
SYMATTR Value 0.1µ
SYMBOL npn 240 128 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 288 272 R0
SYMATTR InstName R1
SYMATTR Value 33
SYMBOL res 96 80 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL cap 96 288 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 368 144 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL voltage 528 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
TEXT 94 520 Left 2 !.tran 10u
</code></pre>
| Must LC resonant frequency be identical to oscillating frequency in RF circuit? | 2024-03-14T20:32:59.920 |
706084 | |circuit-analysis|current|inductor| | <p>The unknown constants present in the homogeneous solution must be determined when the initial conditions for <span class="math-container">\$t=0_+\$</span> <strong>are satisfied by the complete</strong> response <span class="math-container">\$i(t)=i_p(t)+i_h(t)\$</span>.</p>
<p>Your particular solution <span class="math-container">\$i_p(t)=\frac{V_s}{R}\$</span> is correct (also called <em>forced response</em>). Note that, although there are numerous ways to find the homogeneous solution <span class="math-container">\$i_h(t)\$</span> (also called <em>natural response</em> or <em>complementar</em> one), it's still possible to modify your method, just leaving the calculation of unknow constant for later:</p>
<p><span class="math-container">$$\int_{}{}\frac{di}{i} = -\int{}{}\frac{R}{L} dt$$</span></p>
<p><span class="math-container">$$\ln(i_h) =-\frac{R}{L}t +\mathbb{C}$$</span></p>
<p><span class="math-container">$$i_h(t)=e^{-\frac{R}{L}t+\mathbb{C}}$$</span></p>
<p><span class="math-container">$$i_h(t)=e^{-\frac{R}{L}t}e^\mathbb{C}$$</span></p>
<p>Making <span class="math-container">\$K=e^\mathbb{C}\$</span>:</p>
<p><span class="math-container">$$i_h(t)=Ke^{-\frac{R}{L}t}$$</span></p>
<p>Then, the complete solution is:</p>
<p><span class="math-container">$$i(t)=i_p(t)+i_h(t)$$</span></p>
<p>Or:</p>
<p><span class="math-container">$$i(t) = \frac{V_s}{R} + Ke^{^-\frac{R}{L}t}$$</span></p>
<p>As I mentioned earlier, the constant <span class="math-container">\$K\$</span> is determined when the initial conditions (<span class="math-container">\$t=0_+\$</span>) are satisfied by the <strong>complete solution</strong>:</p>
<p><span class="math-container">$$i(0_+)=\frac{V_s}{R} + K=-I_0$$</span></p>
<p><span class="math-container">$$K=-\frac{V_s}{R}-I_0$$</span></p>
<p>Finally:</p>
<p><span class="math-container">$$i(t)=\frac{V_s}{R} - \left( \frac{V_s}{R}+I_0 \right) e^{-\frac{R}{L}t}$$</span></p>
<p>Valid for <span class="math-container">\$ 0 \lt t \leqslant \infty \$</span>.</p>
<p><strong>----------- Detailed explanation --------------</strong></p>
<p>There are several ways to express the complete response of a system, typically given by the sum of two separate responses. The best known are:</p>
<p><strong>(1) Natural (homogeneous) solution + Forced (particular) Solution.</strong></p>
<p><strong>(2) Zero-State Response + Zero-Input Response.</strong></p>
<p><strong>(3) Transient Response + Steady-State Response.</strong></p>
<p>For a more detailed discussion, see my other answer (related with the subject) here:
<a href="https://electronics.stackexchange.com/a/695628/22676">https://electronics.stackexchange.com/a/695628/22676</a></p>
<p>Your intention was to use the form <strong>(1)</strong>, which is more used by math people, but it is not widely used in modern electrical engineering, as it is based on initial conditions <span class="math-container">\$t=0_+\$</span>. Currently, form <strong>(2)</strong>, which is based on initial conditions <span class="math-container">\$t=0_-\$</span>, is preferred, since it conforms to the solution given by the unilateral Laplace Transform (with initial conditions <span class="math-container">\$t=0_-\$</span>). Also note that, for <span class="math-container">\$t=0_-\$</span>, <strong>the input did not yet exist</strong>. Even so, I tried to give an answer that adapted your solution.</p>
<p>In order to get the complete solution it's enough to use the method of separation of variables:</p>
<p><span class="math-container">$$L\frac{di}{dt}+Ri=V_s$$</span></p>
<p><span class="math-container">$$\frac{diL}{V_s-Ri}=dt$$</span></p>
<p>I'm going to use initial conditions in <span class="math-container">\$t=0_-\$</span>. Notice that, in this case, <span class="math-container">\$i(0_-)=i(0_+)=-I_0\$</span>:</p>
<p><span class="math-container">$$L\int_{i(0_-)}^{i}\frac{d \varsigma}{V_s-R \varsigma}=\int_{0}^{t}d \tau$$</span></p>
<p><span class="math-container">$$-\frac{L}{R} \left [ \ln \left ( \left | V_s-R \varsigma \right| \right ) \right ]^{i}_{i(0_-)}= t$$</span></p>
<p><span class="math-container">$$-\frac{L}{R} \left [ \ln (V_s-Ri) - \ln(V_s-Ri(0_-)) \right ]= t$$</span></p>
<p><span class="math-container">$$\ln(\frac{V_s-Ri}{V_s-Ri(0_-)})=-\frac{R}{L}t$$</span></p>
<p>So, when replacing <span class="math-container">\$i(0_-)=-I_0\$</span>, we can get the form <strong>(1)</strong> as shown below. Remember that, the natural solution (or homogeneous one) brings together the characteristic modes (system poles).</p>
<p><span class="math-container">$$i(t)=\underbrace{\frac{V_s}{R}}_{Forced \space solution} - \underbrace{\left( \frac{V_s}{R}+I_0 \right) e^{-\frac{R}{L}t}}_{Natural \space solution}$$</span></p>
<p>Valid for <span class="math-container">\$ 0 \lt t \leqslant \infty \$</span>.</p>
<p>Through a simple algebric handling, we can get the form <strong>(2)</strong>:</p>
<p><span class="math-container">$$i(t)=\underbrace{\frac{V_s}{R}\left ( 1-e^{-\frac{R}{L}t} \right)}_{Zero-State \space resp.} - \underbrace{I_0 e^{-\frac{R}{L}t}}_{Zero-Input \space resp.}$$</span></p>
<p>Valid for <span class="math-container">\$ 0 \lt t \leqslant \infty \$</span>.</p>
<p><strong>In summary:</strong> You ended up mixing the two types of solutions. In fact, your original method</p>
<p><span class="math-container">$$\int_{i(0)}^{i_h} \frac{di}{i} = -\int_{0}^{t} \frac{R}{L} dt$$</span></p>
<p>is related to get the <strong>Zero-Input Response</strong>, rather than the <strong>homogeneous solution</strong> (remember the difference between initial conditions <span class="math-container">\$t=0_-\$</span> and <span class="math-container">\$t=0_+\$</span>). Is similar to separation of variables solution which I've presented above - just making <span class="math-container">\$V_s=0\$</span>.</p>
<p><strong>------ RESPONSE TO LAST QUESTIONS IN COMMENTS (Figure) -------</strong></p>
<p><strong>1.</strong> With no use of Laplace transform, is preferable to get the complete response (which can be separated in a sum of different responses later) through the Method of Separation of variables according my answer (for systems with order higher than one, that is not applicable). Of course, there are other methods presented in literature as choosing a linear combination of exponentials from a predefined table along unknown constants.</p>
<p><strong>2.</strong> Yes, you can still use your method to find the Zero-Input response. In this case, is more convenient to choose the lower limit of integral as a generic <span class="math-container">\$i(0_-)\$</span>, instead of <span class="math-container">\$-I_0\$</span> and <strong>only replace it later</strong> (with the negative value). In this manner, you won't have problems with signs.
I think the reason lies in the absolute value involved with the <span class="math-container">\$ln\$</span> (natural log) function which results from integrating the <span class="math-container">\$1/i\$</span> (hyperbola function) from a higher value in magnitude to a lower in magnitude. See the figure. The integration "does not know" the difference (if the initial current and the final one are both <span class="math-container">\$> 0\$</span> or <span class="math-container">\$< 0\$</span>). Notice that both areas are equal in magnitude and also negative in sign.</p>
<p><a href="https://i.stack.imgur.com/Lxwa9.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Lxwa9.png" alt="enter image description here" /></a></p>
<p>Otherwise, if you <strong>still</strong> to want use the <span class="math-container">\$-I_0\$</span> from the beginning of integration, you should fix the sign at the end for yourself. Example:</p>
<p><span class="math-container">$$\int_{-I_0}^{i}\frac{d \varsigma}{\varsigma}=-\frac{R}{L}\int_{0}^{t}d \tau$$</span></p>
<p><span class="math-container">$$\left [ \ln{ \left | \varsigma \right | } \right ]_{-I_0}^{i}= -\frac{R}{L}t$$</span></p>
<p><span class="math-container">$$\ln(|i|) - \ln(|-I_0|) =-\frac{R}{L}t$$</span></p>
<p><span class="math-container">$$\ln \left ( \frac{|i|}{|-I_0|} \right ) = -\frac{R}{L}t$$</span></p>
<p><span class="math-container">$$ |i(t)|=|-I_0|e^{-\frac{R}{L}t} $$</span></p>
<p>Obviously, if you choose</p>
<p><span class="math-container">$$ i(t)=I_0e^{-\frac{R}{L}t} $$</span></p>
<p>this expression does not correspond to your circuit. But, <strong>you know</strong> that the Zero-Input Response <span class="math-container">\$i(t)\$</span> is negative for any value of <span class="math-container">\$ t \ge 0\$</span>. Then:</p>
<p><span class="math-container">$$ i(t)=-I_0e^{-\frac{R}{L}t} $$</span></p>
<p><a href="https://i.stack.imgur.com/tcYDQ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tcYDQ.png" alt="enter image description here" /></a></p>
| <p><a href="https://i.stack.imgur.com/d4lz2.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/d4lz2.png" alt="enter image description here" /></a></p>
<p>Suppose we have an RL circuit as given above. I would like to find <span class="math-container">\$i(t)\$</span> using the following method but I can't find my mistake. I know how to find <span class="math-container">\$i(t)\$</span> using different methods/ways, but I just want to know what is wrong with the way below.</p>
<p>For <span class="math-container">\$t \ge 0\$</span>, the following equation should hold:
<span class="math-container">$$i \cdot R + L \cdot \frac{\text{d}i(t)}{\text{d}t} = V_s$$</span></p>
<p>Solving for homogeneous equation (maybe here, the lower bound is my mistake, but that's just a guess; I think it might be related to evaluating the initial condition in a wrong place):</p>
<p><span class="math-container">$$\int_{i(0)=-I_0}^{i_h(t)} \frac{1}{i} \text{d}i = -\int_0^t \frac{R}{L} \text{d}t$$</span>
<span class="math-container">$$\ln{|i_h(t)|} - \ln{|-I_0|} = \ln{|\frac{i_h(t)}{-I_0}}| = -\frac{R}{L}\cdot t$$</span>
<span class="math-container">$$i_h(t) = I_0\cdot e^{-\frac{R}{L}\cdot t}$$</span></p>
<p>Solving for particular solution:</p>
<p><span class="math-container">$$i_p(t) = A \\ A \cdot R = V_s \implies i_p(t) = A = \frac{V_s}{R}$$</span></p>
<p>Complete solution:
<span class="math-container">$$i(t) = i_h(t) + i_p(t) = \frac{V_s}{R} + I_0\cdot e^{-\frac{R}{L}\cdot t}$$</span></p>
<p>which I think is not correct. The correct answer is probably <span class="math-container">\$\frac{V_s}{R} - \left(I_0+\frac{V_s}{R}\right)\cdot e^{-\frac{R}{L}\cdot t}\$</span>.</p>
<p>Could you please help me find my mistake?</p>
| Solving differential equation for an RL circuit | 2024-03-14T20:36:19.483 |
706101 | |pwm|buck-boost|multisim| | <blockquote>
<p>Am I on the right track with the approach I've taken for creating a boost converter controlled by an STM32?</p>
</blockquote>
<p>When it comes to digital control of DC-DC converters many different things should be considered.</p>
<p>The idea of taking feedback from the output and adjusting the PWM duty cycle is not enough, but can be just a starting point. As pointed out by <a href="https://electronics.stackexchange.com/a/706132/103420">Robin Iddon's answer</a>, it's unclear how the core saturation of the inductor L1 will be prevented because you have feedback of neither the load current nor the inductor/switch current. With the switch current information, you can sense and generate response to different loading as well as fault conditions.</p>
<p>Also, note that buffering the output sample before feeding back to the MCU will bring some delay. Depending on the swing/amplitude this can take microseconds (ignoring the ADC measurement delays). So a sudden change on the output voltage (due to a step load change, for example) will be sensed with a delay therefore the response will have a delay accordingly. Although a voltage rise (overshoot) cannot be corrected by anything (i.e. you'll have to wait for it to dampen anyway), a voltage "dip" (undershoot) can still be sensed and "corrected". You may want to re-consider that section if a good dynamic response is a requirement for your application. If you go for a P (proportional) control here, as it's the easiest method, you may end up with a funny output waveform in case of a step load change.</p>
<blockquote>
<p>Is there any way to limit the maximum voltage to 100V? Because adjusting the voltage with ADC feedback doesn't seem too reliable.</p>
</blockquote>
<p>Limiting the PWM duty cycle in the software may not be enough because you'll need the input voltage information as well (even if you limit the PWM duty cycle, a 1V increase of the input will reflect the output as ~4V). You may want to consider interrupts generated by comparators, for example.</p>
<blockquote>
<p>Are the chosen values for the voltage divider appropriate, or should I reevaluate them?</p>
</blockquote>
<p>What you should consider is the bias currents of the target (buffer input or ADC). I haven't checked the bias currents of anything on your circuit.</p>
<blockquote>
<p>Is the PWM frequency value of 100kHz is ok for my purposes? And how to choose it properly?</p>
</blockquote>
<p>This depends on other design details and requirements such as EMI, efficiency, etc. You can choose a higher frequency to make the inductor smaller, but this may bring you trouble with efficiency and EMI, for example. Without knowing other details, it's difficult to answer. But 100 kHz is usually a good starting point.</p>
<hr />
<p>It might be better to use a boost converter/controller IC and "tweak" externally. I posted <a href="https://electronics.stackexchange.com/questions/293756/adjustable-power-supply-design/293770#293770">an answer here</a> explaining a method. You might be interested. The method employs a DAC but you can make a crude DAC with a PWM + RC filter.</p>
| <p>I'm building a boost converter from scratch and am planning to use an STM32 microcontroller to generate a PWM signal to regulate the output voltage. The power supply voltage of the circuit is 24 V, and I aim to adjust the output voltage from 24 V up to 100 V with a current of 100mA. Additionally, I want to read the output voltage value using the STM32 ADC input to adjust the PWM accordingly.</p>
<p>Initially, I calculated the converter values using an online calculator (input voltage 24 V, output voltage from 24 V to 100 V, PWM frequency 100 kHz, output current 100 mA). Then I simulated the circuit in Multisim, using a square wave generator in place of the microcontroller. For galvanic isolation between the STM and the gate driver, I considered using the ADUM4120CRIZ isolated gate driver (not included in the diagram). The simulation showed that by adjusting the duty cycle from 40% to 80%, the output voltage could be varied within the desired range (24-100 V). <a href="https://i.stack.imgur.com/soziS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/soziS.png" alt="boost converter" /></a></p>
<p>Then I added an voltage measurement circuit for the microcontroller's ADC. It uses voltage divider R4 R5 to bring 24-100 V to 0-3.3 V, which can be read with the MCU, and a linear optocoupler HCNR200 for galvanic isolation.
<a href="https://i.stack.imgur.com/q7iY5.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/q7iY5.png" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/XPLjI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XPLjI.png" alt="enter image description here" /></a>
Simulation seems to be working, but I'm still not sure that it would work in real life. So here is a few questions:</p>
<ol>
<li><p>Am I on the right track with the approach I've taken for creating a boost converter controlled by an STM32?</p>
</li>
<li><p>Is there any way to limit the maximum voltage to 100 V? Because adjusting the voltage with ADC feedback doesn't seem too reliable.</p>
</li>
<li><p>Are the chosen values for the voltage divider appropriate, or should I reevaluate them?</p>
</li>
<li><p>Is the PWM frequency value of 100 kHz is ok for my purposes? And how to choose it properly?</p>
</li>
</ol>
<p>Any feedback will be appreciated!</p>
| Adjusting Output Voltage of a DC-DC Boost Converter controlled by STM32 PWM | 2024-03-14T23:28:38.780 |
706103 | |analog|integrated-circuit|vlsi|chip-design| | <p>Congratulations! The opportunity to tape out a project of your own is an exciting, although potentially intimidating opportunity (as you yourself say).</p>
<p>This is a going to be a pretty broad, high-level answer to give some initial background - I <strong>strongly</strong> encourage asking more specific questions based on this overview, since it definitely won't cover everything in nearly enough detail. Please add a comment if you ask a related question so I can try to add an answer, or at the very least, add links to other answers posted there. (to the OP directly, there is contact info in my profile as well)</p>
<p>I also can't speak to professional tapeouts, tapeouts with in-house fabs, or tapeouts on new FinFET processes. I'll be writing based on my experience taping out a 2.4 GHz RFIC on a mixed-signal 65nm process from a major commercial foundry. Almost everything I say here will have various exceptions, and I'd probably have to plaster the entire answer in footnotes to cover them all, so I'll often skip or abbreviate them.</p>
<p>The phases that we followed, at a high level, are as follows:</p>
<ul>
<li><p><strong>Budgeting and floorplanning</strong> - In the world of silicon, you typically pay by the square millimeter for a rectangular chip. The area represents the space you get to design a circuit, and for the most part the perimeter represents the space you get for pins. Area can be pricy. When I taped out, a square millimeter fabricated in 65nm went for $5500 USD. We fit 47 pads (with some pad staggering). Newer processes will be costlier. Older processes might be cheaper, but might have larger minimum order sizes. Note that your department might have specific budget or grants for this, or might partner with a fab directly in some cases.</p>
<p>Talk to your advisor early, and try to scope what your chip will contain. Will it contain just your own circuit? Other test structures? Multiple replicas? A reference circuit so you can do an apples-to-apples comparison on the same die? Any large passives like inductors?</p>
<p>This is your opportunity to work with your instructor to establish your scope. Worried about the complexity/space cost/design time of on-chip transformers? Push back and propose something else. Really hoping to include a particular circuit? Make sure it's included here.</p>
<p>Also, skim your design rules documents. They may have rules on the size and spacing of wirebond pads, allowing you to make accurate estimates of how many pins you can afford on your chip, and generally get an initial sense of what you'll be able to do.</p>
</li>
<li><p><strong>Cell-level schematic design</strong> - As you've mentioned, you're designing an OTA. You'll design it in schematic first, using the cells provided by your process development kit - this means that if you're using TSMC's 65nm process, you use the FETs from <code>tsmcN65</code>, and not some generic <code>nfet</code> model. You'll do your first pass on sizing, and start thinking about layout as you set the sizes - overly wide or narrow transistors would be unwieldy to lay out, and expose you to significant parasitics. It's worth giving the design rules a skim here, so you stay within any limits on transistor sizes.</p>
<p>The more you can "predict" your layout experience and plan ahead, the better the layout will go. Consider that you might want to take a wide transistor and split it into parallel fingers (e.g. a 40u nFET might become 4x 10u nFETs in parallel) for layout flexibility. I like to design differential circuits and I'm very particular about my transistors being well-matched, so I'll design almost every transistor to have an even number of parallel fingers, so I can build symmetric layouts later.</p>
<p>By this point, you should apply some circuit design theory and have a rough sense of what nets are sensitive to parasitic capacitance and resistance, which transistors need to be well-matched, etc.</p>
<p>You'll also make your first rounds of simulation here - in addition to standard schematic-level analyses, you'll have your first opportunity to estimate the impact of manufacturing variation. If you can, try to express your simulation using ADE XL or a similarly powerful simulation tool, with acceptance criteria (e.g. gain, noise figure, etc). Manufacturing variation can be simulated in two ways:</p>
<ul>
<li><p>Corners: Each time your fab steps the wafer, implants ions, etches, etc, the result will always be a <em>tad</em> different. This results in effects in both the <a href="https://en.wikipedia.org/wiki/Process_corners#FEOL_corners" rel="nofollow noreferrer">FEOL</a> - the carrier mobilities will vary, and they'll vary separately for pFETs and nFETs - and <a href="https://en.wikipedia.org/wiki/Process_corners#BEOL_corners_%5B3%5D" rel="nofollow noreferrer">BEOL</a>, where the parasitic capacitance between metal layers will vary.</p>
<p>You can simulate at each of these corners, making sure that you meet your design goals at the typical (tt) corner and the extreme corners of the space (typically ff, fs, sf, ss). If your PDK has BEOL corners like cbest/cworst, you can run them as well. Typically, you would run the same simulations, while the simulator changes the circuit parameters slightly during the simulation.</p>
</li>
<li><p>Monte carlo: You run a large number of repeats of the simulation, drawn from the probability distribution of outcomes that the fab expects. You see how many of them pass your acceptance criteria.</p>
</li>
</ul>
</li>
<li><p><strong>Cell-level layout</strong> - This will be your first real bit of layout - you're going to take each of your elements from the schematic, and place them in real space. A lot of this is going to come down to design rules and best practices. I could spend an entire answer talking about these, so I'll list some major keywords:</p>
<ul>
<li>Design rules are non-negotiable. They can be checked automatically using the design rules checker and a set of rules provided by the fab. Usually the rules are provided in both a reference PDF and a set of machine-readable rules used with the design rules checker. Skim the PDF and keep it handy!</li>
<li>Techniques/best practices are important for a good outcome, but automated tooling won't stop you if you violate them. Consider things like symmetry/interdigitation, abutting where appropriate, avoiding needless parasitic capacitance/resistance/inductance, ensuring that you have room to route input/output signals, good power supply layout, etc. For sensitive circuits or high frequencies, also consider crosstalk. Include guard rings where appropriate, and budget space for them.</li>
<li>As you do more layout, you'll get a better sense of what works for layout, and what's prone to get you painted into a corner. Don't be afraid to rip up and backtrack if you start to get into a suboptimal situation.</li>
<li>Layout-versus-schematic will reverse engineer your layout back into a netlist and check it to ensure that your layout matches your intent. This is non-negotiable as well.</li>
<li>Using tools like Assura/PVS + the output of LVS, you can <em>extract parasitics</em> and feed them back to the simulator, to do a post-layout simulation at the cell level. Use these results to guide your layout.</li>
<li>Practicing layout is a good way to get better at layout. You should seek feedback both from experts and post-simulation results to guide your work.</li>
</ul>
<p>At this point, you'll have a small layout similar to this image (from my own tapeout):</p>
<p><a href="https://i.stack.imgur.com/KJl7o.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KJl7o.png" alt="enter image description here" /></a></p>
<p>Note that it's still a rather small cell, individual transistors are visible, but I've already taken some effort to get input/output signals routed to the edge of the cell. This should, on its own, pass most DRC + antenna checks (with the exception of things like density, minimum area on small connections at the edge that will be connected later, etc. For each DRC failure you accept here, you should have a plan for why it will be fixed at the full-chip phase.</p>
</li>
<li><p><strong>Chip-level placing and routing</strong> - Once you've made all of your cells, you'll want to place them onto a full chip. Start with a schematic that reflects your design intent, including bond pads, any diodes or other structures for ESD protection, etc. Simulate that schematic.</p>
<p>For the layout, your design rules/PDK will have some guidance, and perhaps some templates (often in GDSII format) that you can import for common things like the edge features that all chips have. You should also have bond pads you can import from somewhere.</p>
<p>Here, you'll need to actually connect your cells to each other and/or the outside world. While your simulation probably ran with ideal wires in the testbench attached to ideal power supplies, you're now laying out real metal with real resistance, capacitance, and inductance. Keep electrical performance (effect of parasitics) in mind, as well as your design rules. Wide wires on high metal layers can be a good idea for power, since they'll have less parasitic impedance.</p>
<p>You'll want to mostly follow your floorplan from before, possibly modifying it if you discover that you're violating assumptions that you applied when making it.</p>
<p>This is what the final result looks like; note that the chip has its protective edges, all cells from my floorplan are placed, pads are connected to their respective cells, power and ground are routed, etc (dummy fill should be done as well, but it's not shown in this screenshot):</p>
<p><a href="https://i.stack.imgur.com/T3Z4N.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/T3Z4N.jpg" alt="enter image description here" /></a></p>
<p>If you want a personal touch, read your design rules for logos/graphics related requirements carefully, and find an empty area for a small logo or other bit of <a href="https://en.wikipedia.org/wiki/Chip_art" rel="nofollow noreferrer">chip art</a>. Be careful not to accidentally make it electrically active (or worse, short a power rail to the chip art or something). It's wise to leave some spacing between any art and any active circuits, especially sensitive analog circuits.</p>
</li>
<li><p><strong>Final design rules pass</strong> - Your previous DRC applied to a single cell. Now, you have a full chip, meaning that you can validate some design rules that apply to chips as a whole. Make sure that your design rules deck is configured for a full-chip analysis, and run it. Make sure to run any packaging-specific, antenna-rules, and LVS analyses as well. You'll probably get new design rule violations. Depending on your process and tools, you might need to run a tool (or a special DRC rules deck) to generate dummy features to meet density rules; you'll need to import the result of that back into your chip. If the dummy features push you over the edge on parasitics, you might have some exclusion layers you can use to keep those features out of sensitive areas.</p>
<p>Again, just like most of this guide, I'm simplifying a step into a single paragraph, while it really merits its own dedicated question and answer (perhaps multiple).</p>
</li>
<li><p><strong>Final simulations</strong> - You now have a massive design spanning your whole chip. If you needed to add metal fill, you might have hundreds of thousands, or millions, of nodes. Extract parasitics from your full chip design and run as many simulations as possible against it. Due to compute/memory limitations, you might be limited in what you can do.</p>
<p>As an example, in this stage I discovered that the stray capacitance of my bond pads was messing up the feedback in an oscillator that used an off-chip resonator. I couldn't run my full test suite, but simply running ac and stability analysis was enough to inform me that I needed special low-capacitance pads. I updated the schematic, layout, and determined that I now met the necessary spec.</p>
</li>
<li><p><strong>Tape out to GDSII</strong> - You'll get a file that you can actually send to your fab. Their representative will schedule a kickoff meeting - attend it and take notes. Raise any concerns with them, and fill out any paperwork (including design rule violations you need to try to waive, chip details, etc). Be attentive to any emails or calls from them. Try to get the design in before the deadline, but don't rush if it means you'll make a sloppy error or sacrifice your well-being.</p>
</li>
<li><p><strong>Receive chips and test</strong> - Hopefully, you've designed a circuit board to use to test your chips. Depending on how your chip is being packaged, your PCB might have to use <a href="https://en.wikipedia.org/wiki/Chip_on_board" rel="nofollow noreferrer">chip on board</a> or mount a traditional IC package. Especially if you're mounting a fine-pitch, BGA, chip-on-board, etc, talk to your board house to get recs. They might recommend a particular surface finish. Don't just use oshpark or another low-cost PCB service. Find an assembler that will be able to install the chip and any other SMT parts, and work with them to get them board layouts and pick-and-place data/fab notes.</p>
<p>Getting this right might be pricy. You might be doing a multi-layer, controlled impedance board with a NiPdAu finish. You might need a pick-and-place assembly house that can also do wire-bonds if you're doing chip-on-board. I think we paid on the order of $6000 USD for this assembly + some small amount for parts from digikey.</p>
<p>If you're doing chip-on-board, be very clear about pinout, especially if you have unusual arrangements like staggered pins (much like I do). This will be part of the fab notes package your assembler will want from you.</p>
</li>
<li><p><strong>Document your chip</strong> - You've made a new chip and design. You'll probably get 100 or so of them because of economy of scale on foundry processes. There will be leftovers. Document the pinout, signal levels, etc - in case other students or researchers want to use leftover ones down the road. If you want, make up a fun part number or something - you have a chance to be lighthearted here in a process that otherwise must follow exacting rules. Your chip and schematic testbenches are very useful here as well.</p>
<p>If you like visual art, you might want to make a nice design based on your chip design - this will be a great eye-catcher for talks, thesis defense posters, etc. Grab some high-resolution views from your layout tool.</p>
</li>
<li><p><strong>Support future students</strong> - You've gone through a very tough yet rewarding process. You've probably discovered useful tidbits of info or quirks regarding your school's software setup, your specific process, particular design rules that were hard to understand, contacts at various suppliers, etc. Create or update a wiki with information for students that will walk the path after you.</p>
</li>
</ul>
<p>Regarding what you can do now - practice going through the layout process. Even if your OTA isn't your final design, lay it out and see how it performs. Get feedback on your layout (from classmates, advisor, this website, etc). Try techniques that seem promising, and see how they work. If you get some layout experience before designing/finalizing the schematic of your OTA, you'll probably have a better time designing for layout.</p>
<p>Finally, regarding knowledge and the gap - there will be a lot of knowledge to fill. That was the case for me as well - I was studying at a tiny school, under a new professor that just joined. We hadn't had a tapeout in years, and nobody quite knew what to do. My professor wanted me to tape out, I wanted to tape out. It took a lot of trial and error, some questions to Cadence, a lot of reading documentation, but ultimately we blazed that trail and got a whole cohort of students interested in doing their own tapeouts. Overall, it was an extremely rewarding process that I'd encourage exploring, in spite of the many steps and broad knowledge we had to pick up.</p>
| <p>This is probably a very broad question and I will try to be more specific. I'm asking this question to get a sense of the gap between my knowledge and a 'successful' tapeout, as I've heard many people say tapeout is a very tedious process that's difficult for novices to do (I'm intimidated).</p>
<p>I only have some limited experience in OTA schematic design (have never done practical layout), and have some experience analysing the effect of transistor size on gain, phase margin, noise, etc in an OTA.</p>
<p>So suppose I'm gonna do this OTA tapeout, what else knowledge is required? I've heard terms like process corner, monte carlo, and post-layout simulation. Is there a huge gap between a working schematic and a working chip, and what is in this gap? Is there anything I could do to fill this gap?</p>
| What is the standard procedure for analogue IC tapeout? | 2024-03-14T23:40:08.693 |
706117 | |circuit-analysis|polarity|mesh-analysis| | <blockquote>
<p>I've been told time and time again that polarities are assigned arbitrary and that no matter what end you choose to have <strong>higher potential</strong>, the math always checks out in the end</p>
</blockquote>
<p>NOOOO!</p>
<p>When you choose the polarity labeling for a resistor, you're choosing which end is your <strong>reference</strong> end. That end may have higher or lower potential, the maths will check out in the end to tell you.</p>
<p>It's <strong>because</strong> resistors don't have a natural polarity, that you have to assign one to them, in order that the maths can work. Just keep it consistent from the beginning to the end of the process. If it turns out the voltage across a resistor is negative, so be it.</p>
<p>I like working with things the 'right way round', so do most other people. If you happen to choose a polarity where the resistor has a positive voltage across it and current through it (or have the skills or experience to spot that ahead of calculations), then your equations will have fewer '-' signs to keep track of, which is nice, but not essential.</p>
| <p>Sorry if this is a silly question, I'm new to circuit analysis. I'm still rather confused about how you're supposed to assign polarities to resistors in a voltage. I've been told time and time again that polarities are assigned arbitrary and that no matter what end you choose to have higher potential, the math always checks out in the end. However, I've come across many circuits in my textbook where this was not the case.
For example, in this circuit I'm supposed to use mesh analysis to solve currents i1 and i2. I've assigned the polarities as follows:
<a href="https://i.stack.imgur.com/pdu2s.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pdu2s.png" alt="enter image description here" /></a></p>
<p>However, according to my textbook, this arrangement yields incorrect results and the way I've found to get the right answers is to arrange the circuit this way:
<a href="https://i.stack.imgur.com/kwQNG.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kwQNG.png" alt="enter image description here" /></a></p>
<p>This makes me think there is some kind of rule about assigning polarities I'm forgetting. However, I've scanned my textbook and looked online to find no general rule, hence my confusion. Is it something to do with the flow of current? I was also told that that too was to be arbitrarily assigned, so I'm unsure. I would really appreciate it if someone could explain things to me. Thanks for reading</p>
| Is there a rule for assigning polarities to resistors or is it truly arbitrary? | 2024-03-15T04:55:55.097 |
706137 | |potentiometer| | <p>It is a possibly a mess in terminology done by the Author. Precisely he seems to mess the input current of the network, say
<span class="math-container">$$
I_\textsf{IN} =\frac{V_\textsf{IN}}{R_\textsf{IN}},
$$</span>
with the true load current, i.e.
<span class="math-container">$$
I_\textsf{load} =\frac{V_\textsf{load}}{R_\textsf{load}}.
$$</span>
In the first configuration, the load resistor is series connected to the a-to-b section of the potentiometer, thus invariably <span class="math-container">\$I_\textsf{IN}=I_\textsf{load}\$</span>.<br>
In the second configuration the potentiometer and the resistor are not connected in series thus it is always <span class="math-container">\$I_\textsf{IN}\neq I_\textsf{load}\$</span>.</p>
<p>However <span class="math-container">\$I_\textsf{load}\$</span> is always proportional to <span class="math-container">\$V_\textsf{load}\$</span>.</p>
| <p>I'm reading the book "Practical Electronics for Inventors, 4th Ed", and I find it great, but I'm stuck on this (seemingly straightforward) section on page 321:</p>
<p><a href="https://i.stack.imgur.com/zWUYj.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zWUYj.jpg" alt="enter image description here" /></a></p>
<p>First off, the values in the "Adjusting Load Current" graph are wrong.<br />
As the author wrote, when a-to-b Resistance is 10kΩ, <code>V-load</code> is 5V, not 1V, and <code>I-load</code> is 0.5mA, not 0.1mA.</p>
<p>What bothers me, however, is the graph for the "Adjusting Load Voltage" circuit.<br />
Wrong values in the graph, ok.<br />
<strong>But how come <code>I-load</code> doesn't follow the same curve as <code>V-load</code>?</strong></p>
<p>It's a DC circuit with plain resistors.<br />
When a-to-b Resistance is 5kΩ, <code>V-load</code> is 4V, so <code>I-load</code> becomes 0.4mA (I = V/R = 4V/10kΩ = 0.4mA).<br />
When a-to-b Resistance is 1kΩ, <code>V-load</code> is 8.26V, so <code>I-load</code> becomes 0.826mA (I = V/R = 8.26V/10kΩ = 0.826mA).</p>
<p>Again, it might have been an error with the graph, but the author explicitly points out the difference:</p>
<blockquote>
<p>Adjusting load current:<br />
Notice in the graph that the load current follows a curve similar to that of the voltage.<br />
...<br />
Adjusting load voltage:<br />
Notice that in the graph, the load current doesn’t fall as quickly as in the previous configuration. In fact, from 0 to 5 kΩ the current falls about only 1/10 its maximum value. However, from 5 kΩ on, the drop grows significantly.</p>
</blockquote>
<p>What am I missing?</p>
| Adjusting load voltage with a potentiometer | 2024-03-15T08:42:35.653 |
706163 | |led|pwm|multiplexer|led-matrix| | <p>Both turn the LED 100% on or 100% off, and so both of them are exactly the same, and will dim to exactly the same brightness if the percent on-time is the same, as @winny has said.</p>
<p>But here's the difference. <strong>With PWM dimming, you want it to dim</strong>, but can turn the dimming off if desired. With multiplexing, you can't turn the dimming off -- you can only make it dimmer, which is seldom wanted.</p>
<p>With multiplexing, it's often <strong>a battle of trying to get enough illumination</strong> -- a battle between the "forced dimming" and exceeding the max pulse current of your chosen LED's.</p>
<p>When the dimming is forced, and unwanted, it's not going to be part of the name, or otherwise touted as a feature.</p>
| <p>In an LED grid where we are using multiplexing to control a ton of LEDs, where we are scanning each row quickly and using persistence of vision to enjoy the full picture at once; let's say that there are 10 rows so that on average each LED is just lit up 1/10th of the time.</p>
<p>Whereas in PWM, we have duty cycle, say the duty cycle is 10% on and 90% off, so the LED seems to be at only 10% brightness.</p>
<p>My question is, how are the above two situations different for an LED; Why does PWM dim the LED (apparent to the human eye), and why does multiplexing not dim the LED?</p>
| PWM vs mutiplexing, why one can control the apparent brightness and other saves power? | 2024-03-15T12:55:17.197 |
706164 | |tvs| | <blockquote>
<p><em>So what does the Max Breakdown voltage concept explain?</em></p>
</blockquote>
<p>It tells you what the maximum terminal voltage that may be seen at the test current (<span class="math-container">\$I_T\$</span>) for any particular device in a batch you tested. The minimum breakdown voltage tells you that for the test current <span class="math-container">\$I_T\$</span>, the voltage might be somewhat lower.</p>
<p>In other words, it tells you something about the "spread" of breakdown voltages in a batch of items. Think of it as a product guarantee.</p>
<blockquote>
<p><em>Does our TVS diode burn when it constantly rises slightly above the
maximum breakdown voltage?</em></p>
</blockquote>
<p>The only guarantee here is that if the voltage rises to the minimum breakdown voltage, none of the TVS diodes in the batch will burn. This is because (for the bottom device in your list, the power will be 12.2 volts x 1mA = trivially small.</p>
<p>However, if you have a device that has an actual breakdown voltage of 12.2 volts (the minimal in the data sheet) but tested it at 13.5 volts, it could easily burn. Even a device that was nominal i.e. 12.85 volts, it may still burn at 13.5 volts.</p>
<blockquote>
<p><em>Can it withstand this voltage continuously within the max and min
voltage range?</em></p>
</blockquote>
<p>No. Here is what I estimate the SMBJ11 will be be subject to if it had a nominal breakdown voltage of 12.85 volts and was subject to an over-voltage of 13.5 volts: -</p>
<p><a href="https://i.stack.imgur.com/CB4PF.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CB4PF.png" alt="enter image description here" /></a></p>
<p>As you can see it will dissipate 54 watts and burn inside 1 second: -</p>
<p><a href="https://i.stack.imgur.com/eNxBp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/eNxBp.png" alt="enter image description here" /></a></p>
<p>Image modified from <a href="https://www.vishay.com/docs/88392/smbj.pdf" rel="nofollow noreferrer">data sheet</a></p>
| <p><a href="https://i.stack.imgur.com/yxfwA.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yxfwA.png" alt="enter image description here" /></a><br />
<sub>Source: <a href="https://www.vishay.com/docs/88392/smbj.pdf" rel="nofollow noreferrer">Vishay SMBJ36A-E3/52 datasheet</a></sub></p>
<p>I understand the standoff voltage of the TVS diode. The breakdown voltage is said to be the point at which it starts flowing significant current, around 1mA. So what does the <em>Max Breakdown voltage</em> concept explain? Does our TVS diode burn when it constantly rises slightly above the maximum breakdown voltage?</p>
<p>Can it withstand this voltage continuously within the max and min voltage range?</p>
| TVS diode: max breakdown voltage | 2024-03-15T12:57:22.027 |
706176 | |transformer|ac| | <p>Despite what 4 other answers have said, the input-output configuration you drew is perfectly valid. Its main use (at least in my experience) is as a <a href="https://www.coilcraft.com/en-us/edu/series/a-guide-to-understanding-common-mode-chokes/" rel="nofollow noreferrer"><em>common-mode choke</em></a>. That is, a circuit that allows differential signal to pass through, but blocks common mode signals.</p>
<p>Normally we draw the transformer "sideways" for this configuration:</p>
<p><img src="https://i.stack.imgur.com/d28LU.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fd28LU.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>If this circuit is ideal there is no voltage difference from input to output for differential signals, and a substantial difference for AC common-mode signals. Because there is no isolation from input to output, DC common-mode signals are not blocked, allowing DC bias to be maintained between input and output.</p>
<p>Any difference in the differential signal between input and output is due to parasitics such as the winding resistance of the transformer.</p>
| <p><a href="https://i.stack.imgur.com/ZGhJW.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ZGhJW.png" alt="enter image description here" /></a></p>
<p>I have been trying to find the voltage difference between the input and output terminals of transformers, but every google result just got to the primary vs secondary so I decided I would just ask here.</p>
<p>The voltage difference between the top input terminal and top output terminal. Maybe also if it is interesting the voltage difference between top input terminal and bottom output terminal. I guess it also depends on the dot convention. Is there even a voltage?</p>
<p>Edit: I made the image. I thought there might be some sort of sine wave between them, that is why I labeled like it. The positive and negative was just for v1 and v2. If two there are two power supplies that make use of transformers, can you use them in parallel (if they are same voltages) or in series without having "shorting" or common current problems?</p>
<p>Edit2 : I asked this because I wanted to learn if there is any relation between magnetic coupling and potential(does the magnetic field keep the potential) but I learned that the 2 circuits are isolated and the only thing providing energy is the magnetic coupling.
It makes sense to say that there will be a little capacitive coupling, but I guess that is very small. So I basically got my answer. Thanks everyone.</p>
| Voltage difference between input and output of transformer | 2024-03-15T14:44:23.567 |
706190 | |identification|antenna|design|coil|waveguide| | <p>I suspect that this operates as follows: for bands around 2GHz it acts like a simple monopole (the center wire), and for bands around 900MHz it acts like a normal mode helix (the outer spiral). Both these modes are quite efficient and this could be a good antenna.</p>
<p>It is wrong to simply dismiss all compact antennas as inefficient. If it is an antenna like <a href="https://www.adafruit.com/product/1859" rel="nofollow noreferrer">https://www.adafruit.com/product/1859</a> then I have no reason to doubt the claimed gain of 2dBi over quite a wide range of frequencies. Not fantastic, but a perfectly reasonable antenna.</p>
<p><a href="https://i.stack.imgur.com/1Lq1z.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1Lq1z.png" alt="enter image description here" /></a></p>
<p>You might want to read up on helical antennas:
<a href="https://en.wikipedia.org/wiki/Helical_antenna" rel="nofollow noreferrer">https://en.wikipedia.org/wiki/Helical_antenna</a></p>
<p>Here is a paper that analyses something similar, it may give you some ideas:</p>
<p>Yan Wai Chow, E. K. N. Yung and Hon Tat Hui, "Dual frequency monopole-helical antenna by using a parasitic normal mode helix for mobile handsets," 2000 Asia-Pacific Microwave Conference.</p>
<p><a href="https://ieeexplore.ieee.org/document/925987" rel="nofollow noreferrer">https://ieeexplore.ieee.org/document/925987</a></p>
<p><a href="https://i.stack.imgur.com/ykqOC.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ykqOC.png" alt="Image from paper" /></a><br>
<sup>"Antenna Configuration" from the paper cited</sup></p>
<p>Just to answer a few of the questions raised in the comments:</p>
<p>To an antenna designer, this antenna</p>
<p><a href="https://i.stack.imgur.com/oE9cc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oE9cc.png" alt="enter image description here" /></a></p>
<p>can readily be decomposed into a monopole and a helix. Given the frequency bands of operation it is easy to see that the monopole could be responsible for the high band and the helix, operating in normal mode, could be responsible for the low band. Given the lack of a direct connection, the helix is being excited parasitically.</p>
<p>The paper cited shows something <strong>similar</strong>, and was quoted to hopefully help the OP with some analysis. I never said it was the <strong>same</strong> antenna, I quoted it to show that the parasitic excitation of the helix is feasible. For the antenna in the paper, the idea that that the only part of the monopole that radiates is the little bit protruding from the end of the helix is, from my experience in antennas, unlikely.</p>
<p>I suspect that in the paper that they may have analyzed it over a groundplane, this was a common design starting point (particularly in 2000), for antennas put on small boxes. They clearly thought that the antenna didn't need an infinite groundplane as the title of the paper is "..for mobile handsets". The infinite groundplane is not essential, as it isn't for every other monopole antenna. Nor is it necessary for parasitic excitation of the helix. Both antennas almost certainly work better when attached to a small box or PCB.</p>
<p>Other comments on this thread cast doubt on the utility of VSWR in designing antennas. Antenna designers find return loss (or VSWR) a very useful parameter as at those frequencies where power isn't reflected to the source it is generally radiated. Of course you have to understand the losses in your antenna (and check that someone hasn't soldered a 50 ohm load at the feedpoint).</p>
| <p>I can’t find any information on what this design of antenna is called, it has a monopole wire connected to the signal pin of an SMA connector, the coil is connected to ground. The larger diameter antenna pictured is a quad band GSM antenna from Adafruit, not sure of the manufacturer. The smaller diameter is a 915 MHz antenna from Amazon sold by a company DIYmalls. For the larger antenna, the monopole is 1/10 lambda and the spacing between coil wraps is 1/100 lambda for 915 MHz. I was able to replicate the design successfully by measuring the dimensions, but to use the design in a capstone project I need to show the derivation of the parameters/dimensions.</p>
<p>What is a name of this form of antenna? Is there a way I can model this antenna?</p>
<p>Edit: I purchased the antenna, I don’t need to identify the manufacturer or the specs. I am interested in identifying the method used to synthesize this design. Following the derivation for a helical antenna gives different dimensions, which makes sense b cause the coil/helix is grounded and the monopole is connected to signal.</p>
<p><a href="https://i.stack.imgur.com/aEUAC.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/aEUAC.jpg" alt="antenna in question (top design is referenced in post)" /></a></p>
| Identifying monopole antenna with ground connected coil | 2024-03-15T16:36:36.900 |
706201 | |battery-charging| | <p>I think it will work provided you configure it for autonomous operation correctly (meaning you need to get the ILIM, FB, FSW_SYNC and TS resistor networks to be conservative). Then when VAC goes into the ACUV..ACOV range the H-bridge will start pumping current towards the system and battery.<br />
In your scenario the battery isn't there, but you will have some capacitance (Csys + 80uF in their example). Assuming your system uses some current, it will be indistinguishable from the battery being nearly full.</p>
<p>The system will regulate SYSTEM to whatever voltage is programmed by the resistor divider feeding the FB pin.</p>
<p>If you plan on having the battery removable you need to consider TS also - when the NTC in the battery pack is missing, the two resistors across TS will set a voltage - is that voltage going to indicate that the battery temperature is OK for charging? If not, then I suspect the chip won't start pumping. So you may need to do something a bit clever here.</p>
<p>Also the I2C registers will cold start in this configuration so you have to look at all of them and decide whether their default settings are compatible with your target configuration. Obviously you might have a microcontroller powered by SYSTEM and that can quickly reprogram the I2C registers.</p>
<p>If it turns out you cannot use the defaults then you might need to have the micro powered from the line side, have CE strapped to inactive by default, then have the micro use GPIOs and I2C to get the BQ into a good state <em>before</em> you then let it start pumping current.</p>
| <p>I am considering using the TI <a href="https://www.ti.com/lit/ds/symlink/bq25756.pdf" rel="nofollow noreferrer">BQ25756</a> battery charger in my new design.</p>
<p>I wonder if the input power to the charger will be effective in powering my device even when the battery will not be populated.</p>
| Texas BQ25756 battery charger | 2024-03-15T17:24:27.610 |
706216 | |current|inductor|rms| | <p>Given some periodic current function <span class="math-container">\$I(t)\$</span>, with period <span class="math-container">\$T\$</span>, the formula for its average <span class="math-container">\$I_{MEAN}\$</span> is:</p>
<p><span class="math-container">$$ I_{MEAN} = \frac{1}{T}\int_0^T{I \cdot dt } $$</span></p>
<p>Presumably you have a sequence of samples <span class="math-container">\$I_0\cdots I_{N-1}\$</span> of this waveform, where <span class="math-container">\$N\$</span> is the number of samples in a single period. That is, you have <span class="math-container">\$N\$</span> samples of current <span class="math-container">\$I\$</span> describing exactly one complete cycle. The discrete version of the above equation is:</p>
<p><span class="math-container">$$ I_{MEAN} = \frac{1}{N}\sum_{a=0}^{N-1}{ I_a } $$</span></p>
<p>In plain English, this means add up all the samples, and divide by <span class="math-container">\$N\$</span>.</p>
| <p>There is a inductance current signal in below. I want to calculate the average value of the current.</p>
<p>Possitive peak value is 33.4 A <br />
Negative peak value is -20 A</p>
<p>Peak to peak time is 36 µs. But I do not know how can I calculate it in the shortest way.</p>
<p><a href="https://i.stack.imgur.com/5XaWP.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5XaWP.png" alt="enter image description here" /></a></p>
| How can I calculate an average value of specific inductor current? | 2024-03-15T19:17:57.193 |
706236 | |oscilloscope|sine| | <p>If you are lost you can always, hit the Autoset button. It will set the trigger mode to Auto, DC-coupled Edge triggered, rising slope etc. Your scope has some squirrely trigger mode options such as alternating-channel trigger. Image from <a href="https://www.ebay.ca/itm/115728746720" rel="nofollow noreferrer">here</a>:</p>
<p><a href="https://i.stack.imgur.com/PhugJ.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/PhugJ.jpg" alt="enter image description here" /></a></p>
<p>It will also take a usually pretty good shot at the channel and horizontal settings.</p>
<p>(The one pictured, from a Singapore eBay listing, has an advanced trigger option module installed so it would have even more trigger options)</p>
<p>However, Autoset changes so many things that you should familiarize yourself with the 'undo' function on your scope (see the user manual).</p>
| <p>I was just given a Tektronix TDS 3014B and I wanted to learn how to use it. I setup a simple sine wave generator and I'm working through all the menus. When I start the sine wave, everything looks fine until I change the vertical scale. Once I get the vertical scale above a certain threshold, the wave form doubles. It looks like the scope is pulling the inverted phase of the wave as well.</p>
<p>I've looked and I can't find any reason why this would happen. Is this something from my sine generator, or is there a setting I'm not correctly applying?</p>
<p><a href="https://i.stack.imgur.com/0O7j6.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0O7j6.jpg" alt="Single Sine wave" /></a></p>
<p><a href="https://i.stack.imgur.com/3oZPX.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3oZPX.jpg" alt="Double Sine wave" /></a></p>
| Just inherited a digital phosphor oscilloscope and trying to figure out why the sine wave is doubled | 2024-03-15T21:38:46.757 |
706241 | |generator|power-grid|synchronization| | <p>I'm not going to address the "hydropower" part of this question. First, because it's not about electronics or electrical engineering, and second, because there's such a tremendous array of different ways to extract rotary mechanical power from flowing water that trying to generalize the answer would be impractical.</p>
<p>I'm just going to talk about rotary electrical machines, torque on their shafts, and electrical power.</p>
<p>Note, too, that I'm going to use the term "electrical machine" here, not "generator" or "motor". That's because most things that can be a generator can be a motor, and visa-versa. In simple generating applications as you're talking about, the electrically simple way of making this all work could, at times, involve your machines inadvertently or deliberately turning themselves -- so, they're machines, and it's only intent and circumstance that makes them generators or motors.</p>
<blockquote>
<p>The frequency output of the stator of a hydroturbine induction generator is determined by how fast it rotates which is determined by the flow through it which can be controlled.</p>
</blockquote>
<p>Nope.</p>
<p>The frequency of the output of a <strong>synchronous</strong> generator is determined by its shaft speed. That's what the "synchronous" means.</p>
<p>Synchronous machines are a bit more complicated than that when there's a grid involved, however. They want to lock their shaft rotation to the grid, not just in frequency, but in phase. Once the shaft angle is locked to the grid phase, they want to stay there -- it takes torque in the direction of rotation to make the shaft lead the grid, and torque against the direction of rotation to make the shaft lag the grid.</p>
<p>In a generator application, if the machine is locked and if the applied torque (either load or supply) isn't too large, then it will stay locked, and it will either consume electrical power as a motor, or deliver electrical power as a generator.</p>
<p>Induction machines are not synchronous machines.</p>
<p>The shaft speed of an induction machine is determined mostly by its synchronous speed. Apply grid power to it with a load, and it turns slower than its synchronous speed. Apply grid power to it, and apply torque to its shaft, it turns <em>faster</em> than its synchronous speed and it supplies current to the grid. At all times, the voltage on its electrical connection is determined by the grid.</p>
| <p>I was reading this article <a href="https://renewablesfirst.co.uk/renewable-energy-technologies/hydropower/hydropower-learning-centreold/how-do-you-connect-hydro-to-the-grid/" rel="nofollow noreferrer">How do you connect hydro to the grid?</a> and the author states there are two methods. One by a fixed-speed induction generator and another by a grid-tied inverter. I understand the grid-tied inverter, but not the fixed speed where they say:</p>
<blockquote>
<p>An induction generator is grid-excited, which means that the magnetic field that must be created by the generator’s stator windings is energised by the grid. This has the advantage that by default the electricity generated must be perfectly grid-synchronised because the grid is providing the excitation.</p>
</blockquote>
<p>The frequency output of the stator of a hydroturbine induction generator is determined by how fast it rotates which is determined by the flow through it which can be controlled. But how does the frequency controlled by the flow of water, and the frequency connected to the stator by the grid, interact? Does being connected to the grid force the generator to behave as a motor if the flow of water cannot produce a speed/frequency that is slightly greater than that of the grid (in order for it to be generating)? I guess similar to if the flow of water drops off suddenly, would the induction generate just operate as a motor?</p>
| How does a hydroturbine induction generator control its own frequency/water flow if it is already excited/pre-determined by the grid? | 2024-03-15T21:54:48.387 |
706242 | |circuit-design| | <p>There seems to be no common or accepted answer from people with expertise. The closest phrase was "functional blocks".</p>
| <p>I am looking for a proper general umbrella term for these "building blocks" that are combinations of connections and components that may work as modularized units that may be combined together top create useful circuits. I am looking for a reference, source, or book to such circuit patterns as well.</p>
<p>Said building block examples include:</p>
<ul>
<li>voltage dividers</li>
<li>current sense</li>
<li>Wheatstone bridge</li>
</ul>
<p>Thanks!</p>
| Is there a proper, general umbrella term for component combinations (circuit patterns) like the voltage divider and bridge circuits? | 2024-03-15T22:06:39.983 |
706244 | |battery-charging|connector|lithium-ion|protection| | <p>First:</p>
<p>Don't do that. The protector BMS needs to be always physically with the cells, not elsewhere. Connect the BMS <em>permanently</em> to the cells. Do not rely on a BMS that at times is connected to the cells and other time it is not. When the BMS is not connected to the cells is when you'll blow up your battery.</p>
<p>Second:</p>
<p>Instead of needing to press a switch, simply place an "ideal rectifier" circuit between the charging port and the protector BMS (permanently connected to the cells). That circuit will let power flow into the battery and prevent power from flowing out of the battery into the charging port. For an example of an ideal rectifier, see <a href="https://electronics.stackexchange.com/questions/680890/which-specific-type-of-p-mosfet-is-suitable-for-reverse-polarity-protection-for">this Stack Exchange question</a>.</p>
| <p>I want to use a connector to charge the 4S Battery of my underwater robot. The connector is the 6 Pin hybrid Cobalt Series connectors from BlueTrail Engineering (<a href="https://www.bluetrailengineering.com/product-page/cobalt-series-bulkhead-connector" rel="nofollow noreferrer">https://www.bluetrailengineering.com/product-page/cobalt-series-bulkhead-connector</a>).</p>
<p>This connector will provide +Batt and -Batt of the battery as well as the balance connectors of the battery used in this project (<a href="https://bluerobotics.com/store/comm-control-power/powersupplies-batteries/battery-li-4s-15-6ah/" rel="nofollow noreferrer">https://bluerobotics.com/store/comm-control-power/powersupplies-batteries/battery-li-4s-15-6ah/</a>).</p>
<p>I would like to avoid having the battery tension available on connector's pins during survey (to avoid corrosion on pins, even if I have a watertight lid), but I want to be able to charge the battery (i.e. to have the battery connected to the charging connector) when I want to charge the robot.</p>
<p>To do so, I would like to use if possible the switch used to connect the battery to the circuit when the switch is pushed (through a Mosfet), and which could "connect" the battery to the Cobalt Connector when the switch is released. Here is the switch / Mosfet schematic used to let the battery current flow in the circuit, when the switch put the Mosfet grid to the mass.</p>
<p><a href="https://i.stack.imgur.com/KgoGA.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KgoGA.png" alt="enter image description here" /></a></p>
<p>I have two questions :</p>
<ul>
<li>Is it possible to connect / disconnect the battery from the Cobalt Connector through an electronic circuit ?</li>
<li>Is it possible to use the general ON/OFF switch such as when the system is not powered, the battery can be charged through the port ?</li>
</ul>
<p>Many thanks for your help</p>
| One-Way charging connector for 4S Battery | 2024-03-15T22:15:55.927 |
706251 | |lithium-ion|safety|charger|ev-charger| | <p>Your math about the capacity is incorrect.</p>
<p>"48V" is not enough to know exactly how many cells your pack has, but it is likely 13. It could also be 12 depending on how sleazy the marketing people are.</p>
<p>The 42V charger could be 10S or 11S? Check the output voltages.</p>
<p>In any case, here's the math that you need to understand:</p>
<p>This chart shows the relationship between voltage and capacity for a single cell. Note that it is highly non-linear.</p>
<p><a href="https://i.stack.imgur.com/bHzHH.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bHzHH.jpg" alt="https://siliconlightworks.com/li-ion-voltage" /></a></p>
<p><a href="https://siliconlightworks.com/li-ion-voltage" rel="nofollow noreferrer">Source</a></p>
<p>So if you charge a 13S battery with a 10S charger, how much capacity will you have?</p>
<p>A 10S charger will charge the battery to a max voltage of 42V.</p>
<p>For a 13S battery, that equates to 3.2V per cell.</p>
<p>Referring to the chart above, that will give you somewhere around 7% of the rated capacity.</p>
<p>Also note that you don't want to go all the way to the end of the curve as it may damage the battery. So 3.2V is effectively "dead".</p>
<p><strong>TLDR;</strong> The 42V charger cannot effectively charge a 48V pack. I doubt it would be dangerous to try, but you would certainly be taking your safety into your own hands by doing so. Lithium ion batteries store a lot of energy and they <em>can</em> start fires if you mistreat them.</p>
| <p>I have a Lithium-Ion battery for an ebike.
The battery is 48V, and is rated 15 Ah, so that means 15V*15Ah = 720Wh, and as it says on the battery as well.</p>
<p>Now it has a 48V charger (rated 2 amps).
Unfortunately, I forgot that charger in the office (2.5 hours away by bike).
Now I have another charger at home, but this one is rated 42V for 2 amps.</p>
<p>Due to the low voltage-difference, I figured it is more or less safe to connect this 42V-charger to the 48V battery. <br />
Now assuming neither the charger nor the battery goes up in smoke if I do that, am I right to assume that it will only charge up to 42/48 of 720 Wh ? (=630Wh)</p>
<p>(i'm trying to procure a 48V charger, but just in case)</p>
| What's the difference in loading outcome with a 42 vs 48 V charger? | 2024-03-15T23:29:51.457 |
706252 | |microcontroller|lcd|msp430|assembly| | <p>Your code seems to be sending 0x38 (function set instruction) one time. The LCD datasheet you linked shows it uses a ST7066 controller (or equivalent). Looking at the <a href="https://www.sparkfun.com/datasheets/LCD/st7066.pdf" rel="nofollow noreferrer">ST7066 datasheet</a> 8-bit interface (page 19) you need to send the function set instruction (0x38) three times not just once.</p>
| <p>I have been facing this issue for about a week, and after hours of trying to debug it, I was hoping I could find some help here. I have been trying to use an LCD 16x2 screen (unaware of the exact model but have been using this <a href="https://www.sparkfun.com/datasheets/LCD/ADM1602K-NSW-FBS-3.3v.pdf" rel="nofollow noreferrer">datasheet</a>) and display some simple text on it with my MSP430FR2355 using MSP430 Assembly. Most of my code has come from me attempting to translate C libraries for displaying text into assembly. The LCD powers on and the Vss, Vdd, and Vo pins are all working fine. When it powers on it just displays the top line as a row of rectangle characters. My pin map is as follows:</p>
<pre><code>RS - P2.0
RW - P2.1
E - P2.2
D0 - P3.0
D1 - P3.1
D2 - P3.2
D3 - P1.3 (P3.3 is broken)
D4 - P3.4
D5 - P3.5
D6 - P3.6
D7 - P3.7
</code></pre>
<p>The wirings have been checked many times and I have used a logic analyzer on every single pin RS-D7. All of these tests have shown that the pins are going high and low correctly and the way they should. The full assembly file can be found <a href="https://pastebin.com/T1bH9MAX" rel="nofollow noreferrer">here</a> (do ignore my silly code comments). The result of the code is that none of the commands do anything, after all the commands the screen just stays as a single row of rectangles. Thank you for taking the time to help me and if this is the wrong forum for this please direct me to the right one! :D</p>
<p>I also did my best to make a schematic of my current setup but I'm very new to this so it might not be great.</p>
<p><img src="https://i.stack.imgur.com/5hiaC.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f5hiaC.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>Also here are photos of my LCD screen <a href="https://imgur.com/a/SXDUFv0" rel="nofollow noreferrer">https://imgur.com/a/SXDUFv0</a></p>
<p><strong>Update</strong></p>
<p>I have ordered a new LCD because I'm pretty sure the problems are caused by the fact my current one has an I2C backpack soldered on it and that I'm not using it. I will update this post again when I receive the new LCD.</p>
<p><strong>Update 2</strong></p>
<p>I have received my new LCD screen without the I2C backpack but I am still experiencing issues. Running my program does nothing <strong>but</strong> sometimes randomly the first initializing command will work and will change the screen from 1 line to 2 lines. This is the only command I can get to work and even then it takes a few tries. I'm basically completely lost on where to go from here. I have updated the schematics to my current setup and my updated code is <a href="https://pastebin.com/0E73v6pE" rel="nofollow noreferrer">here</a>. Any and all help is appreciated.</p>
<p>Photo of the screen on power up: <a href="https://imgur.com/a/LIbCDqi" rel="nofollow noreferrer">https://imgur.com/a/LIbCDqi</a></p>
<p>Photo of the screen after the one command goes through: <a href="https://imgur.com/a/GjRXWIG" rel="nofollow noreferrer">https://imgur.com/a/GjRXWIG</a></p>
<p><strong>Update 3</strong></p>
<p>It turns out that I had the ground wiring wrong and now the code is working great with the new LCD! Thank you @Justme, @6v6gt, and @Jens for their combined help!</p>
| LCD 16x2 not taking commands from MSP430FR2355 | 2024-03-15T23:45:29.210 |
706255 | |transformer|inductance|coil|ferrite|litz-wire| | <p>As core was inserted into winding with 3d printed bobbin, some insides of the 3d printed material was scraped off and landed right between the core halfes creating an air gap lowering the effective permeability. Next time print the bobbins with more space inside!</p>
| <p>In the first picture you can see 45 turns of standard 0.4 mm copper wire. The impedance analyzer (e4990) shows an inductance at 20 kHz of 11.5 mH. Which is inside the tolerance of around 12.8 mH +- 20%.</p>
<p>The impedance analyzer measures Ls and Rs, which is the equivalent series resistance and inductance of the impedance at a given frequency.</p>
<p><a href="https://i.stack.imgur.com/HzTjG.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HzTjG.jpg" alt="45 turns of 0.4 diameter copper wire on an E100" /></a></p>
<p>However, using the following litz wire coil:</p>
<p><a href="https://i.stack.imgur.com/mMsBom.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/mMsBom.jpg" alt="Rupalit 3.05x3.05 safety profile, 1260x0.071 (overkill for 20 kHz)" /></a></p>
<p>Measured the same way on the same core:</p>
<p><a href="https://i.stack.imgur.com/pweIi.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pweIi.jpg" alt="E100 Core with litz wire 45 turns" /></a></p>
<p>Gives only around 8.2 mH. How is this even possible? I have gone through simulations, lots of models that could possibly cause this, asked some Phds but I can't answer such a huge deviation.</p>
<p>Here is what I already thought of:</p>
<p>Any capacitance can't be the cause of this, since for lower frequencies we see the same inductance value (also evident in circuit simulation).</p>
<p>The air between the core legs can cause huge deviations, but when it is pressed down with a clamp we get the same results.</p>
<p>Even if I missed a turn on the litz wire coil, it wouldn't cause such huge change (44^2/45^2).</p>
<p>Very high quality litz wire (3.05x3.05 mm 1280 x 0.071mm rupalit safety) -> impossible for shorts, which could have explained lower inductance.</p>
<p>Has anyone seen this before or are there papers on this?</p>
<p>Edit:</p>
<p>Here is the same measurement at home giving 11.17 mH.: <a href="https://i.stack.imgur.com/8CFIc.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8CFIc.jpg" alt="enter image description here" /></a></p>
<p>Now I added 45 turns of thinner copper wire but with huge gaps to increase leakage as requested by @tobalt:
<a href="https://i.stack.imgur.com/rsxvV.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/rsxvV.jpg" alt="enter image description here" /></a></p>
<p>As you can see leakage is increased by about 0.4 mH. Which in context to the original problem makes the litz wire measurement further implausible.</p>
| Why does the Inductance change on an E-Core Leg when going from Small Copper Wire to Litz Wire? | 2024-03-16T00:00:50.727 |
706258 | |power|batteries|identification|connector|connect| | <p>Your link says MTA-100 connector, which is a TE Connectivity series number (for the male half, though). As the '100' implies, it's a 2.54mm-pitch connector, and it looks to me like it has a retention rib (though the photo is pretty bad).</p>
<p>You may be able to find a compatible part (with a similar rib and polarization scheme) from another manufacturer that is stocked by your chosen PCBA house. There will be at least two options- vertical and right-angle.</p>
| <p>I want to attach this battery to my PCB but I am unable to find out which male connector should I put on PCB to connect this battery? Since I will be using JLCPCB SMT assembly so it would be great if i get the part number of the male connector.</p>
<p>Here is the link:
<a href="https://rads.stackoverflow.com/amzn/click/com/B0BJ5QJ2GS" rel="nofollow noreferrer" rel="nofollow noreferrer">https://www.amazon.com/dp/B0BJ5QJ2GS?starsLeft=1&ref_=cm_sw_r_cso_cp_apin_dp_Y81FWDZ2CG3GRZ829PMS</a></p>
| Battery connector name | 2024-03-16T00:42:34.207 |
706279 | |plug| | <p>While this is an electrical component the answer is more of a math question.<br />
You want to find the central angle (θ) knowing the cord length (L) and radius (R).</p>
<p>The formula would be: <span class="math-container">\$θ = 2\cdot arcsin (\frac{L}{2R}) \$</span></p>
<p>But in your case use an R of about 5.5mm since you are measuring at the top of each notch.</p>
<p>Using the above formula I calculate an angle of about 82 degrees. So the correct connector from the chart should be "E".</p>
<p>Also see this simular Math SE post:<br />
<a href="https://math.stackexchange.com/questions/2942376/calculate-angle-between-a-chord-and-the-circles-origin">https://math.stackexchange.com/questions/2942376/calculate-angle-between-a-chord-and-the-circles-origin</a></p>
| <p>If the diameter of body as shown in this ODU plug is 10mm and the distance between the notch is 7.22mm. How do you compute the angle. I want to know which angle it is below. Pls show how you compute for the angle.</p>
<p><a href="https://i.stack.imgur.com/DpWjl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DpWjl.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/SLDJj.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SLDJj.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/fxFks.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/fxFks.jpg" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/2ONO8.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2ONO8.jpg" alt="enter image description here" /></a></p>
| ODU angle 60 or 80 degrees? | 2024-03-16T04:47:33.337 |
706296 | |circuit-analysis|batteries|circuit-design|battery-charging|dc| | <p>To first order, there is no difference in the two circuits. They can both hold the same amount of energy, deliver the same power, and 'look' the same to a charger or load connected to the terminals.</p>
<p>The difference comes in the supporting circuits and hardware, and the way they fail.</p>
<p>For instance, for balance charging, the left hand circuit could use one balancer, whereas the right hand circuit needs two. If the left circuit is built from three individual series modules, it needs a heavier wire to connect the modules together than it does to connect the cells.</p>
<p>I'll leave it to you to work out what sort of lower performance or source of danger is the result of any individual wire going open circuit, or cell going open or short. This general procedure is called FEA, Failure Effects Analysis.</p>
| <p>As a beginner in electronics, I'm seeking clarification on the differences between two circuits. Could someone please explain the differences? Based on analysis, both circuits output an overall voltage of 11.1V. The left circuit consists of pairs of 3.7V batteries connected in series, while the right circuit features series connections of 3 3.7V batteries connected in parallel. What is the specific purpose of each configuration? Which configuration provides a higher current output?</p>
<p><a href="https://i.stack.imgur.com/9jXfw.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/9jXfw.png" alt="enter image description here" /></a></p>
| What are the differences between these two circuits? | 2024-03-16T08:35:37.130 |
706303 | |emc| | <p>The document shows two graphs, you only posted one. The left one is concerning "broadband" and the right one is concerning "narrowband". These are directly taken from the referenced UNECE R10 document (automotive EMC regulation), Appendix 2.</p>
<p>As for how to interpret the graphs:</p>
<p>Note that documents like this always (ought to) specify either a peak and/or an average limit. Essentially how the EMC test is carried out: is the spectrum analyser put on "max hold" (quasi peak) or just collecting an average? Peak limits are often harder to pass.</p>
<p>The dBuV/m unit doesn't really tell the average designer much, it's a strange unit for everyone except those living and breathing EMC testing (but can be converted to dBm with a bit of physics formula head ache). As a designer, you kind of just need to know that automotive EMC is slightly tougher than regular industrial EMC, much tougher than commercial EMC, but not nearly as tough as aerospace/military. Then put in your counter-measure efforts accordingly. Because you will not likely be able to measure if your DUT passes or not outside an EMC lab.</p>
<p>The frequency range is very relevant for the designer though, as you need to adapt your filters accordingly.</p>
| <p>I am looking at <a href="https://www.ti.com/lit/ta/sszt671/sszt671.pdf?ts=1710501774139&ref_url=https%253A%252F%252Fwww.google.com%252F" rel="nofollow noreferrer">this document</a> to learn more about RE testing.</p>
<p>It says:</p>
<blockquote>
<p>Figure 1 provides limits for broadband (BB) and narrowband (NB) radiated emissions over the applicable frequency range of
30MHz to 1GHz "</p>
</blockquote>
<p>Figure 1 is given below.</p>
<p><a href="https://i.stack.imgur.com/K0NuK.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/K0NuK.png" alt="enter image description here" /></a></p>
<p>This document does not say anything about limits for broadband (BB) and narrowband (NB).</p>
<ul>
<li>What are the frequency ranges for broadband (BB) and narrow-band (NB) emissions?</li>
<li>What is the significance of broadband (BB) and narrow-band (NB) emissions?</li>
</ul>
| What are the limits for broadband (BB) and narrowband (NB) radiated emissions? | 2024-03-16T10:13:32.683 |
706309 | |power-supply|voltage|pcb|motor|voltage-regulator| | <p>Try powering the motor from 3.3 V. Nothing is going to get damaged. It will operate at slightly reduced maximum current, and hence torque. With a lower voltage, it won't step quite as quickly. Unless you need the absolute maximum torque and stepping speed, you may find it still works sufficiently well in your application.</p>
| <p>I am making a stepper motor driver. The motor requires 4V but the STM32F103 chip I am using requires 3.3V. I am using a DC-DC buck converter to convert the 12V input. Can I supply the motor with a 3.3V voltage for simplicity or do I need two separate buck converters: a 4V for the motor and a 3.3V for the STM32?</p>
| Can I supply 3.3V to a 4V stepper motor? | 2024-03-16T12:17:02.533 |
706368 | |circuit-analysis|nodal-analysis| | <p>Your diagram with your annotations, plus my addition using the passive sign convention for the resistors. (The more <span class="math-container">\$+\$</span> end of a resistor is where the current arrow enters the resistor and the more <span class="math-container">\$-\$</span> end of a resistor is where the current arrow exits the resistor.)</p>
<p><span class="math-container">\$\quad\quad\quad\quad\quad\$</span><a href="https://i.stack.imgur.com/tF8Gb.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tF8Gb.png" alt="enter image description here" /></a></p>
<p>Your approach and solution for <span class="math-container">\$v_2\$</span> is correct. <span class="math-container">\$v_2=100\:\text{V}\$</span>.</p>
<p>So, <span class="math-container">\$v_{_\text{X}}=700\:\text{V}\$</span>.</p>
<p>It's only at this point where you make mistakes. Since the more positive end of the <span class="math-container">\$10\:\Omega\$</span> resistor is at <span class="math-container">\$v_{_\text{X}}\$</span>, the more negative end of that resistor <em><strong>must</strong></em> be less than <span class="math-container">\$700\:\text{V}\$</span>. Not greater. So <span class="math-container">\$v_1\$</span> must be less than <span class="math-container">\$700\:\text{V}\$</span>.</p>
<p>The current in the <span class="math-container">\$10\:\Omega\$</span>/<span class="math-container">\$50\:\Omega\$</span> branch must be <span class="math-container">\$\frac{700\:\text{V}}{10\:\Omega+50\:\Omega}\$</span> and pointing exactly as you showed <span class="math-container">\$i_2\$</span>. So, <span class="math-container">\$i_2=\frac{700\:\text{V}}{60\:\Omega}\$</span>. That will cause a voltage <em><strong>drop</strong></em> across the <span class="math-container">\$10\:\Omega\$</span> resistor of <span class="math-container">\$v_{_\text{DROP}}=10\:\Omega\cdot i_2=116\frac23\:\text{V}\$</span>. So <span class="math-container">\$v_1\$</span> will be that much <em><strong>lower</strong></em> than <span class="math-container">\$700\:\text{V}\$</span>, or <span class="math-container">\$v_1=v_{_\text{X}}-v_{_\text{DROP}}=700\:\text{V}-116\frac23\:\text{V}=583\frac13\:\text{V}\$</span>.</p>
<p>You used <span class="math-container">\$v_1-v_{_\text{x}}\$</span>. The current arrow implied by that subtraction has the arrow pointing from the left to the right. You should have used <span class="math-container">\$v_{_\text{x}}-v_1\$</span>, instead, so that the current arrow was consistent with how you drew <span class="math-container">\$i_2\$</span>.</p>
<p>That's the only mistake you made, I think.</p>
| <p>When looking for the node voltages of the following circuit below I was wondering why we are not able to get the correct answer for node voltage V1 by solving the following way.</p>
<hr />
<p>I1 = V2/30 = 100/30 = 3.33 A</p>
<p>I2 = 15 - 3.33 = 11.667 A</p>
<p>11.667 = (V1 - Vx)/10 = (V1 - 700)/10</p>
<p>V1 = 816.67 V</p>
<hr />
<p>Though when doing KCL at node V1 I get the correct answer for V1 = 583.33 V</p>
<p><a href="https://i.stack.imgur.com/QOrpE.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QOrpE.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/Wb1IG.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Wb1IG.jpg" alt="enter image description here" /></a></p>
| Circuit Analysis Q's | 2024-03-17T05:57:48.563 |
706375 | |communication|digital-communications|bpsk| | <p>It does not really exploit two symbols.</p>
<p>It simply means the encoding difference, as either the currrent bit is same as the previous, or then it is different.</p>
<p>The encoded bits simply tell if the currect state must be flipped or not to reach the next state.</p>
<p>So in that sense you need the state of all previous bits, but usually a synchronization is assumed for a data stream or burst so you can start off with known state.</p>
<p>But all there is needed is for the receiver to remember current state, and one symbol of the transmitter can then toggle the receiver state or keep it, so one symbol is still one bit.</p>
| <p>Suppose two modulation schemes, orthogonal BPSK and differential BPSK.</p>
<p>In orthogonal BPSK, we transmit
<span class="math-container">$$\textbf{x}_{A}:= [x[0], x[1]]^{T}=[1, 0]^{T},$$</span> and
<span class="math-container">$$\textbf{x}_{B}:= [0, 1]^{T}.$$</span>
This scheme conveys one bit of information and uses one real dimension per two symbol times.</p>
<p>On the other hand, in differential BPSK, we transmit
<span class="math-container">$$x[m]=u[m]x[m-1]$$</span>
where the information symbol <span class="math-container">$$u[m] = \pm 1.$$</span>
This scheme conveys one bit of information and uses one real dimension per one symbol time.</p>
<p>Above is the description in the textbook, but I cannot understand this straightforward.
In my opinion, in differential BPSK, when receiving a symbol, we should exploit the information symbol received in the previous symbol time, m-1. In this way, I think that it can be considered as exploiting two symbol times.</p>
<p>Which point I am misunderstanding is? Can you explain briefly?</p>
| Comparing between orthogonal BPSK and differential BPSK | 2024-03-17T07:57:38.930 |
706379 | |digital-logic|circuit-design|logic-gates| | <p>No, none of the circuits are valid.</p>
<p>You can't connect two or more outputs together.</p>
<p>There is a problem if one output is logic '1' and the other output is logic '0'. The result is arbitrary or invalid.</p>
<p>(Exceptions apply. In some scenarios such a case could be defined what it is and thus valid. Like wired-and / wired-or circuits).</p>
<p>So you can't think something is on or off, because for many people on means something is actively happening and off means nothing is happening so it is irrelevant.</p>
<p>In this case, logic state '0' is as just as strong output than logic state '1', and you can't have a logic state 'half' by connecting logic '0' and logic '1' outputs together.</p>
| <p>This <strong>[Circuit A]</strong> is allowed in Digital:</p>
<p><a href="https://i.stack.imgur.com/5M44P.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5M44P.png" alt="enter image description here" /></a></p>
<p>This <strong>[Circuit B]</strong> is also allowed:</p>
<p><a href="https://i.stack.imgur.com/ER19w.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ER19w.png" alt="enter image description here" /></a></p>
<p>Until I turn off one of the inputs:</p>
<p><a href="https://i.stack.imgur.com/qyVhu.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qyVhu.png" alt="enter image description here" /></a></p>
<p>This <strong>[Circuit C]</strong> causes a different error, depending on whether the input is on or off.</p>
<p>When it is off - I get an error about oscillation:</p>
<p><a href="https://i.stack.imgur.com/Itwlc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Itwlc.png" alt="enter image description here" /></a></p>
<p>When the input is on - I get an error about a short circuit:</p>
<p><a href="https://i.stack.imgur.com/jWZyO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jWZyO.png" alt="enter image description here" /></a></p>
<p>My questions are:</p>
<ol>
<li><p>Is <strong>[Circuit A]</strong> actually valid, i.e., would it not lead to a short circuit in real life? Or is Digital incorrectly not detecting this as error?</p>
</li>
<li><p>Is <strong>[Circuit B]</strong> valid (i.e. no short circuit) as long as the inputs are both on or off?</p>
</li>
<li><p>It's clear to me that <strong>[Circuit C]</strong> is invalid, but I wonder if Digital points out the correct consequences in the error messages. Would the circuit really oscillate when the input is off, and short when the input is on? And if so - why the difference in behavior?</p>
</li>
</ol>
| Are these valid logic circuits? | 2024-03-17T09:23:01.947 |
706385 | |power|heat|ohms-law| | <p>For a resistance, when you double the voltage across it, you also double the current. That's embodied in Ohm's law <span class="math-container">\$I = \frac{V}{R}\$</span>.</p>
<p>When you double the voltage, you double the potential energy that each charge possesses, that it will deliver to the environment (as heat) on its journey between the two points of potential difference (each end of the resistor).</p>
<p>That doubling of potential difference also doubles the strength of the electric field between those two points of differing potential. Force on each charge is therefore also doubled, the average charge velocity is doubled, and twice as many charges make the journey each second. In other words, current also doubled.</p>
<p>Now you have two factors to consider when voltage and current are doubled:</p>
<ol>
<li><p>Charges start the journey with twice as much potential energy to donate to the environment.</p>
</li>
<li><p>Charges are moving twice as fast, on average, so twice as many charges are completing the journey each second.</p>
</li>
</ol>
<p>That's a factor of four increase in energy being delivered to the environment each second, otherwise known as power.</p>
| <p>I know, that the formula P = R·I<sup>2</sup> is derived from the formula of electric power and Ohm's Law, but the intuition behind why the current is exactly squared here is unclear to me.</p>
<p>I get that the more charged particles pass through a given cross-section of a conductor, the more the chance of them colliding with each other and with atomic nuclei, but why is the chance squared?</p>
| Why is Joule heating (or electric power) proportional to current squared? | 2024-03-17T09:45:26.633 |
706402 | |voltage|ethernet|digital-communications|high-speed| | <p>They can be thought as two separate processes that happen simultaneously and individually.</p>
<p>For while searching for link partner, the MDI pairs need to be connected correctly before link partner can be found. And you cannot detect if MDI pairs are connected properly before a link partner is found.</p>
<p>And unless you are not aware, the autonegotiation happens by advertizing features sent as data using link detection pulses, so basically it's autonegotiation data that can be received over link pulses, when MDI can detect link pulses.</p>
<p>So detecting the link pulses allows to know when Auto-MDI has correctly determined the swapping and then autonegotiation data can be exchanged over link pulses, before selecting which speed to use.</p>
| <p>Most of these days, the Ethernet PHY/switch devices support Auto-MDIX and Autonegotiation.
So, when a link partner is getting connected to a PHY or a Switch, which of these two phenomenons happens first? Auto-MDIX or Autonegotiation?</p>
<p>My thought is that for Autonegotiation to happen, (which bascially advertises the speed and duplex setting between the partners), the TX and RX connection between the link partners should be aligned and matched first.
So, I believe Auto-MDIX happens first before Autonegotiation.</p>
<p>If the TX and RX between the PHY/Switch and the link partner is not aligned, the auto negotiation information will not be received by the link partner correctly. Because MDIX basically maps TX to RX and vice versa. So, if MDIX doesn't happen first, the auto negotiation info might not get conveyed correctly, right?</p>
| Which of these 2 phenomena occur first - AN or MDIX | 2024-03-17T12:19:45.883 |
706405 | |coil|magnetic-flux|optimization|field| | <p>Butterfly coil. Often used in TCMS research. This page provides a rundown on application, and includes an example plot of field intensity: <br />
<a href="https://www.yingchi-tms.com/butterfly-coil-a-magnetic-stimulation-coil-widely-used-in-clinical-and-scientific-research/" rel="nofollow noreferrer">https://www.yingchi-tms.com/butterfly-coil-a-magnetic-stimulation-coil-widely-used-in-clinical-and-scientific-research/</a></p>
| <p>What is this coil called (see image) (blue line is field, blue circle is clockwise oriented coil, red circle is counter-clockwise oriented coil), and are there any tools that help design it?</p>
<p><a href="https://i.stack.imgur.com/Fn5tA.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Fn5tA.png" alt="drawing of desired field" /></a></p>
<p>Basically the coils are on a flat surface, and the field is parallel to that surface at some distance. Obviously two counter-rotating loops will generate this field, but the idea would be to optimize for a smooth field while taking up the least amount of area on the surface. I tried pyCoilGen, but it wants to give me z fields with a gradient in the x direction, not a uniform field in the x direction.</p>
| Identifying and designing coils for generating parallel magnetic fields with smooth gradients | 2024-03-17T12:52:12.073 |
706416 | |poe| | <p>IEEE 802.3 Power over Ethernet Power Requirement Nuance</p>
<p>Background</p>
<ul>
<li>Power Supply Equipment (PSE) supplies power to a Powered Device (PD) at a Power Interface (PI) across a link section (cable).</li>
<li>Pclass defines the average power the PSE needs to supply. (IEEE 802.3at-2009
Table 33-7)</li>
<li>Pclass_PD defines the average power the PD is allowed to
consume. (IEEE 802.3at-2009 Table 33-18)</li>
<li>Ppeak_PD defines the peak power the PD is allowed to consume. (IEEE 802.3at-2009 Table 33-18)</li>
</ul>
<p>Nuance</p>
<ul>
<li>It isn't always obvious in the standard that Pclass is an
average value. It can be misleading that for Class 0 and 3 Pclass >
Ppeak_PD which might lead you to believe Pclass was the peak power
the PSE would need to supply. Pclass < Ppeak_PD for Class 1 and 2 is
a sign that this is not correct.</li>
<li>The internet is flooded with references that get this wrong or hide this nuance.</li>
<li><a href="https://ethernetalliance.org/wp-content/uploads/2018/04/WP_EA_Overview8023bt_FINAL.pdf" rel="nofollow noreferrer">https://ethernetalliance.org/wp-content/uploads/2018/04/WP_EA_Overview8023bt_FINAL.pdf</a> Table 13 helps provide clarity. Attached below.</li>
<li>PSE peak power (Ppeak_PSE?) is never defined. You must derive it yourself as done in above paper. Note margin has not been added and thus slight Pclass differences vs IEEE 802.3at-2009.</li>
</ul>
<p><a href="https://i.stack.imgur.com/Ofzcp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Ofzcp.png" alt="enter image description here" /></a></p>
| <p>IEEE 802.3at-2009 Table 33-7 shows minimum power supply (PSE) levels that seem to be less than the peak power that the powered device (PD) could draw for Class 1 and 2. Can anyone clarify how these are compatible or where I am misinterpretting the standard?</p>
<p><a href="https://i.stack.imgur.com/EauNr.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/EauNr.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/XBKWq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XBKWq.png" alt="enter image description here" /></a></p>
| Power over Ethernet (PoE) power supply requirements clarification, PSE < PD? | 2024-03-17T16:11:05.157 |
706422 | |motor|design|brushless-dc-motor|linear|winding| | <p>Your picture is a model to show the concept. For the model you have shown:</p>
<p>The gray are magnets, magnetized radially with alternating polarity.</p>
<p>The red, yellow and blue are windings. They are all wound in radially in the same direction, and all of the windings of each color will be in series. The "start" ends are your inputs, and the "finish" ends are the wye connections.</p>
<p>Conceptually, this would be analogous to a four-pole, six slot brushless motor (or any brushless motor with a 4:6 pole:slot ratio.</p>
| <p>There are winding scheme/calculators and tutorials online for conventional electric motors, but I can't find any clear method of wind linear tubular electric motors.</p>
<p>For example, this is the winding of a conventional electric motor:</p>
<p><a href="https://i.stack.imgur.com/vxOhG.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/vxOhG.png" alt="Electric motor winding" /></a></p>
<p>But when I try to search for linear tubular electric motors, I can only find images like this:</p>
<p><a href="https://i.stack.imgur.com/2QkJg.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2QkJg.png" alt="Tubular linear motor" /></a></p>
<p>It shows that it has 3 phases, but not how they are connected to one another.</p>
<hr />
<p>Is there a way of converting the winding of a conventional motor to a linear tubular motor?</p>
| How to convert the winding of a radial electric motor to a linear tubular electric motor? | 2024-03-17T17:27:43.260 |
706427 | |transistors|identification|vintage|substitution| | <p>This is a low-load application, only used to turn on the gate of a triac. The exact specs of the transistor largely don't matter other than the voltage rating.</p>
<p>Only about 20-30mA flows through the transistor when it's on. The motor looks like it may run on 50-100V, so it'd be best to use a transistor rated for 200Vceo at least.</p>
<p>The jellybean go-to choice for that would be MPSA92.</p>
<blockquote>
<p>This old thread on DIYAudio [...] suggests a substitution ("2n5415, 2n5416") but I'm not sure on what basis.</p>
</blockquote>
<p>The substitution is based on the identical case <em>and</em> suitable Vceo (250-350V for 2N5415/5416 respectively).</p>
<p>If you're going for authentic look/restoration, 2N5415/6 are good substitutions since they should be direct fit. If I was repairing the printer for my own amusement only, I'd just stick an MPSA92 there since I got a bunch of them already.</p>
<p>One suggestion though: do not solder the replacement transistor so close to the PCB. It puts quite a bit of stress on the pins and the hermetic seal around them as the temperatures change. There should be at least 5mm of lead between the component side of the PCB and the transistor.</p>
| <p>I am debugging a mid-1970s piece of printer equipment and have traced a failure to what looks like a bad transistor. But I can't find a data sheet for it (or a useful substitution). It's a metal can labeled S-1122 (with the old National Semiconductor logo on it). In the documentation for the printer device it's called an "SS1122 PNP transistor". This part seems to have been used in multiple Southwest Technical Products kit devices of the era, but I cannot find it in any of the National databooks I can locate online and googling around doesn't turn up much else of that vintage.</p>
<p><a href="https://i.stack.imgur.com/hJZz8.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hJZz8.jpg" alt="enter image description here" /></a></p>
<p>This <a href="https://www.diyaudio.com/community/threads/1971-plastic-tiger.92036/" rel="nofollow noreferrer">old thread on DIYAudio</a> talks briefly about it and suggests a substitution ("2n5415, 2n5416") but I'm not sure on what basis.</p>
<p>The 1122 part is being used in this circuit (excerpt, <a href="https://deramp.com/downloads/swtpc/hardware/PR_40%20Printer/PR40_PowerSch.pdf" rel="nofollow noreferrer">click for full schematic</a>) labeled Q1:</p>
<p><a href="https://i.stack.imgur.com/b0p7a.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/b0p7a.png" alt="enter image description here" /></a></p>
<p>The "motor control" line is a TTL signal that goes low to turn on the AC motor via Q1 and the triac. (The voltage divider at the base of Q1 turns a "low" TTL signal into about 2V where there is 8V at the emitter.)</p>
<p>Can anyone help me find a data sheet for this part, or I suppose failing that, help me identify a useful substitution for this application? Thanks!</p>
| Info/substitution for National Semi's obsolete S-1122 transistor? | 2024-03-17T18:09:08.713 |
706432 | |avr|c|atmega328p| | <p>As there is no external pull-up, the internal pull-up of the AVR is so weak that the voltage on the pushbutton pin rises slowly.</p>
<p>The two NOP delay is only to compensate the delay caused by the synchronizer, so you get data there was on pin 2 clock cycles ago, right after the moment the pull-up was activated.</p>
<p>But the voltage was still rising and below the threshold of logic 1 level.</p>
<p>It is best to use initialize the pull-up at startup, maybe have an explicit delay of few microseconds to wait that the voltage has risen to supply voltage, before reading the pin state for the first time.</p>
| <p>I have simplified the listing to bare minimum where I can still observe this behaviour.<br />
When this program is running, it works as expected. Button press causes LED to show up.</p>
<p><strong>The problem exist on first run</strong>: when I run it first time (powering up) or resetting the processor the body of <code>if (!(PINC & (1<<PC0)))</code> is executed despite that the condition is not met (button not pressed).<br />
Code:</p>
<pre class="lang-cpp prettyprint-override"><code>#include <avr/io.h>
#include <util/delay.h>
int main(void) {
DDRB |= (1<<PB5); // pin for LED as output
DDRC &= ~(1<<PC0); // to ensure PC0 is input - btn here, shorts to gnd when pressed
DDRD |= (1<<PD0)|(1<<PD1); // debug LED1 and LED2
while(1) {
PORTC |= (1<<PC0); // pull-up
asm( "nop " );
asm( "nop " );
if (!(PINC & (1<<PC0))) { //btn pressed? shorts to gnd
PORTB |= (1<<PB5); // LED on <-- executed after RESET!
// here comes extra code to move stepper motor
}
else {
PORTD |= (1<<PD1); // dbg LED on
}
_delay_ms(2000);
PORTB &= ~(1<<PB5);
PORTD &= ~(1<<PD1);
}
}
</code></pre>
<p>Is here something I am not aware of?<br />
Extra info: this would be a small nuisance if comes as LEDs only, but I want some step motor movement (or rather - NO movement). This execution is undesired just after powering the processor up.</p>
<p><strong>EDIT</strong><br />
More info: The hardware is Arduino UNO SMD.<br />
<a href="https://i.stack.imgur.com/OePEV.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OePEV.png" alt="Arduino Uno SMD" /></a><br />
Code is written and compiled with Arduino IDE.</p>
<p>Wires connected between pushbutton switch and the PC0 (or A0, using Arduino description) with about 15cm long wires. This pushbutton shorts PC0 to gnd.<br />
No external (hardware) pullup/pulldown.</p>
| AVR ATmega328P if statement wrongly executed after reset | 2024-03-17T20:26:25.087 |
706435 | |voltage-regulator|switch-mode-power-supply|switching-regulator|texas-instruments| | <p>Update: It is working now flawlessly. Some legs did not touch the pads on the PCB so some rework fixed the circuit.</p>
| <p>I have been working on a 12 V to 3.3 V DCDC converter that uses the <a href="https://www.ti.com/lit/ds/symlink/tps564247.pdf" rel="nofollow noreferrer">TPS564247</a> switching regulator IC. Here is the schematic:</p>
<p><a href="https://i.stack.imgur.com/pYqHC.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pYqHC.png" alt="enter image description here" /></a></p>
<p>The problem is that the IC keeps resetting itself once a second. At first, I measured 12 V on the 3.3 V rail but nothing shorted the two power rails together. Then I replaced the IC with a new one, and now it is resetting faster, around twice a second. Now, I also hear a little noise from the inductor when it tries to turn on. Should I look for soldering issues or maybe redo something in the schematic?</p>
| TPS564247 switching voltage regulator problem | 2024-03-17T20:54:54.967 |
706439 | |identification|connector| | <p>Found and tested them: Mini Micro Jst 2.0 Ph 4 Pin</p>
<p><a href="https://rads.stackoverflow.com/amzn/click/com/B01DUC1S7S" rel="nofollow noreferrer" rel="nofollow noreferrer">https://www.amazon.com/dp/B01DUC1S7S?psc=1&ref=ppx_yo2ov_dt_b_product_details</a></p>
| <p>I tried really hard to find this online using all sorts of filters on various sites. Trying to identify this connector for LED strip modules.</p>
<p>4 pins, no latches (just flanges), 8.51 mm wide, 3.62 mm height.</p>
<p><a href="https://i.stack.imgur.com/eCF8W.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/eCF8W.jpg" alt="LED connector" /></a></p>
| Identify connector | 2024-03-17T23:19:59.733 |
706447 | |power-meter| | <p>Skimming the datasheet, it looks like there is a way to get the line frequency:</p>
<p><a href="https://i.stack.imgur.com/drye9.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/drye9.png" alt="enter image description here" /></a></p>
<p><a href="https://www.analog.com/media/en/technical-documentation/data-sheets/ADE7816.pdf" rel="nofollow noreferrer">https://www.analog.com/media/en/technical-documentation/data-sheets/ADE7816.pdf</a></p>
<p>Page 29.</p>
| <p>We are designing an Energy meter based on ADE7816, we put line frequency as a programmable parameter, which will be entered by the operator, Is there any way to automatically detect the frequency using this chip,</p>
<p>and what is the best way or best practice to do detect frequency of power line in general.</p>
<p>Looking forward to your help</p>
| Energy meter, automatic line frequency detection | 2024-03-18T00:17:14.660 |
706461 | |dc-motor|short-circuit|polarity| | <p>This could be done with two SPDT relays:</p>
<p><img src="https://i.stack.imgur.com/l6nUg.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fl6nUg.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>I used a lamp to represent the motor, as I couldn't find a motor in CircuitLab.</p>
<p>With both relays released, both sides of the motor will be Grounded, so it won't run. Likewise, with both relays operated, both sides of teh motor will be at +12V, so it won't run.</p>
<p>With either the "Forward" or "Reverse" leads grounded, one relay will operate and that side of the motor will be connected to the positive supply, so the motor will run in one direction.</p>
<p>As the Shelley outputs appear to be simple normally-open contacts, you will need additional relays that will be controlled through the Shelley contacts.</p>
| <p>Using a device like a Shelly Uni, which has controllable sets of dry contacts, can two sets of dry contacts be used to run an electric motor in either direction, using only one power source?</p>
<p>Ie, assume that positive power is connected to side A of the motor, and the negative is connected via one set of dry contacts to side B of the motor. To operate in the reverse direction would require positive to be connected via another set of dry contacts to side B of the motor. The corollary is that negative would have to be connected to side A of the motor, which already has positive connected to it, which is a short.</p>
<p>Are there any simple circuit options to allow this to work?</p>
<p>Edit: Below is a diagram of the Shelly Uni to illustrate what I mean by sets of dry contacts. <a href="https://kb.shelly.cloud/knowledge-base/shelly-uni" rel="nofollow noreferrer">https://kb.shelly.cloud/knowledge-base/shelly-uni</a></p>
<p><a href="https://i.stack.imgur.com/gjRFf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gjRFf.png" alt="enter image description here" /></a></p>
| Can I control a motor in both directions using two sets of dry contacts | 2024-03-18T04:54:24.310 |
706463 | |fpga|sine|dds| | <p>First, you have to isolate the issue and find out if either the issue is with your Verilog module or with the DAC.</p>
<p>I see a couple of issues in your Verilog module.</p>
<ol>
<li>You have not used <code>clk</code> in the module and you are using the combinational logic to send data to output.</li>
<li>You have used Non-blocking statement (<code><=</code>) in the <code>always</code> block.</li>
</ol>
<p>To correct it, you have to use the <code>clk</code> in the sensitivity list.</p>
<pre><code>module LUT_1024(
input clk, rst,
input [9:0] address,
output reg [15:0] new
);
always @(posedge clk) begin
if(rst) begin
new<=0;
end
else begin
case (address)
10'd0: new<=16'h80C;
10'd1: new<=16'h818;
10'd2: new<=16'h825;
10'd3: new<=16'h831;
.
.
.
10'd1023: new<=16'h80C;
default: new<=16'h0;
endcase
end
end
endmodule
</code></pre>
<p>But this is not a recommended way to work with LUT in Verilog. To create a LUT table we define a memory and provided values in the <code>initial</code> block. And then rest of the time we just read from the memory, as below.</p>
<pre><code>module LUT_1024(
input clk, rst,
input [9:0] address,
output reg [15:0] new
);
reg [15:0] LUT_Mem [0:1023];
initial begin
LUT_Mem[0]=16'h80C;
LUT_Mem[1]=16'h818;
LUT_Mem[2]=16'h825;
LUT_Mem[3]=16'h831;
.
.
.
LUT_Mem[1023]=16'h80C;
end
always @(posedge clk) begin
if(rst) begin
new<=0;
end
else begin
new <= LUT_Mem[address];
end
endmodule
</code></pre>
<p>Further issue that you have to look for is your DAC is 12 bit but the LUT values that you are generating are going to exceed the 12 bit. For example, the maximum value that should be given to DAC has to be less 4096 but the LUT that you have generated seems to exceed that value based on the starting value that you have provided i.e. <code>16'h80C</code>.</p>
<p><a href="https://i.stack.imgur.com/zEOE0.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zEOE0.png" alt="enter image description here" /></a></p>
<p>Generate the LUT with the following settings from the <a href="https://deepbluembedded.com/sine-lookup-table-generator-calculator/" rel="nofollow noreferrer">link</a>:</p>
<pre><code>Number of Points: 1024
Maximum Amplitude Value: 4000
Numbers Per Line: 1
Output Values Type: Hex
</code></pre>
<p>Now there is one more thing that you have to check for is, how you are generating the <code>address</code> to read values from the LUT table in the above Verilog module. If you are not generating <code>address</code> properly then it may de-shape the sin wave.</p>
<p>Lastly, simulation is your ally here. If the error is on FPGA side (i.e. Verilog) then you can easily capture it in the simulation.</p>
| <p>I am performing direct digital synthesis on my FPGA using lookup tables, and jumping through them to increase output frequency.</p>
<p>As the value of the phase accumulator increases, the sine wave becomes increasingly distorted, which isn't a problem since I have a low pass filter (not my domain.) The issue is that the output deviation increases heavily.</p>
<p>I have a couple of questions:</p>
<ol>
<li>I understand why the distortion in the sine wave occurs, but why is there a deviation in output frequency? I developed a formula for my DAC. The deviation is quite a lot. Why does this variation occur?</li>
<li>How do I accurately generate 100kHz? My phase accumulator is 32 bits, and my LUT is 10-bit. I can't increase it too much due to memory considerations.</li>
</ol>
<p>Edit:</p>
<p>Code for LUT:</p>
<pre><code>module LUT_1024(
input clk, rst,
input [9:0] address,
output reg [15:0] new
);
always @(*) begin
if(rst) begin new<=0; end
else begin
case (address)
10'd0: new<=16'h80C;
10'd1: new<=16'h818;
10'd2: new<=16'h825;
10'd3: new<=16'h831;
.
.
.
10'd1023: new<=16'h80C;
default: new<=16'h0;
endcase
end end
endmodule
</code></pre>
| How can I generate a 100kHz sine wave on FPGA? | 2024-03-18T06:58:24.033 |
706464 | |feedback|error-amplifier| | <p>Here is what you get (with modification to slow down waveform ...)<br />
C2 made 10 nF in place of 10 pF.</p>
<p><a href="https://i.stack.imgur.com/mxPyS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/mxPyS.png" alt="enter image description here" /></a></p>
| <p>I'm simulating the "voltage error amplifier circuit" referenced from <a href="https://www.allaboutcircuits.com/technical-articles/implementing-a-current-mode-controlled-buck-converter-in-ltspice/" rel="nofollow noreferrer">this article</a></p>
<p>In the article, "Vcontrol" will drop to zero when "Vout" is larger than the reference voltage (1.215 [V] here)</p>
<p>But i'm wasn't being able to replicate the result from the above article</p>
<p>The simulation result and circuit from the article are shown below
<a href="https://i.stack.imgur.com/SI6rU.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SI6rU.png" alt="enter image description here" /></a></p>
<p>Mine is shown below (Simulating in LTspice)</p>
<p><a href="https://i.stack.imgur.com/H6CXI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/H6CXI.png" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/0AYXx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0AYXx.png" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/bwIYj.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bwIYj.png" alt="enter image description here" /></a></p>
<p>The control voltage (Vcontrol) is hundreds of kilovolts, which is quite not reasonable</p>
<p>My questions are</p>
<p>a) How could I modify my circuit to meet the same result as in the article?</p>
<p>b) Is there a design criterion to choose the feedback passive elements?</p>
<h2>Thanks!</h2>
<p>2024/03/18 UPDATE</p>
<p>After changing the op model to "UniversalOpAmp3" from @Fabio Barone's suggestion, the output "Vcontrol" became more reasonable in amplitude, but the result is still different from the article.
<a href="https://i.stack.imgur.com/XcZjf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XcZjf.png" alt="enter image description here" /></a></p>
<p>2023/03/19 UPDATE</p>
<p>After correcting the voltage supply polarity from @Fabio Barone's suggestion, the result looks normal now, below is the result for two changes</p>
<p>1.Change the polarity of V3, which is the main reason that this circuit didnt function normally.
<a href="https://i.stack.imgur.com/DvknY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DvknY.png" alt="enter image description here" /></a></p>
<p>2.Change the supply rail from +/-5 [V] to +/-12 [V]
<a href="https://i.stack.imgur.com/LjyQO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/LjyQO.png" alt="enter image description here" /></a></p>
| Error amplifier selection | 2024-03-18T07:03:23.597 |
706472 | |multiplexer| | <p>The section that you're referring to ("Unconventional use of Multiplexers for arithmetic") has only been added to the Wikipedia page two days ago. It contains many grammatical errors and cites a source that is almost as young as the edit itself (from March 4th), which makes me suspect that the poor-quality Wikipedia edit was done by one of the paper's authors to boost the reach of their paper. Take it with more than just a grain of salt. For the purpose of learning digital logic, you can disregard the entire section as it's only relevant to the field of statistical computing.</p>
<p>In general, multiplexers can be used to implement any arbitrary logic function. In the simplest case, you can build a look-up table that contains the truth table of the desired logic function directly by connecting each mux input to a constant 1 or 0. The inputs of the circuit are then connected to the select input of the mux. This is also explained in <a href="https://en.wikipedia.org/wiki/Multiplexer#Multiplexers_as_PLDs" rel="nofollow noreferrer">the "Multiplexers as PLDs" section</a> of the same Wikipedia article.</p>
| <p>I'm new to electronics, just learning about logic gates and combinations like binary adders and multipliers. But I came across the internet and found that a simple multiplexer (MUX) could do addition, even multiply-accumulate operations from <a href="https://en.wikipedia.org/wiki/Multiplexer" rel="nofollow noreferrer">Wikipedia</a>. I'm confused, how choosing 1 and 0 can do the math, isn't it an adder and multiplier that do the math?</p>
| Is multiplexer a multipler or adder? | 2024-03-18T09:33:23.727 |
706481 | |microcontroller|current-sensing|high-side| | <p>The capacitor <code>CSENSE</code> in the schematic you posted acts as an analog averaging filter (RC low-pass). If you want to average the signal more, you can increase the value of this cap. No oversampling is needed.</p>
| <p>I'm building an automotive power distribution module which makes use of the Infineon <a href="https://www.infineon.com/dgdl/Infineon-BTS50010-1LUA-DataSheet-v01_10-EN.pdf?fileId=8ac78c8c85ecb3470186015e6ce406a0" rel="nofollow noreferrer">BTS50010</a> high-side driver.</p>
<p>The high-side driver current is monitored via the sense pin (IS) connected to a microcontroller, see below schematic:</p>
<p><a href="https://i.stack.imgur.com/HPLpq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HPLpq.png" alt="BTS50010 Application Schematic" /></a></p>
<p>If we say R<sub>Load</sub> is a switching a load such as an ignition coil and as such, results in a varying HSD sense pin output, what would be a good way of accurately measuring load current?</p>
<p>The only way I can think of doing this would be by oversampling the current sense output with averaging in an attempt to calculate an accurate current value.</p>
| High-side driver current monitoring via microcontroller | 2024-03-18T12:28:41.277 |
706496 | |mosfet|oscillator|555|spark| | <p>The NE555 needs more than 4.5V of supply voltage; you're feeding it with less.</p>
<p>You have two options:</p>
<ol>
<li>(not recommended) replace your step-down converter with a step-up converter producing at least 5.0V and continue to use the obsolete NE555.</li>
<li>(better) replace your NE555 with a CMOS-based 555 (LMC555, or <strong>many</strong> others); these work with far lower supply voltages. This has the added advantage of only requiring a tiny fraction of the really quite high supply current of the NE555 and instantly significantly improving battery life. You don't need the step-down converter.</li>
<li>(recommended) simply use a simpler oscillator circuit than the 555. Your spark gap doesn't need high frequency accuracy, so a simple relaxation oscillator made of a comparator, three resistors and a capacitor would do. Alternatively, a Pierce oscillator made from a CMOS inverter, a capacitor and a quartz crystal would be very stable (much more stable than any 555 circuit!), but the cheapest quartz crystals on the market would probably have a 32.768 Hz, not 21.818 Hz.</li>
</ol>
<p>Note that your schematic specifies 6 significant digits for the frequency of your NE555 oscillator, but that's a lie if one reads it literally: six significant digits would mean the oscillator achieves an accuracy of better than 1 ppm; that's impossible with a 555 and a 100 nF capacitor. You'd be very happy if you achieve 3 % accuracy. low-frequency crystal oscillators however routinely achieve 3 ppm accuracy, thus being 10,000 times more accurate.</p>
| <p>I have a circuit designed and fabricated with the following schematic:</p>
<p><a href="https://i.stack.imgur.com/rVnsq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/rVnsq.png" alt="555 Timer and MOSFET spark gap circuit. " /></a></p>
<p>The specific 555 timer I'm using is a NE555DR.</p>
<p>However, when under power the circuit doesn't appear to oscillate and no spark appears at the other side of my transformer. If anyone has any quick pointers why, it'd be much appreciated!</p>
<p>Working voltage is 3.7V from a LiPo. When I probe the OUT pin of the oscillator, I just see ~1.5V stable.</p>
| 555 Circuit for Spark Gap Lighter Not Functioning Correctly | 2024-03-18T14:43:23.877 |
706501 | |oscilloscope|signal-integrity| | <p>A 1 MHz sine wave is <em>not</em> the same as a 1 MHz square wave - the most important part of what you're measuring and interested in here is actually the "<em>edge rate</em>", or the rise and fall times.</p>
<p>The screenshot you've provided doesn't show the edge in great detail, but it appears to have a ~3px rise time (3 pixels in the X direction), with a 50px graticule configured for 100ns /div ... that's approximately a ~6ns rise time. These edge times are typically measured between 10% and 90%, so rounding that down to ~4ns (or honestly, probably less), you'll be looking for equipment with a bandwidth in excess of 100 MHz (<code>bandwidth * rise_time = 0.45</code>, <a href="https://www.tek.com/en/support/faqs/how-bandwidth-related-rise-time-oscilloscopes" rel="noreferrer">according to Tektronix</a>).</p>
<p>The next thing to remember is that the rated bandwidth is <em>generally</em> the -3 dB point... which is where the signal has reduced to half power, or ~70.7% of the original signal's amplitude. (<a href="https://electronics.stackexchange.com/a/6961/142242">What is the significance of -3 dB?</a>).</p>
<p>Finally, as has been mentioned in the comments, probes need to be <a href="https://www.tek.com/en/documents/application-note/how-oscilloscope-probes-affect-your-measurement" rel="noreferrer">compensated</a> so they'll <em>more accurately</em> show you the signal you're probing. That "<em>more accurately</em>" part is incredibly important - simply inserting a probe into a circuit can have all sorts of implications, and there are many situations where your equipment may be lying to you, or at least not telling the whole truth - from horrific aliasing artifacts, to poor grounding, through to exactly what you're seeing here.</p>
| <p>Recently I purchased my very first scope and noticed something I'm really curious about its cause.</p>
<p>It's a 100 MHz scope, when I was testing to see the ringing of a 1 MHz clock signal with different values of series termination, using 100 MHz probe and 200 MHz shows quite different waveform:</p>
<p><a href="https://i.stack.imgur.com/Cy4C4.png" rel="noreferrer"><img src="https://i.stack.imgur.com/Cy4C4.png" alt="enter image description here" /></a></p>
<p><strong>Ref1</strong> (top, 200 MHz probe) clearly showed the ringing exists while on <strong>Ref2</strong> (bottom, 100 MHz probe) the signal already looked a little bit "not so sharp".</p>
<p>To my understanding, the bandwidth of scope and probe should be at least 5x of the signal frequency under test. In this case the signal is 1 MHz, which should be very easy for both 100 and 200 MHz probe to capture.</p>
<p>What is causing such huge difference?</p>
| 100 MHz probe and 200 MHz probe show very different waveform on 1 MHz signal | 2024-03-18T15:18:37.880 |
706510 | |microcontroller|lcd| | <p>Of course it is possible.</p>
<p>If you want to write contents of a variable, you need to convert the variable contents into a string of ASCII characters.</p>
<p>That's what printf() family of functions can already do for you.</p>
<p>If you want to do it yourself, you need to understand how numbers work. If you have a number 47, it consists of decimal digits '4' and '7', where '4' in the place for 10s and '7' in the place for 1s. So you need to print ASCII characters '4' and '7'.</p>
| <p>i read the MC21605H6W-SPR3-V2 LCD Datasheet that work with SPLC780D <a href="https://newhavendisplay.com/content/app_notes/SPLC780D.pdf" rel="nofollow noreferrer">https://newhavendisplay.com/content/app_notes/SPLC780D.pdf</a> controler.</p>
<p>And i don't understand how can i write a variable character on the screen. Cause LCD character is an address.
That possible to do something like that ? and how ?</p>
<p>I am using MPLAB for PIC.</p>
<pre><code>a = 47;
lcd_write(a);
</code></pre>
| That is possible to write on LCD a variable? | 2024-03-18T16:10:07.197 |
706532 | |transistors|mosfet| | <p>I made a few small changes
<a href="https://i.stack.imgur.com/bgM22.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bgM22.png" alt="enter image description here" /></a></p>
<p><a href="https://i.stack.imgur.com/qLXWa.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qLXWa.png" alt="enter image description here" /></a></p>
<p>It seems like you still don't really understand how the amplifier should work.</p>
<p>Here is asc file.</p>
<pre><code>Version 4
SHEET 1 1128 680
WIRE 80 32 -160 32
WIRE 160 32 80 32
WIRE 208 32 160 32
WIRE 288 32 208 32
WIRE 32 48 0 48
WIRE 400 48 336 48
WIRE -160 64 -160 32
WIRE 160 80 160 32
WIRE 160 80 80 80
WIRE 208 80 208 32
WIRE 288 80 208 80
WIRE 288 144 288 128
WIRE 416 144 288 144
WIRE 464 144 416 144
WIRE -160 160 -160 144
WIRE 80 160 80 128
WIRE 96 160 80 160
WIRE 592 160 592 112
WIRE 752 160 752 112
WIRE 80 192 80 160
WIRE 192 192 80 192
WIRE 896 192 896 112
WIRE 80 208 80 192
WIRE 288 208 288 144
WIRE 1056 208 1056 128
WIRE 128 256 80 256
WIRE 336 256 288 256
WIRE -16 288 -16 240
WIRE -16 288 -96 288
WIRE 32 288 -16 288
WIRE 192 288 192 192
WIRE 240 288 192 288
WIRE 80 320 80 304
WIRE 96 320 80 320
WIRE 80 352 80 320
WIRE 160 352 80 352
WIRE 416 352 416 224
WIRE 448 352 416 352
WIRE 416 384 416 352
WIRE -96 400 -96 368
WIRE 160 432 80 432
WIRE 288 432 288 304
WIRE 80 464 80 432
WIRE 592 464 592 240
WIRE 592 464 416 464
WIRE 752 464 752 240
WIRE 752 464 592 464
WIRE 896 464 896 272
WIRE 896 464 752 464
WIRE 1056 464 1056 288
WIRE 1056 464 896 464
WIRE 416 480 416 464
FLAG -160 160 0
FLAG 464 144 Vout
IOPIN 464 144 Out
FLAG 416 480 0
FLAG -96 400 0
FLAG 592 112 Vicm
FLAG 752 112 Vid
FLAG 896 112 VB
FLAG 400 48 VB2
FLAG 0 48 VB
FLAG 96 160 Vx
IOPIN 96 160 Out
FLAG 288 432 0
FLAG 448 352 VF
IOPIN 448 352 Out
FLAG 128 256 0
FLAG 336 256 0
FLAG -160 32 VDD
FLAG 80 464 0
FLAG 96 320 VS
IOPIN 96 320 Out
FLAG -16 240 Vin
IOPIN -16 240 In
FLAG 1056 128 VB2
SYMBOL nmos4 32 208 R0
SYMATTR InstName M1
SYMATTR Value NMOS-SH
SYMATTR Value2 l=0.5u w=50u
SYMBOL nmos4 240 208 R0
SYMATTR InstName M2
SYMATTR Value NMOS-SH2
SYMATTR Value2 l=0.5u w=50u
SYMBOL pmos4 32 128 M180
SYMATTR InstName M3
SYMATTR Value PMOS-SH
SYMATTR Value2 l=0.5u w=50u
SYMBOL pmos4 336 128 R180
WINDOW 3 -109 47 Left 2
SYMATTR Value PMOS-SH
SYMATTR InstName M4
SYMATTR Value2 l=0.5u w=50u
SYMBOL res 400 368 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 400 128 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -160 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3
SYMBOL voltage 592 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vicm
SYMATTR Value 952mV
SYMBOL voltage 752 144 R0
WINDOW 3 -43 343 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1m 1k)
SYMATTR Value2 AC 1
SYMATTR InstName Vid
SYMBOL voltage 896 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 2.4
SYMBOL res 64 336 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 144 336 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage 1056 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB2
SYMATTR Value 2
SYMBOL bv -96 272 R0
WINDOW 3 -85 180 Left 2
WINDOW 0 -27 -3 Left 2
SYMATTR Value V=V(Vicm)+V(Vid)
SYMATTR InstName Vin1
TEXT -96 -120 Left 2 !.MODEL PMOS-SH pmos(kp=45u,vto=-0.42, lambda = {0.14/1})
TEXT -96 -144 Left 2 !.MODEL NMOS-SH nmos(kp=180u,vto=0.4, lambda = {0.1/1})
TEXT 176 -72 Left 2 !;ac oct 110 10 1Meg\n;op
TEXT -96 -168 Left 2 !.MODEL NMOS-SH2 nmos(kp=450u,vto=1.05 lambda = {0.14/1})
TEXT 176 -16 Left 2 !.tran 0 5m 0 1u
</code></pre>
| <p>This is my circuit schematic</p>
<p><a href="https://i.stack.imgur.com/f35J7.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/f35J7.png" alt="enter image description here" /></a></p>
<p>I have tried to use <code>.dc</code> for Vicm, VDD and VB. But all I have tried seemed to be in vain.
I can't make all of them work in saturation mode.</p>
<p>Here is asc file.</p>
<pre><code>Version 4
SHEET 1 1048 680
WIRE 80 32 -160 32
WIRE 160 32 80 32
WIRE 208 32 160 32
WIRE 288 32 208 32
WIRE 32 48 0 48
WIRE 400 48 336 48
WIRE -160 64 -160 32
WIRE 160 80 160 32
WIRE 160 80 80 80
WIRE 208 80 208 32
WIRE 288 80 208 80
WIRE 288 144 288 128
WIRE 416 144 288 144
WIRE 464 144 416 144
WIRE -160 160 -160 144
WIRE 80 160 80 128
WIRE 96 160 80 160
WIRE 592 160 592 112
WIRE 752 160 752 112
WIRE 80 192 80 160
WIRE 192 192 80 192
WIRE 896 192 896 112
WIRE 80 208 80 192
WIRE 288 208 288 144
WIRE 128 256 80 256
WIRE 368 256 288 256
WIRE -16 288 -16 240
WIRE -16 288 -96 288
WIRE 32 288 -16 288
WIRE 192 288 192 192
WIRE 240 288 192 288
WIRE 80 320 80 304
WIRE 96 320 80 320
WIRE 288 320 288 304
WIRE 80 352 80 320
WIRE 160 352 80 352
WIRE 416 352 416 224
WIRE 448 352 416 352
WIRE 416 384 416 352
WIRE -96 400 -96 368
WIRE 160 432 80 432
WIRE 80 464 80 432
WIRE 592 464 592 240
WIRE 592 464 416 464
WIRE 752 464 752 240
WIRE 752 464 592 464
WIRE 896 464 896 272
WIRE 896 464 752 464
WIRE 416 480 416 464
FLAG -160 160 0
FLAG 464 144 Vout
IOPIN 464 144 Out
FLAG 416 480 0
FLAG -96 400 0
FLAG 592 112 Vicm
FLAG 752 112 Vid
FLAG 896 112 VB
FLAG 400 48 VB
FLAG 0 48 VB
FLAG 96 160 Vx
IOPIN 96 160 Out
FLAG 288 320 0
FLAG 448 352 VF
IOPIN 448 352 Out
FLAG 128 256 0
FLAG 368 256 0
FLAG -160 32 VDD
FLAG 80 464 0
FLAG 96 320 VS
IOPIN 96 320 Out
FLAG -16 240 Vin
IOPIN -16 240 In
SYMBOL nmos4 32 208 R0
SYMATTR InstName M1
SYMATTR Value NMOS-SH
SYMATTR Value2 l=0.5u w=50u
SYMBOL nmos4 240 208 R0
SYMATTR InstName M2
SYMATTR Value NMOS-SH
SYMATTR Value2 l=0.5u w=50u
SYMBOL pmos4 32 128 M180
SYMATTR InstName M3
SYMATTR Value PMOS-SH
SYMATTR Value2 l=0.5u w=50u
SYMBOL pmos4 336 128 R180
WINDOW 3 -109 47 Left 2
SYMATTR Value PMOS-SH
SYMATTR InstName M4
SYMATTR Value2 l=0.5u w=50u
SYMBOL res 400 368 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 400 128 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -160 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3
SYMBOL bv -96 272 R0
WINDOW 3 -107 102 Left 2
SYMATTR Value V=V(Vicm)+V(Vid)
SYMATTR InstName Vin
SYMBOL voltage 592 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vicm
SYMATTR Value 1
SYMBOL voltage 752 144 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName Vid
SYMBOL voltage 896 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 2
SYMBOL res 64 336 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 144 336 R0
SYMATTR InstName R4
SYMATTR Value 1k
TEXT -72 -72 Left 2 !;tf V(Vout) Vid
TEXT -96 -120 Left 2 !.MODEL PMOS-SH pmos(kp=45u,vto=-0.42, lambda = {0.14/1})
TEXT -96 -144 Left 2 !.MODEL NMOS-SH nmos(kp=180u,vto=0.4, lambda = {0.1/1})
TEXT -72 -40 Left 2 !;dc Vicm 0 5 0.01
TEXT 176 -72 Left 2 !;ac oct 10 100MEG 100G\n.op
TEXT -72 -16 Left 2 !;dc VDD 0 5 0.01
TEXT -72 8 Left 2 !;dc VB 0 5 0.01
</code></pre>
| What voltage should I choose in in order to make sure all transistor are in saturation in LTspice? | 2024-03-18T21:04:24.083 |
706537 | |ground|grounding|tvs| | <p>It is likely that there is expected to be a DC offset between the two gnds (4..20mA current loops are often powered remotely over long cables). Hence the circuit separates them. Presumably it uses a sense resistor and differential amplifier to measure the signal and presumably this circuit can accommodate a range of common mode voltages so as to be able to work when AGND is offset from circuit GND.</p>
<p>The TVS and caps are there to shunt any ESD or other large transient to FG and thus protect the inputs of the differential amplifier.</p>
<p>This type of sensor is often used in industrial settings where large inductive loads generate a lot of EM noise that can in turn couple into the sensor wires and sometimes generate high voltages.</p>
| <p>I'd like to know why this circuit has a TVS diode between both grounds.
The field ground is the physical ground used in the circuit and the analog ground is used for 6 analog signals (between 4 and 20mA). Those signals are designed for sensors (a wide variety of sensors). My guess is because such signals can be very sensible to noise (and the circuit also has nosiy digital signals), the grounds need that protection. My second guess is that, due to the fact that I can't possibly know which sensors are going to be used (because it's a multipurpose design), you need that protection to make sure that the sensors don't damage the circuit. It is also realistic to think about human error, and that maybe someone connects a sensor not designed for such currents.</p>
<p><a href="https://i.stack.imgur.com/soMRs.png" rel="noreferrer"><img src="https://i.stack.imgur.com/soMRs.png" alt="Figure" /></a></p>
| Bidirectional TVS between field ground and analog ground | 2024-03-18T21:46:41.747 |
706540 | |circuit-design|rf|antenna| | <p>You could consult the ADG904 data sheet:
<a href="https://www.analog.com/media/en/technical-documentation/data-sheets/ADG904.pdf" rel="nofollow noreferrer">https://www.analog.com/media/en/technical-documentation/data-sheets/ADG904.pdf</a>
or browse through IEEE publications:
<a href="https://i.stack.imgur.com/4Z678.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4Z678.png" alt="enter image description here" /></a>
or also consult the following old text:
<a href="https://i.stack.imgur.com/Gn0Un.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Gn0Un.jpg" alt="enter image description here" /></a></p>
| <p>I'm planning on building a Pseudo-Doppler Radio Direction finder, and have some questions for those more experienced than I am. For those unfamiliar, a Pseudo-Doppler DF device is a device that by sequentially sampling a number of antennas can, using the induced doppler effect, estimate the direction of an incoming signal.</p>
<p>While I have good experience with the mathematics surrounding the sampling theorems, aliasing and FFT, my experience with antenna design and RF electronics is very limited.</p>
<p><strong>My issue</strong> is that between the 433 MHz antennas and multiplexor of type (e.g.) ADG904, a circuit handling filtering, amplification and signal matching with the ic must be made. I did note this negative answer regarding building a <a href="https://electronics.stackexchange.com/questions/31349/433-mhz-receiver">433 MHz receiver</a> which was discouraging, since it is the only frequency I can legally use for testing. Note however, that I only need to pick up a signal, not extract any particular data.</p>
<p><strong>My question</strong> is if there is any good literature or sources I can consult to get knowledgeable enough to create, for the purpose, a working circuit? My background is in engineering physics and I have some courses in analog and digital electronics. I would be okay reading a lot of material if that is necessary.</p>
| Advice on RF circuit design - Pseudo-Doppler | 2024-03-18T21:57:20.947 |
706542 | |voltage|capacitor|motor|ac|series| | <p>I have stand fans here that tend to burn out regularly because the bearings get dirty, causing friction thereby increasing the slip, which makes the stator overheat, which blows out the thermal protective fuse. That's not important at all, but made me open quite a few of those when trying to repair them by replacing the thermal fuse with a new one.</p>
<p>What I noticed, is that there is only one capacitor, working on one winding.
That could be the same in your fan: 1 capacitor to just get it running, and in your case 8<span class="math-container">\$\mu\$</span>F.</p>
<p>Then for the speed control there are one (supposedly ground) wire and three wires to select between, with a selector switch connected to the line voltage, for speed control. Those three wires are supposedly different taps on the same stator coil to control the stator flux's strength.</p>
<p>In those stand fans my take is that each subsequent coil wire is part of the same main stator coil but adds some windings to it in order to lower the flux, hence to increase the slip, and so to decrease the rotational speed.</p>
<p>Now, with the current power electronic circuits we can directly control the voltage, and with that the flux and hence the slip and therefore the speed, so that we don't need additional windings with switches anymore.</p>
<p>So the capacitor probably is still necessary, but needs to be built into the ceiling fan near the electric motor itself, and to the appropriate wires. The controller might need to be connected to the coil with the lowest winding count with respect to its neutral line. Then with maximum voltage the fan might run at high speed, and voltage can be lowered by increasing the ignition angle of the triac in order to lower the average half-cycle voltage, and therefore flux, which would increase the slip and so decrease the rotational speed.</p>
| <p>I bought this Zigbee ceiling fan controller:</p>
<p><a href="https://i.stack.imgur.com/GxyWY.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GxyWY.jpg" alt="enter image description here" /></a></p>
<p><a href="https://pt.aliexpress.com/item/1005005835095616.html?gatewayAdapt=glo2bra" rel="nofollow noreferrer">product page</a></p>
<p>I started to wonder about what the purpose of a capacitor in a ceiling fan is.</p>
<p>This controller claims that it already controls the speed, and I've seen some places saying that the capacitor is for regulating the speed, and others saying that it's used to start the fan.</p>
<p>What is the purpose of a capacitor in a ceiling fan, and how is it affected when the controller already controls the speed? I found <a href="https://electronics.stackexchange.com/a/115912/279212">https://electronics.stackexchange.com/a/115912/279212</a> which explains that the capacitor is for a voltage drop which controls the speed. So I don't need the capacitor if the controller already does everything?</p>
<p>My capacitor has 3 wires. I researched and found out it's actually 2 capacitors, but it has 2 wires soldered together which makes things difficult</p>
<p>This is my capacitor that already works with the fan:</p>
<p><a href="https://i.stack.imgur.com/gMQWh.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gMQWh.jpg" alt="enter image description here" /></a></p>
| How to wire a capacitor together with a Zigbee fan controller? Do I need the capacitor at all? | 2024-03-18T22:05:13.433 |
706557 | |arduino|stepper-motor|stepper-driver| | <p>I think I figured it out;</p>
<hr />
<p>At first I tried messing around with the SPI registers some more, and while I was able to view them and change some of them, I wasn't able to get the motor to run, even with a different microcontroller.</p>
<p>I also contacted BigTreeTech, who straight up told me:
"TMC 2240 only has two modes, one is uart and the other is SPI. Setp/DIR mode cannot be used".</p>
<p>That response left me even more confused, about ready to give up with this driver.</p>
<p>However, after some more searching online, I finally found a library named <code>TMC2240-LIB</code> on GitHub:
<a href="https://github.com/makerbase-mks/TMC2240-LIB" rel="nofollow noreferrer">https://github.com/makerbase-mks/TMC2240-LIB</a></p>
<p>I downloaded it, and installed it manually into my Arduino IDE (since it's not listed in Arduino IDE's Library Manager). It appeared simillar to the existing <code>TMCStepper</code> library that's often used with BigTreeTech's other drivers, so I tried to compile a sketch with it.</p>
<p>However, initially it could not compile, because of missing included files. After taking a look at the files it was trying to include, it seemed like it was trying to include the <code>TMCStepper</code> library.
I then realized that this is probably supposed to be an addition to the <code>TMCStepper</code> library, probably not yet included because the TMC2240 is a relatively new driver. Indeed, most of the functions defined in the <code>TMC2240Stepper</code> class are the same as the other drivers included in <code>TMCStepper</code>.</p>
<p>I then thought that I would probably have to merge <code>TMC2240-LIB</code> into <code>TMCStepper</code>, however I was able to get a sketch to compile by just including <code>TMCStepper</code> before <code>TMC2240-LIB</code>'s main header file named <code>TMC2240XStepper.h</code>.</p>
<p>Using that setup, with all the SPI pins connected, I was able to get the motor running with the following testing code, using the <code>STEP</code> and <code>DIR</code> pins:</p>
<pre><code>#include "TMCStepper.h"
#include "TMC2240XStepper.h"
const int PIN_EN = 21;
const int PIN_STEP = 5;
const int PIN_DIR = 10;
const int PIN_CS = 23;
const int PIN_CLK = 19;
const int PIN_MOSI = 22;
const int PIN_MISO = 18;
TMC2240Stepper Stepper(PIN_CS, PIN_MOSI, PIN_MISO, PIN_CLK);
void setup()
{
Serial.begin(9600);
pinMode(PIN_EN, OUTPUT);
pinMode(PIN_STEP, OUTPUT);
pinMode(PIN_DIR, OUTPUT);
digitalWrite(PIN_EN, LOW);
Stepper.begin();
Stepper.toff(5);
Stepper.rms_current(600);
Stepper.microsteps(2);
}
void loop()
{
digitalWrite(PIN_DIR, HIGH);
for (int i = 0; i < 200; i++)
{
digitalWrite(PIN_STEP, HIGH);
delayMicroseconds(500);
digitalWrite(PIN_STEP, LOW);
delayMicroseconds(500);
}
digitalWrite(PIN_DIR, LOW);
for (int i = 0; i < 200; i++)
{
digitalWrite(PIN_STEP, HIGH);
delayMicroseconds(500);
digitalWrite(PIN_STEP, LOW);
delayMicroseconds(500);
}
delay(1000);
}
</code></pre>
<p>The proper way to do this would probably be to merge the two libraries, to put <code>TMC2240XStepper</code> in with the rest of the drivers defined in <code>TMCStepper</code>, but the setup above worked for me.</p>
<p><a href="https://i.stack.imgur.com/FhKSE.gif" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/FhKSE.gif" alt="enter image description here" /></a></p>
<p>Something interesting that I noticed while messing around with the SPI registers of the driver, is that this driver apparently requires BOTH the logic <code>VIO</code> and the motor <code>VM</code> pins to be connected to power in order for the registers to maintain their values. If either of the two power pins get disconnected, the registers get wiped shortly after. That struck me as strange, as the VM power I would assume would only get used to supply the motor. But I have also never had to read individual registers inside these drivers, so I couldn't say for certain whether this is the intended behaviour.</p>
<p>However, since the <code>TMC2240Stepper</code> class functions access the registers to configure the driver, that also means that this driver appears to only be able to properly configure itself at startup if BOTH the logic and motor power are supplied.</p>
<hr />
<p>PS:</p>
<p>After some more time spent messing around with the driver, I was able to rewrite the code so that it doesn't rely on the mentioned libraries at all. <code>TMC2240-LIB</code> appears to be unfinished, and it doesn't appear to have the functions for the vast majority of the registers written properly.</p>
<p>For the simple purposes of just running the motor and setting the current & microsteps, using the libraries as shown in my previous reply works, but I wanted to be able to control the driver more directly.</p>
<p>This code works for me for running the motor, and also acquiring the temperature of the driver as an added bonus:</p>
<pre><code>#include "SPI.h"
const int PIN_EN = 21;
const int PIN_STEP = 5;
const int PIN_DIR = 10;
const int PIN_CS = 23;
const int PIN_CLK = 19;
const int PIN_MOSI = 22;
const int PIN_MISO = 18;
uint8_t CurrentRun = 16;
uint8_t CurrentHold = 16;
uint8_t Microsteps = 4;
uint8_t TOff = 0x05;
float SPISpeed = 16000000 / 8;
bool Setup = false;
void setup()
{
Serial.begin(9600);
pinMode(PIN_EN, OUTPUT);
pinMode(PIN_STEP, OUTPUT);
pinMode(PIN_DIR, OUTPUT);
pinMode(PIN_CS, OUTPUT);
digitalWrite(PIN_EN, LOW);
SPI.begin(PIN_CLK, PIN_MISO, PIN_MOSI, PIN_CS);
digitalWrite(PIN_CS, HIGH);
}
void loop()
{
if (!Setup)
{
Setup = MotorInit(CurrentRun, CurrentHold, Microsteps);
if (!Setup)
{
Serial.println("Failed to initialize! Retrying...");
delay(1000);
return;
}
else
{
Serial.println("Successfully initialized!");
}
}
Serial.println("Status: " + ByteToBin(MotorGetStatus()));
Serial.println("Temp: " + String(MotorGetTemp()));
MotorRun(400, 0, 1000);
MotorRun(400, 1, 1000);
delay(5000);
}
uint8_t MotorGetStatus()
{
uint8_t status;
uint32_t dataDummy;
RegRead(0x00, &dataDummy, &status);
return status;
}
float MotorGetTemp()
{
uint8_t status;
uint32_t data;
RegRead(0x51, &data, &status);
return (float)((uint16_t)(data & 0x00001FFF) - 2038) / 7.7;
}
void MotorRun(const uint32_t steps, const bool dir, const uint32_t stepDelay)
{
digitalWrite(PIN_DIR, dir);
for (int i = 0; i < steps; i++)
{
digitalWrite(PIN_STEP, HIGH);
delayMicroseconds(stepDelay);
digitalWrite(PIN_STEP, LOW);
delayMicroseconds(stepDelay);
}
}
bool MotorInit(const uint8_t currentRun, const uint8_t currentHold, const uint8_t microsteps)
{
uint32_t ms;
switch (microsteps)
{
case 128: ms = 0x1; break;
case 64: ms = 0x2; break;
case 32: ms = 0x3; break;
case 16: ms = 0x4; break;
case 8: ms = 0x5; break;
case 4: ms = 0x6; break;
case 2: ms = 0x7; break;
case 1: ms = 0x8; break;
default: ms = 0x0; break;
}
// Setting TOFF flag & microsteps...
RegWrite(0x6C, 0x10410150 | (ms << 24) | TOff);
// Setting running & holding current...
RegWrite(0x10, 0x00060000 | ((uint32_t)(currentRun & 0x1F) << 8) | ((uint32_t)currentHold & 0x1F));
uint8_t status;
uint32_t data;
RegRead(0x6C, &data, &status);
if ((data & 0x0000000F) != TOff)
return false;
return true;
}
void RegWrite(const uint8_t address, const uint32_t data)
{
uint8_t buff[5] = {address | 0x80, (data >> 24) & 0xFF, (data >> 16) & 0xFF, (data >> 8) & 0xFF, data & 0xFF};
SPIExchange(buff, 5);
}
void RegRead(const uint8_t address, uint32_t* data, uint8_t* status)
{
uint8_t buff[5];
for (int i = 0; i < 2; i++)
{
buff[0] = address; buff[1] = 0x00; buff[2] = 0x00; buff[3] = 0x00; buff[4] = 0x00;
SPIExchange(buff, 5);
}
*status = buff[0];
*data = (buff[1] << 24) | (buff[2] << 16) | (buff[3] << 8) | buff[4];
}
void SPIExchange(uint8_t* data, const int size)
{
digitalWrite(PIN_CS, LOW);
delayMicroseconds(1);
SPI.beginTransaction(SPISettings(SPISpeed, MSBFIRST, SPI_MODE3));
delayMicroseconds(1);
SPI.transfer(data, size);
delayMicroseconds(1);
SPI.endTransaction();
delayMicroseconds(1);
digitalWrite(PIN_CS, HIGH);
delayMicroseconds(1);
}
String ByteToBin(const uint8_t num)
{
String str = String(bitRead(num, 0)) + String(bitRead(num, 1)) + String(bitRead(num, 2)) + String(bitRead(num, 3)) +
String(bitRead(num, 4)) + String(bitRead(num, 5)) + String(bitRead(num, 6)) + String(bitRead(num, 7));
return StrReverse(str);
}
String Int16ToBin(const uint16_t num)
{
String str = String(bitRead(num, 0)) + String(bitRead(num, 1)) + String(bitRead(num, 2)) + String(bitRead(num, 3)) +
String(bitRead(num, 4)) + String(bitRead(num, 5)) + String(bitRead(num, 6)) + String(bitRead(num, 7)) + " " +
String(bitRead(num, 8)) + String(bitRead(num, 9)) + String(bitRead(num, 10)) + String(bitRead(num, 11)) +
String(bitRead(num, 12)) + String(bitRead(num, 13)) + String(bitRead(num, 14)) + String(bitRead(num, 15));
return StrReverse(str);
}
String Int32ToBin(const uint32_t num)
{
String str = String(bitRead(num, 0)) + String(bitRead(num, 1)) + String(bitRead(num, 2)) + String(bitRead(num, 3)) +
String(bitRead(num, 4)) + String(bitRead(num, 5)) + String(bitRead(num, 6)) + String(bitRead(num, 7)) + " " +
String(bitRead(num, 8)) + String(bitRead(num, 9)) + String(bitRead(num, 10)) + String(bitRead(num, 11)) +
String(bitRead(num, 12)) + String(bitRead(num, 13)) + String(bitRead(num, 14)) + String(bitRead(num, 15)) + " " +
String(bitRead(num, 16)) + String(bitRead(num, 17)) + String(bitRead(num, 18)) + String(bitRead(num, 19)) +
String(bitRead(num, 20)) + String(bitRead(num, 21)) + String(bitRead(num, 22)) + String(bitRead(num, 23)) + " " +
String(bitRead(num, 24)) + String(bitRead(num, 25)) + String(bitRead(num, 26)) + String(bitRead(num, 27)) +
String(bitRead(num, 28)) + String(bitRead(num, 29)) + String(bitRead(num, 30)) + String(bitRead(num, 31));
return StrReverse(str);
}
String StrReverse(String str)
{
String strReversed = "";
for (int i = (str.length() - 1); i >= 0; i--)
strReversed += str[i];
return strReversed;
}
</code></pre>
<hr />
<p>Hope all this information helps out others working with this driver.</p>
<p>Cheers!</p>
| <p>I am attempting to run a Nema 17 stepper motor with the BigTreeTech TMC2240 stepper motor driver. I am connecting to the driver module with an Arduino UNO R3 board, and I'm using Arduino IDE v2.3.0.</p>
<p>Datasheets:</p>
<ul>
<li>TMC2240: <a href="https://www.analog.com/media/en/technical-documentation/data-sheets/tmc2240_datasheet.pdf" rel="nofollow noreferrer">https://www.analog.com/media/en/technical-documentation/data-sheets/tmc2240_datasheet.pdf</a></li>
<li>Arduino UNO R3: <a href="https://docs.arduino.cc/resources/datasheets/A000066-datasheet.pdf" rel="nofollow noreferrer">https://docs.arduino.cc/resources/datasheets/A000066-datasheet.pdf</a></li>
</ul>
<hr />
<p>At first I tried to connect the driver in the same fashion as it's predescessor, the TMC2209 which I used before and had no issues with. I want to run this driver as simply as possible, with the <code>STEP</code> and <code>DIR</code> pins like most of the other simillar drivers out there.
I can see that the TMC2240 has a simillar pinout to the TMC2209, with the microstep <code>MS</code> pins replaced with the SPI & UART connection pins:</p>
<p><a href="https://i.stack.imgur.com/8f0Ykm.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8f0Ykm.jpg" alt="enter image description here" /></a> <a href="https://i.stack.imgur.com/DNOY4m.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DNOY4m.jpg" alt="enter image description here" /></a></p>
<p>The following setup (with the <code>STEP</code> pin connected to pin 6, <code>DIR</code> pin connected to pin 7, <code>EN</code> pin set to <code>LOW</code> and 12V supplied to <code>VM</code>):</p>
<p><a href="https://i.stack.imgur.com/pDRq5m.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pDRq5m.jpg" alt="enter image description here" /></a></p>
<p>With the following code:</p>
<pre><code>const int PIN_STEP = 6;
const int PIN_DIR = 7;
const int PIN_EN = 0;
void setup()
{
Serial.begin(9600);
pinMode(PIN_STEP, OUTPUT);
pinMode(PIN_DIR, OUTPUT);
pinMode(PIN_EN, OUTPUT);
digitalWrite(PIN_EN, LOW);
}
void loop()
{
digitalWrite(PIN_DIR, HIGH);
for (int i = 0; i < 200; i++)
{
digitalWrite(PIN_STEP, HIGH);
delayMicroseconds(500);
digitalWrite(PIN_STEP, LOW);
delayMicroseconds(500);
}
digitalWrite(PIN_DIR, LOW);
for (int i = 0; i < 200; i++)
{
digitalWrite(PIN_STEP, HIGH);
delayMicroseconds(500);
digitalWrite(PIN_STEP, LOW);
delayMicroseconds(500);
}
delay(3000);
}
</code></pre>
<p>Resulted in no activity or energiziation of the motor. Since there was virtually no current being drawn by <code>VMot</code>, and since when I used the TMC2209 even when disabled the driver would still draw very little but some current, this setup clearly didn't work.</p>
<hr />
<p>I then took a good look at the datasheet, to see what exactly I was missing. Since I want to run the driver using the <code>STEP</code> and <code>DIR</code> pins, I went to the section that covers that communication mode:</p>
<p><a href="https://i.stack.imgur.com/1SJCXl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1SJCXl.jpg" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/jCqbNl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jCqbNl.jpg" alt="enter image description here" /></a></p>
<p>(pages 27, 28)</p>
<p>The only mention of internal registers altering the operation mode using the <code>STEP</code> and <code>DIR</code> pins is the <code>CHOPCONF</code> register. Since the TMC2240 replaced the microstep <code>MS</code> pins with the SPI & UART pins, I had initially assumed that the SPI & UART pins would only be used for 3D printer boards that these drivers are made for. However, while this section doesn't directly state that SPI needs to be used in order to enable the <code>STEP</code> and <code>DIR</code> interface, given that the previous setup didn't work at all made me want to try and use SPI to change the value of that register, and see whether that improves the situation.</p>
<p>I then went to the SPI section in the datasheet, to try and figure out exactly how I could change internal registers of the driver.</p>
<p><a href="https://i.stack.imgur.com/UqVFfl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/UqVFfl.jpg" alt="enter image description here" /></a></p>
<p>(page 22)</p>
<p>The above section on the SPI interface details the structure of the messages sent, with each message constisting of 5 bytes; the first byte being the register address, and the rest being the data. It supports both reading & writing of most registers.</p>
<p>In every reply message recieved from the driver, one of the bytes apparently contains the <code>SPI_STATUS</code> flags, which are defined as follows:</p>
<p><a href="https://i.stack.imgur.com/wjnUJl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wjnUJl.jpg" alt="enter image description here" /></a></p>
<p>(page 23)</p>
<p>The driver is also apparently configured to communicate via SPI by default, with UART being disabled as per the <code>UART_EN</code> pin and a solder joint on the back of the board:</p>
<p><a href="https://i.stack.imgur.com/GNP83l.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GNP83l.jpg" alt="enter image description here" /></a></p>
<p>(page 15)</p>
<p>The document as includes some example SPI commands:</p>
<p><a href="https://i.stack.imgur.com/hgK9Hl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hgK9Hl.jpg" alt="enter image description here" /></a></p>
<p>(page 23)</p>
<hr />
<p>I then setup my driver board with my Arduino as follows, with all the SPI pins connected:</p>
<p><a href="https://i.stack.imgur.com/gCDVHm.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gCDVHm.jpg" alt="enter image description here" /></a>
<a href="https://i.stack.imgur.com/d0b8ym.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/d0b8ym.jpg" alt="enter image description here" /></a></p>
<p>I wanted to then try and send some sample read commands to the driver, to try and read some of the registers.</p>
<p>All of the registers and their purposes are defined at the bottom of the document, and are apparently separated into a few broad categories, defined as such:</p>
<p><a href="https://i.stack.imgur.com/AW9pHl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AW9pHl.jpg" alt="enter image description here" /></a></p>
<p>(page 74)</p>
<p>The <code>CHOPCONF</code> register is located at address <code>0x6C</code>, and one of it's bytes named <code>MRES</code> contains the current microstep configuration defined as follows:</p>
<p><a href="https://i.stack.imgur.com/Gro1cl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Gro1cl.jpg" alt="enter image description here" /></a></p>
<p>(page 110)</p>
<p><a href="https://i.stack.imgur.com/Kan0ol.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Kan0ol.jpg" alt="enter image description here" /></a></p>
<p>(page 111)</p>
<p>I first wanted to try and read the <code>CHOPCONF</code> register, using the following code which polls the register every 3 seconds:</p>
<pre><code>#include "SPI.h"
const int PIN_EN = 0;
const int PIN_CS = 3;
void setup()
{
Serial.begin(9600);
pinMode(PIN_EN, OUTPUT);
pinMode(PIN_CS, OUTPUT);
SPI.begin();
digitalWrite(PIN_EN, LOW);
}
void loop()
{
uint8_t data[5] = {0x6C, 0x00, 0x00, 0x00, 0x00};
SPIExchange(data);
Serial.print(data[0], BIN); Serial.print(", ");
Serial.print(data[1], BIN); Serial.print(", ");
Serial.print(data[2], BIN); Serial.print(", ");
Serial.print(data[3], BIN); Serial.print(", ");
Serial.println(data[4], BIN);
delay(3000);
}
void SPIExchange(uint8_t* data)
{
digitalWrite(PIN_CS, LOW);
SPI.transfer(data, 5);
digitalWrite(PIN_CS, HIGH);
}
</code></pre>
<p>Here I'm using the address <code>0x6C</code> defined in the datasheet, followed by all zeroes like in the example read command shown previously.
The values I got were very inconsistent. It would alternate between the first byte showing some value, and all zeroes:</p>
<p><a href="https://i.stack.imgur.com/rHKD7m.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/rHKD7m.jpg" alt="enter image description here" /></a></p>
<p>I tried polling several other registers to see whether the behaviour would change, but to no avail.</p>
<hr />
<p>At this point I'm quite a bit confused as to how exactly one is supposed to operate this driver. Given that the TMC2240's predescessor, the TMC2209, was easily operated using the <code>STEP</code> and <code>DIR</code> pins, it's strange to me that this driver doesn't.</p>
<p>I wanted to ask for feedback and suggestions before trying other things, especially from others who have also tried using the TMC2240 driver.</p>
<p>Thanks for reading my post, any guidance is appreciated.</p>
| Running TMC2240 Stepper Motor Driver with Arduino? | 2024-03-19T00:50:47.350 |
706572 | |verilog|system-verilog| | <p>Your understanding is correct. Not only are the execution order between all <code>initial</code> and <code>always</code> blocks in a design indeterminate, but the relative ordering of statements between processes is indeterminate as well. That means the first two statements inside the <code>initial</code> could execute and <em>switch</em> to the <code>always</code> block before the <code>clock='b0;</code> statement. This is exactly what might happen if the design was executing on a truly multithreaded system. Section <em>4.7 Nondeterminism</em> enables this for many other kinds of optimizations.</p>
<p>I would NEVER use a use an assignment with an intra-assignment delay. This is left over from before <a href="https://www.computerhistory.org/collections/catalog/102746653" rel="nofollow noreferrer">non-blocking assignments were introduced into Verilog in the 1980s</a>.</p>
<p>This should be written as</p>
<pre><code>always #10 clock = ~clock;
</code></pre>
<p>or better</p>
<pre><code>initial begin
clock = 1'b0
forever #10 clock = ~clock;
end
</code></pre>
| <p>At the outset, I would like to say that I am not able to run this snippet at the moment but, even if I were, I hope this question would still stand as I'd like to understand why the Verilog standard implies a given interpretation of this snippet.</p>
<p>The snippet below is adapated from one seen in Chapter 8 of Saurabh's <em>Introduction to VLSI Design Flow</em>. It is written in 2001-Verilog but, I think, it works in modern simulators too.</p>
<pre><code>module top();
reg a,b, clock;
initial begin
a = 1'b1;
b = 1'b0;
clock = 1'b0;
end
always clock = #10 ~clock; // clock with period 20 time units
always @(posedge clock) begin
a<= b; //a changes to 1'b0 at t=10 and 1'b1 at t=30 and so on...
b<= a; //b changes to 1'b1 at t=10 and 1'b0 at t=30 and so on...
end
endmodule
</code></pre>
<p>What I am confused about is the following: <strong>is this code guaranteed to work as intended given the comments below</strong>?</p>
<p>(1) In Verilog there is no guarantee that an <code>initial</code> block executes before an <code>always</code> block. This is up to the simulator.</p>
<p>(2) For intra-assignment delay (as in the clock updating <code>always</code>) the RHS is evaluated before the delay.</p>
<p>Given (1) and (2), it's not clear to me that this code is guaranteed to work. For example: if the always block is entered first, before the <code>initial</code> block, then, since <code>clock</code> has as yet not been intitialized I believe we will get <code>clock</code> toggled to <code>x</code> after 10 seconds, meaning that we do not get a positive edge of the clock at 10 seconds. On the other hand, if the <code>initial</code> is entered first then things work out as intended. Is this understanding correct?</p>
| How does Verilog deal with this snippet (procedural block order dependence)? | 2024-03-19T05:29:06.067 |
706578 | |c| | <p><strong>"Global variables" (variables with external linkage) should be avoided in C programs.</strong></p>
<p>There are a few rare exceptions to this rule, such as when implementing a hardware register map or perhaps when dealing with memory mapping into data flash or some other form of non-standard memory. But in the 99.99% of all use-cases you can think of, global variables is not the answer. In beginner-level programs, global variables should <em>never</em> be used for sure.</p>
<p>Because they come with the following severe and serious problems:</p>
<ul>
<li><p>Tight coupling between unrelated parts of the code. You are creating dependencies between different parts of the code which do not make sense. In proper program design, every module should do it's designated task and not worry about anything else. Dependencies between different modules should be handled through functions, not with direct access to variables.</p>
<p>For example, your LCD driver may have a dependency as it uses your SPI driver. But if your SPI driver in turn requires the LCD driver, something has gone terribly wrong in the program design. How some LCD happens to work is no business of a SPI driver.</p>
</li>
<li><p>"Spaghetti programming". It is very hard to read code where various state variables are updated literally everywhere, in multiple files. It will be difficult to get a sense over when a variable is updated from where, or whom is responsible for the variable.</p>
</li>
<li><p>Namespace clutter. The exposed variable will be visible to all manner of unrelated parts of the code, meaning that there could be naming collisions or even accidental access to the variable. Or some module accesses the variable on purpose, while the internal workings of your code module is really none of their business. Good programming practice is therefore to reduce the scope of all variables as much as possible.</p>
</li>
</ul>
<p><code>const</code> qualified "global" variables are generally a less serious design mistake than read/write ones, since they don't have the issues of spaghetti programming. So make everything that should be read-only <code>const</code>, which you probably want to do anyway to get it allocated in flash and not RAM.</p>
<hr />
<p><strong>Work-arounds:</strong></p>
<p>To avoid all of the above issues, a proper program design technique called <em>private encapsulation</em> is used. This involves restricting the access of variables to the module where they are declared.</p>
<p>Normal embedded system C design uses <code>static</code> variables to solve this. They can still be declared at file scope and remain accessible to the module where they reside, but not to the outside world. If the outside world need to know the data they contain, that is done through so-called "setter/getter" functions. Example:</p>
<p><strong>spi.c</strong></p>
<pre><code>#include "spi.h"
static uint32_t baudrate;
void spi_init (uint32_t baud)
{
baudrate = baud;
/* register setup code */
}
void spi_set_baudrate (uint32_t baud)
{
baudrate = baud;
/* calculate register values and update them */
}
uint32_t spi_get_baudrate (void)
{
return baudrate;
}
</code></pre>
<p><strong>spi.h</strong></p>
<pre><code>#ifndef SPI_H
#define SPI_H
/* document this function here */
void spi_init (uint32_t baud);
/* document this function here */
void spi_set_baudrate (uint32_t baud);
/* document this function here */
uint32_t spi_get_baudrate (void);
#endif
</code></pre>
<p>This is how the vast majority of code in normal "bare metal" microcontroller programs is designed.</p>
<p>Similarly, when using interrupts, variables communicating with the ISR should be kept local and <code>static</code> as described here: <a href="https://electronics.stackexchange.com/a/329961/6102">Avoiding global variables when using interrupts in embedded systems</a></p>
<hr />
<p>There are a few problems even with <code>static</code> file scope variables too. They are not re-entrant, so even when only accessing them through setters/getters, that might not be ideal for code using interrupts or for multi-process RTOS applications.</p>
<p>They also block the code from having multiple instances. For example, the SPI driver above, as written, will only work for one SPI hardware peripheral. But what if you have several identical ones in the same MCU? Using arrays of the same kind of variables internally might be one solution.</p>
<p>But in general, for more intricate designs when you work with lots of data, or when you need to declare multiple instances of something and still maintain private encapsulation, you can use the design pattern known as "opaque type" - <a href="https://software.codidact.com/posts/283888" rel="nofollow noreferrer">How to do private encapsulation in C?</a></p>
<p>This comes with a little bit of overhead, so one has to be sensible when to use it. For example I often use opaque type when implementing CAN bus drivers/HALs, since these tend to be rather complex and with various message buffer structures that may need to be allocated on the caller-side. On the other hand, the caller shouldn't need to know how the message buffers are laid out in memory in order to use the CAN driver.</p>
| <p>I am building a BLE-based application for a STM32WB and the problem I have is that I have two programs, <em>main.c</em> and <em>custom_stm.c</em> and I want to use the same variable in both (the second program continuously updates it).</p>
<p>The <em>main.c</em> program is located in <em>Core\Src\main.c</em> and the <em>custom_stm.c</em> program is at <em>STM32_WPAN\App\custom_stm.c</em> within the same folder.</p>
<p>I tried declaring them in these ways:</p>
<p><em>main.c</em></p>
<pre class="lang-c prettyprint-override"><code>extern uint8_t a=0;
</code></pre>
<p>and for the program which updates the value:</p>
<p><em>custom_stm.c</em></p>
<pre class="lang-c prettyprint-override"><code>uint8_t a;
</code></pre>
<p>but I get a compiler error.</p>
<p>How could I overcome this issue?</p>
| How can I use a global variable in a STM32WB55 BLE application? | 2024-03-19T07:06:57.130 |
706580 | |solar-cell| | <blockquote>
<p>Out by the knee of the curve, the PVs may be able to supply enough power to overcome friction, but without some clever electronics, this power would be delivered with relatively low current and relatively high voltage and still wouldn’t start the motor.</p>
</blockquote>
<p>This is drawing the distinction between <strong>power</strong>, which the solar PV has enough of, and voltage to current ratio, or operating impedance, at the knee of the curve. The knee is where the voltage is still high - the energy of the individual photons is still the same in high and low light, but the available current has dropped - low light means fewer photons.</p>
<p>A stalled motor needs very little voltage to actually spin, but it draws a large current. The PV cannot supply that current.</p>
<p>The answer is to reduce the impedance, that is reduce the voltage, increase the current, keeping the same power (less some small losses). 'Linear Current Booster' is a name I've not met before. Electronic engineers would generally call it a buck converter, or a switch mode power supply - SMPS.</p>
| <p>This below passage is taken from chap 9 of book <strong>Renewable and Efficient
Electric Power Systems</strong></p>
<p>I have almost understood this whole passage and its key take away concept (LCB) except the line I bold out. Can someone please explain the bold out segment especially its first segment <strong>Out by the
knee of the curve</strong>. What this means at knee or before knee or after knee?</p>
<p>There is a device, called a linear current booster (LCB), that is designed to help overcome this loss of potentially usable insolation when current delivered to the motor is insufficient to overcome friction (Fig. 9.10). Notice from the I –V curves of Fig. 9.9 that the operating point in the morning is nowhere near the knee of the insolation curve where maximum power is available. <strong>Out by the
knee of the curve, the PVs may be able to supply enough power to overcome friction, but without some clever electronics, this power would be delivered with relatively low current and relatively high voltage and still wouldn’t start the motor</strong>. What an LCB does is to shift this relationship around. By converting low-current, high-voltage power into high-current, low-voltage power, they can get the motor started earlier in the morning. The lower voltage, however, means that the motor will spin at a slower rate, but at least it is working. In addition, the motor with an LCB will not stall as early in the afternoon, though it will slow down. So there are additional gains.</p>
<p><strong>Fig 9.9</strong>
<a href="https://i.stack.imgur.com/GbwiU.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GbwiU.png" alt="enter image description here" /></a></p>
<p><strong>Fig 9.10</strong>
<a href="https://i.stack.imgur.com/5tHye.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5tHye.png" alt="enter image description here" /></a></p>
| Confusion regarding solar cell? | 2024-03-19T07:11:24.547 |
706597 | |transistors|power-electronics|bjt|components|semiconductors| | <p><strong>1.) Definition of saturation</strong>: The voltage drop across the collector resistor (caused by the collector current Ic) must be large enough to make Vb>Vc. That means: The base-collector-junction now is forward biased. As a consequence - the base current Ib will be much larger than expected for linear operation because now there will be an additional current through the forward biased B-C junction.</p>
<p>How do we know if the transistor is in saturation? As a good indication for this state we require that the base current Ib is app 10% (rule of thumb) of the collector current (B=Ic/Ib<10). Therefore, we use a base resistor Rb in series with the switching voltage Vs that allows such a large base current Ib>0.1*Ic.</p>
<p>Therefore: Rb=(Vs-0.7)/Ib. The minimum required collector current Ic results, of course, from the resistor Rc and the supply voltage Vcc.</p>
<p><strong>2.)</strong> With a collector resistor as low as 1mOhm you hardly would be able to create a voltage Vc at the collector node which is smaller than the base voltage Vb (as required for saturation).</p>
<p><strong>3.)</strong> This question was answered under 1.).</p>
| <p>If I use a BJT transistor as a switch, the transistor operates in the saturation or cut-off region, not in the active region.<br />
However, some sources use the formula I<sub>C</sub> = β·I<sub>B</sub>. However, this formula is only used if the transistor is in the active region. So what's wrong?</p>
<p>Second question: If I connect a very large resistor (1 MΩ) or a very small resistor (1 mΩ) to the collector, will it still produce the same current according to this formula?</p>
<p>Third question: What exactly should I do to bring this transistor into these modes?</p>
| Bipolar Junction Transistor operating modes | 2024-03-19T09:52:30.480 |
706598 | |pic|gpio|pins| | <blockquote>
<p>But that seems powered by external VDD ? Or PIC32 do it in intern ?</p>
<p>I think it's need external but that just to be sure.</p>
</blockquote>
<p>Your assumption is correct: if you're using RB11 and/or RB10 as GPIO, you have to connect the same (external) voltage to VUSB3V3 as applied to VDD (2.0V ... 3.6V).</p>
| <p>I use a <a href="https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/PIC32MM0256GPM064-Family-Data-Sheet-DS60001387D.pdf" rel="nofollow noreferrer">PIC32</a> and I want to use RB11. That's a USB pin but can be used as GPIO.</p>
<p>The datasheet specifies in 18.4 page 180:</p>
<blockquote>
<p>For non-USB operation with RB11 and/or RB10 as GPIOs, the USB module must be disabled and power applied to VUSB3V3 via VDD.</p>
</blockquote>
<p>But that seems powered by external VDD? Or PIC32 do it in intern?</p>
<p>I think it's need external but that just to be sure.</p>
| PIC32 VUSB3V3 must be externally powered? | 2024-03-19T10:05:17.563 |
706603 | |mosfet|dc|current-source| | <p>When the source is permitted to rise above ground in potential, by placing something with impedance between source and ground, you have a source-follower. this is the case for every single MOSFET in your schematic. Each transistor might be viewed like this:</p>
<p><img src="https://i.stack.imgur.com/W1yPt.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fW1yPt.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p><span class="math-container">\$R_D\$</span> and <span class="math-container">\$R_S\$</span> represent arbitrary impedances, their values won't be important in the following arguments.</p>
<p>If <em><strong>any</strong></em> current <span class="math-container">\$I_D\$</span> is flowing, then the transistor <em>must</em> have a <span class="math-container">\$V_{GS}\$</span> close to or above the transistor's <span class="math-container">\$V_{GS(TH)}\$</span>, since that's the only condition that would permit <span class="math-container">\$I_D>0\$</span>. Extending this argument to all the transistors in the chain, if any current is flowing through their channels, then they <em>all</em> must have <span class="math-container">\$V_{GS} >= V_{GS(TH)}\$</span>.</p>
<p>Consequently, source potential <span class="math-container">\$V_S\$</span> of any MOSFET here cannot rise above <span class="math-container">\$V_G - V_{GS(TH)}\$</span>, since if it did, the transistor would be off, and would not be able to raise <span class="math-container">\$V_S\$</span> any further. By this argument, if any current is flowing, and all the gates are held at potentials close to 3V or so, all the sources will be in the vicinity of <span class="math-container">\$+3V - V_{GS(TH)}\$</span>.</p>
<p>These arguments apply to all the MOSFETs here, but if we focus for a moment on the top one, M3, it's clear that M3's source cannot rise far above zero, since its gate is held at <span class="math-container">\$V_{G3} = V_{CASC2} = +3.3V\$</span>. Consequently, M2's drain is also constrained, and will always be within a volt or so of zero, as long as <em>some</em> drain current is flowing.</p>
<p>Now looking at the lowest transistor, M1, you are biasing the gate in a closed loop, the intention being to have drain current <span class="math-container">\$I_D = \frac{V_{REF}}{R_4}=9.39mA\$</span>. If that current is actually permitted to flow, then source potential will be exactly <span class="math-container">\$V_{S1}=V_{REF}=0.833V\$</span>, and importantly, M1's drain (which is M2's source) cannot be lower than that.</p>
<p>All things considered, then, the drain of M2 is constrained:</p>
<p><span class="math-container">$$ V_{D2} < V_{CASC2} - V_{GS(TH)} $$</span></p>
<p>The source of M2 is also constrained:</p>
<p><span class="math-container">$$ V_{S2} > V_{REF} $$</span></p>
<p>That's why you don't see much variation in <span class="math-container">\$V_{DS}\$</span> for M2.</p>
| <p>I have a question about operating point of cascaded NFETs that I carry with me quite some time. I hope someone is able to give me some hints or insights here.</p>
<p>It boils down to this:</p>
<p>When you have a cascode of N-channel MOSFETS with controlled or fixed gate voltages as shown in the following circuit, what voltage levels do the drain-source voltages of M1, M2 and M3 take?</p>
<p><a href="https://i.stack.imgur.com/Zf47W.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Zf47W.png" alt="Cascaded MOSFETs circuit" /></a></p>
<p>What makes this circuit complicated is that the MOSFETs M2 and M3 have a fixed gate voltage and the gate-source and drain-source voltages are the "variables". U2,M1 and R4 form a current source with 9.39mA, so the voltage on drain3 is fixed.</p>
<p>What I don't understand is that there is a lot of ambiguity between the drain-source voltages of M1,M2 and M3. If M1 has slightly lower drain-source voltage, then M2 or M3 might get higher drain-source voltages to compensate.</p>
<p>From simulating all MOSFETs with 3 different threshold voltages (1.6V, 1.8V and 2.0V) I see that V(drain2,drain1), the drains-source voltage of M2 does not change. What is the reason for this? Is there a way you can you calculate the operating points of drain1 and drain2 given the MOSFETs specifications?</p>
<p><a href="https://i.stack.imgur.com/S1drL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/S1drL.png" alt="Drain source voltages of cascaded N-MOSFETs" /></a></p>
| How to get the drain-source voltages of cascode MOSFETS? | 2024-03-19T10:59:18.390 |
706606 | |voltage-divider| | <p>If the unspoken requirements were compatible with this proposed solution, I would at least consider an MCU using PWM and a low-pass filter.</p>
<p>Whether you use switches, an encoder, membrane keys, and LEDs or a display of some kind for the HMI is another question.</p>
| <p>I want to change a 10k potentiometer that is connected as a voltage divider to a 5V supply.</p>
<p>So, instead of a potentiometer, I need a way to divide that 5V supply into 5V steps (1V, 2V, 3V, 4V and 5V) and to be as esthetically as possible. What would you use?</p>
| How to control 0-5V in 5 steps? (1V, 2V, 3V, 4V and 5V) | 2024-03-19T11:48:06.113 |
706617 | |transistors|schematics|esp32| | <p>That is an N-type mosfet with a current protection diode built in. It might be easier to understand if you think of it like two separate components, the Nfet and the diode. The purpose of the diode is to protect the Nfet against a large reverse current surge, which is usually caused by inductive loads like motors or transformers or inductors.</p>
| <p>I'm trying to interact with my Daikin AC and found these schematics. My electronics knowledge is pretty basic and I can't understand what kind of transistor is in the red circle... if it's a transistor :D</p>
<p><a href="https://i.stack.imgur.com/v8ezS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/v8ezS.png" alt="enter image description here" /></a></p>
<p>(the schematics is from <a href="https://community.home-assistant.io/t/daikin-integration-updated-2022-09-26/431819/26" rel="nofollow noreferrer">this post on the HA forum</a>)</p>
<p>What kind of transistor is in the red circle?</p>
| Unknown component in schematics | 2024-03-19T13:39:50.717 |
706621 | |i2c|pullup| | <p>As long as the bus is no longer than a few centimeters, I can't imagine the capacitance of the bus exceeding 100pF or so, even with several devices attached.</p>
<p>The 300ns rise and fall time requirement is tight, but achievable with a reasonable pull-up resistance. For 100pF bus capacitance, <span class="math-container">\$R_P\$</span> is:</p>
<p><span class="math-container">$$ R_P < \frac{300ns}{100pF} = 3k\Omega $$</span></p>
<p>2.2kΩ would place you well within the required rise and fall times, and require the transmitter to sink:</p>
<p><span class="math-container">$$ I = \frac{+3.3V}{2.2k\Omega} = 1.5mA $$</span></p>
<p>That's also reasonable. The PCF8563 datasheet is a little ambiguous regarding what 3mA means, but I believe that it means any load <em>up to</em> 3mA will be fine. I couldn't find any sink current specs for the LSM6DSR, but I would be confident that any modern I<sup>2</sup>C output can sink 1.5mA.</p>
<p>I would not recommend using 10kΩ, unless the bus is extremely short, and you have very few (<4) devices attached.</p>
| <p>I´m using the <a href="https://www.st.com/resource/en/datasheet/lsm6dsr.pdf" rel="noreferrer">LSM6DSR</a> accelerometer/gyroscope from ST on a project. Looking into the application hints, it suggests using a 10k resistor as pullup for SDA AND SCL:</p>
<p><a href="https://i.stack.imgur.com/wzvPF.png" rel="noreferrer"><img src="https://i.stack.imgur.com/wzvPF.png" alt="LSM6DSR I2C pullup sugestions " /></a></p>
<p>Since I´m using another slave (PCF8563TS) on the I2C bus, I tried calculating the resistor needed for the application. My result was Rp(min): 775 Ω and Rp(max): 885.16 Ω</p>
<p>The microcontroller uses 3.3V, the maximum capacitive load for each bus line on both I2C devices is 400pF, the maximum rise time of both SDA and SCL signals is 300 ns, maximum output voltage low is 0.2V and maximum sink current is 3mA.</p>
<p>Why does the value in the datasheet differ so much from my calculations? Would it still work if I used a 10k resistor?</p>
| Why do the I2C pullup resistors in the datasheet differ so much from my calculations? | 2024-03-19T14:31:56.637 |
706625 | |transfer-function|programming|python|butterworth| | <p>In the end, the solution to this problem uses the simple solution of using the print function to print it manually.</p>
<pre class="lang-python prettyprint-override"><code># Displaying the factorization result of the Transfer Function
print("Transfer Function (Form 2 - Order 2)\n")
print("\nH_B3(S) = ")
print(f" ({b2_0:.4f})({b2_1:.4f})")
print("---------------------------------------------------")
print(f"(s^2 + {b1_0:.4f}s + {b2_0:.4f})(s^2 + {b1_1:.4f}s + {b2_1:.4f})")
Output
H_B3(S) =
(1.4019)(1.4019)
---------------------------------------------------
(s^2 + 0.9062s + 1.4019)(s^2 + 2.1878s + 1.4019)
</code></pre>
| <p>Previously I had the following coefficients in the program. In this program I want to create a transfer function of butterworth approximation (Digital Filter Design - Digital Signal Processing).</p>
<pre class="lang-python prettyprint-override"><code>import control as ct
import numpy as np
# Coefficients
b1_0 = 0.906197420861457
b1_1 = 2.1877541036312493
b2_0 = 1.401865445882832
b2_1 = 1.4018654458828321
# Numerator
numerator = [b2_0 * b2_1]
# Denominator
den1 = [1, b2_0, b1_0] # Denominator 1
den2 = [1, b2_1, b1_1] # Denominator 2
# Convolve the two denominators to get the final denominator
final_den = np.convolve(den1, den2)
# Create the transfer function.
tf = ct.tf(numerator, final_den)
print("\nH_B4(S) = ", tf)
</code></pre>
<p>Here is the output of my program:</p>
<p><span class="math-container">$$H_{B,4}(s) = \frac{1.965}{S^{4}+2.804S^{3}+5.059S^{2}+4.337S+1.983}$$</span></p>
<p>The end goal is that I want to create a transfer function with format like this.</p>
<p><span class="math-container">$$H_{B,4}(s) = \frac{\Pi_{m} B_{2m}}{\Pi_{m}(S^2 + B_{1m}S + B_{2m})}$$</span></p>
<p><span class="math-container">$$H_{B,4}(s) = \frac{B_{2,0}B_{2,1}}{(S^2 + B_{1,0}S + B_{2,0})(S^2 + B_{1,1}S + B_{2,1})}$$</span></p>
<p><span class="math-container">$$H_{B,4}(s) = \frac{(1.4019)(1.4019)}{(S^2 + 0.9062S + 1.4019)(S^2 + 2.1878S + 1.4019)}$$</span></p>
<p>However, with my code, the results are always multiplied and cannot match the goal.</p>
<p>Does anyone have a solution to my problem?</p>
| How to separate 4th order transfer function (Butterworth Approximation) into 2nd order using Python Control Library? | 2024-03-19T15:05:53.587 |
706641 | |fet|topology|transmission-gate| | <blockquote>
<p>What I really want is to implement this function table:</p>
<pre><code>CTRL FTDI OUT
0 0 0
0 1 Z
1 0 Z
1 1 Z
</code></pre>
</blockquote>
<p><a href="https://tinyurl.com/yktjg597" rel="nofollow noreferrer">One</a> of the simplest circuits to solve your problem is below using just 1 PNP transistor (say 2N3906).</p>
<p><a href="https://i.stack.imgur.com/Z3JSD.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Z3JSD.png" alt="enter image description here" /></a></p>
<p>If you wish the output to be closer to 0V when both CTRL and FTDI-DTR are 0V, use the <a href="https://tinyurl.com/ymn38t3h" rel="nofollow noreferrer">2 NPN transistors</a> solution below.</p>
<p><a href="https://i.stack.imgur.com/XgZYT.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XgZYT.png" alt="enter image description here" /></a></p>
<p>Edit:
My earlier 2-diode solution will not solve your problem because I misunderstood your requirement.</p>
| <p>I want to use an N-channel FET as a pass gate SPST switch to let an FTDI reset signal through to to my microcontroller or not, based on an independent signal.</p>
<p><img src="https://i.stack.imgur.com/5H7Nh.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f5H7Nh.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>I want the FTDI-DTR signal to be capable of resetting the MCU when the 0V/3.3V Control signal is high, and not otherwise. Does the circuit above using an N-channel FET (with the source connected to MCU_NRST and the drain connected to FTDI-DTR), achieve this purpose? If not, what should I change / do instead?</p>
<p><strong>UPDATE</strong></p>
<p>Since people put me on to using discrete logic gates for this function, I would like to expand the question slightly.</p>
<p>What I really want is to implement this function table:</p>
<pre><code>CTRL FTDI OUT
0 0 0
0 1 Z
1 0 Z
1 1 Z
</code></pre>
<p>... I need the open-drain output so that I can still have a push-button attached and not have it fight an active output when pushed. I do not care which sense of the CTRL signal 'enables' the FTDI signal, and the FTDI signal is itself open-drain (so I don't care about its high state). Are there logic chips that implement this function directly, or do I need to compose a solution from multiple chips (e.g. SN74LVC1G38 with active inverters on both inputs).</p>
| Using an N-channel FET as a switch | 2024-03-19T17:15:53.283 |
706656 | |oscilloscope| | <p>If you purchase a <span class="math-container">\$100 \space \mathrm{MHz}\$</span> oscilloscope with the intention of observing a <span class="math-container">\$100 \space \mathrm{MHz}\$</span> signal, you will encounter significant measurement error.
The bandwidth <span class="math-container">\$BW\$</span>, in <span class="math-container">\$\mathrm{Hz}\$</span>, of your oscilloscope determines the Amplitude Error, as there will be attenuation as the frequency increases, which becomes more significant at the point of <span class="math-container">\$-3 \space \mathrm{dB}\$</span> (corner frequency <span class="math-container">\$\omega_c\$</span> in <span class="math-container">\$\mathrm{rad/s}\$</span>). If you are interested only in in the the <strong>high frequency side</strong>, you can model it rougly as a simple first order system (remebering that the bandwidth stuff refers to analog part of scope):</p>
<p><a href="https://i.stack.imgur.com/Nb4uH.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Nb4uH.png" alt="enter image description here" /></a></p>
<p><span class="math-container">$$\frac{V_o(\omega)}{V_i(\omega)}= \frac{1/j \omega C}{1/j\omega C+R}= \frac{1}{1+j\omega RC}$$</span></p>
<p>As</p>
<p><span class="math-container">$$ RC=\frac{1}{\omega_c}=\frac{1}{2 \pi BW} \qquad (1)$$</span></p>
<p>the magnitude of that transfer function, as function of frequency <span class="math-container">\$f = \frac{\omega}{2\pi}\$</span>, in <span class="math-container">\$\mathrm{Hz}\$</span>, is given by:</p>
<p><span class="math-container">$$ \left | \frac{V_o(f)}{V_i(f)} \right | = \frac{1}{\sqrt{1 + \left ( \frac{f}{BW} \right )^2}} \qquad \lt 1 $$</span></p>
<p>Also:</p>
<p><span class="math-container">$$ \left | V_o(f) \right | = \frac{1}{\sqrt{1 + \left ( \frac{f}{BW} \right )^2}} \space \left | V_i(f) \right | \qquad (2)$$</span></p>
<p>The definition of Amplitude Error is:</p>
<p><span class="math-container">$$\text{Amplitude Error (%)}= 100 \left (1- \left | \frac{V_o(f)} {V_i(f} \right | \right )$$</span></p>
<p>Or:</p>
<p><span class="math-container">$$
\boxed
{
\text{Amplitude Error (%)}= 100 \left (1- \frac{1}{\sqrt{1 + \left (
\frac{f}{BW} \right )^2}} \right )
}
$$</span></p>
<p>If you prefer in a plot:</p>
<p><a href="https://i.stack.imgur.com/Ljkxd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Ljkxd.png" alt="enter image description here" /></a></p>
<p>So, if you put sinewave with amplitude <span class="math-container">\$ 1 \space \mathrm{V}\$</span> and frequency <span class="math-container">\$100 \space \mathrm{MHz}\$</span> as input in a <span class="math-container">\$100 \space \mathrm{MHz}\$</span> (<span class="math-container">\$BW\$</span>) oscilloscope, the Amplitude Error error will be <span class="math-container">\$29.3 \space \% \$</span>. Also, using <span class="math-container">\$(2)\$</span>, the voltage <span class="math-container">\$V_o\$</span> will be read as aprox. <span class="math-container">\$0.707 \space \mathrm{V}\$</span>. On the other hand, with a <span class="math-container">\$500 \space \mathrm{MHz}\$</span> scope, the Amplitude Error will be aprox. <span class="math-container">\$ 1.94 \%\$</span> (or <span class="math-container">\$ V_o= 0.98 \space \mathrm{V}\$</span>).
In summary: A <span class="math-container">\$100 \space \mathrm{MHz}\$</span> scope will have up aprox. <span class="math-container">\$30 \%\$</span> error at <span class="math-container">\$100 \space \mathrm{MHz}\$</span>. To keep errors below the <span class="math-container">\$3 \%\$</span>, the maximum signal bandwidth that can be measured is about <span class="math-container">\$30 \%\$</span> of <span class="math-container">\$100 \space \mathrm{MHz}\$</span>, or <span class="math-container">\$30 \space \mathrm{ MHz}\$</span>. In a different way: In order to accurately measure a <span class="math-container">\$100 \space \mathrm{MHz}\$</span> signal (below <span class="math-container">\$3 \%\$</span> error), you need at least <span class="math-container">\$300 \space \mathrm{MHz}\$</span> of bandwidth.</p>
<p>Another consideration is with respect to the <strong>rise time</strong> of the signal to be measured (which is the time taken by a signal to change from a specified low value to a specified high value, typically from <span class="math-container">\$10 \%\$</span> to <span class="math-container">\$90 \%\$</span>). You can have a rise time of <span class="math-container">\$10 \space \mathrm{ns}\$</span> on a "square" signal with a frequency of either <span class="math-container">\$10 \space \mathrm{Hz}\$</span> or <span class="math-container">\$1 \space \mathrm{MHz}\$</span>. In other words, it is the ability to follow this rise time that identifies the quality of the measurement system, not the frequency alone.</p>
<p>A common expression relating the rise time <span class="math-container">\$tr\$</span>, in seconds, with the bandwith <span class="math-container">\$BW\$</span> in <span class="math-container">\$\mathrm{Hz}\$</span>, is:</p>
<p><span class="math-container">$$BW = \frac{0.35}{tr}$$</span></p>
<p>That expression can be easily obtained considering that circuit in the beginning of this post, along <span class="math-container">\$(1)\$</span> and the equation for capacitor charging (from <span class="math-container">\$10 \%\$</span> to <span class="math-container">\$90 \%\$</span>). So, a <span class="math-container">\$100 \space \mathrm{MHz}\$</span> oscilloscope has a rise time of <span class="math-container">\$3.5 \space \mathrm{ns}\$</span> and a <span class="math-container">\$500 \space \mathrm{MHz}\$</span> one, a rise time of <span class="math-container">\$1.75 \space \mathrm{ns}\$</span>.</p>
<p>Through the <strong>Central Limit Theorem</strong>, it follows that whenever you have a measurement system formed by others non interacting cascaded sub-systems (one after the other), free from overshoot in their step-responses, each with its own rise time <span class="math-container">\$tr_1\$</span>, <span class="math-container">\$tr_2\$</span>, ... and <span class="math-container">\$tr_n\$</span>, the rise observed time from input to output <span class="math-container">\$t_r\$</span> is given by:</p>
<p><span class="math-container">$$tr = \sqrt{tr_1^2 + tr_2^2 + \text{...} + tr_n^2}$$</span></p>
<p>If <span class="math-container">\$tr_s\$</span> and <span class="math-container">\$tr_p\$</span> are the rise time for the scope and the probe, respectively, then the equation for <em>System Bandwidth</em> in your reference can be obtained as follows:</p>
<p><span class="math-container">$$tr = \sqrt{tr_s^2 + tr_p^2} $$</span></p>
<p><span class="math-container">$$\frac{1}{tr} = \frac{1}{\sqrt{tr_s^2+tr_p^2}}$$</span></p>
<p><span class="math-container">$$\frac{BW}{0.35}=\frac{1}{\sqrt{tr_s^2+tr_p^2}}$$</span></p>
<p><span class="math-container">$$BW = \frac{1}{\frac{1}{0.35}\sqrt{tr_s^2+tr_p^2} }$$</span></p>
<p><span class="math-container">$$BW=\frac{1}{\sqrt{\left ( \frac{tr_s}{0.35} \right )^2+ \left ( \frac{tr_p}{0.35} \right )^2}}$$</span></p>
<p><span class="math-container">$$BW=\frac{1}{\sqrt{\left ( \frac{1}{BW_s} \right )^2+ \left ( \frac{1}{BW_p} \right )^2}}$$</span></p>
<p>Where <span class="math-container">\$BW\$</span>, <span class="math-container">\$BW_s\$</span> and <span class="math-container">\$BW_p\$</span> are the system, scope and probe bandwidths, respectively.</p>
<p>Therefore, the response is yes, that expression you have mentioned and associated calculations make sense. But, I believe that the most important is to keep your error lower as possible (remember the rule of <span class="math-container">\$3 \%\$</span>).</p>
<p>Finally, in a note from Fluke, there is an alternative approach considering the harmonic content in your signal:</p>
<blockquote>
<p>Perhaps an even better, and much more conservative, approach is to
consider the stated bandwidth to be that of a fifth harmonic of the
frequency you want to measure. A fifth harmonic, likely present in a
typical pulse, might begin to become attenuated at the
stated bandwidth. That would indicate that we can rely on a 500 MHz
bandwidth oscilloscope to show a full and undistorted picture of the
input at about 100 MHz, maintaining good fidelity of the signal you're
trying to measure.</p>
</blockquote>
<p>Using this criteria, a measurement system with <span class="math-container">\$500 \space \mathrm{MHz}\$</span> bandwidth is suggested to capture the fifth harmonic of a <span class="math-container">\$100 \space \mathrm{MHz}\$</span> square wave.</p>
| <p>I posted a <a href="https://electronics.stackexchange.com/questions/706501/100-mhz-probe-and-200-mhz-probe-show-very-different-waveform-on-1-mhz-signal">question</a> yesterday in which I realized a 100 MHz oscilloscope with 100 MHz x10 probe will have hard time capturing high frequency signals such as the ringing on rising/falling
edge, and using a higher bandwidth probe allows the whole system to capture more precise samples.</p>
<p>After some searching I found the following formula (<a href="https://www.electronicdesign.com/technologies/test-measurement/article/21801995/keysight-technologies-how-to-pick-the-right-oscilloscope-probe" rel="noreferrer">source</a>):
<a href="https://i.stack.imgur.com/0Vojs.png" rel="noreferrer"><img src="https://i.stack.imgur.com/0Vojs.png" alt="enter image description here" /></a></p>
<p>With the formula, I can calculate that:</p>
<ul>
<li>100 MHz probe + 100 MHz scope ~= 70 MHz total bandwidth</li>
<li>200 MHz probe + 100 MHz scope ~= 80 MHz total bandwidth</li>
<li>500 MHz probe + 100 MHz scope ~= 98 MHz total bandwidth</li>
</ul>
<p>Does this mean that, in order to get the full potential out of my 100 MHz scope, I should invest in a 500MHz probe? Or is there other formula that I need to take into consider, which may somehow "bottleneck" the total bandwidth of the system?</p>
| Trying to get the full potential of my 100 MHz oscilloscope | 2024-03-19T18:40:46.893 |
706657 | |digital-logic|verilog|simulation|system-verilog| | <p>In real world, the hold time of a D flip flop is usually negative. Therefore, if you change the input at clock edge, the D flip flop will be written the input before clock edge. I think a simulator will also do this.</p>
| <p>Consider the following snippet (please let me know if you need me to include more):</p>
<pre><code>always @(posedge CLK)
begin
if (RST == 1'b1)
OUT <= 4'b0000;
else
OUT <= OUT + 1
end
</code></pre>
<p>The above, let's say, is part of some DUT. Now suppose in my testbench which instantiates this DUT that I update <code>CLK</code> (0 -> 1) and <code>RST</code> (1 -> 0) at the same time; more precisely, suppose that both are updated in different procedural blocks (so they are concurrent) in the same t=100 time slot's active region (both are blocking assignments). <strong>Is there any possibility of nondeterministic/simulator-dependent behavior?</strong></p>
<p>I think the crux/answer to my question will depend on how Verilog treats event-controlled evaluation. I see two possibilities:</p>
<p>(1) <code>RST</code> gets updated to 0 before the <code>CLK</code> signal gets updated to 1. Then, when the <code>CLK</code> signal gets updated there is no problem because the <code>always</code> block above, which is sensitive to this edge on the <code>CLK</code> signal, generates an evaluation event in the same t=100 time slot's active region and, eventually, we get <code>OUT <= OUT + 1</code> as desired.</p>
<p>(2) But what if <code>CLK</code> updated first? In this case, the <code>always</code> block above, which is sensitive to this edge on the <code>CLK</code> signal, generates an evaluation event in the same t=100 time slot's active region. Does this evaluation event occur (a) after or (b) before the <code>RST</code> update?
(a) In this case, there is no problem since <code>RST</code> will already be updated and the same decision as in (1) above will be taken.
(b) In this case we will take the wrong path.</p>
<p>Does Verilog have a defined behavior in this case, or is it up to the simulator (in which case code should not be written like this and, perhaps, the <code>RST</code> update should be done at some time slot before t=100)?</p>
| How are event-controlled events scheduled in Verilog? | 2024-03-19T18:57:22.907 |
706670 | |filter| | <p>You don't need a sharp filter, but the pass band requirements of 0.1 dB ripple make this a bit more difficult. I suggest using a loosely coupled filter with a 0.1 dB Chebyshev response. The particular loose coupled topology is so you can use two-opamp gyrators for the grounded inductors. I prefer gyrators over multiple feedback filters for noise performance. If you don't need low noise, a multiple feedback topology will be easier to implement.</p>
<p><a href="https://i.stack.imgur.com/sou7j.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sou7j.png" alt="enter image description here" /></a></p>
<p>This filter topology is discussed in "Electronic Filter Design Handbook", by Williams & Taylor, Chapter "Narrow-Band Coupled Resonators", page 5.19 (second edition). This topology works well for Q > 10.</p>
<p>Of course, you can create a bandpass filter in the digital domain which would be easier if you have the computational power.</p>
| <p>I am asked to design a circuit to measure certain signal in range of about 100 kHz, while interference that may appear can be about 150 kHz. Is it even possible to split the two? What needs to be done to get a very narrow band filter, say 5% of the central frequency with at some -10dB at 120% of the frequency?</p>
| Can I make an extremely sharp filter? | 2024-03-19T20:17:46.617 |
706685 | |operational-amplifier|current| | <p>The schematic you show works by ensuring that current in R2 is always equal to current in R1. Current <span class="math-container">\$I_{R2}\$</span> in R2 is actually:</p>
<p><span class="math-container">$$ I_{R2} = \frac{V_{IN}}{R_1} $$</span></p>
<p>The absence of <span class="math-container">\$R_2\$</span> in that equation means that you can't change current anywhere by changing R2.</p>
<p>Also, there's no rectification happening. It's just a linear amplifier, that does:</p>
<p><span class="math-container">$$ V_{OUT} = -V_{IN}\times \frac{R_2}{R_1} $$</span></p>
<p>I don't understand how you used a zener diode to rectify, or how you expected that zener to "produce" 50mA, or anything, your description is too vague. In any case, unless you use an op-amp, or some other active amplifier, you can't get more current out than the signal source can provide, since all current is provided by that source.</p>
<p>It's also not clear what you meant by "amperage was too low to output the required voltage". Usually it's the voltage that we control, which results in some current through it, not the other way around.</p>
<p>You speak of "short-circuit current" as if that's a normal condition. It is not. If you "short circuit" the op-amp output, then you are forcing it to 0V (or some other fixed potential), and that means it's not behaving as an op-amp any more. Sure, you may be able to get 25mA to flow from that output, but the voltage at the output would not be what you want, because you've short-circuited it. In normal operation, you can expect 10mA in or out of the op-amp output, not more.</p>
<p>This limit is approximate, but not negotiable. If you need 50mA, then you must buffer the op-amp output in some way. Since you want to half-wave rectify, then you only need to <em>source</em> +50mA (current <em>out</em> of the system, not in), which simplifies things somewhat:</p>
<p><img src="https://i.stack.imgur.com/1AlcK.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f1AlcK.png">simulate this circuit</a> – Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a></sup></p>
<p>Here transistor Q1 is an <a href="https://en.wikipedia.org/wiki/Common_collector" rel="nofollow noreferrer">emitter follower</a>, capable of sourcing over 300mA of current into load R1, if required by the load. This responsibility for current provision is removed from the op-amp, so the op-amp's own limit of 10mA or so is no longer a problem. Q1 is only able to <em>source</em> current through load R1, not sink it, during the positive halves of the input signal, so conveniently, it will also naturally rectify.</p>
<p>With this input <span class="math-container">\$V_{IN}\$</span>:</p>
<p><a href="https://i.stack.imgur.com/qBeQL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qBeQL.png" alt="enter image description here" /></a></p>
<p>That's a 1V peak sinusoid, resulting in this output voltage <span class="math-container">\$V_{OUT}\$</span>:</p>
<p><a href="https://i.stack.imgur.com/2cH2P.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2cH2P.png" alt="enter image description here" /></a></p>
<p>There's no gain, so the peak output is 1V also, but the negative excursions have been removed, so this is half-wave rectifying. The resulting output current is <span class="math-container">\$\frac{V_{OUT}}{R_1}\$</span>:</p>
<p><a href="https://i.stack.imgur.com/NhvE1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/NhvE1.png" alt="enter image description here" /></a></p>
<p>If you wish to have voltage gain too, then you must reduce the feedback factor, which is 1 (one) above. For instance, to have gain of <span class="math-container">\$A=2\$</span> then feedback should be <span class="math-container">\$\frac{1}{A}=\frac{1}{2}\$</span>, which you can achieve with a resistor potential divider:</p>
<p><img src="https://i.stack.imgur.com/UTOT8.png" alt="schematic" /></p>
<p><sup><a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fUTOT8.png">simulate this circuit</a></sup></p>
<p>Now voltage gain <span class="math-container">\$A\$</span> is:</p>
<p><span class="math-container">$$ A = 1 + \frac{R_3}{R_2} = 2 $$</span></p>
<p>With the same input, output voltage will now be doubled, and consequently you can expect load (output) current to be doubled also:</p>
<p><a href="https://i.stack.imgur.com/b5ewL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/b5ewL.png" alt="enter image description here" /></a></p>
<p>You may have noticed some small distortion in those output waveforms, at 1ms and 2ms. These are caused by the op-amp being unable to swing its output fast enough to recover from saturation. This can be mitigated, but that's another story.</p>
| <p>I am trying to use a uA741 Op-Amp (I cannot use a different Op-Amp) to build an amplified half wave rectifier circuit. I was able to successfully build the circuit, however the zener diode that I used which is rated at 3.6V was only outputting about 2.7V RMS voltage. After some testing on another circuit, I found that the amperage was too low to output the required voltage. Unfortunately, I was not provided the part number or a datasheet for the zener diode, so I had to figure out through trial and error that I needed around 50mA current in order to reach the desired voltage.</p>
<p>My new problem is that no matter what I do, I cannot get my Op-Amp to output anything near 50mA. According to the <a href="https://www.ti.com/lit/ds/symlink/ua741.pdf" rel="nofollow noreferrer">spec sheet</a>, the typical short-circuit output current for the uA741 OpAmp is +/- 25mA and maximum is +/- 40mA. After creating a simplified inverting amplifier circuit as shown below, the highest output current I have been able to achieve was only about 10mA.</p>
<p><a href="https://i.stack.imgur.com/FTFtn.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/FTFtn.png" alt="Inverting Op-Amp" /></a></p>
<p>I am using 2 9V batteries as a power source and a waveform generator for V_in (1 V, 400Hz sine wave, although I experimented with higher voltages)</p>
<p>I have tried many combination of R1 and R2 such that the voltage gain was around 8 V/V.</p>
<p>These are some of the resistor combinations I've tried, however I have lost track of all of them.</p>
<p>R1 = 1k and R2 = 8k</p>
<p>R1 = 100 and R2 = 800</p>
<p>R1 = 40 and R2 = 320</p>
<p>R1 = 20 and R2 = 160</p>
<p>I expected the current to increase as the feedback resistance went down, but with lower feedback resistance the voltage gain also went down, and so did the current. I am guessing this is due to offset. What I don't understand is how the typical output current could be rated as 25mA, and every single combination I've tried is nowhere near that current. Am I misunderstanding the data sheet, or is there a secret to getting the expected output current?</p>
| uA741 OpAmp output current never approaches "TYP" output short circuit current | 2024-03-20T00:02:17.460 |
706708 | |filter| | <p>Here is a blurb on how the rectifier stage works.</p>
<p><a href="https://www.analogictips.com/how-does-a-precision-rectifier-work-faq/" rel="nofollow noreferrer">https://www.analogictips.com/how-does-a-precision-rectifier-work-faq/</a></p>
| <p>I'm working with a schematic of a legacy signal filtering hardware my company is using and was wondering if anyone can understand/explain what the sections of opamps are doing. I plan on modifying it for a new circuit design but I'm not sure what I'm looking at (my only background with opamps is simplistic things like rectifiers, voltage followers, and amplification).</p>
<p>From a black box perspective, it takes in a noisy waveform, and outputs the waveform's peak value as a nice flat dc value. There are two 20k potentiometers for calibrating the filter. The only output ports are 2x and 4x port depending on what multiplication of the peak value you want.</p>
<p><a href="https://i.stack.imgur.com/0IrA1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0IrA1.png" alt="Black Box Example" /></a></p>
<p><a href="https://i.stack.imgur.com/EnnkO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/EnnkO.png" alt="Legacy Signal Filter Schematic" /></a></p>
| Understanding Legacy Hardware Filter | 2024-03-20T07:51:56.803 |
706710 | |pcb|pcb-design|schematics|altium| | <p>You should just be able to hover the object with your mouse cursor. The resulting tooltip contains information about the error, as in this example:</p>
<p><a href="https://i.stack.imgur.com/pbtrq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pbtrq.png" alt="Altium schematic view, tooltip with error information" /></a></p>
| <p><a href="https://i.stack.imgur.com/zEQlZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zEQlZ.png" alt="RED colour line is schematic error" /></a></p>
<p>In the Altium PCB view, we can check this kind of error with ALT+Right Click Twice</p>
<p>But in the Altium Schematic view, I am not able to do the same. Is there any other shortcut to this?</p>
| How to see schematic error in Altium? | 2024-03-20T07:56:43.783 |
706717 | |pcb|pcb-design|stack-up| | <p>If - as you are implying - the offenders are routed on top and the victims are routed on bottom, most likely, splitting your GND in any way won't have any advantages, because their respective fields shouldn't share much space.</p>
<p>Generally speaking, having separate AGND and DGND on PCB level or splitting GND is a bad idea in 90 % of cases anyhow.</p>
<p>The reason why many ADCs have separate AGND and DGND pins is that return currents from switching events in the digital section of the ADC don't share the in-package-return-path with the analog section: Some parts of the in-package-return-path are relatively high inductance (typically package pins and bonding wires) so switching events in the digital section (high di/dt) cause voltage drops on those high inductance parts. This could cause interference with the analog section by lifting the analog section's ground above PCB ground (also known as "ground bounce"), if analog and digital section share the same return path.</p>
<p>But solid GND planes offer a low enough inductance so there is usually no point in having separate AGND and DGND on PCB level. Avoiding shared return paths with careful part placement and signal routing (as you probably did already) should be sufficient in most cases.</p>
| <p>I am a student and this is my first time doing a PCB. I am wondering if it's more optimal to designate both ground planes with the same net, or have them as DGND, AGND, and use a net tie.</p>
<p>I have a space constraint where the board needs to be 30x30mm. I chose a 4 layer sig, gnd, gnd, sig stackup. I have my digital signals on top, and analog signals on bottom. My power is routed on the signal layers. One sensitive component I have is the AD7124, which is on the bottom of my board. I guess my biggest fear is overcomplicating things and inadvertently introducing more noise.</p>
<p>The articles I read always mention splitting a SINGLE ground plane in the XY direction, but I need to know if it's appropriate to have different nets for the two internal ground planes.</p>
| 4 layer stackup with space constraints | 2024-03-20T08:52:28.530 |
706724 | |microcontroller|resistors|schematics|esd| | <p>Look at Microchip's AN1416 app note: <a href="https://ww1.microchip.com/downloads/en/Appnotes/90001416a.pdf#page=15" rel="nofollow noreferrer">https://ww1.microchip.com/downloads/en/Appnotes/90001416a.pdf#page=15</a> under <em>Hardware Design</em>.</p>
<blockquote>
<p><strong>Unused Port Pins</strong></p>
<p>By default, PIC microcontroller I/O pins power up as
inputs. A digital input pin consumes the least amount of power when
the input voltage is near VDD or VSS. If the input is at some voltage
between VDD and VSS, the transistors inside the digital input buffer
are biased in the linear region and they will consume a significant
amount of current. On an unused I/O pin, which is left floating, the
voltage on the pin can drift to VDD/2 or oscillate, causing the unused
I/O pin to consume signif- icant power. The I/O pin can use as much as
100 μA if a switching signal is coupled onto the pin.</p>
<p>An unused I/O pin should be left unconnected, but con- figured as an
output pin, driving to either state (high or low), or configured as an
input with an external resistor (about 10 kΩ) pulling it to VDD or
VSS. If such a pin can be configured as an analog input, the digital
input buffer is turned off, preventing the excess current consump-
tion caused by a floating signal. Any of these methods will prevent
the floating node case, minimizing power.</p>
<p><strong>Analog Inputs</strong></p>
<p>Analog inputs have a very high impedance so they con-
sume very little current. They will consume less current than a
digital input if the applied voltage would normally be centered
between VDD and VSS. Sometimes, it is appropriate and possible to
configure digital inputs as analog inputs when the digital input must
go to a low-power state.</p>
<p><strong>Digital Inputs and Outputs</strong></p>
<p>As long as a digital input is pulled to VDD
or VSS, only the pin input leakage current will be consumed.</p>
<p>There is
no additional current consumed by a digital output pin, other than the
current going through the pin to power the external circuit. Close
attention should be paid to the external circuits to ensure that the
output is being driven to the state which causes the lowest power
consumption. If an external circuit is powered down, make sure that
any I/O pin connected to it is driven low to prevent sinking current
through the disabled circuit.</p>
<p>For digital inputs and outputs with high switching frequencies, make
sure that there is no stray capacitance on the bus by minimizing trace
length and eliminating unnecessary components.</p>
</blockquote>
<p>Not enough experience to comment too much, other than it sounds like using the analog mode is the best if power is your primary concern and output mode driven low if your primary concern is EMI. This can sometimes be challenging when routing so many pins close to each other especially since they are essentially useless. Looking at the diagram though, it does seem this chip is way overkill if you have that many unused io pins. If this is designed to be modified later, then you probably should route them now to something, although it is not impossible to solder to individual pins that only have pads without tracks.</p>
| <p>Recently, during a discussion with a senior electronics engineer on an industrial project that operates at 48V and is housed within a metallic casing, a point of contention arose regarding ESD compliance. The engineer argued that for ESD compliance, particularly in the rail industry where high-voltage disturbances are a concern, it is a standard practice to connect all unused GPIO pins of the MCU to ground through resistors. This method is believed to mitigate the risk of damage to the MCU from high-voltage perturbations via bounding.</p>
<p>Here is a diagram illustrating the proposed setup:</p>
<p><a href="https://i.stack.imgur.com/Fp88R.png" rel="noreferrer"><img src="https://i.stack.imgur.com/Fp88R.png" alt="enter image description here" /></a></p>
<p>From my experience, I have never encountered this practice and questioned its necessity, especially in a system operating at a relatively low voltage and with the PCB already grounded through planes on both the top and bottom layers.</p>
<p>Is this grounding solution indeed relevant and necessary for ESD compliance in such a context?</p>
| Tie all unused GPIO to GND? | 2024-03-20T10:45:50.640 |