Datasets:

bshada

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electronics.stackexchange.com

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706738

|usb-c|routing|usb-pd|

<p>The current is split between four conductors, and therefore needs to be collected in parallel on your PCB too. You've made a comment that there are only two pins, but this isn't usually true - instead, two pins are brought out to one pad, and two pins to a second pad. The mechanical drawing for USB-CD16HMxTR (rated for 5A) is shown below for clarity - the footprint has two power pads, but the connector has four physical pins.</p> <p><img src="https://i.stack.imgur.com/tUX3E.png" alt="mechanical drawing of a USB-C connector, showing four pairs of pins" /></p> <p>Your routing has these pads connected serially, which means that half the current will be borne by the link between the two. Instead, if you're dealing with this level of power, I'd suggest you immediately use vias to connect to a plane on another layer - possibly on both sides of the pad if you can fit it.</p> <p>Here's an example layout I've used before which fits within reasonably cheap processes (and only Full Speed USB), though admittedly it doesn't draw nearly so much current. Here, we have a ground plane, and a VBUS plane (highlighted in the second image).</p> <p><img src="https://i.stack.imgur.com/H6jOC.png" alt="USB-C power layout example" /></p> <p><img src="https://i.stack.imgur.com/n0FRP.png" alt="same layout, with the net highlighted" /></p>

<p>I'm designing a compact addressable LED strip driver circuit. Since USB Type-C chargers with PD should be able to provide up to 100W @ 20V, I want to use a USB cable as my main power source to power both the MCU and LED strip.</p> <p>However, I ran into a roadblock when trying to route the PCB. If we're pulling 100W @ 20V the current will be 5A. So I need to make the VBUS traces pretty wide for such a small PCB design - between 1.5 mm and 3 mm, depending on the copper layer thickness. However, even if I was able to find the space for these traces on my PCB, I wouldn't even be able to connect them to the USB port, because the pads for VBUS pins are less than 1 mm in width.</p> <p>How are you expected to make use of the full 100W when the pads are so small you can't even connect a correct width trace to it?</p> <p><a href="https://i.stack.imgur.com/yUshW.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yUshW.png" alt="enter image description here" /></a></p>

Pulling 100W from USB-C PD through SMD connector

2024-03-20T13:02:15.927

706742

|pn-junction|reverse-bias|

<p>Carrier diffusion takes place whenever there is a gradient in the density of a free electrons and/or holes. Such a gradient exists at the boundary between a metal and a semiconductor. There are, in general, more free electrons in the metal than in the semiconductor, and so free electrons diffuse from the metal into the semiconductor even if the semiconductor is P-type.</p> <p>When free electrons diffuse from a metal into P-type semiconductor, they generally do not last long as free electrons. Unless the P-type material is very weakly doped, there are many holes present. Holes and electrons randomly recombine. The number of excess free electrons (i.e the number greater than the equilibrium electron concentration) falls off more or less exponentially. The diffusion length of electrons in a P-type semiconductor is a measure of how far into the P-type material excess free electrons are, on average, likely to penetrate.</p> <p>If a diode is &quot;long enough&quot;, the density of free electrons in the P-material some distance from the metal contact is virtually independent of the density at the metal-semiconductor junction. The density of free electrons in this regime, <span class="math-container">\$n_0\$</span> is</p> <p><span class="math-container">$$n_0 = \frac{n_i^2}{N_A}$$</span></p> <p>where <span class="math-container">\$n_i\$</span> is the intrinsic carrier concentration, and <span class="math-container">\$N_A\$</span> is the concentration of acceptor dopants.</p> <p>As the intrinsic carrier concentration is temperature dependent, the density of free electrons will also be temperature dependent.</p> <p>Contrary to a common (incorrect) belief, the depletion region of a PN junction does not hinder the flow of excess minority carriers across it. Excess minority carriers are easily &quot;swept&quot; across the depletion region of a PN junction by the electric field that is present. Thus, the rate of such minority carriers crossing the PN junction depends primarily upon the concentration of minority carriers at the boundary of the depletion region. An analogy that I use in my mind for the free electrons at the edge of the depletion region is that of a pool of water at the top of a high waterfall. The rate of the flow over the waterfall does not depend upon the drop in the waterfall, but on the rate at which water reaches the edge.</p> <p>Because the flow of minority carriers is restricted by the concentration near the PN junction, the flow of electrons from the metal into the P-region is likewise restricted. Under equilibrium conditions, the flows are the same. If the (net) flow of electrons across the metal-P-type-semiconductor junction (temporarily) exceeds the flow across the PN junction, then the concentration of electrons in the P region will increase, creating an electric field which will oppose the flow across the metal-P-type-semiconductor junction.</p> <p>If a PN diode is reverse biased, net current will indeed flow from the metal into the P region, across the P region, across the PN junction, through the N region and into the N-side metal contact. Because this current is restricted by the density of free electrons on the P side of the depletion region, and this density, in diodes with sufficiently long P regions depends on intrinsic carrier concentration, the maximum current through the reverse biased diode (i.e. the reverse saturation current) is independent of the applied reverse voltage, but strongly dependent upon the temperature.</p> <p>Free electrons, can of course also diffuse across the metal-N-type-semiconductor junction. However, the concentration of free electrons in N-type semiconductors is much higher than in P-type. Diffusion of electrons <em>into</em> the N-type semiconductor is not a major factor in the current of a reverse biased diode. However, the flow of electrons from the N-type semiconductor into the metal is a major component of the current there.</p> <p>This brings me to something that is not entirely clear to me. It may be related to how some metal semiconductor junctions are Ohmic, and some form Schottky junctions, another topic that is not entirely clear to me.</p> <p>By symmetry with the P-side dynamics, one might suppose that in a reverse biased diode, holes form at the metal-N-type-semiconductor junction. However, I suspect (but do not know) that is rarely the case. The free electrons in the metal are in the conduction band, but the electrons that leave an atom to form a hole are in the valence band. My guess is that this is not an energetically favorable process for electrons to leave the valence band of the semiconductor to enter the conduction band of the metal. However, to counter my leaning, is the fact that Schottky have a reputation for high reverse leakage current. That latter fact may be totally unrelated however. In any event, holes created at the metal semiconductor junction will readily recombine with electrons in the N region, and so the concentration of holes at the N-side edge of the depletion region would be primarily determined by the intrinsic carrier concentration, rather than by such hole creation. Perhaps someone with more knowledge can shed some light on the question of whether there is hole creation at the metal-N-type-semiconductor junction of a reverse biased diode, in analogy with the electrons that diffuse into the semiconductor on the P-side.</p>

<p>I'm getting started with electronics and couldn't help but wonder about this:</p> <p>When the PN junction diode is reverse biased (P connected to the negative terminal and N connected to the positive terminal) shouldn't there be a large reverse current as the electrons (which are essentially the equivalent of minority charge carriers in the P region) get injected into the P region through the conductor?</p> <p>The depletion region can't really hinder the movement of electrons from P to N region as the field itself is from N region to the P region. Considering the very high concentration of free electrons in a conductor, shouldn't there be a huge reverse current?</p>

Reverse current in diodes

2024-03-20T13:35:00.680

706749

|mosfet|pcb-design|altium|layout|solder-paste|

<p>&quot;Pour&quot; generally refers to polygons of copper on a signal or plane layer. Such polygons have a pour sequence which dictates which ones may be clipped or removed entirely due to a higher-priority polygon pouring earlier. Paste layers are typically the result of pads in footprint or other geometry that dictate, by means of rules, what size the paste geometry will be with respect to the pad it belongs to.</p> <p><a href="https://i.stack.imgur.com/UfCFB.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/UfCFB.png" alt="Altium pad with pad stack properties" /></a></p> <p>In this example, the top paste geometry is shown at right in the Pad Stack properties. In the Shape column, you can see that &quot;Rule Expansion&quot; is selected, which means it will use the Paste Mask Expansion rule within design rules.</p> <p>Changing this option allows you to override the rule and specify the geometry for the pad directly. It is possible to use values that prevent a paste aperture entirely, which one might do with a test point or fiducial mark.</p> <p>Check the values for your pads and ensure that they are not somehow preventing a paste mask opening.</p>

<p>In the picture below, Top Paste's 3 of 4 FETs is not poured well. I can't see the reason for this. Any suggestions?</p> <p><a href="https://i.stack.imgur.com/KMJ7C.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KMJ7C.png" alt="FETs Top Pastes" /></a></p>

Altium Top Paste not fully poured

2024-03-20T14:48:54.417

706771

|led|filter|buck|led-driver|emi-filtering|

<p>Flipping through the datasheet, I don't see any mention of the capacitor in question -- your C1. It appears in the headline / example circuit (a slightly modified version of the EMI example on page 26), but nowhere else (including the EMI example itself). I don't find any discussion of it in the text, no mention of filtering the sense signal. Nor any mention of the eval board's C26 in its document.</p> <p>I would simply remove the capacitor; it's doubtful that the error amp it's feeding, can respond quickly enough to be affected by a leading-edge blip (due to gate charge plus resuming the load). The capacitor seems intended to reduce these effects -- but clearly it wasn't important enough to document in the datasheet, and I don't see any obvious-at-a-glance reason why it should be important.</p> <p>You can also, I think, add a gate resistor between <code>PWMTG</code> and the PMOS gate, to slow the transition and reduce such blips, as well as reduce EMI emissions if that is a concern. At a PWM rate of 100s Hz, a transition time of ~µs seems reasonable, or for a ~3nF equivalent gate, maybe 330 to 3.3kΩ. (Note the pin has a ~300mA nominal drive strength, so resistors less than about 30Ω will have little effect.)</p>

<p>I'm designing a buck LED driver using the <a href="https://www.analog.com/media/en/technical-documentation/data-sheets/lt8376.pdf" rel="nofollow noreferrer">LT8376</a> and I'm following the typical application for a low EMI solution (page 26).</p> <p>On the output, the schematic proposes a 100 nF capacitor in parallel with the LED string. I tried to reproduce the schematic and adapt it to my application on a LTspice simulation but my problem is that when I have this capacitor, I see peak of current at each positive transition.</p> <p><a href="https://i.stack.imgur.com/6gdHS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6gdHS.png" alt="enter image description here" /></a></p> <p>I checked the data measured on the <a href="https://www.analog.com/media/en/technical-documentation/user-guides/eval-lt8376-az.pdf" rel="nofollow noreferrer">evaluation board</a>, which uses exactly the same capacitor. The usefulness I found there is that it acts as a low-pass filter with the ferrite for high frequencies, but it also seems to adjust the transition response.</p> <p>The only way I've found to avoid the peaks of current is to reduce the value of the capacitor as with a 1 nF, but in this case the transition is as fast as if there were none.</p> <p>So my question is: how can I eliminate current spikes while smoothing the transition to reduce electromagnetic interference? Is it possible that these current peaks are a simulation problem?</p> <p>Here is my design: <a href="https://i.stack.imgur.com/VqJnE.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VqJnE.png" alt="enter image description here" /></a></p>

Current peak on a low EMI buck LED driver

2024-03-20T17:35:50.963

706783

|protection|gas|gdt|ionization|

<p>There are two independent gas-filled cavities with contacts at either end. The center contacts are two sides of the same disk, so the centre disk should be grounded.</p>

<p>I would like to know the reason behind the pinout order of a 3 pin GDT.</p> <blockquote> <p>GDTs are designed to prevent damage from transient disturbances by acting as a “crowbar” in creating a short-to-ground circuit during conduction - Bourns Inc.</p> </blockquote> <p>A 3 pin GDT has the ability to protect two signals, with the other pin being the one connected to ground. From what I've seen (not much, really), the middle pin is the one being connected to ground (according to the manufacturer). Is there a reason behind this? I would think that this is mainly because of the design convenience or because of industry standards, but I'd like to know if there is also a &quot;chemical&quot; reason behind this (maybe the way gasses behave internally).</p> <p><a href="https://i.stack.imgur.com/R1nz2.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/R1nz2.png" alt="3 pin GDT" /></a></p>

3 pin Gas Discharge Tube (GDT) - pinout order

2024-03-20T19:44:46.170

706786

|capacitor|identification|electrolytic-capacitor|

<p>I am not familiar with this particular brand, but this is what I have seen so far for 3 lead capacitors:</p> <ol> <li>The third lead not connected to anything. Its only role being an additional mechanical support.</li> <li>The third lead internally connected to the negative terminal, maybe still serving as a mechanical support. Sometimes the PCB designer being lazy enough and the third lead not connected.</li> <li>Two capacitors in one package with common negative (rare)</li> <li>Two capacitors in one package in series (one negative and one positive at the common lead - even more rare)</li> </ol> <p>Your best strategy is probably to trace the PCB around the capacitor. Desoldering the capacitor may reveal additional markings on its bottom.</p>

<p>I have a 3-lead capacitor that I'm having a hard time identifying. It is from an old Lafayette PF-30 receiver. I don't have schematics or a manual.</p> <p>It has a high squeal when turned on, and my first order of business is to replace the electrolytic caps.</p> <p><a href="https://i.stack.imgur.com/X4zmw.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/X4zmw.jpg" alt="enter image description here" /></a></p>

Electrolytic 3-lead capacitor

2024-03-20T20:00:14.780

706808

|circuit-analysis|resistors|

<p>If my first comment above is correct and the resistors are being shorted, the coin battery is being connected directly to each LED, (with no current limiting). The enabled LED will draw a high current from the battery. Depending on the actual battery type used there may or may not be enough current to burn out the LED. If you try connecting more than one LED using the DIP switch the LED that has the lower Vf will sink most of the battery current and the other LEDs may not light at all.</p> <p>In the edited drawing below the large red arrows show where the shorts seem to be. The black X shows where to disconnect the wires from. The added red lines show the new connections for the wires and resistor leads.</p> <p>Be sure to check the polarity of the LEDs in the actual circuit. Also be sure you have the correct +/- wire connections on the battery holder, the Fritzing drawing may not be showing that properly.</p> <p>Lastly, using 470 ohm resistors for all the LEDs will likely leave the blue and green LEDs quite dim. You might switch to lower value resistors at least for those two LEDs.</p> <p><a href="https://i.stack.imgur.com/l30OW.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/l30OW.jpg" alt="enter image description here" /></a></p>

<p>Could anyone help me identify the error in this circuit?</p> <p><a href="https://i.stack.imgur.com/SwdyH.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/SwdyH.png" alt="enter image description here" /></a></p>

What is the error in this circuit design?

2024-03-21T01:29:53.667

706814

|transistors|maximum-ratings|

<p>Use Vceo for general purpose requirements.</p> <p>That kind of 8050-type transistor is optimized for lower voltages.</p> <p>If you actually need to switch the 48V at low current, then a 160V MMBT5551 is a reasonable low-cost and multiple-sourced choice.</p> <p>If your input is 48V and you are switching lower voltage than 25V (minus a safety margin) then the one you’ve shown will work, but as always, you will need a base resistor to limit the current since the Vbe will be about 0.7V when on (and applying much more than that will destroy the transistor).</p>

<p>How can I know the maximum voltage input for transistor. I look at datasheet. But confusing me little bit. Which is for maximum voltage. Afraid that might burn the transistor. Btw, my input circuit is 48V and current needed is 30mA. <a href="https://i.stack.imgur.com/LpkeN.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/LpkeN.png" alt="enter image description here" /></a></p>

Maximum Voltage Input and output current for transistor pnp and npn

2024-03-21T03:48:01.507

706830

|altium|

<p>In the <strong>View Configuration</strong> panel, under the <strong>View Options</strong> tab, look for <strong>Mask and Dim Settings</strong>.</p> <p><a href="https://i.stack.imgur.com/CFSak.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CFSak.png" alt="Mask and Dim Settings in Altium" /></a></p> <p>The <strong>Dimmed Objects</strong> slider affects the brightness of dimmed objects. The leftmost position will make them invisible while the rightmost position applies no dimming at all. It may be that you have this too far right to see a distinction.</p> <p>You can do this while routing by starting the route, pressing <kbd>Tab</kbd> and adjusting the slider until it suits your preference. To resume routing, look for the pause symbol in the middle of the editor and click it.</p>

<p>I have an issue with Altium (Version 2023, perpetual), that when I route a trace with the &quot;Interactive Route Connection&quot; feature, other components are not dimmed and so it is hard to see where to route:</p> <p><a href="https://i.stack.imgur.com/z2GV6.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/z2GV6.png" alt="enter image description here" /></a></p> <p>The funny thing is, that it works for differential routing. I tried to reset the view already, but without success. Any ideas, what that could be?</p>

Altium issue - routing a trace does not dim other nets

2024-03-21T07:20:50.173

706840

|ltspice|square|

<p>LTSPICE supports waveform arithmetic. Specifically, if you have a node X you can plot D(V(X)) to get the derivative of V(X) (which is its slope). In this case I created a waveform that rises/falls by 10V in 10us so the plot shows ±1MV/s during the rise times and zero while V(X) is flat.</p> <p><a href="https://i.stack.imgur.com/ZlFst.png" rel="noreferrer"><img src="https://i.stack.imgur.com/ZlFst.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/I5ahc.png" rel="noreferrer"><img src="https://i.stack.imgur.com/I5ahc.png" alt="enter image description here" /></a></p> <p>To plot a formula, you can right click on the plot or press the &quot;A&quot; key to bring up a dialogue box where you can add a new trace. From there just type in the formula for what you want to plot.</p> <p><a href="https://i.stack.imgur.com/NgIEN.png" rel="noreferrer"><img src="https://i.stack.imgur.com/NgIEN.png" alt="enter image description here" /></a></p>

<p>I want know if there is a certain formula that needs to be used to get the positive and negative slope of a square wave. Let Vn001 be the indication if its positive and negative? Or can I simply trust the measurement in LTspice :slope:?</p> <p><a href="https://i.stack.imgur.com/Yh2Qp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Yh2Qp.png" alt="enter image description here" /></a></p> <p>Kindly use this image as a reference. From my knowledge you can calculate the slope with <span class="math-container">\$\frac{\Delta V}{\Delta T}\$</span>.</p> <p>Ideally, the <span class="math-container">\$\small\Delta V\$</span> is constant, or is this not the case and should I still get the difference between the two cursors?</p> <p><a href="https://i.stack.imgur.com/w0vqM.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/w0vqM.png" alt="" /></a></p> <p>So, from the values, the positive slope of this output is:</p> <p><span class="math-container">\$\frac{\Delta V}{\Delta T} = \frac{13.6\ \mathrm{V}}{2.12\ \mathrm{ms}} = 6415.09 \neq 53.75\$</span></p>

How to check for slope of a square wave output in LTspice

2024-03-21T08:53:39.487

706847

|mosfet|switches|windturbine|depletion-mode|

<blockquote> <p><em>How do I successfully drive this MOSFET for a dump load resistor with a wind turbine?</em></p> </blockquote> <p>My 1st suggestion allows the MOSFET to be driven from a ground referenced system: -</p> <ol> <li>Derive a 15 volt supply from the wind turbine output using an isolated converter</li> <li>That 15 volt supply need only be a couple of watts</li> <li>Recom and Murata make converters that are suitable but,</li> <li>They will need a steady DC supply input derived from the turbine AC</li> <li>Next, use an opto-isolated MOSFET gate driver that is powered by the isolated converter</li> <li>Many people make these types of devices (e.g. the <a href="https://www.onsemi.com/pdf/datasheet/fod8343-d.pdf" rel="nofollow noreferrer">FOD8343</a>)</li> <li>Use that to activate and deactivate the MOSFET</li> </ol> <p>Or, derive everything from the MOSFET side. When an over-voltage looks likely to occur, the MOSFET can be activated for a period of time and clamp the problematic voltage.</p>

<p>I am constructing an AC-DC Rectifier with dump load control for a wind turbine (see Schematic for info). The following use cases are required:</p> <ol> <li><p>Rectifier rectifies AC into DC and provides energy to inverter, dump load is off</p> </li> <li><p>Rectifier rectifies AC into DC but the voltage produced is over 500V and thus PWM is used with a MOSFET to manage overvoltage and feather the load to the inverter</p> </li> <li><p>There is a grid outage and I need to isolate the circuit from the grid and then dump all the load to the dump load resistor to slow down the turbine</p> </li> </ol> <p><strong>Solution 1</strong>: Use an enhancement type MOSFET to manage overvoltage. In the event of a grid outage have a UPS and this battery to power the MOSFET and ensure it is switched on: <a href="https://uk.rs-online.com/web/p/lead-acid-batteries/0597835?gb=s" rel="nofollow noreferrer">https://uk.rs-online.com/web/p/lead-acid-batteries/0597835?gb=s</a>. Issues arise here with the involvement of having to use a battery thus increasing complexity to regulate the voltage for the microcontroller circuit and the MOSFET driving circuit.</p> <p><strong>Solution 2</strong>: Use a depletion type MOSFET so in the event of a grid outage and an inability to send signals from the microcontroller the depletion type MOSFET defaults to close and the switch (Q2) defaults to open to isolate it from the grid and take all the power. This solution would negate the necessity for a battery.</p> <p>The turbine is specced for 6kW but as it may have to take all the load peak voltage with SF should be around 1000V and peak current should be around 20A hence the high specced MOSFETs.</p> <p>Using an NC Relay would be a much simpler option but is not one we want to explore.</p> <p><strong>Note</strong>: the MOSFET Q2 will be a simple switch and not a MOSFET (I just couldn't find a switch. The capacitor creates a delay to avoid a voltage surge.</p> <p><a href="https://i.stack.imgur.com/98xAZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/98xAZ.png" alt="Circuit diagram" /></a></p>

How do I successfully drive this MOSFET for a dump load resistor with a wind turbine?

2024-03-21T10:12:50.910

706851

|digital-logic|simulation|vhdl|

<p>I was unable to reproduce the exact error message you got (perhaps due to using a different simulator), but the error I got pointed towards the code:</p> <pre><code>else '0' end if; </code></pre> <p>It is strange to see <code>'0'</code> alone on a line like that. It should have a semicolon at the end, and you likely meant it to be an assignment like:</p> <pre><code>SP_error &lt;= '0'; </code></pre> <p>You should also add some reasonable indentation to make your code easier to understand:</p> <pre><code>begin if (RST = '0' AND unsigned(SP_mm) &gt; 1000) then SP_error &lt;= '1'; else SP_error &lt;= '0'; end if; </code></pre> <p>This compiles without errors on <a href="https://www.edaplayground.com/x/bJjn" rel="nofollow noreferrer">EDA Playground</a>.</p>

<p>It may be a simple fix, but I do not understand the error:</p> <blockquote> <p>Error: near &quot;end&quot;: (vcom-1576) expecting == or '+' or '-' or '&amp;'</p> </blockquote> <pre><code>library IEEE; use IEEE.Std_logic_1164.all; use IEEE.Numeric_STD.all; entity SetPoint is Port ( SP_mm : in STD_LOGIC_VECTOR(9 downto 0); SP_scalingFactor : in STD_LOGIC_VECTOR(2 downto 0); RST : in STD_LOGIC; SP_error : out STD_LOGIC; SP_encoderUnits : out STD_LOGIC_VECTOR(15 downto 0) ); end SetPoint; architecture yours of SetPoint is begin process(SP_mm, SP_scalingFactor, RST) begin if (RST = '0' AND unsigned(SP_mm) &gt; 1000) then SP_error &lt;= '1'; else '0' end if; SP_encoderUnits &lt;= STD_LOGIC_VECTOR(Shift_left(&quot;000000&quot;&amp;unsigned(SP_mm),to_integer(unsigned(SP_ScalingFactor)))); end process; end architecture yours; </code></pre>

Error: near "end": (vcom-1576) expecting == or '+' or '-' or '&'

2024-03-21T10:14:59.247

706862

|current|lm317|over-current|

<p>There are two approaches. One is to use a general-purpose current sensor circuit, shown below. Q1 amplifies the voltage across Rs and puts it across R2. Q2 compensates Q1's B-E drop. Q3-Q4 are a 0.1mA current source for biasing Q2, also used to generate a reference voltage for the switch Q5. When the voltage across R2 goes about a diode drop above the reference voltage, Q5 turns on, turning on Q6 and thus the LED.</p> <p>For higher supply voltages, R5 and R4 should be increased proportionally. For a higher forward-voltage LED, e.g. a blue LED, move the LED above Q6.</p> <p><img src="https://i.stack.imgur.com/4n7cv.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f4n7cv.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <p>The circuit is not very sensitive to supply voltage changes, although the LED intensity will vary with supply voltage. The following plot of LED current vs. load current shows this:</p> <p><a href="https://i.stack.imgur.com/B94Si.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/B94Si.png" alt="enter image description here" /></a></p> <blockquote> <p>I have an LM338 set up in current regulation mode, and I want to make an LED turn on when the current is maxed out</p> </blockquote> <p>In current regulation, there's either regulation or no regulation, there's no &quot;maxing out&quot; of current. The current may be below the setpoint, when the load impedance is too high, and then the regulator does not regulate anything. Or the current may be at the setpoint - perhaps that's what you mean by &quot;maxed out&quot;.</p> <p>Instead, just say that you want to indicate that the current is being regulated.</p> <p>Thus the 2nd approach that leverages the architecture of LM338 Darlington output stage. Then current regulation is active, there will be say 2V or more across LM338. That's easy to detect:</p> <p><img src="https://i.stack.imgur.com/66xvQ.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f66xvQ.png">simulate this circuit</a>}</p> <p>Q1, Q2 form a differential pair of a comparator. Q3 drives the output LED. D3-D4-RV3 establish the reference voltage. RV3 should be a 200k adjustable, initially set for 100k. RV2 is used to adjust the balance of the differential pair, and also the sharpness of the LED cutoff. After adjusting RV3 for the LED to turn brightly as the input voltage rises and the current gets into regulation, adjust RV2 for the LED to turn off fully when the current is not regulated (under the limit).</p>

<p>I have an LM338 set up in current regulation mode, and I want to make an LED turn on when the current is maxed out (4A in this case)</p> <p><a href="https://i.stack.imgur.com/orVUw.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/orVUw.png" alt="LM338 in current regulation mode" /></a></p> <p>Where do I put this LED, and what other circuitry do I need? Is it even possible? Also an explanation of why I should put it there would be nice so I can learn.</p>

Overcurrent LED in LM338 circuit

2024-03-21T12:19:29.260

706880

|arduino|pcb|analog|schematics|digital-potentiometer|

<p>Thank you to everyone who took the time to provide insights and advice on my issue with the digital potentiometer in my circuit design. I'm pleased to report that I've resolved the problem—it turned out to be a case of poor soldering, particularly challenging due to my lack of proper tools for working with SMD components.</p> <p>After rectifying the soldering issues, the digital potentiometer now responds to the control script. However, I've observed an unexpected behavior in the resistance value changes: rather than increasing linearly as my script dictates, the values exhibit some oscillations. This leads me to suspect that the data bits sent to the potentiometer might be inverted or otherwise not in the expected order. Here's an oscilloscope capture of the output wave that illustrates the issue:</p> <p>Output Wave</p> <p>Given this new finding, my next step is to investigate the bit order in my script and attempt adjustments to see if this resolves the oscillation in resistance values. I'll update with any progress or solutions I find.</p> <p>Again, thank you all for your support.<a href="https://i.stack.imgur.com/4cE4S.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4cE4S.jpg" alt="Output wave" /></a></p>

<p><br /> I've designed a circuit to generate a smoothed PWM signal using an Arduino, which then undergoes attenuation, amplification via a non-inverting op-amp, and finally has an approximate offset of 0.9V added. The circuit also includes a digital potentiometer intended to adjust the signal amplitude, but despite assembly and verification, the potentiometer's resistance remains fixed and unresponsive to control attempts.</p> <p><strong>Circuit Overview:</strong> <a href="https://i.stack.imgur.com/ijXjX.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ijXjX.png" alt="Schematico" /></a></p> <p>PWM Generation: Direct from Arduino. <br /> Smoothing: Via an RC filter. <br /> Attenuation: Using a voltage divider. <br /> Amplification: Through a non-inverting op-amp. <br /> Offset Addition: Approximately 0.9V.</p> <p><strong>Issue:</strong> The digital potentiometer does not adjust as intended, seemingly locked at a specific resistance value. I have meticulously checked the soldering under a microscope and verified connections with a multimeter, finding no apparent issues. This leads me to suspect a potential design flaw or the MAX5495 is wrongly soldered because it's an SMD and i can't be 100% sure the pins are correctly soldered.</p> <p><strong>Additional Details:</strong></p> <p>I've developed and assembled the PCB based on this design. The code controlling the potentiometer was sourced from a forum, implying its reliability.</p> <p><a href="https://forum.arduino.cc/t/solved-max5494-10k-digipot-and-spi-resolution-taps-issues/591605/12" rel="nofollow noreferrer">Code Snippet from Arduino forum</a></p> <p><a href="https://www.analog.com/en/products/max5495.html" rel="nofollow noreferrer">MAX5495 Resource page.</a></p> <p><a href="https://www.analog.com/media/en/technical-documentation/data-sheets/MAX5494-MAX5499.pdf" rel="nofollow noreferrer">MAX5494-MAX5499 Datasheet.</a><br /> .</p> <p><strong>My Code:</strong></p> <pre><code>#include &lt;SPI.h&gt; const uint8_t CSpin = 10; void setup() { setupSPI(); setupPWM(); Serial.begin(115200); } void loop() { for(uint16_t i = 0; i &lt; 1024; i++) { // Loop over the full range of the digipot update_digipot(0x01, i); // Update wiper position delay(100); // Short delay between updates for visibility } delay(1000); // Wait for 1 second after completing a full range update } void update_digipot(uint8_t reg, uint16_t value) { union { uint16_t val; uint8_t bytes[2]; } in; in.val = value &lt;&lt; 6; //as per datasheet digitalWrite(CSpin, LOW); //Write Wiper Register. 0x01: wiper1, 0x02: wiper2 SPI.transfer(reg); //send upper value byte SPI.transfer(in.bytes[1]); //send lower value byte SPI.transfer(in.bytes[0]); digitalWrite(CSpin, HIGH); } void setupPWM() { analogWrite(3, 30); // Set PWM to 50% duty cycle on pin D3 } void setupSPI() { pinMode(CSpin, OUTPUT); pinMode(3, OUTPUT); SPI.begin(); } </code></pre>

Digital Potentiometer Not Responding in Custom PWM Circuit with Arduino

2024-03-21T15:06:29.283

706884

|embedded|clock|router|

<p>I can't tell you how to fix the problem, but I think I can explain what is going on.</p> <p>All versions of the <a href="https://wiki.dd-wrt.com/wiki/index.php/TP_Link_Archer_C9" rel="nofollow noreferrer">TP-Link Archer C9</a> use a 1GHz processor. You say that there's a 25MHz crystal on it and that it is running at 25MHz. To get 1GHz out of 25MHz, the processor will be using a phase locked loop to multiply the crystal oscillator output from 25MHz to 1GHz. That's a factor of 40, which is pretty close to your estimated factor of 44 from the baud rate.</p> <p>It seems the multiplier sometimes doesn't work or gets set to the wrong multiplication.</p> <p>The multiplier settings will usually be set during boot up of the processor. There's some part of the boot code that does that.</p> <ol> <li>The boot code may be read incorrectly resulting in an incorrect multiplier setting.</li> <li>There may be a configuration setting stored separately from the firmware. If the processor encounters an error reading the configuration, it might go into a failsafe mode with a default multiplier setting of 1.</li> <li>The multiplier itself might be defective in some way.</li> </ol> <p>I'd look at the flash, the RAM, and any other EEPROM or non-volatile storage on the board as well as their connections to the processor. Bad connections or an electrically damaged chip could mangle the settings.</p> <p>If the multiplier is bad, I don't see any easy way to fix it. It is internal to the processor, so your only fix would be to replace the processor.</p> <hr /> <p>You might want to try the <a href="https://wiki.dd-wrt.com/wiki/index.php/TP_Link_Archer_C9#.22Normal.22_Bricked_Router" rel="nofollow noreferrer">recovery procedure given here</a> to reinstall the original firmware in the flash memory of your router. Following that, it may help to reset it to factory defaults.</p>

<p>I have a TP-Link Archer C9 V5 router. After a recent power outage it did not come back up, so I am now trying to see if I can fix it. Occasionally it will still manage to boot and work normally, I was even able to successfully perform a firmware update, but after power cycling it would fail to boot again.</p> <p>I took it apart and connected to the serial port. On a successful boot the port operates at 115200 baud and spits out all of the normal boot messages. When the boot fails, the console is silent for a while and then starts spewing out garbled data. Or so I thought. I connected the TX pin to my oscilloscope and noticed, that the output is still serial data, but the data rate is now approximately 2625 baud. After changing my serial to USB adapter to this baud rate I was once again able to receive the same boot output as before, but everything was happening slower, and after reaching a certain stage, the router boot-looped.</p> <p>Given that the data rate is not a standard rate, and that the boot sequence is the same but slower, I have come to a conclusion that the CPU is running approximately 44x times slower than it thinks it is. I don't really know how to even get started on this problem, the one thing I did try was to probe a 25 MHz crystal that is next to the CPU and it was indeed running at 25 MHz. What could be the cause of the problem and how could I debug it?</p> <p><strong>Update:</strong> Following JRE's suggestion below, I resoldered the flash chip and so far it seems to have fixed the problem. I guess the problem was a bad multiplier config that it got from the flash with a bad contact, though I do find it strange that the CFE still seems to have booted normally, albeit slower.</p>

What would cause a router CPU to run 44x slower?

2024-03-21T15:59:33.527

706894

|temperature|heat|fan|cooling|chassis|

<p>No formal justifications here.<br /> These are just what would influence my decision.</p> <ul> <li><p>Fast air will cool better than slow air.</p> </li> <li><p>Filtering energy concentrated air at a fan will be easier than filtering low energy per area air at inlet slots.</p> </li> <li><p>Directing high velocity incoming air to key areas is easier than directing low speed air.</p> </li> </ul> <p>All these combine to make a fan blowing in the best choice in most, <strong>but maybe not all</strong> situations.</p> <p>eg If you have multiple fans in an enclosure and the air has been blown inwards through a capable filter then adding a fan for a selected sub-enclosure would allow you to blow pre-cleaned air outwards. This would remove the cleaning aspect from consideration.</p>

<p>I am building a temperature controller. The controller is built in a metal rack mount chassis. The components inside the controller generally consist of ACDC power supplies, an arduino and small signal handling PCBs, fuses, and a bunch of wiring. We have designed a cooling fan on the rear panel of the chassis. We also put venting cutouts on a separate region of the rear panel. Should the cooling fan blow air out of the chassis or suck air in? Why and what is more common?</p> <p>There is no particularly hot item in the controller chassis. I am generally more concerned about the overall temperature in there.</p>

Cooling fan direction

2024-03-21T18:08:00.007

706906

|circuit-analysis|kirchhoffs-laws|ohms-law|

<p>Here's how I'd process the problem, in order:</p> <ol> <li>There's no ground shown. Pick a node that looks <code>good</code> to me and call it <span class="math-container">\$0\:\text{V}\$</span> (or ground, so to speak.) In this case:</li> </ol> <p><a href="https://i.stack.imgur.com/jlyXZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jlyXZ.png" alt="enter image description here" /></a></p> <ol start="2"> <li>Assign known node voltages (known with respect to the ground reference just assigned):</li> </ol> <p><a href="https://i.stack.imgur.com/ACYza.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ACYza.png" alt="enter image description here" /></a></p> <ol start="3"> <li><p>Now, at this point I can see that I know the voltage difference across <span class="math-container">\$R_1\$</span> is <span class="math-container">\$15\:\text{V}-5\:\text{V}=10\:\text{V}\$</span> and also know the current through it is <span class="math-container">\$10\:\text{mA}\$</span>. So I can work out its resistance using Ohm's Law. The same is also true now for <span class="math-container">\$R_2\$</span> and <span class="math-container">\$R_3\$</span>, both of which will have <span class="math-container">\$5\:\text{V}-0\:\text{V}=5\:\text{V}\$</span> across them. (But you already knew that, of course.)</p> </li> <li><p>The only missing item is the current through <span class="math-container">\$R_2\$</span>. But you already worked this out as <span class="math-container">\$10\:\text{mA}-2\:\text{mA}=8\:\text{mA}\$</span> (KCL.)</p> </li> </ol> <p>So everything needed to work out all three resistor values is known. Just apply Ohm's Law at this point and work out the values.</p> <p><em>(Those are the mental steps I'd likely take, anyway, if left to my own devices and not where a teacher/assignment requires some other methods to be applied.)</em></p>

<p><a href="https://i.stack.imgur.com/xXfnp.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/xXfnp.png" alt="enter image description here" /></a></p> <p>How to find the value of R2 in this circuit? If I1 is 8 mA in this case (I = I1 + I2) and then given 5 V over R2 and R3, 5 V/0.008 A = 625 Ω. Is this answer valid ?</p> <p>Or is it 5 V/I = 2mA = 2.5 = 1/2.5 + 1/2.5 = 0.8 = 1/0.8 = 1.25 Ω.</p> <p>I have made several different conclusions and I think R2 is 1.25 Ω.</p>

How to calculate the value of resistor R2?

2024-03-21T21:28:28.207

706910

|current|motor|dc-motor|current-limiting|servo|

<p>The gear train is a confounding factor. You'll probably need to drive your servo through a torque sensor, and have a controller in the Arduino that backs the servo off when the torque reaches your torque limit.</p> <p>You could, in theory, rip out the drive electronics and just bring out the potentiometer and motor wires to a drive/sense board. Then monitor both the servo position and the motor current, and drive to the correct position while limiting the current.</p> <p>In practice, this won't work unless you have a very loose tolerance for the torque limit on the servo output.</p> <p>This is because the geartrain in the servo is very inefficient*. As a consequence, you won't have good reliability in how much torque is exerted in the forward direction, and the amount of torque it'll take to back-drive the servo will be significantly more than the torque the servo will exert -- possibly to the point of stripping gears if you try to back-drive it hard enough.</p> <hr /> <p>* For gears, &quot;inefficient&quot; means that the torque exerted on the output shaft is lower than the torque you'd expect from the gear ratio alone. RC servos like that have several stages of gear reduction, so you can expect them to have efficiencies on the order of 50% or less.</p>

<p>How can I control the torque of a DC servo? Servo model: DS51150-180</p> <p><a href="https://i.stack.imgur.com/3oLzL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3oLzL.png" alt="Image of servo off of eBay: https://i.ebayimg.com/images/g/pEkAAOSwmFNl4NkA/s-l1600.jpg" /></a></p> <p><a href="https://i.ebayimg.com/images/g/pEkAAOSwmFNl4NkA/s-l1600.jpg" rel="nofollow noreferrer">https://i.ebayimg.com/images/g/pEkAAOSwmFNl4NkA/s-l1600.jpg</a></p> <p>The current in a DC motor, as well as in a servo, determines the torque it exerts. I understand that a servo motor automatically demands the current it requires to generate the necessary torque and thus reach the angle indicated by the PWM control signal.</p> <p>For a project, I want to control the servo not by manipulating its angular position, but by manipulating the torque generated. This torque control would be in proportion to an input signal (a signal that goes through an ADC, then processed with an Arduino to later manipulate the torque dynamically).</p> <h2>Control</h2> <p>Even though I want to control the torque generated by the servo, I have to indicate the angle I want it to reach, so, regardless of the input signal value, it will always be programmed to reach 180°. What I would be manipulating based on an input signal would be the way it reaches those 180°, in this case, with what torque or motor par it gets there. EXAMPLE: Although it may seem counterintuitive, I want that if the input signal is not large enough, and the servo tries to load 2kg at 180°, it couldn't carry it. If the input signal is large enough, the necessary torque will be generated to move those 2kg to 180°, and if the signal is even larger, I want it to carry those 2kg faster to their destination.</p> <h2>My Idea</h2> <p>The servo will always try to demand the current it requires in order to generate the necessary torque to reach the desired angular position, so I was thinking of implementing a current limit control so that even if the servo demands more current, the source does not deliver it, thus generating the torque i want it to generate. However, I have not found an IC/circuit/driver that does this; those I have found alter the delivered voltage, and a servo must maintain its input voltage constant for its correct operation.</p> <p>How could I solve this? How could I limit the current supplied to a servo motor without altering the voltage that feeds it? I have been researching for a long time and have not found a solution, maybe it's not even possible haha.</p>

Par control in DC servomotor

2024-03-21T22:38:41.950

706927

|verilog|vivado|

<p>Non-blocking statements have the following meaning:</p> <pre><code>always @(posedge Clk) begin Qa_after_end &lt;= D_before_begin; Qb_after_end &lt;= Qa_before_begin; Qc_after_end &lt;= Qb_begin_begin; end </code></pre> <p>In effect, D, Qa, Qb, Qc form a shift register. The assignments are all executed in parallel, after the block <code>end</code>. This is borne out in the simulation results.</p> <p><a href="https://i.stack.imgur.com/FQ9Nd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/FQ9Nd.png" alt="enter image description here" /></a></p> <pre><code>always @(posedge Clk) begin Qd_below_this_line = D_above_this_line; Qe_below_this_line = Qd_above_this_line; Qf_below_this_line = Qe_above_this_line; end </code></pre> <p>Qd, Qe, and Qf all take on the value of D, because the assignments are executed sequentially <em>within</em> the block. But note that this all happens within the same clock cycle, and takes zero time. The sequence of assignments only establishes how the values propagate. The above block simplifies to:</p> <pre><code>always @(posedge Clk) begin Qd_below_this_line = D_above_this_line; Qe_below_this_line = Qd_above_this_line = D_above_this_line; Qf_below_this_line = Qe_above_this_line = D_above_this_line; end </code></pre> <p>Now, since the ultimate value referred to on the right side of the assignment (D) is never same as the destination on the left, the &quot;above this line&quot; and &quot;below this line&quot; distinctions are not necessary anymore, and the block is equivalent to:</p> <pre><code>always @(posedge Clk) begin Qd = D; Qe = D; Qf = D; end </code></pre> <p>And, as you can see in the simulation results, after the positive edge of the clock, Qd, Qe and Qf do indeed all take the value of D.</p> <p><a href="https://i.stack.imgur.com/ZvyRB.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ZvyRB.png" alt="enter image description here" /></a></p>

<p>I am having a very difficult time to understand the logic behind the naming of &quot;Blocking&quot; and &quot;Non-blocking&quot; statements in Verilog.</p> <p>By definition, Blocking assignment evaluates and assigns values immediate. Whereas, Non-blocking assignment deferred until all right-hand sides have been evaluated <a href="https://courses.csail.mit.edu/6.111/f2007/handouts/L06.pdf" rel="nofollow noreferrer">(See reference)</a></p> <p>Here I have created two test modules to verify this definition in Vivado 2022:</p> <pre><code>// module to test non-blocking module NonBlockingTest(D, Clk, Qa, Qb, Qc); input D, Clk; output reg Qa, Qb, Qc; always @(posedge Clk) begin Qa &lt;= D; Qb &lt;= Qa; Qc &lt;= Qb; end endmodule // module to test blocking module BlockingTest(D, Clk, Qd, Qe, Qf); input D, Clk; output reg Qd, Qe, Qf; always @(posedge Clk) begin Qd = D; Qe = Qd; Qf = Qe; end endmodule </code></pre> <p>And here is the test bench:</p> <pre><code>module NonBlockingTest_TB(); reg D, Clk; wire Qa, Qb, Qc; NonBlockingTest DUT_NonBlocking(D, Clk, Qa, Qb, Qc); BlockingTest DUT_Blocking(D, Clk, Qd, Qe, Qf); initial begin Clk = 0; D = 1; #50; Clk = 1; #50; Clk = 0; #50; Clk = 1; #50; Clk = 0; #50; Clk = 1; #50; Clk = 0; end endmodule </code></pre> <p>The result is not what I expected: <a href="https://i.stack.imgur.com/gz9bC.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/gz9bC.png" alt="enter image description here" /></a> Qa, Qb, Qc come from non-blocking assignment, yet they are executed sequentially.</p> <p>Qd, Qe, Qf come from blocking assignment, yet they are executed at simultaneously.</p> <p>From the meaning of the English word itself, it appears that &quot;=&quot; is the non-blocking assignment, while &quot;&lt;=&quot; is the blocking assignment.</p> <p>Am I interpreting the word 'blocking' incorrectly?</p>

Verilog Non-blocking and Blocking is logically confusing

2024-03-22T03:42:42.407

706948

|arduino|shift-register|

<p>In Arduino UNO the processor and all the I/O runs at 5V, connect the 74HC595 to the 5V pin of the Arduino instead of to the 3.3V pin.</p>

<p>I would like to control the columns of a keypad with shift register. The working prototype, using direct connection is here: <a href="https://www.tinkercad.com/things/gRSmEPcnCXZ-3x3-switches-matrix" rel="nofollow noreferrer">https://www.tinkercad.com/things/gRSmEPcnCXZ-3x3-switches-matrix</a> <a href="https://i.stack.imgur.com/Y4UVv.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Y4UVv.png" alt="arduino switch matrix" /></a></p> <p>I wanted to replace the column connections with a 74HC595 (the final design will use more switches) I took this as example for the wiring:</p> <p><a href="https://i.stack.imgur.com/7Ggmi.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/7Ggmi.jpg" alt="image from https://dronebotworkshop.com/shift-registers" /></a> and ended up <a href="https://www.tinkercad.com/things/89Cjn9FFESX-3x3-switches-matrix-with-shift-register" rel="nofollow noreferrer">this</a>:</p> <p><a href="https://i.stack.imgur.com/lXLTO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/lXLTO.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/Ez3v4.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Ez3v4.png" alt="enter image description here" /></a></p> <p>Can somebody please tell me what did I wrong? I know that the original design doesn't require the extra power, so I assume, I need to direct that away from the matrix somehow.</p> <p>edit: this is the schematics generated by TinkerCad: <a href="https://i.stack.imgur.com/MupgM.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MupgM.png" alt="enter image description here" /></a></p> <p>Edit: I connected the ic to the 5V pin, now, I get correct readings with low (10 Ohm) resistors, but also high current warnings too. As I increase the resistor values, inconsistent results.</p>

How to read switch matrix with 74HC595

2024-03-22T09:27:26.547

706949

|current|pcb-design|

<blockquote> <p>how will I know how much current will pass through if I set the GPIO to output high?</p> </blockquote> <p>As in Andy Aka's answer, this is in the datasheet. It <strong>should</strong> always in the datasheet, and it <strong>is</strong> almost always in the datasheet.</p> <p>For normal CMOS logic, from the perspective of an output pin, input pins look like capacitors to ground. When the logic level changes there's a small spike of current, then things settle down to a level of current that's usually negligible.</p> <blockquote> <p>In other words, how will I know the resistance of the pins</p> </blockquote> <p>For normal CMOS logic, modeling the pins as resistors probably isn't a good idea -- on the input side, any resistive effect is swamped by the capacitance at switching; on the output side, by the time you see the pin acting like a resistor you're pulling way more current from it than you should.</p> <p>You're better off looking at the data sheet. If the datasheet is reasonably complete it'll tell you the input currents at high and low logic levels, and the output voltage at zero current and the extremes of the recommended output current ranges.</p> <p>Note that logic chips, microcontrollers, memory chips and the like tend to be very well specified in this area, while specialty chips like sensors can be lacking. Usually when that happens it's best to treat them like logic that has high capacitance (on input) and low drive levels (on output) -- and perhaps build a test board and find out their limitations yourself.</p> <blockquote> <p>and when do I need a resistor in between?</p> </blockquote> <p>Almost never.</p> <p>You may need them if it's very fast I/O, to impedance match an output to a circuit board trace -- this is more rare today than it was 20 years ago, because manufacturers know how to build that into chips these days. If you're not dealing with switching speeds in the hundreds of MHz, or launching signals across feet of cable (or backplane), then you don't need to worry.</p> <p>You may need them to do level switching -- i.e., if you're driving a 5V output to a 3.3V part that isn't 5V tolerant, or some other, similar, unhappy voltage combination. Then you'd need to have a resistive divider (or, with certain older &quot;5V tolerant&quot; parts) a series resistor.</p>

<p>I am using a STM32F103C8T6 MCU to control a <a href="https://www.ti.com/lit/ds/slvsa73f/slvsa73f.pdf?ts=1711070175140" rel="nofollow noreferrer">DRV8825 chip</a> and it just occurred to me that I never considered how much current goes from the pin of the MCU to the pin of whatever chip I am using. For instance, if there is a MCU GPIO connected to a nENBL pin of the DRV8825, how will I know how much current will pass through if I set the GPIO to output high? In other words, how will I know the resistance of the pins and when do I need a resistor in between? How is setting a GPIO to output high different form a pullup resistor?</p>

Resistance and current of IO pins

2024-03-22T09:34:03.947

706951

|solar-energy|

<p>It is worth measuring the open circuit (i.e. no load) voltage of the panel where you want it to go. If you have a variable power supply you can then see if that's enough to start the fan. If it is, there are potential solution. The fan draws more current when stopped, causing the panel voltage to sag.</p> <p>If the open circuit voltage is high enough to start the fan, charging a capacitor directly off the panel, and switching on the fan only when the capacitor is charged. I have an idea that would be adequate for a hobby project, but for a product you'd need to protect it from undervoltage as well</p>

<p>So I have a 12 V solar panel and a fan (size of a PC fan, assume 12 V and 0.15 A) that if connected directly work great in a full sun. Its located in a shady environment and if I kick-start it with my hand - it will keep working until dark, but has trouble starting on its own when there is not enough light. I have another panel (approximately 65% less in size) also 12 V nominal and would like to add a second one.</p> <p>I assume, motor is not starting because there is not enough current generated by panel while in shade. At the same time, not much of a voltage too obviously.</p> <p>What I need advice on is: <strong>should I connect these panels in series or parallel?</strong></p> <ol> <li><p>If I connect parallel, voltage in shady environment would stay the same, but current may increase and that would be enough to start for the motor? Hopefully, in full light (direct sun), current won't exceed max for motor in the fan.</p> </li> <li><p>If I connect in series, (current same(?), voltage increase) in shady times, will have better voltage, more close to 12-16 V. Would it help the motor to start? In direct sun, voltage would go up to 24 V, so probably need voltage regulator to leave it around 12 V.</p> </li> </ol> <p>This is to help with vent underneath a deck and just for fun. Appreciate an advice or if I am missing something.</p> <p>Open circuit voltage - on full Sun is 12-14V and in shady 4-6V.</p>

PC fan, powering directly by small 12V solar panel - adding more panels to help working with less sun

2024-03-22T10:00:17.557

706967

|usb|usb-c|

<p>Receptacle is the socket or connector on the devices.</p> <p>Plug is the connector on the cables.</p> <p>You can plug the plug into the receptacle.</p>

<p>I am learning about USB Type with the help of <a href="https://www.allaboutcircuits.com/technical-articles/introduction-to-usb-type-c-which-pins-power-delivery-data-transfer/" rel="nofollow noreferrer">this material</a>.In that you can see that two figures Fig1 and Fig2 says <strong>USB Type-C receptacle and plug</strong>.</p> <ol> <li>May I know the difference between USB Type-C receptacle and plug.</li> </ol> <p>I think receptacle is the type-C connector(I am not sure,please confirm),but no idea about the plug.</p>

USB Type-C receptacle vs plug

2024-03-22T14:14:13.077

706980

|power-consumption|

<p>A battery at 100% is not still charging - that is what &quot;100%&quot; means; it's at fully charged capacity. For the rest of your questions, the answer is, yes, that device will measure the TOTAL current consumed by the device at a given point in time. NOT the individual device circuits. That information will have to be inferred by taking differences of current consumed in different modes as this device has no way to &quot;probe&quot; consumption by peripheral devices such as Bluetooth radios or speaker amplifiers. For those tech specs, you will need to contact the manufacturer.</p>

<p>I wanted to measure how much current a usb-c device (specifically, a reMarkable 2 Tablet, but this could apply to any device) draws when in use, so I bought one of these:</p> <p><a href="https://i.stack.imgur.com/pH5BF.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pH5BF.png" alt="enter image description here" /></a></p> <p>I hooked it up and got a value (about 480 mA). But then I started thinking, the device isn't at 100% charge, so would this be the current required to charge AND use the device, or can I not make that assumption, as I have no way to know how much is going to each function?</p> <p>Even if I charge this to 100%, I would presume it would still be charging to keep it at 100%, no? Or again, it depends on the circuit design.</p> <p>Would there be a better way to measure current usage? My goal is to determine how much current different &quot;modes&quot; of the device draw. For example, when wifi is on or off, or when it's in airplane mode, etc. without tearing it apart and putting an ammeter inline with the battery.</p>

Measuring how much current a tablet style device draws

2024-03-22T15:47:37.947

706988

|capacitor|capacitance|tantalum|

<p>Someone couldn't have been bothered to google &quot;greek mu letter&quot; and copy-paste it into the component properties in their EDA software, that's all there's to it.</p> <p>Or, perhaps said EDA software - likely costing very good money - was broken by design and wasn't Unicode capable.</p> <p>No, this was not done in KiCad, because KiCad's font looked quite differently until very recently, and because - surprise, surprise - it actually supported Greek alphabet just fine for quite some time now.</p>

<p>I was looking at a circuit online when happen that both in schematic and on the board I saw this tantalum capacitor with a value of 100mF.</p> <p>Now 100mF are 100000uF, It looks small for having such a capacitance?</p> <p>A part from the fact that I cannot find any type of such capacitor online, would be possible?</p> <p><a href="https://i.stack.imgur.com/h5DUS.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/h5DUS.jpg" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/O37is.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/O37is.jpg" alt="enter image description here" /></a></p> <p>I mean the yellow one there is 103nF...</p> <p><a href="https://i.stack.imgur.com/KOFys.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KOFys.jpg" alt="enter image description here" /></a></p>

100mF Tantalum Capacitor?

2024-03-22T16:46:12.660

706990

|power-supply|safety|

<p>Anything that charges a capacitor and does not discharge it will make the capacitor voltage drop very slowly.</p> <p>So yes, it might be normal, or it might not be. I suppose you received no specifications with the power supply how it should work.</p> <p>If you think this is a safety issue, you decide how long it is acceptable for the supply output to bleed out. But there will also be energy stored in the mains side, which is why it takes so long for the output to even start discharging without any load.</p> <p>You could add a circuit or relay to discharge it faster, but it will also discharge faster when you do have some load there.</p> <p>Also, don't short the output deliberately. It's not safe. And you can't get that jolt through your body, not at 48V DC, that's perfectly safe to touch. If you trust the cheap unbranded mystery power supply to even be able to pass the safety regulations of your jurisdiction to begin with.</p> <p>Do not to wire main AC with the DC bleed resistor. Switching them with the same switch is a hazard if the switch breaks. Another hazard is that if you think the one switch pole cuts the live wire, it does no provide safety if someone has wired your socket wrong and has live and neutral swapped. That might be rare. In countries with unpolarized mains plugs, either wire can be live or neutral, so it would be unsafe to switch only one mains wire and for safety always both wires are treated like live and both are switched.</p>

<p>When I unplug my 48V/1200W switching power supply, with no load, it reads a full 48V at the output for 5 seconds before there is a &quot;click&quot;, and the voltage starts to drop. It takes another 30 seconds to reach 24V at the output, in a long slow bleed.</p> <p>Is this safe and normal? Or is this power supply poorly designed and unsafe?</p> <p>If this is normal, are there safety improvements I can make around it? I was thinking of adding an external fast bleed resistor on the outputs. I could switch that on one side of a DPDT switch that also switched the line wire from the input, choosing one of those to be connected at a time. That leaves the neutral wire unswitched, but I gather that is acceptable. An alternative is adding my own always-on bleed resistor, but it seems I will need several watts to make any meaningful difference in the decay time.</p> <p>For context, I am a mechanical engineering student trying to power a robot motor for a project. The motor drive peaks at 48V/1000W, so I've tried to find a supply to suit that. I bought a <a href="https://rads.stackoverflow.com/amzn/click/com/B0C591QLNR" rel="nofollow noreferrer" rel="nofollow noreferrer">very cheap mystery brand off of Amazon</a> that is 48V/1200W. I've wired it up to a 3-prong pigtail to my US standard plug. It does, indeed, deliver 48V. So far I haven't hooked it up to any meaningful load; just turned the supply on. I know these kinds of supplies are intended to be built into other machines that can render it safe for the user... but I have a hard time imagining a machine that is okay with 30 seconds to turn off. I made a pretty big spark when I experimented with shorting the output, making me think that I would not enjoy that shock through my body.</p>

What's normal/safe behavior for a 48V/1200W switching power supply?

2024-03-22T17:08:28.893

706992

|battery-charging|terminal|

<p>Barrel jacks have two concentric conductors. There is a center &quot;hole&quot; with one conductor inside, and an outer &quot;sheath&quot; with a second conductor. (Note the black plastic ring separating the inner and outer conductors of the barrel.) Either one could be positive or negative, depending on the connector's polarity.</p> <p>Helpfully, the polarity is marked on the brick with a <em>polarity symbol</em>. You can find out all about polarity symbols on <a href="https://en.wikipedia.org/wiki/Polarity_symbols" rel="nofollow noreferrer">Wikipedia's article on polarity symbols.</a></p> <p>In this case, your power brick is labeled as center-positive. The connector on the inside of the barrel will have a higher voltage than the connector on the outside. Center-positive is, in my experience, the orientation of the vast majority of DC barrel jacks.</p> <p>The barrel-to-screw-terminal adapter likely also follows the center-positive convention, but we can't know for sure just by looking at your picture.</p> <p>To be 100% certain, just get out your multimeter and measure the voltage across the screw terminals (with the power supply plugged in). Put your red lead on the terminal labeled (+) and the black (common) lead on the terminal labeled (-). The voltage will either read positive or negative; if it's negative, your adapter is actually center-negative and thus the connections are reversed.</p>

<p>I have an adapter with a circluar plug, then a positive and negative terminal. How does the adapter (the green piece in the picture below), which can be in any rotational orientation maintain positive and negative terminals?</p> <p>Here is an image of what im trying to describe: <a href="https://i.stack.imgur.com/bE8HF.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/bE8HF.png" alt="enter image description here" /></a></p>

How do positive/negative terminals work in a circular plug-in adapter?

2024-03-22T17:21:24.787

706993

|transistors|led|microphone|

<p>There are two 100 nF caps in the schematic. This is why reference designators are so important.</p> <p>Probably, the one in the question is the <em><strong>coupling</strong></em> capacitor (sometimes called a blocking capacitor, but that is not as descriptive a term in this application). This is <em>not</em> a bypass capacitor. The microphone element output is a small audio signal sitting on about 2.5 V of DC. This DC level would cause the first transistor (reference designators - !) to be saturated on continuously, so the LEDs never would light.</p> <p>Ignoring the audio for the moment, when the circuit is powered up there is approx 2.5 V on the cap's left side. The transistor is biased on through the 1 M resistor, so the transistor base is sitting at approx. 0.6 V. Adding the audio, any audio negative peaks greater than about 0.4 V will turn off the transistor. Now the 5K resistor can pull up the four output transistor bases and there shall be light.</p> <p>Note that there is no reason for the 5 V regulator in this circuit. If you double the value of the microphone bias resistor, it can be connected directly to the 9 V source.</p> <p>Also, you can cut the circuit's current draw in half by having only two output transistors, and putting two LEDs in series for each transistor, and reducing the value of the LED current-limiting resistors. Overall, not an optimized circuit design.</p> <p>BTW, your questions sound a lot like schoolwork. Next time, say that in the question so we know how to respond.</p>

<p>I have some questions about sound activated LED ciurcuits. <a href="https://i.stack.imgur.com/x57rs.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/x57rs.jpg" alt="enter image description here" /></a></p> <p>Q1) How do LEDs turn on and of in this circuit?</p> <p>My answer: &quot;The condenser microphone consists of a capacitor and a resistor. When sound is produced, the capacitance changes as the diaphragm vibrates, and the voltage applied to the resistance inside the microphone changes. This changes the base voltage of transistor Q1, and as a result, when the base voltage increases, a current flows between the emitter and the collector. This in turn increases the base voltage between Q2 and Q4, and the LED turns on as a current flows through the transistor emitter and collector.&quot;</p> <p>Q2)</p> <p>a) How to calculate the internal resistance of the microphone, where Vm = 2.5V?</p> <p>My answer: &quot;From left voltage regulator and microphone parts, Ri can be calculated by voltage divider rule. Vm = 5 * Ri/(Ri+Rm) -&gt; Ri = VmRm/(5-Vm) = (2.5 * 10k)/*(5-2.5) = 10kohm&quot;</p> <p>b) How to calculate the Rm(resistance of 10kohm), if the microphone is connected directly to 9V voltage without LM78L05.</p> <p>My answer: &quot;By using voltage divider rule, Vm = 9 * Ri/(Ri+Rm) -&gt; Rm = (9-Vm)*Ri/Vm = 26kohm</p> <p>Q3) What is the role of the capacitor 100nF between the microphone and the transistor 2N2222(Q1) in the circuit?</p> <p>My answer: ?</p> <p>I don't understand why 100nF is necessary</p> <p>Please let me know if there's something wrong....</p>

Sound activated LED

2024-03-22T17:21:47.430

706994

|led|raspberry-pi|555|

<p>You could also use a flashing LED as a simple flash circuit and bypass it with the GPIO after startup.</p> <p><img src="https://i.stack.imgur.com/XN6iJ.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fXN6iJ.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p>

<p>I would like to flash an LED when my 5V power supply is turned on to indicate my Raspberry Pi is booting. Then, when booted and my application is running, I'd like to make a GPIO high (or low) and have the same LED constantly illuminated. This would indicate the system is ready for us.</p> <p>The Raspberry Pi will be in a case and the would be no other way for a user to determine it is ready to use.</p> <p>So far, I've made a simple 555 circuit to flash the LED but can not work out where I can add a transistor to be controlled by GPIO to either bypass the 555 or change the R1 or C1 values so the flash rate is 1kHz or more and so imperceivable.</p> <p>Is there a simple addition I can make to the circuit below to achieve this?</p> <p><a href="https://i.stack.imgur.com/sAcXt.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sAcXt.jpg" alt="555 timer schematic" /></a></p>

Flashing an LED while Raspberry Pi boots, then illuminate constantly via GPIO

2024-03-22T17:23:39.130

707002

|amplifier|audio|signal|impedance|

<p>You are short circuiting two outputs together. Or rather, mixing them with resistors.</p> <p>If they both have 100 ohm output impedance, the output from each device is halved because the output amplifier is driving a 100 ohm load through 100 ohm source impedance.</p> <p>Whem phone output is paused, the output amplifier is disabled and then the other amplifier can drive the input directly instead of there being an extra load from the output impedance.</p>

<p>I have two audio signals leading to the amplifier input: the first one comes from the preamplifier, the second one from the audio output of a smartphone/tablet device. Both have a resistor and a capacitor in series for DC blocking as shown below: <a href="https://i.stack.imgur.com/wDkhD.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/wDkhD.png" alt="Mixer" /></a></p> <p>When the MP3 input from the smartphone is not connected, or when the player is paused, the preamplifier works correctly. However, when MP3 playback is started, the volume of the preamp is attenuated, then returns to the original level after about 5/10 seconds when the MP3 playback is paused. As a result, there is an instant jump in the preamp volume, which is approximately half of the initial volume to the ear. The 5-second delay should be due to the smartphone amplifier going into powerdown.</p> <p>What is causing this phenomenon and how can I correct it? Are the impedances not balanced correctly? I found a decent balance with R38 10Ω and R39 470Ω, but it doesn't sound good, some brightness of the sound is lost, and there is definitely a more correct approach to balancing the signals.</p> <p>Does this phenomenon have a common name? I would like to better understand why this happens, but not knowing what to look for, I couldn't even do research. Thank you.</p> <p>RIN+ input impedance 20K Maximum output current of Preamp 50mA</p>

Why does the volume of the preamplifier change when a second audio signal is mixed?

2024-03-22T18:09:23.260

707003

|analog|bjt|simulation|multisim|power-amplifier|

<blockquote> <p><em>then to compare the phase, the sample is going down then sudden increase, then going down again, whereas in my simulation, the phase is just going down.</em></p> </blockquote> <p>The graph jumps from -180° to +180° and although this looks like a discontinuity it isn't. Think about it for a while: -</p> <p><a href="https://i.stack.imgur.com/IXX7b.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/IXX7b.png" alt="enter image description here" /></a></p>

<p>I just did a simulation in Multisim of a class-A power amplifier, but the phase graph of the AC sweep (AC analysis) is not what I expected.</p> <p>With the reference circuit diagram, I simulated the circuit in Multisim 14.3, and got the AC analysis. Then when I compared it with the sample AC analysis, the magnitude had a similar half circle dome shape, although my result is flatter. Then I compared the phase; the sample is going down then sudden increases, then goes down again, whereas in my simulation, the phase is just going down.</p> <p>I also searched and watched a <a href="https://www.youtube.com/watch?v=By2d-sa4ybs" rel="nofollow noreferrer">YouTube video</a> titled <em>Simulation of Class A Power Amplifier Using Multisim</em>. In the video the circuit is similar, just different values of the RC components and the AC voltage. The AC analysis also had a half-dome shaped magnitude and the phase is similar to the sample AC analysis with a sudden increase in the middle.</p> <p>I don't know much about power amplifiers, just the AC-DC load line, quiescent power, etc. I don't know anything about the sudden change in phase and the magnitude values. Can someone try to explain about the varying results and the theory behind these?</p> <p>Reference circuit diagram: <a href="https://i.stack.imgur.com/KgFGV.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KgFGV.png" alt="Reference circuit diagram" /></a></p> <p>My simulated class-A amplifier in Multisim: <a href="https://i.stack.imgur.com/6L6iC.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6L6iC.jpg" alt="My simulated Class A amplifier in Multisim" /></a></p> <p>Sample simulation AC analysis: <a href="https://i.stack.imgur.com/1kx6J.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1kx6J.jpg" alt="Sample simulation AC analysis" /></a></p> <p>My AC analysis of the class-A amplifier in Multisim: <a href="https://i.stack.imgur.com/MWMeK.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MWMeK.jpg" alt="My AC analysis of the Class A amplifier in Multisim" /></a></p> <p>YouTube simulation of class-A amplifier in Multisim: <a href="https://i.stack.imgur.com/5uf4u.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5uf4u.jpg" alt="YouTube simulation of Class A amplifier in Multisim" /></a></p> <p>YouTube simulation AC analysis: <a href="https://i.stack.imgur.com/Hp2lj.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Hp2lj.png" alt="YouTube simulation AC analysis" /></a></p>

Class-A power amplifier magnitude and phase

2024-03-22T18:13:31.300

707018

|led|

<p>Magnet wire is safe. Just not durable. 16AWG is appreciably overkill but will certainly work technically and safely.</p>

<p>Thank you all for the prior advise on what LED to use with my sculpt!! <a href="https://imgur.com/a/3ePBHQ5" rel="nofollow noreferrer">Here is a pic</a>I ended up using this <a href="https://rads.stackoverflow.com/amzn/click/com/B01CUGACUO" rel="nofollow noreferrer" rel="nofollow noreferrer">LED</a> I hung the sculpt and lit it with this magnet <a href="https://rads.stackoverflow.com/amzn/click/com/B07NYCCVR7" rel="nofollow noreferrer" rel="nofollow noreferrer">Wire</a> and now I want to enlarge the thickness of it (looks too thin). Can I safely use something like 16 gauge wire with this LED (with 2 aaa batteries)? Also Is the Magnet wire safe to use if lit all day? Thanks for the help on my first LED project!</p>

What wire gauge for my LED lit sculpture?

2024-03-22T19:31:00.470

707026

|transistors|voltage-regulator|kirchhoffs-laws|calculation|

<p>You say you want high efficiency, and 5V output at 1A, with 2S lithium pack.</p> <p>These are not going to happen with a linear regulator like HT7850 LDO.</p> <p>The lithium pack will be at 8.4V when fully charged, and maybe somewhat below 6.0V when empty.</p> <p>With a full pack, you need to drop 3.4V at 1A, which means, to get 5W out at 5V and 1A, you are feeding in 8.4W at 8.4V and 1A. You are thus wasting 3.4W as heat, which is a lot. And the efficiency is terrible 59%.</p> <p>With a switch mode regulator, the excess voltage is not wasted into heat and you can expect 90% or better efficiency.</p>

<p>I'm designing my first PCB and I'm not sure if the diagram I found on a datasheet is complete. For what I have read, there should be a resistor between R1 and the transistor Tr1. I have followed <a href="https://electronics.stackexchange.com/a/213538/360781">this</a> answer but I'm having trouble knowing what Vin should be. The circuit is the following: <a href="https://i.stack.imgur.com/zO3lO.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/zO3lO.png" alt="Circuit" /></a></p> <p>It's directly from the HT78XX datasheet. My intentions are to power this circuit with 2 18650 batteries so VIN should be approximately 7.4 V. For current output I'm aiming to get 1 A max. Using the R1 formula below the image I get 1.4 Ω (@IREG = 500 mA, Ic1=500 mA) which is enough to get the 0.7 V needed to activate the transistor. So, if I were to use Kirchhoff's voltage's law: VBC = VIN(HT78XX) - VOUT = 2.4 V aprox.</p> <p>=&gt; Rb = (2.4-0.7)/0.0024 = 708 Ω</p> <p>Is this correct?</p> <p>Also, if anyone has a recommendation for an alternative to this circuit, it is much appreciated. I need to get 5 V, 1 A with a low Iq voltage regulator.</p> <p>I intend to use the HT7850 voltage regulator and FMMT549 transistor.</p> <p>Any extra recommendations are welcome.</p>

How to calculate current limiter resistor when voltage regulator is involved?

2024-03-22T20:29:43.813

707029

|resistors|surface-mount|watts|failure|

<p>I have 3 different batch of resistors (10k 0805 SMD) which all fail the same way. I am supplying 5V across the resistor, with an ammeter connected in series. For the first hour or so everything go as expected (current is 5V/10k=0.5mA) after that the current start to increase fluctuating, and if I cut the power and measure the resistor, it has less resistance.</p> <p>For the specific setup I thought that 0805 resistors are 1/10W so I thought it was ok (0.0005*5=0.0025W.)</p> <p>What is the problem here? Has anyone seen this before?</p>

Resistors lose resistance after a while

2024-03-22T20:39:03.640

707032

|usb-pd|

<p>USB-PD allows for one voltage.</p> <p>You can make any voltages you want yourself from that one voltage.</p>

<p>I haven’t been to stack overflow in a loooong time, it’s nice to be back!</p> <p>I was just wondering if USB Power Delivery can provide multiple different voltages simultaneously… say, 5V &amp; 9V, on two different rails.</p> <p>If not, could someone please point me in the right direction to figure out how to make a custom circuit to get the voltages/amps I need?</p> <p>Thanks so much for any help in advance!</p> <p>Hope everyone is having fun with their electronics projects!</p>

USB PD multiple voltages simultaneously

2024-03-22T20:55:41.733

707040

|switches|identification|components|

<p>Looks like a vibration switch similar to <a href="https://images.100y.com.tw/pdf_file/50-XXW-2030.pdf" rel="nofollow noreferrer">these</a>: <a href="https://i.stack.imgur.com/ik6Ya.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ik6Ya.png" alt="enter image description here" /></a></p>

<p>One way I am learning about electronics is to try to analyze the function of random small circuit boards that I come across. I found a device with a component labeled SW2, so likely it’s a switch. It’s the grey cylindrical component with gold endcaps in the attached picture.</p> <p>I don’t understand how it can function as it appears to have no visible way to alter the switch setting. Is it some kind of reed switch? Has it been mislabeled and really it is something else?</p> <p><a href="https://i.stack.imgur.com/sI94C.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sI94C.jpg" alt="closeup of electronic component" /></a></p>

What kind of switch is this surface mount component with no actuator?

2024-03-22T22:49:20.423

707041

|usb|

<p>Maybe a lie (or the cable is faulty/damaged). The cable has to have a chip in it (and AFAIK the type A is also non-standard).</p> <p>Consider <a href="https://www.ebay.de/itm/395092863411" rel="nofollow noreferrer">this</a> Xiaomi 120W rated charger with a USB-A to USB-C. There's a 6A rated cable and the device can negotiate 20V.</p> <p>For more than 3A the chip is required or the power supply should not deliver the current. Without the chip the limit would be 3A at 20V or 60W.</p>

<p>I have a Xiaomi phone that shows 3 options when connecting the charger: Charging, Fast Charging and Turbo Charging. (Not sure which wattage is each one)</p> <p>I have a fast charger that when I use a USB-C - USB-C it shows Turbo Charging.</p> <p>I bought a Baseus USB-A - USB-C cable with 100W. But when I use in the same fast charger it shows only fast charging. I did some resource and the USB-A has very limited power output.</p> <p>I also tested charging a drone battery, with the C/C it charges fast but the A/C charges slowly.</p> <p>Is this 100W a lie?</p>

USB-A - USB-C cable with 100W

2024-03-22T23:02:20.513

707051

|flipflop|time|skew|

<p>Given the following circuit: <a href="https://i.stack.imgur.com/kwnL1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kwnL1.png" alt="" /></a></p> <p>I was told that the minimum clock period would be the sum of the setup time plus the propagation delay plus the clock skew for a positive clock skew. I was wondering as to why we add the clock skew to the time period when it is positive because a positive clock skew would only decrease the time the value of QA can be held. Don't we just have to check if the propagation delay is greater than the hold time plus the time skew? How does adding the clock skew solve any issues?</p>

Why do we add the positive clock skew to the minimum clock period?

2024-03-23T00:35:45.807

707055

|power-supply|current|

<p>The alternator voltage is rectified obtaining a double half-wave which is then capacitively filtered so the resulting voltage is composed of a direct component plus a ripple. Assuming that the voltage produced by the generator is continuous, examination of the circuit gives the following results:</p> <p><a href="https://i.stack.imgur.com/ssZ1h.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ssZ1h.png" alt="enter image description here" /></a></p>

<p>In a parallel circuit consisting of a 14V, 150A alternator maintaining a fully charged 12V, 800 CCA battery - How do I calculate how much current the alternator provides and how much current the battery provides if I put on a <code>.12 ohm</code> load?</p> <p><strong>Clarification</strong></p> <p><code>.12 ohm</code> load for 5 seconds for testing purposes.</p>

How to calculate current sharing between two different voltage souces in a parallel circuit?

2024-03-23T01:38:37.273

707060

|mosfet|mosfet-driver|gpio|solid-state-relay|logic-level|

<p>No, you can't use these level shifters to drive a 180mA pump even if you manage them to put in right configuration. The shifters, per descriptions, use <a href="https://cdn-shop.adafruit.com/datasheets/BSS138.pdf" rel="nofollow noreferrer">BSS138</a> N-FETs. The FETs have 6 Ohm Rds_on even if driven by 4.5V. As such the transistor will dissipate about 200mW, and the tiny SOT-23 case will likely overheat and burn out.</p> <p><a href="https://i.stack.imgur.com/f0GBe.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/f0GBe.png" alt="enter image description here" /></a></p> <p>You will need to use a beefier MOSFETS, or see Dave's recommendation regarding the use of ULN2001 IC, it even has all necessary clamping diodes.</p>

<p>In order to use a GPIO pin to drive a 180 mA mini water pump, the GPIO pin needs to switch a MOSFET or an Optocoupler because it can't safely do 180 mA.</p> <p>I want to run 16 low-current pumps from 16 GPIO pins. I'll only be running one pump at a time, because the pumps will be powered by the same Li-ion battery as the GPIO device.</p> <p>Can I use one of those 4- or 8-channel 3.3 V to 5 V logic level converters as mini relays? They are quite cheap and easy to handle. They are made by <a href="https://www.adafruit.com/product/757" rel="nofollow noreferrer">Adafruit</a>, <a href="https://www.sparkfun.com/products/12009" rel="nofollow noreferrer">SparkFun</a>, and there are even 8 channel ones such as <a href="https://rads.stackoverflow.com/amzn/click/com/B01CZVZ3US" rel="nofollow noreferrer" rel="nofollow noreferrer">this</a> and <a href="https://rads.stackoverflow.com/amzn/click/com/B088TSY1MN" rel="nofollow noreferrer" rel="nofollow noreferrer">this</a>. The only problem is that I'll be using the same voltage for the high and the low side.</p> <p>Alternatively I can use a <a href="https://www.sainsmart.com/products/2-4-8-ch-5v-solid-state-relay" rel="nofollow noreferrer">dedicated solid state relay boards</a>, but those are very heavy-duty and I prefer something lightweight.</p>

Can I use GPIO logic level converters as tiny low-current solid state relays?

2024-03-23T03:28:38.133

707073

|transistors|circuit-analysis|bjt|thevenin|

<p>Let me provide a different way of looking at it. It may be simpler to see your question with regard to <span class="math-container">\$R_1\$</span> and <span class="math-container">\$R_2\$</span> using math.</p> <p>Let's keep the BJT base current in place and assume that it is some unknown value called <span class="math-container">\$i_{_\text{B}}\$</span>. Let's consider the inward injection of a very tiny current called <span class="math-container">\$i_{_\text{0}}\$</span>. The KCL for your blue node, call it <span class="math-container">\$v_{_\text{X}}\$</span>, is then:</p> <p><span class="math-container">$$\frac{v_{_\text{X}}}{R_1}+\frac{v_{_\text{X}}}{R_2}+i_{_\text{B}}=\frac{v_{_\text{CC}}}{R_1}+\frac{0\:\text{V}}{R_2}+i_{_\text{0}}$$</span></p> <p>or, solving for <span class="math-container">\$v_{_\text{X}}\$</span>:</p> <p><span class="math-container">$$v_{_\text{X}}=\underbrace{v_{_\text{CC}}\cdot \frac{R_{2}}{R_{1} + R_{2}}}_{\text{quiescent DC voltage}}+i_{_\text{0}}\cdot\underbrace{\frac{R_{1} R_{2}}{R_{1} + R_{2}}}_{\text{what }i_{_\text{0}}\text{ sees}} - i_{_\text{B}}\cdot\underbrace{\frac{ R_{1} R_{2}}{R_{1} + R_{2}}}_{\text{what }i_{_\text{B}}\text{ sees}}$$</span></p> <p>There are three terms there. The first term is just the usual voltage divider result. The second and third terms are how the injected and base currents affect the result. These last two currents each see what appears to be the standard <strong>parallel resistor</strong> equation.</p> <p><em>(You can also disconnect the base current -- set it to zero -- and this simpler equation still shows the parallel combination of <span class="math-container">\$R_1\$</span> and <span class="math-container">\$R_2\$</span> applied to <span class="math-container">\$i_{_0}\$</span>.)</em></p> <p>Another viewpoint that is often suggested is that the impedance of a voltage supply is zero. So <span class="math-container">\$v_{_\text{CC}}\$</span> <em>connects</em> to ground with zero impedance. And therefore <em>looks like</em> a wire. You could imagine that <span class="math-container">\$v_{_\text{CC}}=0\:\text{V}\$</span> and then you would <em>know</em> that it is a wire. But if <span class="math-container">\$v_{_\text{CC}}\$</span> is any other fixed value, that makes no difference to this viewpoint. It's all the same. The voltage supply looks like a wire.</p> <p>But the equation makes this equally clear in a different way.</p>

<p>I don't understand why R1 and R2 are in parallel.</p> <p>I need to find the Thévenin resistance of the circuit, and my textbook says that R1 and R2 are in parallel, but I don't understand why.</p> <p><a href="https://i.stack.imgur.com/yZZ4p.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yZZ4p.png" alt="enter image description here" /></a></p> <p>I really struggle with identifying when resistors are in parallel, and a useful technique I created for myself was by colouring the wires connected to each end. Here's an example:</p> <p>Since both ends of the resistors have the same coloured connections, I can see they are clearly in parallel configuration:</p> <p><a href="https://i.stack.imgur.com/9y2po.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/9y2po.png" alt="enter image description here" /></a></p> <p>But when I do this for the BJT circuit above, I get the following, which makes it seems like they are not in parallel:</p> <p><a href="https://i.stack.imgur.com/l0KC4.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/l0KC4.png" alt="enter image description here" /></a></p> <p>Is it because VCC is connected to the same ground node below, so when it is shorted for Thévenin resistance, it forms the following?</p> <p><a href="https://i.stack.imgur.com/uki12.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/uki12.png" alt="enter image description here" /></a></p>

BJT four-resistor bias circuit analysis, parallel resistors

2024-03-23T07:27:50.923

707082

|circuit-analysis|battery-charging|lithium-ion|bms|

<p>There are two groups of paralleled MOSFETs; the left group and, the right group. Together they form (in effect) a bidirectional switch so that: -</p> <ul> <li>the associated battery can be disconnected from a charge circuit (when full)</li> <li>the associated battery can be disconnected from a load when deemed out of charge</li> </ul> <p>Here's an example of back-to back MOSFETs that are basically doing the same thing as your circuit: -</p> <p><a href="https://i.stack.imgur.com/Qj8xz.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Qj8xz.png" alt="enter image description here" /></a></p> <p>The image comes from <a href="https://media.monolithicpower.com/mps_cms_document/h/o/how-to-design-a-battery-management-system_r1.0.pdf?_gl=1*ftw2gd*_ga*MTIwMzI0NjgyNC4xNzExMTg3OTkx*_ga_XNRPF6L9DD*MTcxMTE4Nzk5MS4xLjEuMTcxMTE4ODAxMC40MS4wLjA.&amp;_ga=2.252453513.1067361962.1711187997-1203246824.1711187991" rel="nofollow noreferrer">How to Design a Battery Management System (BMS)</a>.</p> <p>As for other circuit components, this would likely require a complete simulation to determine what they do in all circumstances. And, the trouble with the circuit in question is that it doesn't appear to have any provenance because it comes from a site that appears to have acquired the schematic through reverse engineering. So, I suggest you simulate the circuit.</p> <ul> <li>However, Q7, Q8 and Q9 do appear to be controlling the on-off state of the MOSFETs mentioned earlier.</li> </ul>

<p>Can somebody help me figure out what the circuit in the red box does?</p> <p>What is the purpose of the six FETs and how do they behave once P- is connected to the negative supply voltage?</p> <p>What is the purpose of Q7 and Q8 and what function does it serve?</p> <p>What is the purpose of Q9 as well and what purpose does it serve?</p> <p>In addition, what is the overall functionality of these components as a whole?</p> <p>The image is taken from this <a href="https://320volt.com/en/bms-3s-25a-circuit-diagram-modified/" rel="nofollow noreferrer">website</a>.</p> <p><a href="https://i.stack.imgur.com/5nVMF.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5nVMF.png" alt="enter image description here" /></a></p>

BMS 3S 25A circuit diagram explanation

2024-03-23T09:23:05.597

707093

|555|trigger|monostable|

<p>Try something like this:</p> <p><img src="https://i.stack.imgur.com/KVZtD.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fKVZtD.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <p>That probably should be close to what you want, I think, without using two 555s.</p> <p>Here's a simulated output:</p> <p><a href="https://i.stack.imgur.com/7iUir.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/7iUir.png" alt="enter image description here" /></a></p> <p>I used a couple of button presses (red) during the first output pulse. You can see that it doesn't re-trigger and just holds the correct output time (green.)</p> <p>In the second period starting at <span class="math-container">\$5\:\text{s}\$</span> there is a long-press used that exceeds the output period. But as you can see the correct output time is still maintained.</p> <p>It's just a simulation. It's not proof. And I didn't think too long about it. So I may have missed an important detail, too. But this is about where I might go with your circuit as a first step in the right direction.</p> <p><em>(Note: I didn't actually use a <strong>clean</strong> switch in the simulation. I used a very <strong>bouncy</strong> switch that was set to bounce randomly for about <span class="math-container">\$25\:\text{ms}\$</span>, which is probably even worse and longer than reality. So I did try to make this closer to a worst-case switch input.)</em></p>

<p>So, I have a 555 Timer in Monostable Mode, like below. I used a 47uF cap and a 47K resistor for the C and R. I press the trigger switch button and let go, and the output goes high for roughly 2.5 seconds, and then goes low. Just as would be expected.</p> <p>Is there a way to make it so that when I press and hold down the trigger switch, but do not release it, that it outputs 2.5 seconds, and then goes low?</p> <p>And if I let go of the trigger button and press it again, it starts over again?</p> <p><a href="https://i.stack.imgur.com/8YdOS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8YdOS.png" alt="enter image description here" /></a></p> <p>Image from <a href="https://www.allaboutcircuits.com/tools/555-timer-monostable-circuit/" rel="nofollow noreferrer">https://www.allaboutcircuits.com/tools/555-timer-monostable-circuit/</a></p>

555 Monostable Mode Press and Hold Trigger

2024-03-23T12:06:22.523

707097

|power-supply|transformer|power-electronics|switch-mode-power-supply|

<p>Generally, switchmode transformers are custom made for a given manufacturer and product. If you are making a single unit, your best bet is to buy a product that already does what you want (48V/30 A power supply from 230 VAC) and pull the transformer from it.</p> <p>(Then, again, if you do buy such a power supply, what would be the point of designing your own?)</p>

<p>I am designing a 48V/30A power supply from 230VAC using 2 switch forward topology, I am in need of a transformer for this purpose, I have searched all the possible websites for it(DigiKey, Mouser, Coilcraft, Würth Elektronik etc) but was not able to find any. Is winding my own coil the only option or there are sellers who sell high power transformers?</p>

Where can I buy high current smps transformers?

2024-03-23T12:42:24.377

707100

|voltage|mosfet|diodes|sepic|

<p>An assumed value suffices. The particular solutions to these equations aren't important, as the real circuit will vary due to component values, supply and load conditions, and a controller is used to adjust PWM or peak current as needed. Only a ballpark solution is needed, and for that, we can assume a typical voltage for D1, such as 0.5V (schottky) to 1.1V (PN diode), or sometimes more (high voltage, fast-recovery PN diodes can drop up to a couple volts).</p> <p>An assumed value is particularly useful, as otherwise we need to solve a transcendental equation (that is, one where the variable is an exponential function of itself), which can only be approximated numerically. But an exact solution is neither meaningful nor useful here. To reach such accuracy overall, we would also need to account for resistance and other parasitic elements of all components, and more exactly model the switching edge. Parameters we don't even have yet, and would prefer to ignore -- instead assuming they are zero, and later choosing components that meet this assumption.</p> <p>Note that the two equations always have Vout + Vd together: the effect is simply as though the output were elevated. D1 is in series with R1 and C2, after all.</p> <p>To illustrate, consider the case for Vd = 0, 0.5, 1.1 and 2:</p> <p><span class="math-container">$$ I_\text{L1(pk)} = I_\text{OUT} \frac{V_\text{OUT} + V_\text{D}}{V_\text{IN(min)}} \left( 1 + \frac{40\%}{2} \right) $$</span></p> <p>If we take the middle case (15V Vin(min), 25V out, 25W = 1A out), we get I_L(pk) of 2.0, 2.04, 2.088 and 2.16A, a range widely exceeded by Vin and Iout ranges; it suffices to take the min/max results to select components.</p> <hr /> <p>For posterity, this list is easily generated in most PC browsers, by pressing F12 (dev tools), select console tab, and entering this code. Standard disclaimers of running untrusted code apply.</p> <pre><code>IL1 = function(Iout, Vout, Vd, Vinmin) { return Iout * (Vout + Vd) * (1 + 40/100 / 2) / Vinmin; } VdList = [0, 0.5, 1.1, 2]; ILList = []; VdList.forEach(x =&gt; ILList.push(IL1(1, 25, x, 15))); console.log(ILList) </code></pre>

<p>I am in the process of selecting a MOSFET for a SEPIC. I require Vd in order to calculate the peak currents across the inductors, which are ultimately needed to calculate the MOSFET peak current, with Vd also being required for the RMS current (associated equations will be provided below). Is there a general equation for calculating Vd for a MOSFET and how do I do so?</p> <p><strong>Additional Circuit Info:</strong></p> <p>➢ Vin = 15V - 35V</p> <p>➢ Vout = 25V</p> <p>➢ Output voltage ripple 1% peak to peak</p> <p>➢ Switching frequency 100 kHz</p> <p>➢ Load 10W - 50W</p> <ul> <li>Converter operates in continuous mode.</li> </ul> <p><a href="https://i.stack.imgur.com/PIgsK.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/PIgsK.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/qRCeQ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/qRCeQ.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/r6isf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/r6isf.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/H0xko.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/H0xko.png" alt="enter image description here" /></a></p>

How to calculate diode forward voltage (Vd) for a MOSFET within a SEPIC?

2024-03-23T12:59:17.523

707101

|stm32|current-source|dac|signal-generator|

<p>Your MCU (STM32L476) is able to do that by its onboard DAC and external opamp. Your DAC is able to run up to 10Msps</p> <p><a href="https://www.st.com/resource/en/application_note/an4566-extending-the-dac-performance-of-stm32-microcontrollers-stmicroelectronics.pdf" rel="nofollow noreferrer">https://www.st.com/resource/en/application_note/an4566-extending-the-dac-performance-of-stm32-microcontrollers-stmicroelectronics.pdf</a> )</p> <p>You have to disable internal DAC buffer (too slow for your specs) and add external opamp, which you can connect as current source. Comparison of slew rate (and settling time) of internal and external buffer (there LMH6612) you can see for example there:</p> <p><a href="http://mcu.cz/images/newspost_images/40/88/step2.png" rel="nofollow noreferrer">http://mcu.cz/images/newspost_images/40/88/step2.png</a> <a href="http://mcu.cz/images/newspost_images/40/88/step5.png" rel="nofollow noreferrer">http://mcu.cz/images/newspost_images/40/88/step5.png</a></p> <p>looks that can meet your specs.</p>

<p>I am designing a PCB on which I need to generate an arbitrary current waveform. The maximum current output is (-+6 uA), resolution &gt;=8 bit, fast settling &lt;=0.1 us, sampling rate &gt;=5 MHz. I couldn't find a commercial IC with these specs; if you know one, please suggest it. Otherwise, I may use a voltage DAC with a V2I converting stage. However, I could not find two commercial parts that could satisfy the specs together. Please suggest any IC that can fulfill my specifications. Also, other solutions are very welcome. Note: I am using an STM32L476 MSU in he same PCB, However its V-DAC settels in us range.</p>

Current DAC/current wave-form generator

2024-03-23T12:59:43.830

707110

|circuit-analysis|circuit-design|power-electronics|

<p>The answer will become clear when you realize that the source and load resistance form a 2-resistor voltage divider.</p> <p><img src="https://i.stack.imgur.com/08XoF.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2f08XoF.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <ul> <li>In the first case, the load resistance is the bottom resistor.</li> <li>In the second case, the source resistance is the top resistor.</li> </ul> <p>That's why they have opposite effects:</p> <ul> <li>Decreasing the load resistance decreases the voltage across it, resulting in a larger voltage drop (from the voltage source's voltage).</li> <li>Decreasing the source resistance decreases the voltage across it, resulting in a smaller voltage drop (from the voltage source's voltage).</li> </ul>

<p>When the input impedance is small, we get a large input current and large voltage drop.</p> <p>When the output impedance is small, we get a large output current, small voltage drop.</p> <p>Both are resistors and use the same formula (V=IR). Why is the voltage drop different?</p>

Why does reducing the load impedance _increase_ the voltage drop, but reducing the source impedance _reduce_ the voltage drop?

2024-03-23T13:54:00.387

707127

|stm32|spi|linux|

<p>You have connected STM32 output and A7 output together.</p> <p>When one output sends logic 1 and the other output sends logic 0, that will result into some halfway voltage.</p> <p>When the two outputs are approximately equally strong the voltage will be approximately half of the supply, which in your case is 1.65V with a 3.3V supply.</p>

<p>I am using Allwinner A40i (ARM V7) as SPI master and STM32 as SPI slave. When not communicating with STM32 for SPI, it is correct to use an oscilloscope to capture <code>MOSI</code> data, but after STM32 receives the SPI data, <code>MOSI</code> is pulled low, lower than <code>1.6 V</code>. Therefore, STM32 cannot sample data normally. What is the general reason for this? What are the directions for investigation? A40i and STM32 are on the same board, and the working voltage of STM32 is <code>3.3 V</code>, which is normal. The speed is <code>10M</code>. <code>SPI CLK/CS0/MOSI/MISO</code> are directly connected, with no other devices connected in between. The working voltage of each SPI pin is <code>3.3 V</code>.</p> <p>Regarding this issue, we made the following attempts: We are using SPI1 of STM32. When SPI1 and STM32 (STM32A) on the same PCB board, <code>MOSI</code>'s level will be pulled down, but we will break the connection of STM32 on the same board, A40i and external external. When the STM32 (STM32B) communication is normal, it is normal. STM32A and STM32B are the same model, but the packaging method is different. We suspect that the power supply voltage of STM32A is unstable, but we grab the voltage waveform with an oscilloscope, which is a stable <code>3.3V</code>.</p> <p>stm32 settings code:</p> <pre class="lang-c prettyprint-override"><code>void MX_SPI2_Init(void) { /* USER CODE BEGIN SPI2_Init 0 */ /* USER CODE END SPI2_Init 0 */ /* USER CODE BEGIN SPI2_Init 1 */ /* USER CODE END SPI2_Init 1 */ hspi2.Instance = SPI2; hspi2.Init.Mode = SPI_MODE_SLAVE; hspi2.Init.Direction = SPI_DIRECTION_2LINES; hspi2.Init.DataSize = SPI_DATASIZE_8BIT; hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; hspi2.Init.NSS = SPI_NSS_SOFT; hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; hspi2.Init.TIMode = SPI_TIMODE_DISABLE; hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; hspi2.Init.CRCPolynomial = 7; hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; hspi2.Init.NSSPMode = SPI_NSS_PULSE_DISABLE; if (HAL_SPI_Init(&amp;hspi2) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN SPI2_Init 2 */ /* USER CODE END SPI2_Init 2 */ } void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle) { GPIO_InitTypeDef GPIO_InitStruct = {0}; if(spiHandle-&gt;Instance==SPI2) { /* USER CODE BEGIN SPI2_MspInit 0 */ /* USER CODE END SPI2_MspInit 0 */ /* SPI2 clock enable */ __HAL_RCC_SPI2_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /**SPI2 GPIO Configuration PB13 ------&gt; SPI2_SCK PB14 ------&gt; SPI2_MISO PB15 ------&gt; SPI2_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; HAL_GPIO_Init(GPIOB, &amp;GPIO_InitStruct); GPIO_InitStruct.Pin = GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_PULLDOWN; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; HAL_GPIO_Init(GPIOB, &amp;GPIO_InitStruct); /* SPI2 DMA Init */ /* SPI2_TX Init */ hdma_spi2_tx.Instance = DMA1_Channel3; hdma_spi2_tx.Init.Request = DMA_REQUEST_SPI2_TX; hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE; hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_spi2_tx.Init.Mode = DMA_NORMAL; hdma_spi2_tx.Init.Priority = DMA_PRIORITY_HIGH; if (HAL_DMA_Init(&amp;hdma_spi2_tx) != HAL_OK) { Error_Handler(); } __HAL_LINKDMA(spiHandle,hdmatx,hdma_spi2_tx); /* SPI2_RX Init */ hdma_spi2_rx.Instance = DMA1_Channel2; hdma_spi2_rx.Init.Request = DMA_REQUEST_SPI2_RX; hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_spi2_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_spi2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_spi2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_spi2_rx.Init.Mode = DMA_NORMAL; hdma_spi2_rx.Init.Priority = DMA_PRIORITY_HIGH; if (HAL_DMA_Init(&amp;hdma_spi2_rx) != HAL_OK) { Error_Handler(); } __HAL_LINKDMA(spiHandle,hdmarx,hdma_spi2_rx); /* USER CODE BEGIN SPI2_MspInit 1 */ /* USER CODE END SPI2_MspInit 1 */ } } uint8_t test_rxbuf[300] = {0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xF0}; static inline void Start_SPITransfer(void) { HAL_SPI_TransmitReceive_DMA(&amp;hspi2, (INT8U *)test_rxbuf, (INT8U *)test_rxbuf, 256); } </code></pre> <p>Screenshot of a part of the circuit:</p> <p><a href="https://i.stack.imgur.com/epero.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/epero.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/n8xn5.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/n8xn5.png" alt="enter image description here" /></a></p>

Why is MOSI pulled low during communication?

2024-03-23T16:12:18.827

707131

|led|identification|connector|rgb|

<p><a href="https://www.digikey.com/short/449qrbjm" rel="nofollow noreferrer">4-positions, single-row straight male pin strip with circular posts on Digikey</a></p> <p><a href="https://i.stack.imgur.com/RkKQ1.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RkKQ1.jpg" alt="Pin strip with round pins" /></a></p> <p>{Source: <a href="https://www.digikey.com/en/products/detail/mill-max-manufacturing-corp/350-10-104-00-006000/4456125" rel="nofollow noreferrer">Digikey</a>}</p>

<p>I need to find the right connector, solderable on the surface of a PCB, that can mate with the cable shown in the picture below. This type of cable is commonly used of addressable RGB LED fixtures (probably WS2812b) used in &quot;gamer&quot; PC case customization.</p> <p><a href="https://i.stack.imgur.com/VnHGy.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VnHGy.png" alt="addressable RGB LED connector" /></a></p> <p>Initially, I tried mating my sample cable with standard male header, but the pins are too thick and squared; they do not fit. Seems that the specific piece of header required has thinner and round pins.</p> <p>What is the designation of those specific male header pins so that I can order some?</p>

Which type of male header can connect to PC addressable RGB LED connectors?

2024-03-23T16:49:34.503

707140

|antenna|electromagnetism|electromagnetic|microwave|emf|

<p>The EMF meter is measuring the fields that might be considered hazardous to humans. Low frequencies generally won’t cause heating of the human tissue. As we go higher in frequency, this can cause heating - we are familiar with microwave ovens. Since it can cause heating, we’re concerned with the power. 1milliWatt of 2.4GHz won’t do much to us, but once we start getting into Watts, then the concern begins. 700Watts like the average microwave oven, we know what it can do.</p> <p>With the lower frequencies, the fields are of interest. We know magnetic fields have an effect at the atomic level but we’re really not sure what long term exposure to high magnetic fields does to us. Personally I’d want to keep my distance from extended exposure to mains distribution transformers due to the magnetic fields.</p> <p>Similarly with high electrostatic fields it’s not something we should have extended exposure to.</p>

<p>let's consider <a href="https://www.trifield.com/product/trifield-emf-meter/" rel="nofollow noreferrer">this EMF Meter</a>. Regarding its description, I have some doubts regarding what it is physically trying to measure:</p> <ul> <li>Detects all three types of EMF pollution: AC magnetic, AC electric, and RF/microwave</li> </ul> <p><strong>Aren't all of them electromagnetic waves hence the same thing?</strong></p> <ul> <li>AC Magnetic Mode covers 40 Hz – 100 kHz with range of 0.1 – 100.0 milligauss (mG)</li> <li>AC Electric Mode covers 40 Hz – 100 kHz with range of 1 – 1000 volts per meter (V/m)</li> </ul> <p><strong>In a free space electromagnetic wave, E and B fields amplitudes are related by the free space impedance.</strong> So, aren't these two measurements equivalent? Are both Modes the same measurement with just the impedance conversion factor, or should I decide to use the AC Magnetic Mode in some cases and the AC Electric Mode in others?</p> <ul> <li>RF Mode covers 20 MHz – 6 GHz with range of 0.001 – 19.999 milliwatts per square meter (mW/m2)</li> </ul> <p>Again, I imagine this mode actually measures the same phenomenon as before but it is a power measurement instead of a field measurement. <strong>Why is the power measurement preferred for higher frequencies and field measurements for lower frequencies?</strong></p>

EMF Meter: difference between AC magnetic, AC electric, and RF Measurements

2024-03-23T20:32:57.220

707141

|connector|cables|plug|

<p>First of all, I am pleased to see you using my Indenticonn utility. Thank you.</p> <p>To identify those connectors:</p> <ol> <li>Measure the exact pitch, in mm</li> <li>Identify the latching mechanism and the keying (if any). If you post various pictures of the male PCB header and the plug by itself, showing the latching method, we can tell you what it uses.</li> <li>Look through this section: <a href="https://connectorbook.com/identification.html?m=NN&amp;n=prismatic_conn" rel="nofollow noreferrer">https://connectorbook.com/identification.html?m=NN&amp;n=prismatic_conn</a></li> </ol> <p><strong>EDIT</strong></p> <p>Thank you for the additional pictures. The latched connectors are <a href="https://connectorbook.com/identification.html?m=NN&amp;n=prismatic_latch_conn&amp;s=SL%2070543%2070553%2070107%2C%2070430" rel="nofollow noreferrer">Molex SL connectors</a>. Unfortunately, I don't have any information about the unlatched connectors.</p>

<p>I try to identify the following connector type but do not get it with <a href="https://connectorbook.com/identification.html" rel="nofollow noreferrer">https://connectorbook.com/identification.html</a> Can you maybe give me a tip?</p> <p>(width auf the socket is about 8 mm, of the plug 6 mm)</p> <p><a href="https://i.stack.imgur.com/h47OW.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/h47OW.png" alt="enter image description here" /></a> <a href="https://i.stack.imgur.com/LmBTe.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/LmBTe.png" alt="enter image description here" /></a></p>

How to find connector type

2024-03-23T20:33:28.650

707149

|transistors|diodes|negative-resistance|

<blockquote> <p>Is it possible to construct a circuit with negative differential resistance by only using components that have no negative differential resistance (e.g., resistors, diodes, BJTs, etc)? [...] Note that components with negative differential resistance (such as tunnel diode) can’t be used to construct the circuit in question.</p> </blockquote> <p>You said tunnel diodes are excluded because they're already negative-resistance devices, which would make the solution too easy - but BJTs are okay. Fortunately for me, your question still contains a loophole that permits a trivial answer: if you abuse BJTs carefully, BJTs are negative-resistance devices too under the right conditions. Although these modes of operations are not normally used, they have legitimate niche applications.</p> <p>There are two ways of achieving that.</p> <h2>Base-Emitter Junction Reverse Breakdown</h2> <p>The simplest way to create negative resistance from a BJT is to intentionally induce a base-emitter junction breakdown. Negative resistance is exhibited during the breakdown, demonstrated by the fact that it's possible to make oscillators similar to tunnel diode circuits.</p> <img src="https://i.stack.imgur.com/iw04Y.png" width="500" /> <p>Source: <a href="http://www.qrp.gr/negistor/index.html" rel="nofollow noreferrer">BJT negistor applications</a>, by sv3ora</p> <p>This configuration is known among hobbyists as the &quot;negistor&quot;. Most generic small-signal transistors should work, including the 2N2222. Only a small voltage is needed, around 12 V or so. But beware that reverse-biasing a base-emitter junction can cause gradual device degradation, so it's likely not stable enough for long-term use.</p> <p><a href="https://i.stack.imgur.com/aA7RP.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/aA7RP.jpg" alt="BJT negistor applications" /></a></p> <p>Source: <a href="http://www.qrp.gr/negistor/index.html" rel="nofollow noreferrer">BJT negistor applications</a>, by sv3ora</p> <h2>Collector-Emitter Junction Reverse Breakdown</h2> <p>The negistor oscillator works, but the base-emitter breakdown is a slow process as it's relatively &quot;gentle&quot;. On the other hand, a collector-emitter junction breakdown is a more violent process due to the &quot;avalanche breakdown&quot; effect. In this process, a local hotspot increases the mobility of more charge carriers, which in turn creates more hotspots. This semiconductor phenomenon is similar to the Townsend discharge process found in nature, in which one electron knocks out more electrons away from their gas molecules, causing an exponential growth of free electrons, which is responsible for creating electric arcs in the air.</p> <p>In the following circuit, we charge a 20 pF capacitor from a 150 V power supply via a 220 kΩ resistor. Once the voltage across the capacitor is greater than the collector-emitter breakdown voltage, an avalanche breakdown suddenly occurs, discharging a sharp pulse into the 50 Ω resistor.</p> <p>In power electronics, secondary breakdown effect is normally destructive to the transistor and is a common source of failure. But here, the total pulse energy is limited by a 20 pF capacitor, so the transistor will continue to work, forming a relaxation oscillator with periodic discharges.</p> <p><a href="https://i.stack.imgur.com/ZWCwi.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ZWCwi.png" alt="Avalanche Pulse Generators" /></a></p> <p>As you can see, this technique is useful for creating fast pulse generators. With even a common transistor like a 2N3904, I personally measured a signal rise time of 970 picoseconds, well above the bandwidth of basic oscilloscopes. Here, the waveform is measured with a 1 GHz oscilloscope. It's amazing to see that such a fast pulses can be created from one simple component, especially in the 1980s.</p> <p><a href="https://i.stack.imgur.com/lwUcK.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/lwUcK.jpg" alt="rise time measurement on a 1 GHz LeCroy oscillascope" /></a></p> <p>(Warning: Basic oscilloscopes have 1 MΩ inputs so the output is safe to probe with a 1:10 probe. But, if you want to repeat this experiment with a high-speed oscilloscope like this one, you must attach a 30 dB attenuator to protect your 50 Ω input stage from destruction by 150 V!)</p> <p>Other transistors are capable of generating even faster pulses. According to a widely-read article by Jim Williams,</p> <blockquote> <p>82% of samples of the 15V high-speed switch 2N2369, manufactured over a 12-year period, were capable of generating avalanche breakdown pulses with rise time of 350 ps or less.</p> </blockquote> <p>There are also transistors specifically designed and optimized for use in this breakdown mode, known as avalanche transistors.</p> <p>The disadvantage of all avalanche transistor circuits is that a high voltage is needed to induce collector-emitter breakdown, but it's a worthwhile sacrifice. A very weak low-current voltage source to gradually charge a capacitor is already enough.</p> <h2>Reverse Breakdown is not the same as Negative Resistance</h2> <p>A common follow-up question is, &quot;A Zener diode also breaks down, why can't it be used as a pulse generator, then?&quot;</p> <p>It's worth mentioning that although both methods make use of reverse breakdown, but not all reverse breakdowns imply negative resistance. Oscillators work because of the <em>negative resistance</em> exhibited by some particular kinds of reverse breakdown. During the breakdown, its IV curve must have a discontinuous &quot;snapback&quot;. This phenomenon is found in spark gaps, gas discharge tubes, thyristors (SCRs), Shockley 4-layer diodes, and BJTs in &quot;negistor&quot; and &quot;avalanche transistor&quot; configurations. This is what makes a relaxation oscillator possible: If you build a capacitor discharger, the device will keep being ON for a while even after the capacitor voltage drops below the initial breakdown threshold, allowing the discharge to complete.</p> <p><a href="https://i.stack.imgur.com/XSIZtm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/XSIZtm.png" alt="Semiconductor With Weak Snapback" /></a> <a href="https://i.stack.imgur.com/DSWpcm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/DSWpcm.png" alt="Semiconductor with Strong Snapback" /></a></p> <p>Ordinary Zener diodes also experience reverse breakdown, but their IV curve doesn't have a &quot;snapback&quot;, so they don't have negative resistance. If one attempts to build a relaxation oscillator, capacitor voltage would stay at a point of equilibrium, rather than generating periodic discharges.</p> <p><a href="https://i.stack.imgur.com/mSigYm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/mSigYm.png" alt="Diode without Snapback" /></a></p> <h2>Further Readings</h2> <ul> <li><p>Wikipedia Article: <a href="https://en.wikipedia.org/wiki/Avalanche_transistor" rel="nofollow noreferrer">Avalanche transistor</a></p> </li> <li><p>Linear Technology Application Note 47: <a href="https://www.analog.com/media/en/technical-documentation/application-notes/an47fa.pdf" rel="nofollow noreferrer">High Speed Amplifier Techniques</a>, Appendix D: Measuring probe-oscilloscope response</p> </li> <li><p>Blog: <a href="http://www.kerrywong.com/2013/05/18/avalanche-pulse-generator-build-using-2n3904/" rel="nofollow noreferrer">Avalanche Pulse Generator Build Using 2N3904</a></p> </li> </ul>

<p>Is it possible to construct a circuit with negative differential resistance by only using components that have no negative differential resistance (e.g., resistors, diodes, BJTs, etc)? If possible, what are the examples. If not, is there any theorem suggesting so?</p> <p>By negative differential resistance, I mean a circuit where the current decreases when the voltage increases. Note that components with negative differential resistance (such as tunnel diode) can’t be used to construct the circuit in question. Power source can’t also be used.</p>

Creating a circuit with negative differential resistance

2024-03-23T22:17:01.827

707158

|simulation|vhdl|rtl|synchronization|axi4|

<p>The key concept in AXI streaming is that data is transferred from source to destination in any clock cycle in which both TVALID and TREADY are high. Among other things, this means that when you assert TVALID as a source, your TDATA value must already be on the output port of your module. You can't wait for TREADY to be asserted and then update TDATA, which is what you're currently doing.</p> <p>Here's an example of a simple (but nontrivial) module that illustrates how flow control gets done on the both the input side and the output side of a module:</p> <pre class="lang-vhdl prettyprint-override"><code>--! @file axi_two_stage_fifo.vhdl --! This module is the next-simplest possible AXI FIFO. Its advantage over the --! one-stage FIFO is that it allows the flow control (TREADY) to be registered, --! breaking long combinatorial paths. --! --! This is a fall-though FIFO -- the data appears on the output pins regardless --! of the state of vout_tready. --! --! There are two registers, which hold zero, one or two words of data. The --! state is encoded as the states of vin_tready and vout_tvalid: --! 0 words: vin_tready = 1, vout_tvalid = 0 --! 1 words: vin_tready = 1, vout_tvalid = 1 --! 2 words: vin_tready = 0, vout_tvalid = 1 -- History: -- 2022-01-05 DT Debug translation. -- 2022-01-04 DT Translate from axi_two_stage_fifo.v library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity axi_two_stage_fifo is generic ( TDATA_WIDTH : integer := 1; TUSER_WIDTH : integer := 1 ); port ( -- AXI in vin_tready : out std_logic; vin_tvalid : in std_logic; vin_tdata : in std_logic_vector (TDATA_WIDTH-1 downto 0); vin_tuser : in std_logic_vector (TUSER_WIDTH-1 downto 0); vin_tlast : in std_logic; -- AXI out vout_tready : in std_logic; vout_tvalid : out std_logic; vout_tdata : out std_logic_vector (TDATA_WIDTH-1 downto 0); vout_tuser : out std_logic_vector (TUSER_WIDTH-1 downto 0); vout_tlast : out std_logic; -- clock, reset clock : in std_logic; reset : in std_logic ); end axi_two_stage_fifo; architecture rtl of axi_two_stage_fifo is signal fifo_tdata : std_logic_vector (TDATA_WIDTH-1 downto 0); signal fifo_tuser : std_logic_vector (TUSER_WIDTH-1 downto 0); signal fifo_tlast : std_logic; signal input_full : std_logic; signal output_full : std_logic; signal status : std_logic_vector (1 downto 0); begin vin_tready &lt;= not input_full; vout_tvalid &lt;= output_full; status &lt;= input_full &amp; output_full; process (clock) is begin if rising_edge(clock) then if reset = '1' then input_full &lt;= '0'; output_full &lt;= '0'; else case status is when &quot;00&quot; =&gt; -- 0 words, vin_tready is already 1 if vin_tvalid = '1' then output_full &lt;= '1'; vout_tdata &lt;= vin_tdata; vout_tuser &lt;= vin_tuser; vout_tlast &lt;= vin_tlast; end if; when &quot;01&quot; =&gt; -- 1 word, vin_tready is already 1, vout_tvalid is already 1 if (vin_tvalid = '1') and (vout_tready = '0') then input_full &lt;= '1'; fifo_tdata &lt;= vin_tdata; fifo_tuser &lt;= vin_tuser; fifo_tlast &lt;= vin_tlast; elsif (vin_tvalid = '0') and (vout_tready = '1') then output_full &lt;= '0'; elsif (vin_tvalid = '1') and (vout_tready = '1') then vout_tdata &lt;= vin_tdata; vout_tuser &lt;= vin_tuser; vout_tlast &lt;= vin_tlast; end if; when &quot;11&quot; =&gt; -- 2 words, vout_tvalid is already 1 if vout_tready = '1' then input_full &lt;= '0'; vout_tdata &lt;= fifo_tdata; vout_tuser &lt;= fifo_tuser; vout_tlast &lt;= fifo_tlast; end if; when others =&gt; input_full &lt;= '0'; output_full &lt;= '0'; end case; end if; end if; end process; end rtl; </code></pre>

<p>I'm working on a design right now but I'm struggling with the axistream bus. I just want to be sure that I'm understanding well how it works. To do so I'm using the uvvm library to do a generator that send some data through a axis bus to my IP and then my IP sends it back to a uvvm axistream slave. The IP is very simple: I just read what's in the databus coming from the master then I transmit it to the slave.</p> <pre class="lang-vhdl prettyprint-override"><code> library IEEE; use IEEE.STD_LOGIC_1164.ALL; entity AXI4_Stream_IP is port ( -- Clock and Reset Signals axi_clk : in std_logic; axi_rstn : in std_logic; -- AXI4-Stream Input Signals tvalid_in : in std_logic; -- Input Data Valid tready_in : out std_logic; -- Ready for Input Data tdata_in : in std_logic_vector(7 downto 0); -- Input Data tlast_in : in std_logic; tkeep_in : in std_logic_vector(0 downto 0); -- Assuming tkeep is not used in the component tuser_in : in std_logic_vector(0 downto 0); -- Assuming tuser is not used in the component tid_in : in std_logic_vector(0 downto 0); -- Assuming tid is not used in the component tstrb_in : in std_logic_vector(0 downto 0); -- Assuming tstrb is not used in the component t_dest_in : in std_logic_vector(0 downto 0); -- AXI4-Stream Output Signals tvalid_out : out std_logic; -- Output Data Valid tready_out : in std_logic; -- Ready for Output Data tdata_out : out std_logic_vector(7 downto 0); -- Output Data tlast_out : out std_logic; -- Output Last Data Indicator tkeep_out : out std_logic_vector(0 downto 0); -- Assuming tkeep is not used in the component tuser_out : out std_logic_vector(0 downto 0); -- Assuming tuser is not used in the component tid_out : out std_logic_vector(0 downto 0); -- Assuming tid is not used in the component tstrb_out : out std_logic_vector(0 downto 0); -- Assuming tstrb is not used in the component t_dest_out : out std_logic_vector(0 downto 0) -- Assuming t_dest is not used in the component ); end entity AXI4_Stream_IP; architecture rtl of AXI4_Stream_IP is -- Internal Signals for Input Data Storage and Read Control signal reg_data_in : std_logic_vector(7 downto 0) := (others =&gt; '0'); signal state : std_logic_vector(1 downto 0) := &quot;00&quot;; begin -- Process for IP Logic process(axi_clk, axi_rstn) begin if axi_rstn = '0' then -- Reset conditions tvalid_out &lt;= '0'; tdata_out &lt;= (others =&gt; '0'); tlast_out &lt;= '0'; reg_data_in &lt;= (others =&gt; '0'); -- Reset internal register -- state &lt;= &quot;00&quot;; tready_in &lt;= '0'; elsif rising_edge(axi_clk) then if tvalid_in = '1' then tready_in &lt;= '1'; else tready_in &lt;= '0'; end if; case state is when &quot;00&quot; =&gt; if tvalid_in = '1' and tready_in = '1' then reg_data_in &lt;= tdata_in; tvalid_out &lt;= '1'; state &lt;= &quot;01&quot;; end if; when &quot;01&quot; =&gt; if tready_out = '1' and tvalid_out = '1' then tdata_out &lt;= reg_data_in; tvalid_out &lt;= '0'; state &lt;= &quot;00&quot;; end if; when others =&gt; state &lt;= &quot;00&quot;; end case; end if; end process; end architecture rtl; </code></pre> <p>This is the code of the IP, and I use the following testbench:</p> <pre class="lang-vhdl prettyprint-override"><code> library ieee; use ieee.std_logic_1164.all; library std; use std.env.all; library uvvm_util; context uvvm_util.uvvm_util_context; library bitvis_vip_axistream; use bitvis_vip_axistream.axistream_bfm_pkg.all; use std.textio.all; use std.env.finish; entity alorsla is end alorsla; architecture behavioral of alorsla is -- Clock signal signal clk : std_logic; signal rst_n:std_logic; -- Record definition for the AXI4-Stream bus subtype t_axistream is t_axistream_if ( tdata (7 downto 0), tkeep (0 downto 0), tuser (0 downto 0), tstrb (0 downto 0), tid (0 downto 0), tdest (0 downto 0) ); signal m_axistream : t_axistream; signal s_axistream : t_axistream; -- AXI4-Stream data signal tdata_array : t_slv_array(0 to 15) (7 downto 0) := ( x&quot;00&quot;, x&quot;11&quot;, x&quot;22&quot;, x&quot;33&quot;, x&quot;44&quot;, x&quot;55&quot;, x&quot;66&quot;, x&quot;77&quot;, x&quot;88&quot;, x&quot;59&quot;, x&quot;AA&quot;, x&quot;BB&quot;, x&quot;CC&quot;, x&quot;DD&quot;, x&quot;EE&quot;, x&quot;FF&quot;); signal tdata_expected_array : t_slv_array(0 to 15) (7 downto 0) := ( x&quot;00&quot;, x&quot;11&quot;, x&quot;22&quot;, x&quot;33&quot;, x&quot;44&quot;, x&quot;55&quot;, x&quot;66&quot;, x&quot;77&quot;, x&quot;88&quot;, x&quot;59&quot;, x&quot;AA&quot;, x&quot;BB&quot;, x&quot;CC&quot;, x&quot;DD&quot;, x&quot;EE&quot;, x&quot;FF&quot;); signal msg_id_panel : t_msg_id_panel := shared_msg_id_panel; -- Configure the AXI4-Stream BFM constant C_AXISTREAM_BFM_CONFIG_DEFAULT : t_axistream_bfm_config := ( max_wait_cycles =&gt; 100, max_wait_cycles_severity =&gt; ERROR, clock_period =&gt; -1 ns, clock_period_margin =&gt; 0 ns, clock_margin_severity =&gt; TB_ERROR, setup_time =&gt; -1 ns, hold_time =&gt; -1 ns, bfm_sync =&gt; SYNC_ON_CLOCK_ONLY, match_strictness =&gt; MATCH_EXACT, byte_endianness =&gt; LOWER_BYTE_LEFT, valid_low_at_word_num =&gt; 0, valid_low_multiple_random_prob =&gt; 0.5, valid_low_duration =&gt; 0, valid_low_max_random_duration =&gt; 5, check_packet_length =&gt; false, protocol_error_severity =&gt; ERROR, ready_low_at_word_num =&gt; 0, ready_low_multiple_random_prob =&gt; 0.5, ready_low_duration =&gt; 0, ready_low_max_random_duration =&gt; 5, ready_default_value =&gt; '0', id_for_bfm =&gt; ID_BFM ); constant C_AXISTREAM_SLAVE_BFM_CONFIG_DEFAULT : t_axistream_bfm_config := ( max_wait_cycles =&gt; 100, max_wait_cycles_severity =&gt; ERROR, clock_period =&gt; -1 ns, clock_period_margin =&gt; 0 ns, clock_margin_severity =&gt; TB_ERROR, setup_time =&gt; -1 ns, hold_time =&gt; -1 ns, bfm_sync =&gt; SYNC_ON_CLOCK_ONLY, match_strictness =&gt; MATCH_EXACT, byte_endianness =&gt; LOWER_BYTE_LEFT, valid_low_at_word_num =&gt; 0, valid_low_multiple_random_prob =&gt; 0.5, valid_low_duration =&gt; 0, valid_low_max_random_duration =&gt; 5, check_packet_length =&gt; false, protocol_error_severity =&gt; ERROR, ready_low_at_word_num =&gt; 0, ready_low_multiple_random_prob =&gt; 0.5, ready_low_duration =&gt; 0, ready_low_max_random_duration =&gt; 5, ready_default_value =&gt; '0', id_for_bfm =&gt; ID_BFM ); component AXI4_Stream_IP is port ( -- Clock and Reset Signals axi_clk : in std_logic; axi_rstn : in std_logic; -- AXI4-Stream Input Signals tvalid_in : in std_logic; -- Input Data Valid tready_in : out std_logic; -- Ready for Input Data tdata_in : in std_logic_vector(7 downto 0); -- Input Data tlast_in : in std_logic; tkeep_in : in std_logic_vector(0 downto 0); -- Assuming tkeep is not used in the component tuser_in : in std_logic_vector(0 downto 0); -- Assuming tuser is not used in the component tid_in : in std_logic_vector(0 downto 0); -- Assuming tid is not used in the component tstrb_in : in std_logic_vector(0 downto 0); -- Assuming tstrb is not used in the component t_dest_in : in std_logic_vector(0 downto 0); -- AXI4-Stream Output Signals tvalid_out : out std_logic; -- Output Data Valid tready_out : in std_logic; -- Ready for Output Data tdata_out : out std_logic_vector(7 downto 0); -- Output Data tlast_out : out std_logic; -- Output Last Data Indicator tkeep_out : out std_logic_vector(0 downto 0); -- Assuming tkeep is not used in the component tuser_out : out std_logic_vector(0 downto 0); -- Assuming tuser is not used in the component tid_out : out std_logic_vector(0 downto 0); -- Assuming tid is not used in the component tstrb_out : out std_logic_vector(0 downto 0); -- Assuming tstrb is not used in the component t_dest_out : out std_logic_vector(0 downto 0) -- Assuming t_dest is not used in the component ); end component AXI4_Stream_IP; begin -- Generate the clock clock_generator(clk, 10 ns); uut: AXI4_Stream_IP port map ( axi_clk =&gt;clk, axi_rstn =&gt;rst_n, tdata_in =&gt; m_axistream.tdata, tkeep_in =&gt; m_axistream.tkeep, tuser_in =&gt; m_axistream.tuser, tvalid_in =&gt; m_axistream.tvalid, tlast_in =&gt; m_axistream.tlast, tready_out =&gt; s_axistream.tready, tstrb_in =&gt; m_axistream.tstrb, tid_in =&gt; m_axistream.tid, t_dest_in =&gt; m_axistream.tdest, tdata_out =&gt; s_axistream.tdata, tkeep_out =&gt; s_axistream.tkeep, tuser_out =&gt; s_axistream.tuser, tvalid_out =&gt; s_axistream.tvalid, tlast_out =&gt; s_axistream.tlast, tready_in =&gt; m_axistream.tready, tstrb_out =&gt; s_axistream.tstrb, tid_out =&gt; s_axistream.tid, t_dest_out =&gt; s_axistream.tdest ); -- uut: AXI4_Stream_IP -- port map ( -- axi_clk =&gt; clk, -- axi_rstn =&gt; rst_n, -- tvalid_in =&gt; m_axistream.tvalid, -- tready_out =&gt; s_axistream.tready, -- tdata_in =&gt; m_axistream.tdata, -- tlast_in =&gt; m_axistream.tlast, --tkeep_in =&gt; (others =&gt; '0'), -- Assuming tkeep is not used in the component --tuser_in =&gt; (others =&gt; '0'), -- Assuming tuser is not used in the component --tid_in =&gt; (others =&gt; '0'), -- Assuming tid is not used in the component --tstrb_in =&gt; (others =&gt; '0'), -- Assuming tstrb is not used in the component --t_dest_in =&gt; (others =&gt; '0'), -- Assuming t_dest is not used in the component -- tvalid_out =&gt; s_axistream.tvalid, -- tready_in =&gt; m_axistream.tready, -- tdata_out =&gt; s_axistream.tdata, -- tlast_out =&gt; s_axistream.tlast --tkeep_out =&gt; s_axistream.tkeep-- Assuming tkeep is not used in the component --); -- Drive tready --m_axistream.tready &lt;= '1'; stimuli : process constant C_SCOPE : string := &quot;STIMULI Process&quot;; begin -- reset rst_n &lt;='0'; wait for 10 ns; rst_n &lt;= '1'; -- Log setup enable_log_msg(ALL_MESSAGES, &quot;Logging all Messages&quot;, NON_QUIET, C_SCOPE); log(ID_LOG_HDR, &quot;SIMULATION START&quot;, C_SCOPE); -- Send data over AXI4-Stream axistream_transmit(tdata_array, &quot;Send AXI4-Stream data&quot;, clk, m_axistream, C_SCOPE, msg_id_panel, C_AXISTREAM_BFM_CONFIG_DEFAULT); wait for 50 ns; -- End of simulation report_alert_counters(FINAL); log(ID_LOG_HDR, &quot;SIMULATION END&quot;, C_SCOPE); std.env.stop; wait; end process stimuli; check_data : process constant C_SCOPE : string := &quot;CHECK PROCESS&quot;; begin -- Check data over AXI4-Stream axistream_expect( tdata_expected_array, &quot;Check AXI4-Stream data&quot;, clk, s_axistream, WARNING, C_SCOPE, msg_id_panel, C_AXISTREAM_SLAVE_BFM_CONFIG_DEFAULT); log(ID_LOG_HDR, &quot;AXI4-Stream Data checked&quot;, C_SCOPE); wait; end process check_data; end architecture behavioral; </code></pre> <p>When I do the simulation I end up with this signal:</p> <p><a href="https://i.stack.imgur.com/GDgDi.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GDgDi.png" alt="simulation" /></a></p> <p>You can see I am missing some data in the reception part and I don't know why. I read that is it recommended to use a buffer sometimes, but it seems a little bit complex and I want to be sure that it's not something else before doing that.</p> <p>Can someone help me? I have been working on this for a very long time now and I did not find anything else on the internet than &quot;use the vivavado axistream so you have nothing to do&quot;.</p>

How do I implement a simple axistream by my self bus in VHDL?

2024-03-24T00:57:31.277

707165

|circuit-analysis|resistors|superposition|

<p>After removing the 9V source, you have the upper circuit here, in which you combine R1 and R2 to be replaced by R5, underneath:</p> <p><img src="https://i.stack.imgur.com/FyM2H.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fFyM2H.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <p>Notice how node A becomes inaccessible after the replacement of R1 and R2 with a single component R5. It's now &quot;inside&quot; R5 somewhere.</p> <p>Then you combine the parallel pair R5 and R3, but node B remains accessible. It is the left end of R4, which is still exposed even after the change:</p> <p><img src="https://i.stack.imgur.com/ZMzi1.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fZMzi1.png">simulate this circuit</a>}</p> <p>Node B is at the junction of R4 and R6, which means when you combine them in your last step, B becomes inaccessible, existing somewhere &quot;inside&quot; the single resistor replacement:</p> <p><img src="https://i.stack.imgur.com/y90Py.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fy90Py.png">simulate this circuit</a>}</p> <p>In these examples, node B has potential <span class="math-container">\$V_O\$</span>, which is your value of interest, and having &quot;lost&quot; it you can therefore no longer determine its potential. This last step was &quot;one step too far&quot;, and you should return to the previous one, in which B was still accessible. It is a simple resistor potential divider, which may be easier to visualise like this:</p> <p><img src="https://i.stack.imgur.com/sqspV.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fsqspV.png">simulate this circuit</a>}</p> <p>Potential <span class="math-container">\$V_O\$</span> is:</p> <p><span class="math-container">$$ \begin{aligned} V_O &amp;= V_1\frac{R_6}{R_4+R_6} \\ \\ &amp;= 3V \times \frac{2.25\Omega}{2.25\Omega + 1\Omega} \\ \\ &amp;= 3V \times \frac{2.25\Omega}{3.25\Omega} \\ \\ &amp;= +2.077V \end{aligned} $$</span></p> <p>When you said that <span class="math-container">\$V_O\$</span> changed to +3V in that final step, what you were actually measuring wasn't node B, it was node C, which was the only node still accessible after all those steps. Of course node C is now +3V; it always has been +3V, even before step 1, because it has been the positive terminal of voltage source <span class="math-container">\$V_1\$</span> throughout.</p>

<p><a href="https://i.stack.imgur.com/GUaik.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GUaik.png" alt="enter image description here" /></a></p> <p>Hi, I'm trying to determine the value of Vo using superposition, however I've come across a hurdle when trying to zero the 9V voltage source. I tried simplifying the circuit using the following steps: <a href="https://i.stack.imgur.com/UIl5k.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/UIl5k.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/Spv24.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Spv24.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/sTmqc.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sTmqc.png" alt="enter image description here" /></a></p> <p>Up to this point, the Vo has remained consistent(2.077V), however upon combining the 2.25(2.3) and 1 ohm resistors in series, the value of Vo changes to 3. I understand why that is, as the resistor is in parallel with the 3V voltage source. What I don't understand is why Vo isn't 3 to begin with as I don't think I've simplified the circuit inaccurately. I would greatly appreciate it if someone could explain where I went wrong with this question. Thank you in advance</p>

Why can't I simplify this circuit in this way?

2024-03-24T02:55:32.960

707167

|how-does-it-work|

<p>The LED is backward.<br /> The behavior is &quot;very&quot; dependent of the supply voltage ...<br /> Note the value of the parameter &quot;a&quot; for some change of the LED.</p> <p><a href="https://i.stack.imgur.com/N0S68.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/N0S68.png" alt="enter image description here" /></a></p>

<p>This is a circuit for a battery condition indicator:</p> <p><a href="https://i.stack.imgur.com/5NnVm.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5NnVm.jpg" alt="this is a circuit for as battery condition indicator" /></a></p> <ul> <li>How can I determine the base, the emitter and the collector of the transistor?</li> <li>How does this circuit work?</li> </ul>

What is the working principle of this circuit?

2024-03-24T02:58:42.170

707177

|pcb-design|pcb-antenna|via-hole|stitching|

<p>The lambda/10 rule of thumb is to provide a certain amount of attenuation at the frequency of interest. I forget exactly what that attenuation level is, but if you need more attenuation you either space the vias closer together or you put in a second, staggered row of vias like the graphic shows. It all comes down to how much attenuation, or isolation do you need.</p> <p>At higher frequencies say above 10 GHz, it may be difficult to achieve the attenuation needed because you may not be able to place vias in a single row as close as needed because of manufacturing constraints. This is when a second row of vias, staggered from the first, help.</p> <p><strong>Added Examples</strong></p> <p>One example where attenuation, or isolation on the order of 35 dB is needed is in multi-channel RF/microwave assemblies, where isolation between channels is needed to meet performance requirements. Some of this isolation can be achieved through separation. But many RF modules are very high density and adequate isolation through physical separation cannot be achieved without growing the module. Hence the use of stitching vias.</p>

<p>I have a query concerning the stitching of vias for RF lines and board fencing. According to the application note, it is recommended that the distance between vias should fall within the range of one-tenth to one-twentieth of the wavelength. <a href="https://i.stack.imgur.com/Xp8gs.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Xp8gs.png" alt="enter image description here" /></a> For an RF frequency of 868MHz on a PCB with an effective relative permittivity (εr_eff) of 4.4, the guided wavelength is approximately 0.16476888062999867 meters.</p> <p><a href="https://i.stack.imgur.com/MGXS3.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MGXS3.png" alt="enter image description here" /></a></p> <p>Following the recommendation, the distance between vias should ideally be between 16mm and 8.2mm, which seems quite significant.</p> <p>Could you please advise on any potential errors in my approach or provide guidance on how to accurately calculate via distances for RF lines? Additionally, are there any recommendations for via sizes that I should consider?</p>

How to calculate distances between stitching vias for RF lines?

2024-03-24T07:41:44.927

707182

|battery-charging|solar-charge-controller|lithium|

<blockquote> <p><em>What is the purpose of having two grounds?</em></p> </blockquote> <p>The best way to think about this is that the PGND pin is the star point to which all grounds (power and non-power) connect. Page 23 of the <a href="https://www.ti.com/lit/ds/symlink/bq25703a.pdf?ts=1711196910622&amp;ref_url=https%253A%252F%252Fwww.ti.com%252Fpower-management%252Fbattery-management%252Fcharger-ics%252Fproducts.html" rel="nofollow noreferrer">data sheet</a> shows this in more detail: -</p> <p><a href="https://i.stack.imgur.com/hbWyU.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/hbWyU.png" alt="enter image description here" /></a></p> <p>As you can see, inside the device the &quot;true&quot; star point is made hence, when you ask about VDDA and the 1 μF capacitor, the best place to connect it is at the PGND pin. I see that the evaluation board does this using a net tie NT1 to separate PGND and GND. That's one way of doing it. My preferred way is to star point at PGND directly.</p> <blockquote> <p><em>What is the purpose of the circuit close to the input, what do Q9A and Q9B do?</em></p> </blockquote> <ul> <li>Q5 and Q6 form a bidirectional switch. This can turn off charging from the left and, also prevent over-discharge from the battery on the right</li> <li>Q9A being activated open-circuits the bidirectional switch</li> <li>Q9B activates Q9A and provides a 0 volts referenced control interface to facilitate this</li> </ul>

<p>I am trying to build my solar charger to charge my lithium batteries. The lithium batteries already have a BMS on them. I am using the BQ25703A IC from Texas Instruments.</p> <p><strong>Datasheets:</strong></p> <p><a href="https://www.ti.com/lit/ds/symlink/bq25703a.pdf?ts=1711196910622&amp;ref_url=https%253A%252F%252Fwww.ti.com%252Fpower-management%252Fbattery-management%252Fcharger-ics%252Fproducts.html" rel="nofollow noreferrer">BQ25703A</a> <a href="https://www.ti.com/lit/ug/sluubg6/sluubg6.pdf" rel="nofollow noreferrer">BQ2570X EVM</a></p> <p><strong>My questions:</strong></p> <ol> <li>What is the purpose of having two grounds? I do not see any isolation on the IC and also the VSYS and VBAT are both referenced to the PGND.</li> </ol> <p><a href="https://i.stack.imgur.com/57IMK.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/57IMK.png" alt="enter image description here" /></a></p> <ol start="2"> <li>The datasheet says to connect the 1uF cap to the power ground, why then does the schematic connect to the other ground?</li> </ol> <p><a href="https://i.stack.imgur.com/KTWCm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KTWCm.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/d4nGS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/d4nGS.png" alt="enter image description here" /></a></p> <ol start="3"> <li>The PGND has the symbol for the GND, should the symbol change, or should it be renamed to GND?</li> </ol> <p><a href="https://i.stack.imgur.com/3O9vx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/3O9vx.png" alt="enter image description here" /></a></p> <ol start="4"> <li>What is the purpose of the circuit close to the input, what do Q9A and Q9B do?</li> </ol> <p><a href="https://i.stack.imgur.com/EMelu.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/EMelu.png" alt="enter image description here" /></a></p>

Explanation of the schematic for the BQ25703A charger

2024-03-24T08:54:44.967

707185

|feedback|

<p>Here comes my explanation of the shown circuit:</p> <p><strong>1.)</strong> The input of the amplifier (common gate configuration with a current input) is the source node of M2.</p> <p><strong>2.)</strong> Therefore, the feedback signal (in form of a current) is superimposed at this node with the signal current. That means: Transistor <strong>M1 is part of the feedback path</strong>. It is its purpose to convert the feedback voltage (at the gate of M1) into a current.</p> <p><strong>3.)</strong> Opening the feedback loop at the gate of M1 and injecting a test voltage Vt,in, we get the loop gain expression:</p> <p><strong>Loop gain LG=Vt,out/Vt,in</strong> with</p> <p><strong>id1=gm1*Vt,in</strong> and</p> <p><strong>Vt,out=[R1/(R1+R2)] * id2 * R3||(R1+R2)</strong></p> <p><strong>Loop gain</strong> <strong>LG=Vt,out/Vt,in=[R1/(R1+R2)] * (id2/id1) * gm1 * R3||(R1+R2)</strong></p> <p>Because of <strong>id2=id1</strong> we can simplify:</p> <p><strong>LG=[R1/(R1+R2)] * gm1 * R3||(R1+R2)</strong></p> <p>The gain of the <strong>open loop</strong> is</p> <p><strong>Aol=Vout/i,in=R3||(R1+R2)</strong>**</p> <p>Therefore the feedback &quot;factor&quot; is beta=LG/Aol:</p> <p><strong>beta=[R1/(R1+R2)] * gm1</strong>.</p>

<p>Here is the circuit from <a href="https://youtu.be/L-fihvU3VC8?list=PLc7Gz02Znph-c2-ssFpRrzYwbzplXfXUT&amp;t=2314" rel="nofollow noreferrer">YouTube</a>:</p> <p><a href="https://i.stack.imgur.com/FPLsN.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/FPLsN.png" alt="enter image description here" /></a></p> <p>In order to determine the feedback, we have to break the loop at the gate of M1.</p> <p>Assume A is <span class="math-container">\$\infty\$</span>, so <span class="math-container">\$V_{GS}\$</span> of M1 is 0. As we know the <span class="math-container">\$V_S\$</span> of M1 is grounded, we have <span class="math-container">\$V_S = V_G = 0\$</span>. And that's why the gate of M1 is grounded.</p> <p><a href="https://i.stack.imgur.com/w3ddS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/w3ddS.png" alt="enter image description here" /></a></p> <p><span class="math-container">$$\frac{V_{out}} {I_{in}} = R_2 \parallel R_3$$</span></p> <p>The following is how I break the loop and add test voltage.</p> <p><a href="https://i.stack.imgur.com/UMFTt.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/UMFTt.png" alt="enter image description here" /></a></p> <p><span class="math-container">$$Loop \hspace{1mm} Gain = L = \frac{V_F} {V_t} = g_{m1} \bigr(R_3 \parallel (R_1 + R_2)\bigr) \frac{R_1} {R_1 + R_2}$$</span></p>

How to find feedback coefficient \$\beta\$ of this current-voltage feedback circuit?

2024-03-24T09:34:48.343

707186

|fpga|verilog|xilinx|vivado|

<p>Those are surprisingly helpful error messages.</p> <p>The simulator is telling you that your assignment is too vague. You need to clarify what you mean to the simulator.</p> <p>On the LHS, you have 16 bits. On the RHS you have 272 bits. You need to instruct the simulator which 16 of the 272 bits in <code>state_out_mem</code> you want to be assigned to <code>state_out</code>.</p> <p>One approach you can take is to try to write the assignments out the &quot;long way&quot; first, explicitly using bit slices.</p>

<p>I am writing my Verilog module in Xilinx Vivado. I am actually dealing with 2D arrays. I want to add elements from one array to another in the following way.</p> <p>For Example:</p> <pre><code>states = [[1,2,3,4], [5,6], [7,8,9]] solution = [[2,4,3,1] , [6,5], [7,9,8]] state_out = []; solution_out=[] //The states and solution will already be available to me. //The output would be the following. At k=0 //This would be a randomly assigned number. states = [[5,6],[7,9,8]]; state_out=[[1,2,3,4]] solution=[[6,5], [7,9,8]]; solution_out=[[2,4,3,1]] </code></pre> <p>and so on until the states and solution become empty. When they become empty, I want all the values of the <code>state_out</code> and <code>solution_out</code> to be shifted to states and solution respectively maintaining the order the arrays have in <code>state_out</code> and <code>solution_out</code>.</p> <pre><code>`timescale 1ns / 1ps module rubiks_states_solver( input wire clk, output reg [3:0][0:3] state_out, output reg [3:0][0:3] solution_out ); reg [3:0] k = 4'b0011; reg [3:0] i; reg [16:0] states[0:3][0:3]; reg [16:0] solution[0:3][0:3]; reg [16:0] state_out_mem[0:3][0:3]; reg [16:0] solution_out_mem[0:3][0:3]; initial begin // Initialize states and solution arrays states[0][0]=8'h61; states[0][1] = 8'h62; states[0][2]=8'h63; states[0][3]=8'h63; states[1][0]=8'h61; states[1][1]=8'h65; states[1][2]=8'h67; states[2][0] = 8'h6C; states[2][1] = 8'h67; states[2][2] = 8'h72; states[2][3] = 8'h74; states[3][0] = 8'h6B; states[3][1] = 8'h68; states[3][2] = 8'h72; solution[0][0] = 8'h63; solution[0][1] = 8'h62; solution[0][2] = 8'h63; solution[0][3] = 8'h61; solution[1][0] = 8'h67; solution[1][1] = 8'h61; solution[1][2] = 8'h65; solution[1][3]=8'h00; solution[2][0] = 8'h6C; solution[2][1] = 8'h72; solution[2][2] = 8'h74; solution[2][3] = 8'h67; solution[3][0] = 8'h72; solution[3][1] = 8'h68; solution[3][2] = 8'h6B; solution[3][3]=8'h00; end always @ (posedge clk) begin for (i = 0; i &lt; 4; i = i + 1) begin states[k][i] &lt;= states[k][i] &lt;&lt; 1; solution[k][i] &lt;= solution[k][i] &lt;&lt; 1; end end always @* begin for (i = 0; i &lt; 4; i = i + 1) begin state_out_mem[k][i] = states[k][i]; solution_out_mem[k][i] = solution[k][i]; end end assign state_out = state_out_mem; assign solution_out = solution_out_mem; endmodule </code></pre> <p>at the (<code>assign state_out = state_out_mem;</code>) part, I am receiving syntax errors:</p> <pre><code>Error: cannot access memory &quot;state_out_mem&quot; directly Error: cannot assign an unpacked type to a packed type. </code></pre> <p>same errors for the <code>assign solution_out = solution_out_mem</code></p> <p>Does anybody know how I can fix this issue?</p>

Verilog: How do I assign multidimensional arrays as outputs in my module

2024-03-24T09:36:18.040

707196

|microcontroller|timer|counter|pic24f|

<p>From a <a href="https://ww1.microchip.com/downloads/en/devicedoc/31012a.pdf" rel="nofollow noreferrer">Microchip document</a> regarding TIMER1:</p> <blockquote> <p>When the prescaler is 1:1, the external clock input is the same as the prescaler output. The synchronization of T1CKI with the internal phase clocks is accomplished by sampling the prescaler output on alternating Tosc clocks of the internal phase clocks. Therefore, it is necessary for the T1CKI pin to be high for at least 2Tosc (and a small RC delay) and low for at least 2Tosc (and a small RC delay). Refer to parameters 45, 46, and 47 in the “Electrical Specifications” section.<br> When a prescaler other than 1:1 is used, the external clock input is divided by the asynchronous ripple-counter prescaler so that the prescaler output is symmetrical. In order for the external clock to meet the sampling requirement, the ripple-counter must be taken into account. Therefore, it is necessary for the T1CKI pin to have a period of at least 4Tosc (and a small RC delay) divided by the prescaler value.<br> Another requirement on the T1CKI pin high and low time is that they do not violate the minimum pulse width requirements). Refer to parameters 40, 42, 45, 46, and 47 in the “Electrical Specifications” section.</p> </blockquote> <p>You should be aware that these 16Fxxx series processors drive instruction cycles with a four-phase clock. It seems that &quot;sync&quot; uses two of these phases.<br> For example, a 16 MHz oscillator drives the atomic instruction cycle at 4 million instructions/sec. In this case, &quot;Tosc&quot; is 1/(16x10^6).<br></p>

<p><a href="https://i.stack.imgur.com/OKMaq.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OKMaq.png" alt="enter image description here" /></a></p> <blockquote> <p>Timer1 has the following features: <br/>16-bit timer/counter register pair (TMR1H:TMR1L)</p> </blockquote> <p>What I can't understand is that I couldn't find on the Internet what actual sequential circuit is hiding beneath that mask of &quot;TMR1 (H-L)&quot; register. Is it a shift-register or parallel-in-serial-out register or what? And what's that &quot;Sync&quot; block made of? I mean you have either an asynchronous ripple counter or a synchronous counter - is that &quot;Sync&quot; block a kind of &quot;switch&quot; that switches between the two modes of operation? However the datasheet says this: <em>Timer1 is incremented on the rising edge of the external clock input signal at the T1CKI pin, which can be synchronized to the microcontroller system clock or can run asynchronously.</em> Is there some clue or it is Microchip's those &quot;dark secrets&quot; which it would never reveal?</p>

What type of registers/timers do PIC MCUs use?

2024-03-24T11:30:33.927

707198

|ltspice|

<p>Use Meg instead of M. M is translated to m, for milli</p>

<p>I would like to create a frequency response graph of an LC resonant circuit, illustrating the attenuation (in dB) versus frequency.</p> <p><a href="https://i.stack.imgur.com/5fJNi.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/5fJNi.png" alt="enter image description here" /></a></p> <p>The generated response seems inaccurate. It begins at 10 MHz and sweeps up to 1000 MHz, but unexpectedly ends at 1 Hz.</p> <p>Additionally, the chart does not seem correct.</p> <p><a href="https://i.stack.imgur.com/0qgUD.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0qgUD.png" alt="enter image description here" /></a></p> <p>The ideal response should resemble something akin to this:</p> <p><a href="https://i.stack.imgur.com/F8cfo.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/F8cfo.png" alt="enter image description here" /></a></p> <p>Could you assist me in identifying the error in my LTspice setup?</p>

How can I draw LC resonant circuit frequency response in LTspice?

2024-03-24T11:31:46.310

707200

|feedback|

<p>This is how I would break the loop for the voltage-current feedback.The feedback network includes R1, R2, and the transistor M1. <a href="https://i.stack.imgur.com/Kc1zL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Kc1zL.png" alt="enter image description here" /></a></p>

<p>The following is a figure from 8.61 in <a href="https://electrovolt.ir/wp-content/uploads/2014/08/Design-of-Analog-CMOS-Integrated-Circuit-2nd-Edition-ElectroVolt.ir_.pdf" rel="nofollow noreferrer"><em>Design of Analog CMOS Integrated Circuit</em></a>, page 311:</p> <p><a href="https://i.stack.imgur.com/tk6ve.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/tk6ve.png" alt="enter image description here" /></a></p> <p>Here is the question: Calculate feedback <span class="math-container">\$\beta\$</span> of the following circuit:</p> <p><a href="https://i.stack.imgur.com/KR4ql.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/KR4ql.png" alt="enter image description here" /></a></p> <p>As we use the method of the book, we have to ground both of two terminal feedback network of the loop according to figure 8.61:</p> <p><a href="https://i.stack.imgur.com/HunGX.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HunGX.png" alt="strong text" /></a></p> <p><span class="math-container">$$\beta = \frac{V_{out}} {I_{in}} = R_2 \parallel R_3$$</span></p> <p>However, professor Ali Hajimiri on <a href="https://youtu.be/lWjGSSr_uMo?list=PLc7Gz02Znph-c2-ssFpRrzYwbzplXfXUT&amp;t=3568" rel="nofollow noreferrer">YouTube</a> thinks the following:</p> <p><span class="math-container">$$H_{\infty} = \frac{1} {g_{m1}} (1 + \frac{R_2} {R_2})$$</span></p>

Open the loop in voltage-current feedback

2024-03-24T11:55:53.880

707216

|power-supply|stm32|usb|usb-c|

<p>The 5K1 pull-down resistors <code>R48</code> and <code>R57</code> shown connected to <code>CC1</code> and <code>CC2</code> respectively are the <em>Rd terminations</em> described in the <a href="https://www.usb.org/sites/default/files/USB%20Type-C%20Spec%20R2.0%20-%20August%202019.pdf" rel="nofollow noreferrer">Universal Serial Bus Type-C Cable and Connector Specification</a>.</p> <p>The <em>Rd terminations</em> are part of the <em>Source-to-Sink Attach/Detach Detection</em> in the USB Type-C specification. From section <em>2.3.1 Source-to-Sink Attach/Detach Detection</em>:</p> <blockquote> <p>Power is not applied to the USB Type-C host or hub receptacle (VBUS or VCONN) until the Source detects the presence of an attached device (Sink) port.</p> </blockquote> <p>And are required to cause the Source to provide power to a USB Type-C power sink.</p> <hr /> <p>In response to the comment:</p> <blockquote> <p>So is CC2 and CC1 going low or high? – <a href="https://electronics.stackexchange.com/users/157688/euraad">euraad</a></p> </blockquote> <p>The specification listed above has the following in section <em>4.5.1.2.1 Detecting a Valid Source-to-Sink Connection</em>:</p> <p><a href="https://i.stack.imgur.com/u202B.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/u202B.png" alt="enter image description here" /></a></p> <p>Which means on the power sink:</p> <ul> <li>One of <code>CC1</code> or <code>CC2</code> will be high.</li> <li>The other <code>CCx</code> signal will be low.</li> <li>Which <code>CCx</code> pin is high and which is low indicates the orientation of the USB Type-C cable.</li> </ul> <p>The <code>Ra</code> resistors in the USB Type-C cable are specified as in the range 800 Ω to 1.2 kΩ.</p>

<p>This is a schematic where USB-C is used to power a circuit device. Notice that there are only <code>VBUS</code> and <code>CC1</code> and <code>CC2</code> (and of cource <code>GND</code>) connected to the USB-C holder.</p> <p><strong>Question:</strong></p> <p>What is the use of <code>CC1</code> and <code>CC2</code> if your USB-C connector is only going to operate as a power source? Can I not connect them to <code>GND</code> or <code>VBUS</code>?</p> <p><a href="https://i.stack.imgur.com/kYXjE.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kYXjE.png" alt="enter image description here" /></a></p> <p><strong>Update</strong></p> <p>The source of the schematic comes from <a href="https://www.st.com/en/evaluation-tools/stm32mp157d-dk1.html" rel="nofollow noreferrer">STM32MP157D MPU</a> and the direct <a href="https://www.st.com/resource/en/schematic_pack/mb1272-dk1-c03-schematic.pdf" rel="nofollow noreferrer">link</a> to the schematic.</p>

Why are CC1 and CC2 only connected to USB-C?

2024-03-24T14:03:57.783

707225

|dc|resistance|

<p>Another way to solve this is by solving the nodes' current equations.<br> First redraw the circuit, number the nodes and their voltages, then write the nodes' equations and solve <span class="math-container">\$R_{12} = x R = 10x \Omega\$</span>, the resistance asked for.</p> <p><img src="https://i.stack.imgur.com/TCtzM.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fTCtzM.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <p>The sum of currents <em>going into</em> every node is zero.</p> <p><span class="math-container">$$ \frac{U_1}{xR} + \frac{U_3-U_1}{R} + \frac{U_4-U_1}{3R} = 0 \\ \frac{U_3}{3R} + \frac{U4}{R} + \frac{-U_1}{xR} = 0 \\ \frac{U_1-U_3}{R} +\frac{U_4-U_3}{2R} + \frac{-U_3}{3R} = 0 \\ \frac{U_1-U_4}{3R} + \frac{U_3-U_4}{2R} + \frac{-U4}{R} = 0 $$</span></p> <p>Recognize that <span class="math-container">\$U_1\$</span> is the driving voltage and therefore has to end up at the right hand side of the equations.</p> <p><span class="math-container">$$ \begin{align} \frac{U_3}{R} + \frac{U_4}{3R} &amp;= -\frac{U_1}{xR} + \frac{U_1}{R} + \frac{U_1}{3R} \\ \frac{U_3}{3R} + \frac{U_4}{R} &amp;= \frac{U_1}{xR} \\ -\frac{U_3}{R} -\frac{U_3}{2R} - \frac{U_3}{3R} +\frac{U_4}{2R} &amp;= -\frac{U_1}{R} \\ \frac{U_3}{2R} -\frac{U_4}{3R} -\frac{U_4}{2R} -\frac{U_4}{R} &amp;= - \frac{U_1}{3R} \end{align} $$</span></p> <p>Multiply the top <span class="math-container">\$2\$</span> equations with <span class="math-container">\$3xR\$</span> and the bottom <span class="math-container">\$2\$</span> with <span class="math-container">\$6R\$</span> to get</p> <p><span class="math-container">$$ \begin{align} 3 x U_3 + x U_4 &amp;= ( -3 + 3x + x ) U_1 \\ x U_3 + 3 x U_4 &amp;= 3 U_1 \\ ( - 6 - 3 - 2 ) U_3 + 3 U_4 &amp;= - 6 U_1 \\ 3 U_3 + ( - 2 - 3 - 6 ) U_4 &amp;= - 2 U_1 \end{align} $$</span></p> <p>and after regrouping</p> <p><span class="math-container">$$ \begin{align} 3 x U_3 + x U_4 &amp;= ( 4 x - 3 ) U_1 \\ x U_3 + 3 x U_4 &amp;= 3 U_1 \\ 11 U_3 - 3 U_4 &amp;= 6 U_1 \\ 3 U_3 - 11 U_4 &amp;= - 2 U_1 \end{align} $$</span></p> <p>The top 2 equations give <span class="math-container">\$ -8xU_4 = (4x - 12) U_1 \$</span>, or <span class="math-container">$$ 2 U_4 = ( 3/x - 1 ) U_1 $$</span> and the lower 2 equations give <span class="math-container">\$ 112 U_4 = 40 U_1 \$</span>, or <span class="math-container">$$ 2 U_4 = \frac{40}{56} U_1 = \frac{5}{7} U_1 $$</span></p> <p>Subracting those two equations which express <span class="math-container">\$U_4\$</span> in <span class="math-container">\$U_1\$</span> from each other, gives <span class="math-container">\$ 0 = (3/x - 1 - \frac{5}{7}) U_1 \$</span>, or</p> <p><span class="math-container">$$ x = 2 - \frac{1}{4} $$</span></p> <p>Hence the equivalent resistance between terminals <span class="math-container">\$ 1 \$</span> and <span class="math-container">\$ 2 \$</span> equals <span class="math-container">\$ R_{12} = 17.50 \Omega \$</span>. (How exciting...)</p>

<p>I am preparing for an electrical engineering exam coming up and I got stuck on task C, where you have to determine the resistance between 1 and 2. How do you do that exactly? I have already solved tasks a and b.</p> <p><a href="https://i.stack.imgur.com/lF6IK.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/lF6IK.jpg" alt="enter image description here" /></a></p> <p>Well, I know you have to switch off all sources first and then determine the resistance, but somehow I can't see how I should redraw the circuit to see if it is a series or parallel circuit. I would be grateful for any tips.</p> <p>Information about the circuit R=10 ohm Uq=20V, Iq= 3A.</p>

Calculate resistance between 1 and 2

2024-03-24T15:00:13.437

707231

|diodes|identification|surface-mount|

<p>From searching on <a href="https://smd.yooneed.one/code314a.html" rel="noreferrer">The ultimate SMD marking codes database</a> for codes starting <code>1J</code> it could be a <a href="https://www.wontop.com/smd-1408614901.html" rel="noreferrer">GS1006FL</a> from Won-Top Electronics (or possibly now part of PANJIT International). This is Diode Rectifier, 600V, 1A, Vf&lt;1.1V(1A), 4pF</p> <p>The <a href="https://www.wontop.com/uploadfiles/56/sort_excel/pdf/gs1000fl.pdf" rel="noreferrer">datasheet</a> shows the marking as 1J:</p> <p><a href="https://i.stack.imgur.com/P1iar.png" rel="noreferrer"><img src="https://i.stack.imgur.com/P1iar.png" alt="enter image description here" /></a></p> <p>The package is a <code>SOD-123FL</code> which has a length of 2.60 mm (min) to 2.95 mm (max).</p>

<p>I'm having issues identifying a SMD component (the one marked with &quot;1J15&quot;). The component is a part of a differential circuit breaker. Here's the picture :</p> <p><a href="https://i.stack.imgur.com/Owbls.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Owbls.jpg" alt="enter image description here" /></a></p> <p>Its length is 2.7mm. To me, it is a diode (I tested them with a diode tester; they are dead as they are shorted).</p>

identifying an SMD component (marked as 1J15)

2024-03-24T16:03:03.047

707237

|power|pcb|current|pcb-design|

<p>Could you elaborate on why you think your calculations are wrong?</p> <p>You are on the right track with your initial approach to modeling the system, but it depends on your needed level of accuracy. Model everything as power (current * voltage), as you said.</p> <p>You should indeed include things like LEDs and the voltage regulators in your analysis. A LED could burn up to 20mA if its very bright.</p> <p>For LEDs, you should know the on current, voltage and time.</p> <p>For regulators, you know the voltage in, voltage out, current and efficiency (from the datasheet.) The efficiency is important because a linear regulator will burn a lot of power compared to a buck/boost regulator.</p> <p>Unless you have high current AC you can ignore inductors and capacitors in your model.</p> <p>You also might want to include the internal resistance of the battery.</p> <p>For any microcontrollers the datasheet should have values for its power consumption at a specified frequency. For example uA/Mhz.</p> <p>Things can get complicated when you start including misc microcontroller sub systems such as ADCs, serial ports, etc. If you know you are using these then look at the datasheet to get an idea of the power consumption.</p> <p>Does the lora device provide values for its transmit and receive power consumption? If yes, then you will need to know how long the LoRa module is on communicating int order to get a rough model.</p> <p>Then multiply everything by 10% to compensate for error :-)</p> <p>Put all of these models into a spreadsheet. The spreadsheet is a nice way to create a table of power consumption per sub system, and time.</p> <p>Modelling is helpful, but in reality, it can take weeks to do it well, and measurement is your best bet to verify your model anyway. A lot of times we will start off with a model spreadsheet, but slowly replace the theoretical numbers with real measurements.</p> <p>Measurement can be tricky at low current since many high resolution DMMs such as the Keithley's of the world can be quite expensive.</p>

<p>I have a PCB my team designed that is based on an Adafruit board (Feather M0 LoRa), makes use of several breakout boards (temp sensor, IMU, etc.), and has various other components such as LEDs, resistors, charge capacitors, and voltage regulators. I've been looking into how calculate both current draw and power draw of the PCB to determine the battery that we should be using and to get a better of idea of the power consumption of the circuit.</p> <p>My current approach to calculating current draw involves identifying the components that are expected to have the greatest impact on current consumption. I sum up their individual current consumption values as indicated on their datasheets, and then multiply this sum by the desired operational time of the PCB. This calculation gives me an estimate of the milliampere-hour (mAh) rating needed for the battery. Since some breakout boards have different power states, I plan to account for this by modeling the time spent in each state and averaging out the current consumption. This approach will help me determine the total mAh requirement for the battery.</p> <p>As for power consumption, since I know all the boards in my PCB run on 3.3V, I would just make use of <span class="math-container">\$P = IV\$</span>, where <span class="math-container">\$V = 3.3\$</span> and <span class="math-container">\$I\$</span> is the current consumption sum I calculated before.</p> <p>My question when it comes to these two calculations is if I'm even doing any of this correctly. One glaring issue with these calculations is the fact that I leave out other components that could have a hand in these results such as the LEDs, resistors, charge capacitors, and voltage regulators. I wasn't sure how they played a part in here so I left them out. I also think my power draw calculations are just flat out wrong. If anyone has some insight or experience in this, I would appreciate the help a lot.</p>

How to calculate the power draw and current draw of a PCB

2024-03-24T17:11:20.557

707243

|circuit-design|rf|oscillator|oscillation|

<p>With help of transistor gain you need to add more energy to LC tank than is lost per one oscillation.</p> <p>Another condition is to add this energy at the right time, in particular section of sine, depends on if it is going about series or parallel tank.</p>

<p>Circuit simulation software helps out many times from hard mathematical formulas. I designed most of the RF circuits with the help of LTS and Proteus. I have seen that they are good equally, but have sometimes different approaching how the circuit reacts at certain changes. Recently, I researched on internet for the law of oscillation, but ended up with many theories. As you can guess, I develop RF circuits in practical sense for my own use.</p> <p>Below is a circuit, I want to develop. I know the formulas of angular frequency of LC tank circuit and I know several oscillators. I have even used many calculators on internet for the parts of RF circuits, but I can not reason that this circuit oscillates in LTS, but not in Proteus. As I predicted before, they are equally good and finally I want to reveal the secret of continuous oscillation. Can you fill out the missing values for the circuit below with mentioning the procedure or reasoning? I want to be independent from use of simulation software.</p> <p><a href="https://i.stack.imgur.com/T5nAN.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/T5nAN.png" alt="circuit" /></a></p> <p>Edit:</p> <p>This circuit oscillates in LTS, but not in Proteus.</p> <p><a href="https://i.stack.imgur.com/6gFVg.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6gFVg.png" alt="lts" /></a></p> <p>LTS .asc file:</p> <pre><code>Version 4 SHEET 1 4128 680 WIRE 288 -576 80 -576 WIRE 720 -576 288 -576 WIRE 288 -544 288 -576 WIRE 288 -544 256 -544 WIRE 336 -544 288 -544 WIRE 256 -496 256 -544 WIRE 384 -480 336 -480 WIRE 720 -480 720 -576 WIRE 336 -416 336 -432 WIRE 256 -400 256 -416 WIRE 304 -400 256 -400 WIRE 336 -400 336 -416 WIRE 336 -400 304 -400 WIRE 304 -368 304 -400 WIRE 640 -368 640 -432 WIRE 640 -368 304 -368 WIRE 816 -368 640 -368 WIRE 80 -352 80 -576 WIRE 304 -320 304 -368 WIRE 384 -304 384 -480 WIRE 240 -272 80 -272 WIRE 720 -224 720 -400 WIRE 80 -192 80 -272 WIRE 304 -192 304 -224 WIRE 384 -192 384 -240 WIRE 384 -192 304 -192 WIRE 304 32 304 -192 WIRE 80 192 80 -128 WIRE 304 192 304 112 WIRE 304 192 80 192 WIRE 720 192 720 -144 WIRE 720 192 304 192 WIRE 304 336 304 192 FLAG 304 336 0 FLAG 640 -432 antenna FLAG 816 -368 out SYMBOL ind 272 -512 M0 SYMATTR InstName L1 SYMATTR Value 1µ SYMBOL cap 352 -544 M0 SYMATTR InstName C1 SYMATTR Value 100n SYMBOL npn 240 -320 R0 WINDOW 3 12 112 Left 2 SYMATTR Value BC547B SYMATTR InstName Q1 SYMBOL cap 368 -304 R0 SYMATTR InstName C2 SYMATTR Value 330n SYMBOL res 64 -368 R0 SYMATTR InstName R2 SYMATTR Value 47k SYMBOL voltage 720 -240 R0 WINDOW 123 24 44 Left 2 WINDOW 39 24 72 Left 2 SYMATTR Value2 AC 1 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL cap 64 -192 R0 WINDOW 3 29 49 Left 2 SYMATTR Value 1n SYMATTR InstName C3 SYMBOL res 288 16 R0 SYMATTR InstName R3 SYMATTR Value 100 SYMBOL cap 352 -480 M0 SYMATTR InstName C5 SYMATTR Value 100n SYMBOL res 704 -496 R0 SYMATTR InstName R5 SYMATTR Value 100 TEXT 768 72 Left 2 !.tran 0 5m 4.9m 10u startup </code></pre>

What is the rule for continuous oscillation of an RF circuit with integrated LC?

2024-03-24T17:45:52.673

707245

|operational-amplifier|capacitor|amplifier|audio|headphones|

<p>There is a type of chips called headphone amplifiers.</p> <p>Some of them work from single supply and can generate a negative supply for DC coupled output.</p> <p>They are available from multiple manufacturers.</p>

<p>As the title says, I'd like a combined line/headphone audio output with the following design criteria:</p> <ol> <li>ideally driven from 5V single supply (12V available, but noisy)</li> <li>flat frequency response, also in the bass spectrum</li> <li>avoid electrolytic caps if possible due to size constraints</li> <li>minimal current draw while connected to line input (instead of headphones)</li> <li>SMD components only</li> </ol> <p>The options I see are:</p> <ol> <li>power amp chip with ground-referenced output (LM386, LM4871, MC34119)</li> <li>power amp chip with differential output (e.g. LM4871)</li> <li>parallel regular opamps (e.g. all 4 units of an MCP6004 driving the same output through 100 ohm resistors)</li> </ol> <p>Regarding option 1, a large AC coupling cap is needed in order to maintain adequate bass levels. In my tests, around 1000 µF or more do the trick, but of course this means electrolytic caps. Also, these circuits have a low value resistor to ground, which means unnecessarily high current draw while driving a line input.</p> <p>Option 2 is attractive because it eliminates the need for a large coupling cap (as well as large decoupling caps), but if this is going to be used as a line output, I couldn't connect the sleeve contact of the output socket to one of the differential outputs, otherwise it will be shorted to ground by the next device in line. I could, as I understand it, connect either of the differential outputs to the tip/ring contact, and the sleeve to ground, but this configuration then needs a similar cap/resistor combo as option 1, right?</p> <p>Option 3 has actually performed best in my tests, but I still have the same output capacitor problem. I'm not a fan of adding a negative supply via a voltage inverter chip, but as far as I see it, this would allow me to use a dual supply opamp and I wouldn't need an output coupling cap at all.</p> <p>Any thoughts on this situation? Anything I may be missing?</p>

Options for line output doubling as headphone output

2024-03-24T17:56:16.583

707248

|texas-instruments|solar-charge-controller|

<blockquote> <p>Is TI lying ...</p> </blockquote> <p>Almost definately not.</p> <blockquote> <p>... or over selling their solar charging ICs?</p> </blockquote> <p>Not likely either, though it could be an honest mistake - feel free to contact TI for clarification on this point.</p> <blockquote> <p>the evaluation board for the IC cost around $160</p> </blockquote> <p>To give you wider context, this is <em>not</em> an expensive evaluation board.</p> <hr /> <p>The <em>feature</em> that is listed and you're taking objection to is &quot;<em>Solar input/MPPT</em>&quot;, which could be read as &quot;<em>Solar input <strong>or</strong> MPPT</em>&quot; (e.g: &quot;<em>Li-Ion/Li-Polymer</em>&quot; as listed in the cell chemistry parameter). The BQ25703A has a nice wide input voltage range (3.5v to 24v), and supports both buck and boost modes of operation... therefore it's a very good candidate for use in low voltage solar systems.</p> <p>When it comes to MPPT (i.e: <a href="https://en.wikipedia.org/wiki/Maximum_power_point_tracking" rel="nofollow noreferrer">Maximum Power Point Tracking</a>), this is about finding the optimal balance between current and voltage... Item 5 of the first page of the datasheet is &quot;<em>Input Current and Voltage Regulation</em>&quot;, with &quot;<em>±2% Input/Charge Current Regulation</em>&quot; and &quot;<em>±5% Power Monitor</em>&quot; listed further down. It even says &quot;<em>Input Current Optimizer (ICO) to Extract Max Input Power</em>&quot;!</p> <p>This part also has <code>ACP</code> and <code>ACN</code> pins to sense the input current, along with <code>SRP</code> and <code>SRN</code> for the battery current as shown on the first page of the datasheet, and it looks like this is available as a buffered analog signal (see <code>IADPT</code> and <code>IBAT</code>), or via I2C too.</p> <p><img src="https://i.stack.imgur.com/0jHQd.png" alt="application diagram, with the current sense resistor circled" /></p> <p>I'm not going to sit here and fully understand the part for you, but a quick skim through shows that the charge current can be regulated to a resolution of 64mA (64mA through to 8.128 A - see Section 8.6.3)...</p> <p>All of this just reinforces the potential for using this part in a system that implements MPPT... it equips you for the job, have at it!</p> <p>You'll often find that buzz-words and acronyms like &quot;<em>MPPT</em>&quot; are useful for the high-level summary view, but when you get into the deeper technical details, other words and phrases start to take their place. Don't forget, that the list of features presented on the website will be produced by very different people to the technical content in datasheets.</p>

<p>I came across the BQ25703A IC on TI's <a href="https://www.ti.com/power-management/battery-management/charger-ics/products.html#1152=2%3B5&amp;%7E2192=Power%20Path%3BSolar%20input%2FMPPT&amp;sort=2192;desc&amp;" rel="nofollow noreferrer">webiste</a>. It clearly shows Solar input/MPPT. However, there is no mention of this in their datasheet.</p> <p>So am I missing something or is TI lying and overselling this IC?</p> <p><strong>Datasheet:</strong></p> <p><a href="https://www.ti.com/lit/ds/symlink/bq25703a.pdf?ts=1711302833530&amp;ref_url=https%253A%252F%252Fwww.ti.com%252Fpower-management%252Fbattery-management%252Fcharger-ics%252Fproducts.html" rel="nofollow noreferrer">BQ25703A</a></p> <p><a href="https://i.stack.imgur.com/MyvC6.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MyvC6.png" alt="enter image description here" /></a></p>

Is TI lying or over selling their solar charging ICs?

2024-03-24T18:10:17.630

707273

|filter|transfer-function|high-pass-filter|nodal-analysis|

<p>The transfer function determined by <em>periblepsis</em> correctly shows a zero at the origin with a pole breaking the +1 slope to 0. The gain at high frequency then plateaus slightly below 1 with the adopted components values. By using the fast analytical circuits techniques or FACTs as described in my last <a href="https://rads.stackoverflow.com/amzn/click/com/1960405195" rel="nofollow noreferrer" rel="nofollow noreferrer">book</a>, you can get to the transfer function without writing a line of algebra, by dividing the original circuit in small intermediate steps you can <em>inspect</em>:</p> <p><a href="https://i.stack.imgur.com/jkTPo.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/jkTPo.png" alt="enter image description here" /></a></p> <p>You first realize that for <span class="math-container">\$s=0\$</span>, there is no gain as <span class="math-container">\$C_1\$</span> acts like a dc-block component so <span class="math-container">\$H_0\$</span>=0. Then, you turn the excitation off - set <span class="math-container">\$V_{in}\$</span> to 0 V and replace it by a short circuit - and determine the time constant of this 1st-order circuit. The inverse of the time constant is the pole you want. Then, determine the high-frequency gain <span class="math-container">\$H^1\$</span> and apply the generalized formula I give. Factor the <span class="math-container">\$s\$</span>-term in the numerator as well as in the denominator and you now have a transfer function expressed in a <em>low-entropy</em> form, with a gain as the leading term and an inverted pole for the most compact notation.</p>

<p>I've already done the calculations myself, but I am getting a completely wrong answer for the poles and zeros. I'm not sure what I am doing wrong. If someone could point out my mistake please I would greatly appreciate it.</p> <p><a href="https://i.stack.imgur.com/CiT8b.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CiT8b.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/b49bh.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/b49bh.png" alt="enter image description here" /></a></p>

Finding transfer function of high-pass circuit

2024-03-24T23:28:35.597

707281

|arduino|transistors|circuit-analysis|usb|switches|

<p>This circuit may serve your purposes</p> <p><img src="https://i.stack.imgur.com/KdzFV.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fKdzFV.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <p>If the CNTRL input is below 4.3 V, the LED will be on. If the CNTRL input is above 4.3 V, the LED will be off. If you need the threshold voltage to be lower, it can be done, but the circuit will require at least one more component.</p> <p>This next circuit switches at a lower voltage, but the switching occurs over a much wider range. Since you stated that the input was a square wave, this shouldn't be a significant problem.</p> <p><img src="https://i.stack.imgur.com/g0Quz.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fg0Quz.png">simulate this circuit</a>}</p> <p><a href="https://i.stack.imgur.com/k4RzQ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/k4RzQ.png" alt="enter image description here" /></a></p> <p>If you want the LED to be brighter (either circuit), you can reduce the size of R1, but if you go too low, you may burn out the LED.</p>

<p>I want to construct a circuit that contains a transistor and a LED. I have a supply square wave input voltage(0-5v). Help me to construct a circuit when input is 0v ,if LED on and input is 5v then LED off.</p>

Transistor as a switch with square wave input

2024-03-25T01:15:48.667

707286

|arduino|mosfet|led|dimming|

<p>An IRF540 has a threshold voltage which ranges from 2.0 V to 4.0 V. If your Arduino Uno drives the gate to 5 V, and the threshold is 4.0 V, the MOSFET will conduct, but will still have considerable resistance. This will cause heating, and may cause the MOSFET to fail. You should use a MOSFET driver to boost both the voltage and current from the levels available from the UNO to the levels required by the MOSFET. I suggest driving the gate to at least 7 V, if not higher.</p> <p>In addition to possibly needing a higher gate voltage, the current available from a GPIO pin from an Arduino Uno is probably insufficient to turn the MOSFET on <strong>FAST</strong>. This is especially true when using the MOSFET to switch a high voltage (like 70 V!). When a MOSFET turns on slowly it heats up more, again risking failure. The small current available from the GPIO pin has another problem when driving a power MOSFET. Without a resistor between the GPIO pin and the gate of the MOSFET, the GPIO pin might burn out.</p>

<p>I've tried dimming led using driver(model jls-7265-50w) and using simple circuit with mosfet IRF540 transistor on output of driver. But this circuit didn't work well. When i decreasing pwm around pwm = 80 , led start blinking. and mosfet transistor started heating while blinking. then mosfet burnt out.</p> <p>I used this circuit before on 12V led to dimming and it worked well.</p> <p>I think problem is in led driver</p> <p>how can i dimming high power led using mosfet powered by led driver?</p> <p>thank you guys and pls forgive about my english . I'am still learning.</p> <p><a href="https://i.stack.imgur.com/1zdyE.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/1zdyE.png" alt="enter image description here" /></a></p>

Dimming for high power led

2024-03-25T02:19:51.527

707306

|capacitor|ltspice|inverter|switching|bootstrap|

<blockquote> <p><em>What could be the reason for this problem on the capacitor? what should I do ?</em></p> </blockquote> <p>You are chasing shadows.</p> <p>The capacitors are doing what they are meant to do i.e. when the relevant low-side MOSFET turns on, the capacitor is charged up to 12 volts minus 1 diode drop (call it 11 volts) then, when the lower MOSFET disengages and the upper MOSFET starts to come into play, the voltage across the capacitor remains about 11 volts so that it can provide adequate voltage to lift the upper MOSFET's gate about 11 volts higher than its source (the output).</p> <p>I will add this; the presence of R4 and R6 is not conducive to fully deactivating the upper MOSFETs so, why don't you use proper drivers? <a href="https://www.electronics-lab.com/bootstrap-circuit-buck-converter-explained/" rel="nofollow noreferrer">Here's an article</a> that gives more details about bootstrapping upper MOSFETs: -</p> <p><a href="https://i.stack.imgur.com/GmWxX.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/GmWxX.png" alt="enter image description here" /></a></p> <p>Note that they use a driver circuit that <strong>does not</strong> try to drag down the upper MOSFET's gate to 0 volts but, instead, shorts the gate to its source. This protects the MOSFET from damage due to excessive gate-source voltages. This is why I recommend that you use a proper driver chip.</p>

<p>The inverter circuit I made from N-channel MOSFETs is given below. I used bootstrap for the high sides. Bootstrap capacitors are C3 and C1.</p> <p>The gate voltage of the MOSFET is working properly, the output seems fine, but capacitors C3 and C1 always remain stable around 11 V.</p> <p>In the picture below where the measurements are made, the red color belongs to the C3 capacitor, you can see that it is going straight. I can only see very minimal changes when I zoom in. The zoomed measurement is also available below.</p> <p>I made changes in the switching times and capacitance values, but the result is still the same. Additionally, I simulated the bootstrap circuit (using only PWM, transistor, 12 V voltage source, diode and a capacitor) separately and I could not see much voltage change on the capacitor.</p> <p>What could be the reason for this problem on the capacitor? What should I do?</p> <p><a href="https://i.stack.imgur.com/upTio.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/upTio.png" alt="enter image description here" /></a></p> <p>Source: My own study</p> <p><a href="https://i.stack.imgur.com/JwXhY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JwXhY.png" alt="enter image description here" /></a> Source: My own study</p> <p><a href="https://i.stack.imgur.com/k5IBn.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/k5IBn.png" alt="enter image description here" /></a> Source: My own study</p>

Simulation of high side N-channel MOSFET with Bootstrap in LTspice

2024-03-25T09:02:00.350

707307

|terminology|

<p>This question cannot be answered without the context. Each context may have its own <a href="https://en.wikipedia.org/wiki/Jargon" rel="nofollow noreferrer">jargon</a> for these signals.</p> <p>Some signals are meant to be read as they are. True and False are the simplest logical labels for single signals.</p> <p>Some signals are intended to be subject to further logic by wire-ORing or ANDing by being connected to other similar outputs. This separates the intention of driving any particular source, and the value that is read from that logic operation, and complicates the naming.</p> <p>Often, and especially in the old TTL days, negative logic was used for practical electrical reasons, and 'driven' meant low voltage, an instant source of confusion.</p> <p>A (non exhaustive) list of possible pairs of words to use includes<br /> True and False<br /> 0 and 1<br /> High and Low (Hi and Lo)<br /> Active and Inactive/Passive<br /> Driven and Undriven<br /> Asserted and Deasserted/Unasserted<br /> Mark and Space<br /> Dominant and Recessive</p> <p>I'm sure there are pairs I have missed, and more pairs to be created by system designers anxious to avoid the confusion of previous usage <a href="https://xkcd.com/927/" rel="nofollow noreferrer">xkcd almost but not quite relevant</a></p>

<p>I'll keep it simple:</p> <ul> <li>The two states are called <strong>HIGH</strong> and <strong>LOW</strong> (and in some cases <strong>HIGH-Z</strong>, but not relevant here)</li> <li>For <strong>ACTIVE-HIGH</strong> signals, the state <strong>HIGH</strong> corresponds to the <strong>ACTIVE</strong> state; How would you call the state <strong>LOW</strong>?</li> </ul> <p>Maybe in this case, instead of calling the states <strong>ACTIVE</strong> and <strong>???</strong>, it would be more suitable to call them <strong>ON</strong> and <strong>OFF</strong>?</p> <hr /> <p>As comments suggest, this highly depends on the context. Just to give some context, I am writing a <strong>digital input-output driver</strong> where the user can define whether the signal is active-high or active-low.</p> <p>And then when reading or writing the signal, I don't want to use words HIGH and LOW because they obfuscate the intended configuration (active-high and active-low). My first thought was to use the words ACTIVE and INACTIVE, but the word INACTIVE is something I have not seen very often (if any), hence the question.</p>

What is the terminology for the opposite of the "active" state?

2024-03-25T09:11:29.130

707313

|circuit-analysis|circuit-design|simulation|proteus|

<p>Your simulation applies 12 volts instantly to an uncharged capacitor thus, dv/dt is theoretically infinite and, the theoretical current into the ideal capacitor is also infinite. The reason why the simulator doesn't give &quot;infinite&quot; results is because it has a minimum time step that varies depending on how you use the tool.</p> <p>In short, don't ask simulators to do things that will theoretically produce infinite and impractical results. Other things you should be aware of: -</p> <ul> <li>Most simulators like to have at least one node labelled GND</li> <li>Voltage generators may contain a default series impedance of 1 milli ohm</li> <li>I milli ohm would produce an initial current of 12,000 amps when the voltage is 12 volts</li> </ul>

<p>I drew a simple circuit and looked at the analogue graph. Ic drops from 12kA to 24nA after 200 us.</p> <p><a href="https://i.stack.imgur.com/6U5hx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/6U5hx.png" alt="enter image description here" /></a> I changed the start and end time of the same graph. But I looked again, Ic drops from 12kA to 24nA after 40 ns. <a href="https://i.stack.imgur.com/AZLCx.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/AZLCx.png" alt="enter image description here" /></a> I don't understand, this programme cannot show the change in current or voltage in real time. Or it only shows the shape of the change. Or what did I do wrong?</p>

Proteus Simulation Program-Analogue Graph

2024-03-25T10:09:30.697

707319

|ethercat|

<p>The COL/GPIO2 pin sets the PHY address.</p> <p>As you cannot have two PHYs with same address on the MDIO bus, they need to be set into two different addresses as per the schematics.</p> <p>This in no way sets or affects the duplex mode of the PHY.</p>

<p>When using a ET1100 and two PHY I noticed on the TMS320F28388d control card that one of the PHY is configured in Half-Duplex (pull up/down on the COL pin).</p> <p>It would be good to take a look at the TMDSECATCNCD379D schematics, but it is not available.</p> <p>Is there any reason why both PHY are not similar?</p> <p><a href="https://i.stack.imgur.com/nBFBj.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/nBFBj.png" alt="enter image description here" /></a></p>

EtherCAT Half/Full-Duplex?

2024-03-25T11:25:29.413

707323

|diodes|identification|repair|bms|

<p>It is a <a href="https://www.fagorelectronica.com/site/templates/resources/semiconductores/data-sheets/fss1.pdf" rel="nofollow noreferrer">FSS16 HE3 TRT*</a> diode from FAGOR. I suggest HE3 suffix as you mentionned that your board is manufactured by Bosch (automotive).</p> <p>Explanation of the marking available <a href="https://www.fagorelectronica.com/site/assets/files/6359/fagor-marking.pdf" rel="nofollow noreferrer">here</a> <a href="https://i.stack.imgur.com/NBa64.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/NBa64.png" alt="enter image description here" /></a></p>

<p><a href="https://i.stack.imgur.com/JrQDz.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JrQDz.jpg" alt="enter image description here" /></a></p> <p>I am currently trying to repair a Bosch BMS from an ebike and found a shorted diode so far.</p> <p>I can't figure out what exact model the diode is can anybody help me to identify it?</p>

What is this shorted diode from a Bosch BMS for an eBike?

2024-03-25T12:19:13.620

707333

|ac|pulse|signal-conversion|

<p>Since 1m/s is the lowest you want to measure, and assuming a very strong wind will be 30m/s, the corresponding voltages are 0.6V and 18V respectively. Frequency range is 1.7Hz to 60Hz.</p> <p>Presumably the anemometer is going to be far (more than 1m) from the measurement circuit, so you will probably need a differential amplifier to eliminate noise picked up in the anemometer cables:</p> <p><img src="https://i.stack.imgur.com/nG688.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fnG688.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <p>The diodes clamp the input signal to stay between -0.7V and +4V, which keeps the op-amp inputs withing their acceptable common mode range, 0V to +1.8V with this single +3.3V supply.</p> <p>While the input is between those limits, this amplifier has a gain of 0.5, centered around +1V (set by R5 and R6). I chose +1V to lie about half way between the input limits. <span class="math-container">\$V_X\$</span> should be a low noise copy of the voltage across the anemometer, offset by +1V:</p> <p><span class="math-container">$$ V_X = \frac{1}{2}(V_B - V_A) + 1\rm{V} $$</span></p> <p>C1 and C2 turn this arrangement into a low-pass filter, attenuating signal components above 100Hz, further reducing noise. Connect the output X here to the input of the next stage...</p> <p>I'll use the other LM358 in the package as a comparator, detecting the crossing of <span class="math-container">\$V_X\$</span> through the mean of +1V. We can also employ hysteresis to improve noise rejection, and to ensure fast switching even when the input signal slews very slowly:</p> <p><img src="https://i.stack.imgur.com/U77FK.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fU77FK.png">simulate this circuit</a>}</p> <p>R8 and R9 set the switching threshold at 1V, and R10 modulates that slightly with positive feedback, for hysteresis of about 50mV.</p> <p>The LM358 high output will fall far short of the full 3.3V, making it unsuitable to drive a GPIO input directly. Q1 ensures that the output swings all the way between 0V and +3.3V.</p> <p>If you use a rail-to-rail output op-amp, you can connect its output directly to the GPIO, and dispense with R11, R12 and Q1.</p>

<p>I want to digitize the signal from an analogue anemometer (windspeed meter), so I can log with a Raspberry Pi etc.</p> <p>The anemometer outputs an AC signal, where both the frequency and amplitude are a linear function of the RPM of the rotor (and hence windspeed).</p> <p>The anemometer is from the 1960s, but is the same manufacturer as this one, and looks very similar or identical <a href="https://www.munroinstruments.com/product/im124-cup-anemometer/" rel="nofollow noreferrer">https://www.munroinstruments.com/product/im124-cup-anemometer/</a>.</p> <p>I found some data about its characteristics from this paper <a href="https://www.researchgate.net/publication/324271921_Response_Characteristics_of_Anemometers_Used_in_New_Zealand" rel="nofollow noreferrer">https://www.researchgate.net/publication/324271921_Response_Characteristics_of_Anemometers_Used_in_New_Zealand</a></p> <p>According to an email from the manufacturer, it consists of a 6 pole permanently-magnetised rotor that spins in a coil.</p> <p>f = (U / 0.5012 ) - 0.3388</p> <p>V = U / 1.66</p> <p>Where f is frequency in Hz, U is windspeed in m/s, V is Vp volts. These are experimentally-derived, so approximate, but with zero wind/rotation of the anemometer, the output signal will have zero amplitude.</p> <p>I would like to be able to digitise as low wind speeds as possible. less than 1 - 1.5 m/s would be an acceptable threshold to start detecting pulses and measure wind speed.</p> <p>My first thought is to try and convert the AC to binary pulses of 0 or 3.3V, detect these with the Raspberry Pi, and then using software calculate the frequency and hence wind speed.</p> <p>I would have the Raspberry Pi handy for powering the circuit for signal processing, so 3.3V or 5V DC.</p> <p>I'm not sure on the best way to convert the AC to digital pulses, given the wide voltage range. I'd like the pulses to be detected at as low wind speed as possible, so I have data over more ranges of wind speed.</p> <p>p.s. Added some info based on some helpful comments.</p>

Convert 0-12V AC signal to 3.3V binary pulses

2024-03-25T13:30:17.413

707335

|power-supply|flipflop|

<p>If you operate a component above the absolute maximum voltage specified in a datasheet, then you should not be surprised if the component is <strong>damaged</strong>. If you operate a component above the maximum recommended operating voltage, it shouldn't be damaged, but you should not be surprised if the component <strong>does not work according to specification</strong>, i.e. it may make errors etc.</p> <p>It may if fact work properly, but it may not. That is what the maximum recommended operating voltage specification in the datasheet is telling you.</p>

<p>I have a PCB application, which utilizes a very small and tightly packed PCB, featuring a D-flip flop with a Schmitt-triggered inverted output, specifically the <a href="https://www.ti.com/lit/ds/symlink/sn74aup1g80.pdf" rel="noreferrer">SN74AUP1G80</a> from TI.</p> <p>The datasheet states that the <em>Absolute Maximum Voltage</em> is 4.6V, while the <em>Recommended Maximum Operating Voltage</em> is 3.6V. However, I am using a LiPo battery that reaches a maximum voltage of 4.2V when fully charged, and I need to power the flip flop.</p> <p>My concern is whether it's acceptable to power the flip flop directly with the battery voltage, given that I don't have any space available for a regulator.</p>

Is it ok to supply power over recommended, but under maximum rating?

2024-03-25T14:04:46.133

707341

|operational-amplifier|diodes|protection|circuit-protection|buffer|

<p>To determine this, take a look at the Absolute Maximum Ratings in the datasheet. <a href="https://i.stack.imgur.com/VxmN7.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VxmN7.png" alt="enter image description here" /></a></p> <p>When the maximums are specified directly in volts, you can usually drive those inputs without VCC. When there are ESD diodes, the ratings will be relative to VCC/GND.</p> <p>You do have to be careful that you don't end up with the new version of the chip where ESD diodes were added to the inputs or another change was made. Hobby grade board assemblers do not always provide the exact part specified in their inventory.</p>

<p>I have a circuit powered by 12V that accepts an input signal of 0V to 10V. The circuit shall act as a buffer to the signal, with an added LED indicator. In certain circumstances, the circuit itself may not be powered and in this case, it shall pass on the unbuffered signal, and use the power from the signal itself to drive the LED.</p> <p>This is what I've come up with:</p> <p><a href="https://i.stack.imgur.com/RnGAB.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/RnGAB.png" alt="circuit" /></a></p> <p>Now it works beautifully both in the simulation and in real life, but I'm wondering whether there is a chance of damaging the opamp. When the opamp is unpowered (Vsupply = 0V), the inverting inputs see a much higher voltage than the supply, and internal clamping diodes will not work. Also, what about the outputs, will they be safe if a voltage is applied?</p> <p>I thought about current limiting, but I don't really see how I could do that in this situation. I'm open to a different opamp type that will withstand this type of abuse. I know the OPA121 does, but unfortunately it's not available at my chosen PCBA manufacturer.</p> <p>Is there any change to the circuit that would make it safe with an LM358, or are there other types of opamp that are better suited?</p>

Will voltage at the inputs/outputs destroy an unpowered opamp?

2024-03-25T14:24:26.887

707351

|led|circuit-design|comparator|low-battery|

<p>There is no need to add any circuitry. The inputs can withstand -0.3V to +36V regardless of whether supply voltage is applied or not, and even without current limiting.</p> <p>Many other comparators (such as CMOS ones) do <strong>not</strong> have this feature.</p> <p>Adding a diode can cause problems such as lifting the supply voltage or inaccuracy because of diode leakage (the latter being more a more likely malign effect in your case- if a Schottky diode is used).</p>

<p>I'm working on a battery powered device and would like an LED to come on when the battery is getting low. In the given schematic, the LED is a red LED having a forward voltage of 2V, <a href="https://www.digikey.com/en/products/detail/LTL-307EE/160-1701-ND/140833" rel="nofollow noreferrer">Lite-On product number LTL-307EE</a>. I've come up with the following quick and dirty design to check it out:</p> <p><a href="https://i.stack.imgur.com/2iZDg.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/2iZDg.png" alt="Comparator Schematic" /></a></p> <p>The battery passes through a switch (so it's not always on), and then a 3V3 buck-boost supply to run the system. I only want the LED to come on when the system is powered and the battery is below a certain threshold (3.4V in the design below for prototyping).</p> <p>I'm using an <a href="https://www.ti.com/lit/gpn/lm393" rel="nofollow noreferrer">LM393</a> as I have some available and have made sure to attenuate the inputs to not exceed the input limits (Vcc - 2V).</p> <p>My concern is that when the system is unpowered, the battery will still be feeding up to 4.2V into one of the comparator inputs. The other inputs will be floating about. The current will be very low (uA) but is this likely to cause damage? If so, is there a way to add protection to this design?</p> <p>Also, is there a better option for the comparator? The input voltage limit on the LM393 is a bit restrictive at such a low supply voltage.</p>

Unpowered LM393 Comparators

2024-03-25T16:32:00.040

707353

|arduino|circuit-design|debounce|

<p>If the input is low for a long time for the RC circui to settle, then inverter output is high. So when the actual input goes high, the AND gate goes high, but soon the RC circuit settles and inverter output goes low and so does AND output.</p> <p>On the other hand, if input is high for a long time, inverter output will be low after RC circuit settles, so AND output is also low. If there are short low states on the real input, nothing happens.</p> <p>So it is just selective to edges, states and pulse timing.</p> <p>What the advantage of such a circuit is depends on what kind of signal source you intend to give it as an input, and since that is unknown, nothing can be said about the advantage or even suitability of this circuit for that purpose.</p>

<p>I stumbled upon this part of the <a href="https://content.arduino.cc/assets/ArduinoPortentaEdgeControl.PDF" rel="noreferrer">schematic</a> (page 2) of the Arduino Portenta Edge Control (shown below), which – in my eyes — seems to be a debounce circuit, but more complex than the one shown in <a href="https://www.ti.com/video/5840441551001" rel="noreferrer">this TI video</a>.</p> <p><a href="https://i.stack.imgur.com/CBBRc.png" rel="noreferrer"><img src="https://i.stack.imgur.com/CBBRc.png" alt="Portenta Edge Control Debounce Circuit?" /></a></p> <p>It uses an inverting Schmitt Trigger, which is fed into an AND gate, which in turn controls an N-Channel MOSFET.</p> <p>As I understand, the truth table for the AND Gate would be:</p> <div class="s-table-container"><table class="s-table"> <thead> <tr> <th>IRQ_C_CHn</th> <th>AND Input 1</th> <th>AND Input 2 (Schmitt output)</th> <th>AND Output</th> </tr> </thead> <tbody> <tr> <td>LOW</td> <td>LOW</td> <td>HIGH</td> <td>LOW</td> </tr> <tr> <td>HIGH</td> <td>HIGH</td> <td>LOW</td> <td>LOW</td> </tr> </tbody> </table></div> <p>For me, it seems unlikely that the AND-Gate output would experience a state change, so how does this circuit works?</p> <p>As a bonus question: what are its advantages over a classic RC + Schmitt-Trigger circuit?</p>

How does this debounce circuit (from Arduino Portenta Edge Control) works?

2024-03-25T16:38:38.427

707358

|arduino|circuit-analysis|square|tachometer|

<p>You have an 5V MCU.</p> <p>It expects a 5V signal.</p> <p>It won't see a 3V signal properly, and you are not allowed to give it more than 5V or you will damage the MCU with overvoltage.</p> <p>You also haven't connected the signal generator ground to MCU. Either it is connected via some other route (through mains plugs and/or other cabling) or it is floating so it won't work due to being unconnected.</p>

<p>Long time user, first time poster. I've started to fiddle around with Arduinos and electronics and I still have a hard time grasping some of the basic concepts sadly. Here is my issue.</p> <p>I have this setup right now which works right as long as the square wave voltage is at 3 V. When I get to the 10-12 V range it starts calculating the wrong thing. I currently simulate the Tach signal via a signal generator that produces a square wave, but the real sensor itself will provide a square wave (50% duty cycle) with a voltage of 12 V and will pulse at 4 pulse per rotation.</p> <p>eg : 1600 RPM = 106.667 Hz (1600*4/60)</p> <p><img src="https://i.stack.imgur.com/P29VM.png" alt="Wiring diagram" /></p> <p>I feel like I'm wired wrong but can't find he issue. I also tried to put a buck converter on the tach signal to no avail. I read about voltage dividers but don't fully grasp where it would go.</p> <p>I'm using a arduino nano right now which doesn't really change anything to this issue I think. Also use a SH1106_128X64 OLED in case someone wants to test it. Here is the full code I run which I don't think is the source of the problem.</p> <p>The overall logic is an interupt that counts pulses (FALLING) on PIN2 and calculates the RPM every 200 µs.</p> <pre><code>#include &lt;Arduino.h&gt; #include &lt;stdlib.h&gt; #include &lt;U8g2lib.h&gt; #include &lt;math.h&gt; U8G2_SH1106_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); //U8G2_SSD1306_128X64_NONAME_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // '0', 20x24px const unsigned char epd_bitmap_0 [] PROGMEM = { 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f }; // '2', 20x24px const unsigned char epd_bitmap_2 [] PROGMEM = { 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0xf0, 0xff, 0x0f, 0xf0, 0xff, 0x0f, 0xf0, 0xff, 0x0f, 0xf0, 0xff, 0x0f, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f }; // '1', 20x24px const unsigned char epd_bitmap_1 [] PROGMEM = { 0xff, 0x0f, 0x00, 0xff, 0x0f, 0x00, 0xff, 0x0f, 0x00, 0xff, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xff, 0xff, 0x00, 0xff, 0xff, 0x00, 0xff, 0xff, 0x00, 0xff, 0xff, 0x00 }; // '3', 20x24px const unsigned char epd_bitmap_3 [] PROGMEM = { 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f }; // '4', 20x24px const unsigned char epd_bitmap_4 [] PROGMEM = { 0x00, 0xff, 0x0f, 0x00, 0xff, 0x0f, 0x00, 0xff, 0x0f, 0x00, 0xff, 0x0f, 0xf0, 0xff, 0x0f, 0xf0, 0xff, 0x0f, 0xf0, 0xff, 0x0f, 0xf0, 0xff, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f }; // '5', 20x24px const unsigned char epd_bitmap_5 [] PROGMEM = { 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f }; // '6', 20x24px const unsigned char epd_bitmap_6 [] PROGMEM = { 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0x00, 0x00, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f }; // '8', 20x24px const unsigned char epd_bitmap_8 [] PROGMEM = { 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f }; // '9', 20x24px const unsigned char epd_bitmap_9 [] PROGMEM = { 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f }; // '7', 20x24px const unsigned char epd_bitmap_7 [] PROGMEM = { 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0xff, 0xff, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f, 0x00, 0xf0, 0x0f }; // 'BG_Top', 128x32px const unsigned char epd_bitmap_BG_Top [] PROGMEM = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x70, 0x00, 0x00, 0x1f, 0x00, 0xe0, 0x03, 0x00, 0x70, 0x00, 0x80, 0x0f, 0x00, 0xf8, 0x1b, 0x00, 0x60, 0x00, 0x00, 0x18, 0x00, 0x00, 0x03, 0x00, 0x78, 0x00, 0x80, 0x01, 0x00, 0x18, 0x1b, 0x00, 0x60, 0x00, 0x00, 0x1e, 0x00, 0xe0, 0x03, 0x00, 0x6c, 0x00, 0x80, 0x0f, 0x00, 0xf8, 0x1b, 0x00, 0x60, 0x00, 0x00, 0x03, 0x00, 0x00, 0x03, 0x00, 0x7c, 0x00, 0x00, 0x0c, 0x00, 0xd8, 0x1b, 0x00, 0x60, 0x00, 0x00, 0x03, 0x00, 0x60, 0x03, 0x00, 0x60, 0x00, 0x00, 0x0c, 0x00, 0xd8, 0x1f, 0x00, 0xf0, 0x00, 0x00, 0x1f, 0x00, 0xe0, 0x03, 0x00, 0x60, 0x00, 0x80, 0x0f, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x20, 0x00, 0x00, 0x04, 0x00, 0x80, 0x00, 0x00, 0x10, 0x00, 0x00, 0x02, 0x00, 0x20, 0x04, 0x00, 0x20, 0x00, 0x00, 0x04, 0x00, 0x80, 0x00, 0x00, 0x10, 0x00, 0x00, 0x02, 0x00, 0x20, 0x04, 0x08, 0x20, 0x00, 0x01, 0x04, 0x20, 0x80, 0x00, 0x04, 0x10, 0x80, 0x00, 0x02, 0x10, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0xaa, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x95, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0xaa, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x95, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0xaa, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x95, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0xaa, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x95, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0xaa, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x95, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0xaa, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x95, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0xaa, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x95, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0xaa, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x95, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f }; // 'rpm', 20x9px const unsigned char epd_bitmap_rpm [] PROGMEM = { 0x00, 0x00, 0x00, 0xdf, 0xf7, 0x0f, 0xdb, 0xb6, 0x0d, 0xc3, 0xb6, 0x0d, 0xc3, 0xb6, 0x0d, 0xc3, 0xb6, 0x0d, 0xc3, 0xb7, 0x0d, 0xc0, 0x00, 0x00, 0xc0, 0x00, 0x00 }; // Array of all bitmaps for convenience. (Total bytes used to store images in PROGMEM = 576) const int epd_bitmap_allArray_LEN = 2; const unsigned char* epd_bitmap_allArray[12] = { epd_bitmap_0, epd_bitmap_1, epd_bitmap_2, epd_bitmap_3, epd_bitmap_4, epd_bitmap_5, epd_bitmap_6, epd_bitmap_7, epd_bitmap_8, epd_bitmap_9 }; char rpmString[10]; int rpmStringLenght = 0; volatile unsigned int pulseCount=0; unsigned int pulseCountCopy = 0; int currentRPM=0; int previousRPM=0; float timerRatio=0; unsigned long pulseTimer = 0; unsigned long pulseTimerPrevious = 0; int pin = 2; char printableRPM[] = &quot;0&quot;; //1 Minute in MicroSeconds float MICROMINUTE = 60000000; float diffPulseTimer; boolean isDebug = true; void setup() { Serial.begin(9600); int checkPin = digitalPinToInterrupt(pin); if (checkPin == -1) { Serial.println(&quot;Not a valid interrupt pin!&quot;); } else { Serial.println(&quot;Valid interrupt pin&quot;); attachInterrupt(digitalPinToInterrupt(pin),PulseCounterISR,FALLING); } u8g2.begin(); u8g2.setColorIndex(1); pulseTimerPrevious = micros(); } void loop() { pulseTimer = micros(); if(pulseTimer - pulseTimerPrevious &gt; 200000) { noInterrupts(); //quickly copy and reset revCount and get a time stamp. Then restart the interrupts. pulseCountCopy = pulseCount; pulseCount=0; interrupts(); //DEBUG if(isDebug) { Serial.print(&quot;Pulse Count : &quot; + String(pulseCountCopy)); } diffPulseTimer = pulseTimer - pulseTimerPrevious; //DEBUG if(isDebug) { Serial.print(&quot; Counts in: &quot; + String(diffPulseTimer)); } //Divider represents the PulseTimer duration in relation to a minute in MicroSeconds timerRatio = (MICROMINUTE/diffPulseTimer); //DEBUG if(isDebug) { Serial.print(&quot; TimerRatio = &quot; + String(timerRatio)); } //RPM = Get 4 pulse per revolution so pulseCount/4 * the timerRatio and then rounded up to the hundreds so it doesn't display 998 rpm but 1000 currentRPM = round((pulseCountCopy * timerRatio)/4.0 / 100)*100; //DEBUG if(isDebug) { Serial.println(&quot; currentRPM = &quot; + String(currentRPM)); } if(currentRPM != previousRPM) { ltoa(currentRPM,rpmString,10); rpmStringLenght = strlen(rpmString); u8g2.firstPage(); do{ //For each digit of the number we parse the ASCII and get the value for(int i=0;i&lt;rpmStringLenght;i++) { //ASCII Converstion from rpmString ASCII value table (-48) u8g2.drawXBMP(10+22*i,38,20,24,epd_bitmap_allArray[rpmString[i]-48]); } u8g2.setColorIndex(1);//White Color u8g2.drawXBMP(0,0,128,32,epd_bitmap_BG_Top); u8g2.drawXBMP(103,50,20,9,epd_bitmap_rpm); u8g2.drawBox(2,14,map(currentRPM,0,6000,0,124),16); } while(u8g2.nextPage()); previousRPM=currentRPM; } //Reset Pulse Timer Previous pulseTimerPrevious = pulseTimer; } } //Count Pulse whenever they occur via IRS (Interrupt) void PulseCounterISR(){ pulseCount++; } </code></pre>

Arduino RPM Calculator Weird behavior

2024-03-25T16:56:35.053

707365

|feedback|

<p>The two-port model analysis of the network is helpful here. In this analysis, you model the forward amplifier block and the feedback network as equivalent two-port networks, and work to characterize the properties at the terminals on either side of the network.</p> <p>The key question there is what are the terminals of the forward amplifier network and what are the terminals of the feedback network, and in what configuration are they connected.</p> <p>To clarify this, I add to the original schematic the name of the Rs-Rf junction a label for future reference, which I am calling point <span class="math-container">\$P\$</span>. I also add a blue box to identify one possible choice of the feedback network. You could also choose to include RD2 as part of the feedback network. In the end, which choice you make won't affect the final results for the circuit analysis.</p> <p><a href="https://i.stack.imgur.com/8gzFj.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8gzFj.png" alt="enter image description here" /></a></p> <p>The important thing in this analysis to identify the terminals of the forward amplifier and the feedback network. The feedback network has terminals at <span class="math-container">\$P\$</span> and at ground on the left (amplifier input) side, and at the <span class="math-container">\$V_{out}\$</span> terminal and ground on the right (amplifier output) side. The forward amplifier has terminals at <span class="math-container">\$V_{in}\$</span> and <span class="math-container">\$P\$</span> on the left, and at <span class="math-container">\$V_{out}\$</span> and ground on the right. They are the same output terminals as the feedback network on the right side, because they are connected in parallel (shunt).</p> <p>This connection is referred to as a 'Series-Shunt' connection, where on the input side the amplifier terminals and feedback terminals are connected in series, and on the output side of the amplifier, they are connected in parallel (shunt).</p> <p>The appropriate two-port network model for the feedback network is the <span class="math-container">\$H\$</span> model, shown below (Fig 8.50 from the same Razavi reference from OP). In that figure <span class="math-container">\$V_1\$</span> corresponds to the voltage at <span class="math-container">\$P\$</span> in the figure relative to ground. The usual approximation is to neglect the forward dependent source <span class="math-container">\$H_{21}\$</span>. Calculating how the feedback network loads the input side amounts to calculating the resistor <span class="math-container">\$H_{11}\$</span> in the diagram, which represents the impedance seen looking into the feedback network from the amplifier input side (left side of the diagram) with the dependent source <span class="math-container">\$H_{12}\$</span> turned off. The way to turn off <span class="math-container">\$H_{12}\$</span> is to short <span class="math-container">\$V_2\$</span> in this diagram, which is <span class="math-container">\$V_{out}\$</span> in the original circuit.</p> <p><a href="https://i.stack.imgur.com/He4UD.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/He4UD.png" alt="From Razavi, Fig 8.50, p. 303" /></a></p> <p>So, to get the <span class="math-container">\$H_{11}\$</span> resistance, we want to know what the resistance is between the <span class="math-container">\$P\$</span> terminal and ground when we set <span class="math-container">\$V_{out}\$</span> to zero. That is why the right side of resistor Rf is grounded in Fig 8.54b of your original post when analyzing the impedance of the feedback network from the amplifier input side.</p> <p>Looking at the feedback network from the amplifier-output side (the right side of the circuit), we see from the two-port model in the figure that the impedance <span class="math-container">\$H_{22}\$</span> is obtained by zeroing the dependent current source <span class="math-container">\$H_{21}\$</span>, which amounts to severing the connection between feedback terminal and the amplifier terminal on the left (input) side of the circuit, since they are connected in series on that side. The reason you sever the connection is that you want to turn off the current <span class="math-container">\$I_1\$</span> in the two-port model in the figure above. That is what leads to the diagram on the right in figure 8.54 shown in the original post, reproduced here for convenience. It is when you sever the connection to the forward amplifier at <span class="math-container">\$P\$</span> that you are left with the <span class="math-container">\$H_{22}\$</span> impedance when looking at the feedback network from the right side.</p> <p><a href="https://i.stack.imgur.com/CEBGZ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CEBGZ.png" alt="From Razavi Fig. 8.54" /></a></p> <p>From these considerations, you can see that the critical question is not so much the assignment of resistors to either the feedback network or the amplifier, but rather what load the feedback network presents on either side of the two-port equivalent model. It is important not to try to associate components in the two-port model with individual components in your circuit, but to realize that they are just model parameters that can be used to characterize the response at those two terminals.</p> <p>So my suggestion is not to focus on what resistors constitute the feedback network, but rather on what are the terminals, and how are they connected to the amplifier terminals. This gives the information that is really required, which is how the feedback network loads each side of the circuit.</p>

<p>The following is a figure from 8.47 in <a href="https://electrovolt.ir/wp-content/uploads/2014/08/Design-of-Analog-CMOS-Integrated-Circuit-2nd-Edition-ElectroVolt.ir_.pdf" rel="nofollow noreferrer"><em>Design of Analog CMOS Integrated Circuit</em></a>, page 301:</p> <p><a href="https://i.stack.imgur.com/itg3O.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/itg3O.png" alt="enter image description here" /></a></p> <p>The book tends to suggests that feedback network</p> <p><a href="https://i.stack.imgur.com/Tmcn7.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Tmcn7.png" alt="enter image description here" /></a></p> <p>However, I have a different opinion.</p> <p><a href="https://i.stack.imgur.com/8Pdgf.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/8Pdgf.png" alt="enter image description here" /></a></p> <p><a href="https://i.stack.imgur.com/ExVKd.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ExVKd.png" alt="enter image description here" /></a></p>

How can we identify feedback network in this circuit?

2024-03-25T18:56:35.550

707410

|operational-amplifier|impedance|headphones|sensitivity|

<p>Loudspeakers are fairly ohmic, and the current limit is probably a time domain limit so, no don't use RMS figure.</p> <p>bridge tied load isn't going to work with ordinary headphones so I'm assuming bipolar drive through a capacitor. meaning 3V pk-pk but 1.5V amplitude</p> <p>45mA at 1.5V is about 33 ohms.</p> <p>32 ohms is a common headphones impedance, so add 1.5 ohm in series. or just turn the volume down a bit, that is reduce the amplitude sufficient to not exceed 45mA.</p> <p>Sensitivity, assuming 32 ohm headphones, you have about 65mW of power, so work backwards from there,</p> <p>65 is 18 decibels, so to get 116dB(SPL) at 65mW input you need an sensitivity of 116-18 = 98 db/mW (which means 98dB(SPL) at 1mW)</p> <p>These numbers seem reaslistic in the sub-$10 range.</p>

<p>The maximum output voltage of my audio source is 3 Vpp and the maximum output current of my amplifier (<a href="https://www.analog.com/media/en/technical-documentation/data-sheets/ADA4075-2.pdf" rel="nofollow noreferrer">op-amp AD4075-2</a>) is supposed to be 45 mA.</p> <p>What would be the ideal impedance and sensitivity of headphones under these conditions? Is it correct to use Ohm's law to calculate the ideal impedance as 66 Ω (3/66=0.045)? Or should this be rather be calculated in Vrms? In that case it would be 23 Ω (1.06/23.5=0.045).</p> <p>Also, how can I calculate how sensitive the headphones should be (dB/mW), to reach 116 dBSPL at max. current (45 mA) and voltage (3 Vpp)?</p>

Ideal headphones impedance/sensitivity for op-amp

2024-03-26T00:42:39.907

707417

|grounding|safety|emc|termination|

<p>Are you planning on using these pins in future revisions of the board? If so, and you ground the pins, then consider what happens if the signal-source board for a new revision of this sink board is connected to the current revision.</p>

<p>I am using both male and female D-SUB connectors and about half their terminals are currently unassigned, unused and unterminated. They are not the crimpable versions, all the conductive terminals are physically present. The connectors are through-hole and PCB-mounted.</p> <p>Boxes with chassis grounds are essentially connected together in my setup and the chassis grounds are connected through cable shielding. The signals carried are RS-422 on most connectors (cable length of approximately 3 meters, twisted pairs), except SPI on one. I am tempted to do differential SPI on this specific connector, given the high frequency (over 10MHz) of the clock and the cable length (approximately 1 meter). Power runs through every cable. The cables will be home-made.</p> <p>How would you recommend terminating unused connector terminals for EMC, electrical safety and practical considerations? Is grounding them the way to go?</p>

Should unused connector terminals be connected to ground?

2024-03-26T04:35:18.377

707422

|plug|connecting|

<p>First of all, a mobile device is intended to be connected to headphones, not directly to speakers.</p> <p>Speakers have lower impedance (e.g. 8 or 4 ohms) than headphones (32 ohms typically, but phones allow down to 16 ohms).</p> <p>So if you connect your phone to a speaker directly, please be aware that it may not work like you expect, the quality may be poor or there could be damage.</p> <p>Having said that, the TRS connector tip (shortest solder terminal) is the left speaker output, ring (middle length solder terminal) is the right speaker output and the sleeve (longest solder terminal) is the ground.</p> <p>Use either left or right output, preferably left, and ground, and connect them to speaker positive and negative terminals.</p>

<p>I have an audio jack but I have no clue how to connect wires to it. Please help me to understand its connections. I have provided the images of it. I do not know how to connect it, please help.</p> <p><a href="https://i.stack.imgur.com/I4VB1.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/I4VB1.png" alt="enter image description here" /></a></p> <p>It has three pins at the back end (long, medium, and short in length.)</p> <p>SPEAKER, to which I want to connect <a href="https://i.stack.imgur.com/JNeWl.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JNeWl.jpg" alt="enter image description here" /></a></p>

Understanding audio jack connections

2024-03-26T05:14:55.920

707437

|pcb-design|serial|esp32|wifi|pcb-layers|

<p>The MAX3233 capacitor values are incorrect for 5V operation so it may fail to work properly.</p> <p>The ESP32 is a 3.3V IC which might be damaged or at least go out of specs if you feed it a 5V digital IO from MAX3232. Maybe you did not intend to power it from 5V.</p> <p>You are also leaving the unused MAX3232 pins floating, which may lead to damage or non-working circuit. The datasheet explicitly mentions the pins must not be left floating.</p> <p>The MAX3232 can also cause large current spikes on power supply which can cause problems if there is insufficient supply bypassing.</p>

<p>Since my issue could be lying anywhere, I will explain my design details a bit.</p> <p>I have a 4-layer PCB. The stackup is Top-GND-PWR-Bottom.</p> <pre><code>Top: Poured GND polygon GND: Poured GND polygon (uninterrupted copper plane) PWR: Only power traces Bottom: Poured GND polygon </code></pre> <p><strong>This is the schematic of the RS-232 line driver/receiver</strong></p> <p><a href="https://i.stack.imgur.com/yR01X.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yR01X.png" alt="enter image description here" /></a></p> <p><strong>The layout on the PCB</strong></p> <p><a href="https://i.stack.imgur.com/I3POg.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/I3POg.png" alt="enter image description here" /></a></p> <p>The <a href="https://www.ti.com/lit/ds/symlink/max3232.pdf" rel="nofollow noreferrer">MAX3232</a> is on the other side of the PCB (bottom layer), while the ESP32 is on the top layer.</p> <p>The problem is that when the MAX3232 is not powered (by removing the trace to the power line, pin #16), the WiFi works on the ESP32. Once I power the MAX3232 the WiFi ceases to function, it doesn't connect. RS232 functionality works just fine, drawing 50 mA.</p> <p>What could be the problem?</p>

WiFi connectivity ceases on ESP32 when MAX3232 is powered on the same board

2024-03-26T08:23:17.527

707460

|operational-amplifier|bandwidth|slew-rate|

<p>On a breadboard you can expect lots of capacitance between each pair of rows of connectors, perhaps 10pF. With your feedback resistance of 10kΩ, combined with capacitances of that order, an estimate of cut-off frequency might reasonably be:</p> <p><span class="math-container">$$ f = \frac{1}{2\pi \times 10k \times 10p} = 1.6MHz $$</span></p> <p>There will be similar attenuation anywhere where the signal path contains significant impedance. You could try reducing R1 and R2 by a factor of 2, or 5, for example, just to see if the situation improves. If it does, then you'll have to find a better way to prototype the circuit.</p>

<p>I'm trying to amplify a sine wave signal with opamps of high bandwidth and slew rate. It works fine up to about 700 kHz, then the gain decreases and about 1 MHz it's only 1, when it should be about 5.</p> <p>I'm testing with the circuit below and two different opamps, with similar results: <strong>LMH6658</strong> (bandwidth 270 MHz, slew rate 700 V/μs) and <strong>AD8066</strong> (bandwidth 145 MHz, slew rate 180 V/μs).</p> <p><strong>LMH6658</strong>: <a href="https://www.ti.com/lit/ds/symlink/lmh6658.pdf?ts=1711450406602" rel="nofollow noreferrer">https://www.ti.com/lit/ds/symlink/lmh6658.pdf?ts=1711450406602</a></p> <p><strong>AD8066</strong>: <a href="https://www.analog.com/media/en/technical-documentation/data-sheets/ad8065_8066.pdf" rel="nofollow noreferrer">https://www.analog.com/media/en/technical-documentation/data-sheets/ad8065_8066.pdf</a></p> <p><a href="https://i.stack.imgur.com/yHVl2.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yHVl2.png" alt="Test circuit" /></a></p> <p>I don't know if I miss something. Should I expect to be able to get a gain of 5 with these opamps up to 5 MHz?<br /> I'm testing in a breadboard. The input signal is about 600 mV, and the sine wave is clean and not distorted in the output, even above 1 MHz.</p> <p>Could be that the opamps are fake/relabeled, but before returning and ordering them in Mouser I wanted to make sure. I don't know if there could be other problems. I understand that the opamps with that bandwidth and slew rate should be enough for these frequencies, but I'm not sure. Thanks!</p> <p><strong>Edit</strong>: I add some concrete numbers. Checking it better I see the performance of both opamps is different (after many tests I had a mix of results in my head). LMH6658 is much better, but anyway the gain starts to decrease below 500KHz.</p> <pre><code>LMH6658 (input signal ampl -&gt; output signal): 100KHz: 680mV -&gt; 3.32V 400KHz: 680mV -&gt; 3.24V 600KHz: 680mV -&gt; 3.16V 800KHz: 640mV -&gt; 3.00V 1MHz: 600mV -&gt; 2.84V 2MHz: 480mV -&gt; 2.16V AD8066: 100KHz: 680mV -&gt; 2.56V 600KHz: 680mV -&gt; 1.30V 800KHz: 640mV -&gt; 1.00V 1MHz: 600mV -&gt; 760mV 2MHz: 480mV -&gt; 360mV </code></pre>

Slew rate and Bandwidth for 5 MHz signal

2024-03-26T12:17:57.020

707463

|filter|cutoff-frequency|eeg|loading-effect|

<p>If we treat the two stages (high-pass and low-pass) individually, it will make things clear:</p> <p><img src="https://i.stack.imgur.com/JJURq.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fJJURq.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <p>Here I have recreated your filter stages, and I am feeding them with the same input, to obtain their gain vs. frequency plots:</p> <p><a href="https://i.stack.imgur.com/ICLha.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/ICLha.png" alt="enter image description here" /></a></p> <p>Blue is the high-pass, and orange is the low-pass. The brown plot is their sum, which will be overall gain, if they were cascaded.</p> <p>The first thing to note is that for second order filters (such as the Sallen-Key designs you've used here), the cut-off frequency is deemed to be where gain has dropped to -6dB, not the -3dB figure used with first-order systems. The formula <span class="math-container">\$f_c = \frac{1}{2\pi RC}\$</span> for this Sallen-Key design is actually the -6dB frequency.</p> <p>So before you continue, you must first be clear whether or not you are aiming to position the -3dB points at 12Hz and 32Hz.</p> <p>In the graph above the top and right green markers show the -6dB point for the high-pass filter (blue), which is at 12Hz, corresponding well to the required cut-off frequency.</p> <p>The problem is that at this frequency, the other low-pass filter (orange) has already started to attenuate too, at about -1dB. The combined gain from both filters at that frequency will be about -7dB.</p> <p>It gets worse. Right in the middle of the pass-band, at 20Hz, both filters are attenuating slightly. The brown curve at about 20Hz shows the sum of gains <span class="math-container">\$(-2.8dB) + (-2.8dB) = -5.6dB\$</span>, which should start to make sense now. By combining the two filters to create a pass-band filter, you actually have a gain of -5.6dB in the centre of that band, not 0dB as I believe you expected.</p> <p>You must consider the combined (cascaded) gain at the centre frequency, which will necessarily be far below 0dB if the pass-band is so narrow like this. Simultaneously you must establish -6dB (or -3dB) points with respect to that maximum. The bottom and left green markers represents that point, 6dB underneath the peak of the brown curve. As you can see, the frequency there is about 8Hz, not 12Hz. The -3dB point is somewhere around 10Hz, still less than the 12Hz you were expecting.</p> <p>As for why the center frequency is not 20Hz, and not 22Hz, my intuition tells me that it should be 22Hz, and that your inexact capacitor and resistor values are responsible for this discrepancy. I admit though, there may be some subtle logarithmic nuance I'm overlooking. I'd have to do the maths to be sure, and I won't be doing the maths, for sure.</p>

<p>I am doing a project where I am designing my own EEG circuit. I aim to keep it fairly simple and essentially design my circuit to do two things:</p> <ol> <li>Amplification</li> <li>Filtering</li> </ol> <p>I want to design the circuit (the filter specifically) so that it can demonstrate beta-waves from the brain, as it corresponds to an active state which can be achieved without much issues. The range of beta brainwaves is roughly from 12-32 Hz. In my circuit, I have three stages:</p> <ol> <li><strong>An Instrumentation Amplifier:</strong> to amplify the differential input that I will capture with two electrodes that I have. In my case I have made the instrumentation amplifier using three op-amps.</li> <li><strong>A 2nd Order Bandpass Filter:</strong> to only get the required range of 12-32 Hz and attenuate the other frequencies.</li> <li><strong>A common-emitter Amplifier:</strong> This stage will give me even more gain. I have no specific gain-requirement as such so long as the output is clear and noise-free on the oscilloscope. I really don't know if this stage is necessary or not, because the instrumentation amplifier can give the gain that we want. I have to have this in my circuit unfortunately because our instructor necessitates us to have at least one stage that involves the use of a MOSFET/BJT, so this stage is there primarily to fulfill this purpose.</li> </ol> <p>My complete circuit looks like this: <a href="https://i.stack.imgur.com/malAJ.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/malAJ.png" alt="enter image description here" /></a></p> <p>The issue that I am facing is that, the -3 dB cutoff in the AC-sweep of the entire circuit is not exactly the frequency for which the circuit was designed for, vis-a-vis 12 and 32 Hz, they are coming out to be around 10.1 Hz and 38.7 Hz, as you can see here:</p> <p>This is the maximum gain that is achieved (@20 Hz, 59.6 dB) <a href="https://i.stack.imgur.com/Ehemm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Ehemm.png" alt="enter image description here" /></a></p> <p>This is the realized cutoff for the high pass filter: (-3 dB @ 10.1 Hz) <a href="https://i.stack.imgur.com/pAfEr.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pAfEr.png" alt="enter image description here" /></a></p> <p>This is the realized cutoff for the low pass filter: (-3 dB @ 38.7 Hz) <a href="https://i.stack.imgur.com/oweoL.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/oweoL.png" alt="enter image description here" /></a></p> <p>My question is: Why is there a <strong>significant</strong> shift in the cutoff frequency from which the circuit was designed for? Is this due to the loading effect perhaps? What should be done to fix this shift and get it as close to the desired values as possible?</p> <p>Also, the maximum gain I get is at 20 Hz, is there a reason as to why it is 20 Hz? I have tried out other resistor-capacitor values as well and they also give a maximum at 20 Hz, why is this so?</p> <p>From my side, I have tried to fix this issue by changing the resistor-capacitor values and trying to get it to the actual values, but this feels more like hit and trial and doesn't guarantee the desired working in case I add some other stage later. How can I tackle this problem? Help is appreciated! Also, please let me know about any general changes I can make to this circuit to make it better without adding too much complexity.</p>

Why is there a shift in cutoff frequencies of filters, and how to fix it?

2024-03-26T12:31:57.367

707465

|circuit-analysis|digital-logic|

<p>It <em>does</em> drop, but only a very small and thus negligible amount. The resistor is 10k, the resistance of a closed switch is almost zero, let's assume it is 1 Ohm. That means that the voltage drop across the resistor (compared to the open switch) will be in the order of 1/10000. Thus the voltage across the resistor will be 8.999 V and the voltage across the switch 0.001 V. Since the AND gate is a binary element, this is still clarly recognized as &quot;High&quot; level.</p> <p>In fact, depending on the type of gate used, anything that is higher than 1/3 to 1/2 of VCC is considered a &quot;High&quot; level.</p>

<p>When I closed switch 1, I apply 9 V to input 1 of the AND gate, but there is a resistor here.</p> <p>Can I be sure that the total 9 volts does not drop through the resistor?</p> <p>Why is the voltage dropped across the resistor?</p> <p><a href="https://i.stack.imgur.com/isbaw.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/isbaw.png" alt="enter image description here" /></a></p> <p>The link of picture: <a href="http://sullystationtechnologies.com/icandgate.html" rel="nofollow noreferrer">http://sullystationtechnologies.com/icandgate.html</a></p>

AND gate example

2024-03-26T12:37:08.783

707469

|transmission-line|wave|reflection|

<p>This is an electromagnetic problem, not a circuit theory problem. Treating your transmission lines as circuit theory elements is fine for continuous lines but breaks down at junctions. In general you <strong>will</strong> get reflections at a junction like you describe.</p> <p>Instead of your coaxial example, I'll talk about microstrip as it may be easier for PCB folk to visualise. If you have a microstrip track at <span class="math-container">\$Z_0\$</span> on FR4 (<span class="math-container">\$\epsilon_r = 4.3 (ish)\$</span> and suddenly the substrate changes to <span class="math-container">\$\epsilon_r = 2\$</span> with the same substrate thickness, then the track suddenly gets substantially wider.</p> <p><a href="https://i.stack.imgur.com/kZdVn.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/kZdVn.png" alt="enter image description here" /></a></p> <p>Although circuit theory suggests that you have simply connected two transmission lines with the same characteristic impedance, maxwell's equations at the junction say something different. It quickly gets complicated, but the exposed end of the wide line has fringing electric fields that can often be modeled as a shunt capacitance, and the current spreading out from the narrow line to the wide line results in extra stored magnetic energy that may appear as a series inductance. Clearly the current distribution in the wide line at the junction is nothing like that far away from the junction.</p> <p>If you want to model this for any transmission line for which you have a full modal solution, look up waveguide mode matching. This would let you model your coax junction, as would some sort of finite element simulator.</p> <p>Another application is the transition from a coax cable to microstrip. If what the circuit theorists are saying was true, then it would be trivial to mount a coax connector (e.g. sma) to a PCB, connect to a 50 ohm microstrip trace and obtain a broadband, reflection free, transition. Those who have actually tried this in a lab know that this is not easy to even approximate.</p> <p>The picture is from N. H. L. Koster and R. H. Jansen, &quot;The Microstrip Step Discontinuity: A Revised Description,&quot; in IEEE Transactions on Microwave Theory and Techniques, vol. 34, no. 2, pp. 213-223, Feb 1986</p> <p>which isn't particularly useful for the case where the dielectric constant changes, but it did have a useful picture.</p>

<p>Suppose we have two transmission lines connected with each other, each transmission line has the same characteristic impedance: <span class="math-container">$$ Z_0 = \sqrt{\frac{L}{C}} $$</span> however they don't have the same dielectric and therefore the wave impedance: <span class="math-container">$$ \eta = \sqrt{\frac{\mu}{\epsilon}} $$</span> is different. This therefore implies that according to transmission line theory, since there is no characteristic impedance mismatch, there shouldn't be a reflected wave at the interface between both lines. On the other hand, general EM theory, predicts that there should be a reflection since both materials have different wave impedances, seemingly contradicting what transmission line theory predicts. So what's going on and who's right?</p> <p>For instance, the characteristic impedance of a coax cable is: <span class="math-container">$$ Z_0 = \frac{\ln{ \left ( \frac{R_{out}}{R_{in}} \right )}} {2 \pi} \eta $$</span> If we fix <span class="math-container">\$ R_{out} = 10mm \$</span> for both lines and set <span class="math-container">\$ \epsilon_r = 2 \$</span> for the first line and <span class="math-container">\$ \epsilon_r = 4 \$</span> for the second line, then we get <span class="math-container">\$ R_{in} = 1.70508mm \$</span> for the first line and <span class="math-container">\$ R_{in} = 0.819452mm \$</span> for the second line, both having the same characteristic impedance of <span class="math-container">\$ 75 \Omega \$</span> whilst their wave impedance is different.</p> <p>My guess is that this might be solved via <a href="https://learnemc.com/introduction-to-imbalance-difference-modeling" rel="nofollow noreferrer">Imbalance Difference Modeling</a> which enables a more general perspective to transmission line theory. All thoughts are welcome.</p>

Contradiction between wave impedance mismatch and transmission line theory

2024-03-26T13:17:29.653

707473

|mosfet|continuity|

<p>Here's a circuit that senses continuity and has some extra safety features (<a href="https://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgpABZsKBTAWjDACgAzEFGq7QvNzyD%20IlOGhIwCNthogANgwAmTAOYAnBgwB24EMWjYUzVlAqwUYYYTBWMNYghriq7MIXHP5KBIQo08rg%20iirqWrrmEFQwkOwatDSCHhR24P58bADuQoKY4ijCINgIrmwJKDy0cNxVgYJu8JBsaiCEvLR4VO1UjhlQbAAeif4sVAhg9Ezk8tYgAKJMALIAhgAuAMYAFrIY3R12gn5uhfoxbADO6dwY4u03rvprGgCuDGwAStf5ICz%20PzFqtRATAZLxyIcHuAMP9buBsrUfHDKj4qs0cqJEQFUfJ0VjMTw%20AIBglIT97gDas1Wn9ipB5LTjICUAjIcFfil2XiUXSccVic0AG5tDrk0Vo8wdGjQR4xSQInlJKiFQRKgbCnrFNAi5VwwFSmXmOUyAAObSKPIEYj4RoRE3EkOO4FOeKtWv2fG1ePt1x9kLx9Wugf9CqKbLwsxdbA2iWSpz9LqgsCaECYsUglWIYEglD6kBIYBo5HT7ByKqh5ZDOU1kM1POaw0IlG4GZABCQaCQs0EABkAJYABQA9gAdC4AI3WawYGgAnmOTSsNgBrMcAChQFwAlEMDMrsOQrPRCbRnSAAJIXIcKdYqMcAFQ0fbUahnY4Awn2NBsXn21qGRAjXJOnOaspRSTU1TxTE1XLKCEUgiCOiZAZqwtKo6zRBU6hqHlMW5OokixeCcm8LFMNxBDwP8MiaBSZouD6YogLI7AgOMCQpBkBJWOJVj6XMNBvUCapxhEuiMjtESeTI3xJJyYNTjYyMGl3OhiG4QhyAQXAbl6M8AHIADVrzWFZXzHAB5ABpAyxx7eYABFyloFIJNc-wSkebN4Bc9yvI8qFGjgBFFNVFIwBhVDAp%20dzIvkwL3No%20jQs5UoQOKdKAy6TLxDVZTovyoCmIKhs6Q7QhPNsTSNMjEAACIADEvwYer7KchECSqAk-AGDxxB6qqRAE8RlAYDgVheBQ1iYJRlDOI1YFLLE8OJetOuJNVIJy5oEkxfbiS5FsGPdZigkO9iHUkcAZDLZC1qlGpuUez1eiezrtV4V6zuimCahglKMU2tyQckoA" rel="nofollow noreferrer">simulate it here</a>):</p> <p><a href="https://i.stack.imgur.com/4g1v0.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/4g1v0.png" alt="enter image description here" /></a></p> <p>Starting from the left, the optoisolator prevents a ground loop from accidentally firing the rocket. It also makes strong FET gate drive to reduce its Rds(on): it pulls the gate up to nearly the battery voltage. This extra drive helps the FET give the max current it can for reliable firing. On the input side the fact that it's an LED that needs a few mA reduces the possibility of a false trigger.</p> <p>The 'Fire' LED will light at the same time the big FET is turned on. This allows testing the control before you wire it up to the E-Match, and also shows if it's safe to connect up.</p> <p>The E-match loop has a 1uF bypass cap. This shunts any stray voltage as you connect up the wiring.</p> <p>Here's the meat of what you asked for. The 'Voltage OK' LED is a pair of resistors (1k/10k) connected to the E-Match low side, then divides the voltage to a FET gate, which in turn lights a green LED when the gate is above threshold (1.5V for a typical logic-level FET.) With the circuit as-is, anything above 2V or so will light the LED, indicating continuity. You could adjust the divider to set some minimum acceptable battery voltage based on the FET threshold: not so accurate, but maybe good enough.</p> <p>As it is your LiPo pack should have a protection circuit that will disconnect if the pack voltage gets below about 6V or so. If this happens you should get no LEDs at all.</p> <p>The second part - connecting to a microcontroller. Since I like optoisolators so much I use these to isolate the signals being monitored. Again, this prevents a current loop forming with the microcontroller, and you get voltage translation for your trouble. As below (<a href="https://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgpABZsKBTAWjDACgAzEFGq7QvNzyD%20IlOGhIwCNthogANgwAmTAOYAnBgwB24EMWjYUzVlAqwUYYYTBWMNYghriq7MIXEIMhbgl-evrjy4kqqmtp6buYwkOwatHhuATTyHubYbADuQoKY4ijCINgIrmwJKDy0cNxVqYJu8JBsaiCEGOI0SW0dtMS%20VM0AHrQYgixUzkhM5GmCAKJMALIAhgAuAMYAFrIYVO3idoIIxIeF%20oNsvORH3L1gPneH2bUhvZUhVc05vFQfFI9-t9XsUBNxeKCGuVwOd8m03q5asDbsEQCwgpB5MD-qicWDmgA3HoFXoHEGDaq0aCIwaSF7-Lp-IqMqBsIlk4z7d69CkQmjUmJQOkABxAHT%20VXFxTQxRiL2caXOJzOUJyUs5xOllxyCvAKUVqsSySNMMNhUEtxo6VuzQ2JtuuptQqacTRsUglWIYEglEchEgJDANHI7vYOXNT1yptZOTJtzJQLYIwEBQ9IDw3m4Pto4EEABkAJYABQA9gAdADOACN1msGBoAJ6V4UrDYAa0rAAoUBWAJRJgx-bDkKz0HhURUgACSFZLCnWKkrABUNAW1Gp65WAMIFjQbACuBbW9KK2DwIWZ3WBZKtvhvV5eohNEZZ196t81GuBUv%20Ca%209LqGo8TNOouhBV95UBKo-yxF4b3SQJaHSZouFKERzwBIIMOMCQpBkBJEKfQjMXMNBgUQ35MKQgZIN8f5EJQfwY3tc4PxtAdgwgIhyH8EkJxhEAAHIADU5zWFYN0rAB5ABpQTKzzeYABFoXqajaDAkpEW9eBVM00oNLyHlkDgF4WUtMCHhon4wLhNSrOYtSPwo5CzP0rw7GKAzyM8rSKF8jCfPEM95DQ4pAoHYwCjBYcjIgScACIADFdwYBKFOUsygMAv4mOaDxOiApjKNxEBlAYDgVn3BQ1iYMILhiWAwxBBlstgnInxZe9LgSEqwRKki-lM65o0dR5HQ9GQRvje5HjjSboXox5UUQxpTIqSUSNRPYsRM7Eql1DADN1fb5DJI7xDJb9jtSMUDL867goMvB0gel4XqCZ70kTHIPpBH9-x%20GpOpqVassmZaSLBjqSJ2%20EqDh68IThwgISfJG%20DBQj8RaNF0hwXx0TuxEUDYAAlcwTv8mlKWwIxBRgGQljRMDEKYbpVu4OlmaYMC4fZhHBq5mQckmW6HVu4EuRVTVkXOFH5ER8nzCu%20HBTR%20mKUZ1TBH9Bo2nwcwdNMn5dcN1GDcNC29fhKikaoh1HntgnbaV02xX4V3PeaXrBBdhHvb2qXLbxu9DeDl2if9l5eb9kiLbd222dZp3caJm306%20bg09ekiia-bO1RuxWDKugcWBQYgKG6JhiEmPB6ESlLVx0NQEvLoN6D2QmnDFSAq8S0SaoktKO7PO56AmP5HknFc1w3DQ4IRFmjLKPMV8jAXIwpSqFArBhik1tgq1Dv4ISYQgu--EYWAQLiqlrkdMBzKoli3ABVTgtXC%20QnxC6VcLgBFpCaomNBAQSBmAkB6N6RozBOOUBzEEElRlJRYEGoUF8AikAA" rel="nofollow noreferrer">simulate it here</a>):</p> <p><a href="https://i.stack.imgur.com/0rF2D.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/0rF2D.png" alt="enter image description here" /></a></p> <p>This may seem complicated, but we’re talking about a couple of dollars in extra components to ensure your safety and prevent an expensive misfire. The LED drive FETs can be BSS138, 2N7002 or similar. The optos can be any kind with a current transfer ratio (CTR) of 1:1 or better.</p> <p>What if all the stuff is in the same box? I'd still use the optos just for the voltage translation. And who knows, maybe you want to fire multiple rockets with the same ESP32, and have cables to these igniters?</p>

<p>I am currently working on a model rocket controller. It should fire a rocket model using a standard model rocket igniter (e-match). To ensure safety, I want to check for continuity trough the igniter. My e-match will ignite at a current of 1A. To safely check continuity, the test current should not be higher than 40mA. For that purpose, I designed this small circuit:</p> <p><a href="https://i.stack.imgur.com/MVeMm.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MVeMm.png" alt="schematic" /></a></p> <p>My entire system is powered by a 2S lipo battery (7.4V-8.4V) that can deliver enough current for the ignition. My microcontroller is a ESP32-S3-WROOM. To ensure that the voltage for the continuity check stays below 3.3V, I use a voltage divider that will limit the max voltage to 2.837V. I know that in this configuration, there will be a constant current draw of around 1mA, but my rocket will only be on the launch pad a short amount of time so that isn't a big problem.</p> <p>Are there any problems with that schematic? Please keep in mind that I am still a newbie so I will try my best to understand your explanation, but won't be as fast with that.</p>

How can I make a continuity check for a model rocket igniter?

2024-03-26T13:34:37.143

707497

|mosfet|switching|level-shifting|

<p>It's not the gate charge capacitance; it's the drain source capacitance that is the issue. It forms a low pass filter with the 3k3 resistor that ties the drain to 12 volts. From the <a href="https://media.digikey.com/pdf/Data%20Sheets/Fairchild%20PDFs/IRF540N.pdf" rel="nofollow noreferrer">data sheet</a> for the IRF540N, <span class="math-container">\$C_{OSS}\$</span> is 295 pF so, you form a low-pass filter with the 3k3 at a frequency of 163 kHz.</p> <p>If you just want to try a different method, use an <a href="https://www.onsemi.com/pdf/datasheet/fod8343-d.pdf" rel="nofollow noreferrer">FOD8343</a> with the added bonus that it's isolated: -</p> <p><a href="https://i.stack.imgur.com/HIlZS.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/HIlZS.png" alt="enter image description here" /></a></p> <p>Output rise and fall times are less than 40 ns. There are many other types of driver like this as well. I chose this for no other reason that I'd been using it in a design.</p>

<p>I want to translate +5V HIGH, 0V LOW logic from Arduino Uno to +12V HIGH, 0.5V LOW logic using IRF540N enhancement type n-channel MOSFET. The circuit I have referred is from <a href="https://circuitdigest.com/tutorial/bi-directional-logic-level-controller-using-mosfet" rel="nofollow noreferrer">https://circuitdigest.com/tutorial/bi-directional-logic-level-controller-using-mosfet</a> and the circuit is</p> <p><a href="https://i.stack.imgur.com/MyaKz.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/MyaKz.jpg" alt="IRF470N circuit for level translation" /></a></p> <p>At the input Vin, I'm providing a square wave at 70% duty cycle with +5V HIGH &amp; 0V LOW. Initially I was driving the circuit at 10 kHz and was able to get a beautiful waveform.</p> <p><a href="https://i.stack.imgur.com/w5WRi.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/w5WRi.jpg" alt="10kHz output" /></a></p> <p>But as I was increasing the frequency up to 200 kHz, the waveform is not a square wave anymore. Output at 65kHz:</p> <p><a href="https://i.stack.imgur.com/dFsoe.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/dFsoe.jpg" alt="65kHz output" /></a></p> <p>Output at 100kHz:</p> <p><a href="https://i.stack.imgur.com/uKOkv.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/uKOkv.jpg" alt="100kHz output" /></a></p> <p>Output at 200kHz with peak voltage at 7.3125V:</p> <p><a href="https://i.stack.imgur.com/A2WOM.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/A2WOM.jpg" alt="200kHz output" /></a></p> <p>I had chosen IRF540N considering the switching characteristics with 100 ns turn On time and 145 ns turn Off time as the at 200 kHz with 70% duty, it will 3500 ns HIGH and 1500 ns LOW but unable to get the desired output.</p> <p><a href="https://i.stack.imgur.com/yvox8.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/yvox8.png" alt="IRF540N switching characteristics" /></a></p> <p>Someone please explain why this is happening even though the MOSFET turn on time is quite within the limits of switching time. Moreover is it possible to achieve +0.5V LOW logic level after translation with this circuit?</p>

Level translation from +5V (square wave at 200 kHz) to +12V using IRF540N

2024-03-26T15:42:36.347

707505

|switch-mode-power-supply|emi-filtering|ferrite-bead|

<p>High frequency filtering is no different from low frequency, the values are just smaller, and layout is more critical. Which includes common/differential mode conversion, which tends to be the dominant route of escape, and I would wonder if that is the case here too, i.e. the ground loop voltage across the board, and thus between cables connected on opposite sides of the board, dominates over differential noise instead.</p> <p>The 74279221100 is unusual among ferrite beads, in two respects:</p> <ul> <li>Well, sort of a zeroth, its impedance is pretty low, which is significant here, but that's not terrifically unusual;</li> <li>The impedance is nearly proportional, from below 10MHz, up to 200MHz. This means the Q factor is high, or ESR is low.</li> <li>They actually rate it for DC bias current <em>at all</em> (a miracle among ferrite beads, generally), and impedance hardly drops up to the measured maximum:</li> </ul> <p><a href="https://i.stack.imgur.com/CjeDz.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/CjeDz.png" alt="enter image description here" /></a></p> <p>From: <a href="https://www.we-online.com/components/products/datasheet/74279221100.pdf" rel="nofollow noreferrer">74279221100 Datasheet WE-MPSB EMI Multilayer Power Suppression Bead | Würth Elektronik</a></p> <p>The demo board is rated 5V 15A output, and down to 5.7V input, we expect a comparable maximum input current; they used two in parallel (sneakily, they stacked the two component symbols, hence the dots on the pins, but do show separate designators) ensuring that, over most of the input voltage range, the 5A rating is respected. Even at the lowest input voltage, the rating is not exceeded by too much; and notice the thermal rating is 10.5A, and they simply were not able to test at higher currents due to other limitations -- indeed, we don't see the impedance having dropped much at 5A. So we have a reasonable expectation that they will provide some filtering value over the full operating range.</p> <p>What is the ferrite bead doing, then?</p> <p>An impedance of 3Ω at 40MHz for example, is equivalent to 12nH inductance. Or 6nH for two in parallel.</p> <p>It ain't much -- it's not much different from the impedance of an equivalent length of wire -- but we can conclude it's inductive, because the slope is close to +1.</p> <p>This is somewhat of a diversion, but it's a fundamental of impedance spectroscopy, and connects importantly with electronic filter networks and real components.</p> <p>The value of a continuous complex function (here, Z = R + jX is an analytical function of frequency) can only vary in certain ways, given by the Kramers-Kronig relations. This isn't easy to work with analytically (and, I haven't been able to derive results myself, so I won't begin to go into detail with it directly), but the takeaway is that, if impedance is rising proportional to frequency, and the element is a causal, passive one-port, then the real component is zero and we have a constant inductance <span class="math-container">\$L = \frac{Z}{2 \pi F}\$</span>. (Or perhaps more correctly, not using absolute Z but the local slope; but the local slope will only be pure-inductive over a range, if it is over the full range i.e. -∞ &lt; F &lt; ∞.) If there is loss, then the slope will be less than 1, i.e. <span class="math-container">\$Z \propto F^{1-\delta}\$</span> for some small δ &gt; 0, and there will be a corresponding ESR on the order of <span class="math-container">\$R = \delta X\$</span>. In other words, the loss tangent. (But, again, I'm a bit spotty on this, as the solution to K-K relations for a local power-law approximation, isn't apparent to me. There may be trig or hyp functions involved, which look proportional only at small δ.)</p> <p>Indeed in the 200-1000MHz range, we see the |Z| flatten out, a bit shallower than a 1:2 slope on the log-log plot, implying skin effect and other core loss effects are dominating up here. This corresponds to the increase in R and decrease in X.</p> <p>For an exactly 1:2 slope, we have a Warburg or diffusion element, R = X, φ = 45°, etc., which arises often in electronics, as skin effect is a diffusion process. The impedance of electrochemical elements (those mediated by ionic motion: battery, supercapacitor, etc.) also shows this response.</p> <p>(Actually, supercapacitors might be different for a related reason: the fractal dimension of the activated carbon composing the electrodes. I suppose it should be a double-whammy, even, since ions do indeed have to diffuse through that structure.)</p> <hr /> <p>Anyway, diversion aside: they're basically putting a couple nH between capacitors, which themselves hopefully have less (single nH?) inductance to GND, so some filtering value is obtained. It won't be much, I think -- attenuation is limited by the inductor divider given by element ESLs, and a proper filter component would be preferable, but they probably don't need much, either.</p> <p>A more promising alternative might be one of those solid-metal-link inductors, <a href="https://www.coilcraft.com/en-us/products/power/shielded-inductors/high-current-flat-wire/slr-slc/slr4040/?skuId=31990" rel="nofollow noreferrer">SLR4040-220</a> for example. Notice it's inductive up to the same frequency limit (ballpark 100-200MHz), but has about quadruple the value. The main downside I suppose, it's fairly tall at 4mm, so could be hard to fit under a board -- but they have the XEL6060 (6.6mm tall) right there, so that's clearly no problem as built.</p> <h2>Layout</h2> <p>As for layout, again, it's paramount. Looking at the gerbers, they have solid ground on 3 of 4 layers, plenty of stitching vias, and buried (stripline) connections to the regulator. Ground loop voltage near the IC is attenuated strongly as it diffuses into the surrounding plane; the loop voltage at a modest distance is probably pretty small.</p> <p>The board could probably be made smaller, by placing the regulator towards one side, and collecting the connectors/headers/TPs along the opposite side, with filtering components clustered together in the middle (approximating a point-like structure, minimizing ground loop voltage across it, i.e., between connectors).</p> <p>For a dev board, size is probably advantageous anyway, so this was not an issue.</p> <p>High frequency emissions are pretty low in general, from this family of ICs; the switching edges are controlled specially to minimize harmonics, without compromising too much on efficiency. That does still leave full ripple at F_sw, as any buck converter would; having enough capacitance, and CLC(LC..) filtering to bring it down to unnoticeable levels, would be about all that's left (and, those are conducted not radiated frequencies, so they also didn't do anything beyond the 2.7uH choke). I guess it's peculiar they didn't put a ferrite bead on the output side, as it has a similar path as the input (switch node - XAL choke - capacitors), thus subject to a zero in the filter response due to the choke's capacitance. It's also possible they tested with a resistor load only, not a LISN (i.e., to measure output conducted emissions), and missed the need; or that the array of capacitors worked out adequately on this side (low enough total ESL, and as compared to trace inductance), but the input needed a little bit of cleanup still. Hard to say beyond this; you'd have to measure it yourself, and, short of asking the engineers who worked on it (if they remember at all), underlying motivations are pretty speculative.</p>

<p>Here is the schematic of a <a href="https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/dc2841a.html" rel="nofollow noreferrer">demoboard</a> :</p> <p><a href="https://i.stack.imgur.com/LSFdY.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/LSFdY.png" alt="enter image description here" /></a></p> <p>It is a buck converter with an input EMI filter. As you can see it there is an inductor and a lot of capacitors which make an LC filter with a cutting frequency at about 10 kHz. In front of this filter there is also a ferrite bead and others capacitors. The ferrite beads are knowns as being adequate for cutting very high frequency noise. Here is the impedance of the ferrite :</p> <p><a href="https://i.stack.imgur.com/nWpHM.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/nWpHM.png" alt="enter image description here" /></a></p> <p>For attenuate conducted noise, as it is shown by the graph, the effect of the ferrite bead seems to be negligeable as regard of the inductor ? I think that the ferrite bead was used to damp the resonnance of the filter, but its resistance part begin at over 100 MHz so it cannot help to reduce the resonance of the LC filter ?</p> <p>So what is the purpose of the ferrite bead on input EMI filter ?</p> <p>Thank you for your help and have a nice day.</p>

Ferrite bead on input EMI filter

2024-03-26T16:53:38.493

707508

|magnetic-flux|emf|faradays-law|

<p>You are calculating for two different scenarios. I] is a coil, II] is a single wire. If you use a wire forwards and another wire back, to make the two sides of the coil perpendicular to the field, they add in anti-phase to give you zero.</p>

<p>I have a example problem which I created myself just out of curiosity,</p> <p><strong>Question</strong>:</p> <p>Let's say a copper wire coil(20mm dimeter(<strong>r=10mm</strong>)) of 3 turns(<strong>N=3</strong>) is moving along the surface(Note-<em><strong>coil is not rotating</strong></em>) of the earth from east to west at the speed of 300 km/sec(<strong>|v|=300 km/sec</strong>);The magnetic field strength of the earth(<strong>|B|=60E-6 T</strong>) are passing through the coil(through the hole of the coil) perpendicular to the velocity vector of the coil(just for this example ignore the fact that magnetic field is 15 degrees tilted from the geographical pole north); How much current/emf will be induced in the coil?</p> <p><strong>Answer</strong>:</p> <p><strong>I</strong>] According to the faraday's law of induction, the emf will only be induced when flux is changing with respect to time, otherwise emf will be zero. so for the above problem, the answer is emf=0,</p> <p><span class="math-container">$$ Induced \space emf = -N \times \frac{d(\phi)}{dt} volts $$</span></p> <p><strong>II</strong>] According to the vector formula for induced emf,</p> <p><a href="https://www.khanacademy.org/science/physics/magnetic-forces-and-magnetic-fields/magnetic-field-current-carrying-wire/v/magnetism-12-induced-current-in-a-wire" rel="nofollow noreferrer">Explanation for below formula for induced emf in a wire placed near a constant magnetic field.</a></p> <p><span class="math-container">$$ Induced \space emf = L \times (v \times B) volts $$</span></p> <p><em>where v is he velocity vector and L is the total length of the coil's wire and B is magnetic field.</em></p> <p>If we take this formula and calculate the answer we are sure get a value &gt;0 for induced emf and induced current.</p> <p><strong>So</strong>, what I am asking is which one is the correct answer? Or I made a mistake somewhere?</p>

Example problem of induced emf in a coil travelling with some velocity and perpendicular to the earth's magnetic field

2024-03-26T17:43:31.817

707518

|transistors|mosfet|circuit-analysis|power-electronics|integrated-circuit|

<p>There's nothing magic about the MOSFETS. If Q12 is turned on, then J10 pin 1 is pulled down to ground. Otherwise, it's floating. The same for Q13 and J10 pin 3.</p> <p>J10 pin 2 is always connected to the positive supply.</p> <p>The transformer connected to J10 would be centre-tapped. The two ends would be connected to J10 pins 1 and 3, and the centre tap would be connected to J10 pin 2.</p> <p>The circuit alternates between connecting the supply voltage to one half of the primary winding and then the other half of the winding. This creates an alternating magnetic field in the transformer, which creates AC on the secondary output.</p> <p><img src="https://i.stack.imgur.com/iXnbP.png" alt="schematic" /></p> <p>^{<a href="/plugins/schematics?image=http%3a%2f%2fi.stack.imgur.com%2fiXnbP.png">simulate this circuit</a> &ndash; Schematic created using <a href="https://www.circuitlab.com/" rel="nofollow">CircuitLab</a>}</p> <p>Notice how current flowing from 2 to 1 runs in the opposite direction, relative to the transformer core, than current flowing from 2 to 3.</p> <p><em>It's worth saying that a &quot;modified sine wave&quot; looks nothing like a real sine wave. It's marketing speak.</em></p>

<p>I would like to analyse this circuit, but I do not understand how this circuit works.</p> <p>J10 connector is connected a three wire, center tapped tranformer.</p> <p>What should be the input of the transformer to produce 50 Hz, 220V modified sine wave?</p> <p>How do these transformers work?</p> <p>Second question: Why do we use resistor R19 in this diagram?</p> <p>Third Question: Why do we use mosfets in this diagram? <a href="https://i.stack.imgur.com/pCAji.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/pCAji.jpg" alt="enter image description here" /></a></p> <p>The link of the picture: <a href="https://www.youtube.com/watch?app=desktop&amp;v=urKi9OLDdCA" rel="nofollow noreferrer">https://www.youtube.com/watch?app=desktop&amp;v=urKi9OLDdCA</a></p>

Modified sine wave inverter analysis

2024-03-26T19:51:17.187

707524

|mosfet|falstad|

<p>Try increasing the &quot;Beta&quot; to 20.</p> <p><a href="https://www.falstad.com/circuit/mosfet-beta.html" rel="nofollow noreferrer">Here</a> is an explanation of how to get numbers that sort-of fit a real MOSFET from looking at the datasheet.</p> <p>If you want more accurate results something like LTspice might be better.</p>

<p>While trying to simulate a simple circuit using a N-Channel MOSFET, I encountered a problem. while supplying 3.3V to the GATE pin, I would expect a way higher current to flow, more like 7A. But according to the Falstad simulator, only 32.4mA would flow. The threshold voltage is 1.5V. Why does only so little current flow? <a href="https://i.stack.imgur.com/TdFlT.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/TdFlT.png" alt="enter image description here" /></a></p>

Why isn't this circuit working in Falstad as expected?

2024-03-26T21:11:59.927

707525

|control-system|transfer-function|block-diagram|

<p>Here is my approach for <strong>simplifying the given block diagram</strong> (assuming that (a) the output of W6 (y) is fed back to the input and (b) that all summing nodes are positiv if not labelled as &quot;-&quot;):</p> <p><strong>Step1</strong>: The inputs for W2 and W4 is shifted from the input of W3 to the output of W3.</p> <p><strong>Step 2</strong>: As a consequence, The funktion of W4 and W2, is changed to W4/W3 and W2/W3, respectively.</p> <p><strong>Step3</strong>: Now we have <strong>three loops</strong> separated - <strong>two inner loops</strong> and <strong>one overall outer loop</strong>. In addition, there is one feed-forward block between W3 and W6:(1+W4/W3).</p> <p><strong>Step 4</strong>: Now the diagram can be further simplified using the classical formula for negative feedback.</p> <p><strong>Comment</strong> to your question regarding &quot;output e&quot;: The two summing junctions can be combined to only one when the first summing point is equipped with two inverting inputs (one for the inner and one for the outer loop). That<span class="math-container">`</span>s all.</p>

<p>I'm doing my homework and need to find a transfer function W_eg (from input g to output e) using given block diagram.</p> <p>The problem is that the output e disappeared. I made a step by step solution how I was doing it. Could someone look if I'm doing it right?</p> <p>Here, the first image is the initial diagram, and the others are my solution. <a href="https://i.stack.imgur.com/PvMF8.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/PvMF8.png" alt="Initial diagram" /></a></p> <p><a href="https://i.stack.imgur.com/QxAPk.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/QxAPk.png" alt="simplification 1" /></a> <a href="https://i.stack.imgur.com/vxSul.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/vxSul.png" alt="simplification 2" /></a></p>

Determining Transfer Function from Block Diagram

2024-03-26T21:32:49.340

707526

|resistors|ltspice|

<p>First off, choose a device for the LED. I picked a model at random that was in LTSpice's model library (right-click on D1). You will need to supply a model for the LED you are actually using.</p> <p>Download the specification sheet for the LED. In the particular spec sheet for the Nichia NSPW500BS, a graph of forward voltage drop versus LED current is shown below. Let's choose a LED current of 20 mA. At 20 mA the forward voltage across the LED is approximately 3.6 volts. This means the voltage across R1 must be <span class="math-container">\$12 - 3.6 = 8.4 V\$</span>.</p> <p>Thus, the resistor value is <span class="math-container">\$ R = {E \over I} = {8.4 \over 0.02} = 420 \;ohms\$</span>.</p> <p>The SPICE simulation using the.op statement shows that the LED current is 20.7 mA which is close to the calculated value. The difference in the calculated versus simulated currents is the difference between the specification sheet and the model's forward drop. Note that the simulation is predicting a 3.3 V drop across the diode.</p> <p>In practice, you would measure the voltage drop across the diode for the specified conditions and lot variations.</p> <p><a href="https://i.stack.imgur.com/7HqP0.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/7HqP0.png" alt="enter image description here" /></a></p>

<p>I am new to electrical engineering and I’m having a lot of issues with resistance in LTSpice.</p> <p>Because I can’t set the current, I am unable to determine how far the voltage will drop.</p> <p>For example, I have a resistor (R) connected to a voltage source (12V), and I want to make the voltage 5V for an LED. The problem is I cannot calculate the resistance because I don’t know what the current will be.</p> <p>How do I find out what the current will be? Or better yet, how am I supposed to use resistors in general? I’ve taken a look at a lot of explanations, but they all have the resistance ready, so I don’t know how they get to that value.</p> <p><a href="https://i.stack.imgur.com/Bxkta.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/Bxkta.png" alt="Circuit" /></a></p>

Problem Using Resistors in LTSpice

2024-03-26T21:43:31.910