baber/WOPTO huggingface dataset:
Patent TW-404154-B (TW)
Title: Adjustable spiral delay line
Inventor: JAU FANG-LIN
IPC: H05K3/30
Filed: 1998-04-13
Granted: 2000-09-01
Abstract: The connecting and the delay of the spiral delay line are adjustable. It consists a flexible circuit substrate with ground plane and several set of microstrip line. The flexible substrate can be wrapped to a compact form. The connect pad on the main circuit board connect the related microstrip line in the spiral delay line substrate. By choosing a specific connecting, different time delay value can be obtained. The delay line has not stub, therefore, there is no reflection from the open end. The length of the connecting bar is reduced which eliminate the timing skew.
Patent TW-391904-B (TW)
Title: Soldering material and electronic part using thereof
Inventor: KOGASHIWA TOSHINORI
IPC: B23K35/14
Filed: 1998-05-08
Granted: 2000-06-01
Abstract: The objective of the present invention is to provide the soldering material and the electronic part using the soldering material which can improve thermal fatigue resistance when the electronic member and a substrate are joined together with the soldering material, and can decrease damages of a coating in an occasion that Ni coating is applied. Composition of the soldering material is as follows: 0.01-4.99 weight% Fe, 0.01-4.99 weight% and its total sum is 0.02-5.0 weight% Ni, 0.1-8.0 weight% of at least one of Ag and In, 0-70 weight% Pb. The balance is Sn and unavoidable impurity. The electronic part is to be assembled by soldering a semiconductor device 5 and the substrate 8 using the soldering ball 7 consisting of the soldering material.
Patent TW-484209-B (TW)
Title: Manufacturing method of integrated circuit DRAM structure
Inventor: LI YU-HUA
IPC: H01L21/8242
Filed: 1998-05-25
Granted: 2002-04-21
Abstract: This invention provides a manufacturing method of integrated circuit dynamic random access memory (DRAM) structure, especially the one capable of simultaneously patterning capacitor structure and completing via etching. The manufacturing procedure includes: a second dielectric layer and a second silicon nitride layer formed sequentially on a capacitor structure containing a substrate, a first dielectric layer, a first silicon nitride layer, a first conductive layer, a capacitor dielectric layer and a second conductive layer; after patterning resist, performing a first etching process on the second silicon nitride layer, the second dielectric layer, the second conductive layer, the capacitor dielectric layer, the first conductive layer and the first silicon nitride layer until reaching the first dielectric layer to separate the capacitor structure; forming a uniform third silicon nitride layer and performing etch back process to form a spacer structure on the both sides of the via hole; and finally performing a second via etching to complete the via hole manufacture.
Patent TW-399294-B (TW)
Title: Process for etching dielectrics
Inventor: WANG KUEN-CHR
IPC: H01L21/76
Filed: 1998-08-19
Granted: 2000-07-21
Abstract: This invention forms a first dielectrics, a second dielectrics, a conductive layer and an anti-reflective coating sequentially on a substrate. Then, the conductive layer and the anti-reflective coating are etched to form a complex layer with conical shape. A third dielectrics, which has a higher etching selectivity in comparison with the second dielectrics, and a photoresist layer are formed sequentially on the substrate. The photoresist layer on top of the conductive layer bottom is removed. Then, the remaining portion of the photoresist layer is used as a mask. The portion of the third dielectrics is removed by dry-etching method until the anti-reflective coating and the second dielectrics are exposed to form a hole. Also, this remaining portion of the photoresist layer is used as a mask to etch the portion of the anti-reflective coating.
Patent TW-406350-B (TW)
Title: Method for manufacturing the shallow trench isolation area
Inventor: LIN JR-HUNG
IPC: H01L21/762
Filed: 1998-12-07
Granted: 2000-09-21
Abstract: A method for manufacturing the shallow trench isolation area is provided, which forms a doped area around the head edges of the area for trench. The doped area forms a decreasing concentration gradient from the substrate surface and far away it, then form the trench in said substrate. After the trench is formed, proceed with the thermal oxidation process. By taking the advantage of such characteristic that the thermal oxidizing rate of said doped area is higher than that of the other areas, the trench arc of the oxidized head edges is formed. Next, using the traditional method to form the liner oxide layer on the trench surface and fill up the trench to accomplish the shallow trench isolation area manufacture.
Patent TW-I241307-B (TW)
Title: A soluble magnesium dihalide complex, its preparation and use
Inventor: GAROFF THOMAS
IPC: C07F3/00
Filed: 1999-03-08
Granted: 2005-10-11
Abstract: The invention relates to a complex comprising a magnesium dihalide and an electron donor. It is a complex of the magnesium dihalide and the electron donor and has the formula (I): MgX2.[R(OR')n]m, wherein MgX2 is the magnesium dihalide and R(OR')n is the electron donor, X is a halogen, R is an n-valent C1-C20 aliphatic group, an n-valent C7-C27 araliphatic group or an n-valent C2-C22 acylic group, R' is a C1-C20 alkyl group or a C7-C27 aralkyl group, n is a number from 1 to 6 and m is defined as a number 0.5 <= m <= 2.0. The invention also relates to the preparation process of such a complex, as well as the use thereof for the preparation of olefin polymerization catalyst components.
Patent TW-581812-B (TW)
Title: Assay for the diagnosis of schizophrenia based on a new peptide
Inventor: SHINITZKY MEIR
IPC: G01N33/53
Filed: 1999-03-31
Granted: 2004-04-01
Abstract: The invention concerns peptides which bind antibodies that are found in elevated levels in body fluids of schizophrenic patients and are found at a lower level or not found at all in body fluids of non-schizophrenic individuals. Using a computerized program, the antigenic epitope of the peptides of the invention is predicted as having a core of hydrophobic amino acids which is surrounded by positively charged amino acids. The peptides of the invention are useful in the diagnosis of schizophrenia in an individual.
Patent TW-528837-B (TW)
Title: Variable geometry diffuser
Inventor: RAVIDRANATH RAVI A
IPC: F04D29/46
Filed: 1999-04-19
Granted: 2003-04-21
Abstract: A system for a variable capacity centrifugal compressor is provided. The compressor includes a base plate, a housing, and a variable geometry diffuser. A selectively moveable wall is disposed adjacent the base plate to vary the geometry of the diffuser. A portion of the moveable wall cooperates with a portion of the base plate to restrict the flow of fluid between the moveable wall and the base plate throughout the range of motion of the moveable wall to reduce the force required to open the diffuser.
Patent TW-415099-B (TW)
Title: Semiconductor device and fabrication method therefor
Inventor: TASAKA KAZUHIRO
IPC: H01L21/8246
Filed: 1999-05-26
Granted: 2000-12-11
Abstract: The invention provides a semiconductor device and fabrication method therefor, for ensuring the tunnel length Lmin of the unit while sustaining the layer resistance of the buried digital lines. The semiconductor device in the invention comprises a gate electrode 12, which is constituted by the semiconductor layer 3 in separation with the gate insulation film 2 installed on the active region of substrate 1 surface; trench 7, which is installed in the gate electrode 12, self-aligned and penetrates in the substrate 1; the buried digital lines 8, which is constituted by the reverse conducting type diffusion layer formed inside of trench 7 of the substrate; a first blocking layer 9, which is capable of covering the trench 7 surface and constructs at least one part of the side of the semiconductor layer regarding the gate electrode; a second blocking layer 10, which is buried in the trench and provides high re-flow characteristics; and word line 13, which makes the surface of the substrate perpendicular to the trench and becomes the gate electrode on the active region and interconnect layer above the trench.
Patent TW-425735-B (TW)
Title: Low pin count card retainer
Inventor: ESKILDSEN STEVEN R
IPC: H05K5/02
Filed: 1999-05-31
Granted: 2001-03-11
Abstract: A method and apparatus for retaining an electronic function card in the receptacle of a host data processing system (host socket) is described. The present invention exerts a retention force on the card in addition to the frictional forces exerted on each of the connector contacts inserted into the host socket. By increasing the retention forces exerted on an electronic function inserted into a host socket, the chance of the card dislodging from the host socket during a mechanical shock event is reduced. The present invention also provides tactile and/or auditory feedback to the user to indicate when the card is fully inserted into the host socket. Further, a card extractor may be coupled to the retainer of the present invention. When disengaged, the card extractor will release the retention force on the card and the card may be easily removed from the host socket.
Patent TW-436498-B (TW)
Title: Enolate functionalised reaction intermediate its preparation process and vinylic polymer prepared therefrom
Inventor: CAMERON PAUL ALEXANDER
IPC: C08F4/44
Filed: 1999-06-11
Granted: 2001-05-28
Abstract: An enolate functionalised reaction intermediate of general formula (I), wherein X is an alkyl group; Z is selected from the group consisting of alkyl, hydrogen, halogen, alkoxy, thiol, aryloxy or ester; n is an integer and is at least one; Y is alkyl or H; the tetradentate ligand around the Al is optionally substituted. Also claimed is a process for the preparation of the enolate functionalised reaction intermediate and its reaction with a vinylic monomer and a Lewis acid to produce the corresponding vinylic polymer.
Patent TW-464850-B (TW)
Title: Disc device
Inventor: LIU HSING-TSUNG
IPC: G11B33/00
Filed: 1999-08-26
Granted: 2001-11-21
Abstract: A disc device in the host machine of the disc device can be detachable as memory disc. The disc device provides the loading/unloading mechanism that enables disc moving between the unloading position and loading position toward the host machine through the sliding disc holder, and the cover that is installed on the host machine of the disc device to freely open and close. Under the circumstance that the cover is open, the disc can be loaded and unloaded in terms of the disc holder at loading position inside the host machine of the disc device.
Patent TW-568956-B (TW)
Title: Low temperature sputter target bonding method and target assemblies produced thereby
Inventor: IVANOV EUGENE Y
IPC: B23K20/02
Filed: 1999-08-31
Granted: 2004-01-01
Abstract: A low temperature target and backing plate bonding process and assemblies made thereby. A plurality of projections are formed in the harder member of the assembly. The assembly is bonded by conventional techniques around the peripheral assembly boundaries. The assembly is then pressure consolidated at low temperature so that the projections, circumscribed by the bonded zone, penetrate into the softer member promoting the formation of metal to metal cold diffusion type bonds.
Patent TW-432784-B (TW)
Title: Positive and negative voltage clamp for a wireless communication input circuit
Inventor: ALEXANDER SAM E
IPC: H01L27/02
Filed: 1999-11-18
Granted: 2001-05-01
Abstract: An improved voltage clamp for operating with wireless communication input circuits over the RF band. The clamp provides for symmetrical clamping for excessive positive and negative input voltage excursions. The clamp does not exact a current penalty when operating in the non-excessive positive and negative input voltage regimes. The clamp is comprised of an input node, a capacitor, a MOS transistor, a diode and a ground potential node.
Patent TW-502128-B (TW)
Title: Liquid crystal display substrate and a method of fabricating same and liquid crystal display
Inventor: OHASHI MAKOTO
IPC: G02B1/113
Filed: 1999-11-15
Granted: 2002-09-11
Abstract: The present invention relates to a reflection type liquid crystal display for displaying images by reflecting the external light and a fabricating method thereof and its object is to provide a liquid crystal display and a fabricating method thereof which can prevent a color tone of the reflection light and the like from a deterioration by surely absorbing an incident light from a gap between display electrodes. After forming a interlayer insulating film 24 on a source electrode 22 of FET formed on a silicon substrate 1 and planarizing the surface thereof by a CMP and the like, an insulating reflection preventing film 26 is formed. The source electrode 22 and a metal layer 29 are connected by embedding a connecting conductor 30 at a through-hole passing through the reflection preventing film 26 and the interlayer insulating film 24.
Patent TW-451493-B (TW)
Title: Insulation gate type semiconductor device
Inventor: TAKAISHI AKIRA
IPC: H01L29/739
Filed: 1999-12-18
Granted: 2001-08-21
Abstract: The object of the present invention is to provide an insulation gate type semiconductor device, wherein the gate capacitance is reduced for faster switching speed, while the increase in gate resistance is prevented and the equal voltage is applied to the gate of each cell. A plurality of p-type diffusion regions (body region 2) are regularly formed, for example, on the front surface side of an n-type semiconductor layer which is to be a drain region 1. Then, on each surface side of the plurality of p-type body regions 2, an n-type diffusion region is formed, which is to be a source region 3, and a channel region 8 is formed between the source region 3 and drain region 1 to form a transistor cell. A gate electrode 5 is provided on the surface side via an insulating film 4 and has a removal part 10 with a constant shape at the intersection part of three or four cells adjacent to said several cells so as not to cover the channel region 8.
Patent TW-441189-B (TW)
Title: PLL and gain control for clock recovery
Inventor: GRUNG BERNARD L
IPC: H04L7/033
Filed: 1999-12-20
Granted: 2001-06-16
Abstract: A high speed data communication system includes a receiver to recover data and clock signals from communicated data. The receiver circuit has a dual phase lock loop (PLL) circuit. A fine loop of the PLL includes a phase detector providing a differential analog voltage output. Transconductance circuitry converts the differential analog voltage output to a low current analog output. The transconductance circuitry has a variable gain which can be controlled by an automatic gain adjust circuit. A coarse loop of the PLL allows for fast frequency acquisition of an internal oscillator.
Patent TW-477068-B (TW)
Title: Semiconductor memory device and semiconductor memory apparatus
Inventor: ISHII TOMOYUKI
IPC: H01L27/12
Filed: 2000-02-02
Granted: 2002-02-21
Abstract: The purpose of the present invention is to provide a semiconductor memory device, which has low leakage current or threshold value voltage control method excluding impurity injection. Additionally, the present invention is to provide a semiconductor memory device, in which the device could be shrink in size, and have extremely long recharging cycle and high-speed write-in possibility; and the semiconductor apparatus that uses the same. The solving means is to use the extremely thin semiconductor as the channel, in which latch effects of quantum mechanics in film thickness direction are used to decrease leakage current. Additionally, the semiconductor memory device that reads out the conductance between source and drain of the transistor according to the variation of the amount of stored charges and performs the memorization is featured with the followings: the channel of the transistor installed at charge storage region for injecting charges or releasing charges is composed of a semiconductor having a thickness thinner than 5 nm. According to the present invention, both high speed of writing in information and long time of retaining information can be obtained. Based on the present invention, a semiconductor memory apparatus with the characteristics of high integration, high speed and low electricity consumption can be realized such that the present invention has pronounced effects on making a system with low electricity consumption and small size.
Patent TW-442258-B (TW)
Title: Centrifugal brake device of double bearing type reel
Inventor: MORIMOTO SHINICHI
IPC: A01K89/0155
Filed: 2000-02-25
Granted: 2001-06-23
Abstract: The object of this invention is to provide a brake device which gives large brake forces and can be adjusted to give a clear brake force difference. This centrifugal brake device 23 of the double bearing type reel is a device for braking a spool 12 rotatably mounted in a reel body 1 by a centrifugal force, and comprises a moving mechanism 55 and a brake member 52 having plural swinging members 53 and a cylindrical brake liner 57. The plural swinging members 53 are mounted on a rotary member 51 rotated in interlock with the spool at spaces in the circumferential direction in a state capable of being swung in the outer radial directions on plural swinging shafts disposed in the circular direction, and have contact portions 53c, respectively, whose positions in the axial direction of the spool are different. The brake member is disposed in a state capable of being brought into contact with the outside contact portions of the swinging members, and mounted in the reel body in a state capable of being moved in the axial direction of the spool but incapable of being rotated. The moving mechanism can move the brake member in the axial direction of the spool.
Patent TW-441134-B (TW)
Title: Chip photosensor assembly
Inventor: LIN HUNG-MING
IPC: H01L31/0216
Filed: 2000-03-06
Granted: 2001-06-16
Abstract: A chip photosensor assembly comprises a substrate on top of which a printed wiring circuit is installed, a photosensor chip with its bottom pasted on top of the substrate, a sensor area and some electrical connection ports formed by some photosensors on top of the chip, and electrically connect the electrical connection port with the print circuit board of the substrate though the electrical connection port, an insulating passivation layer covering the chip and the spot of electrical connection with the substrate, and a light-transmitting hard passivation layer pasted on the sensor region of the chip. The light-transmitting hard passivation layer is formed by covering the transparent photo-imagineable hard-coating material coated on top of the photosensor chip using the photolithography process on the sensing region.
Patent TW-I233951-B (TW)
Title: Stabilized bromine solutions, method of manufacture and uses thereof for biofouling control
Inventor: YANG SHUNONG
IPC: C02F1/76
Filed: 2000-03-28
Granted: 2005-06-11
Abstract: Stabilized bromine solutions are prepared by combining a bromine source and a stabilizer to form a mixture, adding an oxidizer to the mixture, and then adding an alkaline source to adjust the pH of the mixture to at least 13.
Patent TW-531568-B (TW)
Title: Electrode structure
Inventor: REVILL BRIAN KENNETH
IPC: C25B9/17
Filed: 2000-05-06
Granted: 2003-05-11
Abstract: An electrode structure for use, for example, in a bipolar electrolyses comprising (i) a pan with a dished recess and a flange around the periphery thereof for supporting gasket means for sealing a separator between the flanges in adjacent electrode structures, which separator is disposed between the surface of the anode of a first electrode structure and the cathode of a second electrode structure such that the anode surface is substantially parallel to and faces but is insulated and spaced apart from the cathode surface by the separator and is hermetically-sealed to the separator, (ii) an electrically conductive plate spaced from the pan, (iii) a plurality of electrically-conductive members to which the electrically conductive plate is electro conductively attached and which provide electrically-conductive pathways between the pan and the electrically conductive plate, (iv) inlet for electrolyte and (v) outlets for liquids and gases wherein where the electrode structure is an anode structure the dished recess is provided with a plurality of inwardly projecting projections and where the electrode structure is a cathode structure the dished recess is provided with a plurality of outwardly projecting projections such that the inwardly projecting projections in the dished recess of the pan of the anode structure mate with the outwardly projecting projections in the dished recess of the pan of an adjacent cathode structure in a bipolar electrolyses comprising a plurality of the electrode structures.
Patent TW-445474-B (TW)
Title: Relay structure and its manufacturing method
Inventor: WU SUNG-REN
IPC: H01H45/02
Filed: 2000-06-13
Granted: 2001-07-11
Abstract: A relay structure and its manufacturing method are provided. The relay structure comprises a base, at least one set of switches arranged in front of the base, and a chamber arranged on the back of the base. A magnetic pole member is fixedly installed in the chamber. An insertion piece is formed on the upper portion of the chamber, so that the insertion piece is supported between the elastic contact point and the push board of the magnetic pole member. Finally, the structure is sealed by a lid body. The feature of the structure is that the length of the chamber at the back of the base is longer than the length of the magnetic pole member by 0.5 to 3 mm, so that there is a distance between the magnetic pole member and the inner wall of the chamber when the magnetic pole member is placed in the chamber of the base. Furthermore, a distance-measuring driver is used to push the push board forward from the back, such that when the magnetic pole member pushes the elastic contact point via the insertion piece to exactly come in touch with the front fixed contact point, the driver further pushes the magnetic pole stand for a predefined distance and then the magnetic pole member and the base are connected as a whole by gluing.
Patent TW-508984-B (TW)
Title: An inspection device for components
Inventor: BOLLINGER PETER
IPC: H05K13/04
Filed: 2000-07-14
Granted: 2002-11-01
Abstract: The components (11) to be examined are held by suction at a support device (10) and inspected by a video camera. The workpiece is recorded from two different sides via different beam paths (25, 26) using the same video camera, wherein two pictures of the same object are reproduced in different views and evaluated by image processing. Thus, it can be determined whether the component (11) is intact and, in particular, whether its legs (13) are present and at the correct place.
Patent TW-I229658-B (TW)
Title: System for preparing polymer encapsulated glass fiber pellets
Inventor: STRAIT MICHAEL A
IPC: C03C25/26
Filed: 2000-10-03
Granted: 2005-03-21
Abstract: A process and apparatus for making densified glass fiber pellets (48) substantially encapsulated in a polymeric shell from chopped segments (24) of multi-filament glass strand is described. The densified pellets may be advantageously produced by hydrating chopped glass strands and then pelletizing them by tumbling in a rotary drum (41), densifying the resulting pellets by tumbling in a rotating zig-zag or undulating tube (42), drying the pellets and encapsulating them in a polymeric composition. The resulting pellets exhibit enhanced degradation resistance during bulk storage and handling.