Patent GB-894935-A (GB)
Title: Electrical parallel to serial converter
IPC: G06F13/18
Filed: 1959-06-19
Abstract: 894,935. Distributers for data transmission. STANDARD TELEPHONES & CABLES Ltd. June 19, 1959 [June 21, 1958], No. 21116/59. Class 40 (1). An encoding system producing a serial pulse train from stored binary signals comprises a counter the capacity of which equals the number of signals stored, the stages of the counter being connected to an array of gates arranged so as to produce in each condition of the counter an impulse or no impulse according to the corresponding binary signal stored. The apparatus is for recording on a piece of magnetic tape forming part of an envelope, data relating to a cheque which is placed inside the envelope. The data consists of twenty-four decimal digits. An operator reads the cheque and enters the digits by means of a keyboard into a relay store, four relays representing each decimal digit in pure binary or Aiken code. These stored signals are to be read out in serial form in twenty-four groups of four signals and recorded in a single track on the magnetic tape. Following this recording the same data is recorded again in inverted form. The counter consists of seven binary stages the outputs of which are shown at BS 0 -BS 6 , Fig. 2. Outputs of the first three stages are gated together by eight OR-gates M 3- M 10  so that for each of the eight conditions of counting stages BS 0 -BS 2  a different one of the eight OR gates give no output while all the others give an output. The counter is connected to a monostable multivibrator in such a manner that when set going it generates its own stepping pulses and continues for two complete revolutions. The zero output appears on the terminals of the OR gates in succession. The other four stages have connected between stages BS 3  and BS 4  a feed-back which eliminates one of the four possible states of these two stages so that the group of four stages count 12 instead of 16. The number of binary digits to be sent is 24x 4=96 and the total capacity of the counter BS 0 -BS 6  is the same (12 x 8=96). The outputs of stages BS 3 -BS 6  are applied to twelve AND gates G7-G18, one of which is enabled in each condition of the stages. These gates are enabled in sequence. The eight outputs from the OR gates M 3 -M 10  are applied to each of the gates G7-G18 through contacts K01 to K96 corresponding to the ninety-six relays storing the data to be recorded. The zero output from a gate M 3 -M 10  inhibits the gate G 7  &c. although all the other inputs are activating. If all the contacts KO 1 -K 96   were closed, the gates could never conduct because of the presence of an inhibiting zero signal on one of the inputs. If a contact is open owing to the corresponding relay being picked, the inhibiting signal is at a particular instant, prevented from reaching the gate and the gate conducts to give an output pulse through OR gate M 11 . The stored data is therefore read out in serial form and recorded on the magnetic , tape. After recording the data in its true form the data is read out again by the second revolution of the counter, the signals this time passing to the recording head via an inverter so that the inverted form is recorded. Timing pulses are recorded on the magnetic tape in a parallel track.