Patent GB-880893-A (GB)
Title: Improvements in or relating to high speed electronic interrogation systems
IPC: H04Q3/52
Filed: 1959-10-29
Abstract: 880,893. Automatic - exchange systems. LUCAS, P. M., and ROUZIER, M. M. Oct. 29, 1959 [Oct. 29, 1958], No. 36781/59. Class 40 (4). [Also in Group XL (b)] In a matrix of condensers whose charged or uncharged condition is required to be determined by pulses on associated row and column leads, the row pulses are applied to all condensers in a row and simultaneous pulses are applied to inhibition circuits associated with all the columns to inhibit the discharge of the condensers. In the column which is pulsed however, this inhibition is nullified to permit the condenser to discharge and thereby to produce an output on a common output terminal. As shown. Fig. 1, the identity of a line to be tested is registered as a combination of settings of four binary counters 101 . . . 104. Each cross point to be tested comprises a cell 141 in a matrix of such cells, the horizontal row being determined by the settings of 101, 102 and the vertical column being determined by the settings of 103, 104. The outputs of the registers feed respective decoders 111 . . . 114 which are enabled by simultaneous pulses applied to terminals 18, 19, 18<SP>1</SP>, 19<SP>1</SP> the pulses on 19, 19<SP>1</SP> straddling those on 18, 18<SP>1</SP>. The output from 111 and the output from 112, inverted by transistors 122, are fed to a submatrix of cross points 131, comprising transistor gate circuits whose outputs are the rows r of the main matrix. The row concerned is indicated by a positive-going pulse rising from - 12 V. to 0. Similar arrangements are provided for the decoders 113, 114, but the outputs of the cross-points 133 of the sub-matrix are inverted by transistors 16 before being applied to column conductors 60s, the column being indicated by a negative-going pulse dropping from 0 to - 12V. The cell 141 and the circuit 151s (of which there is provided one for each column) are shown in more detail in Fig. 2. Marking of a cell is effected by A.C. applied to coil 501 (although in an alternative arrangement a simple D.C. marking is used) and this is rectified to charge condenser 507 to a value above its normal - 24 V. (up to - 12 V.). When the horizontal lead r is pulsed (from - 12V to 0) the upper electrode of diode 508 thus rises to 0 or stays at - 12V according as the condenser 507 is charged or not. Terminal 604 is pulsed with a pulse straddling the pulse on lead r. In the absence of a pulse on the column lead 60s the pulse on 604 raises the potential of point 602 to 0 thereby preventing the discharge of condenser 507 through diode 508. If, however, the column lead receives a - 12V pulse point 602 falls to this voltage and 607 is back-biased. Condenser 507, if charged, may now discharge and in so doing pulses the base of transistor 609 positively. This transistor may also be pulsed positively due to the pulse on 604 if lead 60s is not pulsed. This pulse must be eliminated. Accordingly, the transistor output feeds an " and " gate comprising diodes 611, 612, 613, diode 612 only permitting the gate to open when the column lead 60s is pulsed. Diode 613 is pulsed only during the latter half of the pulse period to permit an output from 601. Thus terminal 601 produces an output only if the condenser 607, corresponding to the marked row and column, is charged.