baber/WOPTO huggingface dataset:
Patent TW-366598-B (TW)
Title: Hybrid organic-inorganic semiconductor light emitting diodes
Inventor: BOJARCZUK NESTOR A JR
IPC: H01L51/00
Filed: 1997-12-11
Granted: 1999-08-11
Abstract: This invention provides a novel hybrid organic-inorganic semiconductor light emitting diode. The device consists of an electroluminescent layer and a photoluminescent layer. The electroluminescent layer is an inorganic GaN light emitting diode structure that is electroluminescent in the blue or ultraviolet (uv) region of the electromagnetic spectrum when the device is operated. The photoluminescent layer is a photoluminescent organic thin film such as tris-(8-hydroxyquinoline) Al, Alq3, deposited onto the GaN LED and which has a high photoluminescence efficiency. The uv emission from the electroluminescent region excites the Alq3 which photoluminescence in the green. Such a photoconversion results in a light emitting diode that operates in the green (in the visible range). Other colors such as blue or red may be obtained by appropriately doping the Alq3. Furthermore, other luminescent organics in addition to Alq3 may be used to directly convert the uv or blue to other wavelengths of interest. The invention provides the benefits of simplicity and ease of fabrication, since a complete redesign of the structure is not necessary to change emission wavelength, and the possibility for making displays by spatially varying the deposition of the emissive layer.
Patent TW-419724-B (TW)
Title: Projection exposure method and apparatus
Inventor: NISHI KENJI
IPC: G03F7/20
Filed: 1998-01-22
Granted: 2001-01-21
Abstract: A projection exposure method and apparatus, wherein a first pattern is illuminated in a first exposure step with a light beam which is inclined by a predetermined amount in a direction perpendicular to a line direction of a first L/S pattern with respect to an optical axis of a projection optical system. The illumination in this manner causes two-beam illumination effected by a 0-order diffracted light beam and a -1-order diffracted light beam generated from the first pattern formed on a mask. Modified illumination is performed in a second exposure step for a mask formed with an L/S second pattern including a line pattern in a direction perpendicular to the first line pattern. A pattern image, which has a high resolution and a large depth of focus in the respective line directions, can be formed on a photosensitive substrate by performing multiple exposure by using the modified illumination in the separate steps respectively for the first and second patterns which are in an orthogonal relationship. The multiple exposure is performed by using a mask stage or mask stages for carrying a plurality of masks independently or simultaneously.
Patent TW-420734-B (TW)
Title: The fluid treatment device of filament strip, and the filament strip made of a interweaving filaments
Inventor: SAIJO TERUAKI
IPC: D02J1/08
Filed: 1998-03-17
Granted: 2001-02-01
Abstract: This invention relates to the filament strip's fluid treatment device which contains filament strip through hole and the fluid jet hole treat has fluid outlet in the filament strip through hole. And the fluid jet hole contains the straight hole and the enlargement hole which is situated around the fluid outlet area at the end of the straight hole. The enlargement hole's width along the filament strip through hole's axis is gradually enlarging from the end of the straight hole.
Patent TW-356498-B (TW)
Title: Lock mechanism
Inventor: NEWMAN DONALD JOHN
IPC: E05B17/04
Filed: 1998-04-08
Granted: 1999-04-21
Abstract: A kind of lock bolt having a deadbolt which is movable between the location of an actuator and the location of an non-actuator, the first and second independently operable actuators, the insider actuator usually comprises a turn knob or the like and the outside actuator usually includes a key operation lock which comprises a gear train through which each of the two actuators is drivably connected to the deadbolt, the gear train also includes two driver gears that are independently rotatable about a common axis of rotation, and each is connected to a respective one of the two actuators so as to rotate in response to operation of that actuator, the gear train also includes two driven gears which are united to form a single piece composite gear, and each driven gear is cooperable with a respective one of the two drive gears, the composite gear is connected to the deadbolt so that it moves between operative and inoperative positions in response to rotation of the composite gear, each actuator adopts a rest position when deadbolt is in the inoperative position, and neither drive gear cooperatively engages with the composite gear when the respective actuator is in the rest position, moreover the gear arrangement is such that the outside actuator turns 360 DEG to cause the deadbolt to move from one of its positions to the other, and whereas actual rotation of the second actuator moves in a degree smaller than 360 DEG for one of the location to the other.
Patent TW-369782-B (TW)
Title: Method of and apparatus for selectively engaging an internal trap filter and implementing an external trap filter through a single pin
Inventor: NAYEBI MEHRDAD
IPC: H04N9/78
Filed: 1998-05-05
Granted: 1999-09-11
Abstract: A method of and apparatus for selectively engaging an internal trap filter and implementing an external trap filter through a single pin routes a separate luminance signal through the pin or through an internal trap filter based on the logical voltage level at the pin. When implementing an external trap filter the external components comprising the filter are coupled between the pin the ground and a voltage level of a pin is maintained at a logical low voltage level. When the pin is at a logical low voltage level, two path switches are closed and the separate luminance signal is routed through the pin to be filtered by the external trap filter. The internal trap filter is engaged by coupling a precision resistor between the pin and the power supply voltage thereby pulling the voltage level of the pin to a logical high voltage level and opening the two path switches to bypass the pin and route the separate luminance signal through an internal trap filter. When voltage level of the pin is at a logical high voltage level, a bias switch is closed thereby providing a bias current, created from the voltage drop across the precision resistor, to the internal trap filter. The internal trap filter is activated by the bias current and filters the separate luminance signal according to the value of the bias current, before the separate luminance signal is combined with the separate chrominance signal. The value of the bias current is controlled by the value of the precision resistor.
Patent TW-418268-B (TW)
Title: Paper-making screen apparatus
Inventor: AIKAWA YOSHIHIKO
IPC: D21D5/06
Filed: 1998-05-13
Granted: 2001-01-11
Abstract: The paper-making screen apparatus 1 of the invention for separating foreign matters from paper-making raw materials via a screen S comprises a screen having a first annular end plate S1 located at an end thereof; a second annular end plate S2 located at the other end thereof, having a plurality of openings Kn for male screws; a plurality of interval keeping members Hn each secured to the first end plate S1 and the second end plate S2, keeping an interval from the first end plate S1 and the second end plate S2, and having female screws on the side facing the second end plate S2; a plurality of male screws Vn engaging with the female screws Mn; and a plurality of rod-shaped members Bn each having an end in contact with the first end plate S1 and the other end in contact with the second end plate S2, and annularly arranged in parallel with each other at certain intervals; the first end plate S1 and the second end plate S2 holding the ends of the plurality of rod-shaped members Bn in between; and the second end plate S2 being secured to the interval keeping members Hn by engaging the male screws Vn via openings Kn for male screws provided in the second end plate S2 with the female screws Mn and tightening the second end plate S2 against the plurality of interval keeping members Hn.
Patent TW-442943-B (TW)
Title: Structure of electrostatic discharge protective device and the fabricating method of the same
Inventor: WU SHIE-LIN
IPC: H01L23/60
Filed: 1998-06-12
Granted: 2001-06-23
Abstract: This invention is about structure of electrostatic discharge protective device and its fabricating method. First, a substrate having a field silicon oxide region is provided, in which electrostatic discharge protective device region, P-channel metal oxide semiconductor (MOS) device region and N-channel MOS device region are defined. The gates and gate oxide layers for both N-channel MOS device region and P-channel MOS device region are defined. By using N-type and P-type ion implantation processes, lightly doped drain region is formed in N-channel MOS device region and P-channel MOS device region, respectively. Then, by using N-type and P-type ion implantation processes, source/drain regions are formed in N-channel MOS device region and P-channel MOS device region, respectively. After that, silicon dioxide layer is defined to form polysilicon layer and sidewall of gate. Self-aligned silicide process is then conducted such that a silicide layer is formed on top of gate and source/drain regions in P-channel MOS device region and N-channel MOS device region. Polysilicon layer is then etched back to form the gate of electrostatic discharge protective device. An ion implantation process is used to form the source/drain regions of electrostatic discharge protective device.
Patent TW-367413-B (TW)
Title: Pulse bandwidth detection apparatus and pulse bandwidth detection method
Inventor: NISHIUCHI YASUKI
IPC: G01R29/02
Filed: 1998-06-15
Granted: 1999-08-21
Abstract: As for the pulse bandwidth of measuring the receiving signal, it will take longer time for measuring longer pulse signal and can not be applied in high speed pulse communication. The invention is to store the two initial counting values of the maximum and minimum within the specific range of pulse bandwidth. The two values are used as initial values and counted down by down counter. According to the relationship between the time sequence of missing bytes and the down time sequence of pulse signal under detection, it can judge whether the pulse bandwidth of pulse signal is within the specific range.
Patent TW-440843-B (TW)
Title: Apparatus combining with synchronous dynamic random access memory having part of defects
Inventor: JU JIANG-TSUEN
IPC: G11C11/407
Filed: 1998-06-19
Granted: 2001-06-16
Abstract: In this invention, a kind of apparatus that combines with synchronous memory having part of defects is proposed. By selecting the block of normal part in each die, two or multiple memory dies can be merged such that the merged dies can perform the operations, such as plan, data read/write and so on, like a single normal die. The combined apparatus of synchronous memory in this invention can include the followings: a normal block selection circuit, in which the normal block selection circuit responds a reference signal to select the normal block of synchronous memory die; and a die selection circuit, in which the die selection circuit responds a die selection signal and a reference signal to select the die from the synchronous memory dies to perform the operation.
Patent TW-400609-B (TW)
Title: The structure of flash memory and its manufacturing method
Inventor: HUNG YUN-DING
IPC: H01L21/8247
Filed: 1998-08-04
Granted: 2000-08-01
Abstract: This invention discloses a flash memory structure and its manufacturing method that uses shallow trench isolation (STI) process. Firstly, the shallow trench isolation structure is formed on the semiconductor substrate. Next, proceed the etching step to etch a shallow trench that corresponds the subsequent shallow trench isolation region. Furthermore, fill metal layer in this shallow trench isolation to form the buried metal layer. Then, the stacked gate is formed on the substrate and a self-aligned implantation is conducted by using the stacked gate as a mask. Therefore, the source and drain are formed respectively on two sides of the folding gate. The source connects with the buried metal layer and forms the common source. The above-mentioned buried metal layer is the characteristics of this invention which can be applied in the process of the shallow trench isolation (STI) and can save the occupied area of the device to provide a larger array density.
Patent TW-395078-B (TW)
Title: Voltage converter
Inventor: STEINKE JURGEN
IPC: H02M1/12
Filed: 1998-08-20
Granted: 2000-06-21
Abstract: In a voltage converter (39) having a voltage intermediate circuit (11) and an invertors (10) following on from the voltage intermediate circuit (11) , / which inverter (10) produces a three-phase AC voltage at its outputs and is connected to the output terminals (20,..,22) of the voltage converter (39) via a filter arrangement (17,..,19;23,..,25), the filter arrangement having in each case a filter inductor (17,..,19), connected in series with the output terminal (20,..,22), and a filter capacitor (23,..,25) which is connected between the output terminal (20,..,22) and a common capacitor star point (26), effective attenuation of the DC system is achieved by virtue of the fact that the capacitor star point (26) is connected to the voltage intermediate circuit (11) via an RC element (38) having a capacitor (36) and a resistor (37).
Patent TW-510802-B (TW)
Title: Method for sterilizing medical instruments
Inventor: SCHIFFMANN ROBERT FRANK
IPC: H05B6/80
Filed: 1996-01-27
Granted: 2002-11-21
Abstract: A method of sterilizing an object having the steps of providing a container with an exterior surface that has a microwave interactive layer and defines an interior space having an initial temperature. An object is then placed within the interior space of the container. Next, the microwave interactive layer is exposed to a first amount of microwaves so that the layer produces heat which raises the temperature within the interior space to a predetermined sterilization temperature. The predetermined sterilization temperature is then maintained within the interior space for an amount of time sufficient to sterilize the object.
Patent TW-413946-B (TW)
Title: Semiconductor apparatus and method for manufacturing same
Inventor: KOGA HIROKI
IPC: H01L21/318
Filed: 1999-03-12
Granted: 2000-12-01
Abstract: A semiconductor device and a manufacturing method for the semiconductor device in which there is no defect such as deteriorated switching characteristics of a MOS transistor or long-term reliability of a gate oxide film, increased leakage current between a gate electrode and a silicon substrate or the deteriorated gate withstand voltage, otherwise produced due to excessive etching of a silicon oxide film in an outer trench rim neighboring to a device area to form a recess to expose the shoulder of a device area. In order to prevent this from occurring, a silicon oxide film spacer is provided on a sidewall section of an opening on a silicon substrate after an opening is formed in the silicon nitride film, in order to form a trench smaller in dismeter than the diameter of the opening in the silicon nitride film.
Patent TW-432144-B (TW)
Title: Electromechanical cylinder lock
Inventor: HURSKAINEN OIVA
IPC: E05B47/06
Filed: 1999-03-16
Granted: 2001-05-01
Abstract: An electromechanical cylinder lock including a lock body (1) and, inside thereof, a turnable lock cylinder (2) and a locking mechanism comprising locking means which normally prevent turning of the lock cylinder (2) with regard to the lock body (1) and which can be moved by means of a key (7) of the lock into a releasing position allowing turning of the lock cylinder (2), whereby a key (7) for the lock includes means (11) for transmitting an electronic code and the lock correspondingly includes means (13, 14) for receiving and identifying the code of the key so that, on identifying a correct code, the receiving and identifying means (13, 14) are arranged to enable mechanical opening of the lock by means of the key (7). The lock includes at least one locking disc (9, 9', 9"") with a key opening (9b, 9', 9b"") which is so designed that turning of the key does not directly act mechanically on the locking disc (9, 9', 9""). The lock also includes coupling means for coupling the at least one locking disc (9, 9', 9"") to the turning movement of the key. In addition the lock is provided with electric operating means (17, 17', 17"") activated by means of the electronic code from the key and which in its active state controls the coupling means so that the at least one locking disc (9, 9', 9"") turns with the key into a position required for the opening of the locking mechanism.
Patent TW-424143-B (TW)
Title: Parallel alignment type liquid crystal display device and producing method thereof, and measuring method of splay-bend transition time and apparatus therefor
Inventor: ISHIHARA SHOICHI
IPC: G02F1/13363
Filed: 1999-04-08
Granted: 2001-03-01
Abstract: The present invention provides an OCB mode type liquid crystal display device comprising a liquid crystal material with a high transition speed in which a bend alignment is readily attained by applying a voltage approximately as low as several volts. In a liquid crystal display device comprising a negative retardation plate and a liquid crystal material having a parallel homogeneous alignment and being held between a pair of substrates, the liquid crystal material satisfies one of the following equations; K11<=10pN, K11/<DELTA><epsilon><=1.0pN, K11.K33<=130pN<2>, and K11/K33<=1.0. The liquid crystal material may include a biphenyl liquid crystal, pyrimidine liquid crystal, or dioxane liquid crystal.
Patent TW-456154-B (TW)
Title: Service specific interfacing in point to multipoint communications
Inventor: LOHMAN MIKE S
IPC: H04L12/56
Filed: 1999-07-24
Granted: 2001-09-21
Abstract: A multi-transport mode interface module, and various signal packing and filtering methods performed by the multi-transport mode interface module, of a communications system (100) consisting of a plurality of line interfaces (2554) for receiving and transmitting signals, wherein the signals comprise a plurality of transport mode signals, an interface body (2500) coupled to the plurality of line interfaces, wherein the interface body includes a plurality of signal formatters (2504, 2506), wherein respective ones of the signal formatters format respective signals (2800, 2900) and multiplex the respective signals onto a bus system (2502) and a bus interface coupled to the interface body for interfacing with the bus system.
Patent TW-461139-B (TW)
Title: Retractable and pivotable multiple frequency band antenna
Inventor: RUDISILL CHARLES ALBERT
IPC: H01Q5/00
Filed: 1999-07-30
Granted: 2001-10-21
Abstract: A pivotable and retractable antenna contains mechanical and electrical components for connecting to, and matching the impedance of, radio frequency circuitry within an electronic device, such as a radiotelephone. A dielectric substrate has one end movably mounted to the housing of a radiotelephone and an opposite free end. The end movably mounted to the housing is configured to move into various positions to allow the dielectric substrate to have a first extended position, a second extended position and a retracted position. In a first extended position, the dielectric substrate extends along a longitudinal direction defined by the radiotelephone housing. In a second extended position, the dielectric substrate free end is pivoted away from the radiotelephone in a direction transverse to the longitudinal direction of the housing.
Patent TW-425708-B (TW)
Title: Manufacturing method for forming capacitor structure and contact plug
Inventor: LIN WEI-RUEI
IPC: H01L23/522
Filed: 1999-09-01
Granted: 2001-03-11
Abstract: A manufacturing method for forming crown-type capacitor structure and contact plug is suitably applied to a semiconductor substrate having a source/drain areas. The method includes the following steps: sequentially forming a first area and a second area, an active area, a gate, a bit line, an insulation layer and a first and a second contact plugs connected to the source/drain areas of the first and the second areas respectively; forming a barrier and then removing it to leave the first opening; forming the third opening at the bottom of the second opening to expose the top surface of the second contact plug for forming the third contact plug; removing the remaining barrier in the first opening so as to form the fourth opening at the bottom, and forming the crown-type capacitor structure with conventional semiconductor process; after forming the insulation layer, forming the fifth and the sixth openings in the first and the second areas; after filling the conductive layer, completing the contact plug for connecting the capacitor structure in the first area and the source/drain area in the second area.
Patent TW-436838-B (TW)
Title: Plasma display panel production method for suitably producing GHIG picture quality plasma display panels
Inventor: SUZUKI SHIGEO
IPC: H01J11/02
Filed: 1999-09-28
Granted: 2001-05-28
Abstract: A PDP (plasma display panel) production method with which it is possible to continuously apply fluorescent ink for a long time and easily form uniform fluorescent substance layers with precision even for a minute cell structure, is provided. While fluorescent ink is being continuously discharged from a nozzle and is relatively scanning a plate along channels between partition walls thereon so as to apply the fluorescent ink to the channels, a position of the nozzle passing through each of the channels is adjusted based on position information concerning the channel. Alternatively, in successive application of the fluorescent ink to the channels, the nozzle continuously discharges the fluorescent ink without interruption even when the nozzle is not above any of the channels. For the fluorescent ink composition, fluorescent particles of the average size 0.5-5 mu m and a mixture of solvents, such as terpineol, butyl carbitol acetate, butyl carbitol, pentanediol, and limonene, whose end group is OH, are used together with a binder such as an ethylene oxide polymer or ethyl cellulose whose cellulosic molecule contains no less than 49% ethoxy (-OC2H5). These components are doped with an additive such as a dispersing agent or a diselectrifying material.
Patent TW-486512-B (TW)
Title: Method of manufacturing a substrate for electronic device by using etchant and electronic device having the substrate
Inventor: JO GYOO-CHUL
IPC: C09K13/00
Filed: 1999-12-01
Granted: 2002-05-11
Abstract: Method of manufacturing a substrate for electronic device by using etchant and electronic device having the substrate is provided, while using low-resist Al films or Al alloy film layer developed on other metal film to be the wiring material, by implementing an one-time etching said layer on the metal layer to form almost the same etch ratio case as etched. It is an etchant, characteristic in said etchant, having a fluoric acid, periodic acid and sulfuric acids, wherein total weight % of the fluoric acid and periodic acid is between 0.05 and 30 wt%, wherein a weight % of the sulfuric acids is between 0.05 and 20 wt%, and wherein a weight ratio of the periodic acid over the fluoric acid is between 0.01 and 2. The composed material used the wiring 5, 12, 14 of each film having Al films or Al alloy film layer and Ti films or Ti alloy film is etched, almost the same etching ratio, as a whole.