Patent GB-1188337-A (GB)
Title: Facsimile System
IPC: H04N1/403
Filed: 1967-07-25
Abstract: 1,188,337. Facsimile systems; peak detecting; gating circuits. XEROX CORP. 25 July, 1967 [1 Aug., 1966], No. 34024/67. Headings H3T and H4F. To ensure the detection of both low contrast information signals and high resolution information signals in a composite video and noise analogue facsimile signal, the facsimile transmitter includes a detector 17, Fig. 1, for generating analogue video signals corresponding to information and background portions of a document 11 being scanned by a cathode ray tube, background readers 19, 21 for generating a background bias signal proportional in magnitude to the average reflectance of the background being scanned, a positive peak detector 35 and a negative peak detector 33 for generating first and second dynamic clipping level determining control signals proportional to the polarity excursions of the video signals, a positive OR gate 41 which selects the more positive of the background signal from reader 21 via level translator 43 and the first dynamic clipping level determining signal from detector 35, a negative OR gate 45 which selects the more negative of the signal from gate 41 and the second dynamic clipping level determining signal from detector 33 when modified by noise detector and rectifier circuit 37 and slicer control 39, and a video slicer in which the video signal from detector 17 is clipped by the output signal i.e. the dynamic clipping level signal, from gate 45, thus determining which portions of the analogue signal correspond to information signals and which portions correspond to noise and background signal. The dynamic clipping level follows the analogue signal within an envelope described by a level following above the positive peaks of the background present when background is being detected and by a level slightly more negative than the positive peaks when information signals are being detected. In the video slicer 29 an information or black signal level is generated each time the instantaneous amplitude of the analogue video signal is more positive than the dynamic clipping level. Slicer 29 is coupled to trigger 47 wherein constant amplitude signals are generated corresponding to the detected white and black portions of the original document. The output of trigger 47 is mixed with synchronizing signals in gate 49 and transmitted. The signal from the second background reader 21 indicative of the background level or past history of the document is coupled to brightness amplifier 23 which in conjunction with the phosphor noise monitor 25 and the noise cancelling amplifier 27 controls the brightness of the CRT spot. In black and white delay circuits 24 and 26 the composite video signal is compared with the dynamic clipping level to indicate when information signals are being detected, and trigger 24 generates an appropriate control signal for preventing the background circuits from charging during detection of information signals. Thus when background is being detected the background reader capacitor maintains a suitable voltage level representing prior background reflectivity, and for darker backgrounds the CRT spot is made more intense thereby to compensate for background variations. By increasing the illumination greater source noise signals are generated but this is compensated by the translating operation of the noise detector rectifier 37, slicer control 39 and negative peak detector 33 which translate the negative signal level away from the noise peaks in the background. The negative peak detector generates a dynamic clipping level determining signal by controlling the charging of a capacitor at a predetermined rate when the analogue signal excursion is going negative and a different rate when the excursions are in the positive direction. Slicer control 39 is utilized to translate the output of the negative peak detector in a positive i.e. information, direction. In Fig. 3, waveform 84 represents the composite video and noise analogue signal from detector 17, waveforms 57 and 69, Fig. 3b, represents the outputs from positive peak detector 35 and background reader 21 respectively, waveform 70, Fig. 3c, represents the output of positive OR gate 41, waveforms 81 and 85 represent the outputs from negative peak detector 33 and this output when selectively shifted positive an amount determined by the positioning of the tap of potentiometer 39 respectively, waveform 87, Fig. 3d represents the output of negative OR gate 45 i.e. the dynamic clipping level, and waveform 88, Fig. 3e represents the video binary signal generator at the slicer circuit 29 indicative of the information content of the analogue signal. Detailed transistor circuits, Figs. 4 and 5.-As shown in Fig. 4 the video signal is coupled to input terminal 89 and from there to first background reader 19, negative peak detector 33 and translator circuit 31. In response to the excursions of the video signal complementary emitter followers Q1 Q2 control the selective charging of capacitor 91. An input from the black and white delay circuit on terminal 93 controls the forward biasing of diode 95 thus preventing the negative excursions of the video signal from charging the capacitor 91 negative during detection of information signals. The output of the first background reader is coupled via buffer transistor Q3 to the input of the second background reader circuit 21 which comprises a pair of complementary emitter followers Q4 and Q5 for controlling the charging of capacitor 97 in response to excursions in the video signal reflected in the charging of the first background capacitor 91. Thus the cascaded time constants of the first and second background capacitors control the generation of a D.C. signal proportional to the average background reflectivity of the document. The output of the second background reader circuit is coupled via isolation amplifier Q6 as one input to positive OR gate 41 through diode 99. The background level on the second background capacitor 97 is coupled to the input of the CRT brightness control amplifier 23. In the absence of a control signal on terminal 103 which indicates the CRT is off; the background signal is coupled to the base of amplifier Q7 which generates at output terminal 107 a signal for controlling the brightness of the CRT. In respect to positive excursions in the analogue video signal coupled from 89 to negative peak detector 33, capacitor 71 charges through a path including resistor 79 and resistor 73 paralleled by Zener diode 77 and resistor 78. The Zener diode 77 and resistor 78 preferably provide five microseconds lag in the charging of capacitor 71 up to 3 volts of the positive going video excursion. Resistor 73 permits capacitor 71 to charge much more slowly towards positive excursion levels after the Zener diode conduction has been reduced. In response to a negative video signal excursion, resistor 79 in series with forward biased diode 75 forms a low resistance path which permits capacitor 71 to charge very rapidly to the new level with two microseconds time lag. To prevent the detection of noise as legitimate information signals the output of the negative peak detector is combined with the output of CRT trace noise detector and rectifier 37. To reference the negative peak detector to a D.C. noise level a portion of the output noise signal from amplifier 23 is coupled from terminal 107 via capacitor 109 to the input of noise trace amplifier Q10. The output of Q10 is coupled to the primary winding 121 of transformer 123. Rectifier 129 is coupled in the secondary series winding circuit to rectify the noise pulses and to provide an asymmetric charging path for capacitor 131 towards the average positive value of noise peaks. Capacitor 71 discharges through resistors 39 and 135 towards a noise determined level. Clip level potentiometer 39 is arranged to vary the potential shift of the negative detector output signal that is coupled to diode 137 which comprises one input of negative OR gate 45. The other control signal for determining the instantaneous amplitude of the dynamic clipping level is generated by positive peak detector 35 similar to negative peak detector 45 but in which the time constants associated with capacitor 55 are the reverse of those in the negative peak detector. The output from detector 35 is coupled via diode 147 to the input of transistor Q11 of positive OR gate 41. In response to the signals coupled to diodes 99 and 147 the most positive is generated at the emitter of Q11 and is coupled via diode 149 to negative OR gate transistor Q9. The other input is coupled via diode 137 from the tap of clip level potentiometer 39. The most negative signal is reflected in the emitter of Q9 and coupled from terminal 151 to the video slicer 29, Figs. 1 and 5. In Fig. 5 the circuits of video slicer 29, black to white delay slicer and trigger 26 and 24, background noise mixer 28, and video gate 49 are shown. The output from gate 45 (Fig. 4) is coupled to terminal 153 and establishes the emitter bias on Q12 and Q13. The output from detector 33 (Fig. 4) is coupled to terminal 155 and establishes collector bias on Q14. The video signal from the scan detector 17 (Fig. 1) is coupled to terminal 157 via capacitor 159 and resistor 151 to Q12. The background noise mixer 28 combines the background noise signals into the bias level coupled to the emitter electrode of Q12 so that noise rejection is achieved. With the dynamic clipping level on the emitter of Q12 and the video coupled to the base, Q12 is switched off and on depending upon the instantaneous polarity of the emitter clipping level bias and video signals. The output from 29 is fed to trigger 47 which converts the signals into a two level signal representing the black and white levels which is passed to output terminal 167. The two level signal train is also coupled from terminal 169 to one input of sync gate 49, sync signals being applied to terminal 171.