baber/WOPTO huggingface dataset:
Patent JP-H01165366-A (JP)
Title: Cell fusion chamber
Inventor: IMAI KATSUYUKI
IPC: C12N15/00
Filed: 1987-12-22
Abstract: PURPOSE:To make it possible to carry out cell fusion without using alternating voltage and centrifugal force, by providing a lower electrode provided at the bottom of a chamber main unit and upper electrode having holes into which a cell can be passed and capable of moving to the state capable of coming into contact with the lower electrode. CONSTITUTION:A lower electrode 6 is provided at the bottom of a chamber main unit and a nylon mesh having insulation properties is bonded thereon. An upper electrode 5 bonded by mesh 7 consisting of similar material is arranged opposite the lower electrode 6. Namely, when a call suspension is charged into the chamber main unit 1, a liquid is floated on the lower electrode 6. Then when the upper electrode 5 is sunk, a cell is pressed between electrodes by self-weight of the upper electrode and simultaneously the liquid is passed into the hole of upper electrode and escaped upward. Then cell fusion is carried out by applying direct current pulse when the cell is pressed. As a result, the cell fusion can be carried out using only direct current pulse generator without using centrifugal separator as well as alternating current source.
Patent JP-2001143483-A (JP)
Title: Semiconductor memory
Inventor: KOMATSU NORIAKI
IPC: G11C16/04
Filed: 1999-11-16
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor memory of a virtual grounding system reducing power consumption at read-out operation, without causing erroneous read-out when burst length is changed and without performing pre-charge for a main bit line and a main virtual grounding line being not used. SOLUTION: In transistors MV2-MV4 of a dummy cell region DS in a bank selector 100, a threshold is controlled to be high, and the threshold of transistors MV2-MV4 of a dummy cell region DS is controlled to a value, at which the transistors are not made an on-state by voltage values of a select-signal BSG1, a select-signal BSG2, and a select-signal BSG3 applied to each gate. Only the threshold of a transistor MV1 is controlled to the same value as that of a transistor of which the threshold is used for an other logic circuit. In transistors for memory cell in the dummy cell region DS, all the thresholds are controlled to be high, formed in a state in which data is written, and controlled so as not to become an on-state by read-out voltage applied to a gate.
Patent JP-H11159775-A (JP)
Title: Oven toaster
Inventor: ORIKANE MASAAKI
IPC: F24C7/04
Filed: 1997-11-27
Abstract: PROBLEM TO BE SOLVED: To prevent readily softening food, such as rice cakes, from running down when heat-cooked and softened in an oven toaster. SOLUTION: An oven toaster comprises a heating chamber 3 which is provided with a main shelf 4 for placing cooking food, and a heater which is arranged at least below the main shelf 4. The main shelf 4 consists of a plurality of wires 4b arranged in parallel with a given interval therebetween and a wire 4a to which both ends of the individual wires 4b are connected at right angles. An auxiliary shelf 10 whose structure is similar to that of the main shelf 4 is fixed above the main shelf 4. Combination of the main shelf 4 and the auxiliary shelf 10 provides so much the more points for supporting readily softening rice cakes or the like when they are put thereon, thereby suppressing portions of the heated and softened rice cakes to run down.
Patent JP-H08184229-A (JP)
Title: Electric locking device
Inventor: SASAKI TORU
IPC: E05B65/00
Filed: 1994-12-27
Abstract: PURPOSE: To identify automatically the type of an electric lock to be connected. CONSTITUTION: An electric lock 1 consists of two types which comprise an energized lock and unlock type and a momentarily energized lock and unlock type. Both types are provided with a detection switch 13 which generates a locking signal f1 and an unlocking signal f2, interlocking with a cylinder. A two-wire conversion adapter 2 which is interposed between the electric lock 1 and a living unit 3 is provided with a lock and unlock identifying means 231 which identifies the locking and unlocking operations of the electric lock 1 based on a lock signal 11 and an unlock signal 12 in a CPU 23 and a lock type identifying means 232 which identifies the types of the electric lock 1.  The lock type identifying means 232 identifies the type of the electric lock 1 based on the presence of changes in the locking signal 11 and the unlocking signal 12 in the case when an actuator 12 which drives the cylinder is energized and stores the information in a RM. The CPU 23 controls a power direction switch-over circuit RY1 in conformity with the type of the electric lock 1 based on the information stored in the RAM and energizes the actuator 12 and drives the cylinder, thereby locking and unlocking the electric key.
Patent JP-2001140447-A (JP)
Title: Dry type attaching tile preset outer wall panel
Inventor: MASUNAGA YOSHIHIKO
IPC: E04B2/00
Filed: 1999-11-17
Abstract: PROBLEM TO BE SOLVED: To contrive total saving over production and execution aspect in dry type attaching tile presetting and contrive the improvement of the lightweight and heat insulation of a tile preset outer wall panel. SOLUTION: A substrate panel 3 is attached to the outdoor side of a panel frame 2, and a plurality of parallel tile attaching rails 4 are provided on the outdoor side of the panel 3. Tiles 5 are attached to each tile attaching rail in the longitudinal direction in parallel. The panel 3 has a folding frame part 10a folded to the rear side on the partial side of a metal plate 10, and provides a heat insulator 11 on the rear face. The end face of the panel 3 corresponding to the remaining side of the metal plate 10 is blocked with a cover rail 12.
Patent JP-2000163449-A (JP)
Title: Device and method for preparing and transmitting map related to arranging place of article
Inventor: MILLER STEVEN DOUGLAS
IPC: G06Q30/06
Filed: 1999-11-17
Abstract: PROBLEM TO BE SOLVED: To provide a computerized device easy to use for providing the position information of articles to retail sale customers by providing an interface with a course display logic to become the base of preparing a route from retail sale self service terminal equipment to retail sale articles. SOLUTION: The retail sale customer inputs a request on the position of the selected article to retail sale self service terminal equipment 18 connected to a computer in a shop preserving the position information of articles. Then, a data base table 26 preserving additional article position information is accessed by an interface 16 provided between a computer system, 12 and the retail sale self service terminal equipment 18. Besides, the interface 16 is provided with the course display logic to become the base of plotting the route between the retail sale self service terminal equipment 18 and the retail sale article. Then, the guidance of a route to the selected retail sale article is outputted to the retail sale self service terminal equipment 18.
Patent JP-H02171828-A (JP)
Title: Arithmetic unit and arithmetic processing method
Inventor: TAKAHASHI MASASHI
IPC: G06F7/535
Filed: 1988-12-24
Abstract: PURPOSE:To reduce an over head before and after repeated arithmetic and to improve operating speed matched to hardware quantity by preventing the absolute values of a dividend and a divisor from being obtained in the case of division with sign, executing subtraction when both dividend and divisor are the same signs and executing addition when both are the different signs. CONSTITUTION:The dividend of a prescribed bit is housed as an initial value to a dividend register 101 and the intermediate result of the arithmetic is successively housed. In the case when the dividend to be housed in the division with sign, the dividend is housed with the sign as it is and the sign bit of the dividend is housed to a sign bit register 102. Then, a shifter 103 outputs the value housed in the register to a high-order bit while being shifted or outputs the value as it is. The divisor of the prescribed bit is housed to a division register 104 and the sign bit of the divisor is housed to a sign bit register 105. Then, a shifter 106 shifts the divisor of the register 104 to the high-order bit. Thus, a time needed for the repeated arithmetic shortened and the overheads of preprocessing and post-processing are reduced.
Patent JP-H01170310-A (JP)
Title: Method and apparatus for eliminating ac ground-fault current
Inventor: TERUI SAYU
IPC: H02H1/00
Filed: 1987-12-23
Abstract: PURPOSE:To prevent an adverse influence to a social life by obtaining a ground- fault eliminating voltage from a ground electrostatic capacity, a combined resistance and a ground-fault point ground voltage before ground-fault, and applying it between a wire circuit and a ground to eliminate a ground-fault current. CONSTITUTION:Since a ground-fault current when a groundfault accident occurs is obtained as by a trouble point ground voltage eFg before ground-fault, a ground-fault eliminating voltage eDE is applied to eliminate a current flowing to a trouble point. The amplitude and the phase of the voltage eDE are affected by the constant of a wire circuit, and when a ground leakage resistance rg is much larger than a ground electrostatic capacity reactance Lcg, it can be obtained by a formula l. When the resistance rg is not sufficiently larger than the reactance Xcg, it can be obtained by a formula Il.
Patent JP-S63198891-A (JP)
Inventor: JIYATSUKU KORE
IPC: G01V1/053
Filed: 1987-12-23
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H09168177-A (JP)
Title: Radio selective call receiver
Inventor: WATANABE SATOSHI
IPC: H04W84/02
Filed: 1995-12-15
Abstract: PROBLEM TO BE SOLVED: To provide a friendly radio selective call receiver which displays with singing a special message on a birthday etc., to give the fresh feeling to a user. SOLUTION: This receiver consists of a message table 24 where the addresses corresponding to the special dates such as a Christmas, a birthday, etc., are registered together with the messages and melodies corresponding to those addresses, and a clock control part 4 which converts the present date into an address (present address). At the time of application of a power supply, a control part 21 of a decoder 2 collates the present address received from the part 4 with the address registered in the table 24. When the coincidence is confirmed between both addresses, the message corresponding to the relevant address is outputted to a display control part 17 and also the corresponding melody is outputted to a melody control part 15.
Patent JP-H05137116-A (JP)
Title: Video signal regenerating device
Inventor: NISHIMURA AKIRA
IPC: H04N5/93
Filed: 1991-11-15
Abstract: PURPOSE:To make the time shift of a regenerating video signal smaller than that of a conventional device at the time of high speed regeneration and also, to obtain a reproducing image being natural and easily visible even in the case of a dynamic image. CONSTITUTION:An FM demodulator 34 demodulates a regenerative signal and regenerates a TCI signal. An A/D converter 37 converts the TCI signal to a digital signal. A frame memory 41 stores the TCI signal based on a clock from a timing generating circuit 39e. A TCI decoder 42 decodes the TCI signal which is read out based on a clock from a system controller 60 and regenerates a luminance signal and a color difference signal. In such a state, at the time of high speed reproduction, the timing generating circuit 39e and the system controller 60 store the TCI signal obtained by a single scan of a reproducing head and control the frame memory 41 so as to read out repeatedly the signal in plural scanning periods of the reproducing head.
Patent JP-H10170214-A (JP)
Title: Strain monitor for building construction and strain detecting method
Inventor: SATO HITOSHI
IPC: G01L1/14
Filed: 1996-12-06
Abstract: PROBLEM TO BE SOLVED: To diagnose the soundness of a building construction and to monitor it by detecting the strain of the building construction such as a building, a bridge, a pile foundation, a road, a dam and a pipeline. SOLUTION: In a strain monitor which is provided in a building construction to want the detection of a strain and has a means for generating the strain produced in the building construction in a strain detecting material 3, the strain monitor and a strain detecting material 3 of the building construction whose strain detecting material 3 is a ferromagnetic substance, for instance ferro-nickel alloy, is provided with a wound coil 5, and the strain generated in the strain detecting material 3 is detected through the variation in inductance of the coil 5.
Patent JP-H05140927-A (JP)
Title: Water stop plate for steel sheet pile and excavation method for ground using such plate
Inventor: MORI IWAHIKO
IPC: E02D5/08
Filed: 1991-11-15
Abstract: PURPOSE:To enhance the water cutoff performance in the case of poor workmanship of joining of steel sheet piles for use in sheathing with one another by fitting by pressure a flexible water stop plate in the gap at each joint of sheet piles, and inserting by pressure the water stop plates bit by bit in compliance with excavation process. CONSTITUTION:A water stop plate 4 made from a flexible material is fitted by pressure in the gap 3 at each joint of steel sheet piles 1a, 1b for use in sheathing at the time of excavating the ground. When the excavation has progressed to attain a certain depth, the water stop plate 4 is inserted still deeper by pressure into the ground, and the excavating work is continued to make excavation to the specified depth. Even in case the joining part of two adjoining sheet piles 1a, 1b is not in good engagement when sheet piles are driven, the gap 3 is blocked with the water stop plate 4. Thereby soil/sand or subsoil water can be prevented certainly.
Patent JP-H08186788-A (JP)
Title: On-site editing device
Inventor: HAMANO TERUO
IPC: H04N5/262
Filed: 1994-12-28
Abstract: PURPOSE: To provide an on-site editing device which can instantaneously and automatically edit the images recorded by a video tape recorder, etc., into a desired form at the photographing site and can show the images that are edited based on the plot produced at a planning stage. CONSTITUTION: The editing plot information obtained based on the plot produced at a planning stage of the video production is prepared at an editing plot information accumulation part 6. The video information on each cut is recorded at an input video information recording part 2, and these recording position information, etc., are stored in an index information accumulation part 4. When the photographing is finished, the editing plot information are successively read out of the part 6. Then the video recording position information on each cut is obtained from the part 4, and the video information on the corresponding cut is read out of the part 2 and recorded at an output video information recording part 7. This recorded video information is shown at a display part 8.
Patent JP-H03188731-A (JP)
Title: Electronic mail system
Inventor: NAGAFUSA SEIGO
IPC: H04L12/58
Filed: 1989-12-19
Abstract: PURPOSE:To remarkably improve the transmission efficiency by dividing a document data into blocks and sending only a block requiring correction to an opposite system. CONSTITUTION:When the correction of a document 10 implemented by an editing means 12 is the addition or revision in the unit of blocks, a correction data in a relevant block is generated by a generating means 13, tree information forming the correction data to be a terminal symbol is formed, a document data not relating to the correction is eliminated from the transmission object and only correction relating information in the document data is sent to an opposite system. Thus, when the document data to be corrected is sent to the opposite system, only the part relating to the correction of the document data is sent, then the transmission time of the document data to be sent again is shortened.
Patent JP-H09165271-A (JP)
Title: Basic spraying material
Inventor: NAKAMURA HISASHI
IPC: C04B35/66
Filed: 1995-12-15
Abstract: PROBLEM TO BE SOLVED: To enable the improvement of slaking resistance, and accordingly adherence and corrosion resistance of a magnesia-calcia clinker-based spraying material useful for repairing an industrial kiln or a container for molten metal. SOLUTION: Magnesia-calcia clinker is composed of 10-70wt.% of CaO and 30-85wt.% of MgO, where the total of CaO and MgO is >=95wt.%, and has an inorganic layer having slaking resistance on its surface. A magnesia-calcia clinker-based spraying material is produced by compounding 100wt.% of an aggregate consisting of a basic refractory raw material containing 5-90wt.% of the magnesia calcia clinker with 0.1-10wt.% of an ultrafine refractory powder having an average particle diameter of <=7μm and a specific surface area of >=10m<2> /g, 0.1-5wt.% of slaked lime and a binder, each at outer percentage. The peering of the slaking-resistant inorganic layer existing on the surface of the magnesia-calcia clinker in spraying construction is prevented by virtue of the friction buffering effect attributable to synergetic effect of the ultrafine refractory powder and slaked lime, and accordingly adhesivity can be improved.
Patent JP-H0983799-A (JP)
Title: Method and device for image processing, and method and device for image formation using same
Inventor: KOIDE JUN
IPC: H04N1/23
Filed: 1995-12-15
Abstract: PROBLEM TO BE SOLVED: To output an image of high picture quality by outputting an image of high sharpness as is without causing any decrease in resolution and suppressing the generation of moire. SOLUTION: An exposure quantity modulating means 15 of an optical scanning means 1 modulates image light and shade by modulating an exposure quantity according to pixel density information on an image divided into pixels of specific size. In this case, density data of two adjacent pixels are modulated with one pixel in a highlight density area wherein a pixel density area is <=1/3 as large as maximum image density and the other pixel is not recorded; and part of the density data of one of two adjacent pixel is shifted to the other pixel in a density area wherein the pixel density area is 1/3-1/2 and no shift is made in a density area of >=1/2.
Patent JP-H05167791-A (JP)
Title: Picture recorder
Inventor: NAGASHIMA KANJI
IPC: G02B26/10
Filed: 1991-12-11
Abstract: PURPOSE:To execute the relative position adjustment with respect to a collimator lens with high accuracy by arranging two position means nearly on a straight line with semiconductor lasers inbetween so as to arrange the plural semiconductor lasers close to each other. CONSTITUTION:The position of a semiconductor laser LD 50 including a relative position with a collimator lens 54 in an optical unit 14 is adjusted by adjusting a position of a support plate 52 by means of a position adjustment means 60 comprising an eccentric pin 70 and a long hole 66 and a position adjustment means 62 comprising an eccentric pin 72 and a long hole 68. Through the constitution above, that is, the means 60, 62 are arranged at two positions nearly on a line with the semiconductor laser LD50 inbetween and the position of a heat sink 52 is adjusted by using the eccentric pin to narrower the width in a direction such as the (x) direction or the (y) direction or the light source unit 14 having less margin in the arrangement space to arrange the light source unit with a high degree of freedom to the narrow space.
Patent JP-H09181598-A (JP)
Title: Field programmable gate array
Inventor: NAMUUSAN UU
IPC: G06F7/00
Filed: 1995-12-18
Abstract: PROBLEM TO BE SOLVED: To improve the capacity of a programmable logic cell(PLC) without adding a lookup table(LUT) adding layer to a circuit network by including decoder circuit arrangement capable of operating so as to increase the number of inputs to each PLC in the PLC and connecting the decoder circuit arrangement, to an LUT. SOLUTION: An PLC 200 includes a look-up table(LUT) 202 connected to the decoder circuit arrangement 203. The arrangement 203 includes a multiplexer(MUX) 204 and a decoder circuit 206. The arrangement 203 connected to the PLC 200 increases the number K of inputs of the PLC 200 in relation with the addition of an LUT circuit network. When the LUT 202 is an 8-bit LUT (m=3) and the circuit 206 has five inputs (L=5) for instance, the PLC 200 is provided with capacity for executing a Boolean function having eight inputs at maximum (K=8=3+5) and the arrangement 203 increases the number K of inputs of the PLC 200 by a coefficient L.
Patent JP-H09142493-A (JP)
Title: Portable bag
Inventor: KIMORI TORU
IPC: B65D33/12
Filed: 1995-11-22
Abstract: PROBLEM TO BE SOLVED: To easily take out or put an article into a bag in such a manner that an opening of the bag is not wrinkled and the opening is prevented from being opened accidentally when the bag is being carried and when the article is taken out or put into the bag, the opening can be sufficiently opened upwardly. SOLUTION: There are provided at least a bag body 50 having an opening 52 on its upper end and made of soft sheet and a hanging string 60, and a pair of through holes 53a, 53b and a pair of through holes 53c, 53d are provided near the opposite ends, left and right, at the upper part of the body 50, respectively, in such a manner that the holes 53a, 53c are vertically spaced apart from the holes 53b, 53d by a predetermined distance, respectively, and both ends 61, 61 of the string 60 are passed through the holes 53a, 53b and the holes 53c, 53d respectively from one side of the bag body 50 and the ends 61, 61 are fixed so as not to slip out of the holes.
Patent JP-H07179990-A (JP)
Title: Case hardening steel
Inventor: YASUKI SHINICHI
IPC: C22C38/00
Filed: 1993-12-24
Abstract: PURPOSE:To produce a case hardening steel excellent 10 machinability, impact characteristic, and fatigue characteristic. CONSTITUTION:This steel is a case hardening steel having a composition consisting of 0.03-0.25% C, <=0.50% Si, 0.55-3.00% Mn, 0.30-1.50% Cr, <=0.035% S, <=0.015% P, 0.015-0.06% Al, >0.0040.03% N, and the balance Fe with inevitable impurities. Moreover, Ceq represented by Ceq=C+(1/20)Si+(1/20)Mn+(1/20)Cr+(1/25)Mo+(33/100)V(%) is regulated to <=0.50% and the relation in [surface C(%) after surface hardening]XCr(%)<=1.2 is satisfied. If necessary, one or more chemical components among 0.02-<0.20% Cu, 0.02-1.00% Ni, <0.30% Mo, 0.03-0.50% V, 0.005O.08% Ti, 0.005-0.08% Nb, 0.0003-O.0050% B, 0.002-0.08% Ca, 0.002-0.08% Zr, and 0.002-0.08% Te can be incorporated.
Patent JP-2000148100-A (JP)
Title: Liquid crystal display device
Inventor: FUKUMOTO MOMOKO
IPC: G02F1/133
Filed: 1998-11-18
Abstract: PROBLEM TO BE SOLVED: To secure a time margin when the display data are latched in a semiconductor integrated circuit even when an operation frequency of the display data, etc., is accelerated by providing a means shaping a signal form of a rectangular wave form of the display data, etc., to the signal form of a nearly sine wave on at least one piece of signal lines. SOLUTION: At least one piece of plural signal lines is provided with a waveform shaping means shaping the signal form of the rectangular shape of the display data or plural display control signals to the signal form of the nearly sine wave. For instance, a waveform shaping part 50 of a liquid crystal module is constituted of an order of an EMI filter element Lo, a resistance element Ro from a display controller 120, the EMI filter element Lo and the resistance element Ro connected serially to a signal line and a capacitance element Co connected between a connection point between the EMI filter element Lo and the resistance element Ro and reference potential. This waveform shaping part 50 shapes the signal form of the rectangular shape outputted from the display controller 120 to the signal form of the nearly sine wave shape.