Patent SG-11201902654P-A (SG)
Title: Apparatus and methods including establishing a negative body potential in a memory cell
Inventor: SAKUI KOJI
IPC: G11C16/30
Filed: 2017-08-09
Abstract: INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property 111111111111011101010111110111110100111111110111011101111110111111011110111111 Organization International Bureau (10) International Publication Number (43) International Publication Date ......0\" WO 2018/089065 Al 17 May 2018 (17.05.2018) WIPO I PCT (51) International Patent Classification: (74) Agent: LEFFERT, Thomas W. et al.; Dicke, Billig & Cza- G11C16/26 (2006.01) G11C 16/04 (2006.01) ja, PLLC, 100 South Fifth Street, Suite 2250, Minneapolis, Gl1C 16/30 (2006.01) H01L 27/11514 (2017.01) Minnesota 55402 (US). (21) International Application Number: (81) Designated States (unless otherwise indicated, for every PCT/US2017/046008 kind of national protection available): AE, AG, AL, AM, (22) International Filing Date: AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, 09 August 2017 (09.08.2017) CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, (25) Filing Language: English HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, (26) Publication Language: English KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, (30) Priority Data: OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, 15/350,229 14 November 2016 (14.11.2016) US SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (71) Applicant: MICRON TECHNOLOGY, INC. [US/US]; 8000 South Federal Way, MS 525, Boise, Idaho 83716 (84) Designated States (unless otherwise indicated, for every (US). kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, (72) Inventors: SAKUI, Koji; 4-13-14-201 Kyodo, Seta- UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, gayaku, Tokyo 156-0052 (JP). HAWES, Mark; 3486 N. TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, Columbine, Boise, Idaho 83713 (US). TANZAWA, Toru; — EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, 1-20-5-302 Nishiarai, Adachi-ku, Tokyo 123-0841 (JP). MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, = BINFET, Jeremy; 8013 S. Rafael Way, Boise, Idaho 83709 (US). = (54) Title: APPARATUS AND METHODS INCLUDING ESTABLISHING A NEGATIVE BODY POTENTIAL IN A MEMORY = CELL = = n = WO 17:0] — I/0 [18•0] I ......,, Address Registe r --,, ( > I n0 Control 114 < = — = 134 ---) 112 ti N- Status Register la • *--- = Processor _ _ 1211 v = = Column Decode = Command Register ill — 124 - - - = i \ Timer — CE# -\"' -1 '' 128 Row CLE ---r 1 ----o- Deo of Memory Cells +0- ALE •÷P• Control 108 1 a 1 _ _1 4 . wE# ± fr _.. 4 „, Logic 116 ( • P RE# 11 1-4. t-10 WM Data Register l . ... 11 kin 4- Temperature Sensor a ) i2 Cache Register ,tD 118 ,, ,,,-- C= L 100 C7\ GC © FIG. 1 00 ,-1 Q (57) : Apparatus and methods of operating such apparatus include establishing a negative potential in a body f'1 prior to initiating a sensing operation on the memory cell, in response to a timer, or during an access operation of another of a memory cell memory cell. o [Continued on next page] WO 2018/089065 Al MIDEDIM01101 DIDIRE1011111111111111111111111111101111111111111111111111111 TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Published: — with international search report (Art. 21(3))