baber/WOPTO huggingface dataset:
Patent JP-H03263219-A (JP)
Title: Floating-point multiplier
Inventor: KANO TOSHIYUKI
IPC: G06F7/487
Filed: 1990-03-14
Abstract: PURPOSE:To improve the general usefulness by setting a part of the characteristic part or the fixed-point part of data as a variable area and arbitrarily setting the bit length of the characteristic part and that of the fixed-point part. CONSTITUTION:When floating-point binary data and bit length (m) of respective characteristic parts of data are inputted to input terminals 1 and 3 and a control terminal 10, upper M-bits of characteristic parts of data are shifted by (M-m)- bits down by the bit length (m) and M-bit shifters 2 and 4, and only characteristic parts of data are added by an M-bit adder 5. Meanwhile, L-bits including the fixed-point parts of input terminals 1 and 3 pass L-bit shifters 6 and 7 and are multiplied by an L-bit multiplier 8, and the addition result and the multiplication result are outputted from an output terminal 11 as the characteristic part and the fixed-point part respectively. Thus, multiplication is performed with optimum bit length of the characteristic part and the fixed-point part from data of wide dynamic range to data of high precision, and the general usefulness is improved.
Patent JP-S62222297-A (JP)
Inventor: OGAWA KENZO
IPC: G10D3/14
Filed: 1986-03-25
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H10262281-A (JP)
Title: Radio data transmission system provided with re-transmission control function
Inventor: GOTO TADAMASA
IPC: H04W28/18
Filed: 1997-03-18
Abstract: PROBLEM TO BE SOLVED: To provide a radio data transmission system provided with a re- transmission control function by which high quality data transmission is conducted by re-transmission even on the occurrence of transmission distortion on a radio transmission channel. SOLUTION: After a data message is divided into a prescribed message length by a massage generating part 110, a frame synchronizing code, a control code and an error check code are added to the message to generate transmission message data. Then the transmission message data are used for modulating digitally a carrier at a modulation part 141 via a selector 130. Then the modulated carrier signal is converted into a high frequency signal at a radio part 150 and the high frequency signal is transmitted to radio communication equipment at a data receiver side.  Thereafter, upon the receipt of a request o re- transmission of the data from the radio communication equipment at the data receiver side, a code conversion part 120 applies polarity inversion processing to the transmission message data so that the resulting data are transmitted to the radio communication equipment at the data receiver side.
Patent JP-H07108089-A (JP)
Title: Display device of slot machine type symbol line
Inventor: HAGIWARA TAKASHI
IPC: A63F5/04
Filed: 1994-04-01
Abstract: PURPOSE:To display a novel slot machine type symbol line by arranging symbol line display areas in matrix on the surface of a display such as CRT, and displaying a symbol line in each area by electronic control. CONSTITUTION:On the display surface of a CRT constituting a display device, KXL pieces of square symbol line display areas R11-RKL are arranged in parallel to each other. In each display area R11-RKL, symbol lines formed by combining n-pieces of m-kinds of symbols are displayed in such a manner as to be movable in a fixed direction. The arranging space of symbols in each symbol line is set to a space where two or three symbols can be simultaneously displayed at the movement of a reel in each square display area R11-RKL, and at least the following symbol display is thus started in the display area before a certain display is finished.
Patent JP-H06273988-A (JP)
Title: Image forming device
Inventor: MASUDA JITSUO
IPC: G03G15/02
Filed: 1993-03-24
Abstract: PURPOSE:To prevent the damage of a photosensitive body and to form an image at a low density level by inhibiting control in the proper conditions of a process by the impossibility of the detection of a mark. CONSTITUTION:A rotational position detecting mark 1a formed on the photosensitive body 1 is detected by a photoelectric sensor 22. A CPU 15 drives an electrifier 2 based on the detection of the mark, to expose the reference image part 11 of the top end part of an original platen 4 by an optical system 3 or form a desired charge image by a blank lamp 20. The charge image is detected by a surface potential sensor 12. The CPU 15 controls a process part for forming the image such as a copy lamp 3a, the electrifier 2 and the developing bias voltage of a developing unit 5 in the proper conditions, in accordance with the detected surface potential of the photosensitive body 1. When a signal from the photoelectric sensor 22 is not inputted to the CPU 15, it drives a warning lamp 23 and simultaneously, stops the operation of an image forming device main body or sets conditions to obtain the image quality of the low density level, to control the process part.
Patent JP-S54156368-A (JP)
Title: Fluorescent lamp
Inventor: TOUHOU MAKOTO
IPC: H01J61/56
Filed: 1978-05-31
Abstract: PURPOSE: To achieve an easy stepped dimmer operation by obtaining the same dimension as that of common lamps in a state that the lamp body is mounted with a current control element by means of an adapter.  
     CONSTITUTION: A current control element 6 is housed within a cylindrical casing 5 having the substantially same diameter as that of the fluorescent lamp body 1. The cylindrical casing 5 has formed at one end thereof a receiving opening 7 for receiving the connection element 3 of the lamp body 1 and provided at the other end lamp pins 8 of the type commonly used. Thus, an adapter 4 is constituted, which is to be coupled with the lamp body 1 mechanically and electrically with the connection element 3 of the lamp body 1 and the receiving opening of the casing 5 engaged with each other. The lamp body 1 and the adapter 4 are dimensioned to have the same length as that of a common lamp when they are coupled in the way as described above. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H08223783-A (JP)
Title: Earthquake circuit breaker for electric appliance
Inventor: ABE YOSHINOBU
IPC: H01H9/54
Filed: 1995-02-16
Abstract: PURPOSE: To automatically interrupt the current of electric heater which causes damages during an earthquake. CONSTITUTION: A circuit breaker having a built-in vibration sensor 1, a switch 2, a battery 9 and a charger 10 comprises a receptacle 6 which forms a closed circuit after an earthquake, a receptacle 7 which forms an open circuit after the earthquake, a lamp 5 which is lighted after the earthquake, a reset button 4, and an existing plug terminal 3 for inserting into receptacles. By doing this, a current of an electric heater which is dangerous during the earthquake can be automatically interrupted and at the same time a guide lamp can be turned on.
Patent JP-H09231796-A (JP)
Title: Circuit and method for voltage stress test of word line
Inventor: SUKEGAWA SHUNICHI
IPC: G11C11/407
Filed: 1996-02-27
Abstract: PROBLEM TO BE SOLVED: To improve reliability of an all word activation test in a semiconductor memory device having a word line-driving circuit, of a bootstrap method. SOLUTION: During a test, a main word line-driving voltage MWn from a main word line MWLn is once stopped to be impressed or supplied to each word line-driving circuit WDn1-WDnn in a memory array. However, complementary transistor-driving voltages Fxi, Fxi- in pairs of an Fxn driver circuit, are kept in active states VPP, Vss. Therefore, a gate node N1 in each word line-driving circuit WDn1-WDnn is charged to be at a reference level VPP-Vth via a dividing transistor Q2 while the main word line-driving voltage MWn is stopped. A predetermined time later, when the main word line-driving voltage MWn in an H level VPP is impressed, a complete self boot or bootstrap is effected because a potential of the gate node N1 sufficiently reaches the reference level VPP-Vth. A potential of a sub word line SWLn1-SWLnn is accordingly surely brought to be at the H level VPP.
Patent JP-S55157240-A (JP)
Title: Semiconductor device
Inventor: NAKASHIBA HIROSHI
IPC: H01L21/768
Filed: 1979-05-25
Abstract: PURPOSE:To prevent a semiconductor device employing a polycrystalline silicon thin film from being damaged due to static electricity by forming a region making ohmic contact with a conductive route through a semiconductor layer and a reverse conducting type region bonded to the region on the way of the conductive route. CONSTITUTION:A p-type region 302 is formed in the n-type region 301 of a monocrystalline semiconductor substrate, an insulating film 303 is formed thereon, and a polycrystalline silicon thin film electrode 304 having a p-type impurity is mounted at the opening formed at the film 303. Then, a metallic wire 305 is connected thereto, an external lead wire terminal is connected to the one extension of the wire, and resistor and wire formed by a polycrystalline silicon thin film in the semiconductor device are connected to the other extension of the wire.
Patent JP-S61223838-A (JP)
Title: Manufacture of semiconductor device
Inventor: SHIN DAISHIYOKU
IPC: G03C11/00
Filed: 1985-03-29
Abstract: PURPOSE:To remove a used photoresist film without impairing a substrate by bringing the photoresist film into contact with a mixture of sulfuric acid and aq. hydrogen peroxide or a mixture of aq. ammonia and aq. hydrogen peroxide under exposure to far UV rays. CONSTITUTION:A wafer 2 coated with the used photoresist film 3 is fixed onto a spinner 1 and the film 3 is removed by dropping a 1:1 mixture of sulfuric acid and aq. hydrogen peroxide, rotating the spinner 1 at about 500 rpm for 2 sec, uniformly spreading the solution mixture in a thickness of about 1 mum to form a liquid film 4, irradiating far UV rays of 184.9 nm or 253. 7 nm wavelength for a few sec, rotating the spinner 1 at about 4000 rpm for 15 sec to scatter and remove the soln. and the decomposed photoresist, and continuing this process under visual inspection until the used photoresist is perfectly removed.
Patent JP-2000001474-A (JP)
Title: Production of n-benzyl-3-hydroxyazetidine
Inventor: TAMAI SEI
IPC: C07D205/04
Filed: 1999-03-12
Abstract: PROBLEM TO BE SOLVED: To obtain the subject compound using inexpensive raw materials in a short production process without the need of any complicated reaction treatment by reaction between a specific compound and an alkali metal bicarbonate in an organic solvent under heating. SOLUTION: This compound of formula II is obtained by the following process: epichlorohydrin C is added to an aqueous solution of benzylamine A at <=10 deg.C, pref. <=5 deg.C, more pref. 3-5 deg.C or so under agitation so that the component A is in an excess amount of >=1.05 mol per mol equivalent of the component C, and after ending the addition, the system is further agitated at room temperature until the reaction is completed, to form (D) a compound of formula I (Bzl is benzyl) in a crystalline form, which, in turn, is reacted with (E) an alkali metal bicarbonate (e.g. sodium bicarbonate) at about two molar times equivalent or greater per mol of the component D in (F) an organic solvent (e.g. dioxane) under heating.
Patent JP-H01238192-A (JP)
Title: Printed wiring board
Inventor: MOTOKI TAKAYA
IPC: H05K3/34
Filed: 1988-03-18
Abstract: PURPOSE:To obtain a printed wiring board in which a solder bridge can be prevented without narrowing the bonding width of leads even when the thickness of a resist film printed between a foot patterns is thinner than that of the pattern by exposing the surface of the pattern at the bottom of recesses in the adjacently opposing sides and printing a resist on the top face of the protrusion facing the recess. CONSTITUTION:Foot patterns 13 are arranged by photoetching and solder plating at positions opposite to the bonded faces of leads 1-1 of electronic components 1 to be face-mounted on the main face of a copper-coated insulating board 2, and the periphery of the pattern 13 and the protrusions 13-1a, 13-2a of the pattern 13, i.e., a resist 15 made of insulating resin is printed on a hatched part. As a result, the surface of the pattern 13 is exposed in the bottom of the recesses 13-1b, 13-2b, and an insulating layer 15 is formed on the upper faces of the protrusions 13-2a, 13-1a opposing thereto so as to be higher than the surface of the pattern 13. Thus, it becomes a bank of solder melted and fed from the recesses 13-1b, 13-2b to form a solder bridge.
Patent JP-H07282506-A (JP)
Title: Driving device of disk device
Inventor: OKITA MASAO
IPC: G11B17/028
Filed: 1994-04-04
Abstract: PURPOSE:To easily improve the concentricity between a disk and a center shaft by forming positional control parts for the disk center integrally with a turntable. CONSTITUTION:When the disk 2 is placed on the turntable 4 and chucked by a chucking member (not shown in the figure) from the upper side, the inner edge of a center hole 2a of the disk 2 is abutted on the side surface 6a to deflect downward the positional control parts 6 for the disk center, and the center of the disk 2 is positioned by the side surface 6a of the positional control part 6, then the concentricity between the disk 2 and the center shaft 1 is settled. Thus, the plural positional control parts 6 displaceable in the direction of the thickness of turntable 4 are provided, which are integrally formed with the turntable 4 at the positions concentric to the center hole 5 of the disk placing turntable 4 rotationally driven by the center shaft 1 inserted through the center hole 5, therefore, the play like in the conventional technique does not occur, and the concentricity between the disk 2 and the center shaft 1 is easily settled.
Patent JP-S60208734-A (JP)
Title: Liquid crystal display device
Inventor: NAKATANI HIROSHI
IPC: G09F9/00
Filed: 1984-04-02
Abstract: PURPOSE:To obtain the liquid crystal display device of small-area, thin structure by arranging an LSI for driving liquid crystal at right angles to a liquid crystal display panel by utilizing tape automated bonding (TAB) technique. CONSTITUTION:The LSI63, 64 for liquid crystal drive such as signal electrode drive and scanning electrode drive is mounted by utilizing the TAB technique; these LSI are mounted on projections 53 and 56 of an FPC substrate 51 by face- up bonding and on the remaining projections 54 and 52 by face-down bonding. Thus, the TAB technique is utilized to mount LSIs and when it is mounted on the FPC substrate 51, the length of one side is about 10mm.. Consequently, the projection parts 53, 54, 55, and 56 of the FPC substrate 51 are bent and the LSIs for liquid crystal drive are arranged on the flanks of the frame 58, there is an enough space for storage. Thus, the liquid crystal display device with small area and small thickness is obtained.
Patent JP-S56162241-A (JP)
Title: Controlling apparatus for rotational frequency of engine
Inventor: TAKADA SHIGETAKA
IPC: F02D9/02
Filed: 1980-05-19
Abstract: PURPOSE: To obtain an accurate rpm for the engine by a method wherein a motor is operated at a low speed without the danger of causing hunting when the engine is in the usual condition in which it is controlled to a target idle rpm and when the rpm of the engine varies greatly, the engine is controlled to approach the target idle rpm as quickly as possible.  
     CONSTITUTION: A constant voltage lower than the voltage of a power source battery 800 is supplied from a constant voltage circuit 608 to a drive circuit 609 for a  DC motor 301 operating a throttle valve 201 of a carburetor or the like. The supplied constant voltage can be switched to a higher voltage through a switching circuit 607. A detecting circuit 606 is adopted to detect whether or not the difference  between the engine rpm and the target rpm corresponding to the temperature of the  engine is greater than a constant value and if greater, supplies a higher voltage to  the drive circuit 609 through the switching circuit 607. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H02245671-A (JP)
Title: Parallel planar type energy analyzer
Inventor: OKUBO KAZUO
IPC: G01R31/302
Filed: 1989-03-20
Abstract: PURPOSE:To maintain the advantages of a compact type and a thin type and to improve analyzing accuracy by applying a decelerating voltage to the center side of a mesh part, applying a voltage higher than said voltage to an annular part, and providing the voltage distribution on the entire surface of a decelerating grid. CONSTITUTION:A decelerating grid 2 comprises an annular part composed of a low resistance material and a mesh part which is coupled to the inside of the annular part and composed of high resistance material. A decelerating voltage VR2 is applied to the center side of the mesh part from a power source 4B for the decelerating grid. A voltage VR1 which is higher than the voltage VR2 or a voltage (VR1+VR2) is applied to the annular part from a power source 4A. Thus the voltage distribution is provided on the entire surface of the grid 2. When secondary electrons l2 pass through the grid, passable ease becomes approximately uniform over the entire surface. Therefore, the detectable region of the electrons l2 becomes wide, and the analyzing accuracy can be improved with the advantages of the compact configuration, the thin type and simple manufacturing being maintained.
Patent JP-H08260333-A (JP)
Title: Carpet and its production
Inventor: ORII KAZUNORI
IPC: D05C17/02
Filed: 1995-03-24
Abstract: PURPOSE: To obtain a carpet having excellent shape-retainability and springiness and causing little change in appearance by dispersing and mixing specific elastic conjugate fibers and fusing the dispersed fibers to sporadically disperse flexible thermally fixed points and eliminate the falling-off of piles, especially cut piles. CONSTITUTION: Elastic conjugate fibers are dispersed and mixed in piles made of spun fiber composed mainly of a non-elastic synthetic fiber and the product is subjected to thermal fusion treatment to sporadically disperse flexible thermally fixed points in the pile. The pile is made of a spun yarn of a non-elastic synthetic fiber and an elastic conjugate fiber consisting of a non-elastic polyester and a thermoplastic elastomer having a melting point lower than that of the polymer constituting the non-elastic synthetic fiber by >=40 deg.C, preferably >=60 deg.C.
Patent JP-2000264707-A (JP)
Title: Fiber reinforced cement molding
Inventor: ONO MASAHIRO
IPC: C04B14/20
Filed: 1999-03-12
Abstract: PROBLEM TO BE SOLVED: To obtain a low-cost fiber reinforced cement molding having sufficient strength and durability as an interior or exterior finishing material and excellent also in formability in production by incorporating specified amounts of cement, fly ash, reinforcing fibers and mica having a specified average particle diameter and a specified aspect ratio. SOLUTION: The fiber reinforced cement molding contains 40-60 wt.% cement, 15-40 wt.% fly ash, 1-10 wt.% reinforcing fibers and 2-15 wt.% mica having 3-100 μm average particle diameter and an aspect ratio of >=20. It is also preferable that the molding further contains 0-15 wt.% inorganic filler other than mica. The cement is one of ordinary Portland cement and high early strength cement or a mixture of these in an appropriate ratio. The fly ash is dust coal ash collected with a dust collector attached to a dust coal combustion furnace in a coal fired power plant. Woody pulp is preferably used as the reinforcing fibers so as to enhance the bending strength and impact strength of the resulting molding and to attain serve as process fibers in molding.
Patent JP-S59191347-A (JP)
Title: Semiconductor integrated circuit
Inventor: TABATA TERUO
IPC: H01L27/06
Filed: 1983-04-14
Abstract: PURPOSE:To prevent the parasitic effect of a thyristor by a method wherein a double diffusion region of P type and N<+> type is provided on the first island region where an epitaxial layer will be formed in a P-N isolated manner, and said double diffusion region and the resistance region provided on the second island region are connected. CONSTITUTION:A silicon epitaxial layer 12 is formed on a P type silicon semiconductor substrate 11, and an island region 14 and other island 17 are formed by performing a P-N isolation on the layer 12 using a selectively diffused P type isolation region 13. Then, a P<+> type resistance region 15 is formed on the island region 14, a double diffusion region 16 of P type and N<+> type is formed in the vicinity of said region 15, the second resistance region 18 is formed on the region 17, and the region 18 is connected to the region 16 using an aluminum electrode 19.
Patent JP-S61228873-A (JP)
Inventor: YOSHIDA TAKAO
IPC: A61M21/00
Filed: 1985-04-01
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H04302192-A (JP)
Title: High density mounting board
Inventor: KURIYAMA HIROSHI
IPC: H05K1/00
Filed: 1991-03-29
Abstract: PURPOSE:To enable a high density mounting board to be enhanced in mounting operation efficiency by a method wherein support holes to which conductive material is attached are uniformly provided to all the surface of the board, and a wiring net is provided to both the sides of the board respectively. CONSTITUTION:Circular universal pads 11 serving as support holes are provided to the surface of a board 10 at a prescribed pitch in a lateral and a longitudinal direction. A conductive metal film is attached to each of the universal pads 11. A wiring net or a grating-like board pattern 12 is formed on both the front and the rear of the board 10. The board pattern 12 is formed so as not to come into contact with the universal pads 11 running through between the them. The feet of a socket where a component such as an IC chip is inserted are inserted into the universal pad 11 and fixed to the board 10 by soldering. Therefore, a mounting operation can be enhanced in efficiency.
Patent JP-H02244647-A (JP)
Title: Manufacture of tape carrier type semiconductor device
Inventor: UEDA TETSUYA
IPC: H01L21/60
Filed: 1989-03-16
Abstract: PURPOSE:To make possible a burn-in test and to reduce the cost of a device by a method wherein a wiring pattern for electroplating use is removed by etching before a semiconductor element is divided from a carrier tape and leads are electrically isolated. CONSTITUTION:An electroplating is applied to lead terminals 5 of a carrier tape 1 and a resist 21 is applied on the whole surface, on which a pattern is formed, of the tape 1. Then, a resist 21 at plated electrodes 11 and the parts of plating lead wires 13, which are located at the side edge parts of the tape 1, is exposed to light, the exposed parts are removed to form opening parts 22 and the electrodes 11 and the lead wires 13 are exposed. The electrodes 11 an the lead wires 13, which are exposed through the opening parts 22, are removed by etching and after that, the resist 21 on the tape 1 is removed and a semiconductor element 8 is subjected to inner lead bonding. Thereby, the terminals 5 can be electrically isolated, an execution of a burn-in test is made possible in the state of a tape and the cost of a device is reduced.
Patent JP-S58185751-A (JP)
Title: High speed steel manufactured by powder metallurgy processing
Inventor: ASHIDA YOSHIO
IPC: C22C38/24
Filed: 1982-04-21
Abstract: PURPOSE:To enhance the hardness, impact toughness and wear resistance of the resulting high-speed steel by manufacturing a high carbon steel having a specified composition contg. Si, Mn, Cr, Mo, W and V by a powder metallurgy processing. CONSTITUTION:This high-speed steel manufactured by a powder metallurgical processing has a composition consisting of 1.2-1.8% C, 0.2-1.0% Si, 0.2-0.5% Mn, 3.0-5.0% Cr, 3.0-5.0% Mo, 1.0-3.0% W, 4.0-6.0% V and the balance essentially Fe or further contg. <=1.0% Nb and satisfying relations represented by W+2Mo=9.0-11.0% and C=0.3-0.5%+0.22V%.