baber/WOPTO huggingface dataset:
Patent TW-451400-B (TW)
Title: Shallow trench isolation process with silicon nitride liner
Inventor: LI JUNG-RU
IPC: H01L21/76
Filed: 2000-08-14
Granted: 2001-08-21
Abstract: For the void defects usually occurred in the shallow trench isolation process that uses silicon nitride liner, an ultra high temperature annealing process set between the wet dipping step of silicon nitride cap and the wet dipping step of pad oxide-layer is proposed in the present invention. In general, the temperature is higher than 1100 DEG C such that the isolating oxide layer, particularly the high-density plasma oxide layer or low-pressure tetra-ethyl-ortho-silicate, located on the top end of shallow trench is made to flow so as to fill into the fine and deep voids of the silicon nitride liner generated due to the partial etching. In this way, a flat surface can be generated on the top end of shallow trench such that the void defects can be avoided. Additionally, the quality of shallow trench isolation process can be increased.
Patent TW-480207-B (TW)
Title: Spindle assembly for force controlled polishing
Inventor: SALDANA MIGUEL A
IPC: B24B37/005
Filed: 2000-08-29
Granted: 2002-03-21
Abstract: A spindle assembly for force controlled operation in applications such as the chemical mechanical planarization of semiconductor wafers includes an axially and rotatably movable spindle driven by a force producing device. The force producing device is controlled by a position feedback loop in a first mode of operation and a spindle force control feedback loop in a second mode of operation so that the same force producing device controls spindle movement in the first mode of operation and maintains a constant pressure on a workpiece based on the detected applied pressure in the second mode of operation.
Patent TW-I233480-B (TW)
Title: Thermocapillary dryer
Inventor: BERGMAN ERIC J
IPC: F26B3/30
Filed: 2000-09-08
Granted: 2005-06-01
Abstract: A process and apparatus for drying semiconductor wafers, includes the controlled-rate extraction of a wafer immersed in rinsing liquid, irradiation of the wafer using high intensity lights or filaments along the wafer-liquid interface, and delivery of gas streams against the wafer along the wafer-liquid interface using a gas delivery system. Heating is controlled to create a temperature gradient without evaporating rinsing fluid adhering to surfaces of the wafer. Heating by the radiation sources creates a temperature gradient in the wafer in the irradiated region that simultaneously generates a surface tension gradient in the water adhering to the wafer. The gas delivery system removes the bulk of the water adhering to the wafer surface, and also suppresses the height of the rinsing liquid adhering to the wafer, providing faster extraction of dry and highly clean wafers from the rinsing liquid. A solvent vapor is optionally injected at the wafer-liquid interface, to reduce adhesion of the liquid to the vapor.
Patent TW-508534-B (TW)
Title: System and method for managing an information warehouse process
Inventor: SARUMO JOMNSFU T
IPC: G06F9/46
Filed: 2000-09-13
Granted: 2002-11-01
Abstract: A method, article and computer program for the automated management of data and information in an information warehouse process. The present invention provides an automated information warehouse process management methodology including error detection, notification and recovery. The process drives and controls the sequence of events. By automating the information warehouse process, the need for user intervention is reduced, and results in time and manpower savings.
Patent TW-530448-B (TW)
Title: Control strategy and power circuit of fast charger
Inventor: CHEN CHERN-LIN
IPC: H02J7/00
Filed: 2000-10-13
Granted: 2003-05-01
Abstract: There is provided a control strategy and power circuit of fast charger, which utilizes the feedback signals of voltage and current to perform error amplification via a compensator and setting signal, and takes the smaller error signal to determine the operation of voltage or current controller. The fast charger includes a voltage step-down charging circuit and a voltage boosting discharging circuit, wherein the step-down charging circuit includes a set of power switching device and filtering inductor for use as a charging mode, and the voltage boosting discharging circuit includes a set of power switch device and filtering inductor for use as discharging mode. When the energy transferred by the voltage step-down charging circuit is larger than that by the voltage boosting discharging circuit, a larger averaged positive current is generated. When the energy transferred by the voltage boosting discharging circuit is larger than that by the voltage step-down charging circuit, a larger averaged negative current is generated. The output current of the fast charger is a cyclic current waveform composed of a longer charging cycle and a shorter discharging cycle for fast charging the battery, thereby reducing the charging time and increasing the usability of battery.
Patent TW-530253-B (TW)
Title: Human engineering keyboard
Inventor: TSAI JU-JIA
IPC: G06F1/16
Filed: 2000-10-13
Granted: 2003-05-01
Abstract: The present invention is a human engineering keyboard equipped with a base and several keys arranged on several continuous adjacent rows where rows of character keys or number keys are arranged on the base by way of concentric arcs of equal distance and the center of each row is located on the line extended from the center of the base and on the side further away from the user. All character keys and number keys are of the same size and evenly arranged on the continuous adjacent rows.
Patent TW-579497-B (TW)
Title: Recording medium recorded in data structure capable of editing additional data related to audio data, method and apparatus of recording and/or reproducing thereof
Inventor: HEO JUNG-KWON
IPC: G11B27/30
Filed: 2000-12-30
Granted: 2004-03-11
Abstract: A recording medium recorded by a data structure capable of editing additional data related to audio data, a method and an apparatus for recording and/or reproducing thereof are provided. The recording medium in which audio data is recorded in units of predetermined recording units and additional data related to the audio data is recorded in a predetermined location in the recording unit of the audio data makes recording/editing/reproducing of audio data and additional data related to the audio data easier. Therefore, a user can additionally record additional information such as a text in audio data, and can reproduce the additional information together with audio data.
Patent TW-504930-B (TW)
Title: Personal versatile recorder and method of implementing and using same
Inventor: SAFADI REEM
IPC: H04N5/445
Filed: 2001-03-12
Granted: 2002-10-01
Abstract: A personal versatile recorder can be connected to, or integrated in, a cable television set-top terminal. The personal versatile recorder includes a central processing unit and a hard drive for mass data storage. Preferably, the personal versatile recorder has a tuner or tuners for receiving one or more transport streams from the cable system as well as analog or digital audiovisual programming. The data transport stream may encompass internet multimedia web content and associated applications to be utilized by the personal versatile recorder. Under instructions of the viewer or the agent application the central processing unit controls and facilitates various functions such as encoding, transcoding, decoding, caching, storing, playback and retrieval of any type of data or data file on the hard drive including compressed audiovisual programming content, streamed multimedia cached content, picture files, video files, audio files, HTML files, etc. for a variety of applications as described.
Patent TW-508905-B (TW)
Title: Dual-mode surface-wave filter with improved symmetry and increased cut-off-attenuation
Inventor: HANG PETER
IPC: H03H9/64
Filed: 2001-03-16
Granted: 2002-11-01
Abstract: A DMS-filter has some 1st and 2nd inter-digital converters as signal-input or signal-output, which are located between reflector-structures, where at least one acoustic track has a symmetric middle-converter which is divided symmetrically to the vertical lines of the propagation direction into part-converters. The DMS-filter is in symmetrical way connected with a casing with terminal-pads or terminal-pins, so that an axis-symmetrical terminal-holding is given.
Patent TW-518202-B (TW)
Title: Method of producing plant seeds
Inventor: OKADA MASUMI
IPC: A01G7/02
Filed: 2001-03-22
Granted: 2003-01-21
Abstract: The present invention provides a method of producing plant seeds for the cultivation in the next generation by which plants having excellent yielding properties and cultivation properties can be obtained by using an existing variety as such. Plants belonging to cereals, industrial crops, cattle feed crops, pasture grasses, vegetables or flowers are grown in a semi-closed cultivation space (for example, a greenhouse or a vinyl house) having a CO2 concentration higher by 200 ppm than the standard level in the atmosphere or in a field with the use of an open-system atmospheric CO2 concentration elevating apparatus and then seeds (seeds for the cultivation of plants in the next generation) are collected from the plants. Compared with control seeds collected after growing the plants in a standard atmosphere, the above-described seeds can provide plants having excellent yielding properties and cultivation properties. In case of rice plant, for example, a yield gain of 20% can be thus established.
Patent TW-494532-B (TW)
Title: Method for fabricating an air gap metallization scheme that reduces inter-metal capacitance of interconnect structures
Inventor: LIM SENG KEONG VICTOR
IPC: H01L21/768
Filed: 2001-04-13
Granted: 2002-07-11
Abstract: A method of manufacturing a metallization scheme with an air gap formed by vaporizing a filler polymer material. The filler material is covered by a critical permeable dielectric layer. The method begins by forming spaced conductive lines over a semiconductor structure. The spaced conductive lines have top surfaces. A filler material is formed over the spaced conductive lines and the semiconductor structure. The filler material is preferably comprised of a material selected from the group consisting of polypropylene glycol (PPG), polybutadine (PB) polyethylene glycol (PEG), fluorinated amorphous carbon and polycaprolactone diol (PCL) and is formed by a spin on process or a CVD process. We etch back the filler material to expose the top surfaces of the spaced conductive lines. Next, the semiconductor structure is loaded into a HDPCVD chamber. In a critical step, a permeable dielectric layer is formed over the filler material. The permeable dielectric layer has a property of allowing decomposed gas phase filler material to diffuse through. In another critical step, we vaporize the filler material changing the filler material into a vapor phase filler material. The vapor phase filler material diffuses through the permeable dielectric layer to form a gap between the spaced conductive lines. An insulating layer is formed over the permeable dielectric layer.
Patent TW-497306-B (TW)
Title: Laser frequency stabilizing device and its method
Inventor: YAU PENG
IPC: H01S5/0687
Filed: 2001-04-27
Granted: 2002-08-01
Abstract: The invention discloses a laser frequency stabilizing device and its method, which avoid the laser power variation easily caused by the absorptive spectrum of single frequency. To avoid the modulated laser frequency complication, the invention applies at least two beams with different frequencies and uses the difference of their absorptive spectrum to generate a tolerance signal. As the tolerance signal comes from the difference of two laser beams of the same laser source, the impact on power variation of laser can be eliminated. Furthermore, as the absorptive spectrum is usually over few hundred MHz, the frequency lock range of the invention is pretty large and the laser frequency won't be easily unlocked due to external interference.
Patent TW-466293-B (TW)
Title: Composition of composite materials
Inventor: JENG SHIAN-SUNG
IPC: E04C2/26
Filed: 2001-05-07
Granted: 2001-12-01
Abstract: The present invention relates to providing a composition of composite material as building materials or vehicle materials. The composite material may be manufactured continuously and sequentially. The composite material has a substrate consisting of polyethylene or polypropylene, two veneer layers are respectively fixed on two sides thereof. An outer layer is separately bonded to each veneer layer in which the outer layer is selected from metal plates of great stiffness such as: zinc-plated steel plate, aluminum-zinc-plated steel plate, aluminum-zinc-magnesium-plated steel plate, titanium-alloyed plate or copper-alloyed plate. The surface of foregoing metal plate may be painted in order to improve appearance and antirust function.
Patent TW-523984-B (TW)
Title: Output circuit
Inventor: TANIGUCHI KAZUTAKA
IPC: H03K19/0185
Filed: 2001-05-17
Granted: 2003-03-11
Abstract: A three-state buffer circuit has a pull-up side transistor and a pull-down side transistor connected in series between an external power supply potential and a grounding voltage. An output signal is outputted from a node between these pull-up side transistor and the pull-down side transistor. A first level shift circuit is connected to a gate of the pull-up side transistor, and a voltage of a data signal is converted from an internal power supply potential lower than an external power supply potential to the external power supply potential. A second level shift circuit is connected to a gate of the pull-down side transistor, and a voltage of a data signal is converted from the internal power supply potential to the external power supply potential. Then, when a change of the data signal read out from a memory cell is detected, the detected signal is delayed, and a control signal for controlling an output of an output circuit to be active or inactive is outputted to a first level shift circuitry and a second level shift circuitry. When the control signal is in a first state (grounding), either the pull-up side transistor or pull-down side transistor is turned OFF, and the output terminal enters a high impedance. When the control signal is in a second state, a signal according to ""high"" or ""low"" of the data signal is outputted to the output terminal.
Patent TW-I289549-B (TW)
Title: Novel triphenylamines and their use
Inventor: INADA HIROSHI
IPC: C09K11/06
Filed: 2001-05-29
Granted: 2007-11-11
Abstract: The triphenylamine having the general formula (I), wherein A is a 1-naphthyl group or a 2-naphthyl group. It has a glass transition temperature as high as 100 DEG C and yet it remains amorphous stably. Besides, it has good solubility in many organic solvents.
Patent TW-I246361-B (TW)
Title: Image display apparatus
Inventor: MIYATA KATSUO
IPC: H05B41/04
Filed: 2001-06-27
Granted: 2005-12-21
Abstract: A cabinet accommodates therein a discharge lamp 13, an ignitor module 7 applying a high voltage to the discharge lamp 13 for igniting the same, a lighting device 8A which is connected to the ignitor module and applies a discharging voltage to the discharge lamp 13 so as to keep the discharge lamp turned on, a signal processing unit 9 providing an image signal in accordance with an input signal, an image display which, in response to the image signal from the signal processing unit 9, produces an image to be projected by use of a light of the discharge lamp 13, and a power supply 6 supplying electric power to the above parts. At least a high-voltage generating unit of the ignitor module 7 is arranged to be separated from the lighting device 8A, and is disposed away from the signal processing unit 9 and close to the discharge lamp 13 for restraining the malfunction of the signal processing unit.
Patent TW-I234486-B (TW)
Title: System for purifying internal combustion engine exhaust gases
Inventor: SUNDHOLM GORAN
IPC: F01N3/08
Filed: 2001-07-03
Granted: 2005-06-21
Abstract: The invention relates to a method for purifying exhaust gases of internal combustion engines, especially diesel engines, the method comprising the spraying of water mist into the exhaust gases. For the method to be simple and inexpensive to implement and yet efficient, it is characterized by spraying water mist by utilizing spray nozzles, and thereby causing a negative pressure in the immediate vicinity of the nozzles for sucking the exhaust gases into the sprayed spray. The invention further relates to an apparatus for implementing the method. The apparatus is characterized in that it comprises a support structure (3) to which at least one spray head (4) is arranged, the operation of the spray head producing a suction that creates a negative pressure in the immediate vicinity of the spray head.
Patent TW-I230728-B (TW)
Title: Aqueous ink and process for producing dye
Inventor: MATSUZAKI YORIAKI
IPC: B41J2/01
Filed: 2001-07-16
Granted: 2005-04-11
Abstract: Aqueous ink for ink jet recording comprising a coloring matter and an aqueous medium, in which at least one of dyes represented by the formula (A) or a salt thereof is contained as the coloring matter, wherein R1 and R3, independently from each other, represent a hydrogen atom, an optionally substituted alkyl group, an optionally substituted alkoxy group, an amino group, a hydroxyl group or a halogen atom, R2 and R4, independently from each other, represent a hydrogen atom, an optionally substituted alkyl group, an optionally substituted aryl group or an aralkyl group, A represents an optionally substituted naphthyl group, X represents a divalent bonding group free from a saturated carbon ring, and m and n, independently from each other, represent an integer of 1 to 4. As the dye represented by the formula (A), a dye produced by adjusting pH of an aqueous solution of the dye to 9 or more to remove insoluble matters formed is preferably used. The aqueous ink can be provided in which clogging of a printer head is eliminated, formation of a high-quality image without blotting is enabled and a recorded image has also excellent properties in light fastness, moisture resistance and storage stability.
Patent TW-531971-B (TW)
Title: D/A converter circuit and semiconductor device
Inventor: TANAKA YUKIO
IPC: H03M1/68
Filed: 2001-10-26
Granted: 2003-05-11
Abstract: A D/A converter circuit capable of handling a high bit number digital signal, having good linearity, and having a small occupied surface area is provided. The D/A converter circuit has n-m+1 capacitors (where m is a natural number, and smaller than n), and the supply and discharge of electric charge to one of the capacitors from among the n-m+1 capacitors are controlled by the lower m bits of a digital video signal. The supply and discharge of electric charge to the remaining n-m capacitors, from among the n-m+1 capacitors, are controlled by the upper n-m bits, from among the n bits, of the digital video signal.
Patent TW-535160-B (TW)
Title: Ferroelectric memory and method of operating same
Inventor: CHEN ZHENG
IPC: G11C11/22
Filed: 2001-11-09
Granted: 2003-06-01
Abstract: A ferroelectric memory 636 includes a group of memory cells (645, 12, 201, 301, 401, 501), each cell having a ferroelectric memory element (44, 218, etc.), a drive line (122, 322, 422, 522 etc.) on which a voltage for writing information to the group of memory cells is placed, a bit line (25, 49, 125, 325, 425, 525, etc.) on which information to be read out of the group of memory cells is placed, a preamplifier (20, 42, 120, 320, 420, etc.) between the memory cells and the bit line, a set switch (14, 114, 314, 414, 514, etc.) connected between the drive line and the memory cells, and a reset switch (16, 116, 316, 416, 516, etc.) connected to the memory cells in parallel with the preamplifier. The memory is read by placing a voltage less than the coercive voltage of the ferroelectric memory element across a memory element. Prior to reading, noise from the group of cells is discharged by grounding both electrodes of the ferroelectric memory element.
Patent TW-517309-B (TW)
Title: Method for forming a silicate dielectric layer
Inventor: JENG JASON JYH-SHYANG
IPC: H01L21/31
Filed: 2001-11-23
Granted: 2003-01-11
Abstract: This invention relates to a method for forming a dielectric layer, more particularly, to a method for forming a silicate dielectric layer. The first step of the present invention is to form a silicate layer on the substrate of the wafer by using a physical vapor deposition (PVD) procedure. The silicate layer is a hafnium silicate (HfSi) layer or a zirconium silicate (ZrSi) layer. Then the silicate layer is treated to become a gate dielectric or a inter-layer dielectric layer which has a higher dielectric constant by using a rapid thermal annealing (RTA) procedure in a environment which is filled of nitrogen or ammonia.
Patent TW-513806-B (TW)
Title: Non-volatile memory structure with nitride tunneling layer
Inventor: FAN TZUO-HUNG
IPC: H01L27/115
Filed: 2001-12-04
Granted: 2002-12-11
Abstract: This invention provides a non-volatile memory structure with a nitride tunneling layer, which contains a substrate, a nitride tunneling layer, a charge trapping layer, a dielectric layer, a gate conductor layer, a source region, a drain region and a channel region, in which the nitride tunneling layer is placed on the substrate, the charge trapping layer is placed on the nitride tunneling layer, the dielectric layer is placed on the charge trapping layer, the gate conductor layer is placed on the dielectric layer and the nitride tunneling layer, the charge trapping layer, the dielectric layer and the gate conductor layer form a gate structure, the source region and the drain region are placed in the substrate on the both sides of the gate structure, and the channel region is placed on the substrate below the gate structure and between the source region and the drain region.
Patent TW-513807-B (TW)
Title: Manufacturing method of self-aligned split-gate flash memory
Inventor: LIN CHI-HUI
IPC: H01L27/115
Filed: 2001-12-17
Granted: 2002-12-11
Abstract: A manufacturing method of self-aligned split-gate flash memory is provided, which comprises first sequentially forming a patterned gate oxide layer, a first patterned polysilicon layer and a first patterned masking layer on the semiconductor substrate and then forming first insulated spacers on their sidewalls; second forming shallow trench regions on the substrate by using the first patterned masking layer and the first spacer as masks; then removing the patterned masking layer and partial spacer to expose the patterned polysilicon layer and define a floating gate area on the patterned polysilicon layer; third, selectively oxidizing the first polysilicon layer surface to make a polysilicon oxide layer and then using use the poly oxide layer as a mask to etch the first polysilicon layer therebelow in a self-aligned manner and to form a floating gate; and finally, sequentially forming an inter-gate insulated layer and a second patterned polysilicon layer that is used to be a control gate. This method applies self-alignment way to form the floating gate, so that the device size can be reduced. On the other hand, the liner nitride layer in the trench and the insulated spacer can protect the side faces of the floating gate from being invaded by oxygen during the oxidization process for the poly oxide formation. Accordingly, the line width of the floating gate is not decreased and the leakage problem is prevented.