baber/WOPTO huggingface dataset:
Patent TW-200425229-A (TW)
Title: DAF tape adhering apparatus and DAF tape adhering method
Inventor: KOBAYASHI KAZUO
IPC: H01L21/00
Filed: 2004-02-09
Abstract: A method for adhering a DAF tape, and a DAF tape adhering apparatus using the method, are provided. A wafer is secured on a stage in a lower kiln, a DAF tape is held by the lower kiln and an upper kiln arranged to be opposed to the lower kiln, and further, the pressure in the upper kiln is made relatively higher than the pressure in the lower kiln so as to swell the DAF tape and to adhere the DAF tape to the wafer. A table movable toward the DAF tape can be adopted. Further, an air supply part may be provided in the upper kiln. The pressure in the upper kiln may be made higher than the pressure in the lower kiln by supplying air from the air supplying part. A vacuum source connected to the lower kiln may be provided so as to reduce the pressure in the lower kiln. Formation of wrinkles on the DAF tape and trapping of air bubbles under the DAF tape can be prevented.
Patent TW-200424173-A (TW)
Title: Biphenyl derivatives
Inventor: MAMMEN MATHAI
IPC: A61K31/445
Filed: 2004-02-13
Abstract: This invention provides biphenyl derivatives of formula I: , wherein R1, R2, R3, R4, R5, R6, R7, W, a, b and c are as defined in the specification, or a pharmaceutically acceptable salt or solvate or stereoisomer thereof. The biphenyl derivatives of this invention possess both β2 adrenergic receptor agonist and muscarinic receptor antagonist activity and therefore, such biphenyl derivatives are useful for treating pulmonary disorders, such as chronic obstructive pulmonary disease and asthma.
Patent TW-200505586-A (TW)
Title: Coating tool and device
Inventor: YASUTAKE MUTSUMI
IPC: B05C5/02
Filed: 2004-02-17
Abstract: This invention must solve the problem of adjusting the gap width of coating liquid flow.[Solution] Forming a dent portion 20 having a pair of wall sides 22 on the side area 17 opposite to a side area 12 of a head component 11A for differentiating gap portion 16. The wall sides 22 are facing oppositely toward the direction of coating liquid flow, i.e. the extending direction of the gap portion 16. There is an adjustment unit in the dent portion by way of enlarging the length alongside the extending direction of the gap portion 16 to increase the facing distance of the wall sides 22, which will make head component 11A deformed and can adjust the width of the gap portion 16.
Patent TW-200515799-A (TW)
Title: High resolution, high sensitivity image scanner having noise cancellation improvements
Inventor: TSENG HSIN-FU
IPC: H04N1/04
Filed: 2004-02-24
Abstract: A Contact Image Sensor (CIS) system with high resolution, high sensitivity, low noise, low-power dissipation, and low-cost scanning has a CIS pixel structure that utilizes a junction photodiode as a detector element and a single-stage, high-gain, low-power inverter functioning as a charge integrating amplifier. The inverter clamps the photodetector at a fixed bias voltage and removes any signal charge generated by the incident light. A very small integrating capacitor is used on the integrating inverter amplifier for high pixel gain. The pixel further includes a noise cancellation circuit to eliminate the reset noise of the integrating capacitor. The pixel signal is then read out by a differential stage to cancel the dark offset. This structure allows the implementation of high-performance CIS arrays using low-cost standard CMOS manufacturing process. Furthermore, the present invention allows easy implementation of a lower resolution array with higher sensitivity and scanning speed and as a result, an array with user controllable resolutions can be realized. An interdigitated array structure is used to enable the array to have high sensitivity (three times that of prior art arrays) with smaller chip size. The interdigitated array can be manufactured using a trailing-edge CMOS process with lower cost than conventional contiguous arrays. The interdigitated array structure also permits the implementation of a user controllable multi-resolution scanning system.
Patent TW-200508892-A (TW)
Title: Apparatus and method for controlling resource transfers in a logically partitioned computer system
Inventor: ARMSTRONG TROY DAIVD
IPC: G06F9/46
Filed: 2004-03-01
Abstract: A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual hardware resources. The resource and partition manager uses the lock mechanism to obtain a lock on a hardware resource when transferring control of the hardware resource to a logical partition that is powering on and when removing the hardware resource from a logical partition that is powering off. The resource and partition manager uses the lock mechanism to remove control of a hardware resource from, or return control to, an operating logical partition in order to facilitate hardware service operations on that hardware resource or on the physical enclosure in which it is contained. The preferred embodiments also include methods for releasing system resources and address bindings allocated to a hardware resource when control the hardware resource is removed from a logical partition, and methods for allocating and initializing system resources when control of a hardware resource is transferred to a logical partition. In addition, the preferred embodiments include the use of the locks and related mechanisms to transfer hardware resources from the logical partitions to the resource and partition manager, and later back to the logical partitions, for the purpose of performing hardware service operations on a hardware resource or the components of a physical enclosure containing these hardware resources.
Patent TW-200502542-A (TW)
Title: Method for analyzing impurities (color centers) of fluoride and process for producing material for growing single crystal
Inventor: KIKUYAMA HIROHISA
IPC: G01N23/06
Filed: 2004-03-02
Abstract: The present invention provides a method for analyzing impurities (color centers) in a fluoride capable of analyzing impurities (color centers) in a fluoride extremely easily. In the method for analyzing impurities (color centers) in a fluoride, effect of adding a scavenger can be evaluated before a final crystal is grown. A molten material is irradiated with X-rays and transmissivity is measured before and after the irradiation, then absorption peaks, e.g. color centers, are detected. When melting conditions of the scavenger, and the like, are optimized based on them, a high purity molten material suitable for growing single crystal with least damage by X-rays can be grown.
Patent TW-200422838-A (TW)
Title: Information distribution system, an information distribution server, a printer, and an information distribution method
Inventor: SON MASAYOSHI
IPC: H04N1/00
Filed: 2004-03-12
Abstract: The present invention provides an information distribution system, an information distribution server, a printer, and an information distribution method capable of reducing the user action required for displaying the distribution information distributed by a server or the like and preventing copying and distribution to a third person by the user. The information distribution system in the present invention includes: an information distribution server (10) and a printer (40) arranged at a user home (20a) and a shop (30a). The information distribution server (10) is connected to an IP network (1) which is a broadband network communicably connecting the information distribution server (10) to the user home (20a) and the shop (30a). Moreover, the information distribution server (10) includes a user information DB server (11), a newspaper server (12), an advertisement server (13), an announce server (14), and a facsimile conversion server (15).
Patent TW-200533189-A (TW)
Title: Video editing interface and method of video processing for storing in storage media
Inventor: CHEN YI-KAI
IPC: H04N5/253
Filed: 2004-04-09
Abstract: A video editing interface and a method of video processing for storing in a storage media are disclosed. First, a review region is provided according to a timeline. The review region includes at least one first sub region with higher time resolution and a second sub region with lower time resolution. A time scale set by the first sub region is smaller than a time scale set by the second sub region. The first and second sub-regions have low-speed and medium-speed time controllers for scrolling forward and backward respectively. If a desired frame is at the first sub region, the low-speed time controller or the medium-speed time controller at the timeline is used for scrolling forward or backward based on an operating command, so as to obtain the frame. If the desired frame is at the second sub region, the medium-speed time controller or the low-speed time controller at the timeline is used for scrolling forward or backward based on an operating command. The desired frame is then moved to the first sub region from the second sub region.
Patent TW-200536195-A (TW)
Title: Improved connector gain for personal digital assistant
Inventor: Yan xu-li
Filed: 2004-04-20
Abstract: The present invention provides an improved connector gain for personal digital assistant, especially an improved connector gain design for personal digital assistant (PDA), which is used to prevent the interference of high transmission, so as to improve the transmission quality, and simplify the assembly, and reduce the cost.
Patent TW-200504525-A (TW)
Title: Methods and systems for efficiently integrating a cryptographic co-processor
Inventor: GROHOSKI GREGORY F
IPC: H04L29/06
Filed: 2004-05-04
Abstract: A method and system of processing a cryptographic packet includes receiving a first cryptographic packet in a host CPU. A first set of data required to execute the first cryptographic packet is identified. The first cryptographic packet and the required first set of data is transferred to a cryptographic co-processor. The first cryptographic packet is executed in the cryptographic co-processor. The host CPU is notified that the execution of the first cryptographic packet is complete. The executed first cryptographic packet is received in the host CPU.
Patent TW-200510181-A (TW)
Title: Liquid droplet ejection device and its method, method of manufacturing electro-optical device, electro-optical device, electric machine and substrate
Inventor: MIZUTANI SEIGO
IPC: G02F1/13
Filed: 2004-05-12
Abstract: The present invention relates to a liquid droplet ejection apparatus which selectively ejects a function liquid from a nozzle array arranged in a function liquid droplet ejection head, and is made up of: a linear scale which is constituted by a mark array continuously marked on a workpiece; an encoder which is constituted by a linear sensor which faces the linear scale; and a drive control means which controls the driving of the function liquid from the nozzle arrays. The linear scale has a reference mark which shows the position of starting the detection of each of the imaging regions arranged in a perpendicular direction relative to the direction of detection of the linear sensor. The reference mark is marked in a mode which is different from a mode of the other marks.
Patent TW-200513521-A (TW)
Title: Method and composition for polishing a substrate
Inventor: LIU FENG Q
IPC: H01L21/768
Filed: 2004-06-07
Abstract: A method of processing a substrate having a conductive material layer disposed thereon is provided which includes positioning the substrate in a process apparatus and supplying a first polishing composition between to the substrate. The polishing composition comprises phosphoric acid, at least one chelating agent, a corrosion inhibitor, a salt, an oxidizer, abrasive particulates, at least one pH adjusting agent to provide a pH from about 4 to about 7 and a solvent. The method further includes forming a passivation layer on the conductive material layer, removing the passivation layer to expose a portion of the conductive material layer, applying a first bias to the substrate, and removing at least about 50% of the conductive material layer. The method further includes separating the substrate from the first polishing composition, exposing the substrate to a second polishing composition and a second bias, and continuing to remove the conductive material layer.
Patent TW-200522272-A (TW)
Title: Method for forming bit-line of semiconductor device
Inventor: KIM HYUNG-KI
IPC: H01L21/336
Filed: 2004-06-24
Abstract: Disclosed is a method for forming a bit-line of a semiconductor device. In a line patterning process for forming a bit-line in a DRAM (Dynamic Random Access Memory) of a semiconductor device, a barrier metal layer and a tungsten layer are sequentially formed on an interlayer insulating film comprising a contact hole to fill the contact hole by a CVD (Chemical Vapor Deposition) method. Then, the barrier metal layer and the tungsten layer are removed until the interlayer insulating film is exposed, and a tungsten layer having samll thickness is re-formed on the exposed interlayer insulating film by a PVD (physical Vapor Deposition) method. As a result, the bit-line area is reduced as much as the barrier metal layer removed from the upper portion of interlayer insulating film, thereby having low bit-line capacitance.
Patent TW-200525548-A (TW)
Title: A current threshold detector
Inventor: PERNER FREDERICK A
IPC: G11C5/00
Filed: 2004-07-26
Abstract: A magnetic memory cell write current threshold detector. The magnetic memory cell write current threshold detector includes a first MRAM test cell receiving a write current and Sensing when the write current exceeds a first threshold, and a second MRAM test cell receiving the write current and sensing when the write current exceeds a second threshold.
Patent TW-200509420-A (TW)
Title: Heatsinking electronic devices
Inventor: NEWBY THEODORE A
IPC: F21V29/00
Filed: 2004-07-27
Abstract: Method and apparatus are provided for thermally coupling one or more electronic devices to a heatsink. The apparatus comprises a heatsink having a substantially planar upper surface, a wiring board (PWB) with a through-hole for receiving the device such that a principal face thereof is in thermal contact with the heatsink, its electrical leads are captured between at least a portion of the wiring board and the heatsink, and a top of the device protrudes through the PWB. The method comprises placing the device in the through-hole with its base exposed on and protruding from the underside of the PWB, attaching its electrical leads to contacts on the wiring board and pressing the PWB toward the heatsink with the leads captured there between. An electrically insulating thermally conducting layer is desirably placed between the wiring board and the heatsink.
Patent TW-200604708-A (TW)
Title: Chippings collection equipment of the broken light tubes for projector
Inventor: TSAI WEN-WEI
IPC: G03B21/00
Filed: 2004-07-28
Abstract: This invention relates to a chippings collection equipment of light tubes for projector. It uses for assisting collection of chippings of light tubes. The collection equipment comprises a chippings collection tube mounted to a support rack of a light tube socket. The support rack includes a rail for mounting the light socket in a sliding manner. Wherein, the chippings collection equipment is interlinked with the rail. Thus, when the light tube has exploded, the light tube chippings left in the rail will be pushed into the chippings collection tube with the pushing of a brand new light socket along the rail. A preferred practicality further includes a collection tray provided at chippings discharging port of the chippings collection tube for receiving the light tube chippings discharged from the chippings collection tube.
Patent TW-200516469-A (TW)
Title: Dynamic metrology sampling methods, and system for performing same
Inventor: PRUDY MATTHEW A
IPC: H01L21/66
Filed: 2004-07-28
Abstract: The present invention is generally directed to various methods and systems for adaptive metrology sampling plans that may be employed to monitor various manufacturing processes. In one example, the method comprises creating a plurality of metrology sampling rules, assigning each of the metrology sampling rules a sampling weight value, identifying at least one workpiece that satisfies at least one of the metrology sampling rules, assigning the sampling weight value for each of the satisfied metrology sampling rules with the identified workpieces that satisfy the rules, and indicating a metrology operation should be performed when a cumulative total of the sampling weight values is at least equal to a pre-established trigger value. In further embodiments, the method involves indicating a metrology operation should be performed when a cumulative total of the sampling weight values for one of the metrology sampling rules is at least equal to a pre-established trigger value or indicating a metrology operation should be performed when a cumulative total of the sampling weight values for one of the workpieces is at least equal to a pre-established trigger value.
Patent TW-200520237-A (TW)
Title: Semiconductor device with high-k gate dielectric
Inventor: LIN CHUN-CHIEH
IPC: H01L29/51
Filed: 2004-08-11
Abstract: An integrated circuit includes a substrate, a first transistor, and a second transistor. The first transistor has a first gate dielectric portion located between a first gate electrode and the substrate. The first gate dielectric portion includes a first high-permittivity dielectric material and/or a second high-permittivity dielectric material. The first gate dielectric portion has a first equivalent silicon oxide thickness. The second transistor has a second gate dielectric portion located between a second gate electrode and the substrate. The second dielectric portion includes the first high-permittivity dielectric material and/or the second high-permittivity dielectric material. The second gate dielectric portion has a second equivalent silicon oxide thickness. The second equivalent silicon oxide thickness may be different than the first equivalent silicon oxide thickness.
Patent TW-200522565-A (TW)
Title: Communication system and method for channel estimation and beamforming using a multi-element array antenna
Inventor: LAKSHMIPATHI SONDUR
IPC: H04B7/08
Filed: 2004-08-30
Abstract: A communication node of a wireless local area network utilizes a multi-element array antenna to estimate an angle-of-arrival for one or more signal sources which may communicate on symbol-modulated orthogonal subcarriers. Channel coefficients may be estimated from the angle-of-arrival for the one or more signal sources to increase channel capacity, improve channel equalization and reduce the effects of multipath fading. Beamforming based on the angle-of-arrival may also be performed for directional reception and/or transmission of communications with the one or more signal sources.
Patent TW-200608729-A (TW)
Title: Fast mail-reading system and method of associating plural email boxes and short-message notices
Inventor: LIN JYUN-NAITH
Filed: 2004-08-31
Abstract: The present invention relates to a fast mail-reading system and method of associating plural email boxes and short-message notices, which mainly comprises: at least a mail server located in the Internet; a message gateway in Internet; and at least a hand-held device. The message gateway in Internet utilizes POP3 mail protocol to transmit the command of processing mails to the mail server, and checks the e-mails in the corresponding email box in the mail server set by the user based on the time interval preset by the user through the POP3 mail protocol. It also filter the emails based on the preset searching condition. If there is an e-mail meeting the searching condition, it transmits a short message to the hand-held device. The user can transmit a short-message command to the message gateway through the hand-held device to capture or delete the e-mail.
Patent TW-200527434-A (TW)
Title: Semiconductor memory device
Inventor: UEDA NAOKI
IPC: G11C16/06
Filed: 2004-09-02
Abstract: A semiconductor memory device comprises: a plurality of memory elements; at least one bit line, wherein a memory operation is performed via at least a portion of the bit line with respect to at least one of the plurality of memory elements; and a load resistance regulating circuit for changing a resistance value to reduce or eliminate a difference in bit line load resistance depending on a position of the memory element.
Patent TW-200518453-A (TW)
Title: Capacitance multiplier
Inventor: KIM YOUNG-JIN
IPC: H03B19/05
Filed: 2004-09-15
Abstract: A capacitance multiplier includes a self-biasing active load for generating a stable bias voltage without a separate current bias. In addition, the capacitance multiplier includes a cascode load within a multiplying section for increasing the output resistance and in turn the charging/discharging efficiency. Furthermore, the capacitance multiplier is implemented with a plurality of multiplying paths to reduce effects of noise for more stable generation of the multiplied capacitance.
Patent TW-200616034-A (TW)
Title: Semiconductor process and photoresist coating process
Inventor: YU JUN-YIH
IPC: H01L21/027
Filed: 2004-11-10
Abstract: A semiconductor process is described. Before a photoresist is coated over a substrate, a chemical is provided for wetting the substrate. When the chemical is contact with the substrate, the substrate kept rotate state. A photoresist coating process is also provided. First, a substrate is rotated by a first rotation rate. Then, a chemical is provided for wetting the surface of the rotational substrate. Thereafter, a photoresist is coated over the surface of the substrate. The present invention can prevent the coated photoresist from defect so as to enhance the yield of the subsequent process.
Patent TW-200602385-A (TW)
Title: Photobase generator and curable composition
Inventor: OKAZAKI HITOSHI
IPC: C08G75/06
Filed: 2005-02-04
Abstract: The photobase generator of the invention is represented by the following formula 1: wherein Ar, R, A+ and X- are as defined in the specification. Since the photobase generator of the formula 1 absorbs ultraviolet lights of relatively long wavelength and is photolyzed to generate a strong base efficiently, a composition containing the photobase generator and an episulfide compound is easily cured by polymerization under ultraviolet irradiation.
Patent TW-200606994-A (TW)
Title: Sports implement, amusement tool, and training tool
Inventor: KUWABARA HIDEAKI
IPC: A63B71/14
Filed: 2005-02-16
Abstract: The present invention provides a sports implement whose characteristics a user can adjust freely and minutely. According to the present invention, it is realized that a light-weight high functional circuit is installed in various sports implements by constituting various functional circuits with a TFT formed on a film, without using a printed board. A high functional circuit using a TFT formed over a flexible plastic film is light-weight and strong in bending and impacts. It is possible to provide a sports implement that is favorable in operationality and friendly to many users in a wide range regardless of the muscle strength or physical constitution and the like of a user, since the user can adjust characteristics of a sports implement.
Patent TW-200634484-A (TW)
Title: Wireless mouse
Inventor: CHENG YU-CHIH
IPC: G06F1/16
Filed: 2005-03-17
Abstract: This invention relates to a wireless mouse, comprising a mouse and a wireless signals receiver, and having a receiving device pivotally installed on the mouse body, by way of the flexibility of a flexible element, a receiving part of the receiving device can easily leave the inside of the mouse body and a user can put the receiver into the receiving part or take the receiver away from the receiving part.