baber/WOPTO huggingface dataset:
Patent TW-392331-B (TW)
Title: Method of fabricating a semiconductor integrated circuit device
Inventor: SAWADA SHIGEKI
IPC: H01L21/8249
Filed: 1998-04-08
Granted: 2000-06-01
Abstract: In a Bi-CMOS integrated circuit device, to reduce a collector-substrate junction capacitance in an NPN transistor and to reduce the step of forming an anti-punch-through layer of the N-channel MOS transistor. Using as a mask a resist pattern having windows made on an element isolation LOCOS film 113a, 113c and P-type well layer 106, impurities are ion-implanted to form a channel stopper layer 115a, 115b for element isolation of a NPN transistor and an anti-punch-through layer 115c for a N-channel MOS transistor. Thus, a sufficient element isolation withstand voltage can be assured while avoiding an increase in the collector-substrate capacitance of the NPN transistor which is due to the transverse diffusion of the channel stopper layer when an epitaxial layer, well layer and LOCOS film are formed. In addition, without increasing the number of steps, the drain-source withstand voltage of the N-channel type MOS transistor and the short channel durability can be improved.
Patent TW-358923-B (TW)
Title: LED display device and method for controlling the same
Inventor: MATSUDA YOSHIKAZU
IPC: G09G5/02
Filed: 1998-05-14
Granted: 1999-05-21
Abstract: An LED display device, including: an LED display, including a plurality of glowing matrix, having each at least a red LED, a green LED and a blue LED; a color controller, each having a red control circuit, a green control circuit and a blue control circuit, for controlling of glow volume emitted by the red LED, green LED and blue LED based on a red signal, a green signal and a blue signal; and an LED drive control, including a red LED drive circuit, a green LED circuit and a blue LED circuit, for response of the output signal of the color control, for controlling the LED display, for co-response coming from at least output signal from the red control circuit for controlling red LED drive circuit and green LED drive circuit and response of output signal coming from green control circuit for controlling green LED drive circuit and red LED drive circuit.
Patent TW-I230656-B (TW)
Title: Laminating film
Inventor: HAYASHI YOSHIO
IPC: B32B27/08
Filed: 1998-05-27
Granted: 2005-04-11
Abstract: To provide a non-polyvinyl chloride laminating film with high strength and excellent formability and to which a layer of colored resin is formed, and to which a decorating design is given by embossing. A layer of colored resin is laid on one side of a polyester resin film comprised of nonoriented polyester resin or the crystalline polyester resin blended with the resin with low crystallinity or noncrystalline resin. Further, embossing is made on the layer of colored resin or the polyester film to give decorative patterns.
Patent TW-396511-B (TW)
Title: Method for manufacturing a semiconductor device
Inventor: HORITA KATSUYUKI
IPC: H01L21/762
Filed: 1998-06-08
Granted: 2000-07-01
Abstract: The present invention provides a method for enhancing the surface planarity of trench isolation for separation of the devices during the process. The fine trench holes are filled with dielectric film by HDP-CVD. The unwanted dielectric film deposited on the active area of the substrate surface is treated with selective dry etching for pre-planarity, then polished by CMP to enhance the planarity of the dielectric film surface. In the process for forming the trench holes, etching mask adopted is composed of silicon nitride film and polysilicon film, the polysilicon film functions as the etching end point in pre-planarity process, and silicon nitride film functions as the end point in CMP process. The trench isolation with fine pattern is formed on the active area of the substrate surface, after the unwanted isolation film and polysilicon film are removed simultaneously.
Patent TW-388992-B (TW)
Title: Method for fabricating color filter of MOS CCD
Inventor: CHEN LI-YE
IPC: H01L27/148
Filed: 1998-06-26
Granted: 2000-05-01
Abstract: The present invention relates to a method of fabricating a color filter applicable on a CCD array. The interference filter of CCD array is formed of alternating layers produced by consecutively depositing a material with a high reflective coefficient and a material with a low reflective coefficient without using a dye or a pigment. Prior to deposition, the thickness of each layer for a filter forming a particular color is calculated by suitable software. The calculated data are used to control the deposition of different layers. Each set of filter usually is consisted of blue, green and red. Therefore, three sets of uniformly distributed color pixels are generated. Once these filters are mounted, all filters are covered by a small lens.
Patent TW-498188-B (TW)
Title: Laminated substrate and data input device using the same
Inventor: MATSUFUSA HIDETO
IPC: G06F3/033
Filed: 1998-08-21
Granted: 2002-08-11
Abstract: In a laminated substrate having through holes and the substrates are conducted by filling conductive material in a through hole, the air in the through hole becomes resistance and can not be surely filled in the through hole. To solve the problem, a resistance film 7 and a joining layer 8 are interposed between a sensor substrate 2 and a PCB 20. A notched part is formed on the resistance film 7 and the joining layer 8, and an air vent 36 to be communicated with the outside of an edge of the laminated substrate is formed at a part where a through hole 35 of the sensor substrate 2 is communicated with a through hole 23 of the PCB 20. The conductive material 11 is filled in the through hole 35 from a surface of the sensor substrate 2. However, since the air in the through hole is exhausted from the air vent 36, the conductive material 11 is surely filled and an electrode 12 is surely conducted with a land 28.
Patent TW-412892-B (TW)
Title: Semiconductor light emitting device and optical recording and/or reproducing apparatus
Inventor: IWAMOTO KOJI
IPC: G11B7/127
Filed: 1998-08-27
Granted: 2000-11-21
Abstract: A semiconductor light emitting device having a structure including an active layer between a p-type cladding layer and an n-type cladding layer on a base body comprises at least one of the p-type cladding layer and the n-type cladding layer has a lattice mismatch relative to the base body as large as not smaller than 2.0x10<-4> and not larger than 3.0x10<-3> or not smaller than -1.5x10<-3> and not larger than -2.0x10<-4>. Another semiconductor light emitting device comprises at least one of the p-type cladding layer and the n-type cladding layer and the active layer have a lattice mismatch relative to the base body as large as not smaller than 2.0x10<-4> and not larger than 3.0x10<-3> or not smaller than -1.5x10<-3> and not larger than -2.0x10<-4>.
Patent TW-405213-B (TW)
Title: A method of forming a trench isolation in a semiconductor substrate
Inventor: HWANG KI-HYUN
IPC: H01L21/302
Filed: 1998-10-02
Granted: 2000-09-11
Abstract: Disclosed is an improved method of forming a trench isolation wherein silicon rich nitride layer as mask for etching a semiconductor substrate is formed by LPCVD technique using mixed gas containing at least two different gases as silicon source gas. Such an improved method and silicon rich nitride layer prevents deterioration of reliability of gate oxide layer has good in-wafer and batch uniformity.
Patent TW-452681-B (TW)
Title: Hub with frequency lowering effect
Inventor: HUANG YIN-KUEN
IPC: G06F1/00
Filed: 1998-11-06
Granted: 2001-09-01
Abstract: A hub with frequency lowering effect includes a data collection time pulse generation means capable of generating 12.5 MHz data collection time pulse, a data pulse generation means capable of generating 25 MB data flow, and a data collection means used during the moments of the ascending curve of data collection time pulse generation and the descending curve of the data collection time pulse generation, in which all these means collect data in transmission. Therefore, in comparison with conventional hub, hub of the present invention can reach the effect of transmitting 25 MB data flow at half of frequency at data collection.
Patent TW-396490-B (TW)
Title: Wafer processor
Inventor: TANIGUCHI SATOSHI
IPC: H01L21/68
Filed: 1998-11-13
Granted: 2000-07-01
Abstract: This is a wafer processor, which can suppress particles generation in wafer processing. A wafer processor 101 transfers wafer and performs a series of processing operations upon the wafer, including several pivoting robots 104 to 108 and several units 110, 120, 130, 140, 160, 170, 180 and 190. The pivoting robots 104 to 108 have body and arm. Body can rotate and will not move in horizontal direction. The arm, which is extended from body, can hold the wafer. The wafer is transported in and out of each processing unit by the rotating robots 104 to 108.
Patent TW-480491-B (TW)
Title: Semiconductor integrated circuit
Inventor: BANDO YOSHIHIDE
IPC: G11C11/407
Filed: 1998-12-14
Granted: 2002-03-21
Abstract: A semiconductor integrated circuit is adapted to make invalid an external clock, externally supplied to the semiconductor integrated circuit, when the semiconductor integrated circuit is set in an active power-down state. The semiconductor integrated circuit includes a delay locked loop DLL circuit which outputs an internal clock which phase is synchronized to the external clock. A latch circuit retains control signals in synchronism with the internal clock output by the DLL circuit. An internal circuit performs a predetermined process based on the control signals supplied from the latch circuit.
Patent TW-413947-B (TW)
Title: Method for producing semiconductor device
Inventor: NAGAYAMA TETSUJI
IPC: H01L21/336
Filed: 1999-02-22
Granted: 2000-12-01
Abstract: A method for producing a semiconductor device capable of stably removing a sidewall mask layer without removal of an etching stopper film, wherein a conductive layer 30 and a first diffusion layer 11 are formed in a semiconductor substrate 10, an etching stopper film 21 is formed covering the conductive layer 30, a sidewall mask layer 31b containing silicon is formed at an upper layer of the etching stopper film 21 facing a sidewall surface of the conductive layer 30, and a second diffusion layer 12 is formed. Here, a conductive impurity is introduced into at least the sidewall mask layer 31b at either of the time of formation of the sidewall mask layer 31b or the time of formation of the second diffusion layer 12, and heat treatment for activating the conductive impurity in the sidewall mask layer 31b is applied. Next, the sidewall mask layer 31b is removed, and the insulating film 22 is formed over the entire surface at an upper layer of the etching stopper film 21, and a contact hole CH reaching the second diffusion layer 12 is formed in the insulating film 22.
Patent TW-472116-B (TW)
Title: Turbo molecular pump
Inventor: KUBO ATSUSHI
IPC: F04D29/58
Filed: 1999-03-15
Granted: 2002-01-11
Abstract: The present invention relates to a turbo molecular pump. More specifically, the present invention provides a turbo molecular pump with high accommodating ability, which can achieve the miniaturization of the pump-controller and reduction of cost even in the presence of a heating-device. In the present invention, the turbo molecular pump supports the body of revolution beyond contact by magnetic bearing 3. The pump-controller 2 of the turbo molecular pump in the present invention equips a magnetic bearing controller 8 having a digital signal processor (DSP) 7 for executing the software programs. Said digital signal processor (DSP) 7 is responsible for the control processes of the heater 5, which is used as a heating device and of the magnetic bearing 3.
Patent TW-411755-B (TW)
Title: Assembled heat exchanger and method of assembling the same
Inventor: CHEN YUN-JING
IPC: H05K7/20
Filed: 1999-03-30
Granted: 2000-11-11
Abstract: A method of assembling an assembled heat exchanger comprises preparing a base cut from a heat conducting material, forming at least two separated cutting grooves on the top face of the base; preparing a heat dissipation plate the bottom of which having protrusion stripes by pressing a heat conducting material; pressing the surface of the heat dissipation plate to form plural upward twisted fins; mounting the heat dissipation plate on the top face of the base; coating the bottom of the protrusion stripes with an adhesive to attach to the cutting grooves at the corresponding location of the base into an assembled heat exchanger. The surface of the heat dissipation plate can be arbitrarily pressed into a plurality of fins, and the base can be mounted with a plurality of heat dissipation plates. Therefore, the invented design can be applied on different sites where different heat dissipation effects are needed.
Patent TW-426866-B (TW)
Title: Flexible conductor and switchgear made with thereof
Inventor: SEKIYA TAKU
IPC: H01H33/66
Filed: 1999-07-12
Granted: 2001-03-21
Abstract: The present invention provides a flexible conductor which can maintain the flexibility in the vacuum environment and provide long term stability for the displacement of the movable conductor relative to the fixed conductor. The invention comprises the flexible portion 1a for alternatively stacking a plurality of conductor metal layers 10a, 10a ... and a plurality of solidifying stop layers 10b, 10b ... in the depth direction; and connecting the fixtures 1b, 1b on both sides of the flexible portion 1b to compose the flexible conductor 1; and fixing respectively the fixtures 1b, 1b with the fixture conductor 24 and the movable conductor 25 during operating; and, making the flexible conductor moving following the movable conductor 25 of the fixture conductor 24. Therefore, when the flexible portion 1a is bent and deformed, the conductor metal layer 10a, 10a ... will not slide between each other.
Patent TW-445464-B (TW)
Title: Chip PTC thermistor and method of manufacturing the same
Inventor: KOJIMA JUNJI
IPC: H01C1/14
Filed: 1999-10-12
Granted: 2001-07-11
Abstract: A PTC thermistor of the present invention comprises; a conductive polymer having PTC characteristic, a first outer electrode contacting the conductive polymer, a second outer electrode facing the first outer electrode via the conductive polymer, more than one inner electrode facing to and disposed between the first and second electrode and also disposed in the conductive polymer, a first side electrode electrically connected to the first outer electrode and a second side electrode independent to the first side electrode. The odd number inner electrodes are connected to the second side electrode and the even number electrodes are connected to the first side electrode. The second outer electrode is electrically connected to the first side electrode when a total number of the inner electrodes are odd. The second outer electrode is electrically connected to the second side electrode when a total number of the inner electrodes are even. In the above construction, the thickness of the inner electrode where the inner electrode is connected to the first and the second electrode is made larger than that of other portion of the inner electrode. This construction provides a chip PTC thermister having long term contact reliability and ideal structure for the surface mounting technology.
Patent TW-461053-B (TW)
Title: Strength and electricity enhanced ball grid array package structure and manufacturing method of the same
Inventor: TAO SU
IPC: H01L23/00
Filed: 1999-11-09
Granted: 2001-10-21
Abstract: A ball grid array package structure is disclosed. The bottom surface of the substrate having no tin balls on it is coated with a metal strengthening layer for increase the substrate strength. Therefore during the packaging process, the substrate will not deform easily due to temperature change which may cause warpage of the packaged product. The metal strengthening layer on the bottom surface of the substrate can also serve as a ground plane for ball grid array package to provide a better ground effect. The metal strengthening layer can provide optimized return current path, impedance matching control design and increase loading capacitance. In high frequency applications, the metal strengthening layer can also reduce the noise and cross talk among the signal lines of the ball grid array package structures.
Patent TW-I262925-B (TW)
Title: GLP-1 analogues
Inventor: DONG ZHENG-XIN
IPC: A61P25/28
Filed: 2000-01-07
Granted: 2006-10-01
Abstract: The present invention is directed to peptide analogues of glucagon-like peptide-1, the pharmaceutically-acceptable salts thereof, to methods of using such analogues to treat mammals and to pharmaceutical compositions useful therefor comprising said analogues.
Patent TW-486493-B (TW)
Title: Propanediol derivative and process for preparing copolyester using said propanediol derivative as comonomer
Inventor: WAY TUN-FUN
IPC: C08G63/19
Filed: 2000-02-25
Granted: 2002-05-11
Abstract: The present invention relates to a propanediol derivative and a process for preparing a copolyester using the propanediol derivative as the comonomer. The present invention employs a novel propanediol derivative to replace the conventional NPG. The process for preparing the copolyester includes two steps. The first step is an esterification reaction, which involves reacting a first phthalic acid or its ester with a first alkyl diol to form an oligomer of bis(hydroxyalkyl) benzendicarboxylate. The second step is a copolymerization reaction, which involves reacting the oligomer and the propanediol derivative of the present invention to form the copolyester.
Patent TW-456075-B (TW)
Title: Connector used for small spacing, static actuator, piezoelectric actuator, ink jet head, ink jet printer, micro machine, liquid display plate, and electronic machine
Inventor: SATO EIICHI
IPC: H01R31/06
Filed: 2000-03-31
Granted: 2001-09-21
Abstract: The present invention relates to the followings: a connector used for small spacing, in which the connector still can correspond even the spacing between electrodes is very small; the static actuator, the piezoelectric actuator and the micro machine, which contain the connector used for small spacing; the ink jet head, which uses the static actuator and the piezoelectric actuator; and, an ink jet printer and the electronic machine, which carry the ink jet head stated above. For the small spacing connector (20), a plurality of the first terminal electrodes (30) and a plurality of the second terminal electrodes (32) are formed on a substrate (22), and the wiring (24) is formed to have an electrically conductive connection between the first terminal electrode (30) and the second terminal electrode (32), in which the wiring (24) has the function to change the spacing in between the first terminal electrodes (30) as well as the spacing in between the second terminal electrodes (32), and a groove portion (32A) is formed at each region between the first terminal electrodes (30).
Patent TW-467824-B (TW)
Title: Strip plate coating equipment
Inventor: MANABE TSUGIICHI
IPC: B29C63/02
Filed: 2000-05-25
Granted: 2001-12-11
Abstract: The present invention provides a coating equipment of a film lamination steel plate which has a cheap and beautiful appearance and is excellent in water resistance and corrosion resistance. The present invention also provides a strip plate coating equipment capable of performing any of gravure or offset printing. A strip plate coating equipment is installed in a steel plate transport line from a re-winding machine, through a series of plate processing processes to a winding machine, and comprises: a film adhering device for generating an adhesion film on a moving plate; and a roller printing device installed downstream of the film adhering device and printing a desired pattern on the film on the plate by a plate cylinder roller. Furthermore, a strip plate coating equipment is installed in a steel plate transport line from a re-winding machine, through a series of plate processing processes to a winding machine, and comprises: a photographic gravure printing device and an offset printing device for printing a desired pattern on the steel plate through a plate cylinder roller, in order to operate one of the photographic gravure printing device or the offset printing device.
Patent TW-472154-B (TW)
Title: Semiconductor devices
Inventor: MIYACHI KUMI
IPC: H01L25/07
Filed: 2000-07-06
Granted: 2002-01-11
Abstract: Each chip includes, in addition to a core logic, a register such as a BSR. A TAPC for controlling the register is provided only on a chip of the first stage, and an test commands/data output and input signal lines for the boundary scan test are connected to each other via wire to form a loop. Other signal lines used in the test are distributed from an output signal line of the chip of the first stage. As a result, the test needs to and the number of steps and area can be reduced in chips not provided with TAPC. With this arrangement, in a stacked device in which a plurality of chips are integrally sealed, the boundary scan test only needs to be carried out once with a smaller number of pins.
Patent TW-I268276-B (TW)
Title: Vitamin D3 analogs
Inventor: BATCHO ANDREW DAVID
IPC: C07C401/00
Filed: 2000-07-12
Granted: 2006-12-11
Abstract: Compounds of the formula, wherein R1 is hydrogen or an alkyl group; R2 is hydrogen or an alkyl group; or R1, R2 and C20 together are cyclopropyl; A is R3 is alkyl, hydroxy-alkyl or fluoroalkyl; and R4 is alkyl, hydroxy-alkyl or fluoroalkyl which are useful in the treatment of breast cancer, prostate cancer, myeloid leukemia benign prostate growth, baldness and osteoporosis.
Patent TW-513881-B (TW)
Title: Data transfer controller and electronic device
Inventor: ISHIDA TAKUYA
IPC: G06F13/38
Filed: 2000-07-14
Granted: 2002-12-11
Abstract: The object is to provide a data transfer controller that realizes high speed data transfer by reducing an overhead of processing of a firmware and to provide an electronic device. In a data transfer controller in compliance with the IEEE1394 standards, on the occurrence of a header CRC error, a header pointer is returned to a preceding position to inactivate a packet, and in the case of Unktcode, the packet is inactivated by not writing the packet to a RAM. Furthermore, a reception end status is not generated. A register storing a status of a header CRC error is provided. On the occurrence of a data CRC error, the header pointer is not restored but the data pointer is restored to the preceding position. A first mode inactivating a received broadcast packet and a second mode validating it can be set. In the case of receiving a broadcast packet in the first mode, the packet is not written in the RAM.