baber/WOPTO huggingface dataset:
Patent JP-S6289322-A (JP)
Title: Continuous normal pressure cvd device
Inventor: KATO CHIYUKI
IPC: H01L21/31
Filed: 1985-10-16
Abstract: PURPOSE:To improve the filming effect on numerous fine steps on the surface of semiconductor wafer in the filming process thereof by a method wherein a wafer conveyer belt is provided with a slight gradient, i.e., a dispersion head forms a bit of angle with the wafer on the conveyer. CONSTITUTION:Within a series of dispersion heads normally composed of three heads, a conveyer belt 3 is provided with a slight gradient D and D' immediately below the first and the third dispersion heads so that a semiconductor wafer 5 may be slightly inclined when it is passing through said positions. Through these procedures, the relative jetting angles of reactive gas can be changed in time series so that the sides of fine steps on the surface of semiconductor wafer 5 may be filmed easily to improve the step coverage. The figures A-C represent how the fine steps are filmed while they are passing immediately below each dispersion head 1 in enlargement.
Patent JP-S6289298-A (JP)
Title: Semiconductor storage
Inventor: NAKAI NOBUAKI
IPC: G11C17/00
Filed: 1985-10-16
Abstract: PURPOSE:To attain a reading action at a high speed by accelerating the switching action between non-selection and selection modes and then decelerating the switching action between the selection and non-selection modes respectively to secure a multiple selection period of a data line. CONSTITUTION:The output signal of a NOR gate circuit G1 is delayed by the 1st delay circuit. The output signal of an inverter circuit N5 serving as an output circuit of the 1st delay circuit is supplied to the input terminal at one side of a NOR gate circuit G2 and a NAND gate circuit G3 respectively. While the output signal of the circuit N5 is delayed further by the 2nd delay circuit. The output signal of an inverter circuit N9 serving as an output circuit of the 2nd delay circuit is supplied to the input terminal at the other side of both circuits G2 and G3 respectively. The total delay time of the 1st and 2nd delay circuits is set at the value equivalent to the timing approximately synchronous with the selecting action of a word line. The internal complement address signals ayi and the inverse of ayi are supplied to a Y decoding circuit YDCR consisting of a NAND gate.
Patent JP-H03183474-A (JP)
Title: High-content arginine-containing yeast
Inventor: ISHINO SHUICHI
IPC: C12N1/16
Filed: 1989-09-04
Abstract: NEW MATERIAL:A yeast belonging to Kluyveromyces polysprous and having resistance to ethionine. EXAMPLE:Kluyveromyces polysprous ETA 82-33 (FERM BP-2560). USE:A feed for domestic animals. Capable of accumulating a remarkable amount of L-arginine in the cell body. PREPARATION:A yeast such as Kluyveromyces polysprous IFO 0996 belonging to Kluyveromyces genus is used as a parent strain and subjected to mutation treatment such as ultraviolet irradiation and the objective yeast capable of accumulating L-arginine in the cell body in an amount of >=5wt.% based on the dried cell body is subsequently selected from the resultant ethionine-resistant strains.
Patent JP-S60120511-A (JP)
Inventor: ARAI TEIJIROU
IPC: H01G4/20
Filed: 1983-12-02
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2001047605-A (JP)
Title: Printing color tone managing apparatus
Inventor: INOMATA TAKASHI
IPC: B41F31/02
Filed: 1999-08-13
Abstract: PROBLEM TO BE SOLVED: To rapidly regulate a color tone by calculating a control amount to an inking amount regulating mechanism of a printer, and controlling the mechanism of the printer based on its control amount. SOLUTION: An output from a spectrocolorimetric head 22 is supplied to the color tone managing apparatus 28 through a measured data processor 26. The processor 28 calculates a reflectivity from an output signal of the head 22. The apparatus 28 calculates an Lab chromaticity from the reflectivity processed by the processor 26 and densities to respective inks. A color difference is calculated by using the calculated chromaticity, and a deviation of the color tone of a printed product is detected. Thus, since a spectrocolorimeter 22 of the printer is mounted to immediately detect a deviation of the color tone of the product during printing and the ink amount can be regulated, the color tones of the products can be made uniform without printing a large quantity of defective printed products.
Patent JP-H04109105-A (JP)
Title: Measuring method for angular deviation of polygon mirror
Inventor: TAKEUCHI YOSHIHARU
IPC: G01B11/26
Filed: 1990-08-29
Abstract: PURPOSE:To measure the angular deviation of a polygon mirror from two angular deviations by measuring the angular deviation between the reflecting face of a reference reflecting mirror and the reflecting face of the polygon mirror with the first measuring instrument, and measuring the angular deviation with the bottom face, i.e., reference face, of the reference reflecting mirror with the second measuring instrument. CONSTITUTION:A reference reflecting mirror 2 is put on a surface plate 1 with its bottom face 3 faced upward, the first automatic collimator 4 is arranged in the direction of the reflecting face of the reflecting mirror 2, the second automatic collimator 5 is arranged in the direction of the bottom face 3 of the reflecting mirror 2, and the readings of the collimators 4, 5 are measured. When the difference between the measured value of the collimator 4 and the measured value of the collimator 5 is obtained, the angular deviation of a polygon mirror is measured.
Patent JP-H0549917-A (JP)
Title: Heating and cooling apparatus
Inventor: MORII TAKAYUKI
IPC: F25D7/00
Filed: 1991-08-14
Abstract: PURPOSE:To prevent not only the damage of a heating and cooling apparatus due to the repetition of heating and cooling but also the generation of time delay in the changeover from heating to cooling or from cooling to heating. CONSTITUTION:A plurality of ejectors 24, 25 are allowed to communicate with the jacket part 9 of a reaction vessel 1 and tanks 22, 23 and pumps 20, 21 are allowed to communicate with the respective ejectors 24, 25. A part of the water emitted from the pumps 20, 21 is supplied to the jacket part 9 through valves 31, 32. The ejector 25 is arranged at the position about 3m under the ejector 24. A heating fluid supply passage 4 and a cooling fluid supply passage 5 are respectively connected to the jacket part 9 through valves 30, 33.
Patent JP-2000058013-A (JP)
Title: Flat battery
Inventor: YABE TAKAYUKI
IPC: H01M2/08
Filed: 1998-07-31
Abstract: PROBLEM TO BE SOLVED: To establish a technology that realizes shrinkage in volume of a battery, while taking advantage of three-sided sealing. SOLUTION: This flat battery has a structure, in which a skin covering material 1 comprising a multiple-layer film mainly made of resin film, including metal foil as one intermediate layer seals periphery of flat rectangular power generation elements 2-5, and a lead wire connected with an electrode is projected from one short edge of the rectangular shape. The skin covering material 1 has a structure, in which one multiple layer film is folded into two along a rectangular short edge on the opposite side of the lead wire side, the remaining three edges are sealed with thermally fused portion 6, and sealed excess skin covering material of two long edges are folded toward the inside.
Patent JP-S6386439-A (JP)
Title: Manufacture of capillary chip
Inventor: NAKADA JUNJI
IPC: H01L21/60
Filed: 1986-09-30
Abstract: PURPOSE:To prevent any cracking from occuring by a method wherein a capillary hole is made in a raw material 16 produced during the raw material forming process by laser beam irradiation to be sintered and then finished. CONSTITUTION:During raw material forming process, pores 10, 12 are previously formed by press work. Next, during a capillary hole making process, when CO2 or YAK laser beams 17 are irradiated on a capillary bonding surface 9 coaxially with the pores 10, 12 through the intermediary of an optical system 18, a funnel type capillary hole 13 is formed in large diameter while in smaller diameter at the positions as deeper toward the bonding surface 9 side. However, during the next sintering process, the raw material formed into the capillary hole 13' contracts slightly changing the dimensions thereof, a held part 3, a taper part 4 and a throughhole 6 are ground into respective final machining dimension in the final finishing process. Through these procedures, any cracking in case of making the capillary hole can be prevented from occuring to increase the yield as well as the productivity markedly.
Patent JP-2000057324-A (JP)
Title: Card type fingerprint recognizing device
Inventor: KUSANO HIROYUKI
IPC: G06T1/00
Filed: 1998-08-14
Abstract: PROBLEM TO BE SOLVED: To reduce the size and weight of a card type fingerprint recognizing device which is inserted into a card inserting port of a main body device such as a personal computer. SOLUTION: The one end of a connector part 3 which is inserted into a card inserting port of a main body device such as a personal computer to be connected, a card part 2 having an interface part which transmits and receives signals and a fingerprint image pickup part 1 which is provided at the other end of the part 2 are integrally provided. The part 1 includes a stamping surface 4 where a fingerprint is stamped, a photosensor 5 which detects the fingerprint stamping state, a CCD camera 6 which photographs the fingerprint, etc. Then a signal processing part is provided to either one of the part 2 of 1 or to the both to process the image pickup signals obtained by the part 1 and to transmit them via the interface part.
Patent JP-H0392452-A (JP)
Title: Air bag device
Inventor: OGASAWARA TAKASHI
IPC: B60R21/16
Filed: 1989-09-05
Abstract: PURPOSE:To prevent scatter in sensitivity by respective sensor members by arranging a plurality of sensor members sensing abrupt deceleration in car speed in such a way as to be symmetrical side to side to a vertical face which is intersected with the rotation center of a steering wheel while being extended to the longitudinal direction of a car. CONSTITUTION:A plurality of sensor members (ball) 44 is arranged in such a way as to be symmetrical side to side to a vertical face which is intersected with the rotation center of a steering wheel 22 while being extended to the longitudinal direction of a car. This therefore causes scatter in acceleration to be elinimated, which is transmitted from the axial center section of a steering wheel 22 to the respective sensor members 44 at the time of abrupt deceleration in car speed, thereby making it possible to make sensitivity by the respective sensor members 44 identical.
Patent JP-S6385302-A (JP)
Title: Apparatus for measuring difference in beam path length
Inventor: KOIKE OSAMU
IPC: G01B9/02
Filed: 1986-09-30
Abstract: PURPOSE:To remove a measuring error, by dividing a beam signal for detection into two and further separating one of them into two linearily polarized components different by 90 deg. in a plane of polarization from each other and setting the difference between both components to a detection signal. CONSTITUTION:The laser beam 2 emitted from a laser 1 is shifted in beam frequency by a beam frequency shifter 3 and beam 8 is emitted from said shifter 3. This beam 8 emitted is divided into two beams by a non-polarizing beam splitter (BS)9 and the reflected beam 10 among them is divided into two beams by a non-polarizing beam splitter BS34. Transmitted beam 47 is inputted to an operation circuit 39 through a polarizing beam splitter BS11 and a beam detector 13, while reflected beam 35 is inputted to said operation circuit 39 through a polarizing beam splitter BS36 and beam detectors 38A, 38B. The transmitted beam 14 of BS9 is divided into P-polarized beam 26 of an azimuth 0 deg. and S-polarized beam 27 of an azimuth 90 deg. by a polarizing beam splitter 15 and both beams are inputted to an operation circuit 46 through a non-polarizing beam splitters BS40, polarizing beam splitters BS28, BS43 and beam detectors 30, 45A, 45B. The signals inputted to the operation circuits 39, 46 are outputted as signals got rid of a noise component and the phase difference between both signals is detected by a phase detector 31 to be displayed.
Patent JP-2001057088-A (JP)
Title: Nand type non-volatile memory
Inventor: KAWAMURA SHOICHI
IPC: G11C16/06
Filed: 1999-08-16
Abstract: PROBLEM TO BE SOLVED: To perform surely verifying operation at the erasing/verifying time in an NAND type non-volatile memory whose threshold voltage is negative in an erasing state. SOLUTION: This memory has a constant current source 7 connected to a bit line to which a memory cell MC is connected, a sense amplifier section having a detecting transistor N8 detecting a potential of the connection point, a first reference potential ARVss being opposite side of a bit line of a memory cell, and a second reference potential PBVss to which a source of the N8 is connected. At the erasion/verifying time, ARVss and PBVss are controlled at the prescribed positive potential.  The control gate level of a memory cell can be made into a negative level being equivalently a erasion/verifying level by controlling ARVss at a positive potential, further, equivalent threshold voltage of the N8 can be higher, or an equivalent trip level of a detecting inverter can be higher by controlling PBVss at a positive potential, and a detecting transistor can be made surely non-conduction at the time of erasion/verifying.
Patent JP-S61110030-A (JP)
Title: Fatigue tester
Inventor: OKUDA SHIGEO
IPC: G01N3/32
Filed: 1984-11-02
Abstract: PURPOSE:To achieve a simplified construction and a smaller size, by drawing out an induced electromotive force across open ends of a U-shaped sample to measure while the current flowing through the sample is cut off. CONSTITUTION:When a switch 11 is closed to generate a resonance curve vibration in a U-shaped sample S, a sinusoidal electromotive force developing between open ends a and B of the sample S is outputted to a chop circuit 2 through a preamplification circuit 1. In the circuit 2, a sample holding circuit 5 is driven through a delay circuit 4 by a clock signal from a clock generating circuit 3 for driving a chopper circuit 9 and moreover, a super power signal voltage is regulated 7 in the phase through a band-pass filter 6 to be introduced to an automatic gain control amplification circuit 8. While holding a specified resonance curve vibration of the sample S, it is introduced into the circuit 9 to be interrupted and further, fed to the end B of the sample S through a power amplification circuit 10 and the switch 11. The drive signal of such a condition is fetched from the circuit 8 to be recorded 16. The electromotive force signal fetched from the filter 6 is recorded 16 through a monitor display 13, a universal counter 14 and a Q meter 15.
Patent JP-2000066065-A (JP)
Title: Optical connector and mounting method thereof
Inventor: ASADA KAZUHIRO
IPC: H01L31/0232
Filed: 1998-08-17
Abstract: PROBLEM TO BE SOLVED: To provide an optical connector easily mountable onto a printed wiring board, and also surface-mountable. SOLUTION: Attaching parts 10 are formed on both sides of an optical connector 1 housing 2. These housing 2 and attaching parts 10 are formed of a conductive resin, and electrodes 11 are embedded in the attaching parts 10. The electrodes 11 are structured so as to be directly soldered to a wiring pattern 50 formed on the attached plane Pa of the printed wiring board P.
Patent JP-S6290365-A (JP)
Inventor: MARUOKA TAKANOBU
IPC: D06B3/10
Filed: 1985-10-15
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H1073843-A (JP)
Title: Active matrix type liquid crystal display device
Inventor: SHIBA HIROSHI
IPC: G09F9/35
Filed: 1996-08-30
Abstract: PROBLEM TO BE SOLVED: To provide an active matrix type liquid crystal display device capable of being driven by a dot inversion driving or a driving near to it and capable of obtaining a satisdactory picture quality. SOLUTION: One line of signal lines S,, S,, &.. is used in common by odd numbered pixels d11 ,d13 ,... and by even numbered pixels d12 , d14 ,... of a horizontal direction. Two scanning lines G1 , G2 ,... are assigned to one horizontal display line and gates of respective TFTs(thin film transistors) are connected to different scanning lines in the odd numbered pixels and the even numbered pixels using the signal lines in common. Moreover, the connection between gates of TFTs and scanning lines becomes a reverse relation with each other in odd numbered display lines and the even numbered display lines. Thus, a driving equivalent to the dot inversion driving is made possible and a liquid crystal display device of high-picture quality is obtained.
Patent JP-S59117411-A (JP)
Title: Coating waveform tube
Inventor: BUIRUHERUMU HEEGURAA
IPC: H02G3/04
Filed: 1983-12-08
Abstract: A plastic corrugated sheathing hose adapted for electric cable installation and producible in one continuous operation, includes a longitudinal slit along its side. Each edge of the hose adjacent the slit is complementarily configured to form a detent or snap-locking closure releasably engageable in overlapping relationship. After insertion of a cable through the sheathing hose slit, closure of the hose is accomplished by pressing overlapped complementarily configured together. Closure of the hose in this manner results in a substantially gas-tight and waterproof cable enclosure accomplished in one operation with the inlaying of the cable.
Patent JP-H0955439-A (JP)
Title: Semiconductor device and its manufacturing method
Inventor: HORIUCHI TADAHIKO
IPC: H01L21/8234
Filed: 1995-08-16
Abstract: PROBLEM TO BE SOLVED: To provide a CMOS device structure fit for low voltage operation. SOLUTION: A P well 2 and an N well 3 are formed on a p type silicon substrate 1 furthermore, an element isolating oxide film 4, a p type diffused layer 9, an n type diffused layer 10 and a titanium silicide 5, a gate electrode 6 and an interlayer insulating film 7, an aluminum-wiring 8 are formed, besides, a titanium silicide layer is arranged beneath a contact hole provided to fix the well potential to connect a well to a power supply line through the intermediary of a Schottky diode although the well is conventionally fixed to the power supply line. Thus, the well potential is biased in the normal direction by the turn off voltage of diode thereby reducing absolute value of the threshold value voltage of MOSFET.  Since this reduction is effected only in the case of operation time of integrated circuit when the diode is supplied with current, the large absolute value of the threshold value voltage of the MOSFET can be maintained during the standby time of the integrated circuit.
Patent JP-S60122134-A (JP)
Title: Covering method for steel pipe pile
Inventor: TANAKA MITSUO
IPC: F16L58/10
Filed: 1983-12-06
Abstract: PURPOSE:To prevent breakage of a cover during the driving thereof by heating and shrinking a tubular body of a heat shrinking cover sheet to form a anticorrosive cover while a projection in the driving direction of a heat seal tape is heated and joined on the surface of a steel pipe pile. CONSTITUTION:A heat seal tape 6 larger than the width-wise length of a heat shrinking cover sheet 4 and broader in the width than a lap 5 with the thickness of about 0.05-0.5mm. is arranged as projected in the direction of driving a steel pipe pile 1 from the end rim of the cover sheet 4 and heated and fused integral to form a tubular body 4'. Finally, the tubular body 4' is heated and shrinked as a whole to form an anticorrosive cover layer 4'' on the circumferential surface of the steel pipe pile 1 while a projection 7 is heated and joined on the surface thereof 1. The lap 5'' of the cover layer 4'' is protected by the projection 7 and fixed on the steel pipe pile and can be prevented from coming off the end and breaking by impact of a driving.
Patent JP-H0279466-A (JP)
Title: Manufacture of semiconductor memory
Inventor: GENJIYOU HIDEKI
IPC: H01L27/10
Filed: 1988-09-14
Abstract: PURPOSE:To prevent generation of residues in the boundary region between well layers by performing removal so that the main surface of a first semiconductor region is exposed in the condition trench is filled with a filling material, when the trench formed in the first semiconductor region is to be filled with filler, and then removing the remaining filling material in the condition that trench part and the exposed main surface of the first semiconductor region are masked. CONSTITUTION:An embedded deposit layer 16a formed over the whole surface of a silicon base board is removed by means of etching-back until the deposit layer fills only the trench concerned and keeps the same level as the surface of the region of P-type well layer 2. In this etching process, resist film 14 is formed selectively only on the region of P-type well layer 2 where trench is formed. Further, etching of the embedded deposit layer 16a is conducted using this resist film as a mask. Accordingly only trenches in the deposit layer 16a are filled, and an embedded separate layer 16 is accomplished. At this time, no residues of embedded deposit layer 16a are produced at level difference part formed between P-type and N-type well layers 2, 3.
Patent JP-H0279414-A (JP)
Title: Pattern alignment
Inventor: MIYAZAKI JUNJI
IPC: H01L21/027
Filed: 1988-09-14
Abstract: PURPOSE:To enable highly precise alignment to be done by flattening, by heat treatment, the surface part of a resist film which covers a part corresponding to an alignment pattern being formed beforehand in a pattern and its peripheral neighboring part, prior to alignment operation. CONSTITUTION:The surface part of a resist film 3 which covers a part corresponding to an alignment pattern 2a which is formed beforehand at least in a first pattern 2 and its peripheral neighboring part is flattened as far as possible prior to alignment operation by heat treatment by irradiation of carbon dioxide laser beams. Hereby, an alignment signal which is obtained by applying light 4 for alignment to the applicable part is not affected at all by the effects such as unevenness of resist film 3 thickness at the part, asymmetry of film thickness, etc., and it shows a sharp and clear wave shape in symmetry, which corresponds completely to the alignment pattern 2a. By using the alignment signal which is obtained this way for alignment operation of a second pattern by the resist film 3, highly precise alignment can be done.
Patent JP-S60123124-A (JP)
Title: Controller of active filter with injecting device
Inventor: ASANO MASAKUNI
IPC: H03H11/04
Filed: 1983-12-06
Abstract: PURPOSE:To reduce the capacity of a higher harmonic generating circuit by constituting an injecting part of an active filter with a higher harmonic injecting device by an impedance circuit to reduce a voltage applied to the higher harmonic generating circuit. CONSTITUTION:A higher harmonic generating source (load) 2 is connected to a bus 9 of a power system 1, and impedances 5 and 6 and a higher harmonic generating device 3 constituting the injecting device are connected to the bus 9. Higher harmonics generated from the higher harmonic generating source 2 are inputted to the generating device 3 through a fundamental wave eliminating filter 7 and a control filter 8 by a current detector 4 connected to the bus 9. The higher harmonic generating device 3 generates a higher harmonic current of the same order in response to the higher harmonic current due to the generating souce 2. Values of impedances 5 and 6 are set to Z1 and Z2 in accordance with the transfer function of the filter 8. Thus, the voltage applied to the generating device 3 is Z2/(Z1+Z2) times as high as the bus voltage, and the capacity is reduced.