baber/WOPTO huggingface dataset:
Patent JP-H09223446-A (JP)
Title: Trip mechanism of circuit breaker
Inventor: SUGANO TAKESHI
IPC: H01H71/12
Filed: 1996-02-16
Abstract: PROBLEM TO BE SOLVED: To prevent the hindrance to reset operation caused by the entrance of a molten foreign matter into an engaging part of an operating lever in short circuit break time by constituting a stopper part adjacent to the engaging part of the operating lever with a plurality of projections through a gap. SOLUTION: A perpendicular engaging part 17 and an engaging part 13a of a link 13 are perpendicularly engaged by the reaction force of a spring 15 locked to a fixing frame side end 12a and an operating lever 11, and a stable engaging state can be obtained. The hooking dimension of a stopper part 18 adjacent to the perpendicular engaging part 17 is set constant. In order to stabilize the trip operation of a circuit breaker, it is necessary to keep the hooking dimension of the operating lever 11 and the engaging part 13a of the link 13 constant. The stopper part 18 adjacent to the engaging part 17 of the operating lever 11 is formed so as to have the inclined part of an acute angle-shaped or curved, not flat, projection, and a gap 19 is formed between the projections so that a foreign matter 20 drops from the gap 19.
Patent JP-S60197761-A (JP)
Title: Asphalt composition
Inventor: TAKAHATA NORIO
IPC: C08K3/00
Filed: 1984-03-21
Abstract: PURPOSE:To provide the titled compsn. which has excellent flame retardance, is not dripped during heating and prevents formation of flame propagation path during a fire, consisting of asphalt, a solid halogen-contg. compd., a stabilizer for said compd. and Sb2O3. CONSTITUTION:A solid halogen-contg. compd. (e.g. decabromodiphenyl ether), Sb2O3 and a stabilizer (e.g. epoxidized soybean oil) for said halogen-contg. compd. are mixed with asphalt (e.g. blown asphalt).
Patent JP-S53138134-A (JP)
Title: Automatic elevator for working machine
Inventor: ARASE MASATOMI
IPC: B60K20/00
Filed: 1977-05-10
Abstract: PURPOSE: To easily operate the automatic elevator for a working machine on an agricultural tractor or the like and enable the tractor to retard with the machine lowered without breaking cultivating forks or the like by constructing the tractor so that hydraulic control levers are automatically raising the machine at retarding time. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-S58171144-A (JP)
Title: Decoding device
Inventor: KAWARABAYASHI SHIGEYUKI
IPC: G11B20/18
Filed: 1982-04-01
Abstract: PURPOSE:To reduce the probability of overlooking error, by correcting single and double errors in the first decoder and adding disappearance information (flag information) if double or more errors exist and using disappearance information to correct error up to double errors in the second decoder. CONSTITUTION:The device consists of decoders 23 and 25, which have error detecting and error correcting function, and a deinterleaving circuit 24 which deinterleaves the output of the decoder 23. The decoder 23 is provided with a circuit which not only corrects error but also adds a flag to data to make the data disappearance information if an error is detected, and the decoder 25 is provided with a circuit, which has a function to decide whether the flag is added to data or not, and a circuit which has a function to discriminate whether errors should be corrected or not in accordance with the total number of added flags. Single and double errors are corrected in the decoder 23, and disappearance information (flag information) is added if double or more errors exist, and this disappearance information is used to correct errors up to double errors in the decoder 25.
Patent JP-S55149146-A (JP)
Title: Ceramic painting method
Inventor: NAKA SHINZABUROU
IPC: C03C17/32
Filed: 1979-05-01
Abstract: PURPOSE: To paint a ceramic without occurrence of defects such as cracks and curling by dipping a transfer film in a softening or swelling soln. to peel the film off its ground paper after which the film is stuck to the ceramic surface and baked.  
     CONSTITUTION: As a softening or swelling soln. for a transfer film an aqueous soln. of a solvent which does not dissolve the film but softens or swells it and/or a plasticizer is used. For example, in case of a (meth)acrylic type transfer film an aqueous soln. consisting of ethyl lactate 4 parts, diethylene glycol 26 parts and water 70 parts is used, and in case of a cellulose type one a 10% aqueous soln. of ethylene glycol is used. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S55146878-A (JP)
Title: Apparatus for producing separator for cylindrical alkaline manganese battery
Inventor: AOTO KIYOSHI
IPC: H01M2/18
Filed: 1979-05-01
Abstract: PURPOSE: To attach bottom paper simply and accomplish mass production in a short period of time, by making the outside diameter of the punching shaft and the outside diameter of the spindle, arranging both on the same axial line, so that the bottom paper is wound after it has come into contact with the forward end of the spindle.  
     CONSTITUTION: A frame 47 nipping and holding stock for bottom paper is fixed to the front of a punching shaft 36. A hole having a diameter permitting the shaft 36 to pass is made at the center of the frame. The stock for bottom paper is nipped and held at right angles with the axis of the shaft 36. The shaft 36 is the same in diameter as the spindle 2. The shaft 36 is arranged on a table so that the axis of the shaft is aligned with the axis of the spindle. In addition, it is formed in such a  manner that round paper 9 is wound to the spindle periphery and partial periphery  of the shaft 36 in contact with the forward end through bottom paper. By this  arrangement, it is possible to attach bottom paper simply without inserting bottom  paper after forming the separator. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S62281996-A (JP)
Inventor: SKOGWARD KENNETH O E
IPC: D05B69/24
Filed: 1987-03-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S61214540-A (JP)
Title: One wafer semiconductor device
Inventor: WATANABE TETSUO
IPC: H01L21/768
Filed: 1985-03-20
Abstract: PURPOSE:To decrease the number of parts items and to easily obtain a semiconductor device by a method wherein an active region, wiring layers and connecting terminals are provided on the same wafer without dividing the wafer into chips and after the region and the terminals are connected using the metal evaporation wiring paths, a sealing is performed. CONSTITUTION:A device region 2 and external terminals 3 are made on the same wafer 1. The region 2 has an element active layer (Si substrate) 4 and a multilayer wiring layer 5 (Al wiring layers 11 and 12) and numerous circuit elements are formed thereon. The region 2 and the terminals 3 are mutually connected using metal evaporation wiring paths for Au, Cr, Cu and so forth. Then, the region 2 is buried in silicone gel 7, a cap 8 is attached and a sealing is performed. According to this constitution, a scribing is unnecessary, the assembly becomes simpler, the number of parts items can be reduced and as there is no wiring connection, bond peeling and trouble due to corrosion are also not generated, the wiring length is also shortened, and moreover, the wiring delay is also decreased.
Patent JP-S56149897-A (JP)
Title: Manufacturing equipment of diaphragm for speaker
Inventor: SATOU KATSUAKI
IPC: H04R7/08
Filed: 1980-04-23
Abstract: PURPOSE:To elevate the productivity by mechanizing the manufacturing process of a speaker diaphragm. CONSTITUTION:Plural cylindrical or columnar pins 9 are concentrically placed on the rotary table 8. The rotary table 8 can be slided in the radial direction, the shape of the center side of the rotary table 8 makes the height in the vertical direction same as that of the pin 9, and a former 10 having a notch 10' partially is placed in the guide groove 8' which has been formed radially between the pins 9 on the rotary table 8. A spring 11 is provided in the direction where the former 10 is separated from the center of the rotary table 8. A stopper 12 which is fitted into the notch part 10' of the former 10 and decides the position in the radial direction of the former 10 is provided on the rotary table 8. 13 shown in the figure is a spring for giving the holding force.
Patent JP-S56151811-A (JP)
Title: Melting and treating method for solid waste
Inventor: NAKANO TOSHIHIKO
IPC: F23G5/08
Filed: 1980-04-23
Abstract: PURPOSE:To stably and effectively perform the treatment of solid waste with recovered heat by connecting a waste heat recovering heat exchanger to a gas exhaust passage and molten material outlet passage in combination to a combustion chamber and controlling the quantity of heat to be recovered by an after-burner. CONSTITUTION:A solid waste own weight dropping supply passage 4 is connected to the overall periphery of the bottom wall 7 of a combustion chamber 3, a gas exhaust and molten material outlet passage 8 is connected to the center of the bottom wall 7 of the chamber 3, an after-burning chamber 11 is connected to the passage 8, and an after-burner 10 and a heat exchanger 14 are provided. After municipal refuse or the like is supplied to the chamber 3 while filling and dropping the refuse in the passage 4 and is burnt by the burner 2, it is further completely burnt, is then fed to a flue 12, the molten material is cooled, solidified and exhausted from an outlet unit 13. On the other hand, the combustion gas from the flue 12 is effectively recovered for the waste heat by the heat exchanger 14 while controlling the burner 10 by a controller 26, and is treated stably by a drying unit 15 or the like as previously designed.
Patent JP-S63220618-A (JP)
Title: Output buffer circuit
Inventor: ASAJIMA MASAAKI
IPC: H03K5/1254
Filed: 1987-03-09
Abstract: PURPOSE:To remove noise without adding a circuit for devising noise countermeasure to an internal circuit by providing a transceiver and a logical circuit having noise removing function which uses the input from the transceiver, and an enable signal as an input, in a logical integrated circuit. CONSTITUTION:The delaying quantity of a delaying circuit 4 is determined so that the noise can be removed in consideration to the width of the noise to occur at the time of switching the enable signal of the transceiver. When an enable signal 5 of the transceiver 1 is switched, the noise occurs as shown in the figure at an (f) point. At this time, the enable signal 5 is used, the delaying circuit 4 and an EX-OR 3 are used and thus, the control signal of a next step order circuit 2 is generated in an (e) point. Next, the order circuit 2 uses the input of the transceiver as a data input and the output of the EX-OR 3 as the control signal. For that reason, since the signal at an output (g) point of the order circuit 2 fetches the stable signal after the noise is generated at the (f) point, the noise generated at the (f) point is removed.
Patent JP-S57169601-A (JP)
Title: Production of length rule provided with glittering scale on black surface
Inventor: WATANABE KATSUTOSHI
IPC: G01B3/02
Filed: 1981-04-11
Abstract: PURPOSE:To provide a glittering scale on a black surface in the production of a length rule by applying a photosensitive film corresponding to the scale on a black-dyed or black-plated blank material, and hardening the film at high temp. then gold-plating or coating fluorescent paint on the etched scale lines. CONSTITUTION:Black dyeing or black plating is applied over the entire surface of a blank material for straight rules or carpenter's squares made of metal, and photosensitive liquid that provides protection against etching and plating is coated thereon, and a negative having prescribed scale lines is placed thereon, it is then exposed and developed. The material lost of the photosensitive film only on the scale line parts is heated to 250-300 deg.C to allow the film to harden, after which the black painting or plating of the scale line parts is stripped. The scale line parts are etched by an etching treatment, and golden color plating is applied on said parts or fluorescent paint is filled therein. It is well to form a transparent protective film over the entire part finally.
Patent JP-2000248798-A (JP)
Title: Vehicular hood lock device
Inventor: NAKAGOME KATSUMI
IPC: E05B83/24
Filed: 1999-03-02
Abstract: PROBLEM TO BE SOLVED: To prevent a lock release by an unfair practice by arranging a protective cover for covering clearance between a base plate and an installing surface above an operation part of a locking plate on the base plate for pivotally fixing a latch and the locking plate. SOLUTION: A latch rotating by meshing with a striker 6 entering a groove 1a when closing a hood and a locking plate connected to an open steering wheel via a wire are pivotally fixed to a rear surface of a case plate 1 by respective shafts. A protective cover 12 is provided with a horizontal part 12a extending in the horizontal direction in a position above an operation part of the locking plate on the rear surface of the base plate 1, a vertical part 12b extending upward from the rear end of the horizontal part 12a and a pair of installing pieces 12c arranged in left/right end parts. A bolt 2 is inserted into installing holes of the respective installing pieces 1a, 12c, and the base plate 1 and the protective cover 12 are co-fastened and fixed to a frame 3 to thereby check an entrance by an unfair means from above the base plate 1 to prevent a lock release by an unfair practice.
Patent JP-H10255081-A (JP)
Title: Image processing method and image processor
Inventor: UCHIYAMA SHINJI
IPC: G06T19/00
Filed: 1997-03-10
Abstract: PROBLEM TO BE SOLVED: To create a virtual environment in which plural different data coexist and to more efficiently perform change processing of the virtual environment that comprises various kinds of data by performing the change processing of the created virtual environment to a tree structure in which different data coexist as an object. SOLUTION: A virtual environment is created, based on a tree structure consisting of shape data, light space data, etc. When a component is added to the tree structure that is a source of the created virtual environment, addition processing is carried out (steps S802 to S805). When a component is eliminated, elimination processing is executed (steps S807 and S808) and when a component is replaced, replacing processing is performed (steps S810 to S815). Thus, the virtual environment is reproduced.
Patent JP-2000251748-A (JP)
Title: Gas discharge device
Inventor: SUGANO YOSHIHIRO
IPC: H01J17/20
Filed: 1999-03-03
Abstract: PROBLEM TO BE SOLVED: To provide a combination of electrode material effective for improving the service life of a gas discharge device with the kind of gas. SOLUTION: In this gas discharge device equipped with a pair of substrates 3, 8 joined mutually through a prescribed interval for forming a sealed space, ionizable gas filled in the space, and electrodes K formed at least on one substrate 8, for ionizing gas and generating discharge in the space, the gas is mainly composed of xenon, and at least the surface parts of the electrodes K are made of material mainly composed of carbon.
Patent JP-2000246167-A (JP)
Title: Coating method
Inventor: SHIMIZU HIROSHI
IPC: B05D1/02
Filed: 1999-03-03
Abstract: PROBLEM TO BE SOLVED: To provide a coating method capable of simply changing the coating condition to obtain a finished skin having a prescribed level against the change or the like of coating environment by simulating to expect the finished skin of a coating film after coating. SOLUTION: In a method for spray coating a material to be coated, which is transported continuously or with a tact, with an automatic machine or a coating robot for driving an atomizing coater, the coating condition is controlled to obtain the finished skin having the prescribed level on the basis of a feed back signal from a sensor for detecting temp. and humidity of a coating booth atmosphere and a sensor for detecting the finished skin in non-contact direct after the coating is finished and of a relational equation between the previously programmed changing coating condition or the coating environment condition and the finished skin.
Patent JP-S60198678-A (JP)
Title: Inter-unit connection system
Inventor: KAWAGUCHI AKIHIRO
IPC: G06Q40/02
Filed: 1984-03-22
Abstract: PURPOSE:To attain an inter-unit connection with use of no cable by providing a main control part to an automatic cash transaction machine and a transmitter and a receiver to each unit and carrying out the communication between said main control part and each unit with radio signals. CONSTITUTION:A main control part 18 of an automatic cash transaction machine transmits a display device number and the information to be displayed through a transmitter. A display device 13 displays the given data to a display. In the same way, the part 18 transmits the device number of a keyboard 14 and the control information with which the keyboard operations are possible through an antenna. Receiving these signals, the keyboard 14 is set under a keying enable state and waits for keying actions of a customer. When the end of these keying operations is informed, the keyed data is transmitted with the device number of the part 18 from a transmitter of the keyboard 14, and received by an antenna at the part 18.
Patent JP-S63221654-A (JP)
Title: Circuit substrate for semiconductor device
Inventor: YAMANAKA SEISAKU
IPC: H01L23/12
Filed: 1987-03-10
Abstract: PURPOSE:To allow a wiring layer to be scarcely damaged during handling and to further suppress a migration by providing an electrically insulating substrate formed with a groove corresponding to a wiring pattern and the wiring layer buried in the groove of the substrate by exposing only its surface. CONSTITUTION:An alumina substrate 1a formed when a groove 8 formed as a wiring pattern is sintered is bonded on other alumina substrate 1b, and the upper ends of lead pins 4 are exposed in the grooves 8. Aluminum is deposited thinner than the depth of the groove 8 on the whole surface of the surface 2 of the substrate, and etched by photolithography technique except resist in the grooves 8, thereby forming a wiring layer 3 only in the grooves 8. The surface of the layer 3 is disposed lower than the surface 2 of the substrate to be exposed in the grooves 8, and the rear surface of the layer 3 is connected to the pins 4. After a semiconductor element 6 is placed on the recess 5 of the substrate, one end of the layer 3 is wired by aluminum wires 7 to the electrodes of the element to form a pin grid array.
Patent JP-S56152030-A (JP)
Title: Bus controlling system
Inventor: AKITA KIMIO
IPC: G06F13/24
Filed: 1980-04-25
Abstract: PURPOSE:To realize a fast bus by information all peripheral equipments of an interruptable level from CPU via a common signal line, by suppressing the interruption to an interruption factor lower than the interruptable level by each peripheral equipment and then by decreasing the number of signal lines below that of two systems. CONSTITUTION:Respective peripheral equipments 17 and CPU1 are connected together via interruptable-level signal line 2 and bus-use request signal line 3 requesting the use of bus 20, and CPU1 informs all equipments 17 of an interruptable level via signal line 2. In each equipment 17, comparing circuit 6 compares its interruption level signal 5 with the interruption level from signal line 2 to apply its output of a logic circuit, which performs logical operation between outputs of FFs 10 and  14 to suppress the interruption of an interruption factor lower than the interruption level from signal line 2, thereby outputting a request higher than the interruption level according to the outputs of FFs 10 and 14. Then, the number of signal lines 2 and 3 is decreased below that of two systems to realize faster processing than that of one system.
Patent JP-H02234650-A (JP)
Title: Preparation of flavor from crude saccharides and/or syrups
Inventor: KOBAYASHI MITSUHIRO
IPC: A23L27/10
Filed: 1989-03-09
Abstract: PURPOSE:To provide the subject flavor holding a characteristic smell having an excellent favorite property without changing or modifying the smell by subjecting a crude saccharide and/or a syrup to an extraction treatment with CO2 gas of a semi-critical or super-critical state. CONSTITUTION:The flavor of a crude saccharide and/or a syrup comprising a syrup-containing sugas such as black sugar or red sugar, a honey collected from various flowers such as rapeseed flowers and false acacia flowers, etc. is extracted as follows. The crude saccharide and/or the syrup are extracted with semi-critical or super-critical state CO2 gas in a system containing water and/or an alcohol. In an extraction tower used in the extraction process, the CO2 gas of the semi-critical or super-critical state generally selected from pressures of 50-500kg/cm<2> and temperatures of approximately 25-150 deg.C is employed. The extracted flavor of the crude saccharide and/or the syrup has not only the above-mentioned characteristics but also excellent smell balance, aroma, taste retainability and storage stability.
Patent JP-S59184434-A (JP)
Title: Manufacture of cathode-ray tube fluorescent film
Inventor: NAKAZATO KOUICHI
IPC: H01J9/227
Filed: 1983-04-01
Abstract: PURPOSE:To obtain a homogeneous smooth film by applying an aqueous solution of a specified concentration of an organic or inorganic low-molecular compound to a fluorescent film before a film of an acrylic emulsion is formed. CONSTITUTION:A fluorescent film consisting of three differently-colored picture elements is formed on the inner surface of the face plate of a cathode-ray tube. After warm-water spraying development of the third-color phosphor is finished, an aqueous solution containing below 3wt% of an organic or inorganic low- molecular compound is applied before being dried, then a filming liquid is applied. By the means mentioned above, even when a stable acidic filming liquid is used, a homogeneous smooth film is obtained since the filmining liquid has an affinity to a thin film formed by the aqueous solution. Consequently, a metal back with a good quality can be formed.
Patent JP-H06243677-A (JP)
Title: Semiconductor storage device, memory device and variety setting method therefor
Inventor: KAJITANI KAZUHIKO
IPC: G11C5/00
Filed: 1993-02-19
Abstract: PURPOSE:To reduce the manufacturing time of many kinds of semiconductor storage devices having multiple functions by performing the setting of a final memory function by the writing for a nonvolatile storage element. CONSTITUTION:When a signal RASB is in a low level, and signals CASB and WEB are also in a low level, a generated timing signal LF is supplied to a mode decision circuit. Y address signals AY0, AY1 of low-order 2 bits designating modes are supplied to this circuit. When a mode setting is decided, a mode setting signal MS is generated. A setting circuit is activated by the signal MS and address signals of mode designation AY2 to AY4 are fetched. By these signals, 4 kinds of mode setting signals SX1, SX4, FP, SC are formed. The signal SX1 designates 1-bit unit access, the SX4 designates 4-bit unit access, the FP designates a high speed page mode and the SC designates a static column mode. Thus, 8 kinds of mode settings can be performed.