baber/WOPTO huggingface dataset:
Patent EP-0377504-A2 (EP)
Inventor: QUENIN JOHN ANDREWS C O EASTMA
IPC: B01L3/02
Filed: 1990-01-04
Abstract: Pipettes are used in chemical analyzers to dispense liquid on to a test element. It is important that the proper dispensing position is maintained and the pipette stays in the support during dispensing. Described herein is a pipette (10) and a pipette support (20) which provide positive engagement. A key (40) is formed on the pipette (10) which engages with a keyway (26) formed in the support (20). Advantageously, the key (40) includes a sprung portion which presses against the keyway to provide the positive engagement.
Patent EP-0391644-A2 (EP)
Inventor: PANETTA JILL ANN
IPC: C07D417/06
Filed: 1990-04-02
Abstract: Provided are certain aryl-substituted rhodanine derivatives, processes for preparing same, treatment methods and pharmaceutical formulations thereof.
Patent EP-0424128-A2 (EP)
Inventor: MURRAY-SHELLEY RICHARD
IPC: A61L2/24
Filed: 1990-10-17
Abstract: The pressurization period of an autoclave is controlled by an oscillator 103 which provides an output to the autoclave control unit 10. The control unit 10 has a microprocessor 100 with its own clock 101. The number of times that a portion of the program is carried out by the microprocessor during the pressurization period of the autoclave, is counted into a register 102 to decrease a separately established count in the register. This separately established count is representative of the correct operating time of the pressurization period. If, at the end of the pressurization period, the count in the register 102 exceeds zero by more than an allowable error, a fault indication is produced on a display and the autoclave door is maintained looked so as to prevent access to articles in the autoclave.
Patent EP-0426462-A2 (EP)
Inventor: MCCAULEY EDWARD THOMAS III
IPC: H04N1/32
Filed: 1990-11-01
Abstract: A buffer for a facsimile machine includes a computer control having memory means capable of receiving and storing facsimile messages and appropriate switching means to switch an incoming line to the memory means in the facsimile buffer when all associated facsimile machines are busy. It also provides means for causing the memory means to access the facsimile machines and transmit the message for printout when a facsimile machine is not busy.
Patent EP-0379457-A2 (EP)
Inventor: CHAZAL MARC
IPC: A47G1/22
Filed: 1990-01-18
Abstract: Stapling machine, characterised in that it consists of a mechanism (6) for bringing staples flat from a magazine (2) and of a double bending and ejecting assembly (8) intended to form a staple and automatically position it by driving it into a flat support, the staple being formed from a flat body (18) with a head (19) in the form of a peripheral curve delimiting an opening, the head being prolonged by a stem (22) provided with foldable lateral projections in the form of barbs (25). This invention is of interest to manufacturers of staples and of automatic stapling machines. <IMAGE>
Patent EP-0443458-A2 (EP)
Inventor: NAKANISHI YASUYUKI C O BANDO C
IPC: B29C70/16
Filed: 1991-02-15
Abstract: A rubber having a fiber reinforcement embedded thereon. The reinforcement comprises a cylindrically braided cords by more than four and even numbered yarns and a center cord provided in a hollow part of it. The twist multiplier K is set lesser than 350, the twist multiplier K being expressed 
 
       K=T√       D     ¯             
 
 where T is a number of twists per 10cm and D is a total denier.
Patent EP-0445715-A2 (EP)
Inventor: HEIDER PETER GRUNDIG E M V
IPC: H04N7/088
Filed: 1991-03-05
Abstract: The invention relates to a television receiver with an operating unit, a teletext decoder and a microcomputer which can be programmed in such a manner that a cyclic teletext reproduction occurs, the duration for the displaying of each teletext page of the cycle being individually selectable. <IMAGE>
Patent EP-0447995-A2 (EP)
Inventor: FUJISAKI KENICHI
IPC: G01R31/28
Filed: 1991-03-15
Abstract: In an analysis for saving failures of a semiconductor memory, a comparison is made between data written into each cell of the semiconductor memory and data read out therefrom, and in the case of a disagreement, a "1" is written by a read modify write operation into a failure analysis memory (17) at a memory cell specified by column and row addresses corresponding to the respective cell of the semiconductor memory and data read out of the memory cell of the failure analysis memory is provided as in inhibit signal to a gate (22). A disagreement signal is applied as a write command via the gate to column and row address fail count memories (23, 24) and, at the same time, it is counted by a fail counter (25). The number of defective cells on each column address line, the number of defective cells on each row address line and the total number of defective cells are obtained in the column address fail count memory, the row address fail count memory and the fail counter. 
     The number of defective cells is read out of each address of the column address fail count memory and is compared by a comparator with the number of row spare lines of the memory under test. When the former is greater than the latter, the column address of the memory under test is decided as a failing address line and the compared output is counted by a failing address line counter, and at the same time, the column address of the failing address line is written as data into a failing address memory, using the count value of the failing address line counter as an address for the write. 
     The row address is sequentially changed, beginning with a 0, at each column address decided as failing, and each time a "1" is read out of the failure analysis memory, the contents of the corresponding addresses of the column and row address fail count memories are each rewritten by subtracting a 1 therefrom by a subtractor, and at the same time, the content of the fail counter is decremented by one.
Patent EP-0461440-A2 (EP)
Inventor: BUCHBENDER GUIDO DIPL-ING
IPC: H02B11/04
Filed: 1991-05-23
Abstract: In such known disconnecting arrangements for power circuit breakers which can be pushed into switch gear apparatuses, metallic wear occurs as a result of the displacement of the contact links on the connecting tabs of the power circuit breaker when the latter is pushed into the disconnecting arrangement or into the fixed apparatus part. In addition, the contact links are not covered towards the power circuit breaker and are completely exposed after the power circuit breaker is removed. In order to avoid the difficulties which result from this, the contact links (6) are connected by means of their contact end (11) to isolating elements (10), consisting of insulating plastic, into which the opposite contact elements (4) can be driven in, in the pushed-in position of the power circuit breaker (2), so far that they are located in the region of the contact ends (11), of the contact links (6), which are held apart by the isolating elements (10). After the power circuit breaker (2) has been pushed in, the isolating elements (10), which are advantageously arranged on an isolating plate (12), can then be displaced into a position on the contact elements (4) of the power circuit breaker (2), in which position they release the contact ends (11), of the contact links (6), which are held apart from one another so that said ends make a positively locking and force-fitting contact engagement with the contact elements (4). In this case, the contact links always remain in their fixed position on the contact elements, preferably in the fixed apparatus part, and are pressed so far apart from one another by the isolating elements that the contact elements of the power circuit breaker can move into their pushed-in position without touching the contact ends of the contact links in any way, without metallic wear occurring between them and the contact links. <IMAGE>
Patent EP-0472202-A2 (EP)
Inventor: SUGAWARA MICHINORI
IPC: G05F3/24
Filed: 1991-08-22
Abstract: A current mirror type constant current source circuit comprises a current mirror circuit composed of first and second source-grounded n-channel MOS transistors connected to form a current mirror. A source-drain path of the first MOS transistor forms an input current path of the current mirror circuit, and a source-drain path of the second MOS transistor forms an output current path of the current mirror circuit. A current source is connected between a drain of the first MOS transistor and a high voltage supply line. A third n-channel MOS transistor is connected to have a source and a drain connected to a source and a drain of the first MOS transistor, respectively. A gate of the third MOS transistor is connected to the high voltage supply line.
Patent EP-0490027-A2 (EP)
Title: Pressure compensated control valve
Inventor: MERTENS KLAUS
IPC: F16K31/365
Filed: 1991-09-02
Abstract: Control valve for flowable media, comprising an actuating piston which is arranged in a valve housing (11), can be displaced by a drive and placed with its front face against a valve seat (13), the valve housing (11) being completely filled with fluid. The actuating piston is formed by a hollow body (1), which is permeable to fluid at both ends in the direction of its axis and surrounds a cavity. The cavity is sealed off with respect to the valve housing (11) by a first sealing element (10) extending transversely to its axis and by a second sealing element (12) extending transversely to its axis with respect to a dividing wall (6) contained in the cavity and displaceable in the direction of the axis. On that side of the first (10) and the second (12) sealing element which faces away from the valve seat (13), the valve housing (11) is filled with a hydraulic, incompressible sealing liquid. …<IMAGE>…
Patent EP-0474235-A2 (EP)
Inventor: UEDA TOMOAKI
IPC: G01R33/035
Filed: 1991-09-05
Abstract: A constant bias voltage is applied to plural superconducting quantum interference devices (2) which are interconnected in parallel. Output currents from the superconducting quantum interference devices (2) are supplied in added condition. Maximal-sequence codes are modulated by a modulation current corresponding to each device (2), and the modulated maximal-sequence codes are supplied to the modulation coil (2c) of each corresponding superconducting quantum interference device (2), The added output current is demodulated for each device (2) by a maximal-sequence code which is phase shifted by the same quantity as the maximal-sequence code for modulation for each device (2).
Patent EP-0480354-A2 (EP)
Inventor: ODA HITOSHI
IPC: H01L29/66
Filed: 1991-10-07
Abstract: An electron wave interference device includes a source electrode for injecting electrons therethrough, a drain electrode for taking out electrons therethrough, channel means for propagating electrons from the source electrode to the drain electrode and a gate electrode provided on a halfway portion of the channel means between the source electrode and the drain electrode for dividing the channel means, into plural channels solely in the halfway portion of the channel means. A positional relationship between the channel means and the gate electrode is set so that a depletion layer is extended under the gate electrode toward the channel means by applying a given voltage to the gate electrode. The depletion layer extended through the channel means forms an island which inhibits the propagation of electrons in the channel means and thus divides the channel means into the plural channels.
Patent EP-0490039-A2 (EP)
Inventor: HEINRICH FRIEDRICH DR
IPC: C07C29/82
Filed: 1991-10-09
Abstract: 2.1 For the dehydration of PAA, an auxiliary liquid is usually employed as an entraining agent in the distillation or as a solvent in the extraction. The known auxiliary liquids require an increased industrial outlay, are poorly accessible or hazardous in terms of process engineering. The novel process is intended to provide auxiliary liquids which are easily accessible and easy to handle industrially, and with which PAA can be obtained virtually anhydrous and free of auxiliary liquid. 2.2 In the process according to the invention, an ether - such as 3-methyltetrahydropyran, methyl tertiary-butyl ether or diisopropyl ether - is employed as the auxiliary liquid; preferably, one and the same ether is used both for extraction and as an azeotropic entraining agent. The PAA is obtained virtually free of water and auxiliary liquid. The water contains only small amounts of PAA and auxiliary liquid; the auxiliary liquid contains only small amounts of PAA and water. 2.3 The process is employed for obtaining anhydrous PAA.
Patent EP-0441419-A2 (EP)
Inventor: DILIELLO LAURA K
IPC: G02B6/14
Filed: 1991-01-15
Abstract: A star coupler comprises a flexible optical ribbon 48 curved so that input and output fibres 18, 20 attach to the same side of the coupler. A connector 30,40 mates a linear array of fibres 18',20' to each end 50 of the ribbon 48. The side walls 60 of the ribbon 48 are rounded to match the contour of the outboard fibres 28 of each array 18', 20'. The ribbon thickness is about 91% of the fibre diameter to minimize insertion loss.
Patent EP-0443802-A2 (EP)
Inventor: JOHNSON RONALD FREDERICK
IPC: G03F3/10
Filed: 1991-02-19
Abstract: A process for forming a pre-press proof of a coloured picture comprises applying a layer of coloured positive working photosensitive composition to a carrier, exposing the photosensitive composition through a positive transparency or colour separation to solubilize exposed portions of the photosensitive composition, developing the exposed layer using a water-based solvent, applying a protective transparent layer over the developed image, and repeating the process utilizing a different colour photosensitive composition and different positive transparencies or separations. By applying a transparent protective isolating layer between the coloured layers the developed layers are protected from the solvent used in developing a subsequent layer even though portions of the previous layer may have been rendered soluble by the exposure of the subsequent layer.
Patent EP-0459811-A2 (EP)
Inventor: KAMEL NABIL I
IPC: C08L95/00
Filed: 1991-05-30
Abstract: A process to prepare a paving asphalt cement which comprises
     (a) catalytically oxidizing an asphalt precursor to form a catalytically oxidized asphalt cement; and,   (b) mixing the catalytically oxidized asphalt cement with an asphalt precursor to obtain the desired grade of paving asphalt cement.
Patent EP-0478366-A2 (EP)
Inventor: HABER EDGAR
IPC: C07K16/00
Filed: 1991-09-27
Abstract: A recombinant chimeric immunoglobulin molecule is disclosed which has an antigen binding site specific for fibrin linked to the active portion of a plasminogen activator, such as urokinase.
Patent EP-0492941-A2 (EP)
Inventor: WATANABE ASAO
IPC: H04N1/411
Filed: 1991-12-17
Abstract: An image processing apparatus comprises: means for inputting image data page by page; means for generating raw image data of the input image data and coded data of the input image data; image memory means for storing the raw image data and the coded data; and control means for controlling the storing of the data into the image memory means and selecting one of the raw image data and the coded data for saving in the image memory means in accordance with the data volume of the coded data.
Patent EP-0498130-A2 (EP)
Inventor: FURTNEY DAVID ALLEN
IPC: G06F9/44
Filed: 1991-12-10
Abstract: Each component (101) of a plurality of interacting system components is associated with a version identifier (102). The version identifier (102) is stored in a location accessible by the other components. Each component independently reads the version identifier of every other component with which it must interact, and compares this value to an internally stored compatibility record (103) to determine whether the other component satisfies requirements for compatibility with the verifying component. Any component which detects an incompatibility signals an error to the system. In the preferred embodiment, the components are software modules, and the version identifier and compatibility record contain integer values. The compatibility record value represents the minimum level required of the module being verified for compatibility with the verifying module. Compatibility verification is accomplished by comparing the actual level of the module being verified with the minimum level in the compatibility record. If the actual level is equal to or greater than the minimum level, the module being verified satisfies compatibility requirements.
Patent EP-0496412-A2 (EP)
Inventor: OHNO TSUYOSHI
IPC: C12Q1/48
Filed: 1992-01-24
Abstract: The present invention relates to a method for determining a slight amount of NADH or XTP (wherein X is A, V, G, C, I, dT, dA, dV, dG, dC or dI) which is present in a solution, with high sensitivity by the use of an NADH kinase specific for NADH by utilizing a cycling reaction, and this method permits highly sensitive determination of NADH without any influence of NAD⁺ and hence is useful for diagnoses of diseases and the like.
Patent EP-0507067-A2 (EP)
Inventor: STACHER GEORGE W
IPC: B21D26/055
Filed: 1992-02-20
Abstract: A method for fabricating of intermetallic titanium aluminide sandwich structures in which blanks of titanium aluminide are bonded to one another, under vacuum in a retort, at selected areas to form a pack, and then, upon removal of the retort, expanded superplastically to form a desired sandwich structure. Bonding of the various preselected areas of the metal blanks is accomplished using elevated temperature gas diffusion bonding techniques. The invention contemplates a first thermal cycle during which the pack is diffusion bonded in an evacuated retort at one temperature within a predetermined range of temperatures, and a second thermal cycle during which subsequent superplastic forming of the pack of bonded blanks, with the retort removed, is carried out. Optionally, during the first thermal cycle, a step of superplastic preforming may be carried out whereby the pack is preformed against arcuate or other shaped forming members.
Patent EP-0511497-A2 (EP)
Inventor: NOST JAN PETTER
IPC: H04Q11/04
Filed: 1992-03-27
Abstract: This invention relates to a communication network intended for secure transmission of speech and data, including different types of subscriber terminals (1-4) and switching modules (7-8), where subscriber lines (23-26) connect each subscriber terminal with a switching module and transmission links (19-22) connect each switching module to other switching modules in the network, where transmission links and subscriber lines each carry one or more communication channels, and where the network further comprise crypto devices (13-15) to undertake encryption/decryption or other required protection mechanisms of information transmitted through the network, and where at least one of the crypto devices is constituted by a crypto-pool device having a number of crypto modules (35) which is physically separated from the switching modules (7,8), and which may communicate with the switching modules through standardized interface and communication protocols which makes the device accessible from subscriber terminals, from switching modules or from other network equipment. At least one of the crypto pool devices is a security guard (9 or 10) arranged at the interface between a switching module (7 or 8) and one of its transmission links (19 or 22) such that no impact on the switching module is required. The security guard (9 or 10) includes means stored and managed by a managing device (30) for specifying the criteria for whether a communication channel should be subjected to encryption/decryption or a data packet (message) on a virtual communication channel should be subjected to protection as required. The security guard (9 or 10) includes means stored and managed by the managing device (30) which during installation or a managing procedure are configured by a security manager (17) for monitoring control information on the signalling channel (38 or 39) to detect whether a particular communication channel is to be encrypted/decrypted or a data packet (message) is to be protected as required.
Patent EP-0516025-A2 (EP)
Inventor: HULSEY STEPHEN J
IPC: H02M3/28
Filed: 1992-05-26
Abstract: A circuit for converting one d.c. voltage to another d.c. voltage includes a transformer (T1) having a center tap and first and second end leads (t₁, t₂). A d.c. source voltage (V in ) is connected to the center tap of the transformer (T1). The end leads (t₁, t₂) are connected to ground through first and second MOSFETs (Q3, Q4) and to the gate of the MOSFET (Q3, Q4) through which the other end lead (t₁, t₂) is connected to ground such that the circuit is nominally self-oscillating due to transformer saturation. Current spikes may be minimized with a control circuit (20), consisting of an oscillator (22), a flip-flop (24), and first and second transistors (Q1, Q2), connected to the gates of the first and second MOSFETs (Q3, Q4). The control circuit (20) turns the MOSFETs (Q3, Q4) off prior to their natural oscillation turn off caused by transformer saturation. The circuit is particularly suited to operation with a low voltage d.c. source and low voltage MOSFETs (Fig.3).
Patent EP-0537428-A2 (EP)
Inventor: MATSUZAKI EIICHI
IPC: G09G3/36
Filed: 1992-07-31
Abstract: A preservation performance of a display state of a display device having a ferroelectric liquid crystal (FLC) as a display device is effectively used, thereby realizing the optimum picture quality according to the temperature and the number of lines to be displayed and updated. The display device is driven by the interlace mode or non-interlace mode on the basis of the number of lines whose displays are updated, a program to be executed, or the temperature. By providing a table, the interlace mode is made different on the basis of various conditions.
Patent EP-0535537-A2 (EP)
Inventor: YAMAKI KAZUNORI
IPC: G06F12/0891
Filed: 1992-09-24
Abstract: In a computer system equipped with a cache memory (5), when a CPU (1) makes write access to a ROM area (3A, 3B) in main memory (3), a memory controller (4) performs a write protect procedure on the ROM area (3A, 3B). On the other hand, a flush logic circuit (40) delivers a cache flush signal (FS) as an output to a cache controller (6). The cache controller (6) is responsive to the cache flush signal (FS) to clear all valid bits of the cache memory (5) to zero.
Patent EP-0535703-A2 (EP)
Inventor: FUMA MASATO
IPC: G11B27/34
Filed: 1992-10-02
Abstract: A read only disc according to the present invention has a spiral recording track formed on the surface thereof. The recording track includes a plurality of record unit blocks formed continuously by an optical recording method, wherein each record unit block includes a dubbing permitted area and a dubbing inhibited area. Digital audio information having data compressed is recorded in the dubbing permitted area. On the other hand, display data associated with the digital audio information is recorded in the dubbing inhibited area. Thus, digital dubbing of digital audio information can be carried out and dubbing of display data is prevented to ensure dominance of the read only disc as a master software.