Patent GB-1398237-A (GB)
Title: Liquid crystal display means
IPC: H03K17/66
Filed: 1971-05-07
Abstract: 1398237 Electronic timepieces CAMBRIDGE CONSULTANTS Ltd 5 May 1972 [7 May 1971] 13692/71 Heading G3T [Also in Divisions G5 H2 H3 and H4 A liquid crystal display element for use in a clock receives at its two terminals periodic pulses which selectively are in phase or in anti-phase so that an A. C. voltage or no voltage is produced across the terminals. The element may be one of a seven segment display, having a common rear electrode fed with pulses in one phase and individual front electrodes fed with pulses selectively in phase or out of phase with the rear electrode pulses. In Fig.1, if the opposite diagonal switches operate in unison and alternately with the other opposite diagonals an A. C. voltage is applied to the liquid crystal element 10 whereas if horizontally adjacent pairs operate together and alternately with the other pair the voltage across the load is zero. One or both of the switches 2 and 4 may be replaced by current sources (12, 14), Figs.6 and 7 (not shown). The switching circuit connected to each terminal of the liquid crystal device can be an Exclusive OR circuit or the inverse thereof. The output is in phase or in antiphase with a clock signal at one input depending upon whether a 0 or 1 is applied to the other input, Figs. 8 and 9a (not shown). In Fig. 9b (not shown) one terminal of the crystal device is connected to the logic circuit output and the other to the clock source. In Fig. 10 (not shown) the logic is performed by a diode bridge connected to a transistor acting as a switch. In an alternative switching circuit, Fig. 11 (not shown), if A and B inputs are the same 70, 72 and 80 are non-conductive but 84 is rendered conductive by current through 82 and terminal C is positive. If A and B are different, current will flow through the emitter base path of one of 70, 72 and one of the diodes, rendering 80 conductive and turning 84 off. C will then be negative. In the application of the circuit to a clock it controls a six digit, seven segment liquid crystal display in which the front has formed thereon, on the side facing the liquid crystal layer, the outline of the segments Fig.13, (not shown). The clock Figs. 13A and B comprises a master oscillator 106-130 including two complementary MOS transistor pairs cross-coupled through a phase changer 112, 114 and a crystal 16, capacitor 114 being adjustable to trim the frequency. The 2<SP>14</SP> Hertz output is passed to a counter 132 which provides a 1 second output at 134 and a 64 Hertz output at 136, the latter providing one input to logic gates 140 supplying the display element TO 100. The 1 second pulse output from 132 is counted down by two scale-  of-ten counters 138, 146 and the output of 138 goes to a further counter 148 having feedback via bi-stable circuit to provide a divide-by-six circuit and thus to produce minute pulses. These pulses likewise pass to a scale-of-ten counter 156, 158 the output of 156 being passed to a divide-by-six counter 160 to provide hour pulses. These are passed to scale-of-ten counters 162 and 164 and to counters 166 and 168 which can be used to set to count to 12 or 24 by switch 170 and thus provides reset pulses via a monostable circuits 180 and 182, 182 having a longer unstable period than 180. Setting of the clock to the correct time is effected by switches such as 116 which apply the 1 second pulses to the minute and hour counters. (For Figures see next page)