baber/WOPTO huggingface dataset:
Patent JP-S57128000-A (JP)
Title: Error recovery system for logical device
Inventor: SORACHI YASUHIDE
IPC: G06F11/00
Filed: 1981-01-31
Abstract: PURPOSE:To enable recovery processing while keeping continuity of processing at failure in main storage device storing not rewritten part, by storing a program to different main storage devices by separating the program into a part which can not be rewritten at execution and other parts. CONSTITUTION:Storage devices 40, 50 which respectively store a program area which is not rewritten at program execution and another program area which is rewritten, are provided, and the error is reported to a CPU10 at an error report contral section 210 at error generation, and an execution control section 110 of the CPU10 discriminates if this storage device stores the program area not rewritten or the program area rewritten. If the error is an error of the storage device 40, the program part not rewritten is read out from an auxiliary storage device 30 under the control of a main storage write/read control section 220 through the instruction of the control section 110 and restored in the storage device, and the processing is restarted from the instruction at error generation, by using the program area which is restored and not rewritten.
Patent JP-S57126956-A (JP)
Title: Heat resistant and abrasion resistant tool material
Inventor: TOGASHI FUSAO
IPC: C21D6/02
Filed: 1981-01-30
Abstract: PURPOSE: To provide the titled tool material capable of withstanding use even under a severe condition prepared by a method wherein a scale layer is formed on the surface of steel containing specific components other than C, Cr, Ni by heating the same to a high temp. and, after fine carbide is precipitated by heating, a base austenite phase is subjected to martensite transformation during a cooling process.  
     CONSTITUTION: Steel containing, on the wt% basis, 12W1.9% C, 15W22% Cr, 0.6W3% Ni, 0.5W5% Mo or 0.7W4% W or 0.7W5% sum of them, 0.5W3% (Si+ Al) is prepared. To the surface of said steel, high temp. heating of 1,100°C or more is applied to form a scale layer with a thickness of 30μm or more and, after fine carbide is precipitated by holding the same at 800W1,000°C for 1hr or more, said steel is cooled by air and, during this time, a base austenite phase is subjected to martensite transformation to obtain the objective heat resistant and abrasion resistant tool material. In this tool material, high hardness is obtained at a room temp. and, at the same time, hardness lowering at a high temp. is suppressed and, when it is used, high heat resistance and abrasion resistance are displayed. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-S62172467-A (JP)
Title: Decentralized processing system for picture information
Inventor: YAMADA MAMORU
IPC: G06T1/00
Filed: 1986-01-24
Abstract: PURPOSE:To process picture information by plural users by integrating and managing plural picture information input/processors and providing central control unit for performing a storing/fetching processing to plural picture information storing devices. CONSTITUTION:An user transmits the name of a picture added to the processing picture information (picture A) to the central control unit 2 according to a flow (1) and searches out the picture information storing device 31 in which the picture A is stored according to a flow (2). The picture information is divided into an attribute required for the picture processing and the real information such as the size of the picture or the density in the picture information storing device 31 and stored in an attribute area 311 and an information area 312. The central control unit 2 transmits the attribute of the picture A to the picture information input/processors 11 according to a flow (3) and the processor 11 requests the real information of the picture A to the central control unit 2 according to a flow (4). In the picture information input/processor 11, the received information according to a flow (5) is stored in a picture information temporary storing area 111 in the processor. Thereby, the plural users can process the same picture information simultaneously.
Patent JP-S62171772-A (JP)
Title: Drier for paper making machine
Inventor: TOYOFUKU TOSHIHIRO
IPC: D21F5/16
Filed: 1986-01-24
Abstract: PURPOSE:To perform uniform and highly efficient drying by providing a grid electrode for heating base paper with hot air through a paper supporting belt at the stage prior to a hot air drying stage in the title dryer of a paper coater machine. CONSTITUTION:Coated paper 1' coated with a liq. 4 at a coating part 2 is pressed by a blade 6 to scrape off the excess liq. 4, and the amt. to be coated is controlled. The coated paper then enters a dielectric heater 19 supported by the paper supporting belt 17 such as a 'Teflon(R)' belt having low dielectric constant and dielectric loss coefficient. When a high-frequency AC voltage is impressed on the grid electrode 16, an electric field as shown by the arrow is generated and exerted on the coated paper 1'. Since the dielectric constant and dielectric loss coefficient of water are 20-30 times higher than those of the pigment and binder in the coated paper 1', water is mainly heated, and the temp. is increased from the inside. The coated paper is heated close to the evaporation temp., then sent a hot air dryer 13, and dried. Uniform heating due to internal heating is carried out along with efficient heating in this way.
Patent JP-H07219908-A (JP)
Title: Load distribution type multiprocessor
Inventor: SAKATA MASATAKE
IPC: G06F15/177
Filed: 1994-02-07
Abstract: PURPOSE:To suppress the reduction of processing capacity and to reduce the capacity of a memory to be individually mounted on a slave processor. CONSTITUTION:In a load distribution type multiprocessor provided with plural slave processors 111 to 11N for individually executing parallel processing and a main processor 12 for uniformly distributing a load to be processed to these processors 111 to 11N, the main processor 12 is provided with a storage means 13 for storing the states of processing correspondingly to individual time zones of the processing and a control means 14 for reading out a state corresponding to a succeeding time zone in the time sequential order from the means 13 when a time difference between the section time of the time zone and current time reaches a previously determined value and sending the read state to the slave processors 111 to 11N, and each of the processors 111 to 11N is provided with a storing means 15 for fetching the state sent from the means 14 and storing the entered state and a switching means 16 for switching a processing state to the state stored in the means 15.
Patent JP-H06230880-A (JP)
Title: Coordinate input pen with bar code reader
Inventor: OKAJIMA HIROHARU
IPC: G06F3/046
Filed: 1993-01-29
Abstract: PURPOSE:To provide a coordinate input pen with a bar code reader capable of easily performing pen input and bar code input with one device. CONSTITUTION:A resonance circuit 11 for detecting the coordinates of the main body 1 of a pen computer 15 provided on one end of the main body 2 of an input pen, a bar code reading part 12 for reading bar codes is arranged on the other end and an operator changes the vertical direction of the main body 2 of the input pen. Thus, the pen input and the bar code input can be easily performed with one device.
Patent JP-H10203030-A (JP)
Title: Thermal transfer sheet
Inventor: IMAIZUMI KOJI
IPC: B41M5/41
Filed: 1997-01-28
Abstract: PROBLEM TO BE SOLVED: To print a high quality image even on the rear surface of image receiving paper by providing a heat-melt transfer layer capable of printing in monochrome or color as well as a thermal sublimation transfer layer required in color print. SOLUTION: Thermal sublimation transfer layers of YS, MS, and CS are formed of thermal sublimation dye each color-developing yellow, magenta, and cyan. A heat-melt transfer layer KT is formed of a heat-melt pigment for coloring black. While a platen 6 is rotated to feed an image receiving paper P and thermal transfer sheet, a thermal head 12 is heated in accordance with image information. As such, a thermal sublimation transfer layer YS of the thermal transfer sheet is printed on the surface of the image receiving paper P. When printing of the same layer YS is completed, the same layer MS of the thermal transfer sheet is printed, and then the same layer CS is printed. When printing of the same layer CS is completed, the image receiving paper P is fed from a printing passage E to a reversing passage G.  When the image receiving paper P is reversed, the thermal head 12 is heated so as to print the heat-melt transfer layer KT on the rear surface of the image receiving paper P.
Patent JP-H09202547-A (JP)
Title: Group supervisory operation control method for elevator
Inventor: FUJINO ATSUYA
IPC: B66B1/20
Filed: 1996-01-30
Abstract: PROBLEM TO BE SOLVED: To perform transport of a high centralized demand between specified stories without sacrificing movement between general stories. SOLUTION: Provided the number of elevators of one group is N, a total traffic amount for a given time T is V, a traffic amount between some specified stories is Vs, and transport capacity per an elevator effecting service only between specified stories is C, when the number (k) of elevators satisfies both C (k-1)<Vs<=C.K, and (V-Vs)/(N-K)<V/N, an express elevator deciding means to decide the number (k) of elevators as specified elevators effecting a service for a demand between specified stories for exclusive use is provided. The number (k) of elevators decided on a group supervisory operation control is taken as express elevators and the remaining number (N-K) of elevators as general elevators. These elevators are operated according to their respective service sections.
Patent JP-H06232040-A (JP)
Title: Method for erasing resist film picture
Inventor: NAMIKAWA AKIRA
IPC: G03F7/42
Filed: 1993-01-29
Abstract: PURPOSE:To provide a method by which an unnecessary ion-implanted resist film picture on a semiconductor substrate can be erased during the course of manufacturing a semiconductor integrated circuit device. CONSTITUTION:When the method is used, a resist film picture on a substrate is removed by sticking an adhesive sheet, etc., to the upper surface of the picture and performing a heating process, to be concrete, by irradiating the picture with microwaves of 2.45 GHz in frequency so as to scatter the water contained in the sheet etc., and/or on the surface of the picture, and then, peeling the sheet, etc., from the semiconductor substrate together with the resist film picture.
Patent JP-S59141671-A (JP)
Inventor: MOTOSAWA MITSUNARI
IPC: E04H7/06
Filed: 1983-02-01
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H09213995-A (JP)
Title: Light emitting thyristor element, light emitting device and cell monitor
Inventor: INOUE TOMIO
IPC: H01L31/111
Filed: 1996-01-30
Abstract: PROBLEM TO BE SOLVED: To realize a high-practicability light emitting thyristor having a switching characteristic and visible light emission characteristic. SOLUTION: On a GaP compd. n-type semiconductor single crystal substrate 1 an n-type emitter layer NE 2, p-type base layer PB 3, n-type base layer NB 4 and p-type emitter layer PE 5 are formed to form a pnpn structure. The layer 3 is 3 microns thick or less, and its p-type carrier concn. is set to a range from 4×10<16> cm<-3> to 3×10<17> cm<-3> . The boundaries between the layers 2 and 3 and between the layers 3 and 4 have neither spike-like protrusion nor recess but are made flat to obtain a good switching characteristic. N atoms to be emission centers are doped near junctions J1 and J3 and n-type carrier concn. at the layers 2 and 4 near these p-n junctions is reduced to the order of 10<16> cm<-3> , thereby enhancing the brightness of the yellow green.
Patent JP-H05206313-A (JP)
Title: Semiconductor ic device and its manufacture
Inventor: SATO TOSHIHIKO
IPC: H01L23/12
Filed: 1992-01-29
Abstract: PURPOSE:To perform air-tight sealing by providing a first metalized layer on peripheral section of main surface of a package substrate and at individual bottom of a cap, and a second metalized layer in the region opposing to the back side of a semiconductor chip, and a third metalized layer in the internal wall surface of the cap. CONSTITUTION:Metalized layers at the bottom of a cap 6 are composed of a lower part 8a, internal wall surface 8b, and external wall surface 8c. A heat- transmitting metalized layer 9 is provided in the region opposing to the back side of a semiconductor chip in the lower part of the cap 6. The precise position of a soldering bump 4 which is formed on the main surface of a semiconductor chip 5 is determined on electrodes 14 of a package substrate 2. Then, the package substrate 2 is carried to a re-flow furnace. Except for solder used for heat transmission, pre-form solder goes through the metalized layer 8b, and rapidly flows in between a metalized layer 12 which is a sealing section for the metalized layer 8a and the package substrate 2. Then, solder goes around the sealing section with surface tension to become solder 7 for sealing, and sealing is almost completed.
Patent JP-S61173347-A (JP)
Title: Microcomputer
Inventor: SUNAGA YUKIO
IPC: G06F11/00
Filed: 1985-01-28
Abstract: PURPOSE:To make circuit constitution simple and to guarantee the processing of a MPU by an incorrect instruction code which is latent in a memory by storing temporarily an instruction from a program memory to the first and second instruction registers of a microprocessor, and deciding an instruction code by a deciding ROM. CONSTITUTION:An instruction code from a program memory 5 is read and written to an instruction register 2 of a microprocessor MPU1, and simultaneously, the same instruction is temporarily stored to an incorrect instruction detecting register 6. It is decided at a deciding ROM7 whether or not the instruction code stored at the register 6 is an unfair instruction code. A deciding signal 8 from the decided ROM7 is supplied to a control device 4', it is confirmed by the control device 4' that when the signal 8 is '1', the code is not an incorrect instruction code, and the processing is executed in accordance with a control signal from an instruction decoder 3. When the signal 8 is zero, the incorrect instruction code is confirmed, the control signal from the decoder 3 is disregarded and an interruption processing, etc., are executed.
Patent JP-H01189166-A (JP)
Title: Bipolar transistor and manufacture thereof
Inventor: OTA TOSHIMICHI
IPC: H01L29/73
Filed: 1988-01-25
Abstract: PURPOSE:To form a unitary body from simple dual collector electrodes, by extending the collector electrodes to the outside of a transistor. CONSTITUTION:A multilayered structure of a collector contact layer 12, a collector layer 13, a base layer 14, an emitter layer 15, an emitter contact layer 16 provided with an emitter electrode 19 and the like, which forms a transistor, is provided on a semi-insulating substrate 11. An insulating region 21 formed by ion implantation and a collector electrode 14, which is in ohmic-contact with the layer 13, are provided around the layer 13 and the like. The electrode 17 is extending to the region 21 at the outside of the transistor. The dual collector electrodes are not provided with wiring layers as upper layers but are formed as a unitary body by a simple connection. Lead-out wirings can be formed by simple mask alignment. Thus, the size in integration can be reduced.
Patent JP-H08204087-A (JP)
Title: Semiconductor device manufacturing method and semiconductor device
Inventor: TADA NOBUHIKO
IPC: C23F1/00
Filed: 1995-01-31
Abstract: PURPOSE: To form a bent part of outer lead at a high accuracy and avoid shrinking the outer lead by removing the dross of metal produced at cutting in a dam bar by a laser beam. CONSTITUTION: A semiconductor chip is mounted on a lead frame 1, the terminals of this chip are electrically connected to inner leads and the frame is sealed integratedly with a resin 2 such that the resin extrudes to a part of the frame 1 where a dam bar 4 exists, thereby covering it with a resin burr 2a, including this part. Then the dam bar is cut off by a laser beam, the dross 10 produced at this time is selectively removed by a chemical treatment. The burr 2a is removed by a jet of high pressure water, and then outer leads are formed by bending.
Patent JP-H10202292-A (JP)
Title: Method for cleaning polluted water and system for the same
Inventor: ITAYAMA TOMOAKI
IPC: C02F3/32
Filed: 1997-01-28
Abstract: PROBLEM TO BE SOLVED: To efficiently and easily decompose and remove harmful algae which form colonies and hardly predated and decomposed by decreasing the algae in polluted water by the predation decomposition effect of Moans guttula which is the alga predacious microaminals fixed to porous carriers. SOLUTION: The polluted water pumped up from a polluted water basin 1 is first put into a blue alga dispersion device 2 and simultaneously air is admitted therein to aerate the water. The polluted water is stirred at a high speed by stirring values in this blue alga dispersion device 2 to disperse the blue algae forming the colonies, which are then sent through a transfer pipe 15 into a blue alga decomposition tank 3. The porous carriers are fluidized by an air diffuser existing at the bottom of this decomposition tank 3, by which the disperse blue algae are predated and decomposed by the Monas fixed to the porous carriers. The upper part of the blue alga decomposition tank 3 is connected via a carrier outflow preventive screen to a settling tank 4, from which the treated water of the blue algae decomposition tank 3 is partly discharged.  The sludge which is the precipitate of the settling tank 4 is periodically removed from a sludge take-out port.
Patent JP-S58129620-A (JP)
Title: Data writing device
Inventor: DAIMATSU YOSHIAKI
IPC: G06F1/04
Filed: 1982-01-29
Abstract: PURPOSE:To obtain operation of which operation speed is stabilized even if an element is used by providing a titled device with a pulse generator delaying clocks from a clock generator and making only itself actuate when a specific address is decoded. CONSTITUTION:When a CPU 2 outputs an address to which latch circuits 10, 11 are accessed, a signal to delay a system clock and extend synchronous signal phi2 is applied from a decoder circuit 3 to the clock generator 1. When the system clock is delayed, an enable signal is sent from the pulse generator 12 to a decoder circuit 9. During the enable period, the decoder circuit 9 applies an ''H'' level clock signal to the latch circuit 10 or 11 as a latch signal. The latch circuit 10 or 11 latches data from the CPU 2 by the signal from the decoder circuit 9 and applies the data to an external peripheral circuit to control operation.
Patent JP-H10213699-A (JP)
Title: Ultraviolet irradiation device
Inventor: OOWADA TATSUSHI
IPC: B29C35/08
Filed: 1997-01-28
Abstract: PROBLEM TO BE SOLVED: To provide an ultraviolet irradiation device which hardly get degradation in light absorption member even though the temperature of the light absorption member elevates fairly high due to absorption of infrared from a flash discharge lamp, and is capable of obtaining long life of use because the damage of reflection member due to adhesion of the degraded material is prevented. SOLUTION: Constituted are a flash discharge lamp 20 emitting light containing ultraviolet, a light reflection member 30 reflecting the ultraviolet in the light emitted from the flash discharge lamp 20 toward an irradiated object W and transmitting infrared and ultraviolet, and a light absorption member 40 absorbing the light having penetrated the light reflection member 30. The light absorption member 40 is constituted of black heat resistive inorganic matter. The black heat resistive inorganic matter constituting the light absorption member 40 is desired to be graphite.
Patent JP-H01192477-A (JP)
Title: Method for electrifying welding wire
Inventor: OGUCHI TSUTOMU
IPC: B23K9/12
Filed: 1988-01-25
Abstract: PURPOSE:To extend the service life of a welding wire electrification part and to stabilize welding by providing plural rollers to the electrification part and pressing a wire and supplying a heating current to the wire. CONSTITUTION:In nonconsumable electrode welding, the roller type electrification part 9 is arranged to the root of a guide chip 1 and connected to a wire heating power source 8. A nonconsumable electrode 5 is arranged to base metal 6 to be welded and the wire 2 is supplied to the guide chip 1 from a wire reel 3 via the electrification part 9 to perform nonconsumable electrode welding. At this time, fixed rollers 11 and a movable roller 13 are arranged respectively to the electrification part 9 and the pressing force of the wire 2 is adjusted by a pressing force adjustment bolt 15. Since the electrification is executed while pressing the wire 2 via the rollers 11 and 13, wear of the electrification part 9 is reduced. Further, since deformation of the electrification part 9 is prevented, the service life of the electrification part is extended and welding is stabilized.
Patent JP-S53100259-A (JP)
Title: Coupling system of light emitting element and optical fiber
Inventor: ISHII YASUHIRO
IPC: H01B11/00
Filed: 1977-02-14
Abstract: PURPOSE:To improve the coupling efficiency of a light emitting element and an optical fiber by letting the light radiated from a light emitting element enter from the cylindrical peripheral wall face of an optical fiber by way of a light scattering medium mixed with the granules.
Patent JP-S5297637-A (JP)
Title: Josephson-junction memory unit
Inventor: INAMURA TAKAHIRO
IPC: G11C11/44
Filed: 1976-02-10
Abstract: PURPOSE:To perform actuation by light waves for word selection, control function and memory contents reading function respectively, and thus to reduce malfunction of memory cell due to conventional noise mixture by current flowin as well as crossatlk of current flowing route.
Patent JP-2000214919-A (JP)
Title: Distributed plant monitoring system and recording medium with system processing program recorded therein
Inventor: IZUMIKAWA YUTAKA
IPC: G06Q50/06
Filed: 1999-01-22
Abstract: PROBLEM TO BE SOLVED: To avoid the function loss of operator stations even when a server fails. SOLUTION: Plural controllers 2-1 to 2-n parallelly transmit plant data to a server 4 and operator stations 8-1 to 8-1 through a control LAN 3. The stations 8-1 to 8-1 are provided with a plant data transmission input-output controlling means 9 being the same as that of the server 4, can input and output process data from/to the controllers 2-1 to 2-n through the LAN 3, and various data obtained by executing various functions of the stations 8-1 to 8-1 are outputted to external equipment 6-1 to 6-m through a computer LAN 7 independently of various data outputted from the server 4.