Patent SG-172339-A1 (SG)
Title: Finishing method for manufacturing substrates in the field of electronics
Inventor: RIOU GREGORY
Filed: 2010-03-10
Abstract: (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (43) International Publication Date 23 September 2010 (23.09.2010) (51) International Patent ClassificationHOIL 21/302(2006.01) 11011 21/762(2006.01)International Application Number: PETTP2010/053050International Filing Date: 10 March 2010 (10.03.2010)Filing Language: EnglishPublication Language: English(30) Priority Data:0951690 17 March 2009 (117.03.2009) FRApplicant (far all designated States except (AS): S.O.I.TEC SILICON ON INSULATOR TECHNOLO GIES [FR/FR]; Parc Technologique des Fontaines Chemin des Franques, F-38190 Hernia (FR).Inventor; and(75) Inventor/Applicant (for US only): RIOU, Gregory [FR/ FR]; 83, rue du g mai 1945, F-38920 Crones (FR).(74) Agent: COLLIN, Jerome; Cabinet REGIMBEAU, 20, rue de Chazelles, F-75847 Paris Cedex 17 (FR).(81) Designated States (unless otherwise indicated, Jar every kind of national protection available): AE, AG, AL, AM, AC), AT, AU, AZ, BA, BB, HG, B14, BR, BW, BY, HZ, CA, CH, CL, CN, CO, CR, CU, CZ., DE, DK, DM, DO, DL, EC, LE, EG, ES, Fl, GB, OD, GE, Gil, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NO, NI, NO, NZ, OM, PE„ PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SO, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TL, UA, UCT, US, UZ, VC, VN, ZA, ZM, LW.(84) Designated States (unless otherwise indicated, .fbr even' kind of regional protection available): ARIPO (BW, GU, GM, KE, LS, MW, ML, NA, SD, SL, SZ, TZ, UEi, ZM, LW), Eurasian (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM), European (AT, BE, 136, CH, CY, CZ, DE, DK, EE, ES, FL FR, CiB, GR, Ilk, 11U, 1E, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR), OAPI (BF, Hi, CF, CG, CI, CM, GA, ON, GQ, (1W, ML, MR, NE, SN, TD, TO).Declarations under Rule 4.17:— of inventorship (Rule 4.170))Published:with international search report (Art. 21(3)) (54) Title: FINISHING METHOD FOR MANUFACTURING SUBSTRATES IN THE FIELD OF ELECTRONICSFIG. 1 as 31kinkn • (57) Abstract: The invention relates to a method thr finishing the surface of semiconducting substrate (1), said substrate compris ing a set of layers comprising a useful semiconducting layer (4) on at least one of the faces of said substrate (1), said useful layer (4) comprising a rough free surface (7), said method being suitable for smoothing out the free surface (7), said method being char acterized in that it comprises the successive steps of : - creating a protective layer (20) covering the surface (7) of the useful layerct (4) with a thickness 110 3 times larger than the peak-to-valley distance of said surface (7) of the useful layer (4), - at least one poi ishing-oxidation sequence, said sequence comprising the successive steps of : polishing the surface (21) of the protective layer(20), said polishing being adjusted so as not to attack the useful layer (4), and performing a thermal oxidation with supply of oxy gen gas of the substrate (1), in order to transform a portion of the useful layer (4) into an oxide layer (16), in order to reduce theroughness of the surface (17) of the useful layer (4).