baber/WOPTO huggingface dataset:
Patent TW-200813021-A (TW)
Title: Tyrosine kinase inhibitors
Inventor: DINSMORE CHRISTOPHER J
IPC: C07D401/14
Filed: 2007-07-02
Abstract: The present invention relates to 5H benzo[4,5]cyclohepta[1,2-b]pyridine derivatives, that are useful for treating cellular proliferative diseases, for treating disorders associated with MET activity, and for inhibiting the receptor tyrosine kinase MET. The invention also related to compositions which comprise these compounds, and methods of using them to treat cancer in mammals.
Patent TW-200820265-A (TW)
Title: Memory erase management system
Inventor: BILL COLIN
IPC: G11C7/20
Filed: 2007-08-13
Abstract: A memory erase management system (500) is provided, including providing a resistive change memory cell (102), coupling a first line (118) to the resistive change memory cell (102), coupling a line buffer (140) to the first line (118), providing a charge storage device (144) coupled to the line buffer (140), and performing a single pulse erase of the resistive change memory cell (102) by discharging a current (204) from the charge storage device (144) through the resistive change memory cell (102).
Patent TW-200910553-A (TW)
Title: Soldering process for electrical component and apparatus thereof
Inventor: TSOU WEN-CHIEH
IPC: H01L33/62
Filed: 2007-08-22
Abstract: A soldering process for electrical component and apparatus thereof is disclosed, and the apparatus includes a first frame, a second frame and a chip. The first frame has a soldering area, a wire-bonding area and a division area. The second frame has a soldering area, a wire bonding area, a die-bonding area and a division area. The chip is mounted on the die-bonding area, and connected between the wire-bonding areas of the first frame and the second frame.
Patent TW-200911079-A (TW)
Title: Cellular phone with shiftless motion function
Inventor: PAN CHIA-HO
IPC: H04M1/02
Filed: 2007-08-24
Abstract: Provided is a cellular phone with an shiftless motion function, comprising a cellular phone body, an upper cover which is movably installed on the cellular phone body, and a movement device including a first end part which is installed on the upper cover and a second end part which is installed on the cellular phone body. The present invention enables the upper cover to move relative to the cellular phone body at constant speed for increasing the value of the cellular phone.
Patent TW-200824154-A (TW)
Title: Semiconductor light emitting device
Inventor: OSHIO HIROAKI
IPC: H01L33/00
Filed: 2007-08-30
Abstract: A semiconductor light emitting device includes: a body having a recess, a step being provided on a side wall of the recess; a semiconductor light emitting element mounted in the recess; and a resin layer. The resin layer covers at least a portion of an inner surface of the recess of the body. The resin layer has a higher reflectivity than the inner surface of the recess of the body.
Patent TW-200822237-A (TW)
Title: Device and method of manufacture for a low noise junction field effect transistor
Inventor: SCHMIDT DOMINIK
IPC: H01L21/336
Filed: 2007-09-13
Abstract: A microelectronic product and the method for manufacturing the product are provided. A source and drain are spaced from one another in a first direction and are connected to opposing ends of a channel to provide a set voltage. First and second gates are spaced from one another in a second direction surrounding a portion of the channel to allow for application and removal of a gate voltage. Application of the gate voltage repels majority carriers in the channel to reduce the current that conducts between the source and drain.
Patent TW-200828481-A (TW)
Title: Method of identifying and/or programming an integrated circuit
Inventor: HARRIS EDWARD B
IPC: H01L21/66
Filed: 2007-09-27
Abstract: A chip and a method of fabricating the chip for low cost chip identification circuitry. In one embodiment, a method of manufacturing an integrated circuit includes formation of a multi-level metallization structure including a pad level comprising programming pads. A plurality of active devices are formed on a substrate, and multiple levels of metallization are formed over the active devices, connecting some of the active devices to form programmable circuitry. The programmable circuitry is connected to pairs of programming pads on the bond pad level. Programming pads in some of the pairs are selectively connected to one another by using conductive ink deposited with maskless ink-jet printing techniques. The pads are then covered with a non-conductive protective layer.
Patent TW-200919541-A (TW)
Title: Grayscale stripe-controlled pressure-sensed magnetic-force plate for finely molding
Inventor: WENG YUNG-JIN
IPC: H01L21/027
Filed: 2007-10-24
Abstract: A grayscale stripe-controlled pressure-sensed magnetic-force plate for finely molding is provided and includes a structure layer, and M magnetomotive potential production units. K closed line patterns discrete are defined on a reference plane of the structure layer. The M magnetomotive potential production units is mounted in the structure layer, is filled in the K closed line patterns by M closed line sub-patterns corresponding to the M magnetomotive potential production units, and produces M magnetomotive potentials according to positions of the M closed line sub-patterns.
Patent TW-200837348-A (TW)
Title: Method of making an auto-calibrating test sensor
Inventor: CREAVEN JOHN P
IPC: G01N33/49
Filed: 2007-11-06
Abstract: A test sensor is made that is adapted to assist in determining the concentration of an analyte in a fluid sample. The method includes providing a lid and providing a base. The lid is attached to the base to form an attached lid-base structure. The lid-base structure has a first end adapted to receive the fluid sample and a second opposing end adapted to be placed into a meter. Auto-calibration information is assigned to the lid-base structure. The second opposing end is formed such that the shape of the second opposing end corresponds to the auto-calibration information.
Patent TW-200920537-A (TW)
Title: Dual electrode gaseous metal arc welding method and its system
Inventor: HOU GUANG-HUA
IPC: B23K9/16
Filed: 2007-11-13
Abstract: The invention relates to a dual electrode gaseous metal arc welding method and its system. An upper and a lower GMAW welding burner respectively connect to a single power supply. Different line feeding speed and welding lines having different diameters are provided in different line feeding device. In addition, the two welding burners perform welding to a working object at the same time to obtain a welding channel having a sufficient depth and a lower welding channel ensuring being melt therethrough to form a base. Self-propelled mechanism on the upper and the lower electrodes are used to perform a bi-directional synchronized welding. In addition, the energy of the welding channel and the welding quality can be controlled by adjusting line parameters, line feeding speed and distance between the two welding burners. Through monitoring the voltage, it is found that utilizing a conjugated pulsed shaped voltage, the upper and the lower welding channels can be stabily formed without additional power supply. The invention successfully addresses the flaw of insufficient melting depth while ensures the welding quality with completely melting through.
Patent TW-200844521-A (TW)
Title: Split socket optical interconnect
Inventor: LU DAO-QIANG
IPC: G02B6/12
Filed: 2007-11-27
Abstract: A split microprocessor socket is disclosed that provides a cavity created at an outer edge of the microprocessor socket. An optical module may be fitted in the cavity thus providing an optical fiber or waveguide connection directly to the socket. This low cost optical interconnect, closely packaged with the microprocessor, may alleviate bandwidth constraints associated with conventional electrical connections.
Patent TW-200910579-A (TW)
Title: Memory and manufacturing method thereof
Inventor: LAI ERH-KUN
IPC: H01L21/8247
Filed: 2007-12-04
Abstract: A memory and a manufacturing method thereof are provided. The memory includes a dielectric layer, a conductive layer, a first buried diffusion, a second buried diffusion, and a charge storage structure. The conductive layer is disposed on the dielectric layer and electrically connected to at least a voltage. The first diffusion and the second diffusion are separately disposed in the surface of the conductive layer. The charge storage structure is disposed on the conductive layer and is positioned between the first buried diffusion and the second buried diffusion.
Patent TW-200918832-A (TW)
Title: Moisture control air system for pneumatically driven device
Inventor: SUZUKI TOSHIHIRO
IPC: F24F3/14
Filed: 2007-12-11
Abstract: A system that supplies air with a low dew point to a pneumatically driven device to minimize a decrease in the life of the device and minimizes production of mist etc. in the supply air. The air system supplies air from a compressed air source (1) to the pneumatically driven device (3) through air pressure lines (2). Moisture control tubes (10a, 10b) are used for all or a part of the air pressure lines (2). The moisture control tubes are formed of a polymeric material having selective moisture permeability in both inward and outward directions relative to the tubes depending on water vapor partial pressures inside and outside the tubes. Air supplied to the pneumatically driven device through the moisture control tubes is dehumidified or humidified by the tubes.
Patent TW-200837057-A (TW)
Title: Processes for the preparation of 3-(4-(2, 4-difluorobenzyloxy)-3-bromo-6-methyl-2-oxopyridin-1(2H)-yl)-N, 4-dimethylbenzamide
Inventor: DUKESHEREER DANIEL
IPC: C07D213/06
Filed: 2007-12-12
Abstract: This invention is directed generally to processes for the preparation of compounds of Formula I: wherein R2, R3, R4, R5, X1, X2, X3, X4, X5, X6 are as defined in the specification.
Patent TW-200831926-A (TW)
Title: Method for building map data for probe station, and method for testing semiconductor chip using the same
Inventor: KIM DONG-IL
IPC: H01L21/66
Filed: 2007-12-21
Abstract: Disclosed herein are a method of building map data for a probe station and a method of testing semiconductor chips using the same. In the method of building map data for a probe station for a wafer on which size of semiconductor chips and interval between semiconductor chips are differently formed, formed on the wafer, is divided into N groups each having a uniform size and interval, the N groups are set to N virtual chips, basic map data is built based on the N virtual chips, a chip matrix is built for a plurality of semiconductor chips included in each virtual chip, and the map data is competed by adding N chip matrices for the N virtual chips to the basic map data.
Patent TW-200901010-A (TW)
Title: Computer mouse
Inventor: KIM CHEOL-HO
IPC: G06F3/033
Filed: 2008-01-14
Abstract: Provided is a computer mouse including a grip portion having a flat bottom and a longitudinal central grip axis; a grip central point located at the center of the longitudinal central grip axis; the grip portion capable of standing on a flat surface via its flat bottom in order to allow the grip portion to move on the flat surface; a vertical axis perpendicular to the flat bottom and including the grip central point; a sensor portion which includes a sensor having a sensor central point located at the center of the sensor; the sensor being located distant in a forward direction from the grip portion; a vertical plane containing the vertical axis and the sensor central point; wherein the longitudinal central axis is angled from the vertical axis and tilted to the left or right with reference to the vertical plane; a bottom grip point defined by the intersection between the vertical axis and the flat bottom; and wherein the bottom grip point is located substantially at the center of the flat bottom.
Patent TW-200933095-A (TW)
Title: Kitchen range system capable of indicating quantity of fuel gas
Inventor: Zong gao-xiong
IPC: F24C3/08
Filed: 2008-01-18
Abstract: This invention relates to a kitchen range system capable of indicating quantity of fuel gas. The kitchen range system capable of indicating quantity of fuel gas is provided with a pressure reducer between an inlet pipe of the kitchen range and a fuel gas pipe. The housing of the kitchen range is provided with an indicator for indication quantity of fuel gas. The indicator is connected with the fuel gas pipe through a bypass pipe. In this way, fuel gas can be fed to the kitchen range for combustion through the fuel gas pipe, the pressure reducer and the inlet pipe, and with aid of the bypass pipe, quantity of fuel gas is shown on the indicator. The user can easily observe quantity of fuel gas in anytime by use of the indicator and prevent unexpected burning out of fuel gas.
Patent TW-200837950-A (TW)
Title: Semiconductor device with a vertical MOSFET including a superlattice and related methods
Inventor: RAO KALIPATNAM VIVEK
IPC: H01L29/15
Filed: 2008-01-24
Abstract: A semiconductor device may include at least one vertical Metal Oxide Semiconductor Field Effect Transistor (MOSFSFT) on a substrate. The vertical MOSFET may include at least one superlattice including a plurality of laterally stacked groups of layers transverse to the substrate. The vertical MOSFET(s) may further include a gate laterally adjacent the superlattice, and regions vertically above and below the superlattice and cooperating with the gate for causing transport of charge carriers through the superlattice in the vertical direction. Each group of layers of the superlattice may include stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. At least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer.
Patent TW-200840175-A (TW)
Title: Power supply controller and method therefor
Inventor: LHERMITE FRANCOIS
IPC: H02J7/00
Filed: 2008-02-05
Abstract: In one embodiment, a switching controller uses an auxiliary winding voltage of a transformer to form a signal representative of current flow through a secondary winding of the transformer. The controller id configured to limit a current through a secondary winding to a maximum value.
Patent TW-200901367-A (TW)
Title: Stressed SOI FET having tensile and compressive device regions
Inventor: CHIDAMBARRAO DURESETI
IPC: H01L21/70
Filed: 2008-02-12
Abstract: A method is provided for fabricating a field effect transistor ("TET") having a channel region in a semiconductor-on-insulator ("SOF") layer of an SOI substrate. Desirably, in such method, a sacrificial stressed layer is formed to overlie a first portion of an active semiconductor region but not overlie second portion of the active semiconductor region which shares a common boundary with the first portion. After forming trenches in the SOI layer, the SOI substrate is heated with the stressed layer thereon sufficiently to cause the stressed layer to relax, thereby causing the stressed layer to apply a first stress to the first portion and to apply a second stress to the second portion. For example, when the first stress is tensile, the second stress is compressive, or the first stress can be compressive when the second stress is tensile. Desirably, the stressed layer is then removed to expose the first and second portions of the active semiconductor region. Desirably, the field effect transistor ("FET") is formed to include (i) a source region in the first portion, (ii) a drain region in the first portion, and (iii) a channel region in the second portion.
Patent TW-200902263-A (TW)
Title: Razor having a wing shaped contouring shaving aid
Inventor: NICOLL ROY
IPC: B26B21/06
Filed: 2008-02-29
Abstract: Shaving razors and cartridges intended for mounting on such shaving razors wherein the cartridges include one or mounted solid shaving aid portions that are wing shaped and that exhibit an improved conformation to a shaving consumer's skin surface.
Patent TW-201033564-A (TW)
Title: Composite vacuum heat-conductive tube heat dissipation device and manufacturing method thereof
Inventor: Guo zhao-cheng
IPC: F28D15/02
Filed: 2008-03-06
Abstract: The present invention provides a composite vacuum heat-conductive tube heat dissipation device and manufacturing method thereof. The invented method comprises preparing a number of fins, each fin includes a plurality of protrusion posts. The fins can be mutually stacked together so that the corresponding protrusion posts mutually fit with each other to form a conduit; installing an upper cover plate on top of the mutually stacked fins; installing a base seat on the bottom of mutually stacked fins; connecting the base seat to a vacuum device so that the vacuum device is used to form vacuum on the interior of conduit formed by the fins.
Patent TW-200940276-A (TW)
Title: Drill for removing general screws or broken screws
Inventor: CHEN BO-SHEN
IPC: B25B27/18
Filed: 2008-03-27
Abstract: The present invention relates to a drill for removing general screws or broken screws. A front end of the drill is provided with at least two blades located at the central position, a chip-hold groove is defined behind the two blades, and a reverse thread is defined behind the chip-hold groove. By such arrangements, the two blades are drilled into the central portion of the broken screws, a cooperative thread is screwed out by the reverse thread, and the chip deposited in the chip-hold groove provides an axial pushing force and resistance to enable the reverse thread to tighten the cooperative thread so as to screw out the broken screw. Thus, the broken screws can be screwed out effectively.
Patent TW-200908210-A (TW)
Title: Air gap with selective pinchoff using an anti-nucleation layer
Inventor: CLEVENGER LAWRENCE A
IPC: H01L21/768
Filed: 2008-04-10
Abstract: A method of forming cavities within a semiconductor device is disclosed. The method comprises depositing an anti-nucleating layer on the interior surface of cavities within an ILD layer of the semiconductor device. This anti-nucleating layer prevents subsequently deposited dielectric layers from forming within the cavities. By preventing the formation of these layers, the capacitance is reduced, thereby resulting in improved semiconductor performance.
Patent TW-200945034-A (TW)
Title: Method and structure of memory usage for logic analyzer
Inventor: Liu ming-wei
IPC: G06F12/02
Filed: 2008-04-25
Abstract: A method and structure of memory usage for logic analyzer generates plural blocks of segment data for the logic data transmitted from outside through a data input terminal, then sequentially writes the data blocks into a buffer until the buffer is full to generate logic data sequences having length equal to the memory, and sequentially writes them into the writing block. Therefore all available space can be used when accessing the data and data transmission can be effectively controlled.
Patent TW-200945223-A (TW)
Title: Electronic bill process automation
Inventor: WENG JEFF
IPC: G06Q10/00
Filed: 2008-04-29
Abstract: Disclosed are apparatus and methods for processing an electronic statement. In one embodiment, an electronic mail message addressed to an electronic mail address is received, the electronic mail message including bill information associated with a bill, where the bill information indicates a bill amount, a due date of the bill, a sender of the bill, and an addressee of the bill. A set of user preferences is obtained, and the bill information is processed according to the set of user preferences.
Patent TW-200909051-A (TW)
Title: A catalyst, its preparation and use
Inventor: KOWALESKI RUTH MARY
IPC: B01J23/889
Filed: 2008-05-02
Abstract: A dehydrogenation catalyst is described that comprises an iron oxide, an alkali metal or compound thereof, and rhenium or a compound thereof. A process for preparing a dehydrogenation catalyst comprising preparing a mixture of iron oxide, an alkali metal or compound thereof, and rhenium or a compound thereof is also described. Additionally, a dehydrogenation process using the catalyst and a process for preparing polymers are described.
Patent TW-200849357-A (TW)
Title: Method for single-sided polishing of bare semiconductor wafer
Inventor: ROETTGER KLAUS
IPC: H01L21/302
Filed: 2008-05-14
Abstract: The invention relates to a method for the single-sided polishing of a bare semiconductor wafer by using a polishing head with a membrane made of a resilient material, by which the polishing pressure is transmitted onto the backside of the semiconductor wafer to be polished, wherein the semiconductor wafer is pressed against a polishing cloth with a smooth surface while supplying a polishing agent and is prevented from sliding off the membrane by a retainer ring. The retainer ring is provided with channels on a side surface facing the polishing cloth.
Patent TW-200909627-A (TW)
Title: Actuating lever of a top roller carrying and weighting arm
Inventor: SCHLEGEL JUERGEN
IPC: D01H5/56
Filed: 2008-06-06
Abstract: The present invention relatives to an actuating lever (1) of a top roller carrying and weighting arm of a drafting arrangement for a textile machine, which has a lever arm (2), which is pivotably mounted on the drafting arrangement, and a handle (3) made of a plastics material, wherein the lever arm (2) is provided with a plastics material sheathing (5), which completely surrounds it.
Patent TW-200917588-A (TW)
Title: Seals and methods for sealing coaxial cable connectors and terminals
Inventor: BURRIS DONALD ANDREW
IPC: H01R13/52
Filed: 2008-06-12
Abstract: Methods of connecting a coaxial connector and a terminal include providing a coaxial connector with a coupler, he coupler having a seal member in contacting relationship with the coupler such that the seal member is coaxial with the coupler about a longitudinal axis, affixing the coupler to the terminal and after the coupler is affixed to the terminal, sliding the seal member longitudinally toward, and into contact with, the terminal. When in a tightening position, the seal member covers an engagement surface of the coupler, and wherein when in a deployed position, the seal member contacts at least a portion of the terminal.
Patent TW-200951702-A (TW)
Title: Control circuit for power supply
Inventor: ZOU HUA
IPC: G06F1/32
Filed: 2008-06-13
Abstract: A control circuit for a power supply includes a first switch, a second switch, a third switch, and an output terminal. The first switch is connected to a super input/output (SIO) chip to receive a control signal. The third switch is connected to the first switch via the second switch, and is connected to a power supply and the output terminal. When the control signal is at a high level, the first switch is turned on, the second switch and the third switch are turned off, and the output terminal does not output the power supply. When the control signal is at a low level, the first switch is turned off, the second switch and the third switch are turned on, and the output terminal outputs the power supply.