baber/WOPTO huggingface dataset:
Patent JP-S61175434-A (JP)
Title: Portable presetting device
Inventor: GOTO YUICHI
IPC: F24F11/02
Filed: 1985-01-31
Abstract: PURPOSE:To contrive to simplify the composition of an air conditioning local controller and contrive the cost down of whole air conditioning cntroller by providing the first data transmitting/receiving control part for an air conditioning central controller, the second data transmitting/receiving control part and a connector for a transmission line. CONSTITUTION:In case of the selecting of a local presetting mode, by opening a contact 20 due to the operation of a transmission line cut-off relay 19, the second data transmitting/receiving control part 14 and an air conditioning local controller 11, also the first data transmitting/receiving control part 15 and an air conditioning central controller are respectively connected by a data transmission line. Therefore, the operations of data presetting, the requirements of measuring codition data and the like can be performed by inputting the commands from a keyboard 18. The data from the air conditioning local controller are stored in a RAM24. Meantime, the data stored in the RAM24 can be transmitted for the requirement from the air conditioning central controller 10, thereby, the local controller 11 does not require any preset indicating part of a portable presetting device other than a receiving side connector 23.
Patent JP-S60162480-A (JP)
Title: Power rectifier
Inventor: KOBAYASHI TADAO
IPC: H02M1/14
Filed: 1984-02-02
Abstract: PURPOSE:To control a DC output voltage constantly by operating a stepup or stepdown chopper circuit in response to wheter the rectified output voltage is lower or higher than a smoothing circuit side DC voltage. CONSTITUTION:A stepup chopper 5 is operated during a period that the rectified voltage ed of a rectifier 2 is lower than a DC output voltage ed, and the induced current of a reactor L1 is inputted as a charging current to a smoothing circuit side through a diode D1 during a period that a transistor TU is OFF. On the other hand, a stepdown chopper 6 is operated during a period that the voltage ed is higher than the voltage Ed, it is outputted as a charging current to the smoothing circuit side through a reactor L2 and a diode D2 during a period that a transistor TD is ON, and a suppressing current by the reactor L2 is outputted as a charging current to the smoothing circuit side during the OFF period.
Patent JP-S58136151-A (JP)
Title: Error correction system
Inventor: HASEGAWA KENJI
IPC: G06F11/10
Filed: 1982-02-06
Abstract: PURPOSE:To eliminate a parity error due to a fixed obstacle of a transfer path, by transferring inverted data at retrial. CONSTITUTION:Data inverting circuits 4, 5 invert all input data and output them when a retrial request (c) is set. If a fixed obstacle of 1-bit, binary 0 clamped to a data of the transfer path takes place, since the obstacle is 0 at a parity check circuit 2, a parity error is displayed. In this case, the parity check circuit 2 sets the request (c) and a retrial control circuit 3 inputs the retrial data to the circuit 4. This data is propagated in a transfer path 10, inverted again at the circuit 5 and inputted to the circuit 2. That is, when the input of the circuit 2 is binary 1, even if the fixed obstacle clamped to binary 0 in the transfer path 10 takes place, the data is inputted to the circuit 5 without being subject to the clamped fixed obstacle, and the data is inverted at the circuit 5, binary 1 is inputted to the circuit 2, allowing to eliminate a parity check error.
Patent JP-S58136975-A (JP)
Inventor: MAEDA YOSHIYUKI
IPC: F22B1/18
Filed: 1982-02-05
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07224959-A (JP)
Title: Solenoid valve terminal connection structure
Inventor: SHIBATANI JUICHI
IPC: F16K31/06
Filed: 1994-02-15
Abstract: PURPOSE:To obtain a solenoid valve terminal connecting structure without causing worsening of assemblability, securely maintaining electrical connection condition of an electric power feeding terminal and a solenoid terminal and improving its reliability. CONSTITUTION:A cover 22 covering solenoid parts 12A, 14A of an solenoid valve 10 is provided with a transparent window 28 opposing to solenoid terminals 18, 20 and the connection part 26 of a terminal 24 formed by inserting it into the cover 22 is weld joined upon fitting it into solenoid terminals 18, 20 and irradiating laser beam on it through the transparent window 28. Therefore electrical connection condition of the connection part 26 and solenoid terminals 18, 20 is not interfered with vibration or intervention of foreign matter and the reliability is improved.
Patent JP-S57135681-A (JP)
Title: Controlling method for pulse width modulation type inverter
Inventor: SHIODA TAKESHI
IPC: H02P27/08
Filed: 1981-02-12
Abstract: PURPOSE:To reduce the torque pulsation of the prescribed frequency by increasing the pulse width at the prescribed angle position of a voltage waveform of line of a motor. CONSTITUTION:A signal generator 10 generates a 60 deg. interval signal via the outputs A-C of a 3-phase signal generator, and applies it to a signal generator 10'. thus, the signal generator 10' form a detecting circuit for obtaining triangular wave synchronizing signal over the positions of 0 deg., + or -60 deg., + or -120 deg. via delay circuits 11, 11' and an AND circuit 12. The pulse widths of the voltage waveforms of the line applied to a motor at 0 deg., + or -60 deg., + or -120 deg., + or -180 deg. are suitably increased to correct the ratio of seventh and fifth harmonic waves to 7:5. In this manner , the torque pulsation of the frequency 6f1 of the motor represented by the prescribed equation can be effectively reduced.
Patent JP-S52101903-A (JP)
Title: Forecasting tone sending method
Inventor: TAKANO KEIICHI
IPC: H04M3/20
Filed: 1976-02-21
Abstract: PURPOSE:To interrupt a forecasting tone in and connect it to a conversation and to enable sending the forecasting tone for a certain duration by using a common timing circuit in a manual switching connection system.
Patent JP-S60164977-A (JP)
Title: Multihead player
Inventor: TSUNODA SHINJI
IPC: G11B25/04
Filed: 1984-02-06
Abstract: PURPOSE:To obtain a multi-head player capable of reproducing plural information simultaneously by providing plural heads so as to reproduce information from a disk storing the information. CONSTITUTION:Four heads 2a-2d are spaced each 90 deg. apart from each other around the periphery of a disk 1. Signals reproduced by respective heads 2a-2d are amplified and demodulated respectively by separate reproducing circuits. Each of heads 2a-2d is designed so as to change its scan position by respective different mechanisms. Therefore, by scanning each of heads 2a-2d at different positions in the radius direction on the disk 1, four different information can be simultaneously reproduced from the disk 1.
Patent JP-H10214581-A (JP)
Title: Anode substrate for field emission type display and manufacture thereof
Inventor: KAI TERUHIKO
IPC: G09F9/00
Filed: 1997-01-31
Abstract: PROBLEM TO BE SOLVED: To provide an FED anode substrate of capable of preventing any charge on a phosphor and any falling-off of the phosphor in a display for scanning an anode electrode. SOLUTION: In an anode substrate A comprising a plurality of anode electrodes 2 formed on a glass substrate 1 and red, green and blue phosphor layers 5 applied in sequence on the plurality of anode electrodes 2, the phosphor layer 5 on each of the anode electrodes 2 is covered with a metallic conductive film 10 in a solid pattern, a grid pattern or a mesh pattern or in a pattern in combination thereof.
Patent JP-H05215818-A (JP)
Title: Semiconductor testing device and testing method thereof
Inventor: NAKAJO TOKUO
IPC: G01R31/26
Filed: 1992-02-04
Abstract: PURPOSE:To enable a multiple reflection preventive circuit to be applied to an I/O pin of an element to be tested, and improve accuracy on a response waveform measuring time by connecting a switch circuit to the multiple reflection preventive circuit in a semiconductor testing device. CONSTITUTION:When a driver is outputting, an I/O changeover switch 7 is turned on, and a switch circuit 8 of a multiple reflection preventive circuit 9 is turned off. An output is given to an element 11 to be tested in the shape of a test waveform 6a by means of a transmission line 10 through a driver 6. In order to receive an output signal 11a from the element 11 to be tested as a response to this test waveform 6a, the I/O changeover switch 7 is turned off, and the switch circuit 8 of the multiple reflection preventive circuit 9 is turned on.
Patent JP-S61177482-A (JP)
Inventor: ISHIKAWA HIROTOMO
IPC: G09F11/02
Filed: 1985-02-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H04261378-A (JP)
Title: Control circuit for ultrasonic motor
Inventor: YOSHIOKA SHIGEKI
IPC: H02N2/00
Filed: 1991-02-12
Abstract: PURPOSE:To stop a driven substance at a specified position independently of the travel speed, in the case of moving the substance a specified range by an ultrasonic motor being a driving source. CONSTITUTION:As the relation between the travel of a driven substance and voltage value obtained by accumulating a voltage signal produced by a piezoelectric element during that travel is constant, an integrator 5 is provided to receive the voltage signal generated by the piezoelectric element as input and to output a motor stop signal when the integrated value of its voltage reaches specified value.
Patent JP-H11213306-A (JP)
Title: Magnetic disk device and thermal asperity cancelling method applied to this device
Inventor: KAWANA NAOAKI
IPC: G11B5/02
Filed: 1998-01-30
Abstract: PROBLEM TO BE SOLVED: To remove a noise component included in a reproduced signal by a head regardless of a variance in characteristics of an MR element pair of the DSMR(dual stripe magneto-resistive) head in the case of the occurrence of a TA(thermal asperity) or the like. SOLUTION: A signal reproduced by MR(magneto-resistive) elements MRI and MR2 of a DSMR head 1-i (i=0,1) is amplified by a differential amplifier 22 in a head channel 2 and is outputted to a read channel 3. If the signal outputted to the read channel 3 cannot be correctly decoded and the occurrence of TA is detected by a TA detection circuit 4, a CPU 6 controls a bias current generation circuit 24 through an Ib switching register 25 to adjust the value of a bias current to be supplied to MR elements MR1 and MR2 of the DSMR head 1-i and repeats this adjustment operation within a certain bias current during (the second TA retry) the read retry processing till correct read is performed.
Patent JP-S61177781-A (JP)
Title: Field effect transistor
Inventor: TAKAKUWA HIDEMI
IPC: H01L29/423
Filed: 1985-02-02
Abstract: PURPOSE:To enable the reduction in effective gate length without increasing the gate capacitance and the reduction in gate resistance, by a method wherein a gate electrode is provided in contact with part of a semiconductor layer exposed in an aperture of the insulation film provided over this layer and with the inner wall of this aperture. CONSTITUTION:An aperture 12a is formed by anisotropically etching an Si3N4 film 12 in the direction vertical to the substrate surface. Next, the diameter of the aperture 12a is increased by side-etching this film 12 in a required am ount. An N-AlxGa1-xAs layer 7 is etched through the aperture 12a into a groove 7a having a forward-tapered inner wall. Then, a Schottky gate electrode 3 is formed by oblique evaporation of e.g. Al from a direction of required angle. Using a photo resist mask of required shape, the film 12 is etched into a required shape. Thereafter, a source region 10 and a drain region 11 made of an N<++> layer are formed by high-concentration ion implantation of an N-type impurity such as Si to said layer 7 and a GaAs layer 6.
Patent JP-H05213640-A (JP)
Title: Hydraulic inorganic composition
Inventor: NAKANO TATSUTOSHI
IPC: C04B14/38
Filed: 1992-02-04
Abstract: PURPOSE:To improve strength, durability and formability by adding a magnesium hydroxide fiber, various additives and water to a hydraulic inorg. material and kneading the mixture. CONSTITUTION:One hundred pts.wt. of a hydraulic inorg. material such as portland cement, 0.5-20 pts.wt. of a magnesium hydroxide filber 1-100mum in diameter and 1-2000mm in length, <=20 pts.wt. of an org. or inorg. fiber of 0.1-40 denier, 1-15mm in length, if necessary, <=5 pts.wt. of a water-soluble high molecular material such as hydroxymethylcellulose and <=100 pts.wt. of an inorg. filler such as silica fume are mixed, then 20-100 pts.wt. of water is added, and the mixture is kneaded to obtain a hydraulic inorg. composition excellent in strength, durability and formability. The composition is extruded, and the extrudate is aged under a specified condition to obtain a hydraulic inorg. cured body excellent in mechanical strength.
Patent JP-H11213651-A (JP)
Title: Magnetic memory
Inventor: NAKATANI RYOICHI
IPC: G11C11/56
Filed: 1998-01-30
Abstract: PROBLEM TO BE SOLVED: To provide a magnetic memory which enables the storage of more information data in one memory cell. SOLUTION: A multilayer film 10 composed of a 1st magnetic layer 11, a layer 13 consisting of an insulator 12 and cluster 13 of magnetic metal dispersed in it and a 2nd magnetic layer 15 which are layered in this order is employed as a magnetic memory. Recording values are given to a state wherein the layer 14 consisting of the insulator and cluster dispersed in it is macroscopically magnetized in a certain direction and a state wherein the layer 14 is not magnetized respectively.
Patent JP-S62176467-A (JP)
Inventor: FUJITA TAKASHI
IPC: A63B49/03
Filed: 1986-01-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59145950-A (JP)
Title: Solder resist detecting method
Inventor: TAKAMATSU SHIGEO
IPC: H05K1/02
Filed: 1983-02-08
Abstract: PURPOSE:To view exactly a solder resist whose coating is thin by mixing a fluorescent material into a synthetic resin of a solder resist, and generating a fluorescence by irradiating an ultraviolet ray. CONSTITUTION:A through-hole 5 for inserting a lead of parts loaded on a face A of printed board is provided on a land 3 of an electric conductor pattern of a face B of an insulating plate 1 of the printed board, and in order to detect an existence of a thin film 6 of a solder resist 4 which becomes a fault when the lead of parts is connected by solder in the land 3 part, a fluorescent material is mixed in advance into a synthetic resin of a solder resist. A thin film 6 of the solder resist 4 is detected visually by irradiating an ultraviolet ray of an ultraviolet lamp 8.
Patent JP-H07254432-A (JP)
Title: Positive electrode collector for sodium-sulfur battery and manufacture thereof
Inventor: NISHIMURA AKIRA
IPC: H01M10/39
Filed: 1994-02-16
Abstract: PURPOSE:To decrease inner loss in a battery, and perform stabilized charging and discharging by disposing multifilament yarns of a number of continuous carbon fibers in a carbon base material of a layer structure to be radially extended from an inner surface of a split cylinder or a cylinder toward an outer surface, and arranged at a desired interval in the circumferential direction of the split cylinder or the cylinder. CONSTITUTION:A positive electrode collector for a sodium-sulfer battery has a layer structure of a carbon fiber base material 9, and it has a split cylinder form as a whole. The base material 9 has multifilament yarns 10 of a number of continuous carbon fibers. The yarns 10 are radially extended from an inner surface of the split cylinder toward an outer surface, and they are arranged in the circumferential direction of the split cylinder at a desired interval. Auxiliary yarns 11, 12 extended in the arrangement direction of the yarns 10 connect the yarns 10 to each other by leno weaving organization. Connection by the auxiliary yarns 11, 12 is performed almost at center parts of the length of the yarns 10. Sulfur is impregnated in the positive electrode collector.
Patent JP-H04237287-A (JP)
Title: Cordless television telephone set
Inventor: KOMORI DAISUKE
IPC: H04N5/00
Filed: 1991-01-21
Abstract: PURPOSE:To adopt cordless configuration for a portable part by separating the television telephone set into a fixed part and the portable part and converting a still picture signal or the like sent/received between the fixed part and the portable part into a high frequency signal. CONSTITUTION:A still picture signal or the like sent/received through a telephone line 2 is converted into a high frequency signal set for transmission reception of the cordless telephone set between a fixed part A and a portable part B and the still picture signal from the telephone line 2 is detected by a still picture signal detection section 13 and based on the detection, a line changeover section 14 switches the line to the telephone set 16 into a picture demodulation storage section 17, which demodulates the signal into a television signal and inputted and displayed on a display section 19 via a picture changeover section 18. A picture of a talker picked up by a camera 20 is modulated into a still picture signal by a picture storage modulation section 21 and converted into a high frequency signal by a transmission reception section 11 and sent to the fixed part A, a transmission reception section 3 demodulates the signal into the still picture signal and the signal is sent to the telephone line 2.
Patent JP-H05218137-A (JP)
Title: Manufacture of semiconductor device
Inventor: MORI MIKI
IPC: H01L21/60
Filed: 1992-02-05
Abstract: PURPOSE:To easily replace a semiconductor element while improving reliability by interposing thermoplastic resin when the element is mounted on a circuit board, and connecting the element to the board by curing the resin. CONSTITUTION:Thermoplastic resin 13 is bonded to a semiconductor element 11 formed with a bump 12 and a circuit board 21 formed with a wiring pattern 22. The element 11 is aligned with the board 21, the board 21 is pressed while heating the element 11 by a heating head 31, the bump 12 is brought into contact with the pattern 22 and electrically connected thereto. An operation inspection of the element 11 and a connecting inspection of the element 11 to the board 21 are executed. In the case of a malfunction, the resin 13 is plasticized by heating, and the element 11 can be easily replaced. On the other hand, if the inspection after mounting results in normal state, the resin 13 is covered with thermosetting resin 14, the resin is cured by heating, thereby fixing the element 11 to the board 21.
Patent JP-H10212240-A (JP)
Title: Mixture of bacterial outer membrane and/or cell wall for oral immunization against mucosal infection
Inventor: FALLER ANTON DR
IPC: A61K35/74
Filed: 1998-01-30
Abstract: PROBLEM TO BE SOLVED: To obtain the subject mixture comprising the outer membranes of gram-negative bacteria and the cell walls of gram-positive bacteria and orally effective for protecting mucous membranes from mucosal infections. SOLUTION: The outer membranes of gram-negative bacteria are separated by peeling the outer membranes from the spheroplasts, separating the outer membranes from the spheroplasts, and subsequently purifying the outer membranes. The cell walls of gram-positive bacteria are separated by mechanically crushing the cells, centrifugally separating the cell walls from the left cell components and subsequently purifying the cell walls. The purified gram-negative outer membranes are mixed with the cell walls of gram-positive bacteria.
Patent JP-H01194348-A (JP)
Title: Semiconductor device
Inventor: YAMAMOTO HIROMASA
IPC: H01L21/8234
Filed: 1988-01-28
Abstract: PURPOSE:To facilitate formation of a charge transfer part and a CMOS circuit on the same substrate by a method wherein first well regions and second well regions are provided in a semiconductor substrate and in a region provided in the substrate respectively and MOS transistors are formed in the first well regions and a charge transfer element is formed in the second well regions. CONSTITUTION:P-type well regions 2A and 2B are provided in an N-type semiconductor substrate 1. N-type source and drain 5A are formed in the region 2B and an N-type channel MOSFET 10 is composed of the region 2B, the source and drain 5A and a gate electrode 3A formed on the region 2B with a gate oxide film 6A in between. On the other hand, first and second high impurity concentration N<+> type well regions 4A and 4B are formed in the region 2A. P-type source and drain 7 are formed in the region 4A and a P-type channel MOSFET 20 is composed of the region 4A, the source and drain 7 and a gate electrode 3B formed on the region 4A with a gate oxide film 6B in between. In the region 4B, charge transfer element composed of charge transfer electrodes 3 which are formed on the region 4B with a gate oxide film 6 in between and made of N-type polycrystalline silicon, a charge input diffused layer 5 and so forth is formed so that the charge transfer part and the CMOS circuit part can be formed on the same substrate.
Patent JP-2000215443-A (JP)
Title: Production of magnetic recording medium
Inventor: KIRINO FUMIYOSHI
IPC: G11B5/85
Filed: 1999-01-28
Abstract: PROBLEM TO BE SOLVED: To form a texture with a precisely controlled interval and depth on the surface of a magnetic disk substrate, to obtain a magnetic disk having high reliability due to the enhanced adhesive strength of the substrate to a medium and improved contact at the interface between a head and the disk, to enable the simultaneous formation of the texture and a magnetic film, to reduce the number of laminated layers, to simplify the production process and to reduce the cost of the disk. SOLUTION: An inorganic compound film 2 having crystal grains comprising one oxide selected from chromium oxide, iron oxide and nickel oxide and at least one oxide deposited on the grain boundaries of the grains and selected from silicon dioxide, aluminum oxide, titanium dioxide, tantalum oxide and zinc oxide is formed on a disk substrate 1 and subjected to reduction treatment. By this treatment, the grains are allowed to exhibit magnetism and the objective magnetic recording medium is produced.
Patent JP-H03224030-A (JP)
Title: Set-up processing system for byte position identification code
Inventor: NAGAE MASAO
IPC: G06F17/21
Filed: 1990-01-30
Abstract: PURPOSE:To set the information obtained from a calculation formula and to improve the processing performance by handling the information in the numerical value to discriminate the higher rank bytes from the lower rank bytes. CONSTITUTION:The information are set in an identification setting area 12 in the numerical value to discriminate the higher rank bytes from the lower rank ones of each character in accordance with the Japanese word data set in a Japanese word data area 11. An identification code set-up processing part 13 subtracts the precedent identification code from a certain value in order to generate in sequence the identification codes of higher and lower bytes of each character of the Japanese word data. Then the part 13 sets each identification code in the area 12. In other words, the information identifying the higher or lower bytes of the Japanese word data are defined as the identification codes using the numerical values. Thus the part 13 generates the identification codes in sequence just through the processing of calculation formula and can set the information at a high speed.
Patent JP-S53105372-A (JP)
Title: Liquid phase epitaxial growing unit
Inventor: NAKAJIMA KAZUO
IPC: H01L21/208
Filed: 1977-02-25
Abstract: PURPOSE: To grow the crystal having less crystal deficiency by protecting the bottom of solution with the source substrate and to grow with a given composition by preventing the mixing of solutions. 
     COPYRIGHT: (C)1978,JPO&Japio