Patent GB-1185731-A (GB)
Title: Improvements in or relating to Signal Transfer Systems
Inventor: KAENEL REGINALD ALFRED
IPC: H04Q11/04
Filed: 1967-04-11
Abstract: 1,185,731. Automatic exchange systems. WESTERN ELECTRIC CO. Inc. 11 April, 1967 [19 April, 1966], No. 16538/67. Heading H4K. In an exchange system comprising a plurality of concentrators which are connected to a main exchange by TDM highways, each concentrator includes a magnetic domain type shift register in which two samples per cycle from each of the concentrator's active lines are recorded in parallel for subsequent serial read-out (to the highway) during the time slots relevant to these lines. Two samples are taken from each line in order to provide sufficient data for a delete modulator. The samples are derived simultaneously from all the lines and then stored simultaneously in those discrete regions of the shift register which are allocated respectively to the lines. The registers may be of the type described in Specification 1, 141, 903. The general operation of the main exchange, in so far as call processing and time slot interchange is concerned, is the same as that described in Specifications 1,040,254; 921,384. Timing.-The basic cycle time is of 42 Ásecs. duration of which 2 Ásecs. is reserved for the parallel transfer of sampled data (two samples) from each " line " (actually a two-stage domaintype buffer register) to the main domain register and a further 40 Ásecs. is reserved for serial transfer of all this data to an output shift register. This data is then allocated to 20 time slots on the highway, with a further five slots reserved for supervisory and synchronization signals. The two samples from each line are sent in the two halves of a same time slot. In effect line sampling is effected at a48 kc./s. rate whereas bits are shifted through the concentrator at a 500 kc./s. rate and are shifted on the highways at a 1À375 Mc/s. rate. Concentrator equipment.-The 100 lines of each concentrator are divided into 5 groups of 20 lines each. Each group has a set of individual equipments c.f. group 1 in Fig. 2A and a set of common equipment c.f. output and input transmission registers 250, 260 in Figs. 2B, 2C. Each group has allocated for its individual use, 4 time slots on the concentrator/main exchange highway. There is no suggestion that a group, whose 4 time slots allocation is fully taken up, can overflow into free time slots of another group. Each line has an individual 2/4 wire hybrid 202; delta modulator and demodulator 205, 207; and short (two bit) domain shift registers 206, 207. Furthermore each line has an individual " position " in main domain stores 210, 215; line scanner 230; and line activity register 220. Each group also has an individual domain type buffer register 255, 265 between its main stores 210, 215 and the input, output registers 250, 260. The two " blocks " of domain register shown in the registers 210, 215, 255, 265 are used for storing the two sampling bits received-from/sent-to short domain registers 206, 217. The two " blocks " of domain register 231, 232 in line scanner 230 constitute " present state " and " last look " registers, the serial output from the former being fed, inter alia, into the latter during shifting. The two blocks of domain register 221, 222 in activity register 220 act as a circulating arrangement for storing the active states of the (at most 4) lines in Group 1. Operation.-Line number generators 245 in the line scanner and 225 in the activity register cyclically produce the address of each line in Group 1. If a change of state occurs, e.g. transition from on-hook to off-hook of subscribers 201-1-as denoted by a voltage drop in the caller's line circuit-then at time t 4 , which is a pulse that recurs once in every 100 cycles, a pulse is recorded in the (or each) subscriber's " position " in block 231. During the so-called propagate time t 3  of the same cycle in which t 4  occurs, a pulse t 5  is applied to a flipflop 240 which causes read-out from block 231 to commence. In this case, with a mismatch between the contents of " present state " and " last look " memories 231 and 232, gates 233 and 242 are operative to stop the line number generator and to reset flip-flop 240 whereby the address of the calling line and a bit indicating that it is an off-hook line are transmitted over bus 246 and inserted in the supervisory position of output register 250. The contents of this register are read-out to GO highway 105-1 whereby they can be processed at the main exchange. The latter allots a free time slot to the call and reverts dialling tone during this slot. Also, during a supervisory time slot, it reverts the address of the calling line. The received address is transmitted from input register 260 over bus 267 to the activity register 220. There it is compared with the output from line number generator 225 and when coincidence occurs a " busy " or " active " condition is entered in that position in circulating domain store 221 corresponding to this number. The previously mentioned transmission and "active" entry into the store occurs during one cycle. At t 2  of the next cycle, the " active " condition opens gates 216 whereby data stored in main input domain register 215 during the previous cycle is passed in parallel to short shift register 217. (Similar data transfer to a short shift register occurs for all other active subscribers in the group.) At times t 7  of the considered cycle the data is shifted out of 217 demodulated at 207 and passed to line as dialling tone. Referring back now to the operation of the line scanner, it will be remembered that this was stopped for the transmission of the calling line address. 5 cycles later another pulse t 5  occurs in order to restart it, the " 1 " entry in the " top " of the " present state " store 231 being passed to the " bottom " of the last look store in response to the shift signal from flip-flop 240. The scanner then steps on until either a further change of state indication occurs or it has supplied each address in the group. In the former case it is restarted as before so that eventually -and in any case before the next occurrence of t 4 -each line has been interrogated. In the next scan, both the " present state " and the " last look " stores will contain a " 1 " bit at this line's " position " and no further action will occur until hang-up at the end of the call. Meanwhile the caller has initiated dialling. The delta modulator 205 codes two samples of each dialling indication and stores these in short shift register 206 during one cycle. In the next cycle, at time t 2 , the coded samples are passed in parallel to the relevant positions in memory 210 and then during t 3  are read-out serially over buses 211 to buffer domain register 255. The latter is pulsed by the " active " conditions supplied by the activity register so as to shift the data into sections 17-20 which correspond to the four time slots allocated to the group. At t 2  of the next cycle the contents of 255 are supplied in parallel to the relevant portions of output register 250 whereby during t 3  of this cycle the data can be serially read-out to the highway. The main exchange registers the dialled digits, determines the free/busy state of the wanted party, reverts ringing/busy tone as appropriate to the caller, allots a free time slot to the called party and transmits his address during a supervisory time slot so as to mark him active in the activity register allotted to his group. The call proceeds with speech samples being delta modulated and passed through the various domain stores in exactly the same manner as were dialling signal samples. At the end of the call when either party releases, the change of line condition detected by the line scanner initiates clearance of the " active " conditions from the activity registers of the calling and called party's groups as well as from the call stores in the main exchange.