baber/WOPTO huggingface dataset:
Patent JP-H03132122-A (JP)
Title: Device for communication of digital data through communication link
Inventor: SARUBEITAA AAKIYURI
IPC: H04L5/04
Filed: 1990-06-26
Abstract: PURPOSE: To efficiently improve the speed of a transmitting system having switching speed limitation by converting parallel multi-bit words into an analog level corresponding to a direct current level in a conversion clock cycle. CONSTITUTION: A transmitter 20 receives digital information 22 of parallel multi-bit words at a switching speed, and converts the multi-bit words into a pulse by a corresponding analog level at the same switching speed. The analog level is transmitted through a communication link 23 as an analog signal, and a receiver 21 connected with the link 23 restores parallel digital data information 24 from the analog signal. Thus, the high speed of plural bit data can be attained in parallel by each pulse of the analog signal, and the communication at the effective bit rate can be further precisely achieved at the prescribed switching speed.
Patent JP-S5958621-A (JP)
Title: Magnetic recording medium
Inventor: OKITA TSUTOMU
IPC: C09D5/23
Filed: 1982-09-27
Abstract: PURPOSE:To obtain a tape having various excellent characteristics for a VTR, etc. by using a binder contg. a urethane acrylate oligomer and acrylate monomer respectively having >=2 (meth)acryloyl groups in a molecule and a polymer having a specific thermal deformation temp. CONSTITUTION:A compsn. contg. 20-80pts.wt. a polymer having >=70 deg.C thermal deformation temp. in 100pts.wt. a mixture of a urethane acrylate oligomer and an acrylate monomer (diethylene glycol diacrylate, etc.) respectively having >=2 (meth)acryloyl groups in a molecular wherein the former is contained at 60- 90pts.wt. and the latter at 40-10pts.wt. is used as a binder for magnetic powder, and a magnetic layer is cured by the irradiation of an electron ray thereto, whereby a magnetic tape is obtd. The tape which is adaptable to a VTR, etc., has excellent still durability, does not contaminate the path for traveling and has excellent wear resistance, durability, etc. is thus obtd.
Patent JP-S6412344-A (JP)
Title: System for measuring performance of multiprocessor
Inventor: SUZUKI KAORU
IPC: G06F15/16
Filed: 1987-07-06
Abstract: PURPOSE:To measure performance characteristics in a various kinds of states, by setting environment by a processor on a slave side, and generating the competitive state of a processing falsely at the time of measuring the processing time of an instruction by the processor on a master side. CONSTITUTION:A measuring object instruction and measuring environment information are accumulated in a data accumulation part 11 for measurement. A state control part 12 on the master side controls the initialization of the processors 3-1 and 3-2 and the operations of a performance measurement part 13 and an environment setting part 15 based on information extracted from the data accumulation part 11. The performance measurement part 13 issues the measuring object instruction, and measures the processing time. Synchronizing with the above operation, the environment setting part 15 in a slave instruction processor issues a read/write instruction to a storage area in a memory device 1 to which an object instruction makes access, and generates a false competitive state. After the measurement is completed, control is delivered to an edit output part 14, and a measured result is outputted.
Patent JP-H0518825-A (JP)
Title: Measuring apparatus for temperature distribution and detecting system for human body using same
Inventor: YOSHIIKE NOBUYUKI
IPC: G01J5/34
Filed: 1991-07-09
Abstract: PURPOSE:To measure a radiation temperature distribution and to enable the presence or absence of persons in an apparatus room, the number of the persons, the amount of activity, etc., to be detected by making a pyroelectric type array sensor operate while driving it to rotate. CONSTITUTION:An infrared array sensor 1 detecting infrared rays, a condenser means 2 for condensing the infrared rays, a chopper means 3 intercepting intermittently the infrared rays entering the infrared array sensor 1, a rotary element 4 holding these means integrally, and a stepping motor 5 rotating the rotary element 4, are provided. After measurement is executed in a prescribed facing direction, forward rotation at a fixed angle in one step is made by the stepping motor 5 and the measurement is repeated sequentially. After the measurement in the last facing direction is completed, the stepping motor 5 is driven reversely by the steps for rotation taken theretofore, the rotation is thereby made reversely to the initial facing direction and an apparatus is put in a state of standby for subsequent measurement.
Patent JP-H0332237-A (JP)
Title: Telephone set
Inventor: YORITA TERU
IPC: H04B14/00
Filed: 1989-06-29
Abstract: PURPOSE:To expand a transmission band apparently and to obtain a voice signal with high quality by using plural PCM code conversion circuits and decode conversion circuits so as to split one voice signal into plural voice signals. CONSTITUTION:A voice output signal of a transmitter 1 is divided into four by a distribution circuit 3 and PCM coding circuits 11-14 apply code conversion of a voice signal into a PCM signal. A demultiplex circuit 31 demultiplexes a multiplexed reception voice signal into 4 ADPCM reception voice signals and are outputted to ADPCM decoding circuits 41-44. The ADPCM decoding circuits 41-44 decode the ADPCM reception voice signals separated into 4 into PCM coding signals respectively. The received voice signal decoded into the 4 PCM signals 4 are decoded into PAM signals by PAM decoding circuits 51-54, and they are synthesized into one PAM coding signal by an adder circuit 60. The synthesized PAM reception voice signal is decoded into an analog reception voice signal via a low pass filter 81 and converted into an audible signal by a receiver 2. Thus, the voice frequency band is apparently expanded.
Patent JP-H0520384-A (JP)
Title: Delay time value calculation method
Inventor: NAKAYA KAZUE
IPC: G06F17/50
Filed: 1991-07-10
Abstract: PURPOSE:To speedily calculate a path not satisfying the timing constraint value of a logic circuit and its integrating delay time value. CONSTITUTION:In a step 11, a critical path is detected for deciding the maximum integrating delay time value between start and end nodes. Then, whether or not a path obtained in a step 12 satisfies the constraint value is checked. When it is not, a path is written in a storage device in a step 13. In a step 14, whether or not a backward branch node exists in this path is checked. At the time of presence, the integrating delay time value for each backward node selection time is obtained in a step 15, and registered in a path table. Then, a path deciding the maximum integrating delay time value in the path table is selected in a step 17, and this path is extended before and after the path in a step 18, obtaining the next long path and its integrating delay time value. At the time of the absence, whether or not the path table is empty is checked in the step 16, and ended in the case of empty. When it is not empty, the step 17 and later are executed. Then, the step 12 and later is repeated.
Patent JP-S5958430-A (JP)
Title: Automatic trimming layout method of print plate making
Inventor: MUKASA SHIYUNSUKE
IPC: G03F1/90
Filed: 1982-09-29
Abstract: PURPOSE:To obtain an accurate layout in a short time by obtaining trimmed picture data when picture data is read and deciding on the layout of the picture according to the specification of allotted position data. CONSTITUTION:A linear encoder 5 detects the position of a magnifying mirror 3 and generates position data Px on a position parallel to the axis of a drum 1. A rotary encoder 4 detects the rotation-directional position of the drum 1 to generate position data PY. A controller 6 consists of a computer, etc., and controls the whole system and processes various data. A switch 7 generates a store signal ST for inputted the position data Px and Py to the controller 6 and a data tablet 8 generates the position data Px and Py on a point specified with a cursor 10 in its surface on the basis of a orthogonal coordinate system, and inputs numeric data from a menu area 13 provided in the surface, thus inputting data on the magnification of variable power of a picture.
Patent JP-S5793205-A (JP)
Title: Measuring device for width dimension
Inventor: NISHIE SEIKICHI
IPC: G01B21/06
Filed: 1980-11-29
Abstract: PURPOSE:To enable measurement of the width dimension by a simple circuit irrespective of the center position and the size of the width, by scanning the width direction of a substance to be measured by means of a plurality of optical position detecting heads and by processing and operating preferentially a signal from the head detecting an edge. CONSTITUTION:The width direction of the substance 1 to be measured is scanned by a plurality of optical detecting heads 21-2n (hereinafter mentioned as 2n) according to an instruction from a synchronous signal generating part 5 and the outputs therefrom are inputted in comparison circuits 6n and made to be binarized signals through comparison with levels of discrimination level setting parts 7n, which open or close gates 9n  in synchronization with signals from blanking signal generating parts 8n. The outputs from the gates are inputted in an output data controlling part (ODC)20 and counters 10n and the results of counting are sent to ODC20 and memories 11n. Based on a scanning start signal Sp, a clock signal Ck and a scanning end signal Eos from the synchronous signal generating part 5, ODC20 operates the aforesaid input to give the memories 11n the address of the edge at every scanning. Data read out according to an instruction from ODC20 are sent to a computing part 16 through the intermediary of a bus 30. Thus, computation is performed by a simplified circuit, whereby the width can be determined.
Patent JP-H03151485-A (JP)
Title: Loading container of article
Inventor: DEIBUITSUDO AREKUSANDAA HAIN
IPC: B65H31/30
Filed: 1990-06-28
Abstract: PURPOSE: To take out envelopes without disturbing loaded order by releasing the latch of a container taken out of a deposit device, taking out a base from a bin, and taking out envelope through the bottom of the bin. CONSTITUTION: A deposit container 24 is formed from an envelope storing bin 114 with over-part opening and a push part 116 placed on the top of the bin 114, and the bottom of each envelope 122 is supported by the oversurface 120 of a supporting member 130 attached resiliently to the bin 114. The container 24 is rotated clockwise by turning a latch member and taken out of a deposit device through the opened door. Latch 240 is released for taking out a base 129 from the bin 114, and the supporting member 130 is taken out, and then the envelope 122 is taken out through the bottom of the bin 114. This allows taking out envelopes from the container 24 without disturbing loaded order.
Patent JP-H0458833-A (JP)
Title: Method for suppressing cold damage of rice plant
Inventor: WATANABE MINORU
IPC: A01G22/22
Filed: 1990-06-27
Abstract: PURPOSE:To mitigate the growth damage and the lowering of yield of rice caused by low-temperature hazard by applying an amino acid fermentation liquid during the raising seedling period, etc., in the culture of rice on paddy field. CONSTITUTION:An amino acid fermentation liquid (preferably a liquid having a total amino acid concentration of 5-100ppm and produced by the amino acid fermentation of a raw material containing glucose, vitamins and yeast extract) is applied to paddy rice plant during the raising seedling period or after transplantation.
Patent JP-H0334007-A (JP)
Title: Power supply monitor device
Inventor: NISHIOKA SHOJI
IPC: G06F1/28
Filed: 1989-06-30
Abstract: PURPOSE:To omit an exclusive power monitor line and to reduce the cost of a system by reading the status signal received via a status line and discriminating the ON/OFF state of the power supply of an input/output device via an input/output controller. CONSTITUTION:A firmware 3 is contained in an input/output controller 2 having a power supply 1, and a microcomputer 6 is contained in an input/output device 5 having a power supply 4. A status line 7 and a reset line 8 are used for connection of the firmware 3 and the microcomputer 6. Then the microcomputer 6 of the device 5 side produces the status signal with which the ON/OFF state of the power supply 4 of the device 5 side is defined. Thus the firmware 3 of the controller 2 reads the status signal received via the line 7 and therefore can discriminate the ON/OFF state of the power supply 4. As a result, an exclusive power monitor line is omitted and the system cost can be reduced.
Patent JP-H1128068-A (JP)
Title: Production of fermented seasoning
Inventor: KOORI TAKAMICHI
IPC: A23L27/24
Filed: 1997-06-25
Abstract: PROBLEM TO BE SOLVED: To produce a pale-colored fermented seasoning having a soy sauce-like flavor and aftertaste thicker than the say sauce without generating raw material smell although using meat by blending meat with cereal grain malt, charging the blend into brine water to make a specific unrefined soy salt concentration, fermenting and aging. SOLUTION: This fermented seasoning is produced by blending meat such as chicken, beef and pork with cereal grain malt, charging the blend into brine water to make a specific unrefined soy salt concentration to 13-22 g/dl, fermenting and aging. Preferably, the seasoning is preserved for 3-8 months while controlling a material temperature at 20-35 deg.C during the fermenting and aging process. Preferably, the seasoning is fermented and aged in the co-presence of protease derived from genus Aspergillus. Raw meat or boiled meat may be used as the meat. Preferably, a blending solid weight ratio of the meat with the cereal grain malt is 0.3-3.0.
Patent JP-H1114866-A (JP)
Title: Optical connector and production thereof
Inventor: SATO YUJI
IPC: G02B6/24
Filed: 1997-06-25
Abstract: PROBLEM TO BE SOLVED: To prevent the failure and the breaking of an optical connector due to the difference among thermal expansions at the time the temp. is changed by assembling the optical connector while aligning individual optical fibers with a desired interval by using two sheets of V-groove substrates and a spacer having the same material as that of the V-groove substrates. SOLUTION: An optical connector 1 is assembled by respectively adhering optical fibers 5, 5a made to be lines at the center of the connector, the spacer 4 held in among optical fibers 5, 5a and V-groove substrates 2, 3 holding the optical fibers 5, 5a from the outsides with adhesive. The substrate 2, 3 are made of silicon and V grooves 6, 6a for arranging the optical fibers 5, 5a and guiding grooves 7 for housing positioning pins 20 are worked at respective one sides of the substrates with a high dimensional accuracy by an anisotriphic etching on the surfaces of the substrates. Then, the spacer 4 is the flat plate made of the same silicon as that of the substrates 2, 3 and is finished to a thickness holding the interval between lines of the optical fibers 5, 5a to the desired distance with the high dimensional accuracy.
Patent JP-S6324232-A (JP)
Title: Interchangeable lens
Inventor: YAMAMOTO HIROSHI
IPC: G03B7/095
Filed: 1986-07-17
Abstract: PURPOSE:To reduce the volume of an interchangeable lens by moving an exposing device body and a motor in a lens barrel along its optical axis interlocking with a zooming mechanism and fixing an apparatus arranged in parallel with a shielding blade driving motor on a stroke end position of the exposing device body. CONSTITUTION:The electric exposing device 19 having a motor 19B protruding from one end of the exposing device body 19 is built in the lens barrel 20a with the zooming mechanism and the apparatus 20b to be inserted into a space having no motor 19B is fixed on the inside of the lens barrel 20a at one stroke end position of the device 19. Consequently, stopping operation or the like can be electrically attained and a small interchangeable lens having no dead space can be arranged in the lens barrel.
Patent JP-H04367227-A (JP)
Title: Rear grinding and treatment method for wafer and wafer chuck used for the method
Inventor: YOSHIMOTO YUZO
IPC: H01L21/304
Filed: 1991-06-14
Abstract: PURPOSE:To simplify a process wherein the rear of a pattern formation face on a wafer subjected to a wafer process as a prior process in the manufacture of a semiconductor is ground and treated. CONSTITUTION:The side of a pattern formation face 2a on a wafer 2 is fixed to a chuck table 1 at a wafer chuck; the rear 2b of the pattern formation face 2a is ground. At this time, only the side edge of the pattern formation face 2a is sucked and held by the chuck table 1, a fluid is supplied toward the pattern formation face 2a excluding the side edge, and the bend of the wafer is prevented in its grinding operation. Thereby, the pasting operation of a protective tape which has been indispensable in conventional cases is omitted, and a process can be simplified sharply.
Patent JP-S6228788-A (JP)
Inventor: NAGAIE TOSHIKAZU
IPC: B41J2/505
Filed: 1985-07-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0333852-A (JP)
Title: Formation of resist pattern
Inventor: IKEDA RIKIO
IPC: G03F7/038
Filed: 1989-06-30
Abstract: PURPOSE:To improve resolution by subjecting a resist layer to a pattern exposing, then impressing electric fields in the film thickness direction of the resist layer before baking and/or during baking. CONSTITUTION:A mask 12 is set above the resist layer 11 and the resist layer is subjected to the exposing treatment. Electrode plates 12A, 12B are disposed above the resist layer 11 and on the rear surface of a substrate 10 prior to the baking (PEB) after the exposing. The electric fields are then impressed to these plates in such a manner that the electrode plate 12A is positive and the electrode plate 12B negative. Since the electric fields are impressed in the film thickness direction of the resist layer 11 onto this layer, the pulling of the protons (H<+>) generated by the exposing to the lower part of the resist layer 11 is possible and there is the effect that the reaction progresses even in the lower part of the resist layer 11. The shape of the resist when development is executed is improved in this way and the resolution is improved.
Patent JP-S6062488-A (JP)
Inventor: SATOU HIROSHI
IPC: B25J15/08
Filed: 1983-09-16
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H1021845-A (JP)
Title: Convergence correcting apparatus
Inventor: KUWABARA YASUNAGA
IPC: H01J29/54
Filed: 1996-06-28
Abstract: PROBLEM TO BE SOLVED: To provide a convergence correcting apparatus which can carry out convergence correction responding to the quantity of electric current even in the case horizontally correcting electric current and vertically correcting electric current are respectively applied. SOLUTION: This convergence correcting apparatus is an apparatus comprising first coils 10 coiled approximately in a rectangular shape and second coils 11 coiled in a cylindrical shape, and at first a plurality of first coils 10 are installed adjacently to a cathode-ray tube and a glass face and the second coils 11 are installed in the outer circumferential side of the first coils 10 and electric current is applied separately to the first coils and the second coils from different electric power sources.  Since the directions of the electric currents flowing the first coils 10 and the second coils 11 are not completely same, no interference occurs between electric currents flowing the first coils and the second coils even in the case horizontal correcting electric current is applied to the first coils 10 and vertical correcting electric current is applied to the second coils 11 and convergence correction can be carried out separately responding to the quantities of the electric currents.
Patent JP-S5958432-A (JP)
Title: Lamination type electrophotographic receptor
Inventor: OOSETO SEIICHI
IPC: G03G5/08
Filed: 1982-09-28
Abstract: PURPOSE:To provide a lamination type electrophotographic receptor free from pollution, having high hardness, high spectral sensitivity and low fatigue against light beam by providing successively an electric charge transfer layer of amorphous Se-As contg. As on a conductive substrate and an electric charge generating layer of amorphous Si contg. H on a conductive substrate. CONSTITUTION:An electric charge transfer layer 11 of amorphous Se-As of 40-70mu thickness contg. 36-42atm% As is formed on a conductive substrate 10 of an aluminum drum, etc. by the vapor deposition under the conditions of about 10<-5>-10<-6>Torr degree of vacuum, about 200-220 deg.C substrate temp. and about 410-430 deg.C temp. of a vapor depositon source. An electric charge generation layer 12 of amorphous Si of 0.5-5mu thickness contg. 10-30atm% H is formed by a high frequency glow discharge method on the layer 11, whereby the intended lamination type electrophotographic receptor is obtd. The resulted photoreceptor has the harmful selenium layer which is coated with the non-pollutive silicon layer of high hardness and is therefore free from pollution and is highly resistant to wear, etc.
Patent JP-H0332648-A (JP)
Title: X-ray ct device
Inventor: FUJITA HIDEHIRO
IPC: A61B6/03
Filed: 1989-06-30
Abstract: PURPOSE:To simply decide at a glance whether the surface to be photographed is contained in a photographable area or not by adjusting an irradiation angle of a projector in the periphery of a dome, and radiating only the photographing surface of a body to be examined which is contained in the photographable area with a light beam. CONSTITUTION:Before a body 3 to be examined, placed on a top board 6 is moved into a dome 8 of a rack base part 2 and X-ray photographing is performed, the body 3 to be examined 3 is irradiated with a light beam by a pair of projectors 11 in the periphery of the dome 8. In this case, an irradiation angle alpha of a light beam from the projector 11 is adjusted by an adjusting means 13, and the adjusting means 13 is controlled in advance by a control part, by which the surface to be photographed is irradiated so as to coincide with a photographable area 12 in the dome 8 or to be contained in this area 12. In such a way, an operator can decide simply at a glance whether the surface to be photographed is contained in the photographable area or not by observing the irradiated surface of the body 3 to be examined from the outside of the dome 8. When it is decided that the surface to be photographed is contained in the photographable area 12, it will suffice that an X-ray exposure is started in the arrangement as it is.
Patent JP-H11346134-A (JP)
Title: Power amplifier circuit and power automatic control method
Inventor: YAMAGUCHI YUTAKA
IPC: H04B1/04
Filed: 1998-06-02
Abstract: PROBLEM TO BE SOLVED: To improve power efficiency of a power amplifying circuit. SOLUTION: An arithmetic circuit 11 calculates the input power from a detected voltage value and a current value and calculates the power efficiency of an amplifier 3 from the input power and an output power level. Then the circuit 11 outputs the calculated efficiency value to a comparing circuit 13 and stores it in a storing element 12. The circuit 13 compares the inputted efficiency value with the efficiency value stored in the element 12 one round ago. When a present efficiency value is larger than that of one round ago, a gate voltage control circuit 5 is controlled in the direction equal to the direction controlled one round ago. When the present efficiency value is smaller than that of one round ago, the gate voltage control circuit 5 is controlled in the direction opposite to the direction controlled one round ago.  Then, when the present efficiency value is equal to that of one round ago, the gate voltage control circuit 5 is controlled to maintain the gate voltage of one round ago.