baber/WOPTO huggingface dataset:
Patent TW-326524-B (TW)
Title: Recording method for digital address information
Inventor: HIGURE SEISHI
IPC: G11B5/09
Filed: 1996-10-08
Granted: 1998-02-11
Abstract: A kind of method for recording an information signal on a recording medium and the absolute address arbitrarily. The address indicates the recording location of the information signal on the recording medium. The recording of the first flag indicating an absolute address being continuous without overlapping. That of the second flag indicats the absolute address having a probability of discontinuity without overlapping. The recording of the third flag indicates the absolute address having a probability of overlapping. The recording of the fourth flag indicates the absolute address being absent. And at least one of the first through fourth flags is recorded together with the absolute address.
Patent TW-313712-B (TW)
Title: Circuit card connector utilizing flexible film circuitry
Inventor: JOHN E LOPATA
IPC: H01R12/72
Filed: 1996-11-23
Granted: 1997-08-21
Abstract: A circuit card connector (20) utilizes flexible circuitry (64) and a card-engagement assembly (50) which applies a normal force to the contact pads (34) of the circuit card (30). The connector includes two opposing connector end portions (40) and a card-engagement assembly (50) extending therebetween, the card-engagement assembly (50) including two opposing spring members (53) which are seated upon a pair of fulcrums. The spring members (53) are spaced apart from each other on opposite sides of a centerline of a card-receiving slot (80) of the connector (20). The spring members (53) have lower leg portions (55) and upper contact arm portions (57). The leg portions (55) of the spring members (53) project into the card-receiving slot (80) such that an insertion edge (36) of the circuit card (30) will impinge thereupon and cause them to spread apart, which in turn, will cause the contact arm portions (57) of the spring members (53) to rotate around their associated fulcrums so that the contact arm portions (57) will contact and exert a normal force upon contact pads (34) located on opposing sides of the circuit card (30) near the circuit card insertion edge (36).
Patent TW-498418-B (TW)
Title: Method and device for treating surface, color filter and its manufacture, and liquid crystal panel and its manufacture
Inventor: YODA TAKESHI
IPC: H05H1/24
Filed: 1997-01-28
Granted: 2002-08-11
Abstract: A method and device for treating surface, color filter and its manufacture, and liquid crystal panel and its manufacture are disclosed, wherein a mask 10 is disposed between an electrode 3 and a material 11 to be treated such that the area 11A of the surface of the material to be treated is partitioned from another area in an electrode side. The mask is brought into contact with the surface of the material to be treated or disposed so as to form a small gap with the surface. Under an atmospheric pressure or a pressure close to the atmospheric pressure, gas discharge is produced while the specified gas is supplied between the electrode and the treated material, the excited and activated variety of the gas is produced by plasma formed during the gas discharging and by exposing only the treated area partitioned by the mask to the excited and activated variety, the surface is treated. Under a pressure close to an atmospheric pressure, the desired area of the surface of a material to be treated can be selectively and highly accurately treated by easily limiting the movement of an exciting and activation catalyst by a masking means.
Patent TW-325567-B (TW)
Title: A memory system with multiplexed input-output port and memory mapping capability and systems and methods using the same
Inventor: RONALD T TAYLOR
IPC: G11C11/401
Filed: 1997-03-17
Granted: 1998-01-21
Abstract: A memory comprising: an array of memory cells; a plurality of input/output terminals for receiving control bits during control cycles and accessing selected cells during data access cycles; a command bit input terminal for receiving command bits for initiating the control cycles; a mapping input terminal for receiving a mapping enable signal to initiate a mapping mode; a decoding circuitry for decoding control bits received during at least one control cycle existing at a mapping mode for allowing mapping a set of addresses for accessing the cells of the array.
Patent TW-335429-B (TW)
Title: Method of access to a vertical parking system
Inventor: IKENAGA TAKAKEN
IPC: E04H6/08
Filed: 1997-04-25
Granted: 1998-07-01
Abstract: A sort of parking system, having: a plurality of parkig spaces disposed along the horizontal transporting space; and vehicle carrier of free movement along said horizontal carrier space; and hoist along and crossing having said parking spaces with vehicle carrier as a plurality of parking levels of free movement, with elevators; including: 2 continuous parking spaces with horizontal carrying space and inside parking space as well as front parking space; and middle holder formed between said elevator and said horizontal vehicle carrier, for housing at least 1 vehicle and receiving freely the middle carrier between the elevator and the vehicle carrier; when the vehicle in the inner space of said 2 continuous parking spaces is to leave the parking lot by using the elevator, the vehicle in the parking space in the front shall be moved to the middle holder of other levels, being the middle holder kept vacant.
Patent TW-329044-B (TW)
Title: Method for defining via pattern
Inventor: YU JENN-HWA
IPC: H01L23/52
Filed: 1997-04-30
Granted: 1998-04-01
Abstract: A method for defining via pattern comprises the following steps: - providing a substrate with at least one MOS on it and a dielectric layer being formed nakedly on the MOS; - forming a hardmask on the surface of the dielectric layer; - spreading a photo resist layer on the hard mask; - defining the pattern of the photo resist layer and removing the hardmask formed by the photo resist layer to form an opening for the dielectric layer; - using the hardmask and the photo resist layer as a mask and removing simultaneously the photo resist layer and the dielectric layer to form via and to form a polymer layer on the surface of the hardmask; - and removing the polymer layer to obtain a hard mask.
Patent TW-342330-B (TW)
Title: Disposable diaper
Inventor: FUJIOKA YOSHIHIRO
IPC: A61F13/15
Filed: 1997-08-01
Granted: 1998-10-11
Abstract: A disposable diaper comprising: a liquid impermeable back sheet and a liquid permeable surface sheet, and an absorbent material interposed between the two sheets, and a front waist region located on the stomach side of a diaper wearer, and a crotch region facing the crotch of the wearer, and a back waist region facing the wearer^s back; which is characterized in that: at least one of the front waist region and the back waist region forms a thin part thereon at which the thickness of the absorbent material is smaller than the thickness of the absorbent material at the crotch region; and the front waist region and/or the back waist region are folded at the thin part.
Patent TW-340828-B (TW)
Title: Compaction device
Inventor: LIN JONG-SHINN
IPC: B65D63/00
Filed: 1997-08-20
Granted: 1998-09-21
Abstract: A kind of compaction device which is composed of the main body, a plurality of bundle heads and flexible components; in which, - the main body, which is assembled with a room of the hollow tank base table surrounded by side plates and a top cover, in which there installed a baffle block in front of the base table and a space formed between the baffle block and the base table and front edges; - the bundle heads, arranged in ㄇ-shape, which can be installed into the base table and comprise the structure for compaction in the inner side corresponding to the object inwardly - the flexible components, installed between the bottom of base table of main body and the bundle head, which is used to push the bundle head and located between the baffle block and flexible components; by the above structure, in usage, the object to be bundled enters the bundle head through the room and stay within it; the inner side of bundle head can tightly bundle the object; when the bundle head and the bundled object detach from the base table, then the compaction effect is achieved; then the bundle head followed will move forward by the spring of flexible components to the saved space for next usage.
Patent TW-402569-B (TW)
Title: A bicycle
Inventor: HUNG GEORGE HON CHEUNG
IPC: B62M1/18
Filed: 1997-09-09
Granted: 2000-08-21
Abstract: A bicycle is described which can be driven either by conventional rotation of the pedals, or by reciprocating movement of the saddle on the seat post. The cycle comprises two frame portions: a first fixed frame portion including an upright member extending from a drive wheel axle bearing, and a second movable frame portion including said seat post which has bifurcated arms driving transmission levers for turning the drive wheel.
Patent TW-354424-B (TW)
Title: A method for routing of nets in an electronic device
Inventor: BRACHA GABRIEL
IPC: H01L23/50
Filed: 1997-10-14
Granted: 1999-03-11
Abstract: A method for routing of nets in an electronic device in an electronic device of a multiple cluster area, the cluster area is separated by a channel region and has a plurality of nodes, each node is assigned to one of the net; comprising the steps of: (a) for the set of node belonging to the same net, a minimum Steiner tree is built between the cluster area, which includes at least one node, the Steiner serves to logically connect at least node in a vice cluster area, (b) for the Steiner trees in step (a), determining a logic node in the boundry between the Steiner trees and the channel region, including the logic node representing a pattern in the net, therefore, forming a first subpattern so as to cover the cluster region, while the second subpattern covers the channel region; (c) for each cluster region: under the condition without affecting the channel route of the second subpattern, the first subpattern discovered at step (b) is processed independently.
Patent TW-375706-B (TW)
Title: Programmable memory access
Inventor: PROVENCE JOHN D
IPC: G06F12/00
Filed: 1997-10-30
Granted: 1999-12-01
Abstract: A computing device (10) includes a processor (14) coupled to a memory interface (28). The memory interface (28) supports access to a variety of memories (12) using at least two different data lengths. The memory interface (28) includes an address register (50, 52) for receiving addressing information to access the memory (12). A mode bit (80) and a high/low bit in address register (50, 52) determine the different operating modes of the memory interface (28).
Patent TW-384536-B (TW)
Title: Method for designing shallow junction salicided NMOS transistors with decreased electrostatic discharge sensitivity
Inventor: AMERASEKERA AJITH
IPC: H01L29/78
Filed: 1997-11-25
Granted: 2000-03-11
Abstract: A technique for providing a design window for scaled technologies in which good electrostatic discharge/electrical over stress damage and optimum transistor operation can be achieved without the use of additional masks or design steps. The M, beta, and Rsub parameters of the NMOS transistor 13 and associated parasitic NPN transistor 10 are selected to provide the design window.
Patent TW-358860-B (TW)
Title: Double or multiple auger suction unit for hoods, ovens and similar appliances
Inventor: BACCHIOCCHI ALBERTO
IPC: F04D25/16
Filed: 1997-12-03
Granted: 1999-05-21
Abstract: A multiple auger suction unit, having a power motor (1), housed in a cylindrical cover (2) and passed through by a main axis, of which the end is bolted with a plurality of fans (6), being each supplied by a screw fan (6) with different release outlets and, forming a part of the casing (7) for wrapping the fan, being characterized in the arm-formed object (3) disposed in a 120 DEG angle and ending in different pins (4) having vertical axes, having all the pins an increased end base (4a) protruding axially from exterior the cover (2) and, using a specific casing (7) formed by 2 identical half casings (8 and 9 or 80 and 90), being each of which formed by 2 or more adjacent or parallel semi screw (8a and 9a or 80a and 90a), and defined at the top of the release (10) of the semi screw (8a and 9a or 80a and 90a), by a semi convex object (8b and 9b); besides, between each of 2 adjacent semi screws (8a and 9a or 80a and 90a) of the 2 halves (8 and 9 or 80 and 90) provided with a space next to the connection cross object (8c and 9c), being the cross piece provided with a central bushing having a vertical axis (8d and 9d), being the disposition of the vertical piece thus to have 2 halves (8 and 9 or 80 and 90) be disposed that close and in engagement, one of the 2 halves (8 or 80) from atop, the other halves (9 or 90) from the bottom, for connection cross to be precisely connected to the fan-motor unit from the protruding pin (4) of the cover (2) of the motor (1); and, the 2 halves having (8 and 9 or 80 and 90) having a plurality of hole-angle board (11), which has vertical axis (11a) in precise opposition of the perimeter of the opening along the semi screw (8a and 9a or 80a and 90a).
Patent TW-368552-B (TW)
Title: United cyclic power plant and steam supplying method for cooling
Inventor: NAGASHIMA TAKAYUKI
IPC: F02C6/18
Filed: 1998-01-08
Granted: 1999-09-01
Abstract: The present invention relates to a kind of united cyclic power plant and steam supplying method for cooling that when part of the loading is operating and supplying suitable temperature of steam to steam turbine by exhaust heat returning boiler, the exhaust heat returning boiler will supply suitable temperature of steam for cooling to combustion turbine plant while initializing operation. Regarding to the united cyclic power plant of the present invention, in simplicity, to separate the high pressure evaporator in the exhaust heat returning boiler into the second high pressure evaporator and the first high pressure evaporator wherein at least one is configured superheater either in the middle of the first evaporator and the second evaporator or the downstream of the second evaporator. And, regarding to the steam supplying method for cooling of united cyclic power plant in the present invention, while initializing operation, the residual steam on the cylinder of said exhaust heat returning boiler is supplied to combustion boiler plant. After the steam turbine plant starting supplying steam and operating, the exhaust steam of steam turbine plant and the steam happened in said exhaust heat returning boiler will be joined and supplied to the said combustion turbine plant as the steam for cooling.
Patent TW-395113-B (TW)
Title: Method of auto focusing
Inventor: TSAI CHI-BIN
IPC: H04N1/029
Filed: 1998-02-11
Granted: 2000-06-21
Abstract: This is an auto focusing method to find the position with widest gray scale distribution or greatest contrast (like the status used by image scanner) of the scanned object. The adjustable focus range of optical components is then set up accordingly. A focus adjustment mechanism drives optical component with approximate constant speed movement to find characteristic values of electrical image signals corresponding to different light trace or focus when auto focusing command is issued. Progressive linear analysis and comparison are executed during the linear scanning process. Only the best characteristic value and its corresponding focus position before scanning are kept. At the end, the focus corresponding to the best characteristic value among all focus positions, where focus adjustment mechanism adjusts optical component, is utilized. Auto focusing process is thus completed.
Patent TW-353606-B (TW)
Title: Toilet seat attaching structure
Inventor: TANAMURA YUSHI
IPC: F16B13/06
Filed: 1998-02-23
Granted: 1999-03-01
Abstract: A toilet seat attaching structure having an installation plate to attach a toilet seat unit to the top of a toilet pot, and respective attaching holes formed on the toilet pot and the installation plate being respectively superposed, and a fastener being inserted from the upper surface side of the installation plate, and being fastened in the attaching hole; then, for the fastener, a bolt, and a flange part for contact on the upper outer periphery, being formed, and characterized in that the fastener comprises an extending member arranged around the shaft part of the bolt which goes through an insertion hole, and a nut member to extend the extending member, and at the same time, has a flexible friction member which is arranged between the extending member and the inner peripheral surface of the attaching hole, and the extending member is press-bonded to the inner peripheral surface of the toilet pot side attaching hole by the friction member.
Patent TW-417139-B (TW)
Title: Semiconductor processing furnace heating subassembly
Inventor: WEAVER ROBERT A
IPC: F27D11/02
Filed: 1998-04-13
Granted: 2001-01-01
Abstract: A vertically oriented thermal processor for processing batches of semiconductor wafers held within a processing chamber. The processing chamber is contained within a processing vessel. A furnace liner surrounds the processing vessel in spaced relationship. A flow path for cooling fluid is supplied between the furnace liner and an inner wall of the furnace heater. The flow occurs through end and base segments forming part of the furnace heating enclosure. The end and base segments have interior ports which communicate with a manifold chamber. The manifold chamber is advantageously divided into inner and outer chambers by shields which reflect radiant heat. The inner and outer manifold chambers are connected by manifold connecting passages formed between the shields.
Patent TW-406294-B (TW)
Title: Etching reactive chamber
Inventor: LIOU CHING-WU
IPC: H01L21/00
Filed: 1998-04-18
Granted: 2000-09-21
Abstract: A kind of etching reactive chamber and its gas supply system comprising an inner reactive chamber, a reactive chamber wall which surrounds the laterial side and the bottom face of said inner reactive chamber, a gas distribution plate equipped on the upper surface of said inner reactive chamber, a reactive chamber cap which covers said inner reactive chamber, and a gas supplying passagewhich passes through said reactive chamber cap and is equipped between said reactive chamber cap and said gas distribution plate. Wherein said inner reactive chamber also comprises an electrode, and  said gas supply pathway has an entrance with a upward opening.
Patent TW-432664-B (TW)
Title: Dual damascene manufacturing process for local interconnects
Inventor: SHIU JEN-TSUNG
IPC: H01L23/522
Filed: 1998-07-21
Granted: 2001-05-01
Abstract: A dual damascene manufacturing process for local interconnects is described. The process begins by providing a substrate, and then a first insulating layer is formed over the substrate. Next, a pillar-shaped second insulating layer is formed over the first insulating layer. Thereafter, a first conductive layer is formed over the substrate, and then a third insulating layer is formed over the first conductive layer. Subsequently, a portion of the third insulating layer and the first conductive layer is removed by chemical mechanical polishing process with the second insulating layer serving as a polishing stop layer. Furthermore, a fourth insulating layer is formed over the third insulating layer, the second insulating layer and the first conductive layer, wherein the fourth insulating layer and the second insulating layer are made from the same material. Then, the etching step is performed to remove the fourth insulating layer above the second insulating layer and the entire second insulating layer to form a self-aligned via. Subsequently, a second conductive layer is deposited over the substrate and filled into the self-aligned via. Finally, a chemical mechanical polishing process is again performed to remove a portion of the second conductive layer with the fourth insulating layer serving as a polishing stop layer. After that, the local interconnects with the dual damascene structure is completed.
Patent TW-388880-B (TW)
Title: Nonvolatile semiconductor memory device
Inventor: YONEYAMA AKIRA
IPC: G11C16/04
Filed: 1998-08-26
Granted: 2000-05-01
Abstract: 19970253591
Patent TW-441087-B (TW)
Title: Semiconductor memory apparatus
Inventor: FUJISAWA HIROKI
IPC: G11C5/02
Filed: 1998-10-02
Granted: 2001-06-16
Abstract: This invention is about semiconductor memory apparatus characterized in that a semiconductor chip can be divided into two segments so as to make electrodes be arranged in the central portion. An address buffer is installed adjacent to the electrode, which receives address signal, among electrodes. Memory arrays are constituted so as to be divided into at least two groups sandwiching central portion. An address decoder is installed on a peripheral side of the semiconductor chip opposite to the central portion where the electrodes of the semiconductor chip are formed. A pre-decoder used for decoding the address signals is arranged on an intermediate portion extending from central portion to a portion where address decoder is provided.
Patent TW-392355-B (TW)
Title: A bipolar transistor and a method for fabricating the same
Inventor: JEON CHANG-KI
IPC: H01L29/08
Filed: 1998-11-03
Granted: 2000-06-01
Abstract: The present invention relates a bipolar transistor and a method of fabricating the same adapted to reduce a chip size and production cost, in which a second conductive type well region is formed in a first conductive type semiconductor substrate and an isolation trench is formed at both sides of the well region. A high density second conductive type buried layer is formed in the semiconductor substrate which is formed on bottom of the isolation trench. The buried layer is formed two regions surrounding respective bottoms of two adjacent isolation trenches. The two regions are electrically connected with each other and in direct contact with the well region. A forming process is carried out using a nitration layer pattern as a mask in order to form an extrinsic base region and a device isolation region onto the semiconductor substrate in regular sequence, wherein the nitration layer pattern is formed on the surface of semiconductor substrate. The forming process is carried out using the device isolation layer as the mask in order to form an intrinsic base region into the well region and an emitter region into the intrinsic base region. The present invention for the bipolar transistor and the method of fabricating the same, which can reduce the chip size, the production cost, and a resistance of collector by forming the isolation trench, wherein the isolation trench is used as a forming means for the buried layer formation and has a function  of a sink layer (collector layer). Also, the present invention can make self-alignment of the extrinsic base region, the intrinsic base region, and the emitter region so that the present invention can reduce a process scattering.