baber/WOPTO huggingface dataset:
Patent JP-S62135100-A (JP)
Title: Electroacoustic transducer
Inventor: NADA TAKATOSHI
IPC: H04R17/00
Filed: 1985-12-06
Abstract: PURPOSE:To efficiently use the titled transducer with a lower frequency even in the same size by lowering an inherent frequency by providing a protruding part to a shell that vibrates as the form of an additional mass. CONSTITUTION:The titled transducer comprises an electrostrictive element 1 and a shell 2, and the protruding parts 3 are provided in the inner surface of the shell 2. The element 1 is the lamination of prescribed number of layers, impressed with the voltage of the above said inherent frequency of the transducer from the power source, and is characterized in expanding and contacting in-phase and in the same direction. The oscillation thus made is transmitted to the two facing parts of the shell in the vicinity of the both ends of the major axis [length (2b)] of the shell 2. Accordingly, the two facing parts in the vicinity of the both ends of the minor axis [length (2a)] vibrate as forming a loop, and emit acoustic waves into the water. The protruding parts 3 are of a slot-shape in sectional direction, however, if the interval between them is made longer than the width of themselves by a certain degree, the characteristic of the expanding and contacting of the shell is determined by its own thickness. Therefore, the influence of the parts 3 on the characteristic is neglegeable, besides, the mass of the parts 3 effects as the additional mass of the shell. Hence an apparent density increases. As a result, the inherent frequency of the resonance goes to be lower in comparison to that with not such protruding parts.
Patent JP-H11110421-A (JP)
Title: Method for evaluating delay of circuit and system for designing circuit
Inventor: TAMIYA YUTAKA
IPC: G06F17/50
Filed: 1997-10-08
Abstract: PROBLEM TO BE SOLVED: To improve the delay of a circuit by calculating the slack of the node of the circuit in a technology independent level by using a delay evaluation by path mapping. SOLUTION: A means 1a of a circuit delay calculating means 2 calculates the arriving time of the node of a circuit by operating path mapping by using the library cell information of a technology library 3. A means 1b calculates the slack value of a node in the circuit based on the necessary time of an outside output node applied according to the arriving time and specification. When the slack value of the circuit is calculated, a circuit delay improvement processing means 1 selects the node with the small slack value and delay improvement effects, operates a delay improvement processing, and substitutes it for the original node. A circuit delay calculating means 2 calculaes the slack value in the same way for the circuit data to which the delay improvement processing is operated.  The above processing is repeated so that the circuit delay can be optimized, and the circuit data after the delay improvement are outputted.
Patent JP-H11111069-A (JP)
Title: Electric wire for bathroom apparatus
Inventor: GANJI NOBUO
IPC: H01B7/02
Filed: 1997-10-08
Abstract: PROBLEM TO BE SOLVED: To connect them without boring a hole on a wall by providing a circular part having a circular or almost elliptic cross-sectional shape and a flat part which is connected to this and is wired in a bathroom and has a flat cross-sectional shape, in an electric wire to supply power or transmit a communication signal from the outside of the bathroom to an apparatus in the bathroom. SOLUTION: An electric wire 6 for a bathroom apparatus 3 such as Jacuzzi has a flat part 6a of a conductor such as copper doubly covered with an insulator in the middle of a circular part 6b of a cable and a cord. A part or the whole of the flat part 6a is desirably covered with a hard material such as metal, a resin or wood having a large number of cut lines, and can easily bend, and damage is prevented. The flat part 6a is used in a clearance having packing between an opening/closing door 8 and a door frame of a bathroom 1, and the electric wire 6 is wired. A connecting case having a terminal block outside the bathroom 1 and connecting casing whose inside is molded of a resin to improve moisture resistance on the inside, are desirably arranged, and the flat part 6a and the circular part 6b are reliably connected to each other.
Patent JP-H06103637-A (JP)
Title: Magneto-optical recording method
Inventor: TAKAHASHI MASAYOSHI
IPC: G11B11/10
Filed: 1992-09-18
Abstract: PURPOSE:To improve the asymmetry of a magnetic domain shape and to enable recording and erasure with a large C/N and high reliability by performing the recording and the erasure while moving the irradiating position with a laser beam in a direction same as the moving direction of a magneto-optical recording medium. CONSTITUTION:At the time of the recording or the erasure, the irradiating position with the laser beam 1 is moved in the direction same as the moving direction of the magneto-optical recording medium 2. In order to move the irradiating position, a method for shifting the laser beam 1 for a minute angle by using a light deflector 4 is appropriate. For the light deflector 4, an element using an acoustooptical effect or the element using an electro-optical effect can be used. Thus, temperature distribution optimum for the recording and the erasure can be formed and recording and erasure operations can be surely performed.
Patent JP-H09117716-A (JP)
Title: Coating agent composition and polycarbonate product coated with same
Inventor: WAKIZAKA YASUHIRO
IPC: C08F290/00
Filed: 1995-10-24
Abstract: PROBLEM TO BE SOLVED: To enhance surface hardness, chemical resistance and work efficiency and to ensure resistance even to high deformation by using a compsn. obtd. by blending specified resin components such as a monomer having a di(meth) acryloyl group represented by a specified formula with a photopolymn. initiator in a specified ratio. SOLUTION: A blend is prepd. by blending 5-30wt.% multifunctional monomer selected from among methacrylic esters of (di)pentaerythritol with 10-40wt.% monomer having a di(meth)acryloyl group represented by the formula, 20-60wt.% multifunctional methacrylic-esterified polyester polyol and 10-50wt.% multifunctional methacrylic-esterified urethane, and 100wt.% of the blend is further blended with 0.1-10wt.% photopolymn. initiator to obtain the objective coating agent compd. In the formula, R1 is H or methyl and R2 is a 2-9C alkylene.
Patent JP-H07124480-A (JP)
Title: Joining method of end face of metallic catalyst carrier
Inventor: IIDA SEIZO
IPC: B01J35/04
Filed: 1993-11-04
Abstract: PURPOSE:To arrange the end part of a flat plate and corrugated plate of the end face of a honeycomb body after joining by melt joining method in the uniform position and to prevent the generation of metal balls. CONSTITUTION:This method is a method for joining the flat plate 10 and the corrugated plate 11 at the end face of the nearly cylindrical honeycomb body 1 made by laminating alternately the flat plate 10 and the corrugated plate 11, and the flat plate 10 has a projecting part 13 projecting outside from the corrugated plate 11 in axial direction at the end face of the honeycomb body and the flat plate and the corrugated plate joined to each other at the end face by melting projecting part 13. The irregular arrangement of the end face is prevented by joining the flat plate 10 to the corrugated plate 11 by the infiltration of the molten metal made by melting the projecting part 13 into the contact part of the flat plate 10 with the corrugated plate 11 by the capillary phenomenon.
Patent JP-H09115984-A (JP)
Title: Manufacture of semiconductor device
Inventor: YAMAGISHI MACHIO
IPC: H01L21/336
Filed: 1995-10-24
Abstract: PROBLEM TO BE SOLVED: To improve such characteristics as the data retaining characteristic and durability of a non-volatile memory cell by forming a gate insulation film on a wafer, carrying the wafer to a device for depositing a conductive film without exposing to atmosphere and depositing the conductive film for constituting a floating gate. SOLUTION: A gate insulation film and a conductive film for constituting a floating gate stacked on it are formed, thus manufacturing a semiconductor device including a non-volatile memory. In that case, a process for forming the gate insulation film on the wafer, a process for carrying the wafer from a device for performing the process to a device for depositing the conductive film without exposing to atmosphere, and a process for depositing the conductive film on the wafer within the device are provided. For example, a gate oxide film is formed within a second process module CH2. Then, the wafer is carried into a third process module CH3 via an evacuated transfer module TM, where polysilicon is formed by the CVD.
Patent JP-H04151193-A (JP)
Title: Liquid crystal projector
Inventor: HARA MASAHARU
IPC: G03B33/12
Filed: 1990-10-15
Abstract: PURPOSE:To obtain a high-contrast image by making the direction of the transmission axis of a linear polarized wave, which is emitted by a liquid crystal panel, uniform to a vertical direction through a phase difference plate and projecting the wave on a polarizing screen which is set to a vertical transmission axis. CONSTITUTION:The light emitted by a light source 2 and light beams of respective colors which are reflected by the parabolic surface of a reflector 1 and separated by the primary colors are linear polarized waves which have axes of transmission at 45 deg. to a horizontal when emitted from a projection-side polarizing plate 10. The 1/2-wavelength phase plate 14 for respective wavelength ranges is arranged behind the projection side of each polarizing plate 10 and rotates the polarized waves so that the directions of the transmission axes are perpendicular to the horizontal. Thus, the polarized waves are rotated and then the light projected by a projection lens 15 becomes a linear polarized wave having a vertical transmission axis and is projected on the polarizing screen 16 matched with the vertical transmission axis. At this time, the external light made incident on the polarizing screen 16 is cut to a half. Consequently, the high-contrast image which is lowered in black level is obtained.
Patent JP-H02120888-A (JP)
Title: Picture display device
Inventor: SAKAMOTO KOICHIRO
IPC: G09G3/38
Filed: 1988-10-31
Abstract: PURPOSE:To complete a picture display in a short time with a picture display device and, at the same time, to form the circuit of the device easily by connecting flip flop circuits, each of which is constituted of two thin-film transistors and two thin-film resistances, between a picture signal output circuit and each switching transistor. CONSTITUTION:FF (flip flop) circuits 34, each of which is constituted of two TFTs (thin film transistors) 44a and 44b and thin-film resistances 45a and 45b at every EC picture element (electro-chromic displaying picture element) 2b and the FF circuits 34 secure the electric path to one prescribed displaying element 2b from a power feed circuit by setting the conducted state of a switching transistor 42 and cause color developing operations to be started. The thin film resistances 45a and 45b are formed of the same laminated silicon films as those of the TFTs 44a and 44b constituted of an amorphous silicon layer and N<+> silicon layer. Therefore, a picture display is completed in a short time and, at the same time, the flip flop circuits 34 is formed easily.
Patent JP-H07110500-A (JP)
Title: New organic superlattice photoelectronic element
Inventor: IMANISHI YASUO
IPC: H01L51/00
Filed: 1993-10-08
Abstract: PURPOSE:To provide a nonlinear optical element using an org. superlattice as a medium having nonlinear optical effects such as excellent optical mixing, optical parametric oscillation, optical harmonic wave generation, Pockels effect and Kerr effect. CONSTITUTION:This photoelectronic element is equipped with a medium which can be modulated by irradiation of light, injection of charges, or electric or magnetic field. The medium contains an org. superlattice structure in which regions of two or more kinds of compds. are joined. It is preferable that this superlattice structure has at least one joined part of compd. regions where the order of the ground energy levels in the regions on both sides of the joined part shows same tendency as the order of the specific excitation energy levels. Thereby, characteristics of elementary excitons such as excitons and polarons that are stabilized in the superlattice structure of the org. molecules are used to obtain a new org. superlattice optical element.
Patent JP-S61150379-A (JP)
Title: Manufacture of semiconductor device
Inventor: NUNOKAWA MITSUJI
IPC: H01L21/338
Filed: 1984-12-25
Abstract: PURPOSE:To shorten spaces among three electrodes of source/drain electrodes and a gate electrode largely by advancing the etching of a side surface, extending a gate electrode and forming the gate electrode when the source/drain electrodes are shaped through etching. CONSTITUTION:Au/AuGe 13 is evaporated onto an epitaxial layer 11 for forming an element, and a photo-resist pattern 12 is shaped. The Au/AuGe is removed through a wet type etching method, and side surfaces are etched. Al films 15, 15' are evaporated, the photo-resist 12 and the Al films 15' are removed, and the Al gate electrode 15 is formed. According to the constitution, the gate electrode is disposed between a source electrode and a drain electrode through self-alignment, and size between a source and a gate takes a minute value, thus obtaining a Schottky-barrier gate FET having small resistance between the source and the gate, then lowering a noise figure.
Patent JP-H11177980-A (JP)
Title: Device and method for coding/decoding adaptive interlace scanned shape information
Inventor: CHUN SUNG-MOON
IPC: H04N19/00
Filed: 1998-09-29
Abstract: PROBLEM TO BE SOLVED: To improve the encoding efficiency of interlace scanned shape information by determining whether the above information is to be encoded in each frame or in each field in accordance with the moving amount of a binary shape information block. SOLUTION: A binary alpha block(BAB) division means 51 divides inputted binary shape information in each BAB having a specified size. A coding mode determination means 52 inspects the similarity among inputted BABs and determines whether these BABs are to be encoded in each frame or in each field. A switching means 53 switches each inputted BAB in accordance with an outputted coding mode signal SCM. Namely the means 53 switches the BAB so that the BAB is inputted to a frame type coding means 56 when the signal SCM is in a frame type mode or the BAB is inputted to a field type coding means 57 when the signal SCM is in a field type mode.
Patent JP-H02164354-A (JP)
Title: Method and instrument for
Inventor: TOOMASU EE GUREIZU
IPC: G01N33/74
Filed: 1989-10-25
Abstract: PURPOSE: To judge no possibility of conception by a sexual act until the beginning of the next menses, by determining whether the level of prequanediol-3α- glucuronide(PDG) in a urine sample goes over the threshold value or not. CONSTITUTION: Since free PDGs in a urine sample and an enzyme-PDG conjugate body compete with each other for a limited anti-PDG combining position on membrane, the quantity of enzyme combined with the membrane can be obtained by the relative quantity of free PDGs existing in the urine sample. After a time sufficient to reach an equilibrium state is elapsed, the conjugate body of excess free PDGs and enzyme-PDG is removed by washing, then an enzyme substrate is applied on the membrane. A system of the enzyme and the substrate is selected to form a precipitated colored substance on the membrane. Since the quantity of the combined enzyme is inverse proportional to the quantity of the free PDGs in the urine sample, the strength of the color on the membrane 16 is inverse proportional to the PDG concentration in urine.  That is, high color intensity shows that only little or no quantity of PDG exists in the urine sample, and, on the other hand, low or color intensity shows that there is high concentration of PDG in the urine sample.
Patent JP-H08137332-A (JP)
Title: Image input and output device
Inventor: OHARA EIJI
IPC: G06T1/00
Filed: 1994-11-10
Abstract: PURPOSE: To copy a colored original with good image quality. CONSTITUTION: After dividing into each area such as a character and a pattern, in accordance with the feature of document image data, information on image contents and positions, etc., in the areas obtained as the division results are stored with reference to respective areas. The existence of a color, the position of the color and the kind of the color, etc., in every area are identified by a color information identification circuit 6, then, the identification results are stored by a color information memory. And an image processing with appropriately switched processing contents in every area is performed for the supplied document image by an image processing circuit 8 while referring to the area division results and the color information identification results.
Patent JP-2000180830-A (JP)
Title: Fixing structure for display panel
Inventor: ISHII TAKAYUKI
IPC: G02F1/1333
Filed: 1999-09-29
Abstract: PROBLEM TO BE SOLVED: To prevent the splash of solder by providing an opening part or a notch part in the solder fixing part or a solder fixing frame in an LCD panel unit. SOLUTION: An LCD panel 1 and a holding substrate 2 constitute an LCD panel unit. The holding substrate 2 has a solder fixing part, adhesion with solder is requested here and Fe-Ni alloy is used. A round opening part is formed in the solder fixing part, namely, a part A in the holding substrate 2. In a panel fixing frame 3, the wettability of solder is requested in the similar way as the solder fixing part of the holding substrate 2 and the material of permalloy is suitable. When the flux of cream solder sandwiched by the solder fixing part and the solder fixing frame evaporates with the existence of the opening part or a notch part, it can be evaporated from the opening part or the notch part and therefore the slash of solder to a periphery can be suppressed. Since solder leaks to the opening part or the notch part, the intensity of solder in the solder fixing part can be increased.
Patent JP-S62135677-A (JP)
Title: Refrigerant compressor
Inventor: HASHIMOTO YUKIKAZU
IPC: F04C29/04
Filed: 1985-12-09
Abstract: PURPOSE:To improve both the heating capability at a low temperature and the cooling performance at a high temperature by providing fins made of shape memory alloy erected or prostrated in response to the high or low temperature at the upper end of a rotor constituting a motor section arranged in an enclosed casing. CONSTITUTION:A motor section 5 constituted of a rotor 3 and a stator 4 is fitted below a machine section 2 in an enclosed casing 1. The refrigerant sucked into a compression chamber 7 through an intake hole 6 is compressed, discharged into an enclosed casing 1 through a discharge hole 8, then discharged through a discharge pipe 9. In this device, fins 11 made of profile memory alloy are fixed to the upper end 10 of the rotor 3 with bolts 12. Thereby, when the temperature in the enclosed casing 1 is abnormally increased in summer, for example, the fins 11 are erected, thus the temperature in the enclosed casing 1 can be lowered due to the cooling effect of the fins 11. Accordingly, projection or the like of motor windings can be attained.
Patent JP-H06104698-A (JP)
Title: Digital filter
Inventor: KUCHIKI NOBUO
IPC: H04N7/00
Filed: 1992-09-18
Abstract: PURPOSE:To provide the inexpensive digital filter from which a signal multiplied with an indefinite multiplier coefficient is not outputted when a content of a coefficient loader is rewritten and which does not allow a multi-screen display device to display a picture whose picture quality is deteriorated when the digital filter is applied to the multi-screen display device. CONSTITUTION:Till the rewrite of a content in coefficient loaders 9-12 is finished, only one of four switches 13-16 is switched to fixed data 1 and the remaining three switches are switched to fixed data 0. Indefinite multiplier coefficient is not multiplied by multipliers 4-7 for this period and a signal not applied with filter processing is outputted from an adder 8.
Patent JP-H03183675-A (JP)
Title: Coating of air tight substrate in inert gas atmosphere
Inventor: ROOREN ANDORIYUU HARUSUKA
IPC: H01L21/316
Filed: 1990-10-17
Abstract: PURPOSE: To improve anticorrosiveness and wear resistance by heating a specific preceramic material which is formed by applying and drying its solution on a substrate.  
     CONSTITUTION: A solution containing a solvent and 0.1 to 35 wt.% one or more kinds of preceramic materials selected from hydrogen silsesquioxane resin and hydrolyzed or partially hydrolyzed compounds of the formula (R: an alkyl, aryl, or unsaturated hydrocarbon group, (x): 0 to 2) is applied over the substrate and dried to deposit a preceramic coating on the substrate. Then this substrate is heated in an inert gas atmosphere of 500 to 100°C for 5 to 3 hours to make the preceramic coating into ceramic, thereby forming a ceramic or ceramic-like coating. 
     COPYRIGHT: (C)1991,JPO
Patent JP-H06132015-A (JP)
Title: Deuterium discharge tube
Inventor: MIYASHITA HISASHI
IPC: H01J61/68
Filed: 1992-10-15
Abstract: PURPOSE:To provide a deuterium discharge tube with a long life by suppressing the decrease of deuterium gas. CONSTITUTION:A small cell 12 for supplying deuterium is installed in the inside of a discharge tube bulb 1. As a result, deuterium is supplemented in quantity corresponding to the amount of the deuterium dispersed and lost.
Patent JP-S61149866-A (JP)
Title: Semiconductor integrated circuit
Inventor: TANIGUCHI TAKASHI
IPC: G01R25/00
Filed: 1984-12-24
Abstract: PURPOSE:To inspect the phase difference of an internal signal accurately with simple constitution by outputting a pulse signal corresponding to the time difference of variations between two logical signals in a semiconductor integrated circuit to the outside of the semiconductor integrated circuit. CONSTITUTION:An internal signal generating circuit 1 generates and outputs two internal signals A and B to a logical circuit 2. If the internal signals A and B have a phase difference, an exclusive OR circuit 3 generates and outputs a a phase difference signal C with pulse width corresponding to the phase difference to an output terminal 6 through an output control circuit 4 and an output buffer circuit 5. The pulse width of this phase difference pulse signal C is measured to know the phase difference between the internal signals A and B. At this time, paths of the internal signals A and B to the output terminal 6 become equal, so the pulse width of the phase difference pulse signal is set equal to the phase difference between the internal signals A and B.
Patent JP-2001068422-A (JP)
Title: Manufacture of semiconductor base material
Inventor: HANNA JUNICHI
IPC: G02F1/136
Filed: 1999-08-24
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing an Si crystalline semiconductor useful for manufacturing a semiconductor element excellent in crystallinity at 500 deg.C or below by suppressing occurrence of powder in a CVD device, related to manufacturing of an Si semiconductor polycrystal base material. SOLUTION: In the presence of gas having chemical etching characteristics to an Si at 200-500 deg.C, a silane material gas diluted with a carrier gas is thermally activated using a heated base body to form a crystalline semiconductor material whose main component is Si. The flow rate ratio between the gas having chemical etching characteristics and silane material gas (etching characteristics gas/silane material gas) is preferred to be 0.01-1, and the gas having the chemical etching characteristics is selected among such halogen as fluoride, chlorine, and bromine, such halogen fluoride as ClF3, ClF, BrF3, and BrF, NF3, or their mixture.