baber/WOPTO huggingface dataset:
Patent TW-406033-B (TW)
Title: Method of preparing catalyst for use in oxidation of carbon monoxide and hydrocarbons
Inventor: GRIGOROVA BOJIDARA
IPC: B01J37/12
Filed: 1995-02-08
Granted: 2000-09-21
Abstract: A method of preparing a catalyst for use in an oxidation of carbon monoxide and hydrocarbons, wherein the catalyst containing at least two metals captured on a porous oxide support selected from the group consisting of titania, silica, alumina, zirconia, ceria and mixtures thereof, at least one of the metals being capable of forming a reducible oxide, characterized in that providing solutions of the metals, impregnating the support with the solution of the metal which is capable of forming a reducible oxide, exposing the impregnated support to a reducing atmosphere at a temperature exceeding 300 DEG C and impregnating the thus treated support with the other solution.
Patent TW-265465-B (TW)
Title: Semiconductor element package
Inventor: KAGA YASUHISA
IPC: H01L23/28
Filed: 1995-05-12
Granted: 1995-12-11
Abstract: A semiconductor element package, which is characterized in comprising: semiconductor element(s) installed on the upper and/or lower parts in which the semiconductor is protruded with electrodes at the lower part and is attached with protruded printed circuit board; in which the protruded printed circuit board comprises: an insulative substrate which is integrally molded and has multiple protrusions on its lower part; electrodes formed by covering of the protruded conductive material; a circuit pattern installed on the upper and/or lower parts of the insulative substrate; and a conductor circuit which connects the electrodes and the circuit pattern.
Patent TW-348999-B (TW)
Title: Dihalopropene compounds, insecticidal/acaricidal agents containing same, and intermediates for their production
Inventor: SAKAMOTO NORIYASU
IPC: A01N39/00
Filed: 1995-07-31
Granted: 1999-01-01
Abstract: A dihalopropene compound of the following formula (I) in which R1 is C1-C10-alkyl, C1-C5-haloalkyl, C2-C10-alkenyl, C2-C6-haloalkenyl, C3-C9-alkynyl, C3-C5-haloalkynyl, C2-C7-alkoxyalkyl, (C1-C3)alkoxy(C1-C7)carbonylalkyl, C2-C7-alkylthioalkyl; Ce-C6-cycloalkyl optionally substituted by C1-C4-alkyl, C1-C3-alkoxyl or C1-C3-haloalkoxy; C4-C9-cycloalkylalkyl optionally substituted by C1-C4-alkyl; C5-C6-cycloalkenyl optionally substituted by C1-C4-alkyl; C6-C8-cycloalkenyl optionally substituted by C1-C4-alkyl; or radicals of the following formula Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9 or Q10, (Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9 or Q10).
Patent TW-369736-B (TW)
Title: Battery using time extending method
Inventor: TAKAHASHI YASUNORI
IPC: H01M10/44
Filed: 1995-10-06
Granted: 1999-09-11
Abstract: This invention relates to battery using time extending method, its characteristics is: to recharge battery under the condition of installing magnet to the surface of the battery. Especially appropriate to apply opposing the battery cathode and Magnet's N pole for installing magnet on the battery surface. And it is better to use a magnet with a surface magnetic flux density 500 to 5000 gauss.
Patent TW-339391-B (TW)
Title: The fusel injection equipment and method for forming oil-gas layer in Otto engine
Inventor: DR WOLFGANG HEIMBERG
IPC: F02M47/02
Filed: 1996-05-17
Granted: 1998-09-01
Abstract: A fusel injection equipment based on solid energy-storage principal, it is composed by piston pump with transmission piston unit. The piston unit will be pushed to pressure chamber at its initial position, and store the kinetic energy during the non-resistance acceleration process. Then, through the impacting motion to transfer the storing kinetic energy to fusel located in pressure chamber, for generating pressure impact to inject fusel by fusel injection nozzle. Its features are: The 2nd pressure chamber is located in transmission piston unit, and face to 1st pressure chamber; And transferring the kinetic energy, which is being stored during the motion process that is the transmission piston unit returned to initial position, to fusel located in pressure chamber.
Patent TW-444148-B (TW)
Title: Retardation film and method for producing the same, and liquid crystal display device
Inventor: NISHIGUCHI KENJI
IPC: G02F1/1335
Filed: 1996-08-03
Granted: 2001-07-01
Abstract: A retardation film made of a polymerized liquid crystal material of the present invention includes: a first region having a first flat surface pattern, and a second region having a second flat surface pattern, wherein a thickness in the first region is different from that in the second region, thereby retardations in the first region and in the second region are different from each other.
Patent TW-349260-B (TW)
Title: A method of forming a semiconductor device, a self-aligned overlapping bitline contact as well as a product formed by the method
Inventor: POSCHENPIEDER BERNHARD
IPC: H01L29/78
Filed: 1996-09-23
Granted: 1999-01-01
Abstract: A method of forming a semiconductor device, comprising steps of: depositing a spacer dielectric film over a gate material; depositing a sacrificial polysilicon film over the spacer dielectric film; patterning the polysilicon film; depositing an oxide on the polysilicon film; planarizing the oxide; and removing the polysilicon film to form the semiconductor device.
Patent TW-382717-B (TW)
Title: Electrolytic capacitor with open circuit mode mechanism
Inventor: YAMADA MORIHIRO
IPC: H01G9/00
Filed: 1996-10-29
Granted: 2000-02-21
Abstract: An electrolytic capacitor (K1-K3) with an open circuit mode mechanism comprises: a metallic casing (32; 52; 62) for accommodating a capacitor element(31; 51; 61); an upper lid (33; 53; 63) which is mounted on a mouth of the metallic casing; a pair of metallic rivets (35; 54; 65) which are secured to the upper lid; a pair of external connection terminals (39; 55; 70) each of which is connected to one end portion of each of the metallic rivets; and a fixing member (40; 56; 71) which is molded by resin and is formed with a pair of through-holes (41; 57; 72) each for passing the other end portion of each of the metallic rivets therethrough such that the other end of each of the metallic rivets projecting out of the fixing member is connected, by metallic junction, to each of a pair of lead-out lead plates (42; 58; 73) drawn from the capacitor element. In case pressure in the metallic casing rises due to a malfunction of the electrolytic capacitor, the upper lid is deformed by this rise of the pressure, so that the metallic rivets are lifted in a direction away from the capacitor element upon this deformation of the upper lid and thus, the metallic junction between the other end of each of the metallic rivets end each of the lead-out lead plates is cut off, thereby resulting in break of an electric circuit of the electrolytic capacitor.
Patent TW-406334-B (TW)
Title: Using N2 implantation to improve the high temperature stability of silicide
Inventor: TSUEI BING-YUE
IPC: H01L21/322
Filed: 1997-01-14
Granted: 2000-09-21
Abstract: A process method of using N2 implantation to improve the high temperature stability of the silicide; firstly, perform N2 implantation on the P-type silicon wafer. Then, the metal titanium will be deposited on the surface of the whole wafer with sputtering way. Finally, form the titanium silicide thin film; the titanium silicide thin film is usually formed with two stage annealing during self-alignment process. The titanium nitride covered on the surface of the wafer and the non-reacted titanium could be removed by wet-etching and be dissolved in the chemical solution composed by the hydrogen dioxide, ammonia hydroxide and water. The purpose of N2 implantation is to increase the high temperature stability of the silicide; therefore the nitrogen molecule ion is implantated onto the surface of the wafer; then, form thick titanium silicide thin film. The nitrogen implanted herein could be molecule or atom form.
Patent TW-318259-B (TW)
Title: Preparing method of observing chip sample by backside emission
Inventor: HORNG HUEY-CHYUAN
IPC: H01L21/02
Filed: 1997-03-26
Granted: 1997-10-21
Abstract: A preparing method of observing chip sample by backside emission comprises of the steps: (1) supplying one circuit board, on which there are one observing hole, multi-set electric connection region, located around the observing hole, constituted from one first electric contact and one second electric contact, in which the first electric contact in those electric connection regions is connected to the second electric contact by first conductive wire; (2) supplying one cut chip, whose area is larger than the observing hole on the circuit board, including first chip region and second chip region, and on the first chip region and the second chip region there are multiple bonding pads; (3) after polishing the chip backside, pasting it to the observing hole on the circuit board; (4) with second conductive wire connecting each bonding pad on first chip region to first electric contact of one corresponding set of electric connection region on the circuit board.
Patent TW-425409-B (TW)
Title: Process for the polymerisation of conjugated diene monomers
Inventor: BEAN JR ARTHUS ROBINSON
IPC: C08F297/02
Filed: 1997-05-26
Granted: 2001-03-11
Abstract: The invention provides a process for the polymerisation of conjugated diene monomers which comprises anionically polymerising the monomers in the presence of an anionic polymerisation initiator and a microstructure control agent for controlling the vinyl content of the polymer so obtained, whereby the control agent is added to the polymerisation mixture in two or more doses, or continuously.
Patent TW-351905-B (TW)
Title: System and method for using television schedule information
Inventor: SCHEIN STEVEN
IPC: H04N5/445
Filed: 1997-06-25
Granted: 1999-02-01
Abstract: A television schedule system for displaying television schedule information on a television screen includes a program guide having a schedule information area that depicts the programs that are being presented on each channel at each time, the schedule system comprises: a browse window through the schedule information area to obtain part of more information about the programs in other interests, the browse window includes a program guide to display the program not on the currently-turned channel; an input device used to start up and shut down the browse window, the input device includes a controller to browse through the channels for easy selecting a program on the television screen.
Patent TW-340286-B (TW)
Title: Power presettng in a radio communication system
Inventor: PERSSON ANDERS HA KAN
IPC: H04L29/02
Filed: 1997-07-21
Granted: 1998-09-11
Abstract: A sort of power control method in radio communication systems, having the following steps: use of a plurality of transmission signals of similar transmission grading from the base station to each of a plurality of mobile stations, said plurality of mobile stations forming a group of mobile station collection; detection at the base station of variation of said mobile station collection; and determination of a plurality of power adjustment values for said similar plurality of of transmission power gradings for compensation of said variation of said plurality of transmission power gradings in said mobile station collection.
Patent TW-414988-B (TW)
Title: Doped silicon-substrate
Inventor: BEHNKE GUDRUN
IPC: H01L21/22
Filed: 1997-07-29
Granted: 2000-12-11
Abstract: It is proposed to arrange the silicon-oxide layer 3, which acts as diffusion-barrier for doped material, between silicon-substrate 1 and polysilicon layer 4. Thus no additional action is necessary to prevent the auto-doping effect and the gettering action of said polysilicon layer 4 on the rear side (2) of said silicon-substrate can be preserved.
Patent TW-418265-B (TW)
Title: Process for melt-spinning a synthetic polymer into a multiplicity of filaments and device suitable for detecting a broken filament in a multiplicity of filaments
Inventor: NGUYEN YOUNG DUNG-THANH
IPC: B65H63/032
Filed: 1997-08-27
Granted: 2001-01-11
Abstract: An improvement in a process for melt-spinning a synthetic polymer into a multiplicity of filaments, comprising extruding the molten polymer through spinning capillaries into filamentary streams, quenching said filamentary streams with cooling air to harden the streams into filaments, and applying finish to said filaments, and wherein the improvement comprises the capability to sense and record the presence of a broken filament by passing said filaments past a flexible cantilever beam 41 that is spaced from said filaments at a predetermined distance from said filaments, and wherein a piezoelectric film sensor 47 is secured to said beam, and wherein said film sensor 47 is secured to said beam, and wherein said film sensor is part of an electric circuit containing also means for recording electric impulses from said film sensor, whereby impact from a filament defect on said beam will cause said beam to flex and stretch said film sensor, and will initiate an electric impulse from the film sensor in said electric circuit, and wherein said electric impulse is recorded.
Patent TW-371706-B (TW)
Title: Method of forming gas pipe adazpters
Inventor: QIU HONG-ZHANG
IPC: F24C3/00
Filed: 1997-11-13
Granted: 1999-10-11
Abstract: The present invention provides a method of forming gas pipe adapters, having the forming method the following steps: (1) forming of an adapter having a flat outer wall using a roll press, for forming by rolling adapters in concave lines; (2) consideration: said roller press being formed by 2 fixation rollers and 1 dynamic roller located between 2 fixed rollers, forming thus a roller press for disposing the adapter upright, and the outer walls of the 3 rollers having a plurality of concave curves as required; (3) setting of the rolling speed of the roller press given in step (2) thus to create press and minimum pulling force; and; create a restraining, coordinating adjustment to the drive that drives said roller; (4) after being the roller press referred in step (3) formed by roller pressing between the 2 fixed roller and the front dynamic roller, being the section directly formed with a plurality of concave curved lines along the concave curve on the surface of the roller press, without becoming thinner or less rigid; thus, by means of the aforementioned forming method, the adapters would be kept during the forming process in optimal performance and, after rolling, the section would not become thinner or less rigid, or create chips, assuring the quality of formed adapters.
Patent TW-479066-B (TW)
Title: Open cell foamed articles including silane-grafted polyolefin resins
Inventor: BAMBARA JOHN D
IPC: C08J9/00
Filed: 1997-11-15
Granted: 2002-03-11
Abstract: Open cell foamed articles including silane-grafted single-site initiated polyolefin resins are described. The single-site initiated olefin polymer resin can be a polyethylene, a copolymer of ethylene, a C3-C20 alpha-olefin and C4-C20 diene. The open cell foamed articles have good cushioning properties and can be non-allergenic.
Patent TW-401544-B (TW)
Title: Electronic equipment control apparatus, electronic equipment control method and electronic equipment
Inventor: FUCHU KATSUKI
IPC: H04N7/24
Filed: 1998-02-10
Granted: 2000-08-11
Abstract: The object of the present invention is to provide an electronic equipment control apparatus, an electronic equipment control method and electronic equipment that require no operations to install software in the electronic equipment control apparatus. The solution is such that the user interface information required for controlling the AV stereo system is pre-stored in an internal ROM program. In connection with the IEEE 1394 cable, the user interface information is transfer to a PC module while turning on the power supply initially.
Patent TW-362245-B (TW)
Title: Manufacturing method of lightly doped drain transistor of inverse T type gate
Inventor: WU SHYE-LIN
IPC: H01L21/28
Filed: 1998-05-15
Granted: 1999-06-21
Abstract: A kind of manufacturing method of lightly doped drain transistor. The method is applied to the substrate which has a gate dielectric layer. There forms at least two non-crystallized silicon layer at the specific position, then forms a buffered layer at the specific position on the non-crystallized silicon layer. The method improve the coarse transistor of hot carriers that enhances the driving force of transistor and reduce the gate-induced drain leakage effect.
Patent TW-398081-B (TW)
Title: Thin film transistor and fabrication method therefor
Inventor: GIL GYOUNG-SEON
IPC: H01L21/336
Filed: 1998-08-27
Granted: 2000-07-11
Abstract: A thin film transistor and a fabrication method therefore, which thin transistor includes: a stepped substrate provided with a sidewall between upper portion and lower portions thereof; an active layer formed on the substrate; a gate insulation film on the active layer; a gate electrode formed on the gate insulation film corresponding to an upper part of the sidewall of the substrate; an insulation film formed on a part of the gate insulation film between the gate electrode and the lower portion of the substrate; and impurity regions formed in the active layer corresponding to the upper and lower portions of the substrate. The impurity regions are formed by a self-aligned process using an additional mask, which controls the length of channel and offset regions in accordance with the thickness of the gate electrode and insulation film, respectively, for thus obtaining a more stabilized offset current and accordingly improving the reliability and reproducibility of the semiconductor device.
Patent TW-378328-B (TW)
Title: Wordline voltage generation circuit capable of storing multibit data in semiconductor memory device
Inventor: SAI HEIJUN
IPC: G11C5/14
Filed: 1998-10-07
Granted: 2000-01-01
Abstract: A semiconductor memory device comprises at least a memory cell for storing multibit data, said memory cell having a starting voltage which is one of plural starting voltages; at least a word line connected to said memory cell; and a word line voltage generation circuit for continuously generating a plurality of word line voltages used on the word line when data are read from the memory cell during a data access operation period. Based on the device of the present invention, the gate and drain voltage of memory cell is kept constant by the self-adjustment of a circuit on the various word line voltages when the starting voltage of the memory cells or any one of the different word line voltages vary.
Patent TW-434879-B (TW)
Title: Semiconductor memory device having a plurality of storage units
Inventor: TAKAHASHI HIROKI
IPC: G11C11/401
Filed: 1998-11-24
Granted: 2001-05-16
Abstract: A semiconductor memory device comprises a plurality of storage units, a timing control circuit and latch circuits. The timing control circuit connects those storage units and outputs a signal for initializing each storage units, and a signal to pre-charge each storage units in predetermined sequence in predetermined timing. Each latch circuit connects each storage unit for latching the output signal status of the timing control circuit.
Patent TW-406435-B (TW)
Title: Semiconductor memory array with buried drain line and the manufacture method thereof
Inventor: KAO DAH-BIN
IPC: H01L21/8247
Filed: 1998-11-24
Granted: 2000-09-21
Abstract: There is provided a semiconductor memory array and the manufacture method thereof. The method comprises the steps of providing a substrate; forming a plurality of memory cell field-effect transistor, on said substrate and arranged to the transistor row, each transistor having a channel region which is inserted between the drain and source region and covering a control gate region; a plurality of first diffusion extension regions formed inside said substrate that connects the drain region of each column of transistor; a plurality of second diffusion extension regions formed inside said substrate that connects the source region of each column of transistor; and a plurality of extension wiring formed inside said substrate that connects the control gate region of each row of transistor.
Patent TW-407275-B (TW)
Title: NOR-type nonvolatile semiconductor memory device and the method for reading thereof
Inventor: JANG CHEOL-UNG
IPC: G11C16/04
Filed: 1998-12-18
Granted: 2000-10-01
Abstract: A NOR-type read only memory is provided to improve a read-out performance, including a memory cell array having a plurality of memory cell blocks, each memory block including a plurality of bit lines, a column decoder for generating a plurality of decoding signals in response to a plurality of address signals, a first bias/ground selection control circuit for generating a plurality of first bias/ground selection signals determining bias conditions of one group of the plurality of bit lines, a first bias/ground selection circuit for establishing bias conditions of said one group of the plurality of bit lines in response to the first bias/ground selection signals generated from the first bias/ground selection control circuit, a second bias/ground selection control circuit for generating a plurality of second bias/ground selection signals determining bias conditions of the other group of the plurality of bit lines, and a second bias/ground selection circuit for establishing bias conditions of said the other group of the plurality of bit lines in response to the second bias/ground selection signals generated from the second bias/ground selection control circuit.
Patent TW-419695-B (TW)
Title: Electron emission device and production method of the same
Inventor: YAMADA JIRO
IPC: H01J9/02
Filed: 1998-12-29
Granted: 2001-01-21
Abstract: The present invention provide an electron emission device capable of deflecting emitted electrons to a predetermined direction and preferably emitting electrons with a small drive voltage as well as a production method of the same. The electron emission according to the present invention includes a layered body including an auxiliary electrode, a first insulation layer, a first gate electrode, a second insulation layer, an emitter electrode, a third insulation layer, and a second gate electrode formed in this order on a substrate. In this electron emission device, a hole is formed through the first insulation layer, the first gate electrode, the second insulation layer, the emitter electrode, the third insulation layer, and the second gate electrode, so that the auxiliary electrode is exposed at the bottom of the hole and the first gate electrode protrudes than the emitter electrode toward the center line of the hole.
Patent TW-502434-B (TW)
Title: Bottom electrode structure of capacitor and its manufacturing method
Inventor: LI SHIANG-FAN
IPC: H01L21/02
Filed: 1999-02-04
Granted: 2002-09-11
Abstract: There is provided a manufacturing method of bottom electrode of capacitor, which comprises: providing a substrate having a conductive area and sequentially formed thereon a first insulation layer, a stop layer and a second insulation layer; next, defining a second insulation layer, the stop layer and the first insulation layer to form a contact opening for exposing the conductive area of the substrate; forming a first conductive layer on the second insulation layer for filling up the contact opening electrically coupling to the conductive area; then defining a first conductive layer to form a planar type conductive layer; using the planar type conductive layer as a mask to anisotropically etch the second insulation layer until the surface is away from the stop layer by a second thickness; and finally, forming a second conductive layer on the surface of the second insulation layer and first conductive layer, then anisotropically etching the second conductive layer to form a C-shaped conductive layer on the planar type conductive layer, and isotropically etching the second insulation layer.