baber/WOPTO huggingface dataset:
Patent TW-I290630-B (TW)
Title: On-board diagnostic circuit for an integrated circuit, and method for performing real time diagnostic operations upon integrated circuit
Inventor: KIMELMAN PAUL
IPC: G06F11/267
Filed: 2003-11-04
Granted: 2007-12-01
Abstract: An integrated circuit having a plurality of functional circuits interconnected via a functional bus is provided with a diagnostic bus-master circuit which uses bus transactions on the functional bus to perform diagnostic operations. These diagnostic operations can be performed in real time during normal speed operation of the integrated circuit to produce more accurate diagnostic results. The diagnostic bus-master circuit is particularly useful for reading data values from memory or writing data values to memory as part of diagnostic operations.
Patent TW-I232190-B (TW)
Title: Chassis frame and body construction of motocycle
Inventor: MIZUTA RIKA
IPC: B62K11/02
Filed: 2003-11-05
Granted: 2005-05-11
Abstract: Because the carrier 15 and handgrip 16 are an integral body, they cannot be easily replaced. This invention thus aims to allow easy replacement and installation. When installing the carrier 15 and the handgrip 16, the appearance should also be improved. The front end of the carrier is connected to a side section grip 14 which was formed on the top of a receipt box 10, so that it can be locked to the side of the chassis frame. Furthermore, the handgrip 16 which was formed in another body is installed to the carrier 15. By such installation, because the side section grip 14 is located at the front of handgrip 16, balance at the time of the stand applying is ensured. In addition, because the handgrip 16 is also installed at the vicinity of the carrier 15, installation rigidity becomes high.
Patent TW-I229468-B (TW)
Title: Battery housing module and method of assembling
Inventor: LIAO FANG-YU
IPC: F21L4/00
Filed: 2004-01-20
Granted: 2005-03-11
Abstract: A battery housing module having a housing and a battery spring is provided. There is a slot having a groove formed on the sidewall of the housing. The battery spring comprises an elastic portion for contacting one end of a battery, and the width of the elastic portion of the battery spring is smaller then the width of the groove; a contact portion, electrically coupled to a printed circuit board assembled with the housing; and a body portion, connecting the elastic portion and the contact portion, and the width of the body portion of the battery spring is larger then the width of the groove. During assembling, the body portion is inserted into the slot and restricted by the groove, the elastic portion, however, projects from the groove due to its narrower width. The body portion keeps sliding in the slot until the contact portion arrives the predetermined position at the edge of the housing.
Patent TW-I244056-B (TW)
Title: Wiring substrate, electro-optic device and manufacturing method thereof
Inventor: AOKI KOJI
IPC: H05B33/00
Filed: 2004-01-29
Granted: 2005-11-21
Abstract: The present invention relates to a wiring substrate, electro-optic device and manufacturing method thereof. The purpose of the present invention is to reduce the horizontal asymmetry of bank. The wiring substrate includes: a substrate 10; a bank 30 disposed on the substrate 10 to divide plural areas; a conductive layer 52 formed between the bank 30 and substrate 10 and arranged in parallel; first and second wirings 54, 62. The first wiring 54 is formed at the position closer to the substrate 10 than that of the second wiring 62. The first and second wirings 54, 62 are arranged so that they deviate in the width direction. The conductive layer 52 is formed at the position closer to the said substrate 10 than that of the said second wiring 62. The said conductive layer 52 and the second wiring 62 are arranged so that they deviate in the width direction. The conductive layer 52 and the first wiring 54 are arranged so that they have a portion extending from the second wiring 62 in the opposite width direction with each other.
Patent TW-I233523-B (TW)
Title: Fast focusing method of digital camera
Inventor: SHIU SHIN-HUNG
IPC: G03B13/32
Filed: 2004-02-20
Granted: 2005-06-01
Abstract: A fast focusing method of the digital camera uses an auto focus algorithm to precisely calculate the optimal focusing view-finding position from the least number of view-finding points. Furthermore, the algorithm utilizes resolution relationship of those view-finding points to determine location of the optimal focusing view-finding position, and then employs the view-finding points near the optimal focusing view-finding position to calculate slope of the view-finding points so as to determine the real optimal focusing view-finding position. Therefore, the number of exposure and focusing time of the digital camera can be reduced to achieve the purpose of fast focusing.
Patent TW-I260828-B (TW)
Title: Electrical receptacle-type terminal
Inventor: DATA MARK M
IPC: H01R13/11
Filed: 2004-05-26
Granted: 2006-08-21
Abstract: An electrical receptacle terminal is provided for receiving a mating terminal pin. The terminal includes a front mating end, a rear terminating end and a generally U-shaped base portion between the ends. The base portion includes a base wall, a pair of continuous and solid side wall projecting upwardly from the base wall and a pair of contact arms projecting upwardly from each side wall. The contact arms have opposing contact portions defining multiple contact points on each side of the U-shaped base portion for engaging the terminal pin inserted between the pairs of contact arms.
Patent TW-I250596-B (TW)
Title: Wafer-level chip scale packaging method
Inventor: CHEN SHOU-LUNG
IPC: H01L21/60
Filed: 2004-07-23
Granted: 2006-03-01
Abstract: A wafer-level chip scale packaging method is disclosed, which includes following steps: providing a semiconductor wafer; bonding at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, parts of which electrically connect with the first chip; forming a conductive pattern layer on the surface of the first insulating layer, which electrically connects with the first conductive vias; forming a plurality of penetrating holes penetrating the wafer; filling a second insulating layer in the penetrating holes; and forming a plurality of second conductive vias in the second insulating layer, which also electrically connect with the first conductive vias.
Patent TW-I254824-B (TW)
Title: Light guide body, lighting device, liquid crystal display device, and manufacturing method of light guide body
Inventor: TORIHARA HIROSHI
IPC: G02B6/00
Filed: 2004-09-14
Granted: 2006-05-11
Abstract: In the present light guide body, a flat part is provided at an edge part of a fluorescent tube vicinal part (part that receives strong light), and a pear-skin texture pattern having a sine wave shape boundary is formed inside the flat part. Therefore, it is possible to alternately provide, along a direction to which the fluorescent tube extends, small pear-skin texture regions and small flat regions. That is, scattering intensity of the light guide body is set so that it becomes stronger gradually from the edge part close to the fluorescent tube toward the inside far from the fluorescent tube. The quantity of the light incident on the back surface becomes less from the edge part toward the internal side. Therefore, it is possible for the light guide body to uniformize a light scattering quantity of each portion of the back surface. As a result, the light guide body can uniformize the light emitted from a surface over the entire surface of the light guide body.
Patent TW-I250825-B (TW)
Title: Planar light source
Inventor: LIU YU-CHI
IPC: H05B41/295
Filed: 2004-11-26
Granted: 2006-03-01
Abstract: A planar light source including a transflective film, cold cathode fluorescence flat lamps and at least one reflective component is described to provide a uniform light source. A portion of the light emitted from the emitting areas of the cold cathode fluorescence flat lamps pass through the transflective film, and the other portion of the light is reflected to the reflective component by the transflective film. Then, the light is reflected to dark areas between the emitting areas to compensate the brightness of the dark areas. When the brightness of the dark areas is compensated, the planar light source provides uniform light without dark stripes.
Patent TW-I298725-B (TW)
Title: Method for the dircet and continuous production of hollow articles from a polymer melt
Inventor: OTTO BRIGITTA
IPC: B29C45/00
Filed: 2004-11-26
Granted: 2008-07-11
Abstract: A method for the production of formed products from a highly-condensed polyester melt, in which the melt never solidifies between the polycondensation reactor and the forming unit and there is no degassing device between the final reactor and the forming unit. Independent claims are also included for (1) apparatus for the process as defined above, in which there are at least two additive feed units in the melt line between the polycondensation reactor and the forming unit (2) apparatus for the process as defined above, in which the pipeline between the last additive feed unit and the forming machine contains a rotating pipe joint enabling horizontal movement of the forming machine.
Patent TW-I272530-B (TW)
Title: Method for accessing file in file system, machine readable medium thereof, and related file system
Inventor: HSU CHIA-JUNG
Filed: 2004-12-16
Granted: 2007-02-01
Abstract: A file accessing method used in a file system is disclosed. In the file system, a plurality of storage blocks are used to store a file. Each of the plurality of storage blocks corresponds to an index value, and the plurality of the index values form a single direction chain. The method includes the following steps: (a) setting at least one break point according to the single direction chain formed by the plurality of the index values; and (b) accessing the file according to the at least one break point and the single direction chain formed by the plurality of the index values.
Patent TW-I248219-B (TW)
Title: LED module
Inventor: WU MENG-CHAI
IPC: H01L33/48
Filed: 2005-02-18
Granted: 2006-01-21
Abstract: An LED module is provided. In the present invention, a common print circuit board is utilized to provide electric current and isolated from the heat-dissipating mechanism, and the heat conductive element, protruding from the LED package structure, is connect to another heat conductive element to drive out the internal heat.
Patent TW-I249994-B (TW)
Title: Head-wearing device with snooperscope
Inventor: GUO CHENG-LIANG
IPC: A42B7/00
Filed: 2005-03-07
Granted: 2006-03-01
Abstract: Provided is a head-wearing device with snooperscope comprising: a head ring having a front section, a rear section and two turning sections wherein the two turning sections connect with the front section and the rear section and respectively extend downwardly, backwardly, which makes a height difference be existed between the front section and the rear section where the front section is higher than the rear section; a jaw belt having a main belt and two forking belts wherein one end of the two forking belts is fixed on both sides of the main belt, which makes the two ends of the jaw belt present a shape of Y, and both ends of the main belt as well as the external ends of the two forking belts are respectively fixed under both sides of the head ring; a head belt with its two ends being respectively fixed above both sides of the head ring; a protection pad detachably installed on the internal side of the front section of the head ring and a snooperscope fixing seat which is installed on the external side of the front section of the head ring and is used to combine with a snooperscope.
Patent TW-I268614-B (TW)
Title: Method for forming polycrystalline silicon thin film transistor
Inventor: SON KYOUNG-SEOK
IPC: H01L29/786
Filed: 2005-03-23
Granted: 2006-12-11
Abstract: A method for forming a polycrystalline silicon thin film transistor. The method includes the steps of: forming a polycrystalline silicon layer including multiple protrusions by crystallizing the amorphous silicon layer according to a crystallization method in which the multiple protrusions are formed due to collision between crystal grains; patterning the polycrystalline silicon layer in an active pattern which includes only two protrusions of the multiple protrusions, which are apart from each other and located at both sides of a gate electrode-forming area; applying a barrier layer on the patterned polycrystalline silicon layer while partially covering the two protrusions; and forming a source electrode and a drain electrode at the protrusion of the polycrystalline silicon layer formed at both sides of the gate electrode-forming area by ion-implanting dopants into a resultant lamination.
Patent TW-I291134-B (TW)
Title: Apparatus and method for managing registers in a processor to emulate a portion of a stack
Inventor: SHELOR CHARLES F
IPC: G11C5/00
Filed: 2005-04-01
Granted: 2007-12-11
Abstract: The present invention is generally directed to method and apparatus for emulating a portion of a stack. Certain embodiments of the invention manage a plurality of processor registers to store the top portion of the stack. Data is managed in these registers by managing a pointer that points to a current top-of-stack register. As data is pushed or popped from the stack, the top-of-stack point is incremented or decremented accordingly.
Patent TW-I257983-B (TW)
Title: V shape belt stepless gear
Inventor: ISHIKAWA HIDEO
IPC: F16H55/56
Filed: 2005-04-25
Granted: 2006-07-11
Abstract: The objective of the invention is to provide a V-belt type continuously variable transmission equipped with a reduction gear mechanism between an electric motor and a movable pulley half body made up of a part of a drive pulley, wherein the intrusion of dust into an engaging part of a drive gear and an idle gear in the reduction gear mechanism can be prevented by a relatively small cover member and the service life of the reduction gear mechanism can be improved while avoiding the upsizing of a transmission case. A reduction gear mechanism 66 is equipped with at least a drive gear 130 coaxially connected to an electric motor 65 and an idle gear 134 formed by integrally providing to an idle rotary shaft 133 a large gear 131 and a small gear 132 engaged with the drive gear 130. A cover member 147 in which a reduction gear chamber 146 for accommodating the drive gear 130 and the large gear 131 by being partitioned from another part in a transmission case 51 is formed in a space with the transmission case 51 is mounted in the transmission case 51 by forming a labyrinth passage 154 in a space with the large gear 131 and an opening 153 for penetrating the small gear 132.
Patent TW-I283156-B (TW)
Title: Flat panel display module assemblies
Inventor: LEE NAN-CHING
IPC: G09F9/30
Filed: 2005-04-28
Granted: 2007-06-21
Abstract: Flat panel display module assemblies are provided. A flat panel display module assembly includes a frame and at least a baffle. The frame includes a plurality of slots disposed on at least a side of the frame. A receiving space is formed at the center of the frame, so as to accommodate a substrate. The baffle includes a plurality of flexible buckle members joined in the slots correspondingly. The baffle is fixed to the side of the frame and abuts the substrate.
Patent TW-I285274-B (TW)
Title: Focus device of telescope
Inventor: GUO CHUEN-CHANG
IPC: G02B23/00
Filed: 2005-06-06
Granted: 2007-08-11
Abstract: rum to make axial displacement. By such arrangement, the focus drum is driven by the focus ring to make axial displacement only without changing its axis and, therefore, the axis of the eyepiece and the axis of the telescope stay unchanged on the same line to provide higher precision in focus adjustment.
Patent TW-I278114-B (TW)
Title: Semiconductor device
Inventor: YANAGIDA MASAMICHI
IPC: H01L29/772
Filed: 2005-07-20
Granted: 2007-04-01
Abstract: A conventional one-chip-dual type MOSFET has a high resistance value in the drain region and has a limit in reducing ON resistance of device because of the structure that two MOSFET chips having common drain region are arranged side by side. In the present invention, a first MOS transistor to which a first source electrode is connected and a second MOS transistor to which a second source electrode is connected are disposed on one chip adjacently and alternatively. The first source electrode and second source electrode are applied with different potential respectively. The two MOS transistors are ON/OFF controlled by one gate electrode. The ON-resistance may be reduced since the current flows around trench.
Patent TW-I265613-B (TW)
Title: Heat sink
Inventor: WANG CHING-CHUN
IPC: H01L23/36
Filed: 2005-08-24
Granted: 2006-11-01
Abstract: A heat sink is applied in a package structure. The heat sink includes a body, a first protruding portion and a second protruding portion. The body has a surface. The first protruding portion and the second protruding portion are disposed on the surface. A tunnel is formed between the first protruding portion and the second protruding portion. The tunnel is used for a molding flow passing therethrough. The body has a plurality of corners including a specific corner. The distance between the molding flow inlet and the specific corner is equal to or larger than that between the molding flow inlet and any of the other corners. The tunnel connects the molding flow inlet and the specific corner.
Patent TW-I260716-B (TW)
Title: Transistor structure preventing doped ions in source/drain from diffusing out of junction and fabrication method thereof
Inventor: LUO GUANG-LI
IPC: H01L21/38
Filed: 2005-09-23
Granted: 2006-08-21
Abstract: The present invention discloses a transistor structure preventing doped ions in source and drain from diffusing out of junction and a fabrication method thereof, which includes steps of forming an embedded source/drain composed of SiGe: C material containing doped ions on a semiconductor substrate; and using the characteristic that carbon can suppress doped ions to diffuse to form a source/drain possessing low contact resistance and suppressing doped ions to diffuse so as to further improve device reliability.
Patent TW-I290779-B (TW)
Title: Organic bistable device and method for manufacturing the same
Inventor: SUNG CHAO-FENG
IPC: H01L51/05
Filed: 2005-09-28
Granted: 2007-12-01
Abstract: An organic bistable device. The organic bistable device comprises a first electrode, a second electrode and an organic mixture layer, wherein the organic mixture layer is located between the first electrode and the second electrode. While a bias is applied between the first electrode and the second electrode, the metal material/doped metal particle is used as a mediator for injecting electrons. Therefore, both the writing/erasing cycle times and life time of an organic bistable device are increased. Moreover, the organic bistable device having an organic mixture layer with metal dopants possesses a relatively stable low conductance (off) state. Hence, by applying the voltage thereon, the organic bistable device can be well controlled to be turned on or turned off.
Patent TW-I291319-B (TW)
Title: Overturn structure of a dual-usage computer
Inventor: CHANG EN-BAIR
IPC: H05K7/14
Filed: 2005-10-04
Granted: 2007-12-11
Abstract: An overturn structure of a dual-usage computer is disclosed, which at least comprises a screen and a base. The screen comprises a first side face, a first pivot element, and a display. The first pivot element is fixedly mounted on the first side face. The base comprises a second side face, a second pivot element, and a top surface. The second side face is adjacent to the first side face. The second pivot element is fixedly mounted on the second side face. The top surface is mounted a keyboard set. The overturn structure comprises a dual-pivot element, which comprises a first pivot component, a second pivot component, and a connect component connected the first pivot component and the second pivot component. The first pivot component is pivoted to the first pivot element. The second pivot component is pivoted to the second pivot element.
Patent TW-I276540-B (TW)
Title: Method of fabricating micro-stamp for photoelectric process
Inventor: HSIEH KUO-HUANG
IPC: B41F17/00
Filed: 2005-11-30
Granted: 2007-03-21
Abstract: The present invention discloses a method of fabricating micro-stamp for photoelectric process. First, a mold with a plurality of concaves and a substrate are provided. Next, a filling process is performed to fill the concaves with a resin, wherein the resin comprises thermal curing resin or radiation curing resin. Then, a contacting process is performed to contact the mold with the substrate, wherein the filled resin in the cave directly and tightly contacts the substrate. Afterwards, a solidified process is performed to solidify the confined resin surround by the cave and the substrate. Finally, a mold releasing process is performed to fabricate the micro-stamp.
Patent TW-I283920-B (TW)
Title: Method of improving the alignment accuracy of semiconductor process and method of forming opening
Inventor: LIN SZU-MIN
IPC: H01L21/768
Filed: 2006-02-21
Granted: 2007-07-11
Abstract: A method of improving the alignment accuracy of the semiconductor is described. The method is used for photolithography process, and the photolithography process is aimed at the dielectric layer covered by a hard mask, wherein alignment marks are formed under the dielectric layer. The feature is the hard mask has an absorption index and a thickness, and the absorption index multiplied by the thickness is between 100 and 750. Thereby, the better range of the thickness can be determined to improve the accuracy of alignment.
Patent TW-I303094-B (TW)
Title: Semiconductor device, method for manufacturing semiconductor device, and cover frame
Inventor: SAITOH HIROSHI
IPC: H01L23/00
Filed: 2006-03-14
Granted: 2008-11-11
Abstract: A semiconductor device includes: a substrate; a semiconductor chip that is fixed to a first surface of the substrate; a chip covering lid body that is provided on the first surface of the substrate so as to cover the semiconductor chip and that forms a hollow first space portion that surrounds the semiconductor chip, and in which there is provided a substantially cylindrical aperture portion that extends to the outer side of the first space portion and has an aperture end at a distal end thereof and that is connected to the first space portion; and a first resin mold portion that forms the first space portion via the chip covering lid body and covers the substrate such that the aperture end is exposed, and that fixes the substrate integrally with the chip covering lid body.
Patent TW-I412593-B (TW)
Title: Method and tool for detecting genetic mutation
Inventor: LEE MING-SHENG
IPC: C07H21/00
Filed: 2007-08-02
Granted: 2013-10-21
Abstract: Methods for detecting genetic mutation allowing detection of very low frequency mutation are described. The methods comprise treating RNA: DNA heteroduplexes of interest with ribonuclease treatment coupled with DNA polymerase treatment. RNA: DNA heteroduplexes of interest are preferentially targeted by ribonuclease and subsequent sequence extension by RNA-primed DNA polymerase. The methods may be carried out partially or entirely manually, automatically, and combinations thereof. The methods may be performed wholly or partially in solution, on solid phase media, in large scale, adapted for high throughput analysis, and any combinations thereof. Apparatus and products for detecting genetic mutation are described.