baber/WOPTO huggingface dataset:
Patent JP-S62155744-A (JP)
Title: Controller for abrasion of brush for servomotor
Inventor: ICHIKAWA TATSU
IPC: H02K11/00
Filed: 1985-11-21
Abstract: PURPOSE:To issue the alarm for the lifetime of a brush positively by computing the degree of abrasion in consideration of integrating starting-number and the operating time even at the control mode of brush abrasion, the control mode of the operating time and the control mode of starting number. CONSTITUTION:A brush-abrasion controller for a motor is constituted of an input section 1, a central processing unit (CPU) 2, a starting-number counter 3, an operating-time counter 4, a control-mode selecting section 5, etc., and selects either of an operating-time control mode and a starting-number control mode by the control-mode selecting section 5 in response to the mode of the kind of the service of the motor. The integrating stating-number of the starting- number counter 3 is subtracted from brush-lifetime starting number, in which the integrating operating time of the operating-time counter 4 is considered, at the starting-number control mode in the selection, and the degree value of abrasion of a brush is obtained. The integrating operating time is subtracted similarly from the brush-life time, in which integrating starting number is considered, at the operating-time control mode, the degree value of abrasion of the brush is acquired, and the lifetime is controlled precisely.
Patent JP-H0899369-A (JP)
Title: Microlens array
Inventor: YAMADA HIROYASU
IPC: B29D11/00
Filed: 1994-09-30
Abstract: PURPOSE: To provide a microlens array capable of arranging incident lights into parallel lights and also then converging them. CONSTITUTION: A first plane convex microlens 19 is provided on the upper surface of a first surface flattened layer 18, and a second surface flattened layer 20 is provided on the entire of the upper surface thereof, and further a second plane concave microlens 21 is provided on the upper surface thereof. Only lights corresponding to the picture element reflected on the manuscript 22 are made into parallel lights by the second microlens 21, then they are converged by the first microlens 19.
Patent JP-H0731321-A (JP)
Title: Method of inserting pearl nucleus into pearl oyster
Inventor: ENDO FUMINORI
IPC: A01K61/00
Filed: 1992-09-29
Abstract: PURPOSE:To improve the production ratio of pearl oyster after insertion of pearl nucleus by inserting a pearl nucleus into a pearl oyster in the presence of a specific glucan and/or a microorganism capable of producing the glucan. CONSTITUTION:A pearl nucleus is inserted into a pearl oyster in the presence of a glucan having a main chain constituted of beta-1,3-glucoside bond and/or a microorganism capable of producing the glucan. After the pearl nucleus is inserted into the pearl oyster, the glucan constituted of beta-1,3-glucoside bond and/or the microorganism capable of producing the glucan may be administered to the pearl oyster.
Patent JP-H06107248-A (JP)
Title: Counterweight mounting device of forklift truck
Inventor: UCHIMOTO AKIRA
IPC: B62D49/08
Filed: 1992-09-29
Abstract: PURPOSE:To provide a counterweight mounting device of a forklift truck which completes mounting work of an auxiliary counterweight merely by placing the auxiliary counterweight and can fix the auxiliary counterweight merely by fastening and fixing a main counterweight with a bolt. CONSTITUTION:A side recessed section 29 and a bottom recessed section 30 are formed in an auxiliary counterweight 4, and the side recessed section 29 is engaged with an intermediate member 12 in the V shape and the bottom recessed section 30 is engaged with an axle mounting plate 13 to place an auxiliary counterweight 4. Then, a main counterweight 3 is placed on the auxiliary counterweight 4 and its rear section is fixed by a bolt 25. Thus, it is possible to fix the auxiliary counterweight 4, too.
Patent JP-H06108957-A (JP)
Title: Electronic control device for internal combustion engine
Inventor: KONDO KATSUHIKO
IPC: F02P5/15
Filed: 1992-09-29
Abstract: PURPOSE:To control ignition timing correctly even with the failure of a crank angle sensor necessary for ignition timing control by providing a failure detecting means and a selecting means for putting ignition timing control into practice. CONSTITUTION:An electronic control device 1A for an internal combustion engine has plural crank angle sensors 2, 4 for detecting a crank angle, and performs ignition timing control on the basis of at least one of the output signals of these crank angle sensors 2, 4. This electronic control device 1A has a microcomputer 12 and is provided with a failure detecting means and a selecting means. The failure detecting means detects the failure of the respective crank angle sensors 2, 4. On the basis of the output signal of the failure detecting means, in the case of detecting the failure of the crank angle sensor 2, for instance, the selecting means puts ignition timing control into practice on the basis of an output signal from the other crank angle sensor 4. The action of the internal combustion engine can be thereby continued.
Patent JP-S63114245-A (JP)
Title: Laminated semiconductor package
Inventor: TAJIMA AKIRA
IPC: H01L25/11
Filed: 1986-10-31
Abstract: PURPOSE:To make it possible to use a laminated type package when outer leads are formed, by extending at least one outer lead of laminated semiconductor devices longer than other leads. CONSTITUTION:Two kinds of semiconductor devices 62a and 62b are combined and laminated up and down. Outer leads parts 44a of the upper device are made longer than lower leads 44b. When the outer lead parts are formed, use as a laminated package can be carried out. The packaging density (or the number of pins) at the time of mounting on a printed board is made high by the up and down combination. The devices can be applied in many uses owing to a diversified combinations.
Patent JP-H06108992-A (JP)
Title: Pump
Inventor: TOYAMA YOSHIYUKI
IPC: F04D29/046
Filed: 1992-09-29
Abstract: PURPOSE:To eliminate a clearance between a pulley and a spacer so as to improve the fit-in force of the spacer. CONSTITUTION:A pump is provided with a driving shaft 3 rotatably supported to a pump housing 1 through a bearing 2, a pulley 4 fitted to the tip of the driving shaft 3 and rotatory-driven by an unillustrated driver, and a spacer 5 press-fitted to the driving shaft 3 between the pulley 4 and the bearing 2 so as to fix the bearing 2 and to prevent muddly water from the outside. In a pump of such constitution, the spacer 5 is provided with a squeeze 5a squeezed by the end face of the pulley 4 so as to eliminate a clearance between the pulley 4 and the spacer 5.
Patent JP-H02106724-A (JP)
Title: Guest-host type liquid crystal display device
Inventor: YAMASHITA TERUO
IPC: G02F1/137
Filed: 1988-10-14
Abstract: PURPOSE:To obtain the bright subject device having a large contrast ratio by deforming the molecular orientation of a liquid crystal by impressing an electric field to a guest-host type liquid crystal material contg. a specified styryl pigment as a guest. CONSTITUTION:A transparent conductive film and an oriented film are laminated on a transparent substrate which is one of two sheets of substrates, in this order, and the transparent conductive film and the oriented film are laminated on another one of the substrates in this order. The guest-host type liquid crystal material contg. the styryl pigment shown by formula I as the guest and the liquid crystal as the host is sealed between the sheets of the substrates. In formula I, Q is a benzene ring, R1 and R2 are each a lower alkyl or hydroxyalkyl group, etc., R3 is hydrogen atom or alkyl group, Y is oxygen or sulfur atom, Z is 2-4 C alkylene group, A is an aromatic aldehyde or a heterocyclic aldehyde, etc., X is halogen atom or an anion such as an acid residue, etc. Thus, the positive display of the device with good contrast characteristic and responsiveness is performed.
Patent JP-S62119663-A (JP)
Title: Information processing unit
Inventor: TAKEI MASAYOSHI
IPC: G06F15/177
Filed: 1985-11-20
Abstract: PURPOSE:To attain an analysis with high accuracy in applying debug or retrieval of a fault by designing the titled unit that the timewise relation when data read from a main storage device exists on a data bus and the timing when the data is stored in a register of a processor are equal to that at normal running when a SS read instruction is executed in the step mode. CONSTITUTION:In a system that a main storage device 6 and plural processors are constituted to use an information transfer bus 8 in common, and when a processor executes an instruction to read the content of the main storage device in the step mode, the information read from the main storage device is stored in the own register of a processor other than the processor executing the instruction reading the content of the main storage device and the said processor keeps transmission of the content of the register to the information transmission bus 8 except the time when the information transfer bus is used for other purposes. Thus, a large quantity of hardware exclusive for the step mode is not required to be provided to the main processor.
Patent JP-2001085434-A (JP)
Title: Method for plating semiconductor substrate
Inventor: HASHIBA TOSHIO
IPC: H01L23/52
Filed: 1999-09-14
Abstract: PROBLEM TO BE SOLVED: To form a uniform seed layer by electroless plating by forming the seed layer on at least part of a barrier layer, which is inactive to electroless plating reactions by vapor phase growth. SOLUTION: A method for plating semiconductor substrate is composed of a step of forming recessed sections on the surface of a dielectric layer 2 formed on a semiconductor substrate 1, and a step of forming a first conductive layer on the surfaced of the dielectric layer to cover the surface of the dielectric layer 2, including the recessed sections formed on the surface. The method is also composed of a step of forming a second conductive layer 6 on the surface of the first conductive layer 5 containing at least part of the surface of the layer 5, and a step of forming a plated metallic layer 6 on the surfaces of the first and second conductive layers 5 and 6 by electroless plating.
Patent JP-H03120861-A (JP)
Title: Manufacture of semiconductor device
Inventor: SAIGO SATOSHI
IPC: H01L29/732
Filed: 1989-10-04
Abstract: PURPOSE:To obtain a Bi-CMOS integrated circuit, which is superior in controllability, by few manufacturing processes by a method wherein a photoresist process using a bipolar transistor as a mask is also used as the channel doping process of MOSFETs and the etching process of a silicon oxide film. CONSTITUTION:In the manufacturing method of a Bi-CMOS integrated circuit, the method includes a process, in which the other conductivity type impurity is introduced in an N-type well region 6 of the other conductivity type channel MOSFET using a one conductivity type channel MOSFET and a bipolar transistor as masks, and a process, in which the other conductivity type impurity is introduced in a P-type well region 5 and the well region 6 of both MOSFETs in a state that the bipolar transistor is masked and an oxide film 8 on the surfaces of the regions 5 and 6 of both MOSFETs is removed. For example, a channel doping of a P-channel MOSFET and a channel doping of an N- channel MOSFET are simultaneously performed using a photoresist 10 as a mask and moreover, an etching is performed to remove a silicon oxide film 8 on the MOSFET regions.
Patent JP-2000087537-A (JP)
Title: Construction of pillar
Inventor: HIRATA OSAMU
IPC: E04F15/00
Filed: 1998-09-14
Abstract: PROBLEM TO BE SOLVED: To provide a construction of a pillar for which lock operation is easy and a lock can be confirmed visually. SOLUTION: According to the construction of this pillar, a bolt 2 provided with an external thread 2a is held upright almost at the center of a base 1, a panel receiver 3 is screwed to this bolt 2 thereby making the height position of the panel receiver 3 adjustable freely and locking means for the panel receiver 3 for fixing the panel receiver 3 and the bolt 2 is provided after adjusting the height of the panel receiver 3. The locking means for the panel receiver 3 of the construction of the pillar is constituted with a lock lever 10 located in the central part and equipped with a nut portion 10a screwed to the external thread 2a of the bolt 2 and with a handle 10b for rotating and tightening the nut portion 10a.
Patent JP-2000086445-A (JP)
Title: Oily cosmetic
Inventor: YANO KIYOKO
IPC: A61Q1/06
Filed: 1998-09-16
Abstract: PROBLEM TO BE SOLVED: To obtain an oily cosmetic having remarkably improved brightness of appearance, suppressed perspiration phenomenon with time, and improved stability. SOLUTION: This oily cosmetic is obtained by formulating one or more kinds of organically modified clayey minerals, one or more kinds selected from condensation products of dicarboxylic acids with diglyceryl branched-chain fatty acid esters, and a gel including one or more kinds of nonionic surfactants having 4-12 HLB value as deflocculants with the oily cosmetic.
Patent JP-H0597410-A (JP)
Title: Production of multilayered multi-core ceramic superconductor
Inventor: KIKUCHI SUKEYUKI
IPC: C01B13/32
Filed: 1991-10-08
Abstract: PURPOSE:To produce a multilayered multi-core ceramic superconductor having high Ic characteristics and an excellent cross-sectional shape. CONSTITUTION:A combined body 6 consisting of powdery starting material for a ceramic superconductor and a metal is rolled down by repeating a first rolling process 7 in which rolling is carried out from opposite two directions while imparting flowability to the starting material and a second rolling process 8 in which rolling is carried out from opposite two directions perpendicular to the above-mentioned two directions while imparting flowability to the starting material. These processes 7, 8 are repeated at least once or more.
Patent JP-S63114757-A (JP)
Inventor: YOSHIMI SATORU
IPC: E04F15/18
Filed: 1986-10-31
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07112005-A (JP)
Title: Thermotherapic device
Inventor: TAGAWA MOTOYUKI
IPC: A61F7/00
Filed: 1993-10-19
Abstract: PURPOSE:To provide the thermotherapic device capable of sufficiently reflecting the pH value of the lesion in intensifying a treatment effect and surely making thermotherapy over the entire part of the lesion by utilizing the specific temp. equiv. time. CONSTITUTION:This thermotherapic device 20 makes thermotherapy of the lesion 15 of biotissues while measuring the temp. of the lesion 15 and it has heating means 1, 2 for heating the lesion 15 of the biotissues, temp. measuring means 3, 4, 5 for measuring the temps. of the plural sections in the lesion 15 and arithmetic means 8 for calculating the 43 deg.C equiv. time by selecting the min. temp. among the temps. of the plural lesions measured by these temp. measuring means 3, 4, 5. Further, the device has a heating control means 25 for operating the heating means 2 until the 43 deg.C equiv. time attains the preset heating time, a pH measuring means 9 for measuring the pH of the lesion 15 and injecting means 10, 14 for injecting pH control agents into the lesion.
Patent JP-H01102555-A (JP)
Title: Direct positive color image forming method
Inventor: DEGUCHI HISAYASU
IPC: G03C7/30
Filed: 1987-10-16
Abstract: PURPOSE:To obtain a direct positive image which is high in contrast and has a low min. density by incorporating 2 equiv. magenta couplers into a photographic sensitive material. CONSTITUTION:The photographic sensitive material 9 contg. an internal latent image type silver halide emulsion layer which is not previously fogged and a color image forming coupler is subjected to imagewise slit-exposing in an exposing part 10 by, for example, a slit exposing device 1 and is then exposed by a fogging exposing light source 2 enclosed by an opaque plate 3 having a reflecting plate on the inside and a transparent plate 4. The material is then passed successively through a color developing bath 5, a bleach-fix bath 6, a rinsing bath 7 and a stabilizing bath 8, by which a direct positive image is formed. The 2 equiv. magenta couplers are incorporated into the photographic sensitive material 9 in this image forming method. The image which is high in contrast and has the low min. density is thereby obtd.
Patent JP-H11264731-A (JP)
Title: Support structure of angle speed sensor and manufacture of angle speed sensor
Inventor: OKADA YOSHIYA
IPC: G01C19/56
Filed: 1998-09-16
Abstract: PROBLEM TO BE SOLVED: To minimize the vibration leakage by supporting the node part of bending vibration of a vibrating body by an elastic member having a high damping effect such as silicone or rubber. SOLUTION: A piezoelectric element 12 is stuck to the upper surface of a vibrating body 11 so that its on-plane center is conformed. A weight body 13 is bonded to the lower surface of the vibrating body 11 to constitute a sensor part. A cylindrical support member 15 is bonded to the node part of bending vibration of the sensor part through an adhesive 19. The support member 15 is bonded to a base 14 through an adhesive 20 to fix the sensor. The support member 15 is formed by cylindrically molding an elastic member such as silicone or rubber having a high damping effect. As the adhesives 19 and 20, an adhesive such as silicone or rubber, which is an elastic material, is preferably used. The vibration of the vibrating body is hardly leaked to the base by using the elastic material having a high damping effect such as silicone or rubber as the support member.
Patent JP-H0883473-A (JP)
Title: Carriage supporting device of magnetic disk device
Inventor: YOSHIDA SHINOBU
IPC: G11B21/02
Filed: 1995-10-09
Abstract: PURPOSE: To obtain a linear guide mechanism capable of accurately moving the carriage by keeping the contact state between a roller and a rail even though assembling error is present. CONSTITUTION: Moving means of the carriage 4 consisting of two rail surfaces 1 and the rollers 2, 2a coming into contact with these rail surfaces 1 provided respectively at the left and right sides of the carriage 4. In this arrangement, the roller 2a brought into contact with the rail of only one rail surface is made to be supported through a spring 3.
Patent JP-H1091876-A (JP)
Title: Burglar preventing device for on-vehicle acoustic equipment
Inventor: TANAKA SEIJI
IPC: G08B13/22
Filed: 1996-09-11
Abstract: PROBLEM TO BE SOLVED: To provide a bugler preventing device for an on-vehicle acoustic equipment having a burglar prevention function being hardly released by a thief. SOLUTION: This device is provided with an EEPROM 20 which stores a set password code, a control key 22 which inputs an input code, and a microcomputer 24 which compares the above mentioned input code with the password code when a power is supplied to an on-vehicle acoustic equipment, and releases a robber preventing mode when those input code and password code are made incident. At the time of detecting the incoincidence of the input code and the password code, this microcomputer 24 counts the number of times of this incoincidence as an erroneous input count value, and starts a timer 21 for clocking a prescribed time as long as it is judged that the erroneous input count value is beyond a prescribed count value, and a special operation by the control key 22 is executed, and releases a set non-allowable mode after the lapse of the prescribed time.
Patent JP-H09106187-A (JP)
Title: Developing device
Inventor: DOMON AKIRA
IPC: G03G15/08
Filed: 1995-10-09
Abstract: PROBLEM TO BE SOLVED: To provide the developing device which minimizes an increase in cost and can obtain an image of high quality having no density unevenness by making the difference in the longitudinal direction of the stroke of a developer conveying member as small as possible. SOLUTION: Of the developing device constituted including at least a developer, a developer carrier which carries the developer, a toner conveyance member (developer conveyance member) 30 which move reciprocally at right angles to the axis of the developer carrier so as to convey the developer to the developer carrier, and a swing member 31 which rotates reciprocally so as to make the toner conveyance member 30 move reciprocally, the sectional area of the swing member 31 is made different along the length. Consequently, the strength against torsion nearby the fulcrum of the swing member 31 increases to make an angle of rotation nearby the fulcrum of the swing member 31 larger than before and also increases the stroke of the toner conveyance member 30 nearby the fulcrum of the swing member 31.  Consequently, the amount of the developer supplied to the developer carrier can be increased and a deficiency of the supply of the developer is evaded to obtain an image of high quality having no irregularity in density.
Patent JP-2001088018-A (JP)
Title: Simultaneous polishing method and device for opposite surfaces of semiconductor wafer
Inventor: AKIYAMA HIROKI
IPC: B24B37/00
Filed: 1999-09-16
Abstract: PROBLEM TO BE SOLVED: To effectively reduce the number of errors of chipping and flaws in performing simultaneous polishing of both surfaces of a substantially circular GaAs wafer. SOLUTION: This is the method of simultaneously polishing opposite surfaces of a semiconductor wafer 3 after it is set at the simultaneous double-surface polishing device, wherein worn powder generating at meshing portions of the device is washed with pure water shower 8 so that they may not enter the polished portions.
Patent JP-H01105609-A (JP)
Title: Agc circuit
Inventor: SHINKAWA TAKAO
IPC: H03G3/30
Filed: 1987-10-19
Abstract: PURPOSE:To obtain a large gain controlled variable through a miniaturized circuit and a low power consumption by controlling attenuation quantity and the gain of an FET due to a pin diode connected to a drain and the attenuation quantity due to the pin diode connected to a gate by a voltage to be impressed to the gate of the dual gate FET. CONSTITUTION:When the AGC voltage of the gate 2 is maximum, the drain current of the FET 1 comes to be maximum, and a source voltage comes to be maximum, and a gate 1 voltage comes to be maximum as well. At that time, by selecting resistance 24 so that the attenuation quantity due to the pin diode 2 comes smaller, the attenuation quantity due to the pin diode 2 comes to be maximum, and the attenuation quantity due to the pin diode 4 comes to be minimum, and the gain of the FET 1 comes to be maximum. When the AGC voltage falls, the drain current decreases, and the gain of the FET 1 decreases, and the attenuation quantity due to the pin diode 4 increases, and the source voltage and the gate 1 voltage fall, and the attenuation quantity due to the pin diode 2 increases. On the other hand, when the pin diode 3 and the pin diode 5 are set previously so as to come into an OFF state at the time of the maximum AGC voltage, the pin diodes 3, 5 come into an ON state, and attenuation due to the pin diodes 3, 5 is added.
Patent JP-H01105511-A (JP)
Title: Gas-insulated transformer
Inventor: TANIGUCHI YASUHIKO
IPC: H01F29/04
Filed: 1987-10-19
Abstract: PURPOSE:To obtain gas-insulated transformers having each single structure, by causing neutral point side terminals to connect respective single-phase transformers one another through ducts, thereby connecting a voltage regulator in the longitudinal direction of the single-phase transformer located at the center of the transformers 22a and 22c. CONSTITUTION:Single-phase transformers 22a, 22b, and 22c cause ducts 23a and 23b to introduce neutral point side leads into the transformer 22b and the foregoing transformers are connected to a voltage regulator 24. Connection parts between the ducts 23a and the transformers 22a and 22b come to positions which are included in perpendiculars from the outermost circumferences of the transformers 22a and 22b. Then, there is each lead at each connection part between the transformers 22a and 22b as well as 22b and 22c and further, the number of leads to be required between the transformer 22b located at the center and the regulator 24 come to three pieces. In this way, the gas insulating transformers having each single structure are obtained.