Patent GB-1156724-A (GB)
Title: Radio Receiver Apparatus.
IPC: H04L27/00
Filed: 1966-07-06
Abstract: 1,156,724. Radio navigation. SPERRY RAND CORP. 6 July, 1966 [19 July, 1965], No.30328/66. Heading H4D. An interference rejection system in a radio receiver of phase coded signals which consist of a repetitive cycle of a number of pulses certain numbered pulses-" odd" pulses-of which are sensitive to a first set of interfering signals and other numbered pulses-" even " pulses-of which are sensitive to a second set of interfering signals, comprises means for segregating the odd pulses into a first channel and the even pulses into a second channel, means for detecting interference, means producing a first control signal when interference is present in the first set and producing a second control signal when interference is present in the second set, means responsive to the first control signal for inhibiting receiver response to odd pulses and means responsive to the second control signal for inhibiting receiver response to even pulses, inhibition of receiver response not occurring when both control signals are produced. The invention is described as applied to a Loran C navigation system of the kind utilizing binary phase coded pulses (see I.R.E. Transactions on Aeronautical and Navigational Electronics, June 1960, page 55); the master station transmits the signal sequence shown in Fig. 1, where 0 degree and 180 degrees refer to the phase of the 100 kc./s. carrier relative to a reference phase. Fig. 2a, b, shows a slave station receiver. A phase coder 5 generates a local signal analogous to the received signal, correct time phase being achieved by a manual control 6 with the aid of an indicator 10 and meter 11 as described below. The incoming amplified signals are detected in balanced modulator circuits 3, 4 the latter of which is fed from the phase coder via a 90 degrees phase shifter; quadrature-driven detectors are provided to allow for fortuitous phase which may obtain initially between the locally generated and the received signals. Gates 13, 15 sample the detector outputs immediately preceding the odd pulses and similarly for gates 14, 16 and the even pulses. After low-pass filtering the gate outputs pass to threshold circuits 21. .24; each threshold circuit produces an output signal, e.g. A when its input level exceeds a first threshold and a second output signal, e.g. E when a second, higher, threshold is exceeded. Circuits 25 (not described) perform the logic operations indicated, the plus sign indicating an OR operation, the dot sign an AND operation and the over-bar a NOT operation. Misalignment of the receiver is evidenced by a signal on line 29 which is applied to indicator, e.g. a lamp 10; the operator then de-energizes motor 8 and closes switch 9. The output of oscillator 7 is applied via a phase shifter 30 to a divider 31 producing grouped sampling pulses, e.g. as described in Specification 837,515, whose time position can be varied continuously by phase shifter 30 or " jumped " by a signal on line 29. The grouped sampling pulses are applied to a bi-stable 33 producing two output grouped pulse signals on lines 37, 38 which are in anti-phase and at half the repetition rate of those at its input. Pulses on lines 37, 38 respectively open gates 35, 36 whose outputs (i) feed the sampling gates 13...16 and (ii) after delays 41, 42-to afford " early " sampling in gates 13 ... 16 if the pulses on lines 43, 44 are correctly aligned with the leading edge of received LORAN pulses-to open gates 46, 47 unless inhibited by outputs on lines 26, 27 from the logic circuits 25. The other inputs to gates 46, 47 are from a circuit 45 producing a waveform as described in Specification 786,823 characterized by a crossover coinciding with a point on the leading edge of received Loran pulses to which the pulses on lines 43, 44 are to be synchronized by an automatic phase control including controller 53. The phase coder 5 is of the kind described in U.S.A. Specification 3,099,795. Control 6 is further adjusted until D.C. meter 11 reads a positive maximum value, indicating zero phase between local and received signals.