baber/WOPTO huggingface dataset:
Patent JP-H0945000-A (JP)
Title: Optical disk recording and reproducing device
Inventor: HIGASHIDA ISAO
IPC: G11B20/10
Filed: 1995-08-01
Abstract: PROBLEM TO BE SOLVED: To stably perform the reproducing of information by respectively setting characteristics of equalizer in a land and a group and improving the S/N ratio of a reproduced signal. SOLUTION: This device is provided with an optical disk 1, a spindle motor 2, an optical head 3, a laser driving circuit 4, an optical current-voltage conversion circuit 5, an AGC circuit 6, an equalizer circuit 7 constituted of a low-pass filter circuit 8 and a boost circuit 9, a comparator voltage 10, an envelop detecting circuit 11 and a binary circuit 12. Moreover, the device is provided with a selector switch 13 for setting the cut-off frequencies of the low-pass filter 8 and another selector switch 14 for setting the ampilication factors of the boost circuit 9 to be changed over by a land/group changeover signal 15.  The reproducing of information is stably performed by improving the S/N ratio of the reproduced signal while respectively setting the charactritics of the equalizer in the land and the group by a land setting value 16, a group setting value 17, a land setting value 18 and a group setting value 19.
Patent JP-S6351033-A (JP)
Title: Focus magnet
Inventor: TAKETOMI MASAKI
IPC: H01J29/64
Filed: 1986-08-21
Abstract: PURPOSE:To make it possible to minimize the variation of the central magnetic field regardless of the service ambient condition, by providing a control coil in a magnetic circuit and applying a current controlled responding to the ambient temperature to the coil. CONSTITUTION:A magnetic coil 1 has a cylindrical permanent magnet 2 providing with N and S magnetic poles at the both ends, and yokes 3 which consist of a soft magnetic substance fixed to the both ends of the permanent magnet 2, and a control coil 4 is provided close to the magnetic circuit 1. In such a composition, when an element of a negative property is applied for a thermal sensitive element 6, the current applied to a control circuit 5 can be increased by raising the temperature, but a deformation is produced by the self-heating of the thermal sensitive element. Therefore, the control circuit 5 is composed of a thermal sensitive element such as a thermistor R1, a resistor R2 to determine the detecting property series-connected to the thermistor R1, an IC for the rating voltage of a parallel control type, a current amplification circuit 11 which consists of a transistor Tr and a resistance R3, and a resistance R4 to control the controlling current.
Patent JP-S6090894-A (JP)
Title: Vapor phase growing apparatus
Inventor: FURUMURA YUUJI
IPC: C23C16/458
Filed: 1983-10-20
Abstract: PURPOSE:To obtain a vapor phase growing apparatus for forming films on substrates each having a large diameter by batch production by providing a susceptor having blades arranged radially around a shaft and holding substrates attached to the blades. CONSTITUTION:About 10-50 blades 11 are radially arranged around a shaft 10 at equal angles alpha to obtain a susceptor for holding substrates 4. The susceptor is put in a vapor phase growing furnace 12, the furnace 12 is evacuated through the exhaust port 14, and the substrates 4 are heated to about 1,000 deg.C with a cylindrical heating element 16. Hydrogen and dichlorosilane are fed to the furnace 12 from gas pipes 13 until the internal pressure attains a prescribed value, and uniform epitaxial films are formed while slowly rotating the susceptor with a motor 15.
Patent JP-H0857822-A (JP)
Title: Production of cement building material
Inventor: MAEKAWA TOYOHIKO
IPC: C04B14/02
Filed: 1994-08-22
Abstract: PURPOSE: To obtain a production method of a cement building material, capable of producing a cement building material having a matte outer surface while keeping an advantage of a wet production method capable of producing a cement shaped body of a complicated shape. CONSTITUTION: A cement shaped body 1 is molded by pressurizing a cement material slurry mainly composed of cement. A cement slurry prepared by incorporating cement, a pigment, and water is applied to the cement shaped body 1 to form a color cement layer 2. On the color cement layer 2, a resin emulsion is applied to form a resin coating layer 3. Thereafter, the cement shaped body 1 and the color cement layer 2 are cured. After that, on the resin coating layer 3, a topcoating material prepared by incorporating a resin emulsion, a colorant, a sand-like material, and reinforcing fibers is applied to form a topcoating layer 4.
Patent JP-S6441004-A (JP)
Title: Programmable sequence controller
Inventor: ISHIBASHI DAISAKU
IPC: G05B19/04
Filed: 1987-08-07
Abstract: PURPOSE:To exchange only those function blocks that require the addition and the remodeling by using a software switch which transfers the function blocks of an external memory part to the program area of an internal memory part. CONSTITUTION:An internal memory part 23 stores a program to carry out the programs stored in each function block and an external memory part 26 stores previously programs as data. When a software switch 1 detects a request for exchange of function blocks, the function blocks 2-4 of the part 26 are transferred to the function block corresponding areas 5 of the part 23. Thus it is possible to exchange those function blocks which perform the change and the addition without stopping the processing execution of those function blocks requiring no exchange. Then the quick countermeasures are possible against the change and the addition of the machines which are controlled in a programmable sequence.
Patent JP-H1126537-A (JP)
Title: Method of testing semiconductor wafer device
Inventor: MAEDA TETSUNORI
IPC: H01L21/66
Filed: 1997-07-07
Abstract: PROBLEM TO BE SOLVED: To reduce the investment on high-cost IC testers or wafer probers and product delivery time by obtaining the same result from a sampling test of wafers in a final wafer test as the 100% test result. SOLUTION: A host computer 100 receives measured results of a processed lot 700 from a measuring prober 400, saves the results per test process. About those wafers in the lot 700 not measured in a final wafer test, and measured result obtd. from a redundancy wafer test is added to that obtd. from the final wafer test to provide information of all the wafers in the lot 700. In the redundancy wafer test result those chips expected to be good if replaced with redundancy cells are judged to be good and others are judged to be no good. Defective marking follows according to this result.
Patent JP-2001022900-A (JP)
Title: Reader/writer unit
Inventor: TAKAHASHI KOJI
IPC: G06K17/00
Filed: 1999-07-09
Abstract: PROBLEM TO BE SOLVED: To reduce the lines for connecting an MPU and an LSI, to decrease the number of pins of the LSI, to decrease the number of ports to be used for this LSI on the MPU side and to make usable even with the MPU having a small number of ports as well. SOLUTION: The unit 2 is composed of an LSI 6 as an interface capable of exchanging data between a PC 1 and a radio card 4 and dealing with various communication system and an MPU 5 for controlling the whole system. On the basis of a control signal CONT of a pulse from the MPU 5, the LSI 6 outputs an 8-bit serial clock CLK to the MPU 5 and the MPU 5 side outputs the 8-bit data showing various kinds of mode setting to the LSI 6 on the basis of the serial clock CLK.
Patent JP-S5897834-A (JP)
Title: Manufacture of semicondutor device
Inventor: HONJIYOU SHIGERU
IPC: H01L21/316
Filed: 1981-12-07
Abstract: PURPOSE:To eliminate the deposite of glass on an excess part, even when glass passivation is performed, and give no bad influences to later processes by a method wherein an electrodeposition mask is formed by applying a liquid Si compound on the substrate surface, and next heat treatment is performed. CONSTITUTION:Using the N type substrate, a base diffused layer 1 and an emitter diffused layer 2 are formed on the main surface side of the N<->-ON-N<+> substrate. Next, the electrodeposition mask is formed by a spin application method. Thereafter, a heat treatment is performed in N2+O2 atmosphere at 800 deg.C for 30min rsulting in the formation of the electrodepsotion mask 3 1.2mu thick. Succeedingly, the mesa groove part of the electrodeposition mask 3 is removed by a PEP i.e. photoetching process. Then, in a state of resist deposite, a mesa  groove is formed by a blade, the crush layer of the mesa groove is removed by  a chemical etching, etc., and accordingly a mesa groove 4 is formed. Thereafter,  the P-N junction is exposed by exfoliating the resist. Glass powder is electrodeposited and rinced, and thereafter a heat treatment is performed resulting in  glass calcination. Thereafter, an electrode formation, etc. are performed, and  thus the pellet of a glass passivation power transistor is completed.
Patent JP-H0749927-A (JP)
Title: Pattern recognizing method
Inventor: SHIMOTORI AKIRA
IPC: G06V30/10
Filed: 1993-08-09
Abstract: PURPOSE:To improve the recognition accuracy to a pattern which can be formed to some extent by using a small data quantity. CONSTITUTION:By arranging picture elements in one line by a prescribed criterion to form a vector, and a vector number is given to each vector thus formed to be represented as vi. A group od vectors vki of the picture elements of a standard pattern (k), and vectors obtained by deforming them is called a dictionary vector Gki of a vector (vk). The vector vi of the picture element of a recognition object, and a dictionary vector Gki of the standard pattern (k) (k=1 to K) are compared, and when they match with each other, a point is added to the standard pattern (k), and a standard pattern (q) in which the accumulated value of this added point is the largest is decided to be the standard pattern shown by the recognition object.
Patent JP-S6439571-A (JP)
Title: Method and device for measuring magnetic permeability
Inventor: DATE MUNEHIRO
IPC: G01L1/00
Filed: 1987-08-06
Abstract: PURPOSE:To measure magnetic permeability by applying magnetic flux to two points of a body to be measured, producing a magnetic field in a magnetic circuit so that the detected magnetic flux is zero, and measuring the magnetic permeability of the object body from the quantities of the produced magnetic field and applied magnetic flux. CONSTITUTION:A measuring circuit consists of an excitation part 10, a magnetic field detection part 20, and an arithmetic part 30. The excitation part 10 is equipped with an oscillator 11, whose output is amplified by an amplifier 12, and applied to a coil CB for excitation to apply the magnetic flux to the body. This magnetic flux is detected by magnetic flux detection coils CA1 and CA2 and a magnetic flux detecting circuit 13 and controlled so that the total quantity of the applied magnetic flux is constant. The detection part 20 detects the difference between the magnetic field produced by a magnetic field producing coil CD and the magnetic field of the body by magnetic field detection coil CC1 and CC2 and a magnetic field detecting circuit 21. The output of an amplifier 22 is so controlled that the difference is zero and the current produced magnetic field is regarded as the magnetic field of a sample. An arithmetic part 30 finds the magnetic permeability of the object body from the ratio of the total magnetic flux and magnetic field and a coefficient found from a standard sample.
Patent JP-H0244966-A (JP)
Title: Large scale integrated circuit for coding and decoding picture signal
Inventor: SHIMOOOSAWA HIROYUKI
IPC: H04N1/419
Filed: 1988-08-05
Abstract: PURPOSE:To prevent generation of mistake on the circuit design and on manufacture at the start of manufacturing by not only discriminating defective chips at chip test but also confirming the operation as to a prescribed block of an internal circuit. CONSTITUTION:The circuit consists of a system path interface circuit 1, an image path interface circuit 5, a table retrieval circuit 2, a mode discrimination picture decoding circuit 4 and a sequencer circuit 3. Then not only the test of the entire chip but also a single function test of the table retrieval circuit 2 is conducted and a single function test for a change point detection circuit 4c forming the mode discrimination picture decoding circuit 4 is executed. Thus, the propriety of the single function is facilitated to strengthen the chip test.
Patent JP-S6356184-A (JP)
Title: Braking of three-phase induction motor
Inventor: MATSUMOTO TAKAAKI
IPC: H02P3/24
Filed: 1986-08-22
Abstract: PURPOSE:To perform smooth braking in good timing, by separating a stator winding from power source and at the same time performing dynamic braking, and then by interrupting DC conduction to the stator winding by a centrifugal switch. CONSTITUTION:When a motor 3 in service is about to stop, it is interrupted from an AC power source 1 by opening a contact 5A. At the same time, by closing contacts 56 and 5c the motor 3 is charged to a DC power source 4. By exciting the two-phase of a winding 3a by direct current, poles are formed and dynamic braking is performed. After braking when the motor 3 comes up with a definite low revolution, a centrifugal switch 6 actuates to interrupt the conduction by a DC power source.
Patent JP-H0362402-A (JP)
Title: Sunlight introducing wall system
Inventor: KIHARA MIKIO
IPC: F21V8/00
Filed: 1989-07-31
Abstract: PURPOSE:To increase the quantity of light flux to be introduced to an optional position of a construction and in proportion to the quantity of a wall body by providing a device for collecting sunlight, a wall body having a light transmitting passage for introducing this sunlight, and a device for diffusing the introduced light flux from the wall surface. CONSTITUTION:The light flux of a collected sunlight is introduced by a hollow part 7 to an interior wall below, and diffused as an emitted light 11 into a room by a diffusing device having a diffusion mirror 8. It can be situated above an opening part 10 which is too close to an adjacent construction 12 to be sufficiently lighted to use as an auxiliary light. The efficiency of the introduced light can be improved by inserting a pipe or material having a mirror surface into the inner surface of the wall body hollow part or coating the inner surface itself with mirror surface.
Patent JP-H0362174-A (JP)
Title: Picture processing method
Inventor: NOMACHI KOICHI
IPC: G06T1/00
Filed: 1989-07-31
Abstract: PURPOSE:To clearly register the picture of each area through one time of scanning even if the character densities, etc., of plural areas are different by converting a read out picture into picture data in plural densities, and storing these data in each storage device. CONSTITUTION:When seal impression registration business is selected from a keyboard 5, and a seal impression registration business form is set, a scanner 1 binalizes the business form by three kinds of slice levels, and outputs these data to a picture memory 2 so as to store them in memory parts 2a to 2c respectively. Next, a control device 7 starts a picture processing device 4, and the area of the seal impression and the area of a dwelling place and a name are segmented from the picture data of the seal impression registration business form of the usual density stored in the picture memory 2b, and is displayed on a display 3. If the seal impression is deep but the dwelling place and the name are pale and so on, an operator segments the selected picture from the memory part 2a by using the picture selection key and the picture change key of the keyboard 5, and registers it in an optical disk device 6. Thus, the picture of each area can be clearly registered through one time of the scanning.
Patent JP-S60105493-A (JP)
Inventor: HANSU PEETAA HERUTOOHANSEN
IPC: C12R1/66
Filed: 1984-09-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0859290-A (JP)
Title: Frit for acid-resistant enamel and glaze using the same
Inventor: SUGIE ETSUJI
IPC: C03C8/02
Filed: 1994-08-22
Abstract: PURPOSE: To obtain a frit for acid-resistant enamels, capable of imparting acid resistance to enamels without increasing the content of SiO2 or Al2 O3 by adding Ag2 O to an enamel frit comprising SiO2 , B2 O3 and one or more alkali metal oxide components selected from Na2 O, K2 O and Li2 O. CONSTITUTION: The content of Ag2 O is preferably 0.05-2.0wt.%. The obtained frit for acid-resistant enamels has a thermal expansion coefficient of 80-150×10<-7> /K and a softening point of 420-580 deg.C. For the production of the frit for the enamels, these components are mixed with each other, and silica, feldspar, etc., are used as the raw materials of the SiO2 . The mixture is melted at 1000-1500 deg.C. A tank oven, a crucible oven, etc., is used as a melting oven. Finally, the melted mixture is quenched in water or in air to obtain the frit for the enamels. For example, a mixture comprising 100wt.% of a frit for enamels, 5wt.% of a clay, 0.5wt.% of potassium chloride, 45wt.% of water, etc., is used as a glaze used for the formation of the enamel layer.
Patent JP-S6175279-A (JP)
Title: Ultrasonic wave transmitter/receiver
Inventor: MAEKAWA TAKAAKI
IPC: G01S7/52
Filed: 1984-09-20
Abstract: PURPOSE:To reduce the side lobe, by operate probes in which vibration surfaces of an electroacoustic converter are arranged on the same circumference thereof as ultrasonic wave receiver to delay electrical signals converted therewith so that phases thereof are made same. CONSTITUTION:In a probe 21 in which electroacoustic converters 21a-1-21a-N the same in the individual directional patterns are arranged on the concentric circumference within the same plane at an equal interval, phases of electrical signals are delayed with a transmission delay circuit 22b-N so that the phases of ultrasonic waves are made same as transmitted when the probes acts as ultrasonic wave transmitter 22. Likewise, the phases of the electrical signals are delayed with a reception delay circuit 23b-N so that phases of ultrasonic waves are made same as transmitted when they act as ultrasonic wave receiver 23. This can reduce the direction of the scan surface of a radiation pattern thereby enabling a wide ranging 3-D scanning leaving the probes at rest.
Patent JP-S5987240-A (JP)
Title: Control method of charging of car battery
Inventor: MUTOU MASAHITO
IPC: H02J7/00
Filed: 1982-11-10
Abstract: PURPOSE:To hold a battery in a condition in which the battery is normally almost fully charged, by a method wherein a discharging condition is discriminated from the specific gravity of battery liquid to convert it into a charging condition by increasing the number of idle revolutions. CONSTITUTION:Through detection of the specific gravity of battery liquid, an electromotive voltage, equivalent to the specific gravity of liquid, is compared with the actual terminal voltage of a battery to discriminate the charging or the discharging condition of a battery by means of a computer. When the battery is in a discharging condition, the number of idle revolutions of an engine is steply increased to control it, and the battery is rapidly converted into a charging condition during idle running. An electromotive voltage, equivalent to specific gravity, only indicates a static terminal voltage estimated from specific gravity, and on the contrary, during actual charge, an electrochemical electromotive force produced by charging action is added, which results in normal generation of a charging terminal voltage over that of the electromotive voltage equivalent to specific gravity. During discharge, various electric losses are incurred, and as a result, the charging terminal voltage is always below the electromotive voltage equivalent to specific gravity.
Patent JP-H0750316-A (JP)
Title: Flip chip bonding method of electronic circuit
Inventor: NAKANISHI TERU
IPC: H05K3/30
Filed: 1993-08-09
Abstract: PURPOSE:To prevent position deviation of an element and a substrate, regarding a flip chip bonding method of an electronic circuit wherein the electrical connection parts of an electronic circuit element are brought into contact with the electric connection parts on the substrate via solder, and heated and bonded, and at the same time the element is mounted on the substrate. CONSTITUTION:Stud bumps 10 are formed on one out of an electronic circuit element 1 and a substrate 3. Guides 12 for fixing the stud bumps are formed in the other. The stud bumps 10 and the guides 12 are aligned and bonded.
Patent JP-H0946017-A (JP)
Title: Printed board connection device
Inventor: SUZAKI TAKASHI
IPC: H04B10/572
Filed: 1995-08-02
Abstract: PROBLEM TO BE SOLVED: To readily and further firmly connect printed boards mutually which are used for an electronic equipment such as an AV equipment. SOLUTION: When the device is provided with a guide metal part 7 which is formed integral with a male connector 2 of a first printed board 1 and a guide metal part 9 which is formed integral with a female connector 4 provided to a second printed board 3 and the first printed board 1 and the second printed board 3 are connected, both connectors are connected readily by fitting a projection part 9a of the guide metal part 9 in a hole part 7a of the guide metal part 7 along an arrow A.
Patent JP-S6353736-A (JP)
Title: Magneto-optical recording medium
Inventor: HASHIMOTO SHUNICHI
IPC: G11B11/105
Filed: 1986-08-23
Abstract: PURPOSE:To improve corrosion resistance by forming a protective layer consisting of a rare earth element and transition metal element having the same compsn. as the compsn. of a recording layer and having the Kerr rotating angle larger than the Kerr rotating angle of the recording layer on the recording layer. CONSTITUTION:This recording medium is constituted of a transparent substrate 1, the recording layer 2 with which writing and reading out of information are executed by laser light, and the protective layer 3 which has high corrosion resistance and protects the recording layer 2. The recording layer 2 is a magnetic amorphous film consisting of the rare earth element and transition metal element and has perpendicular magnetic anisotropy. Said film is formed by sputtering in an Ar atmosphere. The gaseous Ar pressure at the time of the sputtering is set within a 10<-4>-10<-2>Torr range. On the other hand, the protective layer 3 is also a magnetic film consisting of the rare earth element and transition metal element having the same compsn. as the compsn. of the recording layer 2 and has the Kerr rotating angle greater than the Kerr rotating angle of the recording layer 2. The corrosion resistance is thereby improved without deteriorating the magneto-optical characteristics.
Patent JP-H0247989-A (JP)
Title: Decentralized exchange control system
Inventor: MURAKAMI TATSURO
IPC: H04L12/00
Filed: 1988-08-08
Abstract: PURPOSE:To unify the exchange control software by constituting the exchange control software for each controller with sets of independent execution units called a process and controlling message transfer in and at the outside of the controller. CONSTITUTION:Plural decentralized controllers 10 are coupled via a communication means 20 respectively. The software of each controller 10 consists of an APL part 11, a process management part 12, a process control part 13 and a communication control part 14. The software of the APL part 11 consists of sets of execution units called a process. The process management part 12 discriminates whether an opposite party of the message communication between processes is within the controller or at the outside of the controller. The process control part 13 secures a memory at the production of a message and transfers a message between the processes in one and same controller and the communication control part 14 transfers a message to other controller. Thus, the exchange control software is unified in this way.