baber/WOPTO huggingface dataset:
Patent TW-495908-B (TW)
Title: Forming method of dual damascene pattern for preventing photoresist residual from causing via hole to become blind hole
Inventor: JANG SYUN-MING
IPC: H01L21/76
Filed: 2001-08-24
Granted: 2002-07-21
Abstract: The present invention discloses a kind of method, which uses nitrogen-free plasma to bomb the dielectric layer in order to form a dense layer between the photoresist layer and the anti-reflection coating layer, for preventing photoresist residual from causing a via hole of the dual damascene process to become a blind hole. The invention includes the following steps. At first, a semiconductor substrate with partially completed integrated circuit is provided. The substrate is then coated with a low-k dielectric layer and is formed with via holes of the dual damascene process inside. Then, a gas plasma bombardment selected from one of oxygen, helium, or argon gas is conducted to form a dense dielectric layer on the surface layer of low-k dielectric layer containing the via hole. After that, an antireflection (AR) coating layer is formed, for example a silicon nitride layer is formed on the exposed surface layer of the low-k dielectric layer. A photoresist layer is used to coat the AR coating layer and is used to fill up via hole. Then, the PR layer is undergone with a photolithography process in order to define the PR pattern of the conducting wire trench, which is used as the trench for etching the conducting wire. After that, by using the conventional methods, the other processes of embedded metal are completed.
Patent TW-539650-B (TW)
Title: Process for producing titanium oxide
Inventor: OKUSAKO KENSEN
IPC: C01G23/08
Filed: 2001-08-28
Granted: 2003-07-01
Abstract: A process for producing a titanium oxide is provided which comprises the steps of (i) mixing an acidic solution of a titanium compound with a nitrogen-containing basic organic compound to obtain a reaction product and (ii) calcining the obtained product. The titanium oxide exhibits a high photocatalytic activity by visible light radiation.
Patent TW-525299-B (TW)
Title: Method of manufacturing an integrated circuit
Inventor: KRUTSICK THOMAS J
IPC: H01L21/822
Filed: 2001-08-29
Granted: 2003-03-21
Abstract: An integrated circuit includes a field plated resistor having enhanced area thereover for routing metal conductors, formed in the same layer of metal as forms contacts to the resistor, is fabricated by a sequence of processing steps. A resistor having a resistor body and a contact region at each end thereof is formed in an active region of a semiconductor substrate. A first layer of insulative material is formed over the resistor and a window is created through the first layer of insulative material to the resistor body to form a first contact region. A layer of polysilicon is formed over the first insulative layer to define a field plate, the polysilicon field plate being contiguous with the first contact region of the resistor and extending over the resistor body to substantially to the other contact region, as layout, design, and fabrication rules permit. A second insulative layer is formed over the polysilicon layer. Windows are created in the second insulative layer to provide access to the polysilicon field plate and the second contact region. A metal layer is applied and unwanted metal is etched away to provide conductors over the polysilicon field plate of a field plated resistor having enhanced area thereover for routing metal conductors formed in the same layer of metal as forms contacts to the resistor.
Patent TW-501234-B (TW)
Title: Method for fabricating a contact pad of semiconductor device
Inventor: PARK YOUNG-RAE
IPC: H01L21/768
Filed: 2001-10-03
Granted: 2002-09-01
Abstract: A method of fabricating a contact pad of a semiconductor device is disclosed. The method includes forming a stopping layer over the semiconductor substrate. An interdielectric layer is formed over the stopping layer, and the interdielectric layer is planarized to expose at least a gate upper dielectric layer by using a material which exhibits a high-polishing selectivity with respect to the interdielectric layer. The interdielectric layer is etched in a region in which a contact pad will be formed on the semiconductor substrate. A conductive material is deposited on the semiconductor substrate. Finally, planarizing is carried out using a material which exhibits a high-polishing selectivity of the upper dielectric layer with respect to the conductive material.
Patent TW-511285-B (TW)
Title: Method of programming and erasing a SNNNS type non-volatile memory cell
Inventor: FAN TSO-HUNG
IPC: H01L27/115
Filed: 2001-11-09
Granted: 2002-11-21
Abstract: A method of programming and erasing a SNNNS type non-volatile memory cell is provided. The programming operation is performed by channel hot electron injection from a drain side to an intermediate silicon nitride layer. The erasing operation is performed by channel hot hole injection from a drain side to an intermediate silicon nitride layer. The SNNNS type non-volatile memory cell provides highly efficient hot carrier injection under low applied voltages, both for programming and erasing operations. Thus, the present method provides improved performance characteristics such as shorter programming/erasing times and lower applied voltages.
Patent TW-583214-B (TW)
Title: Poly(trimethylene terephthalate) and a process for producing the same
Inventor: KATO JINICHIRO
IPC: C08G63/672
Filed: 2002-02-07
Granted: 2004-04-11
Abstract: A poly(trimethylene terephthalate) comprising trimethylene terephthalate repeating units in an amount of 80% or more by weight, having an inherent viscosity in a range from 0.4 to 1.5 dl/g and satisfying the following formula (1) wherein [-OH], [-COOH] and [-CH2CH=CH2] represent respectively the amounts of hydroxyl terminal end group, carboxyl terminal end group and aryl terminal end group in the poly (trimethylene terephthalate): [-OH]/([-OH]+[-COOH]+[-CH2CH=CH2])x100 >= 40 ... formula (1). The poly(trimethylene terephthalate) is excellent in both melt-stability stability of resistance to oxidation and spinning ability. The polymer has a high degree of whiteness and is suitable material for making shaped articles, for examples, as fiber and film. The poly(trimethylene terephthalate) can be successfully prepared, regardless of mass scale of reaction, by reacting 1,3-propanediol with terephthalic acid and/or its ester of low alcohol to obtain an 1,3-propanediol ester of terephthalate or its oligomer, subsequently polycondensating the reaction product at a temperature of from 235 to 270 degree Celsius while the polycondensation reaction being advanced under a condition satisfying formula (1).
Patent TW-543060-B (TW)
Title: SMA actuator with improved temperature control
Inventor: VON BEHRENS PETER E
IPC: H01H9/52
Filed: 2002-02-19
Granted: 2003-07-21
Abstract: A SMA actuator having rigid members and SMA wires, in which improved temperature control of the SMA wires of the actuator is provided by a heat sink, which may be the rigid members themselves, in close proximity to at least a central portion of the wires. Optionally, the heat sink is sized and placed such that the end portions of the wires where they are attached to the rigid members are not in close proximity to the heat sink. Where the heat sink is external, it optionally has a cooling element that acts passively as a heat sink during the heating cycle of the actuator and that acts as an active cooling element during the cooling cycle of the actuator. An SMA actuator, having a desired contraction limit and a power supply circuit, has a switch in the power supply circuit that is normally closed when the actuator is contracted to less than the desired contraction limit and is opened by the actuator reaching the desired contraction limit. This improved temperature control provides greater cooling of the SMA wires for a faster response and an extended working life of the actuator.
Patent TW-I232027-B (TW)
Title: Interpolation function generating device, interpolation data generating method, digital/analog converter, data interpolating device and recording medium
Inventor: KOYANAGI YUKIO
IPC: H03H17/06
Filed: 2002-03-06
Granted: 2005-05-01
Abstract: A digital input is 8-fold oversampled, delay circuits 11-1 to 11-4 and multipliers/adders 12 to 15 perform a convolution arithmetic while multipliers/adders 4 to 10 process the oversampling data into predetermined digital basic waveforms, and continuous interpolation values can be obtained, thereby requiring no low pass filter which causes deterioration of phase characteristics, and suppressing an interpolation abortion error by setting finite interpolating functions. Furthermore, by obtaining apart of oversampling data as input data by using an AND gate 2, a subsequent process using the digital basic waveform and the convolution arithmetic can be performed in a very simple process.
Patent TW-578371-B (TW)
Title: Distributed amplifier having separately biased sections
Inventor: PAVIO ANTHONY M
IPC: H03F3/60
Filed: 2002-03-08
Granted: 2004-03-01
Abstract: A distributed amplifier (40) and a method (100) of operating the distributed amplifier (40) are provided in accordance with the present invention. The distributed amplifier (40) comprises an input transmission line (48), an output transmission line (50) and N amplifier sections (42, 44, 46) having a transistor (52) connected to the input transmission line (48) and the output transmission line (50). The distributed amplifier (40) also comprises N independent biasing sources (82, 84, 86) configured to provide N independent biasing voltages for each transistor (52) of the N amplifier sections (42, 44, 46) for active operation, wherein the distributed amplifier (40) is configured such that when a first independent biasing voltage of said N independent biasing voltages is modified for a first transistor of a first section of the N amplifier sections, the first transistor of the first section of the N amplifier sections is configured for a non-active operation and an output power of the distributed amplifier (40) is reduced without a substantial degradation in an efficiency of the distributed amplifier (40).
Patent TW-594039-B (TW)
Title: Manufacturing method of reflective object
Inventor: LI MEI-CHIN
IPC: B44C1/04
Filed: 2002-03-20
Granted: 2004-06-21
Abstract: The present invention is related to the manufacturing method of reflective object. At first, a metal-containing surface layer is formed on the substrate surface through the vacuum electroplating processing. A covering layer of glue agent is spread on the surface of the metal-containing surface layer. Before the covering layer of glue agent is dried, a mirror is formed by directly coating the reflective glass balls with a diameter 0.06 mm to 0.15 mm on the substrate surface through the use of spray gun equipment. Finally, inner-layer etching process of laser (NA-YAG) light beam is conducted to form a special pattern or mark on the metal surface layer, in which laser (NA-YAG) light beam is capable of burning and etching on the metal contained surface layer without destroying the non-metal substrate, its reflective glass balls and coating layer. Thus, a reflective object, which has a surface that will never be abraded and full of specific patterns and marks, is formed.
Patent TW-538539-B (TW)
Title: A self-aligned split-gate flash memory cell and its contactless flash memory arrays
Inventor: WU CHING-YUAN
IPC: H01L27/115
Filed: 2002-04-29
Granted: 2003-06-21
Abstract: A self-aligned split-gate flash memory cell of the present invention comprises a single-side dish-shaped floating-gate structure being formed on a first gate-dielectric layer with a first intergate-dielectric layer being formed on its top portion and a second intergate-dielectric layer being formed on its inner sidewall and tip portion; a planarized control/select-gate conductive layer being at least formed over a second gate-dielectric layer and the first/second intergate-dielectric layers; and a common-source diffusion region and a common-drain diffusion region being implanted by aligning to the planarized control/select-gate conductive layer. The self-aligned split-gate flash memory cells are configured into two contactless array architectures: a contact-less NOR-type flash memory array and a contactless parallel common-source/drain conductive bit-lines flash memory array.
Patent TW-558494-B (TW)
Title: Method and device for manufacturing skin layer material with a predetermined density
Inventor: DAI WEN-LUNG
IPC: B29C55/18
Filed: 2002-06-28
Granted: 2003-10-21
Abstract: Disclosed is a method and device for manufacturing skin layer material with a predetermined density, using a forming roller set capable of radial, reciprocal movement during rotation for rolling the material, such that effective forces applied along more than two directions are applied to the skin layer of the material due to the radial, reciprocal movement thereby forming ragged patterns on the skin layer of the material upon rolling, and changing the densities of the skin layer and lining layer of the material; an additional leveling roller set for leveling the ragged patterns on the material so as to increase the density of the skin layer to the desired density.
Patent TW-565814-B (TW)
Title: Image display device
Inventor: MIKAMI YOSHIRO
IPC: G09G3/32
Filed: 2002-07-01
Granted: 2003-12-11
Abstract: The present invention is able to suppress deterioration in picture quality even if a voltage drop is caused by a power supply. When sampling switch elements 20a and 20b turn on in response to a scanning signal, the signal voltage from a signal wire 3 is held by a sampling capacitor 5 and written. At this time, the signal voltage is held by the sampling capacitor 5 on a common electrode 4 as reference and when the scanning signal varies from the high level to a low level, the sampling switch elements 20a and 20b turn off to electrically insulate the sampling capacitor 5 from the signal wire 3 and a driving TFT 7, so that the capacitor enters a floating state. When the scanning signal varies from the high level to the low level thereafter, driving switches 21a and 21b turn on and the signal voltage held by the sampling capacitor 5 is applied as a bias voltage between the source and gate of the driving TFT 7, which turns on, so that an organic LED 9 illuminates.
Patent TW-I275061-B (TW)
Title: Display device
Inventor: YARITA KATSUHIKO
IPC: G09F9/00
Filed: 2002-09-10
Granted: 2007-03-01
Abstract: The invention is to make it possible to miniaturize a display device as a whole by reducing the external size of a driving circuit chip. The display device is provided with a plurality of pixels arranged in a matrix form on a substrate, and a driving circuit chip GDR mounted on the substrate; the driving circuit chip GDR is provided with a plurality of output terminals OT to be connected with output wiring GL formed on the substrate, and a plurality of dummy terminals DT arranged adjacent to each other; and at least a part of the output wiring connected with the output terminals OT are not connected with the dummy terminals DT, but are arranged so as to pass through between the dummy terminals adjacent to each other.
Patent TW-593632-B (TW)
Title: Polishing composition for a substrate for a magnetic disk and polishing method employing it
Inventor: ISHIBASHI TOMOAKI
IPC: B24B37/00
Filed: 2002-10-24
Granted: 2004-06-21
Abstract: This invention is to provide a polishing composition capable of inhibiting occurrence of surface sag, etc., when used in polishing magnetic disk substrates and to provide a polishing method using the same. The polishing composition for the magnetic disk substrates contains a processing accelerator comprising at least one compound selected from among malic acid, glycolic acid, succinic acid, citric acid, maleic acid, itaconic acid, malonic acid, iminodiacetic acid, gluconic acid, lactic acid, mandelic acid, crotonic acid, nicotinic acid, aluminum nitrate, aluminum sulfate, and iron (III) nitrate; a surface sag inhibitor comprising at least one compound selected from among polyvinylpyrrolidone, polyoxyethylene sorbitan fatty acid esters, and polyoxyethylene sorbitol fatty acid esters; at least one abrasive material selected from among aluminum oxide, silicon dioxide, cerium oxide, zirconium oxide, titanium oxide, silicon nitride and silicon carbide; and water. A polishing method using the composition is also provided.
Patent TW-581994-B (TW)
Title: Functional wire and transistor array using the same
Inventor: NISHIKI HIROHIKO
IPC: H01L51/50
Filed: 2002-11-19
Granted: 2004-04-01
Abstract: An active-matrix substrate 30 includes multiple functional lines 31, a structure for fixing the functional lines to each other, a first conductive layer 43, a second conductive layer 42, multiple transistors 32 and multiple pixel electrodes 33. Each of the functional lines 31 includes: a core line 36, at least the surface of which has electrical conductivity; an insulating layer 37 that covers the surface of the core line; and a semiconductor layer 38 that covers the insulating layer. Some portions of the first and second conductive layers 43 and 42 overlap with the respective semiconductor layers of the functional lines but others not. The transistors 32 are provided so as to have their channel defined as a region 44 in the semiconductor layer by the first and second conductive layers. The pixel electrodes 33 are electrically connected to the first conductive layer 43.
Patent TW-580475-B (TW)
Title: Glass substrate carrying box
Inventor: HIRABAYASHI TAKAO
IPC: H01L21/68
Filed: 2002-12-03
Granted: 2004-03-21
Abstract: To provide a glass substrate carrying box capable of surely guiding and inserting a glass substrate to two or more vertical grooves formed of the rib members of mutually opposed side plates and a base member within a glass substrate carrying boxy body even when shifting it in a pitch direction or lateral direction. A rib member 55 comprises first tapered surfaces 60a and 60b formed so as to have a substantially V-shaped cross sectional shape from the top surface thereof toward a base member 51, a second tapered surface 62 formed in the vicinity of an opening so as to gradually reduce the height toward the opening end, and a protruding third tapered surface 65 formed on the top part having the second tapered surface 62 toward both side surface sides of the rib member 55, and a base member 51 also comprises a tapered surface 66 formed so as to gradually reduce the thickness on the rib member 55 side toward the opening end in the vicinity of the opening.
Patent TW-I220735-B (TW)
Title: Form creation and control method adopted in editing form of web page
Inventor: LIU WIN-HARN
IPC: G06F9/44
Filed: 2002-12-13
Granted: 2004-09-01
Abstract: A form creation and control method adopted in editing form of web page builds up a table element list by classifying table element and table attribute of control table for displaying status. Further proceed inquiry based on the table element list and proceed dynamic creation and control of table on basis of the inquiry result to achieve the goal of dynamic editing and table element display.
Patent TW-I229960-B (TW)
Title: Planar type multi-band omni-directional radiative field type antenna
Inventor: WANG SEN-LU
IPC: H01Q13/08
Filed: 2002-12-24
Granted: 2005-03-21
Abstract: The present invention is a planar type multi-band omni-directional radiative field type antenna. A microstrip and plural radiative bodies extended from the longitudinal axis of the microstrip are printed on the front side and back side of the dielectric substrate material in the antenna. Each radiative body is arranged symmetrically on both sides of the longitudinal axis of microstrip, and more than two strip-like conductors are formed on top of it. The length of each strip-like conductor is about shorter than 1/4 of the wavelength at the center frequency in each band, so as to form a multi-band choke and multi-band radiative body, and there is no harmonic relationship among plural bands. In addition, the parasitic effect mutually can be adjusted by properly varying the shape of each strip-like conductor, so as to obtain a better multi-band resonance effect. Thus the antenna not only has type of omni-directional radiative field, but also has a higher antenna gain, which is especially suitable to be applied in microwave frequency.
Patent TW-I254579-B (TW)
Title: Signal processing method to selectively record image signal
Inventor: JU CHI-CHENG
IPC: H04N9/79
Filed: 2003-01-02
Granted: 2006-05-01
Abstract: This invention provides a signal processing method for image signals. This method selectively records the image signals on a recording medium. The image signals contain at least two image signals with different original image rate. After a signal converting process, the original image rate will be adjusted to a standard image rate specified by an image system standard. At first, this method detects the image signals according to a detection process in order to distinguish at least one image signal with one original image rate in the image signals with at least two original image rates. After the process of image detection, this method records only desired image signals on the recording medium according to an image selection information.
Patent TW-587334-B (TW)
Title: Solid-state image pickup device and electronic information apparatus
Inventor: KOYAMA EIJI
IPC: H04N5/335
Filed: 2003-01-23
Granted: 2004-05-11
Abstract: A solid-state image pickup device is provided which comprises an electric charge accumulation region capable of accumulating electric charges, a reset transistor comprising a first terminal and a second terminal, in which an electric charge discharge potential is applied to the first terminal and the second terminal is connected to the electric charge accumulation region, and a source follower circuit comprising a driver transistor having the same structure as that of the reset transistor. An electric charge accumulation voltage of the electric charge accumulation region can be set to the electric charge discharge potential through the reset transistor. An output voltage from the source follower circuit is the electric charge discharge potential.
Patent TW-I283763-B (TW)
Title: Method of manufacturing liquid crystal display panels
Inventor: TANAKA YOSHINORI
IPC: G02F1/137
Filed: 2003-02-20
Granted: 2007-07-11
Abstract: Before cutting a gang-printed substrate having a multiplicity of liquid crystal display panel regions provided thereon into individual liquid crystal display panels, a voltage is applied to all of the multiplicity of liquid crystal display panel regions to inspect display defects, polymerize a monomer in the liquid crystal component, and control alignment of the liquid crystal, which allows the time required for a voltage applying step to be reduced and allows a reduction in the manufacturing cost. A dispenser injection process is used to allow a liquid crystal to be injected between mother boards that have not been cut into individual display panels, and a voltage is applied after the pair of glass substrates are combined and before they are cut into individual display panels to perform a test on display defects (dynamic operating test), pretilt control, and an aligning process.
Patent TW-I262314-B (TW)
Title: Apparatus for interfacing electronic packages and test equipment
Inventor: WINTER JOHN M
IPC: G01R1/067
Filed: 2003-03-05
Granted: 2006-09-21
Abstract: A test apparatus for testing electrical devices such as ICs is provided. The test apparatus includes a test socket mounted on a DUT board in which a contact plunger assembly is at least partially positioned.