Patent GB-814882-A (GB)
Title: Improvements relating to electrical switching systems
Inventor: FLOOD JOHN EDWARD
IPC: H04Q11/04
Filed: 1954-06-18
Abstract: 814,882. Automatic exchange systems. SIEMENS EDISON SWAN Ltd. Sept. 16, 1955 [June 18, 1954], No. 35277/53. Class 40 (4). Primary and secondary switches PUS and SUS are innterconnected by link pulse highways to which are allotted groups of pulses XYZ, MNO or PQR of a pulse cycle. The pulse groups are chosen so that adjacent pulses of a cycle are allotted to different links. Only one switch frame is shown in Fig. 1. Delay lines are used for storing pulse channels. Four wire connections are used between the line circuits and the primary selectors and in the link pulse highways modulators and demodulators between direct-current lines and pulse channels are described as modems. A calling line SL extends a forward hold to the primary selector PUS which signals the register switch and transmits pulses to it in all free channels available to the switch. The register switch selects a free channel. It then selects a free register which registers the channel in a delay line storage circuit and connects the calling line to the register in that channel. The register reverts dial tone. The digits of the wanted number are dialled into the register by pulsing the forward hold. The register seizes the exchange marker and transfers to it the necessary routing digits. The marker applies to the called line a backward marking which is extended over free paths to the calling line's primary switch where one path is selected. A selection of one of a number of equivalent paths is made at each stage as the backward marking is extended. The primary selector PUS to which the marked called line is connected transmits in all free pulse channels available to the switch. Each secondary selector SUS receiving pulses over a link selects only one channel in the group but extends a direct current back marking over all free trunks linking it to other secondary selectors through supervisory circuits SU. Each marked secondary selector SUS selects only one of these incoming trunks and extends the back marking to the primary selectors over all free pulse channels. The calling line primary selector PUS selects one of the free pulse channels and the path is fixed. To make the connection the calling primary switch PUS stores a pulse of the selected channel and extends a forward hold through the register and the selected path to the called line primary switch PUS where, in response to forward-hold-pulses in the same channel as the back-marking-pulses, a pulse of this channel is stored and the common equipment of the switch is released. The marker is signalled at four different stages in building up a connection and then releases. The connection is held at this stage by the register. Ringing and metering signals are controlled by tone signals from the supervisory circuit SU. The register releases in response to ringing tone and completes the connection, which is held by the supervisory circuit SU. During ringing, the called station returns an intermittent backward hold to the supervisory circuit. On reply, the backward hold becomes steady and stops transmission of ring- ing control tone and ringing tone signals from SU. At the same time, a short burst of metering tone is transmitted from SU to the calling line circuit. The system may include junction circuits IJRS, OJRS. Delay line circuits.-In a typical mercury delay line circulating system, Fig. 2, a pulse trigger PT applies a rectangular pulse to the delay line DL. The output pulse from DL is transmitted through amplifier A to gate G2 which transmits accurately timed shorter pulses under the control of clock pulses. So long as gate G3 is maintained open, the trigger PT transmits the pulses from gate G2 into the delay line. Additional pulses may be fed into the delay line through gate G1. Each trunk or line is allotted a combination of two delay lines such as PDL1, PDL2, Fig. 4, and the modems of the line PGA, PGB are controlled by coincident pulses from the two delay lines. Line circuit, Fig. 3.-When the line SL is looped, the potential developed across resistor RA1 provides a forward hold signal on lead FH. When line SL is free, a ringing signal on the return wires is repeated by a tuned transformer TA3 and tube VA1 strikes during the positive half-cycles of a 17 c/s. generator RC. Ringing current is transmitted to line SL through transformer TA2. On reply, rectifier gate MRA1 opens and disables the transformer TA3. A pulse of metering tone is accepted by a tuned transformer TA4. Tube VA2 strikes during positive half-cycles of 50 c/s. alternating current from generator AC but a condenser CA6 holds the meter magnet SM operated between pulses. Call to station in some exchange and on some primary switch PUS, Figs. 4, 5, 9, 10.-The forward hold signal extended on lead FH is repeated by multiplex PMX2 in the switch to a trunk marker PTM1, if the line is not already marked busy on inhibiting gate PI1. The trunk marker accepts only one forward hold signal and translates it into markings on a combination of two leads 406a, 406b controlling the delay lines PDL1, PDL2 allotted to the chosen calling line. Identification of free channels.-Gate PG3 is opened by the trunk marker PTM1 and passes pulses from a clock source K in all communication channels free in the switch, pulses in the busy channels being inhibited by markings on leads 409, 915. Selection of one calling switch.-When gate PG3 is opened, a signal is transmitted through pulse lengthener PL2, multiplex SMX and a switch marker SM to open the gates PG4, PG5 in one calling switch. Selection of one free channel for connecting the calling line to the register.-Gate PG4 in the selected switch passes pulses in the free channels to a master selector MSP which selects one channel and returns pulses in that channel over lead 911 to gate PG5. The pulses are accepted by gates PG1, PG2 allotted to the calling line and are entered into delay lines PDL1, PDL2 controlling modems PGA, PGB belonging to the line. The same pulses from gate PG5 set delay line PDL3 and close gates PI3, PI4 in that channel. Register switch selects register.-Pulses transmitted to master selector MSP enable pulse lengthener RL1 to signal gates RI1 allotted to individual registers, the gates being closed when the registers are busy. A register marker RM, like the switch marker SM, selects one register and opens gates RG1, RG2 to enable pulses on the selected channel to be stored in delay lines RDL1, RDL2 controlling modems RGA, RGB. Register.-Pulses in the selected channel gated by modem PGA (controlled by relay lines PDL1, PDL2) and gate PG6 (controlled by delay line PDL3) are demodulated by modem RGD and produce a direct current forward hold on lead PFH. A backward hold signal is returned on lead RBH and modem RGB produces pulses in the selected channel. By these backward hold pulses on leads 102, 417 and 502 the register maintains the circulation of pulses in delay line pairs RDL1, RDL2 and PDL1, PDL2 and in delay line PDL3. The same pulses on lead 416 mark the line busy by providing an inhibiting potential in gate PI1 via modem PGB and multiplex PMX3. Trunk marker PTM1 releases, gate PG3 closes and the register switch is released. Gates PI3, PI4 are now closed by the register to pulses in the selected channel. The register transmits dial tone to the calling line via modems RGB, PGB. On dialling, pulses on lead FH are received by the register as pulses on lead PFH. Called line back marked.-Pulses identifying the called line are produced by multiplex PMX1 in response to a back marking on lead BM. A pulse lengthener PL3 signals the register over line NO. If the line is free, the pulses pass gate PI2 and the register receives a "not busy " signal on lead NB. The trunk marker PTM2 marks a pair of leads like 425a, 425b to identify the called line and to prepare for the entry of pulses into delay lines like PDL1, PDL2. Gate PG31 passes pulses of all channels busy in PDL1, PDL2 so that the " not busy" signal from pulse lengthener PL8 enables gate PG37 to feed pulses to the links in all channels free in the called line primary switch, KK being a clock pulse source. Links.-Each link comprises " go " and " return " back marking leads GBM, RBM and "go and " return " speech leads. In the primary switch, gates PG18 to PG21 giving access to a link are marked with a group of pulses such as XYZ so that the link will accept only the XYZ pulses allotted to it. Similar gates SG17 to SG20, Fig. 6, in the secondary switch at the other end of the link are also marked with XYZ pulses. It will be assumed that the back marking is extended over a link accepting XYZ pulses. Secondary switch selects one channel and extends marking over outgoing trunks.-In a secondary switch receiving pulses in the group XYZ over lead GBM, Fig. 6, one channel is selected by a master selector SMS and the exchange marker is signalled over lead EM1. Pulse lengthener SL1 applies a backward marking to leads 700 in all free trunks such as SRU, gates SI3 in forward marked busy trunks being closed. The supervisory circuit in the trunk extends the marking to another secondary switch. Secondary switch receives back markings from supervisory circuits SU.-If a switch has a number of incoming trunks such as SBU, back marked over leads BM2 and a multiplex SMX1 one trunk is selected by a trunk marker STM1 which marks leads 802, 803 identifying one trunk in preparation for entry of a pulse in delay lines SDL3, SDL4 through gates SG1, SG2 at a later stage. Pulse lengthener SL4 opens gate SG3 which transmits pulses from a clock source KS in all free channels available to the switch, busy channels being marked on leads 604, 701. The pulses are transmitted over leads RBM to the corresponding primary switches. Primary switch (calling lines) receives back markings in a pulse group, say PQR, not XYZ.- Gate PG22, opened by pulse lengthener PL4 under register control transmits all the pulses received over the leads RBM of all the lin