Patent GB-945734-A (GB)
Title: Miniature semiconductor devices and methods of producing same
IPC: H01L23/522
Filed: 1960-02-02
Abstract: 945,734. Semi-conductor arrangements. TEXAS INSTRUMENTS Inc. Feb. 2, 1960 [Feb. 6, 1959; Feb. 12, 1959], No. 3633/60. Heading H1K. A semi-conductor arrangement comprises a monocrystalline semi-conductor wafer containing a layer of one conductivity type forming part of one major wafer face, and a layer of opposite type conductivity both layers being spaced from the other major wafer face and forming a PN junction extending to said one major face. The wafer includes discrete areas providing the electrical properties of at least two different kinds of circuit elements. A multivibrator (Fig. 6a), the circuit of which is shown in Fig. 6b, comprises such an arrangement and may be formed from a monocrystalline wafer of silicon or germanium. In a typical case antimony is first diffused into one lapped and polished face of a 3 ohm cm. P-type germanium wafer to form a 0.7 mil. thick N-type layer. The unpolished face of the wafer is then lapped to give a wafer thickness of 0.0025 in. and gold plated " KOVAR " (Registered Trade Mark) leads 50 alloyed to it to form ohmic contacts at the end of the resistor paths. Gold is evaporated through a mask to provide ohmic contact with the N-type layer at areas 51-54 and aluminium evaporated through a mask and alloyed to the wafer to form P- type emitter areas 56. The emitter areas are alternatively formed by impurity diffusion through a mask and ohmic contacts subsequently made to them. After fashioning the resistor paths R 1  to R 7  and forming the slot separating resistors R 1  and R 2  from R 4 -R 7  by etching through a mask formed by photoresist techniques, the transistor and PN junction capacitor areas T 1 , T 2 , C 1 , C 2  are isolated by etching to remove the N-type layer between them. Gold wires 70 are thermally bonded to the areas shown to complete the required interconnections and the arrangement hermetically sealed. Alternatively, insulating material such as silicon oxide is evaporated on the wafer through a mask to completely cover the wafer except at points where electrical contact is to be made, or to cover only selected portions joining points to be interconnected. Conductive material such as gold or aluminium is then laid down to form the required interconnections. The phase shift oscillator shown in Fig. 8a may be formed by similar techniques. Types of resistors and capacitors which may be substituted for those illustrated in the above arrangements are described. The resistors (Fig. 1a) are constituted by uniform surface layers 10b, of opposite conductivity type to the underlying material, formed by impurity diffusion. Suitable capacitors use the monocrystalline wafer material as one electrode, a silicon dioxide layer formed by evaporation or thermal oxidation of the wafer surface as dielectric, and an evaporated gold or aluminium layer as the other electrode. The use of intrinsic material and PN junctions instead of slots for electrically isolating circuit elements within or on the wafer is also envisaged as is the use of gallium arsenide, and the antimonides of indium and aluminium. Specifications 945,737, 945,738, 945,739, 945,740, 945,741, 945,742, 945,743, 945,744, 945,745, 945,746, 945,747, 945,748 and 945,749 are referred to.