baber/WOPTO huggingface dataset:
Patent TW-375597-B (TW)
Title: Impregnation composition, and primer composition for resin concrete, method for its coating and composite body employing it
Inventor: ANDO TOSHIHIRO
IPC: C04B41/63
Filed: 1997-02-21
Granted: 1999-12-01
Abstract: An impregnation composition comprising: (a) a polyfunctional (meth)acrylate having at least two ethylenically unsaturated double bonds in one molecule, (b) a monofunctional (meth)acrylate, (c) a polymerization initiator, and (d) a decomposition accelerator. The excellent anti-chemical and anti-cracking properties of the said material makes it ideal for construction work.
Patent TW-324656-B (TW)
Title: A distribution device
Inventor: GARRY W CROSSDALE
IPC: A47L15/44
Filed: 1997-02-22
Granted: 1998-01-11
Abstract: A distribution device system, which comprises a head part (3) of the distribution device, a feed nozzle (7) installed on the head part of the distribution device for water supply, and a liquid storage tank installed on the head part of the distribution device to contain the material to be distributed, in which the water stream supplied from outside is fed to a trough drum (4) which is installed at the head part (3) of the distribution device at a preset head, in which a feed pipeline (9) connects the trough drum (4) to the feed nozzle (7), and in which the variation of the water stream flowing to the trough drum (4) can be resolved by an overflow pipeline (10) of a flush nozzle installed on the head part of the distribution device so that the water stream at the feed nozzle (7) is maintained at a known pressure.
Patent TW-322453-B (TW)
Title: Production method of thick sheet with high density from waste paper
Inventor: CHEN CHYI-SHYAN
IPC: B32B37/10
Filed: 1997-03-18
Granted: 1997-12-11
Abstract: A production method of thick sheet with high density from waste paper comprising the steps of smashing waste papers, pulping at high temperature, forming into raw sheets, drying up and cutting to complete re-cycled sheets; the character of the method being that the re-cycled sheets are further proceeded in vacuum tank to be more compact in density after have been dyed and been dried up, then the sheets are jointed to another by pieces to be pressed together at high temperature to sheets with high density after the surfaces of the sheets have been painted with glue at high pressure and been dried up already.
Patent TW-326540-B (TW)
Title: The production method of electronic lead elements
Inventor: NAKAZAWA JUNICHI
IPC: H01L21/48
Filed: 1994-08-15
Granted: 1998-02-11
Abstract: A production method of electronic lead elements includes the following processes: 1) the leads having one ends fixed to the band with a predetermined space, and the other ends of the leads welded with one end of the aluminum tabs, in which the other end of aluminum tabs is flattened, the flattened face of aluminum tabs are oriented in the same direction.
Patent TW-327147-B (TW)
Title: Method for controlling pressure
Inventor: YAMAGUCHI TERUZO
IPC: B23K11/24
Filed: 1997-07-21
Granted: 1998-02-21
Abstract: A method for controlling a pressure application resistant welding machineby setting in advance a danger region where a foreign matter is liable to be inserted, of reducing torque of an electric motor to an extent not to injure the foreign matter in the danger region so as to lessen a pressure applied to the foreign matter from the electrode, thereby performing a welding operation with safety and assurance. The method comprising steps of partitioning a moving region of the electrode into a safety region and a danger region, setting a range of the safety region to be substantially the same as a maximum thickness of a workpiece to be welded, setting a range of the danger region to be substantially the same as a thickness of a foreign matter to be inserted between the workpiece and the electrode, permitting a torque of an electric motor to generate a given pressure application force in the electrode in the safety region, permitting the torque of the electric motor in the danger region to be smaller than that in the safety region to an extent not to injure the foreign matter, recognizing the presence of the foreign matter in the danger region in response to an anomalous change of a current value of the electric motor to stop driving of the electric motor, and permitting the electrode to continuously perform a pressure application operation even if the current value of the electric motor is changed in the safety region.
Patent TW-333602-B (TW)
Title: Method of and plant for reliquefying gaseous helium the invention relates to a method of reliquefying gaseous helium produced when transferring liquid helium from a donor container to a receiver container.
Inventor: YVES PECOUD
IPC: F17C5/04
Filed: 1997-07-22
Granted: 1998-06-11
Abstract: A method of reliquefying gaseous helium produced when transferring liquid helium from a donor container (R1) to a receiver container (R2), characterized in that a stream of gaseous helium is bled off from a point in a compression unit (10) intended for charging with gaseous helium under pressure; this stream of gaseous helium is cooled by heat exchange with the gaseous helium intended for the said compression unit (10) and the compressed gaseous helium thus cooled is expanded (16) in order to obtain reliquefied helium.
Patent TW-403782-B (TW)
Title: Semiselective medium composition for detecting seed-borne alternaria brassicicola
Inventor: WU WEN-SHI
IPC: C12Q1/04
Filed: 1997-08-04
Granted: 2000-09-01
Abstract: The present invention provides a novel semiselective medium composition for detecting seed-borne Alternaria brassicicola, which comprises galactose, calcium nitrate, dipotassium hydrogen phosphate, magnesium sulfate, agar, binomial, and chloramphenicol. The CW medium of the present invention can selectively allow seed-borne Alternaria brassicicola to grow, while effectively suppressing the growth of other seed-borne fungi. Although A. alternata, which is prevalently present on seeds and is similar to A. brassicicola, can still grow on the CW medium, the color of the A. alternata colonies are different from that of A. brassicicola, thus, A. brassicicola can be obviously differentiated.
Patent TW-389935-B (TW)
Title: Oxide strip that improves planarity
Inventor: AHLGREN DAVID C
IPC: H01L21/02
Filed: 1997-11-18
Granted: 2000-05-11
Abstract: 19960768010
Patent TW-367482-B (TW)
Title: Display system having electrode modulation to alter a state of an electro-optic layer
Inventor: MCKNIGHT DOUGLAS
IPC: G02F1/133
Filed: 1997-12-18
Granted: 1999-08-21
Abstract: Methods and apparatuses for display systems which modulate a control electrode to cause an electro-optic layer to be reset to at state in which display data is not viewable. In one embodiment of the invention, a display system includes a first substrate having a first plurality of pixel electrodes for receiving a first plurality of pixel data values representing a first image to be displayed. The display system further includes an electro-optic layer which is operatively coupled to the pixel electrodes and an electrode operatively coupled to the electro-optic layer. The display system displays the first image and then applies a first control voltage to the electrode to alter a state of the electro-optic layer such that the first image substantially not displayed and then the display system displays a second image represented by a second plurality of pixel data values after the electrode receives a second control voltage. Various other apparatuses and methods are described.
Patent TW-469372-B (TW)
Title: Method of managing a symmetrically blocked nonvolatile memory having a bifurcated storage architecture
Inventor: HASBUN ROBERT N
IPC: G06F11/14
Filed: 1998-02-11
Granted: 2001-12-21
Abstract: Methods of allocating, writing, reading, be-allocating, re-allocating, and reclaiming space within a nonvolatile memory having a bifurcated storage architecture are described. A method of storing an object within a managed object space of the nonvolatile memory includes the step of determining an object class for the object. Objects of a first class are stored contiguously proceeding from a first end towards a second end of the managed object space to form a first class of space. Objects of a second class are stored contiguously proceeding from the second end towards the first end of managed object space to form a second class of space. A header identifying the object is stored at a bottom of the first class of space. The object is stored at a selected one of the bottom of the first class of space and a bottom of the second class of space in accordance with the object class.
Patent TW-515785-B (TW)
Title: Non-hygroscopic crystals of p-aminomethylbenzoic acid and process for preparing the same
Inventor: MIURA MOTOO
IPC: C07C227/42
Filed: 1998-02-24
Granted: 2003-01-01
Abstract: The novel non-hygroscopic crystals of p-aminomethylbenzoic acid can be obtained by heating hygroscopic crystals of p-aminomethylbenzoic acid with keeping the hygroscopic crystals in contact with moisture to transit the hygroscopic crystals to non-hygroscopic crystals. The non-hygroscopic crystals of p-aminomethylbenzoic acid can be particularly advantageously handled in the atmosphere as compared with the conventional hygroscopic crystals. Especially when the p-aminomethylbenzoic acid is used for the non-aqueous reaction, the crystals of the invention are exceptionally advantageous from the viewpoints of removal of moisture and humidity control.
Patent TW-347346-B (TW)
Title: Use of zeolites and alumina in adsorption processes
Inventor: TIMOTHY CHISTOPHER GOLDEN
IPC: C01B32/50
Filed: 1998-03-02
Granted: 1998-12-11
Abstract: A process for the adsorption of at least carbon dioxide and water from a feed gas, comprising contacting the feed gas with a composite adsorbent comprising a fixture of a zeolite and an alumina.
Patent TW-589309-B (TW)
Title: Imidazopyrimidines and imidazopyridines for the treatment of neurological disorders
Inventor: WILDE RICHARD G
IPC: A61K31/4545
Filed: 1998-07-02
Granted: 2004-06-01
Abstract: Corticotropin releasing factor (CRF) antagonists of formula (I), and their use in treating psychiatric disorders and neurological diseases, anxiety-related disorders, post-traumatic stress disorder, supranuclear palsy and feeding disorders as well as treatment of immunological, cardiovascular or heart-related diseases and colonic hypersensitivity associated with psychopathological disturbance and stress in mammals.
Patent TW-461044-B (TW)
Title: A method for manufacturing node contact window of dynamic random access memory
Inventor: LIN GUO-CHI
IPC: H01L21/768
Filed: 1998-07-20
Granted: 2001-10-21
Abstract: A method for manufacturing node contact window of dynamic random access memory which provides a semiconductor wafer comprising an active zone, word line, bit line, and a dielectric layer, wherein the word line has a source/drain zone and is separated from the bit line by a dielectric layer. Next, a defined photoresist layer is formed on the dielectric layer, and an anti-reflection coating material layer is subsequently formed on the resist layer. The anti-reflection coating material layer has better step coverage properties. After that, the anti-reflection coating material layer is etched back with the photoresist layer as the etch stop to form an anti-reflection coating material layer gap wall on the photoresist layer side wall and expose part of the dielectric layer. Then the dielectric layer is defined using the anti-reflection coating material layer as a mask to form node contact window and expose the source/drain region.
Patent TW-383480-B (TW)
Title: Manufacturing method for improving the flatness of semiconductor component
Inventor: KIM CHANG-GYU
IPC: H01L21/8242
Filed: 1998-08-18
Granted: 2000-03-01
Abstract: The invention relates to a kind of manufacturing method of semiconductor component. It can reduce the step height between DRAM cell area and logic area in semiconductor substrate by forming capacitors in DRAM cell area. By forming metal interconnect in logic area after depositing the first insulation layer but before planarization, the height of metal interconnect is equal to the height of capacitors. Although the second insulation layer is deposited on entire semiconductor substrate, the step height between DRAM cell area and logic area can be reduced owing to the metal interconnect formed in the logic area. Besides, it can provide the flatness of the second insulation layer even employing CMP or back etching process only.
Patent TW-388034-B (TW)
Title: Barium titanate-based semiconductor ceramic
Inventor: TAKAHASHI CHIHIRO
IPC: C04B35/46
Filed: 1998-08-31
Granted: 2000-04-21
Abstract: The barium titanate type semiconducting ceramic of the present invention is so arranged as to contain BaTiO3 as a main component thereof, and Ba2TiSi2O8 and BanTimOn+2m (1<=n<=4, 2<=m<=13, n<m) respectively as minor-phase compositions, wherein the ratio of the contents of Ba2TiSi2O8 and BanTimOn+2m (Ba2TiSi2O8/BanTimOn+2m) as the minor-phase compositions is in the range of 0.5 to 80.0. Therefore, it is highly excellent in voltage resistance and ensures high reliability as a product device. Moreover, it has an appropriate room temperature resistivity <rho> 25 for fully functioning as a product device.
Patent TW-455935-B (TW)
Title: Manufacture method of hemi-spherical grain structure on surface of semiconductor substrate
Inventor: LIN PING-WEI
IPC: H01L21/3213
Filed: 1998-09-21
Granted: 2001-09-21
Abstract: This invention provides a manufacture method to increase the total surface area of the hemi-spherical grain structure on the surface of semiconductor substrate. The semi-spherical grain structure is formed by semi-spherical polysilicon grains and an amorphous silicon layer underneath the polysilicon layer. Hydrofluoric acid, phosphoric acid and SC-1 standard cleaning solution are used in sequence to etch and clean the polysilicon layer and the amorphous silicon layer on the surface of the substrate. Since the etching rate of the amorphous silicon layer is greater than that of the polysilicon layer during the etching process, the amorphous silicon layer at the bottom, peripheral area of the individual hemi-spherical grain on the polysilicon layer is etched at a faster rate. And thus circular trench is formed. This could separate the partial-connected polysilicon hemi-spherical grains into independent grains and thus increasing the total surface area of the hemi-spherical grain structure on the surface of semiconductor substrate.
Patent TW-380316-B (TW)
Title: Manufacturing method for fin-trench-structure capacitor of DRAM
Inventor: DU YOU-LUEN
IPC: H01L27/108
Filed: 1998-10-15
Granted: 2000-01-21
Abstract: The invention provides a kind of manufacturing method for fin-trench-structure capacitor of DRAM with landing pad connected to the source/drain of substrate which includes: forming a multiple object composed of the alternating oxide layer of top oxide and nitride layer in which the nitride layers are located between these oxide layers; then, in the multiple object with alternating oxide and nitride layers, opening storage node contact window and stopping at the landing pad; then, along the sidewall of storage node contact window, striping part of nitride layer and forming conformal first field doped polycide layer above the top oxide and in the storage node contact window; forming a photoresist layer in the storage node contact window; striping part of the first field doped polycide layer above the top oxide and striping the photoresist layer; forming conformal thin dielectric above the top oxide and in the storage node contact window; then, forming the second field doped polycide layer on the thin dielectric and filling up the storage node contact window.
Patent TW-382793-B (TW)
Title: Low temperature-coefficient polysilicon load resistance structure and method for producing the same
Inventor: LIN JR-FENG
IPC: H01L21/8244
Filed: 1998-11-17
Granted: 2000-02-21
Abstract: The present invention relates to a low temperature-coefficient polysilicon load resistance structure and a method for producing the same. The characterization of the low temperature-coefficient polysilicon load resistance structure is to have a PN junction, and having a P-type region, a spatial charge region and an N-type region respectively from the surface layer to the bottom layer. Since the width of the spatial charge region will reduce with the reduction of the temperature, the increase of the width in the N-type region can provide more conductive electrons thereby compensating some free electrons reduced when the semiconductor polysilicon load resistance is at a low temperature state. Therefore, a polysilicon load resistance made according to an embodiment of the present invention can obtain a lower temperature coefficient thereby improve the reliability of the SRAM.
Patent TW-582076-B (TW)
Title: Overlay target for semiconductor process
Inventor: WANG PIN-TING
IPC: H01L21/3213
Filed: 1999-01-26
Granted: 2004-04-01
Abstract: An overlay target comprises a base region formed on a semiconductor wafer and a plurality of first patterns which are made into a square or a rectangle formed on the base region. The first pattern forms a strip structure. Subsequently, along the four sides of the base region, a plurality of second patterns are formed, in which the shape of the second pattern can be a square or a rectangle. The dimension of the second pattern is approximately 0.5 to 1 micrometer and the distance between the two adjacent second patterns is approximately 0.3 to 0.8 micrometer.
Patent TW-I228393-B (TW)
Title: A pesticidal composition in form of an aqueous suspoemulsion
Inventor: GUBELMANN-BONNEAU ISABELLE
IPC: A01N25/04
Filed: 1999-02-03
Granted: 2005-03-01
Abstract: Pesticidal compositions in form of aqueous suspoemulsions, comprising at least two pesticides which are substantially insoluble in water, wherein one pesticide A is solid and the other pesticide B is liquid or is dissolved in a hydrophobic organic solvent, and a combination of surfactants comprising (1) a tristyrylphenol-ethoxylate having 6-14 mol ethoxylate, in nonionic form, and (2) a tristyrylphenol-ethoxylate having 14-18 mol ethoxylate in form of its sulfate or phosphate, in anionic or acid form, and (3) a dialkyl-sulfosuccinate salt.
Patent TW-465242-B (TW)
Title: Image input apparatus, image input system, image sending/receiving system, image input method and storage medium
Inventor: FUJIWARA HIDEYUKI
IPC: H04L12/64
Filed: 1999-02-04
Granted: 2001-11-21
Abstract: Provided is an image input apparatus in which changeover between sensing and transfer of low-resolution images such as moving images and high-resolution images such as still images can be performed smoothly during image sensing and data transfer operations. The apparatus includes an image signal generating circuit for sensing the image of a subject and generating circuit for sensing the image of a subject and generating an image signal indicative thereof; a data transfer circuit for transferring the image signal generated by the image signal generating circuit to an external device via a prescribed communications interface, the data transfer means having a first transfer mode in which there can be assured a fixed transfer rate but with no guarantee of data, and a second transfer mode in which data is guaranteed but transfer rate is not; and a control circuit for controlling the data transfer circuit so as to perform image transfer in the first transfer mode in a case where the image signal generating circuit generates a low-resolution image signal and in the second transfer mode in a case where the image signal generating circuit generates a high-resolution image signal.
Patent TW-420964-B (TW)
Title: Organic electroluminescence display substrate, method of manufacturing it and organic electroluminescent display element
Inventor: QIAN YIFAN
IPC: H05B33/10
Filed: 1999-02-23
Granted: 2001-02-01
Abstract: The substrate for use in organic electro-luminescence display element comprises a plurality of first electrode lines (12) disposed apart from one another, and a plurality of diaphragms (13) extending apart from said first electrade lines (12) in their crossing direction, on the substrate (11). Above each of the diaphragms (13) is a peak and beneath it is a base.
Patent TW-388702-B (TW)
Title: Floor wiping device
Inventor: PSIK SANDRA
IPC: A47L13/24
Filed: 1999-03-05
Granted: 2000-05-01
Abstract: A floor wiping device comprises a shaft (1) connected with a carrying body (2) having at least one flexible wiping element (3) connected therewith; the flexible wiping element being swingingly hung on the carrying body; the carrying body (2) being rotatable around an axle (4) which is parallel to the extension in the longitudinal direction of the shaft (1); the being installed with suppressing means for suppressing the tilting rotation of the carrying body (2) relative to the shaft (1).
Patent TW-385359-B (TW)
Title: Method for measuring the positions of structures on a mask surface
Inventor: BLASING-BANGERT CAROLA DR
IPC: G06T7/60
Filed: 1999-03-29
Granted: 2000-03-21
Abstract: A method is provided for measuring structures on a mask surface in which the mask is supported on a measuring stage that is interferometrically measurably displaceable perpendicularly to an optical axis of an image-measuring system. A mask coordinate system associated with the mask is aligned using alignment marks relative to a measuring device coordinate system. With set positions of the structures in the mask coordinate system being specified in advance, the positions of at least two external edges of the mask in the mask coordinate system that are perpendicular to one another are measured in addition to the actual positions of the structures in the mask coordinate system.
Patent TW-505970-B (TW)
Title: Semiconductor fabrication line with contamination preventing function
Inventor: OHTA NAHOMI
IPC: H01L21/02
Filed: 1999-03-31
Granted: 2002-10-11
Abstract: A semiconductor fabrication line for fabricating a semiconductor device, which has: a mainstream line for conducting a semiconductor fabrication process to fabricate the semiconductor device; and an isolation line disposed separated from the mainstream line in the semiconductor fabrication line. The isolation line is provided for, of the semiconductor fabrication process, a contamination-including semiconductor fabrication process that a contamination causing material which may cause a contamination of the mainstream line appears on the surface of a wafer, and after processing the contamination causing material to be eliminated from the surface of the wafer in the isolation line, the wafer is returned from the isolation line to the mainstream line.
Patent TW-422985-B (TW)
Title: Boosting circuit with boosted voltage limited
Inventor: SUDO NAOAKI
IPC: G11C16/08
Filed: 1999-04-23
Granted: 2001-02-21
Abstract: A boosting circuit includes a plurality of boosting circuit units, a voltage detecting circuit and a boost control circuit. The plurality of boosting circuit units have their outputs connected together and respectively having voltage boosting functions. Each of the plurality of boosting circuit units generates a boosted voltage higher than a power supply voltage in response to a drive signal. The voltage detecting circuit detects whether or not the boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that the boosted voltage is higher than a predetermined voltage. The boost control circuit limits the voltage boosting functions of predetermined ones of the plurality of boosting circuit units in response to the voltage control signal.