baber/WOPTO huggingface dataset:
Patent JP-2001012704-A (JP)
Title: Catalytic combustion apparatus and its control method
Inventor: HIGUCHI YASUSADA
IPC: F23N5/08
Filed: 1999-06-30
Abstract: PROBLEM TO BE SOLVED: To provide a catalytic combustion method and a control method capable of stably achieving catalytic combustion from preheating. SOLUTION: A catalytic combustion apparatus 5 includes a catalyst layer 20 for catalytic combusting an evaporated fuel, a vaporization chamber 12 for heating and vaporizing a fuel with radiation heat 74 of the catalyst layer 20, and a porous radiation plate 30 disposed on the catalyst layer 20 in the vaporization chamber 12. In the apparatus, there is provided a temperature sensor 41 for detecting the temperature of the radiation plate 30, and precombustion is performed until the radiation plate 30 reaches a predetermined temperature. The radiation plate 30 is provided to promote vaporization of a liquid fuel. It is important factor in order to transfer the operation to catalytic combustion from the precombustion to raise the temperature as described above.
Patent JP-H0350731-A (JP)
Title: Thin film semiconductor device
Inventor: KANEKO YOSHIYUKI
IPC: H01L21/3205
Filed: 1989-07-19
Abstract: PURPOSE:To relieve defects by constituting dual line wiring at the intersecting part of a gate bus and a data bus of a TFT gate array, and eliminating a part of the dual line wiring, when the short between the wirings generates. CONSTITUTION:On a light transparent insulating substrate 10, Cr metal is selectively stuck and formed as a gate electrode and gate buses 1, 1'. By plasma discharge, silicon nitride 11 is deposited as a gate insulating film and an interlayer insulating film on the whole surface. By plasma discharge, an amorphous silicon layer is deposited as an amorphous semiconductor layer 2, and further N-type amorphous silicon 3 is deposited. After the amorphous silicon (the N-type layer also is contained) 2, 3 are etched in a desired pattern, a source electrode 4, a drain electrode 5 and data buses 5' are formed by using Cr, Al, etc., and the N-type amorphous silicon is etched by using the pattern as a mask. A transparent electrode is selectively stuck by using indium tin oxide, and a protecting film 7 is stuck on the almost whole surface by using silicon nitide and the like. Hence a semiconductor device can be relieved from the generation of defects caused by short circuiting by cutting a part of the dual line.
Patent JP-S6245323-A (JP)
Title: Method of treating exhaust gas of catalyst regenerating tower
Inventor: NISHIO KIMIO
IPC: B01D53/34
Filed: 1985-08-22
Abstract: PURPOSE:To make it possible to cope with a load variation, by preheating boiler supply water and performing the secondary cooling of the exhaust gas of a catalyst regenerating tower by the heat-exchange with boiler supply water and subsequently sending boiler supply water to a boiler to perform the primary cooling of exhaust gas. CONSTITUTION:Exhaust gas to be treated is supplied to a waste heat boiler 1 from a line 1 to perform the recovery of heat (primary cooling) and guided to an economizer 5 through a line 12a and preheated by the heat exchanger of the boiler 1 and receives gas-liquid indirect heat-exchange by the boiler supply water guided to the economizer 5 through a line 21 to be subjected to secondary cooling. Thereafter, the exhaust gas is sent to an adsorbing tower 2 through a line 12b to adsorb SOX. The boiler supply water raised in its temp. by the economizer 5 is sent to the boiler 1 through a line 22 to be discharged from a line 23 as overheated stem. By this method, it is prevented that the inlet temp. of the adsorbing tower reaches an acid dew point or less or reaches 200 deg.C or more even if load variation is generated.
Patent JP-H0636053-A (JP)
Title: Prom-incorporated one-chip microcomputer
Inventor: SHINKAWA KAZUAKI
IPC: G06F15/78
Filed: 1992-07-13
Abstract: PURPOSE:To set a PROM address and the input switching level of data input to optimum levels respectively at the time of PROM writing and one-chip microcomputer operation. CONSTITUTION:A write control circuit 5 sends a control signal (b) to an input/ output circuit 1. Consequently. the switching level of the input/output circuit 1 is set to the value of user specification at the time of the one-chip controller movement or to a TTL level at the time of the PROM writing.
Patent JP-H1031403-A (JP)
Title: Image forming device
Inventor: SAITO HIROSHI
IPC: G03G21/10
Filed: 1996-07-15
Abstract: PROBLEM TO BE SOLVED: To provide an image forming device which can reuse collected toner by providing a collected toner carrying means which can carry the collected toner with a simple, low-cost device constitution. SOLUTION: The image forming device has cleaning means 300 and 410 which clean and collect residual toner on a photosensitive body and a transfer belt after image formation and the collected toner carrying means 320 which is constituted separately from the cleaning means and carries the toner collected by the cleaning means. In this case, the collected toner carrying means 320 is equipped with a screw pump means 330 having a rotor which rotates to move the toner axially and a fixed stator which is arranged covering the rotor and contacts and engages the rotor, and an air supply means 360 which supplies air for fluidizing the toner moved by the screw pump means, and the air supply means is so constituted as to suck air from outside the machine.
Patent JP-S5973845-A (JP)
Title: Manufacture of cadmium anode for alkaline storage battery
Inventor: TAKEMURA MASAKAZU
IPC: H01M4/44
Filed: 1982-10-20
Abstract: PURPOSE:To provide an anode having reduced nickel content in metallic cadmium, decreased cycle deterioration, good electrochemical activity and high energy density by using in a paste metallic cadmium obtained by making contain specific amount of nickel by given procedure. CONSTITUTION:Zinc and nickel powder are added in a cadmium salt solution under a high speed stirring condition and cadmium ions make replace with zinc ions to prepare metallic cadmium containing 0.02-5% of nickel. Cadmium oxide or cadmium hydroxide, metallic cadmium obtained above procedure, gelling agent, resin fiber and water are kneaded and kneaded paste is spreaded on a core body and dried. For example, 1pt. methyl cellulose, 1.5pts. polyethylene fiber, and 30pts. water are added to 100pts. mixed powder of 70pts. cadmium oxide, 30pts. matallic cadmium, and they are kneaded. The kneaded paste is spreaded on a nickel plated punched iron core. After drying, coated core is cut in a specified dimension to form a cadmium anode.
Patent JP-H03205464-A (JP)
Title: Colored coating composition for camouflage
Inventor: SUMI ATSUSHI
IPC: C09D5/32
Filed: 1990-07-12
Abstract: PURPOSE:To obtain the title compsn. which, when applied to a military object, offers camouflage effective against infrared search by compounding a carbon black pigment, a powdered hydrous or anhydrous silica, and a film forming material. CONSTITUTION:A colored coating compsn. comprising 0.1-20wt.% (based on the total solid content; the same applies hereunder) infrared absorbing carbon black pigment, 5-30wt.% powdered, infrared diffusing or reflecting, hydrous or anhydrous silica, and 25-94.9wt.% film forming material. The compsn. gives a coating film with a spectral reflectance of infrared radiation (wave length; 700-2000nm) of 10% or lower and 60 deg. specular glossiness of 2% or lower and being useful for camouflaging a military object against infrared search.
Patent JP-S6162223-A (JP)
Title: Hybrid filter circuit
Inventor: ATSUGI GAKUO
IPC: H03H17/00
Filed: 1984-09-04
Abstract: PURPOSE:To obtain a circuit provided with a wide operating frequency range and operation stability in common by digitizing an input analog signal, passing the result through a digital filter and synthesizing a restored analog signal and a signal obtained from the input analog signal through an analog filter. CONSTITUTION:An output signal of an A/D converter 3 is inputted to the digital filter 4. An output signal of the digital filter 4 is converted into an analog signal by a D/A converter 5. On the other hand, the analog signal inputted to the input terminal 1 is fed to the 2nd analog filter 6. The 2nd analog filter 6 has a filter having at least a function multiplying a prescribed coefficient to the input analog signal. An output signal of the 2nd analog filter 6 is fed to an analog adder 7, and added to the output signal of the D/A converter 5. Then the output signal of the adder 7 is led to an output terminal 8 as the output signal of the hybrid filter circuit.
Patent JP-S6341261-A (JP)
Title: Card type information memory device
Inventor: SHIBATA MINEHARU
IPC: B60R16/02
Filed: 1986-08-06
Abstract: PURPOSE:To enable the use of an IC card with high reliability throughout long duration of service, by providing a selecting means, shifting and selecting a memory content renewing means to an operative and an inoperative state through manual control. CONSTITUTION:An IC card 11 is provided with a memory part 12 storing control data on control motors 5, 7, and 10 of a motor-operated seat, a motor-operated mirror, and a motor-operated tilt device, respectively. A controller 13, adapted to control running of the control motors 5, 7, and 10, incorporates a CPU 14, having computing processing function, and an ROM 15 and an RAM 16 serving as a data storing means, and the CPU 14 is provided with a selection switch 19, adapted to select whether it causes a memory part 12 to renew data. This constitution, since new data is not written in the memory part 12 when a switch 19 is turned ON, extremely reduces the number of data renewing times.
Patent JP-H0936877-A (JP)
Title: Data communication system
Inventor: UKAI SHINICHI
IPC: G06F13/00
Filed: 1995-07-21
Abstract: PROBLEM TO BE SOLVED: To prevent communication delay due to collision or cell abort at communication and interruption of information by dynamically changing a data compression/expansion rate in plural stages and changing the compression/ expansion system depending on a load of a communication network. SOLUTION: A data communication equipment 100 is provided with data compression/expansion variable means 5, 14 varying compression/expansion of received data in plural stages, a means 18 commanding data compression/ expansion corresponding to a traffic to the data compression/expansion variable means 5,14, and a transmission reception means 17 sending/receiving compressed/ expanded data. Thus, when a load of the communication network is low, data with high quality are frequently sent/received, and when the load of the communication network is heavy, data with high compression are sent/received for a long time with a few number of times. Thus, communication delay due to collision or cell abort at communication and interruption of information are prevented.
Patent JP-S5976348-A (JP)
Inventor: RIKITAKE SHIYOUNOSUKE
IPC: E04B1/30
Filed: 1982-10-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0712187-A (JP)
Title: Chain tensioner
Inventor: NAKA MATSUO
IPC: F16H7/08
Filed: 1993-06-28
Abstract: PURPOSE:To inhibit the vibration of a chain and suppress the machining cost of a tensioner low by preventing the retreat of a plunger even if large force acts upon the plunger from a chain. CONSTITUTION:The leakage of oil from an oil chamber B is limited to the oil passing a cutout part 17, and oil leakage from paths other than the cutout part 17 is prevented by a check valve 7 and a seal member 16. The quantity of leakage is thereby controlled correctly by the cross-sectional area of the cutout part 17. As a result, a plunger 5 presses a chain 6 hardly receding even with the increase of force acting upon the plunger 5, so that the vibration of the chain 6 is avoided. The control of leakage quantity depends only on the machining accuracy of the cutout part 17 without depending on the accuracy or the like of a clearance between the plunger 5 and a body 2, so that there is no need to heighten the machining accuracy of the plunger 5 and body 2. As a result, machining cost can be made low.
Patent JP-S6429718-A (JP)
Title: Short optical pulse evaluating method
Inventor: MOGI KAZUO
IPC: G01J1/00
Filed: 1987-07-27
Abstract: PURPOSE:To derive with high accuracy and immediately the intensity, waveform and phase of an optical pulse to be measured, by measuring simultaneously an intensity correlation waveform of a pulse and a secondary higher harmonic light electric field correlation waveform, by using a Michelson interferometer and a crystal having a secondary higher harmonic light generating function. CONSTITUTION:A measured pulse optical flux L is made incident on a Michelson interferometer in parallel. The measured pulse optical flux which has been emitted from this interferometer forms a focus in a crystal 6 having a secondary higher harmonic light generating function by a lens 4, by which a secondary higher harmonic is generated. An emitted light beam from this crystal 6 is condensed to a photodetector 9 by a lens 5. In this case, by a filter 7 and a spectroscope 8 which have been interposed on the way, the secondary higher harmonic light reaches the detector 9, from which a voltage pulse having an area being proportional to secondary higher harmonic light energy is outputted. From in this voltage pulse, a DC component and magnitude of an interference fringe frequency adjacent component of the secondary higher harmonic light are extracted, respectively, and they are displayed against a variation of a relative optical path length difference, respectively.
Patent JP-2001015596-A (JP)
Title: Method for manufacturing semiconductor device
Inventor: NISHIMURA HIROSHI
IPC: H01L21/768
Filed: 1999-06-30
Abstract: PROBLEM TO BE SOLVED: To avoid increasing the contact resistance or growing open defects, and effectively prevent short circuit, due to downsizing of contact hole diameters. SOLUTION: A manufacturing method comprises the steps of forming conductive films 3, 4 and a first insulating film 5 on a gate oxide film 2 after forming this film 2 on a substrate 1, forming a second insulating film 8 over the entire surface, after etching the first insulation film 5 and the conductive films 3, 4 to form gate electrodes 7, etching a third insulating film 9 with the second insulating film 8 used as an etching stopper to open contact holes 12 between the gate electrodes 7, after forming the third insulating film 9 on the second insulating film 8 by a deposition method while applying a voltage to the substrate 1, and etching the second insulating film 8 exposed at the bottoms of the contact holes 12 and the gate oxide film 2.
Patent JP-H0352238-A (JP)
Title: Manufacture of compound semiconductor device
Inventor: WATANABE KOJI
IPC: H01L21/338
Filed: 1989-07-20
Abstract: PURPOSE:To obtain a compound semiconductor device wherein an etching groove is not formed and the characteristics are stabilized by specifying the thickness of a silicon oxide film, and performing diffusing heat treatment in a furnace of hydrogen atmosphere at a specified temperature. CONSTITUTION:An SiO2 film 6 having a thickness of 300Angstrom  or less is formed by a CVD method and treated at 820 deg.C in a diffusion furnace containing hydrogen, so as to suppress etching which can occur at the boundary between a WSi gate and the SiO2 film 6 due to annealing. Therefore, the reaction of SiO2 to form Ga2O3 is retarded, which is proportional to the thickness of the SiO2 film 6. Etching of a semi-insulating gallium arsenide substrate 1 can be prevented. Thus, a compound semiconductor device having stable characteristics is obtained.
Patent JP-S5976794-A (JP)
Inventor: YAMASHITA TOORU
IPC: B25J15/08
Filed: 1982-10-22
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0830740-A (JP)
Title: Information recording system to optical card
Inventor: IEGI TOSHIATSU
IPC: G06F21/64
Filed: 1994-07-15
Abstract: PURPOSE:To surely detect the alteration of information recorded in the optical memory of an optical card and to prevent damage by the alteration. CONSTITUTION:At the time of recording the information in the optical memory, the array 1 of pits for expressing the recording information and the array 2 of the pits provided with a pit pattern for which the array 1 is inverted are recorded in the optical memory in a pair. When the recorded information inside the optical memory is altered, since excessive pits are added to the pit array 1 or 2, inversion relation between the pit arrays 1 and 2 is destroyed. At the time of reading the recorded information, whether or not the pit patterns of both are in the inversion relation is checked by calculating the exclusive OR of the pair of the pit arrays 1 and 2 and it is judged that the alteration is not performed when they are in the inversion relation and that the alteration is performed when the inversion relation is destroyed.
Patent JP-H0636542-A (JP)
Title: Magnetic recorder
Inventor: TSUKADA MASAYOSHI
IPC: G11B33/12
Filed: 1992-07-14
Abstract: PURPOSE:To obtain the magnetic recorder with high reliability by improving the assemblage without mechanically distorting a housing case at the time of assembling the recorder. CONSTITUTION:The recorder is equipped with a magnetic disk 6 to be energized to rotate by a spindle motor 5, a magnetic head 7 for the write/read of data on this magnetic disk 6 and a voice-coil motor 8 for positioning the magnetic head 7 via a supporting arm into a prescribed position on the magnetic disk 6. Then, the housing case for hermetically housing these constitutive parts consists of a bottom plate 1, side plates 2 and a top plate 3, and these are assembled via gaskets 4 having elasticity by tightening with screws 9. By this method, mechanical distortion of the housing case can be absorbed by the gaskets 4.
Patent JP-S5887487-A (JP)
Title: Analog electronic timepiece
Inventor: SAKAMOTO KENJI
IPC: G04C3/14
Filed: 1981-11-20
Abstract: PURPOSE:To eliminate the ununiformity in the characteristics of a step motor by a method wherein a demagnetizing pulse having the current direction opposite to that of a large output pulse and having a narrow width is impressed on the step motor after the large output pulse is impressed on the motor. CONSTITUTION:A step motor constituted by a stator, a rotor and a coil is provided, and the rotation and non-rotation of the rotor are determined by converting a value of a detection current made to flow through the coil into the fall of a voltage of a detection resistance. On the occasion, after a large output pulse Pi1 is impressed on the step motor, a demagnetizing pulse Pe having the current direction opposite to that of the pulse Pi1 and having a narrow width is impressed on the motor, and thereafter, the detection resistance is set selectively.
Patent JP-H07323032-A (JP)
Title: Ultrasonic diagnostic apparatus
Inventor: ISHIZUKA YOSHIZOU
IPC: G01N29/06
Filed: 1991-07-25
Abstract: PURPOSE:To obtain an accurate STC curve even when the state of an ultrasonic probe, a diagnostic region or an examinee are changed by controlling depth or the gain of the echo signal in the vicinity thereof on the basis of the value defined using a specific function with respect to the ultrasonic echo signal from an examinee. CONSTITUTION:In an ultrasonic diagnostic apparatus, a gain control circuit is formed in order to correct attenuation accompanied by the propagation of ultrasonic waves to more increase the gain of the echo signal of a deep part. When the intensity of the echo signal in the vicinity of depth (x) obtained by applying logarithmic conversion processing and detection processing to the echo signal is set to f (x) and the differential value in the depth direction thereof is set to f' (x), the gain control circuit uses a function a (f' (x)) (wherein, 0 <=a (f'(x))<=1) reduced or becomes 0 accompanied by an increase in the absolute value of the input value of f' (x) with respect to the input of f' (x) and controls depth or the gain of the echo signal in the vicinity thereof on the basis of the value of g (d) defined by the formula.
Patent JP-S5886731-A (JP)
Title: Preparation of n type znse single crystal thin film
Inventor: YONEDA KIYOSHI
IPC: H01L21/363
Filed: 1981-11-19
Abstract: PURPOSE:To activate impurities effectively, to suppress the generation of a composite center and to increase the density of carriers, by making the intensity of the beams of Zn atoms stronger than those of Se atoms when n type ZnSe is grown by a molecular-beam epitaxial growing method. CONSTITUTION:When molecular-beam epitaxial processing is conducted with the degree of vacuum set at 10<11> Torr, with a Zn cell at 310 deg.C and with an Se cell at 190 deg.C, the intensities of the beams of Zn and Se atoms reaching the surface of a substrate are in the ratio of 5:1. When an n type ZnSe single crystal thin film is grown under these conditions, an usual Zn vacancy is not generated and the density of carriers is not lessened even when a large quantity of Ga (450 deg.C or above) is added. When the ratio in the intensity of beams between the Zn and Se atoms at the time of their arrival at the substrate is 5-6:1 as described above, the surface homology crystallinity of the thin film thus prepared is inferior to that in the intensity ratio of 1. However, this causes no hindrance practically, and thus the n type ZnSe single crystal thin film of high quality can be obtained by this method.
Patent JP-H0352328-A (JP)
Title: Logic circuit
Inventor: MAKABE TAKAYOSHI
IPC: H03K19/0948
Filed: 1989-07-19
Abstract: PURPOSE:To suppress production of digital noise by generating a comparison signal when an output signal of a logic circuit exceeds a reference voltage, and limiting the amplitude of the output signal and a response speed based on the comparison signal. CONSTITUTION:When an input signal inputted to an input terminal 7 falls from a high level to a low level, a MOS transistor(TR) 1 is energized, a potential of an output terminal 8 rises from a low level to a high level, a comparator circuit 6 receives the signal and compares it with a reference voltage applied to a reference input terminal 10. When the output signal exceeds the reference voltage, the comparison signal from the comparator circuit 6 is inverted from a low level to a high level and an output of the comparator circuit 6 is smoothed by a filter and the resulting signal is fed to a gate of a MOS TR 3. The MOS TR 3 acts like limiting the potential change in the output terminal by the MOS TR 1 thereby limiting the rising speed and the amplitude of the output signal. Thus, production of high frequency digital noise at output change is prevented.
Patent JP-S63139010-A (JP)
Title: Fire resistant and heat insulating graphite sheet material
Inventor: MATSUO KOICHIRO
IPC: C01B31/04
Filed: 1986-08-08
Abstract: PURPOSE:To prepare the titled material from a specified graphite sheet, which is useful for a guard material used in a high temp. furnace and has excellent flexibility, excellent compressive and restoring factor, excellent self-lubricating property, higher heat conductivity in the direction to the plane, lower heat conductivity in the direction of the thickness and low gas permeability. CONSTITUTION:Natural or synthetic scaly graphite, or kish graphite, etc., is allowed to form an intercalated complex by treating with an oxidizing agent such as a mixed acid of sulfuric acid and nitric acid, then the volume of the obtained compd. is suddenly swelled to almost 100-250 times by heating to a high temp. and the graphite particles expanded in the rectangular direction to the plane of the layer. Then the titled material with desired shape is obtained by forming the sheet-shaped material having 0.20-1.00mm thickness, or further working variously to attain unevenness as necessary, with the means of compression or roll forming, etc., after removing and reducing the impurity to <=100ppm.