Patent GB-1348778-A (GB)
Title: Data switching exchanges
IPC: H04L12/52
Filed: 1970-11-21
Abstract: 1348778 Digital automatic exchanges PLESSEY TELECOMMUNICATIONS RESEARCH Ltd 15 Nov 1971 [21 Nov 1970] 55486/70 Heading H4P In a data switching exchange, subscribers' stations are grouped into those having like data rates, the exchange having for each rate at least one pair of t.d.m. highways operating with character interleaving in synchronous time slot appearance order, a group of time switching card circuits having storage locations, and at least one packet assembly buffer served by an assembly highway including means for assembling characters into a message packet store with corresponding dissembly buffers having means for transmitting a message packet over a dissembly highway. A sectionalized switching network having a cross-point array provides selective connection to inputs of a particular group of card circuits and a corresponding second cross-point array provides selective connection from output paths of card circuits to outgoing highways. A main trunk exchange, e.g. (1DSE), Fig. 1 (not shown) is connected through incoming links ALL (I) and outgoing links ALL (0) &c. operating at various bit rates to a second-order multiplexer (2M/D) and thence through a first order multiplexer (IM/D) to individual subscribers (ACDTE), each pair of lines being designated to a specific group, e.g. 120 channels at 12 Kb/s. or 24 channels 60 Kb/s. Local subscribers may be fed in directly and junction links JL(I)(0) pass to another main trunk exchange (2DSE). Each incoming link is terminated at a frame aligning device WCFA providing bit and frame aligning by means of a buffer store and which also converts character interleaved (bipolar) stream to binary, the output being passed to a demultiplexer ALD &c. (see also Fig. 8, not shown) which breaks down into 24 channels of relevant speed one for each subscriber, also character detectors ASDL &c. (see Fig. 7, not shown). Incoming link- JL(I), 16 x 60 Kb/s., dedicated to circuit switched calls, is directed to demultiplexer JD and character detector JSD. A tapping is also made through highspeed channel equipment IHE and interface IPI to common control equipment CCE and message packet store MPF. Output from demultiplexer JD is divided among channel groups A1-H1 &c. so that each group includes 24 designated subscribers of a local geographical area, and an arbitrary number related to junction traffic involving subscribers of the same bit rate. Data links ADL (I) &c. serving stations local to the exchange are not multiplexed hence are passed directly to highway DIHX. Secondary character detector DSD which can serve up to 24 type D stations at 60 Kb/s. is fed by a 1.536 Mb/s. multiplexer ISM receiving signals from a plurality of devices WCFA.  Each signalling detector ASDL &c. is responsive to valid signalling characters. Each detected character is passed to a relevant one of a plurality of storage buffers in CPRA controlled by a central control CCE which incorporates a "map" representative of "busy" and "free" states of all stations and channels, such map being consulted in response to address information. The control equipment also receives information from message heading registers MHRA &c. to control store MPS, packet assembly buffers PABA &c., and dissembly buffers PDBA also incoming and outgoing packet interfaces IPI, OPI in order to control equipment SACE and to activate signalling character generator SCG, character outputs of the latter being selectively connectible over cross-point switch array FCCA to groups AOH1 &c., working at 60 Kb/s; 24 highways AOH1-X are combined in a single outgoing 1.536 Mb/s. multiplex channel, multiplexers BLM, CLM &c. being related to sets of 24 outgoing highways BOH1-X, COH1-X &c., these being related to B, C, D stations. Fig. 9 (not shown) gives details of a typical multiplexer. Outgoing highways individually dedicated to directly connected subscriber stations pass through separate waveform and sync. pattern devices WC. Junction multiplexer JM has its 16 input leads distributed amongst the remaining highways of each group. The pattern of outgoing highways is identical to the incoming as they join identical subscribers' stations and the same appearance time is apportioned to each related pair. Bit streams emerging from ALM &c. are passed through individual waveform and sync. pattern inserting devices WC to outgoing links ALL (O) &c. also to common IDLE signalling character detectors AIDL &c. An additional similar IDLE detector DID through multiplexer OIM is provided for highways DOH1-X.