Patent GB-749573-A (GB)
Title: Synchronising arrangement, particularly for television apparatus
Inventor: PUGSLEY DONALD JOHN DAVEY
IPC: H01J25/54
Filed: 1952-01-23
Abstract: 749,573. Automatic frequency and phase centre! systems. PYE,Ltd. Jan. 23, 1953 [Jan. 23, 1952; Jan. 23, 1952], Nos. 1877/52 and 1878/52. Class 38 (4). [Also in Group XL (b)] The wave-form to be radiated from a television transmitting station is locked in step with the wave-form received from a remote camera having its own wave-form generator, for example a camera in a remote studio or used for an outside broadcast. The changeover from one studio to another is thus simplified, and fading in and out may be effected between parts of a programme produced in a main and a remote studio. Tig. 1 shows in block diagram, the circuit arrangement at the main studio, the line pulse synchronizer being shown in the dotted enclosure A, the frame synchronizer in B, and the local line and frame pulse generators in C. Line synchronization.-The incoming composite signal passes through an amplifier 1 and sync. separator 2 to a differentiator or blocking oscillator 3 whose output is fed through a gate 4, reverser 6, and phase splitter 5 to a phase discriminator 7. A saw-tooth oscillator 8 operating at twice line frequency feeds through a cathode-follower 9 to the discriminator 7, the output of which adjusts the frequency of the oscillator 8. The cathode-follower 9 feeds a clipper circuit 13 and further cathode-followers 12, 14, from which synchronized pulses at twice line frequency pass through a switch S to the local sync. pulse generator C. This, after halving the frequency in a divider 15, provides at 16 the line sync. pulses for the radiated waveform. The cathode-follower 14 also feeds back through a multivibrator divider 10 to open the gate 4 at every second oscillation of the source 8. The sawtooth wave-form derived from the stage 9 is passed to a clamp circuit 11 and is clamped to a pre-set D.C. potential and fed to the following stage 12.' The clamp circuit 11 is fed through a phase-splitter 19 from the pulse output at the stage 3. Frame synchronization.-The complete incoming sync. signal from the separator 2, see Fig. 4 (a), is fed through an amplifier 21 and a delay and differentiating network 22 to a gate 23, which is opened by pulses from the amplifier 21. Fig. 4 (b) shows the delayed and differentiated pulses, and Fig. 4 (c) the output from the gate. This output which exists only during the incoming frame pulses is fed in cascade to three binary counters 24, 25, 26 producing successively the wave-forms (d), (e), (#), the last being passed through a differentiator 27 and amplifier 28 to trigger a mono-stable multivibrator 29 adjusted to give a 50/50 pulse, restoring after half a frame period. Thus a switching pulse 42, Fig. 4 (g), is generated at the position shown, thereafter allowing the locally-produced line sync. signals 43 from the source 16 to pass through a gate 30 and a reverser 31 to a further gate 32, which is opened by the locally-produced frame sync. pedestal 41, Fig. 4 (j), generated by the source 37. Thus the number of pulses 43 which pass the gate 32 depends on the time interval between the pulse 42 and the trailing edge of the pedestal 41. The pedestal 41 is also fed to a gate 33 and is allowed to pass only during the period 41, 42, Fig. 4 (k), when the line sync. pulses 43 are suppressed. A fourth gate 34 is fed.with pulses 40, Fig. 4 (h), from the controlled oscillator 8 operating at twice line frequency, which pulses pass the gate except during the said period 41, 42. The output pulses from the gates 32, 34 join in the cathodefollower 35 and are fed through a switch 82 to the local sync. pulse generator C where a counter divider 36 produces the frame sync. pedestals at 37. If the frame pedestals 41 synchronize with the incoming frame sync. pulses, the wave-form of Fig. 4 (k) is produced, in which two pulses 43 replace the two pulses lost during the period 41, 42. If the frame pedestals deviate from synchronism in either direction, this balance is upset and the count at 36 is advanced or retarded, thereby re-phasing the framing pedestal into agreement with the incoming frame signals. The dividers 24, 25, 26 are re-set by a valve 20 triggered by the trailing edge of the -pulse 42, in the manner described in Specification 717,849, [Group XL (c)]. One form of the sync. pulse generator C is described in Specification 749,575, [Group XL (b)]. When the switches S1, S2 are in the position shown in Fig. 1, the line and frame sync. generators 16, 37 are controlled by an oscillator 17, which is not subject to automatic control by incoming sync. signals. In a modified circuit (Fig. 5, not shown), the gate 34 is replaced by an amplifier, feeding the output of the gate 33 to the cathodefollower 35. The pulse output of the cathodefollower 14 is fed through a single switch to both dividers 15, 36, and only correcting pulses are applied from the cathode-follower 35 to the divider 36. The feed line from the cathodefollower 14 to the gate 34 is omitted. Fig. 7 shows the first binary unit 46 of the divider 36 which comprises a plurality of such units operating as described in Specification 717,849. Input pulses applied to the grid of cathodefollower 45 are repeated at the cathode of the unit 46, causing the cross-connected valves to reverse, and giving output pulses from one of the anodes to the next unit. The grid leaks of the unit 46 are earthed through rectifiers R1, R2 poled to pass grid current. Correction pulses from the cathode-follower 35, Fig. 5, are amplified in a valve 47 and applied to the junction of the grid leak and rectifier R2. Re-setting pulses derived from subsequent stages of the divider chain when the desired count is completed, are applied to the rectifier R1. Fig. 8 shows a modified form of the framephasing circuit B. The complete local sync. signal is fed from the source C to a frame sync. separator 50 and thence to a multivibrator 61 where the frame pulses (a), Fig. 9, are converted to the 50/50 form (b). Line sync. pulses from the local source C are mixed with the pulses (b) in a mixer 52, giving an output (c), which is fed to a gate 53. This is open only during the presence of incoming frame pulses (d) received through a separator 55. With the phasing shown, the output from the gate 53 is of the form shown at (d), and is amplified and inverted at 54 and fed to a further gate 56 which is closed during the occurrence of the local frame pulses (a). The output from the gate 56 is passed through a cathode-follower 57 to the divider 36 in the sync. generator C, and serves as a correcting pulse for the counter-divider 3. When the incoming pulse (d) is in phase with the local pulse (a), no output passes to the counter 36, whilst if the incoming pulse occurs early, as at (e), a number of pulses at line frequency pass to the counter to adjust the count until correct phasing is achieved. If the incoming pulse occurs late, a pulse passes to the counter to suppress its action for the duration of the pulse and so adjusts the count in the correcting sense. The frame phasing arrangement per se is the subject of Specification 749,595.