Patent GB-1308130-A (GB)
Title: Translator and sorting system including same
IPC: G06F7/10
Filed: 1971-04-19
Abstract: 1308130 Document sorter; digital conversions INTERNATIONAL STANDARD ELECTRIC CORP 19 April 1971 [25 March 1970] 24512/71 Headings G4H and G4M Document sorting system for documents data fields each having a field identification symbol and a maximum of 6 digits has a document reader RD feeding b.c.d. digits to a decoder supplying a signal on one out of 10 lines a0 to a9. The ten lines feed a translator containing 18 OR gates or mixers nine of which feed first output leads respectively and which have as inputs lines a1 to a9, a2 to a9, a3 to a9, ... a8-a9, a9 respectively and the other 9 of which feed second output leads respectively and have as inputs a0, a0 to al, a0 to a2, ... a0 to a8. The 18 leads each feed an AND gate, the gates associated with the first output leads being enabled by a T 1  clock pulse and the gates associated with the second output leads being enabled by a T 2  clock pulse, the clock pulses being consecutive non-overlapping pulses (Fig. 6, not shown). If a line such as a5 is enabled to indicate a digit 5 input a "1" appears on all first output leads coupled to the a5 line i.e. b1-b9, to b5-b9 and a "1" appears on all second output leads coupled to the a5 line i.e. b0-b5 to b0- b8. Each AND gate coupled to first output leads b1-b9 to b5-b9 i.e. gates G00, G01, G02, G03, G04 passes a T1 clock pulse and each AND coupled to the second output leads i.e. gates G<SP>1</SP>06, G<SP>1</SP>07, G<SP>1</SP>08, G<SP>1</SP>09 passes a T 2  pulse so that on lines d0-d9 corresponding to the AND gates a T 1  pulses appears on all lines less significant than the input digit no pulse appears on the line corresponding to the input digit and a pulse T 2  appears on all lines more significant than the input digit. The lines d0-d9 are connected to a set of sort keys SK 1-18 by a programmable plug board PB. Eighteen sort keys SK 1-18 each contain 6 digit terminals E1-E6 corresponding to the possible six digits in each field, a terminal OLS and a count enable terminal F. The digit terminals are coupled to gates G1-G6 respectively consecutively enabled by clock pulses C1-C6. Gates Gt-G6 feed an OR gate M21 and an AND gate G19 enabled by a pulse from terminal F 1 , terminals F1-F18 being selectively enabled by a counter FC according to the field to be read. Gate G19 feeds three AND gates G201, G211, G221. G201 is enabled by timing pulse T 3  occuring during timing pulse T 1 . G211 and G221 are enabled by timing pulse T4 occuring during timing pulse T 2 . Gate 211 is coupled to terminal OLS1 and G221 is coupled to OLS1 via an inverter I11. Gates G201, G211 feed the set terminal of flip-flop BS11 and G221 feeds the reset terminal.  Operation.-The system may select documents having a specific data e.g. a four digit number 1027 by coupling terminals E16 to E11 to the appropriate digit positions D0-D9 with E11 corresponding to the last significant digit as shown. If the document carries the correct digit in the appropriate position line d0-d9 carries no signal and BS11, reset at the start of the operation remains reset since AND gates G201-G221 remain unabled. If a digit occurs higher or lower than the required digit a T 1  or T 2  pulse respectively passes AND gate G191. For this sorting operation OLS1 pulse passes G201, G211 respectively to set BS11. If BS11 is reset the documents are fed to a storage bin 014. If BS11 is set an address from a decoder (Fig. 5, not shown) is passed by gates G271- G275 to pass the document to an address determined by the most significant digit of the data. A five bit address f1-5 having four b.c.d. digits and a parity bit may be used. The system may also sort documents having data existing between two limits. In this case the digits of the higher limit 1027 are coupled to SK1 and the digits of the lower limit 0037 to SK 18 as shown. If a digit occurs higher than the required number a T1 pulse, enabled by T 3  sets BS11. If a lower digit occurs gate G211 enabled by 0LS1 and inverter I11 passes a T4 pulse to reset BS11. At the end of a sorting operation an SC1 pulse enables gates G231, G241. If the number is higher than required G231 enables G271-G5 to pass the documents to addresses depending on their most significant digits and counter SCC is stopped. If BS11 is reset counter SCC continues until gates G2318, G2418 are enabled by SC18. If BS118 is set the number is above the lower number and address 014 is enabled. If the address is below the number the following pulse SC19 enables supply of the address depending on the most significant digit of the data.