baber/WOPTO huggingface dataset:
Patent TW-213967-B (TW)
Title: Construction method for an indoor concrete wall
Inventor: SHYU FUN-JIUNN
IPC: E04B2/84
Filed: 1993-05-07
Granted: 1993-10-01
Abstract: A construction method for indoor concrete walls comprises the installation of piles in which polygonal piles each having a locating portion formed on each side of the polygon are fixed between a reinforced steel structure that has been built in its position and slabs. The locating portions are configurated to fit to the reinforced steel. Piles are secured to the reinforced steel by way of the locating portions, with the side opposite to the locating portion being in contact with slabs. After grouts being solidified, the slabs are removed and so the pile is fixed to the wall, with one side thereof flush with the wall surface. Finally attach panels to the piles built in walls and apply a layer of painting on the panels.
Patent TW-247342-B (TW)
IPC: F16B37/08
Filed: 1994-06-21
Granted: 1995-05-11
Abstract: A coupling device including a first member provided with external threads and a second member having an opening therein into which the first member is inserted. The second member is provided with a plurality of movably mounted internally threaded elements for receiving the external threads of the first member. A structure is provided whereby the first member may be inserted within the second member by rectilinear sliding movement, afterwhich the first member is rotated into tight engagement with the second member. Release of the first member is accomplished by rotating the first member very slightly in the opposite direction, afterwhich simple manual manipulation of the second member withdraws the threaded elements from engagement permitting the first member to be slidably removed from the second member.
Patent TW-279895-B (TW)
Title: The high-performance binder and the compositions of precision injection molding for metal powder
Inventor: CHEN WENN-SHINN
IPC: C09J123/14
Filed: 1994-08-11
Granted: 1996-07-01
Abstract: The high-performance binder of precision injection molding for metal powder consists of the following materials: a) polyolefins; b) polystyrene or polymethyl methacrylate; c) compatible auxiliary; and d) dispersant. The polyolefin is selected from polyethylene, poly-propylene, polybutylene and its mixture. The compatible auxiliary is selected from ethylene, propylene, butylene, n-pentene and its mixture and the copolymer of styrene group. Its ratio to the total weight of (a), (b) and (c) is 1~100 wt%. The dispersant is selected from stearin, wax and its mixture.
Patent TW-265451-B (TW)
IPC: H01H33/666
Filed: 1995-03-28
Granted: 1995-12-11
Abstract: In a known drive arrangement in which the switching-off process is initiated after actuation, for example, of an electromagnet by a pin secured to an "off"-trigger shaft as a result of rotation of the latter, thereby enabling a roller of the switching lever to run past the "off"-trigger shaft, the switching-off process occurs when the switching lever has rotated back and the articulated lever systems have moved out of the extended position. However, as the switching lever moves past, it strikes the "off"-trigger shaft. In order to reduce the resultant wear of the "off"-trigger shaft (6) and to actuate the wiping contact (11') associated with the "off"-trigger shaft (6) only during the switching-off process, so as to attain an even greater number of switching cycles, the switching lever (1) has a circular segment (7) with the peripheral surface (9) of which the "off"-trigger shaft (6) is operationally connected in any position of the switching lever (1). Detachably mounted on the "off"-trigger shaft (6) is a trigger bar (11) for connecting and disconnecting a wiping contact (11'). The drive arrangement can also be used for small oil-volume power circuit breakers.
Patent TW-332314-B (TW)
Title: The semiconductor device and its producing method
Inventor: EMA YASUSHIME
IPC: H01L27/08
Filed: 1995-04-21
Granted: 1998-05-21
Abstract: A semiconductor device, its features include: The semiconductor substrate of 1st conductive-type; Form the 1st well of 2nd conductive-type inside the 1st area on main surface of semiconductor substrate. Form the 2nd well of 2nd conductive-type inside the 2nd area on main surface of semiconductor substrate. Form the 3rd well of 1st conductive-type inside the 1st well. Form the 1st conductive-type thickly dopant inside the 3rd well, and inside the substrate spaced from the device area of substrate surface. Form the 1st MOS transistor of 1st conductive-type inside the 2nd well. Form the 2nd MOS transistor of 2nd conductive-type inside the 3rd well. The density-distribution of 2nd conductive dopant from main surface of substrate inside the 3rd well to bottom of 1st well is almost equal to the density-distribution of 2nd conductive dopant from main surface of substrate inside the 2nd well to bottom of 2nd well.
Patent TW-280933-B (TW)
Title: High utilization sputtering target for cathode assembly
Inventor: STEVEN HURWITT
IPC: H01L21/203
Filed: 1995-05-16
Granted: 1996-07-11
Abstract: A sputtering target 40 or 80 comprises a disc 42 or 82 machined from a first piece of target grade material, having a front sputtering face 44 or 84 and a rear face 46 or 86 opposite. The sputtering face and target material erode during use to define a final sputtered face contour 48 or 88 and a residual target thickness t measured from the rear face. A hub 50 or 90 is machined from a second piece of material and is secured to the rear face of the disc. The securement device 54, 56 or 94, 98 utilizes a depth of target material measured from the rear face which minimizes the thickness t in a region adjacent the hub so as to maximize the amount of the target grade material sputterable before in the region before encountering the securement device. In another form, the disc 12 and hub 20 are forged from a single starting slug of target grade material. The slug has an initial height to diameter ratio such that the flow lines 24 developed in displaced target material during forging which turn upward from the disc into the hub are located at a depth of the target material measured from the rear face which also minimizes the thickness t so as to maximize the amount of the target grade material sputterable.
Patent TW-329561-B (TW)
Title: The semiconductor memory device
Inventor: IKURA KOUICHI
IPC: G11C7/12
Filed: 1995-05-18
Granted: 1998-04-11
Abstract: A semiconductor memory device includes: - Memory cell; - Bit line for reading-out the information of memory cell; - Precharge circuit for injecting charge into bit line by activating the inputted precharge signal before reading-out the information from memory cell; - Voltage-reducing circuit for limiting the charge amount injected into BL by activating the precharge signal during the precharage circuit to inject charge into BL.
Patent TW-372231-B (TW)
Title: Purification of allyl chloride
Inventor: DE JONG ABE WIEBE
IPC: C07C17/38
Filed: 1995-07-18
Granted: 1999-10-21
Abstract: A process for the removal of (cyclo)aliphatic hexene and hexadiene isomers from allyl chloride, characterized by a chlorinating step which is performed in the liquid phase, at a temperature of between -20 and 120 degree C and at a pressure which is sufficient to ensure that the alkyl chloride is liquid at the temperature employed, the amount of chlorine used being between 1 and 5 mol per mol of combined (cyclo)aliphatic hexenes and hexadienes originally present in the crude allyl chloride.
Patent TW-333617-B (TW)
Title: Fiber optic connector element
Inventor: RICHARD A PATTERSON
IPC: G02B6/38
Filed: 1995-07-31
Granted: 1998-06-11
Abstract: A kind of connector for interconnecting the bare ends of two fiber optic which has the following parts: - the first plate member, comprising contact surface and edge for fiber optic - the second plate member, comprising contact surface and edge for fiber optic, the at least one contact surface has an fiber-receiving groove and the contact surface of the first plate member is located at the position neighboring to the edge of the second plate member - a device used to clamp the plate members on the edges along the longitudinal direction.
Patent TW-418201-B (TW)
Title: Hetrocyclic derivatives and medicine
Inventor: CHOKAI SHOICHI
IPC: C07D403/00
Filed: 1995-09-25
Granted: 2001-01-11
Abstract: A medicine comprises, as active component, a compound of the following [I] on the salt thereof. The compound of the present invention has an excellent inhibitory activity for necrosis of neurocyte and can be use as treating agent for cerebrovascular disease wherein R1: aryl or aromatic heterocycle group, R2: H, alkyl, alkenyl, cycloalkyl, cycloalkyl, alkyl, hydroxyalkyl, halolkyl, alkoxy, alkylthio, amino, monoalkylamino, dialkylamino or phenyl, R3, R4: H or alkyl, or NR3R4: 5-7 membered cycloamino, A: C2-10 alkylene, w: O, S or (CH)n (CH may be substituted by alkyl, n: 0, 1 or 2). X, Y, Z: CH (H maybe substituted by alkyl) or N, provided that X, Y, Z cannot be CH simulataneously.
Patent TW-400497-B (TW)
Title: Memory structure for computer drawing
Inventor: WANG BAU-TIAN
IPC: G06F3/00
Filed: 1995-12-18
Granted: 2000-08-01
Abstract: The computer drawing memory structure has a frame buffer and a buffer with forward and reverse parts in each buffer;, in which each part is wide enough to process a pixel color or Z-value. A data path is connected to the buffer so that a pixel color and Z-value of data processed by each I/O process are transmitted at the same time to the drawing processor along the data path in 3-D application. In each I/O process of the 2-D application, data of two pixels (i.e., color values) are transmitted to the drawing processor along the data path. Because there are always a color value of pixel and Z-value transmitted to the 3-D processor concurrently in each I/O process in 3-D application, the first process similar to reverse switch of a multiplexer, primarily prevents from mixing up when the color value and Z-value are switched to the color and Z-value processors. The second process similar to reverse switch of a multiplexer, switchs the data processed by the color and Z-value processor to adequate buffer register for storage. In 2-D application, there are data of two pixels are sent to 2-D processor in each I/O process. The main purpose of the third and fourth reverse switches similar to the first and the second reverse switches are to switch the data to the correct processors for processing and switch the processed data to the correct buffers for storage.
Patent TW-283768-B (TW)
Title: Parallel signal processing scheme for high speed timing recovery
Inventor: RON KAO
IPC: G06F11/28
Filed: 1996-02-08
Granted: 1996-08-21
Abstract: A device of high speed timing recovery signal by parallel signal processing scheme comprises multiple data sampling processor, one central phase error processor and one recovery clock phase adjuster. It has the features of: the above multiple data sampling processor sample transmission data and process sampled data in sequence, and transmit processed error message to central phase error processor which processes error message of each data sampling processor, and generates and transmits final phase error signal to recovery clock phase adjuster. Recovery clock phase adjuster adjusts sampling clock phase of each data sampling processor according to final phase error signal. Because simultaneously there is one data sampling processor set is sampling transmission data, another or multiple data sampling processor are processing sampled data, and one or multiple data sampling processor are adjusting sampling clock, timing recovery of high speed network could be real-time processed by parallel processing function.
Patent TW-295727-B (TW)
Title: EEPROM cell with channel hot electron programming and method for forming the same
Inventor: STEPHEN FRANK GEISSLER
IPC: H01L21/8247
Filed: 1996-02-29
Granted: 1997-01-11
Abstract: An EEPROM memory cell has a floating gate structure that extends over a sharp edge of a memory cell trench and into the trench. Channel hot electron injection techniques are used in conjunction with the floating gate structure to lower required programming voltages and times for the EEPROM cell. Further reductions in programming times and voltages are achieved using trench sidewall diffusions and substrate surface grooves. When used, the floating gate contourally follows the grooves intersecting the surface of the substrate.
Patent TW-293164-B (TW)
Title: A ball grid array structure and method for packaging an integrated circuit chip
Inventor: JAMES J D LAN
IPC: H01L23/50
Filed: 1996-03-15
Granted: 1996-12-11
Abstract: An integrated circuit (IC) package substrate has a dielectric layer and a micro filled via formed substantially in the center of a hole in the dielectric layer. The IC package substrate has at least one chip bonding pad and one ball attach pad that are electrically coupled to each other by the micro filled via. The micro filled via is formed of a material called a "micro filled via material" that includes a binding material and optionally includes a number of particles (between 0%-90% by volume) dispersed in the binding material. The binding material can be any material, such as a polymer that is either conductive or nonconductive. The particles can be formed of any conductive material, such as a conductive polymer or a conductive metal (e.g. copper or gold). An electrical conductor can be originally formed simply by contact between conductive particles located adjacent to each other. In an optional step, the micro filled via is subjected to a programming current (in a step called "programming") to lower the resistance of an originally formed electrical conductor, or to originally form an electrical conductor by break down of a dielectric material. The ICpackage substrate can be formed in either a cavity up or acavity down configuration.
Patent TW-319850-B (TW)
Title: The text-line taken-out system and program memorized medium
Inventor: SAITO TAKAMURA
IPC: G06F13/36
Filed: 1996-05-25
Granted: 1997-11-11
Abstract: A text-line taken-out system. Its features include: - Operating system executed method for executed operating system of application program interface, which includes text output part; - Application program executed method for executed the application program, which is acted on operating system and provided text-line to operating system through text output for displayed the text-line on displaying frame; - Drawing method for wrote the picture into cursor position of displaying frame, and let application program to output redisplayed text-line; - Input method for taking out text-line, which is located beside cursor position, from redisplayed text-line outputted by application program. Then, proceed redisplay text-line, which is provided to operating system through text output part.
Patent TW-385328-B (TW)
Title: Corrosion inhibitors in powder coatings
Inventor: BRAIG ADALBERT
IPC: C09D5/08
Filed: 1996-05-28
Granted: 2000-03-21
Abstract: A description is given of powder coating compositions comprising a) an organic film-forming binder, and b) as corrosion inhibitor i) at least one compound of the formula (I) in which R1 is hydrogen, C1-C12alkyl or C5-C8cycloalkyl; X is oxygen, sulfur or -NH-; Y is a direct bond, methylene, -CH-CO2R1 or -CH2-CH-CO2R1; and Z is oxygen or -N-R1; and ii) at least one calcium-modified silicate pigment.
Patent TW-343177-B (TW)
Title: Novel pouches for packaging flowable materials
Inventor: DANIEL J FALLA
IPC: B32B27/32
Filed: 1996-10-05
Granted: 1998-10-21
Abstract: A pouch containing a flowable material, the pouch being made from a film structure with at least one seal layer of a polymeric composition comprising: (A) from 10 to 100 percent, based on the total weight of the composition, of a mixture of (1) from 5 to 95 percent by weight, based on 100 weight parts of the mixture, of at least one uniformly branched substantially linear ethylene/alpha-olefin copolymer characterized in having: (a) a melt flow ratio, I10 /I2, ≧5.63; (b) a molecular weight distribution, Mw/Mn ratio, of Mw/Mn≰(I10 /I2)-4.63; and (2) from 5 to 95 percent by weight, based on 100 weight parts of the mixture, of at least one high pressure low density-polyethylene having (a) a density from 0.916 g/cc to 0.93 g/cc, (b) a melt index (I2) of less than 1 g/10 minutes and (c) a melt strength greater than 10 cN as determined using a Gottfert Rheotens unit at 190° C.; and (B) from 0 to 90 percent, based on the total weight of the composition, at least one polymer selected from the group consisting of an ultra low density polyethylene, a linear low density polyethylene, a high pressure low density polyethylene, an ethylene-vinyl acetate copolymer, and a homogeneous branched linear ethylene polymer.
Patent TW-432326-B (TW)
Title: Microcomputer
Inventor: OHSUGA HIROSHI
IPC: G06F13/16
Filed: 1995-12-12
Granted: 2001-05-01
Abstract: Embedded registers are divided to the first registers 5, 7 and the second registers 4, 6. Via the third major lines XAB, XDB along with the second major lines YAB, YDB, they can be accessed in parallel. Consequently, core 2 of CPU can simultaneously transfer two data to DSP engine 3. The third major lines XAB, XDB and the second major lines YAB, YDB together with the first major lines IAB, IDB of external port as well as the second major lines YAB, YDB together with the first major lines IAB, IDB of external port are all individualized. Core 2 of CPU is parallel with the second register 4, 6 and the access of the first registers 5, 7 can be done externally.
Patent TW-333693-B (TW)
Title: The Schmitt trigger with exempting electrostatic discharge ability
Inventor: WU JAU-NENQ
IPC: H01L23/60
Filed: 1997-01-24
Granted: 1998-06-11
Abstract: A Schmitt trigger with exempting electrostatic discharge ability, it includes: A 1st PMOS transistor, a 2nd PMOS transistor, a 1st NMOS transistor and a 2nd NMOS transistor, and serially connecting the above 4 transistors together. The source of 1st PMOS transistor is coupled to the node of 1st voltage electricity source. The drain of 2nd NMOS transistor is coupled to the node of 2nd voltage electricity source. In which, the 4 gates of 1st & 2nd PMOS transistor and 1st & 2nd NMOS transistor are receiving a input signal, and the connecting node of 2nd PMOS transistor and 1st NMOS transistor is the output signal end of Schmitt trigger. The bypass PMOS, with its gate is coupled to above output signal end. The drain is coupled to the node of 2nd voltage electricity source. The source is coupled to connecting node of 1st NMOS transistor and 2nd PMOS transistor. The bypass NMOS, with its gate is coupled to above output signal end. The source is coupled to connecting node of 1st NMOS transistor and 2nd PMOS transistor. The drain is coupled to a load. And the load is coupled to the node of 1st voltage electricity source.
Patent TW-417215-B (TW)
Title: An integrated circuit package with internally readable permanent identification of device characteristics
Inventor: HYDE JOHN W
IPC: H01L23/06
Filed: 1997-03-24
Granted: 2001-01-01
Abstract: An integrated circuit (IC) device  package that includes permanent identification regarding the device characteristics, wherein the permanent identification are at or below the surface of the package and may indicate the operating frequency of an IC die within the package, as well as voltage requirements, etc.
Patent TW-412740-B (TW)
Title: Information recording method and device
Inventor: MINEMURA HIROYUKI
IPC: G11B20/10
Filed: 1997-05-22
Granted: 2000-11-21
Abstract: The information recording method specified in the invention forms recording marks in the data field of the storage medium and records the data by corresponding to the two end portions of the recording marks. There are the first and second adjustment fields before and after the data field. In line with the alternation of the lengths of the first and second adjustment fields, the starting position of the first adjustment field is changed and the position of the data field is shifted. Moreover, when same data is recorded plural number of times, an array of record marks recorded on the recording medium in association with the information includes an array in which the record marks and the spaces between the marks are reversed each other in their positions.
Patent TW-486385-B (TW)
Title: Reversible tip assembly, indicator, installation tool, and method of installing a replaceable tip element in a rotatable turret assembly
Inventor: KIEFFER JOSEPH W
IPC: B05B15/02
Filed: 1997-08-09
Granted: 2002-05-11
Abstract: A reversible spray tip assembly with a replaceable tip member keyed to orient an orifice therein to a turret of the assembly and carrying a replaceable member having visually perceptible indicia to identify the size and fan width of the orifice of the tip member installed in the turret assembly. The replaceable member may be in the form of a plug, clip, band, sticker, or tablet insertable into the handle of the turret, or the handle itself may be user-replaceable. Alternatively, thumbwheels may be provided in the handle to display the tip identification indicia.
Patent TW-417062-B (TW)
Title: Method and microprocessor capable of correcting the built-in program code
Inventor: JI HUA-JANG
IPC: G06F9/06
Filed: 1997-08-11
Granted: 2001-01-01
Abstract: The present invention relates to a method and microprocessor capable of correcting the built-in program code. Particularly, the present invention relates to a microprocessor whose program memory includes the read only memory (ROM) and random access memory (RAM), which are integrated with a program counter, a special instruction detecting circuit and a multiplexer. If the program code of the ROM needs to be updated, a special instruction including an identification code and destination address is directly written into the corresponding low address of the RAM. As such, when the program counter sequentially points to the addresses of the ROM, the special instruction detecting circuit also detects whether there is program code in the corresponding address of the RAM, and if so, the program counter is transferred to the RAM for reading instruction, so as to flexibly modify the content of the built-in program code.
Patent TW-360802-B (TW)
Title: Color filter and liquid crystal display apparatus
Inventor: TSUDA KEIJI
IPC: G02B5/20
Filed: 1997-09-26
Granted: 1999-06-11
Abstract: A liquid crystal display apparatus comprises: a color filter base plate having a transparent substrate, a black matrix and a colored film of three primary colors provided on the transparent substrate; an electrode-carrying base plate provided with electrodes for applying an electric field parallel to the color filter; and a liquid crystal disposed therein; wherein a spacer is formed on the black matrix by patterning a resin. The color filter facilitates production of a liquid crystal display apparatus.
Patent TW-372921-B (TW)
Title: Apparatus for transferring separate products such as eggs and fruit, from a feed conveyer to a packaging apparatus
Inventor: TEMMING LEONARDUS JOHANNES
IPC: B65B23/00
Filed: 1997-11-20
Granted: 1999-11-01
Abstract: Apparatus for transferring separate products, such as eggs and fruit, from a feed conveyer (1) to a packaging apparatus, which apparatus comprises: a feed conveyer (1) provided with at least one row of product holders; a receiving conveyer (7) provided with brushes, for receiving the products (P) discharged from the feed conveyer (1); and a feed through conveyer (11), connecting to the receiving conveyer (7), for further conveying the product (P) to a packaging apparatus, wherein the apparatus is provided with electrically operable discharge members (6) disposed above the feed conveyer (1), which discharge members are fixedly arranged, while, further means are present for operating these discharge members (6) or for influencing the fall trajectory (T+, T-) of the articles (P) discharged from the feed conveyer, the arrangement being such that these articles (P) end up at substantially the same landing location on the receiving conveyer (7), independently of the speed of travel (V+, V-) of feed conveyer (1) at the amount of discharge.