baber/WOPTO huggingface dataset:
Patent TW-450888-B (TW)
Title: Composite film for capacitor, method for manufacturing the same, and base film therefore
Inventor: FURUYA KOJI
IPC: H01G4/18
Filed: 2000-05-31
Granted: 2001-08-21
Abstract: A composite film for a film condenser, which comprises a biaxially oriented film made of polyethylene-2,6-naphthalenedicarboxylate as a main polymer component and an electrically conductive metal thin layer formed on the surface of the biaxially oriented film, wherein the number of flyspecks (or fish eye) having an average diameter of 60 mu m or greater in the surface of said biaxially oriented film is 20/m<SP>2</SP> or less and the number of portions failing to satisfy a dielectric breakdown voltage of 200 V/mu m (electrical insulation defects) in said composite film is 20/m<SP>2</SP> or less, and a biaxially oriented film. According to the present invention, there is provided a high-quality composite film for a film condenser, which has excellent physical properties and electric characteristics. Further, there is provided a very thin biaxially oriented film excellent in processability and surface properties and usable for the composite film.
Patent TW-463280-B (TW)
Title: Method of producing a contact structure
Inventor: KHOURY THEODORE A
IPC: H01L21/66
Filed: 2000-06-27
Granted: 2001-11-11
Abstract: A method of producing a contact structure for achieving an electrical connection with a contact target. The contact structure includes a contactor formed on a planar surface of a substrate by a microfabrication technology. In one aspect, the production method involves a plastic molding technology. In another aspect, the production method involves a photolithography technology using a gray-tone photomask. The contactor has at least a horizontal portion formed on the substrate and a contact portion formed on one end of the horizontal portion. A spring force of the horizontal portion of the contactor provides a contact force when the contactor is pressed against the contact target. In a further aspect, the contact structure includes a recess for providing a free space for the contactor when the contactor is pressed against the contact target.
Patent TW-I226743-B (TW)
Title: Method to regulate a switching power-supply and said switching power-supply
Inventor: PRELLER PETER
IPC: H02M3/335
Filed: 2000-08-18
Granted: 2005-01-11
Abstract: In order to decrease the switching loss, the frequency of a switching power-supply is decreased by frequency-jump when the output-load becomes lower, but his can result in inferences, for example, a distortion of the picture in a television. The interferences caused by frequency-jumps can be reduced through the adaptation of the regulation-character, but this is expensive. A simple, cheap but especially efficient solution to reduce the interference caused by frequency-jump is to shift the beginning of the frequency reduction in the switching power-supply towards a lower output-lower, thus the frequency-jump occurs in a power-range, where no interference occurs. In order to carry out this method, the control-voltage (UA) of the control-circuit (A) of this switching power-supply is coupled to the input (2) of the primary-current reproducer of the control-circuit (A) through an ohmic (R4, R5) or a capacitive (R3, C3) network. Through this coupling the voltage-increase (U21) on the input (2) of the primary-current reproducer is changed during the conduction interval of the electronic switch (T) of said switching power-supply, so that through the regulation-voltage (UR1) a definite relation between the frequency and the electrical power can be formed. This invention is suitable for a switching power-supply with a primary-current reproducer (for example, Siemens-component TDA 16846). When the switching power-supply of this invention is used in a television, the distortion of the picture will not occur.
Patent TW-I286136-B (TW)
Title: New phenylpiperazines
Inventor: HES ROELOF VAN
IPC: A61K31/538
Filed: 2000-09-01
Granted: 2007-09-01
Abstract: The invention relates to a novel group of phenylpiperazines having interesting pharmacological properties. The invention relates to a group of novel phenylpiperazine derivatives of the formula (I), wherein: X is (1) a group of the formula, wherein S1 is hydrogen or halogen, S2 and S3 are independently hydrogen, alkyl (1-6C), phenyl or benzyl, S4 represents two hydrogen atoms or an oxo group, S5 is H or alkyl (1-4C), and Y is C, O or S, or (2) a group of the formula, wherein S1 has the above meaning and R is H, alkyl (1-4C), alkoxyalkyl (2-6C), alkenyl (2-4C) or alkynyl (2-4C), or (3) a group of the formula, wherein S1 has the above meaning and Z is C, O or N, or (4) a group of the formula, wherein S1 has the above meaning, or (5) a group of the formula, wherein S1 has the above meaning and A is O or N, linked to the piperazine ring with position 5 or 8, or (6) a group of the formula, wherein S1 has the above meaning and S6 and S7 represent hydrogen atoms or an oxo group, or (7) a group of the formula, wherein one of the dotted lines can represent a double bond, S1 has the above meaning, and P=T=Q=nitrogen or P=T=nitrogen and Q=C or P=Q=nitrogen and T=C or C-CH3 or P=nitrogen, and T and Q are carbon or P=nitrogen, T is carbon and Q is sulphur, m has the value 2 to 6; n has the value 0-2; R5 and R6 are independently H or alkyl (1-3C); or R5+R6 represent a group -(CH2)-p wherein p has the value 3-5, and R7 is alkyl (1-3C), alkoxy (1-3C), halogen or cyano; or R6+R7 (R7 at position 7 of the indole group) represent a group -(CH2)q wherein q has the value 2-4, and salts thereof.
Patent TW-483069-B (TW)
Title: Laser curing of spin-on dielectric thin films
Inventor: CHUA CHEE TEE
IPC: H01L21/324
Filed: 2000-09-13
Granted: 2002-04-11
Abstract: A process for curing low-k spin-on dielectric layers based on alkyl silsesquioxane polymers by laser scanning is described wherein curing is achieved by both photothernal and photochemical mechanisms. The layers are deposited by spin deposition, dried and cured by raster scanning with a pulsed laser at energies between 0.1 and 1 joules/cm<SP>2</SP>. Because the laser causes heating of the layer, a nitrogen jet is applied in the wake of the scanning laser beam to rapidly cool the layer and to inhibit oxidation and moisture absorption. The laser induced heating also assists in the discharge of moisture and by-products of the polymerization process. The laser operates at wavelengths between 200 and 400 nm. Insulative layers such as silicon oxide are sufficiently transparent at these so that oxide segments overlying the polymer layer do not inhibit the curing process. Implementation of the laser scanning feature is readily incorporated into an existing spin-on deposition and curing tool.
Patent TW-I239382-B (TW)
Title: Interferometric method for endpointing plasma etch processes
Inventor: HOWALD ARTHUR M
IPC: H01L21/3065
Filed: 2000-11-15
Granted: 2005-09-11
Abstract: A method for monitoring a device fabrication process. The method includes etching a wafer disposed inside a chamber and detecting the intensity of a portion of a light reflected ij from a surface of the wafer and further scattered at a scattering inside surface of the chamber.
Patent TW-501389-B (TW)
Title: Flame-retardant adhesion agent and circuit components using same
Inventor: KUMAKURA MASAYUKI
IPC: C09J7/02
Filed: 2000-10-12
Granted: 2002-09-01
Abstract: This invention provides a flame-retardant adhesion agent for circuit materials, which is harmless to the environment, shows excellent thermo-humidity resistant electrical characteristics and have high flame retardancy. These flame-retardant adhesives contain a saturated polyester resin and a flame retardant containing a component having P-C bond in its molecule and a component having nitrogen in its molecule, and the content of the flame retardant amounts to 90 parts by weight or more per 100 parts by weight of the saturated polyester resin.
Patent TW-523900-B (TW)
Title: Driver IC, electro-optical device and electronic equipment
Inventor: YASUE TADASHI
IPC: G02F1/133
Filed: 2000-11-03
Granted: 2003-03-11
Abstract: A liquid crystal driver IC comprising: a power circuit; an electric volume for varying the output voltage from the power circuit; a temperature detector; and a correction table for storing an electric volume control value corresponding to a temperature detected by the temperature detector. The power circuit includes: a first power circuit having a first temperature-voltage characteristic; a second power circuit having a second temperature-voltage characteristic; and a temperature gradient selection circuit for outputting a voltage conforming with a desired temperature gradient characteristic based on the output voltages from the first and second power circuits. The temperature detector detects an actual temperature based on the first and second temperature-voltage characteristics. The output voltages are adjusted at the electric volume and outputted by the power circuits according to the electric volume control value in the correction table, which is corresponding to an actual temperature detected by the temperature detector.
Patent TW-465049-B (TW)
Title: Method for removing gate silicon nitride layer in logical area in embedded DRAM manufacturing process
Inventor: TU GUO-JI
IPC: H01L21/8242
Filed: 2000-11-10
Granted: 2001-11-21
Abstract: A method for embedded DRAM manufacturing process, in which gate and bitline short and over-etching on semiconductor substrate in the logical area caused by lithography error may be thereby improved. The present invention includes a photoresist layer covering the semiconductor substrate in which the gate structure in the logical area and the DRAM area are respectively covered by a plurality of silicon nitride capping layer; Then, the photoresist layer is exposed to low-energy radiation and developed so that the height of the photoresist layer in the logical area is lower than in the DRAM area. The silicon nitride layer in the logical area is then etched with the photoresist as the mask, LDD-ion-implanted after the residual photoresist is removed, and subsequently the silicon nitride spacer, the silicon nitride liner are formed. The source/drain area in the logical area is then ion-implanted; a first dielectric layer is then formed. A plug is formed in the DRAM area by self-aligned etching. A second dielectric layer is then formed. A capacitor is subsequently formed. Finally, the bitline contact hole and the gate connection hole are formed after a third dielectric layer is formed.
Patent TW-479401-B (TW)
Title: Dynamic CMOS level shift circuit apparatus
Inventor: BU LING-KAI
IPC: H03K3/356
Filed: 2000-12-07
Granted: 2002-03-11
Abstract: A dynamic CMOS level switching circuit apparatus can make the first logic series signal with lower voltage level of the digital electronic system switch to the second logic series signal having higher voltage level. The switching circuit apparatus contains the first transistor pair, which contains the first PMOS transistor and the first NMOS transistor connected in series, and the second transistor pair. The second transistor pair contains the followings: the second PMOS transistor and the second NMOS transistor, which are connected in series; and a power-source turning-off control PMOS transistor. The first transistor pair and the second transistor pair are connected in parallel, and the parallel connection is connected in series with the power-source turning-off control PMOS transistor such that they are connected in between system power source and the grounding potential. The control PMOS transistor is connected to the power source terminal; and the first and the second NMOS transistors are connected to the grounding terminal. The nodes connected mutually to the drains of these transistors of the first transistor pair are connected to the gate of the second PMOS transistor; and the nodes connected mutually to the drains of the transistors of the second transistor pair are connected to the gate of the first PMOS transistor. The gate of the first NMOS transistor is used for inputting signal of the input logic series; and the gate of the first PMOS transistor is used for outputting the switching signal of the switching circuit apparatus. The gate of power-source turning-off control PMOS transistor is controlled by a power source turning-off control signal in order to turn off the first and the second PMOS transistors. In addition, this turning off is continued for a period that is long enough for making the first and the second NMOS transistors complete switching status.
Patent TW-587086-B (TW)
Title: Chemical amplification, positive resist compositions
Inventor: OHSAWA YOUICHI
IPC: G03F7/039
Filed: 2001-03-06
Granted: 2004-05-11
Abstract: A chemical amplification, positive resist composition is provided comprising (A) a photoacid generator and (B) a resin which changes its solubility in an alkali developer under the action of acid and has substituents of the formula: C6H11-(CH2)nOCH(CH2CH3)- wherein C6H11 is cyclohexyl and n=0 or 1. The composition has many advantages including improved focal latitude, improved resolution, minimized line width variation or shape degradation even on long-term PED, minimized defect left after coating, development and stripping, and improved pattern profile after development and is suited for microfabrication by any lithography, especially deep UV lithography.
Patent TW-493071-B (TW)
Title: Substrate inspecting device
Inventor: FUJISAKI NOBUO
IPC: G01B11/00
Filed: 2001-03-19
Granted: 2002-07-01
Abstract: The substrate inspecting device of the present invention comprises: a substrate holding mechanism to hold the substrate to be inspected in a rectangular shape; a driving mechanism to erect the substrate holding mechanism till the predetermined angle; a position coordinates detecting means disposed along at least two perpendicular directions to the side edge of the substrate inspected in said substrate holding mechanism to detect the position coordinates of a defect part on the inspection target substrate; said position coordinates detecting means is provided with two sets of guide rails provided in two directions along the side edges of the inspection target substrate; a light source movably provided along one set of the guide rails provided in one direction of said two directions and emitting light perpendicularly to the one direction; a projected member movably provided in a state laid astride the inspection target substrate along one set of the guide rails provided in another direction of said two directions and projected by the light emitted from the light source, and a detection part positioning the light beam emitted from the light source and the projected member above the defect part and detecting the position coordinates of the defect part on the basis of positions of the light source and the projected member in regard to each set of the guide rails.
Patent TW-566068-B (TW)
Title: Laminated board containing internal layer circuit of multi-layer printed board for high-frequency circuit, method of measuring circuit impedance for laminated board containing internal layer, and its measuring apparatus
Inventor: NAKASHIBA TORU
IPC: H05K1/02
Filed: 2001-03-28
Granted: 2003-12-11
Abstract: The purpose of the present invention is to provide the laminated board containing internal layer circuit for multi-layer printed board, the circuit impedance measurement method for the laminated board containing internal layer, and its measuring apparatus such that it is capable of performing impedance measurement through a nondestructive measurement way and obtaining the measurement with high precision. The laminated board containing internal layer circuit is composed of the insulation substrate, high-frequency circuit formed on the first conductor layer stacked on the insulation substrate, the second conductor layer stacked below the insulation substrate and the third conductor layer stacked via the first insulation layer on the high-frequency circuit. In addition, on the first conductor layer, the circuit for internal layer is independently formed and the test conductor for impedance measurement is formed. One end of the test conductor is exposed from the end face of the laminated layer board.
Patent TW-I233926-B (TW)
Title: Process control for acetic acid manufacture
Inventor: HALLINAN NOEL
IPC: B01J19/00
Filed: 2001-03-28
Granted: 2005-06-11
Abstract: A method of real time process control in a reaction system for the production of acetic acid from the carbonylation of methanol. Reaction system samples are collected from columns (30,40,50,60,70,80) and/or transfer lines (120, 130, 140, 150, 160, 170, 180, 184, 186, 188, 190, 192, 194, 196, 197, 198, 199, 200, 210, 220) downstream of a reactor vessel (10), and the concentration of one or more components in the sample is measured by an infrared analyzer (90). The concentration measurements are then used to make adjustments in the concentration of components in the reaction system, directly or indirectly, such as by adjusting the temperature profile in a particular column (30, 40, 50, 60, 70, 80), the flow rate of solution in to or out of a column (30, 40, 50, 60, 70, 80), the vent gas rate out of the reactor (10) or a column (30, 40, 50, 60, 70, 80), or the addition or extraction of a component to or from the solution. For optimum process control, the measurements are transmitted to a control unit for real time analysis, and the adjustments are made substantially instantly after the infrared analysis.
Patent TW-I270282-B (TW)
Title: Data communication system
Inventor: TAKAHASHI TOSHIHISA
IPC: G11B20/10
Filed: 2001-04-02
Granted: 2007-01-01
Abstract: This invention is to provide a data communication system. When a plurality of peripheral memory devices are connected to a computer, and the plurality of peripheral memory devices, at the same time, proceed with sending data, it is possible to suppress a time that is necessary for sending the data. A node for sending data comprises: a plurality of data compression method for various data compression rate; a data transmitting detecting method for detecting data transmitting speed when transmitting at data transmitting node in communication path; a data compression method selective way to respond to data transmitting speed achieved from the data transmitting speed detecting method; a data receiving node comprising transmitting data decompression method which distinguishes data decompression treating method to decompress the data.
Patent TW-514653-B (TW)
Title: Simplified method to produce nanoporous silicon-based films
Inventor: WU HUI-JUNG
IPC: H01L21/316
Filed: 2001-07-31
Granted: 2002-12-21
Abstract: An improved nanoporous dielectric film useful for the production of semiconductor devices, integrated circuits and the like, is provided, together with novel processes for producing these improved films. The improved films are produced by a process that includes: (a) preparing a silicon-based, precursor composition including a porogen, (b) coating a substrate with the silicon-based precursor to form a film, (c) aging or condensing the film in the presence of water, (d) heating the gelled film at a temperature and for a duration effective to remove substantially all of said porogen, and wherein the applied precursor composition is substantially aged or condensed in the presence of water in liquid or vapor form, without the application of external heat or exposure to external catalyst.
Patent TW-554021-B (TW)
Title: Levelling agents for surface coatings
Inventor: HAUBENNESTEL KARLHEINZ
IPC: C09D7/47
Filed: 2001-08-15
Granted: 2003-09-21
Abstract: The invention relates to levelling agents for surface coatings having a weight-average molecular weight of from 5000 to 100,000. The levelling agent is a branched polymer comprising a free-radically or ionically polymerized base molecule into which macromonomeric units containing at one end a monomeric unit which has an ethylenically unsaturated bond and possessing a weight-average molecular weight of from 1000 to 30,000 have been incorporated by free-radical or ionic copolymerization, the weight fraction of the macromonomeric units, based on the total weight of the branched polymer, being from 1 to 60% by weight. The invention further relates to the use of appropriate polymers as levelling agents for coating formulations and to coating formulations comprising the levelling agents of the invention.
Patent TW-513865-B (TW)
Title: Mitigating interference between wireless systems
Inventor: KITCHIN DUNCAN M
IPC: H04L12/56
Filed: 2001-08-21
Granted: 2002-12-11
Abstract: Two separate radio frequency networks may be operated within interference distance from one another in a way which mitigates the possibility of interference. Using received signal strength indicator data, the nature of the interference may be determined without actually demodulating the interfering signal. The timing of the interfering signal and its characteristic features may be determined. Using that information, together with the probability that any given slot will actually be occupied by an interfering transmission, a statistics package (92) may be developed which gives an indication of the probability of a transmission from the interferer at any given time. That package may be transmitted to other nodes (96) in the same network. When a first node wishes to transmit information to a second node (98), the first node may analyze the statistics package received from the second node (100). The first node may thereby make a determination about when to actually initiate the transmission to the second node (102).
Patent TW-506935-B (TW)
Title: Catenary conveyor belt support apparatus
Inventor: SWINDERMAN ROBERT TODD
IPC: B65G15/08
Filed: 2001-08-28
Granted: 2002-10-21
Abstract: A catenary conveyor belt support apparatus for supporting a conveyor belt having a first ledge and second edge. The support apparatus includes a first support block having a top surface for supporting the conveyor belt at the first edge and a second support block having a top surface for supporting the conveyor belt at the second edge. First and second idler strings extend between and are connected to the first and second support blocks. Each idler string includes one or more idler rollers for supporting the conveyor belt. A pair of resilient biasing members are respectively attached at a first end to each idler string and at a second end to an anchor member. The support blocks and the resilient biasing members inhibit misalignment of the idler rollers and movement of the first and second edges of the conveyor belt to reduce the escape of conveyed material from the conveyor belt.
Patent TW-533359-B (TW)
Title: Programmable digital device
Inventor: SNYDER WARREN
IPC: G06F1/32
Filed: 2001-10-26
Granted: 2003-05-21
Abstract: A new digital configurable macro architecture is described. The digital configurable macro architecture is well suited for microcontroller or controller designs. In particular, the foundation of the digital configurable macro architecture is a programmable digital circuit block. In an embodiment, programmable digital circuit blocks are 8-bit circuit modules that can be programmed to perform any one of a variety of predetermined digital functions by changing the contents of a few registers therein, unlike a FPGA which is a generic device that can be programmed to perform any arbitrary digital function. Specifically, the circuit components of the programmable digital circuit block are designed for reuse in several of the predetermined digital functions such that to minimize the size of the programmable digital circuit block.