Patent GB-1012674-A (GB)
Title: Data retrieval system
IPC: H01F10/00
Filed: 1962-05-22
Abstract: 1,012,674. Electric selective signalling. ULTRONIC SYSTEMS CORPORATION. May 22, 1962 [May 31, 1961], No. 19641/62. Heading G4H. A system for retrieving and displaying stored data relating to company stock prices comprises a central data store and data retriever devices and a plurality of remotely located consoles for selecting and displaying data associated with each data retriever device. A central storage drum memory 10 receives data from a source 12, as described in Specification 1,008,389. The stored data may be displayed at locations near the drum 10 on manually operable consoles 16, the data being read out via an output logic circuit 18 as described in Specification 1,005,567. The data read out from the drum 10 is supplied also to data retrievers 20, 22 connected over communication transmission lines to remote logical switching circuits 28, 36 to which are connected consoles 30, 31. The transmission system may be via a telephone link using two different frequencies to represent "0" and " 1 " bits. The transmission arrangement for the switching circuit 28 comprises a central transmitter and receiver 24, 34 and a remote transmitter and receiver 32, 26. Remote transmitter.-The switching circuit 28 is shown in Fig. 2, and comprises eight consoles 30, 31 (only two are shown) operable under the control of a commutator 40. The output of an oscillator 322 is applied to a synchronizer generator 90 which produces sync. pulses F 1 -F 4 . Each console 30 (Fig. 4) comprises a plurality of manually operable switches 54 representing the category of information required (e.g. high price, low price, last price &c.) and twenty further switches 56 for selecting a desired stock. The manual switches may be as described in Specification 1,012,136, one only of the switches 54 being closed for the required information category, while a combination of the twenty switches 56 is closed to represent the desired stock. In operation, commutators 42, 44 convert the settings of the twenty-eight switches 54, 56 to a serial train of pulses on a line 78. At the conclusion of previous operation cycle, a gate 302 passes a pulse to set a flip-flop 86, thereby causing a single-stage binary counter 92 to count and allowing a flip-flop 82 to produce two " 1 " pulses which are applied to cause the transmitter to transmit two " 1 " pulses as the start of the next request for information. The output of the counter 92 resets the flip-flop 86 and also initiates the stepping of commutators 44, 42 through a cycle of twenty-eight pulses. Central receiver and transmitter.-The selecting signals received at the receiver 34 are applied as pulses to a synchronizer generator 114 which produces timing pulses at the central location, and to a series of shift registers 116, 120, 122, 124, 126, 138, 140. The arrival of the complete message of thirty bits is detected by the reception of the initial two " 1 " bits of the message in the register 140, thereby setting flip-flops 136, 150 to initiate the comparison of the desired stock code and the stock codes read from the drum 10 in a comparison circuit 174. When coincidence is obtained, a train of four pulses is applied to a line 180, thereby gating out in parallel the three decimal digits which each comprise four binary bits in series, of the particular " bin " 190 on the drum, the bin being determined by the single set stage in the shift register 138. This data is fed to shift registers 212, 214, 216 and on completion of the read-out, a signal on a line 185 initiates the transmission of the data to the remote location by enabling a five-stage binary counter 238 stepped by timing pulses produced by the synchronizer generator 114 (now operative under the control solely of an oscillator 179). A flip-flop 232 is operative for a count of five " 1 " bits as the commencement of the message transmitted by the transmitter 24. The contents of the registers 212-216 are then fed serially to the transmitter 24 to produce the twelve " data " bits of the message. The counter 238 then produces an output to terminate the transmission. If the required stock is in fact not represented anywhere on the drum, the comparison circuit 174 produces no output during a complete revolution of the drum 10. A counter 164 detects the completion of such a revolution by counting timing pulses on a drum timing pulse track, the output of the counter being effective to "dump" the digits 1010 in each of the registers 212-216, these digits being ineffective to produce any indication at the remote location. Remote receiver.-The seventeen-bit message is received by a receiver 26, the initial group of five " 1 "s being detected in a shift register 270, Fig. 2. Timing pulses for the remote circuitry are produced by the synchronizer generator 90 operative under the control of the received signals by an oscillator 322. The reception of the five " 1 "s is effective to set a flip-flop 274 to enable a counter 294 which counts up to twelve while the twelve data pulses of the message are supplied over a line 48 to a shift register 278, Fig. 4, the stages of which are connected to relay decoders 282, 284, 286 to operate output decimal character lamp displays 288-292. The attainment of the count of twelve in the counter 294 is effective (1) to step on the commutator 40, thereby enabling the next console 31 and initiating a fresh operation cycle and (2) to reset a counter 300 which produces an output at a count of 127 but during a normal operation cycle is reset before this count. The count of 127 is sufficient to allow for the normal transmission and subsequent reception of data at the remote location, but if, due to some error, no data is received before the count of 127 in the counter 300, the attainment of this count is effective to step on the commutator 40 and to produce an indication that the requested data was not received. Synchronizer generator.-A 32 kc./s. crystal oscillator 322, Fig. 2, applies pulses to a " synchronizer generator " 90, shown in detail in Fig. 5 and including a 5-stage binary counter 320, the " 1 " and " 0 " outputs of the counter stages being connected to AND gates 328-336, which also receive the oscillator pulse, to provide staggered output pulse trains F 1 -F 4 , F 5 , all at a rate of 1 kc./s. The information pulses received at the receiver 26 are applied to a flip-flop 324, Fig. 5, whose output resets the counter 320, so that when information is being received, the output of the synchronizer generator 90 is synchronized therewith. The synchronizer generator 114 at the central office functions similarly.