Patent FR-2848025-A1 (FR)
Title: Protection of an electronic component by a conducting layer with random contact for integrity verification, comprises insulating grid forming micro-channels for access to micro-sensors
Inventor: PATRICE PHILIPPE
IPC: G06F21/87
Filed: 2002-11-28
Abstract: The electronic component (1) has an active face (5) provided with means for integrity verification (14) which comprise a multitude of micro-sensors (15) opening up at the active face in a signature sector covered with an insulating grid (17) so as to form micro-channels (18) for access to the micro-sensors (15), and a covering layer (19) obtained by projecting a viscous conducting material whose rheologic properties are such that the material is extended randomly in height in the micro-channels, either coming in contact with the micro-sensors or remaining at distances from the micro-sensors.  The electronic component (1) comprises an integrated circuit with operational and security zones, where the security zone can inhibit at least some processing carried out by the operational zone. The electronic component comprises on the active face (5) the integrity verification means (14) including an alterable structure (3) forming signature laid out so that the integrity signal can be transmitted only when the alterable structure is intact. The conducting material of the covering layer (19) is predetermined so to become stable after a lapse of time suited to the covering of the grid (17), or so to remain substantially variable after the covering of the grid. The integrity verification means (14) comprise tens to hundreds of micro-sensors (15) which are laid out in an array in the signature sector. The micro-sensor has an area in the plane of the active face of the component which is about 5 micrometre across, with a tolerance of about 2%, and the mutual spacing of the micro-sensors is of the same order. The signature sector has an area in the plane of the active face which is about 1 sq.mm. The grid (17) is extended substantially in the plane of the active face which is about 1 sq. mm. The grid (17) is extended substantially in the plane of the active face within a perimeter which is larger than that of the signature sector. The signature sector is confined to a perimeter demarcated by the connection pads (7) of the component. The micro-sensors (15) are formed in and/or on a passivation layer of the active face, and the grid (17) and the covering layer (19) are deposited on the passivation layer. A method (claimed) for protecting an electronic component is implemented by the electronic component (claimed). An electronic device (claimed) comprises a support substrate, an interface, and an electronic component as claimed. The interface is internal and/or external and comprises an antenna and/or a control element such as push-button, key, sensor or contact, and/or contact terminal, and/or an element, sonic, for dislay or safety. The device is an intelligent porable object such as a chip card with or without contact, electronic tag or ticket, or a portable personal assistant. The device comprises a connection between the pads and the interface which is a string of conducting material, for example of the same material as that for the covering layer of the alterable structure. An equipment (claimed) for manufacturing the electronic component and/or the electronic device protected according to the method is designed so to produce the alterable structure.