baber/WOPTO huggingface dataset:
Patent JP-H01126601-A (JP)
Title: Device for cutting optical fiber
Inventor: SUDA HIROHISA
IPC: G02B6/00
Filed: 1987-11-11
Abstract: PURPOSE:To enable the cutting of different kinds of optical fibers with one kind of cutting machine by combining a cutting machine body and 1st, 2nd guides formed to the shapes adaptive to the single-cored optical fibers to be used according to the kinds thereof with plural kinds of adapters formed freely attachably and detachably in a guide groove. CONSTITUTION:The entire part of the cutting device is constituted by combining the cutting machine body 20 which is provided with two clamps 28, 34, a cutting blade 50 and a presser 52 in the prescribed position on a base 21, is provided with a setting base 22 behind the clamps 28, 34 and is formed with the guide groove 23 atop said and the 1st guide 40 and 2nd guide 44 formed to the shape adaptive to the single-cored optical fibers to be used according to the kinds thereof with plural kinds of the adapters 86A, 86B... formed by being mounted on a plate 88 which is freely attachable to and detachable from the guide groove 23. The need for the plural cutting machines is thus eliminated by exchanging the adapters in accordance with the kinds and applications of the optical fibers.
Patent JP-H02173028-A (JP)
Title: Moisture-curing additive for high resilience foam
Inventor: ROBAATO DON HOITSUTOMAN
IPC: C08L71/02
Filed: 1989-11-02
Abstract: PURPOSE: To improve the wet compression hardening characteristic of highly elastic polyurethane foam by mixing a specified ethylene oxide adduct, a polyether polyol, a catalyst, water and a foam stabilizer.  
     CONSTITUTION: (a) At least one ethylene oxide adduct selected from 3-2 functional initiators (e.g.: glycerin), (b) 4-50 wt.% of a polyether polyol other than the component (a) having a hydroxyl value of 20-70 and an average molecular weight of 4000 or more [e.g.: poly(oxypropylene) glycol], (c) 0.01-5 wt.% of a catalyst (e.g.: triethylamine), (d) water, (e) 0.01-5 wt.% of a foam stabilizer (e.g.: polysiloxane-polyoxalkylene block copolymer) are blended to obtain a high resilience foam wet hardening additive (A). The component A is mixed with a compound having a isocyanate reactive group of the formula (R is a polyvalent organic group consisting of an aliphatic, aralkyl, alkaryl, aromatic or a mixture thereof; Z is the valence of R, which is 2 or more), preheated to 70-80°F, and then reacted at 40-155°F. 
     COPYRIGHT: (C)1990,JPO
Patent JP-H01128692-A (JP)
Title: Television signal narrow-band transmission system
Inventor: OGAWARA TOMIO
IPC: H04N7/12
Filed: 1987-11-13
Abstract: PURPOSE:To transmit a television signal in a narrow-band by time-division- transmitting a 1/2 compressed difference signal and a signal to expand the television signal to double using the signals before and after the horizontal scanning period of the television signal. CONSTITUTION:The television signal to be transmitted is made into a first signal B, a first difference signal DELTAAB is formed with a second signal A, which is the signal before the first signal B for a prescribed horizontal scanning period, and the first signal B, and a second difference signal DELTACB is formed with a third signal C, which is the signal after the first signal B for the prescribed horizontal scanning period, and the first signal B. Further, two compressing signals SPAB and SPCB are formed by compressing the horizontal scanning periods of the first difference signal DELTAAB and the second difference signal DELTACB to a half, an expanding signal SEXB is formed by expanding the first signal B to double, and this expanding signal SEXB and the two compressing signals SPAB and SPCB are successively time division-transmitted respectively. Thus, the television signal can he transmitted in the narrow-band.
Patent JP-S62143325-A (JP)
Inventor: SUGIZAKI KANEO
IPC: H01H13/20
Filed: 1985-12-17
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H08142983-A (JP)
Title: Floating pier
Inventor: HIROSE KOJI
IPC: B63B35/34
Filed: 1994-11-18
Abstract: PURPOSE: To provide a floating pier easy for carriage and free from large oscillation of each unit by the load of pedestrians walking thereon. CONSTITUTION: A connecting piece is projected from the side part of a pier unit 1, and an upper piece 21 and a lower piece are respectively projected in the upper and lower directions. A block body 3 having the tapered face is arranged on a corner part 23 surrounded by the connecting piece and the upper and lower pieces in the angular part of the pier unit 1. A plurality of pier units 1 are arranged so that each corner part may be brought close to each other, and a tightening piece 4 is arranged on the outer side of each block body 3 so as to connect the block body 3 provided on each pier unit 1. A tap plate is screwed to the lower end part of a tightening bolt 5 inserted in the lower tightening piece 4 from the upper tightening piece 4, and a guide member capable of preventing the tap plate 7 from turning together is provided on the lower tightening piece 4.  A tilted piece 40 provided on the upper and lower tightening pieces 4 is pressed against the tapered surface of the block body 3.
Patent JP-H04158255-A (JP)
Title: Controller for heater of air-fuel ratio sensor
Inventor: SUZUKI HIROYOSHI
IPC: G01N27/419
Filed: 1990-10-22
Abstract: PURPOSE:To minimize drop in sensor temperature by housing a current detecting resistor connected to a heater in series inside a coupler on a side of an air-fuel ratio sensor or providing it in the vicinity of the coupler on the side of the air-fuel ratio sensor of a harness. CONSTITUTION:Driving current flowing to a bridge flows via driving leads 203, 207 only to a resistor Rh of a heater 32 and a current detecting resistor Rs but does not flow into control leads 204 to 206, while the resistance of the control leads (R1 + Rc)<<R1<=R2 is satisfied (where R1,R2 refer to resistance of opposite side of the bridge and Rc refers to contact resistance of a coupler 20c). By locating an equilibrium potential detecting point at the tip of a long lead 20l, the influence of the long lead 20l of a harness 20 can be eliminated. Here the resistance Rc is several tens mOMEGA and downward shift of temperature due to the resistance is approximately 10 deg.C or less, so that the temperature of the heater 32 can be controlled to an approximately desired temperature and the drop in temperature of an air-fuel ratio sensor due to the resistance of the harness 20 can be minimized, thereby attaining heater 32 control without deterioration in exhausted gas and degradation of the sensor.
Patent JP-H01128645-A (JP)
Title: Reception control circuit
Inventor: ISHIKAWA YUTAKA
IPC: H04L29/10
Filed: 1987-11-13
Abstract: PURPOSE:To widely decrease the load of a microprocessor by storing a character to a first memory every time the character of a communion circuit is generated, executing an access to a second memory and controlling a latch with the output of the second memory. CONSTITUTION:When the character is generated in the communion circuit, a storage control means 102 transfers the character to a first memory 101 without operating a microprocessor 100 and writes it and the first memory stores the character. A second memory 116 stores interruption control information and latch control information and it is with the value of the first memory 101 which stores the character as an address. Then, interruption is generated in the microprocessor 100 by the input of the value of the specified character and the address of the first memory 101 which stores the character is stored to the latch. The latch stores the address of the character is stored in the first memory 101 so that storing contents can be read by the microprocessor 100 as necessary. Accordingly, the load of the microprocessor 100 is widely decreased.
Patent JP-H10135140-A (JP)
Title: Hetero-epitaxial growing method, hetero-epitaxial layer and semiconductor light-emitting device
Inventor: MATSUOKA TAKASHI
IPC: C30B29/38
Filed: 1996-10-28
Abstract: PROBLEM TO BE SOLVED: To prevent the warping or crack of an epitaxially grown layer and substrate by forming a layer having openings on specified area of the substrate to expose specified parts of the substrate through the openings and selectively hetero-epitaxially growing a semiconductor layer on the exposed parts. SOLUTION: A substrate single crystal 3 uses sapphire. On the exposed surface of the single crystal 3, an SiO2 film 2 is periodically crosswise formed to form a layer having openings through which the sapphire substrate is exposed. An epitaxial crystal layer 4 is selectively grown on the exposed surface of the substrate single crystal 3. After forming electrodes, it is polished and a resist is coated on the epitaxially grown surface as a protective film, and the substrate is scribed from its epitaxially grown surface to form chips, using a diamond scriber. Thus, no crack occurs in the grown epitaxial crystal, and the substrate will not break, making the process easy.
Patent JP-H11122421-A (JP)
Title: Facsimile equipment
Inventor: SAITO TOSHIAKI
IPC: B65H3/44
Filed: 1997-10-17
Abstract: PROBLEM TO BE SOLVED: To provide a facsimile equipment by which the damage of recording sheets can be prevented, a received picture can be surely recorded, and any troublesome can not be imposed on a user, at a low cost. SOLUTION: The paper feeding roller of a manual paper feeding part 106 is composed of a carrying roller 105 of a cassette paper feeding part, and sheets manually fed to the manual paper feeding part 106 are fed by the carrying roller 105. Also, a sheet carrying passage from the manual paper feeding part 106 to a first ejected paper laminating means 111 for laminating recording sheets in a state that the recording faces are faced up is made almost straight so that the sheets of the manual paper feeding part 106 can be linearly carried and ejected. Also, when the sheets are manually fed to the manual paper feeding part 106, and when an ejected paper means switching means 110 is switched to the first ejected paper laminating means 111, memory intercepting or incoming rejection is operated.
Patent JP-H05126638-A (JP)
Title: Spot light position normalizing device
Inventor: MIYAZAKI KIKUJI
IPC: G01T1/29
Filed: 1991-10-31
Abstract: PURPOSE:To resolve the problem that the precision of the normalized position signal of the calculation result of a normalizer deteriorates when an input fluctuation is generated on the normalizer by the fluctuation of the light quantity of the spot light on the photoelectric face of a position detecting element. CONSTITUTION:The added signal of position signals AS, BS of the first and second I/V converters 2, 3 is outputted from an adder 6, the added signal is converted into the added digital signal, and the gain switching signal is outputted from a decoder 8. Amplification factors of the first and second variable amplifiers 4, 5 are switched by the gain switching signal, and amplification position signals A, B keeping the level of the sum of the position signals AS, BS nearly constant are obtained. Amplification position signals A, B are inputted to a normalizer 9, and the position normalized signal of the spot light is obtained.
Patent JP-H04159507-A (JP)
Title: Optical microscope
Inventor: ABE ICHIYOSHI
IPC: G01N21/956
Filed: 1990-10-24
Abstract: PURPOSE:To obtain the microscope which can observe a wide area in a state that high magnification is maintained, and can detect easily a defect in a short time by providing two objective lenses for projecting reflected light from two adjacent areas, and a mechanism for projecting selectively light for transmitting through these objective lenses to an eyepiece. CONSTITUTION:When a shutter 3a is opened by operating a shutter opening/ closing driving mechanism 4, light which is made incident from an objective lens 2a is reflected by a mirror 4a and a half mirror 6 and made incident on an eyepiece 1. Subsequently, when the shutter 3a is closed and a shutter 3b is opened by operating the shutter driving mechanism 4, light is made incident from an area being adjacent to an objective lens 2b, and the incident light is reflected by a mirror 4b and a mirror 5, and also, transmits through the half mirror 6 and is made incident on the eyepiece 1. In such a way, by operating alternately the shutter opening/closing driving mechanism 4, two areas can be observed simultaneously. Accordingly, the whole surface of a semiconductor substrate can be inspected easily and in a short time.
Patent JP-H02131629-A (JP)
Title: Transmitter-receiver for frequency diversity
Inventor: YURI ISAO
IPC: H04B7/12
Filed: 1988-11-12
Abstract: PURPOSE:To reduce number of mixers and local oscillation sections and to simplify the circuit constitution by setting an intermediate frequency, a frequency of a transmission system local oscillation section, a transmission frequency, a reception frequency and a frequency of a reception system local oscillation section to a prescribed relation. CONSTITUTION:A signal of an intermediate frequency IF modulated by a modulation section 1 in the transmission system is sent to a mixer 2 and the IF signal is frequency-converted by a mixer 2 by a signal of frequency FLO outputted from a local oscillator 3. Then the signal whose transmission frequency is F1= FLO+IF, F2=FLO-IF is obtained and a power amplifier section 5 amplifies the signal in a required power and outputted to an antenna system. The signal in the frequencies f1, f2 received from the antenna system in the reception system is subject to low noise amplification by low noise amplifier 6, fed respectively to mixers 7a, 7b and frequency-converted. As a result, the frequency diversity transmission reception is attained and a mixer and a local oscillation section is saved in the transmission system and a local oscillation section is saved in the reception system.
Patent JP-H06140563-A (JP)
Title: Semiconductor device
Inventor: TSUJI MASAHIRO
IPC: H01L23/50
Filed: 1992-10-23
Abstract: PURPOSE:To provide a semiconductor device prevented from generating the exfoliations of a resin from a die pad in a chain-reacting way and from generating the cracks of the resin, by improving the adhesiveness of the resin to the die pad in the corner of the die pad wherein the exfoliations are especially apt to occur, in the resin-sealed semiconductor device including a semiconductor chip die-bonded to the die pad. CONSTITUTION:On each sidewall of a die pad 1, a recessed part 11 or a protruding part or the combination of both the parts is formed. Then, a resin 6 is made to eat into the recessed part 11 or to cover completely the protruding part, and concurrently, the effect of the difference between the thermal expansion coefficients of the resin 6 and the die pad 1 is made small by covering thin protruding parts 12 of the die pad 1 with the resin 6. Thereby, the adhesiveness of the resin 6 to the die pad 1 is improved.
Patent JP-H09125899-A (JP)
Title: Railway running device
Inventor: NISHIDA TETSUYA
IPC: E21F13/00
Filed: 1995-11-02
Abstract: PROBLEM TO BE SOLVED: To perform stable running on a railway without runaway and deviation of a truck from the railway. SOLUTION: A railway running device 1 is mounted on a truck 50 and the railway running device 1 comprises two rollers arranged in such a state to be separated away from each other, an annular belt running round and between the two rollers, and a number of grasping devices are mounted along the belt. An arm is arranged at the grasping device. The arm is normally closed in such a manner to grasp the railway 10, and when the arm is pressed against the roller, the arm is opened and separated away from the railway 10. The grasping device 4 grasps the railway 10 and is separated away from the railway 10 in correspondence to running of the truck 50.
Patent JP-H04163086-A (JP)
Title: Recording material
Inventor: NAKAJIMA TSUTOMU
IPC: B41M5/00
Filed: 1990-10-23
Abstract: PURPOSE:To obtain a recording material repeatedly usable and having good abrasion resistance by adding a filler to a recording layer. CONSTITUTION:A recording material is obtained by laminating a recording layer containing a filler 2' to a substrate 1. The filler 2' is a material having good adhesiveness to the material of the recording layer 2, excellent in heat resistance and capable of imparting friction resistance to the recording material and, for example, silica, aluminum hydroxide or a tetrafluoroethylene resin can be designated. As a contact material 3, a recording agent containing a developer like liquid ink is used and, when the recording layer 2 is heated in such a state that the contact material (e.g. liquid 3) is present on the surface of the filler-containing recording layer 2, the surface of the layer 2 is lowered in its sweepback contact angle thetar to show marked wetness and becomes a state having liquid adhesiveness and, when the recording material is again heated in air, the surface of the layer 2 is enhanced in its sweepback contact angle thetar to show liquid repellency.
Patent JP-2001107893-A (JP)
Title: Motor fan
Inventor: SENBA MORIO
IPC: H02K29/00
Filed: 1999-10-07
Abstract: PROBLEM TO BE SOLVED: To provide a motor fan capable of inhibiting an evil caused by an invasion of a dust etc., from an outlet of a leading wire forming an energization passage of a control circuit and a ventilation gap between a rotor hub and a fixed cylindrical part to the inside of the motor. SOLUTION: A motor fan of the present invention is constituted in which a labyrinth structure is provided such that any one of a rotor hub end portion and a fixed cylindrical part end portion extends between the fixed cylindrical part comprising a motor stator support part and the rotor hub end surface while it is approached to an end circumference surface opposed to each other and a drawing exit of an energization passage of the motor provided on the inside is sealed.
Patent JP-H06224700-A (JP)
Title: Clock signal generating circuit and precharge type integrated circuit
Inventor: USAMI MASAYOSHI
IPC: H03K3/017
Filed: 1993-11-16
Abstract: PURPOSE:To provide the clock signal generating circuit, which generates a clock signal which sets a precharge period in accordance with a timing when the address signal or input data of a precharge type circuit is settled, and the precharge type integrated circuit provided with this clock signal generating circuit. CONSTITUTION:This clock signal generating circuit consists of a first inverter circuit 4 which receives a main clock signal and inverts and outputs it, an OR gate 6 which receives the main clock signal and a timing signal indicating the timing when the address signal or input data is settled for the main clock signal, an FETP 2 which is connected between the output terminal of the first inverter circuit 4 and a power source and is controlled in electrical continuity by the output of the OR gate 6, and a second inverter circuit 5 which receives the output of the first inverter circuit 5 and inverts and outputs it and prepares the clock signal obtained by varying the duty ratio of the main clock signal in accordance with the timing signal.
Patent JP-H01128056-A (JP)
Title: Information display device for camera
Inventor: AKASAKA MICHIHARU
IPC: G03B17/18
Filed: 1987-11-13
Abstract: PURPOSE:To enable a photographer to easily know lapse time in an interval mode and remaining time in a bulb mode from the display of displaying means from the beginning of photographing control until just before exposing by normally performing the display controlling of information related to photographing in a part used for displaying both information and switching to the display of imprint information just before imprinting. CONSTITUTION:The title device is provided with a liquid crystal display means 16 displaying the imprint information to a film and the information related to photographing and with the display control means. The liquid crystal display means 16 possesses parts N and TN used for displaying both displays of the imprint information and the information related to photographing. The display control means normally performs display controlling of the information related to photographing in the parts N and TN and switches to the display of the imprint information just before imprinting so as to display the information related to photographing just before exposing. Therefore, the remaining time and the number of remaining frames can be read from the displays of the display means TN and N even in interval operation.
Patent JP-H08236520-A (JP)
Title: Formation of insulation layer of semiconductor device
Inventor: BOKU SATOSHI
IPC: H01L21/316
Filed: 1995-11-06
Abstract: PROBLEM TO BE SOLVED: To harden an SOG film so that any residual substance can not be generated by forming a second insulating film by SOG on a first insulating film on a substrate, operating a low temperature processing and a plasma processing for hardening the second insulating film, and forming a third insulating film. SOLUTION: A first insulating film 5 is formed by forming an oxide film by a PECVD method. The spin coating of SOG substances is operated for flattening the surface so that a second insulating film 7 can be formed. A low temperature thermal processing is executed several times while a temperature is successively increased, and solvent components, volatile organic components, and moisture excluding organic substances used as coupling agent included in the second insulating film 7 are removed. A plasma processing is executed to the second insulating film 7, and residual substances such as Si-OH, H2 O, solvent, and volatile organic substances are removed so that a membranous quality with high elasticity can be formed. A third insulating film 9 is formed so that an insulating layer 11 can be completed.  Thus, it is possible to prevent the current/voltage characteristics of the SOG film from being deteriorated.
Patent JP-2000200218-A (JP)
Title: Microprocessor with cache memory
Inventor: SIMAR LAURENCE R JR
IPC: G06F12/0897
Filed: 1999-09-01
Abstract: PROBLEM TO BE SOLVED: To reduce conflicts of processor resources between the acquisition or output of data and function and concentrated calculating operation by providing cache levels interconnected to a 1st and a 2nd function unit. SOLUTION: The cache levels interconnected to the 1st and 2nd function units which perform parallel data operations are included. In this case, a digital signal processor(DSP) depends upon two level memory layers and a memory of the 2nd level is an integrated data/instruction memory bank. A memory of the 1st level is represented by an L1 prefix and that of the 2nd level is represented as L2. A CPU instruction side is supplied from a small-sized fast instruction cache. An L1I(level-1 instruction) cache supplies a single cycle throughput to an L1I control unit of a DSP core. Further, a CPU data memory control unit is interfaced with the small-sized fast data cache.
Patent JP-H06140897-A (JP)
Title: Semiconductor integrated circuit
Inventor: MAKINO TATSUSHI
IPC: H03K17/08
Filed: 1992-10-26
Abstract: PURPOSE:To perform a static electricity protecting countermeasure with smaller number of circuit element by providing a transistor where either of a source and a drain is connected to an output terminal, the other is connected to a power source potential point and a gate is connected to a grounded potential point. CONSTITUTION:The transistor TrQ2 is turned off in a normal operation state since the gate is the grounded potential. When high potential static electricity is impressed to the output terminal TM, the static electricity is discharged to the power source potential Vcc 1 point and the grounded potential point GND throug TrQ1 and Q2 and these potential fluctuations of these become same. Thus, the distruction of the circuit element by the static electricity is prevented and the occurrence of a malfunction is prevented.