baber/WOPTO huggingface dataset:
Patent JP-S61117931-A (JP)
Title: Active star coupler
Inventor: ICHIDA TAKESHIGE
IPC: H04B10/27
Filed: 1984-11-13
Abstract: PURPOSE:To improve remarkably the reliability by adopting two system for circuit systems of an active part of an active star coupler and operating the 2nd system if the 1st system is faulty. CONSTITUTION:A light element drive circuit 10 drives a light emitting element 11 in response to an input signal and the output of the element 11 is fed to the star coupler through an optical fiber 12. A part of optical outputs is fed to a photodetector 13 for monitor, the output is integrated and then smoothed or a fed to one input of a comparator circuit 16 including a circuit holding a peak of the output. An output of a reference level setting circuit 15 setting a signal level being a reference whether or representing whether or not the level is normal is fed to the other input of the comparator circuit 16, which compares the said two inputs to check the normality, and if an optical output of the 1st light emitting element 11 is lowered abnormaly, the circuit 16 generates a fault signal as the output. The fault signal activates a light emitting element drive circuit 17 of the 2nd light emitting circuit 51 to light the 2nd light emitting element 18.
Patent JP-S60132564-A (JP)
Inventor: ICHIKAWA SEIICHIROU
IPC: A61L2/10
Filed: 1983-12-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S60132107-A (JP)
Inventor: KANAI MASATATSU
IPC: B60N2/48
Filed: 1983-12-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6481352-A (JP)
Title: Semiconductor integrated circuit device placed with bipolar cmos in mixture
Inventor: HIKAWA TETSUSHI
IPC: H01L21/8238
Filed: 1987-09-24
Abstract: PURPOSE:To improve the performance of a bipolar element section by setting the impurity concentrations of the N-type well of a CMOS element section and the N-type well of the bipolar element section in response to the characteristics of the respective elements. CONSTITUTION:In an assembly of, for example, a CMOS element, a V-N-P-N transistor and a L-P-N-P transistor of bipolar elements, the PMOS transistor, the V-N-P-N transistor and the L-P-N-P transistor are respectively formed on N-type wells 7, 11, 16 formed on an epitaxial layer 2, and N-type impurity high concentration buried layers 15, 20 are so formed as to provide high speed characteristics in the bottoms of the wells 11, 16. The impurity concentrations of the wells 7, 11, 16 are so independently set as to optimally hold the characteristics of the elements. After the wells 7, 11, 16 are formed, the NMOS transistor, the PMOS transistor, the V-N-P-N transistor and the L-P-N-P transistor are formed according to normal steps. Symbol I is a P-type silicon substrate, and numeral 3 is a field oxide film.
Patent JP-H0689192-A (JP)
Title: Floating exclusive control system for online real time processing system
Inventor: TANIGAMI TATSURO
IPC: G06F9/46
Filed: 1992-09-09
Abstract: PURPOSE:To perform the exclusive control for resources whose number exceeds the number of elements with respect to the exclusive control system for resources in the online real time processing system of a computer. CONSTITUTION:When receiving an exclusive control request from transaction processing programs 41 to 4n, a lock ID assignment means 5 allows the resource name reported from transaction processing programs 41 to 4n to correspond to a lock ID. If the resource name does not correspond to a lock ID, it is allowed to correspond to the lock ID which does not correspond to any resource name. When release of the exclusive control is requested from transaction processing programs 41 to 4n and a counter is zero, the correspondence between the lock ID and the resource name is released, and the lock ID and another resource name are allowed to correspond to each other when the exclusive control is requested again from transaction processing programs 41 to 4n; and thus, floating correspondence between the lock ID and the resource name is realized.
Patent JP-S61120424-A (JP)
Title: Method of polishing dielectric isolated substrate
Inventor: TAKAYASHIKI TETSUYA
IPC: H01L21/304
Filed: 1984-11-16
Abstract: PURPOSE:To prevent the wiring from being disconnected due to the unevenness of the surface, by polishing a dielectric isolated substrate in several steps such that the single crystal Si substrate is polished in the first step through chemical and mechanical polishment and it is finished through chemical and mechanical polishment in which the mechanical action is stronger in the second step from shortly before an insulator is exposed to the surface of the substrate. CONSTITUTION:An Si substrate 11 is polished with slurry of pH 10.5 containing SiO2 having a particle size of 0.02 at a temperature of 25 deg.C, under a pressure of 350g/cm<2> and at a polishing rate of about 10mum/min until the level of t3+t4=10-50mum as measured from the peak point of a V-shaped groove is reached. Then the polishing operation is continued while the pressure is lowered and the polishing rate is decreased by several or several tens times until the level of t4=2-3mum from the peak point is reached. In the next step, the substrate 11 is further polished more mechanically with slurry of pH 7.5 so that the depth t4 of the substrate is removed and that the peak point of SiO2 is approximately exposed in the surface of the substrate. Finally, only the pressure is lowered to decrease the polishing rate to about 150g/cm<2> and the substrate 11 is polished so as to expose the surface of the polysilicon 31. According to this method, the level difference on the surface of the Si substrate 11 can be decreased to 0.1mum or less, whereby disconnection of wiring and irregular configuration around the Si island 11 can be effectively prevented.
Patent JP-H1085964-A (JP)
Title: Method for irradiating internal face of piping with laser and equipment therefor
Inventor: UEHARA MINORU
IPC: B23K26/352
Filed: 1996-09-11
Abstract: PROBLEM TO BE SOLVED: To improve the capacity and to uniformly irradiate by reflecting an annular laser beam with a conical reflecting mirror and irradiating the total circumference of internal face of a piping. SOLUTION: An annular laser beam 12 outputted from a laser beam generator 10 is reflected almost by a right angle with a conical reflecting mirror 16, it is irradiated to the total circumferential direction of the internal face of a piping 14 at the same time and the surface treatment 18 is executed by moving the reflecting mirror 16 to the axial direction. Further, because the total face of circumferential direction is irradiated with the laser beam 12a once and uniformly, the treatment capacity is improved.  In this case, by moving the reflecting mirror 16 to the longitudinal direction, the internal face of the piping 14 is irradiated continuously, the irregular irradiation of the laser beam in the irradiation boundary face part is prevented, the rotation mechanism and the spiral moving mechanism, etc., of the irradiation device are not required, and simplifying of the moving device is realized.
Patent JP-H0290923-A (JP)
Title: Deodorizing method
Inventor: YOSHIMOTO MASAFUMI
IPC: B01J23/72
Filed: 1988-09-26
Abstract: PURPOSE:To decompose odor-causing components and simultaneously make almost all unreactive ozone nonresidual after deodorizing treatment by providing a catalyst consisting chiefly of a metal oxide formed by copper or manganese and a metal oxide formed by titanium and/or silver or gold. CONSTITUTION:To remove odor from malodorous substances such as ammonia and trimethylamine, a catalyst consisting chiefly of a metal oxide formed by Cu, Mn, Co, Fe or Ni and a metal oxide formed by Ti, Ag or Au, is used. The malodorous substance is sent to a catalyst layer 2 wherein the odor-causing components are separated therefrom by ozone from an ozonizer 1. The deodorization in this way brings about a high rate of the odor removal and does not allow the remaining of almost all the ozone harmful to the respiratory organs, etc., after the deodorizing treatment.
Patent JP-S60132283-A (JP)
Title: Pattern recognizing device
Inventor: NAGAO MINORU
IPC: G06K9/62
Filed: 1983-12-19
Abstract: PURPOSE:To execute a pattern recognizing processing at a high speed by decreasing the number of tracking patterns to the necessary minimum, and shortening a time for a pattern collation in case of a boundary tracking processing. CONSTITUTION:Prior to a boundary tracking processing of an input picture, a rectangular mask 8 of, for instance, a vertical 3 bit constitution is set to a picture memory 7, an input picture G is scanned extending over all lines, shifting this mask 8 by one line each. Also, in this scanning process, a picture pattern of a 9 bit constitution contained in the mask 8 is fetched successively, compared with a reference pattern set in advance, and when both the patterns coincide with each other, the input picture G is smoothed by outputting a correcting output. That is to say, when the picture pattern in the mask 8 coincides with a prescribed reference pattern having an uneven part, the input picture is smoothed by sending out the correcting output. Therefore, among tracking patterns, a tracking pattern of an uneven shape can be curtailed. In this way, the number of tracking patterns is decreased, the pattern collation time in case of the boundary tracking can be shortened, and the pattern recognizing processing is executed at a high speed.
Patent JP-H1091351-A (JP)
Title: Touch panel device
Inventor: HAYAMA MASANOBU
IPC: G06F3/0488
Filed: 1996-09-11
Abstract: PROBLEM TO BE SOLVED: To easily calculate the correct coordinate value of a pressed point in a double key rollover mode by adding the fixed correction value to the coordinate value of a point that is pressed together with a point included in a specific area and outputting the coordinate value of the pressed point. SOLUTION: A coordinate input means 1 selects the specific one of plural data, and an input decision means 2 decides whether the input of the means 1 is equal to the double key rollover input. A voltage detection means 4 detects the output voltage received from the means 1. A voltage coordinate conversion means 5 converts the output value of the means 4 into the coordinate value that is inputted to the means 1. A coordinate value correction means 6 corrects the output coordinate value of the means 5 as necessary. A correction coefficient calculation means 7 calculates a correction coefficient to correct the output of the means 5. Then a coordinate value output means 9 outputs the coordinate value that undergone the necessary correction.
Patent JP-S62102403-A (JP)
Title: Magnetic head core
Inventor: KATAYAMA MASAAKI
IPC: G11B5/127
Filed: 1985-10-29
Abstract: PURPOSE:To expose a ferrite surface on some part of a track groove and that of a coil groove, to connect a pair of core halves with a fused glass for bonding through the ferrite surface, and to improve adhesive strength and reliability. CONSTITUTION:The core block half body 6 made of ferrite, whose butted face is mirror-polished, is prepared, and a magnetic film 7 with high saturated flux density is deposited on the entire butted surface. The track groove 8 is formed on the one block, and the coil groove 9 as well as the groove 8 is formed on the other block, thereby producing a glass spacer 10 on the butted surface. Both blocks are butted, and the fused glass 11 is projected into the groove 8, bonded, and cut 12 to complete a magnetic head core 13. Since the glass has an excellent wettability with ferrite, adhesive strength is high, and the degree of reliability can be improved.
Patent JP-2001063533-A (JP)
Title: Jack base, jack base storage box and jack base takeout/ storage method
Inventor: OKUDA YUICHI
IPC: B66F9/075
Filed: 1999-08-27
Abstract: PROBLEM TO BE SOLVED: To facilitate installation of a jack base storage box and handling of a jack base, and to prevent dropping of the jack base from the jack base storage box. SOLUTION: This jack base takeout/storage method is as follows. A first jack base storage box 14 having a vertical attitude wherein an outlet/inlet 14a faces upward is turned such that the outlet/inlet 14a faces the vehicle body outside and that the first jack base storage box 14 has a tilt attitude. In that tilt attitude, a first jack base 16 is taken out of the first jack base storage box 14. After work, the first jack base 16 is stored in the first jack base storage box 14 in the tilt attitude of the first jack base storage box 14. Then, the first jack base storage box 14 is turned such that the outlet/inlet 14a faces upward and that the first jack base storage box 14 has the vertical attitude.
Patent JP-H0580865-A (JP)
Title: Voltage controller
Inventor: YAMASHITA MASAHIRO
IPC: H03M1/72
Filed: 1991-09-20
Abstract: PURPOSE:To attain the control of voltage at a control point set by an analog/ digital converter in a simple circuit constitution and with no control of a microcomputer. CONSTITUTION:A voltage controller outputs the digital signal value set to a desired output voltage level to a digital/analog converter 1 which outputs the analog output voltage on a digital signal and acquires the desired output voltage level from the converter 1. A power detector circuit 3 detects the start of the driving power supply of the voltage controller. Then a nonvolatile memory 2 stores previously the digital signal value set to the desired output voltage level of the converter 1 and outputs the digital signal value to the converter 1 based on the start of the power supply detected by the circuit 3.
Patent JP-H0875467-A (JP)
Title: Measuring point instructing device
Inventor: TSUDA KOJI
IPC: G01C15/00
Filed: 1994-09-09
Abstract: PURPOSE: To provide an instructing device for instructing of the measuring point of a target in which the measuring point can be precisely shown without requiring any skill to the measuring assistant side for holding the target used for measuring. CONSTITUTION: This device has a light projecting means for projecting the light from a light source 11 toward a target positioned and set in a measuring point along the optical axis; position detecting means 14, 15 for receiving the reflected light of the light source by the target to detect the displacement of the target to the optical axis, and outputting a signal corresponding to the displacement, and a control circuit 20 for generating a signal for light- controlling, for example, continuously lighting or flashing, the light source 11 on the basis of the outputted signal of the displacement. The lighting state of the light source 11 is changed according to the displacement of the target to the optical axis, so that a survey assistant for holding the target can find a measuring point by confirming the lighting state of the light source 11.
Patent JP-2001062968-A (JP)
Title: Laminated sheet
Inventor: TANIZAKI TATSUYA
IPC: C08L23/20
Filed: 1999-08-27
Abstract: PROBLEM TO BE SOLVED: To provide a sheet using a 4-methyl-1-pentene polymer, which is excellent in gas permeability, flexibility, mechanical characteristic and heat-seal property and at the same time excellent in heat sealability. SOLUTION: A sheet of a 4-methyl-1-pentene polymer (A) and a sheet of a 4-methyl-1-pentene polymer composition (B) are laminated to obtain a laminated sheet. The 4-methyl-1-pentene polymer composition (B) is obtained by melting and mixing 20-80 pts.wt. 4-methyl-1-pentene polymer (A), 80-20 pts.wt. 1-butene polymer (c), 10-150 pts.wt. propylene polymer (D) based on 100 pts.wt. of total of (A) and (C), and 5-200 pts.wt. triblock copolymer (E) selected from polystyrene-ethylene/propylene copolymer-polystyrene, and polystyrene-ethylene/ butylene copolymer-polystyrene.
Patent JP-H03104269-A (JP)
Title: Manufacture of semiconductor device
Inventor: SHIMODA KOICHI
IPC: H01L29/73
Filed: 1989-09-19
Abstract: PURPOSE:To eliminate the need for having an alignment margin between an N<+> type buried and a P<+> type buried layer by performing ion implantation of impurity that are formed into the P<+> type buried layer by making a polycrystalline silicon film in which boron as a P-type impurity is diffused act as a mask. CONSTITUTION:An oxide film 22 is formed on a P-type semiconductor substrate 21 and a nitride film 23 is formed on the oxide film 22. Further, a polycrystalline silicon film 24 is formed and an oxide film 25 is formed on the above film 24. A resist pattern is formed on the oxide film 25 having a part which is formed into a P<+> type buried layer formation region. The resist pattern is used as a mask and etching is performed and then, an oxide film 25a and a polycrystalline silicon film 24a are formed into a remaining P<+> type buried layer formation region. Subsequently, the oxide film 25a is allowed to act as a mask and antimony is implanted into the oxide film 22. After a polycrystalline silicon film 26 is formed through the whole surface, boron is implanted. Then, the above film 26 is heat-treated in an atmosphere of an inactive gas to form an N<+> type buried 27. As a result, an N<+> type buried layer is formed through a self-alignment process by using a polycrystalline silicon film pattern that is formed into the P<+> type buried formation region. Thus in this technique the need for having an alignment margin between both buried layers is eliminated and reduction of elements is realized.
Patent JP-2000069385-A (JP)
Title: Method and device for automatically presetting channel
Inventor: OKAZAKI TOSHIHIRO
IPC: H04N5/44
Filed: 1998-08-26
Abstract: PROBLEM TO BE SOLVED: To automatically preset a channel, without using an AFT circuit by presetting only a channel determined to be an existing broadcasting channel, based on the existence/non-existence of each discriminated horizontal/vertical synchronizing signal. SOLUTION: A synchronism discriminating circuit 4 outputs a discriminated result as to whether or not a horizontal/vertical synchronizing signal exists to a channel selection control microcomputer 5. When a 1st synchronization result indicating the existence of a horizontal/vertical synchronizing signal from the circuit 4 is received, the microcomputer 5 decides that there is the possibility of the existence of a broadcast wave of an N-th channel and instructs a tuner 20 so as to select a channel by (a frequency fN of the N-th channel + 1.5 MHz). Thus the channel is selected by another frequency to decide as to whether an interference wave such as a spurious component generated due to mixed modulation or the like exists or not.  A turner 2, a detection circuit 3 and the discriminating circuit 4 execute similar processing with respect to a channel selection instruction based on the frequency (fN+1.5 MHz) which is generated from the microcomputer 5 and a discriminated result is outputted to the microcomputer 5.
Patent JP-2000140410-A (JP)
Title: Model driving device and game device
Inventor: KANEKO MASATO
IPC: A63H23/14
Filed: 1999-08-27
Abstract: PROBLEM TO BE SOLVED: To provide a model driving device for driving the model of a ship, an automobile and a horse, or the like, used for a game device and a toy, or the like, and the game device provided with the model driving device. SOLUTION: In this model driving device, the model and a traveling body 50 are vertically arranged, holding a traveling plate 17 therebetween, and the model is connected by the attracting magnetic force of a permanent magnet provided on the model and permanent magnets 51 and 52 provided on the traveling body 50 and travels on the traveling plate 17 following the traveling of the traveling body 50. The driving wheel 61 of the traveling body 50 is brought into contact with the lower surface of the traveling plate 17 and rotationally driven. Also, the traveling body 50 travels between the lower surface of the traveling plate 17 and a supporting surface 23 formed almost parallelly to the lower surfaced of the traveling plate 17 below the traveling plate 17.
Patent JP-H0963093-A (JP)
Title: Laser light output control circuit
Inventor: TEZUKA MASARU
IPC: G11B11/105
Filed: 1995-08-25
Abstract: PROBLEM TO BE SOLVED: To provide a light output control circuit making coincide recording setting power of a laser diode in an ALPC part of an ISO standard sector/ format with real recording peak power. SOLUTION: A DC lighting light output of the laser diode LD 1 is detected by a photodiode PD 2, and an output voltage of a current/voltage conversion circuit 5 is compared with a peak value APC voltage 21a of a recording; power setting voltage by a recording error amplifier 12, and the output voltage of the recording error amplifier 12 is held by a hold circuit 14 in an ALPC part period of an optical disk. When the real peak power is insufficient for the peak power of the LD 1 based on the hold voltage, a correction voltage answering to a shortage is added by a hold voltage correction addition/ subtraction circuit 14 at a real recording time, and the hold voltage is corrected. Further, the hold voltage is corrected by light emitting the DD 1 with a recording time shortest repeat pulse in the ALPC part at a mean value APC also.
Patent JP-H0290834-A (JP)
Title: Atm channel equipment and atm line terminal equipment
Inventor: TORII YUTAKA
Filed: 1988-09-28
Abstract: PURPOSE:To effectively and economically generation an ATM exchange system by permitting a line corresponding part to physically terminate a transmission line, performing a processing concerned in information on the header part of a fixed length packet and performing phase synchronization and flow control. CONSTITUTION:The system consists of n-number of ATM line termination equipments 101-10n, a switch part (self routing switch) 110, a signal processing part 120 and a control mechanism part 130, and the ATM line terminal equipments 101-10n are provided corresponding to the lines. Only the routing function of the fixed length packet and a logical multiple function are given to the switch 110, and functions required for line correspondence among the other functions are collectively set to be a line correspondence part. In the line corresponding part, a phase synchronous circuit is set to operate by using plural frequencies, and a phase synchronous function and the speed conversion function of the fixed length packet are combined. Control information for flow controls is constituted so that it can coexist with the header conversion table of the packet. Thus, the channel of an ATM exchange can economically and effectively be generated.
Patent JP-H0792698-A (JP)
Title: Electrostatic recording material
Inventor: SANHONGI TAKASHIGE
IPC: G03G5/02
Filed: 1993-09-28
Abstract: PURPOSE:To obtain a recording material having an excellent recording density with little contamination due to friction by forming a protective layer containing a charge controlling agent on a dielectric layer and specifying the wt.% of the charge controlling agent to the total solid amt. of the protective layer. CONSTITUTION:A protective layer containing 0.1-10wt.%, preferably 0.5-5.0wt.% charge controlling agent is formed on a dielectric layer. The obtd. electrostatic recording material has little contamination due to friction without decreasing the recording density. If the amt. of the charge controlling agent in the protective layer is <0.1wt.%, the effect to control the frictional contamination can not be obtd. If the amt. exceeds 10wt.%, the recording density decreases. As for the charge controlling agent to be added to the protective layer, a cationic polymer compd. such as polyvinylbenzyl trimethylammonium chloride is used. Or, such a compd. is used that produces the same charge as the charge of the toner when the protective layer is electrified by friction in a recording machine, and for example, metal salt of aromatic carboxylic acid is used.