Patent GB-894708-A (GB)
Title: Semi-conductive device and method for the manufacture thereof
IPC: H01L29/00
Filed: 1958-07-03
Abstract: 894,708. Semi-conductor devices. PHILCO CORPORATION. July 3, 1958 [July 3, 1957], No. 21343/58. Class 37. A semi-conductor device comprises a semi-conductor body having a region in which resistivity varies with position,a rectifying electrode being provided at a surface of predetermined resistivity in such region which has been exposed by etching. The invention may be used to provide a drift transistor having the emitter connected to a low resistivity region of the base zone and the collector to a high resistivity region. Fig. 2c shows an N-type germanium wafer 10 having a surface layer 12.1 mil. thick of lower resistivity produced by diffusion, so that resistivity increases with distance from the surface. The diffusion process consisted in placing the wafer in a radiant oven with phosphorus, in flowing hydrogen and heating to 775‹ C. for 30 minutes, cooling first to 450‹ C. and then to room temperature. Alternatively, the wafer may be immersed in a hot solution of potassium cyanide in which the impurity is dissolved. The wafers were then washed in hot potassium cyanide to remove impurities such as copper. A circular nickel base tab 14 is soldered to the wafer which is then subjected to a jet electrolytic etching process to provide an emitter cavity 18. A batch of wafers may be subjected to the same diffusion process, one of the wafers then being etched and measured alternately to determine the duration of etching necessary to reveal a surface region of the desired resistivity. Resistivity may be determined by applying a thin metal layer, measuring the breakdown voltage and then removing the metal layer. Etching of the remaining wafers of the batch may then be carried out for the required duration. Fig. 2D shows the wafer reversed and again subjected to jet electrolytic etching to provide the larger collector cavity which extends through the body to a region of high resistivity in layer 12 adjacent the emitter cavity. The etching process may be controlled by means of a photo-cell 24 sensitive to infra-red radiations through the wafer as described in Specification 817,953. Cone 26 applies dry gas to the surface of the wafer. Rectifying contacts in each of the depressions may be formed by jet electrolytic metal deposition to provide surface barrier rectifying electrodes as described in Specification 805,291; the jet may consist of indium sulphate and ammonium chloride. Alternatively micro-alloy rectifying electrodes may be provided as described in Specifications 826,063 and 847,628. Fig. 4 shows the completed transistor with leads 34 and 36 soldered to the emitter and collector electrodes by means of an indium or indiumgallium solder. The device may be finally etched in a solution of glacial acetic acid, nitric acid and hydrofluoric acid and potted and sealed in a metal container. In place of jet electrolytic etching, the depression may be formed by a carrier enhanced localized etching as described in Specification 847,927. In place of N-type germanium, P-type germanium with indium and antimony as impurities, or silicon with boron as the impurity and etched while illuminated with a solution of sodium fluoride and hydrofluoric acid may be employed. The etching may be controlled according to the colour transmission properties of the silicon as described in Specification 810,862. Specification 786,077 also is referred to.