Patent GB-849561-A (GB)
Title: Improvements relating to keysenders of the kind used in telephone systems
Inventor: WARMAN BLOOMFIELD JAMES
IPC: H04Q3/42
Filed: 1956-02-28
Abstract: 849,561. Exchange equipment. SIEMENS EDISON SWAN Ltd. Feb. 25, 1957 [Feb. 28, 1956], No. 6180/56. Class 40 (4). [Also in Group XIX] In a keysender, arranged to receive digital information in code form from a set of digit keys and to store this information in digit registers and subsequently transmit it in the form of trains of impulses, the digit registers and a receive distributer and a send distributer are all circulating storage circuits, the entry of digits into the digit registers being governed by a control marking circulating in the receive distributer and the extraction of digits from the digit registers being governed by a control marking circulating in the send distributer, and there being a digit register for each element of the code employed, the several digit registers being operative as a whole so that a digit store therein appears as a circulating pattern of marked and unmarked elements. As shown, there are four digit registers W-Z, a receive distributer RD and a send distributer SD. The digit registers have circulating gates G1-G4 and sending gates G5-G8, controlled by a bi-stable trigger circuit B1. Temporary digit stores TW-TZ register information from the digit keys DK1-DK10 before its insertion into the digit registers. The receive distributer RD and send distributer SD have respective control circuits GC1 and GC2 with associated bi-stable trigger circuits B2 and B3. There is an impulse generator circuit IG, and a sending counter (binary) BC1-BC4 which has a natural count of sixteen. A recurring cycle of pulses P1-P6 is applied to the terminals so marked from a generator not shown. Following the operation of the start key KS (contacts KS1-KS6), the next P2 pulse fires tube T2 in a distributer priming circuit DP to insert control markings into the sixth link of the receive distributer RD and the seventh link of the send distributer SD. During subsequent pulse cycles these control markings progress along the distributers (from right to left as shown). Each marking on reaching the output end of its distributer is applied by the next pulse cycle to the associated control circuit GCI or GC2, firing tube T18 or T20. (T20 fires one cycle before T18, since the marking in SD is one step ahead of that in RD). T20 puts the marking into the input end of SD and fires tube T22 in a detection circuit D, and T18 puts the marking into the input end of RD and fires tube T23, previously biased by the firing of T22 which is now extinguished by T23. This process continues while the digit registers are empty. Depression of one of the digit keys DK1- DK10 applies positive H.T. to the anode of tube T1 in a digit marking gate DM so that the next P2 pulse fires T1 to trigger the bi-stable circuit B2 associated with the receive distributer RD, firing tube T6 and extinguishing T5. This causes the charging, by way of the depressed digit key, of a combination of condensers such as C5 and C6 in the temporary digit stores TW-TZ, the combination corresponding in a four-element binary code to the value of the digit keyed. The firing of T6 also biases the receive distributer control circuit GC1, so that when the marking in the receive distributer RD is next applied to GC1 it fires tube T19 instead of T18. This restores the trigger circuit B2 (firing T5) and also applies a signal to the condensers in the temporary digit stores TW-TZ so that the charged ones allow their associated rectifiers such as MR26 and MR27 to conduct and fire tubes such as T16 and T17 in the corresponding ones of the circulating gates G1-G4 which insert markings into the input (left-hand) ends of the corresponding digit registers W-Z. The firing of T19 also re-inserts the control marking into the receive distributer RD, but one step ahead of those in the digit registers, i.e. in the same position as that in the send distributer SD. The procedure is repeated with further digits, each digit key being restored before the next is operated. Since the marking in RD is one position ahead of those in the digit registers, there is always a vacancy at the input end of the digit registers when the marking in RD reaches the control circuit GC1, until the digit registers are full (ten digits stored). At each insertion of a fresh digit marking, the control marking is reinserted into RD one position ahead of it. After the insertion of the first digit markings, the control marking in the send distributer SD is no longer ahead of that in the receive distributer RD. Consequently, the next time the SD marking fires tube T20 and hence T22, tube T23 is not fired (by the RD marking) before the P2 pulse of the next cycle which therefore fires T24 instead. This changes over trigger circuit B3, firing tube T8 which has already been biased by the firing of tube T10 in the inter-train pause circuit IT following the charging of condenser C8 on the operation of the start key KS. The firing of T8 prepares tube T21 in the send distributer control circuit GC2, so that when the send distributer SD next gives an output marking T21 is fired instead of T20 at pulse P2. This restores trigger circuit B3 (firing T7), fires tube T15 in the impulse control circuit IC so that start relay SZ operates to start the impulse generator circuit IG and disconnect positive H.T. from the inter-train pause circuit IT, fires tube T4 to change over the trigger circuit B1, and re-inserts the control marking in SD one step ahead of its usual position. At P1 in the next pulse cycle, the markings corresponding to the first registered digit are applied to the circulating gates G1-G4 and to the sending gates G5-G8. Trigger circuit B1 has closed G1-G4 and opened G5-G8, so the relevant sending gates send signals to prime the sending counter BC1-BC4 with the complement of the digit to be sent. Relay PP and tube T25 in the impulse generator circuit IG send impulses over loop LA, LB and to the sending counter BC1- BC4 until it is counted out. The last count fires tube T9 in the impulse control circuit IC, extinguishing T15 and releasing relay SZ to stop the impulse generator and restore the positive H.T. connection to the inter-train pause circuit IT. After 500 milliseconds IT again functions by firing tube T10 to bias tube T8 ready for the sending of the next digit. This process is repeated until all the digits have been sent, at which time the control marking in the send distributer SD has again reached its initial position, one step ahead of the marking in the receive distributer RD, thus rendering the detection circuit D inoperative. The keysender may be released at any time by the restoration of the start key KS. Any markings still in the registers or distributers will progress to the output end but will not be reinserted. In a modification, the transmitted impulses are derived from the P1-P6 pulse supply by means of an impulse repeating relay controlled by a counting chain which may be either a separate circuit or the send distributer SD. Specification 841,844 is referred to.