baber/WOPTO huggingface dataset:
Patent JP-S58191768-A (JP)
Title: Blister-resistant powder paint
Inventor: AKANUMA RIYOUICHI
IPC: C08L7/00
Filed: 1982-05-06
Abstract: PURPOSE:The titled powder paint that is obtained by adding a flaky inorganic powder to a powder of polybutene-1, thus being suitable for use as a lining material for chemical plants and transporting machines, because of its high wearing resistance, heat resistance, creep resistance and water impermeability. CONSTITUTION:The objective paint is obtained by mixing (A) 100pts.wt. of a powder of polybutene-1, preferably 40-200 mesh particle sizes to (B) 20- 50pts.wt. of a flaky inorganic powder, preferably of 50-325 mesh and 1-10 micron thickness. EFFECT:The resultant paint shows stress-cracking resistant as well. USE:It is especially suitable for use in coating hot-water pipes and tanks.
Patent JP-S63240002-A (JP)
Inventor: KODAMA HISASHI
IPC: H01C17/22
Filed: 1987-03-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07283744-A (JP)
Title: Fm multiplex broadcast receiver
Inventor: MIYAMA HIROYUKI
IPC: H04B1/06
Filed: 1994-04-13
Abstract: PURPOSE:To provide an FM multiplex broadcast receiver which can use a memory of comparatively small capacity and also can quickly read the information out of the memory. CONSTITUTION:An FM multiplex broadcast receiver receives the road traffic information from a broadcast station of the traffic information, stores the received traffic information in a memory 9 and reads this information out of the memory to output it. Then the electric field intensity V1 that shows the reception broadcast signal level in the reception limit is previously set in the receiver together with the electric field intensity V2 which shows the comparatively weak reception broadcast signal level set out of the service area. When the reception broadcast signal is changed to another broadcast station of the traffic information, the electric field intensity V of the reception broadcast signal is detected right before it is changed. The comparison is carried out among these intensities V, V1 and V2. Then the narrow area information and the general trunk road information are disused out of the memory 9 among those stored road traffic information when V<V1 is satisfied. Meanwhile the narrow area information is disused out the memory 9 when V1<V<V2 is satisfied.
Patent JP-H02253811-A (JP)
Title: Filter
Inventor: UEDA TEISHUN
IPC: B01D61/14
Filed: 1989-03-29
Abstract: PURPOSE:To prevent the consumption of a pressurized gas by providing a pressure equalizer to a pressure pipeline and equalizing the pressure of a gas reservoir to that of the pressurized gas. CONSTITUTION:A raw liq. is stored in a storage tank 1, then a pressure control valve 10 is opened, and the gas reservoirs 1' and 4', pressure equalizer 7 and pressure pipeline system 14 of a pressurized gas pipeline 8 are filled with a gas at a set pressure. The raw liq. A passes through a filter 3 by a feed pump 2, and the filtrate B is sent to a receiver 4. Since the gas reservoirs 1' and 4' are connected by the equalizer 7, the volume of the space occupied by the pressurized gas in the pressure pipeline system 14 is not changed by the operation of the pump 2, and the pressure of the pressurized gas in the pressure pipeline system 14 is kept at a set value. The capacity of the pump 2 can be determined in accordance with the pipeline resistance and a head difference between the pipelines, and the economics is enhanced.
Patent JP-S58194418-A (JP)
Title: Switched capacitor circuit
Inventor: TAKATORI HIROSHI
IPC: H03H19/00
Filed: 1982-05-07
Abstract: PURPOSE:To process signals with high accuracy, by setting a clock duty so as to obtain an equal signal processing error between a discharge section and a charge section of a capacitor. CONSTITUTION:Capacitors C1 and C3 flow currents and are reset in an ON section of a clock phi1, and no electric charge flows to a capacitor C4. At the same time, a capacitor C2 is charged with an input V1. If the largest time constant of this action is obtained by the charging of the C2, an equation 1 is satisfied. In an ON section of a clock phi2, the C1 charges the electric charge corresponding to the input V1 to capacitors C3 and C4 connected in parallel to each other via an amplifier 5. The C2 transfers the electric charge which is charged during the ON section of the clock phi1 to capacitors C3 and C4 with inversion of the polarity. If the maximum time constant of this ON section is given by the charging of the C2, an equation 2 is obtained. Then the ratio between clocks T1 and T2 is set as shown by an equation 3 in order to obtain an equal error between equations 1 and 2. The clock duty is set in such a way.
Patent JP-S553752-A (JP)
Title: Preparation of colored dessert food
Inventor: IKEGAMI MASATOSHI
IPC: A23L29/20
Filed: 1978-06-23
Abstract: PURPOSE:To prepare a dessert food free from seaweed and acetic acid odors, by sealing (A) a gelatinized agar containing a colorant and a fruit juice and (B) water colored with a colorant in a container. CONSTITUTION:Agar is dissolved in hot water to form a hot sol, which is mixed with a colorant, a fruit juice, table luxuries, organic acids, and, if necessary, perfumes, and cooled to give a gel. The gel is cut to prisms of size about 1.5-4mm, and filled into a container with water colored by a colorant, and sealed to give a principal part, to which a syrup adjusted to pH 2.8-3.8 is attached.
Patent JP-H02253362-A (JP)
Title: Data transfer system between microprocessor and fifo buffer
Inventor: MIYAKE TOSHIYUKI
IPC: G06F13/38
Filed: 1989-03-27
Abstract: PURPOSE:To transfer data at a high speed by mapping the address of a FIFO buffer to an address set on the boundary of a long word of a microprocessor with lower 2 bits of the latter address neglected. CONSTITUTION:The address of a FIFO buffer contained in a small computer system interface protocol controller 202 is mapped to an address set on the boundary of a long word of a microprocessor 201 in disregard of lower 2 bits of the latter address. Then an access is given to the FIFO buffer in a data size larger than the width of a data bus 205 set between the microprocessor 201 and the FIFO buffer. As a result, the bus sizing function of the processor 201 works and the data having the number of bits corresponding to the width of the data bus can be continuously transferred in the frequency corresponding to the access size just with a single access. Thus the data can be transferred at an extremely high speed without using any special hardware like a DMA.
Patent JP-S61235053-A (JP)
Title: Preventing method for restrained breakout
Inventor: MATSUSHITA AKIRA
IPC: B22D11/16
Filed: 1985-04-10
Abstract: PURPOSE:To continue casting without taking an extreme countermeasure for operation and to restore effectively the restrained breakout of a solidified shell when said breakout is detected by assuring the negative strip time to form the required min. thickness of the solidified shell. CONSTITUTION:The min. required thickness of the solidified shell for the level at which restraint is generated is preliminarily set and the correlation between the negative strip time and the solidified shell forming speed is determined. The negative strip time to allow the min. thickness of the solidified shell necessary at the restrain generating level to form is assured by controlling 1 or >=2 among the casting speed, the oscillation frequency, amplitude and oscillation waveform of a casting mold when the restrained breakout 30 of the solidified shell in the casting mold 1 is detected. The casting is continued while the breakout part 30 is restored in the mold 1.
Patent JP-S531593-A (JP)
Title: Charged particle energy analyzer
Inventor: ISHIKAWA KIYOSHI
IPC: G01N23/225
Filed: 1976-06-28
Abstract: PURPOSE: To solve the problem of electron optical non-point and attempt to effect high sensitive analysis in energy analysis of photoelectron, Auger electron, etc. by providing a specific means for correcting charged particle flux. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H11273524-A (JP)
Title: Switch control device for power distribution automation system
Inventor: KANO MASAAKI
IPC: H01H47/00
Filed: 1998-03-24
Abstract: PROBLEM TO BE SOLVED: To provide a switch control system preventing closing faults of a switch for a high-voltage cable almost completely. SOLUTION: When an operation sensor 9 detects that a switching excitation circuit 6 does not operate even though a closing instruction is given from a CPU 7 to a closing relay 5 provided to the switching excitation circuit 6 of the switching gear 2 for a high-voltage cable, the CPU 7 repeatedly gives closing instructions and opening instructions to the closing relay 5 at short time intervals. Consequently, a closing relay contact is oscillated, thus the contact faults are resolved in most cases.
Patent JP-S553653-A (JP)
Title: Semiconductor device
Inventor: KIKUCHI MASANORI
IPC: H01L29/788
Filed: 1978-06-21
Abstract: PURPOSE:To provide a stacked gate type memory with and enhanced characteristic and a reduced device area, dielectric constant is made larger in the second gate insulating layer than in the first gate insulating layer. CONSTITUTION:A stacked gate type memory consists of a semiconductor substrate 1, opposing conductive type source and drain, a first gate insulating layer 3, a flotaing electrode 4, a second gate insulating layer 5 and a control gate electrode 7. Typically, the insulating layer 3 uses Si oxide layer and the insulating layer 5 employs Si nitride layer or alumina layer, with the resuly that the layer 5 has greater dielectric constant than that of the layer 3. This provides easily the condition C2> C1, where C2 represents the capacity between the control gate electrode 7 and the  floating electrode 4, and C1 is the capacity between the floating electrode 4 and  the substrate 1. Further, the floating gate electrode 4 has a structure to determine the shape of itself in self-matching way with respect to the control gate electrode  7 and field oxide layer 6, resulting in an enhanced property and reduced device  area.
Patent JP-H02254259-A (JP)
Title: Method and device for supplying geothermal water
Inventor: SUMITOMO HIROYUKI
IPC: F24J3/08
Filed: 1989-03-27
Abstract: PURPOSE:To enable pumping up of non-self-injecting geothermel water by means of a less power by a method wherein geothermal water pumped up with the aid of a pump is flushed and generated steam is used for utilization of heat, and resultant condensed geothermal water is joined with residual geothermal water through a flush to discharge it in water in a reduction well. CONSTITUTION:Geothermal water pumped up with the aid of a submersible pump 2 is fed through a delivery piping 4 to a flush tank 6, where it is flushed. Steam generated resulting from the flush is fed to a heat exchanger 8, where the geothermal water emits heat for condensation. The condensed geothermal water is joined with geothermal water residing in the flush tank 6 and is discharged through a discharge piping 10 to a reduction well. Thus, a required power of the pump for pumping up geothermal water can be reduced. This constitution enables utilization of the geothermal water by means of a less power.
Patent JP-H08279289-A (JP)
Title: Voltage step-up circuit of word line
Inventor: TEI YUUSHIYOU
IPC: G11C11/407
Filed: 1996-03-29
Abstract: PROBLEM TO BE SOLVED: To allow lowering power consumption and reducing power source noise in a bonding option word line voltage step-up circuit capable of variably outputting a word line voltage corresponding to the number of activated word line. SOLUTION: A step-up circuit 4 is set so as to output a mode voltage having the number of minimum activated word line. In the case of a mode that the number of activated word line excluding this mode is increased, an output voltage addition circuit 9 is operated by an input of a mode operation signal ϕXi and acts so as to further step up an output voltage of the step-up circuit 4. Conventionally, the step-up circuit 4 has been set so as to output the mode voltage having the maximum number of activated word line, and the output voltage is decreased by storing a capacitor provided in a node N5 at a node of reducing the number of other word lines, so power consumption is large and further these is noise by discharging of the stored electric charges, but the present invention can resolve those defects.
Patent JP-H11270984-A (JP)
Title: Heat transfer pipe with inner surface groove
Inventor: AKAI KANJI
IPC: F28F1/40
Filed: 1998-03-24
Abstract: PROBLEM TO BE SOLVED: To provide a heat transfer pipe with an inner surface groove that obtains a capacity being equivalent to that of a pipe with a spiral groove (namely, achieves the equivalent size as an entire heat exchanger) and at the same time can reduce the amount of raw materials to be used per unit length. SOLUTION: A number of grooves 1, 1,... being extended in the direction of a pipe axis are formed on an inner surface, at the same time discontinuous parts 2, 2,... are formed at a specific interval, and the formation of a mountainous part being formed at both sides of the grooves 1, 1,... is prevented in the discontinuous parts 2, 2,..., thus reducing the amount of raw materials to be used per unit length without reducing a heat transfer rate (namely, capacity).
Patent JP-H09270633-A (JP)
Title: Tem slot array antenna
Inventor: TAKEI TAKESHI
IPC: H01Q21/00
Filed: 1996-03-29
Abstract: PROBLEM TO BE SOLVED: To suppress the manufacture cost from being increased, to provide feeding to a radiation element with a small loss and to improve the gain by forming a medium layer including a pattern consisting of plural strip lines opposite to slots of an uppermost layer, a lower layer not including a conductor pattern, an entire conductor pattern as a lowermost layer, connecting the strip lines, using one connected point to be a feeding point to form the entire conductor pattern. SOLUTION: One-side ends of three strip conductors 3 are connected electrically to a distribution strip conductor 4 formed in a conductor box 1 with electric insulation therefrom. A feeder 5 is connected to a middle point of the distribution strip conductor 4 and the feeder 5 is led out externally through a coupling hole 6 without electric contact with the conductor box 1 and the feeder 5 and one point on the surface of the conductor box 1 are energized. A high frequency power fed from the feeder 5 is distributed to the three feeding strip conductors 3 through the distribution strip conductor 4 and the delivered high frequency power is coupled with the slot from a position beneath the slot and emitted externally.
Patent JP-H06290597-A (JP)
Title: Non-volatile memory
Inventor: HAYASHIDA HIROMI
IPC: G11C17/00
Filed: 1993-04-01
Abstract: PURPOSE:To reduce components and to prevent the size of a chip from being increased by inserting fuses to each source line corresponding to a memory cell group of each word line in a memory block and a redundant memory cell block having a memory cell group for replacement of one unit. CONSTITUTION:Fuses 8 are inserted into each source line corresponding to a group of a memory cell 1 of each word line W1-Wn in a memory block 4 of a main component. When failure occurs in the word lines W1-Wn, a corresponding fuse is froben, and relief is performed by a redundant memory cell block 6 having only a group of a memory cell 1 for replacement of one unit. Therefore, an EEPROM in which components are remarkably reduced and the size of a chip can be prevented from being increased is realized.
Patent JP-S58193726-A (JP)
Title: Vapor deposition method
Inventor: HIRAMOTO TATSUMI
IPC: C23C16/50
Filed: 1982-05-08
Abstract: PURPOSE:To form a vapor deposition film on a substrate without contamination and damage by disposing the substrate in the position further than the mean free path of the ions and electrons formed by plasma and causing a photoreactive gas near the substrate to react with radiant light. CONSTITUTION:Plasma 4 is formed between cathodes 1a, 1b, 1c and an anode 2 in a vessel 3, and a chemical-reactive gas is introduced into the vessel 3 through an inlet 3a thereof and is released through outlets 3b, 3c. A substrate 5 is disposed in the position further than the mean free path of the ions and electrons formed by the plasma 4. The contamination and damage of the substrate 5 and vapor deposition film are thus prevented and the vapor deposition on a large area is made possible.
Patent JP-S58193988-A (JP)
Title: Solenoid valve
Inventor: ANDOU FUMITAKA
IPC: F16K31/06
Filed: 1982-05-06
Abstract: PURPOSE:To prevent the occurrence of impact noises, by inserting a ring made of a magnetic material into the coil of a solenoid valve, disposing an attractor having a shaft projected from the central portion of the same, and forming a hole in a plunger in the manner that said shaft can be slided in the hole. CONSTITUTION:A ring 13 made of a magnetic material is inserted into a through-hole 9 formed at the central portion of the coil 18 of a solenoid valve such that it is located at the upper portion of the hole 9, and an attractor 26 having a shaft 25 projected from the central portion of the same is disposed on the inside of the ring 13. Further, a hole 30 is formed in a plunger 33 in the manner that the shaft 25 can be slided in the hole 30. With such an arrangment, the length of a spring 29 loaded between the attractor 26 and the plunger 33 can be made sufficiently long. Further, when a stepped portion 32 of the plunger 33 comes to the position of the lower end 36 of a housing 17, the clearance between the plunger 33 and the housing 17 is increased abruptly and the magnetic force is decreased, so that the plunger 33 stops it upward movement at the instant. Therefore, it is enabled to prevent production of impact noises caused when the plunger 33 and the attractor 26 come into contact with each other.
Patent JP-H09265932-A (JP)
Title: Sample holder for secondary ion mass spectrograph
Inventor: OGURO SHIZUO
IPC: G01N27/62
Filed: 1996-03-29
Abstract: PROBLEM TO BE SOLVED: To pressing the tilt between sample surfaces so as to hold the flatness of a measurement surface causing the enhancement of the accuracy of concentration determination in a sample holder on which plural samples can be simultaneously loaded and which is used for a secondary ion mass spectrograph(SIMS). SOLUTION: In a sample holder for a secondary ion mass spectrograph on which plural samples can be simultaneously loaded, in order to hold the flatness of a thin plate with a measurement window (a surface thin plate) existing on the sample holder, a fixing portion 19 which can fix the surface thin plate 12 is provided on the sample holder base opening portion 18, the surface thin plate 12 is fixed at the thin plate peripheral portion and is simultaneously fixed to the fixing portion 19 of a holder base 11.
Patent JP-S60219736-A (JP)
Title: Formation of deposited film
Inventor: EGUCHI TAKESHI
IPC: B05D7/24
Filed: 1984-04-16
Abstract: PURPOSE:To form deposited films at high film-forming speed while the high-quality is maintained, by forming the gaseous atmosphere of an Si compound expressed by a formula SinHmXr (X is halogen; n, m, r are integers of 1 or more; and m+r=2n+2). CONSTITUTION:Valves 14-1 and 16-1 of a supply source 9 in which the gas of an Si compound expressed by a formula SinHmXr (X is halogen; n, m, r represent integers of 1 or more, and m+r=2n+2) is stored are opened, and the raw material gas is then fed into a deposition chamber 1. The raw material gas is irradiated with photo energy by driving a photo energy generator 7. The photo energy is given to the raw material gas flowing along the neighborhood of the surface of a supporter 2, and then photo-excitation and photodecomposition are promoted; accordingly, a-Si which is the produced substance is deposited on the supporter 2.
Patent JP-H02254737-A (JP)
Title: Cu bonding wire for semiconductor device
Inventor: ONO TOSHIAKI
IPC: C22F1/00
Filed: 1989-03-28
Abstract: PURPOSE:To prevent the generation of a deformation, such as a bending and the like, due to an uneven metal texture when a wire is used as a bonding wire by a method wherein the total content of unavoidable impurities is set at a specified value or lower and a processing rate previous to the final heat treatment is specified to a constant range. CONSTITUTION:The total content of unavoidable impurities other than a Cu impurity is set at 10 weight ppm or lower and a processing rate previous to the final heat treatment is specified at 50 to 98%. That is, as a distortion due to processing is relaxed in an intermediate heat treatment, an effect only due to the final processing remains in the final heat treatment. If the final processing rate is in a range of 50 to 98%, a difference between the processing rates of the central part and the surface layer part of a wire is small in a metal texture subsequent to the processing of the wire. Thereby, when the wire is used as a bonding wire, a deformation, such as a bending and the like, is prevented.
Patent JP-H05232795-A (JP)
Title: Electroconductive coating compound
Inventor: ISHIHARA KO
IPC: G03G15/08
Filed: 1992-02-25
Abstract: PURPOSE:To provide an electroconductive coating compound which has a high toner charging property and can fabricate an electroconductive layer on a conductive roll permitting stable generation of sufficient copy image density. CONSTITUTION:An electroconductive coating compound is prepared by dispersing electroconductive powder and electroconductive resin powder in a binder resin and equipped with the characteristics (A)-(C); (A) the electric resistance Rvf of electroconductive resin powder is below 10<10>OMEGA.cm, (B) the electric resistance Rvr of the compound of binder resin and electroconductive powder is below 10<8>OMEGANUcm, and (C) the relation of two values Rvf. Rvr meets the condition as Rvf>Rvr.
Patent JP-H01251328-A (JP)
Title: Optical information recording and reproducing device
Inventor: TOMINAGA HIDEKAZU
IPC: G11B7/09
Filed: 1988-03-31
Abstract: PURPOSE:To decrease the frequency of the occurrence of errors at the time of reproducing a without lowering the reliability of data at the time of recording and erasing by switching plural error detecting means in accordance with the time of a recording and erasing or reproducing operation. CONSTITUTION:A servo error detecting method is selected by a an error detecting circuit 8 for reproducing when a reproducing power switching control signal is outputted from a CPU 1. An OR gate 7 is a gate to select a next-stage error detecting circuit 9 for erasing and recording when an erasing power switching control signal or a recording power switching control signal is outputted from the CPU 1. When error signals are issued from the error detecting circuit 8 for reproducing and the error detecting circuit 9 for erasing and recording, they are added by an OR gate 10, the error signal is transmitted to the CPU 1, a prescribed error processing operation is performed. Thus, the frequency of the occurrence of the errors at the time of the reproducing can be decreased without lowering the reliability of the data at the time of the recording and erasing.
Patent JP-S521024-A (JP)
Title: Germicides for agriculture and gardening
Inventor: EGUCHI JIYUN
IPC: C07C239/00
Filed: 1975-06-24
Abstract: PURPOSE: Novel germicides for agriculture and gardening with high activity, low toxicity and no harm. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H07257342-A (JP)
Title: Actuator box
Inventor: MATSUMOTO AKIKAZU
IPC: B60T8/34
Filed: 1994-03-22
Abstract: PURPOSE:To provide an actuator box with printed wiring circuit which can be manufactured at low cost with a simple structure. CONSTITUTION:An actuator box 1 has an electromagnetic actuator 11, a housing 12, an input and output terminal part 13, and a printed wiring circuit 14 for relaying the terminal part 13 to the actuator 11. The housing 12 is manufactured by injection molding, and the printed wiring circuit 14 is directly formed on the surface of the housing 12. The terminal part 13 is preferably connected to the printed wiring circuit 14 through no relay member.