Patent GB-1296181-A (GB)
Inventor: HEETMAN A
IPC: H04J3/18
Filed: 1971-04-19
Abstract: 1296181 Multiplex pulse code signalling PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 19 April 1971 [23 Jan 1970] 20068/71 Heading H4L In a time division multiplex PCM system means are provided for storing received signals at a transit exchange and reading them out under the control of locally generated clock pulses the signals being stored under the control of a common cyclic address counter which generates sequential storage address signals. General description.-Transit exchanges 100, 101, 102, Fig. 1, are connected to each other by two-way multichannel transmission links and to concentrators 106, to 110 respectively by separate two-way multichannel links, the concentrators being connected to groups of subscriber lines. In the system described there are 32 channels, the number of bits per word m = 8 and frame sync. is provided in channel 31 (t 31 ). The transit exchanges are provided with switching networks including stores for establishing connections between channels of the time division multiplex lines connected thereto. Transit exchange, Fig. 2.-Time channels on incoming lines 200-0 to 200-(p-1) are to be connected to the time channels of the outgoing lines 201-0 to 201-(p-1) which are controlled by local clock signals. The incoming signals are regenerated at 202-0 &c. and supplied to synchronizers 203-0 &c. in which the bits are stored temporarily to compensate for differences between the incoming and local bit speeds. Normally the stored code words are read out at the local word-rate and matching to the rate of reception of the code words is achieved by lengthening or shortening from time to time the interval in which a word is read by an integral number of bit intervals. As described this number x = m so that a lengthened read out consists of two channel intervals and the same codeword is read out twice and for a shortened read out a codeword is skipped. The switching network of the exchange comprises a switching store 204, a super-time multiplex line 205 and a demultiplexer 206. The store 204 is provided with sectors 0, 1, (p-1) each having a capacity of 32 codewords of 8 bits each, each sector storing the digits from an incoming line for at the most the duration of one frame. Each channel interval of the local clock is divided into (p + 1) equal sub intervals S 0 , S 1  ... Sp, each equal to half a bit interval, Sp being used for writing the received codewords in the switching store and subintervals S 0 , S 1  &c. for transferring them to the line 205. Thus if p = 15, the following steps are repeated in each frame. (a) Storage in subinterval S 15  of the received codeword at the location associated with the incoming time channel in the sector of store 204 associated with the incoming line. (b) Reading of the codeword from that storage location in one of the subintervals S 0 , S 1  ... S 14  of one of the channel intervals t 0 , t 1  ... t 31  via the super-time multiplex line 205 to the demultiplexer 206, where the codewords are converted from parallel to serial form. (c) Transmission of the codeword read out to the outgoing line with which is associated the subinterval used in (b) and transmission of the codeword in the next following subinterval. Each incoming line is associated permanently with a sector of the switching store 204 so that address information is only required to determine the location of an incoming time channel within a sector. The local channel number 0, 1 &c. of an incoming time channel within a frame is used for this purpose. These addresses are generated by a common cyclic address counter controlled by the local clock which supplies one address during each local channel interval. An addressing arrangement for reading out codewords from the store 204 supplies the address of an arbitrarily selected storage location in each subinterval of the local frame. When the local channel number of an incoming channel varies as the result of a shortened or lengthened read out from the synchronizer the local channel number stored in the addressing arrangement for reading is varied accordingly.