baber/WOPTO huggingface dataset:
Patent TW-I289095-B (TW)
Title: Device for the simultaneous double-side grinding of a workpiece in wafer form
Inventor: JUNGE JOACHIM
IPC: B24B41/047
Filed: 2005-03-09
Granted: 2007-11-01
Abstract: The invention relates to a device for the simultaneous double-side grinding of a workpiece (1) in wafer form, comprising two grinding wheels (3) with collinearly arranged axes of rotation (9) and two devices (2), likewise positioned opposite each other, for hydrostatically bearing the workpiece (1) in wafer form, which each comprise at least one hydrostatic bearing and in each case at least one dynamic pressure tube (4) for measuring the spacing between the workpiece (1) and the device for hydrostatic bearing (2), wherein that surface (7) of each of the two devices for hydrostatic bearing (2)which faces the workpiece (1) is of non-planar design, in such a manner that the spacing between the surface (7) and the workpiece (1) adopts a minimum value at that edge (8) of the devices for hydrostatic bearing (2), which faces the grinding wheels (3) and this spacing increases with increasing distance from the grinding wheels (3). Moreover, at least one bore, through which liquids and any material abraded by grinding can be discharged from the vicinity of the dynamic pressure tube, can be arranged in the vicinity of each dynamic pressure tube.
Patent TW-I288411-B (TW)
Title: Memory device with vertical transistor and trench capacitor memory cells and method of fabrication
Inventor: SHIH NENG-TAI
IPC: G11C11/40
Filed: 2005-03-09
Granted: 2007-10-11
Abstract: Memory device with vertical transistor and trench capacitor memory cells and method of fabrication. A substrate having a trench is provided with a trench capacitor in the low portion, the trench capacitor comprising a top electrode and a buried strap surrounding the top electrode. Next, a sacrificial layer is formed on a portion of sidewall of the trench, exposing the sidewall between the sacrificial layer and the buried strap. A top dielectric layer is blanketly formed in the trench to isolate a gate conductive layer of the vertical transistor and the trench capacitor. The vertical transistor contacts the substrate through a buried strap conductive layer diffused to the trench sidewall. Finally, the sacrificial layer and a portion of the top dielectric layer are removed.
Patent TW-I312086-B (TW)
Title: Image display device
Inventor: LEE JIN WOO
IPC: F16M11/00
Filed: 2005-03-14
Granted: 2009-07-11
Abstract: An image display device includes a body (100) for displaying an image, a position adjusting device (200) at a rear of the body for adjusting a height, a left/right angle, and a forward/backward slope of the body, a base (300), a support (400) having an upper end rotatably coupled to the position adjusting device (200) and a lower end rotatably coupled to the base (300), and a seating recess (310) in an upper surface of the base (300) for folding and placing the support (400) therein, thereby permitting adjustment of the height, the left/right angle, and the forward/backward slope of the body (100). <IMAGE>
Patent TW-I285927-B (TW)
Title: Adhesion improvement for low k dielectrics
Inventor: HUANG LI-HUA LI
IPC: H01L21/316
Filed: 2005-03-15
Granted: 2007-08-21
Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including introducing an organosilicon compound and an oxidizing gas at a first ratio of organosilicon compound to oxidizing gas into the processing chamber, generating a plasma of the oxidizing gas and the organosilicon compound to form an initiation layer on a barrier layer comprising at least silicon and carbon, introducing the organosilicon compound and the oxidizing gas at a second ratio of organosilicon compound to oxidizing gas greater than the first ratio into the processing chamber, and depositing a first dielectric layer adjacent the dielectric initiation layer.
Patent TW-I267473-B (TW)
Title: Method of fabricating and forming paper pallet
Inventor: WU JAU-YE
IPC: B65D19/34
Filed: 2005-03-30
Granted: 2006-12-01
Abstract: The present invention relates to a method of fabricating and forming paper pallet; the paper pallet includes plural sets of upright paper sheets that intercross and mount to one another and face sheets that are combined and fixed between the paper sheets; the face sheets is combined and fixed by a method of applying gluing agent on the top end of the upright paper sheets and then pressing and laminating; characterized in that the method of applying the gluing agent is in roller type, so that the base end of the roller can roll and be in contact with the top end of the upright paper sheets; the top end of the roller is connected to a glue accommodating space, so that the glue agent can be transported to the base end of the roller by rolling and being uniformly applied on the top end of the upright paper sheets; and the sequent process after the roller includes a hot press roller; the upright paper sheets can be uniformly rolled on the height on which the hot press roller is provided, so that the mounting section of the upright paper sheets can be tighter; it saves the needed amount of gluing agent and mounting status of the upright paper sheets can be tighter.
Patent TW-I269420-B (TW)
Title: Stacked chip package and process thereof
Inventor: LIN MOU-SHIUNG
IPC: H01L23/28
Filed: 2005-05-03
Granted: 2006-12-21
Abstract: A stacked chip package and the process thereof are provided, wherein a redistributed layer is formed on a chip. Thus, the redistributed layer can provide redistributed pads in better arrangement for wire bonding. The redistributed layer can be selectively formed on a first chip or a second chip according to different circuit distributions thereof. The stacked chip package and the process thereof can simplify the manufacturing process of a chip for reducing the production cost and improving the production efficiency.
Patent TW-I250626-B (TW)
Title: Chip packaging structure and the packaging method thereof
Inventor: JENG WEN-FENG
IPC: H01L23/28
Filed: 2005-05-20
Granted: 2006-03-01
Abstract: The present invention provides a chip packaging structure and the packaging method thereof, which comprises sequentially configuring an adhesive layer, a conductive layer, and a metal layer on a substrate; forming a penetrated patterned channel in the conductive layer and the metal layer; dividing the metal layer into one or several chip carrying areas, and several mutually isolated or mutually connected conductive contact areas; forming a chip on each chip carrying area, and forming the electrical connection of the chip to the conductive contact areas; employing an encapsulation to enclose the conductive layer, the metal layer, and the chip; next, removing the substrate, and dicing using each chip or chipset as the unit to form several chip packaging structures. The present invention could enhance the reliability during packaging, reduce the package height, provide higher flatness, and improve the heat dissipation effect to be applied in various semiconductor packages.
Patent TW-I285004-B (TW)
Title: Connector pressing-head
Inventor: HWANG CAND
IPC: H01R12/55
Filed: 2005-07-12
Granted: 2007-08-01
Abstract: A kind of connector pressing-head applied in pressing a connector to a circuit board is disclosed in the present invention. Wherein, the connector is provided with a bottom wall and plural terminals disposed on the bottom wall, in which these terminals are respectively provided with an accommodation section located on top of the bottom wall, a fixing section fixed within the bottom wall, and a connection section located under the bottom wall. The end part of the fixing section is protruded and disposed on the bottom wall; the connection section is fixed on the circuit board. The connector pressing-head includes a main body that just can be inserted in the connector. In addition, plural accommodation troughs are disposed on the face of the main-body opposite to the terminals such that it is capable of pressing and installing the accommodation section inside the accommodation trough. The fixing section is held outside the accommodation trough so as to restrict the connector pressing-head from being continuously pressed downwards. Thus, the connector pressing-head can be restricted from directly contacting the bottom wall of the connector so as to effectively prevent from loosing the terminals due to a mutual interaction between the connector bottom wall and the terminals during the pressing process.
Patent TW-I414752-B (TW)
Title: Method for analysis of a sample
Inventor: YOKHIN BORIS
IPC: G01B15/02
Filed: 2005-09-21
Granted: 2013-11-11
Abstract: Apparatus for analysis of a sample includes a radiation source, which is adapted to direct a first, converging beam of X-rays toward a surface of the sample and to direct a second, collimated beam of the X-rays toward the surface of the sample. A motion assembly moves the radiation source between a first source position, in which the X-rays are directed toward the surface of the sample at a grazing angle, and a second source position, in which the X-rays are directed toward the surface in a vicinity of a Bragg angle of the sample. A detector assembly senses the X-rays scattered from the sample as a function of angle while the radiation source is in either of the first and second source configurations and in either of the first and second source positions. A signal processor receives and processes output signals from the detector assembly so as to determine a characteristic of the sample.
Patent TW-I266404-B (TW)
Title: Dummy structures extending from seal ring into active circuit area of integrated circuit chip
Inventor: CHEN HSIEN-WEI
IPC: H01L23/522
Filed: 2005-12-02
Granted: 2006-11-11
Abstract: An integrated circuit chip is provided, which includes an active circuit area, a seal ring structure, and a first dummy structure. The seal ring structure is formed at least partially around the active circuit area. The first dummy structure extends from the seal ring structure into the active circuit area. Other dummy structures that are not directly joined to the seal ring structure at a given level may be provided also to further fill in spaces between active wiring. A software algorithm included in a layout tool may allow for automatically laying out such structures in accordance with predetermined layout design rules.
Patent TW-I314999-B (TW)
Inventor: YOSHIDA MINORU
IPC: G02B5/02
Filed: 2006-10-11
Granted: 2009-09-21
Abstract: An object of the present invention is to provide a light diffusion sheet having a favorable cost reduction capability due to excellent scratching preventive property of the front face, and having in addition thereto, a favorable directional light diffusion function, transmittivity of rays of light, and a thin film character; and a backlight unit capable of promoting performances such as luminance as well as price reduction, and thin and light modeling capability. The light diffusion sheet of the present invention has a light diffusion sheet including a transparent substrate layer, and a light diffusion layer overlaid on the front face side of the substrate layer, wherein the light diffusion layer has resin beads and a resin binder, characterized in that the light diffusion layer has protruding parts having a shape of a partial spherical body on the front face in a scattering manner. It is preferred that mean height of the protruding parts be 1 µm or greater and 10 µm or less, mean diameter of the protruding parts be 4 µm or greater and 18 µm or less, mean occupancy rate of the protruding parts be 2% or greater and 20% or less, and surface roughness (Ra) of the light diffusion layer be 1.5 µm or greater and 10 µm or less. As the beads, small monodisperse beads as a principal component, and large beads as a sub component may be included.
Patent TW-I415255-B (TW)
Title: Method of forming a semiconductor device having an interlayer and structure thereof
Inventor: SCHAEFFER JAMES K
IPC: H01L29/49
Filed: 2007-03-30
Granted: 2013-11-11
Abstract: A stack located over a substrate. The stack includes a layer between a dielectric layer and a metal layer. The layer includes a halogen and a metal. In one embodiment, the halogen is fluorine. In one embodiment, the stack is a control electrode stack for a transistor. In one example the control electrode stack is a gate stack for a MOSFET. In one example, the layer includes aluminum fluoride.
Patent TW-I351980-B (TW)
Title: Filter unit and filter unit panel
Inventor: KAWANO EIZO
IPC: B01D46/52
Filed: 2007-10-18
Granted: 2011-11-11
Abstract: The present invention provides filter units that, when joined together, allow joining portions thereof to be fixed together satisfactorily and can prevent air from leaking at the joining portions. A filter unit includes a filter medium (1) that has been pleated and a frame (2) that supports the circumference of the filter medium (1). The frame (2) has a protruding part on at least one face selected from an upper face and a lower face thereof, with the protruding part (3) being formed by allowing a part of the at least one face to protrude. The upper face is a surface of the frame (2) that faces the upstream side relative to the flow of air that passes through the filter medium (1), and the lower face is a surface of the frame (2) that faces the downstream side relative to the flow of air.
Patent TW-I406359-B (TW)
Title: Method for forming isolation layer in semiconductor device
Inventor: EUN BYUNG SOO
IPC: H01L21/76
Filed: 2008-02-25
Granted: 2013-08-21
Abstract: A method for forming an isolation layer in a semiconductor device includes forming a trench in a semiconductor substrate. A liner layer that includes a liner nitride layer and a liner oxide layer is formed on an exposed surface of the trench. A flowable insulation layer is formed to fill the trench. The flowable insulation layer is recessed to expose a portion of the liner nitride layer on an upper portion of the trench. A first preheating process is performed to release stress of the liner layer. A second preheating process is performed to oxidize the exposed liner nitride layer. A buffer layer is formed on a portion of the liner layer that is formed on a sidewall of the trench and exposed after the flowable insulation layer is recessed. The buffer layer is etched to smoothen a rough portion of the liner layer that is formed when the flowable insulation layer is recessed. A buried insulation layer is deposited in the trench.
Patent TW-I403969-B (TW)
IPC: G06Q30/02
Filed: 2008-05-08
Granted: 2013-08-01
Abstract: This invention relates to a TV advertising method of digital network and the managing method thereof. Different types of network media channels are utilized to play video/audio introductions of related goods on a displayed webpage through which users can browse and/or click to read. The method includes steps of: (A) receiving a front page showing a first webpage from a network media; (B) automatically entering a channel area on a second webpage from the first webpage and playing video/audio advertisements of the goods; (C) clicking the advertisement and webpage showing related channel links, the webpage having a plurality of primary advertising areas containing a plurality of dynamic and static links to the advertisements; (D) sorting the advertisement contents of the first webpage and placing the advertisement with highest price at the position which can be easily seen to the most; and (E) presenting a dynamic advertisement search in an arrangement method according to the program content and describing and introducing goods. The method of managing the network TV advertisement includes three stages of different business value-added services. The first stage of market operation is a video/audio channel of a virtual environment, including entertainment TV programs, shopping, and consumer services, which utilize the video/audio channels of the virtual environment to open up the consumer market and propagate to the consumer group via physical accesses; the second stage of market operation is an video/audio online shopping channel, including online shopping, and credit card consuming, and provides live broadcasting; the third stage of market operation is a license of digital video/audio contents and provides telecommunications with 3G and 4G video/audio value-added services.
Patent TW-I457289-B (TW)
Inventor: NAGAI HIFUMI
IPC: C01G55/00
Filed: 2008-08-12
Granted: 2014-10-21
Abstract: Ammonium hexachlororuthenate is produced by adding ammonium chloride to a hydrochloric acid solution containing ruthenium. The ammonium hexachlororuthenate is baked to obtain the ruthenium powder. When the moisture content of the ammonium hexachlororuthenate is high, the baked product is so hard sintered product that its pulverization is not easy. In accordance with the present invention, the following steps are carried out. Hydrochloric acid solution containing ruthenium is held at a temperature of 80 to 95°C for three hours or longer. The ammonium chloride is then added to the hydrochloric acid solution which is stirred by a stirring mill at the rotation of 200 revolutions per minute or more. The hydrochloric acid solution is held at a temperature of from 85 to 95°C for 1 hour while being stirred at 200 rpm. The resultant precipitate of ammonium hexachlororuthenate is filtered. The inventive crystals of precipitated ammonium hexachlororuthenate has 10 mass % or less of moisture content.
Patent TW-I407483-B (TW)
Inventor: FUJISAWA SHIGEKI
IPC: H01J65/00
Filed: 2008-12-17
Granted: 2013-09-01
Abstract: The invention provides a quasi molecule lamp capable of preventing the reflection membrane formation starting area of the ultraviolet ray reflection membrane from peeling off from the discharge container, and holding the radiation light amount of the quasi molecule light for a long time. The quasi molecule lamp (10) has a capacitor (11) composed of silica glass with a discharging space (S); a pair of electrodes (15, 16) are disposed under the state that the silica glass for composing the capacitor (11) is disposed; xenon gas is enclosed in the discharging space (S) in which quasi molecule discharging occurs; an ultraviolet ray reflection membrane (18) composed by silica particles and alumina particles is formed on the surface exposed in the discharging space of the capacitor (11); and the ultraviolet ray reflection membrane (18) is thinner at the ray reflection membrane starting area than other areas.
Patent TW-I416173-B (TW)
Title: Optical film
Inventor: HU RUI-BIN
IPC: G02B5/02
Filed: 2009-10-09
Granted: 2013-11-21
Abstract: An optical film includes a hard coat layer and an antiglare layer formed on the hard coat layer. The hard coat layer serves as a base layer for the antiglare layer, and is used to protect a display panel from physical damage.
Patent TW-I412795-B (TW)
Title: Method for manufacturing color filter
Inventor: WANG CHUNG WEI
IPC: G02B5/20
Filed: 2010-05-11
Granted: 2013-10-21
Abstract: A method for manufacturing color filter includes steps of forming a transparent-matrix on a flexible and transparent substrate for dividing the substrate to plurality of pixel areas; printing the plurality of pixel areas with ink by using an inkjet printing process; and curing the ink. The light transmittance ability of the color filter can be effectively improved by forming the transparent-matrix on the substrate instead of black-matrix.
Patent TW-I415353-B (TW)
Title: Under-voltage protection circuit for battery
Inventor: XU YAN
IPC: H02H3/24
Filed: 2010-10-20
Granted: 2013-11-11
Abstract: The disclosure provides an under-voltage protection circuit for battery. The under-voltage protection circuit includes an input port, an output port, a controlling-voltage generating unit, a control unit, and a switch unit. The controlling-voltage generating unit generates a first controlling-voltage signal according to power received from a battery through the input port. The control unit switches on or off the switch unit in response to the first controlling-voltage signal. The battery powers an electronic apparatus when the switch unit is on, and the battery does not power the electronic apparatus when the switch unit is off. The controlling-voltage generating unit is further for generating a second controlling-voltage signal according to power from the output port when the battery starts to power the electronic apparatus. The control unit switches on the switch unit to allow the battery to provide power to the electronic apparatus, so that the electronic apparatus can be started when the battery outputs a lower voltage.
Patent GB-2496744-B (GB)
Title: Gate shear valve
Inventor: SHAW MICHAEL
IPC: E21B29/04
Filed: 2012-11-13
Granted: 2013-12-11
Abstract: A gate valve capable of shearing through any downhole tooling and maintaining its seal capability after the shearing operation is complete. The gate valve has a body with a flow passage therein and a gate being linearly movable between a closed position blocking flow through the flow passage and an open position. First and second valve seats are mounted on opposite sides of the gate and have sealing surfaces that engage the gate when the gate is in the closed position. Shear elements are connected to and carried by each of the valve seats and are capable of axial movement relative to the valve seats in response to movement of the gate from the open position to the closed position.
Patent GR-13380-B (GR)
Title: Κηριον αναφλεξεως δια κινητηρας εσωτερικης καυσεως.
Inventor: THIES ADOLF
Filed: 1951-04-07
Abstract: ναφλεκτήρ δια κινητήρας εσωτερικής καύσεως, αποτελούμενος εξ ενός ουσιωδώς κυλινδρικού, μεταλλικού,κοίλου σώματος αναφλεκτήρος, εις το εσωτερικόν του οποίου είναι εστερεωμένον εν φέρον το εσωτερικόνηλεκτρόδιον μονωτικόν σώμα, διακρινόμενος εκ τούτου, ότι το μονωτικόν σώμα κέκτηται εν δια την άμεσον εισαγωγήν του καλωδίου εναύσεως χρησιμεύον μη ολοσχερώς διηνοιγμένον κατά μήκος τρήμα και εν δεύτερον μέχρι του αναφερθέντος πρώτου κατά μήκος τρήματος διηνοιγμένον, προς στήριξιν του εσωτερικού ηλεκτροδίου χρησιμεύον κατά μήκος τρήμα, προσφόρως μικροτέρας εγκαρσίας τομής.
Patent GR-22532-B (GR)
Title: Καταλυτης μετατροπης.
Filed: 1961-02-10
Abstract: ις καταλύτης μετατροπής περιλαμβάνων εν σύνθετον παρασκεύασμα εξ ενός στερεού υποστηρίγματος και τουλάχιστον ενός συστατικού επιλεγομένου εκ των μετάλλων και των οξειδίων των μετάλλων των ομάδων VI Bκαι VIII του περιοδικού πίνακος των στοιχείων, ένθα το ρηθέν σύνθετον παρασκεύασμα έχει οξειδωθή υπό μ_λιαν θερμοκρασίαν κατ' ουσίαν εντός της περιοχής από 700 έως 760 βαθμούς Κελσίου και είτα αναχθήυπό υψηλήν θερμοκρασίαν παρουσία υδρογόνου.
Patent GR-24150-B (GR)
Title: Βελτιωμεναι συνθεσεις και διαλυματα συνθετικων πολυμερων.
Filed: 1961-10-21
Abstract: ύνθεσις ύλης ήτις να δύναται ευχερώς να βαφή δια χρωμάτων διασποράς και ήτις περιλαμβάνει ισομοριακόν συμπολυμερές κυανιούχου βινυλιδενίου-οξικού βινυλεστέρος συμμεμιγμένον μεθ' ομοπολυμερούς ή συμπολυμερούς του Ν,Ν-διμεθυλακρυλαμιδίου.
Patent GR-78528-B (GR)
IPC: C07D405/04
Filed: 1983-04-14
Abstract: Imidazoline derivatives of the formulahaving the RS or S configuration wherein R<sup>1</sup> is alkyl C<sub>1-4</sub>, allyl, benzyl, phenethyl or hydroxyalkyl C<sub>2-4</sub>, and their non-toxic salts.Processes for their preparation and pharmaceutical compositions thereof. The compounds exhibit presynaptic a<sub>2</sub>-adrenoreceptor antagonist activity.