baber/WOPTO huggingface dataset:
Patent TW-404007-B (TW)
Title: The manufacture method of interconnects
Inventor: HUANG JR-MING
IPC: H01L21/768
Filed: 1998-12-16
Granted: 2000-09-01
Abstract: A manufacture method of interconnects, which is to form the adhesion/barrier layer on the outer surface of the dielectrics comprising trench and via before the copper is exposed when the trench and via is defined in the Inter Metal Dielectrics (IMD) at the process of copper-fabricating damascene or dual-damascene so that the exposed copper metal will not produce the problem of copper diffusing into the Inter Metal Dielectrics (IMD) in the subsequent process.
Patent TW-393628-B (TW)
Title: The way to produce a three dimensional figure
Inventor: CHAM HAO-PO
IPC: G06T15/00
Filed: 1998-12-18
Granted: 2000-06-11
Abstract: This invention is a way to produce a three-dimensional figure, which reveals a technique for transforming a digital planar figure that can be processed by a computer into the visually 3D figure without the need of information of two-dimensional figures (such as characteristics of TrueType fonts). Based on the revealed technique of this invention, the angle (included angle) projected from an imaginary illuminant onto the object figure in the graph and the edge width necessary to generate a three-dimensional effect is are preset in a digital plane graph A brightness processing is performed on all the pixels (foreground pixels) constructing the object figure in the graph based on the included angle and the edge width. Finally, the new color values are reassigned to the object figure in the original picture so that the original 2D figure in the picture can generate a 3D effect.
Patent TW-419590-B (TW)
Title: Semiconductor test system
Inventor: MIURA TAKEO
IPC: G01R31/319
Filed: 1999-01-21
Granted: 2001-01-21
Abstract: A semiconductor test system for realizing the digital comparator which can detect being in high impedance state or not within all the designated timing span, while the output signal from DUT is judged as good or bad at the designated timing span, is supplied. For this aim, semiconductor test system having detecting means for being in high impedance state or not within all the designated timing span, in which good or bad signal is judged based on the received output signal from DUT at the digital comparator in a semiconductor test system, is provided.
Patent TW-412812-B (TW)
Title: Method for plating gold to bond leads on a semiconductor substrate
Inventor: WU YI-SHIAN
IPC: H01L21/60
Filed: 1999-02-03
Granted: 2000-11-21
Abstract: The present invention relates to a method for plating gold to bond leads on a substrate. The method first extends a plating line to a bond area in the substrate to connect the bond leads in series, thereby being able to plate gold to the bond leads and bumps at the end of the bond leads via the plating line. After plating gold to the bond leads, a bonding tool is used to cut off and remove the plating line when the bonding tool is provided to bond the bond leads to a die pad, whereby the residual plating line remaining on the substrate does not affect the performance of the semiconductor chip.
Patent TW-432280-B (TW)
Title: Processor system, and method for testing a processor system
Inventor: PFIRSCH THIERRY
IPC: G06F11/273
Filed: 1999-04-14
Granted: 2001-05-01
Abstract: By providing the internal bus of a processor system comprising a processor and peripherals with an external bus in/output, two substantially identical processor systems can be coupled via their internal buses for testing and/or debugging purposes, which firstly allows the testing and/or debugging of complicated processor systems due to all in/outputs of both systems no longer needing to be coupled, and secondly prevents the necessity of specifically designing an additional processor system for testing and/or debugging purposes only.
Patent TW-594758-B (TW)
Title: Nonvolatile semiconductor memory device
Inventor: CHOI SOO-HWAN
IPC: G11C16/06
Filed: 1999-04-23
Granted: 2004-06-21
Abstract: A semiconductor memory device includes a plurality of memory cell blocks having a plurality of memory cells, a plurality of sense amplifiers coupled to the memory cell blocks, and a reference block for generating a reference value and for providing the reference value to the sense amplifiers. Each of the sense amplifiers is coupled to each of the memory cell blocks. The reference block includes a reference cell for holding a predetermined reference value and a current circuit for responding a state of the reference cell.
Patent TW-431123-B (TW)
Title: Manufacturing process and structure of substrate used in integrated circuit package
Inventor: SHIU SHR-BIN
IPC: H05K1/00
Filed: 1999-05-25
Granted: 2001-04-21
Abstract: The present invention relates to a manufacturing process and structure of substrate used in integrated circuit package. The manufacturing process comprises: forming a first circuit layer by etching the first side of a copper substrate, and filling resin on the peripheral of the first circuit layer; forming a second circuit layer by etching the second side of the copper substrate, and filling resin on the peripheral of the second circuit layer, wherein the etching depth of the second side reaches the bottom of the resin of the first side. The substrate provided by the present invention has the advantages of small dimension, good conductivity and high heat dissipation capability. Moreover, the drilling and plugging processes are not required. Therefore, it is able to increase the production efficiency and decrease the manufacturing cost for the substrate. In addition, the present invention can also be applied in the manufacturing process and structure of the CSP or flip chip bumpers.
Patent TW-426892-B (TW)
Title: Method for producing transistor with T-shape gate
Inventor: JENG JR-SHIANG
IPC: H01L21/28
Filed: 1999-06-11
Granted: 2001-03-21
Abstract: A method for producing a transistor with a T-shape gate comprises: forming a gate oxide layer and a polysilicon layer on a substrate; forming a lightly doped drain structure in the substrate; forming a pocket doped region underneath the lightly doped drain structure; forming a dielectric layer over the whole substrate; enabling the surface of the dielectric layer to be lower than the surface of the polysilicon layer by an etching back method; forming a polysilicon spacer on the dielectric layer adjacent to the sidewall of the polysilicon layer; forming a dielectric layer spacer underneath the polysilicon spacer; forming a source/drain region in the substrate; converting a portion of the polysilicon layer and the polysilicon spacer into an amorphous polysilicon layer and an amorphous spacer; forming a metal layer conformal with the substrate; performing a heating process to form a silicide layer; and removing the remaining silicide layer.
Patent TW-522156-B (TW)
Title: Polyimide precursor and polyimide
Inventor: ISHII KAZUHISA
IPC: C08G73/10
Filed: 1999-10-11
Granted: 2003-03-01
Abstract: A polyimide precursor having a repeating unit represented by the following general formula (1), wherein R1 contains a bivalent organic group constituting a diamine having a hexafluoropropylidene group in its molecule represented by the following general formula (2), and the reduced viscosity is from 0.05 to 5.0 dl/g (in N-methylpyrrolidone at a temperature of 30 DEG C, concentration: 0.5 g/dl), and a polyimide obtained by imidizing said precursor: (wherein R1 is a bivalent organic group constituting a diamine, A is a hydrogen atom, a linear alkyl group including a methyl group, or a trifluoromethyl group, and n is the number of a substituent on an aromatic ring and an integer of from 1 to 4).
Patent TW-I230158-B (TW)
Title: Vitreous form of 8-[3-[N-[(E)-3-(6-acetamidopyridin-3-ylacryloyl-glycyl)]-N-methylamino]-2,6-dichlorobenzyloxy]-2-methylquinoline, process for preparation thereof, and pharmaceutical composition containing said vitreous form
Inventor: OHNISHI NORIO
IPC: A61P37/00
Filed: 1999-10-18
Granted: 2005-04-01
Abstract: This invention relates to a vitreous form of 8-[3-[N-[(E)-3-(6-acetamidopyridin-3-yl)acryloylglycyl]-N-methylamino]-2,6-dichlorobenzyloxy]-2-methylquinoline (FR173657). This vitreous form has good solid stability and, therefor, is useful for producing and supplying FR173657 products whose quality is stable enough to be suitable for medicines.
Patent TW-494146-B (TW)
Title: Process for growing a single crystal silicon ingot
Inventor: FALSTER ROBERT
IPC: C30B15/00
Filed: 1998-04-09
Granted: 2002-07-11
Abstract: The present invention relates to a process for the preparation of single crystal silicon ingot. The process comprises controlling growth conditions, such as growth velocity, v, instantaneous axial temperature gradient, G0, and the cooling rate, within a range of temperatures at which silicon self-interstitials are mobile, in order to prevent the formation of these agglomerated defects. In ingot form, the axially symmetric region has a width, as measured from the circumferential edge of the ingot radially toward the central axis, which is at least about 30% the length of the radius of the ingot. The axially symmetric region additionally has a length, as measured along the central axis, which is at least about 20% the length of the constant diameter portion of the ingot.
Patent TW-I234629-B (TW)
Title: Tripod
Inventor: NAKATANI KOICHIRO
IPC: F16B7/14
Filed: 1999-11-04
Granted: 2005-06-21
Abstract: A tripod, wherein a base body (21) forming therein a pair of fitting hole parts (25) separated opposedly from each other is provided, a pair of rotating pivot parts (28) of a first leg body (27) are fitted rotatably into both fitting hole parts (25) of the base body (21), both rotating pivot parts (28) are positioned coaxially on the outer sides of upper end part of the first leg body (27) and projectedly formed integrally, whereby the upper end surface part of a second leg body (29) inserted into the inner peripheral side of the first leg body (27) so that its projected length can be adjusted can be positioned on roughly the same level as the upper end surface part of the first leg body (27) so as to increase a leg telescoping ratio.
Patent TW-440662-B (TW)
Title: Water flow control structure with various water-discharging modes
Inventor: JOU SHIAU-TZUNG
IPC: B05B1/16
Filed: 1999-12-23
Granted: 2001-06-16
Abstract: Disclosed is a water flow control structure with various water-discharging modes, in which a receiving portion is recessively provided at a water-discharging portion of a water outlet. The receiving portion is installed therein with a rotatable converting base. The converting base is provided at a side thereof with a plurality of water flowing apertures that are in communication with a plurality of water flow passageways at another side thereof. By adjusting the inner collars, adjusting nuts, water-discharging cover, water-discharging adjusting cover, and sheathe that are in communication with the water follow passageways and the water flow apertures, the coupling at the water flow apertures and the water outlet can be changed such that the water flow can be changed to different locations (to the inner color or water-discharging adjusting cover within the converting base). By adjusting the gaps among the adjusting nut, the water-discharging adjusting cover, and the sheathe externally connected to the water-discharging adjusting cover, the area and angle of the water outlet impacts upon the peripheral structure for causing the water flow in the form of atomized, droplets, or water jet, so as to allow various water-discharging modes, and to meet the demands of different users.
Patent TW-419565-B (TW)
Title: Installation structure of ignition coil of oscillating power device
Inventor: NAKAJIMA HIROYUKI
IPC: H01F38/12
Filed: 2000-03-22
Granted: 2001-01-21
Abstract: This invention comprises a ignition coil unit (25) having cylindrical body and placed in front of the engine (22), enabling the coil unit shaft parallel to the oscillating shaft (92) extending to the direction of vehicle width and equipped next to engine (22). The ignition coil unit is integrated with the side of the engine, so even if the power devise oscillates, the high voltage flexible cord will not be bent repeatedly. Therefore, a cheap flexible cord can be used for the high voltage flexible cord. Besides, since the high voltage flexible cord does not need to absorb the relative displacement between the power unit and the ignition coil unit, the high voltage flexible cord can be shortened. Moreover, the protruding amount of the power unit to the ignition coil unit in front can be restrained.
Patent TW-476999-B (TW)
Title: Semiconductor structures and manufacturing methods
Inventor: TOEBBEN DIRK
IPC: H01L21/60
Filed: 2000-08-15
Granted: 2002-02-21
Abstract: A method for forming source/drain contacts to source/drain regions of an array of transistors. The method includes providing a semiconductor body with a gate oxide layer over the surface of the semiconductor body. The gate oxide layer extends over active areas in the semiconductor body. Gate stacks are provided on the gate oxide layer in columns across the rows of active areas. A dielectric material is deposited over the surface of the provided semiconductor body. Vias are etched through the dielectric material over source/drain regions in portions of the active area between the columns of gate stacks. First portions of sidewalls of such vias are formed over portions of adjacent columns of the gate stacks and second portions of the sidewalls of such vias are formed between adjacent columns of the gate stacks. The vias expose portions of the gate oxide layer over the source/drain regions. Source/drain contacts are formed in the vias, such formation comprising: forming spacers on the sidewalls of the regions of dielectric material; exposing the exposed portions of the gate oxide to an etch to remove such exposed portions of the gate oxide layer, such etch etching the gate oxide at a substantially higher etch rate that to the spacers; and forming conductive materials on the spacers and in contact with the source/drain regions.
Patent TW-459198-B (TW)
Title: Data processing using various data processors
Inventor: DURANTON MARC
IPC: G06F9/38
Filed: 2000-03-29
Granted: 2001-10-11
Abstract: A data processing arrangement includes various data processors (P) and a memory arrangement (MA) for applying input data (Di) to the data processors (P) and for storing output data (Do) from the data processors (P). The following steps are alternately carried out: a configuration step (CS) and a processing step (PS). In a configuration step (CS) the data processing arrangement is configured so that different respective data processors (P) process different blocks of data (B) contained in the memory arrangement (MA). In a processing step (PS), the blocks of data (B) are actually processed, whereas a data processor (P) stops when it has processed its block of data (B). Such a data processing arrangement offers great versatility, because different data processing chains can be realized without requiring relatively complicated software.
Patent TW-514805-B (TW)
Title: Computer system and operation method used in e-commerce
Inventor: LI CHING-JIUN
Filed: 2000-03-31
Granted: 2002-12-21
Abstract: The invention relates to computer system used on e-commerce, which primarily includes an application system, a database, an accumulated calculation device, a comparison device and a deduction device. Using the application can provide member (including regular enterprise, small and medium enterprise, individual and so on) intending to involve in e-commerce the required related resources in e-commerce at free charge, thus member can readily, quickly and economically enter the field of e-commerce, If the business income of the member reaches a credit line, then the basic deduction can be taken from business income. Member won't need to pay the monthly rent. Besides, as long as the basic deduction gets paid, all business income goes to member without needing to pay transaction processing fee, hence profit of member can be significantly increased.
Patent TW-I273120-B (TW)
Title: Epoxy resin composition and semiconductor device
Inventor: SHIMIZU HIROO
IPC: C08L63/00
Filed: 2000-08-05
Granted: 2007-02-11
Abstract: An epoxy resin composition comprises (A) an epoxy resin, (B) a curing agent and (C) a filling material, wherein the epoxy resin contains (a) a bisphenol A type epoxy compound, and the filling material contains a spherical silica, the content of the filling material being 88 to 96% by weight of the total. The epoxy resin composition is excellent in weld heat resistance, welder reflow resistance at a high temperature, and shapability. Moreover, a semiconductor device packaged by such resin composition is useful as an electronic part.
Patent TW-564465-B (TW)
Title: Method and apparatus for making a poly silicon film, process for manufacturing a semiconductor device
Inventor: OGAWA TETSUYA
IPC: H01L21/336
Filed: 2000-10-18
Granted: 2003-12-01
Abstract: Disclosed is a method for making a poly silicon film, comprising the steps of: forming on a glass substrate 31 with an amorphous silicon film 33 having a first area 33a and a second area 33b adjacent to the first area 33a, forming a first polycrystalline part 34a by projecting a laser beam 35 of wave length 390 to 640 nm on the first area 33a, and projecting a laser beam 35 of wave length 390 to 640 nm on the second area 33b and a part of the first poly crystalline part 34a neighboring the second area 33b, so as to form a second poly crystalline part 34b neighboring the first poly crystalline part 34a.
Patent TW-470838-B (TW)
Title: Switch safety apparatus
Inventor: CHEN JSENG-YAO
IPC: F16P3/12
Filed: 2000-11-10
Granted: 2002-01-01
Abstract: The invented switch safety apparatus is used to conduct the switching for turning off power source on an operation button on an appointed apparatus located in an environment. The switch safety apparatus includes a base stand, a sensing apparatus, a control apparatus, and a driving apparatus. The base stand is installed on the appointed apparatus in a mobile manner. The driving apparatus is installed on the base stand opposite to the operation button so as to drive the apparatus. The sensing apparatus is individually connected electrically to the control apparatus. The invented switch safety apparatus is featured with that switch safety apparatus can be installed on the appointed apparatus to be controlled in a mobile manner. In addition, when the environment detected by the sensing apparatus reaches a determined value, the control apparatus will send out a constantly close or constantly open signal to drive the driving apparatus. Then, the driving apparatus generates a mechanical action to perform the switching for turning off power source on the operation button so as to terminate immediately the operation of the appointed apparatus.
Patent TW-484170-B (TW)
Title: Integrated modular processing platform
Inventor: TEPMAN AVI
IPC: H01L21/205
Filed: 2000-11-15
Granted: 2002-04-21
Abstract: The present invention generally provides a modular vacuum processing system which includes a mainframe supporting a transfer chamber, one or more load locks and process chambers mounted to the transfer chamber, a modular mainframe plumbing tray and chamber trays associated with the process chambers. Methods of processing substrates and sequencing substrates through the system are also provided.
Patent TW-556278-B (TW)
Title: Method and system of preventing corrosion of conductive structures
Inventor: SPIVACK ARTHUR J
IPC: C04B41/50
Filed: 2000-11-29
Granted: 2003-10-01
Abstract: A system for preventing corrosion of a surface of a metal structure in contact with a corrosive environment comprising: (a) a semiconductive coating in conductive contact with at least part of the surface; and (b) an electronic filter for filtering corrosive noise and a method of preventing corrosion using the system.
Patent TW-I223188-B (TW)
Title: A computer pointing device
Inventor: POO TENG PIN
IPC: G06F3/033
Filed: 2000-12-05
Granted: 2004-11-01
Abstract: A computer pointing device (65) has a coupling device (1) for coupling to a computer serial bus. A primary control device (60) is coupled to the coupling device (1). A computer pointing mechanism (62) is coupled to the primary control device (60) and a data storage device (10) is coupled to the primary control device (60). The primary control device (60) controls data flow between the coupling device (1) and each of the computer pointing mechanism (62) and the data storage device (10). The data storage device (10) includes an interface device (2) coupled to the primary control device (60), a memory control device (3) and a non-volatile solid-state memory device (4). The memory control device (3) being coupled between the interface device (2) and the memory device (4) to control the flow of data from the memory device (4) to the interface device (2).
Patent TW-I222957-B (TW)
Title: Synthesis of crystalline silicoaluminophosphates
Inventor: MERTENS MACHTELD M
IPC: B01J29/85
Filed: 2000-12-27
Granted: 2004-11-01
Abstract: This invention is directed to a method of making a crystalline silicoaluminophosphate molecular sieve. The method includes adding to a vessel a mixture comprising a silicon containing composition, an aluminum containing composition, a phosphorus containing composition, and a template, and continuously stirring the mixture while applying heat at a temperature and duration effective to form a crystalline silicoaluminophosphate molecular sieve, wherein stirring is applied for 20-95% of the duration that heat is applied. The result is a substantial increase in crystalline molecular sieve product.
Patent TW-472387-B (TW)
Title: Manufacturing method of SRAM
Inventor: SHIU SHR-YING
IPC: H01L27/11
Filed: 2001-02-06
Granted: 2002-01-11
Abstract: There is provided a manufacturing method of SRAM. The method comprises forming a stack gate with a cap layer on a substrate; next, forming a mask layer on the substrate for covering part of the stack gate surface, thereby exposing the oxide layer on the drain side of the stack gate; subsequently, performing a thermal oxidization process to increase the thickness of the exposed oxide layer, thereby forming a gate oxide layer whose drain is thicker; then, removing the mask layer and the cap layer; and forming a source area and a drain area in the substrate.
Patent TW-501382-B (TW)
Title: Semiconductor device and process therefor
Inventor: SAKAMOTO NORIAKI
IPC: H01L23/495
Filed: 2001-02-16
Granted: 2002-09-01
Abstract: The traditional BGA device uses the printed circuit board, ceramic substrate and flexible plate to be the supporting substrate and installs the semiconductor device. Because the supporting substrates are inherently redundant material and their thickness enlarges the semiconductor device, the heat of the semiconductor device is uneasy to dissipate. This invent buries the conductive patterns 11A and 11D in the insulated resin and the conduction foil 20 is formed by half-etching to reduce the thickness. Besides, there is heat dissipation electrode 11D, so a good heat dissipation semiconductor device is also obtained.