Patent GB-1380236-A (GB)
Title: Protection method against false connections in telecommunication systems
IPC: H04Q3/545
Filed: 1973-03-16
Abstract: 1380236 Automatic exchange systems HASLER AG SIEMENS-ALBIS AG and STANDARD TELEPHON UND RADIO AG 16 March 1973 [27 March 1972] 12914/73 Heading H4K In a programmed controlled TDM exchange, instructions from the central control to a controlled unit include, in addition to the address of the member to be controlled and a control order, information indicating the expected condition of the addressed member before the control order is operative and upon arrival of the instructions at the unit to be controlled the actual condition is compared with the expected condition contained in the instruction, execution of the control order being dependent on the accordance of the two conditions. The invention is described as applied to the control of a time division switching unit (Fig. 1), by the central control, through which one-way or both way (four wire) connections may be established between 28 pairs of 32 channel PCM.TDM highways PCM-VF (1-28). Each highway pair; e.g. PCM-VF, has associated therewith a serial to parallel converter, SP1, a buffer store B71, a 32-position speech storeSS1, a parallel to serial converter PS1 and a 32- position switching memory ZOS1. Information from an incoming highway is written into the call store once per frame where it is stored under an address corresponding to its time channel 0-31. Under the instruction of central control there is stored in each position the switching memory information relating to which channel of which highway the information in the corresponding position of the speech store is to be switched. In operation the information in the speech stores can remain for up to one frame. During the frame the information is switched to the outgoing highways as follows. The switching memories ZOS1-28 are scanned in sequence for the channel 0, then channel 1 and so on up to channel 31. In the example shown when position 12 of switching memory 3 is read, it is noted that the connection is to channel 28 of highway 19. The information in position 28 of speech store 19 is then read out to parallel to serial converter PS3 and thence out on channel 12 of highway PCM-VF3. Similarly the information is position 12 of speech store SS3 is read out on channel 28 of highway 19 when position 28 of speech store 19 is read. From the above it can be seen that the same channel position is used on each highway pair for each two way transmission and that the switching unit is non-blocking. One way connections are catered for and data exchange between two computers is referred to. The invention is applied to the setting of information in the switching memories, and the arrangement is such that the switching memory positions are switched from idle to a particular state or from a particular state to idle. Hence there are two types of central control instruction, a setting order and a resetting order both having the general form shown in Fig. 2(I), under ORDER, Confirmation and error replies are shown under reply. For all orders and replies relating to connections W is three bits and 0. Position S is of three bits and indicates the type of order and type of connector, i.e. set or reset, two way or one way. In set orders, T, V, X, Z are each five bits and each pair give the address or a different switching memory position, e.g. by PCM-VF number and channel number. In reset orders, T, V give a switching memory address of X, Z the expected contents of that address before the reset order is operative. In operation and set order such as shown in Fig. 2 (II) is sent by central control to the switching unit, the Figure S = 6 indicating a two way connection and that the order is to cause the setting of the switching memories. Because it is a set order, it is known that the two memory positions whose addresses are contained in the order should be idle. A check is performed to confirm this and if the confirmation is forthcoming, ZOS address B is read into the ZOS position of address A and vice versa. A reply message as shown in Fig. 2(II) under reply is sent to central control, S<SP>1</SP> being given the same value as S. If either of the addressed memory positions are not idle a reply as shown in Fig. 2(III), is sent under a value of S<SP>1</SP> different from the S of the set order, and the reply including the address of the "non" idle memory position together with its contents. A reset order for a two way connection is similar except that S = 4. The contents of ZOS position address A is checked to see that it contains ZOS address B and vice versa and if so then two positions are set to idle, and a confirmation message sent (Fig. 2(iv)). If there is a non agreement error reply Fig. 2(v), is sent. In order to distinguish in the central control between confirmation and error replies, S<SP>1</SP> has values 6, 4, 7, 5, for confirmation replies and 2, 0, 3, 1 for error replies and hence all error replies S<SP>1</SP> binary values start with 0 and all confirmations with 1. Similar instructions are used for one way connections. Figs. 3 and 4 (not shown), show flow diagrams indicating how the above functions are carried out by the central control and the switching unit.