baber/WOPTO huggingface dataset:
Patent JP-S62266358-A (JP)
Title: Solar heat collecting device
Inventor: TAJIMA MASAHISA
IPC: F24S90/00
Filed: 1986-05-14
Abstract: PURPOSE:To add a defrosting function and prevent heat from being discharged out of a hot water storing tank during a defrosting operation by a method wherein an opening or closing valve is installed in a hot gas bypassing circuit which is arranged in parallel with a coolant-water heat exchanger, a capillary tube and a thermal expansion valve. CONSTITUTION:An opening or closing valve 20 is arranged in a hot gas bypass circuit 19 which is arranged in parallel with a coolant-water heat exchanger 3, a capillary tube 18 and a thermal expansion valve 8. During a thermal collecting operation in which no solar heat is applied, a continuation of operation at a low surrounding temperature causes frost to be adhered to a thermal collecting plate 10. As frosting continues, an evaporation temperature of coolant is decreased. This is detected by a thermistor 17 and as a frosting temperature is lower than a set temperature, an opening or closing valve 20 is opened. With this arrangement, coolant gas of hot temperature and high pressure compressed by a compressor 1 passes through the hot gas bypass circuit 19, the opening or closing valve 20 and a thermal collecting distribution pipe 6 and flows into the thermal collecting plate 10 to apply heat to the thermal collecting plate 10 and to melt frost. Thus, a defrosting operation in which a part of the coolant is condensed and passes again through the thermal collecting distribution pipe 12 and an accumulator 14 into a compressor 1 is repeated. Because heat in a hot water storage tank is not used during this defrost operation, heat loss can be presented.
Patent JP-H04339526-A (JP)
Title: Automatically metallic mold exchanging device
Inventor: HAYAKAWA MINORU
IPC: B21D37/04
Filed: 1991-05-15
Abstract: PURPOSE:To easily exchange a punch and a die in a short time by reconstructing a part of a lower turret in an existing turret punching press. CONSTITUTION:In an automatically metallic mold exchanging device 29 for exchanging the punch P and the die D fitted to the upper and lower turrets 5, 7 in the turret punching press 1, a stocker 27 incorporating plural punches and die holders 69 supporting the punch Pk and the die Dk for exchanging, is provided in the vicinity of the turret punching press 1. A reciprocal carriage 35 is provided between this stocker 27 and exchanging position 13. A punch and die holder receiving part 111 for receiving the punch an the die holder 69 to this carriage 35 from the stocker 27 and a die holder receiving part 115 for receiving the die holder 9 are provided and a die holding part in the punch and die holder 69 and a die holding part of the die holder 9 are provided freely vertically and superposedly and also a temporary holder 123 is provided. Further, this device has a feature where an exchanging arm 91 which is freely taken out and rotatable for exchanging the punch is provided.
Patent JP-S5537644-A (JP)
Title: Input-output circuit of microcomputer
Inventor: YABUUCHI HIDEKAZU
IPC: G06F15/00
Filed: 1978-09-07
Abstract: PURPOSE: To use effectively an external terminal by the external input or output terminal of a transfer circuit to the external terminal of a parallel input-output port and then by allowing the parallel input-output port and data transfer circuit to share the same external terminal.  
     CONSTITUTION: In mode 1, external terminals E,F,G,H, and I are used for input and output data having passed through parallel input-output port A and in mode 2, they are used for series input-output insterruption request part B, counter interruption request part C and external inerruption request part D. By making output control signal S17 of request part B inactive, the output of driver 10 is held at level "H" and the same effect as the separation of request part B from terminal G is caused to send or receive correctly output S 3  or input S 8  to or from port A. When output control signal S 24  is made inactive by request part C to hold the output of driver 13 at level "H", the same effect as the separation of request part C from terminal F can be obtained, so that output S 1  or input S 6  will correctly be sent or received to and from port A. Supplying port A with an output pulling up external terminals allows request parts BWD inmode 2 to operate normally. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H0629230-A (JP)
Title: Method and apparatus for glow discharge
Inventor: MIZUNO TAKASHI
IPC: H01L21/205
Filed: 1993-05-12
Abstract: PURPOSE:To provide a glow discharge method and its apparatus wherein plasma damage is small and a plasma treatment can be executed over a wide area, uniformly and at high speed. CONSTITUTION:In a glow discharge method and its apparatus, a weak-electric- field region Ew which is extended and spread uniformly on a substrate 8 and an electric field, for glow discharge use, which gives a strong-electric-field region Es which is away from the substrate 8 are installed, the strong-electric- field region is covered with an insulator 17 and a thin film from a gaseous substance is deposited or etched uniformly on the substrate 8 only in the weak- electric field region Ew. At this time, when a glow discharge is established in an electrically floating state, the glow discharge is not spread to the inner wall or the like of a reaction container. As a result, it is possible to restrain that the inner wall is sputtered and that particles are produced, a film is not applied to inessential parts such as the wall surface, the electrode and the like of a reaction apparatus, and the reaction apparatus can be cleaned easily.
Patent JP-H06325575-A (JP)
Title: Semiconductor integrated circuit
Inventor: YAMAUCHI SHIYUUKO
IPC: H01L27/04
Filed: 1993-05-12
Abstract: PURPOSE:To realize high speed operation with reduced size by distributing the output wiring of a semiconductor device entirely over a chip, distributing the functional circuit block making the driving logic circuit group thereof close to each other, and decreasing the output load capacity of a set of driving circuit thereby suppressing the delay of signal due to the wiring. CONSTITUTION:In a semiconductor system, the address inputs are interconnected with address outputs over the entire chip and then they are divided into (m) sections within the chip thus producing a memory cell array. A plurality of logic circuit groups, i.e., predecoder groups, for driving the drive logic circuit directly are provided in the vicinity of the memory cell array with the inputs thereof being connected with the commonly wired address outputs and some of the output wirings being inverted or relayed through a nonrotational butter circuit. In other words, an integrated circuit is constituted of a chip 9, an input buffer 1, host bit recognition circuits 2, predecoders 3, transistor group arrays 6 having memory function, and direct drive circuits, i.e., decoders 4, all mounted on the chip 9.
Patent JP-S5734364-A (JP)
Title: Darlington transistor
Inventor: KAMIYA YASUO
IPC: H01L21/8222
Filed: 1980-08-09
Abstract: PURPOSE:To give a stabilized high breakdown strength to the device of monolithic structure by a method wherein a part of the base region, directly below the base electrode on the input side, is formed thinner and lower in density than the other base regions, and a punch-through is given to said part. CONSTITUTION:For example, a P base 3 is provided on the N type high resistance region (collector) 2 on an N<+> region 1 and a driving transistor (TR) and N<+> emitter regions 4 and 5, to be used for an output TR, are formed in the base region. A P type guard ring 11 and an N<+> channel stopper 12 are provided on the circumference of the base and a darlington circuit is formed by providing metal electrodes 7-10 at each TR. The base region 3 is formed in such manner that the section directrly below the electrode 7 will have a divided thin and narrow region 3a and a punch-through is performed at the voltage lower than the collector-emitter sustaining voltage of an output TR. Through these procedures, the device having a stabilized high breakdown strength can be formed with a simple process of manufacture.
Patent JP-H08303980-A (JP)
Title: Heat exchanger
Inventor: TAIRA SHIGEJI
IPC: F28F13/06
Filed: 1995-05-09
Abstract: PURPOSE: To provide a heat exchanger in which an occurrence of frosting can be restricted and an operating performance can be improved. CONSTITUTION: In a heat exchanger having two rows of heat exchanging parts 1, 2, a thermal insulating material 3 is arranged between a front row of heat exchanger 1 and a rear row of heat exchanger 2. Then, the thermal insulating material 3 is arranged at a down-stream side of a heat transfer pipe at the front row of heat exchanger 1 so as not to disturb a flow of air. Accordingly, even if frosting is generated at either one of the front row of heat exchanger 1 or the rear row of heat exchanger 2, thermal transfer between the front row of heat exchanger 1 and the rear row of heat exchanger 2 is shut off with the thermal insulating material 3 so as to prohibit a development of frost. With such an arrangement as above, it is possible to improve the performance of resistance to frosting and a frosting limitation at the heat exchanger.
Patent JP-H02291595-A (JP)
Title: Display system
Inventor: TANAKA TOSHIYUKI
IPC: G09F9/40
Filed: 1989-04-29
Abstract: PURPOSE:To increase the number of columns and the number of rows without making characters hard to see by providing a hardware means which detects how many basic cells are connected longitudinally and laterally and a software means which controls a display quantity based upon its resolution. CONSTITUTION:Plural basic display 1 can be connected in a tile shape to basic display panels 1a - 1d which makes an (n)-row (m)-column display, e.g. a 25-row X80-column basic display and the circuit which detects how many basic cells are connected longitudinally and laterally is provided. Its information is received by the software to display characters while the number of display rows and the number of columns are increased without varying the size of the characters. Consequently, the number of rows and the number of columns can be increased without making the characters hard to see, and an assembler list can be so displayed that full lines can be seen although some of columns are displayed normally.
Patent JP-S60256676-A (JP)
Title: Lockup type automatic transmission gear
Inventor: TAKEDA HITOSHI
IPC: B60W10/10
Filed: 1984-06-01
Abstract: PURPOSE:To prevent the occurrence of a transmission shock, by a method wherein, from the output torque of a transmission gear, a lockup interruption timing and a re-lockup timing are decided to cause a timing of the starting to respond to a transmission motion timing. CONSTITUTION:In a lockup type automatic transmission gear, a means (i) which calculates an estimated value of an output torque after transmission instruction is provided, and when a difference between a torque and an estimated value of a torque is decreased to below a set value (j), temporary disengagement of a direct-coupling clutch (c) is instructed to a lockup interruption control means (f). This enables a timing of the starting to always respond to an actual timing of transmission motion, resulting in the possibility to prevent the occurence of a transmission shock.
Patent JP-S60256779-A (JP)
Inventor: NAKA REIJI
IPC: F25D23/06
Filed: 1984-06-01
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000308294-A (JP)
Title: Stator for revolving magnetic field type single-phase synchronous motor
Inventor: ASHIKAWA MASAKAZU
IPC: H02K3/28
Filed: 1999-04-19
Abstract: PROBLEM TO BE SOLVED: To inhibit the voltage fluctuation of each main coil, while avoiding increase in cost. SOLUTION: In this stator for the revolving magnetic field type single-phase synchronous motor, a first main coil 2 and a second main coil 3 are wound on a large number of slots s1-s36 on the inner circumference of a stator core, and outputs from two systems having different output voltage from these main coils 2, 3 are obtained. One first main coil sections 2a, 2b, obtained by dividing the first main coil 2 into two, are wound on each slot s1-s18 in the half section of the inner circumference of the stator core, the other first main coil section 2b is wound on each slot s19-s36 in a remaining half section, and these two first main coil sections 2a, 2b are connected in series.  One second main coil section 3a, obtained by dividing the second main coil 3 into two, is wound on each slot s1-s18 in the half section of the inner circumference of the stator core, the other second main coil section 3b is wound on each slot s19-s36 in a remaining half section, and these two second main coil sections 3a, 3b are connected in series.
Patent JP-S63276339-A (JP)
Title: Data transmission system
Inventor: IMAI HIROYUKI
IPC: H04L7/02
Filed: 1987-05-07
Abstract: PURPOSE:To contrive the miniaturization of an equipment by using a microcomputer so as to realize the establishment of bit synchronization by means of the software. CONSTITUTION:An arithmetic circuit 7 in the initial state makes a counted value latched by the initial edge detection signal 11 into an ideal bit synchronizing pattern to form a reference point of an edge data. Then the arithmetic circuit 7, in response to an edge detection signal 11, obtains an error between the actual input edge data and the ideal bit synchronizing pattern edge data and checks whether or not the obtained error is within the permissible range of the error of phase synchronization at the same time. When the error is within the permissible range, the arithmetic circuit 7 counts the number of input edges and obtains the error by a prescribed counted value and corrects the ideal edge data by taking the mean value as the difference between the reference edge and the actual input edge to form the reference edge.
Patent JP-2000248091-A (JP)
Title: Surface treatment for base material and apparatus for the same and surface treated base material
Inventor: KONDO YOSHIKAZU
IPC: B01J19/08
Filed: 1999-04-19
Abstract: PROBLEM TO BE SOLVED: To provide a method for surface treatment of a base material and apparatus for the same and a surface treated base material improving adhesivity to the base material even in a process carrying of the base material in high speed, having high imparting efficiency of a polar functional group onto the base material, capable of carrying out an effective and uniform surface treatment. SOLUTION: In this surface treating method for the base material having a treating part 2 continuously plasma treating a continuously transported long base material 1 under atmospheric pressure or a pressure close to it, the treating part 2 is a treating room having an inlet and exit for the base material 1 and in the surface treatment of the base material 1 by applying a pulsed electric field, the gas enclosed in the treating room includes >=30% of the reactive gas and the pressure in the room is higher than the external pressure.
Patent JP-S603894-A (JP)
Inventor: OKADA KAZUICHI
IPC: H05B6/12
Filed: 1983-06-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S60254576-A (JP)
Inventor: KOUNO KIYOUICHIROU
IPC: H01R13/629
Filed: 1984-05-31
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S63275128-A (JP)
Title: Semiconductor device
Inventor: USUI YOSHIKIYO
IPC: H01L21/60
Filed: 1987-05-07
Abstract: PURPOSE:To make the addition of working processes unnecessary, and prevent the generation of short-circuit, by interposing a retainer of solder to retain semiconductor elements at the time of bonding the semiconductor elements with a wiring board. CONSTITUTION:In addition to a metal layer 3 constituting a wiring, a plurality of metal layer regions 4 which are not in contact with the wiring are arranged so as to almost uniformly disperse. The total area of the metal layer region 4 is larger than the total contact area between semiconductor elements 5 and the wiring of bumps 6. Between the metal layer region 4 and the insulating layer 8 of semiconductor element surface, retainers made of solder interpose, and uniformly receive the load which the semiconductor elements apply to the substrate. Therefor, the semiconductor chip surface of the semiconductor element and the substrate surface are kept in parallel, and the load applied to the bumps is reduced, so that the generation of collapse of the bump can be prevented. Consequently, short-circuit, due to the phenomenon that the crushed bump comes into contact with a neighboring wiring or a neighboring bump, does not occur.
Patent JP-H07318668-A (JP)
Title: Structure of watch with receiving antenna
Inventor: TOSAKA SUSUMU
IPC: G04G21/04
Filed: 1994-05-25
Abstract: PURPOSE:To obtain a thin waterproof structure of watch equipped with a receiving antenna in which the external view required for a wrist watch is ensured by disposing the antenna on the outside of the watch part and imparting waterproofness to the antenna containing part. CONSTITUTION:A receiving circuit, a time indicating part, etc., are built in a watch part 1 and an antenna coil 10 is fixed at 12 o'clock and/or 6 o'clock side on the outside of the watch part 1. A lead wire connected with the watch part 1 is provided on the outside. Furthermore, a receiving antenna unit 11 is fixed with a band 15 in a recess 13b made substantially in the center of the outer side face and the antenna coil 10 is wound around the outer periphery by a plurality of turns.
Patent JP-H01281371-A (JP)
Title: Cooling device
Inventor: FURUISHI YOSHIO
IPC: F25B9/00
Filed: 1988-05-07
Abstract: PURPOSE:To maximize the refrigerating capacity, by providing a conductive ring mounted on the same axis of a displacer, and a closed magnetic circuit consisting of an exciting coil and an exciting yoke that generate a magnetic flux intersecting the conductive ring in order to control direct current of the exciting coil. CONSTITUTION:Because a conductive ring 34 moves with reciprocating movement of a displacer 4 so as to intersect the magnetic flux produced in an electromagnetic gap by an exciting coil 31, eddy current is generated in the conductive ring 34, made of conductive material, due to electromagnetic flux action, resulting in an eddy current loss. The eddy current loss is proportional to the moving speed of the displacer 4, and acts as a damping action against the movement of the displacer 4. When the amount of direct current that is supplied from a direct current power source to the exciting coil 31 is arbitrarily changed, the magnetmotive force of the exciting coil 31 is changed, and the flux density in the electromagnetic gap changes in proportion to the change of magnetmotive force. Consequently, the amount of the eddy current generated on the ring 34 is also proportionally changed.
Patent JP-H04338851-A (JP)
Title: Test system for output private control part
Inventor: MOCHINAGA MIKA
IPC: G06F13/00
Filed: 1991-05-16
Abstract: PURPOSE:To eliminate the need of connection to an expensive printer by comparing the test result of a test program with the expected value of a preliminarily prepared test result to automatically confirm it so that it is unnecessary to output the test result to a printer to manually check it. CONSTITUTION:The result of test program execution is stored in a test result value storage area provided in an output private control part (step 13), and this stored test result is read in and is stored in a read result value storage area (step 14). This stored value is compared with the expected value of the test result which is preliminarily prepared and is held in the test program (step 15); and if they are equal to each other, the end of the test is checked in a step 17. If they are not equal, the error processing is performed by the test program in a step 18 because error occurs in the output private control part.
Patent JP-S5636775-A (JP)
Title: System and device for mask generation of picture mask processing
Inventor: HASEGAWA SATOSHI
IPC: G06K9/56
Filed: 1979-08-31
Abstract: PURPOSE:To increase the degree of freedom as to mask selection in mask processing and also to reduce a mask coefficient storage memory, by generating the unit of each sampling-point sequence for mask generation in the form of relative addresses by use of ROM. CONSTITUTION:The output of counter 2 counting a clock signal from line 510 is used as the address of ROM3 stored with various units of sampling-point sequence with an equal Euclid distance from the center of the mask. Address data at sampling points of the mask are added 4 to the output of absolute address register 1 for mask processing picture elements to be converted into an absolute address, so that the access address of the picture memory can be obtained. Then, data to register 1 are set every time the mask processing of one picture elements ends. Further, coefficient signals of respective sampling points of the mask generated by counter 8, multiplexer 11 and RAM12 are used for arithmetic among picture elements in the mask as coefficients for picture elements by the output address signal of adder 4.
Patent JP-H11292977-A (JP)
Title: Production of amino-modified silicone emulsion
Inventor: KUWATA SATOSHI
IPC: C08J3/075
Filed: 1998-04-07
Abstract: PROBLEM TO BE SOLVED: To provide a method for efficiently producing an amino-modified silicone emulsion excellent in shear stability when using by dilution, and having small particle diameters by a simple process. SOLUTION: A phase inversion water is added to a mixture of an amino modified silicone of the formula [R<1> is methyl or the like; R<2> is dimethylamino or the like; R<3> is methyl or hydroxy; (m) satisfies the formula 10<=(m) <=10,000; (n) satisfies the formula 0.1<=(n)<=1,000] with a nonionic surfactant, and the obtained mixture with the added water is allowed to change the phase from a water-in-oil type to an oil-in- water type under high shear to provide a nonfluxional gel-like material. The obtained gel-like material is subjected to a primary kneading, and an acidic aqueous solution is added to the obtained primarily kneaded product to provide a concentrated paste having 1,000-10,000,000 cP viscosity at 25 deg.C.  The concentrated paste is subjected to a secondary kneading and optionally the obtained product is kneaded with a diluting water added thereto to provide the objective amino-modified silicone emulsion, in the method for producing the amino-modified silicone emulsion. The amino-modified silicone emulsion obtained by this method can be used in a wide industrial field as a fiber-treating agent, a mold releasing agent, a polishing agent or the like.
Patent JP-S594594-A (JP)
Inventor: ICHIBA AKINORI
IPC: B66C23/84
Filed: 1982-06-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H08300125-A (JP)
Title: Flux for centrifugal casting of two-layered pipe
Inventor: KIMURA TOMONORI
IPC: B22D27/18
Filed: 1995-05-10
Abstract: PURPOSE: To improve a flux which is charged to molten metal to cover and clean the surface of the molten metal in casting molds in centrifugal casting of a two-layered pipe. CONSTITUTION: The flux has a chemical compsn. contg., by weight %, of 9 to 18% CaF2 , 20 to 35% Na2 O and 3 to 10% B2 O3 , consisting of the balance substantially CaO and SiO2 and having a CaO/SiO2 ratio of 0.9 to 1.5. The flux has stability to retain its initial properties without denaturation in a high- temp. region.