baber/WOPTO huggingface dataset:
Patent TW-493117-B (TW)
Title: Current mode dc/dc converter with controlled output impedance
Inventor: HAWKES CHARLES
IPC: H02M3/156
Filed: 2000-09-01
Granted: 2002-07-01
Abstract: ADC/DC converter has an output voltage and sources an output current to a load. The DC/DC converter includes an error amplifier with a reference input and a summing input. The reference input is electrically connected to a reference voltage. The summing input is electrically connected to the output voltage and the output current. The summing input is configured for adding together the output voltage and the output current. The error amplifier issues an error signal and adjusts the error signal dependent at least in part upon the output voltage and the output current. A comparator receives the error signal. The comparator has a ramp input electrically connected to a voltage ramp signal. The comparator issues an output signal that is based at least in part upon said error input. A power switch has an on condition and an off condition, and supplies dc current to the load when in the on condition. The power control input electrically connected to the comparator output signal.
Patent TW-473714-B (TW)
Title: An apparatus of reducing power consumption of single-ended SRAM
Inventor: LIN HUNG-MING
IPC: G11C11/00
Filed: 2000-09-26
Granted: 2002-01-21
Abstract: The present invention provides an apparatus and method of reducing power consumption of single-ended SRAM. The device comprises at least a row of state memory units; a detection unit to detect the bit state of the write-in data, and write the bit state into the state memory unit; a write-in conversion unit to convert the write-in data into the stored data with 0-bits as the minority bits, and write the stored data into a single-sided SRAM according to the bit state; a read conversion unit to recover and output the stored data outputted by the single-sided SRAM according to the bit state stored in the state memory unit. Since the bits of 1 are kept to be the majority bits in the bit data stored in the single-sided SRAM, the power consumption of the single-sided SRAM can be reduced.
Patent TW-460591-B (TW)
Title: Low-density and high-ductility of iron based materials for golf head
Inventor: JAU JR-YE
IPC: C21D6/00
Filed: 2000-11-09
Granted: 2001-10-21
Abstract: The present invention relates to a low-density, high-ductility iron based material for golf head, which comprises 25% to 31% of Mn, 6.3% to 7.8% of Al, 0.65% to 0.85% of C and 5.5% to 9.0% of Cr, and optionally 0.8% to 1.5% of Si, 2.0% to 5.0% of Ti or 0.5% to 1.0% of Mo, and the balance of Fe. The addition of Cr, Ti and Mo in the materials provides excellent atmospheric corrosion resistance, and the material can be forged at 800 to 1050 DEG C to obtain excellent surface property, and can be thermally treated at 980 to 1050 DEG C for 1 to 24 hours, thereby obtaining a material with excellent ductility and high tensile strength. Therefore, the alloy material has high strength, low density, high ductility, high anti-rust property, and excellent surface property.
Patent TW-581752-B (TW)
Title: A process for the conversion of ethylene to vinyl chloride, and novel catalyst compositions useful for such process
Inventor: JONES MARK E
IPC: C07C17/156
Filed: 2000-10-17
Granted: 2004-04-01
Abstract: This invention is a process for producing vinyl chloride from an ethylene-containing feed, oxygen, and a chlorine source in the presence of a catalyst. The process permits direct production of vinyl chloride in a single reactor system, and further permits ethane to be used as the C2 hydrocarbon feed with recycle of ethylene from the product stream to constitute the ethylene specified for the feed. This invention in another aspect concerns also a composition of matter, and a method for making the composition, wherein the composition is useful as a catalyst for the vinyl chloride process. The composition comprises a rare earth-containing material, with the proviso that the catalyst prepared therefrom is substantially free of iron and copper and with the further proviso that when cerium is present the catalyst further comprises at least one more rare earth element other than cerium.
Patent TW-I283780-B (TW)
Title: Back light unit of plane display apparatus
Inventor: OKUMURA DAIMON
IPC: G02F1/1335
Filed: 2000-12-06
Granted: 2007-07-11
Abstract: A backlight unit for use in liquid crystal displays. The backlight unit has a light guide plate that is almost rectangular, a tubular light source arranged at one side of the light guide plate, and a frame supporting the light guide plate and the tubular light source. Two connection cables are connected to the ends of the tubular light source, respectively. Holders made of rubber are mounted on junctions, each between an end part of one tubular light source and one connection cable. Each holder comprises a main body and hollow cylindrical extensions formed integral with the main body and extending therefrom. The main body has a hole in which an end part of the tubular light source is fitted. Each extension has a hole communicating with the hole of the main body. One end of each connection cable is inserted in one extension. Each extension directly covers one end part of a connection cable.
Patent TW-526618-B (TW)
Title: Manufacturing method of two-bit per cell dual floating gates flash memory
Inventor: HUANG JUNG-REN
IPC: H01L29/788
Filed: 2001-01-03
Granted: 2003-04-01
Abstract: A manufacturing method of two-bit per cell dual floating gates flash memory is disclosed. It uses self-aligned etching and dual spacers as hard masks to form dual floating gates. First, provide a semiconductor substrate on which a first insulating layer is formed. A first conductive layer is then formed on the insulating layer. Second, form a second insulating layer. Then transfer patterns and etch the second insulating layer to form trenches in it. Third, deposit a dielectric layer and anisotropically etch the dielectric layer to form spacers in the trenches. Then remove the second insulating layer and etch the first conductive layer to expose the first insulating layer. Furthermore, remove the dual spacers to make dual floating gates. Fourth, define the implantation areas along the two sides of the dual floating gates via photolithography process and then form the implantation areas. After thicken the first insulating layer, sequentially form a composite layer, a second conductive layer and a third insulating layer on the semiconductor substrate.
Patent TW-513692-B (TW)
Title: Calibration method of the returned light noise from the light source of optical disk driver
Inventor: JIANG REN-CHENG
IPC: G11B20/00
Filed: 2001-03-07
Granted: 2002-12-11
Abstract: The present invention relates to a calibration method of the difference with/without the returned light noise from the light source of optical disk driver, which is applied in calibrating the light-emitting parameters of the diode laser light source of optical disk driver, wherein NO DISC is first applied for rough calibration to obtain the initial value of the light-emitting parameters of the diode laser light source of optical disk driver, and perform rapid re-sampling between the power controller of the light source and the post-stage amplifier after the disc is loaded. Compute it with the light-emitting parameters to obtain the effect of the returned light to the light-emitting parameters with disk of the laser light source, which is sent to a compensator for ratio compensation and feedback correction, so as to obtain the laser stability light-emitting parameters affected by the returned light from the optical disk driver, record the stable light-emitting parameters in the memory as the light-emitting control parameters during the writing of the optical disk driver, and thereby achieve of purpose of calibrating the returned light noise of laser to the state of optical disk driver.
Patent TW-I238281-B (TW)
Title: Reflection type liquid crystal display and its manufacturing method
Inventor: NAKAMURA SADAO
IPC: G09F9/30
Filed: 2001-03-21
Granted: 2005-08-21
Abstract: The invention provides a reflection type liquid crystal display having high display quality. The manufacturing method is characterized in comprising a step of forming one color layer 11 over nearly entire surface of a display region on a substrate 6, a step of forming a reflection layer 12 over nearly entire surface of the one color layer 11 and a step of exposing a pattern of the one color layer 11 through the reflection layer 12 left by partially removing the reflection layer 12.
Patent TW-528629-B (TW)
Title: Complex machining machine tool
Inventor: YAMAZAKI TSUNEHIKO
IPC: G05B19/00
Filed: 2001-05-21
Granted: 2003-04-21
Abstract: This invention provides a complex machining machine tool wherein a tool rest capable of attachably and detachably installing tool installing inserts thereon is provided, a plurality of virtual tools is set and registered concerning a predetermined at least one tool together with its indexing positional data in tool file, the tool data of the corresponding virtual tool is read out from the tool file on the basis of the machining instruction by the virtual tool stored in machining program, and the corresponding virtual tool is indexed on the tool rest on the basis of the indexing positional data, and then machining with the virtual tool is executed. At the same time of machining, it is possible to continue machining with the same tool by only positional indexing without changing the tool. The work for changing tools can be extremely decreased even if machining contents are changed or it is necessary to change tools by tool exhaustion.
Patent TW-572874-B (TW)
Title: Process for extracting amino acid by carbon dioxide supercritical fluid
Inventor: LIOU JR-JUNG
IPC: C07C227/00
Filed: 2001-05-21
Granted: 2004-01-21
Abstract: This invention discloses a manufacturing method of a natural amino acid, which can be classified into two types, A and B. The A type uses a supercritical or pseudo-supercritical fluid of mixed carbon dioxide and co-solvent (called carbon dioxide supercritical fluid hereafter) to extract an amino acid hydrolytic aqueous solution following hydrolyzing hair or feather of poultry and livestocks and depressurizes through combining spray dry method to recycle carbon dioxide and co-solvent and separate the amino acid at the same time. The B type uses the carbon dioxide supercritical fluid to extract cystine and residual amino acids respectively from hydrolyzed, neutralized high salt content amino acid aqueous solution and cystine crystal, and separates carbon dioxide, co-solvent and amino acid crystal through the spray dry method same as the A type. The amino acid powder obtained from the two types has advantages such as high purity, low salt content, little water content, fine crystal grain and easy storage, etc. so that it can be used as additives for cosmetics, for raw material production of pharmaceuticals and nutrition additives in fertilizers.
Patent TW-577942-B (TW)
Title: High tenacity, high modulus filament
Inventor: KAVESH SHELDON
IPC: F41H5/08
Filed: 2001-06-08
Granted: 2004-03-01
Abstract: Polyethylene solutions are extruded through a multi-orifice spinneret into a cross-flow gas stream to form a fluid product. The fluid product is stretched at a temperature at which a gel will form at a stretch ratio of at least 5:1 over a length of less than about 25 mm with the cross-flow gas stream velocity at less than about 3 m/min. The fluid product is quenched in a quench bath consisting of an immiscible liquid to form a gel. The gel is stretched. The solvent is removed from the gel to form a xerogel and the xerogel product is stretched in at least two stages to produce a polyethylene yarn characterized by a tenacity of at least 35 g/d, a modulus of at least 1600 g/d and a work to break of at least 65 J/g. The yarn is further characterized by having greater than about 60% of a high strain orthorhombic crystalline component and, optionally, a monoclinic crystalline component greater than about 2% of the crystalline content. Composite panels made with these yarns exhibit excellent ballistic resistance, e.g., SEAC of 300 J-m<2>/Kg or higher against .38 caliber bullets using test procedure NILECJ-STD-0101.01. A ballistic resistant composite panel is provided comprising a polyethylene multi-filament yarn having a tenacity of at least about 35 g/d, a modulus of at least 1600 g/d, a work-to-break of at least about 65 J/g wherein the yarn has greater than about 60% of a high strain orthorhombic crystalline component and the yarn has a monoclinic crystalline component greater than about 2% of the crystalline content.
Patent TW-492940-B (TW)
Title: Driving device for conveyer roller and driving roller device
Inventor: MATSUOKA HIROKI
IPC: B65G23/08
Filed: 2001-06-26
Granted: 2002-07-01
Abstract: To mechanically suppress overturning of a conveyed object on a conveyer device. This driving device for a conveyer roller has a motor generating a rotation power and a coupling part connected to the conveyer roller. A friction roller transmitting mechanism comprising a sun roller, planet rollers that are arranged around the sun roller and rotatably contact with the sun roller, a ring roller of which inner peripheral surface rotatably contacts with the planet rollers, and a carrier synchronous with revolution components of the planet rollers is interposed in a rotation power transmitting passage between the motor and the connecting part. Any one of the sun roller, the ring roller, and the carrier is set as an input element for receiving the rotation power, another of them is set as an output element for outputting the rotation power, and the remaining one is set as a fixed element.
Patent TW-520511-B (TW)
Title: High density mask non-volatile memory array structure with flat-type bank selection transistors
Inventor: CHEN JING-WEN
IPC: G11C17/00
Filed: 2001-08-03
Granted: 2003-02-11
Abstract: The major object of the present invention is to provide a read-only memory array with a flat-type structure, which comprises: at least two memory banks, and the two memory banks have a plurality of memory cells; at least two inter-bank selection transistors connected to the two memory banks, and shared by the two memory banks, wherein each inter-bank selection transistor can select the memory cells of the two memory banks; and, at least a contact, which is connected to the two memory banks through the two inter-bank selection transistors.
Patent TW-523916-B (TW)
Title: Method of suppressing leakage current between memory array bit lines
Inventor: CHEN JIA-SHING
IPC: H01L21/8247
Filed: 2001-09-25
Granted: 2003-03-11
Abstract: A kind of method for suppressing leakage current between memory array bit lines is outlined in the present invention. Three concepts are included in the invention. The first one is to use P-implantation for suppressing the leakage current between the bit lines caused by etching damage of spacer. The second one is to perform P-implantation step after the etching step of spacer such that the implanted region is better confined and threshold voltage is less affected. The third one is to perform the P-implantation step after the annealing step of the bit line such that short line-width effect due to thermal diffusion is not induced.
Patent TW-539939-B (TW)
Title: Method and apparatus to enhance processor power management
Inventor: DAI XIA
IPC: G06F1/32
Filed: 2001-09-28
Granted: 2003-07-01
Abstract: A method and an apparatus to dynamically transition a processor between two performance states, high performance and low power. Predetermined core clock frequency and supply voltage levels of the processor define each performance state. Transitioning the supply voltage while the processor is in the active mode and transitioning the frequency while the processor is in the sleep mode significantly reduce the processor latency.
Patent TW-I220192-B (TW)
Title: Memory access method and apparatus in ICE system
Inventor: CHEN JOE
IPC: G06F13/42
Filed: 2001-11-06
Granted: 2004-08-11
Abstract: The invention provides a memory access method and apparatus in ICE system. The apparatus utilizes data and address bus of ICE provided to access data in external memory. The apparatus comprises a first buffer that receives signal of high significant bit address of ICE controlled by a buffer enable signal and is conducted when the buffer enable signal is enabled, a second buffer that receives the address/data multiplexing bus signal of ICE and controls through a buffer enable signal and a direction control signal and is conducted when the buffer enable signal is enabled, a hi-bit address bus that is connected to the output of the first buffer and is connected to the hi-bit address bus of external memory, a low-bit address/data multiplexing bus that is connected to the output of the second buffer and is connected to the data bus of external memory, a low-bit address bus that is connected to the low-bit address bus of external memory and control unit that receives the control signal of ICE and generates the buffer enable signal and direction control signal, in which the buffer enable signal is enabled when the address unlock signal of ICE is enabled and is disabled when the hi-bit address signal of ICE mismatches with the address of the apparatus.
Patent TW-I246650-B (TW)
Title: Method for evaluating user's access to the net resources and recording media
Inventor: LIN KATHY T
IPC: G06F13/00
Filed: 2002-01-18
Granted: 2006-01-01
Abstract: The present invention is to provide a method for evaluating an user's access to the net resources, comprising: setting up a website in a server for coordinating the evaluating system; finding out a plurality of volunteers from users to perform the monitoring; the volunteers registering the identity information on the website and downloading a first program; the first program executing at least one given job and measuring the data; the first program storing the measured data in the storage device of the computer to be tested; and the server analyzing the data from each computer to be tested. The present invention further comprises a recording media to run in the background automatically when the computer is turned on, communicating to a sever through any communication protocol like http or ftp, checking and downloading the new job on the server regularly, downloading the jobs on the main server regularly, executing the given jobs from the server and measuring data no matter it has been updated or not, storing the measured data into a first specific file or a memory media, and uploading the first file or the memory media to the readable recording media of the program in the server.
Patent TW-I290258-B (TW)
Title: A thin film transistor array for a liquid crystal display
Inventor: HONG MUN-PYO
IPC: G02F1/1335
Filed: 2002-03-04
Granted: 2007-11-21
Abstract: In a liquid crystal display, pixels of red, blue and green are sequentially arranged in the row direction. The red and green pixels are alternately arranged in the column direction while the blue pixels being arranged between the neighboring red and green pixel columns one by one with respect to the two pixel rows. Each blue pixel is surrounded by the four red and green pixels. Gate lines are arranged at the respective pixel rows to transmit scanning signals or gate signals to the pixels while proceeding in the horizontal direction. Data lines cross over the gate lines in an insulating manner to transmit picture signals or data signals to the pixels. The data lines are arranged at the respective pixel columns while proceeding in the vertical direction. Pixel electrodes are arranged at the respective pixels. Thin film transistors are arranged at the respective pixels. Each thin film transistor has a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode. At a predetermined pixel arrangement unit, the data lines at the neighboring red and green pixel columns cross each other to transmit the picture signals, and the data lines for transmitting the picture signals to the two blue pixel columns are connected to each other. The pixel electrodes are overlapped with the gate lines or the data lines while interposing a passivation layer. The passivation layer is formed with a low dielectric organic material or an insulating material such as SiOC and SiOF.
Patent TW-I252502-B (TW)
Title: Apparatus for curing in semiconductor packaging
Inventor: CHOU KUANG-CHWN
IPC: H01L21/00
Filed: 2002-03-18
Granted: 2006-04-01
Abstract: An apparatus for curing in semiconductor packaging includes a curing chamber, a turntable, a driver and a heater. A material-in port and a material-out port are installed in the curing chamber. The turntable bears at least a substrate transferred from the material-in port, wherein at least a die is adhered to the substrate with the adhesive. The driver drives the turntable to rotate. The heater elevates the temperature inside the curing chamber for solidifying the adhesive, which makes the die fixed on the substrate.
Patent TW-550592-B (TW)
Title: Method and device for data transfer
Inventor: DIETRICH STEFAN
IPC: G11C11/413
Filed: 2002-03-22
Granted: 2003-09-01
Abstract: For data transfer on an internal and/or external transfer path and/or to a semiconductor component in particular a semiconductor memory, in a first multiplexer/demultiplexer a data sequence is coded by defining a current level and a voltage level for a data signal, is then transferred on the transfer path synchronously with a clock signal and is decoded in a second multiplexer/demultiplexer by evaluation of the received current level and of the received voltage level in order to determine the transferred data sequence.
Patent TW-561674-B (TW)
Title: Digital power converter
Inventor: FENG SHIOU-MEI
IPC: H02M7/02
Filed: 2002-04-08
Granted: 2003-11-11
Abstract: A digital power converter is disclosed, which is formed of a CPU, PWM driving circuit, a PWM conversion circuit, a rectifying circuit, an AC driving circuit, a DC/AC conversion circuit, plural detection circuits and an alarming circuit, which is characterized in that: the whole circuit is designed to be controlled by the CPU, and the CPU controls each circuit precisely, so as to have the high driving output capability and inductive load distinguishing capability, and also achieve the function of complete and multi-selection protection function for the power converter, which can be accurately controlled to have the maximum effectiveness.
Patent TW-564591-B (TW)
Title: Differential signal transfer circuit
Inventor: HEDBERG MATS OLOF JOAKIM
IPC: H03F1/02
Filed: 2002-04-29
Granted: 2003-12-01
Abstract: A differential signal transfer circuit to control the common mode level of a differential signal, comprising an input common mode level detection circuit (40), for detecting the common mode level of an incoming signal, two capacitors (60, 61) coupled between the first input and output and the second input and output respectively, and a control circuit (50) adapted to control an output common mode voltage level at the output terminals (20, 21) by controlling the levels of charge on the (60, 61) dependent on the common mode level of the incoming signal as detected by the input common mode detector (40).