Patent GB-1428016-A (GB)
Title: Method and apparatus for processing calls distributed randomly in time
IPC: G06F9/46
Filed: 1973-09-28
Abstract: 1428016 Data transmission; master and slave systems COMPAGNIE HONEYWELL BULL 28 Sept 1973 [29 Sept 1972] 45604/73 Heading H4P In a method and apparatus for processing calls transmitted from a plurality of out stations at random intervals, each call is accompanied by a data item x representing a multiplier of a delay interval d which indicates when the call needs to be processed. In a first of two phases, each call is detected and stored then chained into a circular queue for processing at an appropriate time; a test time t is calculated for each call, t being equal to the chaining time H+d+ a small interval a in order to separate, by a period h-the minimum time separating two successive control cycles-the test time t of calls successively chained. In the second phase, the time t of the call closest to H is compared with H and if t=h the corresponding data item x is decremented and if then equal to a predetermined value, the corresponding call is unchained from the queue and processed. Multiplier x may be =0. Each out station is connected to a local receiver R1 &c. which stores the identity of the out station the call and the item x, all receivers being connected to a sequential selection circuit CSR which passes information into a transfer network 6 comprising an arrangement of AND gates enabled consecutively controlled by network RCP which modifies the sequence of connections. Network 4 comprises alterable memories M1 &c. each allocated to a receiver R1 &c. and comprising means for chaining the memories into a circular waiting queue, the whole being coupled through transfer network RT also to calculating network 5. This includes a register D whose contents represents the time d and a register CC representing the execution time H of the cycle being processed; the contents of a register CD represent a function of the number of cycles counted and number of chainings effected. The whole arrangement is controlled, when operating, by a generator GD issuing pulses spaced by interval h which are counted in register CC and are also received by memory CMC which provides comparison instructions to network RCP. In the detecting phase, instructions generated by unit 2 cause the selection of receivers R1 &c. by a selection circuit CSR. At each detected call, corresponding item x is transferred into corresponding memory M1 &c. plus data item t provided by network RC which is calculated by adding the number of cycles in CC to the content of registers D and CD, the latter evolving during the course of this phase being =0 at the start and being increased by h each time a call is detected and chained. Item t determines the time at which such memory must be tested and generally the first test is on the first memory chained. In the second or testing phase when t in any memory approaches h then item x is decremented by 1 and if this produces zero the call stored in this memory is unchained and processed. If x remains greater than 0 a new test time t<SP>1</SP> is calculated and stored in the memory being tested and content of CD is increased by h. During the next control cycle content of CD is reduced by h which arrangement maintains an interval of time h between the test times t of the various memories chained and avoids increasing ad infinitum the content of register CD, and thereby reducing its influence on the evaluation of test times. Figs. 2-6 (not shown) illustrate arrangements for performing the logical operations involved.