baber/WOPTO huggingface dataset:
Patent KR-20000018884-A (KR)
Title: Single line fishing tackle
Inventor: KIM HWAL YOUNG
IPC: A01K91/18
Filed: 1998-09-07
Abstract: PURPOSE: A single line fishing tackle for separating easily the fishing from fishing tackle and preventing tangle of a fish line is provided. CONSTITUTION: A single line fishing tackle comprises a pair of guide arms(5) installed extending externally from the body of a ship(1); a closed loop type main fish line (17) circulating above the ship and below the water surface along the guide arms(5); a branch line(25) jointed to the main fish line (17) at predetermined interval and hung a fishhook(29) to its free end; a jointed portion of fish line s(15) jointed to the main fish line (17) at predetermined interval and having a plurality of weight to soak easily in the water; a circulation roller device(37) located in the route of the jointed portion of fish line s(15) which is circulated the jointed portion of fish line s(15) above the ship and below the water surface; and a guide member(47) straining the branch line(25) by locating its one end in the lower portion of the main fish line (17) and its partial portion in the upper portion of the main fish line (17), and separation guiding the fishhook(29) hung to the free end of the branch line(25) from the main fish line (17).
Patent KR-19990029640-A (KR)
Title: 제어 가능한 스위칭 임계값을 갖는 입력 회로
IPC: H03K5/08
Filed: 1998-09-09
Abstract: 본 발명은, n배의 기준 전위(Ref)와 동일한 전압(V)을 송출하기 위한, 기준 전압(Ref)에 의해 제어된 전압원(3 내지 6), 및 제어된 상기 전압원(3 내지 6)에 의해 전압이 공급되는, 신호 입력(E) 및 신호 출력(A)을 갖는 버퍼 회로(1, 2)를 포함하는 입력 회로에 관한 것이다.
Patent KR-19980087782-A (KR)
Title: 약액 살포장치
Filed: 1998-09-16
Abstract: 본 발명은 인력에 의존하지 않고 자동으로 농약 및 각종 약액을 살포하여 주기 위한 약액 살포장치에 관한 것이다. 
     약액저장실(31)이 형성된 약액탱크(30) 상부에 엔진(40)을 안착하여 엔진(40)의 구동축(41)과 동력분무기(50)의 회전축(54)을 구동수단(B1)으로 연결구동토록하며, 동력분무기(50)의 회전축(54) 타단(54a)과 발전기(60)의 발전축(61)을 구동수단(B2)으로 연결구동토록하고, 상기 약액탱크(30)에 분무대(52)를 장착하여 동력분무기(50)의 토출구(56)에 공급호스(51)로 연결하고, 상기 약액탱크(30)의 프레임(70)에 횡착된 플레이트(71) 저부에 발전기(60)에 의해 구동하는 구동모터(M)를 장착하며, 플레이트(71) 상부에 상호 대응하는 만곡홈(81,81a,82,82a)을 구비하며 구동모터(M)에 의해 구동하는 이동로울러(80a)를 포함한 두쌍의 이동로울러(80a,80b,80c,80d)를 축설치한 살포대차(20)와, 상기 살포대차(20)에 구비되는 이동로울러(80a,80b,80c,80d)의 만곡홈(81,81a,82,82a)간을 통과하며, 지그재그로 절곡되어 수개의 포스트(95)에 횡설된 고정봉(96)에 의해 지지되는 가이드레일(90)로 약액 살포장치(10)를 구성함으로서, 수열로 경지가 정리된 대규모 작물재배지의 고랑사이를 자체 구동에 의해 순회하며 약액을 자동으로 살포할 수 있도록한 것이다.
Patent KR-20000020173-A (KR)
Title: Apparatus for supplying paper of business device and manufacturing method thereof
Inventor: OH SEUNG HO
IPC: G03G15/00
Filed: 1998-09-18
Abstract: PURPOSE: An apparatus for supplying paper of business device and manufacturing method thereof is provided to decrease a time occurred when the rotation direction of a driving motor is changed and perform a print work with a high speed by supplying a paper by a certain period. CONSTITUTION: A boss(11) is formed to an inner surface center of a slave gear(10). The slave gear(10) is connected to an one side frame(50). An upper plate(53) is installed on an upper portion of a paper transmission path. A penetration portion(56) is formed to one surface of the upper plate(53). A bracket(54) is installed to both sides surface of the penetration portion(56). A flange(44) is informed to an external side of a pick-up roller(40). A clutch member(20) is installed for selectively transmitting a rotating force of the slave gear(10) to the pick-up roller(40). A spring clutch(21) is installed to the clutch member(20). A vertical flap(22) is informed to an external side of the spring clutch(21). A horizontal flap(23) is informed to an inner side of the spring clutch(21).
Patent KR-19990029979-A (KR)
Title: 집적회로용 보호층 및 그의 제조방법
IPC: H01L21/306
Filed: 1998-09-21
Abstract: 본 발명은 반응약제에 의해 에칭되는 기판재료로 형성된 기판(23)위에 구성된 구조물(21)에 관련되며, 상기 구조물(21)은 적어도 한 개의 제 1 외층(29) 또는 페씨베이팅층(passivating layer)를 포함하고, 상기 제 1 외층은 제 1 탄성을 가진다.  상기 구조물(21)은 또한 제 1 탄성과 다른 제 2 탄성을 형성층(33)이 가지도록 상기 구조물(21)은 상기 제 1 외층상에 적어도 한 개의 형성층을 가진다.  제 1 외층보다 더 큰 압축시 탄성을 가지도록 형성층에는 제 2 탄성이 제공되고, 상기 구조물은 유리하게 99.8%보다 높은 산출량을 가진다.
Patent KR-19990076511-A (KR)
Title: 펄스폭 검증 장치 및 펄스폭 검증 방법
IPC: H04L25/02
Filed: 1998-09-25
Abstract: 종래, 수신 신호의 펄스폭을 계측하고 있었을 때에는, 긴 펄스를 계측하는 경우 오랜 시간이 소요되어 고속 펄스 통신 등에 대응할 수 없었다. 
     펄스폭의 소정 범위의 최소값과 최대값에 대응하는 2개의 초기 카운트값을 미리 2개의 레지스터에 기억시키고, 이들 값을 초기값으로 하여 다운카운터(108)에서 다운카운트한 다음, 언더플로우가 발생한 타이밍과 검증하는 펄스 신호가 하강하는 타이밍의 시간적인 관계에 근거하여 펄스 신호의 펄스폭이 소정 범위내에 있는지 여부를 판정한다.
Patent KR-20000021219-A (KR)
Title: Biological layer on carrier with stationary phase for separating solid-liquid and for eliminating nitrogen and phosphorous and a method for disposing sewage and waste water
Inventor: HAN SANG BAE
IPC: C02F3/10
Filed: 1998-09-28
Abstract: PURPOSE: A method for disposing sewage and waste water is provided, by using a biological film on a carrier with a stationary phase, in a single reactor operated as an aerobic condition. CONSTITUTION: A biological film on a carrier with a stationary phase for eliminating nitrogen and phosphorus, comprises the step of building the biological on a carrier forming a plurality of tubular voids, stacked as a type of a wall or a slave type inside of a reactor block, composed of a pipe of a circle and a polygon, curved boards, boards, and the tubular voids. The biological film on a carrier with a stationary phase has a plurality of the tubular voids which is installed in an aerobic reactor, anaerobic term, and has a phase which is separately formed as an anoxic condition, or an aerobic condition, and decompose organic materials, and eliminates nitrogen/phosphorous.
Patent KR-19990036827-A (KR)
Title: 연료펌프의 필터장치
Filed: 1998-10-02
Abstract: (과제) 필터의 탱크저면에 대한 접촉, 마모 등에 의해서 발생하는 문제점을 적게 할 수 있는 필터장치를 저렴한 가격으로 제공가능하게 한다. 
     (해결수단) 연료탱크(B)내의 바닥면(b)에 접촉하는 자루형상체(10)의 일부를 필터재(D)의 중합(重合)구조로 한다.  또, 자루형상체(10)의 선단부측을 바닥면(b)에 접촉시키는 형상유지부(30)의 선단부가 자루형상체(10)를 바닥면(b)에 접촉시키는 만곡면(G)을 구비하고, 이 만곡면(G)은 상기 형상유지부(30)가 휨 변형할 때에 자루형상체(10)를 바닥면(b)에 접촉시키는 맞닿음부분(Ga)의 전후에 만곡면부(Gb)가 존재하도록 한다.
Patent KR-19990036841-A (KR)
Title: 래크 기구를 구비한 압축 가스 차단 장치
IPC: H01H33/90
Filed: 1998-10-02
Abstract: 본 발명은, 폐쇄되는 동안에 제2 접촉편에 제공된 로드 형상의 마모 접촉부가 삽입되는 중공형의 마모 접촉부와 두 개의 접촉편과 동일한 축에서 제1 접촉편에 고정되어 폐쇄시에 노즐의 스로트(throat)가 제2 접촉편의 마모 접촉부를 관통 통과시키는 단열 노즐을 갖는 제1 접촉편을 포함하며, 상기 노즐은 배기 챔버에 가스 압축 챔버를 연결시키며, 상기 제2 접촉편의 마모 접촉부는 축을 따라 이동 가능하고 제1 접촉편으로부터 제2 접촉편으로의 방향에 반대 방향으로 운동을 전달하도록 구성된 래크 기구에 의해 제1 접촉편의 마모 접촉부에 반대 방향으로 변위되는 압축 가스 차단 장치이다.  상기 래크 기구는 노즐의 스로트로부터 상류에 배치된다.
Patent KR-20000026435-A (KR)
Title: Method for manufacturing apparatus for controlling thin film type optical path
Inventor: KIM HWA NYON
IPC: G02F1/015
Filed: 1998-10-20
Abstract: PURPOSE: A method for manufacturing apparatus for controlling thin film type optical path is provided to improve an optical efficiency by forming a level mirror through changing the vacuum evaporation condition of a hard mask and a mirror. CONSTITUTION: A method for manufacturing apparatus for controlling thin film type optical path includes the steps of an actuator(210) and a supporting element(175) having a first upper electrode(200), a second upper electrode(201), a first strain layer(190), a second strain layer, and a lower electrode(180) on an upper part of an active matrix(100) having a transistor(120) within and a first metal layer(135). A second sacrificial layer(300) is formed thereon and a hard mask(320) is formed on an upper part of the second sacrificial layer under the vacuum evaporation condition of a 10kW electric power, 1.7mTorr motion press, 70sccm current of argon gas. The second sacrificial layer(300) is etched by the hard mask and a mirror is formed on an upper part of the hard mask.
Patent KR-20000027302-A (KR)
Title: Semiconductor testing device
Inventor: LEE DONG UK
IPC: H01L21/66
Filed: 1998-10-27
Abstract: PURPOSE: A semiconductor testing device is provided to prevent a manual test of a wafer, so that a loading operation and an unloading operation of a loader and an unloader in the wafer can not be performed, when a cassette sensor of the loader/the unloader in a probe station does not sense a cassette, and to eliminate a test loss such as wafer pollution generated when testing a piece of wafer. CONSTITUTION: A semiconductor testing device comprises a loader(100), a tester(110), an unloader(120), a command signal generator, and a controller(140). The loader has a first cassette sensing whether a cassette is mounted on, and loads the cassette for testing. The tester tests a wafer supplied from the loader. The unloader has a second cassette sensor sensing whether a cassette is mounted on, and receives the tested wafer. The command signal generator generates command signals for raising/dropping the loader by responding to a sense signal from the first cassette sensor, and generates command signals for raising/dropping the unloader by responding to a sense signal of the second sensor. The controller controls rising trends of the loader/the unloader by responding to each ascent command signal from the command signal generator, and controls descending trends of the loader/the unloader by responding to each descent command signals from the command signal generator.
Patent KR-20000027380-A (KR)
Title: Ferroelectric random access memory
Inventor: RYU JI HWAN
IPC: H01L29/788
Filed: 1998-10-28
Abstract: PURPOSE: An FeRAM(Ferroelectric Random Access Memory) is provided to reduce areas of a dummy cell by obtaining reference voltage necessary for sensing cell data through a reference voltage generator, to reduce time because it is unnecessary to equalize by reading '0' and '1' from the dummy cell, and to prevent reduction of life span of a chip caused by a fatigue of the dummy cell. CONSTITUTION: An FeRAM(Ferroelectric Random Access Memory) comprises a memory cell(130), a sense amplifier(120), a bit line pull-down unit(110), a reference voltage generator(250), and a reference voltage delivering unit(140). The memory cell has a transistor in which a drain is connected to a first bit line and a word line is connected to a gate, and has a ferroelectric capacitor connected between a source of the transistor and a plate line. The sense amplifier amplifies a voltage difference between the first bit line and a second bit line which is a reference voltage line. The bit line pull-down unit pulls down the first bit line and the second bit line to ground power supply voltage by responding to a first control signal. The reference voltage generator generates reference voltage corresponding to an intermediate level of data '0' and '1', by using threshold voltage values of MOS(Metal Oxide Semiconductor) transistors. The reference voltage delivering unit delivers the reference voltage from the reference voltage generator to the second bit line by responding to a third control signal.
Patent KR-20000031035-A (KR)
Title: Multiplier for operating n bit and n/2 bit
Inventor: LEE DONG SOON
IPC: G06F7/523
Filed: 1998-11-02
Abstract: PURPOSE: A multiplier for operating n bit and n/2 bit is provided to rapidly perform the operation of word multiplying and byte multiplying by using a single circuit and reduce the circuit arrangement space. CONSTITUTION: Two words are input via input ports. The respective word is divided into an upper byte and a lower byte by divider ports. A first encoder(210) outputs a first encoding signal by the input of the lower byte and a word control signal input. A first gating part outputs a first gating signal according to a most significant bit of the lower byte and the word control signal. A second encoder(212) outputs a second encoding signal according to the most significant bit, the word control signal, and the first gating signal. A partial multiplication generator(213) generates partial multiplications according to the first and second encoding signals and the word control signal. An operator divides to a first sum signal and a second sum signal, and a first carry word signal and a second carry word signal according to the partial multiplication. A wallace tree adder(214) divides the input partial multiplication into first and second output signals. a 16bit adder(216,218) outputs the word and byte multiplication results according to the word control signal.
Patent KR-20000031103-A (KR)
Title: Frame synchronizing system for 2b channel of isdn
Inventor: LEE KI BOK
IPC: H04L12/24
Filed: 1998-11-03
Abstract: PURPOSE: A frame synchronizing system for 2B channel of ISDN is provided to develop an instrument for testing the function of the two B phone, a terminal by which two members can have telephone calls at the same time, by making a simple construction with a clock of 4.096 MHz. CONSTITUTION: A clock generator(21) generates a clock signal having a frequency of 4.096 MHz. A divider(22) divides the clock signal of 4.096 MHz from the clock generator(21). A D-flip flop(23) receives divided clock signals of 1.024 MHz and 8 KHz and shifts the clock signal of 8 KHz by half period of the clock signal of 1.024 MHz. An AND gate(AND) logically multiplies the divided clock signal of 8 KHz from the divider(22) to the shifted clock signal of 8 KHz from the D-flip flop(23), and thereby generates 2B frame synchronizing pulse(FSB). A shift register(24) receives a divided clock signal of 2.048 MHz from the divider(22), and shifts the 2B frame synchronizing pulse(FSB) by 8 bits in order to generate 1B frame synchronizing pulse(FSA).
Patent KR-20000033043-A (KR)
Title: Method for producing chiral 3,4-dihydroxybutyric acid
Inventor: KIM SUK SOO
IPC: C07C59/10
Filed: 1998-11-19
Abstract: PURPOSE: A method for economically producing charily 3,4-dihydroxybutyric acid having an inverted charily center from charily 3-activated hydroxybutyrolactone is provided. CONSTITUTION: The method for producing charily 3,4-dihydroxybutyric acid comprises the steps: forming charily 4-hydroxy-3-activated hydroxybutyric acid of formula 3 by ring-opening reaction of charily 3-activated hydroxybutyrolactone of formula 2 in the presence of acid catalysts in water solvent; preparing charily 3,4-epoxybutyrate of formula 4 by inversion of a charily center in charily 4-hydroxy-3-activated hydroxybutyric acid in the presence of bases; producing charily 3,4-dihydroxybutyric acid of formula 1 by water substitution of charily 3,4-epoxybutyrate in the presence of acids.
Patent KR-20000033397-A (KR)
Title: Apparatus for reducing earth magnetism effect
Inventor: LEE SANG HOON
IPC: H01J29/02
Filed: 1998-11-23
Abstract: PURPOSE: An apparatus for reducing earth magnetism effect is provided to minimize the effect of the earth magnetism on the display by perform degaussing during watching televisions. CONSTITUTION: An apparatus for reducing earth magnetism effect includes a plurality of electromagnets(210a,210b,210c,210d), a DC power supply(211), an earth magnetism sensor(212), and an earth magnetism signal controller(213). The plurality of electromagnets(210a,210b,210c,210d) form a magnetic field. The DC power supply is electrically coupled to the plurality of electromagnets(210a,210b,210c,210d). The earth magnetism sensor(212) detects the change of electromagnetism according to the change of the cathode ray tube direction. The earth magnetism signal controller generates a control signal.
Patent KR-20000039719-A (KR)
Title: Fabrication method of semiconductor device
Inventor: HAN GWANG HUI
IPC: H01L21/82
Filed: 1998-12-15
Abstract: PURPOSE: A method for fabricating a semiconductor device is provided to reduce a size of a gate, and to secure process margin of contacts. CONSTITUTION: A buffer oxide layer(12) and a nitride layer(13) are successively formed on a semiconductor substrate(11). Next, after the nitride layer(13) is selectively etched to expose the buffer oxide layer(12), oxide sidewalls(14) are formed on sides of the etched nitride layer(13). Then, exposed portions of the buffer oxide layer(12) is removed, and a gate oxide layer(15) is newly formed instead of the removed buffer oxide layer. Next, a polysilicon layer(16) and a cap oxide layer(17) are stacked one by one on the gate oxide layer(15) to form first and second gates. Since the gates are limited between the adjacent sidewalls(14), it is possible to reduce a size of the gates. Subsequently, after the nitride layer(13) is removed, dopants are implanted to the substrate(11) by using the gates and the oxide sidewalls(14) as a mask. Therefore, lightly doped drain(LDD) regions(18) and source and drain regions(19) are formed in the substrate(11).
Patent KR-20000040602-A (KR)
Title: Method for designating automatic reception of facsimile and data information in cdma network
Inventor: YANG SEONG CHEOL
IPC: H04B7/26
Filed: 1998-12-18
Abstract: PURPOSE: A method for designating automatic reception of facsimile and data information in a CDMA network is provided to automatically switch the called CDMA terminal to the designated service option by including the agreed specific code in the service to be provided to the subscriber number. CONSTITUTION: If a request signal for connecting calling with an arbitrary CDMA terminal, an exchanger system determined whether a specific code agreed for designating service is included or not in the subscriber telephone number(S103). If contained, the exchanger system designates service option of the agreed specific code and transmits to the called CDMA terminal for switching the corresponding CDMA terminal to the designated service reception mode(S106). After switching, the CDMA terminal maintains calling connection for providing the corresponding service according to information on the reception(S108).
Patent KR-20000041655-A (KR)
Title: Method of preventing generation of white muddy water of electric furnace slag
Inventor: HAN GI HYEON
IPC: C21C5/36
Filed: 1998-12-23
Abstract: PURPOSE: A method for preventing the generation of white muddy water of electric furnace slag is provided to prevent white muddy water from being generated by re-oxidizing the electric furnace slag. CONSTITUTION: In preprocessing electric furnace slag to be used as backfill/reclaim material, the slag is molten again at a temperature over 1350°C. After that, air is sprayed to the molten slag to re-oxidize the slag until the FeO content in the slag is up to 0.5%. Therefore, the electric furnace slag is used as backfill/reclaim material and white muddy water is not generated.
Patent KR-20000042684-A (KR)
Title: Two-step expansion discharge muffler of hermetic compressor
Inventor: LEE KYU HAN
IPC: F04B39/00
Filed: 1998-12-26
Abstract: PURPOSE: A two-step expansion discharge muffler of a hermetic compressor is provided to reduce a whole size of the discharge muffler and form a compact compressor by joining first and second expansion tubes at a discharge part of the muffler plate and joining an output pipe at an end part of the second expansion tube by brazing, wherein the first tube is received in the second tube. CONSTITUTION: A two-step expansion discharge muffler of a hermetic compressor includes a muffler plate(161) coupled at a discharge side of a cylinder and formed with an inlet hole(161a) for inhaling refrigerant gas, an outlet hole(161b) for discharging refrigerant gas of high temperature and high pressure compressed in the cylinder and a discharge hole(161c), and an outer plate(162) joined at an outside of the muffler plate by brazing and formed with an output chamber(162a) communicating with the outlet hole and the discharge hole, wherein a first expansion tube(163) formed with a hole(163a) toward the discharge hole of the muffler plate and a second expansion tube(164) for receiving the first expansion tube are simultaneously joined by brazing and an output pipe(180) is joined to an end part of the second expansion tube by brazing.
Patent KR-20000042725-A (KR)
Title: Signal generating device of multi-function tester
Inventor: KIM BONG SEOK
IPC: G01R31/3183
Filed: 1998-12-26
Abstract: PURPOSE: A signal generating device of a multi-function tester is provided to generate various waveform and voltage signals by analogizing waveform data stored according to a set of a user. CONSTITUTION: A signal generating device of a multi-function tester comprises a fundamental frequency generating part(70) which generates a plurality of fundamental frequencies. A frequency division part(90) divides a fundamental frequency to supply a clock frequency. An address signal generating part(100) generates an address signal, and a main memory part(60) generates a plurality of waveform data. A digital-to-analog converting part(110) converts the waveform data into an analog value, and a voltage range selecting part(120) supplies a set voltage. A buffer(130) matches an impedance of the set voltage signal, and a filter(140) filters an output signal of the buffer(130) to supply the filtered signal to the tested. A main control part(30) supplies a clock frequency to the address signal generating part(00) through the frequency set part(80), the fundamental frequency generating part(70) and the frequency division part(90) according to a predetermined initial value. The main control part(30) analogizes waveform data generated through a main memory part(60), and supplies a signal to the tested through the buffer(130) and the filter(140). A communication part(40) is connected to the personal computer(10) and the main control part(30).
Patent KR-20000043671-A (KR)
Title: Coating material for protecting refractory material for converter
Inventor: HONG KI KON
IPC: F27D1/16
Filed: 1998-12-29
Abstract: PURPOSE: A coating material is provided, for protecting the refractory material for a converter, which recycles waste residual sand and is improved in tolerance. CONSTITUTION: A coating material comprises 20-40 wt% of the finely granulated residual sand which is produced during the preparation of sea water magnesia clinker; and 60-80 wt% of converter slag. Preferably the particle size of the granulated residual sand is 5-45 mm. The composition of the residual sand is CaCO3 : Ca(OH)2 : Mg(OH)2 = 60:30:10. The basicity ratio (CaO/SiO2) of the converter slag is 2-5, and its iron content is about 20 wt%.
Patent KR-19990063549-A (KR)
Title: 무선 주파수 애플리케이션에서의 부품 분리를 위해 다공성실리콘을 이용하는 집적 회로 및 방법
IPC: H01L27/06
Filed: 1998-12-29
Abstract: 본원 발명은 벌크 실리콘 기판 물질(bulk silicon substrate material, 110) 내에 생성되는 다공성 실리콘층(112) 또는 영역(130)을 이용하는 향상된 기판(100)에 관련된 것으로서, 기판(100)의 저항성을 증가시킴으로써 기판(100)을 마더보드(200) 또는 칩(230) 상에 수동 소자(passive component)를 직접 집적화시키기에 적합하고 낮은 손실과 낮은 유전체 속성으로 인해 고주파수 애플리케이션에 유용하도록 만든다.  인덕터(214), 저항기(212) 및 커패시터(216)과 같은 하나 이상의 수동 소자가 다공성 실리콘 영역(130) 위의 디바이스(140) 상에 집적화될 수 있다.  디바이스의 높은 저항성은 디바이스를 종래의 웨이퍼 설비를 이용하여 단일 플랫폼 상에서 집적화하는데 최적으로 만드는데, 이는 무선 주파수에서의 손실이 순수한 실리콘 기판에 비교할 때 상당히 작기 때문이다.
Patent KR-20000043900-A (KR)
Title: Method for forming charge storage electrode of capacitor
Inventor: KANG DAE HWAN
IPC: H01L27/108
Filed: 1998-12-29
Abstract: PURPOSE: A method for forming a charge storage electrode of a capacitor is provided which can maximize the effective surface area under the limited area and also can assure the process margin by reducing the contact defect with an adjacent capacitor. CONSTITUTION: According to a method for forming a charge storage electrode, a metal layer(16) and a metallic nitride film(17) are formed on a surface of a silicon pattern(15) after forming a charge storage electrode pattern of a capacitor with a silicon. And, a separated metal silicide layer(16A) is formed by reacting silicon atom of the silicon pattern with metal atom of the metallic layer through thermal process. And, a collapsed charge storage electrode(150) is formed by removing the metal nitride film, the metal silicide layer and not-responded metal layer selectively as to the silicon pattern.