Patent GB-900729-A (GB)
Title: Improvements in or relating to frequency and phase detection apparatus
Inventor: MEYER MAURICE ABRAHAM
IPC: H03D7/16
Filed: 1958-10-16
Abstract: 900,729. Frequency discriminators; automatic frequency control systems; valve amplifier circuits. LABORATORY FOR ELECTRONICS Inc. Oct. 16, 1958, No. 33101/58. Classes 40 (5) and 40 (6). In a frequency and/or phase detecting system (Fig. 3), one input is applied at 44 and the other is derived from oscillator 24, the signals being so combined in demodulators 31, 32 as to provide outputs in quadrature therefrom, each of which are in turn passed through phase shift networks 33, 34 having different phase/frequency characteristics and recombined in modulator 43 to give a D.C. output from filter 46 corresponding to the frequency and/or phase difference between the input signals. Phase shift networks 33, 34 produce phase shifts of # 1 (#), # 2 (#) dependent on the frequency. The frequency of the oscillator 24 is to be stabilized at cos pt, the actual frequency being cos (p+ #p)t. Frequency cos pt is fed in at terminal 44, which beats with output sin (p+ #p)t of #/2 phase shifter 25 in demodulators 31, 32 to form modulation products containing only the difference frequencies, outputs Œ sin #pt, cos #pt thus appearing at outputs of filters 27, 28, respectively. These outputs are passed through phase-shift networks 33, 34, the outputs of which are Œ sin ( #pt+# 1 ), cos ( #pt+# 2 ), respectively, and which subsequently modulate a signal cos rt from source 35 in modulators 36, 37, the outputs from which are amplified and multiplied in modulator 43. The output of 43 contains a D.C. term Œ sin (# 1  - # 2 ) dependent on frequency, which is used to control the frequency of oscillator 24. If the output of oscillator 24 were cos (pt+ #pt + #) the output of multiplier 43 will also contain an A.C. term Œ sin (2 #pt+# 1 +# 2 +2#) which will reduce to a D.C. term indicating phase shift and used for locking the phase of oscillator 24 with that of the input signal at 44, the D.C. term being sin (2#(0)+#] when #p is zero and # 1 (0)= # 2 (0). If cos (p+ #p)t is used as an input signal at 44, the oscillator 24 will require a new D.C. control signal and the magnitude and sense of #p may be determined by the magnitude and sense of the shift in control signal. The apparatus may be used as a frequency detector by applying the signal to be detected at 44, when oscillator 24 will be pulled into synchronism with said signal; this necessary control signal being an indication of frequency. A voltage which is a function of the frequency difference between the input frequency and that of a fixed frequency oscillator (replacing oscillator 24 when system is used as a frequency detector) may be obtained at terminal 48. A double balanced modulator for the modulators 31, 32, 36, 37 and multiplier 43 is described (Fig. 6, not shown), circuit parameters and terminal connection being varied slightly dependent on the particular application. An embodiment of a phase shift network for phase shifters 33, 34 is also described (Fig. 8) and it is proved mathematically in the Specification that the ratio of the amplitudes of the output and input voltage is independent of frequency and the phase shift is a function of frequency (Figs. 7A, 7B, 7C, not shown). The network comprises a differential amplifier containing valves V7-V11, the shape of the phase shift characteristic being controlled by RC. V10, V9 are plate load resistors for V7, V8 to maintain stable D.C. amplification the output is taken at J through a cathode follower Vn and capacitor 72 provides A.C. negative feed-back for stabilizing the gain. An embodiment of oscillator integrator 24 is also described (Fig. 9, not shown).