baber/WOPTO huggingface dataset:
Patent TW-516159-B (TW)
Title: Method for forming insulating layer of integrated circuit
Inventor: TSAI JENG-YUAN
IPC: H01L21/76
Filed: 1999-11-26
Granted: 2003-01-01
Abstract: The present invention discloses a method for forming insulating layer of integrated circuit, which can solve the surface sensitivity issue encountered in the ozone/tetra-ethyl-ortho-silicate chemical vapor deposition method under atmospheric pressure. The method includes the following steps: first, providing a substrate; forming a first dielectric layer on the substrate; applying oxygen plasma treatment on the surface of the first dielectric layer; and, finally, forming a second dielectric layer on the first dielectric layer, in which the second dielectric layer is formed by the chemical vapor deposition method.
Patent TW-486445-B (TW)
Title: A suck device
Inventor: KAWAMURA TOSHITERU
IPC: B65H3/08
Filed: 2000-01-11
Granted: 2002-05-11
Abstract: A suck device, comprising suck means 7 for sucking articles 3 to be sucked, a holder 39 for supporting said suck means 7, a permanent magnet 44 positioned opposite to said suck means 7 for selectively attaching and/or detaching with respect to a magnetic plate 38, characterized in that a stabilizer means of said holder 39, for the stabilizing of said holder 39 of said magnetic plate 38, is provided on or near the outer circumference of said permanent magnet 44.
Patent TW-430574-B (TW)
Title: Cutting device, processing equipment, and cutting method
Inventor: MATSUDA YUTAKA
IPC: B28D1/18
Filed: 2000-01-18
Granted: 2001-04-21
Abstract: An impacting body 1 is mounted rotatably to a spindle 103 provided on a principal plane of a rotor 101. The impacting body 1 is mounted so that a predetermined fitting gap 104 is provided between the impacting body 1 and the spindle 103 and a part of periphery of the impacting body 1 can be positioned beyond a periphery of the rotor 101. The rotor 101 is rotated at a high speed to allow the impacting body 1 to impact on an object to be processed at least at its critical impact velocity. This enables only the top layer of the object to be processed at the part on which the impacting body 1 has impacted to be broken instantaneously. When the rotor 101 is moved while being rotated, the object to be processed can be cut. According to this cutting device, an object formed of a single member such as glass, ceramics, resin, metal, or the like, or a composite member thereof can be cut continuously with one kind of cutting tool.
Patent TW-512211-B (TW)
Title: Driving device
Inventor: MINEGISHI KIYOJI
IPC: F16H1/32
Filed: 2000-03-15
Granted: 2002-12-01
Abstract: This invention intends to considerably reduce the levels of vibration and noises. A geared motor 101 is constituted by connecting a motor unit 103 to a reduction gear unit 102 of this winging inner gearing planetary gear structure constituted by providing the first shaft 111 and the second shaft 112 on the center axis L of the units, fitting external gears 115a, 115b swingably to the outer periphery of the first shaft 111, providing an internal gear 120, with which the external gears 115a, 115b are internally meshed, concentrically with the first shaft 111, and connecting the second shaft 112 to the external gears 115a, 115b through a means 117 for taking off only the rotating components of the external gears 115a, 115b. In this case, a simple planetary roller mechanism 202 for transmitting rotational power by the friction of rollers is interposed between the reduction gear unit 102 and motor unit 103.
Patent TW-513383-B (TW)
Title: A method to lower the graphitization temperature of mesophase powders
Inventor: CHOU CHAW-LING
IPC: C01B31/04
Filed: 2000-03-24
Granted: 2002-12-11
Abstract: The present invention discloses a thermal treatment method of adding alumina fine powder into coal tar to form mosophase spheres, and using processes of chemical extraction, washing, filtration, drying, carbonizatioin, and graphitization to produce highly graphitized powder which can be used as a negative electrode material of a lithium ion secondary battery. The present invention is characterized in that alumina powder is added into the coal tar followed by a thermal treatment to form mesophase powders with finer particle sizes. The thermal treatment requires only 2500 DEG C for graphitization to obtain powders with degree of graphitization larger than 90%. Medophase powders obtained from a process without the addition of alumina powder require higher than 2800 DEG C for graphitization. The present invention reduces the graphitization temperature for at least 300 DEG C. The powders are graphitized at a lower temperature. This has the advantages of conserving energy and reducing production cost, etc. The production and the operation of a high temperature furnace for 2500 DEG C is easier than those of a high temperature furnace for 2800 DEG C and above.
Patent TW-476025-B (TW)
Title: A method and system for hot-plugging a processor into a data processing system
Inventor: BEALKOWSKI RICHARD
IPC: G06F3/00
Filed: 2000-03-28
Granted: 2002-02-11
Abstract: A method and system for hot-plugging a processor subsystem to a system bus of a data processing system while said data processing system is active, where the system bus comprises multiple positions for supporting hot-pluggable processor subsystems, where each processor subsystem includes a processor and associated voltage regulator module Power is applied to a processor subsystem in response to an indication that the processor subsystem has been added to the system bus of the data processing system. Initialization routines are performed on the processor within the processor subsystem through a controller which transmits initialization data to the processor independent of the system bus, such that additional processor subsystems are integrated into the data processing system with minimal effect on any existing processors operating on the system bus.
Patent TW-466391-B (TW)
Title: Dynamic series voltage compensator and method thereof
Inventor: CORNICK KEITH JOSEPH
IPC: H02J3/18
Filed: 2000-04-25
Granted: 2001-12-01
Abstract: A dynamic series voltage compensator (10) for compensating voltage dips in an ac electric power system is described. The compensator (10) has a controller (11) coupled to control a respective series injection inverter (12a, 12b, 12c). The controller (11) monitors a supply voltage with/on a respective phase. Inputs from monitoring the supply voltage are processed by the controller (11) to generate control signals. These control signals are based on comparing voltage magnitude of a present voltage cycle period with voltage magnitude of a preceding voltage cycle period of the supply voltage. When difference between the present and the preceding voltage cycle periods exceeds a predetermined value for a corresponding time period, an inverter control signal is provided to the respective series injection inverter (12a, 12b, 12c) to thereby provide a compensation voltage. The compensation voltage is injected directly to the respective conductor. The voltage magnitude of the compensation voltage is to compensate the supply voltage to a normal level based on the preceding voltage cycle period.
Patent TW-511386-B (TW)
Title: Transmitter directed code division multiple access system using path diversity to equitably maximize throughput
Inventor: CHAPONNIERE ETIENNE F
IPC: H04B7/005
Filed: 2001-02-19
Granted: 2002-11-21
Abstract: A transmitter directed, distributed receiver using path diversity provided by the distribution of the receiver. Advantage is taken of the uncorrelated variations over time in the condition of channels between a common transmitter and several users. The greater the variation in the channel condition of a particular channel over time, the greater the increase in total system throughput provided. An access metric represents the instantaneous channel condition of the communication system between each user and the transmitter with respect to the average channel condition of each channel. Alternatively, the access metric represent the instantaneous channel condition with respect to the average data throughput over that channel. The common transmitting station uses the access metric to directly compare the desirability of granting each channel access with the desirability of granting each other channel access. The user that has the greatest access metric is provided access to the channel.
Patent TW-582038-B (TW)
Title: Semiconductor memory device
Inventor: FUKUHARA HAYURU
IPC: G11C8/00
Filed: 2000-07-19
Granted: 2004-04-01
Abstract: The purpose of the present invention is to provide a semiconductor memory which can operate with active width of an appropriate column address selecting signal. This device is constituted so that at the time of a test mode, test mode signals of several kinds are generated in a variable delay circuit 10, a set signal (e) is delayed by delay quantity of several kinds, thereby, and a YSW signal (I) being a column address selecting signal having width of several kinds is generated in a column address decoder circuit 5. And in a memory cell array 6, at the time of a test mode, delivery and receipt operation of data is performed by the YSW signals (I) of several kinds in accordance with a test mode, appropriate YSW signal (I) can be appreciated. Operation is performed by optimum YSW signal (I) at the time of normal operation by switching fuses in a fuse circuit 16 based on an operation result at the time of test mode.
Patent TW-469296-B (TW)
Title: Method for producing elastic steel wire and product thereof
Inventor: CHEN JIUN-CHIUAN
IPC: C21D9/52
Filed: 2000-07-24
Granted: 2001-12-21
Abstract: The present invention relates to a method for producing an elastic steel wire and a product thereof. The method comprises: producing a tempered austenitic stainless steel wire; forming a Ni-plated layer on the surface thereof; using a heater to heat the wire to 80 to 90 degree C; coating the surface of the wire with a fluor-water lubricant formed by mixing 70% to 85% of water, 5% of polysulfobenzene binder, and 15% to 25% of polytetrafluoroethylene powder, so that the moisture contained in the fluoro-water lubricant is vaporized by the high temperature of the wire, and the lubricant tightly bound to the periphery of the wire during the cooling process, thereby forming a cold-shrunk layered film. The high adhesion and the high wear resistance of the cold-shrunk layered film enable the wire to withstand 8 to 12 continuous elongations, thereby producing an elastic wire with a section-reduction rate of 75% to 95% and a tensile strength of less than 245 kgf/mm<SP>2</SP>.
Patent TW-515774-B (TW)
Title: Single-piece carrier for carrying a plurality of containers and package of a plurality of containers
Inventor: MARCO LESLIE S
IPC: B65D71/00
Filed: 2000-08-03
Granted: 2003-01-01
Abstract: This invention relates to a single-piece carrier for unitizing a plurality of containers with a retainer sheet integrated with a carrier sleeve. The retainer sheet comprises a plurality of container receiving openings for engaging a top portion of a group of containers of the plurality of containers and two partial container receiving openings for partially engaging a top portion of two additional containers of the plurality of containers. The carrier sleeve surrounds the plurality of containers and a handle is positioned over a center row of containers. A package including containers comprises two layers of containers within the film sleeve.
Patent TW-462135-B (TW)
Title: Method for manufacturing the electronic device of thin film transistor display
Inventor: WONG JIA-FAM
IPC: H01L21/336
Filed: 2000-08-04
Granted: 2001-11-01
Abstract: The present invention relates to a method for manufacturing the electronic device of a thin film transistor display. The thin film transistor display is made on a substrate having a first part and a second part. The first part comprises a transistor region, the second part comprises a connection pad region. The method comprises: depositing a first metal layer on a substrate; defining a pattern of the first metal layer to form a gate electrode on the transistor region; forming a pad electrode on the connection pad region; sequentially depositing an insulation layer, a semiconductor layer and a doped silicon conductive layer; defining an opening region on the connection pad region, while removing (a) the region outside the transistor region in the first part, and (b) the region outside the connection pad region in the second part and the insulation layer, the semiconductor layer and the doped silicon conductive layer, thereby exposing the substrate outside the transistor region of the first part and outside the connection pad region of the second part; forming an opening on the connection pad region for thereby exposing the pad electrode in the opening region; forming a second metal layer to cover the transistor region and the connection pad region; defining a pattern of the second metal layer; defining a channel region in the transistor region, while removing a first side part outside the transistor region in the first part and the second metal layer in the channel region, and (b) the second metal layer outside the connection pad region in the second part; using the second metal layer as a mask to define a pattern of the doped silicon conductive layer, thereby forming a source conductive layer and a drain conductive layer divided by the channel region, and exposing the substrate in the first side part outside the transistor region in the first part and the region outside the connection pad region in the second part.
Patent TW-I224148-B (TW)
Title: A stainless steel sheet having Cu-enriched grains dispersed in its matrix and/or a Cu-condensed layer
Inventor: HIRAMATSU NAOTO
IPC: C21D8/02
Filed: 2000-09-15
Granted: 2004-11-21
Abstract: A new stainless steel sheet has a stainless steel substrate 1 which contains Cu at a ratio of 1.0 mass % or more and has Cu-enriched grains 2 precipitated at a ratio of 0.2 vol.%. The Cu-enriched grains 2 are exposed outside through pinholes 4 of a passive film 3 generated on the substrate 1. Cu is preferably condensed at a Cu/(Cr+Si) mass ratio of 0.1 or more or a Cu/(Si+Mn) mass ratio of 0.5 or more with respect to Cr, Si and Mn present in the passive film 3 or at an outermost, layer of the substrate 1. Precipitation of Cu-enriched grains 2 and condensation of Cu effectively improve solderability and electric conductivity of the stainless steel sheet 1.
Patent TW-580819-B (TW)
Title: Method for serious production of chip cards, in particular SIM cards
Inventor: GOSSEL SVEN
IPC: G06K19/077
Filed: 2000-10-17
Granted: 2004-03-21
Abstract: The invention refers to a method for series production of chip cards, in particular of SIM cards, that comprises the following steps: a software program is created; the software program is applied onto a chip; the chip is embedded into a module; card-related and user-related personalization data are applied onto the chip; the chip module is embedded into a card made, in particular, of plastic; the method being characterized in that the card-related personalization data that are applied onto the chips in one production step along with chip module production; and the user-related personalization data are applied onto the chip, separately from the card-related personalization data, in a later production step.
Patent TW-459105-B (TW)
Title: Damping device
Inventor: MICHIOKA EIICHI
IPC: E04H9/02
Filed: 2000-11-08
Granted: 2001-10-11
Abstract: A damping device receiving viscous fluid in an annular gap between a housing and a rotary member within the housing and converting a dynamic energy of the rotary member into a thermal energy is provided. The damping device is constructed to make it possible to move a sealing unit for sealing the annular gap in response to a pressure of the viscous fluid, to change the volume of the annular gap to suppress an adverse affect concomitant with the pressure increase of the viscous fluid to the sealing unit and to enhance reliability and durability of the damping device.
Patent TW-463386-B (TW)
Title: Process for improving the reliability of a polysilicon thin film transistor device
Inventor: WANG WEN-TUNG
IPC: H01L29/786
Filed: 2000-12-12
Granted: 2001-11-11
Abstract: The invention comprises the steps of oxidizing a surface of a polysilicon layer to form a silicon oxide layer on the surface in a process of manufacturing a thin film transistor. The silicon oxide layer is removed by an etchant to planarize the protuberances formed during the re-crystallization of the polysilicon layer. Therefore, the roughness of the polysilicon layer can be efficiently decreased and the reliability of the thin film transistor device can be increased.
Patent TW-I287177-B (TW)
Title: Projection aligner for microlithography
Inventor: FURTER GERD
IPC: G03F7/22
Filed: 2000-12-15
Granted: 2007-09-21
Abstract: A projection exposure system for microlithography includes an illuminating system (2), a reflective reticle (5) and reduction objectives (71, 72). In the reduction objective (71, 72), a first beam splitter cube (3) is provided which superposes the illuminating beam path (100) and the imaging beam path (200). In order to obtain an almost telecentric entry at the reticle, optical elements (71) are provided between beam splitter cube (3) and the reflective reticle (5). Advantageously, the reduction objective is a catadioptric objective having a beam splitter cube (3) whose fourth unused side can be used for coupling in light. The illuminating beam path (100) can also be coupled in with a non-parallel beam splitter plate. The illuminating beam path is refractively corrected in pass through to compensate for aberrations via the special configuration of the rear side of the beam splitter plate. Advantageously, a beam splitter plate of this kind is used within a reduction objective in lieu of a deflecting mirror and only refractive components are introduced between the beam splitter plate and the reflective reticle.
Patent TW-495416-B (TW)
Title: Polishing apparatus
Inventor: KAMIMURA KENJI
IPC: B24B53/017
Filed: 2001-01-20
Granted: 2002-07-21
Abstract: The invention relates to a polishing apparatus for polishing a workpiece, such as a semiconductor wafer, so that it may have a flat mirror finish. The polishing apparatus comprises a polisher table with a polishing face, and a top ring. A workpiece is placed between the polisher table and the top ring and polished by application of a predetermined pressure. The polisher includes at least two dressing units equipped with dressers that are in contact with the surface of polishing cloth to dress the polishing face.
Patent TW-I305771-B (TW)
Title: New phenolic compounds derived from dialkoxyethanals, their preparation process and their application
Inventor: WILHELM DIDIER
IPC: C07D319/06
Filed: 2001-02-07
Granted: 2009-02-01
Abstract: New phenolic compounds of formula (I) <CHEM>     R=   C3-C17 dialkoxymethyl group, 1,3-dioxolan-2-yl group optionally substituted on peaks 4 and/or 5 by one or more C1-C8 alkyls or 1,3-dioxan-2-yl group optionally substituted on peaks 4 and/or 5 and/or 6 by one or more C1-C8 alkyls. n =   1, 2 or 3, the group or groups <CHEM>  are in o and/or p position of the OH of the cycle m =   from 0 to 4-n, X = functional group such as OH or Hal or C1-C8 alkyl or alkoxy group or C5-C12 aryl group and optionally 1 or 2 heteroatoms such as N or O, or carboxy or -CO-Y group where Y = C1-C8 alkyl or alkoxy or amido or amino or thiol group, on condition that at least one of the ortho or para positions of the phenolic cycle is substituted by a hydrogen, and their salts with the alkali metals, alkaline-earth metals and amines.
Patent TW-488057-B (TW)
Title: Manufacture method of semiconductor device
Inventor: SHIU SHR-JIE
IPC: H01L21/8234
Filed: 2001-04-30
Granted: 2002-05-21
Abstract: This invention provides a manufacture method of semiconductor device preventing damage to the polysilicon wiring during photoresist stripping process. This method is to form polysilicon wiring on the core device area and electrostatic discharge (ESD) protection device area of a substrate. A compensation spacer is formed on the sidewall of the polysilicon wiring and then a photoresist layer is formed to cover the core device area and to expose the ESD protection device area. The photoresist layer is used as a mask to perform a punchthrough ion implantation process onto the ESD protection device area, which is followed by removing the photoresist layer. A plural number of lightly doped source/drain areas are formed in the core device area. A spacer is then formed around the compensation spacer and source/drain areas are formed in the core device area and the ESD protection device area. Because there is the compensation spacer formed on the sidewall of the polysilicon wiring before the photoresist stripping, the polysilicon wiring will not break during the photoresist stripping process due to the protection of the compensation spacer.
Patent TW-I236157-B (TW)
Title: A method of manufacturing a light emitting device
Inventor: YAMAGATA HIROKAZU
IPC: H01L51/56
Filed: 2001-05-03
Granted: 2005-07-11
Abstract: A method of obtaining an excellent luminescence of an EL element having a luminous layer containing a dopant is provided, thereby providing a method of manufacturing a light emitting device containing the EL element with an excellent luminescence, in which a first luminous layer made of a luminous material and a dopant is formed by evaporation, and a second luminous layer made of the luminous material is formed by continuing the evaporation of the luminous material while stopping the evaporation of the dopant. As a result, continuity of the luminous layers is enhanced, whereby an excellent luminescence can be obtained.
Patent TW-I227080-B (TW)
Title: Network switch providing congestion control and method thereof
Inventor: CHEN JEN-KAI
IPC: H04L12/54
Filed: 2001-05-31
Granted: 2005-01-21
Abstract: The invention relates to a network switch providing congestion control and method thereof. The connection port of the switch comprises a queue with low priority and a queue with high priority. When a packet enters the switch, the switch forwards the packet to the queue with low or high priority based on the attribute of the packet. When congestion occurs in the switch, the queue with low priority and the queue with high priority execute different congestion control methods respectively based on the input congestion model. Moreover, when the switch receives the pause frame, it can execute the responding flow control method based on the output congestion model. As the switch can proceed different congestion control methods based on the packet attribute, it can optimize the congestion control.
Patent TW-503412-B (TW)
Title: Push button switch
Inventor: INOUE TAKEFUMI
IPC: H01H3/12
Filed: 2001-06-15
Granted: 2002-09-21
Abstract: A push button switch is utilized in an input unit of a thin electronic apparatus is provided. A link member assembled in X-shape for supporting a key top capable of moving vertically. A base slidably supports a lower latched shaft of a first frame of the link member. The base pivotably supports a lower latched shaft of a second frame of the link member. A driving spring impels the lower latched shaft of the first frame in the central direction of the link member, and elastically deforms downwardly by a horizontal movement of the lower latched shaft to operate a switch member. An operating spring is pressed by the lower latched shaft to deform horizontally and elastically.