baber/WOPTO huggingface dataset:
Patent TW-366297-B (TW)
Title: Water filtering
Inventor: ROBERTSON EDWARD J
IPC: B01D29/11
Filed: 1996-10-30
Granted: 1999-08-11
Abstract: A reservoir of a water filtration system carries a projection such as a fin on its outer surface. The reservoir is removable received in a housing, such as a pitcher, such that the projection engages a shelf in the housing. A passage in the reservoir can have a nonuniform taper that corresponds to the outer surface of a water filtration cartridge. A grippable member such as an indicator dial can be movably attached to the outer surface of the housing. For each orientation, sue indicia on the grippable member align with use indicia on the outer surface of the housing in a unique visual configuration. A water filter cartridge for the filtration system can have an inner surface that extends between a water inlet and a water outlet. One portion of the inner surface starts at the water inlet and joins at its other end to a second portion of the inner surface. The second portion of the inner surface is about as long as the first portion, and is tapered. The small-diameter end of the tapered portion extends to the water outlet of the filter cartridge. The cartridge can also have two ridges on the inner surface of the housing between the water inlet and outlet, both projecting inward towards the center axis of the housing. The innermost end of the ridge closest to the water inlet is farther from the center axis than the innermost end of the other ridge.
Patent TW-348279-B (TW)
Title: Substrate grinding method
Inventor: NISHIO MIKIO
IPC: B24B57/02
Filed: 1996-03-07
Granted: 1998-12-21
Abstract: A method of polishing a substrate by pressing a substrate against a polishing pad, the method comprising the steps of: flowing a fluid under pressure to a space defined by: a substrate holding head which can move toward and away from a polishing pad and which has a fluid supply path that allows a fluid under pressure to flow therethrough; an annular sealing member fastened to a portion of the substrate holding head which surrounds an outlet for the fluid under pressure of the fluid supply path; and a substrate to be polished which is disposed on the polishing pad through the fluid supply path of the substrate holding head; applying a predetermined pressing force to the substrate holding head to press the substrate holding head against the polishing pad; and pressing the substrate to be polished against the polishing pad under the pressure of the fluid flowing through the fluid supply path to the space, whereby the fluid under pressure flowing through the fluid supply path to the space is sealed in the space when the pressure of the fluid does not exceed the pressing force applied to the substrate holding head, and whereby the fluid under pressure flowing through the fluid supply path to the space leaks out of the space through a clearance produced between the annular sealing member and the substrate to be polished when the pressure of the fluid exceeds the pressing force applied to the substrate holding head.
Patent TW-341719-B (TW)
Title: Surface position detecting method and scanning exposure method using the same
Inventor: IWANAGA TAKEHIKO
IPC: H01L21/30
Filed: 1997-02-25
Granted: 1998-10-01
Abstract: A surface position detecting method for detecting a surface position of a surface to be examined, having surface height irregularity, while relatively scanning the surface; the method including detecting characteristic data related to a surface state at plural measurement positions on the surface, while relatively scanning the surface, and processing the detected characteristic data related to the measurement positions to determine a measurement position for measurement of the surface position in a subsequent surface position detecting process.
Patent TW-552191-B (TW)
Title: Apparatus and method for producing center gated lens molds for contact lens manufacture
Inventor: MATIACIO THOMAS A
IPC: G02C7/04
Filed: 1997-03-11
Granted: 2003-09-11
Abstract: A method and apparatus for the manufacture of lens molds used in the formation of optical contact lenses, the apparatus comprising a center gate aligned on the central axis of the lens mold cavity for delivery of the melt polymer in an axisymmetrical manner. The methodology produces lens molds of extremely precise dimensions as measured against lens molds produced with side gated technology.
Patent TW-342438-B (TW)
Title: Heavy oil emulsion fuel combustion apparatus
Inventor: OGATA HHIROSHI
IPC: F23K5/22
Filed: 1997-05-26
Granted: 1998-10-11
Abstract: A heavy oil emulsion fuel combustion apparatus that is an emulsion fuel combustion apparatus combusting a heavy oil emulsion fuel, which is characterized in that: a heavy oil emulsion fuel, after heating and dewatering, is fed to a combustion furnace; at least a portion of the removed water is fed to a moisture utilization system of the combustion furnace, and is subject to the heating of the heavy oil emulsion fuel (102) carried out by the axial steam (167) of the steam turbine (160) or the steam of steam converter (168).
Patent TW-388964-B (TW)
Title: Contact structure of metal silicide and silicon and method for making the same
Inventor: TZENG HUNG-HUEI
IPC: H01L21/768
Filed: 1997-05-23
Granted: 2000-05-01
Abstract: The present invention provides a contact structure of metal silicide and silicon and a method for making the same. The contact structure is applicable between the gate of a switch transistor and the bitline of a DRAM. The method comprises forming a gate oxide layer of a MOSFET on a silicon semiconductor substrate; forming a first polysilicon and a first metal silicide and etching the first polysilicon and the first metal silicide with a photolithography and an etching technique to form a gate of the MOSFET; depositing a dielectric layer and using a photolithography technique and an etching technique to etch the dielectric layer to form a bitline contact where the bitline will electrically contact the metal polysilicide gate of the switch transistor through the bitline contact; forming a second polysilicon; performing an annealing process to the first metal silicide and the second polysilicon by using a rapid annealing device to activate the interface of the first metal silicide and the second polysilicon; using a photolithography technique and an etching technique to etch the second polysilicon and the second metal silicide to form bitlines of the DRAM, the bitlines in contact with the upper surface of the metal polysilicide gate through the bitline contact.
Patent TW-344189-B (TW)
Title: Dual lamp fixture with integral control
Inventor: SEAN P TILLINGHAST
IPC: H05B41/14
Filed: 1997-05-29
Granted: 1998-11-01
Abstract: A dual lamp fixture comprising: a housing; a reflector within the housing, the reflector having a concave surface and a focal point; a lens offset from the concave surface and mounted to cover an opening of the housing; a first lamp of high intensity positioned between the concave surface and the lens; a second lamp of lower intensity positioned between the concave surface and the lens; a high intensity lamp drive circuit mounted within the housing in communication with the first lamp, in which the high intensity lamp drive circuit comprises energizable pulse voltage and trigger voltage networks; a switching means in communication with the second lamp; and an internal control circuit mounted within the housing and being in communication with an external control circuit, the high intensity lamp drive circuit and the switching means for respectively actuating the high intensity and lower intensity lamps in a predetermined manner in response to command signals.
Patent TW-359030-B (TW)
Title: Ultra fast shift register using resonant tunnel diodes
Inventor: TANG HAO
IPC: G11C19/12
Filed: 1997-10-06
Granted: 1999-05-21
Abstract: An ultra fast shift register using resonant tunnel diodes, including: a static locking consisted of a pair of negative resistors, coupled to between the first and the second power; setting of the binary state device of the static locking by pressing input signal levels; and coupling with the static locking, for gain to the next static locking and for isolation.
Patent TW-473701-B (TW)
Title: Direct reflection image display system
Inventor: WANG WEI-HUNG
IPC: G09G5/00
Filed: 1996-10-12
Granted: 2002-01-21
Abstract: The present invention provides a direct reflection image display system, which can be operated with one direct reflection, two direct reflections or multiple direct reflections. The image display system with one direction reflection can display the positive image of the mirror image of the display image through the transparent single face reflection coating glass, the image display system with two direction reflections can display the display image through the transparent single face reflection coating glass, so that both display image and the scenery behind the glass can be seen.
Patent TW-363130-B (TW)
Title: Method and apparatus for generating split timing test signals for integrated circuit testing
Inventor: BELSLEY DONALD ALAN
IPC: G01R31/28
Filed: 1998-01-20
Granted: 1999-07-01
Abstract: A system for generating test signals for application to a device under test, includes: (a) a timing unit which outputs a clock signal; (b) a primary sequence controller which generates primary timing test period signals; (c) a secondary sequence controller which generates secondary timing test period signals; (d) a sequence buffer which takes as inputs primary and secondary timing test period signals and outputs primary and secondary timing test signal data; (e) first and second sets of pin slice circuits which apply test signals to the device under test; and (f) a sequence select buffer which takes as inputs the primary and secondary timing test signal data and applies primary timing period test signal data to the first set of pin slice circuits and secondary timing period test signal data to the second set of pin slice circuits.
Patent TW-403905-B (TW)
Title: A semiconductor memory device and a reading method thereof
Inventor: LEE JIN-YOUNG
IPC: G11C11/409
Filed: 1998-03-10
Granted: 2000-09-01
Abstract: In a semiconductor memory device, there is provided a column detecting circuit for generating a detection signal DETIO when respective voltage levels on a pair of I/O lines IO and IOB with respect to an addressed memory cell have been developed into predetermined voltage levels which can be sensed as a valid data. Then, a block selecting circuit and a sensing control signal generating circuit are respectively disabled by the detection signals DETIO and DETIOB, thereby causing a bit line precharge operation to be performed during a reading operation. Thus, the sensing consumed by sense amplifiers during the reading operation period can be reduced. In addition, since the bit line precharge operation is performed within the reading operation period, a bit line precharge time can be shorten.
Patent TW-448167-B (TW)
Title: Process for producing 3-methyltetrahydrofuran
Inventor: TAKEMOTO MASAKI
IPC: B01J23/72
Filed: 1998-03-31
Granted: 2001-08-01
Abstract: There is disclosed a process for producing 3-methyl-tetrahydrofuran which comprises the step 1 of subjecting the compound represented by the general formula [I]: ROOC-CH(CH3)-CH2-CHO, wherein R is an alkyl group having 1 to 3 carbon atoms and the formyl group may be present as an acetal having an alkanol with 1 to 8 carbon atoms, to hydrogenation and alcohol-eliminating cyclization to synthesize 2-methyl-γ-butyrolactone; the step 2 of separating the 2-methyl-γ-butyrolactone formed in the step 1 from alcohols by means of distillation, etc.; and the step 3 of hydrogenating the 2-methyl-γ-butyrolactone which is formed in the step 2. The above process enables the production of the objective highly-pure 3-methyltetrahydrofuran substantially free from an alcohol in high efficiency and high conversion through simplified production steps.
Patent TW-387973-B (TW)
Title: Heat exchanger and fuel preheater
Inventor: DIDUCK VICTOR J
IPC: F28F27/00
Filed: 1998-04-29
Granted: 2000-04-21
Abstract: An apparatus for heating a fuel comprising a block with a passageway, having an output and an input, for conducting fuel to be heated is disclosed. The block is composed of a heat conductive material. A heating element, embedded in the block, heats the block which conducts the heat to the fuel flowing through the passageway heating it to a predetermined temperature.
Patent TW-421926-B (TW)
Title: Data compression method and apparatus
Inventor: HADADY CRAIG ERIC
IPC: H03M7/30
Filed: 1998-07-24
Granted: 2001-02-11
Abstract: A method for compressing a data stream, where a first portion of the data stream is read into a window, which has a history buffer and look-ahead buffer. An index is selected, taken from a fourth portion of the data stream in the look-ahead buffer, and based on this index, an entry in a pointer array is selected. An initial entry in a record array is selected based on the pointer array entry. The record array initial entry has a history buffer address and record array address. A third portion of the data stream is selected, starting at an address in the history buffer referenced by the history buffer address of the initial entry. The third portion of the data stream is compared to a second portion of the data stream in the look-ahead buffer. If the third portion of the data stream does not match the second portion of the data stream, then a subsequent entry in the record array is selected, based on the record array address of the initial entry, and the subsequent entry is then designated as the initial entry. The steps from selecting the third portion through selecting a subsequent entry are repeated until either the third portion of the data stream matches the second portion of the data stream, or no more entries are left in the record array. In the case when there are no more entries left in the record array, the second portion of the data stream is written to the output file, and the first portion of the data stream read into the window is incremented by a predetermined amount. In the case when the third portion of the data stream matches the second portion of the data stream, the history buffer address of the third portion of the data stream and a length value, representing how many bytes of the third portion of the data stream and the second portion of the data steam matched, are output to the output file, and the first portion of the data stream read into the window is incremented by the number of bytes matched. The steps of the method from the step of selecting an index are repeated until all of the data stream has been read into the window.
Patent TW-399218-B (TW)
Title: Sense amplifier for complementary or non-complementary data signals
Inventor: MANNING TROY A
IPC: G11C7/06
Filed: 1998-07-24
Granted: 2000-07-21
Abstract: A sense amplifier that amplifies data signals in either a normal mode or an altered mode. In the normal mode, the data signals must be complementary of each other while in the altered mode, the data signals may, but need not be, complementary of each other. The sense amplifier includes two sense amplifier stages, the first of which drives the second, and each sense amplifier stage includes two identical sense amplifier circuits. A first input of each sense amplifier in the first stage receives a respective data signal, and a first input of each sense amplifier in the second stage receives an output signal from a respective sense amplifier in the first stage. In the normal mode, a mode control circuit couples each of the other data signals to a respective second input of each sense amplifier in the first stage so that the sense amplifiers receive both of the complimentary data signals at their differential inputs. In the altered mode, the mode control circuit couples a reference voltage to the second inputs of the sense amplifiers in the first stage so that the sense amplifiers compare a respective data signal to the reference voltage. The mode control circuit also alters the operation of the second stage. In the normal mode, the mode control circuit couples an output signal from the other sense amplifier in the first stage to a respective second input of each sense amplifier in the second stage so that the sense amplifiers receive at their differential inputs both of the complimentary output signals from each sense amplifier in the first stage. In the altered mode, the mode control circuit couples a data signal to the respective second input of each sense amplifier in the second stage so that the sense amplifiers compare  an output signal from a respective sense amplifier in the first stage to a respective data signal.
Patent TW-398054-B (TW)
Title: Manufacturing of open windows
Inventor: LIN TING-JI
IPC: H01L21/311
Filed: 1998-09-02
Granted: 2000-07-11
Abstract: Deposit an acid-enduring dielectric layer between the undoped and phosphorous-doped silicon glass (PSG) layers on patterned substrate. Then heat flow and PSG completely etching back steps are following. The acid-enduring dielectric layer is used to replace the traditionally used BPSG that is less durable to acid, so a good shape contacts will be formed in the followed contact etching step. This action is good for increasing device density.
Patent TW-426903-B (TW)
Title: Structure of high voltage device and method for making the same
Inventor: DUNG MING-TZUNG
IPC: H01L21/28
Filed: 1998-09-10
Granted: 2001-03-21
Abstract: A structure of a high voltage device and a method for making the same are disclosed. The method comprises forming a drain in a N-well of a P-type substrate, the N-well comprising a P-type well and an isolation region, in which the P-type doped region is located between the drain and the source, and the isolation region is between the P-type doped region and the drain. Furthermore, a source is formed in another P-type well of the substrate, in which a gate conductor layer is disposed on the P-type well between the source and the drain, the substrate, the N-well, and the isolation region.
Patent TW-448123-B (TW)
Title: A card of ticket transport apparatus
Inventor: GUTSELL GRAHAM
IPC: G06K17/00
Filed: 1998-09-11
Granted: 2001-08-01
Abstract: A card or ticket transport apparatus comprises a plurality of pinch drive means (1, 2, 3), consisting of a rotatable drive member (4, 5, 6) facing and resiliently biased towards a rotatable follower member (7, 8, 9), which co-operates with the corresponding rotatable drive member, to feed a card or ticket along a transport path (11) therebetween. The rotatable members on a given side of the transport path (for example the rotatable follower members (7, 8, 9) are carried by a carriage (12) which is pivotably moveable, in response to the presence of a card or ticket, to vary the spacing between the rotatable members comprising adjacent pinch drive means. This arrangement causes adjacent pinches to be free to open in a highly compliant state when a card or ticket is located between them, due to the lever action of the carriage, thereby reducing jitter during card transport in magnetic, optical, or electronic reader/encoder systems.
Patent TW-438987-B (TW)
Title: Liquid crystal display and method of fabricating the same
Inventor: SATO NORIFUMI
IPC: G02F1/136
Filed: 1998-12-24
Granted: 2001-06-07
Abstract: There is provided a liquid crystal display including a first substrate, a second substrate spaced away from and facing the first substrate, a liquid crystal layer sandwiched between the first and second substrates, first and second electrodes formed on the first substrate, cooperating with each other to form a pixel, and generating an electric field therebetween to thereby implement inplane switching, and an interlayer insulating film formed at least below the second electrode, but not formed at least below the first electrode, a dielectric layer formed between at least a part of an upper surface of the first electrode and the liquid crystal layer being designed to have a capacitance per a unit area, almost equal to a capacitance per a unit area of a dielectric layer formed between at least a part of an upper surface of the second electrode and the liquid crystal layer. In the liquid crystal display, since a dielectric distance between the first electrode and the liquid crystal layer is almost equal to a dielectric distance between the second electrode and the liquid crystal layer, it is possible to balance flexo-electric effects on the first and second electrodes, which ensures suppression in generation of after-images.
Patent TW-492840-B (TW)
Title: Biocidal compositions and treatments
Inventor: JONES CHRISTOPHER RAYMOND
IPC: C02F1/50
Filed: 1998-12-28
Granted: 2002-07-01
Abstract: A synergistic biocide comprises a tris (hydroxymethyl) phosphine or a tetrakis (hydroxymethyl) phosphonium salt and at least one non-surfactant biopenetrant, such as a polymer or copolymer having a plurality of quaternary ammonium groups, a hydrotrope or a syntan, together optionally with a surfactant.
Patent TW-483883-B (TW)
Title: Coupling reactions for the preparation of biphenyls or aromatic olefins with allyl palladium catalysts
Inventor: TINKL MICHAEL
IPC: C07C43/20
Filed: 1999-03-17
Granted: 2002-04-21
Abstract: This invention relates to a novel, inventive process for the preparation of biphenyls or aromatic olefins by coupling reactions of the Suzuki coupling and Heck coupling type, using allylpalladium catalysts of the μ-halo(triisopropylphosphine)(η3-allyl)palladium(II) type.
Patent TW-404058-B (TW)
Title: The flash memory process with MIM structure
Inventor: WU SHIE-LIN
IPC: H01L27/115
Filed: 1999-04-13
Granted: 2000-09-01
Abstract: This invention comprises forming the gate pattern; then, form the oxide on the sidewall of gate structure; next, form a silicon nitride spacer on the sidewall of the gate structure; next, form the source and drain. Next, remove the spacer and form an undoped amorphous silicon layer on the surface of the gate structure, oxide and the exposed source and drain. Transform the amorphous silicon layer into the tunnel oxide with a rough interface in the semiconductor substrate. A poly-silicon layer is subsequently deposited on the substrate; next, perform a chemical mechanical polishing process to polish the above-mentioned poly-silicon to at least expose the gate; next, form an electric conductive structure on  the above-mentioned structure, a silicon nitride deposited by utilizing JVD technique is deposited on the above-mentioned electric conductive layer as the barrier layer, a dielectrics is next deposited on the above-mentioned JVD silicon nitride layer as high electric constant film layer, an electric conductive layer is used as the control gate and is formed on the above-mentioned high electric constant film layer.
Patent TW-406313-B (TW)
Title: Semiconductor device and manufacturing method of the same
Inventor: MATSUBARA YOSHIHISA
IPC: H01L21/3205
Filed: 1999-04-16
Granted: 2000-09-21
Abstract: A semiconductor device is improved in adhesion between: at least a contact portion of its tantalum-base metal serving as a barrier metal film; and, its copper buried wiring brought into contact with the contact portion to prevent the copper buried wiring from peeling off, and is therefore improved in reliability. Formed in a trench designed for a buried wiring of an interlayer insulation film are: a tantalum film having a film thickness of from 200 to 500 angstroms; and, a copper buried wiring having a film thickness of from 1.1 to 1.55 mu m. This copper buried wiring is formed by stacking together a copper thin film having a film thickness of from 0.08 to 0.12 mu m and a copper thick film having a film thickness of from 1.0 to 1.5 mu m. Further formed between the tantalum film and the copper buried wiring is an amorphous metal film having a thickness of approximately 20 angstroms. Still further formed between the tantalum film and each of a surface protection film and an interlayer insulation film is a tantalum oxide film having a film thickness of approximately several angstroms.