baber/WOPTO huggingface dataset:
Patent JP-H06287784-A (JP)
Title: Method for cleaning or reforming surface
Inventor: HIRAMOTO TATSUMI
IPC: C08J7/00
Filed: 1993-03-31
Abstract: PURPOSE:To remove the org. matter at a high rate and to precisely clean the surface of a material to be treated by cleaning the surface by a combination of hydrogen peroxide and UV. CONSTITUTION:Aq. hydrogen peroxide 2 is filled in a vessel 1. UV is emitted from a lamp 4 to form an OH group close to a material 5 to be treated from the hydrogen peroxide 2, and the unwanted org. matter is removed from the material 5 surface. Although the UV is simultaneously received by the hydrogen peroxide 2 and the contaminant on the surface of the material 5 in this case, the aq. hydrogen peroxide 2 is previously irradiated with UV and activated, the material 5 is dipped in the aq. hydrogen peroxide 2, and the same effect is obtained. Meanwhile, the aq. hydrogen peroxide is heated or an ultrasonic wave generator is arranged below the vessel 1 to remove the org. matter in a shorter time.
Patent JP-S58211672-A (JP)
Title: Testing method for logic circuit
Inventor: TADA TOSHIHIKO
IPC: G01R31/28
Filed: 1982-06-03
Abstract: PURPOSE:To test only an LSI in the state of operation, by making a separate LSI controlled to be either of two states, the state of operation and the state of test, and by putting only one LSI in the state of operation when a module test is performed, while putting the others in the state of test. CONSTITUTION:A decoder 10 for setting a mode is provided, and all LSIs are put in the state of system operation when an ordinary system operation is performed, while only one LSI to be tested out of a plurality of LSIs on a module is put in the state of system operation and all of the other LSIs in the state of test when a test is executed. Referring to figures, level 0 is set from the decoder 10 to the mode control input terminals of all LSIs 111-11n to set all the LSIs in the state of system operation in the figure (a), while the level 0 is sent only to the LSI 11n to be tested and level 1 is sent to the other LSIs to put them in a mode Z (the state of high impedance) in the figure (b). By this method, a function test of the LSI 11n to be tested alone can be performed.
Patent JP-H04327349-A (JP)
Title: Method for controlling preheating of tundish for continuous casting
Inventor: NAGAMURA TOKUHIRO
IPC: B22D11/10
Filed: 1991-04-25
Abstract: PURPOSE:To heat refractory in a tundish with preheating burners in good combustion efficiency with the optimum air-fuel ratio. CONSTITUTION:At the time of preheating the refractory in the tundish 2 with the combustion of combustibLe gas and combustion air supplied from the preheating burners 11, exhaust gas produced with the combustion is guided to a gas analyzer 8 to analyze each concn. of oxygen gas and the combustible gas remained in the exhaust gas. In the case the oxygen gas exists in the exhaust gas, supply of the combustion air is reduced, and in the case the combustible gas exists, supply of the combustion air is increased, and the tundish 2 is always preheated with the optimum air-fuel ratio.
Patent JP-H10285818-A (JP)
Title: Charge and discharge controller for set battery
Inventor: HORIE HIDEAKI
IPC: H02J7/02
Filed: 1997-03-28
Abstract: PROBLEM TO BE SOLVED: To prevent an early deterioration of a set battery and use each cell to its maximum capacity. SOLUTION: A terminal voltage detector 1 is connected across each cell of a set battery 100. The cells can be connected to a buffer battery 7 by means of switches 5 and 6. An inverter 4 is controlled by a controller 2 to adjust the terminal voltage of the buffer battery 7. A voltage detector 8 detects the terminal voltage of the buffer battery and the controller 2 judges the charge condition of the buffer battery from the detected value. When the buffer battery 7 needs charging, it is connected to the cell of the highest terminal voltage and the inverter 4 is so controlled that the buffer battery may be charged by the cell. When the buffer battery is full-charged, it is connected to the cell of the lowest terminal voltage and the inverter 4 is so controlled that the buffer battery may be discharged.  By this method, the charge and discharge of the cells is adjusted according to their capacities and thereby the depth of charge and discharge of each cell proceeds in the direction wherein the depths of all the cells are unified.
Patent JP-S5522459-A (JP)
Title: Pair roll driving start control method of rolling mill
Inventor: TSURUOKA KANJI
IPC: B21B37/00
Filed: 1978-08-07
Abstract: PURPOSE: To turn on power source after controlling of revolutions and synchronously drive pair rolls by low-frequency-starting the other of separate synchronous motors.  
     CONSTITUTION: The synchronous motor 11 of the lower roll is low-frequency- started by controlling a frequency converter 15. After the output frequency and voltage of the frequency converter 15 have coincided with the frequency and voltage of the power source, the output voltage of the frequency converter 15 is made once zero and the synchronous motor 11 of the lower roll is started. Next, the synchronous motor 10 of the upper roll is low-frequency-started and when its speed has become nearly 100%, the deviations between the relative angle positions of cross pins 6a, 7a are eliminated or kept within a permissible value by controlling the revolution of the synchronous motor 10 based on the detection signal of the deviations between the relative angle position of both cross pins 6a, l7a from relative angle deviation detecting device 14. Next, the voltage phase difference between the input and output sides of the frequency converter 15 is detected and the revolution of the synchronous motor 10 is controlled by this signal, whereby the voltage phase difference is eliminated and the upper and lower rolls 4, 5 are synchronously driven. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H10290241-A (JP)
Title: Building management system
Inventor: SATO MASAYUKI
IPC: G06F19/00
Filed: 1997-04-14
Abstract: PROBLEM TO BE SOLVED: To provide a building management system by which both a voice signal and a digital data signal are sent through one channel while keeping the transmission quality of both the data excellent. SOLUTION: Multiplexers 2-1-2 to 2-n-2 of controllers 2-1 to 2-n collate own addresses with received addresses and send the received address to other controllers 2-1 to 2-n as it is when they are different. Since a voice signal does not reach ordering sections 2-1-1-1 to 2-n-1-1 having functions of D/A conversion and A/D conversion functions, the voice signal is not affected by quantization noise. When the collection indicates coincidence, the signal is demodulated by the multiplexers 2-1-2 to 2-n-2 and the voice signal is outputted in an analog or digital form via the ordering sections 2-1-1-1 to 2-n-1-1 and a digital data signal is sent to control sections 2-1-1 to 2-n-1.
Patent JP-H03293752-A (JP)
Title: Manufacture of heat sink for semiconductor device
Inventor: SHIMIZU FUJIO
IPC: H01L23/36
Filed: 1990-04-11
Abstract: PURPOSE:To easily assemble the title heat sink by enlarging the diameter of a post and press-contacting and fixing plate fins with and to the outer peripheral surface of the post after the plate fins with fitting hole, the inside diameter of which is a little larger than the outside diameter of the post, are put on the post. CONSTITUTION:A cylindrical post 12 which is elongated in its axial direction with nearly same diameters and a pedestal 16 expanded in the direction perpendicular to the axial direction are formed to one body, with the pedestal 16 being formed on one end side of the post 12 in the axial direction. The inside diameter of fitting holes 20 to be formed through plate fins 14 is made a little larger than the outside diameter of the post 12 and the fins 14 are put on the post 12 by the holes 20 to such a state where the fins 14 are expanded in the direction perpendicular to the axis of the post 12 and lie upon another in the axial direction. After a roof plate 18 is put on the leading end section of the post 12 by a fitting hole 24 formed through the central part of the plate 18, the post 12 is compressed in the axial direction so as to enlarge the diameter. Therefore, the plate fins can easily be mounted on the post with excellent adhesion and with high workability.
Patent JP-S59222680-A (JP)
Title: Counterbalance valve
Inventor: FURUTA TOSHIHIRO
IPC: F16K17/04
Filed: 1983-05-30
Abstract: PURPOSE:To make stable control attainable without necessitating any seal, by making up a damper chamber outward a main check valve, while installing a pilot check valve in position between this damper chamber and a damper orifice interconnected to the former. CONSTITUTION:A damper chamber 15 is formed outward a main check valve R being seated in a main seat part 17, while a pilot check valve 19 is installed in position between the damper chamber 15 and a damper orifice 39 installed in a main check valve 6. With this constitution, in time of load holding, the main check valve R and the pilot check valve 19 work interdependently so that any leakage in the pressure can be thoroughly prevented from occurring, thus no seal is required. Therefore, a pilot ratio is able to grow large and stable control as much as for that becomes possible to be done.
Patent JP-H02272371-A (JP)
Title: Semiconductor checking device
Inventor: HAYASHI MITSUTOSHI
IPC: G01R31/26
Filed: 1989-04-13
Abstract: PURPOSE:To improve the check precision and the throughput of a device by providing moving mechanisms of a check stage and a semiconductor element and moving the check stage to perform prealignment and fine alignment of the semiconductor element. CONSTITUTION:After a chip 2 is moved onto a placing base 21 for prealignment on the side of a check stage system 5 to measure position information for prealignment, the chip 2 is moved onto a check stage 18. If positional deviation of the chip 2 is detected by an image recognizing mechanism 22 for prealignment, the check stage system 5 is moved by an extent corresponding to positional deviation based on this positional deviation information so that the chip 2 is placed on a preliminarily determined reference position of the check stage 18. The check stage 18 on which the chip 2 is placed is temporarily stopped under a fine alignment mechanism 20, and the fine alignment operation of the chip 2 is performed there.
Patent JP-H01271138-A (JP)
Title: Dynamic posture balancer
Inventor: ROKKAKU TADASHI
IPC: B23Q1/72
Filed: 1988-04-20
Abstract: PURPOSE:To improve the positioning accuracy at a high speed positioning time by providing the cylinder mechanism acting an operation force in the direction cancelling a over-turning moment generated at the actuation stopping time of a moving body. CONSTITUTION:The set flow rate Q found by an arithmetic device 26 by its operation is output from a servovalve 22 for the overturning moment generated at the actuation stopping time of the column 10 as for a moving body. The piston cylinders 21a, 21b set up between moving members 19a, 19b and the column 10 are thus operated to cancel the over-turning moment of the column 10. The rocking movement of the column 10 and succeeding vibration are dissipated or reduced, the working accuracy and measuring accuracy of a machine tool and measuring instrument, etc., can be kept higher even if the high speed feeding of the moving body is performed and the improvement in working efficiency, shortening of measuring time, etc., can be realized.
Patent JP-S5225436-A (JP)
Title: Door stopper
Inventor: HIGASHIYAMA ITSUO
IPC: E05C17/54
Filed: 1975-08-05
Abstract: PURPOSE: To provide a stopper for a door, which can never slip to allow the door to open. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H09293077-A (JP)
Title: Method and device for information retrieval, and storage medium for storing information retrieval program
Inventor: KUBOTA RIE
IPC: G06F17/30
Filed: 1996-04-17
Abstract: PROBLEM TO BE SOLVED: To provide a system and the method for retrieving a document at a user's request to retrieve an indistinct document while applied to a new coinage and a phrase without using vocabulary information or grammar information. SOLUTION: A featured character string is extracted from an input document 907 and used for similar retrieval. For the extraction of the featured character string, the feature quantity of the character string is calculated by contrasting the frequency of appearance in the input document 907 with the frequency of appearance in a document set 909 to be retrieved, and the feature quantity is evaluated. The extracted featured character string is used for the retrieval. Documents found by the retrieval is evaluated and sorted in evaluation order. The similarities of the documents are evaluated by using the frequencies of appearance of respective featured character strings in the input document as weight and giving higher evaluation to a document wherein a featured character string with large weight appears more.
Patent JP-H06211409-A (JP)
Title: Device for piling and dividing of web and method of bundling and dividing of web
Inventor: EICHI DABURIYUU KUROURII
IPC: B65H33/10
Filed: 1993-04-22
Abstract: PURPOSE: To stack and separate the bundles of sheets, by transporting the sheets cut from webs by a conveyor and by offsetting the sheets in the direction transverse to the conveying direction by a kicker mechanism before stacking them from the horizontal state to the vertical state by a stacking mechanism. CONSTITUTION: A continuous web 30 is fed from a roll base 32 to a cutting part 34. After the web is conveyed by a driving belt 40, it is cut into sheets 38 by a cutting blade 36. In this structure, a sensor 42 which read the code of the continuous web 30 is provided at the upstream side of the driving belt 40 to input the code data to a CPU 46. Subsequently, the sheets 38 are fed into a stacking part 44. After they are conveyed by a conveyor 52 and offset in the direction transverse to the conveying direction by a kicker mechanism 62, they are stacked from the horizontal state to the vertical state by a stacking mechanism 110. The CPU 46 controls the driving motor 70, etc., of the stacking part 44, so that the sheets 38 can be stopped intermittently when the frond end of each sheet comes close to the kicker mechanism 62.
Patent JP-H02272714-A (JP)
Title: Manufacture of winding-type film capacitor
Inventor: SANTO MITSUGI
IPC: H01G4/32
Filed: 1989-04-14
Abstract: PURPOSE:To elevate the productivity of an element and to prevent the curvature at the projection of both-sides-metallized film by forming a plurality of insulating margin parts and electrodes in parallel longitudinally on both sides of a dielectric film, and winding the dielectric films one over the other. CONSTITUTION:A both-sides-metallized film can be obtained by forming each of the plurality of insulating margin parts 7 of about 1.0-8.0mm and metallized parts 8 to become electrodes formed by vacuum deposition in parallel longitudinally on both sides of a dielectric film 6 such as a PET film, a polypropylene film, a polycarbonate film, etc. By superposing a dielectric film 10 on this and winding them, a capacitor element 9 being formed in a body can be obtained. The element 9 is formed into flat shape by the pressing, etc., with a heated plate, and is separated by cutting the center or its vicinity (A-D) of the insulating margin 7; thus capacitor element simples are obtained.
Patent JP-H0644176-A (JP)
Title: Input/output controller
Inventor: MORIOKA ATSUSHI
IPC: G06F13/12
Filed: 1992-04-16
Abstract: PURPOSE:To lighten the load of a host device by making it useless to read application firmware out of the host device. CONSTITUTION:A non-volatile storage means 10 in which all the application firmware required for controlling one or more peripheral devices and a control table to store the leading address of the application firmware required for controlling the peripheral device connected to the port as coordinating it with the port are stored is provided. The contents of the control table are initialized previously by a device classification reading means 15 and a control table generating means 16 on the basis of classification constitution information, and when an operation instruction designating the port is received from the host device, the leading address of the application firmware corresponding to the designated port is detected from the control table, and this application firmware is started so as to control the peripheral device connected to the designated port.
Patent JP-H10289048-A (JP)
Title: Information input device
Inventor: TERASAWA YUICHIRO
IPC: G06F3/02
Filed: 1997-04-14
Abstract: PROBLEM TO BE SOLVED: To provide an information input device which inputs character information and the position information of a cursor on an information input device body through infrared rays about an information input device which inputs character information shown on a display device and the position information of a cursor on a device body. SOLUTION: This device has a keyboard part 61, a pointing device part 62, a controlling part 63 and an infrared light emitting part 64, and the parts 63 and 64 convert an output signal of the part 61 into character information that consists of plural byte infrared rays whose bit length is fixed and an output signal of the part 62 into position information that consists of plural byte infrared rays whose bit length is fixed. The character information includes information that shows that it is character information and a key code that corresponds to a character or a symbol, and the position information includes information that shows it is position information, a coordinate value in an X axis direction and a coordinate value in a Y axis direction.
Patent JP-S6077457-A (JP)
Title: Fet read-only memory array having word wire for strengthening precharge of bit wire
Inventor: DANIERU JIYON KOOBA
IPC: G11C17/00
Filed: 1984-05-15
Abstract: An FET read only memory cell circuit (20) is disclosed wherein word lines (1, 2) serve to augment the precharging of the bit lines (A-D). If an FET read only memory site is preprogrammed as a binary one, (20(1,A)) for example, then when its word line (1) is pulsed, the bit line (A) will be insured to have an affirmatively high potential, representing a binary one state. This improves the reliability of the operation of the circuit by minimizing the effects of charge leakage from the bit line.
Patent JP-H05267961-A (JP)
Title: Output circuit
IPC: H03G3/30
Filed: 1992-03-23
Abstract: PURPOSE:To automatically adjust an output level by a simple constitution. CONSTITUTION:An output signal of a variable gain amplifying means 6 is detected by a gain control means, gain of the variable gain amplifying means 6 is controlled so that its detected output is converged to a target value, and by adjusting automatically an output level, the output level can be adjusted automatically by a simple constitution, and also, the gain in this case is stored in a nonvolatile memory means 14, and by setting the gain stored in the nonvolatile memory means 14 at the time of regular operation to the variable gain amplifying means, a result of adjustment of the output level can be used effectively.
Patent JP-S58213436-A (JP)
Title: Manufacturing device for semiconductor device
Inventor: TATEISHI MANABU
IPC: H01L21/677
Filed: 1982-06-04
Abstract: PURPOSE:To improve the capability of treatment of the manufacturing device by setting up a plurality of treating sections between magazine cases oppositely placed on one plane with a means moving and carrying and carrying a semiconductor substrate. CONSTITUTION:The cassette 2 in which the semiconductor substrates 1 to be treated are encased is placed onto one plane with the belt 3 for moving and carrying semiconductors. The cassette 2' encasing the semiconductor substrates 1' previously treated is placed onto one plane opposed to the cassette 2. The semiconductor substrate to be treated 1 being carried by the belt 3 from the cassette 2 passes through the first treating section 4 and is treated by the second treating section 5, and the semiconductor substrate to be treated 1 being carried by the belt 3 is treated by the first treating section 4. Accordingly, two semiconductor substrates are treated simultaneously.
Patent JP-H0450-A (JP)
Title: Low torque hydraulic type reduction gear
Inventor: TAJIRI YOSHIHIRO
IPC: F16H39/12
Filed: 1990-04-11
Abstract: PURPOSE:To compact a low torque hydraulic type reduction gear, to vary a reduction range to various values, and to vary a torque value to various values by coupling other power to a shaft on the input side, and providing a reduction ratio by means of a ratio between an exhaust amount of a piston on the input side and an exhaust amount on the output side. CONSTITUTION:When a shaft 2 on the input side of a low torque hydraulic reduction gear 1 is rotated by means of other power, oil 11 enters through an oil inlet 16, a cylinder block 12 on the input side is rotated. The oil 11 is caused to flow through longitudinal movement of a piston 10 on the input side by means of an inclination block 6 on the input side and flows through a pressure regulating valve 13 and a flow passage 14. Through operation of a ball connection 20 by means of a piston 19 on the output side, a cylinder block 18 on the output side is moved along an inclination block 22 on the output side. A shaft 27 on the output side secured to a cylinder block 18 on the output side is rotated to perform reduction. A reduction ratio and a torque ratio are variable to various values according to the size and the number of the pistons 19 on the output side.
Patent JP-H05196622-A (JP)
Title: Method for counting secondary population of white corpuscle
Inventor: RATSUSERU JIEI GAASHIYUMAN
IPC: G01N33/50
Filed: 1992-03-24
Abstract: PURPOSE: To count a leucocyte sub-population by using a signal analogue channel machinery converting two light scatter parameters to a single parameter by the non-linear conversion to the single parameter. CONSTITUTION: Right angle and forward angle light scatter measured values are detected and these two parameters are deformed to a single parameter by using non-linear conversion. A pref. system of conversion is given by C(X, Y)=(1-mX)bY1/2+aX<2> +hX+k (wherein X is equal to the logarithm of a right-angle scatter measured value and Y is equal to a forward angle scatter measured value and m, b, a, h and k are a constant regulated so as to be best matched). The pair of values in the logarithmic histograms of forward scatter and right-angle scatter and all of cells represented by (x) and (y) appear on the channel of the unidimensional histogram of the parameter C (x, y). Conversion can be displayed by a graph by a line group and respective lines are positions of values x, y imparting by C (x, y).  Cells along respective C constant lines are counted to impart the counting of a desired sub-population.