Patent GB-1222349-A (GB)
Title: Deflection circuitry for cathode-ray tube display
IPC: G09G1/04
Filed: 1969-06-03
Abstract: 1,222,349. Cathode-ray tube circuits. SPERRY RAND CORP. 3 June, 1969 [3 June, 1968], No. 28030/69. Heading H4T. In a cathode-ray tube display arrangement employing electromagnetic beam deflection means the beam may be positioned at any one of a plurality of major position points or at any one of a plurality of minor position points located between the major position points under the control of respective major and minor deflection circuits. Fig. 1 shows one embodiment in which the outputs of the major deflection circuit 4 and minor deflection circuit 6 (both singleended) are applied in push-pull fashion to the coils 22, 22<SP>1</SP> of the deflection yoke 8. In operation, binary " 0's " are initially present on all input lines 14 of a register 2 and by virtue of inverters 12 all the flip-flops 10 and the flip-flop 18 are CLEAR and produce an output on lines C with no output on line S. In the CLEAR condition current is conducted through coil 22 via transistor 40, the metering resistors R1- R 16 of the minor deflection circuit 6 and transistor 20 and the metering resistors R16-R256 of the major deflection circuit 4 so that the beam is at maximum deflection, assumed to be at the extreme left-hand side of the screen. As the count is built-up in register 2 from zero to its maximum count of 256 by the application of binary " 1's " and " 0's " to the lines 14 supplying the flip-flops 10, the first four of the latter (controlling the minor deflection circuit 6) operate to successively replace the metering resistors R1-R8 by the metering resistors R<SP>1</SP>1-R<SP>1</SP>8 so that 15 units of current are successively removed from coil 22 and simultaneously caused to flow through coil 22<SP>1</SP>, transistor 42 and the metering resistors R<SP>1</SP>1- R<SP>1</SP>8. The beam is thus stepped by 15 increments away from the left-hand side of the screen towards the centre. At the count of 16 (" 1 " applied to line 14<SP>11</SP> whilst all other lines 14 receive " 0's ") flip-flop 10<SP>11</SP> operates to remove the metering resistor R16 in the major position deflection circuit 4 so that a further 16 units of current are removed from coil 22 and the flipflops controlling the minor deflection circuit 6 remove the 15 units of current flowing through coil 22<SP>1</SP> and replace it by 15 units of current flowing through coil 22 so that the beam has now been deflected by 16 units towards the screen centre. This sequence of operation continues until all of the flip-flops 10 have a " 1 " input. In this condition 16 units of current flow through coil 22, transistor 40 and metering resistor R16 (in the minor deflection circuit 6) since flip-flop 18 has an output on line C and 15 units of current flow through coil 22<SP>1</SP>, transistor 42 and metering resistors R<SP>1</SP>1-R<SP>1</SP>8 so that the beam is within one incremental step of the screen centre. At this point a signal from the central processor causes all the flip-flops to change state so that " 0's " are supplied to flip-flops 10 and a " 1 " is supplied to flip-flop 18. The output of the latter on line C is thus removed so that transistor 20 is cut-off and the current flow through coil 22, transistor 40 and metering resistor R16 of the minor deflection circuit 6 is removed. Flip-flop 18 now has an output on line S which switches on transistor 24 and causes 16 units of current to flow through coil 22<SP>1</SP>, transistor 42 and metering resistor R16 of the minor deflection circuit 6 whilst 15 units of current now flow through coil 22, transistor 40 and metering resistors R1-R8. The beam has now been deflected by one incremental step to the right of the screen centre and as the count is built up again in register 2 the arrangement operates in a similar manner to step the beam incrementally towards the extreme righthand edge. In a second embodiment the minor deflection circuit is arranged to operate as a single-ended deflection driver (Fig. 3, not shown). Deflection arrangements of the kind described may be employed for the X and Y deflection circuits of Alpha-Numeric display systems.