baber/WOPTO huggingface dataset:
Patent TW-554483-B (TW)
Title: A liquid crystal display flip chip package
Inventor: LEE CHUN-YU
IPC: H01L21/768
Filed: 2002-08-20
Granted: 2003-09-21
Abstract: A liquid crystal display flip chip package comprising a liquid crystal display driver chip, a redistribution layer, an under ball metal layer, a bump, a circuit board and a conductive adhesive. A liquid crystal display driver chip comprising a substrate, an interconnection layer, a passivation layer, a metal pad. The metal pad is located on the substrate. The passivation layer and the metal pad are located on the interconnection layer. The passivation layer is provided with an opening, and the opening is exposed to the metal pad. The redistribution layer is located on the passivation layer. The redistribution layer comprising a metal structure layer, and the metal structure layer having a node. The under ball metal layer is located on the node. The bump is located on the under ball metal layer. The circuit board comprising many electrodes, and the electrodes are fixed on the circuit board. The conductive adhesive is located between the circuit board and the liquid crystal display driver chip.
Patent TW-570907-B (TW)
Title: Anti-bonding agents and methods for blast furnace slag or its grading adjusted slag
Inventor: TAKAHASHI TOMOO
IPC: C21B3/06
Filed: 2002-09-05
Granted: 2004-01-11
Abstract: An anti-bonding agent for blast furnace slag or its grading adjusted slag includes one or more polymers having a main constituent unit shown by formula, by a greater molar percentage than any other constituent unit where M is hydrogen atom, alkali metal such as sodium, alkali earth metal, ammonium or organic amine. Such an agent is used in an amount of 0.002-0.3 weight parts for 100 weight parts of such blast furnace slag or its grading adjusted slag, and may be applied as an aqueous solution with concentration of 1.5-10 weight %.
Patent TW-594739-B (TW)
Title: Flash memory rewrite circuit, LSI for IC card, IC card, method for rewriting flash memory and computer readable recording medium recording flash memory rewriting program
Inventor: MORI SHUZO
IPC: G11C16/10
Filed: 2002-09-25
Granted: 2004-06-21
Abstract: A memory IC card including a card substrate, a semiconductor device mounted on the card substrate, which includes an CPU, a flash memory, a memory block and a flash memory rewrite circuit having a rewrite data control circuit that receives a rewrite instruction of the flash memory from the CPU to store data for a designated byte of a page for rewriting to the memory block, a page data control circuit that sends data of the page excepting the designated byte in the flash memory to the memory block to prepare new page data in the memory block and a data set control circuit that writes the new page data prepared in the memory block to the flash memory; outer terminals mounted on the card substrate; wirings provided on the card substrate to connect the outer terminals.
Patent TW-556122-B (TW)
Title: Method for querying and value adding tolls and the value adding equipment used in the same
Inventor: JANG MENG-CHIAN
IPC: G07B15/00
Filed: 2002-10-25
Granted: 2003-10-01
Abstract: The present invention discloses a method for querying and value adding tolls in the value adding equipment for electric tolling system. The method is to select an item of toll query on the value adding equipment; proving all the tolled highway information through the value adding equipment in response to the query item; selecting a tolled highway expected to pass through; providing all the toll information for the tolled highway through the value adding equipment; selecting the toll stations at the start and the end of the expected route from these toll stations; generating a toll fee through the value adding equipment in response to the selected toll stations for the start and the end; providing a smart card for a signal connection with the value adding equipment; and, executing the value adding item to add value to the smart card with the toll fee through the value adding equipment. The present invention also discloses a value adding equipment for the querying and value adding toll.
Patent TW-567646-B (TW)
Title: Multi-band planar antenna and portable terminal
Inventor: SUGIYAMA TAKAHIRO
IPC: H04B1/3822
Filed: 2002-11-20
Granted: 2003-12-21
Abstract: The present invention provides a compact, broadband multi-band planar antenna and portable terminal that functions for at least two frequency band. The multi-band planar antenna comprises the slit 2 formed by a U type slit portion 2a and an open slit portion 2b that exposes certain part of the U type slit portion 2a, a planar radiating conductor 3 with at least two resonant frequencies and power supply circuits 4a, 4b supplying power to the said radiating conductor 3. As the widths of the U type slit portion 2a and the open slit portion 2b are made to match with the frequency width, the first and the second resonant frequency bands can be enlarged at the same time to achieve the goal of being compact in size.
Patent TW-555713-B (TW)
Title: Supporting member in an over for barking glass substrate
Inventor: LIN YUNG-CHIN
IPC: G02F1/133
Filed: 2002-12-19
Granted: 2003-10-01
Abstract: This invention discloses a supporting member in an oven, especially employing in the oven for barking glass substrate. The glass substrate yield of thin-film transistor (TFT) can be raised by the oven. According to this invention, a plurality of first bar supporting members and second bar supporting members are disposed on the oven walls for supporting a glass substrate. The outer portion of the first and the second bar supporting members are each wrapped by a soft layer with low heat conductive index. Thus, the defects, such as the scrape on the glass substrate or the unequal heat-conduction, will not happen. Moreover, the quality of the glass substrate after barking with the oven of this invention can be raised.
Patent TW-I229155-B (TW)
Title: Method and apparatus for producing large, single-crystals of aluminum nitride
Inventor: SCHOWALTER LEO J
IPC: C30B25/00
Filed: 2002-12-23
Granted: 2005-03-11
Abstract: A method and apparatus for producing bulk single crystals of AlN includes a crystal growth enclosure with Al and N2 source material therein, capable of forming bulk crystals. The apparatus maintains the N2 partial pressure at greater than stoichiometric pressure relative to the Al within the crystal growth enclosure, while maintaining the total vapor pressure in the crystal growth enclosure at super-atmospheric pressure. At least one nucleation site is provided in the crystal growth enclosure, and provision is made for cooling the nucleation site relative to other locations in the crystal growth enclosure. The Al and N2 vapor is then deposited to grow single crystalline AlN at the nucleation site.
Patent TW-I260256-B (TW)
Title: Conditioner and conditioning methods for smooth pads
Inventor: WEST THOMAS E
IPC: B24D3/32
Filed: 2003-03-24
Granted: 2006-08-21
Abstract: Pad conditioners and methods of conditioning pads for applications such as polishing substrates and chemical mechanical planarization of substrates are provided.
Patent TW-I247729-B (TW)
Title: Method for producing irregular glittering glass granules
Inventor: LI JAU-HUEI
IPC: C03B19/10
Filed: 2003-09-04
Granted: 2006-01-21
Abstract: The present invention relates to a method for producing irregular glittering glass granules comprising the following five steps, which are: (1) carbon powder mixing, which comprises mixing shattered glass granules with carbon powder in a predetermined weight ratio; (2) thermal treatment, which comprises transporting the glass granules into a furnace to conduct heating and circularize the acute angles, and then cooling down the glass to confer it with a better hardness; (3) dusting, which comprises delivering the glass into a sieve device so as to remove the carbon powder; (4) back-end treatment, which comprises washing the glass granules and purifies their surfaces; and (5) getting the glass product desired.
Patent TW-I259361-B (TW)
Title: Semiconductor memory device
Inventor: HAKUSHI NORIHIKO
IPC: H01L23/00
Filed: 2003-09-05
Granted: 2006-08-01
Abstract: A semiconductor memory device including a flash memory and a RAM incorporating a pseudo-SRAM contained in an MCP, has an internal transfer control signal for controlling internal data transfer between the flash memory and pseudo-SRAM, and an external transfer control signal for controlling data transfer between an external CPU and pseudo-SRAM, as control signals for the pseudo-SRAM. A flash controller in the RAM controls the internal transfer control signal so as to suspend the internal data transfer between the flash memory and pseudo-SRAM when the external CPU requests access to the pseudo-SRAM during the internal data transfer.
Patent TW-I279490-B (TW)
Title: Recoil starter
Inventor: NIEDA SEIICHI
IPC: F02N3/02
Filed: 2003-09-23
Granted: 2007-04-21
Abstract: A recoil starter is disclosed which enables a ratchet member (8) to be manufactured at a reduced cost and which is capable of obtaining a sufficient strength and reducing a size and weight thereof without increasing a thickness of a rope reel (4) and the like. The ratchet members (8) are mounted on the rope reel (4) so as to engage with a control member (15) that is rotatably attached to a reel shaft (2) with a rotational resistance imparted thereto, so that the ratchet members (8) are turned radially outwardly to engage with a drive pulley (11), to thereby allow the drive pulley to rotate integrally with the rope reel (4). The ratchet members (8) are each formed of a rod material having a circular section by bending the material and are each pivotally supported on a side surface of the rope reel (4).
Patent TW-I253884-B (TW)
Title: Circuit device and manufacturing method thereof
Inventor: IGARASHI YUSUKE
IPC: H01L21/48
Filed: 2003-10-29
Granted: 2006-04-21
Abstract: The present invention provides a circuit device wherein the sidewall of isolation groove(41) for separating the conductive patterns is formed with a neck portion (19) so as to improve the close adhesion between the conductive pattern (11) and the isolative resin (13). The circuit device (10) is constituted with conductive patterns (11) separated by the isolation groove (41), a circuit element (12) mounted on the conductive pattern (11), and an isolative resin (13) covering the circuit elements (12) and conductive pattern (11) such that the back surfaces of the conductive patterns (11) are exposed and the isolation grooves (41) are filled. Besides, the side walls of isolation grooves (11) are provided with a neck portion (19). At the neck portion (19), the width is less than that of the rest part of isolation groove (41). Therefore, the close adhesion between the conductive resin (13) and the conductive pattern (11) is promoted by sticking the resin (13) to the neck portion (19).
Patent TW-I237393-B (TW)
Title: Hetero-junction composite semiconductor field effect transistor and the manufacturing method thereof
Inventor: NISHIHORI KAZUYA
IPC: H01L29/778
Filed: 2003-12-03
Granted: 2005-08-01
Abstract: The subject of the present invention is to provide a hetero-junction composite semiconductor field effect transistor for reducing the parasitic resistance. The solution is that the hetero-junction composite semiconductor field effect transistor is sequentially laminated with a channel layer 14, a first electron supply layer 15, an electric field relaxation layer 16, a first connection layer 17, a trench block layer 50, and a second connection layer 18 on the composite semiconductor substrates 11, 12, 13. The transistor is a dual-trench structure. Moreover, it is characterized in that, the first connection layer is added with GaAs or InGaAs with n-type dopant having high electron mobility, and the electric field strength relaxation layer is configured with fixed type of InGaP. The present invention can reduce the parasitic resistance, and eliminate the reduction of mutual inductance of transistors and the maximum drain current. Furthermore, the present invention can use the electric field strength relaxation layer to relax the electric field concentration near the end of the gate electrode, and to improve the voltage durability.
Patent TW-I236581-B (TW)
Title: One cycle control continuous conduction mode pfc boost converter integrated circuit with integrated power switch and boost converter
Inventor: ATHARI FRANK
IPC: H02M1/00
Filed: 2003-12-15
Granted: 2005-07-21
Abstract: An integrated circuit for a continuous conduction mode (CCM) power factor corrected boost converter circuit, the boost converter circuit including a rectifier connectable to an ac input and having a rectified dc output provided across a dc bus; an inductor having first and second terminals connected in one leg of the dc bus, a first terminal of the inductor coupled to the output of said rectifier; a boost rectifier diode having a first terminal coupled to the second terminal of the inductor and having a second terminal; and a storage capacitor connected to the second terminal of the diode; the integrated circuit comprising a control circuit and a switch controlled by the control circuit, the integrated circuit comprising a housing enclosing the control circuit and switch, the integrated circuit having a power terminal, a ground terminal, a first control input terminal for coupling to an output of the converter circuit, and a second control input terminal for coupling to a sensor for sensing current in the dc bus and further having an output terminal connected to the switch for coupling to the second terminal of the inductor, wherein the control circuit comprises a one cycle control circuit having an integrator reset by a clock signal for each cycle of the clock signal, the integrator receiving as an input a signal provided on said first control input terminal.
Patent TW-I228801-B (TW)
Title: Non-volatile memory cell with dielectric spacers along sidewalls of a component stack, and method for forming same
Inventor: HSU FU-SHIUNG
IPC: H01L27/115
Filed: 2003-12-29
Granted: 2005-03-01
Abstract: A disclosed method for forming a non-volatile memory cell includes forming a component stack including an electron trapping layer on a substrate surface. A dielectric layer is formed over the component stack, and a portion is removed such that a remainder of the dielectric layer exists substantially along sidewalls of the component stack. An oxide layer is formed over a bit line in the substrate adjacent to the component stack, and an electrically conductive layer is formed over the component stack and the oxide layer. A described non-volatile memory cell includes a component stack on a substrate surface, the component stack including an electron trapping layer. Multiple dielectric spacers are positioned along sidewalls of the component stack. An oxide layer is positioned over a bit line in the substrate adjacent to the component stack, and an electrically conductive layer is positioned over the component stack and the oxide layer.
Patent TW-I227910-B (TW)
Title: Semiconductor device, circuit substrate and electronic instrument
Inventor: HARA KAZUMI
IPC: H01L25/065
Filed: 2004-03-10
Granted: 2005-02-11
Abstract: A semiconductor device includes a semiconductor substrate with a through hole formed therein, a first insulating film formed inside the through hole, and an electrode formed on an inner side of the first insulating film inside the through hole. The first insulating film at the rear surface side of the semiconductor substrate protrudes beyond the rear surface, and the electrode protrudes on both the active surface side and the rear surface side of the semiconductor substrate. An outer diameter of a protruding portion on the active surface side is larger than an outer diameter of the first insulating film inside the through hole, and a protruding portion on the rear surface side protrudes further beyond the first insulating film to have a side surface thereof exposed. The semiconductor device has improved connectivity and connection strength and, in particular, has excellent resistance to shearing force when used in three-dimensional packaging technology.
Patent TW-I246780-B (TW)
Title: Solid-state component device and manufacturing method thereof
Inventor: SUEHIRO YOSHINOBU
IPC: H01L33/56
Filed: 2004-03-10
Granted: 2006-01-01
Abstract: The present invention provides a solid-state component device that can realize a glass sealing process at low temperature and has a sealing structure with high reliability. A P2O5-ZnO-based glass with low melting point is set parallel to a glass-containing Al2O3 substrate 3 on which a GaN-based LED component 2 is carried, and then a hot-press process is performed in a N2 atmosphere where the pressure is 60 kgf and the temperature is higher than 415 DEG C. Under this processing condition, the low melting point glass has a viscosity of 10<9> poise and is bonded to the surface of the glass-containing Al2O3 substrate 3 by the oxide formed thereon.
Patent TW-I261534-B (TW)
Title: Light pervious structure having deodorant and bacteriostasis effects and method for making the same
Inventor: CHEN YING-JEN
IPC: H01J5/08
Filed: 2004-04-13
Granted: 2006-09-11
Abstract: A light pervious structure having deodorant and bacteriostasis effects and method for making same, by enhancing roughness of a photo-catalyst material so as to feature the light pervious structure body with indented and roughened surface. Photo-catalyst material gel film is coated over the indented and roughened surface, where the thickness of the photo-catalyst material gel film is smaller than roughness value of the roughened surface. As such, the photo-catalyst material gel film is adhered to and covered the roughened surface in an undulating manner, thereby increasing the surface area of the light pervious structure body while increasing the functional area where the surface area of photo-catalyst material gel film reacts with ambient air.
Patent TW-I267822-B (TW)
Title: Organic electroluminescence device that can adjust chromaticity
Inventor: KINOSHITA MASARU
IPC: H05B44/00
Filed: 2004-04-29
Granted: 2006-12-01
Abstract: The object of the invention is to provide an organic electroluminescence device capable of regulating emission chromaticity while sustaining a constant emission luminance. The organic electroluminescence device comprises an organic electroluminescence element having, between electrodes, an organic electroluminescence layer emitting white light having a chromaticity corresponding to a driving current density, and a drive unit for driving the organic electroluminescence element with a current and performing control of the driving current and control of the current driving time per unit time. In addition, the drive unit regulates the input to control the driving current and the current driving time to be a first current value and a first time, respectively, in response to a first chromaticity, and to control the driving current and the current driving time to be a second current value larger than the first current value and a second time shorter than the first time, respectively, in response to a second chromaticity, and also regulates emission chromaticity while keeping the emission luminance of the organic electroluminescence device at a substantially constant. Since regulation is made to an emission chromaticity in compliance with a chromaticity regulation input by controlling the driving current value to an organic light emitting element depending on the chromaticity regulation input for regulating emission chromaticity, and emission luminance can be kept at a substantially constant level by regulating the current driving time per unit time in compliance with control of the driving current value, regulation to a desired emission chromaticity is possible without altering the emission luminance.
Patent TW-I252273-B (TW)
Title: Automatic shaping mechanism for specially structured blind
Inventor: NIEN HSIAO-WEI
IPC: E06B9/24
Filed: 2004-06-01
Granted: 2006-04-01
Abstract: The automatic shaping mechanism for specially structured blind is equipped with a weaving platform on the two sides of which is respectively disposed a clamping device and a receiving unit for housing supporting members. The clamping device is equipped with a first hydraulically or pneumatically operated cylinder having a retaining clip and a movable clip at the end of the retractable rod of the cylinder. At one side of the movable clip is disposed a second hydraulically or pneumatically operated cylinder with a conically shaped push section at the end of the retractable rod of the cylinder. At one side of the interior of the receiving unit is disposed a slant conic guide wall which extends vertically downwardly to form a narrow passage with respect to the inner wall so as to guide a single support member to fall down sequentially. At one side of the receiving unit is disposed a slot in communication with the narrow passage and is right alignment with the middle position between the movable clip and the retaining clip whereby the specially structured blind with support members can be shaped can be precisely and delicately produced with better quality.
Patent TW-I240207-B (TW)
Title: Method and system for real-time determining abnormality of pixel values for captured image
Inventor: JOU TZE-AN
IPC: G06F3/03
Filed: 2004-06-11
Granted: 2005-09-21
Abstract: The present invention provides a method and system for real-time determining abnormality of pixel values for captured image, which determines the quality of an image in the captured video stream by the optical mouse for determining the motion of the optical mouse. The method includes a step of abstracting reference image, a step of abstracting sampling image, a step of calculating matching value, a step of calculating leveling index, a step of calculating the number of minimum values locally, and a step of determining the quality of image. The present invention is to determine the quality of captured image pixels during pre-processing, so when there are abnormal pixel values not recognizable, it can conduct the filtering and compensation in advance for improving the precision of calculating the motion vector for the sampled image.
Patent TW-I270058-B (TW)
Title: Backup method for wafer production apparatus
Inventor: SHIE LI-LING
IPC: H01L21/00
Filed: 2004-06-30
Granted: 2007-01-01
Abstract: The present invention relates to a backup method for wafer production apparatus, wherein the wafer production apparatus includes a control system and a working hard disk; then, employing a plurality of backup hard disks connected with the control system, so when the control system is operating, it could not only read and write the parameter data on the working hard disk, but also could automatically configure the parameter data based on the predetermined timing, and sequentially writing into each backup hard disk; thus, each backup hard disk is stored with the parameter data at the predetermined time, so as to reduce the risk of hard disk damage and data loss, and make the searching and obtaining of data more easily.
Patent TW-I246086-B (TW)
Title: Single clock driven shift register utilized in display driving circuit
Inventor: TSENG JUNG-CHUN
IPC: G09G3/36
Filed: 2004-07-23
Granted: 2005-12-21
Abstract: A single clock driven shift register having a plurality of stages is provided. The (M)th stage comprises a latch unit, a logic unit, and a non-overlap buffer. The latch unit latches an input signal from the (M-1)th stage according to a clock signal. The logic unit connecting to the rear end of the latch unit deals with the output signal of the latch unit and the clock signal with an NAND logic calculation. The non-overlap buffer connecting to the rear end of the logic unit comprises three inverters connected in a serial, and the output signal of the first inverter from the rear end of the logic unit applies to the (M+1) stage's latch unit. Moreover, the output signal of the (M-1) stage's non-overlap buffer applies to the non-overlap buffer or the logic unit to delay the output signal of the non-overlap buffer.