Patent EP-4184569-A3 (EP)
Inventor: SHAN BOHAN
IPC: H01L23/485
Filed: 2022-10-14
Abstract: In a microelectronic package, one or more solder joints (130A-B, 206A-D, 226, 640) between two substrates (102, 104, 202A, 202B, 204, 224, 228, 600, 630) are formed as full IMC (intermetallic compound) solder joints, while other solder joints (132, 210, 220, 642) may be formed as regular solder joints. The full IMC solder joint (130A-B, 206A-D, 226, 640) includes a continuous layer (e.g., from a top pad (124, 128, 636) to a bottom pad (122, 126, 606)) of intermetallic compounds and may include copper particles (302) throughout the full IMC solder joints (130A-B, 206A-D, 226, 640). The full IMC solder joint (130A-B, 206A-D, 226, 640) may include cured epoxy from a no-remelt solder around the continuous layer of IMCs. The full IMC solder joint (130A-B, 206A-D, 226, 640) has a melting point that is higher than that of the regular solder joints (132, 210, 220, 642). The full IMC solder joint (130A-B, 206A-D, 226, 640) may be between dummy pads (126, 128, 606, 636) on the first and second substrates (102, 104, 600, 630) or may include an interconnect for power delivery between the first substrate (102, 600) and the second substrate (104, 630) or an input/output (I/O) interconnect between the first substrate (102, 600) and the second substrate (104, 630). The first substrate (102, 204, 224, 600) and the second substrate (104, 202A, 202B, 228, 630) may include one or more of: a substrate, a die, a bridge die, an interposer, a patch, a thin film, a motherboard, a redistribution layer (RDL), and an organic PCB, in particular, the first substrate (204) may be a core substrate and the second substrate (202A, 202B) may be a substrate patch, or the full IMC solder joint (226) may be located in a via (222) in the first substrate (224), wherein the second substrate may be a bridge die (228). The solder joints (130A-B, 206A-D, 226, 640) may include at least three full IMC solder joints, wherein the number of full IMC solder joints is in a range of one solder joint to 50% of all solder joints. In a method of manufacturing the microelectronic package, regular solder (602) is dispensed on a plurality of conductive contacts (604) of a first substrate (600), no-remelt solder (620) is dispensed on another conductive contact (606) of the first substrate (600), and a second substrate (630) is bonded to the first substrate (600), forming the full IMC solder joint (640) from the no-remelt solder (620). The no-remelt solder (620) may be a TLPS (transient liquid phase sintering) paste, e.g., a solder paste that includes copper (Cu) particles together with tin (Sn) or tin alloy (such as Sn-Bi) particles dispersed in a flux system, such as an epoxy flux. The no-remelt solder (620) may have a higher melting point than the regular solder (602). The location of the full IMC solder joints (130A-B, 206A-D, 226, 640) may be selected to maximize mechanical stability both during downstream reflow (eliminating die or substrate movement, during multiple thermal processing steps (e.g., reflow steps) while forming hierarchical interconnections) and of the final package. For example, the full IMC joints (130A-B, 206A-D, 226, 640) may be formed in areas other than corners to prevent cracking. The full IMC (130A-B, 206A-D, 226, 640) joints may also be distributed (e.g., distributed uniformly) amongst the regular solder joints to increase stability during assembly in all areas between the substrates.