baber/WOPTO huggingface dataset:
Patent JP-S6033636-A (JP)
Title: Inferential device
Inventor: MURAKI KAZUSHI
IPC: G06N5/04
Filed: 1983-08-04
Abstract: PURPOSE:To obtain a high-speed inferential device for minimizing a rule storing capacity by using thesourus knowledge (associated knowledge regarding a similar conception), and generalizing a rule. CONSTITUTION:When conception names A, B and a relation name C are inputted to an inference operating mechanism 1 through data lines 011, 012 and 013, a rule storage mechanism 2 receives a rule number (n) serving as a command signal sent from a data line 121, sends out values of the first field and the second field in the rule number (n) to data lines 231, 232, respectively, and sends out a value of the second field from a data line 122. A thesourus storage mechanism 3 receives signals 131, 132 from the inference operating mechanism 1, and sends out a bit address 0/1 in an address of a signal 131, a signal from the data line 231, a signal 132 and a signal from the data line 232 in a bit array, from data lines 133, 134 respectively.
Patent JP-H01312159-A (JP)
Title: Clinker-built arris for transverse siding and manufacturing thereof
Inventor: MASUDA HIROSHI
IPC: E04F13/12
Filed: 1988-06-10
Abstract: PURPOSE:To prevent a split and a crack in a board caused by bending a thin metal plate by providing arc notches respectively to each of vertical angles of a cutting hole in the middle part of the thin metal plate and a horizontal bending edge forming notch provided to about the central part of a lower end edge. CONSTITUTION:Arc notches 5b and 11b are respectively provided to each of vertical angles 5a and 11a of a cutting hole 5 provided to about the central part of a thin metal plate (a) and a horizontal bending edge forming notch 11 provided to about the central part of a lower end edge. The thin metal plate (a) is such that both side edges thereof are bent from a longitudinal central part to a back side at a required angle to form a clinker-built arris body with about a V-section. According to the constitution, a bending work is made easily and the efficiency of work can be improved.
Patent JP-S5367441-A (JP)
Title: Electrophotographic fixing device
Inventor: KATOU TADASHI
IPC: G03G15/20
Filed: 1976-11-29
Abstract: PURPOSE: To prevent deterioration of an anti-tack elastic body, by heating a roller covered with the anti-tack elastic body with a plurality of heating rollers. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-2000331958-A (JP)
Title: Semiconductor-manufacturing device and method for forming barrier metal utilizing the same
Inventor: TAKAHASHI YOSHIKAZU
IPC: C23C16/44
Filed: 1999-05-24
Abstract: PROBLEM TO BE SOLVED: To prevent condensation of a feed gas with a simple process and to form a barrier metal film with stable characteristics by heat-insulating a pipe for introducing a feed gas from an accommodation chamber for accommodating a raw material evaporation source to a CVD chamber, using a heating means. SOLUTION: A pipe 16, for connecting a raw material supply source 13 for accommodating a raw material container 14 to a CVD chamber 3, is provided with a heat source 17 such as a heater. The heat source 17 controls the temperature in the approach pipe 16 to be the evaporation temperature or higher of a raw material and a reaction temperature or lower. More specifically, the heat source 17 provided at the approach pipe 16 is operated to heat-insulate the pipe 16 to a specific temperature. By providing the heat source 17 for preventing the condensation of the feed gas, that is introduced from the raw material supply source 13 to the CVD chamber 3 at the pipe 16, the feed gas can be stably supplied to the CVD chamber 13, thus forming a barrier metal film having stable physical properties by a simple process.
Patent JP-S62299033-A (JP)
Title: Manufacture of semiconductor device
Inventor: SAMOTO NORIHIKO
IPC: H01L21/3065
Filed: 1986-06-18
Abstract: PURPOSE:To reduce a gate resistance and a flinging capacitance between a gate and a source by employing a multilayer resist structure. CONSTITUTION:An organic or inorganic insulating layer 2, 1st resist layer 3, an intermediate layer 4 made of metal such as silicon oxide and 2nd resist layer 5 are successively formed on a semiconductor substrate 1. Etching is performed with a pattern formed by exposing and developing the 2nd resist layer 5 to form a predetermined pattern in the intermediate layer 4 and, further, an aperture is formed in the 1st resist layer 3 to expose the organic or inorganic insulating layer 2 and the semiconductor substrate 1 surface. Then the semicon ductor substrate 1 surface is etched or subjected to a surface treatment and coated with 3rd resist layer 6 and one side of the part above the 1st resist layer 3 is removed and, at the same time, an electrode metal layer 7 is formed on the exposed semiconductor substrate 1, the organic or inorganic insulating layer 2 and the intermediate layer 4 by a coating method with orientation applied from the above. Further, the unnecessary part of the electrode metal layer 7, intermediate layer 4, 1st resist layer 3 and organic or inorganic insulat ing layer 2 are removed.
Patent JP-H077859-A (JP)
Title: Battery charging and discharging circuit
Inventor: YOTSUTSUJI TAKASHI
IPC: H02J7/34
Filed: 1993-06-15
Abstract: PURPOSE:To provide a battery charging and discharging circuit which permits the use of an N-channel MOSFET transistor as a discharge switch and makes chargeable for an arbitrary charging voltage without using an insulation type step-up and step-down converter. CONSTITUTION:Assume that an external voltage be applied between + input & output terminal and-input & output terminal and a transistor Q3 be off. If a transistor Q1 turns on under that condition, energy is stored in a coil L1. If the transistor Q turns off, a capacitor C2 is charged by the energy stored in the coil L1 and a battery E is also charged. The control is possible in such a manner that the voltage of the capacitor C2 becomes constant and also a current flowing into the battery becomes constant. When the signal *ON is in a low level state, the transistor Q3 maintains ON state, a control circuit 3 stops its operation and the transistor Q1 maintains OFF state.
Patent JP-S631163-A (JP)
Title: Picture recording system
Inventor: UDAGAWA YOSHIRO
IPC: G03G15/01
Filed: 1986-06-19
Abstract: PURPOSE:To easily adjust the color balance later by providing a strage means storing an object image as a color image and a reference color foming means string a light of light source onto the storage means via plural color filters. CONSTITUTION:The titled system consists of a picture storage film 4 storing a picture electronically, a picture recording section 1 including an optical system exposing member or the like, a picture read section 2, a color filter array 8 and a fiber glass section 9 leading the light of light source. The storage medium 4 is moved intermittently and an optical image is recorded on the storage medium as a latent image one by one pattern and the light of light source led through the fiber glass 9 is recorded to a reference part REF after R, G, B, filters adjacent to the recording part by an optical image. In connecting a connector 202 of a recording/reproducing device 204 to a connector 3 of a camera 100 at the time of reading, an electron beam 5 emitted from an electron gun 23 is deflected in a beam scanning section 21 to scan the prescribed screen of the storage medium 4 by the electron beam 5.
Patent JP-2000337912-A (JP)
Title: Navigation equipment mounted on vehicle
Inventor: KAMIYA MASAHIRO
IPC: G08G1/0969
Filed: 1999-05-24
Abstract: PROBLEM TO BE SOLVED: To enable setting a destination by speech operation when the reading of destination is indistinct, in navigation equipment mounted on a vehicle. SOLUTION: In a navigation equipment 10 mounted on a vehicle provided with a speech recognition part 11 for recognizing speech inputted from an operator, and a navigation part 15 performing route retrieval of the destination on the basis of speech content recognized by the recognition part 11, the following are installed;  an indistinctness detecting means 19a for detecting that an indistinctness operation meaning the reading indistinctness of a destination is done by operator, an indicating means 19b for instructing the operator that position information around the destination is to be spoken when the indistinctness operation is detected by the detecting means 19a, and a destination specifying means 19c for specifying the destination on the basis of specific information containing at least position information around the destination which is recognized by the speech recognition part 11, from the speaking of the operator after the indistictness operation detection.
Patent JP-S632638-A (JP)
Title: Tool mounting/demounting device
Inventor: YAMAMOTO TAKEO
IPC: B23Q3/12
Filed: 1986-06-19
Abstract: PURPOSE:To enable smooth replacement of a tool by mounting both a subcylinder which presses a piston against a disc by the force weaker than the load of a clamping disk spring and a main cylinder which presses the piston against the disc by the force stronger than said spring load. CONSTITUTION:A small-diameter sub cylinder 41 and a large-diameter main cylinder 42, which are separated wetertightly, are mounded inside a cylinder case 21 coaxially. The driving force of the sub cylinder 41 is set weaker than the load of the spring of a clamping disk spring 18, stronger than the load of a clearance-maintaining disk spring 23, and can move the cylinder case 21. The friction force is generated by contacting both a piston 31 and a disk 16 with each other so that a main shaft 13 may be interrupted by the external force which turns the main shaft 13 by the effect of the friction between the change arm of an automatic tool replacement unit and a tool. The main cylinder 42 operates on the working oil supplied from a secondary oil supply port 42A to move the piston 31 and the disk 16 against the load of the clamping disk spring 18.
Patent JP-S5933544-A (JP)
Title: Display control system
Inventor: ABE SHINTAROU
IPC: G06F3/153
Filed: 1982-08-19
Abstract: PURPOSE:To improve the operability for data input and edition, by controlling the display of each character in a data buffer by a display device according to the value of attribute bit to each character only when the specific mode is set. CONSTITUTION:In turning off a mode designation switch, since another input 9 of an OFF circuit is increased to ''1'' level via a resistor 6, so that when the attribute bit value inputted from a data buffer 1 is either ''1'' or ''0'', an output 10 of an OR circuit 5 goes always to ''1'', and all characters in the buffer 1 are transferred to a display device 2 as they are. On the other hand, when a switch 4 is turned on, one input 9 of the circuit 5 is grounded to be at ''0'' level, then the level of the output 10 is displayed 2 through an AND circuit 4 only when the value of the attribute bit read out to the input 8 is ''1''.
Patent JP-H1070359-A (JP)
Title: Mounting of semiconductor device and mounting structure
Inventor: MARUYAMA HISANORI
IPC: H05K3/34
Filed: 1997-06-02
Abstract: PROBLEM TO BE SOLVED: To prevent a bridge from being generated when a solder cream is applied on a terminal by a method wherein the width of the cream, which is applied on the terminal on a printed board or the like, is made narrower than that of the terminal. SOLUTION: The relation of the width W of a terminal 2 to the width W1 of a solder cream 3 is set on the condition of W>W1 >=0.6W and at the same time, the coating amount of the cream 3 is lessened in the inside of the terminal 2 and is increased on the outside of the terminal 2. Thereby, when the cream 3 is applied on the terminal 2, not only the generation of a bridge is prevented but also the cream 3 is prevented from being drawn in the inside of the terminal 2 at the time of a reflow and a tail can be fully tailed to the end parts on the outside of the terminal 2. Accordingly, this method of mounting a semiconductor device is executed in the case where the device is mounted on a printed board or the like having terminals of various dimensions and shapes and is very effective.
Patent JP-S6034214-A (JP)
Title: Material clamper of clamp cutter
Inventor: NODA HARUO
IPC: B23D33/10
Filed: 1983-08-05
Abstract: PURPOSE:To process the front end and rear end of a material with a cylinder and improve the cutting efficiency by driving a stopper back and forth with the second cylinder and providing a fixed-size setter on a spindle. CONSTITUTION:This device 1 is provided facing a cutting section 2 constituted with a cylindrical, lower edge 28 and an upper edge moving up and down. This device 1 is provided with a spindle 4 longitudinally penetrating the fixed, first cylinder 3 and moving back and forth toward the lower edge 28. The second cylinder 11 is provided at the rear of a spindle 4 and is connected to a stopper 10. A fixed-size setter 22 is provided at a portion of the spindle 4 protruding backward from the first cylinder 3. The second cylinder 11 is driven forward and the distance between the stopper 10 and the lower edge 28 is shortened, then a material is inserted, and the upper edge 29 is lowered to cut it. A space between the stopper 10 and the lower edge 28 is expanded, and the rear end section of the material is discharged.
Patent JP-H1055181-A (JP)
Title: Automatic accompaniment device
Inventor: TOMIZAWA MIZUO
IPC: G10H1/38
Filed: 1997-06-02
Abstract: PROBLEM TO BE SOLVED: To make it possible to execute accompaniment according to the basic shape, rotational shapes, etc., of chords and to execute accompaniment with rapid response by determining the lowest tone from key touch information, determining pitch names exclusive of the lowest tone and the respective intervals of the lowest tone and selecting accompaniment patterns in accordance with the determined intervals. SOLUTION: The automatic accompaniment device 2 determines the lowest tone from the key touch information when >=3 keys of a key board 1 are pushed down. The device determines the respective intervals between the pitch names respectively corresponding to the key touches on the bases of the lowest tone. The accompaniment patterns different according to the basic shape and respective rotational shapes of the chord assigned by the key touches of the >=3 keys are stored in correspondence to the combinations of the intervals based on the lowest tone and the accompaniment patterns corresponding to the determined combinations of the intervals are selected. Then, the accompaniments different from each other are made executable by, for example, the basic shape, rotational shapes, etc., in spite of the same chords and the more diversified accompaniments are executable.
Patent JP-H04344533-A (JP)
Title: Data referring system from compiled code object in interpreter language
Inventor: HASHIMOTO YUKIKO
IPC: G06F9/45
Filed: 1991-05-21
Abstract: PURPOSE:To save a storing area space and to refer to the data from plural compiled machine language instruction in a language processing system equipped with an interpreter and a compiler such as an LISP. CONSTITUTION:The title system is provided with a coupling instruction means 16, an address storing table 7 to control data referred to from the machine language instruction string of a compiled code object, a data preparing means 14 constituted of a data preparing processing 12 to allot the data to a heaping area and an address storing table registering processing 12 to register the address of the data to the address storing table, and a data referring means 17 to share the data from the compiled code object and refer to them individually. The data referred to from the compiled code object can be shared and individually allotted.
Patent JP-S5571024-A (JP)
Title: Mark sensing method
Inventor: HAMAMOTO NOBUO
IPC: H01J37/304
Filed: 1978-11-24
Abstract: PURPOSE: To improve the S/N ratio of a binary notation signal by scanning a mark- presence region of a specimen by a chopped electron beam, amplifying the resultant signal, and inputting it into a band-pass filter which is matched with a fundamental frequency of sampling pulses.  
     CONSTITUTION: An electron beam 1 is chopped by sampling pulses, and the mark signal which is sensed by a sensor 4 is also chopped. The signal is amplified to a suitable level, which is not saturated, by a preamplifier 13, and input to a band-pass filter 14 with a narrow band-width (e.g. 1W5kHz) which is matched with the fundamental frequency of the sampling pulses. Then, the signal is input to a synchronized rectifier 15, and the envelope of the signal waveform is detected and compared with an appropriate thresh-old level 21, and the binary-notation signal of excellent quality is obtained by a comparator 19. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S624447-A (JP)
Title: Method for preventing liberization of impurity from strongly acidic cation-exchange resin
Inventor: SHIBAHARA KEIICHI
IPC: B01J39/00
Filed: 1985-07-01
Abstract: PURPOSE:To exclude impurities remaining in the title strongly acidic cation- exchange resin almost completely by bringing the regenerated strongly acidic cation-exchange resin into contact with heated water, adding an anion-exchange resin and immersing the mixture in demineralized water. CONSTITUTION:A strongly acidic cation-exchange resin is brought into contact with an excess soln. of a mineral acid and completely converted into a regenerated type (H type). The water heated at about 40-80 deg.C is brought into contact with the strongly acidic cation-exchange resin to dissolve impurities into the heated water. Then an anion-exchange resin in volume 0.5-2.0 times that of the strongly acidic cation-exchange resin is uniformly mixed and the mixture is immersed in demineralized water having <=1mus/cm conductivity. By such operations, the impurities remaining in the strongly acidic cation-exhange resin is almost completely discharged into the demineralized water. Accordingly, after the strongly acidic cation-exchange resin is separated by backwashing, etc., and sufficiently washed with water, the resin is supplied to respective uses.
Patent JP-H11336240-A (JP)
Title: Substrate structure of roof
Inventor: KIMIJIMA MINORU
IPC: E04B7/00
Filed: 1998-05-26
Abstract: PROBLEM TO BE SOLVED: To provide substrate structure of a roof capable of fixing a plurality of air-tight sheets provided on the surface on an indoor side of a thermal insulating material within a short period of time to continuously provide. SOLUTION: Sustrate structure of a roof is so constituted that a plurality of air-tight sheets 3, 3,... are fixed to an indoor side of a thermal insulating material 2 provided to a space between rafters 1 constituting the roof and are continuously provided to make heat insulation and air-tightness. Then, both ends of the adjoining air-tight sheets 3 and 3 are overlapped each other to lie between a bearing receiving member 4 fixed to the lower surfaces of the rafters 1 to bear the thermal insulating material 2 and continuously providing a fitting section 5 to the surface in a longer state in the direction at right angles to the rafters 1 and a longer holding member 7 having a fitted section 8 fitted to the bearing receiving member 4.  The bearing receiving member 4 and holding member 7 are fitted to each other, and the air-tight sheets 3 and 3 are connected and are continuously provided.
Patent JP-S63307400-A (JP)
Title: Production of radiograph conversion panel having glassy protective layer
Inventor: NITTA MASAAKI
IPC: G21K4/00
Filed: 1987-06-09
Abstract: PURPOSE:To enable use of the titled panel in a satisfactory state over a long period of time by forming at least one protective layer by coating and drying an org. solvent soln. essentially consisting of an org. silicon compd., then calcining the coating to form said layer as a glassy protective layer. CONSTITUTION:A stimulatable phosphor layer 12 is formed by a method such as vapor deposition on a base 11 consisting of quartz glass, etc. The soln. prepd. by dissolving the org. silicon compd. together with additives in the org. solvent is then coated on the phosphor layer 12 and is calcined after drying, by which the protective layer 13a is formed. RnSi(OH)4-n [where, R denotes a hydrogen atom, alkyl group, alkenyl group, aryl group; (n) is 1-4 integer], etc., are used as the org. silicon compd. The thickness of the glassy layer which is the protective layer 13a is preferably about 1-100mum. The moisture resistance of the panel is particularly improved and the use of the panel in the satisfactory state for a long period of time is enabled by constituting the panel in such a manner.
Patent JP-S62299222-A (JP)
Inventor: NISHIYAMA KIMINOBU
IPC: A47K10/30
Filed: 1986-06-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0236169-A (JP)
Title: Novel compound, its production and pharmaceutical composition containing the same
Inventor: SUTEFUAN ARAN SUMISU
IPC: C07D209/46
Filed: 1989-06-08
Abstract: NEW MATERIAL: A compd. represented by formula I [wherein Z 1 , Z 2 , Z 3  and C to which Z 1  and Z 3  are bonded form a 5-membered non-aromatic heterocycle, E is absent, (CH 2 ) n  or CH(CH 2 ) n-1  (n is 1-4), A is CONH, COO, S(O) r  (r is 0-2) or CH 2 , p is 0-2, q is 0 or 1, R 2  is H or OH when A is CH 2 , Ra and Rb are each H or a substituent, R 1  is CH 2 R 9  (wherein R 9  is an aryl or heteroaryl), R 2  is CH 2 R 10 R 11  (wherein R 10  is H or methyl and R 11  is an alkyl or aryl), R 3  is CH 2 R 12  (wherein R 12  is an alkyl or cycloalkyl) and R 4  is R 12 ].  
     EXAMPLE: 4-(S)-((2,3-Dihydrobenzofuran-2-carbonyl)-(S)phenylalanyl-(S)-leucyl) amino-5-cyclohexyl-3-(S)-hydroxypentanoic acid isobutylamide.  
     USE: A hypertension treatment drug.  
     PROCESS: For example, a compd. represented by formula II and a compd. represented by formula III are reacted to obtain the compd. represented by the formula I. 
     COPYRIGHT: (C)1990,JPO
Patent JP-S63109-A (JP)
Title: Semiconductor and manufacture thereof
Inventor: OGAWA MASAKI
IPC: H01L29/812
Filed: 1986-06-19
Abstract: PURPOSE:To enable the operation of a semiconductor device comprising an extremely minute structure without an influence of fluctuation of an impurity potential by providing a region where impurity atoms are substituted in lattice positions of the semiconductor or are placed in inter-lattice positions regularly. CONSTITUTION:Impurity atoms are doped only on atomic layers 2 which are laminated on every n-atomic layers (n-atm. L), wherein (n) is an integer. In the arrangement of impurity atoms 3 on the atomic layer 2 doped with impurity atoms, the position of a component element is on an intersection of a longitudinal line and a lateral line and the impurity atoms are positioned in their substituted positions only m-atomic intervals (m-atm. I) distant from one another in both longitudinal line and lateral line. Right above and right under each impurity atom, an impurity is arranged in a distance of only n-atomic layers. Accordingly, the positions of the impurity atoms of a semiconductor 1 are wholly regular to the positions of the component atoms,and electrons in the semiconductor move while sensing not only a potential of the regular component elements, but also a similarly regular impurity potential. Consequently, the relation of energy dispersion of the electrons is determined strictly and positively, and the electrons do not exist locally.
Patent JP-S58135192-A (JP)
Inventor: IGUCHI SHIROU
IPC: C05F7/00
Filed: 1982-08-23
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。