Patent GB-792294-A (GB)
Title: Improvements in or relating to intelligence storage equipment
Inventor: RIDLER DESMOND SYDNEY
IPC: G11B20/14
Filed: 1954-12-31
Abstract: 792,294. Digital data storage. STANDARD TELEPHONES & CABLES, Ltd. Dec. 31, 1954, No. 37788/54. Class 106 (1). In a magnetic drum storage system for intelligence, the elements of which may have any one of a plurality of values, the patterns of magnetization representing the various element values consist of different numbers of reversals of orientation of the magnetization. The number of reversals may, for example, be one, two, and three, respectively, for the values 0, 1, 2, when storing ternary numbers, or one and two to represent the digits 0, 1 for binary numbers. Writing, Figs. 1, 2. A binary input waveform (line 1, Fig. 1), derived from a bistable trigger device RR is gated at G1 by anti-clock pulses (line 2, Fig. 1). The resultant information pulses (line 3) are mixed with clock pulses (line 4) at G2, the output of which (line 5) controls a bi-stable device WR cross-gated to function as a binary pair. The WR output (line 6) shows a single reversal of polarity for each zero digit and' two reversals for each one " digit and is recorded on the drum MD. Reading, Fig. 3. The corresponding output from the read-head RH which is the differential of the recorded waveform (line 6) is indicated at line 7, Fig. 1. It is amplified and then squared at SQ (line 8) and from this waveform the recoring waveform (line 6) may be derived if desired, e.g. for immediate re-recording, by integration and squaring. Where the input wave (line 1) is to be reconstituted, however, the squared output (line 7) is fed to a phase-splitter PS which yields both the line 8 output RA1 and its inversion RAO. Both waveforms RA1, RAO are fed through one element delays D1, D2 to produce waveforms RD1 (line 9), and its inversion RD0. Waveforms RA1, RD1 (lines 8, 9) are compared at clock pulse time (line 10) and if both are positive or both negative an information pulse is generated (line 11). If they differ in polarity no pulse is produced. These information pulses are derived by comparing both the RA1-RD1 and the RA0-RD0 waveforms in "and" gates G8, G9 at clock pulse time, and the inverse form of the information pulses (line 12) is similarly derived in gates G10, G11 by comparing, both RA1-RD0 and RD1-RA0 waveforms. The bi-stable device RO, Fig. 3, is thus set to R1 when the RA, RD waveforms are similar at clock pulse time and to RO when these waveforms (line 13) differ in polarity. Reading, Figs. 4, 5. In this arrangement the number of reversals of waveform 8, Figs. 1, 4, during each element time are counted. The outputs from the phase-splitter PS are differentiated (line 14, Fig. 4) and mixed at MG to give the output 15 which is fed to three " and " gates G13, G14, G 15 controlling respectively the elements 1, 2, 3 of a four-unit counter RC. The counter is set to RCO, e.g. by reset pulses, which may be the clock pulses (line 16), slightly before the start of each time element, Fig. 4, and, as the gates G13, G14, G15 are controlled, respectively, by the counter elements RC0, RC1, RC2, the counter elements RC1 or RC2 is left operated at the end of an element time according to whether one pulse corresponding to zero or two pulses corresponding to " one " have been counted. The next clock pulse opens gate G16 or G17 to pass an output pulse over the appropriate line prior to resetting the counter to RC0. Should RC0 or RC3 be operated when the resetting clock pulse occurs a fault exists and an alarm is given. Writing, Figs. 6, 7. Here a binary number (line 1A) is converted for recording into the waveform 2A in which the 1 and 2 reversals for the digits 0, 1, respectively, occur during the times of the respective digits. The zero pulses from RR0, Fig. 7, gate anti-clock pulses at G21. The " one pulses from RR1 gate P pulses, Fig. 6, occurring at one-quarter and three-quarter digit time, at G20, the outputs of G20, G21 being mixed and controlling through a cross-gated arrangement as in Fig. 2, a binary pair WR whose output gives the recording waveform (line 2A.). Reading, Fig. 6. The reading head waveform (line 3A) is squared (line 4A) differentiated and mixed as in Fig. 5, the resultant pulses (line 5A) being compared in a coincidence gate with anti-clock pulses (line 6A) to produce pulses (line 7A) at the mid-point times of the " one " digits of the original signal (line 1A) which is reconstituted (line 8A) through a bi-stable circuit. Ternary recording, Figs. 8, 10. The digits of a ternary number 1022001 (line 20) are set up in turn on a tri-stable device TC, Fig. 10. The output of the one element thereof, TC1, opens a gate G30 to anti-clock pulses (line 22) and the two element TC2 output opens a further gate G31 to X2 pulses (line 23). The two gate outputs are mixed at G32 to produce the waveform (line 24) which controls a binary counter, the output of which (line 25) gives one, two and three reversals, respectively, for the zero, one and two digits, and is recorded. Read-outmay be effected, Fig. 11 (not shown), by an arrangement similar to that of Fig. 5 for counting the reversals during each digit time. The anticlock and X2 pulses may be derived from clock pulses recorded on the drum, Fig. 9 (not shown), by squaring, phase-splitting, differentiating and delaying,