Patent GB-1007953-A (GB)
Title: Analog multiplier
Inventor: MIURA TAKEO
IPC: G06G7/164
Filed: 1962-10-04
Abstract: 1,007,953. Electric analogue calculating. KABUSHIKI KAISHA HITACHI SEIZAKUSHO. Oct. 4, 1962, No. 37572/62. Heading G4G. An arrangement in which multiplication of two input signals x and y is carried out comprises a squaring circuit which produces an output,proportional to (x + y)<SP>2</SP> when supplied with inputs x and y, two further squaring circuits which produce outputs in proportion to' x<SP>2</SP> and y<SP>2</SP> when supplied with inputs x and y respectively and a subtracting circuit, the circuits being assembled so that multiplication is carried out in accordance with the relation xy = (x + y)<SP>2</SP> - x<SP>2</SP>/ 2  - Y<SP>2</SP>/2-  A circuit A (Fig. 2) for producing the output   (x+y)<SP>2</SP>/2 consists of an arrangement of n diodes D 1 -D n  each of which has three resistances connected to its input. One of these resistances, in the series Rb 1 -Rb n  is connected to the output terminal of a potentiometer in the corresponding series P 1 -P n  fed from a voltage supply -E.-The second, in the series Rx 1 -Rx n , is supplied from the x input and the third, in the series Ry 1 -Ry n , is supplied from the y input. The outputs from the diode arrangement are connected together and applied to the input of a high gain amplifier H across which is a feedback resistance Rf. If the circuit through the first diode D1 only is considered and Ry 1  is made equal to Rx 1 , an output voltage l 0  from the amplifier will be obtained,   given by l 0  =Rf/Rx1-(x+y)+Rf/Rb1b i , where b 1  is Rx 1  Rb 1  the voltage setting of the potentiometer P1. This gives a linearly increasing negative voltage of slope and intercept determined by the input resistances and the bias voltage provided X + Y> 0 If a number of such circuits, each associated with one of the diodes D 1 -D n , are combined together then a broken line output characteristic approximating to any desired function may be obtained, and in particular the function (x +y)<SP>2</SP> may be approximated by making the corresponding input resistances in the series Rx 1 -Rx n  and Ry n -Ry n  respectively equal, making the resistances Rb 1 -Rb n  to be the same and setting the bias voltages b 1 , b 2 ... b n  to voltages at constant intervals in sequence. Such a circuit A may be used only when the input sum x+y is positive. By reversing the diodes D 1 -D n  and the polarity of the bias voltage source E a circuit A1 may be obtained wherein the sum of the inputs must be negative for correct operation. By combining the two circuits A and A1 in parallel all possible input conditions can be allowed for. Similar arrangements B and B1 for deriving the functions X<SP>2</SP>/ 2  and y<SP>2</SP>/2 may be set up by omitting unnecessary input resistors in the circuits A and A1. The arrangements A and A1 and two of each of the arrangements B and B1 are combined as shown in Fig. 5 with the inputs x and y both fed to the stages A and A1 and each fed individually to one of the stages B and one of the stages B 1. The outputs from those stages which respond to positive going input sums are connected together on one line l 1  and the outputs from the stages responding to negative going input sums are connected together on a second line l 2 . These two lines feed a high gain amplifier H1 provided with both positive and negative input terminals arranged such that the amplifier output is of the same sign as the input to the negative terminal or of the opposite sign as the input to the positive terminal. The amplifier is provided with a feedback resistance Rf and provides an output proportional to - xy. A suitable operational amplifier consisting essentially of a magnetic amplifier with two opposed control windings is briefly described.