Patent GB-819641-A (GB)
Title: Improvements in or relating to calculating apparatus
Inventor: DUKE KEITH ALBERT
IPC: G06F7/52
Filed: 1955-11-16
Abstract: 819,641. Digital-electric-calculating apparatus. INTERNATIONAL COMPUTERS & TABULATORS Ltd., [formerly BRITISH TABULATING MACHINE CO. Ltd.]. Nov. 2, 1956 [Nov. 16, 1955], No. 32781/55. Class 106 (1). The invention provides apparatus designed to   make calculations of the form A Î B / C, where C   is in the same notation as either A or B and the other may be different, e.g. a money amount. The halving and doubling method is used; multiplication being effected by reducing one of the factors to unity by a series of halving steps and increasing the other factor by corresponding doubling, this doubled factor being accumufated whenever the halved factor is odd to give ! the final result. Division is effected by doubling the divisor until it exceeds one half of the dividend, the number of doubling steps being counted on a binary scale. The doubled divisor is then subtracted and the remainder reduced by repeatedly halving the doubled divisor and subtracting it when a positive remainder would be left, the binary scale count of all the divisors subtracted then gives the answer. These two processes are combined and performed simultaneously. A preliminary operation of doubling the divisor until its exceeds half the dividend is first performed. According to the invention the apparatus comprises stores 1, 2, 3, 4 for the dividend (B, e.g. a number), multiplier (A, e.g. a money amount), divisor (C, a number) and result (a money amount) respectively, transfer means between stores, an adder-subtractor, means to double a value in the dividend store 1, means to halve the value in the multiplier store 2, means detecting the sign of the value in the dividend store 1 and means controlling the operation of the transfer means, the adder-subtractor and the halving and doubling means in a cyclic manner so that in an initial cycle the value in the divisor store is subtracted from the value in the dividend store and in each subsequent cycle, if the sign is initially positive the value in the multiplier store is halved and the value in the dividend store is replaced by the difference between the value in the divisor store but if the sign is negative the value in the multiplier store is halved and the value in the dividend store is replaced by the sum of the value in the divisor store and twice the value in the dividend store. By this means multiplication and division are performed simultaneously to form the final result value by successive entries into the result store. An arithmetic unit, Fig. 1, is used similar to that described in Specification 767,691. Each of the stores 1, 2, 3, 4 consists of four shifting registers, each corresponding to the binary components 1, 2, 4, 8 of the values stored therein. The adder 5, coinpiementer 6, doubler 7 and halver 8 are described in the prior Specification. The operation of the unit will be described with reference to an example:   ú4 - 2 - 6 Î 22/3. As a preliminary step the diviser 3 is doubled to bring it to a value exceeding half the dividend 22. Such a value would be 12, but since the detector which responds to the divisor exceeding half the dividend operates only on the most significant digit a further doubling is effected to bring the divisor to 24 and the multiplier correspondingly to ú33. The divisor of 24 is subtracted from the dividend 22 giving a remainder of - 2. Since this is negative, the multiplier 33 is not entered and the divisor 24 is added to double this remainder giving 20 and accordingly the multiplier halved (i.e. ú 16-10-0) is entered as a partial result. The remainder 20 is doubled to 40 and since it is positive the divisor 24 is subtracted leaving 16 and the halved multiplier ú 8-5-0 is added to the partial result. The remainder 16 is doubled again, giving 32, the divisor 24 is subtracted again giving a remainder of 8 and the multiplier ú4-2-6 is added into the partial result giving a total of ú 28-17-6. When the divisor 24 is again subtracted from the doubled remainder 16, a negative remainder of - 8 is obtained so that the halved multiplier ú2-1-3 is not added to the partial result. In the next step, since the doubled remainder is negative, the divisor 24 is added to it giving a new remainder of + 8. The halved multiplier of ú1-0-7.5 is therefore added to the partial result, giving a total of ú29-18-1.5. The last two steps, giving remainders of - 8 and + 8 in turn repeat indefinitely the halved multiplier being added to the total each time the remainder is positive, i.e. on alternate steps. The total increases progressively: ú 30-3-3.375, ú 30-4-6.86875, ú 30-4-10.7421875, becoming closer and closer to the exact result of ú30-5-0. The need for a large storage capacity is avoided by rounding off the result which is conveniently near the exact answer, e.g. the next total ú 30-4- 11.708046875. Circuit.-For the preliminary step of making the divisor at least half the dividend, the divisor 3 is entered in store 1, Fig. 1, the multiplier ú 2-4-6 in store 2, the dividend 22 in store 4 and the calculation is carried out in five stages. In stage 1 the contents of store 2 are tested to ascertain whether they exceed more than half the maximum capacity of the store 1 and the contents of stores 1 and 4 are tested to ascertain whether those of store 1 exceed one half those of store 4. If the contents of store 2 are not more than half capacity and the contents of store 1 do not exceed half the contents of store 4, the contents of stores 1 and 2 are doubled and re-entered as many times as are needed to produce the necessary excess. If store 2 is more than half filled before the excess is achieved, the machine is incapable of handling the problem and a warning is given. Otherwise the machine passes on to stage II in which the contents of store 1 are put into store 3 by opening gates 15 and 13 causing the contents to pass via highway 23, adder 5 and highway 10 into store 3. In stage III the contents of store 3 are subtracted from those of store 4 and the remainder is entered in store 1. This is effected by opening gates 20, 18, 11 so that the contents of store 3 pass via highway 24, through complementer 6 (which is rendered active by a signal on line C6) and adder 5 at the same time as the store 4 contents pass via highway 23 through adder 5. These values are thereby subtracted and the remainder passes via highway 10 through gate 11 to store 1. In stage IV the control circuit is prepared for the following stage which involves two steps. In stage V store 1 is checked to test whether its contents are positive or negative and if negative the contents of store 2 are entered in store 4 and at the same time halved and re-entered in store 2. The contents of store 3 are subtracted from double the contents of store 1 and the result entered in store 1. These operations are performed separately in two parts of a cycle. If the contents of store 1 are positive the contents of store 2 are halved in the first part of the cycle and in the second part are added to twice the contents of store 1 and the result entered in store 1. This is effected by opening gates 11, 19, 20 and rendering the complementing device inactive. These operations are repeated until the contents of store 1 are reduced to zero or until a sufficiently close approximation is achieved. The control circuit for these five stages consists of a chain of five triggers connected as a shifting register so as to be set in turn. Each trigger when set controls the routing of data appropriate to the stage as described by opening certain of the gates 11-20 by signals on lines C11-C20. The setting of the triggers is governed by detectors which determine what relationship exists between the contents of the stores as previously described. Lines C1, C2 and C4 from stores 1, 2 and 4 are connected to the detectors for this purpose. Specifications 767,692 and 780,431 also are referred to.