Patent GB-839243-A (GB)
Title: Improvements in or relating to data storage equipment
Inventor: BIRD RAYMOND
IPC: G06F12/0866
Filed: 1955-08-19
Abstract: 839,243. Electronic dividing apparatus. INTERNATIONAL COMPUTERS & TABULATORS Ltd., Aug. 17, 1956 [Aug. 19, 1955], No. 23950/55. Class 106 (1). In a calculating apparatus, there are two stores, a main store, which is a magnetic drum, and an auxiliary store, a shift register, and each has read-out means controlled by a stored instruction, the instruction to read-out the main store being rendered ineffective when there is an instruction to read-out the auxiliary store. The apparatus described is for performing division by repeated subtraction (see Specification 839,241). The input to the device is from the magnetic drum 2, Fig. 1, instruction words and operand words being selectively read out in the performance of a calculation and entered in a number of shiftirg register stores 16, 17, 18, 19, 20, each of one-word capacity, for use during the process of calculation. The performance of an instruction may involve reading out either from the drum or from one of the registers. The control means are therefore arranged to condition the apparatus to select a word from an address on the drum in obedience to an instruction registered in the control means, unless there is also a signal in a storage position in the control register for a second storage address which, when present, may render effective the transfer path from one of the registers and block the transfer path from the drum. The magnetic drum 2 has a number of reading heads 1, a head 5 providing clock pulses and a head 7 providing a synchronization pulse. The track to be read is selected by a unit 3 which has a tree of relay contacts, the relays of which are controlled by the control register 16 through lines 33. The output from the selection unit is passed through amplifier 4 and gates 9 and 10 to the input trigger 11 of the registers. There are sixteen forty-digit words on each track of the drum, the particular word required being selected by its address number. This address is set up in a group of the control register stages and applied on lines 34 to a multiple coincidence gate 35, Fig. 2. The clock pulses from head 5 are applied to a counter 23 which counts up to forty and gives an " end of word " pulse which is passed to a counter 24. The counter 24 is arranged to register the serial number of the word next to be read. This number is applied on lines 36 to the gate 35 which opens when the serial number coincides with the address number to cause the selected word to be entered into one of the registers. The control register 16 and the other registers 17, 19, 20 are connected to highway 21 through input gates 12, 13, 14, 15 which may be opened to allow the words read to pass into the registers, the digits being moved along by shift pulses applied in the usual way. A word entered in a register is thereafter available both from the drum and from the register and the instruction in the control register determines the location from which the number is to be read. If it is to be from the register, the drum circuit is blocked. The instruction registered in the control register has a signal in the first position if the number required is in the Q register 19 and in the second position if the required number is in the B register 20. Such an indication is applied over lines 64 or 65 to gates 66 or 67 (Fig. 2) respectively. At the end of a word a pulse is sent through gate 31 (which is opened by control trigger 27) to gates 66, 67 and the gate opened by the signal on lines 64 or 65 passes the pulse to switch an associated memory trigger Q.M.F.F. or B.M.F.F. The output from these triggers is applied to a gate 70 and also through diodes 82 to line 78 so that when either trigger is set the voltage on line 78 changes, this signal being inverted in amplifier 79 and applied on line 80 to close gate 9, Fig. 1. Read out from the drum is thereby blocked and the required number is read out of the B or Q register as follows :-If the B.M.F.F. trigger 69 is set the right-hand side of gate 70 opens to pass a signal through amplifiers 71 to lines P25, P21 and P23, thereby opening the gates 76, 77 and applying shift pulses to the B register. The contents of this register are thereby circulated through gate 76 and passed through gate 77 to the subtracting circuit 62. Read-out from the Q register is effected in a similar way by the Q.M.F.F. trigger 68. Specification 738,269 also is referred to.