baber/WOPTO huggingface dataset:
Patent TW-364870-B (TW)
Title: Electric razor
Inventor: HOYA YOSHIAKI
IPC: B26B19/04
Filed: 1998-03-25
Granted: 1999-07-21
Abstract: A kind of electric razor which comprises a plurality of arched outer blades in rows with flexibility on the shaved skin and a plurality of arched inner blades for slipping the inner face of outer blades. Most of rows of arched outer blades are composed of rough shaving arched outer blades at the net blades openings and the finish shaving arched outer blades at the openings of finish shaving. The outer blades of rough shaving and finish shaving are flexible according to the shape of the skin and the rough blades are flexibly protruded than the finish blades.
Patent TW-386321-B (TW)
Title: I/O buffer capable of withstanding input voltage higher than power voltage
Inventor: HUANG JIN-CHENG
IPC: H03K19/003
Filed: 1998-04-14
Granted: 2000-04-01
Abstract: An I/O buffer capable of withstanding an input voltage higher than a power voltage, uses an N-type transistor turn-on to turn on a P-type transistor in order to directly supply a power voltage to a floating N-well to avoid latch up when the buffer is at an input mode and the input voltage of the I/O pad is decreasing from high to low; and uses another N-type transistor turn-on to transmit a control signal to the transmission gate of an output transistor to maintain a complete turn-on state when the buffer is at an output mode, such that there will be no overlong output delay or the formation of short-circuit current during a switching of output.
Patent TW-393359-B (TW)
Title: Spinneret manufacturing process via molding
Inventor: CHENG YAU
IPC: B23P23/00
Filed: 1998-04-30
Granted: 2000-06-11
Abstract: The uniformity and consistency of capillary holes is very important in manufacturing spinneret. For this reason, high precision machining was used to fabricate the mold insert. The spinneret were then electroformed from the molded structure for mass production. The lifetime of spinneret could be enhanced by hard coating technique. The manufacturing processes of spinneret, including lithography, molding and assembling, were proposed in this patent. The mold can also be made by other process, such as electric discharge machining (EDM), laser machining, or plasma etching.
Patent TW-399327-B (TW)
Title: The manufacturing method of DRAM capacitor
Inventor: GUNG JENG-JR
IPC: H01L21/8242
Filed: 1998-06-09
Granted: 2000-07-21
Abstract: This manufacturing method of DRAM capacitor includes forming the transistor on the substrate of the semiconductor. Then, the first oxide is formed to cover the field effect transistor and the semiconductor substrate. The first contacting via, which is exposed to the drain region of the field effect transistor, is formed on the first oxide. Then, a bit line fills in the first contacting via and connects to the drain region of the transistor. The third oxide, which covers the second oxide, is formed. It, in turn, forms the second contacting via and is exposed to the drain region of the field effect transistor. The first poly-crystal silicon layer, which covers the drain region exposed by the second contacting via, is formed. The drain region has original oxide layer. The original oxide layer uses high dose ion implantation method. The second poly-crystal silicon layer, which covers the first poly-crystal silicon layer, is formed. The proceeding process then forms the capacitor.
Patent TW-385589-B (TW)
Title: Timing signal control method and device
Inventor: SAEKI TAKANORI
IPC: G06F1/06
Filed: 1998-06-12
Granted: 2000-03-21
Abstract: This invention is to provide a timing signal control method and its device where high speed property is realized and also which are used as a variable delay circuit; for achieving above-mentioned purpose, data of a multiplying number deciding code 12 and an external timing signal 7 are inputted from the outside, the operation range of a multi-phase clock multiplying circuit 2 is adjusted by a control signal 11 from a frequency detecting circuit 6, a multi-phase clock 8 obtained by frequency-dividing the external clock by a frequency divider 1 is inputted to the multi-phase multiplying circuit 2, a clock pulse is divided into N-number phase clock 9 in a number which is designated by the multiplying number deciding code 12 and, moreover, synthesis is executed in a clock synthesizing circuit 5 so that a multiplying clock 10 is outputted.
Patent TW-434213-B (TW)
Title: Preparation and purification of 3-(4-hydroxyphenyl)-1,1,3-trimethylindan-5-ol
Inventor: WESTERNACHER STEFAN
IPC: C07C39/17
Filed: 1998-06-18
Granted: 2001-05-16
Abstract: The present invention relates to a process for the preparation and purification of 3-(4-hydroxyphenyl)-1,1,3-trimethylindan-5-ol by isomerisation of isopropenylphenol, its dimers or oligomers or mixtures thereof and subsequent distillation of the reaction mixture.
Patent TW-438904-B (TW)
Title: Leak-detecting apparatus of semiconductor process
Inventor: YANG JIUE-SHENG
IPC: C23C16/54
Filed: 1998-12-14
Granted: 2001-06-07
Abstract: In the leak-detecting apparatus of semiconducor process, a O-shape ring combined with the chamber lid closely, and a pressure gauge is mounted on the detecting hole of the leak-detecting apparatus. After drawn the air out in the entire chamber lid and the leak-detecting apparatus. In case that it's provided an certain pressure of helium by the outside, the air pressure detected by the pressure gauge should be approach to vacuum.
Patent TW-513656-B (TW)
Title: Handwriting information processing system comprising a character segmentation user interface
Inventor: TANG DONALD T
IPC: G06F3/0487
Filed: 1999-03-25
Granted: 2002-12-11
Abstract: The invention discloses a handwriting information processing system that consists of handwriting information input device and handwriting information recognition device. The handwriting information input device and handwriting information recognition device jointly works for receiving user's handwriting input and performing recognition toward user's handwriting input. The handwriting information processing system is characterized by including a character segmentation user interface to receive the definition of text/graphics area, writing row and character boundary.
Patent TW-384333-B (TW)
Title: Process of building embankment protection
Inventor: WU SHANG-HUA
IPC: E02B3/04
Filed: 1999-03-26
Granted: 2000-03-11
Abstract: The present invention relates to a construction process to build protection structure for embankments. Trenches have to be dug along the side of embankments. An adequate numbers of drawn-out bags filled with concrete are placed one by one in the trench, and two adjacent bags are connected by a fastener. And, other bags are filled with concrete and sequentially placed upon the base bags. Adjacent bags are also connected by fasteners, and anchor studs are punched through bags vertically to force the bags to stick on the body of embankment. After concrete in bags are naturally hardened, the effective and easy-to-build embankment structure is thereupon formed.
Patent TW-474863-B (TW)
Title: Polishing apparatus
Inventor: KIMURA NORIO
IPC: B24B37/005
Filed: 1999-04-06
Granted: 2002-02-01
Abstract: The present invention relates to a polishing device for polishing a workpiece such as a semiconductor wafer to a flat mirror finish. The polishing device featured with a turntable (5) with a polishing cloth (6) mounted on it and a top ring (1) for polishing a semiconductor wafer (4) to a flat mirror finish by placing the semiconductor wafer (4) between the turntable (5) and the top ring (1) and pressing the semiconductor wafer (4) under a certain pressing force, characterized in that a presser ring (3) is vertically movably provided around the top ring (1) having a recess for accommodating the semiconductor wafer (4), pressing means (22) is provided for pressing the presser ring (3) against the polishing cloth (6) under a variable pressing force, and the presser ring (3) is supported by the top ring (1) through a bearing (37).
Patent TW-425701-B (TW)
Title: Manufacturing method of stack-type capacitor
Inventor: LUO JI-JIN
IPC: H01L21/02
Filed: 1999-04-27
Granted: 2001-03-11
Abstract: This invention is about the manufacturing method of stack-type capacitor, in which the trench line and contact window of double damascene technique are applied. The trench line and the contact window are formed in a dielectric layer. Multi layers of amorphous silicon with different doping concentrations are conformally formed on the inner sidewalls of trench line and contact window in order to be used as the lower electrode of capacitor having double-sided and double crown structure. After finishing the growing process of hemi spherical grain on the lower electrode surface of capacitor having double-sided and double crown structure, a phosphine gas processing procedure is performed to increase the doping concentration of lower electrode surface of capacitor. Additionally, during the formation of amorphous silicon layer with double-sided and double crown structure, the chemical mechanical polishing process using polysilicon as the grinding agent is used. Because the polishing selection ratio between amorphous silicon and silicon nitride is very large for polysilicon grinding agent, the end point of polishing can be easily detected such that wafer uniformity after polishing can be improved simultaneously.
Patent TW-461804-B (TW)
Title: Method for testing specimen and device therefore
Inventor: LIOU YUNG-SHIANG
IPC: A61B10/00
Filed: 1999-02-03
Granted: 2001-11-01
Abstract: The present invention relates to a method for testing a specimen and a device therefore. The method comprises: using a sheet material to form a base; laminating water absorbent materials on the two ends of one surface of the base, in which a test paper is connected between the two water absorbent materials, and the test paper is pre-implanted with antibodies or an antigens. The tested specimen can be dripped on one of the water absorbent materials on the base and flows through the test paper to bind with the antibodies or antigens thereon for performing an immunization test by the antigen or antibody. Furthermore, a chemical assay reagent can be dripped on the water absorbent material of a specimen under test to generate a function of a chemical measurement function. Such that one device can be used not only for immunization test but also for chemical measurement, thereby achieving two functions and increasing the value of a single specimen measurement device.
Patent TW-505555-B (TW)
Title: Wafer chemical mechanical polishing process
Inventor: WANG GUO-JEN
IPC: H01L21/304
Filed: 1999-08-18
Granted: 2002-10-11
Abstract: This invention provides a wafer chemical mechanical polishing process, in which the wafer chemical mechanical polishing process is divided into two stages. The key point of the first stage is the removal rate, while the key point of the second stage is the non-uniformity of the wafer surface. Different manufacture parameters are given for the two stages, respectively to comprehensively achieve optimization of the wafer chemical mechanical polishing process.
Patent TW-461920-B (TW)
Title: Method of producing reduced iron and production facilities therefor
Inventor: FUJIOKA HIRONORI
IPC: C21B13/14
Filed: 1999-08-24
Granted: 2001-11-01
Abstract: Several methods and production facilities are provided in order to solve several problems encountered in conventional methods and facilities for producing reduced iron by reducing raw material pellets of a mixture of an iron oxide powder and a reducing material powder in a rotary bed-type reducing furnace and by melting the reduced iron in a sealed-type electro-blast furnace. Re-oxidation of reduced pellets of the mixture pellets is prevented by introducing into a rotary bed-type reducing furnace a reduced gas generated in an electro-blast furnace. In addition, an improved mechanical strength of reduced pellets after direct reduction is attained by applying rolling action to the reduced pellets. A few method and facilities are provided for reliable utilization of wet mixture pellets and a preferable compositions of binders for forming the raw material mixture are selected. A novel charging device for charging raw material pellets is developed which is capable of charging the pellets on the rotary bed as a uniform layer formed by piling one or more pellets.
Patent TW-494327-B (TW)
Title: Computer-implemented product development planning method
Inventor: CHERNEFF JONATHAN M
IPC: G06Q10/00
Filed: 1999-11-01
Granted: 2002-07-11
Abstract: A computer-implemented system (10) for product development planning. The system (10) models a business enterprise in terms of its proposed products and the tasks and resources used to develop them. A optimizing engine comprised of a genetic algorithm (13) and a constraint engine (14) operates on the model to construct candidate product portfolios and schedules. Each schedule is evaluated and used to generate an ""improved"" candidate portfolio in accordance with genetic processing. This process continues to improve the product prioritization and pipeline schedule as measured in terms of an objective criterion such as profit maximization.
Patent TW-483254-B (TW)
Title: Delay circuitry, clock generating circuitry, and phase synchronization circuitry
Inventor: HAYASE KIYOSHI
IPC: H03K5/13
Filed: 1999-10-02
Granted: 2002-04-11
Abstract: The subject of the present invention is to prevent from having difficulty and inability for arbitrarily changing delay time, in which the variation of delay time is caused by the difference of fabrication process and by the variation of environment. The solving means is described below. The invention includes the register 19 and the multiplexer 12. The register 19 is used to store data for setting the determined delay time. The multiplexer 12 is provided with plural inverters 20 used for plural delay devices. Delay time of each inverter 20 is controlled by the control signal from PLL 9 (phase-locked loop 9). In addition, according to the information stored in the register, the number of inverters through which an input signal passing through the inverter 20 is changed so as to provide the input signal with the predetermined time delay.
Patent TW-424293-B (TW)
Title: Vacuum processing apparatus with low particle generating wafer holder
Inventor: JELINEK VACLAV
IPC: H01L21/687
Filed: 1999-10-29
Granted: 2001-03-01
Abstract: A wafer holder (20) is provided for semiconductor wafer processing that is particularly useful where wafers are held and moved in other than upwardly facing orientations during bandling and processing. The holder includes an annular wafer mounting ring (12) that is resiliently mounted to and biased against an annular wafer holder housing (11). A set of latches (20) is pivotally mounted to the mounting ring. The latches are formed of non-metallic latch bodies (31) and have non-metallic front and back rollers (35, 36) thereon which have rolling poripheries (37, 39) that roll over the surface of the mounting ring, along a circular path on which are formed spherical detents (42-44). The rolling peripheries of the rollers conform to the curvature of the detents. The front roller also has a gripping  periphery (40) at the outer edge thereof that rolls onto the edge of a wafer held in the holder against the edge of the mounting ring. The mounting ring forms a seal with the backplane of the processing apparatus to prevent plasma from forming around the latches. The mounting ring also registers against a stop to space the wafer from the backplane to protect the device side of the wafer when backside wafer processing is being carried out.
Patent TW-487743-B (TW)
Title: Plasma etching of silicon using fluorination gas mixtures
Inventor: CHINN JEFFREY
IPC: C23F1/12
Filed: 2000-02-25
Granted: 2002-05-21
Abstract: A method of etching silicon using a gas mixture comprising fluorine (F) and oxygen (O). A fluor-hydrocarbon gas is also used to provide added flexibility for profile and dimension control in the silicon trench. The method is applied to trench etching in a silicon substrate, and results in an etch rate exceeding about 1 μm/min. with a photoresist selectivity as high as about 9:1. The method can also be applied to etching doped or undoped polysilicon or amorphous silicon.
Patent TW-I235127-B (TW)
Title: A container
Inventor: MELROSE DAVID MURRAY
IPC: B65D90/02
Filed: 2000-02-24
Granted: 2005-07-01
Abstract: A container (1), suitable as a hot-fill container, includes a controlled deflection flex panel (3) which may invert and flex under pressure, such as hot-fill conditions, to avoid deformation and permanent buckling of the container (1). The flex panel (3) includes an initiator portion (8) which has a lesser projection than the remainder of the flex panel (3) and initiates deflection of the flex panel (3).
Patent TW-434799-B (TW)
Title: Method to form shallow trench isolation
Inventor: JANG SYUN-MING
IPC: H01L21/76
Filed: 2000-03-21
Granted: 2001-05-16
Abstract: The present invention discloses a method to form shallow trench isolation, which uses a silicon/pad oxide layer or silicon-oxy-nitride/silicon/pad oxide layer structure to define the structure of shallow trench pattern, and proceeds the chemical mechanical polishing process in accordance with the polishing agent mainly composed of cerium oxide. Based on the method of the present invention, the corrosion of trench oxide at the corner can be prevented, and the difficulty in defining shallow trench pattern can be reduced. Furthermore, it can also reduce the damage of active region in the thermal oxidation process.
Patent TW-441122-B (TW)
Title: Semiconductor device manufacturing method
Inventor: KOMADA DAISUKE
IPC: H01L21/02
Filed: 2000-03-21
Granted: 2001-06-16
Abstract: A semiconductor device manufacturing method having a multi-layered wiring structure comprises the steps of forming an insulating film over a semiconductor substrate, coating resist on the insulating film, forming a wiring pattern window in the resist, forming a wiring recess by etching the insulating film via the window, removing the resist, removing a reaction product existing on the insulating film by exposing the insulating film to a plasma atmosphere using an inactive gas, and burying a metal film into the wiring recess to form a wiring.
Patent TW-418372-B (TW)
Title: Coin discriminating apparatus
Inventor: HOUSE LARRY J
IPC: G07D5/00
Filed: 2000-03-28
Granted: 2001-01-11
Abstract: The present invention employs eddy current coil (2) to apply high frequency electromagnetic field on the coin (10) and by detecting the impedance of eddy current coil caused by the high frequency electromagnetic field on the coin to obtain the morphology data of the pressing mold pattern of the coin surface; and, using the eddy current coil to apply low frequency electromagnetic field on the coil and by detecting the impedance of eddy current coil caused by the low frequency electromagnetic field on the coin to obtain the material data of the coin; then, based on the resulted data (the impedance of eddy current coil) to discriminate the type and genuine or fake of the coin with high precision.
Patent TW-518687-B (TW)
Title: Method for enhancing plasma processing performance
Inventor: LOEWENHARDT PETER
IPC: H01L21/3213
Filed: 2000-04-21
Granted: 2003-01-21
Abstract: A method of improving plasma processing of a semiconductor wafer by exposing the wafer or the plasma to photons while the wafer is being processed. One embodiment of the method comprises the steps of etching an aluminum layer and, during the etching, exposing the semiconductor wafer containing the aluminum layer to photons that photodesorb copper chloride from the surface of the layer thus improving the etch process performance.
Patent TW-484166-B (TW)
Title: Dielectric-prevented discharge-lamp with distance-holders and said distance-holders
Inventor: ILMER MICHAEL
IPC: H01J61/30
Filed: 2000-04-21
Granted: 2002-04-21
Abstract: A dielectric-lamp is suitable for the operation by means of dielectric-prevented discharge, it includes: a discharge-receptacle with two at least partially parallel receptacle-walls (2; 7); at least one distance-holder (1) composed of optical transparent isolation-material. Each distance-holder (1) is in contact with the two receptacle-walls (2; 7) through the support-planes. At least in the region of a support-plane each distance-holder has an optical diffuse surface (8).
Patent TW-482700-B (TW)
Title: Method for producing trumpet T iron
Inventor: LIN HUEI-CHIOU
IPC: B21J5/00
Filed: 2000-05-12
Granted: 2002-04-11
Abstract: A method for producing a trumpet T iron comprises: (1) calculating the weight of a product according to the desired dimensions; (2) preparing a blank material (capable of being smoothened) with an equivalent weight from a bar steel (bar); (3) performing a first forging to forge one end of the blank material into a pillar part with a reduced radius (or forging out a groove according to the desired shape of the T iron); (4) performing a second forging to forge the other end of the blank material into a larger base; (5) performing a third forging to further forge the base on the lower end of the blank material into a specified size. A trumpet T iron forged from the abovementioned steps will not have an excessive density that requires an annealing step. This is due to the radius of the blank material is reduced from a large value to a small value and the base is forged into a specific size by two steps. Therefore, the blank material does not need to be removed from the machine to be subjected to an annealing operation. So that the whole process can be performed consistently, thereby reducing the process time and enabling a mass production.
Patent TW-451411-B (TW)
Title: Method for decreasing the capacitance between the interconnect lines
Inventor: WU BING-CHANG
IPC: H01L21/768
Filed: 2000-06-19
Granted: 2001-08-21
Abstract: This invention is about the method and structure for decreasing the capacitance between the interconnect lines. In this invention, a pad oxide layer and a passivation layer are sequentially formed on each metal interconnect line. After that, the first inter-metal dielectric layer is deposited on the passivation layer. The chemical mechanical polishing method is used to polish the first inter-metal dielectric layer till reaching the passivation layer. After that, the etching back process is performed until a position between the upper surface and the lower surface of the pad oxide layer is reached. A spacer is formed on the top of both sides of each metal interconnect line, which has the pad oxide layer and the passivation layer. The first inter-metal dielectric layer located between the adjacent interconnect lines is stripped off. The second inter-metal dielectric layer is deposited. An air gap is formed in the spacing of the adjacent interconnect lines having higher aspect ratio.
Patent TW-I231179-B (TW)
Title: Method for producing a floating agent and its biocontrol application
Inventor: HSIEH SHIH-PAN-YU
IPC: A01N63/04
Filed: 2000-08-16
Granted: 2005-04-21
Abstract: The present invention provides a method for producing a floating agent to be used in Biocontrol and prevent plant from suffering diseases. The method is to provide an antagonistic microorganism for working on a plant, combine the antagonistic microorganism with an agglutinate material, an inoculating medium and a floating reagent to form an intermediate, and add an agglomerative reagent to the intermediate to form the floating agent. In practice, the floating agent is applied in a hydroponics plant system to make the agent to contact the plant and release the antagonistic microorganism on the plant to control and prevent a plant disease.