Patent GB-751592-A (GB)
Title: Improvements in and relating to binary digital computing and counting apparatus
IPC: H03K23/82
Filed: 1952-06-26
Abstract: 751,592. Electronic counting apparatus ; pattern-movement stepping registers. BRITISH THOMSON-HOUSTON CO., Ltd. June 26, 1952 [June 27, 1951], No. 16111/52. Class 106(1). A device for a binary digital computer or counter has storage units each comprising a bi-stable pair of anode-to-grid cross-coupled electronic devices having a triggering input terminal whereby the unit can be switched from one stable condition to the other, and transfer units each comprising a network having a capacitor, a rectifier and two resistor branches with their inner ends connected to a common junction point, and their outer ends connected respectively to a pulse source, a storage unit input terminal, a storage unit anode and another storage unit anode or constant reference voltage, so that passage of a pulse from the source to the storage unit input is dependent on the voltage at the junction point which is a function of the instantaneous voltages at the outer ends of the resistor branches. In another form, the transfer units have the outer ends of the capacitor branches connected to earth. In the binary-number-shifting register shown in Figs. 1 and 2 comprising a series of bi-stable trigger circuits 1, the states of each consecutive pair of triggers are compared by two transfer networks 2 each comprising resistors 14, 15, 18, a capacitor 16 and a (germanium, copper oxide or thermionic) rectifier 17, all connected to a common junction point J. The resistor terminals D, E are connected to selected anode output terminals A, B of the pair of triggers whereby, if the triggers are in unlike states (i.e. one registering " 1 " and the other " 0 ") the point J of one of the associated units 2 will be at sufficiently low potential to permit a negative pulse 27 on line 19, applied to the capacitor terminal, to pass through the rectifier to output terminal G and a triggering input terminal C to bring the higher trigger of the pair to the state of the lower. The anode output potentials of the first trigger are compared with the output potentials at terminals 4, 5 from an amplifier 3 to which a series-mode input signal 26 (high voltage for " 1 " and low for " 0 "), e.g. from a magnetic tape, is applied at 6 in synchronism with the pulses 27. Two networks similar to 2 may be employed for switching input pulses to the first or third trigger of a decade counter of four bi-stable trigger stages according to the state of the third trigger, each network having two resistors whose terminals are connected to a fixed potential and one of the third-triggeranode output terminals respectively. In another decade counter, Fig. 5, in which the triggers 39 represent values 1, 2, 1 and respecttively, negative input pulses 51 normally actuate the first trigger and are prevented from actuating the third by being shunted to earth through' reversed rectifier 48 of network 41. When, however, after three input pulses, the first and second triggers both register " 1 ", the potentials at their output terminals A are both low thus lowering the potential at junction points 49 sufficiently to prevent shunting of the next pulse 51 through the network 41 and permit shunting through network 40 whose rectifier 48 is connected the other way round. This causes the next two pulses 51 to actuate the third trigger which, when it returns to the " 0 " state, applies a negative output pulse to the fourth trigger input C and also, through feedback circuit 56, 57, to an asymmetrical input X of the first trigger to return the first and second triggers to the " 0 " state. Similar operations occur for the next five input pulses except that the fourth trigger is returned to the " 0 " state and produces a carry pulse at its terminal B. The states of trigger circuits may be indicated by neon lamps. Reference is made to addition, subtraction and multiplication employing trigger circuits. Specification 688,049 is referred to.