baber/WOPTO huggingface dataset:
Patent JP-H07202880-A (JP)
Title: Quantum ciphering system
Inventor: MOHAMADO ARUDEHARI
IPC: H04B10/2507
Filed: 1993-12-28
Abstract: PURPOSE:To improve the utilizing efficiency of pulses by enabling an intercept check by only 45 deg. polarized pulses so as to reduce number of pulses used for quantum ciphering. CONSTITUTION:A sender selects a parameter (q) and selects a random sequence comprising a straight line base of N(1-q) (N is the number of transmission pulses) and upper right 45 deg. slant line base of Nq and allocates a random bit string to the straight line base and sends the pulse string. A recipient uses a detector 40 or 50 to measure the straight line base by establishment of 1-q for the pulse sting at random and to measure the slant line base with the establishment of the (q), compares the slant line base with that of the sender and estimates no intercept, when no correlation is found out. When the (q) is set to, e.g. 1/4, 9/16 of photons are used for information bits and 1/16 of them is used for intercept check as the slant line base to facilitate the intercept check and the bits are effectively utilized.
Patent JP-H03194977-A (JP)
Title: Light emitting diode array
Inventor: INABA SHOJI
IPC: H01L33/62
Filed: 1989-12-22
Abstract: PURPOSE:To reduce the unclearness of contour and crosstalk of light by forming a laminated layer structure of a first insulating film covering the periphery of light emitting regions, a second insulating film provided on the surface of a substrate except a stripelike part including the region, and electrodes extending on the second film in ohmic contact with the region. CONSTITUTION:A plurality of light emitting regions 11 provided in alignment on a semiconductor substrate 1, a first insulating film 2 covering the periphery of the regions 11, a second insulating film 3 provided on the substrate 1 except the stripe part A including the regions 11, and electrodes 4 provided by extending on the film 3 in ohmic contact with the regions 11 are provided. Thus, since the surfaces of the films are lowered in a stepped manner to approach the surface of a compound semiconductor, the steps of the electrodes are reduced, and since there is no boundary of the films near the regions and particularly at the position between the regions, the quantity of light propagation is reduced. Accordingly, the contour of the region is clear, and a light crosstalk of the adjacent regions is not recognized in a printed or projected display.
Patent JP-H07187027-A (JP)
Title: Carrier
Inventor: YOSHIZAWA TOSHIRO
IPC: B60P3/00
Filed: 1993-12-28
Abstract: PURPOSE:To enable stable carriage by preventing the fluctuation of center of gravity as far as possible when carrying materials loaded on a truck to its destination through a hard spot severe in irregularity and inclination. CONSTITUTION:This carrier comprises front and rear and left and right independent wheel mechanisms 2-5 equipped with traveling shoes 1 at the left and right, a first truck 6 supported by these wheel mechanisms, a second truck 8 being supported by the first truck rockably right and left to the traveling direction by a rocking drive mechanism 7, and a third track 10 being supported by the second truck 8 reciprocatably in the traveling direction by a rectilinear or circular drive mechanism 9.
Patent JP-2001156256-A (JP)
Title: Step-down circuit
Inventor: NAKAGAWA ATSUSHI
IPC: G11C11/413
Filed: 1999-11-25
Abstract: PROBLEM TO BE SOLVED: To provide a step-down circuit for reducing the consumption current of an internal circuit by preventing the characteristics of the transistor of the internal circuit from deteriorating since a voltage is higher than a step-down voltage is applied for a long time. SOLUTION: The step-down circuit, which steps down an external power supply voltage supplied externally and supplies the voltage to an internal circuit as an internal power supply voltage, and which a semiconductor integrated circuit device has, is provided with a diode circuit for stepping down the external power supply voltage for a desired voltage and for outputting it as the internal power supply voltage, a pull-down transistor for pulling down the internal power supply voltage being outputted from the diode circuit when the external power supply voltage decreases, and a control circuit for controlling the operation of the pull-down transistor.
Patent JP-H06180555-A (JP)
Title: Color display device
Inventor: NAGAOKA YOSHIMASA
IPC: G09G3/20
Filed: 1992-12-15
Abstract: PURPOSE:To provide a color display device having a countermeasure by which the existence of a color cell which is broken or whose light emission gets faulty is easily detected and the color display of an entire display picture is not adeversely affected even though the color cell which is broken or whose light emission gets faulty exists. CONSTITUTION:This color display device 1 is constituted of a color display board 6 where plural picture element parts 5 consisting of at least three color cells 2-4 developing different kinds of colors are arranged in a matrix state, an image input means 7, a picture element address means 8, a picture element driver means 9, a color cell driver means 10 and a display control means 11 controlling the respective means; and it is provided with a picture element function inspecting mode setting means 12, a means 13 for detecting the light emitting state of the respective color cells 2-4, a means 14 for discriminating the faulty state of the light emission of the color cells, and a storage means 15 storing the address of the picture element part 5 and information on the kind of color in the case of judging that the color emission of at least one color cell gets faulty.
Patent JP-H11167559-A (JP)
Title: Data transfer device and method for multinode system
Inventor: OSADA TAKASHI
IPC: G06F15/16
Filed: 1997-12-04
Abstract: PROBLEM TO BE SOLVED: To provide the data transfer device and method in a multinode system in order to continuously issue the following instructions before the transfer of data is not finished yet against an inter-node data transfer instruction. SOLUTION: When an instruction is issued by its own node, an ID number generation circuit 7 issues the instruction together with the only ID number and stores the data store destination address in an address store buffer 10. Then the data store destination address is taken out of the buffer 10 based on the ID number added to the data when these data are transferred to its own node from another one. Thus, the data are stored based on the destination address that is taken out of the buffer 10.
Patent JP-2000158739-A (JP)
Title: Sheet cutter
Inventor: TSUCHIYA MASAHIRO
IPC: B41J11/70
Filed: 1998-11-25
Abstract: PROBLEM TO BE SOLVED: To prolong the service life of a sheet cutter being applied to the receipt issuing section of POS, or the like. SOLUTION: A fixed cutter 22 is supported by a first supporting part at the longitudinal central part. A movable cutter 23 is mounted on a frame and guide parts 23b, 23c at the opposite ends thereof ride over the fixed cutter 22. A leaf spring member 24 has total three leaf spring pieces 24a, 24b, 24c disposed, respectively, in the center and at the opposite ends in the X1, X2 directions. The leaf spring piece 24a presses the central part of the movable cutter 23 in the Z2 direction and the leaf spring pieces 24b, 24c press the left and right side parts of the movable cutter 23 in the Z2 direction. The movable cutter 23 is warped in V-shape sinking in the center while the fixed cutter 22 is warped in reverse V-shape projecting in the center. The movable cutter 23 move in the Y1 direction while being warped and rides on the fixed cutter 22 thus cutting a sheet.
Patent JP-2001151433-A (JP)
Title: Device for monitoring cut main rope element wire for elevator
Inventor: NAKAMURA HIDEKI
IPC: B66B5/02
Filed: 1999-11-25
Abstract: PROBLEM TO BE SOLVED: To provide a device for always monitoring a cut main rope element wire for an elevator. SOLUTION: The device comprises a cut element wire detector 8 provided adjacent the surface of a main rope wound on a winder and a warner 10 for warning a maintenance station or a control center of a cut element wire in accordance with a detection signal output from the cut element wire detector 8.
Patent JP-H07189208-A (JP)
Title: Joint structure for road bridge
Inventor: ARAI MOTONOSUKE
IPC: E01C11/02
Filed: 1993-12-28
Abstract: PURPOSE:To provide a joint structure suitable for construction in a jointing part of a road bridge with a thick slab. CONSTITUTION:A joint structure is provided with a pair of upper wave-form vertical plates 1, 1 bending zigzag respectively and extending to the longitudinal direction of the joint and a pair of lower wave-form vertical plates 2, 2. The lower wave-form vertical plates 2, 2 are positioned opposite to each other, with a waveform clearance 6 and fixed to steel girders 4, 4 through a pair of bottom plates 3, 3 having wave-form protruded faces 3a projected to the clearance 5 of the steel girders 4, 4. The upper wave-form vertical plates 1, 1 are positioned opposite to each other with a wave-form clearance 6 at the upper part of the lower wave-form vertical plates 2, 2. Concrete is placed at the rear side of the upper wave-form vertical plates 1, 1 and the lower wave- form vertical plates 2, 2 to form a thick concrete ragged slab 9 extending from the bottom plate to the road face.
Patent JP-H09176368-A (JP)
Title: Synthetic resin composition having high thermal conductivity and high thermal conductivity improver
Inventor: MANABE HITOSHI
IPC: C08K7/08
Filed: 1995-12-22
Abstract: PROBLEM TO BE SOLVED: To obtain a synthetic resin composition, having a high thermal conductivity and useful especially as an encapsulant for electronic materials by blending a synthetic resin with magnesium hydroxide having specific properties and a high thermal conductivity improver in respective specific proportions. SOLUTION: This synthetic resin composition having a high thermal conductivity is obtained by blending (A) 100 pts.wt. synthetic resin with (B) 0-400 pts.wt. magnesium hydroxide having <=3.0×10<-3> strain in the <101> direction in an X-ray diffractometry and <=20m<2> /g specific surface area according to the BET method, (C) 0-400 pts.wt. fibrous magnesium hydroxide having >=2.5 ratio of the length/diameter and >=1μm length and <=20m<2> /g specific surface area according to the BET method and (D) 0-100 pts.wt. high thermal conductivity improver. The total amount of the blended components (B) and (C) is 50-400 pts.wt. Either or both of the surfaces of the components (B) and (C) are preferably treated with a surface treating agent. Furthermore, both the components (B) and (C) are thermal conductivity improving agents.
Patent JP-2001156220-A (JP)
Title: Packaging method for semiconductor device
Inventor: TAKAKURA NOBUYUKI
IPC: C08G59/20
Filed: 1999-11-25
Abstract: PROBLEM TO BE SOLVED: To provide a packaging method for a semiconductor device for providing a function, which can not be provided with a single resin, such as improvement in both characteristics of humidity resistance and corrosion resistance. SOLUTION: Concerning the packaging method for a semiconductor device 1 sealed with at least two kinds of thermosetting sealing agents 5 and 6, after the semiconductor device 1 is sealed using the corrosion resistant sealing agent 5, the device is sealed with the humidity resistant sealing agent 6 so as to cover the outside of the said corrosion resistant sealing agent 5.
Patent JP-H07190371-A (JP)
Title: Method and apparatus for combustion
Inventor: TAGAWA HISATO
IPC: F02C3/30
Filed: 1993-12-28
Abstract: PURPOSE:To provide a method wherein the amount of NOx to be generated by combustion of hydrocarbonic fuel is extremely decreased and which is actualized at low cost. CONSTITUTION:The flow rate of second-stage fuel 4a for a gas-turbine combustor is measured by a fuel flowmeter 5, following which the fuel 4a is passed through a fuel nozzle 6 and is premixed with a compressed air 11b by a second- stage premix swirler 7, and premix combustion is attained in a second-stage combustion chamber 8. A measured value by the fuel flowmeter 5 is transmitted to an additive injection valve-controlling device 16 through a control line 18 and an additive injection valve 17 is controlled from here, using a control line 19. Therefore, the concentration of NOx can be sharply reduced by a simple method, and air pollution can be prevented effectively and at low cost.
Patent JP-H08224791-A (JP)
Title: Method and device for perforating smooth closed-cell surfaceof open-cell plastic foamed sheet
Inventor: HENKU YOTSUPEN
IPC: B29C48/10
Filed: 1995-12-22
Abstract: PROBLEM TO BE SOLVED: To obtain a method and apparatus for perforating the smooth closed- cell surface of an open-cell plastic foam sheet. SOLUTION: A plastic foam sheet is heated to predetermined temp. after extrusion to be heated and molded in a heating and molding apparatus by the vacuum action to both side surfaces of the foam sheet to be thermally cured. The skin of one closed surface of the plastic foam sheet is perforated by the needles 4 arranged in a mold block 11. The mold block 11 is the constitutional part of the heating and molding apparatus to form the mold of the heating and molding apparatus along with other mold block. The mold block 11 to the inner side surface 13 of the plastic foam sheet includes a male mold 1, a cooling plate 2, a vacuum plate 3, movable needles 4, a needle plate 5, the spring 6 for returning the needle plate 5, a diaphragm 7 and a mounting plate 8 and these members are mutually held by screws 3.
Patent JP-H08234847-A (JP)
Title: Vibration damping equipment
Inventor: DAGURASU ROI BURAUNINGU
IPC: F16F15/00
Filed: 1995-12-01
Abstract: PROBLEM TO BE SOLVED: To provide a method for removing and neutralizing the capacitance characteristic of the wide area band of a piezoelectric material by eliminating a voltage generated in the piezoelectric material by a resistance in response to mechanical deformation induced by wide area band vibration. SOLUTION: In a negative capacitance shunt circuit 35, a voltage-controlled voltage source simulates a negative capacitance in equivalent amounts divided to a piezoelectric element 17, and effectively compensates the capacitance of elements across a wide area frequency band. All connected impedance of the shunt circuit 35 and the piezoelectronic device is made larger than that of the piezoelectronic element 17 itself. As a result, a voltage generated in the piezoelectronic element 17 can be completely eliminated by a resistance in response to mechanical deformation induced by the wide area vibration of a structural body in an attenuating operation. Therefore, the capacity characteristic of the piezoelectronic material 17 is effectively removed with high reliability so that the mechanical attenuation ratio of dissipated electric energy can be increased.
Patent JP-2001154758-A (JP)
Title: Information processor
Inventor: KABAMOTO AKIRA
IPC: H04N1/00
Filed: 1999-11-26
Abstract: PROBLEM TO BE SOLVED: To detect attachment and detachment of an image reader to an information processor without using a detection switch to detect presence/absence of loading of the image reader to the information processor. SOLUTION: This information processor is constituted so as to detect the loading of a scanner 20 on the main body by providing a scanner 20 to be mounted on a main body 11, to permit automatic reading of image information and to permit manual reading of an image by being detached from the main body 11, performing ON and OFF operation of a paper feed detection switch 40 with a retractable detection lever 41 provided on the main body 11 when the scanner 20 is loaded on the main body 11 from the front to the back along the main body 11, rotating a rotating disk 60b rotatably provided on the scanner 20 and counting pulses to be outputted according to rotating speed of the rotating disk 60b by an encoder 60.
Patent JP-H04205928-A (JP)
Title: Optical disk device
Inventor: ITO TAKESHI
IPC: G11B7/085
Filed: 1990-11-30
Abstract: PURPOSE:To allow stable recording and reproducing in a short period of time after switching of wavelengths by adding an offset to the output signal of a focus error detecting means, outputting this signal to a driving means and positioning an objective lens between the focusing position of the 1st wavelength and the focusing position of the 2nd wavelength. CONSTITUTION:This device has a laser beam source used at least at the two wavelengths, the objective lens 21, the focus error detecting means 50 which receives the luminous flux reflected by an optical disk MOD and generates a focus error signal and a driving means 57 which drives the objective lens 21 in the optical axis direction in accordance with the focus error signal. An offset adding means 55 which adds the offset to the output signal of the focus error detecting means 50 and outputs this signal to the driving means 57 so as to position the objective lens 21 between the focusing position at the 1st wavelength and the focusing position at the 2nd wavelength is provided. Then, the distance to move the objective lens 21 when the wavelengths are switched is shortened. The time until the objective lens 21 is moved to the prescribed position of the wavelength is shortened in this way.
Patent JP-H09153807-A (JP)
Title: Rz-nrz code conversion circuit
Inventor: BABA MITSUO
IPC: H04L25/49
Filed: 1995-11-30
Abstract: PROBLEM TO BE SOLVED: To provide a circuit which can code-converts an RZ signal into an NRZ signal with sufficient phase redundancy. SOLUTION: A clock signal ICLK which is phase-controlled in such a way that a frequency and the phase of a ruse edge become equal to those of an RZ signal IDAT is inputted to a terminal 3, and N-phase clock signals ICLK1- ICLKN obtained by making the clock signal ICLK into polyphases to terminals 2-1 to 2-N. A conversion circuit 14 latches the RZ signal with the clock signals ICLK1-ICLKN in F/F 7-1 to 7-N, latches respective latch outputs with the clock signal ICLK in F/F 9-1 to 9-N and generates N bit slice signals 10-1 to 10-N. An edge detection circuit 11 detects the fall edge of the RZ signal IDAT from late array of logical values which the N bit slice signals 10-1 to 10-N possess and outputs an NRZ code logical value judgment signal 12. F/F 13 latches the signal 12 with the clock signal ICLK, executes re-timing and outputs an NRZ signal ODAT.
Patent JP-H01176188-A (JP)
Title: Moving adaptive type luminance signal chrominance signal separator
Inventor: SUGIYAMA KENJI
IPC: H04N9/78
Filed: 1987-12-29
Abstract: PURPOSE:To attain smooth moving adaptive processing in an intermediate region between movement and standstill by varying conseutively a band width of a vertical BPF and a horizontal BPF in response to the moving coefficient obtained through the detection of movement of a picture. CONSTITUTION:Control signals mv, mh outputted by a control signal generating circuit 24 change the characteristic of variable band pass filters BPFs 14, 16 against the inputted variahle component as follows; at first, when the difference in the vertical direction is larger than the horizontal difference as the basic operation, the pass band of the variable vertical BPF 14 is widened to make the pass band of the variable horizontal BPF 16 narrow. Thus, the pass band of a chrominance signal in terms of 2-dimension is longer longitudinally but when the difference in the vertical direction is smaller than the difference in the horizontal direction, the pass band of the variable vertical BPF 14 is made narrow and the pass band of the variable horizontal BPF 16 is made wider. When both the differences have no difference, the band of the variable NPFs 14, 16 is made close, since the control signal has information of plural bits, the control is applied to smooth the change in the filter characteristic. Thus, the movement processing is made smooth.
Patent JP-2001153138-A (JP)
Title: Supporting structure for rotating shaft
Inventor: YAMANAKA NARIAKI
IPC: F16C27/04
Filed: 1999-11-26
Abstract: PROBLEM TO BE SOLVED: To simplify the structure of a bracket supporting a bearing through an elastic element, and to reduce a cost for the bracket portion, in a supporting structure for a rotating shaft that supports a bearing supporting the rotating shaft through an elastic element. SOLUTION: In this supporting structure for a rotating shaft, an elastic element is adhered on an outer periphery side of a bearing 2 fitted with a rotating shaft 1, and the bearing is supported to a frame 5 side by a bracket 6 through the elastic element 4. The bracket 6 is formed in a plate, and provided with a hole 7 having a diameter larger than the outer diameter of the bearing 2. The peripheral part of the hole 7 of the bracket 6 is buried in and adhered by baking so as to project into the elastic element 4 adhered by baking around the bearing 2 in a generally right-angled direction.
Patent JP-2000162754-A (JP)
Title: Piece negative insertion part structure for film processing device
Inventor: NAKAOKA NOBUAKI
IPC: G03D15/10
Filed: 1998-11-27
Abstract: PROBLEM TO BE SOLVED: To provide a piece negative insertion structure for photographic processing device capable of quickly detecting the jamming of a piece negative and avoiding the refraction of the piece negative just by somewhat altering existing structure. SOLUTION: In this structure, an insertion body 4 inserted in the aperture part of a negative sheet S is supported by a supporting frame 1 and provided with a 1st insertion body part 4A and a 2nd insertion body part 4B by leaving space in between, and the piece negative 9a is guided to the individual negative housing part of the negative sheet S by the parts 4A and 4B. A jamming detection means 13 detecting the jamming of the piece negative 9a is installed. The insertion body 4 is divided to the 1st and the 2nd insertion body parts 4A and 4B, and the part 4A is set in a positionally fixed state and the part 4B is constituted to freely move to approach to/separate from the part 4A. The means 13 is provided with a jamming sensor 13A detecting the displacement of the part 4B.
Patent JP-H11177065-A (JP)
Title: Semiconductor device and its production
Inventor: MATSUBARA YOSHIHISA
IPC: H01L21/8247
Filed: 1997-12-08
Abstract: PROBLEM TO BE SOLVED: To realize low resistance in a semiconductor device by preventing reduction of extracting speed of electron from a floating gate by making the concentration of impurities in the source/drain area of a memory area higher and by forming securely a silicide film in the source/drain area of a peripheral circuit. SOLUTION: A gate electrode 111 containing a floating gate is formed in a memory area, and a gate electrode 112 is formed in the polysilicon of a peripheral circuit area (a). After a spacer is formed, arsenic is implanted at 5×10<15> /cm<2> into the memory area, forming a heavily doped n-type diffusion layer 114b, and an arsenic and a boron are implanted at 3×10<15> /cm<2> into the peripheral circuit, forming a lightly doped n-type diffusion layer 114a and a p-type diffusion layer 115 (b). A titanium film 116 of 30 nm or less in thickness is formed (c). Then a heat treatment by using a reduced-pressure nitrogen atmosphere is performed so as to form a silicide film 117 in the source/drain area and on the gate electrode in the peripheral circuit (d). A titanium film 119 containing nitrogen is removed thereafter.