baber/WOPTO huggingface dataset:
Patent TW-508494-B (TW)
Title: Data protection device capable of self-defining address arrangement sequence in protection area of storage device
Inventor: LAI JING-SHIUN
IPC: G06F21/72
Filed: 2001-03-28
Granted: 2002-11-01
Abstract: The present invention provides a data protection device of storage device, which defines a protection area in the storage device of a computer peripheral storage apparatus. The address sequence of the protection area is rearranged based on a self-defined manner, and data is accessed based on self-defined address sequence, so that a computer system without accessing the data protection device or accessing the data protection device but without arranging the address sequence of the protection area in the same way cannot correctly read data, thereby achieving the effect of protecting the data in the storage device. The data protection device includes a storage space address converting module and a data encryption/decryption module. The storage space address converting module generates a setting manner based on an address converting secret key and the predefined address sequence in the protection area of the storage device. The address arrangement sequence in the protection area of the storage device is self-defined based on the setting manner. Before data is stored into the protection area of the storage device, the predefined storage location assigned by the system is converted into a self-defined storage device. Before data is stored into the self-defined storage device, the data encryption/decryption module uses an encryption algorithm and an encryption password to encrypt the data, and after reading data from the self-defined storage location, uses a decryption algorithm and a decryption password to encrypt the encrypted data read, thereby obtaining the original data.
Patent TW-498609-B (TW)
Title: Transmitter power amplifier ramping method
Inventor: MOHINDRA RISHI
IPC: H04B1/40
Filed: 2001-04-25
Granted: 2002-08-11
Abstract: A method for reducing frequency glitches in a digital transceiver due to power amplifier input impedance variations. According to the method, the power amplifier is switched on after the end of a prior packet reception period and before a new packet transmission begins. Instead of ramping the power amplifier gain, the method ramps the modulation signals. As a consequence, any VCO frequency transients that may result from turning on the power amplifier have an opportunity to decay before the new packet transmission is initiated. This technique effectively isolates the transmitter power amplifier from the frequency synthesizer VCO to facilitate fast switching transceiver operation.
Patent TW-511354-B (TW)
Title: Management system and device for community Ethernet network switch
Inventor: LI JUNG-WANG
IPC: H04L12/56
Filed: 2001-05-16
Granted: 2002-11-21
Abstract: The invention relates to a management system and device for community Ethernet network switch, which primarily adds a network management control circuit on an Ethernet network switch so as to receive the network management packet from a central office using the network management control circuit via a independent circuit and further to set up the value of a MIB concerning SNMP protocol in accordance with the network management packet via the installed SNMP protocol. Therefore, the Ethernet switch can monitor at least more than one network interface circuit on it based on the management value of the MIB. When those network interface circuits are not in use, forward the enable or disable signal to one testing loop installed on the network interface circuit in accordance with the management value of the MIB to start the testing loop, perform loop test regarding the network interface circuit, and write the test result to the MIB. After collection of the MIB by SNMP protocol, forward the MIB back to the central office for network manager of central office to analyze, allowing central office to perform remote and real-time on-line monitoring, control and management with respect to the Ethernet switch.
Patent TW-I226681-B (TW)
Title: DRAM cell and method of manufacturing the same
Inventor: SHIN CHUL-HO
IPC: H01L21/02
Filed: 2001-06-13
Granted: 2005-01-11
Abstract: A method of manufacturing DRAM cell comprises forming an isolation layer on a given region of a substrate to define an active region having a plurality of line shaped sub-regions; forming at least a pair of cell transistors in each line shaped sub-regions, owning in common a common drain region and respectively a source region; forming a bit line pad on each common drain region and a storage node pad on each source region; forming a bit line pad protecting layer pattern having portions parallel to the word line to cover the bit line pad; and forming storage nodes on storage node pads. The storage nodes are contacted with the storage node pads and insulated electrically from the bit line pad by means of the bit line pad protecting layer pattern.
Patent TW-524799-B (TW)
Title: Process for the production of vinyl acetate
Inventor: WILLIAMS BRUCE LEO
IPC: C07C69/15
Filed: 2001-06-13
Granted: 2003-03-21
Abstract: A process for the fluid bed production of vinyl acetate which comprises reacting ethylene, acetic acid and an oxygen-containing gas in a fluid bed reactor at elevated temperature in the presence of a fluidised bed of catalyst, in which process, catalyst is added to said fluidised bed of catalyst, wherein the overall catalytic activity of the fluidised bed of catalyst is controlled to a pre-determined value by adjusting the activity and/or adjusting the rate of addition of said added catalyst.
Patent TW-I272309-B (TW)
Title: Process for the preparation of allysine acetal
Inventor: KRIMMER HANS-PETER
IPC: C12P13/04
Filed: 2001-07-25
Granted: 2007-02-01
Abstract: The present invention relates to the preparation of compounds of formula (I), from the corresponding hydantoins by means of an enzymatic process. The L-compound is preferably formed.
Patent TW-511323-B (TW)
Title: Socket for BGA package
Inventor: AKASAKA JUNYA
IPC: H01L23/32
Filed: 2001-08-07
Granted: 2002-11-21
Abstract: The present invention provides a BGA package IC socket that accommodates a BGA (ball grid array) package such that the BGA package IC socket has high reliability and can withstand long-term use. It comprises: package receiving members 141 to receive the lower edge portions of the BGA package 10 and rotate downward accompanying the receiving operation of the BGA package 10; and package receiving parts 140 to pivot freely with the rotation of the housing, and rotate the received BGA package 10 of the package receiving members 141 in the way of rebounding upward.
Patent TW-496925-B (TW)
Title: Valve gear of internal combustion engine
Inventor: NOMURA AKIFUMI
IPC: F01L1/047
Filed: 2001-09-25
Granted: 2002-08-01
Abstract: The present invention provides a valve gear of internal combustion engine, wherein at least one side of the suction and exhaust ports includes at least two poppet valves. The solution of the present invention is that in the suction and exhaust ports 14, 15 of the internal combustion engine 1, at least one side of the ports comprises at least two poppet valves. On the side having at least two poppet valves, the rocker arm 30 is formed with a bifurcated shape which crosses an ignition plug on the exhaust poppet valve side 17, and the other valve 16 is directly driven to open and close by the camshaft.
Patent TW-579505-B (TW)
Title: Recording medium, recording apparatus for the same, recording method for the same, reproduction apparatus for the same and reproduction method for the same
Inventor: HINO YASUMORI
IPC: G11B20/12
Filed: 2001-09-28
Granted: 2004-03-11
Abstract: To provide a recording medium of data, a recording apparatus and a reproducing apparatus thereof, which has a high effective recording density and high ability for error correction. The recording apparatus comprises: a coding part for encoding input data by coding methods including a run length limit coding method to generate coded data, dividing one data stream consisting of the said coded data into multiple data blocks and outputting them; a data adding part for adding data of the same value as the last one bit coded data of said preceding data block to the top of at least one of said data blocks; and a recording part. By the recording apparatus, each data block including said added data is recorded on each data recording area of the recording medium comprising prepit areas and multiple data areas divided by said prepit areas.
Patent TW-I245491-B (TW)
Title: Digital phase-locked loop compiler
Inventor: YEN MIN-NAN
IPC: H03L7/089
Filed: 2001-10-24
Granted: 2005-12-11
Abstract: A digital phase-locked loop compiler includes a pre-divider, a phase digital converter, a digital-to-analog voltage converter, a voltage-control oscillator, a high-frequency oscillator, a post-divider, an out-divider, and a built-in self-tester. The digital phase-locked loop compiler operates in a digital mode and utilizes a preset phase adjusting value to reduce phase-locking time. Moreover, the absence of a low-pass filter in the digital phase-locked loop compiler and the small size of the built-in self-tester greatly reduce the overall area of the digital phase-locked loop compiler.
Patent TW-584996-B (TW)
Title: Method and apparatus for controlling signal power level in a communication system
Inventor: WHANG KEUM-CHAN
IPC: H04B7/005
Filed: 2001-11-06
Granted: 2004-04-21
Abstract: A novel and improved method and apparatus for controlling signal power level in a communication system (100) is provided by determining first and second signal to interference ratios of a received signal, respectively before and after an interference cancellation, determining a difference between the first and second signal to interference ratios, and determining, based on the difference, a signal to interference threshold for controlling power level of a signal transmitted from a source of the received signal.
Patent TW-514973-B (TW)
Title: Structure for layer-to-layer stacking alignment
Inventor: CHEN YI-LIN
IPC: H01L21/00
Filed: 2001-12-24
Granted: 2002-12-21
Abstract: A structure for layer-to-layer stacking alignment is especially suitable for the alignment correction of a patterned PR layer formed on a metal layer that is on a wafer aligning to the material layer beneath the said metal layer. When conducting the measurement of layer-to-layer stacking alignment, the sputtered metal layer has asymmetric effect, so there is intolerable inaccuracy generated in the expansion misalignment measurement. To avoid the influence of the asymmetric effect, add a layer-to-layer stacking alignment structure in the marked cover region to correct the error resulting from expansion misalignment measurement.
Patent TW-513565-B (TW)
Title: Novel piezoelectric transducer assemblies and methods for their use
Inventor: BROCK JOHN L
IPC: F04B43/06
Filed: 2002-04-10
Granted: 2002-12-11
Abstract: Piezoelectric transducer assemblies that are useful for the monitoring of the gas output from a gas driven pump, wherein the assembly is not an integral part of the input or output flow stream of the material being pumped, but is used to monitor the exhaust gas flow of the gas driven pump.
Patent TW-543215-B (TW)
Title: Composition for polymer gel electrolyte, polymer gel electrolyte, and secondary battery and electric double layer capacitor each employing the electrolyte
Inventor: SATO TAKAYA
IPC: H01M50/42
Filed: 2002-04-18
Granted: 2003-07-21
Abstract: The object of the present invention is to provide a composition for polymer gel electrolytes which comprises as major ingredients (A) a polymer which is derived from a polymer having in the molecule a polyvinyl alcohol unit represented by the following general formula (1) and having an average polymerization degree of 20 or higher and in which part or all of the hydroxyl groups of the polyvinyl alcohol unit have been replaced with a cyano-substituted monovalent hydrocarbon group, (B) an ion-conductive salt, (C) a compound having two or more reactive double bonds per molecule, and (D) an organic electrolytic liquid. (In the formula, n is a number of 20 or larger.)
Patent TW-I245760-B (TW)
Title: Chemical compounds that activate the alpha subtype of the human peroxisome proliferators activated receptor (hPPAR alpha) and pharmaceutical compositions comprising them for treating hPPAR alpha mediated diseases or conditions
Inventor: GELLIBERT FRANCOISE JEANNE
IPC: A61P9/04
Filed: 2002-05-29
Granted: 2005-12-21
Abstract: A compound of formula (I) and pharmaceutically acceptable salts, solvates and hydrolysable esters thereof, wherein X1 represents O or S; R1 and R2 are independently H or C1-3 alkyl or R1 and R2 which are bonded to the same carbon atom may together with the carbon atom to which they are bonded form a 3-5 membered cycloalkyl ring; R3 and R4 independently represent H, halogen, -CH3 and -OCH3; R5 represents H or C1-6 alkyl; X2 represents NH, NCH3 or O; one of Y and Z is N, and the other is O or S; R6 represents phenyl or pyridyl (wherein the N is in position 2 or 3) and is optionally substituted by one or more halogen, CF3, C1-6 straight or branched alkyl (optionally substituted by halogen), with the provision that when R6 is pyridyl, the N is unsubstituted.
Patent TW-I262651-B (TW)
Title: Voltage comparing circuit
Inventor: OHKIDO TOSHIO
IPC: G01R19/165
Filed: 2002-06-06
Granted: 2006-09-21
Abstract: A voltage comparing circuit of the invention includes a first and a second capacitor terminals on one side of which are respectively connected to a positive side voltage of an analog input signal and a negative side voltage of a reference voltage via a first and a second switch and terminals on other side of which are commonly connected, a third and a fourth capacitor terminals on one side of which are respectively connected to a positive side voltage of the reference voltage and a negative side voltage of the analog input signal via a third and a fourth switch and terminals on other side of which are commonly connected, a first and a second inverter respectively connected to a common connection terminal of the first and the second capacitors and a common connection terminal of the third and the fourth capacitors and connected with a fifth and a sixth switch respectively between input and output terminals thereof, a seventh and an eighth switch respectively connected between the input terminal of the first inverter and the output terminal of the second inverter and between the input terminal of the second inverter and the output terminal of the first inverter, and a ninth and a tenth switch respectively connected between the first capacitor and the fourth capacitor and between the second capacitor and the third capacitor.
Patent TW-588173-B (TW)
Title: Liquid filling device and filling method thereof
Inventor: JANG JE-JR
IPC: G02F1/13
Filed: 2002-06-28
Granted: 2004-05-21
Abstract: A kind of liquid filling device at least comprises: a container for accommodating liquid, in which the bottom plate of the container can move along the direction perpendicular to the bottom plate; a hollow sealing device for accommodating a to-be-filled device within to fill the desired liquid, in which, when the to-be-filled device is placed on the hollow sealing device, the portion of the to-be-filled device in contact with the hollow sealing device is tightly sealed by the hollow sealing device, and the injection port of the to-be-filled device for injecting the abovementioned liquid has to be placed right on the top of the hollow portion of the hollow sealing device; and a set of control gas valves which are placed between the container and the hollow sealing device and are used to determine if the liquid filling device with the to-be-filled device disposed thereon has to be insolated from the outside environment.
Patent TW-541226-B (TW)
Title: Abrasive tool having leveling abrasive particles and method of making same
Inventor: LIN SHIN-JENG
IPC: B24B7/24
Filed: 2002-07-16
Granted: 2003-07-11
Abstract: Disclosed is an abrasive tool having leveling abrasive particles and method of making same, that eliminates the inconsistent height and high variation of the abrasive particles in the abrasive tool made by conventional methods. In this invention, the abrasive particles are first arranged in bonding indents that are arranged on a abrasive particle carrier in a pre-determined gaps, such that the abrasive particles may be arranged in a leveling manner after the abrasive particles are transferred and bonded to the substrate, due to the consistent orientation of the abrasive particles by the metallic or high polymeric bonding agent filled in the bonding indents of a substrate.
Patent TW-565938-B (TW)
Title: Semiconductor device and method of manufacturing the same
Inventor: SUGIYAMA KOICHI
IPC: H01L29/10
Filed: 2002-10-03
Granted: 2003-12-11
Abstract: There are provided a gate electrode formed on a semiconductor substrate of one conductivity type via a gate insulating film, ion-implantation controlling films formed on both side surfaces of the gate electrode and having a space between the gate electrode and an upper surface of the semiconductor substrate, first and second impurity diffusion regions of opposite conductivity type formed in the semiconductor substrate on both sides of the gate electrode and serving as source/drain, a channel region of one conductivity type formed below the gate electrode between the first and second impurity diffusion regions of opposite conductivity type, and pocket regions of one conductivity type connected to end portions of the impurity diffusion regions of opposite conductivity type in the semiconductor substrate below the gate electrode and having an impurity concentration of one conductivity type higher than the channel region.
Patent TW-571400-B (TW)
Title: Method for fabricating nitride read-only memory
Inventor: LIU CHENG-JYE
IPC: H01L21/8246
Filed: 2002-11-06
Granted: 2004-01-11
Abstract: A method for fabricating a nitride read-only memory is described. An ONO stacked layer and a protective layer are sequentially formed on a substrate. A patterning/etching process is performed to pattern the protective layer and the ONO stacked layer to expose a portion of the substrate. Thereafter, the protective layer is removed by using wet etching. An ion implantation is performed to form buried bit lines in the exposed substrate, and then an insulator is formed on each buried bit line. A plurality of word lines are formed on the substrate crossing over the buried bit lines.
Patent TW-580374-B (TW)
Title: Childcare instrument
Inventor: KASSAI KENZOU
IPC: B62B9/10
Filed: 2002-11-19
Granted: 2004-03-21
Abstract: A childcare instrument has a core member 6 removably accommodated in a bag on the backside of a baby carriage, and a first plate member 7 and a second plate member 8 laminated together. The first plate member 7 has first opening 22 through the first plate member 7. The second plate member 8 has a second openings 23 through the second plate member 8 and is so disposed that the position of the second plate member 8 relative with the first plate member 7 can be changed from a first position where the first openings 22 and the second openings 23 are aligned with each other to a second position where the first openings 22 and the second openings 23 are offset each other. With this arrangement the degree of ventilation can be adjusted.
Patent TW-590943-B (TW)
Title: A bicycle hub transmission with a power control mechanism for a shift assist mechanism
Inventor: SHOGE AKIHIKO
IPC: B62M11/16
Filed: 2002-12-10
Granted: 2004-06-11
Abstract: A hub transmission for a bicycle comprises a hub axle; a driver rotatably supported to the hub axle; a hub shell rotatably supported to the hub axle; a power transmitting mechanism disposed between the driver and the hub shell for communicating rotational power from the driver to the hub shell through a plurality of power transmission paths; a shift mechanism for selecting the plurality of power transmission paths; a shift assist mechanism for communicating rotational power from the driver to the shift mechanism; and a power control mechanism disposed between the driver and the shift assist mechanism and coupling the driver to the shift assist mechanism for controlling an amount of rotational power communicated from the driver to the shift mechanism.
Patent TW-578308-B (TW)
Title: Manufacturing method of thin film transistor
Inventor: YANG JIAN-SHENG
IPC: H01L21/77
Filed: 2003-01-09
Granted: 2004-03-01
Abstract: A manufacturing method of thin film transistor comprises the steps of: forming a polysilicon island on an insulating substrate and covering a gate insulating layer of the polysilicon island; forming a metal layer on the gate insulating layer; removing part of the metal layer and gate insulating layer to form a polysilicon exposing area with a trench pair; doping a first dosage of p-type dopant into the polysilicon exposing area via the trench pair; removing the part of metal layer and gate insulating layer to form a gate line; and doping a second dosage of n-type dopant into the polysilicon island, in which the polysilicon exposing area is transformed into lightly doped drain by the first dosage of p-type dopant and the second dosage of n-type dopant, and the polysilicon island with only the second dosage of n-type dopant is formed with a drain area and a source area, respectively.
Patent TW-580602-B (TW)
Title: Electrooptic device and electronic device
Inventor: FUJIKAWA SHINSUKE
IPC: G09F9/30
Filed: 2003-02-12
Granted: 2004-03-21
Abstract: The invention provides an electrooptic device and electronic device in which a region that does not directly contribute to the display can be reduced by improving the layout of peripheral circuits. The solution is: in a TFT array substrate 10 of a liquid crystal device 100, unit circuits 101e that form shift register circuits 101b are formed in unit-circuit forming regions 101x, 101y spaced from each other in the X-direction, and the X-direction pitch of the circuit units 101x is shorter than the X-direction pitch of pixel rows. Consequently, a wide free region 10x in which the unit circuits 101e are not formed can be formed between the unit-circuit forming regions 101x, 101y, and identification marks 40 can be formed in the region.
Patent TW-I287101-B (TW)
Title: Magnetic sensor and orientation sensor
Inventor: TAMURA YASUHIRO
IPC: G01C17/28
Filed: 2003-05-09
Granted: 2007-09-21
Abstract: In an orientation sensor (500) of the present invention, a magnetic sensor (600) for detecting 3 axial components of the geomagnetic vector and an inclination sensor (700) for detecting inclination of 3 axial directions are integrated upon one substrate. The magnetic sensor (600) comprises a plurality of magnetic detection elements, and several of the elements thereof are fixed by a polyimide film having thermo contractility and are standing from the surface of the substrate while the polyimide film is heated.
Patent TW-I221918-B (TW)
Title: Auto grouping method for testing integrated circuit devices on burn-in board
Inventor: TSAI MICHAEL
IPC: G01R31/26
Filed: 2003-05-13
Granted: 2004-10-11
Abstract: An auto grouping method for testing integrated circuit devices on a given burn-in board is provided. The method includes providing a test setting file having at least one time format setting and raw signal data prepared to be inputted to pins of integrated circuit devices, analyzing the test setting file having steps of providing a first matrix and combining the time format settings and names of pins corresponding to respective inputted time format setting thereto, and providing a second matrix and combining raw signal data and names of pins corresponding to respective inputted raw signal data thereto, and searching pins with the same inputted time format setting and raw signal data, in order to generate a grouped outputted file. Based on the grouped outputted files, inputs to pins with the same time format setting and raw signal are readily facilitated, thereby simplifying the layout complexity of the burn-in board.