Patent ES-349622-A1 (ES)
Title: Line scanning system with stored program control
IPC: H04Q3/545
Filed: 1968-01-22
Abstract: In supervising a subscriber's line a single binary bit registers whether the line is looped or the cut-off relay is energized. As shown in Fig. 1 the loop is monitored from a resistor R2 over a lead eij while the cut-off relay is monitored from the C-wire over a lead fij. Each pair of leads eij, fij have appearances in a row of a scanning matrix respective column wires of which drive amplifiers A1, A2 gated to OR gates such as L1. Each row of the scanner serves a group of m subscribers. When a row of the maxtrix is interrogated from an address decoder AL the states of all the monitoring wires of that group are connected in parallel to the OR gates L1 to Lm and the resulting OR functions are registered in bi-stable storage array RP. Circuit functions are controlled by a central processor CP, the relevant portions of which are shown in Fig. 2. A ferrite storage matrix MM contains in section Mt a record of the OR functions produced by the scanning matrix in the preceding cycle. The OR functions for a subscriber's group in a current cycle are represented by Y1 to Ym while the OR functions stored in MM and relating to the preceding cycle are represented by X1 to Xm. The store MM is accessed over decoder AC driven from an address store RC having a read/write instruction store RW, subscriber's group code store RA, and subscriber's identity within a group store LI. A clock pulse source CL can be selectively connected to drive a counter T which produces the major sequence pulses t1 to tr, or to drive counters V or H to produce sub-cycles of pulses v1 to v6 or u1 to u10. With bi-stables FF2, FF3, reset and a suitable processor command P2 relayed over RW, the clock CL drives counter T. Pulse t1 effects interrogation of the scanning matrix, a row of which is read out over the column amplifiers and gated by t1 to the register RP by way of the OR gates L1 to Lm. Pulse t2 gates the OR functions Y1 to Ym from RP to store RT, Fig. 2, and also transfers the OR functions X1 to Xm, read out of MM at t1 to store RM, to store RM1. During pulse t3 an Exclusive OR circuit EO derives exclusive OR functions Z from each of the pairs of OR functions X and Y present in each of the compartments of the stores RM1 and RT. The resulting functions Z are stored in the compartments F1 to Fm of store RT1. If the OR functions Y are based on the " loop closed but cut-off relay not operated " condition being represented by binary one and the " loop open or loop closed but cut-off relay operated " condition being the corresponding binary zero on leads such as eij while the cut-off relay energized/not energized conditions are represented by binary one and zero on leads such as fij then a significant change in line condition requiring action is indicated by the Exclusive OR function Z being binary one. From pulse t4 a serial examination of each of the m lines of the scanned group is undertaken, one line being processed for each of the pulses t4 to tm + 4 Fig. 2 shows the circuits for processing the first line of the group involving compartments F1 of stores RM1, RT and RT1. If the Z function is zero there is no response in the circuit and the counter T steps on to produce pulse t5 to examine the next line of the group. If the Z function is a one the action taken depends on whether the component X function is zero or one. If the X function is zero gate G111 is opened. A delay D writes a one in compartment F1 of RM1 to update the record of X functions for the next scanning cycle. A bi-stable FF2 is set and switches the clock pulses from T, which consequently prolongs the pulse t4, and connects the clock pulses from CL to counter V to produce the sub-cycle of pulses v1 to v6. Further action depends on the actual condition of energization of the Cut-off relay and to determine this the pulse v1 Fig. 1, interrogates only those column wire amplifiers of the scanning matrix associated with leads fij monitoring the cut-off relays. The results of the interrogation are stored in RP which was cleared by the pulse t3. Pulse v2 transfers the contents of RP to RT which was cleared at the start of pulse t4. Pulse v3 clears RP and tests the state of compartment F1 of RT by priming gate G112. If the cut-off relay is not energized, the gate G112 opens to drive an encoder ENC which registers the identity of the line under examination in the section LI of address register RC. A bi-stable FF4 is set to gate the address register to a coder OC which transmits the fuel identity of the line to a part of the processor which handles new call originations. This transmission takes place at pulse v5, RT being reset at v4, and FF2, FF4, and the address register being reset ready for a further processing at v6. Should the cut-off relay have been found energized, the one in F1 of RT would produce no effect and counter T would proceed to the pulse t5. In the course of line processing when the function Z is one, should the function X from RM1 also be one, the gate G110 opens and a bi-stable FF3 diverts clock pulses from counter T to counter H which produces the sub-cycle of pulses u1 to u10. This sub-cycle is employed to compare the identity of the line under investigation with the six identities of called lines being processed and recorded in section MH of store MM. The pulses u1 to u6 set up each row of MH on RM for comparison in CN with the line identity set up in address register RC. If no match is found, the pulse u10, which follows ul to u6 and precedes u7, resets compartment F1 of RM1 to update the X functions in MM. These conditions represent a line released from a parked condition. If a match is found, the bi-stable FF1 is set and no further action ensues. The last pulse u7 restores FF1, FF3, and the store RC, counter T receiving clock pulses to advance to a further line. This process continues for each line of the group. After the last line of the group has received attention, pulses tr-2 to tr transfer the updated X functions in RM1, first to RM, and then back into MM pending the next scanning of the group, the processing circuits being reset ready for the next group of lines appearing on the next row of the scanning matrix. It is pointed out that the processing can be carried out by the facilities of a general purpose computer.