baber/WOPTO huggingface dataset:
Patent TW-499606-B (TW)
Title: Signal line repairing structure and forming method thereof
Inventor: JENG JIA-SHIUNG
IPC: G02F1/1362
Filed: 2000-11-06
Granted: 2002-08-21
Abstract: The present invention provides a signal line repairing structure formed in a thin film transistor liquid crystal display and forming method thereof. The repairing structure comprises: a first conductor repairing structure, which is formed at the same time as the gate conductor structure of the thin film transistor liquid crystal display; an insulation layer, formed above the first conductor repairing structure; and, a second conductor repairing structure, which is formed at the same time as the data conductor structure of the thin film transistor liquid crystal display and formed above the insulation layer and connected to the data conductor structure. By the isolation of the insulation layer, a plurality of overlapped regions are provided with the first conductor repairing structure. When the data conductor structure is opened in these overlapped regions, the insulation layer between two overlapped regions is ruined, so that the first conductor repairing region and the second conductor repairing region are formed as electrical connection, thereby completing the repairing work.
Patent TW-504605-B (TW)
Title: Lithographic projection apparatus, method of manufacturing a device using the same, the device and mask
Inventor: DONDERS SJOERD NICOLAAS LAMBER
IPC: G03F7/20
Filed: 2000-11-07
Granted: 2002-10-01
Abstract: An arrangement for supporting a mask 10 comprises a pair of members 14. The mask 10 is held against each member 14 by a vacuum arrangement which prevents relative motion between the mask and members. The members 14 are compliant such that they accommodate flatness variations in the mask 10 but without deforming the mask 10.
Patent TW-535209-B (TW)
Title: Method of forming fine patterns in semiconductor device
Inventor: SHIN HYE-SOO
IPC: G03F7/26
Filed: 2000-12-12
Granted: 2003-06-01
Abstract: A method of forming fine patterns in a semiconductor device is disclosed. A layer to be etched and a hard mask layer are formed in order on a semiconductor substrate. A first photo resist pattern is formed on the hard mask layer. A first hard mask layer pattern is formed by ectching the hard mask layer and by using the first photo resist pattern. After the first photo resist pattern is removed, a second photo resist pattern is formed on the resultant structure. A second hard mask layer pattern is formed by etching the first hard mask layer pattern and by using the second photo resist pattern. The layer to be etched is etched by using the second hard mask layer pattern after the second photo resist pattern. Therefore, the pattern having line ends without rounding can be obtained through twice lithography processes.
Patent TW-512217-B (TW)
Title: Refrigerating equipment and refrigerator provided with refrigerating equipment
Inventor: YUASA MASASHI
IPC: F25D29/00
Filed: 2001-02-27
Granted: 2002-12-01
Abstract: To provide highly efficient refrigerating equipment and a refrigerator equipped with the equipment, in which evaporation temperatures of a plurality of evaporators can be variably controlled, and temperature variation in a cooling chamber is small. A refrigerating cycle is constituted by providing a compressor 301, a condenser 302, the first evaporator 304 and the second evaporator 305 connected serially to each other, a refrigerant flow variable controller 306 such as a motorized expansion valve provided between the evaporators 304 and 305. Further, a bypass circuit 307 bypassing the evaporator 304 and the variable controller 306 is provided in the refrigerating cycle. Evaporation temperatures of the evaporators 304 and 305 are variably controlled by the controller 306. As required, the evaporator 304 is bypassed to optimize the cooling amount of the evaporators 304 and 305 to improve the efficiency of the refrigerating equipment and the storing quality of objects to be cooled.
Patent TW-518448-B (TW)
Title: Projection display system and projector, and menu image display method therefor
Inventor: KOYAMA TAKAAKI
IPC: H04N9/31
Filed: 2001-03-26
Granted: 2003-01-21
Abstract: There is provided a technique for facilitating control of a plurality of projectors. A projection display system comprises a plurality of projectors wherein a plurality of images projected by the projectors are displayed on a common projection screen. Each projector comprises: a control signal processor for processing a control signal given from an external device and generating a processed control signal; and a signal input/output section for input/output of the control signal and the processed control signal. The plurality of projectors are coupled in a cascade connection, by interconnecting the signal input/output sections of the projectors. The control signal and the processed control signal include connection sequence data indicating the cascade connection sequence. The control signal processor of each projector comprises a memory for storing, on the basis of a given control signal, a connection sequence when the projectors are coupled in a cascade connection.
Patent TW-515100-B (TW)
Title: SiGeC semiconductor crystal and production method thereof
Inventor: SAITOH TOHRU
IPC: C30B25/02
Filed: 2001-03-27
Granted: 2002-12-21
Abstract: A B-doped Si1-x-yGexCy layer 102 (where 0 < x < 1, 0.0045 ≤ y < 1) is epitaxially grown on a Si substrate 101 using a UHV-CVD process. In the meantime, in-situ doping is performed using B2H6 as a source gas of boron (B) which is an impurity (dopant). Next, the Si1-x-yGexCy layer 102 is annealed to form a B-doped Si1-x-yGexCy crystalline layer 103. In this case, the annealing temperature is set preferably at between 700 DEG C and 1020 DEG C, both inclusive, and more preferably at between 900 DEG C and 1000 DEG C, both inclusive.
Patent TW-493101-B (TW)
Title: Capacitor structure for thin film transistor substrate
Inventor: CHEN SHIN-MING
IPC: G02F1/153
Filed: 2001-03-29
Granted: 2002-07-01
Abstract: A thin film transistor substrate for liquid display, which comprises: a plurality of gate lines, which are arranged in parallel and extended along the first direction; a plurality of data lines, which are arranged in parallel and extended along the second direction, and crossed vertically with the plurality of gate lines; a plurality of pixel areas, which is a rectangular area in matrix arrangement composed of the plurality of gate lines and the plurality of data lines, wherein each pixel area includes a pixel electrode covering over the rectangular area; a thin film transistor is configured on the first area of the gate line, and a capacitor is configured on the second area of the gate line; in which, the capacitor comprises a plurality of storage capacitors with slanted sidewalls, which are arranged in parallel on the protrusion of the second area of the gate line; and, the pixel electrodes covering the plurality of storage capacitors are used as an upper capacitor plate.
Patent TW-I221697-B (TW)
Title: Cascadable, high efficiency charge pump circuit and related methods
Inventor: SHEARON WILLIAM BRANDES
IPC: H02M3/07
Filed: 2001-06-15
Granted: 2004-10-01
Abstract: A charge pump circuit includes a plurality of pumping capacitors, a plurality of switches connected to the pumping capacitors, and a controller for generating first and second sets of switch control signals for controlling the switches so that the pumping capacitors generate either an increased or a negative output voltage. The controller includes a clock having first outputs for the first set of switch control signals, a transient clamp network having second outputs for the second set of switch control signals, and a respective level shifting capacitor connected between each first output and a corresponding second output and cooperating with the transient clamp network so that the second set of signals is level shifted from the first set.
Patent TW-527757-B (TW)
Title: Electrical connector
Inventor: YAMAMOTO YASUHIRO
IPC: H01R4/22
Filed: 2001-05-24
Granted: 2003-04-11
Abstract: An electrical connector apparatus and method utilizing an elongate electrically conducting ferrule (20) having a contact (24) on one end and a hollow conical threaded portion (22) for receiving a wire on the other end, and a color coded insulating boot (10) threaded over the ferrule to cover all but the contact. The electrical wire is wrapped around threaded portion (22) which is then tightened into boot (10), thereby securing the wire to the ferrule (20). Ferrule (20) can then be electrically connected by use of contact (24) to a device for receiving power.
Patent TW-I237432-B (TW)
Title: Bushing for gas insulated switching gear
Inventor: ARIOKA MASAHIRO
IPC: H02B13/035
Filed: 2001-06-01
Granted: 2005-08-01
Abstract: To obtain a gas-insulated switchgear enables the size reduction, the common use of respective bushings and the improvement of the strength of its enclosing container. A gas-insulated switchgear comprising bushings mounted to and passing through a vessel wall of the hermetic vessel, each having an outer end connected to an insulated bus conductor at the outside of the hermetic vessel and an inner end connected to the electric device within the hermetic vessel. Each of the bushings has a central axis that is perpendicular to the common axis of the electric device and spaced apart from each other in the direction of extension of the common axis and shifted by a predetermined angle with respect to each other about the common axis. The flat bushing mounting vessel walls are tilted from inside to outside relative to other portion of the wall.
Patent TW-583690-B (TW)
Title: Arrangement to align the magnetization-direction of magnetic-layers, vacuum-coating device with a coating room, substrate with at least one magnetic layer and production method for said substrate
Inventor: MAASS WOLFRAM
IPC: H01J37/34
Filed: 2001-07-05
Granted: 2004-04-11
Abstract: An arrangement to align the magnetization-direction of magnetic-layers on the disk-shaped substrates with a substrate-holder (1) for at least a substrate (3), which defines a position-plane (E) for said at least one substrate, a magnet-arrangement on one side of the position-plane (E). It is characterized in that the magnet-arrangement includes at least three electro-magnets (9), whose dipole-axes (A) locate at least nearly parallel to the position-plane (E) and, viewed perpendicular to the position-plane, form a closed area (F).
Patent TW-540238-B (TW)
Title: Method and system for remote television replay control
Inventor: SWEATT MILLARD E III
IPC: H04N5/445
Filed: 2001-08-08
Granted: 2003-07-01
Abstract: A method, system, computer medium, and other embodiments for integrating unrelated web hosted services with stand-alone media-based devices are provided. Users can access and control the media-based device conveniently with a web-browser through various portals on the Internet. In one embodiment, users access the media-based device through one or more unrelated web portals, so as to control and to program the media-based device in a single web session, and to see information both stored on the media-based device and originating from third-party online sources of information and services in a single integrated presentation.
Patent TW-515908-B (TW)
Title: Testing method and testing device for semiconductor integrated circuits
Inventor: UCHIDA REN
IPC: H01L27/04
Filed: 2001-08-24
Granted: 2003-01-01
Abstract: The set values of the base power supply voltages are divided between 10 [V] and 0 [V], the upper limit value and the lower limit value of the drive voltage specification of a liquid crystal driver. A base power supply potential difference of 10 [V] between V1 to V2 of the base power supply terminals can be generated. By taking the gradation levels included between V1 to V2 of these base power supply terminals as test objects, each of the neighboring gradation output levels can mutually have a potential difference of about 200 [mV] (base power supply potential difference between the terminals 10000 [mV]/51 gradation levels). For the gradation levels included between these base power supply terminals, for every gradation level, test is performed while changing sequentially the input data and the setting of the judgment level of the comparator, and the gradation levels included in this interval are all tested.
Patent TW-550605-B (TW)
Title: Magnetic isolation gate driver
Inventor: ZHANG ALPHA J
IPC: H01F38/00
Filed: 2001-08-30
Granted: 2003-09-01
Abstract: A kind of magnetic isolation gate driver includes the followings: pulse width modulation driver, which is capable of generating pulse width modulation signal; pulse isolation transformer; an input terminal capacitor, which is connected in series with the input terminal of the transformer; output terminal capacitor, which is connected in series with the output terminal of the transformer; output terminal diode, which is connected in parallel with the output terminal of the magnetic isolation gate driver; and output terminal small power metal oxide semiconductor field effect transistor (MOSFET) connected in series with the output terminal capacitor, in which the source of the MOSFET is connected to one terminal of the transformer output terminal, and the gate is connected to the other terminal of the transformer output terminal. The transformer output terminal, the output terminal capacitor, the output terminal diode, and the small power MOSFET constitute a serially connected loop. Through the circuit stated above, when the power source is turned on and turned off, the magnetic isolation gate driver will not generate erroneous conduction of the switch tube to effectively prevent malfunction of the entire power source.
Patent TW-560136-B (TW)
Title: Method and apparatus for gated ACK/NAK channel in a communication system
Inventor: BENDER PAUL E
IPC: H04L1/12
Filed: 2001-08-31
Granted: 2003-11-01
Abstract: A method and apparatus are disclosed for transmitting ACK/NAK information in a communication system including a transmitter (74) for transmitting ACK/NAK information on an ACK/NAK channel, and a channel gate (699) for gating the ACK/NAK channel based on whether a matching preamble is detected in a received data unit by receiver (106). The data unit is a first data unit in a series of data units comprising a data packet. The channel gate (699) prevents transmission of the ACK/NAK channel when receiver (106) has failed to receive the matching preamble in the data unit.
Patent TW-544897-B (TW)
Title: Circuit arrangement and method for checking the authenticity of said circuit arrangement
Inventor: KUX ANDREA
IPC: H01L29/06
Filed: 2001-12-11
Granted: 2003-08-01
Abstract: There is provision for a sensor arrangement, which is arranged opposite a surface of a first substrate, to be formed on a second substrate. In this way, it is possible to establish whether the arrangement comprising first and second substrates is or has been separated.
Patent TW-594142-B (TW)
Title: Display device
Inventor: YOSHIHARA TOSHIAKI
IPC: H05B44/00
Filed: 2001-12-14
Granted: 2004-06-21
Abstract: In a display device employing a field-sequential method, a judgement whether display data is motion picture data or still picture data is made, and the frame number per second is increased for the display of a motion picture during which color break easily occurs by the movement of the line of sight of a user, while the frame number is made smaller than that for the display of a motion picture, for the display of a still picture during which color break hardly occurs. Further, the temperature of a liquid crystal panel is detected, and the frame number per second is increased so as to reduce color break when the result of the detection is not lower than a predetermined temperature, while, the frame number is decreased so as to enable display at low temperature when the result of the detection is lower than the predetermined temperature.
Patent TW-515718-B (TW)
Title: Air cleaning device
Inventor: ANNO KOJI
IPC: B01D53/32
Filed: 2001-12-18
Granted: 2003-01-01
Abstract: An air cleaning device (A) includes a bulb-shaped casing (1) provided at one end with a base (4) and at the other end with an outlet (3e, 3a), in which an Ac/Dc converter (11) for converting an alternating current from the base (4) into a direct current, a boosting transformer (12) for boosting the direct current, and a negative ion generator or ozone generator (21 or 21A) connected to the boosting transformer (12) are accommodated. Application of high voltage from the boosting transformer (12) to the negative ion generator or ozone generator (21 or 21A) induces electrical discharge to generate negative ions alone or both negative ions and ozone and release the negative ions alone or both the negative ions and the ozone from the outlet (3e, 3a). The device can be disposed on the floor, suspended from above, hung on the wall or set in position at an optional location, using as its power source electric power from a socket (41A, 41B) for a reading lamp, a socket (62) built in the ceiling, or an electrical receptacle mounted in a wall, so that negative ions alone or both negative ions and ozone can be released in an optional direction.
Patent TW-593045-B (TW)
Title: Accommodation box structure of a motorcycle
Inventor: MORIIWA TAKEHITO
IPC: B60K1/04
Filed: 2001-12-31
Granted: 2004-06-21
Abstract: A battery accommodation part 52 for accommodating the battery 51 is provided on the rear part of the accommodation box 14 and on the forward part of the fuel tank 15. To provide an accommodation box structure of a motorcycle capable of ensuring a tank capacity by expanding a fuel tank in the longitudinal and lateral directions by preventing a space around the fuel tank at the rear part of the motorcycle body from being occupied by a battery in a case of the motorcycle such as a business motorcycle with a diameter of wheel larger than that of a scooter-type motorcycle, and capable of easily performing the maintenance of the battery by opening a seat forming a lid of the accommodation box, etc., because the battery is accommodated in the rear part of the accommodation box and improving the maintainability of the battery.
Patent TW-I235909-B (TW)
Title: Apparatus and circuit having reduced leakage current and method therefor
Inventor: CLARK LAWRENCE T
IPC: G06F1/32
Filed: 2002-03-07
Granted: 2005-07-11
Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit has a voltage regulator that is used to provide a power supply potential to a memory circuit while a logic circuit is decoupled from a power supply potential.
Patent TW-538434-B (TW)
Title: Bump manufacturing method
Inventor: WANG JUNG-YU
IPC: H01L21/00
Filed: 2002-03-14
Granted: 2003-06-21
Abstract: This invention discloses a bump manufacturing method. Firstly, the wetting layer of the under bump metallurgy stack structure is patterned. A dry film is coated and patterned to form opening in the dry film and expose the wetting layer and another part of the metal stack structure. After the dry film residue in the opening is removed by using plasma, a solder paste is used to fill up the opening. A bump is formed on the wetting layer after a reflow process. Then, the residual dry film is removed and the bump is used as a mask to remove excessive metal stack structure underneath the bump to complete the under bump metallurgy layer. During removing the dry film residue, solder reflowing and removing residual dry film, the under bump metallurgy stack structure which has not been patterned can isolate the passivation layer below. Therefore, contamination produced on the passivation layer around the bump can be prevented and device stability can be improved.
Patent TW-524953-B (TW)
Title: Gasification and slagging combustion system
Inventor: ISHIKAWA RYUICHI
IPC: B09B3/00
Filed: 2002-04-18
Granted: 2003-03-21
Abstract: The present invention relates to a gasification and slagging combustion system in which wastes are gasified to produce combustible gas, and the produced combustible gas is combusted together with unburned carbon to generate molten slag. The gasification and slagging combustion system comprises a gasification furnace (2) for gasifying wastes to produce combustible gas, a high-temperature combustor (3) for combusting the combustible gas produced in the gasification furnace (2) to generate combustion gas and melting ash content contained in the combustible gas at a high temperature to produce molten slag (h), a waste heat boiler (7) for recovering heat of the combustion gas discharged from the high-temperature combustor, and a cooling device for cooling the combustion gas before the combustion gas is introduced into the waste heat boiler (7).
Patent TW-I226771-B (TW)
Title: Service application architecture for integrated network service providers
Inventor: CREAMER THOMAS E
IPC: H04L29/00
Filed: 2002-05-23
Granted: 2005-01-11
Abstract: An application execution environment for an intelligent network. The application execution environment includes a service logic execution environment (SLEE) in a service logic layer. Notably, the SLEE can be a JAIN-compliant SLEE. The SLEE can include an event routing bus for routing events between service components in the service logic layer and client components in a protocol layer and an application layer. The application execution environment also can include at least one client component in the protocol layer, wherein the at least one client component is communicatively linked to the SLEE through a connector/wrapper interface. Finally, the application execution environment can include at least one telephony service component executing in the SLEE, wherein the telephony component can be configured to communicate with client components in the protocol layer and other service components in the service logic layer through the event routing bus in the SLEE.
Patent TW-I270080-B (TW)
Title: Nonvolatile semiconductor storage device
Inventor: SHIOYAMA KAZUTOMO
IPC: H01L21/822
Filed: 2002-06-26
Granted: 2007-01-01
Abstract: A nonvolatile semiconductor storage device, comprising: a plurality of memory blocks, and at least one high voltage generation circuit, wherein the high voltage generation circuit is formed by a plurality of stages of basic pump cells, each basic pump cell including, a voltage increasing capacitor, an equalizing transistor connected to a voltage of a previous basic pump cell stage, a capacitor for increasing a voltage at a gate of the equalizing transistor, and a transistor which connects the voltage of the previous basic pump cell stage to the gate of the equalizing transistor, the nonvolatile semiconductor storage device further comprises, a discharge circuit connected to a node in the high-voltage generation circuit which has a high voltage, for discharging the node to a potential equal to or lower than a power supply voltage when the high-voltage generation circuit is stopped, and a control circuit for controlling the discharge circuit.
Patent TW-I264099-B (TW)
Title: Lead frame and manufacturing method therefor
Inventor: IIDANI ICHINORI
IPC: H01L21/48
Filed: 2002-07-09
Granted: 2006-10-11
Abstract: To provide an inexpensive lead frame by suppressing the amount of palladium to be used to minimum, and to provide a method for manufacturing a lead frame having no defect. A palladium plate 1a is applied only to the surface of a metal plate 1 on which a semiconductor element is mounted and on the surface of the substrate. A formed lead, pad, other part where no mounting is required, and the side surface, are not plated.
Patent TW-I247923-B (TW)
Title: Optical communication device and material therefor
Inventor: YOSHIHARA SATORU
IPC: G02B6/12
Filed: 2002-08-06
Granted: 2006-01-21
Abstract: A material for optical communication device made of ceramics or glass ceramics having a negative thermal expansion coefficient of -10 to -120x10<-7> DEG C within the temperatures of -40 to 100 DEG C, characterized in that the material is treated by a solution containing one or two organic silicon compounds selected from the group consisting of siloxane compounds and silazane compounds.