baber/WOPTO huggingface dataset:
Patent TW-287258-B (TW)
Title: Graphic control chip structure and signal processing method thereof
Inventor: DENG I-CHERNG
IPC: G06F3/13
Filed: 1994-11-22
Granted: 1996-10-01
Abstract: A graphic control chip structure, which records multiple display signal in VRAM through address encoder, then by first control signal of one first counter sends the display signal to screen output through RAMDAC from VRAM, and by one second control signal controls the RAMDAC for pausing display signal output to generate display interval, comprises the features of: the graphic range of display signal is set according to the screen resolution, and when the screen resolution is less than one predetermined resolution, adding multiple non-effective display signal, and based on the predetermined resolution storing the display signal address in the VRAM; and the second control signal is generated by one second counter according to the screen resolution, and is sent out when the display signal output in the graphic range is over, to pause display signal output to achieve full-screen effect.
Patent TW-256894-B (TW)
Title: Method and apparatus for multiple memory bank selection
Inventor: Robert edward busch
IPC: G11C8/12
Filed: 1995-03-23
Granted: 1995-09-11
Abstract: In one aspect a memory bank selection system includes two asynchronous RAS pins and a single CAS pin, a switching circuit for each memory bank and a bank address decoder with an output to each switching circuit. The RAS pins are available to all of the switching circuits. A given switching circuit selects its associated bank if an active RAS signal is present and the bank address decoder output was sent thereto. The number of memory banks that can be simultaneously active directly depends on the number of RAS inputs. In another aspect, the number of CAS pins is equal to the number of asynchronous RAS pins.
Patent TW-357156-B (TW)
Title: Polymerization catalyst systems, their production and use
Inventor: SPECA ANTHONY N
IPC: C08F10/00
Filed: 1995-07-27
Granted: 1999-05-01
Abstract: A method of producing carrier catalysts, including a metallocene catalyst and alumoxane activator as well as a porous carrier, with the following steps: (a) mixing of the metallocenecatalyst and the alumoxane catalyst in the solvent for formation of solution, having the metallocene catalyst the following formula: where M is zirconium; R1 and R2 the same or different, selected from halogen atom and C1-C4 alkyl; R3 and R4 hydrogen atom; R5 and R6 the same or different, selected from halogen atom and C1-C4 alkyl; R7 is, where R11 and R12 the same or different, selected from C1-C4 alkyl; M2 is silicone; and the R10 radical groups the same, and hydrogen atom, phenyl or dense ring system; (b) merging the solution and the porous carrier, being the total volume of the solution inferior by 4 times the volume of the porous carrier and over 1 time the volume of the porous carrier.
Patent TW-278271-B (TW)
Title: Electric motor
Inventor: ISOBE TOMONORI
IPC: H02P6/15
Filed: 1995-08-21
Granted: 1996-06-11
Abstract: An control means for the rotation of electric motor, characterized by comprising: aa rotor having a plurality of poles; aa plurality of stators having magnet field to conduct the poles of the rotor; controller for controlling the rotation of the rotor up to a predetermined limit by adjusting the voltage of DC power applied on the winding of the rotor; cconverter from AC power to DC power; sswitch means of power for applying on the winding of the rotor with DC power according to the time signal received from sensors while the rotor rotating by; and compensating means for restricting the rotation of the rotor under a pre-decided value according to the detected time signal while the variable of rotation of the rotor being beyond the predetermined limit.
Patent TW-383481-B (TW)
Title: Semiconductor device
Inventor: OHMI TADAHIRO
IPC: H01L23/522
Filed: 1996-01-24
Granted: 2000-03-01
Abstract: The purpose of this invention is to form inter-layer insulation film for rapid transmission of the heat generated between the wiring and the wiring with smaller capacitance so as to provide a high speed and highly reliable semiconductor device. The invented semiconductor device has low resistance wiring of multi-layered metal isolated by the first insulation material on the surface and/or the back of conductive substrate. Its feature is to allocate the penetration holes on the first insulation material between the low resistance wiring, and penetration holes are composed of through holes filled with conductive material and the depositing hole filled with the second insulation material with larger thermal conductivity than the first insulation material; and there are the same through holes and depositing holes between the low resistant wiring and conductive substrate, or between the top layer of the low resistance wiring and the radiators.
Patent TW-309689-B (TW)
IPC: B65H43/08
Filed: 1996-04-23
Granted: 1997-07-01
Abstract: The detector comprises a row of reading devices arranged to face the band to which the printing is to be applied. Each device comprises one or two illuminating optical fibres (30) each associated with a single reading optical fibre (40). The reading fibre conveys light reflected by the band to one of a row of photodiodes situated behind the machine. The extremity of each reading optical fibre (40) is rigidly held in position with a spherical of hemi-spherical lens by means of an optical quality glue. The refractive index of the optical glue used is ideally equal to that of the lens used to focus the image of the band within the optical fibre.
Patent TW-359626-B (TW)
Title: Process for producing a particulate composition particularly useful as a sorbent
Inventor: KHARE GYANESH P
IPC: B01J20/30
Filed: 1996-06-14
Granted: 1999-06-01
Abstract: A process to produce a sorbent particulate composition that comprises zinc aluminate and zinc oxide, where said sorbent particulate composition comprises particles that have a size from 30 to 1000 microns, said process comprising: (a) contacting: (1) a zinc component, (2) an alumina component, (3) a dispersant component, (4) a binder component, and (5) an acid component to form a mixture, where said mixture is capable of being spray dried; and then (b) spray drying said mixture to form particles; and then (c) calcining said particles to combine said zinc component and said alumina component to produce particles that comprises zinc aluminate, where said particles have a size from 30 to 1000 microns and where said calcining is conducted at a temperature in the range of 300 DEG C to 1200 DEG C for a time in the range of 0.5 to 12 hours; and then (d) contacting said particles with a zinc compound, wherein said zinc compound is zinc oxide, or any other zinc compound convertible to zinc oxide, to form a sorbent particulate composition; wherein said zinc component is zinc oxide, or any other zinc compound, which can combine with said alumina component to form zinc aluminate during step (c), and wherein said alumina component comprises alumina, or aluminosilicate, where said alumina component can combine with said zinc component to form zinc aluminate during step (c), and wherein said dispersant is selected from condensed phosphates, sulphonated polymers, and mixtures thereof and wherein said binder component is a cement or clay, and wherein said acid component is an organic acid or a mineral acid that promotes the combination of the zinc component and the alumina component to form zinc aluminate.
Patent TW-302445-B (TW)
Title: A method and system for bypassing in a load/store unit of a superscalar processor
Inventor: DAVID G CAFFO
IPC: G06F13/10
Filed: 1996-06-17
Granted: 1997-04-11
Abstract: A load queue is provided in a load/store unit of a superscalar processor that includes a real page number buffer for storing a real page number for each instruction entry in the load queue. The load queue also includes a real page number comparator coupled to the real page number buffer for comparing executing load instruction entries with queued load instruction entries in the load queue. The load queue further includes a cache line modified register coupled to the data cache. The cache line modified register marks the queue load instruction entries when a cache line of the data cache addressed by the queued load instruction entry has been modified. In a preferred embodiment, when the executing load instruction is out of program order with respect to one of the queued load instructions, and the modified cache line register has marked the queued load instruction, the load queue signals a sequencer unit to cancel the queued load instruction. The load queue further includes an instruction identification buffer coupled to a sequencer unit for storing an instruction identifier for each entry in the load queue and a program order comparator coupled to the instruction identification buffer. The program comparator compares the ordering of instruction entries in the load queue with the executing load or store instruction.
Patent TW-387903-B (TW)
Title: Vapor phase synthesis of rubbery polymers
Inventor: CALDERON NISSIM
IPC: C08F2/34
Filed: 1996-08-30
Granted: 2000-04-21
Abstract: By utilizing the vapor phase polymerization techniques of the present invention, numerous distinct and highly beneficial advantages are realized. For instance, cis-1, 4-polyisoprene rubber and high cis-1,4-polybutadiene rubber having a consistent and controllable molecular weight can be easily and practically prepared without utilizing a solvent. The subject invention more specifically discloses a method for vapor phase polymerizing isoprene into cis-1,4-polyisoprene in a process comprising the steps of: (1) charging into a reaction zone said isoprene and a preformed catalyst system which is made by reacting an organoaluminum compound with titanium ttrachloride, preferably in the presence of at least one ether; wherein the isoprene is maintained in the vapor phase in said reaction zone by a suitable combination of temperature and pressure; (2) allowing said isoprene to polymerize into cis-1,4-polyisoprene at a temperature within the range of about 35 DEG C to about 70 DEG C; and (3) withdrawing said cis-1,4-polyisoprene from said reaction zone. It has been determined that gel formation can be reduced by conducting the polymerization of isoprene monomer in the presence of a diarylamine, such as para-styrenated diphenylamine.
Patent TW-331677-B (TW)
Title: Digital delay locked loop circuit using synchronous delay line
Inventor: SEUNG-HUN LEE
IPC: H03L7/00
Filed: 1996-12-11
Granted: 1998-05-11
Abstract: Digital delay locked loop circuit using synchronous delay line can receive a input point of a external time pulse and generate a synchronous internal time pulse. It includes a delay buffer to delay the external pulse, a preset time, a master delay, a first delay line, a second delay time, a switch and a delay phase comparison device. To excite port and preset time when the first time pulse at least has a same phase with delay output in delay line. The delay phase compasison device connects the unit delay output in first delay line to equal switch port of the switch device.
Patent TW-413780-B (TW)
Title: A processing device for character, character array input
Inventor: NISHIBORI MASAHIRO
IPC: G06F3/033
Filed: 1997-02-12
Granted: 2000-12-01
Abstract: To facilitate the input operation and fast input in a single language input data processing system such as Chinese, Japanese, European language in the invention, all the auxiliary characters concerning the characters or character arrays to be inputted are arranged in a specified order to classify them into a dictionary with plural layers of data. The data in the dictionary is formed with the structure that the items one layer above the data integrates all layers of headers one layer below the data. The display processing means of the character/character array chooses the previously used layer menu according to the mentioned dictionary. It also means that in order to match the position of the menu of the upper layer on the monitor screen inputted by the input device, it orderly shows the item represented by the position and take it as the menu of the header in the next lower layer. The processing mean selection of character/character array is to treat the chosen item of character/character array in any menu as the input data of data processing system.
Patent TW-330901-B (TW)
Title: Water vehicle and method for propelling the same
IPC: B63B1/26
Filed: 1997-03-12
Granted: 1998-05-01
Abstract: A water vehicle comprises a first and a second foil which are at least partly submersible and which are movable relatively to each other at least to a limited extent,.
Patent TW-370468-B (TW)
Title: Modular apparatus for the demineralization of liquids a modular system for the demineralization of aqueous liquids comprising a plurality of modular units for the demineralization of liquids
Inventor: TOWE IAN GLENN
IPC: C02F1/469
Filed: 1997-03-11
Granted: 1999-09-21
Abstract: A modular system for the demineralization of aqueous liquids comprising a plurality of modular units for the demineralization of liquids, each of the modular units being encapsulated and having a cathode proximate a first end of the modular unit and an anode proximate the opposite end of said modular, and having a plurality of alternating diluting compartments and concentrating compartments positioned between the cathode and the anode, the diluting and concentrating compartments defined by anion and cation permeable membranes, ion exchange material positioned within the diluting compartments, the system having conduit means for passing a first liquid to be purified through the diluting compartments and conduit means for passing a second liquid through the concentrating compartments for accepting ions from the first liquid, means for passing an electrolyte to the cathode and anode and means for recovering the purified liquid from the diluting compartments. Quick release securement means are provided to interconnect the modular units in the system to allow for facile substitution of modular units for servicing and to permit modification of flow capacity requirements by increasing or decreasing the total number of modular units in the system.
Patent TW-338095-B (TW)
Title: Apparatus for producing chemical-free dry air
Inventor: CHO SHUHEI
IPC: F24F13/28
Filed: 1997-04-10
Granted: 1998-08-11
Abstract: A chemical-pollution-free dry air generator, consisting: the air filter formed by an air extractor, chemical filter and HEPA fiter; a sealed chamber passing through the air filter unit for supply of air to; and dry air generator deployed in the sealed chamber given above for the supply of dry air to the outside, in addition to the supply of air to the chamber.
Patent TW-381325-B (TW)
Title: Three dimensional high density deep trench ROM and the manufacturing method thereof
Inventor: SHIU JEN-TSUNG
IPC: H01L21/8246
Filed: 1997-04-15
Granted: 2000-02-01
Abstract: A kind of three dimensional high density deep trench ROM and the manufacturing method thereof wherein the ROM comprises a silicon substrate with a plurality of parallel trenches and a bulged non-trench portion between each neighbored trench. After programming, forming deeper trench to define closed cells to avoid the transistor cell leak resulted from displacement caused by re-implantation after encoding and also reduce the breakdown in the source/drain area.
Patent TW-355790-B (TW)
Title: CD and its manufacturing, and the disk material manufacturing
Inventor: YAKAKUWA ATSUSHI
IPC: B29D17/00
Filed: 1997-07-11
Granted: 1999-04-11
Abstract: A kind of CD that comprises a base board and the data recording surface on said board according to specified data; the said board is a disk made of polymers of polyethlene and the said data layer is made of hardened resin.
Patent TW-550265-B (TW)
Title: Substituted pyrido- or pyrimido-containing 6,6-or 6,7-bicyclic derivatives
Inventor: CHEN YUHPYNG L
IPC: A61P25/22
Filed: 1997-08-04
Granted: 2003-09-01
Abstract: This invention relates to compounds of the formula (I), wherein A, B, D, E, K, G, Z, R3 and R5 are defined as in the specification, and to the pharmaceutically acceptable salts of such compounds. A compound of the formula the dashed lines represent optional double bonds; A is CH; B is -CHR1R2; D is nitrogen; E is CH2 or C=O; G is CHR8 or NR8 where R8 is H or C1-C4 alkyl; K is -C(=O), -CHR8 where R8 is hydrogen or C1-C2 alkyl, oxygen, -OCH3, -NR8 wherein R8 is hydrogen or C1-C4 alkyl, or CH(COO(C1-4alkyl), or if K is double bonded to an adjacent ring atom it is N or CR8 wherein R8 is hydrogen or C1-C2 alkyl; the 6- or 7-membered ring that contains D, E, K and G may contain from one to three double bonds; R1 is C1-C6 alkyl optionally substituted with hydroxy; R2 is C1-C12 alkyl; R3 is hydrogen or C1-C4 alkyl; R5 is substituted phenyl, which is substituted with three substituents selected, indendently, from chloro and C1-C6 alkyl; Z is NH or oxygen; with the proviso that: in the six or seven membered rings of structures in formula I, there can not be two double bonds adjacent to each other; or a pharmaceutically acceptable salt of such compound.
Patent TW-373169-B (TW)
Title: Process for preparing magnetic recording disc for use in hard disc
Inventor: LUO YU-YUN
IPC: G11B5/84
Filed: 1997-11-11
Granted: 1999-11-01
Abstract: The invention provides a process for preparing a magnetic recording disc for use in the hard disc, comprising a round disc type non-magnetic carrier having a thin layer about 300 to 1000 angstrom thick Ni-Al sputtered on it to form a fine grain structure, a 50 to 300 angstrom thick Cr-V dielectric layer on the seed layer, and a 100 to 300 angstrom CoCrPtTa alloy layer on the dielectric layer. This thin film type of magnetic recording disc offers high coercivity, signal to noise ratio, overwrite performance and off-track capacity.
Patent TW-396672-B (TW)
Title: Protective relay arrangement for short-circuit and earth fault protection in an electricity distribution network
Inventor: KUISTI HARRI
IPC: H02H3/30
Filed: 1997-11-25
Granted: 2000-07-01
Abstract: The invention relates to a protective relay arrangement for the short-circuit and earth fault protection of an electricity distribution network, the arrangement comprising at least two protective relays of the same substation, each adapted to monitor one or more physical variables, such as current and/or its phase angle, of an electricity distribution network line for detecting a short-circuit or earth fault on the line, and comprising means for measuring said physical variables, for comparing the measurement results with corresponding limit values, and, upon detection of a short-circuit or earth fault, for emitting control signals to isolate the faulted line from the electricity distribution network. In accordance with the invention, the arrangement further comprises a data transmission bus within the substation, such as a so-called field bus, and that each relay further comprises means for transmitting the measuring results and information derived therefrom via the data transmission bus to the other relays of the arrangement and means for receiving these measuring results and information derived therefrom from at least one, any other relay of the arrangement, and for using the results when making a decision to emit a control signal.
Patent TW-468318-B (TW)
Title: Method and device in telecommunications network
Inventor: HULTGREN ANDERS
IPC: H04Q3/00
Filed: 1998-03-06
Granted: 2001-12-11
Abstract: The present invention concerns a method and an apparatus for designing, providing and managing customer services in a telecommunications network. The services are handled in a separate service network, connected to the telecommunications network in a logical service means, for example an SCP in an intelligent network. The service network is based on existing and commonly available network resources, for example, the Internet. Also, existing and commonly available terminals, such as personal computers are used for handling the services.
Patent TW-368623-B (TW)
Title: Semiconductor integrated circuit device
Inventor: KOIKE TATSUNORI
IPC: G11C29/36
Filed: 1998-03-23
Granted: 1999-09-01
Abstract: Because it is difficult to reduce the number of components except the DRAM, the exceptional result of components excluding the DRAM like the I/O buffer has the possibility influencing the burn-in test result and to reduce the accuracy of reliability test for DRAM. In the semiconductor integrated circuit, the graphic generator will generate the corresponding burn-in test graphic of inputted control signal from external terminal. If only employing the control signal from the external terminal and I/O buffer to proceed the burn-in test, it can accurately proceed the reliability test of DRAM by reducing the operational number of I/O buffer.
Patent TW-432670-B (TW)
Title: Clock generating circuit having high resolution of delay time between external clock signal and internal clock signal
Inventor: TAKAI YASUHIRO
IPC: H03K5/131
Filed: 1998-06-03
Granted: 2001-05-01
Abstract: A clock generating circuit synchronizes an internal clock signal (CLKin) with an external clock signal (CLKex), and has a delay circuit (26a) implemented by a series of delay stages (2600 to 260N) connected through pairs of signal transfer lines (Ai/Bi) to one another, each of the delay stages has a series combination of a first charging circuit (QP1/QP2) and a first discharging circuit (QN1/QN2) connected between a positive power line and a ground line and a series combination of a second charging circuit (QP3/QP4) and a second discharging circuit (QN3/QN4) connected in parallel to the first series combination, and each pair of signal transfer lines is connected between the first series combination of one of the delay stage and the second series combination of the next delay stage; a potential edge signal is propagated through charging/discharging operations toward a certain delay stage during a first time period equal to the pulse period of the external clock signal, and returns to the first delay stage so as to generate a one-shot pulse in the next pulse period; even if the pulse period fluctuates, the delay circuit changes the turning point of the potential edge signal, and makes the internal clock signal strictly synchronous with the external clock signal.
Patent TW-387185-B (TW)
Title: Telecommunications network architecture deploying intelligent network services in a legacy network
Inventor: WARD RONALD L
IPC: H04M3/42
Filed: 1998-07-24
Granted: 2000-04-11
Abstract: A telecommunications network (10) for providing intelligent network services includes a distributed switching system (19) having a call control computing platform (12) coupled to a digital loop carrier (16), where the digital loop carrier (16) is coupled to a plurality of customer premises equipment (18). A local switch (30) is coupled to the digital loop carrier (16), and at least one service control point (40, 42) is coupled to the call control computing platform (12) and the local switch (30). The at least one service control point (40, 42) contains service definitions and logic of both legacy services and intelligent network services.