baber/WOPTO huggingface dataset:
Patent JP-S61114647-A (JP)
Title: Picture reader
Inventor: TANAKA SEIICHI
IPC: H04N1/04
Filed: 1984-11-09
Abstract: PURPOSE:To simplify the circuit constitution by setting and inputting a resolution K of a reader, adjusting the luminous amount of a light source into 1/K based on the inputted K and setting a reset pulse period of a buffer to the value K so as to eliminate the hardware/software for averaging complicated picture elements. CONSTITUTION:A microcomputer 8 operates a preset value to a counter CNT based on a set resolution K value set by a resolution setting means (switch) 7 and controls the light source control circuit 11 so as to bring the luminous amount of the light source 12 in response to the inputted resolution K into 1/K. That is, the luminescence is adjusted to 1/K so that the incident luminous amount to a sensor 1 in response to the set resolution K is obtained and even when the resolution K is changed, while the density is kept the same, the output of the sensor 1 and the output of an A/D converter 6 are made identical.
Patent JP-H0555252-A (JP)
Title: Manufacture of thin film transistor
Inventor: MORIYA HIROYUKI
IPC: H01L29/78
Filed: 1991-08-22
Abstract: PURPOSE:To provide the manufacturing method of a thin film transistor of a structure, wherein the dimensional accuracy of offset widths between gate electrodes and a drain region is improved. CONSTITUTION:First and second gate electrodes 12 and 13 are formed on a substrate 11 and thereafter, first sidewalls 15a and 16b are respectively formed on respective gate electrode side surfaces 12b and 13b. Then, after a gate insulating film 18 is formed on the whole surface on the sides of the electrodes 12 and 13, a contact hole 21, which is led to a second gate electrode side surface 13a and the substrate 11, is formed in the film 18. Then, an active layer 22 is formed on the whole surface on the side of the film 18 and an impurity diffused layer 23 is formed in the layer 22 on the side of the side surface 13a. Subsequently, after a second side wall 25 is formed on an active layer side surface 22a, a mask pattern 26 which covers the layer 22 on the electrode 12 is formed. An impurity is introduced in the layer 22 using the pattern as a mask to form drain and source regions 27 and 28 and an offset region 29 is provided on the layer 22 under the lower part of a second side wall 25a.
Patent JP-H03100638-A (JP)
Title: Photographing device
Inventor: YANAGAWA HITOSHI
IPC: G03B17/24
Filed: 1989-09-14
Abstract: PURPOSE:To save time and to easily record with excellent data character quality by providing a data imprinting device and a data inputting device and imprinting the inputted data on a film when a data imprinting switch is depressed. CONSTITUTION:When a power source switch 4a is turned on, a CPU 31 operates by the program of a ROM 32. The CPU 31 performs various setting, detects photographing data P is coming from a photographing data inputting opening 2 by a first sensor S1. When the photographing data P comes to the first sensor S1, a film driving part 35 operates to rotate a capstan roller 12, the image of the photographing data P is projected on the film F and the projected image is recorded. When the trailing edge of the photographing data P passes through a second sensor S2, the capstan roller 12 is stopped. Thus, when the necessary data is inputted to the data inputting device, the necessary data is easily imprinted on the film by only depressing the data imprinting switch.
Patent JP-H04116769-A (JP)
Title: Vector processor
Inventor: FURUSAWA KAZUAKI
IPC: G06F17/16
Filed: 1990-09-07
Abstract: PURPOSE:To shorten operation time and to improve speed by appropriately giving the timing of the execution instruction of an instruction referring to a vector register in the middle of storage even in a case when the storage of an operated result is one element at every clock and even in a case when it is one element at every N-clocks as well. CONSTITUTION:An R0, R1 reading flag restricting the reading of the vector registers R0 and R in a subsequent operation is lighted from the instruction execution instruction to the end of reading. An R2 writing flag restricting the writing of a vector register R2 is lighted from the instruction execution instruction to the end of writing. When a result written into R2 is read in the subsequent operation, an R2 write waiting flag giving the instruction execution instruction of the subsequent operation until the writing of R2 is started is lighted for the time of a clock equivalent to the number of pipe line steps for addition from the instruction execution instruction. At the time of using by the instruction to be executed, the release of the busy state of the vector register corresponding to the designated vector register is detected by the reset of a control flag and the instruction execution instruction can be transmitted. Thus, processing time becomes short.
Patent JP-H0688543-A (JP)
Title: Throttle controller
Inventor: KAMIO SHIGERU
IPC: F02D41/22
Filed: 1992-09-04
Abstract: PURPOSE:To provide a throttle controller that is able to prevent any overshoot from occurring as checking the worsening of responsiveness. CONSTITUTION:A throttle valve 3 is installed in an intake pipe 1, and this valve 3 is opened or closed by a D.C. motor 8. In addition, a motor temperature sensor 36 for detecting a motor temperature is attached to this D.C. motor 8. A central processing unit 26 calculates a time constant for determining a leveling degree according to the motor temperature and the extent of voltage of a battery 37. In succession, the central processing unit 26 levels an opening command value of the throttle valve 3 with the time constant, and a D.C. motor drive circuit 29 drives the D.C. motor 8 according to the leveled opening command value.
Patent JP-H08101399-A (JP)
Title: Liquid crystal display device
Inventor: KOMA TOKUO
IPC: G02F1/1337
Filed: 1994-09-30
Abstract: PURPOSE: To prevent the formation of regions where abnormal transmittance is exhibited in display pixels by a disturbance in orientation by opening orientation control windows in common electrodes in the parts corresponding to the corners of display electrodes. CONSTITUTION: The common electrode are formed on a counter substrate side facing liquid crystals and the orientation control windows 22 of the parts where the electrodes do not exist are opened. The orientation control windows 22 are formed along the diagonal lines of the display electrodes 14 and are widened in width at both ends to cover the corner parts of the display electrodes 14. Electric fields at the ends of the display electrodes 14 are inclined diagonally by the voltage differences with the orientation control electrodes 16 when voltage is impressed to such cells. The electric field at the edges of the orientation control windows 22 are also inclined diagonally so as to be spread to the regions where the electrode do not exist from the regions where the electrodes exist of the common electrodes.  As a result, the liquid crystal directors having positive dielectric anisotropy rise along the electric fields of the diagonal direction at the shortest distance.
Patent JP-S6481532-A (JP)
Title: Automatic equalization control system
Inventor: KOKURYO GARO
IPC: H04L27/01
Filed: 1987-09-24
Abstract: PURPOSE:To attain correct data transmission even with the presence of level sudden change in a transmission line by revising the entire tap gain of an equalizer when an output of an automatic equalizer is at the outside of a predetermined range for a prescribed period. CONSTITUTION:A signal from an input terminal 10 is shifted sequentially by a delay circuit 12 end each output is multiplied by a tap coefficient C at a multiplier 13. Then the result is added by an adder 15 and outputted from an output terminal 20 via a discriminating circuit 21. The input/output signal of the discrimination circuit 21 is compared by a comparator 22 and each tap coefficient C is revised based on the result of comparison. The output of the discrimination circuit 21 is given to a monitoring circuit 24 to check whether or not the output amplitude is within a prescribed range. When a timer 25 detects that the state is consecutive for a prescribed time, a contact 26 is switched to multiply the tap coefficient by a multiple of K. Thus, the level sudden change in the transmission line is processed.
Patent JP-S6391895-A (JP)
Title: Semiconductor storage device
Inventor: OAMI KAZUO
IPC: G11C11/41
Filed: 1986-10-06
Abstract: PURPOSE:To realize a simple structure, a high speed, and a low power consumption by forming a RAM to a bare state being free from an input/output buffer, and using in common the input/output buffer by using a gate array being in the periphery of a chip, in RAM & LOGIC for forming integrally the RAM and the gate array. CONSTITUTION:Four pieces of RAMs 12, 14, 16 and 18 are provided on a chip 10, and an area on the chip except these RAMs becomes a gate array. In an annular area between a bonding pad part 22 and an internal gate group, an input/output buffer 46 is constituted. The RAMs 12-18 are bare RAMs having no input/output buffer, and an input buffer and an output buffer are constituted of the gate array being in the vicinity of the bonding pard. At the time of write to a memory, a write data is sent together with an address to the I/O buffer 46 through the bonding pad 22, etc., and sent to each RAM through a wiring 48. In this way, since the input/output buffer 46 does not double, the constitution is simplified, the integration degree is improved, the signal delay is obstructed, and the power consumption can be reduced.
Patent JP-S6391583-A (JP)
Title: Gps navigation apparatus
Inventor: SEKINE CHOGO
IPC: G01C21/00
Filed: 1986-10-06
Abstract: PURPOSE:To enable the execution of two-dimensional position measurement of high precision, by calculating an accurate altitude with reference to map informations stored beforehand and pseudo-distance data when an automobile passes through a reference point. CONSTITUTION:A position computing unit 16 to which pseudo-distance data obtained by a GPS receiver element 12 and accurate crossing position data obtained from a map storage element 20 are inputted is provided. When an automobile passes through a reference point, an accurate altitude is calculated by an altitude computing unit 14 on the basis of map informations stored beforehand in the map storage element 20 and the pseudo-distance data received and measured from radio waves of three satellites by the GPS receiver element 12, and the altitude thus obtained is used for two-dimensional position measurement when two-dimensional navigation is conducted thereafter.
Patent JP-S6394096-A (JP)
Title: Drive control device for pump
Inventor: NAKAZATO TSUNEO
IPC: F04D15/00
Filed: 1986-10-08
Abstract: PURPOSE:To reduce pressure fluctuation in plural pumps by setting the highest operation speed of a pump driven at a variable speed higher than the operation speed of a pump driven at a constant speed. CONSTITUTION:Plural pumps 11, 12 13 are driven at a constant and a variable speed by a variable frequency electric power supply 30 and a commercial electric power supply 40. The highest operation speed of a pump driven at a variable speed is set higher than the operation speed of a pump driven at a constant speed. At the time when water demand increases, the operation point of the pump driven at a variable speed moves from point 0 to point A and point B. In the case of movement from point A to point B, the electric power in higher frequency than that from the commercial electric power supply 40 is supplied to a pump 1 driven at a variable speed from the variable frequency electric power supply 30. Therefore, a dead zone of control in the case of additional starting of a pump driven at a constant speed can be vanished for being able to reduce pressure fluctuation.
Patent JP-H0575308-A (JP)
Title: Waveguide filter device
Inventor: KUDO KENICHI
IPC: H01P1/28
Filed: 1991-09-18
Abstract: PURPOSE:To easily attenuate and eliminate a spurious wave without increasing a stage number of the filter by combining a band elimination filter to a band pass filter having a virtual short circuit post through simple configuration with respect to the waveguide filter. CONSTITUTION:A virtual short circuit post 3 is provided to a coaxial waveguide conversion section 1 at an interval L1 (L1=(lambdag/4)Xn, n:1, 3, 5,... and lambdag is a wavelength of a transmission radio wave), and a distance from the said post 3 to a waveguide opening (part of a metallic block 4) is set to L2 (L2=lambdag'/4, lambdag' is a wavelength of a radio wave to be eliminated) to form a band block filter BEF with respect to said spurious wave to this part.
Patent JP-H03100481-A (JP)
Title: Sample cooling structure in electronic spin resonance device
Inventor: IIMA YOSHIO
IPC: G01R33/32
Filed: 1989-09-13
Abstract: PURPOSE:To shorten the analysis time by narrowing a clearance between a projecting part and a sample tube and reducing the fluctuation width of a resonance frequency of a cavity resonator. CONSTITUTION:On the upper part of a Dewar 4, a reservoir part 4a for storing liquid nitrogen 5 is provided, and on the bottom part of the reservoir part 4a, a bottomed cylindrical projecting part 4b is provided. In this state, a sample tube 9 is inserted into the projecting part 4b, an insertion hole is formed on the upper wall of a cavity resonator 1 and the projecting part 4b is inserted into the resonator 1. In this case, a resonance frequency of the resonator 1 is fluctuated by bubbles passing through a clearance S between the projecting part 4b and the sample tube 9, but by narrowing the clearance S and making a size of bubbles small, the fluctuation width of the resonance frequency comes to be put within a range which can be corrected by an AFC circuit of an electronic spin resonance. In such a way, even if bubbles are generated, the measurement can be executed, and the measuring time can be shortened by starting the measurement without waiting until boiling of liquid nitrogen abates after inserting the sample tube 9.
Patent JP-H04118343-A (JP)
Title: Braking device
Inventor: SHIBATA SATORU
IPC: B60W10/184
Filed: 1990-09-07
Abstract: PURPOSE:To enhance maneuverability and safety by actuating a decompression valve when a brake pedal is treadled and a foot is parted from the brake pedal after a vehicle came to a stop, and decompressing air pressure to certain degree of pressure whereat the vehicle does not retreat even on a slope and making it retainable. CONSTITUTION:A brake valve 2 is opened when a driver treadles a brake pedal 8, compressed air is supplied from an air tank 1 to a brake boosters 5 through cut valves 3, and control of a vehicle is performed. In this case, a program control circuit 10 judges whether car speed dropped to zero or less than a specified value near zero, and when judged YES, second solenoid valve 4 is actuated to shut off cut valves 3, and compressed air is supplied between cut valves 3 and brake boosters 5 and retained. Then, when judged that the brake pedal 8 is released, first solenoid valve 6 is made in an energized condition to supply the abovementioned retained compressed air to a decompression valve 7, decompress it to certain degree of air pressure whereat the vehicle does not retreat, and brake boosters 5 are maintained in a working condition by that air pressure.
Patent JP-2001068095-A (JP)
Title: Negative electrode for lithium secondary battery and lithium secondary battery using the same
Inventor: SONODA TSUKASA
IPC: H01M10/05
Filed: 1999-08-25
Abstract: PROBLEM TO BE SOLVED: To improve current density and energy density and to improve charge- discharge cycle characteristic by forming a tin-bismuth alloy film on the surface of a collector of the negative electrode of a battery by electroplating method. SOLUTION: A film of a tin-bismuth alloy is laminated on the surface of a collector of this negative electrode of the lithium secondary battery by an electroplating method. Since the tin-bismuth alloy film can store lithium, charge- discharge capacity is lowered slightly compared with Li, but the production of lithium dendrite during charge and discharge is restrained, and the safety of the battery can be improved. Since lithium is stored in bismuth as well, a current value due to lithium deposition is increased as compared with a film formed of only tin, and the charge-discharge characteristic is improved. The bismuth content of the tin-bismuth alloy film is preferably 30 wt.%. It is recommended that one or two or more kinds of substances selected from among lithium hexafluorophosphate, lithium perchlorate, and lithium tetrafluoroborate be used as the solute for an electrolyte.
Patent JP-H0582405-A (JP)
Title: Manufacture of semiconductor integrated circuit device
Inventor: TANIDA KEIJI
IPC: H01L23/52
Filed: 1991-09-18
Abstract: PURPOSE:To provide the manufacturing method of a semiconductor integrated circuit device by which the revealing of Al wiring can be eliminated and the reliability of a device can be improved by forming the device in such a way that the original warping directionality of substrates is restricted and substrates which are warped in such a way that their main surface sides are one the convex are selected. CONSTITUTION:At the time of forming a device on the main surface an Si semiconductor substrate 1, a substrate 1 which is warped in such a way that its main surface side is on the convex is selected. As a result, the convex state of the main surface car be maintained even when an interlayer insulating film 3 is formed and heat-treated after an Al wiring 2 is formed.
Patent JP-H08106989-A (JP)
Title: Discharge lamp lighting device and lighting system
Inventor: MITA KAZUTOSHI
IPC: H05B41/16
Filed: 1994-09-30
Abstract: PURPOSE: To prevent an abnormal rise in electric power supply voltage to be supplied to a high frequency oscillating circuit in a low load condition and in the last stage of the service life of a discharge lamp. CONSTITUTION: A half wave detecting circuit 31 detects a half wave component of a lamp current IL flowing to a discharge lamp 22, and supplies half wave detecting voltage VB of this detecting result to a safety circuit 51. A lamp voltage detecting circuit 41 detects lamp voltage VL applied to the discharge lamp 22, and supplies lamp voltage detecting voltage VA of this detecting result to the safety circuit 51.  The safety circuit 51 makes a light emitting element 261 of a photocoupler 26 emit light when at least one among the half wave detecting voltage VB of the half wave detecting circuit 31 and the lamp voltage detecting voltage VA of the lamp voltage detecting circuit 41 exceeds VTH or the half wave detecting voltage VB of the half wave detecting circuit 31 exceeds the lamp voltage detecting voltage VA of the lamp voltage detecting circuit 41, and reduces a resistance value of a MOSFET 24, and reduces DC electric power supply voltage VDC1.
Patent JP-H0745232-A (JP)
Title: Ion implantation method and device
Inventor: SUGIYAMA NORIO
IPC: H01J37/317
Filed: 1992-09-07
Abstract: PURPOSE:To relieve positive electrification on a surface of a semiconductor substrate, and prevent electrostatic breakdown of the substrate by imparting negative electric charge to the substrate by attracting a secondary electron emitted from the substrate when an ion beam is radiated to the semiconductor substrate and an electron in the ion beam by a magnetic field. CONSTITUTION:An ion beam 1 for ion implantation is generated by an ion source, and the beam 1 is accelerated again by an electrode part 2, and is radiated to a wafer 3. The wafer is placed on a placing stand 4A, and the stand 4A makes reciprocating motion at low speed in the arrow A direction, and rotates around a rotary shaft at high speed. A secondary electron is emitted from a surface of the wafer 3 by radiation of the ion beam 1, and the surface of the wafer 3 is electrified positively. Plural permanent magnets 5 are arranged in an electrode 2, and a magnetic field is formed. A secondary electron and an electron in the ion beam 1 are attracted to the surface of the wafer 3, and positive electric charge on the surface of the wafer 3 is offset.
Patent JP-H0787839-A (JP)
Title: Artificial medium for plant
Inventor: SAEKI TATSUYA
IPC: C12N1/14
Filed: 1993-09-24
Abstract: PURPOSE:To obtain an artificial medium capable of promoting growth of a plant such as mushroom to be cultured therein and also of increasing its yield by molding a mixture of specific antifungal granules and a carrier moldable by compression. CONSTITUTION:(A) A carrier 18 (e.g. sawdust) moldable by compression and capable of holding plant supportiveness by its molding is mixed with (B) granulated antifungal granules 7 together with a binder and small amounts of water followed by molding the mixture into e.g. a cylindrical form to obtain the objective artificial medium 10. The antifungal granules can be prepared by mixing a noncrystalline calcium phosphate particle-contg. slurry with antifungal metallic ions (e.g. of gold, silver, zinc) followed by granulation, being capable of adsorbing pathogenic bacteria and of suppressing proliferation of harmful microbes with small amounts of the antifungal metallic ions.
Patent JP-H03101429-A (JP)
Title: Optical transmission circuit
Inventor: KAWABATA MITSURU
IPC: H04B10/60
Filed: 1989-09-14
Abstract: PURPOSE:To simplify the circuit constitution by supplying a DC bias current together with a driving current to the transmission circuit without special addition of a DC bias circuit for a light emitting element. CONSTITUTION:The circuit is constituted by providing a FET 2 being a drive active element supplying a driving current to a semiconductor laser 3 as a light source, a level shift diode shifting an input pulse signal to a prescribed level and applying the resulting signal to the FET 2, a monitor use photodiode 5 monitoring part of the output light of the semiconductor laser 3 and an APC (Automatic power control) circuit 7 receiving an optical monitor current of the photodiode 5 and supplying the output voltage to the level shift diode 5. Then the output voltage of the APC circuit 7 is used to vary the input offset voltage of the drive active element and the active element for driving supplies the driving current and the DC bias current to the light source. Thus, the circuit constitution is simplified.
Patent JP-S61118962-A (JP)
Title: Lead plate for connecting nickel-cadmium storage battery
Inventor: MORINARI RYOSUKE
IPC: H01M50/528
Filed: 1984-11-14
Abstract: PURPOSE:To prevent any short circuits from being generated between the lead plate and welding electrodes by subjecting the base of a lead plate having a hole and a truncated-cone-like terminal to resistance welding while the terminal is fitted into the hole. CONSTITUTION:A lead plate (A) consists of a disk-like base 11 and a lead terminal 12. A perpendicularly-raised cylindrical section 13 is formed in the center of the base 11 and a circular hole 14 is formed inside the cylindrical section 13. First, the truncated-cone-like positive terminal 20 of a sealing lid 19 is fitted into the hole 14 of the lead plate (A). Next, while the angular area 16 of the lead plate (A) is pressed upon the side wall 22 of a terminal 20, a welding electrode (C) is connected to the end surface 23 of the terminal 20 and other welding electrodes (D) and (D) are connected to the end surface 23 in such a manner as to locate the terminal 12 between the welding electrodes (D) and (D). After that, the voltage of a power supply (E) is applied across the electrode (C) and the electrodes (D) and (D) to subject the angular area 16 and the terminal 20 to resistance welding. Since all the current supplied from the power supply (E) passes through the welded area, favorable welding can be achieved.