Patent GB-1068861-A (GB)
Title: Improvements in or relating to radio-transmission systems
IPC: H04B7/17
Filed: 1964-04-23
Abstract: 1,068,861. Radio signalling. PHILIPS ELECTRONIC AND ASSOCIATED INDUSTRIES Ltd. April 23, 1964 [April 26, 1963], No. 16872/64. Heading H4L. In a system providing radio-communication between a plurality of stations utilizing the same frequency band in which communication is by pulse modulation and a characteristic address signal is transmitted continuously with the information signal pulses, the transmitter periodically varies the time position of the information pulses in accordance with a variation frequency, and the receiving station corresponding to the address signal has a gate controlled by an A.F.C. device to synchronize the receiver in accordance with the variation frequency, and an address receiver coupled to the A.F.C. device which interrupts the synchronizing upon reception of an address signal other than that characteristic of the receiver. In the embodiment shown in Figs. 2 and 3 the address is transmitted on an adjacent frequency as a coded series of pulses having a recurrence frequency which is <SP>1</SP>/ 16  that of the signal pulses. In a synchronizing device at a receiver, Fig. 2, the incoming information pulses are supplied via amplifier 8 to a gate 6 which is controlled by a pulse generator 9 through a pulse widener 10, the pulse generator being synchronized by an oscillator 11. Pulses passed by the gate 6 are converted to an I.F. at 13, amplified at 15 and demodulated at 16, the demodulated pulses being supplied to a phase discriminator 17 together with pulses from the generator 9 to control via an adjusting device 12 the frequency of the oscillator 11. The control voltage varies in accordance with the phase modulation of the incoming pulses and causes a corresponding phase variation of the gate pulses from the generator 9. This control voltage is also amplified at 18 and rectified at 19 to cause the pulse widener 10 to produce shorter pulses when the oscillator 11 is in synchronism. The address receiver, Fig. 3, in which the output of gate 20 is connected to the input of gate 6, includes a trigger 22 which starts a blocking oscillator 23 when the correct address signal is not received and thus interrupts a gate pulse generator 24 controlling input gates 20, 21. Due to the periodic interruption of the gate pulses the device of Fig. 2 cannot be synchronized since there is insufficient signal on lead S1. The incoming address signal received via gate 21 is compared at 26 with a locally generated address from a generator 27, the address in this case consisting of a characteristic series of pulses having a repetition frequency which is <SP>1</SP>/ 16  that of the signal pulses. The gate 21 is opened by pulses from a frequency divider 28. For each correct transmission of the address the corresponding pulses are integrated at 29 and return the local address generator 27 to its initial position via a device 30, and since there is no output from the comparator 26, the trigger 22 is changed over to stop the oscillator 23. If the incoming address is incorrect, pulses appear at the output of comparator 26, are integrated at 31 and maintain the trigger 22 in its initial state so that the oscillator 23 continues to interrupt the gate pulse generator 24. In a modification, Fig. 4 (not shown), the output of the phase discriminator (17) is also supplied to an amplifier tuned to the variation in frequency of the incoming pulses, rectified and used to control the time constant of the synchronizing circuit. In a further modification, Fig. 5 (not shown), the output of the phase discriminator (17) is also supplied via a phase shifter to vary the phase of the transmitted pulses in the opposite direction to that of the received pulses to avoid mutual interference. In a further receiving arrangement, Fig. 7 (not shown), an oscillator (40) is adjustable in steps which correspond to the various values of mean pulse recurrence frequency in the system, and controls a pulse generator (41) supplying pulses of width 3T, followed by a pulse generator (42) supplying pulses of width T. The pulses of width T are applied directly to a receiving gate (43), and the pulses of width 3T are applied to the receiving gate (43) via a further gate (44). Signals from the receiving gate (43) are supplied via the amplifier (8) and an amplitude detector (16), to the phase detector (17) which also receives an input from pulse generator (42). When the circuit is not synchronized the gate (44) is opened by the trigger (22) and reception is effected by opening gate (43) during sequen. tial periods 3T. In this embodiment a variation in the signal pulse recurrence frequency and in the amplitude of this variation forms the address signal and a corresponding signal of variable frequency and amplitude is supplied by the detector (17) via a filter (45) amplifier (46), limiter (47), differentiator (48), amplitude detector (49) and smoothing circuit (50) to a voltage comparator (51). The comparator (51) also receives a reference voltage from a source (U) via an attenuator (52) representing the D.C. equivalent of the frequency variation of the address signal of that station. The voltage from the amplifier (46) is also rectified at (53) and supplied to a voltage comparator (54) receiving a reference voltage via potentiometer (53) representing the amplitude of the address signal. If the address signal is correct there will be no output from comparators (51, 54) and the trigger (22) will change over to close the gate (44) so that pulses of direction T operate the receiving gate (43), and to stop the blocking oscillator (23) which operates as in Fig. 3.