baber/WOPTO huggingface dataset:
Patent TW-415841-B (TW)
Title: Stabilized absorbent material, systems and products for personal care products having controlled placement of visco-elastic fluids
Inventor: KRUEGER ALLAN JAMES
IPC: B32B27/12
Filed: 1998-06-20
Granted: 2000-12-21
Abstract: There is provided a distribution material for personal care products which is a fabric which wicks artificial menses according to a horizontal wicking test a distance of about 1 inch in less than about 1.5 minutes. Materials meeting this performance criteria generally have a pore size distribution with a high percentage (usually more than 50 percent) of pore diameters between about 80 and 400 microns and a density below about 0.15 g/cc. There is also provided a personal care product system having a distribution /retention layer and a pad shaping layer wherein each layer has a stain length ratio of 0.5 or less and the distribution/retention layer has a saturation profile of 4 or less.
Patent TW-512188-B (TW)
Title: Method and device for regulating the concentration of substances in electrolytes
Inventor: WACHTER RALF-PETER
IPC: C25D1/00
Filed: 1998-07-23
Granted: 2002-12-01
Abstract: The invention relates to a method and device for regulating the concentration of metal ions in electrolytic fluid for depositing metal using insoluble anodes. Said electrolytic metal also contains compounds of an electrochemically reversible redox system. Metal is dissolved with its oxidized form in an ion generator (1) which is cross-flown by said fluid in such a way that the compounds are reduced. The dissolved metal ions reduced on the items to be treated in order to deposit metal. The compounds of the redox system are re-oxidized in their reduced form on the insoluble anodes in the electroplating plant (13). In order to keep the concentration of metal ions constant in the electrolytic fluid, at least one part of the electrolytic fluid contained in the electroplating plants conducted through one or several auxiliary electrolysis cells (6) with at least one insoluble anode (8) and at least one cathode (7) and a sufficient high electric current flow is regulated between the anodes and cathodes pertaining to the auxiliary cells so that the current density on the surface of the anodes is at least 6 A/dm<SP>2</SP> and the current density on the surface of the cathodes is at most 3 A/dm<SP>2</SP>. The ratio between the surface of the anodes and the surface of the cathodes pertaining to the auxiliary cells is thus regulated to at least 1:4.
Patent TW-452599-B (TW)
Title: Ferritic stainless steel plate excellent in deep drawability and anti-ridging property and production method thereof
Inventor: KATO YASUSHI
IPC: C21D9/48
Filed: 1998-07-31
Granted: 2001-09-01
Abstract: The present invention provides a ferritic stainless steel plate improved in the deep drawability and the anti-ridging property at deep drawing work and the production technique thereof. The practical construction of the present invention is a ferritic stainless steel plate containing from 0.001 to 0.015 wt. % C, not more than 1.0 wt. % Si, not more than 1.0 wt. % Mn, not more than 0.05 wt. % P, not more than 0.010 wt. % S, from 8 to 30 wt. % Cr, not more than 0.08 wt. % Al, from 0.005 to 0.015 wt. % N, not more than 0.0080 wt. % O, not more than 0.25 wt. % Ti with Ti/N ≥ 12, and from 0.05 to 0.10 wt. % (Nb+V) with V/Nb being from 2 to 5, and, if necessary, further containing one or more kinds selected from not more than 2.0 wt. % Mo, not more than 1.0 wt. % Ni, and not more than 1.0 wt. % Cu together with one or more kinds selected from 0.0005 to 0.0030 wt. % B, from 0.0007 to 0.0030 wt. % Ca and from 0.0005 to 0.0030 wt. % Mg. Furthermore, in the production method of the present invention, the above-described ferritic stainless steel plate is produced by heating the steel slab made up of the above-described components to a temperature range of 1170 DEG C or lower, finishing rough hot rolling of the slab at a temperature range of 950 DEG C or higher, and then carrying out hot finish-rolling.
Patent TW-385477-B (TW)
Title: Filament for ion implanter plasma shower
Inventor: KELLERMAN PETER L
IPC: G21K5/04
Filed: 1998-08-21
Granted: 2000-03-21
Abstract: A ribbon filament (86) is provided for a thermionic emission device. The filament comprises an elongated body having a configuration defined by a length, a width, and a thickness. The length comprises a central portion (96) and first and second end portions (98) on either side of the central portion. The width of the central portion is greater than that of the first and second end portions. In addition, the thickness of the filament is substantially less than the width along its entire length. The ribbon filament (86) may be configured as a single helical coil having its first and second end portions (98) mounted to first and second legs (85), respectively, at locations of slots therein. Preferably, the filament (86) is comprised of tungsten and the first and second legs (85) are also comprised of tungsten.
Patent TW-514646-B (TW)
Title: Molding compositions containing syndiotactic monovinylidene aromatic polymer
Inventor: NICHOLS KEVIN L
IPC: C08L25/08
Filed: 1998-09-28
Granted: 2002-12-21
Abstract: A composition consisting: (A) a syndiotactic monovinylidene aromatic polymer, and (B) a random interpolymer of an aliphatic alpha-olefin and a vinyl aromatic monomer, wherein the random interpolymer contains greater than 40 weight percent vinyl aromatic monomer.
Patent TW-378343-B (TW)
Title: A circuit board for fault analysis of chips
Inventor: LI JUNG
IPC: H01L21/00
Filed: 1998-10-03
Granted: 2000-01-01
Abstract: A printed circuit board for the fault analysis of chips is invented to reduce the cost and time derived from the chip package and the components, such as switch and socket, etc., normally incurred in such analysis. The circuit board has a chip installation region. The periphery of the chip installation region is surrounded with printed wirings extending to the side of the circuit board and forming a connection pad. Furthermore, metal connecters selectively connects the contact end of the chip to the printed wiring such that a test voltage for fault analysis can be transmitted to the contact end of the chip through the connection pad and the printed wiring by using an alligator clamp. Furthermore, the chip installation region can form an opening to expose the back of the chip for conducting fault analysis on the back side.
Patent TW-518317-B (TW)
Title: A process for the preparation of cinnamic acid esters
Inventor: OKUI HIDEFUMI
IPC: C07C67/343
Filed: 1998-10-12
Granted: 2003-01-21
Abstract: A process for the preparation of a cinnamic acid ester comprises condensing a benzaldehyde with an acetic acid ester in the presence of a base. The reaction mixture is then treated, without adding an additional solvent or after adding an additional solvent, with an acid to convert a 3-alkoxy-3-phenylpropionic acid ester in the reaction mixture into a corresponding cinnamic acid ester. This procedure allows cinnamic acid ester derivatives of high-purity to be obtained in good yield.
Patent TW-432715-B (TW)
Title: Fabrication method of metal oxide semiconductor element
Inventor: SHR JIUN-JI
IPC: H01L21/336
Filed: 1998-10-19
Granted: 2001-05-01
Abstract: A fabrication method of metal oxide semiconductor (MOS) elements includes firstly providing a substrate, and an oxide, a masking layer and an insulator formed orderly on the substrate. Secondly, the masking layer and insulator are defined to form an opening exposing the oxide. Thirdly, the masking layer and insulator are used as a mask to proceed a self-aligned implantation process. Finally, the oxide under the opening is removed and a gate is formed on the substrate under the opening. By the shielding of the masking layer and insulator, the selective implantation can be done in the substrate under the gate without including source/drain regions. This improves the elevation phenomena of series resistance and junction capacitance in the source/drain regions, resulted from the conventional implantation process. Additionally, the use of the opening to fabricate the gate can avoid using the conventional reactive ion etch (RIE) in which the sidewalls of the gate conductor layer are easily damaged. This can further improve the quality reliability of the gate conductor layer.
Patent TW-418388-B (TW)
Title: Highly oriented magnetic thin films, recording media, transducers, devices made therefrom and methods of making
Inventor: GONG HENG
IPC: G11B11/105
Filed: 1998-11-10
Granted: 2001-01-11
Abstract: The present invention provides for magnetic and magneto-optic recording media, transducers and data storage devices constructed therefrom that have highly oriented films having long range order in the crystal structure of the film. The recording medium includes a magnetic recording layer comprised of Co-based material, such as Co or one or more Co alloys having a (1010) crystal texture, a substrate, a first underlayer having a fcc structure and a (110) crystal texture disposed between the substrate and the magnetic recording layer. A second underlayer having a bcc structure and a (112) crystal texture is also disposed between the magnetic recording layer and the first underlayer. In particular, if a (110) Si single crystal substrate is non-oxidized certain metals having fcc structures, such as Ag, Cu, Al, and Au and fcc derivative structures, such L10 and L12 structures, can be epitaxially grown on the Si surface. While the one unit cell to one unit cell lattice match between fcc Ag and A4 (diamond) Si is quite poor, multiples of the Ag unit cell distance fit very well on the Si surface. The long range order of the Si surface induces the epitaxial growth of the Ag fcc structure. Upon this fcc structure, a bcc structure, such as Cr, or a bcc derivative, such as B2, DO3 and/or L21 can be epitaxially grown.
Patent TW-412860-B (TW)
Title: Semiconductor device
Inventor: KINOSHITA MASAAKI
IPC: H01L27/108
Filed: 1998-12-23
Granted: 2000-11-21
Abstract: In a semiconductor device having at least one memory cell array region in which a plurality of memory cells are arranged in an array form, at least one edge portion is placed at an outermost edge portion of the memory cell array region. A gate is  arranged at the edge portion , and a capacitor contact portion is placed adjacent to the gate. The gate is deviated to an outside direction of the memory cell array region with a predetermined distance in order to prevent short between the gate and the capacitor contact protion.
Patent TW-409189-B (TW)
Title: Optical-fiber cable and method of manufacturing the same
Inventor: OKADA NAOKI
IPC: G02B6/44
Filed: 1999-03-24
Granted: 2000-10-21
Abstract: There is provided an optical-fiber; and a cylinder body which is made from a cylindrically formed belt-shaped material and made of resin and which accommodates the optical-fiber therein.
Patent TW-550212-B (TW)
Title: Transfer mechanism
Inventor: BONNAIN JEAN-CHRISTOPHE
IPC: B65G17/42
Filed: 1999-06-14
Granted: 2003-09-01
Abstract: A device and a method for adjusting the spacing between adjacent spacer elements on an endless conveyor having a plurality of such spacer elements. The device comprises means for releasing a spacer element from the conveyor and means for manipulating the position of said spacer element relative to the conveyor during differential movement between the conveyor and said spacer element, thereby to adjust spacing of said spacer element relative to an adjacent spacer element on said conveyor.
Patent TW-425596-B (TW)
Title: Switch level simulation with cross-coupled devices
Inventor: SU JASON
IPC: G06F17/50
Filed: 1999-08-03
Granted: 2001-03-11
Abstract: A switch level simulation system includes a netlister, a cross-coupled device detector, a cross-coupled device transformer and a switch level simulator. The user provides a circuit a design to the netlister, which generates a netlist of the circuit. The cross-coupled device detector searches the netlist to find all of the cross-coupled devices in the circuit design. The cross-coupled device detector also determines whether the cross-coupled device has a ""rail"" node directly connected an external voltage source line. The cross-coupled device transformer transforms each cross-coupled device having a rail node into a transformed cross-coupled device by inserting in the netlist a device at the rail node mirroring the enable device. The mirror device allows the transformed cross-coupled device to provide a high impedance state to emulate the meta-stable state of the cross-coupled device during switch level simulation. The switch level simulator then performs simulations using the netlist with the transformed cross-coupled devices. This technique avoids the need to construct behavioral models of the cross-coupled devices, significantly reducing the engineering resources needed to model cross-coupled devices, while maintaining the accuracy of the switch level simulation.
Patent TW-437190-B (TW)
Title: Signal receiving device and method for eliminating jitter effect
Inventor: LAI CHRIS
IPC: H04L7/00
Filed: 1999-09-10
Granted: 2001-05-28
Abstract: A signal receiving device and method for eliminating jitter effect utilizes a first D-type flip-flop to receive input signal and takes a first clock signal of the first clock zone as the input of the clock signal terminal for the first D-type flip-flop to further output a first signal. Use a second D-type flip-flop to receive a high offset signal along with the first signal as the input of the clock signal terminal of the second D-type flop-flop then output a second signal. Further receive the second signal with a third D-type flip-flop, take a second clock signal of the second clock zone as the input of the clock signal terminal of the third D-type flip-flop and then output the sampling event signal. Then the sampling event signal is inputted to a reset terminal of the second D-type flip-flop to precisely secure a complete signal conversion and reception.
Patent TW-581937-B (TW)
Title: Novel photosensitive resin compositions
Inventor: WEBER WILLIAM D
IPC: C08L79/04
Filed: 1999-11-17
Granted: 2004-04-01
Abstract: A positive photosensitive resin composition. The composition comprising: (a) a capped polybenzoxazole precursor polymer having the structure; wherein Ar1 is a tetravalent aromatic group, aliphatic group, heterocyclic group, or mixtures thereof; Ar2 is a divalent aromatic, heterocyclic, alicyclic, or aliphatic group that optionally may contain silicon; Ar3 is divalent aromatic group, aliphatic group, heterocyclic group, or mixtures thereof; Z is one of the following groups: x is 10 to 1000; y is 0 to 900; and b is 0.10 to 350; (b) a photosensitive agent; and (c) a solvent.
Patent TW-444320-B (TW)
Title: Improved substrate support apparatus and method for fabricating same
Inventor: HAUSMANN GILBERT
IPC: H01L21/683
Filed: 1999-11-22
Granted: 2001-07-01
Abstract: An apparatus for retaining a substrate and method of fabricating same. Specifically, a Johnsen-Rahbek effect electrostatic chuck comprising a chuck body, at least one electrode disposed within said chuck body and a barrier formed around said at least one electrode. The barrier is fabricated of a material selected from the group consisting of conductive materials and semiconductive materials and in one instance is an alloy of a material of which the electrode is fabricated. Alternately, the barrier is formed of a dielectric material that is not the same material of which the chuck body is fabricated. The resultant apparatus provides an electrostatic chuck that has a reduced charge accumulation effect at the electrode/chuck body interface. Reducing charge accumulation maintains the desired electrostatic chucking forces in such a device.
Patent TW-560067-B (TW)
Title: Semiconductor device and manufacturing method thereof
Inventor: MIKATA YUUICHI
IPC: H01L21/336
Filed: 1999-12-14
Granted: 2003-11-01
Abstract: The present invention provides a semiconductor device and a method of manufacturing the same, improved in reliability of a gate insulating film by increasing the total charge amount Qbd by suppressing a film stress of a gate electrode formed of a polysilicon film, to a low value. Since the film stress is closely related to a film formation temperature, it is possible to reduce the film stress lower than the conventional case by forming a film at as a high temperature as 640 DEG C or more. At this time, when the film stress decreases, the total charge amount Qbd regulating dielectric breakdown of the film increases, improving the reliability of the gate insulating film. It is therefore possible to set the film stress of the gate electrode at 200 MPa or less in terms of absolute value by forming the gate electrode at 640 DEG C or more.
Patent TW-472287-B (TW)
Title: Drying method for substrate and the device thereof
Inventor: MAEDA TOKUO
IPC: H01L21/00
Filed: 2000-01-18
Granted: 2002-01-11
Abstract: The present invention provides a substrate dryer which comprises: a processing tank 1, which accommodates a certain number of semiconductor wafers 2 in vertical and parallel state; a first substrate support 3, for supporting the substrate 1 inside the processing tank 2; a processing liquid supply portion 4 supplying the processing liquid to the processing tank 2 for the cleaning of the substrate 1; a drain portion 5 for discharging the processing liquid from the processing tank 2; and, a drying fluid supply portion 6 for supplying the drying liquid drops to the processing tank 2 for drying process.
Patent TW-487937-B (TW)
Title: Quenched thin ribbon of rare earth/iron/boron-based magnet alloy
Inventor: HIROTA KOICHI
IPC: B22F9/02
Filed: 2000-02-14
Granted: 2002-05-21
Abstract: Disclosed is a novel thin ribbon of a rare earth/iron/boron-based magnet alloy prepared by quenching of an alloy melt by the method of strip casting, from which a sintered permanent magnet is obtained by the powder metallurgical method. The sintered permanent magnet can be imparted with greatly improved magnetic properties or, in particular, residual magnetic flux density when the thin alloy ribbon as the base material thereof has a metallographic phase structure containing ""four-phase regions"" consisting of (a) an Α-iron phase, (b) a R-rich phase, in which R is a rare earth element selected from praseodymium, neo-dymium, terbium and dysprosium, (c) a RxT4B4 phase, in which T is iron or a combination of iron and a transition metal element other than iron and rare earth elements and x is a positive number varying with the rare earth element, and (d) a R2T14B phase, in which R and T each have the same meaning as defined above, each phase being disper-sed with a grain diameter in a limited range, in a volume fraction of from 1 to 10%.
Patent TW-494037-B (TW)
Title: Wire discharge cutting machine
Inventor: KIBA RYOGO
IPC: B23H7/02
Filed: 2000-03-15
Granted: 2002-07-11
Abstract: The present invention provides a wire discharge machining device comprising: an upper wire guide means (10) for slidably holding a wire electrode (11) above a workpiece (6); a lower wire guide means (15) for slidably holding a wire electrode (11) below the workpiece (6); an arm member (17) for holding the lower wire guide means (15) at a position opposite to the upper wire guide means (10); a processing tank (1) for immersing the workpiece (6) in a processing liquid and having an elongated opening (20) through which the arm member (17) movably extends; and a seal means (23) for blocking outflow of the processing liquid through the elongated opening (20) formed in the processing tank (1); wherein the seal means (23) is composed of a seal plate (25) closing the elongated opening (20) in the processing tank (1), and comprises a processing liquid spouting means (35) for spouting the processing liquid into a very small clearance defined between the periphery of the elongated opening (20) and the seal plate (25).
Patent TW-584982-B (TW)
Title: Dynamic brake circuit and semiconductor inverter device using the same
Inventor: ONO AKIHISA
IPC: H02P6/24
Filed: 2000-03-16
Granted: 2004-04-21
Abstract: The purpose of the present invention is to prevent a voltage change dv/dt generated in an inverter from directly turning on a semiconductor brake switch erroneously and from short-circuiting the inverter that is in operation. When a motor 10 is braked, which is driven by an inverter composed of a three-phase AC power supply 1, a three-phase bridge rectifying circuit 3, a smoothing capacitor 6 and a semiconductor switch device 7, a dynamic brake circuit turns on a semiconductor brake switch 14 and short circuits the feeder lines 11 of the motor 10, so as to make a brake resistor 15 absorb energy. A resistor 20 having a high resistance is provided between the anode side of the smoothing capacitor 6 and the anode side of the semiconductor brake switch 14. A snubber capacitor 17 of a snubber circuit 18, which is connected in parallel to the semiconductor brake switch 14, is charged via the resistor 20 having a high resistance before the inverter is operated.
Patent TW-558863-B (TW)
Title: Circuit module for protecting a charged battery and method for manufacturing the same
Inventor: YOKOYAMA EIJI
IPC: H01M10/48
Filed: 2000-03-23
Granted: 2003-10-21
Abstract: The present invention is related to a circuit module for protecting a charged battery and method for manufacturing the same. The invention is provided with the followings: a circuit board 1; arbitrary numbers of semiconductor circuit parts 5a, 5b, and 6 comprising at least charging/discharging field effect transistor mounted on the circuit board; the said semiconductor circuit parts 5a, 5b, and 6 are mounted facedown on the circuit board 1 under the state of a bare chip.
Patent TW-502505-B (TW)
Title: Method for forming a radio transmission signal and method and receiver for performing a seamless switching therefor
Inventor: MERKLE CARSTEN
IPC: H04H40/18
Filed: 2000-05-04
Granted: 2002-09-11
Abstract: A radio transmission signal consisting of signal frames that comprise a dynamic data part and a quasi-static data part according to the present invention is characterized in that the dynamic data part of a respective frame contains an indicator showing in which following frame the quasi-static data part of this respective frame will be repeated. Therewith, an alternative frequency of e.g. a digital shortwave signal like a DRM signal can easily and satisfactorily be checked before a fast seamless switching to this alternative frequency can be performed. The inventive method to perform a seamless switching of a receiver from a first currently tuned frequency to a second alternative frequency is characterized by the step of receiving at least one set of samples from a respective signal transmitted on at least one second frequency during a time period during which said indicator assures that it is secure that only data that has been transmitted at least once is transmitted as signal on said first frequency to gather some information about said alternative frequency.
Patent TW-471066-B (TW)
Title: Method for fabricating a semiconductor structure with reduced leakage current density
Inventor: DROOPAD RAVINDRANATH
IPC: H01L21/8246
Filed: 2000-07-14
Granted: 2002-01-01
Abstract: A method for fabricating a semiconductor structure including the steps of providing a silicon substrate (10) having a surface (12); forming an interface including a seed layer (18) adjacent to the surface (12) of the silicon substrate (10), forming a buffer layer (20) utilizing molecular oxygen; and forming one or more layers of a high dielectric constant oxide (22) on the buffer layer (20) utilizing activated oxygen.