Patent GB-861688-A (GB)
Title: Electrical current control apparatus
IPC: G11C11/06
Filed: 1959-07-30
Abstract: 861,688. Magnetic pulse storage circuits. INTERNATIONAL BUSINESS MACHINES CORPORATION. July 30, 1959 [Oct. 30, 1958], No. 26186/59. Class 40 (9). [Also in Group XL (c)] In a magnetic storage matrix having a single read-write driver for each co-ordinate, the coincident pulses applied to a selected winding in each co-ordinate are accurately controlled as to amplitude by negative feedback applied to the associated read-write driver from a resistor common to the windings of a co-ordinate. As shown in Fig. 1, the storage matrix comprises apertured ferrite plates P1-P4, a pair of plates such as P1, P2 comprising a single matrix plane. The plates are threaded by row and column windings AX1-AX16, AY1-AY16 in such manner that aligned apertures 1 in a pair of storage plates form a storage element for a single information bit. Each plate also has a printed read-out and inhibiting winding TW1-TW4. Initially all the storage elements in a pair of magnetic plates have the same magnetic polarity. To write a " 1 " into the plates P1, P2 of the store, a selected column and a row winding are negatively pulsed at the same time as inhibiting winding TW2 is positively pulsed. Only the magnetic material encircling the aperture in plate P1 has its magnetic state reversed. To write an " O ", the column and row windings are pulsed as before but in this case inhibit winding TW1 is positively pulsed so that flux reversal occurs in plate P2. The column and row windings are positively pulsed in coincidence to read out the stored information. This restores the magnetic states to their initial condition and a pulse is induced in TW1 or TW2 depending on whether " 1 " or " 0 " was stored. The use of two apertures per bit causes equal and opposite noise voltages'to be induced in windings TW1 and TW2, and the identity of the information read-out is determined by a differential amplifier 10. The row and column driving circuits are identical. For pulsing a selected row winding a common read-write driver 20 is used, the driver having separate inputs for read and write pulses which determine the polarity of the output pulses applied to the centre-tapped primary windings 4, 5 of transformers SX1-SX16. The secondary winding 6 of each transformer is connected to a respective row winding AX1-AX16 and normally the transformers are disabled by rectifiers D1, D2 in the primary circuits. To apply a read or write pulse to a selected row winding, the centre tap X1-X16 of the associated transformer is positively biased by an X matrix 21 while driver 20 is appropriately pulsed. This permits primary current to flow and a pulse to be induced in the secondary winding. For control of the induced pulse amplitude a resistor 22 is connected in a circuit common to all the row windings, and the negative voltage developed across this resistor is applied as feedback to the driver 20. Control of the inhibit drivers 11, 12 which are respectively connected to inhibit windings TW1, TW2 and are energized by a gate pulse at terminal 17 is effected by a buffer store latch 14 and AND gates 15, 16, the latch 14 being selectively controlled by a reset signal and the output from differential amplifier 10 which is applied through a strobe-controlled stretch amplifier 13. Details of the read, write drivers are disclosed, Fig. 5 (not shown), the circuits including temperature-compensating resistors which match the driver thermal characteristics with that of the ferrite plates, and complementary pairs of transistors (see Group XL (c)). Specification 847,789 is referred to.