Patent GB-1333439-A (GB)
Title: Expanded search method and system in training processors
IPC: G06F17/30
Filed: 1970-12-15
Abstract: 1333439 Trainable processors TEXAS INSTRUMENTS Inc 15 Dec 1970 [30 Dec 1969(2)] 59440/70 Heading G4R A data processor, which has been trained during a training mode by the application of sets of input signals and corresponding required output signals, is programmed to respond to a set of input signals during an execution mode by comparing the members of the set with the corresponding members of each trained set. A difference signal, which is a function of the difference between the members of the execution input set and the members of the trained set, is determined and a processor output signal is generated in accordance with the trained response of the one or more trained sets for which the difference function is minimum. During training a storage tree structure is set up in a random access store. The nodes of the tree are held in the store. Each node comprises a node value VAL, an address ADP which identifies the location of another node in the same filial set, i.e. the same level in the tree, an address ADF which identifies the entry node of the next level (filial set) of the tree, and an N value indicating the number of times the node has been selected. In the case of the last node in a branch of the tree ADF address indicates the sum of the trained response values or its address. The processor output is the sum of the trained response values for this branch normalized by dividing by N. The processor input causes a key signal to be generated, the key comprising a series of components which together define a branch of the tree. When a processor input appears the first component of the corresponding key is compared with the node value of a root node. If the values match the entry node of the next filial set is selected by means of address ADF, the value of this node being compared with the second key component, and so on. If the values do not match the ADP address indicates another node in the set and its value is compared with the component as before. If no match is obtained from any exisiting node a new storage location is selected for a new node and a new branch of the tree established. Whenever a node is selected the N value is incremented and the N value compared with other N values of nodes in the same filial set. If the N value of the present node exceeds the other values the address of the nodes are adjusted so that the node appears first in the filial set. This ensures that at any level in the tree the value VAL of the node most often selected previously (in a given filial set) is selected first for comparison with a key component. During execution, in the case of an input signal set that has not been encountered during training, i.e. a set for which there is no matching branch in the tree and consequently no trained response, the first component of the untrained input's key is compared with the value of the first node of a branch of the tree. The difference is stored. The second component is then compared with the second node to obtain a second difference, and so forth until the end of the branch is reached. The differences may be weighted and are then added to provide a difference signal. The same procedure is followed for each other branch of the tree. After the second and subsequent operations the difference signals are compared, the smallest one or ones being stored. If there is more than one branch which gives the same minimum difference signal the branch which was followed most frequently during training is selected, the trained response stored at the end of that branch being normalized to provide the response of the processor to the untrained input signal set. Alternatively the average of the trained responses of all the branches giving the same minimum difference signal provides the processor output.