Patent GB-934848-A (GB)
Title: Improvements in and relating to superconductor memory devices
IPC: G11C11/44
Filed: 1959-09-21
Abstract: 934,848. Superconductor circuits. INTERNATIONAL BUSINESS MACHINES CORPORATION. Sept. 21, 1959 [Dec. 19, 1958], No. 32138/59. Class 40 (9). A superconductive loop is used as a memory device and is inductively coupled to one of two parallel current branches so that persistent current in the loop drives the one branch resistive. Means are provided for detecting the state of the one branch. A persistent circulating current in the loop represents 1 and no current represents 0. Thin film conductors.-A loop, Fig. 1, comprising a part LZ of soft superconductive material such as tin and a narrower part LNR of hard superconductive material such as lead. A strip 10 is apertured to form parallel conductors 10X, 10Y, 10Z and a narrow conductor 10Ra, the conductor 10Z being inductively coupled with L and being sufficiently close to part LZ for a current in 10Z to drive LZ resistive. The conductors have soft parts (shaded) controlled by conductors XW, YW, ZW, RW without inductive coupling. Writing.-To enter 1 in L the current in strip 10 is first switched through 10Z making LZ resistive. The current is then switched to 10X, 10Y thereby inducting a circulating current which persists in the loop L as it becomes superconducting at the same time. Reading.-In strip 12, conductor 12NR is resistive or conductive in accordance with the digit 1 or 0 stored in L. When both conductors 12X, 12Y are driven resistive, a voltage drop across terminals 12A, 12B indicates whether 12NR is resistive or not. Multiple storage device, Fig. 2. Four storage units S1, S2, S3, S4 are combined in a single strip 20, Fig. 2. The storage units operate as before but during a writing operation, conductor 20NR is held resistive. The windings XWR, YWR of each unit are in independent circuits. Windings ZWR, RWR, NRWR are in common circuits. The operating cycle of windings ZWR, RWR, NRWR determines the digit to be stored. The particular windings XWR, YWR determine the storage unit in which the digit is to be stored. Wire-wound cryotrons, Fig. 3. A storage loop L10 comprises a conductor L10a including the control winding of cryotron K1 and conductor L10b including the gate conductor of cryotron K2. Storage loops L12, L14 are similarly constituted. If L10b is held resistive by cryotron K2, current from source W10 flows through L10a and not through L10b. If cryotron K2 then permits L10b to regain its superconductivity, the current distribution remains unchanged. Interruption of the current from source W10 leaves a circulating current in L10. The gate of cryotron K1 is controlled by the loop L10. When the gate conductor of cryotron K3 is resistive, the voltage drop produced by reading current from source R10 across terminals R10C, R10f indicates the state of the gate conductor of K1 and the digit stored in L10. Current from source 30 flowing in cryotrons K2, K4, K7 of the three loops in a writing operation is controlled by leads 30Z and cryotron K30Z. Cryotrons K1, K6, K9 used in a reading operation are controlled by leads 30NR and cryotron K30NR. Leads 30X, 30Y control alternative paths for the current from source 30 and both cryotrons K30X, K30Y must be operated before a reading or writing operation can take place. Three 3-digit registers, like Fig. 3, may be connected together with the corresponding circuits of 30, 30NR, 30Z, R10, R12, R14, W10, W12, W14 in series. Decimal storage, Fig. 5. If arms L10c and L10b have the same inductance, the stored current is half the applied current and digits 0 to 9 can be stored by circulating currents of 0 to 9 units produced by applied currents of 0 to 18 units. Cryotron K1 is arranged to have a gate conductor which goes resistive with a critical control current of 10 units. The circulating current is read by adding an extra readout signal to terminal L10d rising linearly with time to a value of 20 units. The signal divides equally between the branches of the loop. The time at which K1 goes resistive is detected to indicate the digit stored (see Fig. 5A). The additional read-out signal may rise in 2-unit increments giving 1 unit increments in each limb of the loop. Specifications 873,624 and922,149 are referred to.