Patent GB-1112495-A (GB)
Title: Fault tolerant addressing circuit
IPC: G11C29/00
Filed: 1966-10-21
Abstract: 1,112,495. Superconductive circuits. GENERAL ELECTRIC CO. 21 Oct., 1966 [23 Dec., 1965], No. 47364/66. Heading H3B. [Also in Division G4] In a superconductive memory having a plurality of drive lines for selecting memory locations, the drive lines being arranged in groups, each group includes a spare drive line which is automatioally energized if an attempt is made to address a drive line of a group but none of the lines of that group excluding the spare line are in fact selected. As shown (Fig. 2) a superconductive memory at 23 includes a plurality of drive lines 24(1) to 24(m) arranged in groups, two such groups being shown comprising respectively drive lines 24(1) to 24(3) and 24(5) to 24(7) and spare lines 24(4) and 24(m). When it is desired to select a drive line, a continuous select current Is is established and a reset current Ir is switched on temporarily. Ir passes through the control conductor of cryotrons 26(1) to 26(3) and 26(6) to 26(m) whereby the gate conductors of these cryotrons become resistive and Is is deflected along the reset paths R of selection circuits 21(1) to 21(3) and 22(1) to 22(3). If the desired line is say 24(2), and this line is not defective then switches 32 and 34 are temporarily closed whereby group select current Ig 1  and address decoding current Ic are developed. Ic passing through the control conductors of cryotrons 29(1) and 29(2) diverts Is from the reset path R of circuits 21(1) and 21(3) to paths including the gate conductors of cryotrons 26(1) and 26(3). Ig 1  passing through the control conductors of cryotrons 35(1) to 35(3) similarly diverts Is from the reset paths R of the second group. Ig 1  passing through the control conductor of cryotron 26(4) attempts to divert Is through the reset path R of spare circuit 21(8) but this is blocked by oryotron 28(2) the gate conductor of which is rendered resistive by the current Is still flowing through the reset path R of circuit 21(2). Cryotron 25(2) is thus the only one of the drive current directing cryotrons 25(1) to 25(m) to have a current (Is) through its control conductor and consequently, when switch 36 is closed, it is through drive line 24(2) alone that drive current Ix is diverted. If for any reason a fault had been found in the line 24(2) or a memory location associated therewith or the corresponding circuit 21(2), then the reset path R for the selection circuit 21(2) would be open circuited and preferably a superconductive low-impedance bridge established at point 37 so as to render cryotron 26(2) super conductive at all times. Then, if it is desired to select line 24(2), as circuit 21(2) now carries no current, the cryotron 28(2) remains superconductive and the attempt by Ig 1  to divert Is through the reset path R of circuit 21(s) is successful whereby cryotron 25(4) becomes the only one of cryotrons 25(1) to 25(m) to have its control conductor energized. Thus, when Ix is established it is line 24(4) which becomes energized in place of line 24(2). The number of groups of lines provided would depend on previous fabrication experience, i.e. on statistical analysis of previous faults. Fig. 1 (not shown) illustrates a simpler arrangement wherein any of the known addressing circuits (e.g. tree selection circuits) may be used for directing the drive current to a desired drive line, each group of lines having a spare drive line connected to the source of drive current by way of the gate conductors of a plurality of cryotrons the control conductor of each one of which is in series with a different drive line.