baber/WOPTO huggingface dataset:
Patent JP-S5698913-A (JP)
Title: Temperature control circuit for amplifier
Inventor: KONDOU MASAKATSU
IPC: H03F1/42
Filed: 1980-01-10
Abstract: PURPOSE: To enable to realize high stability at low cost, by detecting the temperature of FET element itself determining the temperature characteristics of an amplifier and avoiding the change in the operatihg poit of drain current through constant temperature to be kept.  
     CONSTITUTION: The temperature control circuit for amplifier is constituted with a high frequency amplifier 1 being control variable, constant temperature plate 2, heater 3, and amplifier 5 to amplify the control error signal detected. With this constitution, FET7 being the amplifying element of the amplifier 1 is used for temperature detection. The drain current to the gate voltage of FET is changed by the change in the temperature of FET. Thus, by controlling the temperature of constant temperature plate 2 so that the drain current of FET7 is constant, the characteristics of the amplifier 1 can be made stable. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H11201088-A (JP)
Title: Fan balance regulation device, and fan balance regulation method
Inventor: MURAYAMA TOMOHIRO
IPC: F04D29/30
Filed: 1998-01-07
Abstract: PROBLEM TO BE SOLVED: To provide a fan balance regulation device capable of correctly and efficiently performing balance regulation of a rotary fan. SOLUTION: This device is provided with a dynamic balance tester 50 to measure unbalance amount of a cross flow fan 10, a control part 100 to determine position data of a fin among plural fins on which a balance weight is installed, and weight data of the balance weight to be installed on the fin based on the unbalance amount obtained by the dynamic balance tester 50, and a balance weight installation device 60 to install the balance weight onto the fin based on the position data of the fin and the weight data of the balance weight obtained by the control part 100.
Patent JP-S5495205-A (JP)
Title: Endless tape running device
Inventor: IZAWA FUMIO
IPC: G11B15/70
Filed: 1978-01-11
Abstract: PURPOSE: To prevent abrasion and damage of tape by winding the endless magnetic tape on the outside circumferential surface of an annular body with its magnetic surface being faced the inner side.  
     CONSTITUTION: A tape 21 is wound on the outside circumferential surface of an annular body 22 with its magnetic surface of extremely small surface roughness on the inner side and therefore if the tape 21 is run at a high speed above several m per seconds, an effective air film will be formed between said magnetic surface and the outside circumferential surface of the annular body 22. As a result, the abrasion  of the graphite coating surface of the tape 21 hardly occurs and the  dislodging of  the graphite powder and the increase in the coefficients of friction between the tapes in the tape winding part 21' caused thereby may be prevented. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H11102751-A (JP)
Title: Connector device for ic card
Inventor: NISHIOKA TORU
IPC: H01R13/629
Filed: 1998-01-07
Abstract: PROBLEM TO BE SOLVED: To make an ejecting mechanism small by selectively conducting ejecting operation and cancelling the operation of IC an card, according to the projecting amount of a pushing rod in a connector device for the IC card which is capable of holding the pushing rod in the pushing position during the connection of the IC card. SOLUTION: A heart-shaped cam groove, capable of holding a pushing rod 4 in two positions of a pushing position and a projecting position by cooperating with a first transmission pin 15, a circulation-type cam groove being selectively traced by a second transmission pin 16 according to the projecting amount of the pushing rod 4, and a straight long groove are formed on the outside surface of a frame 3 having a guide groove for inserting/removing an IC card on the inside surface, and the second transmission pin 16 is interposed between the first transmission pin 15 and a driving plate 13 linked to an ejecting arm.
Patent JP-S5386550-A (JP)
Title: Amplifier circuit for electric charge transfer device
Inventor: MORI TADATAMI
IPC: H03F3/70
Filed: 1977-01-10
Abstract: PURPOSE:To reduce the drift of the action spot and to obtain the signal output proportional to the signal which is transferred to CCD, by giving an AC amplification to the output signal of the electric charge transfer device and smoothing the output pluse of the AC amplifier through the synchronous rectification.
Patent JP-S59130381-A (JP)
Inventor: HEII IWAO
IPC: E04D11/00
Filed: 1983-01-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H04239142-A (JP)
Title: Manufacture of electronic component with lead
Inventor: KADOTA MICHIO
IPC: H01L21/56
Filed: 1991-01-11
Abstract: PURPOSE:To manufacture efficiently an electronic component with leads, which can be used as a connected group of taping electronic components and has long lead terminals. CONSTITUTION:First and second continuous-length metal frames 11 and 12, each having a plurality of terminal parts 13 to 16 or 17 to 20, are arranged at an interval of a prescribed distance. Parts 14a and 15a and parts 18a and 19a, which are respectively extended in parallel to the longitudinal directions of the frames 11 and 12, are respectively formed at the terminal parts 14 and 15 and the terminal parts 18 and 19 among the terminal parts of the frames 11 and 12. Surface wave elements 22 and 21 are respectively fixed on the terminal parts 16 and 17, then, the elements 22 and 21 are respectively connected electrically with the terminal parts 14 and 18 or the terminal parts 15 and 19. Then, the peripheries of the elements 21 and 22 are resin-molded and moreover, the proper terminal parts are cut. Thereby, an electronic component with leads is obtained.
Patent JP-H02182411-A (JP)
Title: Mold and molding device
Inventor: SASAKI HIROYUKI
IPC: B29K105/04
Filed: 1989-01-10
Abstract: PURPOSE:To enable the various products of different thickness to be molded with the mold of one kind by providing, for peripheral wall, the bottom wall molding the bottom face of the recessed part to be filled with resin capably of moving in the direction of the depth of the recessed part. CONSTITUTION:The main body 5a of a bottom force is provided with the outer wall 5b formed into the same cylindrical shape as the lower face of a top force 3, and the inner wall (peripheral wall) 5c arranged inside of said outer wall and having the cylindrical shape of the square in cross section. A recessed part 6 is formed inside of the inner wall 5c by fitting a bottom wall 5d to the inner periphery of the inner wall 5c. In the recessed part 6, when the bottom force 5 is placed opposite to the top force 3, the cavity 7 to be filled with resin, is formed. A transporting mechanism 8 is arranged between the bottom wall 5d and an attaching holder 4, and the bottom wall 5d is caused to be movable to the inner wall 5c. By regulating the depth D of the recessed part 6, various products with different thickness may be molded. Accordingly, since many molds to be prepared are unnecessary, the cost of the molds is reduced.
Patent JP-S63179515-A (JP)
Inventor: MATSUKUSU BAN MASUTORIKUTO
IPC: C23C16/46
Filed: 1987-01-09
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H08191294-A (JP)
Title: Clock regeneration circuit, frequency error estimation circuit, phase detector and charge pump
Inventor: MIYASHITA TAKUMI
IPC: H03L7/089
Filed: 1995-01-10
Abstract: PURPOSE: To make the clock frequency and the bit transfer frequency coincide with each other to increase the clock regeneration speed by estimating the error between the clock frequency and the bit transfer frequency of data to control a phase locked loop without waiting for a cycle slip in a clock regeneration circuit. CONSTITUTION: All input data signal DATA is synchronized with the phase of an output clock signal CLK from a voltage controlled oscillator VCO 57 by a phase locked loop PLL 56. A frequency error estimation circuit decodes outputs of latch circuits 120 and 121 and estimates the error between the CLK frequency and the bit transfer frequency based on quantized phases of CLK and DATA for preceding transition and current transition by a frequency overs/ shorts signal output circuit 122 and controls a multiplying charge pump 228 of the PLL 56 by a phase synchronization control circuit so that they coincide with each other. Thus, the frequency pull-in speed is increased to increase the clock regeneration speed.
Patent JP-S62161089-A (JP)
Inventor: TAKAHASHI HIROSHI
IPC: G21C19/19
Filed: 1986-01-09
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5594122-A (JP)
Title: Thermometer
Inventor: IKEDA KIYOUICHI
IPC: G01K7/32
Filed: 1979-01-12
Abstract: PURPOSE: To measure the temperature with a high sensitivity employing the characteristic frequency of a vibrator.  
     CONSTITUTION: Oscillation detecting piezo-electric elements 2 and 3 and driving piezo-electric elements 4 and 5 are mounted near the end of a thin portion 101 of a tuning fork type vibrator 1 supported at both ends and connected to an output circuit 18 by way of addition circuits 10 and 16, subtraction circuits 11 and 17 and the like. In operation, the signal corresponding to the primary and secondary oscillation modes are outputted from the addition circuit 10 and the subtraction circuit 11 and the signal corresponding to the output is produced from amplifiers 14 and 15 to allow the addition circuit 16 and the subtraction circuit 17 to apply the given voltage to the piezo-electric elements 4 and 5 whereby the vibrator is oscillated with the double oscillation mode. The characteristic frequency of the vibrator is detected with the piezo-electric elements and thus, the temperature within the atmosphere being measured in which the vibrator 1 is arranged is measured at a high accuracy via a given computation. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H10196319-A (JP)
Title: Valve system structure of internal combustion engine
Inventor: KOBORI YOICHI
IPC: F01L1/00
Filed: 1997-01-10
Abstract: PROBLEM TO BE SOLVED: To provide an internal combustion to prevent complication of a valve system. SOLUTION: The valve system structure of an internal combustion engine is formed such that the axes 11 of adjoining cylinders 1 are displaced from each other in the direction of the width of a cylinder block and arranged in a zigzagging state in the longitudinal direction of the cylinder block, and an intake valve 2 and an exhaust valve 3 are arranged in a state that the axes A and B of the intake valves 2 of the adjoining cylinders 1 approximately cross the rotation axis 50 of a single intake cam shaft 5 and the axes E and F of an exhaust valve 3 respectively cross the rotation axis 60 of a single exhaust cam shaft 6.
Patent JP-S62162898-A (JP)
Title: Heat storage device
Inventor: KANEDA TATSUZO
IPC: F28D20/02
Filed: 1986-01-09
Abstract: PURPOSE:To provide a heat storage device by which the operation is positive and which is used in an instantly effective heating device or the like by bringing a seed crystal into contact with a supercooled gel state heat storage medium within a vessel to promote the supercooled gel state crystalization. CONSTITUTION:When sodium acetate used as a heat storage medium 2 is heated, and reaches a temperature more than its melting point (58 deg.C), it assumes a gel phase. After the entire heat storage medium becomes a gel state, the heating due to a heat source is stopped. Even when the temperature of the heat storage medium falls up to below the melting point, the crystallization thereof does not occur, and the heat storage is carried out as the supercooled gel state. When the heat generation of the medium is desired, power supply to a solenoid coil is turned ON. Then, a heat generating rod 4 is inserted through a heat storage vessel 1. When a seed crystal retained in a seed crystal retaining chamber 4d makes contact with the heat storage medium 2 in a supercooled gel state, the entire part of the heat storage medium in a supercooled gel state is rapidly crystalized, and a latent heat accompanied by the crystalization is generated. This latent heat is used, for example, as an immediately effective space heater for use in an automobile.
Patent JP-S61180082-A (JP)
Inventor: MARUKAMU UEIMAN
IPC: F16L1/024
Filed: 1986-01-09
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07209627-A (JP)
Title: Driving method for active matrix type display device
Inventor: MORIYAMA NAOKI
IPC: G09G3/36
Filed: 1994-01-17
Abstract: PURPOSE:To obtain a display image of high quality without deterioration by writing an image signal on a couple of adjacent horizontal pixel lines where pixel potential holding capacitance is formed almost at the same time in a specific period based on a pixel potential holding capacitance line. CONSTITUTION:This display device is equipped with pixel electrodes 151a and 151b which are arranged across switch elements of (n) channels and plural horizontal pixel lines consisting of arrays of display pixels consisting of the pixel electrodes 151a and 151b and a counter electrode facing them, and pixel potential holding capacitances based on the common potential holding capacitance line 211 are formed between pixel electrodes 151a and 151b of a couple of adjacent horizontal pixel lines. By this driving method which displays a display image based upon an image signal on this active matrix type display device, the image signal is written on an adjacent couple of adjacent horizontal pixel lines where the pixel potential holding capacity is formed almost at the same time based on the common pixel potential holding capacity line 211 in a period wherein the image signal is lower than the potential of the counter electrode.
Patent JP-H10199113-A (JP)
Title: Cd-rom device
Inventor: MIYAGAWA TAMOTSU
IPC: G11B19/02
Filed: 1997-01-10
Abstract: PROBLEM TO BE SOLVED: To provide a CD-ROM device capable of shortening a time (seek time) required for reading the data consisting of plural sectors and instantly dealing with a request from a host computer. SOLUTION: The host computer 12 outputs the sector specification data specifying a sector to be read to a controller 14. The controller 14 servo controls a pickup 22 based on these sector specification data. The data read by the pickup 22 are transferred to the host computer 12. Then, when a file constituted of plural sectors is read out from a disk 16, the controller 14 makes hold the pickup 22 to its position temporarily while until the next sector specification data are outputted after the data of a sector are transferred to the host computer 12. Thus, since the data are read out instantly by the pickup 22 according to the sector specification data from the host computer 12, operation of an OS, etc., becomes smooth.
Patent JP-H08188221-A (JP)
Title: Carriage system
Inventor: HORINOUCHI ARATA
IPC: B60L13/03
Filed: 1995-01-11
Abstract: PURPOSE: To provide a carriage system capable of carrying a small article using the same traveling track without impeding the sanitary environment in a hospital. CONSTITUTION: Carriers 1a-1d classified into four kinds according to the use are traveled along traveling hacks 2, 3a-3c divided into the assumed traveling blocks A-C. Stations 4a-4c instruct the traveling of the carriers 1a-1d, and the kind of the advancible carriers 1a-1d is specified. A local controller controls the traveling of the carriers 1a-1d in the corresponding traveling blocks A-C based on the kind of the carriers 1a-1d and the kind of the advancible carrier of the stations 4a-4c, and transmits the traveling information of the carriers 1a-1d to other local controllers.
Patent JP-H05187836-A (JP)
Title: Optical measuring method using fluorescent material
Inventor: KAWAGUCHI NOBORU
IPC: G01B11/24
Filed: 1992-01-10
Abstract: PURPOSE:To clearly catch the picture of the surface to be measured of an object to be measured by using a fluorescent material when the picture of the surface to be measured is taken with CCD cameras. CONSTITUTION:At the time of performing optical measurement for measuring the dimension, shape, etc., of the surface B to be measured of an object A to be measured by taking the picture of the surface B with CCD cameras 1, the surface B is irradiated with rays of light having a specific frequency after a fluorescent material is applied to the surface B. At the time of measuring the surface B, visible rays of light or ultraviolet rays from the fluorescent material applied to the surface B are received with the cameras 1.
Patent JP-H05187840-A (JP)
Title: Method and device for recognizing pattern
Inventor: MIYAZAKI NAOKI
IPC: G06T7/00
Filed: 1992-01-10
Abstract: PURPOSE:To reduce the lowering of the title method and device in recognition rate by determining the shifted amounts of a main and auxiliary candidate points by, finding the positions, lengths, and angles of the points against a main and auxiliary reference pictures by recognizing a pattern based on determined results. CONSTITUTION:The picture of an object to be recognized, such as an IC chip 1, lead frame 2, etc., is taken with a camera 3 and converted into a binary picture signal by means of a binary picture processing section 4. The converted signal is inputted to a correlation matching section 9. While the correlation between the binary picture signal and a reference binary picture outputted from a main reference binary picture storing section 8 is calculated, first and second switches 17 and 19 are switched to each other at the scanning-line switching timing of the camera 3 and the section 9 calculates the correlation between the binary picture signal and a reference binary picture from an auxiliary reference binary picture storing section 16. Then a main and auxiliary candidate points 13 and 21 are respectively found against a main and auxiliary reference pictures. Namely, pattern recognition is performed by comparing and determining shifted amounts between points by finding the positions, lengths, and angles to the main and auxiliary reference pictures by means of a section 23 for obtaining the position, distance, and angle between two points.
Patent JP-H04241516-A (JP)
Title: Output buffer circuit
Inventor: FUJIWARA HISASHI
IPC: H03K19/0185
Filed: 1991-01-16
Abstract: PURPOSE:To prevent malfunction by preventing the potential level fluctuation of another circuit on the same substrate caused by a large current flowing from a power source to a ground in the case of switching a data, and switching stepwise an output voltage. CONSTITUTION:A NAND gate 1 having two inputs and two outputs and a NOR gate having two inputs and two outputs are constituted by using PchFET 11-19 and NchFET 21-29. Corresponding to the output changes of signal delay circuits 31 and 32, the outputs of the circuits 1 and 2 are received by the FET 16, 26 and 27. At the output buffer circuit of this configuration, all the FET 16, 17, 26 and 27 constituting an output step are turned off at the moment of starting or ending an input data D, no through current flows and there is no advance influence to the other circuit. Since an output voltage OUT is changed through 2VT (thereshold voltage), there is no rapid current change. The peak value of the output current is lowered with the stepwise change of the output OUT, a di/dt is made small, and electromagnetic guided noise is suppressed. As the result, malfunction can be prevented.
Patent JP-2000197833-A (JP)
Title: Electric dust collector for tunnel
Inventor: MIENO MITSUHIRO
IPC: B03C3/41
Filed: 1999-01-08
Abstract: PROBLEM TO BE SOLVED: To provide an electric dust collector for a tunnel which can improve dust collection efficiency. SOLUTION: In an electric dust collector equipped with a charging part for charging particulates in gas introduced from a tunnel and a dust collection part for collecting the charged particulates in the gas passing through the charging particulates, the charging part has a plate-shaped discharge electrode 5 extending in the flow direction of the particulates and dust collection electrodes 4 arranged opposite to each other and parallel to both sides of the discharge electrode 5, and projections 12 are formed in parallel on the electrode 4 side of the discharge electrode 5. Since the projections 12 are directed to the electrode 4, a region of large electric field strength is formed between it and the electrode 4 to increase a discharge current sufficiently.  Even when high flow velocity gas is intruded into a gas charging part, the particulates can be charged efficiently, and the charged particulates can be collected efficiently in the dust collection part.
Patent JP-S61162020-A (JP)
Title: Automatic focus adjusting device
Inventor: IWASAKI YOICHI
IPC: G03B13/36
Filed: 1985-01-11
Abstract: PURPOSE:To attain optimum focusing operation everytime by adjusting focus on the basis of an intermediate value between the maximum value and minimum value of a range finding result in accordance with contrast. CONSTITUTION:The contrast level of a subject is appreciated and switching between normal range finding and intermediate value range finding for plural range finding values is executed in accordance with the contrast. When the contrast of the subject is low, a contrast deciding part 113 outputs a signal 114 for specifying the averaging operation of the shifted distances on the basis of a contrast appreciating value signal 112 outputted from an arithmetic part 104, so that a lens group 10 is not moved to a false position until the shifted distance from the arithmetic part 104 always shows a false fixed value, i.e. deflected incorrect range finding is frequently generated. When the contrast increases and exceeds the threshold, the contrast deciding part 113 outputs a signal 114 for indicating the normal range finding and a comparison deciding part 108 increases its response capacity. Consequently, a motor driving circuit 110 repeats stable focusing operation on the basis of distance information, i.e. a shifted distance signal 105.
Patent JP-S61161599-A (JP)
Inventor: TANAKA HIROSHIGE
IPC: G08C19/00
Filed: 1985-01-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H11203198-A (JP)
Title: Memory access controller
Inventor: MURAOKA SATOSHI
IPC: G06F12/08
Filed: 1998-01-09
Abstract: PROBLEM TO BE SOLVED: To improve the efficiency of memory access. SOLUTION: A memory access unification detection part 9 judges whether or not a memory access request sent from a CPU 1 provided with a cache memory 2 has the same access destination and the same kind of access as those of the memory access request stored in an address/control signal buffer 12 and the access destinations are adjacent within a range capable of access by a single memory access sequence, and in the case of being so, generates the memory access request for accessing both access destinations and stores it in the address/control signal buffer 12. A memory access processing part 14 executes the access of a memory 6 according to the memory access request successively read from the address/control signal buffer 12.