Patent GB-1099079-A (GB)
Title: Automatic telecommunication exchange
IPC: H04Q3/00
Filed: 1965-12-17
Abstract: 1,099,079. Automatic exchange systems. INTERNATIONAL STANDARD ELECTRIC CORPORATION. Dec. 17, 1965 [Dec. 21, 1964], No. 53622/65. Heading H4K. In a system having indirect (register controlled) exchanges and direct (step-by-step) exchanges which are interconnectible, the former are provided with auxiliary registers in which the first one or two digits of an incoming call are stored pending seizure of a main register in which the remaining digits are stored and into which the first one or two digits are transferred. The indirect exchange is a large exchange utilizing high-speed crossbar switches and its main registers are reached from the incoming junctors via two stages of switches. The finder stage comprises 14, 28 x 14 switches JC whose horizontal multiples are split so as to accommodate 56 incoming junctors per switch. The connector stage MRF comprises seven 28 x 10 switches. The two stages thus provide access between 784 junctors and 70 main registers (Fig. 2, not shown). The junctors are also wired, in groups of 56, to fourteen 28 x 14 switches ARF, whose horizontal multiples are again split and whose corresponding verticals in the two so formed halves are connected in parallel so as to provide access to 98 auxiliary registers. An alternative arrangement utilizing a common switch for the JC and ARF switches is discussed with reference to Fig. 7 (not shown). General description, Fig. 1.-An incoming calling condition from step-by-step exchange S is detected by incoming junctor IJ 1  whereby an auxiliary register AR 1  is immediately connected up and the incoming digits registered. Meanwhile a main register MR 1  is seized and connected through to the junctor whereafter it accepts the succeeding digits. The AR 1  register, on detecting that MR 1  is now in service, seizes a path via link L, connecting circuit CC and a coupler C, and transfers the one or two digits that it has stored into the main register whereafter it releases. In both registers, digits are stored on relays in a two-out-of-five code. Particular description, Figs. 3 and 4.-On receipt of an incoming call, a relay Kyr (Fig. 4) in a free auxiliary register is operated (by means not shown). Relays Rfr and Kgr follow so as to connect the register to the relevant junctor and hold the cross points T to C<SP>1</SP> therebetween. In addition a relay Klr is operated to apply an operating earth to all points marked E. The impulses of the first incoming train operate contacts ik (by means not shown) and relay Rfr follows the contacts. A slow-release relay Rgr comes up, a relay Rjr and a slow release relay Rhr are energized, Ilr locks-up and a first impulse registering relay Rar operates. At the end of the first impulse Rfr re-operates and Rkr locks up. During the second impulse, Rfr, Rjr release and a second impulse registering relay Rbr comes up. The relays Rjr and Rkr operate during alternate impulses and depending upon the number of impulses two or three of relays Rar to Rer are energized at the end of the train. At this time Rgr falls back completely and during the release time of Rhr, the operative combination of relays Rkr and Rar-Rer causes a marking to be extended over two of leads S1-S5 to intermediate storage relays Ar.Er in the auxiliary register. Two of the latter respond and bring up Xr. The relays Rlcr, Rar-Rer release and then respond in a similar manner to the second impulse train whereafter they hold and bring up a relay Yr which denotes that the auxiliary register AR contains two stored digits (Xr denoted one stored digit). Transfer of digits from AR to MR.-When a main register MR is seized, relays Fr and Akr (Fig. 3) therein respond and Tcr in AR follows. Provided no digits are being received by AR, Ilr is back whereby relay Eir comes up and brings up in series therewith Lar, or Gr or Hr depending on whether none, one or two digits have already been received. Vir follows to release Rfr whereby no further digits can be received in AR. In the case of Lar operated, digits are passed direct from the junctor into a receiver RCC and then transferred to the relevant registering relays A 1 r.E 1 r; A 2 r.E 2 r &c. In the case of Gr, the second &c. digits are accepted by RCC and stored in A 2 r.E 2 r &c. while the first digit which is stored in Ar.Er is passed over the by-pass path through CC to A 1 r.E 1 r. The case of Hr is similar to Gr but the second digit which is in effect stored on leads S1 to S5 is transferred via a second bypass path to A 2 r.E 2 r. The operation of Lar or the transfer of the first digit brings up Qr which initiates release of AR and the by-passes.