baber/WOPTO huggingface dataset:
Patent JP-H06291573-A (JP)
Title: Amplifier circuit
Inventor: TANAKA YUJI
IPC: H03G3/30
Filed: 1993-04-01
Abstract: PURPOSE:To select the maximum amplification factor so that an output voltage against an input analog voltage can not be beyond a constant voltage. CONSTITUTION:An arithmetic amplifier 14 amplifies an input voltage VI, and outputs an output voltage VO. A comparator 13 applies a signal CMP which is '1' to an AND circuit 15 when the output VO is more than a constant voltage VMAX, and applies the signal CMP which is '0' to the AND circuit 15 when it is less than the constant voltage MAX. A terminal 9 supplies an enable signal E having the value of '1' to the AND circuit 15 only in a fixed period. The AND circuit 15 generates a signal S6 obtained by masking the signal CMP by the enable signal E or the like. A counter 16 counts a clock signal CK in the pulse period of the signal S6, and applies signals S1-S4 corresponding to it respectively to switches 22-25. Each switch 22-25 are turned on when the values of the signals S1-S4 are '1', and turned off when the values of the signals S1-S4 are '0'. Thus, a combined resistance value R is changed, a gain G is gradually changed, and the output voltage is maintained so as to be a smaller range than the constant voltage VMAX.
Patent JP-S63241738-A (JP)
Title: Production of recording film material for optical memory
Inventor: YOKOTA RYOSUKE
IPC: G11B7/243
Filed: 1987-03-27
Abstract: PURPOSE:To enhance the long-period preservable property of recording by adding SiO2 and/or GeO2 as an oxygen source to a glass base material contg. Si, Sn and Te and having eutectic compsn. and introducing 0.2-12atom.% oxygen per 100atom.% total of Si, Sn and Te thereto. CONSTITUTION:The Si, Sn and Te having about 5 purity are weighed and mixed as to have the eutectic compsn., to which SiO2 and/or GeO2 are weighed and added so as to incorporate oxygen at 0.2-1.2atom.% per 100atom.% in total of the Si, Sn and Te. The mixture is vacuum-sealed into a quartz glass ampoule and is melted for along time at about 1,050 deg.C in a rocking furnace. The temp. is lowered down to about 600 deg.C in about 3hr and the melt is quickly cooled after defoaming, by which the recording film material for an optical memory is obtd. This material is preserved in a vacuum desiccator, etc., before formation of the recording film. This material withstands long-period preservation. The film which is excellent in both the recording and erasing performance is obtd. when the film thereof is formed by sputtering on a substrate.
Patent JP-H08271167-A (JP)
Title: Heat exchanger
Inventor: YASUTAKE TAKAYUKI
IPC: F28F1/02
Filed: 1995-03-31
Abstract: PURPOSE: To provide a heat exchanger which is easily manufactured reduces internal pressure loss, and further exchanges heat efficiency is excellent. CONSTITUTION: An inner fin F is loaded in a flat tube element. As the fin F, predetermined length inner fin units Fx are disposed adjoining to each other into an offset state where part of an adjacent wall part Fa in the width direction is disposed along the length of the tube element, the inner fin unit having alternately continuously in the width direction of the tube element the adjacent wall part Fa fixed to in contact with internal peripheral surfaces of opposing flat surface wall parts of the tube element and a partition wall part Fb partitioning a heat exchange medium flow passage X in the width direction.  A concave part Fc protruding inwardly of the heat exchange medium flow passage X is formed at the middle part of each adjacent wall part Fa in the width direction in the length direction of the tube element, and a ridge (i) of one edge part side of each concave part Fc is continuously connected with a ridge (j) between the partition wall part Fb and the adjacent wall part Fa in the adjacent inner fin unit Fx.
Patent JP-H10265174-A (JP)
Title: Heavy cargo carrier device
Inventor: TANAKA HIROSHI
IPC: B66C5/02
Filed: 1997-03-27
Abstract: PROBLEM TO BE SOLVED: To safely carry a heavy cargo by easily overturning and erecting the heavy cargo. SOLUTION: A pair of supports 11, 11 constituted free to extend and contract are respectively erected on a pair of frames 10, 10 on which casters 13 are installed in the front and the rear of it, and a suspension beam 12 is installed between a pair of the supports 11, 11. A pair of connecting rods 17, 17 are installed free to revolve around a horizontal shaft on each of the supports 11 with one end of each of them, and the other ends are installed on a placing base 15 on which plural casters 16 are installed free to revolve around the horizontal shaft. Hydraulic cylinders 14 to extensionally and contractively move the supports 11 are installed on the supports 11. A suspension ring 19 is installed on the suspension beam 12. Thereby, the placing base 15 is drawn in between the frames or separated from between the frames by extending and contracting the supports 11.
Patent JP-H01251836-A (JP)
Title: Diagnosing method for switchboard
Inventor: KOJIMA TAKESHI
Filed: 1988-03-31
Abstract: PURPOSE:To continue the operation as usual with a packet switch module PSM by discontinuing the diagnosis of the PSM in a stand-by state in case the PSM kept under operation has a fault and then restarting the PSM for its operation. CONSTITUTION:In case a working PSM5 has a fault in a diagnosis mode and the switch is needed between the stand-by and operation states, the diagnosis of a PSM4 is discontinued and then restarted for operation. Then the PSM5 is set under a non-operation state owing to its fault. When these processes are through, the PSM4 is operated, and the call processing and the control operation of a packet are continued. Thus the discontinuation of operation due to a permanent fault is eliminated for the PSM.
Patent JP-H05127469-A (JP)
Title: Image processor
Inventor: TAKAOKA SATOSHI
IPC: G03G15/043
Filed: 1991-01-18
Abstract: PURPOSE:To freely set an erasing direction and an erasing amount by setting the kind of frame erasion and the erasing amount, generating information on the lighting of an electrostatic charge eliminating device for frame erasion, and controlling the lighting. CONSTITUTION:When a function for the frame erasion at the upper and the lower ends, the right and the left ends or in the center part of an image processing paper, for example, is selected by a means for selecting the kind of the frame erasion and the erasing amount is set by an erasing amount setting means, an erasing amount storage means stores the erasing amount of every kind of the frame erasion. When the job start indicating means such as a job start button of a machine is inputted, a means for generating the information on the lighting of the electrostatic charge eliminating device generates the information on the lighting of the electrostatic charge eliminating device for the frame erasion based on the stored value of the erasing amount storage means and the detected value of a paper size detection means. Based on the information on the lighting generated in such a way, the means for controlling the lighting of the electrostatic charge eliminating device controls the lighting of the electrostatic charge eliminating device, thereby accomplishing the aimed frame erasion.
Patent JP-H11274170-A (JP)
Title: Manufacture of semiconductor device
Inventor: IWAYA MINORU
IPC: H01L27/082
Filed: 1998-03-24
Abstract: PROBLEM TO BE SOLVED: To provide with simple process a manufacturing method of a high- performance multifunctional semiconductor device. SOLUTION: A transistor A and a transistor B which is orthogonal to A are made into island forms on an insulating substrate. (hereinafter, pattern A is described) The entire face is covered with a nitride film 204, and both side faces A205 and A206 of a silicon pattern are exposed by etching, and the substrate is tilted in the direction of ion beam application, and A205 is made into a p-type base region by ion implantation method. Polysilicon is formed over the entire surface by CVD method, and an electrode part is etched to form a base A207, an emitter A208, and a collector A209. Next, with a resist pattern, the base A207 is doped with ions to be formed into p-type and the emitter A208 and the collector A209 are formed into n-type, and heat is diffused to form each region.
Patent JP-S61234354-A (JP)
Title: Defect separation device for steel plate
Inventor: SANNOMIYA SHIZUYOSHI
IPC: G01N29/44
Filed: 1985-04-10
Abstract: PURPOSE:To separate cyclic defects from non-cyclic defects, by counting moving length of a steel plate between defect signals to output lengths from the signal one, two and three before separately as each defect signal is coming to compare with each other. CONSTITUTION:An (A) system group 10 is provided which counts lengths between respective defective signals from the signal one before to hold a plurality of values A0-A1 while (B) and (C) system groups 20 and 30 are provided which counts lengths between respective defect signals from the signal two and three before to hold a plurality of values B0-B3 and C0-C3. Defect signals Sd from a device for detecting flaws on the surface of a steel plate running and clocks CLK indicating the steel plate moving length are applied to obtain outputs, separately which are compared with magnitude comparators 61, 64 and 66. Those that coincide are judged to be cyclic roll marks and separated from non-cyclic defect signals. This can automate the separation and extraction of roll marks without visual inspection.
Patent JP-H02253965-A (JP)
Title: Conductive transferring and recording method
Inventor: SEYA KEIICHI
IPC: B41J2/325
Filed: 1989-03-28
Abstract: PURPOSE:To eliminate need to provide a return circuit electrode and to obtain a high-quality recorded picture by using the winding and/or unwinding part of an ink ribbon as a return circuit electrode. CONSTITUTION:A signal current from a recording electrode 2 housed in a recording head 1 runs through the conductive film of an ink ribbon 6 and flows into a winding part 3a and/or rewinding part 3b as a return circuit electrode. How to connect the winding part (unwinding part) being the return circuit electrode with the conductive film 9 of the ink ribbon is to tighten at least one end of a resistance film 8, conductive film 9 and ink film 10 with a screw 11, or to fix the return circuit electrode 3, the part 3a and/or the part 3b to the conductive film 9, with an adhesive, conductive material such as silver paste 12.
Patent JP-H06288631-A (JP)
Title: Hot water supply method for instantaneous type water heater
Inventor: MORITA TOSHIRO
IPC: F24H1/10
Filed: 1992-02-26
Abstract: PURPOSE:To prevent a sharp change in the temperature of supply water at an initial timing of the rede-livery of hot water or the like without providing an instantaneous type water heater with an auxiliary tank. CONSTITUTION:An instantaneous type water heater is so arranged to deliver hot water to a hot water delivery tipe 40 via an instantaneous type heat exchanger 11 from an intake pipe 30 while a bypass pipe 50 is provided having an opening/closing valve 51 to the hot water delivery from the intake pipe. In the supply of high temperature hot water, an shutoff valve 51 is closed for a fixed time initially at the start of supplying hot water and then, opened for a fixed. Thereafter, the shutoff valve is closed again. In the supply of low temperature hot water, the shutoff valve 51 is opened from the start of supplying hot water.
Patent JP-S60219134-A (JP)
Title: Visibility improving device
Inventor: ABE YUUICHI
IPC: H04N7/18
Filed: 1984-04-16
Abstract: PURPOSE:To improve the properties of recognition in a light erradiated area without being dazzled by the light of an opposite car by intermittently projecting light with a light projecting device to prevent the other party from being dazzled, while turning on and off a light shutter synchronized with the intermittent projection of light. CONSTITUTION:A projecting light control circuit 20 and a light shutter generating circuit 22 generate a projecting light controlling signal C and a light shutter controlling signal D respectively, which are fed into a light shutters 24, 16 of a light projecting device 14 respectively. The light shutter 24 enables the light from a light source 26 to pass through or to be shut off according to the on-off of the signal D, to project a pulse light. The light shutter 16 allows a light from a light erradiated area by the on-off of the signal D to pass through or to be shut off. A motor 34 is driven according to a signal C, rotating a slit board 36 to send out a pulse light, and the light shutter 16 is turned on and off synchronized with the intermittent projection of light from the light projecting device 14, without dazzling an opposite car.
Patent JP-H01251594-A (JP)
Title: Lighting device for discharge lamp
Inventor: SHIMIZU KEIICHI
IPC: H05B41/24
Filed: 1988-03-31
Abstract: PURPOSE:To stably light a lamp by connecting a diode in parallel with the capacitor of an LC filter and in the opposite direction to a DC power source. CONSTITUTION:An inductor 31 and a capacitor 32 are connected in a reversed-L shape to form an LC filter 3, a diode 33 is connected in parallel with the capacitor 32 and in the opposite direction to the polarity of a DC power source 1. Since the diode 33 is connected in parallel with the capacitor 32 of the LC filter 3, charges can not be stored on one side of the capacitor 32, thus the electrical vibration by the capacitor 32 and an inductor 55 or the like is suppressed, the generated ringing is reduced, thereby a lamp is stably lighted.
Patent JP-S61236215-A (JP)
Title: Voltage controlled oscillation circuit
Inventor: FUJII FUMIAKI
IPC: H03L7/06
Filed: 1985-04-12
Abstract: PURPOSE:To obtain a voltage controlled oscillation circuit while the stabilized operation is realized by detecting the self-running oscillation frequency when a prescribed control is applied and applying additively a constant current according to the difference with a set self-running oscillation frequency to a variable current. CONSTITUTION:Each conductance ratio is set in MOSFETs Q2-Q5 so that they have a current weight according to a binary signal stored in a latch circuit FF. When outputs of the circuit FF are all at low level, the FETs Q2-Q5 flow currents i1-i14 according to a constant voltage V0 and its conductance, they are added to a control current IC to increase the charging current to capacitors C1, C2 thereby increasing the self-running frequency. When the outputs of the circuit FF are all at high level, the FETs Q2-Q5 are all turned off because of the high source potential regardless of the supply of the voltage V0 to the gates and only the current IC actslike a charging current. The provision of the compensation circuit in this way allows an objective oscillation frequency at the midpoint potential of the control voltage.
Patent JP-H07262123-A (JP)
Title: Device control code compressing device
Inventor: TAKASHIMA KEIICHI
IPC: G06F3/12
Filed: 1994-03-23
Abstract: PURPOSE:To improve the processing efficiency by deleting set commands related to the same set contents to compress the data volume of the data flow of a device control code. CONSTITUTION:A central processing unit 1 reads out only one command portion of a printer control escape sequence stored in a RAM 2b and discriminates whether this command is a set command or not. If it is a set command, it is discriminated whether set contents related to this set command are already set in the pertinent printer control escape sequence or not. If they are already set, it is discriminated whether the set contents coincide with those of the present set command or not. If they coincide, the present set command is deleted from a storage device 2 (RAM 2b). Thus, the data volume of the escape sequence is compressed, and this compressed escape sequence is sent to a printer 6 in a short time.
Patent JP-2000268120-A (JP)
Title: Data recording medium and data recording method
Inventor: YOSHIOKA KENJI
IPC: G06K19/00
Filed: 1999-03-19
Abstract: PROBLEM TO BE SOLVED: To perform printing and recording to surely optically read code images optically readably printed and recorded on legible information by a reader. SOLUTION: In this data recording medium 10 for which the code image 15 for recording data by the presence/absence of dots is provided so as to be overlapped with the visually identifiable legible information 12 formed on the sheet 11 of paper, an intermediate layer 13 is provided between the code image 15 and the sheet 11 of paper and the transmission of light is limited to a prescribed ratio. Also, the physical characteristics of the dots 14 are changed corresponding to the transmission amount of the legible information 12 passing through the intermediate layer 13.
Patent JP-H07255446-A (JP)
Title: Coffee bean roaster
Inventor: NISHIKAWA TAKAO
IPC: A23N12/08
Filed: 1994-03-22
Abstract: PURPOSE:To provide a coffee bean roaster capable of roasting coffee beans while removing chaff on the surfaces thereof and freely changing over the heat used for roasting from a direct fire to hot air. CONSTITUTION:This coffee bean roaster is obtained by installing a roasting chamber 1 in a fixed state, coffee bean stirring blades 2, rotated and driven around a horizontal shaft center (L) in the roasting chamber l, a burner 3 arranged under the roasting chamber 1 provided with a coffee bean receiving surface 4 of a semicircular arc cross section in the lower half part, installing a hot air admitting hole group 18 for feeding hot air into the roasting chamber 1 in the upper part of a side where the outer ends of the stirring blades 2 in the roasting chamber 1 are lowered, and a direct fire heat admitting hole group 19 for passing the direct fire heat into the roasting chamber 1 in the lower part of a side where the outer ends of the stirring blades 2 are lifted in the roasting chamber 1, a heat shielding plate 21 for shielding the direct fire heat transmitted to the direct fire heat admitting hole group 19 so as to enable the free changeover from the shielded state of the direct fire heat to the transmitted state thereof and further a polished surface 20 on the inner surface in the upper part of the side where the outer ends of the stirring blades 2 are lifted in the roasting chamber 1. A dust collecting means (B) is provided on the outside of the roasting chamber 1.
Patent JP-S63241656-A (JP)
Title: Ocean freight automatic calculating system
Inventor: MIZOGUCHI KUNIO
Filed: 1987-03-30
Abstract: PURPOSE:To execute the automatic calculation only by the change of a rate with a user by defining respective types of an ocean freight calculating method with a pair of parameters and registering the rate necessary to respective calculations into a file as a part of parameters for respective calculation codes. CONSTITUTION:By designating a data number from an input output terminal 1, the corresponding data are read and a selecting conditions table 4 is prepared in a selecting conditions table preparing part 3 and a selecting conditions table 4 is prepared. By a charge selecting part 6, a data file 2 is read, a calculation parameter file 5 is read with a stored pattern number as a main key, the file to match with the selecting conditions table 4 is selected and a freight calculating table 7 is prepared. A tariff information table 9 is prepared in a tariff information table preparing part 8. The base rate for each tariff is inputted from a terminal input output device 10, calculated by a calculation executing part 12 and outputted to a freight file 13.
Patent JP-S572582-A (JP)
Title: Solar battery type generator
Inventor: MURAYAMA YOSHIO
IPC: H01L31/052
Filed: 1980-06-07
Abstract: PURPOSE:To inexpensively obtain directly the output of an alternating current by forming a plurality of rotary light shielding plates varying periodically the quantity of light approximately at the focus or focal line position of a condenser. CONSTITUTION:Solar light 1 is condensed at a focus 3 via a condenser 2, and is again diffused and projected to an array of batteries 4, 5. A light shielding plate 7 driven by a motor 6 is disposed in the vicinity of the focus to modulate the incident light to the batteries 4, 5 with the frequency determined by the rotating speed.The plate 7 has a window, and an AC electromotive force can be obtained between terminal 8 and 11.
Patent JP-H01248219-A (JP)
Title: Bus timing control circuit
Inventor: SHIMOMURA TSUTOMU
IPC: G06F1/06
Filed: 1988-03-30
Abstract: PURPOSE:To allow an input/output card operated by an input/output clock being different from a CPU clock to coexist by the same system by synchronizing a selected clock and the CPU clock. CONSTITUTION:When it is recognized that a card of an extended slot is brought to access, one of READY input signals A-C becomes inactive, and by which clock it is operated is informed to a system board. By a fall of its READY input signals A-C, the clock which is selected through a gate is outputted as an input/output clock to an extended bus. Also, the READY signal sets an MPU to WAIT state, the card of the extended slot secures a set-up time and makes the READY signal active, and the selected clock and a CPU clock are synchronized. That is, flip-flops 60, 70 contrive the synchronization of an input/output clock (I/O CLK) and the CPUCLK. In such a way, the card which is designed by a flow or quick input/output clock can be allowed to coexist on the same system.
Patent JP-S57192185-A (JP)
Title: Receiver for television multiplex character broadcast
Inventor: SAWARA HIROSHI
IPC: H04N5/445
Filed: 1981-05-21
Abstract: PURPOSE:To effectively operate a TV multiplex character broadcast, by making a picture of a character broadcast for scrolling display a part of a CRT with the key operation of the user when the character broadcast is a prescribed mode to make the normal broadcast to be viewed. CONSTITUTION:A display section Sd in parallel 8-bit is picked up from a control circuit. When this signal Sd is loaded to a register 102, it is serially picked up with a pulse Pb at each pulse. A mask signal Sm which is at ''1'' for the vertical scanning period of the lower 2-line block from the register 102. When this signal Sm is supplied to an AND circuit 103 and a signal Ss from an OR circuit 423 is applied to the AND circuit 103. Further, the signal Sm is applied to a switching gate 104 via the AND circuit 103 and also to the switch circuit 104 as a control signal. Thus, the picture of the character broadcast of the prescribed mode is scroll-displayed at the region of lower 2-line block of a CRT and the picture of normal broadcast can be reproduced on the upper region.
Patent JP-H06285318-A (JP)
Title: Filter paper and air filter utilizing the filter paper
Inventor: FUJIE NOBUO
IPC: B01D53/46
Filed: 1993-04-02
Abstract: PURPOSE:To provide the filter paper and air filter capable of filtering not only a granular contaminant but also a molecular contaminant in a clean room deteriorating the products in the electronic field such as semiconductors, etc., and biological products. CONSTITUTION:This filter paper is made by using quartz glass fibers having 0.2-12mum diameter and with the amt. of boron eluted into pure water (65 deg.X120hr) controlled to 1.5X10<-5>g/g fiber, and boron and org. compds. are adsorbed and collected when air is passed through the filter paper.
Patent JP-H08246337-A (JP)
Title: Fibrillated fiber or web
Inventor: KUBOTA MICHIO
IPC: D06M101/16
Filed: 1995-03-07
Abstract: PURPOSE: To obtain a fibrillated fiber or web which can be treated by a simple method, is similar to a natural fiber due to the fine fibrils produced after split, can express a spun-like touch having soft, swollen and warm touches, and is excellent in an antipilling property and an abrasion whitening-resistant property. CONSTITUTION: A conjugate fiber is produced by joining a component (A) comprising a low viscosity polyester having an intrinsic viscosity of 0.48-0.60 to a component (B) comprising a polyester having larger solubility than that of the component A in the (A)/(B) weight ratio of 2/1 to 10/1, and has 32 or more layers. A fibrillated fiber or web having fine fibrils is produced by dissolving off a component (B) from a conjugated fiber.