baber/WOPTO huggingface dataset:
Patent TW-364205-B (TW)
Title: Method for producing DRAM capacitor
Inventor: JENG JR-SHIANG
IPC: H01L27/108
Filed: 1997-12-19
Granted: 1999-07-11
Abstract: The present invention provides a method for producing DRAM capacitor having larger surface area to increase cell capacitance. It comprises the steps of providing a substrate on which a first conductive layer has been formed to contact with source/drain electrode through contact hole, then, amorphous silicon layer and hemispheric silicon die layer are formed on the surface thereof in sequence, wherein the amorphous silicon layer can enhance the adhesiveness of the hemispheric silicon die layer to the first conductive layer. Then, back etching part of hemispheric silicon die layer and part of amorphous silicon layer; finally, forming a second dielectric layer and a second conductive layer on the surface thereon in sequence.
Patent TW-357401-B (TW)
Title: Semiconductor device having multilevel interconnection structure and manufacturing method thereof
Inventor: USAMI TATSUYA
IPC: H01L21/28
Filed: 1997-12-23
Granted: 1999-05-01
Abstract: A sort of semiconductor device, including: a semiconductor substrate; a first insulation membrane; a plurality of internal connections, formed on the first insulation membrane in parallel; a plurality of second insulation membranes, formed on a plurality of lateral walls of internal connections; and the third insulation membrane, which dielectric constant is lowre than that of the first insulation membrane and the plurality of second insulation membrane, disposed between the plurality of internal connection lateral walls, for forming on the first insulation membrane directly.
Patent TW-429690-B (TW)
Title: Adaptive encoding method
Inventor: KIMURA TOMOHIRO
IPC: H04N19/91
Filed: 1998-01-22
Granted: 2001-04-11
Abstract: In the probability estimation method of conventional data without memory source, to avoid the overflow of counter in calculating the maximum, value in counter will be unconditionally reduce to half of the original value, thus possibly causing the problem of larger estimated probability tolerance and lower coding efficiency. Provide an adaptive coding method comprised of: the fourth step (508), (510) for calculating the occurrence frequency of either the more probable symbol (MPS) or the less probable symbol (LPS) with respective to the entered input, and comparing the occurrence accumulation count calculated at the occurrence frequency of the fourth step with a preselected value; the fifth step that the occurrence accumulation reaches a targetd value resulting in the 50% decrease in the occurrence frequency of the MPS and LPS; and the sixth step (513) for correlating the MPS and the LPS with a predetermined region on a numerical line with respect to the data signal and thereby outputting the coordinate values on the numerical line as coded words.
Patent TW-528776-B (TW)
Title: Peroxide compositions with improved safety characteristics
Inventor: SCHUURMAN PIETER
IPC: C08F4/32
Filed: 1998-02-09
Granted: 2003-04-21
Abstract: Safe peroxide compositions are provided which comprise two phlegmatizers having boiling points that are more than 20 DEG C, preferably more than 50 DEG C, apart. These compositions are safer than peroxide compositions with the same peroxide concentration containing only one phlegmatizer or phlegmatizers not fulfilling the boiling point requirement. The compositions are particularly useful in radical polymerization processes, cross-linking reactions, polymer modification processes, and other reactions involving peroxides, for example the preparation of certain chemicals.
Patent TW-505858-B (TW)
Title: Data register for multicycle data cache read
Inventor: FISHER MICHAEL TODD
IPC: G06F12/08
Filed: 1998-02-17
Granted: 2002-10-11
Abstract: A cache system provides for accessing set associative caches with no increase in critical path delay, for reducing the latency penalty for cache accesses and for responding to slot MRU misses and cache misses. An N-way set associative cache is provided, each set of said cache including an SRAM array macro having a memory element, an internal SRAM data register, and a read enable signal line. Read enable is generated as the NOR of slot miss and cache miss signals, and the internal SRAM data register is responsive to the slot miss signal for registering data output during a first cycle for use in a next following cycle.
Patent TW-449712-B (TW)
Title: Integral key top and key-in device and computer using such key top
Inventor: HYONO TADASHI
IPC: H01H13/705
Filed: 1998-03-11
Granted: 2001-08-11
Abstract: Provided is a hinge type 15 thinly configured integrated type key top 11 in which the strength, durability, operability and other required conditions of a hinge portion 15 are optimally designed assuring easy manufacturing and assembling as well as key input device and computer using the same. It is an integrated type key top 11 in which a plurality of key tops 11 are integrated with a peripheral frame portion 12. Each key top 11 has in the vicinity of both ends of its specified one side a portion deformably connected to the frame portion 12 via a hinge portion which extends approximately in a linear shape of a specified width and a specified thickness. The key top11, the hinge portions 15 and the frame portion 12 are integrated with one another and made of a resin material, while the hinge portion 15 has a thickness t (mm) and a total width w (mm) which are set so that it can satisfy the condition of 8 ≤ 20t+w ≤ 1.4 within the range of 0.25 ≤ t ≤ 0.6 and 2 ≤ w ≤ 10.
Patent TW-400364-B (TW)
Title: Azo dye mixtures, azo dyes, processes for their preparation, and their use
Inventor: LAUK URS
IPC: C09B35/56
Filed: 1998-03-11
Granted: 2000-08-01
Abstract: Dye mixtures comprising at least one dye of the formula (1), together with at least one dye of the formula (2) or (3), in which the substituents are as defined in claim 1 are direct dyes for cellulosic fibre materials in particular. They are stable at high temperatures and are particularly suitable for the one-bath, single-stage dyeing of polyester/cotton blends with a disperse dye for the polyester fibres under the dyeing conditions for polyester fibres.
Patent TW-434190-B (TW)
Title: Electrolytic cell for producing acidic water and alkaline water
Inventor: YAMADA KUNIAKI
IPC: C25B9/19
Filed: 1998-04-09
Granted: 2001-05-16
Abstract: An electrolytic cell for producing acidic water and alkaline water is disclosed. High-purity acidic water and high-purity alkaline water can be produced in a well balanced proportion from ultrapure water which is supplied in the minimum amount necessary for producing the desired acidic and alkaline waters using the minimum amount of electricity. The electrolytic cell includes an electrolytic acidic-water production unit 3 comprising an anode chamber 6 and an auxiliary cathode chamber 7 separated therefrom by a first ion-exchange membrane 5, and an electrolytic alkaline-water production unit 4 comprising a cathode chamber 10 and an auxiliary anode chamber 9 separated therefrom by a second ion-exchange membrane 8. Separately controllable power supplies are also provided for supplying power to each of the two units. The supply amount of pure water and the amount of electricity used can be fixed according to the desired amounts of acidic and alkaline waters. Thus, wasteful use of ultrapure water and electric power can be avoided.
Patent TW-359639-B (TW)
Title: High radiation glass coating material, high radiation glass coating, and process for producing high radiation glass coating
Inventor: MATSUNAGA HIROKAZU
IPC: C03C17/00
Filed: 1998-04-10
Granted: 1999-06-01
Abstract: A glass paste comprises coated colorant particles of silicon tetraborate, and a silica glass coating (silica glass layer) which is formed on the surface of the colorant particles in a predetermined thickness and which has a silica content higher than that the glass structure. The glass paste is applied to the surface of the substrate and then dried to form a glass coating. Due to the presence of the colorant particles and the silica glass coating (silica glass layer) which has a silica content higher than that of the glass structure and which is less reactive to the colorant particles, when the high radiation colorant particles are dispersed in the glass structure of a high radiation glass coating, the surface reaction between the high radiation colorant and the glass structure can be properly prevented during manufacture and use.
Patent TW-374170-B (TW)
Title: Clock-synchronized input circuit and semiconductor memory device that utilizes same
Inventor: TOMITA HIROYOSHI
IPC: G11C7/10
Filed: 1998-04-23
Granted: 1999-11-11
Abstract: A semiconductor memory device, to which a plurality of command signals are supplied in synchronous with a clock, comprises a plurality of input circuits, having a sampling unit for inputting said command signals and said clock and sampling said command signals in synchronous with said clock, and an output unit for outputting said sampled command signals; a command decoder for receiving the command signals output by said plurality of input circuits, decoding said plurality of command signals and generating a corresponding control signal; a memory element, which implements a variety of operational modes in response to said control signals; an output timing signal generator circuit, having a circuit architecture equivalent to at least the sampling unit of said input circuit, for sampling a predetermined signal level in synchronous with said clock, and for generating an output timing signal based on the timing of the operational delay time of said sampling unit; and wherein said input circuit outputs said sampled command signals in response to said output timing signal.
Patent TW-396585-B (TW)
Title: Electric static discharge protection circuit structure in dynamic random access memory and its manufacturing methods
Inventor: WU TSUNG-JR
IPC: H01L21/8242
Filed: 1998-06-06
Granted: 2000-07-01
Abstract: This is a protection circuit structure for electric static discharge (ESD) in dynamic random access memory (DRAM) and its manufacturing process. The protection circuit and the capacitor are manufactured at the same time. The protection circuit includes a heavily doped drain discharged by the hot carriers. The performance of ESD protection is greatly improved. The process of ESD implementation is eliminated to reduce the cost of manufacturing.
Patent TW-408387-B (TW)
Title: Photolithographic process using semi-transparent phase-shift mask to eliminate the edge side lobe effect
Inventor: YANG CHUEN-HUEI
IPC: H01L21/30
Filed: 1998-07-02
Granted: 2000-10-11
Abstract: A method of forming and light exposing the photoresist layer, said method could proceed light exposure and developing process toward the photoresist layer by using phase shift mask or semi-penetrating phase shift mask to decrease and even eleminate the side lobe effect. Wherein, the reflective index curve could use the reflective index n of said photoresist material, and the extinction coefficient k to calculate the reflectivity as function of photoresist thickness, and the reflectivity curve is an oscillation curve. Then, according to the relative maximum value of said selected oscillation curve, it could acquire the optimum thickness of said photoresist. Besides, it could acquire its optimum thickness by using the selected angular velocity to rotate the photoresist sited on the wafer; then, proceed the light exposure and the develop process toward the prepared wafer with optimum thickness. And when necessary, it could form one anti-reflective coating layer on the surface of said photoresist layer.
Patent TW-357283-B (TW)
Title: Method and apparatus for darkroom relief image multi-exposure
Inventor: Lin qing-tai
IPC: G03D13/08
Filed: 1998-07-06
Granted: 1999-05-01
Abstract: A method for darkroom relief image multi-exposure, by disposing a transparent sheet or light blocking sheet or meshed sheet between the development lens and the photo paper and after proper adjustment of height, having the light source pass through the negative for projection of the image by the lens onto the photo paper by first going through the transparent sheet or the light blocking sheet, or the mesh sheet, with exposure of the first image on the photo paper, followed by layout per size of the form of the second image, and by using different transparent sheet, light blocking sheet, or the mesh sheet from the original one,after proper adjustment of height, for exposure of the second image, and likewise, for exposure of 3 or more images, on the same photo paper, for exposure of more than 2 individual or overlapped or overlapped yet interfered image of any layout, making the profile of the image show flood light as a 3D relief effect.
Patent TW-386943-B (TW)
Title: A fibrous board and method for manufacturing same
Inventor: CHEN HUNG-RUNG
IPC: B32B5/02
Filed: 1998-07-09
Granted: 2000-04-11
Abstract: This invention is related to a fibrous board and method for manufacturing same, comprising the steps of: using polyester raw material or recycled PET bottles and protruding into long fibers such that the fibers intersect or stacked one another in irregular directions thereby forming a meshed cloth of a predetermined thickness; needle stitching the meshed cloth to form a non-woven cloth of long fibrils; immersing the non-woven cloth of long fibrils into resins; heat pressing the cloth into a flat-board configuration; performing a cutting or rolling process so as to form a final product of fibrous board, in which the long fibrils within the fibrous board are in irregular directions so as to render a non-woven structure for the fibrous board, and in which surfaces of the fibrous board include fine and coarse patterns formed by the long fibrils.
Patent TW-535061-B (TW)
Title: Cache coherency protocol having hovering (H) and recent (R) states
Inventor: ARIMILLI RAVI KUMAR
IPC: G06F12/08
Filed: 1998-07-13
Granted: 2003-06-01
Abstract: A cache and method of maintaining cache coherency in a data processing system are described. The data processing system includes a plurality of processors and a plurality of caches coupled to an interconnect. According to the method, a first data item is stored in a first of the caches in association with an address tag indicating an address of the first data item. A coherency indicator in the first cache is set to a first state that indicates that the tag is valid and that the first data item is invalid. Thereafter, the interconnect is snooped to detect a data transfer initiated by another of the plurality of caches, where the data transfer is associated with the address indicated by the address tag and contains a valid second data item. In response to detection of such a data transfer while the coherency indicator is set to the first state, the first data item is replaced by storing the second data item in the first cache in association with the address tag. In addition, the coherency indicator is updated to a second state indicating that the second data item is valid and that the first cache can supply said second data item in response to a request.
Patent TW-381016-B (TW)
Title: Non-invasive penile erection device
Inventor: WU GUO-BAU
IPC: A61F5/41
Filed: 1998-07-16
Granted: 2000-02-01
Abstract: The present invention relates to a non-invasive penile erection device having a constrictor ring designed to fit against the base of a male genital or penis, and a diaphragm seal that forms a substantially air tight seal against the constrictor ring. The constrictor ring is designed for comfortably and securely fitting onto the base of the penis. The substantially airtight seal enables the pump to produce vacuum pressures of over 17 inches of mercury. The diaphragm seal is designed to collapse around the constrictor ring and remain on during sexual activity. The placement of the constrictor ring on the base of the penis and the greater vacuum pressure achieved by the device tend to draw the root or ""oz"" of the penis into the constrictor ring so that a more natural erection is achieved and maintained after the vacuum tube is removed. Removal of the diaphragm seal reduces the total pressure being exerted on the penis, which causes the penis to deflate, which in turn facilitates the removal of the constrictor ring. The vacuum tube has a rounded open end to reduce the pinching of the individualíªs skin between the tube and their hipbone. The open end of the vacuum tube also includes a double flange to facilitate accurate placement of the diaphragm on the tube. The erection device can be provided as a kit containing a rigid vacuum tube, a hand or power operated pump, and several diaphragm seals and constrictor rings of various sizes to achieve a custom fit and optimum results.
Patent TW-I222884-B (TW)
Title: Sustained release drug delivery devices
Inventor: CHEN JIANBING
IPC: A61K31/58
Filed: 1998-08-27
Granted: 2004-11-01
Abstract: A device for treating a mammalian organism to obtain a desired local or systemic physiological or pharmacological effect is provided. The device includes an inner core or reservoir comprising the effective agent; a first coating layer, which is permeable to the passage of the effective agent; a second coating layer, which is essentially impermeable to the passage of the effective agent; and a third coating layer, which is permeable to the passage of the effective agent The first coating layer covers at least a portion of the inner core. The second coating layer covers at least a portion of the first coating layer and inner core; however, at least a small portion of the first coating layer or inner core is not coated with the second coating layer. The second coating layer includes an impermeable film and at least impermeable disc. The third coating layer essentially completely covers the second coating layer and the uncoated portion of the first coating layer or inner core.
Patent TW-412400-B (TW)
Title: Suspended gas-liquid mixer
Inventor: LEE SEN-YUNG
IPC: A01K61/00
Filed: 1998-09-08
Granted: 2000-11-21
Abstract: Disclosed is a suspended gas-liquid mixer, comprising an air passage tube, a float, a bubbling tray, and a check valve. Using torque generated from buoyancy of the fluid, structural rigidity, gravitational weigh of objects, and flexibility of ropes to design a suspended gas-liquid mixer that is of a simple structure, high efficiency, energy saving, freely adjustable depth of placement and free from impact of external forces.
Patent TW-456003-B (TW)
Title: Semiconductor device
Inventor: KURIYAMA HIROTADA
IPC: H01L23/552
Filed: 1998-11-26
Granted: 2001-09-21
Abstract: The present invention provides a semiconductor device to prevent the soft error due to thermal neutrons by applying a boron nitride inclusion sheet (6) on the surface of a mold package (4) enclosing a semiconductor chip (2).
Patent TW-449832-B (TW)
Title: Removing method of polysilicon defect
Inventor: TSAI CHENG-JR
IPC: H01L21/321
Filed: 1999-01-04
Granted: 2001-08-11
Abstract: A removing method of polysilicon defect is provided, which is used after a polysilicon layer is formed and is detected a defect on the surface of the polysilicon layer. The method comprises forming an oxide layer on the polysilicon layer and the defect; then, performing a polishing process until the oxide layer and the defect are polished to have only a thin film; and finally removing the oxide layer so that the remained thin film does not have any influence to the subsequent process.
Patent TW-412460-B (TW)
Title: A cleaning/buffing apparatus for use in a wafer processing device
Inventor: RAVKIN MIKHAEL
IPC: H01L21/304
Filed: 1999-02-05
Granted: 2000-11-21
Abstract: A semiconductor processing system, such as a system for buffing or scrubbing both sides of a wafer at the same time, that includes a processing box for use with chemical solutions, a positioning device to position a semiconductor substrate, or other similar semiconductor material or device, and a placement device to place a buffing pad or scrubbing brush.
Patent TW-434485-B (TW)
Title: Processor for information processing equipment and control method thereof
Inventor: KONDO NOBUKAZU
IPC: G06F13/28
Filed: 1999-02-12
Granted: 2001-05-16
Abstract: For improving data efficiency of a bus in a system using address/data multiplex bus, in a processor for information processing equipment, there are provided buffers 31 and 32 being able to store plural sets of write addresses and data for a system bus 800, a compartor 37 for deciding whether the write addresses are continuing or not in access requirements coming before and after about the same time, and means 45 for converting plural write operations for said continuing addresses into a burst transfer protocol which can be transferred with a series of continuing data cycles following one address cycle, when the decision result by the comparator 37 detects ones which come before and after are continuous in the write addresses thereof.
Patent TW-513314-B (TW)
Title: High moisture toothpaste
Inventor: RANDIVE VINAYAK BHALCHANDRA
IPC: A61Q11/00
Filed: 1999-03-05
Granted: 2002-12-11
Abstract: A stable, high moisture toothpaste has now been developed that comprises a carrageenan binder that is at least 70% iota carrageenan, a calcium based-polishing agent, humectant, surfactant, water and optional additives and therapeutic actives used in dentifrice compositions. The calcium-based agent is present at a weight percent concentration in the range of about 35 to 50, the water is about 35 to 50%, the humectant is about 5 to 15%, the carrageenan is about 0.5 to 0.85%, and the surfactant is about 0.5 to 5%. The high moisture, low cost toothpaste that is provided has favorable physical properties such as good viscosity and stability without the need for additional binder which is optional.
Patent TW-413772-B (TW)
Title: Simulation method of wiring temperature rise
Inventor: TODA TAKESHI
IPC: G06F17/50
Filed: 1999-03-08
Granted: 2000-12-01
Abstract: A heat capacity C1 is obtained by conducting two-dimensional thermal analysis simulation to the cross-section of a wiring. Next, based on one-dimensional approximate equation of <theta>0 = (Q0/2)(<lambda> SC1)<-1/2> along a wiring length direction, a wiring temperature rise <theta>0 in the void is obtained. In the expression, <theta>0 is a rise in wiring temperature in the void, Q0 is a thermal quantity of the void in the wiring, <lambda> is a heat conductivity of the wiring and S is a cross-sectional area of the wiring. The heat capacity C1 may be obtained from an expression C1 = <lambda>'{(W/t) + (2.80/1.15) (h/t)<0.222>}. In the expression, W is wiring width, h is wiring thickness, t is substrate film thickness and <lambda>' is the heat conductivity of the substrate film. By so obtaining, it is possible to shorten analysis time, to save the capacity of a memory and that of a disk for use in calculation, to obtain a simpler analysis model and to facilitate creating a mesh.
Patent TW-422954-B (TW)
Title: Production estimate management system
Inventor: TERANISHI YOSHIHARU
IPC: G06Q10/04
Filed: 1999-04-09
Granted: 2001-02-21
Abstract: A process plan unit 2 generates a process plan based on an operation plan of an operation plan unit 1. A work plan unit 3 generates a work plan based on the operation plan and the process plan. Since each plan of the process plan and the work plan inherits and uses the simulation result from the operation plan, a consistent plan can be made. In addition, an planned work management unit 4 checks the operation plan, the process plan, and the comparison between the actual result and the operation plan and the process plan, clarifies the cause of the problem of the difference between the actual result and the plans, and quickly makes a recovery plan.