baber/WOPTO huggingface dataset:
Patent JP-2001063727-A (JP)
Title: Liquid container
Inventor: KAMITSUKURI YASUAKI
IPC: B65D25/44
Filed: 1999-08-26
Abstract: PROBLEM TO BE SOLVED: To provide a container which can be folded in two for making less bulky, and also which can hold a spout formed in a bellows shape in a reduced condition. SOLUTION: On the front face and the back face of a blow formed container, a bellows shaped folding line 10 is formed in a direction crossing the body 1 of the container. On the spout 3 of the container, an expandable bellows shape tube 2 is formed integrally. The container is stored in a decorative box, and an expandable tube 2 is inserted in a through hole formed in the box. A protrusion formed on the outer periphery of the expandable tube 2 catches the open edge of the through hole for holding the tube 2 in a reduced condition. This tube 2 can be covered with a shrink film for holding this in a reduced condition.
Patent JP-S6298595-A (JP)
Inventor: OGURA TAKASHI
IPC: H05B33/14
Filed: 1985-10-24
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6299635-A (JP)
Title: Ignition device for rotary piston engine
Inventor: KURIO NORIYUKI
IPC: F02P15/08
Filed: 1985-10-26
Abstract: PURPOSE:To aim at maintenance of a discharge characteristic and improvement in the durability of a rotor housing, by constituting the ignition nozzle part opened and formed on a trochoidal inner circumferential surface of the rotor housing with a ceramic material with conductivity. CONSTITUTION:A spark plug 8 is screwed and fixed in a spark plug hole 21, and a central electrode 23 is thrust in an ignition nozzle 22. Spark discharge takes place between the central electrode 23 and a side electrode 24, an air-fuel mixture is ignited and burned in combustion. A part of the ignition nozzle 22 is constituted of a ceramic material excellent in heat resistance and electric erosion resistance. Thus, wear due to heat load at the ignition nozzle part, occurrence of a pin hole due to electric erosion action and cracking attributable to these factors are all preventable.
Patent JP-S6299750-A (JP)
Title: Method for processing silver halide color photographic sensitive material
Inventor: ISHIKAWA MASAO
IPC: G03C7/44
Filed: 1985-10-25
Abstract: PURPOSE:To remarkably improve fluctuation in process and to lower pollution at a low cost by incorporating a silver halide color photographic sensitive material into a specific homopolymer or copolymer and replenishing a color development replenisher at <=9ml for each 100cm<2> photographic sensitive material to process said material. CONSTITUTION:The constitution composed of at least one layer of the emulsion layers contg. core shell type silver halide particles contg. >=3mol% silver iodide and the homopolymer or copolymer having the repeating unit which has the -COO- bond relating to this invention in the main chain or side chain is used as the photographic sensitive material. The color development process is executed by using the color development replenisher having <=3.0X10<-3>mol/l bromide concn., by which the bromide is maintained at the non-hindering concn. and the low replenishment of <=9ml/100cm<2> is made possible. The color development replenisher is replenished at preferably >=1ml and <=9ml bromide concn. when the rate of evaporation is taken into consideration and more preferably the color development replenisher having 2.0X10<-3>mol/l bromide concn. is replenished at >=3ml and <=7.5ml/100cm<2>.
Patent JP-H0875872-A (JP)
Title: Electromechanical transducer with two rotors
Inventor: DAHO TAGETSUOUTO
IPC: H02K16/02
Filed: 1995-08-28
Abstract: PROBLEM TO BE SOLVED: To provide one machine equipped with two motors which can respectively rotate independently in two directions. SOLUTION: Two rotors 14, 15 are arranged in two stator holes 4, 6 respectively assigned by three stator poles 8a, 10a, 12a; 8b, 10b, 12b. A transducer 1 can function as step motors, and two rotors can respectively rotate in two directions independently from the other rotor.
Patent JP-2001066220-A (JP)
Title: Wavemeter
Inventor: UNNO KOJI
IPC: H04B10/03
Filed: 1999-08-26
Abstract: PROBLEM TO BE SOLVED: To monitor whether a fault occurs at a light signal during WDM transmission or not by inputting and setting a reference wave for monitoring and always comparing a signal wave during WDM(wavelength division multiplexing) transmitting with the reference wave. SOLUTION: When a WDM light signal to become a monitoring reference wave is inputted to a measuring light input unit 2, an interference waveform is formed by an interferometer 4, converted into an electric signal, then decomposed at respective frequency components by an arithmetic unit 5. A CPU 6 calculates (measures) frequencies and powers from the signals of respective frequency components, and stores the wavelengths and the powers as predetermined reference values of monitoring reference waves. Then, the CPU 6 detects peaks displaying respective light signals multiplexed at the light to be measured, compares the wavelengths and the powers at the peak of the reference wave, and decides whether the difference exceeds the set allowable range or not.  If it exceeds, the CPU 6 displays an alarm message of the effect of exceeding the range on a display unit 7, stops measuring and finishes monitoring.
Patent JP-H0772048-A (JP)
Title: Automatic sample preparing apparatus
Inventor: SAWADA SATORO
IPC: G01N1/04
Filed: 1993-09-01
Abstract: PURPOSE:To provide an automatic sample preparing apparatus, which can automatically perform reduction and can prepare a sample for analysis. CONSTITUTION:This apparatus is mainly constituted of a cylindrical body 1, wherein a sample discharging port 2 is provided at the side wall, a plurality of riffle samplers 3a, 3b..., which are arranged in the tube body 1, and a sample recovering means for the sample, which is reduced with these riffle samples. Each riffle sampler described above comprises chambers, which are equally divided in two or more even numbers, conical bodies, which are arranged so as to stride the chambers and supply the sample into the chambers, and outer slant bottom plates and inner slant bottom plates, which are alternately arranged at the bottom parts of the chambers and make the sample flow down to the outside and the central part of each riffle sampler, respectively. A flow-down space part 4 is provided around a plurality of the above described riffle samplers and arranged inside the cylindrical boy 1. A sample collecting plate 5, which collects the sample flowing down to the outside of each riffle sampler described above and guides the sample to the discharging port 2, is provided inside the cylindrical body 1.
Patent JP-H1181650-A (JP)
Title: Scaffold support tool
Inventor: FUKUE JIRO
IPC: E04G3/00
Filed: 1997-09-05
Abstract: PROBLEM TO BE SOLVED: To provide a scaffold support tool capable of supporting a scaffold and securing safety by removably fitting it to a column made of a wide-flange shape steel on the outer periphery of a building. SOLUTION: This scaffold support tool 1 is removably fitted to the flange 12a of a column 12 made of a wide-flange shape steel on the outer periphery of a building to support a scaffold. The scaffold support tool 1 is provided with a bracket 2 extended in the horizontal direction and supporting the scaffold, the first coupling member 3 (3a...) fixed to the bracket 2 and fixable to one end section in the width direction of a flange 12a, the second coupling member 4 (4a...) slidably supported on the bracket 2 and couplable with the other end section in the width direction of the flange 12a, and a fixing member 8 applying force to the first and second coupling members 3, 4 in the approaching direction and removably fixing the first and second coupling members 3, 4 to the flange 12a.
Patent JP-H0690155-A (JP)
Title: Bicmos circuit
Inventor: KONDO HARUFUSA
IPC: H03K17/56
Filed: 1992-09-09
Abstract: PURPOSE:To fully swing an output signal at the time of a low-speed operation or a leak current test. CONSTITUTION:When the output signal of an output terminal 8 is turned to a high level, a first bipolar transistor 31 is turned on and on the other hand, when the output signal of the output terminal 8 is turned to a low level, a second bipolar transistor 32 is turned on. However, a CMOS latch circuit 72 amplifies the output signal of the output terminal 8. Thus, the output signal is fully swung.
Patent JP-H0582464-A (JP)
Title: Manufacture of semiconductor device
Inventor: NODA SATOSHI
IPC: H01L21/265
Filed: 1991-09-20
Abstract: PURPOSE:To restrain transversal and longitudinal diffusion of an impurity diffusion layer, by implanting impurity ions or fluorine ions in a semiconductor substrate, and heat-treating it in an atmosphere wherein oxygen is mixed in nitrogen by changing the mixing ratio. CONSTITUTION:An SiO2, films 3, 4 which have the same patterns are formed on the Si substrates 1, 2, as implantation masks. From aperture parts B is implanted in the substrates under the same condition. Active annealing is performed in an atmosphere wherein the mixing ratio of nitrogen and oxygen is changed so as to conform to a required layer resistance value. In the case where several resistance layers (active layers) are subjected to annealing under the same condition, fluorine ions are implanted so as to conform to the change amount of the layer resistance value, and then activation annealing is performed in the mixed atmosphere of nitrogen and oxygen. Thereby heat amount which a wafer receives during a process is reduced, layers of different resistance value are formed under the same condition of implantation, and the resistance value of each layer can be controlled.
Patent JP-H0956415-A (JP)
Title: Sandals
Inventor: KAZUTAMA MASAO
IPC: A43B17/00
Filed: 1995-08-24
Abstract: PROBLEM TO BE SOLVED: To achieve higher working efficiency and less production costs by providing a mounting part with a specified height integrally at an intermediate part between both side rims of an insole to mount an upper leather on the mounting part in sandals containing soles, insoles and the upper leathers. SOLUTION: Sandals 10 is each made up of a sole 12, an insole 14 and an upper leather 16. A mounting part 18 with a specified height is arranged at an intermediate part between both side rims of the insole 14. The insole 14 is made of a synthetic resin such as vinyl chloride by injection molding and the mounting part 18 is formed integrally thereon. The upper leather 16 is bonded inside both the mounting parts 18 with an adhesive while being sewn by a sewing machine. Thus, the insoles 14 having the upper leathers 16 mounted thereon are bonded on the top surface sides of the soles 12 to form sandals 10.
Patent JP-H0799485-A (JP)
Title: Method and transmitter-receiver for sending fault point identifying
Inventor: TAKEMURA SHINYA
IPC: H04J3/14
Filed: 1993-09-28
Abstract: PURPOSE:To prevent the fluctuation in a delay time of a fault point identifying signal with respect to the method and the transmitter-receiver for sending the fault point identifying signal. CONSTITUTION:The fault point identifying signal transmitter-receiver sending/ receiving a fault point identifying signal via an SDH system having a multiple repeater is characterized to be provided with a signal insertion device 8 connecting to a signal transmitter 4 sending the fault point identifying signal and inserting the fault point identifying signal to a data communication channel in an SDH frame sent from a sender side multiple repeater 2 via a transmission line 6 and with a signal extract device 12 extracting the fault point identifying signal from the data communication channel in the SDH frame sent from the sender side multiple repeater 2 via the transmission line 6 and sending the fault point identifying signal to a signal receiver 14.
Patent JP-S62100956-A (JP)
Inventor: ONO MASAHARU
IPC: H01B17/26
Filed: 1985-10-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000078765-A (JP)
Title: Capacitor charge storage device
Inventor: OKAMURA MICHIO
IPC: H02J7/00
Filed: 1998-08-27
Abstract: PROBLEM TO BE SOLVED: To reduce the loss of a parallel monitor itself to nearly zero and, at the same time, to allow all capacitors connected in series to be charged to their full capacities. SOLUTION: In a capacitor charge storing device constituted by connecting a plurality of capacitors C1 and C2 in series, voltage detecting means CMP1 and CMP2 which monitor the charging voltages of the capacitors C1 and C2, voltage limiting means C1 and C2 which limit the charging voltages of the capacitors C1 and C2 to prescribed values, and charging control means 1 and 2 which charge the capacitors C1 and C2 for initialization and for storing electricity are provided. The control means 1 and 2 charge the capacitors C1 and C2 by for initialization until the voltage of the capacitors C1 and C2 reach the prescribed values, and then, further charge the capacitors C1 and C2 for storing electricity until the voltage of either one of the capacitors C1 and C2 detected by means of the voltage detecting means CMP1 or CMP2 reaches a reference value Vrf1 or Vrf2.
Patent JP-H08107423-A (JP)
Title: System and device for detecting positions of nodes on lan
Inventor: FUJIMURA KIYOTAKA
IPC: H04L12/40
Filed: 1994-10-05
Abstract: PURPOSE: To facilitate search at the time of fault generation by detecting distances to respective node parts by analyzing time information while receiving transmitted signals outputted from the respective node parts to first and second event detectors. CONSTITUTION: First and second event detectors 4-1 and 4-2 receive packets transmitted from respective node parts 3-1 to 3-n connected to a transmission line 2. Then, the devices 4-1 and 4-2 are provided with time measuring means for exactly measuring time in order to analyze the prescribed event. The devices 4-1 and 4-2 detect the time when any one of node parts 3-1 to 3-n transmits the packet and the time until the reception of time information. It is detected how much time deviation is previously provided between the devices 4-1 and 4-2, the information of that deviation is stored in the node part position detection system and in following processing, arithmetic processing is performed while considering the information of time deviation. Thus, even when any fault is generated on a LAN, the position of the node part where the fault is generated can be easily searched.
Patent JP-H1183466-A (JP)
Title: Fluorescent x-ray membrane thickness measuring device
Inventor: SATO MASAO
IPC: G21K1/00
Filed: 1997-09-05
Abstract: PROBLEM TO BE SOLVED: To make this method applicable to an object, which is so large as to come out of a structure body by mounting an extension plate easily attachable a standard stage plate. SOLUTION: Both sides of a standard plate 1 are made to be dovetails and guides are formed in expansion plates 2 to make the expansion plates 2 attachable by insertion. The relation of the guides and the dovetails may be vice versa. In the case where a large scale printed substrate which comes out of a structure body is mounted, an expansion plate 2 is inserted in the standard plate 1 from the slit part of a structure body and the large scale printed substrate is mounted to carry out measurement. Consequently, even a large scale printed substrate can stably be mounted by easy operation to be measured and also a normal object to be measured can be measured by the same structure body to make it no need to prepare two measuring apparatuses.
Patent JP-H0794117-A (JP)
Title: Cathode ray tube
Inventor: YODOGAWA KATSUYUKI
IPC: H01J29/48
Filed: 1993-09-28
Abstract: PURPOSE:To prevent any change of a resistance value for a built-in resistor when a metal ring having discharge restricting effect is provided for an electron gun mounted with the built-in resistor in a cathode ray tube. CONSTITUTION:A built-in resistor 23 to apply given voltage to a preset electrode G3 is arranged near an electron gun 22, and a metal ring 35 for suppressing electric discharge is provided so as to encircle the built-in resistor 23. The electrode portion t4 at the same potential as the metal ring 23 is provided in a part opposed to the metal ring 35 of a resistance 23 in the built-in resistor 23.
Patent JP-H04121709-A (JP)
Title: Production of space optical modulator
Inventor: KATO NAOKI
IPC: G02F1/133
Filed: 1990-09-12
Abstract: PURPOSE:To form a uniform spacing to hold a liquid crystal by using two sheets of glass substrates, both surfaces of which are polished to <=1/4 wavelength of a parallel flatness degree, incorporating and stirring spacers consisting of silica balls or resin balls, etc., into an adhesive, printing and applying the spacers on the substrates, assembling a pair of such substrates, and pressurizing the substrates until a prescribed spacing is attained to cure the adhesive. CONSTITUTION:The glass substrate 11a, both surfaces of which are polished to <=1/4 wavelength of the parallel flatness degree, and which has the thickness of >=10% of the effective aperture diameter and the glass substrate 11b which has <=1mm thickness are used. A UV curing resin of >=1000 centi poise viscosity at ordinary temp. formed by incorporating and stirring the silica balls or resin balls or glass fibers 31 having the average diameter equal to the aiming value of the spacing between both substrates or approximate thereto into the adhesive at 0.1 to 10wt.% of the weight of the adhesive is printed and applied on the substrate. A pair of such substrates are assembled and are pressurized until the prescribed spacing is attained. The resin is simultaneously irradiated with UV rays to cure the resin. The spacer optical modulator which is uniform in the thickness of the ferroelectric liquid crystal layer and has good liquid level accuracy is obtd. in this way.
Patent JP-H02146190-A (JP)
Title: Nonvolatile semiconductor memory
Inventor: HASUNUMA SUSUMU
IPC: H01L29/788
Filed: 1988-09-27
Abstract: PURPOSE:To always set an optimal program width, and to prevent the life of a tunnel insulating film from decreasing by providing an EEPROM element and a write/erase circuit in an internal oscillating circuit, and altering oscillated frequencies according to the information of this element. CONSTITUTION:In the time constant control signal generating circuit of the internal oscillating circuit, sources S of the EEPROM cells at four bits are commonly connected to a VS circuit, gates G are commonly connected to a word driving circuit, and respective digit lines D1 to D4 are inputted to sense amplifiers 1 to 4, and their outputs are made into transfer control signals S1 to S2. At a normal operation, an active signal PGM of the sense amplifier is an H, and it always outputs data. To rewrite the data, the drain of a memory cell is set at a ground potential, an erasing voltage is impressed from a driving circuit to the gate of the cell, the data are erased, next the write voltages according to data d1 to d4 are impressed from write circuits 1 to 4, where the data d1 to d4 from a bus are inputted, to the drain of the cell, and the data are written. The circuit is connected to an integrating circuit shown in a figure, and a program pulse width is made variable.
Patent JP-S60136131-A (JP)
Title: Cathode-ray tube
Inventor: TOYAMA NOBORU
IPC: H01J29/07
Filed: 1983-12-23
Abstract: PURPOSE:To prevent the contact failure of a contact spring that applies voltage to a shadow mask due to resonance by preventing said contact spring and an inner shield from making direct contact. CONSTITUTION:A contact spring 6 that touches a graphite film 8 on the inner wall surface of the funnel 2 of a cathode-ray tube is welded and fixed to the frame 5 of a shadow mask 3 and high voltage is applied to the mask 3, then an inner shiled 7 arranged along the inner wall surface of the funnel 2 is semi-fixed to the frame 5 using a hooking spring. In this case, a recess 7a is formed on the frame 5 side, that makes contact to the spring 6, of the shield 7 and a recess 7b is formed at a section corresponding to the folding section of the spring 6. As a result, since the spring 6 and the shield 7 do not make direct contact, the contact failure of the spring 6 to the graphite film 8 caused by the oscillation of the shield 7 can be prevented.
Patent JP-H0697651-A (JP)
Title: Production of wiring board
Inventor: KIDA AKINARI
IPC: H05K3/00
Filed: 1992-09-10
Abstract: PURPOSE:To improve the formability of fine wiring and its dimensional accuracy by making a through-hole in an insulation substrate, forming resin sheets and copper foils successively on both sides thereof after the preliminary through-hole is filled with a resin, and making a through-hole of smaller diameter than that of the preliminary through-hole in the preliminary through-hole part of the copper laminated board which is formed through heating and pressing. CONSTITUTION:A preliminary through-hole 2 of 1.2mm in diameter is made in a glass fabric/epoxy resin laminated board 1 by a mechanical drill, and after the hole is filled with a hole-filling resin sheet 3, the board 1 is provided with an adhesive resin 4 and copper foil 5 on both sides thereof and they are heated/pressed to form a copper laminated board. Then, after a through-hole 6 of 1.0mm in diameter is made in the preliminary through-hole part of the copper laminated board, a plating catalyst is adhered on the surface of the copper laminated board and the inner wall of the hole 6 to form a plating copper 7. Since the part for making a through-hole is provided with no glass fabric, a through-hole having a smooth inner wall can be formed. Therefore the wiring can be easily refined because of small thickness of panel copper plating.
Patent JP-H03105944-A (JP)
Title: Dielectric isolation substrate
Inventor: SHIRASAWA TOSHIKATSU
IPC: H01L21/762
Filed: 1989-09-20
Abstract: PURPOSE:To offer a substrate, for power IC use, whose cost is low and whose reliability is high by providing the following: a single-crystal Si group which has been insulated and isolated by an isolation groove and an insulator; and a vertical-type single- crystal region which has been bored from the surface to the rear of a substrate and which is not insulated and isolated from the substrate. CONSTITUTION:A single-crystal wafer is oxidized to form an oxide film 10. The oxide film 10 is removed partially by a photoetching operation; a V-shaped isolation groove 106 is formed by executing an alkali etching operation by making use of the remaining oxide film 10 as a mask. Then, an oxidation operation is executed again to form an oxide film 107. Then, an oxide film 11, a polycrystalline Si layer and the oxide film 107 for insulation and isolation use which are situated in a part to be used as a vertical-type single-crystal region are removed to expose a single-crystal Si face. Then, an epitaxial layer 103 is formed again. Since the single-crystal Si face is exposed in the part to be used as the vertical-type single-crystal region at this time, a single- crystal Si layer is grown, and a polycrystalline Si layer is grown in a part where the oxide film 11 is situated. In addition, this assembly is flattened by a grinding and polishing porcess. Then, a low-resistance single-crystal Si wafer 104 is pasted and completed.