Patent GB-849892-A (GB)
Title: Improvements in or relating to coding arrangements for electric pulse code modulation
Inventor: CATTERMOLE KENNETH WILLIAM
IPC: H03M1/00
Filed: 1958-06-25
Abstract: 849,892. Circuits employing bi-stable magnetic elements. STANDARD TELEPHONES & CABLES Ltd. June 25, 1958, No. 20314/58. Class 40 (9). [Also in Group XL (c)] An arrangement for generating a binary code of n digits to represent a signal wave, each code combination representing a discrete amplitude level, comprises a plurality of trigger devices, one device being provided for each amplitude level, and arranged to generate the code combinations so that for every pair of adjacent amplitude levels, the first (n - 1) digits of the combination representing one level are the same as the last (n - 1) digits of the combination representing the other level. The 5-digit code of Fig. 1 is produced by a coder comprising ferrite cores 1-32, Fig. 5, the number of each core representing an amplitude level. The cores are negatively biased by main bias windings 45, the number of turns in which depends on the number of the core, e.g. core 1 has b turns and core 19 has 19b turns. Each core also has a small positive bias provided by auxiliary windings 48, the total fixed bias thus being as shown in Fig. 6, points 73, 74, 75, &c., representing the conditions of cores 1, 2, 3, &c. The signal wave from source 39 is rectified by rectifiers 65, 66 so that only positive voltages are supplied to signal windings 51. Assuming the applied signal voltage to be zero, the application to windings 53 of a triggering pulse 76, Fig. 7, from generator 40 shifts the bias of the first five cores to the right of the hysteresis curves of Fig. 6, and thus each of these five cores is triggered in succession, digit windings 55 supplying the output pulses to shift register 68. The senses of windings 55 are such that the output pulse from each core is of the required polarity designating mark or space, thus the digit windings of cores 1-4 register space and that of core 5 registers mark in accordance with Fig. 1. Shift register 68 ignores the reverse pulses which occur when the arrangement is reset by the half sine-wave portion of pulse 76. As the signal voltage increases, successive groups of five cores are triggered, the first one of each group corresponding to the amplitude level of the applied signal. Cores 33-36 provide the last 1-4 digits respectively for levels 29-32. A further core 37 provides a sixth digit to represent the polarity of the applied signal. Core 37 is negatively biased by winding 57 and also by winding 58 when rectifier 67 conducts. An output pulse from winding 62 is only obtained when the signal applied to rectifier 67 is negative when triggering pulse 78, Fig. 7, is applied to winding 60. When pulse 78 decays a negative pulse occurs but this is blocked by rectifier 70. The sign-core triggering pulse 78 precedes five read-out pulses 79 which are fed to shift register 68 from generator 40 the resultant 6 digit code for negative level 27 being shown in Fig. 7D. Shift register 68 may be omitted if the stepped triggering pulse 83 is used instead of pulse 76, and the cores producing negative pulses signifying spaces may be omitted since each core is triggered at the correct time independent of the signal wave voltage. Specifications 806,397, 834,624 and 849,891. are referred to.