Patent GB-762930-A (GB)
Title: Electrical pulse switching circuits
IPC: H03K19/16
Filed: 1954-11-18
Abstract: 762,930. Electric selective signalling systems. WESTERN ELECTRIC CO., Inc. Nov. 18,1954 [Nov. 20, 1953; April, 27, 1954], No. 33431/54. Class 40 (1). [Also in Groups XIX and XXXIX] In a pulse switching arrangement comprising a group of bi-stable magnetic cores, the magnetic condition of certain cores is changed by a selective input pulse and the cores are then restored to their initial condition by an activating or reset pulse which also serves as the output to a load, the particular load to which the activating pulse is applied being determined by voltages induced in output windings of the reset cores. The induced voltages may oppose the activating pulse, in which case it is necessary that the voltages appear in all the load circuits except that selected. Alternatively a single induced voltage may be employed which acts cumulatively with the activating pulse in the selected load circuit. An arrangement for writing a " 1 " or " 0 " into a magnetic drum 11 in accordance with information received from one or other of respective pulse sources 33, 34 is shown in Fig. 1, the operation depending on the sequential application of a single information pulse, and an activating or control pulse, from a source 10. Each information pulse, according to its identity, is applied to an input winding 20 or 21 and sets up a particular magnetic condition in the associated ferrite core 18 or 19. The information stored magnetically in one or other of the cores is then read into the drum by application of the pulse from source 10 over activating windings 22, 23 in series and output windings 24, 25 in parallel to windings 13, 14 differentially arranged on a writing head 12. This pulse resets the core previously acted on by the information pulse, and a voltage is induced in the associated output winding which opposes the activating pulse and prevents energization of one winding 13 or 14 of the writing head. As the other core is dormant, the associated writing head winding is energized by the activating pulse and the appropriate information is recorded on the drum. If no information is received between successive activating pulses, recording cannot take place as both of the differential writing head windings are energized. Since a core induces a voltage in its output winding when set by an information pulse, rectifiers 30, 31 are provided to suppress circulating currents. A number of writing circuits may be employed, in which case the pulse in lead 42 is applied to the activating windings of the next circuit. Fig. 2 shows an arrangement employing four cores 47-50 which in accordance with the receipt between successive activating pulses of two out of four possible information pulses representing the Boolean variables x, x<SP>1</SP> and y, y<SP>1</SP>, directs the activating pulse to one of four loads 42-45. Two input windings 52 and 53 wound collectively are provided on each core and are associated with the x or x<SP>1</SP> and y or y<SP>1</SP> variables respectively. When two information pulses are received, three out of the four cores are set in a particular magnetic condition. The activating pulse resets these cores and since they induce opposing voltages in their output windings 58, only the dormant core permits the activating pulse to pass. In a modification, Fig. 3, the need to terminate the activating pulse within the saturating time of the cores to prevent unwanted pulses appearing in the loads is avoided by the provision of a further core 60. This core is energized over 63 from a clock pulse source 64 each time information pulses are received, and is reset by the activating pulses. After resetting is complete, the core provides a short-circuit path through rectifier 61 for the activating pulse which is thus prevented from passing through any of the loads after the effective transient period is terminated. A further modification, Fig. 4, has one input winding 82-85 for each core. The cores are arranged in pairs 70, 71 and 72, 73 in cascade. and are associated with input variables x, x<SP>1</SP> and y, y<SP>1</SP> respectively. Two output windings 77, 78 and 79, 80 are provided on the cores 72, 73. The activating pulse from source 55 is applied to all the cores over 57 to effect the necessary resetting, its path to one only of the loads 42-45 being determined by the opposing voltages induced in the output winding of either core 70 or 71 and in the two output windings of either core 72 or 73, according to the particular combination of input variables received. The Figs. 2 and 4 arrangements may be combined as shown in Fig. 5 to provide an output to one of eight loads in accordance with the combination of three input variables in the group x, x<SP>1</SP>, y, y<SP>1</SP>, z, z<SP>1</SP>. In the remaining embodiments, the voltage induced in the output winding of a reset core is arranged to assist the activating pulse and thus establish an output in the load associated with that core. Only one core therefore is set to a particular magnetic condition between successive activating pulses. This principle is employed in Fig. 6 (not shown) which is a modification of Fig. 2. In this case, as one core only must be set when two input pulses in the group x, xl, y, y<SP>1</SP> are received, the input windings on each core are arranged to act differentially. A rectifier shunting all the loads is also provided to ensure that the activating pulse is by-passed in the event of its continuance after resetting of the selected core is completed. Preferably also the activating windings have more turns than the output windings to prevent the activating pulse to a load from setting the core. An application to sequence switching is shown in Fig. 7. This arrangement provides sequential outputs at terminals 140<SP>1</SP>-140<SP>4</SP> and may be employed as a ring counter or pulse frequency divider, or establish sequential access to a memory. Activating pulses are provided by sources 148 and 150 which are associated with cores 142, 144 and 143, 145 respectively. Primary input windings are provided at 151 and secondary input windings which also function as secondary output windings at 152-155. Initially, a pulse in windings 151 sets core 142 and resets the other cores. An activating pulse from source 148 is then applied to windings 147 and to main output windings 157, 159. This resets core 142 and causes a forward voltage to be induced in winding 157 which directs the activating pulse to terminal 140<SP>1</SP>. As secondary input winding 153 is in series with the load, the associated core 143 is set in readiness for an activating pulse from source 150. This pulse is applied to windings 149 and to main output windings 158, 160, and resets core 143. The forward induced voltage in winding 158 directs the activating pulse to terminal 140<SP>2</SP> and causes core 144 to be set by energization of secondary input winding 154. Sequential operation is continued in like manner by alternate activating pulses from sources 148 and 150. The loads are shunted by rectifiers 163, 166 to by-pass activating pulses of undue length. It is suggested that by using three sources of activating pulses, the number of outputs may be made a multiple of three. A further switching application is shown in Fig. 8, in which each output path includes an output winding of more than one core 174-176. Two cores are set by an input to windings 178 and an output on resetting is obtained in that load 182 which is connected to output windings 179, 180 on both the selected cores.