Patent GB-1172277-A (GB)
Title: Zero Reproduction in Computers
IPC: G06F3/14
Filed: 1967-03-22
Abstract: 1,172,277. Calculators. TELEFUNKEN PATENTVERWERTUNGS G.m.b.H. 22 March, 1967 [2 April, 1966], No. 13495/67. Heading G4A. A calculator uses a representation for zeros fed in different from that used for capacityfilling zeros of lower order than the values fed in. A delay loop 20, T1, 23 including piezoelectric transducers holds four registers each holding a number having 16 excess-3-coded decimal digits, the four registers being interleaved at bit level. Pulses T from a counter Z1 enable each decimal digit from one register to be gated T2 into a five-stage shift register F1-F5 followed by the digit of corresponding order from another register in the loop. Corresponding bits from the digits can pass to an adder "Add " from stages F1 and F5 the sum bits being reinserted into F4 (shift from F5 to F4 being suspended at this time). The usual correction necessary with excess-3 code is performed after each decimal order, using input KORR to the adder, the final sum for the order being passed back into the delay loop from stage F2, via gate T3. Subtraction is done by complementing the signal from F5 before it reaches the adder. Multiplication is said to be done by repeated addition and division by repeated subtraction. Keys R select the calculating operation. During calculations, zero represented as 0000 in stages F2-F5 is converted before use to 0011, also representing zero (see below) by means 66, 67, 33. Zeros of the other operand (i.e. that supplied to the adder directly from stage F5) are already in 0011 form. Alternatively the adder could deal with both forms. Clearing of a given register in the loop 20, T1, 23 can be done by pressing a corresponding key C with the result that at the loop times relating to the register, gates T1, T2 are blocked and T3 is open so that the bit-group 0011 representing zero and created in shift register stages F2-F5 using ones-generator 33 is passed from stage F2 into the loop for each decimal order, counter Z3 which counts the 16 decimal orders terminating the process. Transfer of the contents of any one of three registers in the loop into the fourth register in the loop (called the result register herein), with or without clearing of the issuing register, can be done under control of keys U. Keyboard entry of data.-A decimal-point marker 35 (slide or rotary knob) is used to specify the decimal point position, setting counter Z4. During the loop times corresponding to the result register, gates T2, T1 are blocked and T3 is open with the result that a zero, in the form 0000, is entered into each decimal order of the result register from stage F2, starting at the low order end. This continues until the decimal point position is reached, as indicated by agreement at comparator 38 between counters Z4, Z3, when gates T4 are opened to pass the first decimal digit from keyboard ZT, coded in matrix 34, into stages F2-F5 for insertion in the first place to the left of the decimal point position. On each subsequent rotation of the loop, the contents of the result register are gated T2 to stages F2-F5 for reinsertion in the loop one decimal place to high order, the first place to the left of the decimal point position receiving the next digit from the keyboard ZT in each case. Any digit zero from keyboard ZT is coded as 0011. When a decimal point key KT is pressed, each subsequent digit entered is accompanied by decrementing of counter Z4, and successive digits from the keyboard ZT are entered at successive positions to the right of the decimal point position. Display of the contents of the result register in the loop occurs at all times on glow tubes 36 having shaped electrodes, the contents of stages F2-F5 being stored at 42, decoded to 1 out of 10 (or 11) form at 43 and used to control that one of the tubes 36 currently selected by counter Z3. The bit group 0011 is displayed at 0 and the bit group 0000 is either displayed as * or not at all. The position of decimal-point marker 35 is displayed on lamps 37. A cathoderay tube display may replace the glow tubes 36, in which case other registers may be displayed as well. Printing.-Sixteen segments 50, each holding type elements 51 are rocked past print hammers 56, the type element reached being indicated in coded form by sensing at 59 of indicia 60, type element 0 being indicated by 0011. At each position the four bits sensed are gated 62 under control of a counter Z2 for serial comparison at 46 with each digit in the loop result register supplied from stage F5 in turn. The result of each decimal digit comparison is shifted into a register 64 to control ratchets 54 to stop those segments 50 for which the type element now in position is that required. When the segments 50 have reached their endpoints, the hammers 56 are actuated. In the case of a bit-group 0000 in the result register, either an asterisk or nothing is printed, this being the last position on segments 50.