baber/WOPTO huggingface dataset:
Patent JP-S6281750-A (JP)
Title: Semiconductor integrated circuit device
Inventor: KATSUTO HISAO
IPC: H01L21/8242
Filed: 1985-10-07
Abstract: PURPOSE:To implement high integration density in a DRAM and a high operating speed and to improve electric reliability, by constituting each information storing capacitor element in a memory cell by a reverse conductivity type semiconductor region, a first insulating film, a first conductor layer, a part of which is connected to a switch element, and a second conductor layer. CONSTITUTION:Each information storing capacitor element C of a memory cell is composed of the first and second capacitor elements. The first capacitor element comprises an insulator 11 as a dielectric film and electrodes 10 and 12. The second capacitor element comprises an insulating film 13 as a dielectric film and electrodes 12 and 14. The first and second capacitor elements use the electrode 12 as a common electrode. The same potential is applied to the electrodes 10 and 14. Thus parallel connection is obtained. The insulating film 11 is mainly provided on the main surface of the semiconductor element region 10 of the information storing capacitor-element forming region C. A part of the conductor layer (conductor plate) 12 is electrically connected to a semiconductor region 15, which is to become the source region or the drain region of a switching MISFET through a connecting hole 11A. Said part of the layer 12 is provided on the upper part of the insulating film 11.
Patent JP-H0964166-A (JP)
Title: Fabrication method of semiconductor device
Inventor: KAMIJO HIROYUKI
IPC: H01L21/304
Filed: 1995-08-30
Abstract: PROBLEM TO BE SOLVED: To prevent the height of a buried member after flattened from being varied depending upon a pattern in a flattening method using a CMP process. SOLUTION: A first protective film 3 and a second protective film 4 are formed on a substrate 1, and the first protective film 2, the second protective film 3, and the substrate 1 are drilled to form a desired depth trench. A buried material coating film 7 is formed, burying the inside of the trench and covering the second protective film 4, and a surface layer of the buried material coating film 7 is removed with a chemical mechanical polishing method to expose the second protective film 2. The exposed second protective film 4 is removed, and the buried material coating film 7 is polished with a chemical mechanical polishing method to remove the first protective film 3.  Hereby, the buried material coating film 7 is buried in the trench, and the first protective film 3 and the second protective film 4 are formed with a material having a smaller polishing rate than the buried material coating film 7 with respect to the chemical mechanical polishing.
Patent JP-2000054655-A (JP)
Title: Dwelling house
Inventor: NAKATANI JUN
IPC: E04H1/02
Filed: 1998-08-05
Abstract: PROBLEM TO BE SOLVED: To provide a dwelling house excellent in habitability by changing the height of a ceiling in the same room. SOLUTION: The ceiling of a room 55 (for example, a bed room) is formed with a first ceiling portion 56 and a second ceiling 57 higher than the first ceiling portion 56. Thus, two habitable areas 60, 61 having different heights of ceiling are formed in the room 55, so that a life corresponding to the respective properties of habitable areas 60, 61 in the same room 55 is enjoyable.
Patent JP-S59112349-A (JP)
Title: Duplicated operation system
Inventor: YAMADA TOYOTOSHI
IPC: G06F11/16
Filed: 1982-12-20
Abstract: PURPOSE:To diagnose more precisely a defective system and to switch the defective system to a normal one by feeding back not only an answer back signal from the opposite system, but an interruption signal to be sent to the opposite system to the self-system. CONSTITUTION:A CPU part 2 loads a master/slave discriminating status from a duplicated system supervising part 3. Consequently, the master and slave systems of an arithmetic unit are determined and the arithmetic unit is controlled by the processing routine of control program for each system. In order to synchronize both systems before operational processing, the master system sends an interruption signal to the slave system. At that time, the master system checks the existence of a feedback signal returned from OR gates G1, G2 through feedback lines L3, L4. If the feedback signal is absent, system switching is performed by regarding the master system as a defective one. Receiving the interruption signal from the master system, the slave system returns the same signal to the master system as an answer back signal. The master system checks the existence of the answer back signal. If there is no answer back signal, the master system is operated individually by regarding the slave system as a defective one.
Patent JP-H04104156-A (JP)
Title: Jig for glass mask
Inventor: IRIKURA HIDEAKI
IPC: G03F1/50
Filed: 1990-08-23
Abstract: PURPOSE:To safely and easily move a glass mask by using a vacuum chuck type glass mask jig in the case of moving the glass mask. CONSTITUTION:A vacuum tube is shown by 1, a valve is shown by 2, a knob part is shown by 3 and a glass mask holding part is shown by 4. A hinge for connecting the knob part 3 with the holding part 4 is shown by 6, and the knob part 3 can be moved back and forth with reference to the holding part 4 by use fo the hinge. By having such a constitution, it becomes unnecessary to always keep the knob part 3 standing in parallel to the glass mask when the holding part is inserted in the glass mask, so that an operator can easily operate it at the time of operating. A vacuum hole for holding the glass mask is shown by 7, and the hole for sucking the glass when the glass mask is actually held by the vacuum is shown by 8. Thus, the glass mask can be safely and easily moved by having such a constitution.
Patent JP-S6282210-A (JP)
Title: Tappet valve device for multi-valve engine
Inventor: SHIBATA YASUHIKO
IPC: F02F1/42
Filed: 1985-10-07
Abstract: PURPOSE:To enlarge a diameter of a valve head without hindering a smooth operation of a valve, by accommodating a valve spring or the like in a recess of a rocker support in a dual intake valve type engine. CONSTITUTION:Two intake valves 16A are provided for each cylinder, and each intake valve 16A is opened and closed by a rocker arm 30 to be driven by a cam 27 of a cam shaft 25. The rocker arm 30 is rocked about a rocker shaft 28, and the shaft 28 s supported by a rocker support 32 ifixed to a cylinder head. The rocker support 32 is formed at its cylinder center side with a recess 34, so as to accommodate therein a return spring 20 and a retainer 19 for the intake valve 16A. The formation of the recess enables valve arrangement to be simplified and also enables a size of the valve spring to be freely set.
Patent JP-S6281204-A (JP)
Title: Special rolling installation for metallic sheet
Inventor: HIRUTA TOSHIKI
IPC: B21B1/28
Filed: 1985-10-07
Abstract: PURPOSE:To obtain a metallic sheet which is free from camber and uneven elongation and has good flatness by disposing a skin pass rolling mill which can be adjusted in the peripheral speed ratio between upper and lower rolls to both or either between the rolling mill and inlet side coiler and between the rolling mill and outlet side coiler. CONSTITUTION:Shape detectors 31, 32 respectively detect the shape of a strip 20 advancing to skin pass rolling mills 21, 22 and transmit the state of the camber thereof to corresponding controllers 41, 42. The controllers 41, 42 adjust the peripheral speed ratio of the upper and lower works rolls of the mills 21, 22 according to the result of the detection with the shape detectors 31, 32 to flatten the shape of the strip 20. More specifically, the controllers set the peripheral speed of the lower work rolls 21B, 22B lower than the peripheral speed of the upper work rolls 21A, 22A to flatten the upward camber of the strip 20 if the transverse end of the strip 20 advancing to the rolls 21, 22 cambers upward. The above-mentioned peripheral speed is set higher if the transverse end of the strip 20 cambers downward.
Patent JP-H04102801-A (JP)
Title: Manufacture of diffraction grating sheet
Inventor: HOSHINO KAZUHISA
IPC: G03H1/20
Filed: 1990-08-22
Abstract: PURPOSE:To obtain the diffraction sheet which is larger than stampers by pressing resin which is extruded from a fusion extrusion molding machine between plural nip rolls and a cooling roll and synchronizing the stampers for the diffraction grating which are mounted on the respective nip rolls. CONSTITUTION:A stamper 2 is fitted to a nearly half part of the periphery of a nip roll 41 and a stamper 2 is also fitted to a nip roll 42. At this time, the other part 42b is recessed from the mount part 42a for the stamper 2. Then, the nip roll 42 is arranged so as to emboss resin A at the part where a diffraction grating is not embossed by the nip roll 41 with a diffraction grating. The resin A while passing the periphery of the cooling roll is pressed by the nip rolls 41 and 42 to form the diffraction grating. Consequently, the diffraction grating which is larger than the stampers is obtained.
Patent JP-H0968769-A (JP)
Title: Silver halide photographic sensitive material, its developing method, drying method and storing method
Inventor: HANIYU TAKESHI
IPC: G03C11/16
Filed: 1995-08-30
Abstract: PROBLEM TO BE SOLVED: To obtain excellent quality of voide characters and to decrease color contamination by doping silver halide particles with specified metal atoms of the platinum group and in the 4th period in the periodic table or also with a specified rare earth compd. SOLUTION: This photosensitive material contains one element selected from the platinum group and one element selected from metal atoms in the 4th period in the periodic table, or one element selected from the platinum group and one element selected from rare earth elements. The platinum group includes 6 elements of rhodium, ruthenium, palladium, osmium, iridium and platinum, and the silver halide particles contain one of these 6 elements. Rhodium, ruthenium and osmium are preferable among these 6 elements. The metal atoms in the 4th period of the periodical table are potassium (atomic number 1) to selenium (atomic number 34), and iron, cobalt, nickel and vanadium are preferable. Further, the rare earth elements are scandium (atomic number 21), yttrium and 17 lanthanoids (atomic number 57 to 71).
Patent JP-H0758111-A (JP)
Title: Multilayer interconnection structure for semiconductor device and its manufacture
Inventor: KANEMURA RYUICHI
IPC: H01L21/768
Filed: 1993-08-12
Abstract: PURPOSE:To improve the embedding characteristics to a connecting hole of an upper wiring forming film to be coated by high temperature spattering method by improving the wettability of a barrier metal layer and by enlarging connecting holes. CONSTITUTION:Lower layer wirings 13 and 14 are formed on an insulation layer 12 provided on the upper layer of a substrate 11, a first silicon nitride film 15 is formed to a state of covering the above, and flattening embedding portions 19, 20 and 21 are formed on low portions 16, 17 and 18 on the first silicon nitride film 15 at both the sides of the lower layer wiring 13 and 14. Moreover, a second silicon nitride film 22 is formed on the first silicon nitride film 15 and on the first silicon nitride film 15 and the flattening embedding portions 19, 20 and 21; connecting holes 23 and 24 are formed on the first and second silicon nitride films 15 and 22 over the lower layer wirings 13 and 14; a barrier metal layer 25 is formed on the second silicon nitride film 22 together with the inner wall of said holes; and an upper wiring formation layer 26 is formed in the state of embedding the connecting holes 23 and 24 on said layer 25.
Patent JP-2001045910-A (JP)
Title: Automatic feeding machine
Inventor: CHIBA SADANORI
IPC: A01K61/02
Filed: 1999-08-05
Abstract: PROBLEM TO BE SOLVED: To provide an automatic feeding machine so designed as to perform automatic feeding operations at a specified day and time and enable intermittent feeding of a specified amount of feed bit by bit in several portions and need no stopping of a timer manually. SOLUTION: This automatic feeding machine has a feed storage tank 3, a mechanism 10 for supplying specified amounts of a feed in the tank 3, and a feeding mechanism control unit 5 judging whether it is the day or time to feed, whether an intermittent feeding or not, and whether a continuous feeding or not.
Patent JP-H05208139-A (JP)
Title: Catalyst for double decomposition reaction of olefin,method of its adjustment and double decompusition realtion using the same
Inventor: JIYUTSUKA HIITARA
IPC: B01J23/30
Filed: 1992-07-30
Abstract: PURPOSE: To provide a totally novel catalyst for metathesis reactions comprising an org. tungsten compd. and preparation thereof. CONSTITUTION: A catalyst is characterized by comprising an after-treated tungsten complex contg. diol ligands and hydrocarbon ligands. The hydrocarbon ligands are benzenes substd. with a lower alkyl group.
Patent JP-H0271626-A (JP)
Title: Optical space transmission equipment
Inventor: TAKEUCHI TOSHIFUMI
IPC: H04B10/11
Filed: 1988-09-07
Abstract: PURPOSE:To select transmission path data with superior transmission quality out of plural transmission paths and to prevent data from missing due to photointerruption by providing a means to attach distance in a time area or a spatial area and to transmit data with the same content, and transmitting the data after attaching an error correction code. CONSTITUTION:A correction code is attached on audio data added on an input terminal 1 at a correction code generation circuit 2 by the control of a timing circuit 8. Also, assuming the unit of the amount of data to be compressed at time compression circuits 3 and 4 as a frame, the output of the circuit 2 is set as a prescribed frame, and the delay time of a delay circuit is performed in frame unit. And output from the circuits 4 and 5 are added on a switching circuit 6 accompanying by the output of a synchronous pattern generation circuit 9, and switching control is applied on it, and it is outputted, and is modulated by a modulation circuit 7, and is converted to light by a light emitting element 10, then, is radiated to a space.
Patent JP-H09118021-A (JP)
Title: Ink jet pen
Inventor: PAWLOWSKI NORMAN E JR
IPC: B41J2/175
Filed: 1996-08-23
Abstract: PROBLEM TO BE SOLVED: To provide an ink jet pen device equipped with a back pressure mechanism hard to receive the effect of the fluctuations of the flow rate of ink and capable of holding back pressure to a predetermined almost constant back pressure object value. SOLUTION: This ink jet pen is equipped with a pen main body 1 having an ink confining chamber 3b, the ink jet printing head mechanism 7 connected to the pen main body and transmitting the liquid of the ink confining chamber and the connection mechanism connecting the ink confining chamber to an ink tank. Further, an adjusting mechanism 12 arranged in the ink confining chamber to be connected to the connection mechanism and adjusting the flow of ink from the ink tank to the ink confining chamber through the connection mechanism and keeping a predetermined almost constant back pressure object value in an ink jet printing head during the change of the flow rate of the ink from the ink tank to the ink confining chamber is provided.
Patent JP-H1167822-A (JP)
Title: Mounting of semiconductor chip
Inventor: KOYAE KENJI
IPC: H05K3/30
Filed: 1997-08-19
Abstract: PROBLEM TO BE SOLVED: To secure parallelism between the surfaces of an FPC substrate and the surface of a pressure heating jig to achieve an accurate bonding and to prevent the deviation in position of a semiconductor chip component due to peeling of a tape, when mounting the semiconductor chip component on the FPC substrate. SOLUTION: When mounting a semiconductor chip component 23 on a flexible circuit board 22 which is positioned on a carrier pallet 20, such a carrier pallet 20 is used that has a hole 24 in it, and a projection 25 corresponding to the hole 24 of the carrier pallet 20 is formed on a stage 21 provided in a semiconductor manufacturing facility so as to back up a semiconductor chip component mounting section of the flexible circuit board 22.
Patent JP-H0663758-A (JP)
Title: Resistance welding gun
Inventor: TSUJII HAJIME
IPC: B23K11/11
Filed: 1992-08-21
Abstract: PURPOSE:To provide the resistance welding gun which is more improved in miniaturization and lightening. CONSTITUTION:A transformer 40, a rectifier 42, a center tap 60 and an ounce copper plate 64 are arranged in space formed between a first gun arm 14 and a second gun arm 16. The second gun arm 16 approaches the first gun arm 14 and separates from it by energizing an air cylinder 28. Since the once copper plate 64, the transformer 40 and the rectifier 42 are arranged in the external form of the first gun arm 14 and the second gun arm 16, the resistance welding gun becomes compact and lightening is attained additionally.
Patent JP-S6283367-A (JP)
Inventor: NAKADA TAKAO
IPC: C04B35/48
Filed: 1985-10-05
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0779162-A (JP)
Title: Signal conversion circuit
Inventor: OYA TETSUJI
IPC: H03M1/82
Filed: 1993-09-07
Abstract: PURPOSE:To prevent deterioration in the conversion accuracy due to dispersion in the characteristic of components in the signal conversion circuit converting an input pulse signal into an analog signal based on its duty factor. CONSTITUTION:A control logic generating section 11 generates 1st-3rd control signals V1, V2, V3 based on an input pulse signal. An analog signal generating section 12 controls charge/discharge of a capacitor C0 according to the 1st control signal V, to provide a voltage V4 across the capacitor C0 at all times to an arithmetic operation section 14. A 1st sample-and-hold section 13 samples and holds a capacitor voltage (the voltage in this case is VT) when a current is constantly discharged from the capacitor C0 at a predetermined voltage CREF for one period of the input pulse signal according to the 2nd control signal V.. The arithmetic operation section 14 applies a predetermined arithmetic operation to the voltage VT and a voltage V4. A 2nd sample-and-hold section 15 samples and holds the arithmetic operation result of the arithmetic operation section 14 at the end of an H level of the input pulse signal according to the 3rd control signal V3 and provides the output of the resultant value as a converted value from the input pulse signal into an analog signal.
Patent JP-H0777688-A (JP)
Title: Reflection type liquid crystal electro-optical device
Inventor: EBIHARA TERUO
IPC: G02F1/1334
Filed: 1993-09-07
Abstract: PURPOSE:To obtain the reflection type liquid crystal electro-optical element which is used for a timepiece and other portable equipment and practical and makes a sharp, beautiful, and superior color display. CONSTITUTION:The reflection type liquid crystal electro-optical device consists of a scatter mode liquid crystal element 9 which has high transmissivity without using a polarizing plate and a reflecting plate which has a fine uneven pattern formed and spectrally diffuses white light by reflection and diffraction when the white light is made incident. Consequently, the color display can be made in interference colors which are brighter and higher in purity than a color filter system and brightens beautifully on a white ground.
Patent JP-2000057048-A (JP)
Title: Storage device
Inventor: YAMAMOTO ITSUHITO
IPC: G11C11/407
Filed: 1998-08-06
Abstract: PROBLEM TO BE SOLVED: To suppress the increasing clock skews by receiving the clock data having a phase delayed compared with a control block and supplying a clock signal synchronized with an input clock signal after the phase adjustment to a memory element. SOLUTION: A phase adjustment circuit 29 receives the clock data as clock signals, distributes the clock signals which after the phase adjustment to the memory elements 26 via the supply lines 27 of same length, sets the delay value of a feedback circuit 28 at a level equal to that of the line 27 and supplies the clock signal that is synchronized with the leading edge of the input clock data and has no phase difference to every element 26. The clock data have a delay covering from a clock signal T1 through the input terminal of every circuit 29 led through an edge trigger type FF 21, a driver 22 and a supply line 31 and causes a phase difference between the clock signals used by a control block 13 and the element 26 respectively. Therefore, the block 13 and a storage block 25 keep a phase difference between them and operate synchronously with each other.
Patent JP-S60114281-A (JP)
Inventor: ODA TAKESHI
IPC: A63B69/40
Filed: 1983-11-25
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0560356-A (JP)
Title: Clean room
Inventor: ASAMI KINICHIRO
IPC: F24F7/06
Filed: 1991-09-03
Abstract: PURPOSE:To reduce transportation expenditure required for transferring fresh air by a method wherein fan filter devices of which number correspond to the size of a horizontal projecting plane are fixed in such a way as the fresh air blown from the fan filter devices may enclose the horizontal projecting plane at an upper surface of a manufacturing facility. CONSTITUTION:Groups of fan filter devices 14, 16 and 18 are disposed only above the manufacturing facilities 22, 24 and 26 and they are fixed in such numbers as that corresponding to a size of a horizontal projecting plane in such a way as fresh air blown from the groups of fan filter devices 14, 16 and 18. With such an arrangement, during operation of each of the manufacturing facilities 22, 24 and 26, required minimum amount of fresh air for keeping allowable dust concentration of a clean room 10 is blown from the groups of fan filter devices 14, 16 and 18. In turn, in the case that semi-conductor devices are taken out of the manufacturing facilities 22, 24 and 26 or in the case that the manufacturing facilities 22, 24 and 26 are operated for their maintenance work, the air flow of fresh air is speeded-up.
Patent JP-H0668700-A (JP)
Title: Semiconductor memory device
Inventor: HAGIWARA NORIO
IPC: G11C29/42
Filed: 1992-08-21
Abstract: PURPOSE:To drastically shorten the test time by writing an arbitrary pattern for one word throughout one writing cycle, to simplify the test system and to facilitate the evaluation of performance by reading the error correcting data of a cell array. CONSTITUTION:A test mode is made by a test signal (1), a pattern supplied to a cell array 1 is inputted from a buffer 9 and the upper four bits of information data from the buffer 9 instead of the output of a generating circuit 10 for error correction data are outputted from a test circuit 13 to a storage area 3 for error correction data. Then, a test mode is made by a test signal (2), the upper four bits of the output of an error inspection/correction circuit 12, instead of the output as it is, are replaced with the four bits P0-P3 from the storage area 3 for error correction data 3 and outputted from a test circuit 14.