Patent GB-808189-A (GB)
Title: Improvements in or relating to telegraph regenerative repeaters
Inventor: CHITTLEBURGH WILLIAM FRANCIS S
IPC: H04L25/04
Filed: 1956-06-29
Abstract: 808,189. Code telegraphy. STANDARD TELEPHONES & CABLES Ltd. June 29, 1956, No. 20160/56. Class 40 (3). A telegraph regenerative repeater for characters represented by a start-stop binary code of signal elements comprises means for repeating the code elements of a character to be transmitted and for normally inserting an outgoing stop signal element at the proper time after the retransmission of the start signal element irrespective of the reception of the stop signal, and means operating in response to the detection of the absence of the marking condition during the period between the start signal element and the said proper time to prevent the insertion of the outgoing stop-signal element. The repeater also includes the feature of falsestart suppression and the controlling circuits are returned to normal if the start element does not persist for 5 m.secs. The timing intervals and control pulses are determined by a number of two-condition bi-stable trigger devices, referred to as binaries, constituted by cross-connected transistors 1, 2 with their base electrodes 5, 6 connected to control terminals 11, 12. Output terminals 17, 18 are connected to the collector electrodes 22, 21, respectively, and alternative input terminals 23, 24 are connected via rectifiers 25, 26 to terminals 17, 18 and also via resistors 13, 14 and capacitors 15, 16 to the control terminals 11, 12. In the normal condition of the binary, with the B side conducting, the potential of electrode 6 is negative with respect to ground, and a positive pulse is provided at the terminal 17. The binary is switched to the A condition by a positive pulse applied to terminal 12 or a negative pulse to the terminal 11. The trigger is reset by a negative pulse applied to the resetting terminal 32. Pulses applied simultaneously to the terminals 23, 24 cause the binary to switch over to the opposite condition so that it operates as a frequency dividing (halving) arrangement. The circuit of Fig. 1 is modified, Fig. 2 (not shown), to operate the output relay of the repeater, the terminals 17, 18 and associated resistors 19, 20 being connected to equal opposite windings of a polarized relay having a series potentiometer with an adjustable tapping-point connected to the negative terminal 10. The regenerative repeater, Fig. 4, comprises ten binaries 41 to 50 forming a counting chain controlled by a pulse generator 61 operating at a frequency of 6400 c.p.s. The pulses are fed simultaneously to the inputs 23, 24 of the binary 41 and the pulses at the halved frequency are fed to the inputs of successive stages so that the sixth binary 46 produces at its B output positive pulses of 5 m.secs. duration spaced at 10 m.secs. Similarly, binary 47 produces at its A output positive pulses commencing at 10 m.secs., 30 m.secs., 50 m.secs.... m.secs., whilst the binary 48 generates at its B output positive pulses spaced at 40 m.secs. and commencing at 10 m.secs. At the A output of binary 49, pulses are produced at 50 m.secs., 130 m.secs., whilst the binary 50 operates to produce a positive pulse at 130 m.secs. from the commencement of the start element of the received code combination. The first A output pulse of binary 47 coincides with a positive pulse from 46B at 10 m.secs. and subsequent pulses from 47A are at 30, 50, 70 ... m.secs. Normally the incoming line relay 64 is at mark so that a negative voltage over resistor 65 holds the binary 58 in the B condition with the outputs V3, V4 positive and negative respectively. Initially, the binary 57 is in the " B " condition and a transistor 63 is unblocked so that a negative pulse is applied to the resetting conductor 62 holding the binaries ... 41 ... 52, 53, 54, 56 in the B condition. When the start element is received, the binary 58 changes over so that V4 becomes positive and V3 relatively negative. A positive pulse supplied over conductor 72 switches the binary 57 to the A condition and also blocks the transistor 63 so that the resetting potential is removed from conductor 62 and the counting chain is started into operation. Timing pulses at 10 m.secs., 30 m.secs.... are applied from the A output of binary 47 through gates 75, 76 connected to the B, A sides of binary 59. During the normal condition both gates 75, 76 are shut, but the change of binary 58 to the A condition opens gate 75 and the first trigger pulse at 10 m.secs. switches the binary 59 to the spacing condition and again shuts gate 75. A positive pulse is applied from the binary 59 to the B side of binary 60 which is switched over to the A condition and the contact 38 is moved to connect positive (spacing) potential to the line 39. If the first significant element is a space, relay 64 is not operated and the trigger pulse at 30 m.secs. cannot reach the binary 57 so that the output binary is not switched. If the first element is a mark, gate 76 is opened, and the pulse at 30 m.secs. passes to the A side of binary 59 making the B side conducting and passing a positive pulse to the A side of binary 60 which is restored to the marking condition. The circuit is restored to normal by binaries 51, 52, the latter being switched to the A condition by a pulse from the A side of binary 50 at 130 m.secs. The A output of binary 52 is connected to the A side of binary 57 and both sides of binary 51 are supplied with trigger pulses from the A output of binary 45 through a double gate 91 controlled by the A side of binary 46. The gate 91 can be opened solely during the periods 3 to 10, 15-20, 25-30, . . . m.secs. and the pulses from 45A occur at 2.5, 7.5, 12.5, . . . m.secs. so that binary 51 can be switched solely at times 7.5, 17.5, 27.5, ... m.secs. A control potential is applied from the A output of binary 51 through gate 92 to the A side of binary 52. The gate 92 is open only when binary 51 is in the B condition which will occur for 10 m.secs after every fourth pulse from binary 45 starting with the pulse at 17.5 m.secs. During each of the periods whilst gate 92 is open, pulses from binary 43 are applied to the A input of binary 52 but without effect whilst it is in the B condition. As the binary 52 is switched at 130 m.secs. and gate 92 is open for 10 m.secs. from 137.5 m.secs. the first operative pulse from the A output of binary 43 will occur at 138.125 m.secs. and will switch the binary 52 to the B condition in which a positive pulse is applied from the A output to the A side of binary 57 which is restored to the B condition unblocking transistor 63 and applying the resetting potential to conductor 62. False start suppression.-A trigger pulse at 5 m.secs. from the A output of binary 46 is applied to the B side of binary 56 through a gate 93 normally held open by the binary 55. A positive pulse is applied from the B side of binary 56 towards the A side of binary 57 via the gate 94 which is closed if the start signal is present. If the start signal is missing at 5 m.secs. the gate 94 is open, and the binary switches to the B condition in which the circuit is restored to normal before the first timing pulse is generated. Production of automatic stop signal.-The A output of binary 54, normally in the B condition, is connected to the base electrode of transistor 83 having its emitter electrode connected to the B side of the binary 59, and normally cut off. The pulse at 130 m.secs. from the A output of binary 50 passes through a gate 95 previously opened by binary 53 to the B side of binary 54, which is switched to the A condition, and applies a negative potential to transistor 83 which becomes unblocked and passes a negative potential to the B side of binary 59 which is switched to the B condition whether or not a stop signal has been received. At 138.125 m.secs. when the circuit is restored to normal, the binary 54 is restored to the B condition, removing the negative control from the binary 59 which, with binary 60 and contacts 38, is left in the marking condition. Suppression of stop element for the long space condition.-After the arrival of a start element the binary 59 is in the A or spacing condition and a marking signal element switches it to the B condition so that a pulse is applied to the B side of binary 53 and to the A side of binary 60. Binary 53 is switched to the A condition so that a pulse from the B side opens gate 95 in time to allow the pulse at 130 m.secs. from the binary 50 to switch the binary 54 to the A condition to insert the stop-signal. If no marking element occurs, the binary 53 is not switched, and the gate 95 remains closed so that stop signal is not inserted. The circuit will be reset at 138.125 m.secs. and all the binaries except 58, 59, 60 will be restored to the B or marking condition. The spacing condition remains on the outgoing line until the line relay 64 changes to mark, which is repeated with a delay of 10 m.secs. The binary 58 on being changed to mark, supplies from its A side a positive pulse to the binary 57 which switches over to the A condition and starts the counting chain. Since the binary 58 is in the marking condition the counting chain will normally be stopped at 5 m.secs. As the binary 53 remains in the B condition during the long space, it holds gate 96 open, and a pulse passes at 130 m.secs. from the A output of binary 50 to the B side of binary 55 which is switched to the A condition, closing gate 93 and preventing the stopping pulse from reaching the binary 56 from the A side of binary 46. The counting chain operates until 10 m.secs. when the first timing pulse from the A output of binary 47 switches binaries 59, 60 to the marking condition. At 10 m.secs. a trigger pulse appearing at the B output of binary 48 switches binary 56 to the A condition to pass a pulse through gate 94 to the A side of binary 57 to stop the counting chain.