Patent GB-1294390-A (GB)
Title: Signal burst demodulating devices
IPC: H04J3/00
Filed: 1970-04-08
Abstract: 1294390 Phase shift transmission systems KOKUSAI DENSHIN DENWA CO Ltd and FUJITSU Ltd 8 April 1970 [8 April 1969] 16779/70 Heading H4P A signal burst demodulating device comprising two synchronism extracting circuits having substantially equal times of establishment of synchronism, first means for switching input signal bursts alternately to said circuits, a delay circuit arranged to receive at the same time said signal bursts and having a delay time equal to or longer than the synchronism establishment time, a demodulator arranged to receive the output of said delay circuit, and second means for switching the outputs of said synchronism extracting circuits alternately to said demodulator, whereby the latter demodulates successive signal bursts from the delay circuit, wherein said first switching means is adapted to connect the output of said delay circuit selectively to the two synchronism extracting circuits, whereby the latter, after each said delay time, instead of receiving the input signal bursts directly, receive the output bursts from said delay circuit. Either absolute phase modulation or differential phase modulation may be used and the need for a synchronous word in each burst in a time slot in a multiple access system is eliminated. In a known arrangement, described with reference to Fig. 2 (not shown), wherein phaseshift modulated signals are directed through a delay (3) and signal shaper (4), also alternately through carrier wave regenerating circuits 1a, 1b and clock pulse extraction circuits 2a, 2b which are compared in phase detector 5 and passed to a waveform regenerating circuit 6 which discriminates between 1's or 0's, errors due to change of delay line length with temperature and phase errors with frequency are confined to the address part of the signal by modifying the arrangement so that the circuits are connectable to receive signals from delay circuit 3, 4. In Fig. 3, each circuit 1a, 1b comprises a modulator 11 receiving signals directly, and indirectly through a demodulator 10 also receiving signals shifted 90 degrees at 15 from a voltage-controlled oscillator 14. The combined signals are fed to a comparator 12 receiving oscillator signals and the output is fed through a filter 13 to oscillator 14 the phase of which is synchronized with that of the input wave. A ring modulator may be used in place of components 10-12 or 1a, 1b may be replaced by a multiplier and divider so as to extract the carrier frequency. Clock regenerating circuits 2a, 2b comprise a phase detector 22 fed directly and also indirectly through a half bit delay 21, detector 22 detecting bit transmission points which are extracted through a filter 23 and an amplitude limiter 24. Filter 23 may be replaced by components similar to 12-14. The input wave is delayed by a period equal to slightly longer than that required for establishment of synchronism in circuit 3 which equalized for amplitude and phase distortion in a filter 4 and passed to a phase detector 5 together with the output from 1a, 1b Detector 5 may be a single ring modulator and demodulating two-phase PSK modulated waves. The output from 5 is passed to a waveform regenerating circuit 6 including a tunnel diode switch 61 controlled from 2a, 2b and passed through a D.C. amplifier 62 to flip-flop 63 to take the waveform directly to one input of gates 72, 73 and indirectly through a one-bit delay line 71 to the other input, the outputs being commoned on to an OR circuit 74. The circuits are switched alternately to demodulate the bursts hence a second burst may arrive at the input end of a demodulator before demodulation of the first burst is completed.