Patent GB-991138-A (GB)
Title: Improvements in or relating to telephone switching networks
IPC: H04Q3/545
Filed: 1962-04-16
Abstract: 991,138. Automatic exchange systems. P. LUCAS, and M. ROUZIER. April 16, 1962 [April 15, 1961], No. 14621/62. Heading H4K. In an electronic telephone switching network comprising a plurality of stages of matrices of crosspoints, in which at least some of the matrices of adjacent stages are interconnected by a plurality of parallel links arrangements are provided for systematically testing all possible paths that could set up a given connection until a free one of these paths is found. The crosspoints used may be gas-filled diodes or PNPN diodes. Trunking and general layout, Fig. 1. The subscriber's line circuits 60 are connected via junctions 11, 17 to the calling and called sides of a connecting network 10 comprising switching matrices 21 ... 26 interconnected by groups of junctions 12 ... 16 symmetrically arranged about a group of median junctions 14. Markers 31 ... 39 are provided for all the groups of junctions, and the junctions 12 ... 16 are provided with testers 42 ... 46 for determining the idle or busy conditions of the junctions. Identifying circuits 54, 59 are provided for the median junctions 14 and the line circuits 60. Fig. 2 illustrates the trunking of the connecting network. Junctions from the subscriber's line circuits on the calling side are grouped in two sections feeding arrays 18 1 , 19 1  respectively, each array comprising four sub-arrays such as 181 ... 184 each serving 32 lines. Each group of 32 lines has access over matrices such as 211, 221 to 6 junctions 13 having access via matrices such as 231 to median junctions 14 in sub-arrays 281 ... 283, 294 ... 296. Similar arrangements apply on the called side. A onedigit binary code A 0  is used to designate the arrays 18 1 , 19 1  and a two-digit binary code B 0  designates the sub-array. The codes A 6 , B 6  serve similar purposes on the called side. Groups of sub-arrays such as 281 ... 283 are clearly defined by the A 0  and A 6  values of the arrays which they interconnect. The identity of the array within the group is defined by a two-digit binary code G capable of taking three values. Fig. 3 illustrates the internal connections of subarrays 181, 281. Each sub-array 181 comprises four switching matrices 211 1  ... 211 4  represented by a two-digit binary number C 0 , each matrix serving eight junctions 111 represented by a three-digit binary number Do. The switching matrices 211 1  ... 211 4  are interconnected over junctions 121 with switching matrices 221 1  ... 221 4  each represented by binary numbers E. Since there are two junctions 121 between each matrix a two valued number X is used to discriminate between them. The sub-arrays 231 comprise four switching matrices 231 2  ... 231 4  and from the manner of interconnection with 221 1  ... 221 4  it is clear that the same number E can be used in each case. Interconnections on the other side of the median junctions is effected in similar manner, the numbers corresponding to A 0  B 0 , C 0 , D 0 , E and X being A 6 , B 6'  C 6 , D 6 , F and Y. As can be readily seen, junctions can be identified as follows: Junctions 11: A 0 B 0 C 0 D 0  Junctions 12: A 0 B 0 C 0 EX Junctions 13: A 0 B 0 A 6 GE Junctions 14: A 0 A 6 GEF Junctions 15: A 6 B 6 A 0 GF Junctions 16: A 6 B 6 C 6 FY Junctions 17: A 6 B 6 C 6 D 6  Method of selection of connection path.- Operations are controlled in a series of phases # 1  # 2  # 3  ... preceded by a start phase. The control circuit 2 (Fig. 1) is assumed to contain the identities A 0  B 0  C 0  D 0 , A 6  B 6  C 6  D 6  of the subscribers to be connected together, and contains stepping registers for running the parameters G E F X Y through their various values. In phase # 1  testers 42 are addressed in accordance with the (fixed) A 0  Bo Co values and the values of E, X are run through until a free junction 12 is found, whereupon # 2  is initiated in which testers 46 operate in accordance with the fixed values A 6  B 6  C 6  and values of F, Y are run through to find a free junction 16. In either of these cases if no free junction can be found a stop condition is applied. If free junctions 12, 16 are found # 3  is initiated. With E and F now known, G is the only variable parameter and the testers are 43, 44, 45 are addressed in accordance with the table given above and G run through its possible values, simultaneous tests being made on corresponding junctions 13, 14, 15 for each value of G. If such a free route is found the system is advanced to the selection phase # 4 . If however no such set of junctions is found, the G register is counted out and this causes the advancement by one step of the FY register and a reversion to phase # 2  and operations recommence from this stage. If in due course the FY register is counted out then this causes advancement of the EX register by one step and reversion to phase # 1  and operations recommence from this stage. If eventually register EX is counted out, no free path is available and a stop condition is applied. Completion of connection and checking.-The connection path in phase # 4  is established by working outwards from the median junction simultaneously in both directions. The marker 34 is set in accordance with the A 0 A 6 GEF code determined above and applies a marking to the median junction concerned. Simultaneously, all junctions corresponding to the digit B 0  are marked by 33. These two markings define a single cross-point of stage 23 which crosspoint fires to mark the junction A 0 B 0 A 6 GE of stage 13. Shortly afterwards all junctions corresponding to the C 0 X registration are marked by marker 32, this again defining a single cross-point in matrix 22 which fires to mark junction A 0 B 0 C 0 EX of stage 12. Marker 31 then marks all junctions corresponding to Do to fire a unique cross-point to extend the connection to A 0 B 0 C 0 D 0 , Fig. 5, illustrates the timings of the marking pulses applied. Similar operations occur to extend the median junction to A 6 B 6 C 6 D 6 . The system then goes to the verification phase # 5 . In this phase all the testers 42 ... 46 are set in accordance with the identities of the selected junctions and a busy/ idle test is made on all these junctions. If one of these proves to be idle, i.e. the connection has not been properly effected, a stop signal occurs during this phase. If, however, all the junctions test busy and the system moves to phase # 6  and a stop signal is emitted in this phase to indicate that the connection is completed. Disconnection operation.-This is initiated in phase # 11  which is the normal state of the control circuit. When a subscriber A 6  B 6  C 6  D 6  hangs up the control circuit causes the marker 39 to apply a pulse to the corresponding line equipment 60 which cuts-off the current through the cross-points as far as the median junction. This latter comprises two cores set to the saturated state by the currents in the respective halves of the connection. A pulse is sent to all such cores to reset them, and when this ceases the core associated with the half connection resaturates. The cores are now in opposite states and the circuitry is arranged so that when these are re-pulsed, they provide a pulse to the median junction identifier 54 which records the identity A 0  A 6  GEF thereof and the control circuit passes to phase # 12 . The recorded identity is used to cause the marker 34 to pulse the median junction, which pulse is passed through the still set up half of the connection to the line circuit Ao Bo Co D 0  to set the identifier 59 in accordance with this line's identity. The control circuit then passes to phase # 13  in which marker 31 is set in accordance with the Ao Bo Co Do identity to apply a disconnect pulse to the corresponding junction 11 to break down the second half of the connection. The control circuit passes to phase # 14  which is a verification phase. In this phase the testers 43, 44, 45 are set in accordance with the now known values of A 0  B 0  A 6  Be GEF and a test is applied to these junctions. If one of these still tests busy a stop signal is applied in phase # 14 . Otherwise the circuit passes to phase # 15  in which a stop signal is again applied to indicate successful completion of the disconnection.