Patent GB-1233926-A (GB)
IPC: G06F12/10
Filed: 1968-09-30
Abstract: 1,233,926. Data processing. BURROUGHS CORP. 30 Sept., 1968 [2 Oct., 1967], No. 46291/68. Heading G4A. A data processing system has a memory containing a plurality of first-in, last-out stacks of information and can access a desired word using a stack base address and an increment. A core memory can store a control table, a data descriptor array, a segment dictionary, and last-in-first-out job stacks. Transistor flip-flop display registers D0, D1, D2, D3 ... point to (contain the absolute address of) MSCW mark words in some of these stored entities as shown in Figs. 2, 4. Referring to Fig. 2, assuming job no. 3 is being processed, registers S, BOSR point to the top and bottom respectively of job stack no. 3. If a "load value" operator is read from memory for execution, the IRWS word at the top of job stack no. 3 is retrieved. If a (job) stack number in it specifies the same stack, i.e. in this case is equal to 3, DISP and 8 fields from the IRWS are added to the contents of BOSR to address memory to obtain a parameter which is loaded on to the top of the current job stack viz. stack no. 3. If the stack number in the IRWS specified a different stack, the contents of display register D0 (pointing to the base of the control table) are incremented by 2 to retrieve a DD from the control table which contains an ADDRESS field pointing to the base of the data descriptor array. The stack number specified in the IRWS is added to the ADDRESS field to retrieve a DD from the data descriptor array, an ADDRESS field of which points to the base of the required stack. This ADDRESS field is added to the DISP and 8 fields from the IRWS to retrieve the parameter which is loaded on to the top of the current job stack, viz. stack no. 3. An IRW word could have been used instead of an IRWS word in which case it would select a display register and provide a field #, the latter being added to the contents of the display register to address memory and obtain the parameter which is loaded on to the stack as before. Referring to Fig. 4 and assuming job no. 2 is being processed and an "enter" operator is read from memory, the IRW shown in job stack no. 2 is retrieved. The IRW selects a display register and provides a 8 field which is added to the display register contents to address memory to retrieve the PCW shown in job stack no. 2 (this PCW relating to procedure C which is to be "entered"). Fields of the PCW are inserted into registers in the computer for use during execution of procedure C. The PCW also selects the display register D1 (which points to the base of the segment dictionary) and provides an increment value which is added to its contents to retrieve an SD from the segment dictionary. An ADDRESS field in this SD points to (the starting address of) the required procedure C which can now be executed. An IRWS might have been used instead of the IRW in which case DISP and # fields in it are added to the contents of the BOSR to retrieve the PCW which is then used as before. The SD also specifies the length of the procedure. The entities pointed to by SD and DD words may be in peripheral disc storage rather than the core memory, this being indicated by a field in the SD or DD. If so, the entity is moved into core memory when required. The PCW also specifies the address of the first operator, and the machine state required. Thus procedures can be shared between jobs. Separate computers may work in parallel on the jobs. Parts of job stacks may be shared between jobs. The hardware facilitates handling of ALGOL or PL/I programmes.