Patent GB-1416689-A (GB)
Title: Gain control circuit arrangements
Inventor: HERRICK PETER MALCOLM
IPC: H03G1/00
Filed: 1971-12-30
Abstract: 1416689 Gain control; signal inverting circuits; television EMI Ltd 5 Dec 1972 [30 Dec 1971] 60626/71 Headings H3T H4F and H4R [Also in Division H2] A gain control circuit includes a signal input terminal and also an input channel for a gain control signal, means for amplifying the input signal in response to the gain control signal to provide an amplified signal dependent both on the input signal and the gain control signal; means for applying the amplified signal and a signal proportional to the gain control signal to integrator means for deriving a feedback signal indicative substantially only of the gain control signal, and means for applying the feedback signal to the input channel to form a negative feedback path for the gain control signal. Video input terminal 1, Fig. 1, is coupled via an emitter follower to the emitter of transistor T1 which has the emitter to collector path of transistor T14 as emitter circuit impedance. Transistor T1 forms the common emitter impedance of a long-tailed pair 4 comprising transistors T2, T10. A gain control signal is applied to terminal 3 and thence to the gate of field effect transistor (FET) T5 which forms a long-tailed pair 6 with a second FET T6. An amplified gain control signal is applied from the drain of FET T5, via amplifier T7 and emitter follower T8 to the base of transistor T10 and also to the base of transistor T11, which forms with transistor T9 and common emitter circuit transistor a further long-tailed pair 5. The input signal component is removed from the output from the collector of transistor T2 by means of an integrating circuit comprising resistor R1 and capacitor C1, which is returned to the collector of transistor T9 so as to avoid integration of the gain control signal: the resultant feedback gain control signal at point Z is applied to the gate of FET T6. The combined amplified input and gain control signals at the collector of transistor T2 is applied via an emitter follower T3 to the base of transistor T4, which forms a long-tailed pair differential amplifier with transistor T12. An amplified gain control signal is applied to the base of transistor T12 from the collector of transistor T9, via emitter follower T13: an output comprising only amplified input signal is applied to output terminal 2 from the collector of transistor T4 via an amplifier T23. Base bias for transistor T14 is derived over emitter-follower T16 from long-tailed pair T17, T18, being stabilized by Zener diode D1, while base bias for transistor T15 is derived over emitter follower T21 from long-tailed pair T19, T20, being stabilized by Zener diode D2. Fade-over circuit.-Two video signals may be respectively applied to the inputs of corresponding amplifiers of the type described above, the outputs of which are combined in an additive mixing circuit. A gain control signal is applied directly to the first amplifier, and to the second via an inverting circuit (Fig. 2, not shown). Inverting circuit.-Signal to be inverted is fed via terminal 16, Fig. 3, to a potentiometer network, the tapping point of which is connected to one gate of a monolithic pair of field-effect transistors 17, the outputs from which form the inputs to differential amplifier 18. The output from amplifier 18 is fed via an amplifying transistor network to the other end of the potentiometer.  The Specification also describes an electrically heated oven for transistor circuits (see Division H2).