Patent GB-1177384-A (GB)
Title: Area Delta Modulation System
IPC: H04B14/06
Filed: 1967-03-28
Abstract: 1,177,384. Electric selective signalling. MATSUSHITA ELECTRIC INDUSTRIAL CO. Ltd. 28 March, 1967 [29 March, 1966 (3); 26 Aug., 1966 (2)], No. 14117/67. Heading G4H. In a pulse code modulation system a positive or negative output pulse is produced whenever the area ABC, Fig. 2, defined by the time axis and the change of input signal after the preceding pulse, reaches a predetermined positive or negative level. In the form of Fig. 6 the input signal at 1 is applied to an integrator 4 and to gate clampers 3 and 5. When an output pulse appears at the output 2 gate clamper 3 is actuated to clamp the output from integrator 4 to the level of the input. Clamper 5 is also actuated to clamp the output of memory circuit 6 to the same value. After the output pulse the output from the integrator begins to rise and the signal on lead 13 is compared at 7 with its initial value in store 6. When the difference signal from the comparator reaches a given positive or negative value, one or other of threshold detectors 8, 10 responds and causes a corresponding pulse generator 9, 11 to give a positive or negative pulse. The cycle then repeats. In another form (Fig. 8, not shown), the input is applied to a gate clamper and the output from the clamper is applied to the integrator. The output from the integrator is applied to a second clamper. Both clampers are actuated by the output pulse, clamping their outputs to zero. After the pulse the output of the first clamp follows the increase or decrease of the input starting from zero. The integrator integrates this changing signal and its output passes through the second clamper to the threshold devices. The second clamper being set to zero provides as output only the change of input signal level. A pulse is generated as before to reset the clampers and begin a new cycle. In a modification to this form the threshold circuits are Schmitt triggers and inhibiting gates are provided between them and the pulse generators. The inhibiting gates are opened by a timing pulse generator a predetermined time only after the previous output pulse. This prevents the output pulses being too close together and is effective to limit the rate of change of signal that can be coded. In another modification (Fig. 12, not shown), a zero-cross detector is provided at the output of the first clamper to energize a gate-pulse generator and actuate the second clamper when the signal crosses zero. This avoids errors due to the positive and negative areas offsetting each other in the integrator and causing a long interval between two output pulses. In another modification (Fig. 14, not shown), the output pulses are synchronized with clock pulses. For this purpose the threshold devices are Schmitt triggers and their outputs control gates in front of the output pulse generators. Clock pulses are applied to the gates so that after a trigger has responded the next clock pulse passes to the pulse generator to give an output pulse and begin the next cycle. In another form, the initial signal level of each cycle is obtained by a local decoder receiving the output pulses. The output from the decoder is compared with the input signal and the difference integrated. The integrator output is applied through a clamper to threshold circuits as before.