baber/WOPTO huggingface dataset:
Patent JP-S6381641-A (JP)
Title: Production of magneto-optical recording medium
Inventor: SUGIMOTO MAMORU
IPC: C23C14/34
Filed: 1986-09-25
Abstract: PURPOSE:To equalize the filming rate of both of a dielectric layer and a magneto-optical recording layer and to improve the productivity by making the distance between a target and a substrate at the time of forming the dielectric layer different from that at the time of forming the magneto-optical recording layer. CONSTITUTION:The distance T/S1 between the target CE-TA and a substrate tray TO in a sputtering chamber CH1 which forms dielectric thin film is set, for instance, 150mm. And the distance T/S2 between the target MO-TA and the tray TO in a sputtering chamber CH2 which forms the magneto-optical recording layer is inserted into a spacer SP so as to become, for instance, 50mm. Hitherto, since the temperature of the substrate rises at the time of forming the dielectric thin film, the filming could be executed only at a low sputtering rate, but now the filming can be executed at the same rate by making the T/S1 large and the productivity can be improved by combining the time of forming both layers.
Patent JP-2001021650-A (JP)
Title: Position detection-type passage sensor
Inventor: WATANABE SATOSHI
IPC: G01B11/00
Filed: 1999-07-06
Abstract: PROBLEM TO BE SOLVED: To obtain a position detection-type passage sensor that is inexpensive and can be installed easily by setting a plurality of sensors at a specific interval and overlapping the projection beams of both the sensors for composing a detection area. SOLUTION: Two sensor units are set at a specific interval, and the projection beams of both the sensor units are overlapped to composed a detection area. Light where the projection beam is diffused and reflected by a passing object is received, and a passing point is obtained from an angle and the distance between the sensors. In this case, the emitted projection beams are bent by mirrors 2 and 3, are subjected to fan-shaped scanning by the mirror of a light beam scanner 4, and are emitted to the outside of the sensor units. When the projection beams hit against the passing object, they are diffused and reflected and partially return to the mirror of the light beam scanner 4.  A part of light that is reflected after hitting against the passing object passes through the mirror of the light beam scanner 4 and a light reception lens 5 and reaches a photo-detector 6, and is converted into an electrical signal.
Patent JP-S59124279-A (JP)
Inventor: YUKAWA NOBUYOSHI
IPC: B65D77/26
Filed: 1982-12-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0565764-A (JP)
Title: Scaffold structure of building unit
Inventor: MATSUDA KAZUMICHI
IPC: E04B1/348
Filed: 1991-09-06
Abstract: PURPOSE:To effectively protect the superstructure of a building unit at the time of delivery or installation and to obtain scaffold structure having simple constitution capable of accomplishing work in the upper part thereof easily. CONSTITUTION:A plurality of temporary beams 32 fixing a spacer 42 are temporarily provided to the first and the second roof bearing frame members 20 and 22 provided in parallel with specific upper positions of a building unit. The spacer 42 fixes stably the temporary beams 32 to the roof bearing frame members 20 and 22 and, at the same time, the temporary beams 32 are borne on the approximately same height as the upper end of an external wall member 18 of the building unit. A unit of a scaffold can be simply constructed by placing a scaffold plate 60 on the upper parts of the temporary beams 32. In addition, every end of the temporary beams is extented to the inside of the external wall member to bear the external wall member inwardly, and protection functions of the scaffold and the external wall member can be presented.
Patent JP-H04107556-A (JP)
Title: Color converting method for achromatic process
Inventor: NAKAGAWA TSUTOMU
IPC: B41M5/00
Filed: 1990-08-29
Abstract: PURPOSE:To improve color reproducibility by actually printing a color chip as for (n) and (m) kinds of colors expressed by 1st and 2nd color information and performing color conversion based on a table showing corresponding relation between both of them. CONSTITUTION:A color cube (a) shows a color expressing system by the 1st color information and one point in the color cube in which the density values of chromatic colors, C, M and Y, are set as three axes expresses one color. On the other hand, color cubes (b) to (d) show a color expressing system by the 2nd color information, and one color is expressed by the combination of the density values of three colors, C, M and K, in the color cube (b), then one color is expressed by the combination of the density values of three colors, C, Y and K, and M, Y and K, in the color cubes (c) and (d), respectively. The color conversion processing performed in this method is such processing that a point corresponding to one point in the color cube (a) is found somewhere in the color cubes (b) to (d). Thus, the color reproducibility is improved as compared with color conversion by a theoretical arithmetic operation.
Patent JP-H0673795-A (JP)
Title: Unit house
Inventor: IWAMOTO NORIMASA
IPC: E04B1/348
Filed: 1992-08-26
Abstract: PURPOSE:To provide rooms which are not restricted to the size of a house unit and obtain an inexpensive unit house. CONSTITUTION:A house unit 3 constituting the uppermost floor with a horizontally specified distance is installed on a house unit 2 of the lower floor and a roof unit 6 is arranged to spread over the house units 3. The space surrounded by the respective house units 2, 3 and the roof unit 6 is defined as rooms. Since the rooms can be formed without house units, the number of necessary house units can be lessened and material cost and transportation cost can be reduced and hence, an inexpensive unit house 1 can be provided. And further, rooms which are not restricted can be installed.
Patent JP-H0274901-A (JP)
Title: Method of imparting antireflection function
Inventor: NISHIKAWA AKIFUMI
IPC: G02B1/14
Filed: 1988-09-10
Abstract: PURPOSE:To impart an antireflection function to the surface of stocks by subjecting a transparent plastic stock and glass stock which consist essentially of the silicon chain compd. of polyorganosiloxane and are treated by a hard coating material to a low-temp. plasma treatment. CONSTITUTION:The transparent plastic stock and glass stock which consist essentially of the silicon chain compd. of the polyorganosiloxane and are hard coated are irradiated with low-temp. plasma. The plasma treatment is determined by the components, pressure and flow rate of the gas and further the output and treatment time. The gaseous plasma include nitrogen, oxygen, hydrogen, argon, ozone, freon, etc., and polymerizable gaseous plasma which are usable alone or in combination. The gaseous oxygen is more particularly effective for its possibility of forming the antireflection film of porous layers consisting of SiO and SiO2. The antireflection function is imparted to the surface region of the transparent plastic and glass stock by forming the porous layers of the metallic compd. SiO and SiO2 which are known as antireflection films.
Patent JP-S60121621-A (JP)
Inventor: ISHIZAKI EIHACHI
IPC: H01B17/60
Filed: 1983-12-01
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6469118-A (JP)
Title: Circuit for driving pnpn element with gate
Inventor: TASHIRO YOSHIHARU
IPC: H03K17/732
Filed: 1987-09-10
Abstract: PURPOSE:To contrive the reduction in cost and to simplify the driving circuit by connecting a rectifier element between an n-channel gate and cathode in the positive polarity of the cathode side and connecting a resistor between a p-channel gate and anode. CONSTITUTION:When the impurity density of the semiconductor layer forming an n-channel base region of a pnpn semiconductor element 1 is higher than the impurity density of the semiconductor layer forming the p-channel base region, a rectifier element is connected between the n-channel gate 13 and cathode 10 of the pnpn semiconductor element 1 in the positive polarity of the cathode side and a resistor is connected between the p-channel gate 14 and the anode 9. Moreover, when the impurity density of the semiconductor layer forming the n-channel base region of the pnpn element 1 is lower than the impurity density of the semiconductor layer forming the p-channel base region, the rectifier element is connected between the p-channel gate 14 and the anode 9 of the pnpn semiconductor element 1 in the positive polarity of the p- channel gate and the resistor is connected between the n-channel gate 13 and the cathode 10. Moreover, a power supply 6 and a load resistor 2 are connected in series between the anode 9 and the cathode 10 of the pnpn semiconductor element l. Thus, the circulit is simplified and the cost is reduced.
Patent JP-S6382331-A (JP)
Title: Torque detector of steering gear
Inventor: KOBAYASHI HIROSHI
IPC: G01L3/10
Filed: 1986-09-26
Abstract: PURPOSE:To obtain the title detector having a stable characteristic and excellent durability, by forming a strain gauge to a torsion bar by the vacuum formation of a membrane and detecting input torque from the change in the resistance value of said gauge. CONSTITUTION:A torsion bar 3 is inserted through the central part of the upper shaft 2 pivotally supported by the bearing 1a of a housing cover 1. The upper end of the torsion bar 3 is connected to the upper shaft 2 by a knock pin 4 and the lower end thereof is connected to a lower shaft (pinion gear) 6 by a knock pin 5 and a steering shaft is constituted of three these elements and the lower shaft 6 is pivotally supported by the bearing of a housing 7. When a driver rotates a steering, the torsion bar 3 is twisted and each resistance value of a strain gauge 9 changes. The change in said resistance value is detected by a Wheatstone bridge and amplified by a signal processing circuit 16 to obtain the output voltage proportional to steering torque.
Patent JP-H0565560-A (JP)
Title: Production of high strength and high ductility tial intermetallic compound
Inventor: FUJIWARA YOSHINARI
IPC: C22F1/00
Filed: 1991-09-09
Abstract: PURPOSE:To obtain a high strength and high ductility TiAl intermetallic compd. by using two kinds of powdery starting materials having mutually different characteristics. CONSTITUTION:First. powder having a compsn. consisting of 42-47 atomic% Al and the balance Ti is mixed with second powder having a compsn. consisting of 46-49 atomic% Al and the balance Ti and having a lower Ti content than the first powder to prepare powdery starting material contg. 20-70wt.% of the first powder. A green compact is formed by cold isostatic pressing with the starting material and subjected to hot isostatic pressing to obtain a TiAl intermetallic compd. made of a sintered body.
Patent JP-H0649646-A (JP)
Title: Cutting tool made of surface coated titanium carbon nitride base cermet excellent in chipping resistance and wear resistance
Inventor: YOSHIMURA HIRONORI
IPC: B23P15/28
Filed: 1992-08-04
Abstract: PURPOSE:To prevent the occurrence of the chipping of the cutting edge of a cutting tool made of TiCN base cermet by forming hard compounds of Ti including a TiCN layer with a longitudinally growing crystalline structure or an Al2O3 layer on the surface of the cutting tool. CONSTITUTION:The surface of the cutting tool made of TiCN base cermet produced by sintering the powder of TiCN having high hardness with the metal of Co, Ni or the like as a binding material is coated with at least >= two kinds of hard layers with granular crystalline structure constituted of Ti compounds such as TiC, TiN, TiCN, TiCO and TiCNO or Al2O3 by 5 to 20mum average thickness by a chemical vapor deposition method. By constituting at least one layer among this plural coating layers of a TiCN layer and forming the crystalline structure of at least one layer among the TiCN layers into a longitudinally growing one, the generation of the chipping of the edge of the cutting tool by TiCN base cermet in the process of the machining operation is reduced, so that the cutting tool made of TiCN base cermet excellent in durability can be obtd.
Patent JP-2001018556-A (JP)
Title: Page aggregate, page retrieving device and recording medium
Inventor: TSUKAGOSHI SHIGERU
IPC: G06F3/048
Filed: 1999-07-07
Abstract: PROBLEM TO BE SOLVED: To provide a page aggregate, a page retrieving device and a recording medium, with which the total constitution of the page aggregate can be easily grasped from any page and a smooth retrieval, which goes along with a human thought process and has no sense of incompatibility, can be possible. SOLUTION: This page aggregate, page retrieving device and recording medium has a first index provided in at least one selected from the group consisting of a top edge, a tail edge and a fore edge, and a second index representing the low-ranking concept of the first index. This second index is commonly displayed in each page as a character set or an icon set 3 containing thoroughly an index representing the concept of another category in the same- ranking concept of the second index. Only the character or the icon pertaining to the contents of the page in respective pages is emphasized as for the character set or the icon set.
Patent JP-S62146386-A (JP)
Inventor: ARUBAATO PII DEBUISU JIYUNIA
IPC: E21B12/02
Filed: 1986-09-26
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6376986-A (JP)
Inventor: BANSAN MINIE
IPC: F16L41/08
Filed: 1987-09-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0971792-A (JP)
Title: Small-diameter steel wire for arc welding
Inventor: SEDO TATSUYA
IPC: B23K35/36
Filed: 1995-09-05
Abstract: PROBLEM TO BE SOLVED: To prepare a small-diameter steel wire for arc welding which does not cause slip on a feed roller at the time of welding, has no significant abrasion resistance, and good feedability by applying a suitable amt. of a lubricant having a particular compsn. on the surface of a steel wire for arc welding. SOLUTION: A lubricant comprising at least one member, in an amt. of 3 to 30wt.%, selected from among molybdenum disulfide and tungsten disulfide, at least one member, in an amt. of 20 to 60wt.%, selected from among a fatty acid having an m.p. of 50 deg.C or above, an ester of a fatty acid with a monovalent or divalent alcohol and a petroleum wax, and polyethylene glycol having an average mol. wt. of not less than 2,000 in an amt. of 5 to 20wt.% with the balance consisting of a lubricating agent, which is liquid at room temp., such as an animal or vegetable oil, is applied on the surface of a steel wire for arc welding in an amt. of 0.20 to 1.80g per 10kg of the wire.  A wire withdrawn from a spool 2 is fed by means of a feed motor 3 into a conduit cable 1 provided with two turns of loop and transferred to a torch 4, and welding is conducted to examine the feedability of the wire, offering very satisfactory results.
Patent JP-H0542676-A (JP)
Title: Ink jet recording apparatus and ink drying preventing method thereof
Inventor: SASAKI YUKIMOTO
IPC: B41J2/165
Filed: 1991-08-13
Abstract: PURPOSE:To prevent a carriage from returning to stop position becomes impossible when the power supply of an apparatus main body is turned OFF on the way of recording. CONSTITUTION:A carriage return mechanism 30 operated when the power supply of an apparatus main body is turned OFF on the way of recording to return a carriage 13 to a stop position A is provided. This carriage return mechanism 30 is constituted of the slider 31 pushing the carriage 13 to the stop position A, a slider energizing member 32 energizing the slider 31 in the return direction of the carriage 13, the slider wire 34 pulling the slider 31 against the slider energizing member 32 and the slider driving means 36 winding up the slider wire 34.
Patent JP-H1167938-A (JP)
Title: Manufacture of semiconductor nonvolatile storage device
Inventor: ITO HIDEKI
IPC: H01L21/8247
Filed: 1997-08-25
Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor nonvolatile storage device, which can form gate insulating films which are different in film thicknesses, of a memory transistor and a selective transistor by shortening the processing time of the gate insulating films and enables reduction in the density of patterns or the like. SOLUTION: In a memory transistor formation region and a selective transistor formation region, gate-insulating films 20a and 20b are respectively formed on the upper layers of channel formation regions formed in a semiconductor substrate 10, charge storage layers 30a and 30b are respectively formed on the upper layers of the films 20a and 20b, control gates 31a and 31b are respectively formed over the layers 30a and 30b and a mask layer 23 for coating at least the memory transistor formation region is formed. A gate-insulating film 20c of the selective transistor formation region is formed into a thick film, using this layer 23 as a mask and source, and drain regions are respectively formed in the memory transistor formation region and the selective transistor formation region.
Patent JP-S6384812-A (JP)
Title: Portable cutting device
Inventor: KITANI HIROYUKI
IPC: B23D21/04
Filed: 1986-09-29
Abstract: PURPOSE:To enable cutting with remote operation by providing a hold casing having a built-in clamp device, a rotary casing connected thereto, a means for turning the casing and the like, and mounting a disc cutter in the rotary casing. CONSTITUTION:A portable cutting device 6 is hung down, coupled to a workpiece 4 and secured thereto with a clamp device 8 built into a hold casing 7. Thereafter, a rotary casing 9 is turned and a disc cutter 13 is operated. In this case, the disc cutter 13 turns round the workpiece 4, rotating along a portion to be cut, and carries out a cutting process. Then, the securing of the cutting device 6 is released and this device 6 is lifted. The aforesaid operation is done under monitoring by a fiberscope 15 and chips generated during the cutting process are discharged outside via a chip aspirator 16. The titled device is capable of cutting a portion to be cut via remote operation.
Patent JP-S6289338-A (JP)
Title: Semiconductor integrated circuit device and manufacture thereof
Inventor: KANDA SHINYA
IPC: H01L21/82
Filed: 1985-10-16
Abstract: PURPOSE:To increase the capacitance of the capacitor element and to enable the fuse to be favorably cut by a method wherein the dielectric film of the capator element is constituted of an insulating film having a high dielectric constant and an insulating film, which is used as an etching stopper and enables the cutting of the fuse to perform favorably, is constituted on the upper part of the fuse. CONSTITUTION:The construction of the titled device consists of an MISFET Q (left side), a capacitor element C (center) and a fuse F (right side) and the MISFET Q is chiefly constituted of a semiconductor substrate 1, an insulating film 4, a conductive layer 5A and a pair of semiconductor regions 6. The capacitor element C is constituted of a pair of conductive layers 5C and 12C interposing an insulating film 9 between them. As a dielectric film of the capacitor element C is constituted of the insulating film 9 having a high dielectric constant, the capacitance can be increased and the occupation area can be reduced. Moreover, as the fuse F is constituted of a conductive layer 5D and an insulating film 10, which enables the cutting of the fuse to perform favorably, is provided on its upper part, the improvement of the electrical reliability can be contrived.
Patent JP-S59120967-A (JP)
Title: Testing device
Inventor: SHISHIDO HIDENAO
IPC: G01R31/26
Filed: 1982-12-28
Abstract: PURPOSE:To automatize completely the manual operation at a start time to reduce the loss time in the continuous test of a material to be tested, by providing a handling part, detecting means, and a testing means of a material to be tested which starts various characteristic tests automatically and detecting the end of a test to make automatically the device operate. CONSTITUTION:An IC, an LSI, or the like is set as the material to be tested, and the presence or the absence of a device is detected in a measuring circuit 2 for the purpose of detecting whether the material to be tested is set or not, and the characteristic test of the material to be tested is performed in a testing device part 4 through a digital-analog/analog-digital converter 3. The testing device part including a computer tests and evaluates characteristics of various ICs and LSIs automatically in a high speed, and results of various characteristic tests in the testing device part are displayed on a display device 5. An end signal is given to a handling part 1 when the test in the testing device part 4 is terminated, and the next material to be tested is measured automatically.
Patent JP-2000048000-A (JP)
Title: Parallel executing method and machine-readable recording medium having recorded program thereon
Inventor: MURAI HITOSHI
IPC: G06F9/46
Filed: 1998-07-29
Abstract: PROBLEM TO BE SOLVED: To enable a distributed memory type parallel computer, with which data are transferred by a SEND/RECV model, to properly execute a program including a block to which execution by a specified processor is designated. SOLUTION: In the case of executing a block A1 to which processors P(1)-P(4) are designated as execution processors, respective processors P(1)-P(5) judge whether data transfer between the processors P(1)-P(4) designated as execution processors and the other processor P(5) is required or not. When any data transfer is not required, the processors P(1)-P(4) move control into the block A1 and the processor P(5) moves control just after the block A1 and executes another block A2. When the data transfer is required, on the other hand, the processor P(5), which is not designated as an execution processor, moves control into the block A1 as well so as to be prepared for data transfer between the processor P (5) which is probably to be necessary when executing an execution sentence in the block A1, and the processors P(1)-P(4) according to the SEND/ RECV model.
Patent JP-H0277914-A (JP)
Title: Multi-phase clock generating circuit
Inventor: OKABE TOSHIHIRO
IPC: G06F1/06
Filed: 1988-09-14
Abstract: PURPOSE:To obtain an optional multi-phase clock within a range less than the cycle of an original oscillation clock by defining a clock ANDed the output of a pulse width variable circuit and the output of the FF of each stage forming a shift register as a multi-phase clock signal. CONSTITUTION:The shift data F is synchronous with an original oscillation clock C and at the same time inputted periodically and every four cycles of the clock C. When the data F is set at logic '1', the data having the cycle width of the clock C are successively transferred to the FF 11 - 14 by the clock C. Thus the prescribed waveforms are outputted to the outputs A0 - A3 of the FF 11 - 14. The output CP of a pulse width variable circuit 2 is synchronous with the clock C and has the pulse width different from that of the clock C. The AND circuits 31 - 34 AND the outputs A0 - A3 and the output CP respectively. Thus the outputs T0 - T3 of the circuits 31 - 34 are used as the necessary multi-phase clocks.
Patent JP-S61109295-A (JP)
Inventor: TANIMOTO SATOSHI
IPC: H05B33/22
Filed: 1984-11-01
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。