Patent GB-728436-A (GB)
Title: Improvements in or relating to pulse-code-modulation signalling systems
IPC: H04J3/06
Filed: 1951-06-22
Abstract: 728,436. Multiplex pulse code systems. PHILIPS ELECTRICAL INDUSTRIES, Ltd. June 22, 1951 [June 27, 1950], No. 14895/51. Class 40 (5). In a pulse code modulation signalling system the synchronizing intervals are made twice as long as each intelligence signal interval occupied by a binary code pulse, and either only the first half or the second half is occupied by a synchronizing pulse, the other half remaining empty. The regular presence of the synchronizing pulse after broadening of it to cover all succeeding intelligence intervals occupied by a pulse is then used by a sync separator circuit to identify the synchronizing interval. The system may be a multiplex binary one-unit code or a multi-unit code may be used. As described the transmitter comprises a pulse generator,of period T1, T2 ... (Fig. 1a) equal to that of the signal cycle, which passes a synchronizing pulse 02 directly to an output line feeding a modulator, radio-frequency amplifier and antenna and to a delay line with equally spaced tappings successively feeding the signal channels, the last tapping being unconnected to the output to provide the gap O, in the synchronizing interval O. The channel modulators may comprise difference producers, mixers feeding pulses from the tapped delay line to sample the modulating voltage recurrently, circuits widening the pulses, demodulators and return paths to the difference producers all as described in Specifications 662,611 and 691,824, so that the pulses present or absent in the output of the pulse widener when integrated (Delta code system) produce a voltage in proportion to the modulation. The leading edges of the output pulses from the pulse widener are then differentiated to produce channel pulses amplified and passed to the common output line. Channel supervisory signals may be sent by suppressing or allowing pulses to occur constantly in the channel for a short time. At the receiver the bandwidth of the I.F. amplifier is made less than twice the maximum recurrence frequency of the signal pulses so that the pulses obtained from a detector merge if they are successive and take the form shown in Fig. 1 (b). Alternatively, if the I.F. amplifier bandwidth is large enough to distinguish adjacent separate pulses, the detector is followed by a low-pass filter with cut-off frequency less than the maximum recurrence frequency of the pulses to merge adjacent pulses. The merged pulses then pass through a peak and threshold limiting " slicer " to a differentiating circuit whose output positive pulses control a synchronizing pulse selector. Since the differentiated merged pulses are fewer in number than the transmitted pulses the speed of selection of the selector is thereby increased. The synchronizing pulses from the selector may then be regenerated by a noise-reducing circuit as described in Specifications 684,318 and 691,824, and passed to a delay line with tappings feeding coincidence mixers, individual to each channel, also fed by the merged and sliced received pulses. The latter, if they extend over the channel, are then employed by the mixer as pedestal pulses to pass regenerated pulses from the delay line superimposed on them to a pulse-integrating network demodulating the channel pulses. Alternatively the coincidence mixers may be fed by individual unmerged pulses from the detector. Synchronizing pulse selector. This. comprises a pair of cathode-coupled pentodes 66, 67 forming a flip-flop, of which the valve 67 is normally conducting and the valve 66 normally cut-off, and is actuated to its transient state through a gating diode 76 by the differentiated leading edges of the synchronizing pulses after broadening and regeneration (Fig. 1c) and after the differentiated pulses are reversed in polarity to make them negative-going. The transient position of valve 66 biases to cut-off the gate diode 76 and lasts for an interval just short of the synchronizing interval. The sync. separator finally therefore becomes synchronized with the spaced regularly recurring synchronizing pulses. The synchronizing pulses each excite the tuned-anode circuit 84 of the pentode 67 and and positive-going excursions excite the grid of a pentode 88 normally biased beyond cut-off to produce at its output 91 synchronizing pulses of duration determined by the period of the tuned circuit. Specification 684,318 also is referred to.