baber/WOPTO huggingface dataset:
Patent JP-H0855986-A (JP)
Title: Thin film semiconductor device and its manufacture
Inventor: MIYAMOTO YASUMASA
IPC: H01L29/78
Filed: 1994-08-09
Abstract: PURPOSE:To realize high breakdown strength between a first gate electrode and a second gate electrode by providing a second gate insulation film covering the first gate electrode and by extending the second gate electrode up to an upper part of the first gate electrode on the second gate insulation film. CONSTITUTION:A channel region 2 is formed on an insulation substrate 1 and is covered with a first gate insulation film 3. A first gate electrode 5 and a second gate electrode 4 are formed adjoining mutually on the first gate insulation film 3. Impurities are introduced to a region excepting a region corresponding to the first gate electrode 5 and the second gate electrode 4, and source and drain regions 2-1 are provided. A second gate insulation film 6 is provided by covering the first gate electrode 5 and the second gate electrode 4 is made to extent up to an upper part of the first gate electrode 5 on the second gate insulation film 6. Thereby, the first gate electrode 5 and the second gate electrode 4 are made to overlap and breakdown strength between gate electrodes is improved.
Patent JP-H0955954-A (JP)
Title: Digital convergence device
Inventor: KATO TOSHIYUKI
IPC: H04N9/28
Filed: 1995-08-15
Abstract: PROBLEM TO BE SOLVED: To drastically reduce a memory capacity with simple circuit constitution without deteriorating convergence accuracy by interpolating data at each dividing point between both correcting points by controlling the magnification of a variable magnification circuit from data of the plural correcting points stored in a memory. SOLUTION: Correcting point data at the dividing points between both correcting point is interpolated by controlling the magnification of the variable magnification circuit 11 from data of the two correcting points stored in the memory 1 through the use of the variable magnification circuit 11, a fixed magnification circuit 12, a switching circuit 13, an adder 14 and a register 15. The variable magnification circuit 11 converts an inputted value to the value of the optional integral multiple from zero time to four times. The adder 14 adds an output from the variable magnification circuit 11 and that from the switching circuit 13 to input to the register 15. By this constitution, correction data linear-interpolated corresponding to each position is outputted to each dividing point furthermore dividing the interval between the two correcting points into eight parts so that the data quantity is reduced to be about one eighth.
Patent JP-H1152441-A (JP)
Title: Production of cubic nonlinear optical glass
Inventor: KUROIWA YUTAKA
IPC: G02F1/355
Filed: 1997-08-01
Abstract: PROBLEM TO BE SOLVED: To produce cubic nonlinear optical glass extremely short in a nonlinear optical response time. SOLUTION: Glass contg. the semiconductor to be deposited or the fused matter of the glass is heat-treated to deposit semiconductor particulates. The temp. above the temp. lower by 180 deg.C than the glass transition temp. of the matrix glass is then attained after the deposition of the semiconductor particulates. The matrix glass is then cooled down to the temp. lower by >=200 deg.C than the glass transition temp. from the heating temp. described above in such a manner that an average cooling rate of >=0.1 deg.C/sec is attained.
Patent JP-H0495181-A (JP)
Title: Pattern classifying device
Inventor: YABE RIYOUHEI
IPC: G06N3/00
Filed: 1990-08-08
Abstract: PURPOSE:To quickly and automatically execute the learning/recognition by transferring automatically an optimized weight coefficient of teacher data and a result of learning without intervening a person between the pattern classifying device and a hierarchical type neural network high speed arithmetic unit. CONSTITUTION:A cell image in a sample is inputted by an image input device 11 of an automatic cell classifying device 1, a feature parameter is extracted by using an image processor 13, and on the other hand, an engineer observes the same cell image, inputs a result of its decision (teacher data), and an arithmetic controller 14 stores it by allowing it to correspond to the feature parameter, and transfers it to a hierarchical type neural network high speed arithmetic unit 3 through a real time communication equipment 2. The hierarchical type neural network high speed arithmetic unit 3 changes a weight coefficient so as to minimize an error of output data and teacher data of the hierarchical neural network, optimizes the weight coefficient, and transfers its weight coefficient to the automatic cell classifying device 1 through the real time communication equipment 2. In such a way, the learning/recognition can be executed quickly and automatically.
Patent JP-H0550701-A (JP)
Title: Mounting structure of thermal recording head
Inventor: YOKOYAMA YASUMI
IPC: B41J25/316
Filed: 1991-08-20
Abstract: PURPOSE:To mount a thermal recording head so as to allow it to follow the inclination of a platen roller in order to always making the printing density of a thermal recording apparatus constant. CONSTITUTION:The rotary shaft 4 fixed to a thermal recording end surface head 2 is inserted in the hole of the head bracket 3 mounted on a thermal recording apparatus main body 1 through a head pressing spring 5. Therefore, the thermal recording end surface head 2 becomes movable around the rotary shaft 4. When a platen roller 7 is inclined, the thermal recording end surface head 2 also follows the angle of inclination of the roller 7 to revolve around the rotary shaft 4 so as to come into close contact with the platen roller 7. Pressurizing springs are provided to the rotary shaft 4 on both sides thereof so as to always bring the slide surface of the thermal recording end surface head 2 and that of the head bracket 3 to a close contact state and the printing position accuracy due to rotation is ensured.
Patent JP-S5998920-A (JP)
Title: Automatic penetration tester
Inventor: YAGI KIMIO
IPC: E02D1/02
Filed: 1982-11-26
Abstract: PURPOSE:To simplify survey the bearing force of the ground against a small building by a method in which a rod is penetrated into the ground by means of a driver connected to a wire by releasing the wire at a given interval of period, and the penetration degree of the rod is automatically reduced. CONSTITUTION:When a driver 5 is operated, a cam 4 is operated, a wire 3 wound around a winding drum 2 is released, a hammer 20 is dropped, and a rod 1 is penetrated into the ground by the rod 1. The wire 3 is wound around the drum 2 and the hammer 20 is again pulled up. When the rod 1 is penetrated, a wheel 6 is turned, the rotation is transmitted to a winding and feeding shaft 14 by a universal joint 11, and a recording paper 12 is sent out and recorded by a writing tool 13.
Patent JP-2001029587-A (JP)
Title: Game machine
Inventor: TAKEMOTO TAKATOSHI
IPC: A63F7/02
Filed: 1999-07-23
Abstract: PROBLEM TO BE SOLVED: To enhance a sense of expectation of a player to addition of a special value by performing reach (li-zhi) game when a reach condition is generated at the prestage of the addition of a special value. SOLUTION: When a reach condition is generated in a pattern fitting game, the game is continued and a pattern Z1 to be discharged is discharged toward an effective displaying region 411 or an invalid displaying region 412 of a first displaying part 41 from a second displaying part 42, and e.g. a series of movements of the pattern Z1 to be discharged are made amusing wherein the pattern Z1 to be discharged related to the special pattern is discharged and the pattern Z1 to be discharged is gradually moved toward the first displaying part 41 and the pattern Z1 to be discharged is terminated at the effective displaying region 411 or the invalid displaying region 412 can be seen in details by a game player,  and by terminating the pattern Z1 to be discharged related to the special pattern at this side of the effective displaying region 411 or passing it through the effective displaying region 411.
Patent JP-2001029600-A (JP)
Title: Game machine
Inventor: TAKEMOTO TAKATOSHI
IPC: A63F7/02
Filed: 1999-07-23
Abstract: PROBLEM TO BE SOLVED: To make a player who has not won a game for a long period of time have a proper degree of an expectation for the win. SOLUTION: A race game performing means 110 performs a horse race game on a variable display means 30. A supposition means 120 displays a supposition (the number of a horse to become a first place) of a race result for the race game which is performed this time, at the starting of the race game. At the same time, when the supposition of the race result has not come true continuously a specified number of times, the supposition means 120 increases the number of suppositions being displayed. For example, after performing 300 times of the race games, when the suppositions have not come true, the number of suppositions which has been one up to the time point, is increased to two.
Patent JP-S60101872-A (JP)
Title: Manufacture of layer-built heat cell
Inventor: NAKANISHI MITSUHIRO
IPC: H01M6/36
Filed: 1983-11-07
Abstract: PURPOSE:To facilitate the work of inserting heating members and increase the yield of a heating agent by inserting spacing plates between unit cells in the process of coupling them together, then removing the spacing plates to form spaces between the unit cells, followed by inserting the heating members into the spaces. CONSTITUTION:After unit cells 1 and spacing plates 5 are alternately stacked over a coupling jig 3, the terminals 2 of the unit cells 1 are welded to each other. Next, the thus coupled cell units 1 and spacing plates 5 are removed from the coupling jig 3 before the spacing plates 5 are extracted to form equal spaces between the unit cells 1. After that, heating members 4 are inserted into the above spaces, thereby constituting a layer-built heat cell.
Patent JP-H0951931-A (JP)
Title: Face washing unit using peltier element
Inventor: TAKIMOTO MASATERU
IPC: F25B21/02
Filed: 1995-08-16
Abstract: PROBLEM TO BE SOLVED: To provide a face washing unit having the simple constitution by which water to be used to wash one's face can be immediately separated into warm water and chilled water and the skin is relaxed by washing one's face in the warm water and the skin is tightened by washing one's face in the next chilled water and skin care after washing one's face can be made sufficiently effective needless to say face washing itself. SOLUTION: This face washing unit is provided with a face washing unit main body 10 which can house water of a quantity suitable for washing one's face and whose upper part is largely opened and a tank 20 which is arranged on the under side of this face washing unit main body 10 and communicates with the inside of the face washing unit main body 10 by a water passing passage 30, and a heat conducting device 40 having a Peltier element 41 to move heat from the heat absorbing plate 42 side to the heat radiating plate 43 side by current-carrying, is arranged between these face washing unit main body 10 and tank 20. A part of a heat absorbing plate 42 and a heat radiating plate 43 of this heat conducting device 40 is respectively exposed in the tank 20 and the face washing unit main body 10.
Patent JP-2000041256-A (JP)
Title: Motion compensation processing circuit, coder, motion compensation method and storage medium
Inventor: NAKAYAMA TADAYOSHI
IPC: H04N19/46
Filed: 1998-07-24
Abstract: PROBLEM TO BE SOLVED: To obtain the motion compensation processing circuit where the hardware scale is reduced and the processing speed is increased. SOLUTION: A shift amount generation means 131 generates a shift based on a weight coefficient defined in advance for motion vector information of blocks adjacent to a block of interest. Shift means 153, 154 apply shift processing to predicted image information sets u, d, l, r of blocks adjacent to the block of interest according to the shift generated by the shift amount generating means 131. Thus, the number of multipliers is considerably reduced compared with that of a conventional circuit to conduct overlap motion compensation prediction.
Patent JP-S6364793-A (JP)
Title: Thermal transfer method
Inventor: TSUTSUMI YUICHIRO
IPC: B41M5/26
Filed: 1986-09-06
Abstract: PURPOSE:To allow the visual feeling of a thermal transfer image to coincide with that of an offset or gravure printing image printed at the time of actual printing by adjusting the visual feeling of said transfer image, by lightly coloring the image receiving surface of an image receiving material, wherein an image is thermally transferred to the surface thereof by performing pattern like heating according to an image signal. CONSTITUTION:The surface of an image receiving material is preliminarily colored lightly and the surface color thereof is allowed to preliminarily coincide with the surface whiteness or color of printing paper actually used in offset or gravure printing. In this case, some image receiving materials may be prepared in matching relation to the printing papers actually used in printing. The surface of the image receiving material is colored at the time of the thermal transfer of an image by a method wherein the whiteness or hue of the printing paper used in actual printing is preliminarily investigated and this information is transmitted to a thermal transfer printer to transfer light black to the surface of the printing paper and the surface whiteness of said printing paper is adjusted. By this method, even the thermal transfer image formed on the image receiving material such as a polyester film can have the same visual feeling as the offset or gravure printing image printed on paper.
Patent JP-H0869999-A (JP)
Title: Method of constituting flattened interconnecting layer and semiconductor device
Inventor: MANOJI KEI JIEIN
IPC: H01L21/316
Filed: 1995-08-16
Abstract: PROBLEM TO BE SOLVED: To reduce thickness and polishing time of deposition, required for attaining the thickness and flatness of a desired final dielectric by depositing a dielectric polishing layer of an identical, constituted of a material selected from a group such as PETEOS on a gap-fill layer. SOLUTION: A dielectric seed layer of identical shape is deposited on a board. In the method, a gas mixture constituted of a silicon containing element, an oxygen-containing element and an inert element is used. A clearance filler layer 34 is deposited on a conductor 22 of a small fineness ratio, at least 1.5 times its thickness is deposited on conductors 24, 26 of a large fineness ratio. Thereafter, a soft dielectric polish layer 40 of the identical shape is deposited on an entire structure. When such a polish layer 40 is incorporated, it is constituted of a material selected from among a group formed of PETEOS, BPSG and a combination thereof. Furthermore, the method contains a relatively short CMP process for completing planarization.
Patent JP-2001033885-A (JP)
Title: Image exposure device
Inventor: MOTOOKA EIJI
IPC: G03B27/32
Filed: 1999-07-23
Abstract: PROBLEM TO BE SOLVED: To constitute a device performing excellent exposure by smoothly feeding cut photographic paper to an exposure head. SOLUTION: A carrying system performing exposure by the exposure head 5a by feeding the cut photographic paper 2 from a 1st roller unit U1 equipped with driving rollers 25 and 26 freely switched to a press-contact state and a press-contact releasing state to a 2nd roller unit U2 equipped with driving rollers 36 and 37 freely switched to the press-contact state and the press-contact releasing state is constituted in this device, which is equipped with a one-way clutch 29 allowing free rotation of the unit U1 to the carrying downstream side of the driving roller of the unit U1. Then, carrying speed of the unit U2 is set a little higher than that of the unit U1.
Patent JP-H0257012-A (JP)
Title: Synchronous driver circuit
Inventor: KAWAMOTO KOJI
IPC: H03K17/687
Filed: 1988-08-23
Abstract: PURPOSE:To prevent a through current from flowing at the time of transition by turning on one of two MOS transistors in an external side after the turning-on or off condition of second and third MOS transistors in an internal side is determined. CONSTITUTION:When a synchronizing signal phi is transited to a high logical level VDD, among MOS transistors 1-4, only the MOS transistor 2 is turned on. Then, the logical level of an output signal OUT is not changed. Next, when the synchronizing signal phi is transited to a low logical level GND, the MOS transistor 1 is newly turned on and the output signal OUT is transited to the high logical level VDD. After that, when the synchronizing signal phi is transited to the high logical level VDD again, only the MOS transistor 3 is turned on and the logical level of the output signal OUT is not changed. Then, when the synchronizing signal phi is transited to the low logical level GND, the MOS transistor 4 is newly turned on and the output signal OUT is transited to the low logical level GND. Thus, since one of the MOS transistors 1-4, at least, is always turned off, there is no through current I2.
Patent JP-H0865384-A (JP)
Title: Operation of network management system
Inventor: KAREN EMU RADOUIKUZAKU
IPC: H04Q3/00
Filed: 1995-07-26
Abstract: PROBLEM TO BE SOLVED: To eliminate the trouble of updating operation by a telephone office staff by storing data on components, circuits, etc., of network(NW) constitution determined by discriminating the connectivity of (NW) elements and data and automatically updating the data according to alterations of NW's. SOLUTION: In the networks(NW) 100 to 300, telephone offices 110 to 130 have a fast optical communication by transport multiplexers 111 to 131 through an optical fiber couple 105. Access multiplexers 201 to 204 and 301 to 303 allow customer in-console devices 25 to 75 and an NW administration system 150 to have a communication at a specific speed. The system 150 stores the constitution and operation states of the respective constituent components forming the NW's in a data base 160 and allocates halt channel capacity at a request to increase the bandwidth. Further, the system 150 updates the contents of the data base 160 automatically as the NW's are altered. Consequently, the telephone office staff needs not gather and update data for NW management.
Patent JP-H0374128-A (JP)
Title: Instrument for mounting half protective cover to line
Inventor: FUJIMOTO HIDEKI
IPC: H01B17/58
Filed: 1989-08-12
Abstract: PURPOSE:To easily attach a protective cover to the periphery of a line by cutting out a line inlet at a line inlet guide part and projecting opening/closing plates, and providing a cover guide part for inlet guide of a protective cover at the periphery of the line guide part. CONSTITUTION:A line guide part 18, which has opening/closing plates 16 and 16 projected from the opposed margin of a line inlet 14, and a cover guide part 22, which is provided around the line guide part through a gap 20, are provided. A line is inlet from an line inlet 14 into the line guide part 18, and one end K1 of a half protective cover K is set in the gap between the line guide part 18 and the cover guide part 22. And the holds 24 and 24 are shifted as shown by an arrow with the line inlet 14 being closed by holding this one end K1 and the line L with one hand, and catching holds 24 and 24 with the other hand. Hereby, the half protective cover L is led compulsorily into the cover guide part 22, and after the cover guide part 22 passes, it is set around the line L.
Patent JP-S60101658-A (JP)
Title: Memory control system
Inventor: IKUMA JIYUNICHI
IPC: G06F11/10
Filed: 1983-11-08
Abstract: PURPOSE:To attain a dynamic change of each area range by dividing the inside of the same memory into optional areas to use the areas as an area for action of an error detection parity or an area for an error correcting. CONSTITUTION:Memory parts 402 and 404 having at least a 1-bit parity area added are provided to memory parts 401-404. An error correction flag register FF413 gives an indication to the parts 401-404 in an error correction system for writing of data. An error correction write control part 405 controls the data writing to the parts 401-404 by an output 456 of the FF413 in a parity check system or an error correction system. An error correction read part 406 decides the parity check system or the error correction system for output data on parity areas 402 and 404 and controls a parity checker 104, a code checker 304 and a 1-bit error correction part 12. Thus it is possible to write data to an optional area of the memory part in the parity check system or the error correction system.
Patent JP-H1053232-A (JP)
Title: Casing removing apparatus for food in casing
Inventor: TERAI MASAO
IPC: B65B69/00
Filed: 1996-08-08
Abstract: PROBLEM TO BE SOLVED: To automatically and efficiently remove a casing by providing a cutting device for cutting the casing of a food in the casing into a pair of casing pieces each with a clip and a peeling-off means for peeling off the pair of the casing pieces from the food main body by grasping the clips. SOLUTION: A ham 5 is placed on a ham placing part being a cutting means by means of a ham feeding device and a peripheral direction cutting line m and a peripheral direction cutting line n are formed on both end parts of a casing by means of a peripheral direction cutting blade and axial direction cutting lines s are formed by means of an axial direction cutting blade so as to connect a pair of peripheral direction cutting lines m and n. Then, after it is moved to the ham placing part and a clip 8a is clamped by a clamp 100 of a clamp moving mechanism and a clip 8b is clamped by a clamp 124, both clamps 100 and 124 are moved in mutually reverse direction becoming far from the axial center in the longer direction of the ham main body 6.  Then, peeling tools 134 and 137 are moved in mutually reverse direction in the axial direction of the ham main body 6 to peel off the casing pieces 7a and 7b from the main body 6.
Patent JP-H0631867-A (JP)
Title: Production of fiber reinforced plastic composite plate
Inventor: WATANABE TETSUO
IPC: B32B27/36
Filed: 1992-07-15
Abstract: PURPOSE:To easily produce a fiber reinforced plastic composite plate excellent in/strength or the like in a short time. CONSTITUTION:SMC impregnated with resol type phenolic resin is placed on the surface of a heated bottom force for molding. Then the phenolic resin SMC is heated and pressurized by a heated top force for molding and regulated to a semi-hardening state in the mold. Thereafter the top force is opened and furthermore polyester resin SMC is overlapped on the phenolic resin SMC being in the semi-hardening state, heated and pressurized.
Patent JP-S60101539-A (JP)
Title: Photosensitive lithographic plate
Inventor: SHIBA KEISUKE
IPC: G03F7/06
Filed: 1983-11-08
Abstract: PURPOSE:To prevent stain spots, and white spots on an image part occurring with the lapse of time by forming an alumina film specified in average weight on the surface of an aluminum support, and on this film a layer contg. a specified compd. having a triazine ring. CONSTITUTION:An alumina film having at least 1g/m<2> average weight is formed on the surface of an aluminum support, and a layer formed on this film contains a compd. having repeating units each represented by formula I in which R1 is -OR, -SR, or a group of formula II; R2-5 are each H, or C1-4 alkyl; Y1-4 are each C2-14 polymethylene optionally substd. by C1-4 alkyl, arylene or cycloalkylene both optionally substd. by sulfo, carboxy, C1-4 alkyl or halogen; Z is =O, =SO2, or =CH2; and l, m are each 0 or 1. A compd. having a triazine ring is incorporated, e.g., in at least one of a nonsilver salt photosensitive layer and a silver halide (AgX) photosensitive layer formed in this order on said support having the alumina film. The AgX photosensitive layer is of a direct positive type. As a result, a PS plate prevented from stain spots can be obtained.