Patent TW-202111948-A (TW)
Title: Semiconductor device and power conversion device can prevent the concentration of localized current/electric field or the concentration of current at an the termination part of a chip due to electrical field variation among IGBT cells
Inventor: FURUKAWA TOMOYASU
IPC: H01L29/74
Filed: 2020-07-02
Abstract: The present invention provides a semiconductor device having higher breaking capacity which can suppress the concentration of localized current/electric field or the concentration of current at an the termination part of a chip due to electrical field variation among IGBT cells, which is caused by the variation in shape and impurities during manufacturing process. The present invention is characterized by comprising: an emitter electrode which is formed on the surface of a semiconductor substrate with an interlayer insulation film interposed therebetween; a collecting electrode formed on the back surface of the semiconductor substrate; a first-conductivity-type first semiconductor layer which is contiguous to the collecting electrode and is formed on the back surface of the semiconductor substrate; a second-conductivity-type second semiconductor layer formed in the further inward side than the first semiconductor layer; a central region cell disposed along the surface of the semiconductor substrate; and an outer periphery region cell located in the further outward side than the central region cell in the planar direction of the semiconductor substrate and disposed between the central region cell and a chip termination guard ring region. The central region cell includes a trench formed between the emitter electrode and the semiconductor substrate; a gate electrode which is formed on the inside of the trench with a gate insulation film interposed therebetween and is insulated from the emitter electrode via the interlayer insulation film; a second-conductivity-type third semiconductor layer formed contiguously to the gate insulation film and having a doping concentration higher than that of the semiconductor substrate; a first-conductivity-type fourth semiconductor layer formed to be contiguous to the semiconductor-substrate side of the emitter electrode through an emitter contact, and having a doping concentration higher than that of the first semiconductor layer; a first-conductivity-type fifth semiconductor layer which is contiguous to the gate insulation film, is formed on the semiconductor-substrate side of the second semiconductor layer, and has a doping concentration lower than that of the fourth semiconductor layer; a first-conductivity-type sixth semiconductor layer which is contiguous to the surface of the semiconductor-substrate side of the fourth semiconductor layer, is formed to protrude further toward the semiconductor substrate-side than the fifth semiconductor layer, and has a carrier concentration lower than that of the fourth semiconductor layer; and a second-conductivity-type seventh semiconductor layer formed to be contiguous to the surface of the collecting-electrode-side of the sixth semiconductor layer, and having a doping concentration higher than that of the semiconductor substrate. The outer peripheral region cell has the trench, the gate electrode, the fourth semiconductor layer, the fifth semiconductor layer, and the sixth semiconductor. The outer peripheral region cell does not have at least one of the third semiconductor layer and the seventh semiconductor layer.